target/linux/ramips/dts/DIR-860L-B1.dts

   1 /dts-v1/;
   2
   3 #include "mt7621.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
  10         model = "D-Link DIR-860L B1";
  11
  12         memory@0 {
  13                 device_type = "memory";
  14                 reg = <0x0 0x8000000>;
  15         };
  16
  17         chosen {
  18                 bootargs = "console=ttyS0,57600";
  19         };
  20
  21         gpio-leds {
  22                 compatible = "gpio-leds";
  23
  24                 power {
  25                         label = "dir-860l-b1:orange:power";
  26                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  27                 };
  28
  29                 power2 {
  30                         label = "dir-860l-b1:green:power";
  31                         gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  32                 };
  33
  34                 net {
  35                         label = "dir-860l-b1:orange:net";
  36                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 net2 {
  40                         label = "dir-860l-b1:green:net";
  41                         gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  42                 };
  43         };
  44
  45         gpio-keys-polled {
  46                 compatible = "gpio-keys-polled";
  47                 #address-cells = <1>;
  48                 #size-cells = <0>;
  49                 poll-interval = <20>;
  50
  51                 reset {
  52                         label = "reset";
  53                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  54                         linux,code = <KEY_RESTART>;
  55                 };
  56
  57                 wps {
  58                         label = "wps";
  59                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  60                         linux,code = <KEY_WPS_BUTTON>;
  61                 };
  62         };
  63 };
  64
  65 &spi0 {
  66         status = "okay";
  67
  68         m25p80@0 {
  69                 #address-cells = <1>;
  70                 #size-cells = <1>;
  71                 compatible = "jedec,spi-nor";
  72                 reg = <0>;
  73                 spi-max-frequency = <10000000>;
  74                 m25p,chunked-io = <32>;
  75
  76                 partition@0 {
  77                         label = "u-boot";
  78                         reg = <0x0 0x30000>;
  79                         read-only;
  80                 };
  81
  82                 partition@30000 {
  83                         label = "u-boot-env";
  84                         reg = <0x30000 0x4000>;
  85                         read-only;
  86                 };
  87
  88                 radio: partition@34000 {
  89                         label = "radio";
  90                         reg = <0x34000 0x4000>;
  91                         read-only;
  92                 };
  93
  94                 factory: partition@38000 {
  95                         label = "factory";
  96                         reg = <0x38000 0x8000>;
  97                         read-only;
  98                 };
  99
 100                 partition@40000 {
 101                         label = "defaults";
 102                         reg = <0x40000 0x10000>;
 103                         read-only;
 104                 };
 105
 106                 partition@50000 {
 107                         label = "firmware";
 108                         reg = <0x50000 0xfb0000>;
 109                 };
 110         };
 111 };
 112
 113 &pcie {
 114         status = "okay";
 115
 116         pcie0 {
 117                 mt76@0,0 {
 118                         reg = <0x0000 0 0 0 0>;
 119                         device_type = "pci";
 120                         mediatek,mtd-eeprom = <&radio 0x2000>;
 121                         ieee80211-freq-limit = <5000000 6000000>;
 122                 };
 123         };
 124
 125         pcie1 {
 126                 mt76@1,0 {
 127                         reg = <0x0000 0 0 0 0>;
 128                         device_type = "pci";
 129                         mediatek,mtd-eeprom = <&radio 0>;
 130                         ieee80211-freq-limit = <2400000 2500000>;
 131                 };
 132         };
 133 };
 134
 135 &pinctrl {
 136         state_default: pinctrl0 {
 137                 gpio {
 138                         ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
 139                         ralink,function = "gpio";
 140                 };
 141         };
 142 };