ramips: fix MTD EEPROM offset for TL-WR840N v5
[oweals/openwrt.git] / target / linux / ramips / dts / BR-6478AC-V2.dts
1 /*
2  * Device Tree file for the Edimax BR-6478AC V2
3  * based on Linksys E1700
4  *
5  * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com>
6  * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com>
7  * Copyright (C) 2017 James McKenzie <openwrt@madingley.org>
8  *
9  * This file is licensed under the terms of the GNU General Public
10  * License version 2.  This program is licensed "as is" without any
11  * warranty of any kind, whether express or implied.
12  */
13
14 /dts-v1/;
15
16 #include "mt7620a.dtsi"
17
18 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/input/input.h>
20
21 / {
22         compatible = "edimax,br-6478ac-v2", "ralink,mt7620a-soc";
23         model = "Edimax BR-6478AC v2";
24
25         aliases {
26                 led-boot = &led_power;
27                 led-failsafe = &led_power;
28                 led-running = &led_power;
29                 led-upgrade = &led_power;
30         };
31
32         chosen {
33                 bootargs = "console=ttyS0,57600";
34         };
35
36         gpio-keys-polled {
37                 compatible = "gpio-keys-polled";
38                 poll-interval = <20>;
39
40                 reset_wps {
41                         label = "reset_wps";
42                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
43                         linux,code = <KEY_RESTART>;
44                 };
45         };
46
47         gpio-leds {
48                 compatible = "gpio-leds";
49
50                 led_power: power {
51                         label = "br-6478ac-v2:white:power";
52                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
53                 };
54                 internet {
55                         label = "br-6478ac-v2:blue:internet";
56                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
57                 };
58                 wlan {
59                         label = "br-6478ac-v2:blue:wlan";
60                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
61                 };
62                 usb {
63                         label = "br-6478ac-v2:blue:usb";
64                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
65                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
66                         linux,default-trigger = "usbport";
67                 };
68         };
69
70
71         gpio_export {
72                 compatible = "gpio-export";
73                 #size-cells = <0>;
74                 usb-power {
75                         gpio-export,name="usb-power";
76                         gpio-export,output=<1>;
77                         gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
78                 };
79         };
80 };
81
82
83 &gpio2 {
84         status = "okay";
85 };
86
87 &spi0 {
88         status = "okay";
89
90         flash@0 {
91                 compatible = "jedec,spi-nor";
92                 reg = <0 0>;
93                 spi-max-frequency = <10000000>;
94
95                 partitions {
96                         compatible = "fixed-partitions";
97                         #address-cells = <1>;
98                         #size-cells = <1>;
99
100                         partition@0 {
101                                 label = "u-boot";
102                                 reg = <0x0 0x30000>;
103                                 read-only;
104                         };
105
106                         partition@30000 {
107                                 label = "u-boot-env";
108                                 reg = <0x30000 0x10000>;
109                                 read-only;
110                         };
111
112                         factory: partition@40000 {
113                                 label = "factory";
114                                 reg = <0x40000 0x10000>;
115                                 read-only;
116                         };
117
118                         partition@50000 {
119                                 label = "cimage";
120                                 reg = <0x50000 0x20000>;
121                                 read-only;
122                         };
123
124                         partition@70000 {
125                                 label = "firmware";
126                                 reg = <0x00070000 0x00790000>;
127                         };
128                 };
129         };
130 };
131
132 &pinctrl {
133         state_default: pinctrl0 {
134                 gpio {
135                         ralink,group = "i2c", "uartf", "nd_sd";
136                         ralink,function = "gpio";
137                 };
138         };
139 };
140
141 &ethernet {
142         status = "okay";
143         mtd-mac-address = <&factory 0x4>;
144         pinctrl-names = "default";
145         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
146         mediatek,portmap = "wllll";
147
148         port@5 {
149                 status = "okay";
150                 mediatek,fixed-link = <1000 1 1 1>;
151                 phy-mode = "rgmii";
152         };
153
154         mdio-bus {
155                 status = "okay";
156
157                 phy0: ethernet-phy@0 {
158                         reg = <0>;
159                         phy-mode = "rgmii";
160                 };
161
162                 phy1: ethernet-phy@1 {
163                         reg = <1>;
164                         phy-mode = "rgmii";
165                 };
166
167                 phy2: ethernet-phy@2 {
168                         reg = <2>;
169                         phy-mode = "rgmii";
170                 };
171
172                 phy3: ethernet-phy@3 {
173                         reg = <3>;
174                         phy-mode = "rgmii";
175                 };
176
177                 phy4: ethernet-phy@4 {
178                         reg = <4>;
179                         phy-mode = "rgmii";
180                 };
181
182                 phy1f: ethernet-phy@1f {
183                         reg = <0x1f>;
184                         phy-mode = "rgmii";
185                 };
186         };
187 };
188
189 &gsw {
190         mediatek,port4 = "gmac";
191 };
192
193 &wmac {
194         ralink,mtd-eeprom = <&factory 0>;
195 };
196
197 &pcie {
198         status = "okay";
199 };
200
201 &pcie0 {
202         wifi@0,0 {
203                 reg = <0x0000 0 0 0 0>;
204                 mediatek,mtd-eeprom = <&factory 0x8000>;
205                 mediatek,2ghz = <0>;
206         };
207 };
208
209 &ehci {
210         status = "okay";
211 };
212
213 &ohci {
214         status = "okay";
215 };