target/linux/ramips/dts/ArcherC20i.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "tplink,c20i", "ralink,mt7620a-soc";
  10         model = "TP-Link Archer C20i";
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,115200";
  14         };
  15
  16         gpio-leds {
  17                 compatible = "gpio-leds";
  18                 lan {
  19                         label = "c20i:blue:lan";
  20                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  21                 };
  22                 usb {
  23                         label = "c20i:blue:usb";
  24                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  25                 };
  26                 wps {
  27                         label = "c20i:blue:wps";
  28                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  29                 };
  30                 wan {
  31                         label = "c20i:blue:wan";
  32                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  33                 };
  34                 wlan {
  35                         label = "c20i:blue:wlan";
  36                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  37                 };
  38         };
  39
  40         gpio-keys {
  41                 compatible = "gpio-keys";
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 rfkill {
  45                         label = "rfkill";
  46                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  47                         linux,code = <KEY_RFKILL>;
  48                 };
  49                 reset_wps {
  50                         label = "reset_wps";
  51                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  52                         linux,code = <KEY_RESTART>;
  53                 };
  54         };
  55 };
  56
  57 &gpio1 {
  58         status = "okay";
  59 };
  60
  61 &gpio2 {
  62         status = "okay";
  63 };
  64
  65 &gpio3 {
  66         status = "okay";
  67 };
  68
  69 &spi0 {
  70         status = "okay";
  71
  72         m25p80@0 {
  73                 #address-cells = <1>;
  74                 #size-cells = <1>;
  75                 compatible = "jedec,spi-nor";
  76                 reg = <0>;
  77                 spi-max-frequency = <10000000>;
  78
  79                 partition@0 {
  80                         label = "u-boot";
  81                         reg = <0x0 0x20000>;
  82                         read-only;
  83                 };
  84
  85                 partition@20000 {
  86                         label = "firmware";
  87                         reg = <0x20000 0x7a0000>;
  88                 };
  89
  90                 partition@7c0000 {
  91                         label = "config";
  92                         reg = <0x7c0000 0x10000>;
  93                 };
  94
  95                 rom: partition@7d0000 {
  96                         label = "rom";
  97                         reg = <0x7d0000 0x10000>;
  98                 };
  99
 100                 partition@7e0000 {
 101                         label = "romfile";
 102                         reg = <0x7e0000 0x10000>;
 103                 };
 104
 105                 radio: partition@7f0000 {
 106                         label = "radio";
 107                         reg = <0x7f0000 0x10000>;
 108                 };
 109         };
 110 };
 111
 112 &pinctrl {
 113         state_default: pinctrl0 {
 114                 gpio {
 115                         ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
 116                         ralink,function = "gpio";
 117                 };
 118         };
 119 };
 120
 121 &ethernet {
 122                 pinctrl-names = "default";
 123                 mtd-mac-address = <&rom 0xf100>;
 124                 mediatek,portmap = "wllll";
 125         };
 126
 127 &ehci {
 128         status = "okay";
 129 };
 130
 131 &ohci {
 132         status = "okay";
 133 };
 134
 135 &gsw {
 136         mediatek,port4 = "ephy";
 137 };
 138
 139 &wmac {
 140         ralink,mtd-eeprom = <&radio 0>;
 141 };
 142
 143 &pcie {
 144         status = "okay";
 145
 146         pcie-bridge {
 147                 mt76@0,0 {
 148                         reg = <0x0000 0 0 0 0>;
 149                         device_type = "pci";
 150                         mediatek,mtd-eeprom = <&radio 32768>;
 151                 };
 152         };
 153 };