target/linux/ppc40x/patches/100-magicbox-ide-driver.patch

   1 --- a/drivers/ide/Kconfig
   2 +++ b/drivers/ide/Kconfig
   3 @@ -712,6 +712,11 @@ config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
   4         default "128"
   5         depends on BLK_DEV_IDE_AU1XXX
   6
   7 +config BLK_DEV_IDE_MAGICBOX
   8 +       tristate "Magicbox CF card support"
   9 +       depends on MAGICBOXV2 || OPENRB_LIGHT
  10 +       select IDE_XFER_MODE
  11 +
  12  config BLK_DEV_IDE_TX4938
  13         tristate "TX4938 internal IDE support"
  14         depends on SOC_TX4938
  15 --- a/drivers/ide/Makefile
  16 +++ b/drivers/ide/Makefile
  17 @@ -110,6 +110,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE)    += rapi
  18  obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710)  += palm_bk3710.o
  19
  20  obj-$(CONFIG_BLK_DEV_IDE_AU1XXX)       += au1xxx-ide.o
  21 +obj-$(CONFIG_BLK_DEV_IDE_MAGICBOX)     += magicbox_ide.o
  22
  23  obj-$(CONFIG_BLK_DEV_IDE_TX4938)       += tx4938ide.o
  24  obj-$(CONFIG_BLK_DEV_IDE_TX4939)       += tx4939ide.o
  25 --- /dev/null
  26 +++ b/drivers/ide/magicbox_ide.c
  27 @@ -0,0 +1,332 @@
  28 +/*
  29 + *  IDE driver for the MagicBox 2.0 onboard CompactFlash slot.
  30 + *
  31 + *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
  32 + *
  33 + *  Based on the original driver by Wojtek Kaniewski <wojtekka@toxygen.net>
  34 + *
  35 + *  This program is free software; you can redistribute it and/or modify it
  36 + *  under the terms of the GNU General Public License version 2 as published
  37 + *  by the Free Software Foundation.
  38 + */
  39 +
  40 +#include <linux/types.h>
  41 +#include <linux/ioport.h>
  42 +#include <linux/of.h>
  43 +#include <linux/of_device.h>
  44 +#include <linux/of_platform.h>
  45 +#include <linux/ide.h>
  46 +
  47 +#define DRV_DESC       "IDE driver for Magicbox 2.0 onboard CF slot"
  48 +#define DRV_NAME       "magicbox_cf"
  49 +
  50 +static u8 magicbox_ide_inb(unsigned long port)
  51 +{
  52 +       return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
  53 +}
  54 +
  55 +static void magicbox_ide_outb(u8 value, unsigned long port)
  56 +{
  57 +       writew(value << 8, (void __iomem *) port);
  58 +}
  59 +
  60 +static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
  61 +{
  62 +       u16 *ptr;
  63 +
  64 +       for (ptr = addr; count--; ptr++)
  65 +               *ptr = readw((void __iomem *) port);
  66 +}
  67 +
  68 +static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
  69 +{
  70 +       u32 *ptr;
  71 +
  72 +       for (ptr = addr; count--; ptr++)
  73 +               *ptr = readl((void __iomem *) port);
  74 +}
  75 +
  76 +static inline void magicbox_ide_outsw(unsigned long port, void *addr,
  77 +                                       u32 count)
  78 +{
  79 +       u16 *ptr;
  80 +
  81 +       for (ptr = addr; count--; ptr++)
  82 +               writew(*ptr, (void __iomem *) port);
  83 +}
  84 +
  85 +static inline void magicbox_ide_outsl(unsigned long port, void *addr,
  86 +                                       u32 count)
  87 +{
  88 +       u32 *ptr;
  89 +
  90 +       for (ptr = addr; count--; ptr++)
  91 +               writel(*ptr, (void __iomem *) port);
  92 +}
  93 +
  94 +static void magicbox_ide_exec_command(ide_hwif_t *hwif, u8 cmd)
  95 +{
  96 +       magicbox_ide_outb(cmd, hwif->io_ports.command_addr);
  97 +}
  98 +
  99 +static u8 magicbox_ide_read_status(ide_hwif_t *hwif)
 100 +{
 101 +       return magicbox_ide_inb(hwif->io_ports.status_addr);
 102 +}
 103 +
 104 +static u8 magicbox_ide_read_altstatus(ide_hwif_t *hwif)
 105 +{
 106 +       return magicbox_ide_inb(hwif->io_ports.ctl_addr);
 107 +}
 108 +
 109 +static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
 110 +{
 111 +       struct ide_io_ports *io_ports = &drive->hwif->io_ports;
 112 +       struct ide_taskfile *tf = &task->tf;
 113 +       u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
 114 +
 115 +       if (task->tf_flags & IDE_TFLAG_FLAGGED)
 116 +               HIHI = 0xFF;
 117 +
 118 +       if (task->tf_flags & IDE_TFLAG_OUT_DATA)
 119 +               writel((tf->hob_data << 8) | tf->data,
 120 +                       (void __iomem *) io_ports->data_addr);
 121 +
 122 +       if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
 123 +               magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
 124 +       if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
 125 +               magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
 126 +       if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
 127 +               magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
 128 +       if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
 129 +               magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
 130 +       if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
 131 +               magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
 132 +
 133 +       if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
 134 +               magicbox_ide_outb(tf->feature, io_ports->feature_addr);
 135 +       if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
 136 +               magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
 137 +       if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
 138 +               magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
 139 +       if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
 140 +               magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
 141 +       if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
 142 +               magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
 143 +
 144 +       if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
 145 +               magicbox_ide_outb((tf->device & HIHI) | drive->select,
 146 +                            io_ports->device_addr);
 147 +}
 148 +
 149 +static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
 150 +{
 151 +       struct ide_io_ports *io_ports = &drive->hwif->io_ports;
 152 +       struct ide_taskfile *tf = &task->tf;
 153 +
 154 +       if (task->tf_flags & IDE_TFLAG_IN_DATA) {
 155 +               u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
 156 +
 157 +               tf->data = data & 0xff;
 158 +               tf->hob_data = (data >> 8) & 0xff;
 159 +       }
 160 +
 161 +       /* be sure we're looking at the low order bits */
 162 +       magicbox_ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
 163 +
 164 +       if (task->tf_flags & IDE_TFLAG_IN_NSECT)
 165 +               tf->nsect  = magicbox_ide_inb(io_ports->nsect_addr);
 166 +       if (task->tf_flags & IDE_TFLAG_IN_LBAL)
 167 +               tf->lbal   = magicbox_ide_inb(io_ports->lbal_addr);
 168 +       if (task->tf_flags & IDE_TFLAG_IN_LBAM)
 169 +               tf->lbam   = magicbox_ide_inb(io_ports->lbam_addr);
 170 +       if (task->tf_flags & IDE_TFLAG_IN_LBAH)
 171 +               tf->lbah   = magicbox_ide_inb(io_ports->lbah_addr);
 172 +       if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
 173 +               tf->device = magicbox_ide_inb(io_ports->device_addr);
 174 +
 175 +       if (task->tf_flags & IDE_TFLAG_LBA48) {
 176 +               magicbox_ide_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
 177 +
 178 +               if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
 179 +                       tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
 180 +               if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
 181 +                       tf->hob_nsect   = magicbox_ide_inb(io_ports->nsect_addr);
 182 +               if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
 183 +                       tf->hob_lbal    = magicbox_ide_inb(io_ports->lbal_addr);
 184 +               if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
 185 +                       tf->hob_lbam    = magicbox_ide_inb(io_ports->lbam_addr);
 186 +               if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
 187 +                       tf->hob_lbah    = magicbox_ide_inb(io_ports->lbah_addr);
 188 +       }
 189 +}
 190 +
 191 +static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
 192 +                          void *buf, unsigned int len)
 193 +{
 194 +       unsigned long port = drive->hwif->io_ports.data_addr;
 195 +
 196 +       len++;
 197 +
 198 +       if (drive->io_32bit) {
 199 +               magicbox_ide_insl(port, buf, len / 4);
 200 +
 201 +               if ((len & 3) >= 2)
 202 +                       magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
 203 +       } else
 204 +               magicbox_ide_insw(port, buf, len / 2);
 205 +}
 206 +
 207 +static void magicbox_ide_output_data(ide_drive_t *drive,  struct request *rq,
 208 +                           void *buf, unsigned int len)
 209 +{
 210 +       unsigned long port = drive->hwif->io_ports.data_addr;
 211 +
 212 +       len++;
 213 +
 214 +       if (drive->io_32bit) {
 215 +               magicbox_ide_outsl(port, buf, len / 4);
 216 +
 217 +               if ((len & 3) >= 2)
 218 +                       magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
 219 +       } else
 220 +               magicbox_ide_outsw(port, buf, len / 2);
 221 +}
 222 +
 223 +static void magicbox_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
 224 +{
 225 +}
 226 +
 227 +static u8 magicbox_ide_cable_detect(ide_hwif_t *hwif)
 228 +{
 229 +       return ATA_CBL_PATA40;
 230 +}
 231 +
 232 +static const struct ide_tp_ops magicbox_ide_tp_ops = {
 233 +       .exec_command   = magicbox_ide_exec_command,
 234 +       .read_status    = magicbox_ide_read_status,
 235 +       .read_altstatus = magicbox_ide_read_altstatus,
 236 +
 237 +       .set_irq        = ide_set_irq,
 238 +       .tf_load        = magicbox_ide_tf_load,
 239 +       .tf_read        = magicbox_ide_tf_read,
 240 +
 241 +       .input_data     = magicbox_ide_input_data,
 242 +       .output_data    = magicbox_ide_output_data,
 243 +};
 244 +
 245 +static const struct ide_port_ops magicbox_ide_port_ops = {
 246 +       .set_pio_mode   = magicbox_ide_set_pio_mode,
 247 +       .cable_detect   = magicbox_ide_cable_detect,
 248 +};
 249 +
 250 +static const struct ide_port_info magicbox_ide_port_info = {
 251 +       .name           = DRV_NAME,
 252 +       .chipset        = ide_generic,
 253 +       .tp_ops         = &magicbox_ide_tp_ops,
 254 +       .port_ops       = &magicbox_ide_port_ops,
 255 +       .host_flags     = IDE_HFLAG_SINGLE |
 256 +                         IDE_HFLAG_NO_DMA |
 257 +                         IDE_HFLAG_MMIO |
 258 +                         IDE_HFLAG_UNMASK_IRQS,
 259 +       .pio_mask       = ATA_PIO4,
 260 +};
 261 +
 262 +static inline void magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
 263 +                                        u16 __iomem *ctrl, int irq)
 264 +{
 265 +       unsigned long port = (unsigned long) base;
 266 +       int i;
 267 +
 268 +       memset(hw, 0, sizeof(*hw));
 269 +       for (i = 0; i <= 7; i++)
 270 +               hw->io_ports_array[i] = port + i * 2;
 271 +
 272 +       /*
 273 +        * the IDE control register is at ATA address 6,
 274 +        * with CS1 active instead of CS0
 275 +        */
 276 +       hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
 277 +
 278 +       hw->irq = irq;
 279 +       hw->chipset = ide_generic;
 280 +       hw->ack_intr = NULL;
 281 +}
 282 +
 283 +static int __devinit magicbox_ide_of_probe(struct of_device *op,
 284 +                                          const struct of_device_id *match)
 285 +{
 286 +       hw_regs_t hw;
 287 +       hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
 288 +       struct ide_host *host;
 289 +       u16 __iomem *base;
 290 +       u16 __iomem *ctrl;
 291 +       int irq;
 292 +       int ret = 0;
 293 +
 294 +       irq = irq_of_parse_and_map(op->node, 0);
 295 +       if (irq < 0) {
 296 +               dev_err(&op->dev, "invalid irq\n");
 297 +               ret = -EINVAL;
 298 +               goto err_exit;
 299 +       }
 300 +
 301 +       base = of_iomap(op->node, 0);
 302 +       if (base == NULL) {
 303 +               ret = -ENOMEM;
 304 +               goto err_exit;
 305 +       }
 306 +
 307 +       ctrl = of_iomap(op->node, 1);
 308 +       if (ctrl == NULL) {
 309 +               ret = -ENOMEM;
 310 +               goto err_unmap_base;
 311 +       }
 312 +
 313 +       magicbox_ide_setup_hw(&hw, base, ctrl, irq);
 314 +
 315 +       hw.dev = &op->dev;
 316 +
 317 +       ret = ide_host_add(&magicbox_ide_port_info, hws, &host);
 318 +       if (ret)
 319 +               goto err_unmap_ctrl;
 320 +
 321 +       dev_set_drvdata(&op->dev, host);
 322 +
 323 +       return 0;
 324 +
 325 + err_unmap_ctrl:
 326 +       iounmap(ctrl);
 327 + err_unmap_base:
 328 +       iounmap(base);
 329 + err_exit:
 330 +       return ret;
 331 +}
 332 +
 333 +static struct of_device_id magicbox_ide_of_match[] = {
 334 +       { .compatible = "magicbox-cf", },
 335 +       {},
 336 +};
 337 +
 338 +static struct of_platform_driver magicbox_ide_of_platform_driver = {
 339 +       .owner          = THIS_MODULE,
 340 +       .name           = DRV_NAME,
 341 +       .match_table    = magicbox_ide_of_match,
 342 +       .probe          = magicbox_ide_of_probe,
 343 +       .driver         = {
 344 +               .name   = DRV_NAME,
 345 +               .owner  = THIS_MODULE,
 346 +       },
 347 +};
 348 +
 349 +static int __init magicbox_ide_init(void)
 350 +{
 351 +       return of_register_platform_driver(&magicbox_ide_of_platform_driver);
 352 +}
 353 +
 354 +module_init(magicbox_ide_init);
 355 +
 356 +MODULE_DESCRIPTION(DRV_DESC);
 357 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 358 +MODULE_LICENSE("GPL v2");
 359 +MODULE_DEVICE_TABLE(of, magicbox_ide_of_match);