2 +++ b/arch/powerpc/boot/cuboot-magicbox.c
5 + * Old U-boot compatibility for Magicbox boards
7 + * Author: Imre Kaloz <kaloz@openwrt.org>
8 + * Gabor Juhos <juhosg@openwrt.org>
10 + * This program is free software; you can redistribute it and/or modify it
11 + * under the terms of the GNU General Public License version 2 as published
12 + * by the Free Software Foundation.
29 +static void fixup_perwe(void)
31 +#define DCRN_CPC0_PCI_BASE 0xf9
33 + /* Turn on PerWE instead of PCIINT */
34 + mtdcr(DCRN_CPC0_PCI_BASE,
35 + mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
37 +#undef DCRN_CPC0_PCI_BASE
40 +static void fixup_cf_card(void)
42 +#define CF_CS0_BASE 0xff100000
43 +#define CF_CS1_BASE 0xff200000
45 + /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
46 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
47 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
48 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
49 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
51 + /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
52 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
53 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
54 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
55 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
61 +static void magicbox_fixups(void)
63 + ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
64 + ibm4xx_sdram_fixup_memsize();
66 + /* Magicbox v1 has only one ethernet, one serial and no
67 + * CF slot -- detect it using it's fake enet1addr
69 + if ((bd.bi_enet1addr[0] == 0x00) &&
70 + (bd.bi_enet1addr[1] == 0x00) &&
71 + (bd.bi_enet1addr[2] == 0x02) &&
72 + (bd.bi_enet1addr[3] == 0xfa) &&
73 + (bd.bi_enet1addr[4] == 0xf0) &&
74 + (bd.bi_enet1addr[5] == 0x80)) {
77 + devp = finddevice("/plb/opb/ethernet@ef600900");
79 + devp = finddevice("/plb/opb/serial@ef600400");
81 + devp = finddevice("/plb/ebc/cf_card@ff100000");
88 + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
91 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
92 + unsigned long r6, unsigned long r7)
95 + platform_ops.fixups = magicbox_fixups;
96 + platform_ops.exit = ibm40x_dbcr_reset;
97 + fdt_init(_dtb_start);
98 + serial_console_init();
101 +++ b/arch/powerpc/boot/dts/magicbox.dts
104 + * Device Tree Source for Magicbox boards
106 + * Copyright 2008-2009 Imre Kaloz <kaloz@openwrt.org>
107 + * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
109 + * Based on walnut.dts
111 + * This file is licensed under the terms of the GNU General Public
112 + * License version 2. This program is licensed "as is" without
113 + * any warranty of any kind, whether express or implied.
119 + #address-cells = <1>;
121 + model = "magicbox";
122 + compatible = "magicbox";
123 + dcr-parent = <&{/cpus/cpu@0}>;
126 + ethernet0 = &EMAC0;
127 + ethernet1 = &EMAC1;
133 + #address-cells = <1>;
137 + device_type = "cpu";
138 + model = "PowerPC,405EP";
139 + reg = <0x00000000>;
140 + clock-frequency = <0>; /* Filled in by zImage */
141 + timebase-frequency = <0>; /* Filled in by zImage */
142 + i-cache-line-size = <0x20>;
143 + d-cache-line-size = <0x20>;
144 + i-cache-size = <0x4000>;
145 + d-cache-size = <0x4000>;
147 + dcr-access-method = "native";
152 + device_type = "memory";
153 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
156 + UIC0: interrupt-controller {
157 + compatible = "ibm,uic";
158 + interrupt-controller;
160 + dcr-reg = <0x0c0 0x009>;
161 + #address-cells = <0>;
163 + #interrupt-cells = <2>;
167 + compatible = "ibm,plb3";
168 + #address-cells = <1>;
171 + clock-frequency = <0>; /* Filled in by zImage */
173 + SDRAM0: memory-controller {
174 + compatible = "ibm,sdram-405ep";
175 + dcr-reg = <0x010 0x002>;
179 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
180 + dcr-reg = <0x180 0x062>;
181 + num-tx-chans = <4>;
182 + num-rx-chans = <2>;
183 + interrupt-parent = <&UIC0>;
185 + 0xb 0x4 /* TXEOB */
186 + 0xc 0x4 /* RXEOB */
189 + 0xe 0x4 /* RXDE */>;
193 + compatible = "ibm,opb-405ep", "ibm,opb";
194 + #address-cells = <1>;
196 + ranges = <0xef600000 0xef600000 0x00a00000>;
197 + dcr-reg = <0x0a0 0x005>;
198 + clock-frequency = <0>; /* Filled in by zImage */
200 + UART0: serial@ef600300 {
201 + device_type = "serial";
202 + compatible = "ns16550";
203 + reg = <0xef600300 0x00000008>;
204 + virtual-reg = <0xef600300>;
205 + clock-frequency = <0>; /* Filled in by zImage */
206 + current-speed = <115200>;
207 + interrupt-parent = <&UIC0>;
208 + interrupts = <0x0 0x4>;
211 + UART1: serial@ef600400 {
212 + device_type = "serial";
213 + compatible = "ns16550";
214 + reg = <0xef600400 0x00000008>;
215 + virtual-reg = <0xef600400>;
216 + clock-frequency = <0>; /* Filled in by zImage */
217 + current-speed = <115200>;
218 + interrupt-parent = <&UIC0>;
219 + interrupts = <0x1 0x4>;
222 + IIC: i2c@ef600500 {
223 + compatible = "ibm,iic-405ep", "ibm,iic";
224 + #address-cells = <1>;
226 + reg = <0xef600500 0x00000011>;
227 + interrupt-parent = <&UIC0>;
228 + interrupts = <0x2 0x4>;
231 + compatible = "national,lm75";
236 + compatible = "at24,24c16";
241 + GPIO0: gpio-controller@ef600700 {
242 + compatible = "ibm,ppc4xx-gpio";
243 + reg = <0xef600700 0x00000020>;
248 + EMAC0: ethernet@ef600800 {
249 + linux,network-index = <0x0>;
250 + device_type = "network";
251 + compatible = "ibm,emac-405ep", "ibm,emac";
252 + interrupt-parent = <&UIC0>;
254 + 0xf 0x4 /* Ethernet */
255 + 0x9 0x4 /* Ethernet Wake Up */>;
256 + local-mac-address = [000000000000]; /* Filled in by zImage */
257 + reg = <0xef600800 0x00000070>;
258 + mal-device = <&MAL>;
259 + mal-tx-channel = <0>;
260 + mal-rx-channel = <0>;
262 + max-frame-size = <0x5dc>;
263 + rx-fifo-size = <0x1000>;
264 + tx-fifo-size = <0x800>;
266 + phy-map = <0x00000000>;
269 + EMAC1: ethernet@ef600900 {
270 + linux,network-index = <0x1>;
271 + device_type = "network";
272 + compatible = "ibm,emac-405ep", "ibm,emac";
273 + interrupt-parent = <&UIC0>;
275 + 0x11 0x4 /* Ethernet */
276 + 0x09 0x4 /* Ethernet Wake Up */>;
277 + local-mac-address = [000000000000]; /* Filled in by zImage */
278 + reg = <0xef600900 0x00000070>;
279 + mal-device = <&MAL>;
280 + mal-tx-channel = <2>;
281 + mal-rx-channel = <1>;
283 + max-frame-size = <0x5dc>;
284 + rx-fifo-size = <0x1000>;
285 + tx-fifo-size = <0x800>;
286 + mdio-device = <&EMAC0>;
288 + phy-map = <0x00000001>;
292 + compatible = "gpio-leds";
294 + label = "magicbox:red:user";
295 + gpios = <&GPIO0 2 1>;
301 + compatible = "ibm,ebc-405ep", "ibm,ebc";
302 + dcr-reg = <0x012 0x002>;
303 + #address-cells = <2>;
305 + /* The ranges property is supplied by the bootwrapper
306 + * and is based on the firmware's configuration of the
309 + clock-frequency = <0>; /* Filled in by zImage */
312 + compatible = "magicbox-cf", "pata-magicbox-cf";
313 + reg = <0x00000000 0xff100000 0x00001000
314 + 0x00000000 0xff200000 0x00001000>;
315 + interrupt-parent = <&UIC0>;
316 + interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
319 + nor_flash@ffc00000 {
320 + compatible = "cfi-flash";
322 + reg = <0x00000000 0xffc00000 0x00400000>;
323 + #address-cells = <1>;
327 + reg = <0x0 0x140000>;
329 + partition1@120000 {
331 + reg = <0x140000 0x680000>;
333 + partition2@7c0000 {
335 + reg = <0x7c0000 0x30000>;
339 + label = "firmware";
340 + reg = <0x0 0x7c0000>;
345 + PCI0: pci@ec000000 {
346 + device_type = "pci";
347 + #interrupt-cells = <1>;
349 + #address-cells = <3>;
350 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
352 + reg = <0xeec00000 0x00000008 /* Config space access */
353 + 0xeed80000 0x00000004 /* IACK */
354 + 0xeed80000 0x00000004 /* Special cycle */
355 + 0xef480000 0x00000040>; /* Internal registers */
357 + /* Outbound ranges, one memory and one IO,
358 + * later cannot be changed. Chip supports a second
359 + * IO range but we don't use it for now
361 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
362 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
364 + /* Inbound 2GB range starting at 0 */
365 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
367 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
370 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
373 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
376 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
379 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
385 + linux,stdout-path = "/plb/opb/serial@ef600300";
388 --- a/arch/powerpc/boot/Makefile
389 +++ b/arch/powerpc/boot/Makefile
390 @@ -43,6 +43,7 @@ $(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -
391 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
392 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
393 $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
394 +$(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
395 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
396 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
398 @@ -76,7 +77,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
399 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
400 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
401 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
402 - cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
403 + cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
405 src-boot := $(src-wlib) $(src-plat) empty.c
407 src-boot := $(addprefix $(obj)/, $(src-boot))
408 @@ -194,6 +196,7 @@ image-$(CONFIG_EP405) += dtbImage.ep40
409 image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
410 image-$(CONFIG_WALNUT) += treeImage.walnut
411 image-$(CONFIG_ACADIA) += cuImage.acadia
412 +image-$(CONFIG_MAGICBOX) += cuImage.magicbox
414 # Board ports in arch/powerpc/platform/44x/Kconfig
415 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
416 --- a/arch/powerpc/platforms/40x/Kconfig
417 +++ b/arch/powerpc/platforms/40x/Kconfig
418 @@ -60,6 +60,16 @@ config KILAUEA
420 This option enables support for the AMCC PPC405EX evaluation board.
426 + select PPC40x_SIMPLE
430 + This option enables support for the Magicbox boards.
435 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
436 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
437 @@ -55,7 +55,8 @@ static char *board[] __initdata = {
446 static int __init ppc40x_probe(void)