target/linux/oxnas/patches-4.4/0074-mtd-nand-import-nand_hw_control_init.patch

   1 From d45bc58dd3bdcaabc1d7d8d9b0b8dee826635cc6 Mon Sep 17 00:00:00 2001
   2 From: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
   3 Date: Wed, 27 Jul 2016 11:23:52 +0200
   4 Subject: [PATCH] mtd: nand: import nand_hw_control_init()
   5
   6 The code to initialize a struct nand_hw_control is duplicated across
   7 several drivers. Factorize it using an inline function.
   8
   9 Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
  10 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
  11 ---
  12  drivers/mtd/nand/bf5xx_nand.c        | 3 +--
  13  drivers/mtd/nand/brcmnand/brcmnand.c | 3 +--
  14  drivers/mtd/nand/docg4.c             | 3 +--
  15  drivers/mtd/nand/fsl_elbc_nand.c     | 3 +--
  16  drivers/mtd/nand/fsl_ifc_nand.c      | 3 +--
  17  drivers/mtd/nand/jz4780_nand.c       | 3 +--
  18  drivers/mtd/nand/nand_base.c         | 3 +--
  19  drivers/mtd/nand/ndfc.c              | 3 +--
  20  drivers/mtd/nand/pxa3xx_nand.c       | 3 +--
  21  drivers/mtd/nand/qcom_nandc.c        | 3 +--
  22  drivers/mtd/nand/s3c2410.c           | 3 +--
  23  drivers/mtd/nand/sunxi_nand.c        | 3 +--
  24  drivers/mtd/nand/txx9ndfmc.c         | 3 +--
  25  include/linux/mtd/nand.h             | 7 +++++++
  26  14 files changed, 20 insertions(+), 26 deletions(-)
  27
  28 --- a/drivers/mtd/nand/bf5xx_nand.c
  29 +++ b/drivers/mtd/nand/bf5xx_nand.c
  30 @@ -748,8 +748,7 @@ static int bf5xx_nand_probe(struct platf
  31
  32         platform_set_drvdata(pdev, info);
  33
  34 -       spin_lock_init(&info->controller.lock);
  35 -       init_waitqueue_head(&info->controller.wq);
  36 +       nand_hw_control_init(&info->controller);
  37
  38         info->device     = &pdev->dev;
  39         info->platform   = plat;
  40 --- a/drivers/mtd/nand/brcmnand/brcmnand.c
  41 +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
  42 @@ -2156,8 +2156,7 @@ int brcmnand_probe(struct platform_devic
  43
  44         init_completion(&ctrl->done);
  45         init_completion(&ctrl->dma_done);
  46 -       spin_lock_init(&ctrl->controller.lock);
  47 -       init_waitqueue_head(&ctrl->controller.wq);
  48 +       nand_hw_control_init(&ctrl->controller);
  49         INIT_LIST_HEAD(&ctrl->host_list);
  50
  51         /* NAND register range */
  52 --- a/drivers/mtd/nand/docg4.c
  53 +++ b/drivers/mtd/nand/docg4.c
  54 @@ -1227,8 +1227,7 @@ static void __init init_mtd_structs(stru
  55         nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
  56         nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
  57         nand->controller = &nand->hwcontrol;
  58 -       spin_lock_init(&nand->controller->lock);
  59 -       init_waitqueue_head(&nand->controller->wq);
  60 +       nand_hw_control_init(nand->controller);
  61
  62         /* methods */
  63         nand->cmdfunc = docg4_command;
  64 --- a/drivers/mtd/nand/fsl_elbc_nand.c
  65 +++ b/drivers/mtd/nand/fsl_elbc_nand.c
  66 @@ -866,8 +866,7 @@ static int fsl_elbc_nand_probe(struct pl
  67                 }
  68                 elbc_fcm_ctrl->counter++;
  69
  70 -               spin_lock_init(&elbc_fcm_ctrl->controller.lock);
  71 -               init_waitqueue_head(&elbc_fcm_ctrl->controller.wq);
  72 +               nand_hw_control_init(&elbc_fcm_ctrl->controller);
  73                 fsl_lbc_ctrl_dev->nand = elbc_fcm_ctrl;
  74         } else {
  75                 elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand;
  76 --- a/drivers/mtd/nand/fsl_ifc_nand.c
  77 +++ b/drivers/mtd/nand/fsl_ifc_nand.c
  78 @@ -1073,8 +1073,7 @@ static int fsl_ifc_nand_probe(struct pla
  79                 ifc_nand_ctrl->addr = NULL;
  80                 fsl_ifc_ctrl_dev->nand = ifc_nand_ctrl;
  81
  82 -               spin_lock_init(&ifc_nand_ctrl->controller.lock);
  83 -               init_waitqueue_head(&ifc_nand_ctrl->controller.wq);
  84 +               nand_hw_control_init(&ifc_nand_ctrl->controller);
  85         } else {
  86                 ifc_nand_ctrl = fsl_ifc_ctrl_dev->nand;
  87         }
  88 --- a/drivers/mtd/nand/nand_base.c
  89 +++ b/drivers/mtd/nand/nand_base.c
  90 @@ -3202,8 +3202,7 @@ static void nand_set_defaults(struct nan
  91
  92         if (!chip->controller) {
  93                 chip->controller = &chip->hwcontrol;
  94 -               spin_lock_init(&chip->controller->lock);
  95 -               init_waitqueue_head(&chip->controller->wq);
  96 +               nand_hw_control_init(chip->controller);
  97         }
  98
  99  }
 100 --- a/drivers/mtd/nand/ndfc.c
 101 +++ b/drivers/mtd/nand/ndfc.c
 102 @@ -220,8 +220,7 @@ static int ndfc_probe(struct platform_de
 103         ndfc = &ndfc_ctrl[cs];
 104         ndfc->chip_select = cs;
 105
 106 -       spin_lock_init(&ndfc->ndfc_control.lock);
 107 -       init_waitqueue_head(&ndfc->ndfc_control.wq);
 108 +       nand_hw_control_init(&ndfc->ndfc_control);
 109         ndfc->ofdev = ofdev;
 110         dev_set_drvdata(&ofdev->dev, ndfc);
 111
 112 --- a/drivers/mtd/nand/pxa3xx_nand.c
 113 +++ b/drivers/mtd/nand/pxa3xx_nand.c
 114 @@ -1739,8 +1739,7 @@ static int alloc_nand_resource(struct pl
 115                 chip->cmdfunc           = nand_cmdfunc;
 116         }
 117
 118 -       spin_lock_init(&chip->controller->lock);
 119 -       init_waitqueue_head(&chip->controller->wq);
 120 +       nand_hw_control_init(chip->controller);
 121         info->clk = devm_clk_get(&pdev->dev, NULL);
 122         if (IS_ERR(info->clk)) {
 123                 dev_err(&pdev->dev, "failed to get nand clock\n");
 124 --- a/drivers/mtd/nand/s3c2410.c
 125 +++ b/drivers/mtd/nand/s3c2410.c
 126 @@ -955,8 +955,7 @@ static int s3c24xx_nand_probe(struct pla
 127
 128         platform_set_drvdata(pdev, info);
 129
 130 -       spin_lock_init(&info->controller.lock);
 131 -       init_waitqueue_head(&info->controller.wq);
 132 +       nand_hw_control_init(&info->controller);
 133
 134         /* get the clock source and enable it */
 135
 136 --- a/drivers/mtd/nand/sunxi_nand.c
 137 +++ b/drivers/mtd/nand/sunxi_nand.c
 138 @@ -1426,8 +1426,7 @@ static int sunxi_nfc_probe(struct platfo
 139                 return -ENOMEM;
 140
 141         nfc->dev = dev;
 142 -       spin_lock_init(&nfc->controller.lock);
 143 -       init_waitqueue_head(&nfc->controller.wq);
 144 +       nand_hw_control_init(&nfc->controller);
 145         INIT_LIST_HEAD(&nfc->chips);
 146
 147         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 148 --- a/drivers/mtd/nand/txx9ndfmc.c
 149 +++ b/drivers/mtd/nand/txx9ndfmc.c
 150 @@ -304,8 +304,7 @@ static int __init txx9ndfmc_probe(struct
 151         dev_info(&dev->dev, "CLK:%ldMHz HOLD:%d SPW:%d\n",
 152                  (gbusclk + 500000) / 1000000, hold, spw);
 153
 154 -       spin_lock_init(&drvdata->hw_control.lock);
 155 -       init_waitqueue_head(&drvdata->hw_control.wq);
 156 +       nand_hw_control_init(&drvdata->hw_control);
 157
 158         platform_set_drvdata(dev, drvdata);
 159         txx9ndfmc_initialize(dev);
 160 --- a/include/linux/mtd/nand.h
 161 +++ b/include/linux/mtd/nand.h
 162 @@ -461,6 +461,13 @@ struct nand_hw_control {
 163         wait_queue_head_t wq;
 164  };
 165
 166 +static inline void nand_hw_control_init(struct nand_hw_control *nfc)
 167 +{
 168 +       nfc->active = NULL;
 169 +       spin_lock_init(&nfc->lock);
 170 +       init_waitqueue_head(&nfc->wq);
 171 +}
 172 +
 173  /**
 174   * struct nand_ecc_ctrl - Control structure for ECC
 175   * @mode:      ECC mode