target/linux/orion/patches-4.9/200-dt2_board_support.patch

   1 --- a/arch/arm/mach-orion5x/Kconfig
   2 +++ b/arch/arm/mach-orion5x/Kconfig
   3 @@ -48,6 +48,13 @@ config MACH_RD88F5182_DT
   4           Say 'Y' here if you want your kernel to support the Marvell
   5           Orion-NAS (88F5182) RD2, Flattened Device Tree.
   6
   7 +config MACH_DT2
   8 +       bool "Freecom DataTank Gateway"
   9 +       select I2C_BOARDINFO
  10 +       help
  11 +         Say 'Y' here if you want your kernel to support the
  12 +         Freecom DataTank Gateway
  13 +
  14  config MACH_KUROBOX_PRO
  15         bool "KuroBox Pro"
  16         select I2C_BOARDINFO if I2C
  17 --- a/arch/arm/mach-orion5x/Makefile
  18 +++ b/arch/arm/mach-orion5x/Makefile
  19 @@ -15,6 +15,7 @@ obj-$(CONFIG_MACH_TS78XX)     += ts78xx-setu
  20  obj-$(CONFIG_MACH_MV2120)      += mv2120-setup.o
  21  obj-$(CONFIG_MACH_NET2BIG)     += net2big-setup.o
  22  obj-$(CONFIG_MACH_WNR854T)     += wnr854t-setup.o
  23 +obj-$(CONFIG_MACH_DT2)         += dt2-setup.o
  24  obj-$(CONFIG_MACH_RD88F5181L_GE)       += rd88f5181l-ge-setup.o
  25  obj-$(CONFIG_MACH_RD88F5181L_FXO)      += rd88f5181l-fxo-setup.o
  26  obj-$(CONFIG_MACH_RD88F6183AP_GE)      += rd88f6183ap-ge-setup.o
  27 --- /dev/null
  28 +++ b/arch/arm/mach-orion5x/dt2-common.h
  29 @@ -0,0 +1,82 @@
  30 +#ifndef __INC_DT2_COMMON_H
  31 +#define __INC_DT2_COMMON_H
  32 +
  33 +#define ATAG_MV_UBOOT                  0x41000403
  34 +
  35 +struct tag_mv_uboot {
  36 +       u32 uboot_version;
  37 +       u32 tclk;
  38 +       u32 sysclk;
  39 +       u32 isUsbHost;
  40 +       u32 overEthAddr;
  41 +       u8  dt2_eeprom[256];
  42 +};
  43 +
  44 +#define DT2_EEPROM_ADDR                0x50
  45 +#define DT2_EEPROM_OFFSET              0
  46 +#define DT2_EEPROM_LENGTH              256
  47 +
  48 +#define DT2_SERIAL_NUMBER_DEFAULT      "run on default\0"
  49 +#define DT2_REVISION_DEFAULT_INIT      0xFF
  50 +#define DT2_CONFIG_FLAGS_DEFAULT       0x00
  51 +
  52 +#define _PACKED_       __attribute__((packed))
  53 +
  54 +struct DT2_EEPROM_SD_CONFIG {
  55 +       unsigned int    ram_1;
  56 +       unsigned int    ram_2;
  57 +       unsigned int    ram_3;
  58 +       unsigned int    ram_4;
  59 +       unsigned char   ram_5;
  60 +       unsigned char   ram_6;
  61 +       unsigned short  ram_7;
  62 +       unsigned int    magic_id;
  63 +       } _PACKED_;             // 24 Bytes in total
  64 +
  65 +struct DT2_EEPROM_FC_CONFIG {
  66 +       unsigned char   rtc_sts_mask;
  67 +       unsigned char   rtc_sts_init;
  68 +       unsigned char   rtc_int_mask;
  69 +       unsigned char   rtc_int_init;
  70 +       unsigned char   rtc_atrim_init;
  71 +       unsigned char   rtc_dtrim_init;
  72 +       unsigned char   dummy1;
  73 +       unsigned char   dummy2;
  74 +       unsigned char   dt2_config_flags;       /* 0x80 to load rtc_values to RTC */
  75 +       unsigned char   dt2_revision;           /* upper nibble is HW, lower nibble is FW */
  76 +       unsigned char   dt2_serial_number[16];  /* Serial number of DT-2 */
  77 +       } _PACKED_;             // 26 Bytes in total
  78 +
  79 +#define CFG_LOAD_RTC_VALUES    0x80
  80 +
  81 +struct DT2_EEPROM_GW_CONFIG {
  82 +       unsigned int    dummy1;
  83 +       unsigned int    dummy2;
  84 +       unsigned int    dummy3;
  85 +       unsigned char   dummy4;
  86 +       unsigned char   tos_video_val1;
  87 +       unsigned char   tos_video_val2;
  88 +       unsigned char   tos_voip_val;
  89 +       unsigned char   qos_igmp_cfg;
  90 +       unsigned char   num_of_ifs;
  91 +       unsigned short  vlan_ports_if[3];
  92 +       unsigned char   mac_addr[3][6];
  93 +       } _PACKED_;             // 42 Bytes in total
  94 +
  95 +#define _SIZE_OF_ALL_STRUCTS_ (sizeof(struct DT2_EEPROM_SD_CONFIG) + sizeof(struct DT2_EEPROM_FC_CONFIG) +  sizeof(struct DT2_EEPROM_GW_CONFIG))
  96 +
  97 +// MV = EEPROM - SD - FC - GW - CRC
  98 +struct DT2_EEPROM_MV_CONFIG {
  99 +       unsigned int reg_addr[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)];
 100 +       unsigned int reg_data[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)];
 101 +       } _PACKED_;
 102 +
 103 +struct DT2_EEPROM_STRUCT {
 104 +       struct DT2_EEPROM_MV_CONFIG mv;
 105 +       struct DT2_EEPROM_SD_CONFIG sd;
 106 +       struct DT2_EEPROM_FC_CONFIG fc;
 107 +       struct DT2_EEPROM_GW_CONFIG gw;
 108 +       unsigned int    crc;
 109 +       } _PACKED_;
 110 +
 111 +#endif
 112 --- /dev/null
 113 +++ b/arch/arm/mach-orion5x/dt2-setup.c
 114 @@ -0,0 +1,448 @@
 115 +/*
 116 + * arch/arm/mach-orion5x/dt2-setup.c
 117 + *
 118 + * Freecom DataTank Gateway Setup
 119 + *
 120 + * Copyright (C) 2009 Zintis Petersons <Zintis.Petersons@abcsolutions.lv>
 121 + *
 122 + * This file is licensed under the terms of the GNU General Public
 123 + * License version 2.  This program is licensed "as is" without any
 124 + * warranty of any kind, whether express or implied.
 125 + */
 126 +
 127 +#include <linux/kernel.h>
 128 +#include <linux/init.h>
 129 +#include <linux/platform_device.h>
 130 +#include <linux/pci.h>
 131 +#include <linux/irq.h>
 132 +#include <linux/mtd/physmap.h>
 133 +#include <linux/mv643xx_eth.h>
 134 +#include <linux/ethtool.h>
 135 +#include <linux/if_ether.h>
 136 +#include <net/dsa.h>
 137 +#include <linux/ata_platform.h>
 138 +#include <linux/i2c.h>
 139 +#include <linux/reboot.h>
 140 +#include <linux/interrupt.h>
 141 +#include <asm/mach-types.h>
 142 +#include <asm/gpio.h>
 143 +#include <asm/mach/arch.h>
 144 +#include <asm/mach/pci.h>
 145 +#include "orion5x.h"
 146 +#include "common.h"
 147 +#include "mpp.h"
 148 +
 149 +/*****************************************************************************
 150 + * DT2 local
 151 + ****************************************************************************/
 152 +#include <asm/setup.h>
 153 +#include "dt2-common.h"
 154 +
 155 +u32 mvUbootVer = 0;
 156 +u32 mvTclk = 166666667;
 157 +u32 mvSysclk = 200000000;
 158 +u32 mvIsUsbHost = 1;
 159 +u32 overEthAddr = 0;
 160 +u32 gBoardId = -1;
 161 +struct DT2_EEPROM_STRUCT dt2_eeprom;
 162 +
 163 +/*****************************************************************************
 164 + * DT2 Info
 165 + ****************************************************************************/
 166 +/*
 167 + * PCI
 168 + */
 169 +
 170 +#define DT2_PCI_SLOT0_OFFS     7
 171 +#define DT2_PCI_SLOT0_IRQ_A_PIN        3
 172 +#define DT2_PCI_SLOT0_IRQ_B_PIN        2
 173 +
 174 +#define DT2_PIN_GPIO_SYNC      25
 175 +#define DT2_PIN_GPIO_POWER     24
 176 +#define DT2_PIN_GPIO_UNPLUG1   23
 177 +#define DT2_PIN_GPIO_UNPLUG2   22
 178 +#define DT2_PIN_GPIO_RESET     4
 179 +
 180 +#define DT2_NOR_BOOT_BASE      0xf4000000
 181 +#define DT2_NOR_BOOT_SIZE      SZ_512K
 182 +
 183 +#define DT2_LEDS_BASE          0xfa000000
 184 +#define DT2_LEDS_SIZE          SZ_1K
 185 +
 186 +/*****************************************************************************
 187 + * 512K NOR Flash on Device bus Boot CS
 188 + ****************************************************************************/
 189 +
 190 +static struct mtd_partition dt2_partitions[] = {
 191 +       {
 192 +               .name   = "u-boot",
 193 +               .size   = 0x00080000,
 194 +               .offset = 0,
 195 +       },
 196 +};
 197 +
 198 +static struct physmap_flash_data dt2_nor_flash_data = {
 199 +       .width          = 1,            /* 8 bit bus width */
 200 +       .parts          = dt2_partitions,
 201 +       .nr_parts       = ARRAY_SIZE(dt2_partitions)
 202 +};
 203 +
 204 +static struct resource dt2_nor_flash_resource = {
 205 +       .flags          = IORESOURCE_MEM,
 206 +       .start          = DT2_NOR_BOOT_BASE,
 207 +       .end            = DT2_NOR_BOOT_BASE + DT2_NOR_BOOT_SIZE - 1,
 208 +};
 209 +
 210 +static struct platform_device dt2_nor_flash = {
 211 +       .name           = "physmap-flash",
 212 +       .id             = 0,
 213 +       .dev            = {
 214 +               .platform_data  = &dt2_nor_flash_data,
 215 +       },
 216 +       .resource       = &dt2_nor_flash_resource,
 217 +       .num_resources  = 1,
 218 +};
 219 +
 220 +/*****************************************************************************
 221 + * PCI
 222 + ****************************************************************************/
 223 +
 224 +void __init dt2_pci_preinit(void)
 225 +{
 226 +       int pin, irq;
 227 +
 228 +       /*
 229 +        * Configure PCI GPIO IRQ pins
 230 +        */
 231 +       pin = DT2_PCI_SLOT0_IRQ_A_PIN;
 232 +       if (gpio_request(pin, "PCI IntA") == 0) {
 233 +               if (gpio_direction_input(pin) == 0) {
 234 +                       irq = gpio_to_irq(pin);
 235 +                       irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
 236 +                       printk (KERN_INFO "PCI IntA IRQ: %d\n", irq);
 237 +               } else {
 238 +                       printk(KERN_ERR "dt2_pci_preinit failed to "
 239 +                                       "irq_set_irq_type pin %d\n", pin);
 240 +                       gpio_free(pin);
 241 +               }
 242 +       } else {
 243 +               printk(KERN_ERR "dt2_pci_preinit failed to request gpio %d\n", pin);
 244 +       }
 245 +
 246 +       pin = DT2_PCI_SLOT0_IRQ_B_PIN;
 247 +       if (gpio_request(pin, "PCI IntB") == 0) {
 248 +               if (gpio_direction_input(pin) == 0) {
 249 +                       irq = gpio_to_irq(pin);
 250 +                       irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
 251 +                       printk (KERN_INFO "PCI IntB IRQ: %d\n", irq);
 252 +               } else {
 253 +                       printk(KERN_ERR "dt2_pci_preinit failed to "
 254 +                                       "irq_set_irq_type pin %d\n", pin);
 255 +                       gpio_free(pin);
 256 +               }
 257 +       } else {
 258 +               printk(KERN_ERR "dt2_pci_preinit failed to gpio_request %d\n", pin);
 259 +       }
 260 +}
 261 +
 262 +static int __init dt2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 263 +{
 264 +       int irq;
 265 +
 266 +       /*
 267 +        * Check for devices with hard-wired IRQs.
 268 +        */
 269 +       irq = orion5x_pci_map_irq(dev, slot, pin);
 270 +       if (irq != -1){
 271 +               printk(KERN_INFO "orion5x_pci_map_irq: %d\n", irq);
 272 +               return irq;
 273 +       }
 274 +
 275 +       /*
 276 +        * PCI IRQs are connected via GPIOs
 277 +        */
 278 +       switch (slot - DT2_PCI_SLOT0_OFFS) {
 279 +       case 0:
 280 +               if (pin == 1){
 281 +                       irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_A_PIN);
 282 +                       printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_A_PIN: %d\n", irq);
 283 +               }
 284 +               else {
 285 +                       irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_B_PIN);
 286 +                       printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_B_PIN: %d\n", irq);
 287 +               }
 288 +       default:
 289 +               irq = -1;
 290 +                       printk(KERN_INFO "dt2_pci_map_irq IRQ: %d\n", irq);
 291 +       }
 292 +
 293 +       return irq;
 294 +}
 295 +
 296 +static struct hw_pci dt2_pci __initdata = {
 297 +       .nr_controllers = 2,
 298 +       .preinit        = dt2_pci_preinit,
 299 +       .setup          = orion5x_pci_sys_setup,
 300 +       .scan           = orion5x_pci_sys_scan_bus,
 301 +       .map_irq        = dt2_pci_map_irq,
 302 +};
 303 +
 304 +static int __init dt2_pci_init(void)
 305 +{
 306 +       if (machine_is_dt2())
 307 +               pci_common_init(&dt2_pci);
 308 +
 309 +       return 0;
 310 +}
 311 +
 312 +subsys_initcall(dt2_pci_init);
 313 +
 314 +/*****************************************************************************
 315 + * Ethernet
 316 + ****************************************************************************/
 317 +
 318 +static struct mv643xx_eth_platform_data dt2_eth_data = {
 319 +       .phy_addr       = MV643XX_ETH_PHY_NONE,
 320 +       .speed          = SPEED_1000,
 321 +       .duplex         = DUPLEX_FULL,
 322 +};
 323 +
 324 +static struct dsa_chip_data dt2_switch_chip_data = {
 325 +       .port_names[0] = "wan",
 326 +       .port_names[1] = "lan1",
 327 +       .port_names[2] = "lan2",
 328 +       .port_names[3] = "cpu",
 329 +       .port_names[4] = "lan3",
 330 +       .port_names[5] = "lan4",
 331 +};
 332 +
 333 +static struct dsa_platform_data dt2_switch_plat_data = {
 334 +       .nr_chips       = 1,
 335 +       .chip           = &dt2_switch_chip_data,
 336 +};
 337 +
 338 +/*****************************************************************************
 339 + * RTC ISL1208 on I2C bus
 340 + ****************************************************************************/
 341 +static struct i2c_board_info __initdata dt2_i2c_rtc = {
 342 +       I2C_BOARD_INFO("isl1208", 0x6F),
 343 +};
 344 +
 345 +/*****************************************************************************
 346 + * Sata
 347 + ****************************************************************************/
 348 +static struct mv_sata_platform_data dt2_sata_data = {
 349 +       .n_ports        = 2,
 350 +};
 351 +
 352 +/*****************************************************************************
 353 + * General Setup
 354 + ****************************************************************************/
 355 +static unsigned int dt2_mpp_modes[] __initdata = {
 356 +       MPP0_GPIO,              // RTC interrupt
 357 +       MPP1_GPIO,              // 88e6131 interrupt
 358 +       MPP2_GPIO,              // PCI_intB
 359 +       MPP3_GPIO,              // PCI_intA
 360 +       MPP4_GPIO,              // reset button switch
 361 +       MPP5_GPIO,
 362 +       MPP6_GPIO,
 363 +       MPP7_GPIO,
 364 +       MPP8_GPIO,
 365 +       MPP9_GIGE,              /* GE_RXERR */
 366 +       MPP10_GPIO,             // usb
 367 +       MPP11_GPIO,             // usb
 368 +       MPP12_GIGE,             // GE_TXD[4]
 369 +       MPP13_GIGE,             // GE_TXD[5]
 370 +       MPP14_GIGE,             // GE_TXD[6]
 371 +       MPP15_GIGE,             // GE_TXD[7]
 372 +       MPP16_GIGE,             // GE_RXD[4]
 373 +       MPP17_GIGE,             // GE_RXD[5]
 374 +       MPP18_GIGE,             // GE_RXD[6]
 375 +       MPP19_GIGE,             // GE_RXD[7]
 376 +       0,
 377 +};
 378 +
 379 +/*****************************************************************************
 380 + * LEDS
 381 + ****************************************************************************/
 382 +static struct platform_device dt2_leds = {
 383 +       .name           = "dt2-led",
 384 +       .id             = -1,
 385 +};
 386 +
 387 +/****************************************************************************
 388 + * GPIO key
 389 + ****************************************************************************/
 390 +static irqreturn_t dt2_reset_handler(int irq, void *dev_id)
 391 +{
 392 +       /* This is the paper-clip reset which does an emergency reboot. */
 393 +       printk(KERN_INFO "Restarting system.\n");
 394 +       machine_restart(NULL);
 395 +
 396 +       /* This should never be reached. */
 397 +       return IRQ_HANDLED;
 398 +}
 399 +
 400 +static irqreturn_t dt2_power_handler(int irq, void *dev_id)
 401 +{
 402 +       printk(KERN_INFO "Shutting down system.\n");
 403 +       machine_power_off();
 404 +       return IRQ_HANDLED;
 405 +}
 406 +
 407 +static void __init dt2_init(void)
 408 +{
 409 +       /*
 410 +        * Setup basic Orion functions. Need to be called early.
 411 +        */
 412 +       orion5x_init();
 413 +
 414 +       orion5x_mpp_conf(dt2_mpp_modes);
 415 +
 416 +       /*
 417 +        * Configure peripherals.
 418 +        */
 419 +
 420 +       orion5x_uart0_init();
 421 +       orion5x_ehci0_init();
 422 +       orion5x_ehci1_init();
 423 +       orion5x_i2c_init();
 424 +       orion5x_sata_init(&dt2_sata_data);
 425 +       orion5x_xor_init();
 426 +
 427 +       printk(KERN_INFO "U-Boot parameters:\n");
 428 +       printk(KERN_INFO "Sys Clk = %d, Tclk = %d, BoardID = 0x%02x\n", mvSysclk, mvTclk, gBoardId);
 429 +
 430 +       printk(KERN_INFO "Serial: %s\n", dt2_eeprom.fc.dt2_serial_number);
 431 +       printk(KERN_INFO "Revision: %016x\n", dt2_eeprom.fc.dt2_revision);
 432 +       printk(KERN_INFO "DT2: Using MAC address %pM for port 0\n",
 433 +              dt2_eeprom.gw.mac_addr[0]);
 434 +       printk(KERN_INFO "DT2: Using MAC address %pM for port 1\n",
 435 +              dt2_eeprom.gw.mac_addr[1]);
 436 +
 437 +       orion5x_eth_init(&dt2_eth_data);
 438 +       memcpy(dt2_eth_data.mac_addr, dt2_eeprom.gw.mac_addr[0], 6);
 439 +       orion5x_eth_switch_init(&dt2_switch_plat_data);
 440 +
 441 +       i2c_register_board_info(0, &dt2_i2c_rtc, 1);
 442 +
 443 +       mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
 444 +                                   ORION_MBUS_DEVBUS_BOOT_ATTR,
 445 +                                   DT2_NOR_BOOT_BASE, DT2_NOR_BOOT_SIZE);
 446 +
 447 +       platform_device_register(&dt2_nor_flash);
 448 +
 449 +       mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(0),
 450 +                                   ORION_MBUS_DEVBUS_ATTR(0),
 451 +                                   DT2_LEDS_BASE, DT2_LEDS_SIZE);
 452 +       platform_device_register(&dt2_leds);
 453 +
 454 +       if (request_irq(gpio_to_irq(DT2_PIN_GPIO_RESET), &dt2_reset_handler,
 455 +                       IRQF_TRIGGER_LOW,
 456 +                       "DT2: Reset button", NULL) < 0) {
 457 +
 458 +               printk("DT2: Reset Button IRQ %d not available\n",
 459 +                       gpio_to_irq(DT2_PIN_GPIO_RESET));
 460 +       }
 461 +
 462 +       if (request_irq(gpio_to_irq(DT2_PIN_GPIO_POWER), &dt2_power_handler,
 463 +                       IRQF_TRIGGER_LOW,
 464 +                       "DT2: Power button", NULL) < 0) {
 465 +
 466 +               printk(KERN_DEBUG "DT2: Power Button IRQ %d not available\n",
 467 +                       gpio_to_irq(DT2_PIN_GPIO_POWER));
 468 +       }
 469 +}
 470 +
 471 +static int __init parse_tag_dt2_uboot(const struct tag *t)
 472 +{
 473 +       struct tag_mv_uboot *mv_uboot;
 474 +
 475 +       // Get pointer to our block
 476 +       mv_uboot = (struct tag_mv_uboot*)&t->u;
 477 +       mvTclk = mv_uboot->tclk;
 478 +       mvSysclk = mv_uboot->sysclk;
 479 +       mvUbootVer = mv_uboot->uboot_version;
 480 +       mvIsUsbHost = mv_uboot->isUsbHost;
 481 +
 482 +       // Some clock fixups
 483 +       if(mvTclk == 166000000) mvTclk = 166666667;
 484 +       else if(mvTclk == 133000000) mvTclk = 133333333;
 485 +       else if(mvSysclk == 166000000) mvSysclk = 166666667;
 486 +
 487 +       gBoardId =  (mvUbootVer & 0xff);
 488 +
 489 +       //DT2 specific data
 490 +       memcpy(&dt2_eeprom, mv_uboot->dt2_eeprom, sizeof(struct DT2_EEPROM_STRUCT));
 491 +
 492 +       return 0;
 493 +}
 494 +__tagtable(ATAG_MV_UBOOT, parse_tag_dt2_uboot);
 495 +
 496 +/*
 497 + * This is OpenWrt specific fixup. It includes code from original "tag_fixup_mem32" to
 498 + * fixup bogus memory tags and also fixes kernel cmdline by adding " init=/etc/preinit"
 499 + * at the end. It is important to flash OpenWrt image from original Freecom firmware.
 500 + *
 501 + * Vanilla kernel should use "tag_fixup_mem32" function.
 502 + */
 503 +static void __init openwrt_fixup(struct tag *t, char **from)
 504 +{
 505 +       char *p = NULL;
 506 +       static char openwrt_init_tag[] __initdata = " init=/etc/preinit";
 507 +
 508 +       for (; t->hdr.size; t = tag_next(t)){
 509 +               /* Locate the Freecom cmdline */
 510 +               if (t->hdr.tag == ATAG_CMDLINE) {
 511 +                       p = t->u.cmdline.cmdline;
 512 +                       printk("%s(%d): Found cmdline '%s' at 0x%0lx\n",
 513 +                              __FUNCTION__, __LINE__, p, (unsigned long)p);
 514 +               }
 515 +               /*
 516 +                * Many orion-based systems have buggy bootloader implementations.
 517 +                * This is a common fixup for bogus memory tags.
 518 +                */
 519 +               if (t->hdr.tag == ATAG_MEM &&
 520 +                   (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 521 +                    t->u.mem.start & ~PAGE_MASK)) {
 522 +                       printk(KERN_WARNING
 523 +                              "Clearing invalid memory bank %dKB@0x%08x\n",
 524 +                              t->u.mem.size / 1024, t->u.mem.start);
 525 +                       t->hdr.tag = 0;
 526 +               }
 527 +       }
 528 +
 529 +       printk("%s(%d): End of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t);
 530 +
 531 +       /* Overwrite the end of the table with a new cmdline tag. */
 532 +       t->hdr.tag = ATAG_CMDLINE;
 533 +       t->hdr.size =
 534 +               (sizeof (struct tag_header) +
 535 +                strlen(p) + strlen(openwrt_init_tag) + 1 + 4) >> 2;
 536 +
 537 +       strlcpy(t->u.cmdline.cmdline, p, COMMAND_LINE_SIZE);
 538 +       strlcpy(t->u.cmdline.cmdline + strlen(p), openwrt_init_tag,
 539 +               COMMAND_LINE_SIZE - strlen(p));
 540 +
 541 +       printk("%s(%d): New cmdline '%s' at 0x%0lx\n",
 542 +              __FUNCTION__, __LINE__,
 543 +              t->u.cmdline.cmdline, (unsigned long)t->u.cmdline.cmdline);
 544 +
 545 +       t = tag_next(t);
 546 +
 547 +       printk("%s(%d): New end of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t);
 548 +
 549 +       t->hdr.tag = ATAG_NONE;
 550 +       t->hdr.size = 0;
 551 +}
 552 +
 553 +/* Warning: Freecom uses their own custom bootloader with mach-type (=1500) */
 554 +MACHINE_START(DT2, "Freecom DataTank Gateway")
 555 +       /* Maintainer: Zintis Petersons <Zintis.Petersons@abcsolutions.lv> */
 556 +       .atag_offset    = 0x100,
 557 +       .init_machine   = dt2_init,
 558 +       .map_io         = orion5x_map_io,
 559 +       .init_irq       = orion5x_init_irq,
 560 +       .init_time      = orion5x_timer_init,
 561 +       .fixup          = openwrt_fixup, //tag_fixup_mem32,
 562 +MACHINE_END