target/linux/mediatek/patches-4.14/0213-arm64-dts-mt7622-add-PMIC-MT6380-related-nodes.patch

   1 From 78e92290c8c9511d0d540dfd0450e64169f08c20 Mon Sep 17 00:00:00 2001
   2 From: Sean Wang <sean.wang@mediatek.com>
   3 Date: Mon, 5 Feb 2018 22:44:44 +0800
   4 Subject: [PATCH 213/224] arm64: dts: mt7622: add PMIC MT6380 related nodes
   5
   6 Enable pwrap and MT6380 on mt7622-rfb1 board. Also add all mt6380
   7 regulator nodes in an alone file to allow similar boards using MT6380
   8 able to resue the configuration.
   9
  10 Signed-off-by: Sean Wang <sean.wang@mediatek.com>
  11 Cc: Mark Brown <broonie@kernel.org>
  12 Cc: Matthias Brugger <matthias.bgg@gmail.com>
  13 Cc: Philippe Ombredanne <pombredanne@nexb.com>
  14 Acked-by: Philippe Ombredanne <pombredanne@nexb.com>
  15 ---
  16  arch/arm64/boot/dts/mediatek/mt6380.dtsi     | 86 ++++++++++++++++++++++++++++
  17  arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts |  8 +++
  18  arch/arm64/boot/dts/mediatek/mt7622.dtsi     | 12 ++++
  19  3 files changed, 106 insertions(+)
  20  create mode 100644 arch/arm64/boot/dts/mediatek/mt6380.dtsi
  21
  22 --- /dev/null
  23 +++ b/arch/arm64/boot/dts/mediatek/mt6380.dtsi
  24 @@ -0,0 +1,86 @@
  25 +// SPDX-License-Identifier: GPL-2.0
  26 +/*
  27 + * dts file for MediaTek MT6380 regulator
  28 + *
  29 + * Copyright (c) 2018 MediaTek Inc.
  30 + * Author: Chenglin Xu <chenglin.xu@mediatek.com>
  31 + *        Sean Wang <sean.wang@mediatek.com>
  32 + */
  33 +
  34 +&pwrap {
  35 +       regulators {
  36 +               compatible = "mediatek,mt6380-regulator";
  37 +
  38 +               mt6380_vcpu_reg: buck-vcore1 {
  39 +                       regulator-name = "vcore1";
  40 +                       regulator-min-microvolt = < 600000>;
  41 +                       regulator-max-microvolt = <1393750>;
  42 +                       regulator-ramp-delay = <6250>;
  43 +                       regulator-always-on;
  44 +                       regulator-boot-on;
  45 +               };
  46 +
  47 +               mt6380_vcore_reg: buck-vcore {
  48 +                       regulator-name = "vcore";
  49 +                       regulator-min-microvolt = <600000>;
  50 +                       regulator-max-microvolt = <1393750>;
  51 +                       regulator-ramp-delay = <6250>;
  52 +                       regulator-always-on;
  53 +                       regulator-boot-on;
  54 +               };
  55 +
  56 +               mt6380_vrf_reg: buck-vrf {
  57 +                       regulator-name = "vrf";
  58 +                       regulator-min-microvolt = <1200000>;
  59 +                       regulator-max-microvolt = <1575000>;
  60 +                       regulator-ramp-delay = <0>;
  61 +                       regulator-always-on;
  62 +                       regulator-boot-on;
  63 +               };
  64 +
  65 +               mt6380_vm_reg: ldo-vm {
  66 +                       regulator-name = "vm";
  67 +                       regulator-min-microvolt = <1050000>;
  68 +                       regulator-max-microvolt = <1400000>;
  69 +                       regulator-ramp-delay = <0>;
  70 +                       regulator-always-on;
  71 +                       regulator-boot-on;
  72 +               };
  73 +
  74 +               mt6380_va_reg: ldo-va {
  75 +                       regulator-name = "va";
  76 +                       regulator-min-microvolt = <2200000>;
  77 +                       regulator-max-microvolt = <3300000>;
  78 +                       regulator-ramp-delay = <0>;
  79 +                       regulator-always-on;
  80 +                       regulator-boot-on;
  81 +               };
  82 +
  83 +               mt6380_vphy_reg: ldo-vphy {
  84 +                       regulator-name = "vphy";
  85 +                       regulator-min-microvolt = <1800000>;
  86 +                       regulator-max-microvolt = <1800000>;
  87 +                       regulator-ramp-delay = <0>;
  88 +                       regulator-always-on;
  89 +                       regulator-boot-on;
  90 +               };
  91 +
  92 +               mt6380_vddr_reg: ldo-vddr {
  93 +                       regulator-name = "vddr";
  94 +                       regulator-min-microvolt = <1240000>;
  95 +                       regulator-max-microvolt = <1840000>;
  96 +                       regulator-ramp-delay = <0>;
  97 +                       regulator-always-on;
  98 +                       regulator-boot-on;
  99 +               };
 100 +
 101 +               mt6380_vt_reg: ldo-vt {
 102 +                       regulator-name = "vt";
 103 +                       regulator-min-microvolt = <2200000>;
 104 +                       regulator-max-microvolt = <3300000>;
 105 +                       regulator-ramp-delay = <0>;
 106 +                       regulator-always-on;
 107 +                       regulator-boot-on;
 108 +               };
 109 +       };
 110 +};
 111 --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
 112 +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
 113 @@ -10,6 +10,7 @@
 114  #include <dt-bindings/input/input.h>
 115
 116  #include "mt7622.dtsi"
 117 +#include "mt6380.dtsi"
 118
 119  / {
 120         model = "MediaTek MT7622 RFB1 board";
 121 @@ -222,6 +223,13 @@
 122         };
 123  };
 124
 125 +&pwrap {
 126 +       pinctrl-names = "default";
 127 +       pinctrl-0 = <&pmic_bus_pins>;
 128 +
 129 +       status = "okay";
 130 +};
 131 +
 132  &uart0 {
 133         status = "okay";
 134  };
 135 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
 136 +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
 137 @@ -102,6 +102,18 @@
 138                 #reset-cells = <1>;
 139         };
 140
 141 +       pwrap: pwrap@10001000 {
 142 +               compatible = "mediatek,mt7622-pwrap";
 143 +               reg = <0 0x10001000 0 0x250>;
 144 +               reg-names = "pwrap";
 145 +               clocks = <&infracfg CLK_INFRA_PMIC_PD>,<&pwrap_clk>;
 146 +               clock-names = "spi","wrap";
 147 +               resets = <&infracfg MT7622_INFRA_PMIC_WRAP_RST>;
 148 +               reset-names = "pwrap";
 149 +               interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 150 +               status = "disabled";
 151 +       };
 152 +
 153         pericfg: pericfg@10002000 {
 154                 compatible = "mediatek,mt7622-pericfg",
 155                              "syscon";