target/linux/mediatek/patches-4.14/0161-pwm-mediatek-Add-MT2712-MT7622-support.patch

   1 From 7cc8226e45b2c6b9f06ce82ba6995b8f911afe25 Mon Sep 17 00:00:00 2001
   2 From: Zhi Mao <zhi.mao@mediatek.com>
   3 Date: Wed, 25 Oct 2017 18:11:01 +0800
   4 Subject: [PATCH 161/224] pwm: mediatek: Add MT2712/MT7622 support
   5
   6 Add support for MT2712 and MT7622. Due to register offset address of
   7 pwm7 for MT2712 is not fixed 0x40, add mtk_pwm_reg_offset array for PWM
   8 register offset.
   9
  10 Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  11 Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
  12 Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
  13 Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
  14 ---
  15  drivers/pwm/pwm-mediatek.c | 53 ++++++++++++++++++++++++++++++++++++++--------
  16  1 file changed, 44 insertions(+), 9 deletions(-)
  17
  18 --- a/drivers/pwm/pwm-mediatek.c
  19 +++ b/drivers/pwm/pwm-mediatek.c
  20 @@ -16,6 +16,7 @@
  21  #include <linux/module.h>
  22  #include <linux/clk.h>
  23  #include <linux/of.h>
  24 +#include <linux/of_device.h>
  25  #include <linux/platform_device.h>
  26  #include <linux/pwm.h>
  27  #include <linux/slab.h>
  28 @@ -40,11 +41,19 @@ enum {
  29         MTK_CLK_PWM3,
  30         MTK_CLK_PWM4,
  31         MTK_CLK_PWM5,
  32 +       MTK_CLK_PWM6,
  33 +       MTK_CLK_PWM7,
  34 +       MTK_CLK_PWM8,
  35         MTK_CLK_MAX,
  36  };
  37
  38 -static const char * const mtk_pwm_clk_name[] = {
  39 -       "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5"
  40 +static const char * const mtk_pwm_clk_name[MTK_CLK_MAX] = {
  41 +       "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7",
  42 +       "pwm8"
  43 +};
  44 +
  45 +struct mtk_pwm_platform_data {
  46 +       unsigned int num_pwms;
  47  };
  48
  49  /**
  50 @@ -59,6 +68,10 @@ struct mtk_pwm_chip {
  51         struct clk *clks[MTK_CLK_MAX];
  52  };
  53
  54 +static const unsigned int mtk_pwm_reg_offset[] = {
  55 +       0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
  56 +};
  57 +
  58  static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
  59  {
  60         return container_of(chip, struct mtk_pwm_chip, chip);
  61 @@ -103,14 +116,14 @@ static void mtk_pwm_clk_disable(struct p
  62  static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
  63                                 unsigned int offset)
  64  {
  65 -       return readl(chip->regs + 0x10 + (num * 0x40) + offset);
  66 +       return readl(chip->regs + mtk_pwm_reg_offset[num] + offset);
  67  }
  68
  69  static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
  70                                   unsigned int num, unsigned int offset,
  71                                   u32 value)
  72  {
  73 -       writel(value, chip->regs + 0x10 + (num * 0x40) + offset);
  74 +       writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset);
  75  }
  76
  77  static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  78 @@ -185,6 +198,7 @@ static const struct pwm_ops mtk_pwm_ops
  79
  80  static int mtk_pwm_probe(struct platform_device *pdev)
  81  {
  82 +       const struct mtk_pwm_platform_data *data;
  83         struct mtk_pwm_chip *pc;
  84         struct resource *res;
  85         unsigned int i;
  86 @@ -194,15 +208,22 @@ static int mtk_pwm_probe(struct platform
  87         if (!pc)
  88                 return -ENOMEM;
  89
  90 +       data = of_device_get_match_data(&pdev->dev);
  91 +       if (data == NULL)
  92 +               return -EINVAL;
  93 +
  94         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  95         pc->regs = devm_ioremap_resource(&pdev->dev, res);
  96         if (IS_ERR(pc->regs))
  97                 return PTR_ERR(pc->regs);
  98
  99 -       for (i = 0; i < MTK_CLK_MAX; i++) {
 100 +       for (i = 0; i < data->num_pwms + 2; i++) {
 101                 pc->clks[i] = devm_clk_get(&pdev->dev, mtk_pwm_clk_name[i]);
 102 -               if (IS_ERR(pc->clks[i]))
 103 +               if (IS_ERR(pc->clks[i])) {
 104 +                       dev_err(&pdev->dev, "clock: %s fail: %ld\n",
 105 +                               mtk_pwm_clk_name[i], PTR_ERR(pc->clks[i]));
 106                         return PTR_ERR(pc->clks[i]);
 107 +               }
 108         }
 109
 110         platform_set_drvdata(pdev, pc);
 111 @@ -210,7 +231,7 @@ static int mtk_pwm_probe(struct platform
 112         pc->chip.dev = &pdev->dev;
 113         pc->chip.ops = &mtk_pwm_ops;
 114         pc->chip.base = -1;
 115 -       pc->chip.npwm = 5;
 116 +       pc->chip.npwm = data->num_pwms;
 117
 118         ret = pwmchip_add(&pc->chip);
 119         if (ret < 0) {
 120 @@ -228,9 +249,23 @@ static int mtk_pwm_remove(struct platfor
 121         return pwmchip_remove(&pc->chip);
 122  }
 123
 124 +static const struct mtk_pwm_platform_data mt2712_pwm_data = {
 125 +       .num_pwms = 8,
 126 +};
 127 +
 128 +static const struct mtk_pwm_platform_data mt7622_pwm_data = {
 129 +       .num_pwms = 6,
 130 +};
 131 +
 132 +static const struct mtk_pwm_platform_data mt7623_pwm_data = {
 133 +       .num_pwms = 5,
 134 +};
 135 +
 136  static const struct of_device_id mtk_pwm_of_match[] = {
 137 -       { .compatible = "mediatek,mt7623-pwm" },
 138 -       { }
 139 +       { .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
 140 +       { .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
 141 +       { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
 142 +       { },
 143  };
 144  MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
 145