target/linux/mediatek/patches-4.14/0161-pwm-mediatek-Add-MT2712-MT7622-support.patch

   1 From 7cc8226e45b2c6b9f06ce82ba6995b8f911afe25 Mon Sep 17 00:00:00 2001
   2 From: Zhi Mao <zhi.mao@mediatek.com>
   3 Date: Wed, 25 Oct 2017 18:11:01 +0800
   4 Subject: [PATCH 161/224] pwm: mediatek: Add MT2712/MT7622 support
   5
   6 Add support for MT2712 and MT7622. Due to register offset address of
   7 pwm7 for MT2712 is not fixed 0x40, add mtk_pwm_reg_offset array for PWM
   8 register offset.
   9
  10 Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  11 Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
  12 Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
  13 Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
  14 ---
  15  drivers/pwm/pwm-mediatek.c | 53 ++++++++++++++++++++++++++++++++++++++--------
  16  1 file changed, 44 insertions(+), 9 deletions(-)
  17
  18 diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
  19 index b52f3afb2ba1..f5d97e0ad52b 100644
  20 --- a/drivers/pwm/pwm-mediatek.c
  21 +++ b/drivers/pwm/pwm-mediatek.c
  22 @@ -16,6 +16,7 @@
  23  #include <linux/module.h>
  24  #include <linux/clk.h>
  25  #include <linux/of.h>
  26 +#include <linux/of_device.h>
  27  #include <linux/platform_device.h>
  28  #include <linux/pwm.h>
  29  #include <linux/slab.h>
  30 @@ -40,11 +41,19 @@ enum {
  31         MTK_CLK_PWM3,
  32         MTK_CLK_PWM4,
  33         MTK_CLK_PWM5,
  34 +       MTK_CLK_PWM6,
  35 +       MTK_CLK_PWM7,
  36 +       MTK_CLK_PWM8,
  37         MTK_CLK_MAX,
  38  };
  39
  40 -static const char * const mtk_pwm_clk_name[] = {
  41 -       "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5"
  42 +static const char * const mtk_pwm_clk_name[MTK_CLK_MAX] = {
  43 +       "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7",
  44 +       "pwm8"
  45 +};
  46 +
  47 +struct mtk_pwm_platform_data {
  48 +       unsigned int num_pwms;
  49  };
  50
  51  /**
  52 @@ -59,6 +68,10 @@ struct mtk_pwm_chip {
  53         struct clk *clks[MTK_CLK_MAX];
  54  };
  55
  56 +static const unsigned int mtk_pwm_reg_offset[] = {
  57 +       0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
  58 +};
  59 +
  60  static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
  61  {
  62         return container_of(chip, struct mtk_pwm_chip, chip);
  63 @@ -103,14 +116,14 @@ static void mtk_pwm_clk_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  64  static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
  65                                 unsigned int offset)
  66  {
  67 -       return readl(chip->regs + 0x10 + (num * 0x40) + offset);
  68 +       return readl(chip->regs + mtk_pwm_reg_offset[num] + offset);
  69  }
  70
  71  static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
  72                                   unsigned int num, unsigned int offset,
  73                                   u32 value)
  74  {
  75 -       writel(value, chip->regs + 0x10 + (num * 0x40) + offset);
  76 +       writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset);
  77  }
  78
  79  static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  80 @@ -185,6 +198,7 @@ static const struct pwm_ops mtk_pwm_ops = {
  81
  82  static int mtk_pwm_probe(struct platform_device *pdev)
  83  {
  84 +       const struct mtk_pwm_platform_data *data;
  85         struct mtk_pwm_chip *pc;
  86         struct resource *res;
  87         unsigned int i;
  88 @@ -194,15 +208,22 @@ static int mtk_pwm_probe(struct platform_device *pdev)
  89         if (!pc)
  90                 return -ENOMEM;
  91
  92 +       data = of_device_get_match_data(&pdev->dev);
  93 +       if (data == NULL)
  94 +               return -EINVAL;
  95 +
  96         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  97         pc->regs = devm_ioremap_resource(&pdev->dev, res);
  98         if (IS_ERR(pc->regs))
  99                 return PTR_ERR(pc->regs);
 100
 101 -       for (i = 0; i < MTK_CLK_MAX; i++) {
 102 +       for (i = 0; i < data->num_pwms + 2; i++) {
 103                 pc->clks[i] = devm_clk_get(&pdev->dev, mtk_pwm_clk_name[i]);
 104 -               if (IS_ERR(pc->clks[i]))
 105 +               if (IS_ERR(pc->clks[i])) {
 106 +                       dev_err(&pdev->dev, "clock: %s fail: %ld\n",
 107 +                               mtk_pwm_clk_name[i], PTR_ERR(pc->clks[i]));
 108                         return PTR_ERR(pc->clks[i]);
 109 +               }
 110         }
 111
 112         platform_set_drvdata(pdev, pc);
 113 @@ -210,7 +231,7 @@ static int mtk_pwm_probe(struct platform_device *pdev)
 114         pc->chip.dev = &pdev->dev;
 115         pc->chip.ops = &mtk_pwm_ops;
 116         pc->chip.base = -1;
 117 -       pc->chip.npwm = 5;
 118 +       pc->chip.npwm = data->num_pwms;
 119
 120         ret = pwmchip_add(&pc->chip);
 121         if (ret < 0) {
 122 @@ -228,9 +249,23 @@ static int mtk_pwm_remove(struct platform_device *pdev)
 123         return pwmchip_remove(&pc->chip);
 124  }
 125
 126 +static const struct mtk_pwm_platform_data mt2712_pwm_data = {
 127 +       .num_pwms = 8,
 128 +};
 129 +
 130 +static const struct mtk_pwm_platform_data mt7622_pwm_data = {
 131 +       .num_pwms = 6,
 132 +};
 133 +
 134 +static const struct mtk_pwm_platform_data mt7623_pwm_data = {
 135 +       .num_pwms = 5,
 136 +};
 137 +
 138  static const struct of_device_id mtk_pwm_of_match[] = {
 139 -       { .compatible = "mediatek,mt7623-pwm" },
 140 -       { }
 141 +       { .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
 142 +       { .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
 143 +       { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
 144 +       { },
 145  };
 146  MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
 147
 148 --
 149 2.11.0
 150