ath79/mikrotik: use routerbootpart partitions
[oweals/openwrt.git] / target / linux / layerscape / patches-5.4 / 812-pcie-0015-PCI-ls_gen4-WA-for-SERROR.patch
1 From 76b810d5fc0cf60e4c98c135011730f84ebe448d Mon Sep 17 00:00:00 2001
2 From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
3 Date: Tue, 28 May 2019 11:17:35 +0800
4 Subject: [PATCH] PCI: ls_gen4: WA for SERROR
5
6 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
7 ---
8  drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c | 4 ++--
9  1 file changed, 2 insertions(+), 2 deletions(-)
10
11 --- a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
12 +++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
13 @@ -242,13 +242,13 @@ static int ls_pcie_g4_read_other_conf(st
14         struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci);
15         int ret;
16  
17 -       if (pcie->rev == REV_1_0 && where == PCI_VENDOR_ID)
18 +       if (pcie->rev == REV_1_0)
19                 ls_pcie_g4_lut_writel(pcie, PCIE_LUT_GCR,
20                                       0 << PCIE_LUT_GCR_RRE);
21  
22         ret = pci_generic_config_read(bus, devfn, where, size, val);
23  
24 -       if (pcie->rev == REV_1_0 && where == PCI_VENDOR_ID)
25 +       if (pcie->rev == REV_1_0)
26                 ls_pcie_g4_lut_writel(pcie, PCIE_LUT_GCR,
27                                       1 << PCIE_LUT_GCR_RRE);
28