1 From aa9e99f77f92814a0d83af8e6ed3148458d0f611 Mon Sep 17 00:00:00 2001
2 From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
3 Date: Tue, 26 Jul 2016 15:43:43 +0300
4 Subject: [PATCH] arm64: KVM: support flushing device memory
6 In the current implementation, trying to flush
7 memory not covered by the linear map (e.g. device
8 memory) causes a crash. Add support for flushing
9 "non-normal" memory by explicitly ioremap()-ing
10 it when such a case appears and do the cache flush
11 through this temporary mapping.
12 This allows dropping the special checks for qman
13 cacheable region when doing cache flushes.
15 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
16 [fixed formatting issue]
17 Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
19 arch/arm64/include/asm/kvm_mmu.h | 12 ++++++++++--
20 1 file changed, 10 insertions(+), 2 deletions(-)
22 --- a/arch/arm64/include/asm/kvm_mmu.h
23 +++ b/arch/arm64/include/asm/kvm_mmu.h
24 @@ -341,8 +341,16 @@ static inline void __invalidate_icache_g
25 static inline void __kvm_flush_dcache_pte(pte_t pte)
27 if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) {
28 - struct page *page = pte_page(pte);
29 - kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
30 + if (pfn_valid(pte_pfn(pte))) {
31 + struct page *page = pte_page(pte);
33 + kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
35 + void __iomem *va = ioremap_cache_ns(pte_pfn(pte) << PAGE_SHIFT, PAGE_SIZE);
37 + kvm_flush_dcache_to_poc(va, PAGE_SIZE);