ath79/mikrotik: use routerbootpart partitions
[oweals/openwrt.git] / target / linux / layerscape / patches-5.4 / 805-display-0013-drm-bridge-cadence-Add-power_on-to-__cdns_dp_probe.patch
1 From 9737dd813b872f5671d40685d2174a928da809a3 Mon Sep 17 00:00:00 2001
2 From: Wen He <wen.he_1@nxp.com>
3 Date: Tue, 17 Sep 2019 15:23:51 +0800
4 Subject: [PATCH] drm: bridge: cadence: Add power_on to __cdns_dp_probe
5
6 Add power_on of the cnds_plat_data to __cdns_dp_probe as to update
7 Board related configuration initalization.
8
9 Signed-off-by: Wen He <wen.he_1@nxp.com>
10 ---
11  drivers/gpu/drm/bridge/cadence/cdns-dp-core.c   | 2 ++
12  drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 2 ++
13  drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c           | 6 +++---
14  drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c           | 2 ++
15  drivers/gpu/drm/imx/cdns-mhdp-imx.h             | 1 +
16  5 files changed, 10 insertions(+), 3 deletions(-)
17
18 --- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c
19 +++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c
20 @@ -457,6 +457,8 @@ static int __cdns_dp_probe(struct platfo
21  
22         cdns_dp_parse_dt(mhdp);
23  
24 +       cdns_mhdp_plat_call(mhdp, power_on);
25 +
26  //     mhdp->dual_mode = false;
27         cdns_mhdp_plat_call(mhdp, firmware_init);
28  
29 --- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c
30 +++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c
31 @@ -449,6 +449,8 @@ static int __cdns_hdmi_probe(struct plat
32         /* Initialize dual_mode to false */
33  //     hdmi->dual_mode = false;
34  
35 +       cdns_mhdp_plat_call(mhdp, power_on);
36 +
37         /* Initialize FW */
38         cdns_mhdp_plat_call(mhdp, firmware_init);
39  
40 --- a/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c
41 +++ b/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c
42 @@ -440,7 +440,7 @@ fail:
43         return ret;
44  }
45  
46 -static void imx8qm_mhdp_power_on(struct cdns_mhdp_device *mhdp)
47 +int cdns_mhdp_power_on_imx8qm(struct cdns_mhdp_device *mhdp)
48  {
49         struct imx_mhdp_device *imx_mhdp =
50                                 container_of(mhdp, struct imx_mhdp_device, mhdp);
51 @@ -463,6 +463,8 @@ static void imx8qm_mhdp_power_on(struct
52         imx8qm_pixel_clk_enable(imx_mhdp);
53  
54         imx8qm_phy_reset(1);
55 +
56 +       return 0;
57  }
58  
59  void cdns_mhdp_plat_init_imx8qm(struct cdns_mhdp_device *mhdp)
60 @@ -506,8 +508,6 @@ int cdns_mhdp_firmware_init_imx8qm(struc
61         u32 rate;
62         int ret;
63  
64 -       imx8qm_mhdp_power_on(mhdp);
65 -
66         /* configure HDMI/DP core clock */
67         rate = clk_get_rate(imx_mhdp->clks.clk_core);
68         cdns_mhdp_set_fw_clk(&imx_mhdp->mhdp, rate);
69 --- a/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c
70 +++ b/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c
71 @@ -71,6 +71,7 @@ static struct cdns_plat_data imx8qm_hdmi
72         .bind   = cdns_hdmi_bind,
73         .unbind = cdns_hdmi_unbind,
74         .phy_set = cdns_hdmi_phy_set_imx8qm,
75 +       .power_on = cdns_mhdp_power_on_imx8qm,
76         .firmware_init = cdns_mhdp_firmware_init_imx8qm,
77         .pclk_rate = cdns_mhdp_pclk_rate_imx8qm,
78         .plat_init = cdns_mhdp_plat_init_imx8qm,
79 @@ -83,6 +84,7 @@ static struct cdns_plat_data imx8qm_dp_d
80         .bind   = cdns_dp_bind,
81         .unbind = cdns_dp_unbind,
82         .phy_set = cdns_dp_phy_set_imx8qm,
83 +       .power_on = cdns_mhdp_power_on_imx8qm,
84         .firmware_init = cdns_mhdp_firmware_init_imx8qm,
85         .pclk_rate = cdns_mhdp_pclk_rate_imx8qm,
86         .plat_init = cdns_mhdp_plat_init_imx8qm,
87 --- a/drivers/gpu/drm/imx/cdns-mhdp-imx.h
88 +++ b/drivers/gpu/drm/imx/cdns-mhdp-imx.h
89 @@ -77,4 +77,5 @@ void cdns_mhdp_plat_init_imx8qm(struct c
90  void cdns_mhdp_plat_deinit_imx8qm(struct cdns_mhdp_device *mhdp);
91  void cdns_mhdp_pclk_rate_imx8qm(struct cdns_mhdp_device *mhdp);
92  int cdns_mhdp_firmware_init_imx8qm(struct cdns_mhdp_device *mhdp);
93 +int cdns_mhdp_power_on_imx8qm(struct cdns_mhdp_device *mhdp);
94  #endif /* CDNS_MHDP_IMX_H_ */