target/linux/layerscape/patches-5.4/701-net-0008-fmd-SDK-DPAA-1.x-FMan-driver.patch

   1 From 2701a01f8da8321d3fb8b2e99240fbc5c093a27b Mon Sep 17 00:00:00 2001
   2 From: Madalin Bucur <madalin.bucur@nxp.com>
   3 Date: Wed, 10 May 2017 16:36:36 +0300
   4 Subject: [PATCH] fmd: SDK DPAA 1.x FMan driver
   5
   6 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
   7 ---
   8  drivers/net/ethernet/freescale/sdk_fman/Kconfig    |  153 +
   9  drivers/net/ethernet/freescale/sdk_fman/Makefile   |   11 +
  10  .../freescale/sdk_fman/Peripherals/FM/HC/Makefile  |   15 +
  11  .../freescale/sdk_fman/Peripherals/FM/HC/hc.c      | 1232 ++++
  12  .../freescale/sdk_fman/Peripherals/FM/MAC/Makefile |   28 +
  13  .../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c  | 1464 ++++
  14  .../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h  |  228 +
  15  .../sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c    |   97 +
  16  .../sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h    |   42 +
  17  .../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c |  658 ++
  18  .../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h |  225 +
  19  .../sdk_fman/Peripherals/FM/MAC/fman_crc32.c       |  119 +
  20  .../sdk_fman/Peripherals/FM/MAC/fman_crc32.h       |   43 +
  21  .../sdk_fman/Peripherals/FM/MAC/fman_dtsec.c       |  845 +++
  22  .../Peripherals/FM/MAC/fman_dtsec_mii_acc.c        |  163 +
  23  .../sdk_fman/Peripherals/FM/MAC/fman_memac.c       |  511 ++
  24  .../Peripherals/FM/MAC/fman_memac_mii_acc.c        |  213 +
  25  .../sdk_fman/Peripherals/FM/MAC/fman_tgec.c        |  367 +
  26  .../freescale/sdk_fman/Peripherals/FM/MAC/memac.c  | 1096 +++
  27  .../freescale/sdk_fman/Peripherals/FM/MAC/memac.h  |  110 +
  28  .../sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c    |   78 +
  29  .../sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h    |   73 +
  30  .../freescale/sdk_fman/Peripherals/FM/MAC/tgec.c   |  975 +++
  31  .../freescale/sdk_fman/Peripherals/FM/MAC/tgec.h   |  151 +
  32  .../sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c     |  139 +
  33  .../sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h     |   80 +
  34  .../sdk_fman/Peripherals/FM/MACSEC/Makefile        |   15 +
  35  .../sdk_fman/Peripherals/FM/MACSEC/fm_macsec.c     |  237 +
  36  .../sdk_fman/Peripherals/FM/MACSEC/fm_macsec.h     |  203 +
  37  .../Peripherals/FM/MACSEC/fm_macsec_guest.c        |   59 +
  38  .../Peripherals/FM/MACSEC/fm_macsec_master.c       | 1031 +++
  39  .../Peripherals/FM/MACSEC/fm_macsec_master.h       |  479 ++
  40  .../Peripherals/FM/MACSEC/fm_macsec_secy.c         |  883 +++
  41  .../Peripherals/FM/MACSEC/fm_macsec_secy.h         |  144 +
  42  .../freescale/sdk_fman/Peripherals/FM/Makefile     |   23 +
  43  .../freescale/sdk_fman/Peripherals/FM/Pcd/Makefile |   26 +
  44  .../freescale/sdk_fman/Peripherals/FM/Pcd/crc64.h  |  360 +
  45  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c  | 7582 ++++++++++++++++++++
  46  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.h  |  399 +
  47  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c  | 3242 +++++++++
  48  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.h  |  206 +
  49  .../sdk_fman/Peripherals/FM/Pcd/fm_manip.c         | 5571 ++++++++++++++
  50  .../sdk_fman/Peripherals/FM/Pcd/fm_manip.h         |  555 ++
  51  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.c | 2095 ++++++
  52  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.h |  543 ++
  53  .../sdk_fman/Peripherals/FM/Pcd/fm_pcd_ipc.h       |  280 +
  54  .../sdk_fman/Peripherals/FM/Pcd/fm_plcr.c          | 1847 +++++
  55  .../sdk_fman/Peripherals/FM/Pcd/fm_plcr.h          |  165 +
  56  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.c |  423 ++
  57  .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.h |  316 +
  58  .../sdk_fman/Peripherals/FM/Pcd/fm_replic.c        |  984 +++
  59  .../sdk_fman/Peripherals/FM/Pcd/fm_replic.h        |  101 +
  60  .../sdk_fman/Peripherals/FM/Pcd/fman_kg.c          |  888 +++
  61  .../sdk_fman/Peripherals/FM/Pcd/fman_prs.c         |  129 +
  62  .../sdk_fman/Peripherals/FM/Port/Makefile          |   15 +
  63  .../sdk_fman/Peripherals/FM/Port/fm_port.c         | 6436 +++++++++++++++++
  64  .../sdk_fman/Peripherals/FM/Port/fm_port.h         |  999 +++
  65  .../sdk_fman/Peripherals/FM/Port/fm_port_dsar.h    |  494 ++
  66  .../sdk_fman/Peripherals/FM/Port/fm_port_im.c      |  753 ++
  67  .../sdk_fman/Peripherals/FM/Port/fman_port.c       | 1568 ++++
  68  .../freescale/sdk_fman/Peripherals/FM/Rtc/Makefile |   15 +
  69  .../freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.c |  692 ++
  70  .../freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.h |   96 +
  71  .../sdk_fman/Peripherals/FM/Rtc/fman_rtc.c         |  334 +
  72  .../freescale/sdk_fman/Peripherals/FM/SP/Makefile  |   15 +
  73  .../freescale/sdk_fman/Peripherals/FM/SP/fm_sp.c   |  757 ++
  74  .../freescale/sdk_fman/Peripherals/FM/SP/fm_sp.h   |   85 +
  75  .../freescale/sdk_fman/Peripherals/FM/SP/fman_sp.c |  197 +
  76  .../freescale/sdk_fman/Peripherals/FM/fm.c         | 5216 ++++++++++++++
  77  .../freescale/sdk_fman/Peripherals/FM/fm.h         |  648 ++
  78  .../freescale/sdk_fman/Peripherals/FM/fm_ipc.h     |  465 ++
  79  .../freescale/sdk_fman/Peripherals/FM/fm_muram.c   |  174 +
  80  .../freescale/sdk_fman/Peripherals/FM/fman.c       | 1398 ++++
  81  .../sdk_fman/Peripherals/FM/inc/fm_common.h        | 1214 ++++
  82  .../freescale/sdk_fman/Peripherals/FM/inc/fm_hc.h  |   93 +
  83  .../sdk_fman/Peripherals/FM/inc/fm_sp_common.h     |  117 +
  84  .../net/ethernet/freescale/sdk_fman/etc/Makefile   |   12 +
  85  .../net/ethernet/freescale/sdk_fman/etc/error.c    |   95 +
  86  drivers/net/ethernet/freescale/sdk_fman/etc/list.c |   71 +
  87  .../net/ethernet/freescale/sdk_fman/etc/memcpy.c   |  620 ++
  88  drivers/net/ethernet/freescale/sdk_fman/etc/mm.c   | 1155 +++
  89  drivers/net/ethernet/freescale/sdk_fman/etc/mm.h   |  105 +
  90  .../net/ethernet/freescale/sdk_fman/etc/sprint.c   |   81 +
  91  .../ethernet/freescale/sdk_fman/fmanv3h_dflags.h   |   57 +
  92  .../ethernet/freescale/sdk_fman/fmanv3l_dflags.h   |   56 +
  93  .../sdk_fman/inc/Peripherals/crc_mac_addr_ext.h    |  364 +
  94  .../freescale/sdk_fman/inc/Peripherals/dpaa_ext.h  |  210 +
  95  .../freescale/sdk_fman/inc/Peripherals/fm_ext.h    | 1731 +++++
  96  .../sdk_fman/inc/Peripherals/fm_mac_ext.h          |  859 +++
  97  .../sdk_fman/inc/Peripherals/fm_macsec_ext.h       | 1271 ++++
  98  .../sdk_fman/inc/Peripherals/fm_muram_ext.h        |  170 +
  99  .../sdk_fman/inc/Peripherals/fm_pcd_ext.h          | 3974 ++++++++++
 100  .../sdk_fman/inc/Peripherals/fm_port_ext.h         | 2608 +++++++
 101  .../sdk_fman/inc/Peripherals/fm_rtc_ext.h          |  619 ++
 102  .../sdk_fman/inc/Peripherals/fm_vsp_ext.h          |  411 ++
 103  .../sdk_fman/inc/Peripherals/mii_acc_ext.h         |   76 +
 104  .../net/ethernet/freescale/sdk_fman/inc/core_ext.h |   90 +
 105  .../freescale/sdk_fman/inc/cores/arm_ext.h         |   55 +
 106  .../freescale/sdk_fman/inc/cores/e500v2_ext.h      |  476 ++
 107  .../freescale/sdk_fman/inc/cores/ppc_ext.h         |  141 +
 108  .../ethernet/freescale/sdk_fman/inc/ddr_std_ext.h  |   77 +
 109  .../ethernet/freescale/sdk_fman/inc/debug_ext.h    |  233 +
 110  .../ethernet/freescale/sdk_fman/inc/endian_ext.h   |  447 ++
 111  .../net/ethernet/freescale/sdk_fman/inc/enet_ext.h |  205 +
 112  .../ethernet/freescale/sdk_fman/inc/error_ext.h    |  529 ++
 113  .../ethernet/freescale/sdk_fman/inc/etc/list_ext.h |  358 +
 114  .../ethernet/freescale/sdk_fman/inc/etc/mem_ext.h  |  318 +
 115  .../freescale/sdk_fman/inc/etc/memcpy_ext.h        |  208 +
 116  .../ethernet/freescale/sdk_fman/inc/etc/mm_ext.h   |  310 +
 117  .../freescale/sdk_fman/inc/etc/sprint_ext.h        |  118 +
 118  .../sdk_fman/inc/flib/common/arch/ppc_access.h     |   37 +
 119  .../freescale/sdk_fman/inc/flib/common/general.h   |   52 +
 120  .../freescale/sdk_fman/inc/flib/fman_common.h      |   78 +
 121  .../freescale/sdk_fman/inc/flib/fsl_enet.h         |  273 +
 122  .../freescale/sdk_fman/inc/flib/fsl_fman.h         |  825 +++
 123  .../freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h   | 1096 +++
 124  .../sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h     |  107 +
 125  .../freescale/sdk_fman/inc/flib/fsl_fman_kg.h      |  514 ++
 126  .../freescale/sdk_fman/inc/flib/fsl_fman_memac.h   |  427 ++
 127  .../sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h     |   78 +
 128  .../freescale/sdk_fman/inc/flib/fsl_fman_port.h    |  593 ++
 129  .../freescale/sdk_fman/inc/flib/fsl_fman_prs.h     |  102 +
 130  .../freescale/sdk_fman/inc/flib/fsl_fman_rtc.h     |  449 ++
 131  .../freescale/sdk_fman/inc/flib/fsl_fman_sp.h      |  138 +
 132  .../freescale/sdk_fman/inc/flib/fsl_fman_tgec.h    |  479 ++
 133  .../integrations/FMANV3H/dpaa_integration_ext.h    |  291 +
 134  .../sdk_fman/inc/integrations/FMANV3H/part_ext.h   |   71 +
 135  .../integrations/FMANV3H/part_integration_ext.h    |  304 +
 136  .../integrations/FMANV3L/dpaa_integration_ext.h    |  293 +
 137  .../sdk_fman/inc/integrations/FMANV3L/part_ext.h   |   59 +
 138  .../integrations/FMANV3L/part_integration_ext.h    |  304 +
 139  .../inc/integrations/LS1043/dpaa_integration_ext.h |  291 +
 140  .../sdk_fman/inc/integrations/LS1043/part_ext.h    |   64 +
 141  .../inc/integrations/LS1043/part_integration_ext.h |  185 +
 142  .../inc/integrations/P1023/dpaa_integration_ext.h  |  213 +
 143  .../sdk_fman/inc/integrations/P1023/part_ext.h     |   82 +
 144  .../inc/integrations/P1023/part_integration_ext.h  |  635 ++
 145  .../P3040_P4080_P5020/dpaa_integration_ext.h       |  276 +
 146  .../inc/integrations/P3040_P4080_P5020/part_ext.h  |   83 +
 147  .../P3040_P4080_P5020/part_integration_ext.h       |  336 +
 148  .../net/ethernet/freescale/sdk_fman/inc/math_ext.h |  100 +
 149  .../net/ethernet/freescale/sdk_fman/inc/ncsw_ext.h |  435 ++
 150  .../net/ethernet/freescale/sdk_fman/inc/net_ext.h  |  430 ++
 151  .../net/ethernet/freescale/sdk_fman/inc/std_ext.h  |   48 +
 152  .../ethernet/freescale/sdk_fman/inc/stdarg_ext.h   |   49 +
 153  .../ethernet/freescale/sdk_fman/inc/stdlib_ext.h   |  162 +
 154  .../ethernet/freescale/sdk_fman/inc/string_ext.h   |   56 +
 155  .../ethernet/freescale/sdk_fman/inc/types_ext.h    |   62 +
 156  .../ethernet/freescale/sdk_fman/inc/xx_common.h    |   56 +
 157  .../net/ethernet/freescale/sdk_fman/inc/xx_ext.h   |  791 ++
 158  .../ethernet/freescale/sdk_fman/ls1043_dflags.h    |   56 +
 159  .../net/ethernet/freescale/sdk_fman/ncsw_config.mk |   53 +
 160  .../net/ethernet/freescale/sdk_fman/p1023_dflags.h |   65 +
 161  .../freescale/sdk_fman/p3040_4080_5020_dflags.h    |   62 +
 162  .../net/ethernet/freescale/sdk_fman/src/Makefile   |   11 +
 163  .../freescale/sdk_fman/src/inc/system/sys_ext.h    |  118 +
 164  .../freescale/sdk_fman/src/inc/system/sys_io_ext.h |   46 +
 165  .../freescale/sdk_fman/src/inc/types_linux.h       |  208 +
 166  .../sdk_fman/src/inc/wrapper/fsl_fman_test.h       |   84 +
 167  .../sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h      |  128 +
 168  .../sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h       |  163 +
 169  .../sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h     |  921 +++
 170  .../ethernet/freescale/sdk_fman/src/inc/xx/xx.h    |   50 +
 171  .../freescale/sdk_fman/src/system/Makefile         |   10 +
 172  .../freescale/sdk_fman/src/system/sys_io.c         |  171 +
 173  .../freescale/sdk_fman/src/wrapper/Makefile        |   19 +
 174  .../freescale/sdk_fman/src/wrapper/fman_test.c     | 1665 +++++
 175  .../freescale/sdk_fman/src/wrapper/lnxwrp_fm.c     | 2908 ++++++++
 176  .../freescale/sdk_fman/src/wrapper/lnxwrp_fm.h     |  294 +
 177  .../sdk_fman/src/wrapper/lnxwrp_fm_port.c          | 1480 ++++
 178  .../sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c        | 4813 +++++++++++++
 179  .../sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c | 1297 ++++
 180  .../sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h |  755 ++
 181  .../sdk_fman/src/wrapper/lnxwrp_resources.h        |  121 +
 182  .../sdk_fman/src/wrapper/lnxwrp_resources_ut.c     |  191 +
 183  .../sdk_fman/src/wrapper/lnxwrp_resources_ut.h     |  144 +
 184  .../sdk_fman/src/wrapper/lnxwrp_resources_ut.make  |   28 +
 185  .../freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.c  |   60 +
 186  .../freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.h  |   60 +
 187  .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c         | 1855 +++++
 188  .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm.h         |  136 +
 189  .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.c    | 1268 ++++
 190  .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.h    |   56 +
 191  .../ethernet/freescale/sdk_fman/src/xx/Makefile    |   18 +
 192  .../freescale/sdk_fman/src/xx/module_strings.c     |   46 +
 193  .../freescale/sdk_fman/src/xx/xx_arm_linux.c       |  905 +++
 194  .../ethernet/freescale/sdk_fman/src/xx/xx_linux.c  |  918 +++
 195  include/linux/fsl/svr.h                            |   97 +
 196  include/uapi/linux/fmd/Kbuild                      |    5 +
 197  include/uapi/linux/fmd/Peripherals/Kbuild          |    4 +
 198  include/uapi/linux/fmd/Peripherals/fm_ioctls.h     |  628 ++
 199  include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h | 3084 ++++++++
 200  .../uapi/linux/fmd/Peripherals/fm_port_ioctls.h    |  948 +++
 201  .../uapi/linux/fmd/Peripherals/fm_test_ioctls.h    |  208 +
 202  include/uapi/linux/fmd/integrations/Kbuild         |    1 +
 203  .../linux/fmd/integrations/integration_ioctls.h    |   56 +
 204  include/uapi/linux/fmd/ioctls.h                    |   96 +
 205  include/uapi/linux/fmd/net_ioctls.h                |  430 ++
 206  198 files changed, 115457 insertions(+)
 207  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Kconfig
 208  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Makefile
 209  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/Makefile
 210  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/hc.c
 211  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/Makefile
 212  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c
 213  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h
 214  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c
 215  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h
 216  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c
 217  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h
 218  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.c
 219  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.h
 220  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec.c
 221  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec_mii_acc.c
 222  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac.c
 223  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac_mii_acc.c
 224  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_tgec.c
 225  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
 226  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h
 227  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c
 228  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h
 229  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.c
 230  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.h
 231  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c
 232  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h
 233  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/Makefile
 234  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.c
 235  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.h
 236  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_guest.c
 237  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.c
 238  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.h
 239  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.c
 240  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.h
 241  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Makefile
 242  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/Makefile
 243  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/crc64.h
 244  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c
 245  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.h
 246  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c
 247  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.h
 248  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c
 249  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.h
 250  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.c
 251  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.h
 252  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd_ipc.h
 253  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.c
 254  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.h
 255  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.c
 256  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.h
 257  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.c
 258  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.h
 259  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_kg.c
 260  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_prs.c
 261  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/Makefile
 262  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c
 263  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.h
 264  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_dsar.h
 265  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_im.c
 266  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fman_port.c
 267  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/Makefile
 268  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.c
 269  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.h
 270  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fman_rtc.c
 271  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/Makefile
 272  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.c
 273  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.h
 274  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fman_sp.c
 275  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c
 276  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.h
 277  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_ipc.h
 278  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_muram.c
 279  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fman.c
 280  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_common.h
 281  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_hc.h
 282  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_sp_common.h
 283  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/Makefile
 284  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/error.c
 285  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/list.c
 286  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/memcpy.c
 287  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/mm.c
 288  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/mm.h
 289  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/sprint.c
 290  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/fmanv3h_dflags.h
 291  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/fmanv3l_dflags.h
 292  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/crc_mac_addr_ext.h
 293  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/dpaa_ext.h
 294  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_ext.h
 295  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_mac_ext.h
 296  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_macsec_ext.h
 297  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_muram_ext.h
 298  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_pcd_ext.h
 299  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_port_ext.h
 300  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_rtc_ext.h
 301  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_vsp_ext.h
 302  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/mii_acc_ext.h
 303  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/core_ext.h
 304  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/cores/arm_ext.h
 305  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/cores/e500v2_ext.h
 306  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/cores/ppc_ext.h
 307  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/ddr_std_ext.h
 308  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/debug_ext.h
 309  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/endian_ext.h
 310  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/enet_ext.h
 311  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/error_ext.h
 312  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/list_ext.h
 313  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/mem_ext.h
 314  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/memcpy_ext.h
 315  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/mm_ext.h
 316  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/sprint_ext.h
 317  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/arch/ppc_access.h
 318  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/general.h
 319  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fman_common.h
 320  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_enet.h
 321  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman.h
 322  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h
 323  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h
 324  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_kg.h
 325  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac.h
 326  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h
 327  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_port.h
 328  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_prs.h
 329  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_rtc.h
 330  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_sp.h
 331  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_tgec.h
 332  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/dpaa_integration_ext.h
 333  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_ext.h
 334  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_integration_ext.h
 335  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/dpaa_integration_ext.h
 336  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_ext.h
 337  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_integration_ext.h
 338  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/dpaa_integration_ext.h
 339  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_ext.h
 340  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_integration_ext.h
 341  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/dpaa_integration_ext.h
 342  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_ext.h
 343  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_integration_ext.h
 344  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/dpaa_integration_ext.h
 345  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_ext.h
 346  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_integration_ext.h
 347  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/math_ext.h
 348  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/ncsw_ext.h
 349  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/net_ext.h
 350  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/std_ext.h
 351  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/stdarg_ext.h
 352  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/stdlib_ext.h
 353  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/string_ext.h
 354  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/types_ext.h
 355  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/xx_common.h
 356  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/xx_ext.h
 357  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/ls1043_dflags.h
 358  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
 359  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/p1023_dflags.h
 360  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/p3040_4080_5020_dflags.h
 361  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/Makefile
 362  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_ext.h
 363  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_io_ext.h
 364  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/types_linux.h
 365  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/fsl_fman_test.h
 366  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h
 367  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h
 368  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h
 369  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/xx/xx.h
 370  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/system/Makefile
 371  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/system/sys_io.c
 372  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/Makefile
 373  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/fman_test.c
 374  create mode 100755 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.c
 375  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.h
 376  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm_port.c
 377  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c
 378  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c
 379  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h
 380  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources.h
 381  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.c
 382  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.h
 383  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.make
 384  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.c
 385  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.h
 386  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c
 387  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.h
 388  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.c
 389  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.h
 390  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/Makefile
 391  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/module_strings.c
 392  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_arm_linux.c
 393  create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_linux.c
 394  create mode 100644 include/linux/fsl/svr.h
 395  create mode 100644 include/uapi/linux/fmd/Kbuild
 396  create mode 100644 include/uapi/linux/fmd/Peripherals/Kbuild
 397  create mode 100644 include/uapi/linux/fmd/Peripherals/fm_ioctls.h
 398  create mode 100644 include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h
 399  create mode 100644 include/uapi/linux/fmd/Peripherals/fm_port_ioctls.h
 400  create mode 100644 include/uapi/linux/fmd/Peripherals/fm_test_ioctls.h
 401  create mode 100644 include/uapi/linux/fmd/integrations/Kbuild
 402  create mode 100644 include/uapi/linux/fmd/integrations/integration_ioctls.h
 403  create mode 100644 include/uapi/linux/fmd/ioctls.h
 404  create mode 100644 include/uapi/linux/fmd/net_ioctls.h
 405
 406 --- /dev/null
 407 +++ b/drivers/net/ethernet/freescale/sdk_fman/Kconfig
 408 @@ -0,0 +1,153 @@
 409 +menu "Frame Manager support"
 410 +
 411 +menuconfig FSL_SDK_FMAN
 412 +       bool "Freescale Frame Manager (datapath) support - SDK driver"
 413 +       depends on (FSL_SOC || ARM64 || ARM) && FSL_SDK_BMAN && FSL_SDK_QMAN && !FSL_FMAN
 414 +       default y
 415 +       ---help---
 416 +               If unsure, say Y.
 417 +
 418 +if FSL_SDK_FMAN
 419 +
 420 +config FSL_SDK_FMAN_TEST
 421 +       bool "FMan test module"
 422 +       default n
 423 +       select FSL_DPAA_HOOKS
 424 +       ---help---
 425 +               This option compiles test code for FMan.
 426 +
 427 +menu "FMAN Processor support"
 428 +choice
 429 +       depends on FSL_SDK_FMAN
 430 +       prompt "Processor Type"
 431 +
 432 +config FMAN_ARM
 433 +       bool "LS1043"
 434 +       depends on ARM64 || ARM
 435 +       ---help---
 436 +         Choose "LS1043" for the ARM platforms:
 437 +         LS1043
 438 +
 439 +config FMAN_P3040_P4080_P5020
 440 +       bool "P3040 P4080 5020"
 441 +
 442 +config FMAN_P1023
 443 +       bool "P1023"
 444 +
 445 +config FMAN_V3H
 446 +       bool "FmanV3H"
 447 +       ---help---
 448 +         Choose "FmanV3H" for Fman rev3H:
 449 +         B4860, T4240, T4160, etc
 450 +
 451 +config FMAN_V3L
 452 +       bool "FmanV3L"
 453 +       ---help---
 454 +         Choose "FmanV3L" for Fman rev3L:
 455 +         T1040, T1042, T1020, T1022, T1023, T1024, etc
 456 +
 457 +endchoice
 458 +endmenu
 459 +
 460 +config FMAN_MIB_CNT_OVF_IRQ_EN
 461 +       bool "Enable the dTSEC MIB counters overflow interrupt"
 462 +       default n
 463 +       ---help---
 464 +               Enable the dTSEC MIB counters overflow interrupt to get
 465 +               accurate MIB counters values. Enabled it compensates
 466 +               for the counters overflow but reduces performance and
 467 +               triggers error messages in HV setups.
 468 +
 469 +config FSL_FM_MAX_FRAME_SIZE
 470 +       int "Maximum L2 frame size"
 471 +       depends on FSL_SDK_FMAN
 472 +       range 64 9600
 473 +       default "1522"
 474 +       help
 475 +               Configure this in relation to the maximum possible MTU of your
 476 +               network configuration. In particular, one would need to
 477 +               increase this value in order to use jumbo frames.
 478 +               FSL_FM_MAX_FRAME_SIZE must accommodate the Ethernet FCS (4 bytes)
 479 +               and one ETH+VLAN header (18 bytes), to a total of 22 bytes in
 480 +               excess of the desired L3 MTU.
 481 +
 482 +               Note that having too large a FSL_FM_MAX_FRAME_SIZE (much larger
 483 +               than the actual MTU) may lead to buffer exhaustion, especially
 484 +               in the case of badly fragmented datagrams on the Rx path.
 485 +               Conversely, having a FSL_FM_MAX_FRAME_SIZE smaller than the actual
 486 +               MTU will lead to frames being dropped.
 487 +
 488 +               This can be overridden by specifying "fsl_fm_max_frm" in
 489 +               the kernel bootargs:
 490 +                * in Hypervisor-based scenarios, by adding a "chosen" node
 491 +               with the "bootargs" property specifying
 492 +               "fsl_fm_max_frm=<YourValue>";
 493 +                * in non-Hypervisor-based scenarios, via u-boot's env, by
 494 +               modifying the "bootargs" env variable.
 495 +
 496 +config FSL_FM_RX_EXTRA_HEADROOM
 497 +       int "Add extra headroom at beginning of data buffers"
 498 +       depends on FSL_SDK_FMAN
 499 +       range 16 384
 500 +       default "64"
 501 +       help
 502 +               Configure this to tell the Frame Manager to reserve some extra
 503 +               space at the beginning of a data buffer on the receive path,
 504 +               before Internal Context fields are copied. This is in addition
 505 +               to the private data area already reserved for driver internal
 506 +               use. The provided value must be a multiple of 16.
 507 +
 508 +               This setting can be overridden by specifying
 509 +               "fsl_fm_rx_extra_headroom" in the kernel bootargs:
 510 +                * in Hypervisor-based scenarios, by adding a "chosen" node
 511 +               with the "bootargs" property specifying
 512 +               "fsl_fm_rx_extra_headroom=<YourValue>";
 513 +                * in non-Hypervisor-based scenarios, via u-boot's env, by
 514 +               modifying the "bootargs" env variable.
 515 +
 516 +config FMAN_PFC
 517 +       bool "FMan PFC support (EXPERIMENTAL)"
 518 +       depends on ( FMAN_V3H || FMAN_V3L || FMAN_ARM) && FSL_SDK_FMAN
 519 +       default n
 520 +       help
 521 +               This option enables PFC support on FMan v3 ports.
 522 +               Data Center Bridging defines Classes of Service that are
 523 +               flow-controlled using PFC pause frames.
 524 +
 525 +if FMAN_PFC
 526 +config FMAN_PFC_COS_COUNT
 527 +       int "Number of PFC Classes of Service"
 528 +       depends on FMAN_PFC && FSL_SDK_FMAN
 529 +       range 1 4
 530 +       default "3"
 531 +       help
 532 +               The number of Classes of Service controlled by PFC.
 533 +
 534 +config FMAN_PFC_QUANTA_0
 535 +       int "The pause quanta for PFC CoS 0"
 536 +       depends on FMAN_PFC && FSL_SDK_FMAN
 537 +       range 0 65535
 538 +       default "65535"
 539 +
 540 +config FMAN_PFC_QUANTA_1
 541 +       int "The pause quanta for PFC CoS 1"
 542 +       depends on FMAN_PFC && FSL_SDK_FMAN
 543 +       range 0 65535
 544 +       default "65535"
 545 +
 546 +config FMAN_PFC_QUANTA_2
 547 +       int "The pause quanta for PFC CoS 2"
 548 +       depends on FMAN_PFC && FSL_SDK_FMAN
 549 +       range 0 65535
 550 +       default "65535"
 551 +
 552 +config FMAN_PFC_QUANTA_3
 553 +       int "The pause quanta for PFC CoS 3"
 554 +       depends on FMAN_PFC && FSL_SDK_FMAN
 555 +       range 0 65535
 556 +       default "65535"
 557 +endif
 558 +
 559 +endif # FSL_SDK_FMAN
 560 +
 561 +endmenu
 562 --- /dev/null
 563 +++ b/drivers/net/ethernet/freescale/sdk_fman/Makefile
 564 @@ -0,0 +1,11 @@
 565 +#
 566 +# Makefile for the Freescale Ethernet controllers
 567 +#
 568 +ccflags-y           += -DVERSION=\"\"
 569 +#
 570 +#Include netcomm SW specific definitions
 571 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
 572 +#
 573 +obj-y          += etc/
 574 +obj-y          += Peripherals/FM/
 575 +obj-y          += src/
 576 --- /dev/null
 577 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/Makefile
 578 @@ -0,0 +1,15 @@
 579 +#
 580 +# Makefile for the Freescale Ethernet controllers
 581 +#
 582 +ccflags-y           += -DVERSION=\"\"
 583 +#
 584 +#Include netcomm SW specific definitions
 585 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
 586 +
 587 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
 588 +
 589 +ccflags-y += -I$(NCSW_FM_INC)
 590 +
 591 +obj-y          += fsl-ncsw-Hc.o
 592 +
 593 +fsl-ncsw-Hc-objs       :=   hc.o
 594 --- /dev/null
 595 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/hc.c
 596 @@ -0,0 +1,1232 @@
 597 +/*
 598 + * Copyright 2008-2012 Freescale Semiconductor Inc.
 599 + *
 600 + * Redistribution and use in source and binary forms, with or without
 601 + * modification, are permitted provided that the following conditions are met:
 602 + *     * Redistributions of source code must retain the above copyright
 603 + *       notice, this list of conditions and the following disclaimer.
 604 + *     * Redistributions in binary form must reproduce the above copyright
 605 + *       notice, this list of conditions and the following disclaimer in the
 606 + *       documentation and/or other materials provided with the distribution.
 607 + *     * Neither the name of Freescale Semiconductor nor the
 608 + *       names of its contributors may be used to endorse or promote products
 609 + *       derived from this software without specific prior written permission.
 610 + *
 611 + *
 612 + * ALTERNATIVELY, this software may be distributed under the terms of the
 613 + * GNU General Public License ("GPL") as published by the Free Software
 614 + * Foundation, either version 2 of that License or (at your option) any
 615 + * later version.
 616 + *
 617 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 618 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 619 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 620 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 621 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 622 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 623 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 624 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 625 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 626 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 627 + */
 628 +
 629 +
 630 +#include "std_ext.h"
 631 +#include "error_ext.h"
 632 +#include "sprint_ext.h"
 633 +#include "string_ext.h"
 634 +
 635 +#include "fm_common.h"
 636 +#include "fm_hc.h"
 637 +
 638 +
 639 +/**************************************************************************//**
 640 + @Description       defaults
 641 +*//***************************************************************************/
 642 +#define DEFAULT_dataMemId                                       0
 643 +
 644 +#define HC_HCOR_OPCODE_PLCR_PRFL                                0x0
 645 +#define HC_HCOR_OPCODE_KG_SCM                                   0x1
 646 +#define HC_HCOR_OPCODE_SYNC                                     0x2
 647 +#define HC_HCOR_OPCODE_CC                                       0x3
 648 +#define HC_HCOR_OPCODE_CC_AGE_MASK                              0x4
 649 +#define HC_HCOR_OPCODE_CC_CAPWAP_REASSM_TIMEOUT                 0x5
 650 +#define HC_HCOR_OPCODE_CC_REASSM_TIMEOUT                        0x10
 651 +#define HC_HCOR_OPCODE_CC_IP_FRAG_INITIALIZATION                0x11
 652 +#define HC_HCOR_OPCODE_CC_UPDATE_WITH_AGING                     0x13
 653 +#define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_ACTIVE_SHIFT          24
 654 +#define HC_HCOR_EXTRA_REG_REASSM_TIMEOUT_TSBS_SHIFT             24
 655 +#define HC_HCOR_EXTRA_REG_CC_AGING_ADD                          0x80000000
 656 +#define HC_HCOR_EXTRA_REG_CC_AGING_REMOVE                       0x40000000
 657 +#define HC_HCOR_EXTRA_REG_CC_AGING_CHANGE_MASK                  0xC0000000
 658 +#define HC_HCOR_EXTRA_REG_CC_REMOVE_INDX_SHIFT                  24
 659 +#define HC_HCOR_EXTRA_REG_CC_REMOVE_INDX_MASK                   0x1F000000
 660 +#define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_SHIFT             16
 661 +#define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_MASK              0xF
 662 +#define HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_CMD_SHIFT       24
 663 +#define HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_BPID            16
 664 +
 665 +#define HC_HCOR_GBL                         0x20000000
 666 +
 667 +#define HC_HCOR_KG_SCHEME_COUNTER           0x00000400
 668 +
 669 +#if (DPAA_VERSION == 10)
 670 +#define HC_HCOR_KG_SCHEME_REGS_MASK         0xFFFFF800
 671 +#else
 672 +#define HC_HCOR_KG_SCHEME_REGS_MASK         0xFFFFFE00
 673 +#endif /* (DPAA_VERSION == 10) */
 674 +
 675 +#define SIZE_OF_HC_FRAME_PORT_REGS          (sizeof(t_HcFrame)-sizeof(struct fman_kg_scheme_regs)+sizeof(t_FmPcdKgPortRegs))
 676 +#define SIZE_OF_HC_FRAME_SCHEME_REGS        sizeof(t_HcFrame)
 677 +#define SIZE_OF_HC_FRAME_PROFILES_REGS      (sizeof(t_HcFrame)-sizeof(struct fman_kg_scheme_regs)+sizeof(t_FmPcdPlcrProfileRegs))
 678 +#define SIZE_OF_HC_FRAME_PROFILE_CNT        (sizeof(t_HcFrame)-sizeof(t_FmPcdPlcrProfileRegs)+sizeof(uint32_t))
 679 +#define SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC 16
 680 +
 681 +#define HC_CMD_POOL_SIZE                    (INTG_MAX_NUM_OF_CORES)
 682 +
 683 +#define BUILD_FD(len)                     \
 684 +do {                                      \
 685 +    memset(&fmFd, 0, sizeof(t_DpaaFD));   \
 686 +    DPAA_FD_SET_ADDR(&fmFd, p_HcFrame);   \
 687 +    DPAA_FD_SET_OFFSET(&fmFd, 0);         \
 688 +    DPAA_FD_SET_LENGTH(&fmFd, len);       \
 689 +} while (0)
 690 +
 691 +
 692 +#if defined(__MWERKS__) && !defined(__GNUC__)
 693 +#pragma pack(push,1)
 694 +#endif /* defined(__MWERKS__) && ... */
 695 +
 696 +typedef struct t_FmPcdKgPortRegs {
 697 +    volatile uint32_t                       spReg;
 698 +    volatile uint32_t                       cppReg;
 699 +} t_FmPcdKgPortRegs;
 700 +
 701 +typedef struct t_HcFrame {
 702 +    volatile uint32_t                           opcode;
 703 +    volatile uint32_t                           actionReg;
 704 +    volatile uint32_t                           extraReg;
 705 +    volatile uint32_t                           commandSequence;
 706 +    union {
 707 +        struct fman_kg_scheme_regs              schemeRegs;
 708 +        struct fman_kg_scheme_regs              schemeRegsWithoutCounter;
 709 +        t_FmPcdPlcrProfileRegs                  profileRegs;
 710 +        volatile uint32_t                       singleRegForWrite;    /* for writing SP, CPP, profile counter */
 711 +        t_FmPcdKgPortRegs                       portRegsForRead;
 712 +        volatile uint32_t                       clsPlanEntries[CLS_PLAN_NUM_PER_GRP];
 713 +        t_FmPcdCcCapwapReassmTimeoutParams      ccCapwapReassmTimeout;
 714 +        t_FmPcdCcReassmTimeoutParams            ccReassmTimeout;
 715 +    } hcSpecificData;
 716 +} t_HcFrame;
 717 +
 718 +#if defined(__MWERKS__) && !defined(__GNUC__)
 719 +#pragma pack(pop)
 720 +#endif /* defined(__MWERKS__) && ... */
 721 +
 722 +
 723 +typedef struct t_FmHc {
 724 +    t_Handle                    h_FmPcd;
 725 +    t_Handle                    h_HcPortDev;
 726 +    t_FmPcdQmEnqueueCallback    *f_QmEnqueue;     /**< A callback for enqueuing frames to the QM */
 727 +    t_Handle                    h_QmArg;          /**< A handle to the QM module */
 728 +    uint8_t                     dataMemId;        /**< Memory partition ID for data buffers */
 729 +
 730 +    uint32_t                    seqNum[HC_CMD_POOL_SIZE];   /* FIFO of seqNum to use when
 731 +                                                               taking buffer */
 732 +    uint32_t                    nextSeqNumLocation;         /* seqNum location in seqNum[] for next buffer */
 733 +    volatile bool               enqueued[HC_CMD_POOL_SIZE]; /* HC is active - frame is enqueued
 734 +                                                               and not confirmed yet */
 735 +    t_HcFrame                   *p_Frm[HC_CMD_POOL_SIZE];
 736 +} t_FmHc;
 737 +
 738 +
 739 +static t_Error FillBufPool(t_FmHc *p_FmHc)
 740 +{
 741 +    uint32_t i;
 742 +
 743 +    ASSERT_COND(p_FmHc);
 744 +
 745 +    for (i = 0; i < HC_CMD_POOL_SIZE; i++)
 746 +    {
 747 +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
 748 +        p_FmHc->p_Frm[i] = (t_HcFrame *)XX_MallocSmart((sizeof(t_HcFrame) + (16 - (sizeof(t_FmHc) % 16))),
 749 +                                                       p_FmHc->dataMemId,
 750 +                                                       16);
 751 +#else
 752 +        p_FmHc->p_Frm[i] = (t_HcFrame *)XX_MallocSmart(sizeof(t_HcFrame),
 753 +                                                       p_FmHc->dataMemId,
 754 +                                                       16);
 755 +#endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
 756 +        if (!p_FmHc->p_Frm[i])
 757 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM HC frames!"));
 758 +    }
 759 +
 760 +    /* Initialize FIFO of seqNum to use during GetBuf */
 761 +    for (i = 0; i < HC_CMD_POOL_SIZE; i++)
 762 +    {
 763 +        p_FmHc->seqNum[i] = i;
 764 +    }
 765 +    p_FmHc->nextSeqNumLocation = 0;
 766 +
 767 +    return E_OK;
 768 +}
 769 +
 770 +static __inline__ t_HcFrame * GetBuf(t_FmHc *p_FmHc, uint32_t *p_SeqNum)
 771 +{
 772 +    uint32_t    intFlags;
 773 +
 774 +    ASSERT_COND(p_FmHc);
 775 +
 776 +    intFlags = FmPcdLock(p_FmHc->h_FmPcd);
 777 +
 778 +    if (p_FmHc->nextSeqNumLocation == HC_CMD_POOL_SIZE)
 779 +    {
 780 +        /* No more buffers */
 781 +        FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
 782 +        return NULL;
 783 +    }
 784 +
 785 +    *p_SeqNum = p_FmHc->seqNum[p_FmHc->nextSeqNumLocation];
 786 +    p_FmHc->nextSeqNumLocation++;
 787 +
 788 +    FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
 789 +    return p_FmHc->p_Frm[*p_SeqNum];
 790 +}
 791 +
 792 +static __inline__ void PutBuf(t_FmHc *p_FmHc, t_HcFrame *p_Buf, uint32_t seqNum)
 793 +{
 794 +    uint32_t    intFlags;
 795 +
 796 +    UNUSED(p_Buf);
 797 +
 798 +    intFlags = FmPcdLock(p_FmHc->h_FmPcd);
 799 +    ASSERT_COND(p_FmHc->nextSeqNumLocation);
 800 +    p_FmHc->nextSeqNumLocation--;
 801 +    p_FmHc->seqNum[p_FmHc->nextSeqNumLocation] = seqNum;
 802 +    FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
 803 +}
 804 +
 805 +static __inline__ t_Error EnQFrm(t_FmHc *p_FmHc, t_DpaaFD *p_FmFd, uint32_t seqNum)
 806 +{
 807 +    t_Error     err = E_OK;
 808 +    uint32_t    intFlags;
 809 +    uint32_t    timeout=100;
 810 +
 811 +    intFlags = FmPcdLock(p_FmHc->h_FmPcd);
 812 +    ASSERT_COND(!p_FmHc->enqueued[seqNum]);
 813 +    p_FmHc->enqueued[seqNum] = TRUE;
 814 +    FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
 815 +    DBG(TRACE, ("Send Hc, SeqNum %d, buff@0x%x, fd offset 0x%x",
 816 +                seqNum,
 817 +                DPAA_FD_GET_ADDR(p_FmFd),
 818 +                DPAA_FD_GET_OFFSET(p_FmFd)));
 819 +    err = p_FmHc->f_QmEnqueue(p_FmHc->h_QmArg, (void *)p_FmFd);
 820 +    if (err)
 821 +        RETURN_ERROR(MINOR, err, ("HC enqueue failed"));
 822 +
 823 +    while (p_FmHc->enqueued[seqNum] && --timeout)
 824 +        XX_UDelay(100);
 825 +
 826 +    if (!timeout)
 827 +        RETURN_ERROR(MINOR, E_TIMEOUT, ("HC Callback, timeout exceeded"));
 828 +
 829 +    return err;
 830 +}
 831 +
 832 +
 833 +t_Handle FmHcConfigAndInit(t_FmHcParams *p_FmHcParams)
 834 +{
 835 +    t_FmHc          *p_FmHc;
 836 +    t_FmPortParams  fmPortParam;
 837 +    t_Error         err;
 838 +
 839 +    p_FmHc = (t_FmHc *)XX_Malloc(sizeof(t_FmHc));
 840 +    if (!p_FmHc)
 841 +    {
 842 +        REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC obj"));
 843 +        return NULL;
 844 +    }
 845 +    memset(p_FmHc,0,sizeof(t_FmHc));
 846 +
 847 +    p_FmHc->h_FmPcd             = p_FmHcParams->h_FmPcd;
 848 +    p_FmHc->f_QmEnqueue         = p_FmHcParams->params.f_QmEnqueue;
 849 +    p_FmHc->h_QmArg             = p_FmHcParams->params.h_QmArg;
 850 +    p_FmHc->dataMemId           = DEFAULT_dataMemId;
 851 +
 852 +    err = FillBufPool(p_FmHc);
 853 +    if (err != E_OK)
 854 +    {
 855 +        REPORT_ERROR(MAJOR, err, NO_MSG);
 856 +        FmHcFree(p_FmHc);
 857 +        return NULL;
 858 +    }
 859 +
 860 +    if (!FmIsMaster(p_FmHcParams->h_Fm))
 861 +        return (t_Handle)p_FmHc;
 862 +
 863 +    memset(&fmPortParam, 0, sizeof(fmPortParam));
 864 +    fmPortParam.baseAddr    = p_FmHcParams->params.portBaseAddr;
 865 +    fmPortParam.portType    = e_FM_PORT_TYPE_OH_HOST_COMMAND;
 866 +    fmPortParam.portId      = p_FmHcParams->params.portId;
 867 +    fmPortParam.liodnBase   = p_FmHcParams->params.liodnBase;
 868 +    fmPortParam.h_Fm        = p_FmHcParams->h_Fm;
 869 +
 870 +    fmPortParam.specificParams.nonRxParams.errFqid      = p_FmHcParams->params.errFqid;
 871 +    fmPortParam.specificParams.nonRxParams.dfltFqid     = p_FmHcParams->params.confFqid;
 872 +    fmPortParam.specificParams.nonRxParams.qmChannel    = p_FmHcParams->params.qmChannel;
 873 +
 874 +    p_FmHc->h_HcPortDev = FM_PORT_Config(&fmPortParam);
 875 +    if (!p_FmHc->h_HcPortDev)
 876 +    {
 877 +        REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("FM HC port!"));
 878 +        XX_Free(p_FmHc);
 879 +        return NULL;
 880 +    }
 881 +
 882 +    err = FM_PORT_ConfigMaxFrameLength(p_FmHc->h_HcPortDev,
 883 +                                       (uint16_t)sizeof(t_HcFrame));
 884 +
 885 +    if (err != E_OK)
 886 +    {
 887 +        REPORT_ERROR(MAJOR, err, ("FM HC port init!"));
 888 +        FmHcFree(p_FmHc);
 889 +        return NULL;
 890 +    }
 891 +
 892 +    /* final init */
 893 +    err = FM_PORT_Init(p_FmHc->h_HcPortDev);
 894 +    if (err != E_OK)
 895 +    {
 896 +        REPORT_ERROR(MAJOR, err, ("FM HC port init!"));
 897 +        FmHcFree(p_FmHc);
 898 +        return NULL;
 899 +    }
 900 +
 901 +    err = FM_PORT_Enable(p_FmHc->h_HcPortDev);
 902 +    if (err != E_OK)
 903 +    {
 904 +        REPORT_ERROR(MAJOR, err, ("FM HC port enable!"));
 905 +        FmHcFree(p_FmHc);
 906 +        return NULL;
 907 +    }
 908 +
 909 +    return (t_Handle)p_FmHc;
 910 +}
 911 +
 912 +void FmHcFree(t_Handle h_FmHc)
 913 +{
 914 +    t_FmHc  *p_FmHc = (t_FmHc*)h_FmHc;
 915 +    int     i;
 916 +
 917 +    if (!p_FmHc)
 918 +        return;
 919 +
 920 +    for (i=0; i<HC_CMD_POOL_SIZE; i++)
 921 +        if (p_FmHc->p_Frm[i])
 922 +            XX_FreeSmart(p_FmHc->p_Frm[i]);
 923 +        else
 924 +            break;
 925 +
 926 +    if (p_FmHc->h_HcPortDev)
 927 +        FM_PORT_Free(p_FmHc->h_HcPortDev);
 928 +
 929 +    XX_Free(p_FmHc);
 930 +}
 931 +
 932 +/*****************************************************************************/
 933 +t_Error FmHcSetFramesDataMemory(t_Handle h_FmHc,
 934 +                                uint8_t  memId)
 935 +{
 936 +    t_FmHc  *p_FmHc = (t_FmHc*)h_FmHc;
 937 +    int     i;
 938 +
 939 +    SANITY_CHECK_RETURN_ERROR(p_FmHc, E_INVALID_HANDLE);
 940 +
 941 +    p_FmHc->dataMemId            = memId;
 942 +
 943 +    for (i=0; i<HC_CMD_POOL_SIZE; i++)
 944 +        if (p_FmHc->p_Frm[i])
 945 +            XX_FreeSmart(p_FmHc->p_Frm[i]);
 946 +
 947 +    return FillBufPool(p_FmHc);
 948 +}
 949 +
 950 +void FmHcTxConf(t_Handle h_FmHc, t_DpaaFD *p_Fd)
 951 +{
 952 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
 953 +    t_HcFrame   *p_HcFrame;
 954 +    uint32_t    intFlags;
 955 +
 956 +    ASSERT_COND(p_FmHc);
 957 +
 958 +    intFlags = FmPcdLock(p_FmHc->h_FmPcd);
 959 +    p_HcFrame  = (t_HcFrame *)PTR_MOVE(DPAA_FD_GET_ADDR(p_Fd), DPAA_FD_GET_OFFSET(p_Fd));
 960 +
 961 +    DBG(TRACE, ("Hc Conf, SeqNum %d, FD@0x%x, fd offset 0x%x",
 962 +                p_HcFrame->commandSequence, DPAA_FD_GET_ADDR(p_Fd), DPAA_FD_GET_OFFSET(p_Fd)));
 963 +
 964 +    if (!(p_FmHc->enqueued[p_HcFrame->commandSequence]))
 965 +        REPORT_ERROR(MINOR, E_INVALID_FRAME, ("Not an Host-Command frame received!"));
 966 +    else
 967 +        p_FmHc->enqueued[p_HcFrame->commandSequence] = FALSE;
 968 +    FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
 969 +}
 970 +
 971 +t_Error FmHcPcdKgSetScheme(t_Handle                    h_FmHc,
 972 +                           t_Handle                    h_Scheme,
 973 +                           struct fman_kg_scheme_regs  *p_SchemeRegs,
 974 +                           bool                        updateCounter)
 975 +{
 976 +    t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
 977 +    t_Error                             err = E_OK;
 978 +    t_HcFrame                           *p_HcFrame;
 979 +    t_DpaaFD                            fmFd;
 980 +    uint8_t                             physicalSchemeId;
 981 +    uint32_t                            seqNum;
 982 +
 983 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
 984 +    if (!p_HcFrame)
 985 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
 986 +
 987 +    physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
 988 +
 989 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
 990 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
 991 +    p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, updateCounter);
 992 +    p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
 993 +    memcpy(&p_HcFrame->hcSpecificData.schemeRegs, p_SchemeRegs, sizeof(struct fman_kg_scheme_regs));
 994 +    if (!updateCounter)
 995 +    {
 996 +        p_HcFrame->hcSpecificData.schemeRegs.kgse_dv0   = p_SchemeRegs->kgse_dv0;
 997 +        p_HcFrame->hcSpecificData.schemeRegs.kgse_dv1   = p_SchemeRegs->kgse_dv1;
 998 +        p_HcFrame->hcSpecificData.schemeRegs.kgse_ccbs  = p_SchemeRegs->kgse_ccbs;
 999 +        p_HcFrame->hcSpecificData.schemeRegs.kgse_mv    = p_SchemeRegs->kgse_mv;
1000 +    }
1001 +    p_HcFrame->commandSequence = seqNum;
1002 +
1003 +    BUILD_FD(sizeof(t_HcFrame));
1004 +
1005 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1006 +
1007 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1008 +
1009 +    if (err != E_OK)
1010 +        RETURN_ERROR(MINOR, err, NO_MSG);
1011 +
1012 +    return E_OK;
1013 +}
1014 +
1015 +t_Error FmHcPcdKgDeleteScheme(t_Handle h_FmHc, t_Handle h_Scheme)
1016 +{
1017 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1018 +    t_Error     err = E_OK;
1019 +    t_HcFrame   *p_HcFrame;
1020 +    t_DpaaFD    fmFd;
1021 +    uint8_t     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
1022 +    uint32_t    seqNum;
1023 +
1024 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1025 +    if (!p_HcFrame)
1026 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1027 +
1028 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1029 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1030 +    p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
1031 +    p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1032 +    memset(&p_HcFrame->hcSpecificData.schemeRegs, 0, sizeof(struct fman_kg_scheme_regs));
1033 +    p_HcFrame->commandSequence = seqNum;
1034 +
1035 +    BUILD_FD(sizeof(t_HcFrame));
1036 +
1037 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1038 +
1039 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1040 +
1041 +    if (err != E_OK)
1042 +        RETURN_ERROR(MINOR, err, NO_MSG);
1043 +
1044 +    return E_OK;
1045 +}
1046 +
1047 +t_Error FmHcPcdKgCcGetSetParams(t_Handle h_FmHc, t_Handle  h_Scheme, uint32_t requiredAction, uint32_t value)
1048 +{
1049 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1050 +    t_Error     err = E_OK;
1051 +    t_HcFrame   *p_HcFrame;
1052 +    t_DpaaFD    fmFd;
1053 +    uint8_t     relativeSchemeId;
1054 +    uint8_t     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
1055 +    uint32_t    tmpReg32 = 0;
1056 +    uint32_t    seqNum;
1057 +
1058 +    /* Scheme is locked by calling routine */
1059 +    /* WARNING - this lock will not be efficient if other HC routine will attempt to change
1060 +     * "kgse_mode" or "kgse_om" without locking scheme !
1061 +     */
1062 +
1063 +    relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
1064 +    if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
1065 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
1066 +
1067 +    if (!FmPcdKgGetRequiredActionFlag(p_FmHc->h_FmPcd, relativeSchemeId) ||
1068 +       !(FmPcdKgGetRequiredAction(p_FmHc->h_FmPcd, relativeSchemeId) & requiredAction))
1069 +    {
1070 +        if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA) &&
1071 +            (FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_PLCR))
1072 +            {
1073 +                if ((FmPcdKgIsDirectPlcr(p_FmHc->h_FmPcd, relativeSchemeId) == FALSE) ||
1074 +                    (FmPcdKgIsDistrOnPlcrProfile(p_FmHc->h_FmPcd, relativeSchemeId) == TRUE))
1075 +                    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("In this situation PP can not be with distribution and has to be shared"));
1076 +                err = FmPcdPlcrCcGetSetParams(p_FmHc->h_FmPcd, FmPcdKgGetRelativeProfileId(p_FmHc->h_FmPcd, relativeSchemeId), requiredAction);
1077 +                if (err)
1078 +                    RETURN_ERROR(MAJOR, err, NO_MSG);
1079 +            }
1080 +        else /* From here we deal with KG-Schemes only */
1081 +        {
1082 +            /* Pre change general code */
1083 +            p_HcFrame = GetBuf(p_FmHc, &seqNum);
1084 +            if (!p_HcFrame)
1085 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1086 +            memset(p_HcFrame, 0, sizeof(t_HcFrame));
1087 +            p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1088 +            p_HcFrame->actionReg  = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
1089 +            p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1090 +            p_HcFrame->commandSequence = seqNum;
1091 +            BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
1092 +            if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1093 +            {
1094 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1095 +                RETURN_ERROR(MINOR, err, NO_MSG);
1096 +            }
1097 +
1098 +            /* specific change */
1099 +            if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA) &&
1100 +                ((FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_DONE) &&
1101 +                 (FmPcdKgGetDoneAction(p_FmHc->h_FmPcd, relativeSchemeId) ==  e_FM_PCD_ENQ_FRAME)))
1102 +            {
1103 +                tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
1104 +                ASSERT_COND(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME));
1105 +                p_HcFrame->hcSpecificData.schemeRegs.kgse_mode =  tmpReg32 | NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
1106 +            }
1107 +
1108 +            if ((requiredAction & UPDATE_KG_NIA_CC_WA) &&
1109 +                (FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_CC))
1110 +            {
1111 +                tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
1112 +                ASSERT_COND(tmpReg32 & (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
1113 +                tmpReg32 &= ~NIA_FM_CTL_AC_CC;
1114 +                p_HcFrame->hcSpecificData.schemeRegs.kgse_mode =  tmpReg32 | NIA_FM_CTL_AC_PRE_CC;
1115 +            }
1116 +
1117 +            if (requiredAction & UPDATE_KG_OPT_MODE)
1118 +                p_HcFrame->hcSpecificData.schemeRegs.kgse_om = value;
1119 +
1120 +            if (requiredAction & UPDATE_KG_NIA)
1121 +            {
1122 +                tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
1123 +                tmpReg32 &= ~(NIA_ENG_MASK | NIA_AC_MASK);
1124 +                tmpReg32 |= value;
1125 +                p_HcFrame->hcSpecificData.schemeRegs.kgse_mode = tmpReg32;
1126 +            }
1127 +
1128 +            /* Post change general code */
1129 +            p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1130 +            p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
1131 +            p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1132 +
1133 +            BUILD_FD(sizeof(t_HcFrame));
1134 +            err = EnQFrm(p_FmHc, &fmFd, seqNum);
1135 +
1136 +            PutBuf(p_FmHc, p_HcFrame, seqNum);
1137 +
1138 +            if (err != E_OK)
1139 +                RETURN_ERROR(MINOR, err, NO_MSG);
1140 +        }
1141 +    }
1142 +
1143 +    return E_OK;
1144 +}
1145 +
1146 +uint32_t  FmHcPcdKgGetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme)
1147 +{
1148 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1149 +    t_Error     err;
1150 +    t_HcFrame   *p_HcFrame;
1151 +    t_DpaaFD    fmFd;
1152 +    uint32_t    retVal;
1153 +    uint8_t     relativeSchemeId;
1154 +    uint8_t     physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
1155 +    uint32_t    seqNum;
1156 +
1157 +    relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
1158 +    if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
1159 +    {
1160 +        REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
1161 +        return 0;
1162 +    }
1163 +
1164 +    /* first read scheme and check that it is valid */
1165 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1166 +    if (!p_HcFrame)
1167 +    {
1168 +        REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1169 +        return 0;
1170 +    }
1171 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1172 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1173 +    p_HcFrame->actionReg  = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
1174 +    p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1175 +    p_HcFrame->commandSequence = seqNum;
1176 +
1177 +    BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
1178 +
1179 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1180 +    if (err != E_OK)
1181 +    {
1182 +        PutBuf(p_FmHc, p_HcFrame, seqNum);
1183 +        REPORT_ERROR(MINOR, err, NO_MSG);
1184 +        return 0;
1185 +    }
1186 +
1187 +    if (!FmPcdKgHwSchemeIsValid(p_HcFrame->hcSpecificData.schemeRegs.kgse_mode))
1188 +    {
1189 +        PutBuf(p_FmHc, p_HcFrame, seqNum);
1190 +        REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is invalid"));
1191 +        return 0;
1192 +    }
1193 +
1194 +    retVal = p_HcFrame->hcSpecificData.schemeRegs.kgse_spc;
1195 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1196 +
1197 +    return retVal;
1198 +}
1199 +
1200 +t_Error  FmHcPcdKgSetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t value)
1201 +{
1202 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1203 +    t_Error     err = E_OK;
1204 +    t_HcFrame   *p_HcFrame;
1205 +    t_DpaaFD    fmFd;
1206 +    uint8_t     relativeSchemeId, physicalSchemeId;
1207 +    uint32_t    seqNum;
1208 +
1209 +    physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
1210 +    relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
1211 +    if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
1212 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
1213 +
1214 +    /* first read scheme and check that it is valid */
1215 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1216 +    if (!p_HcFrame)
1217 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1218 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1219 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1220 +    p_HcFrame->actionReg  = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
1221 +    p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_COUNTER;
1222 +    /* write counter */
1223 +    p_HcFrame->hcSpecificData.singleRegForWrite = value;
1224 +    p_HcFrame->commandSequence = seqNum;
1225 +
1226 +    BUILD_FD(sizeof(t_HcFrame));
1227 +
1228 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1229 +
1230 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1231 +    return err;
1232 +}
1233 +
1234 +t_Error FmHcPcdKgSetClsPlan(t_Handle h_FmHc, t_FmPcdKgInterModuleClsPlanSet *p_Set)
1235 +{
1236 +    t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
1237 +    t_HcFrame               *p_HcFrame;
1238 +    t_DpaaFD                fmFd;
1239 +    uint8_t                 i, idx;
1240 +    uint32_t                seqNum;
1241 +    t_Error                 err = E_OK;
1242 +
1243 +    ASSERT_COND(p_FmHc);
1244 +
1245 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1246 +    if (!p_HcFrame)
1247 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1248 +
1249 +    for (i = p_Set->baseEntry; i < (p_Set->baseEntry+p_Set->numOfClsPlanEntries); i+=8)
1250 +    {
1251 +        memset(p_HcFrame, 0, sizeof(t_HcFrame));
1252 +        p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1253 +        p_HcFrame->actionReg  = FmPcdKgBuildWriteClsPlanBlockActionReg((uint8_t)(i / CLS_PLAN_NUM_PER_GRP));
1254 +        p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1255 +
1256 +        idx = (uint8_t)(i - p_Set->baseEntry);
1257 +        ASSERT_COND(idx < FM_PCD_MAX_NUM_OF_CLS_PLANS);
1258 +        memcpy(&p_HcFrame->hcSpecificData.clsPlanEntries, &p_Set->vectors[idx], CLS_PLAN_NUM_PER_GRP*sizeof(uint32_t));
1259 +        p_HcFrame->commandSequence = seqNum;
1260 +
1261 +        BUILD_FD(sizeof(t_HcFrame));
1262 +
1263 +        if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1264 +        {
1265 +            PutBuf(p_FmHc, p_HcFrame, seqNum);
1266 +            RETURN_ERROR(MINOR, err, NO_MSG);
1267 +        }
1268 +    }
1269 +
1270 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1271 +    return err;
1272 +}
1273 +
1274 +t_Error FmHcPcdKgDeleteClsPlan(t_Handle h_FmHc, uint8_t  grpId)
1275 +{
1276 +    t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
1277 +    t_FmPcdKgInterModuleClsPlanSet      *p_ClsPlanSet;
1278 +
1279 +    p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
1280 +    if (!p_ClsPlanSet)
1281 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
1282 +
1283 +    memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
1284 +
1285 +    p_ClsPlanSet->baseEntry = FmPcdKgGetClsPlanGrpBase(p_FmHc->h_FmPcd, grpId);
1286 +    p_ClsPlanSet->numOfClsPlanEntries = FmPcdKgGetClsPlanGrpSize(p_FmHc->h_FmPcd, grpId);
1287 +    ASSERT_COND(p_ClsPlanSet->numOfClsPlanEntries <= FM_PCD_MAX_NUM_OF_CLS_PLANS);
1288 +
1289 +    if (FmHcPcdKgSetClsPlan(p_FmHc, p_ClsPlanSet) != E_OK)
1290 +    {
1291 +        XX_Free(p_ClsPlanSet);
1292 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
1293 +    }
1294 +
1295 +    XX_Free(p_ClsPlanSet);
1296 +    FmPcdKgDestroyClsPlanGrp(p_FmHc->h_FmPcd, grpId);
1297 +
1298 +    return E_OK;
1299 +}
1300 +
1301 +t_Error FmHcPcdCcCapwapTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcCapwapReassmTimeoutParams *p_CcCapwapReassmTimeoutParams )
1302 +{
1303 +    t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
1304 +    t_HcFrame                           *p_HcFrame;
1305 +    t_DpaaFD                            fmFd;
1306 +    t_Error                             err;
1307 +    uint32_t                            seqNum;
1308 +
1309 +    SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
1310 +
1311 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1312 +    if (!p_HcFrame)
1313 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1314 +
1315 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1316 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_CAPWAP_REASSM_TIMEOUT);
1317 +    memcpy(&p_HcFrame->hcSpecificData.ccCapwapReassmTimeout, p_CcCapwapReassmTimeoutParams, sizeof(t_FmPcdCcCapwapReassmTimeoutParams));
1318 +    p_HcFrame->commandSequence = seqNum;
1319 +    BUILD_FD(sizeof(t_HcFrame));
1320 +
1321 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1322 +
1323 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1324 +    return err;
1325 +}
1326 +
1327 +t_Error FmHcPcdCcIpFragScratchPollCmd(t_Handle h_FmHc, bool fill, t_FmPcdCcFragScratchPoolCmdParams *p_FmPcdCcFragScratchPoolCmdParams)
1328 +{
1329 +    t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
1330 +    t_HcFrame                           *p_HcFrame;
1331 +    t_DpaaFD                            fmFd;
1332 +    t_Error                             err;
1333 +    uint32_t                            seqNum;
1334 +
1335 +    SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
1336 +
1337 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1338 +    if (!p_HcFrame)
1339 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1340 +
1341 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1342 +
1343 +    p_HcFrame->opcode     = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_IP_FRAG_INITIALIZATION);
1344 +    p_HcFrame->actionReg  = (uint32_t)(((fill == TRUE) ? 0 : 1) << HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_CMD_SHIFT);
1345 +    p_HcFrame->actionReg |= p_FmPcdCcFragScratchPoolCmdParams->bufferPoolId << HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_BPID;
1346 +    if (fill == TRUE)
1347 +    {
1348 +        p_HcFrame->extraReg   = p_FmPcdCcFragScratchPoolCmdParams->numOfBuffers;
1349 +    }
1350 +    p_HcFrame->commandSequence = seqNum;
1351 +
1352 +    BUILD_FD(sizeof(t_HcFrame));
1353 +    if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1354 +    {
1355 +        PutBuf(p_FmHc, p_HcFrame, seqNum);
1356 +        RETURN_ERROR(MINOR, err, NO_MSG);
1357 +    }
1358 +
1359 +    p_FmPcdCcFragScratchPoolCmdParams->numOfBuffers = p_HcFrame->extraReg;
1360 +
1361 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1362 +    return E_OK;
1363 +}
1364 +
1365 +t_Error FmHcPcdCcTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcReassmTimeoutParams *p_CcReassmTimeoutParams, uint8_t *p_Result)
1366 +{
1367 +    t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
1368 +    t_HcFrame                           *p_HcFrame;
1369 +    t_DpaaFD                            fmFd;
1370 +    t_Error                             err;
1371 +    uint32_t                            seqNum;
1372 +
1373 +    SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
1374 +
1375 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1376 +    if (!p_HcFrame)
1377 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1378 +
1379 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1380 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_REASSM_TIMEOUT);
1381 +    p_HcFrame->actionReg = (uint32_t)((p_CcReassmTimeoutParams->activate ? 0 : 1) << HC_HCOR_ACTION_REG_REASSM_TIMEOUT_ACTIVE_SHIFT);
1382 +    p_HcFrame->extraReg = (p_CcReassmTimeoutParams->tsbs << HC_HCOR_EXTRA_REG_REASSM_TIMEOUT_TSBS_SHIFT) | p_CcReassmTimeoutParams->iprcpt;
1383 +    p_HcFrame->commandSequence = seqNum;
1384 +
1385 +    BUILD_FD(sizeof(t_HcFrame));
1386 +    if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1387 +    {
1388 +        PutBuf(p_FmHc, p_HcFrame, seqNum);
1389 +        RETURN_ERROR(MINOR, err, NO_MSG);
1390 +    }
1391 +
1392 +    *p_Result = (uint8_t)
1393 +        ((p_HcFrame->actionReg >> HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_SHIFT) & HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_MASK);
1394 +
1395 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1396 +    return E_OK;
1397 +}
1398 +
1399 +t_Error FmHcPcdPlcrCcGetSetParams(t_Handle h_FmHc,uint16_t absoluteProfileId, uint32_t requiredAction)
1400 +{
1401 +    t_FmHc              *p_FmHc = (t_FmHc*)h_FmHc;
1402 +    t_HcFrame           *p_HcFrame;
1403 +    t_DpaaFD            fmFd;
1404 +    t_Error             err;
1405 +    uint32_t            tmpReg32 = 0;
1406 +    uint32_t            requiredActionTmp, requiredActionFlag;
1407 +    uint32_t            seqNum;
1408 +
1409 +    SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
1410 +
1411 +    /* Profile is locked by calling routine */
1412 +    /* WARNING - this lock will not be efficient if other HC routine will attempt to change
1413 +     * "fmpl_pegnia" "fmpl_peynia" or "fmpl_pernia" without locking Profile !
1414 +     */
1415 +
1416 +    requiredActionTmp = FmPcdPlcrGetRequiredAction(p_FmHc->h_FmPcd, absoluteProfileId);
1417 +    requiredActionFlag = FmPcdPlcrGetRequiredActionFlag(p_FmHc->h_FmPcd, absoluteProfileId);
1418 +
1419 +    if (!requiredActionFlag || !(requiredActionTmp & requiredAction))
1420 +    {
1421 +        if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
1422 +        {
1423 +            p_HcFrame = GetBuf(p_FmHc, &seqNum);
1424 +            if (!p_HcFrame)
1425 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1426 +            /* first read scheme and check that it is valid */
1427 +            memset(p_HcFrame, 0, sizeof(t_HcFrame));
1428 +            p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1429 +            p_HcFrame->actionReg  = FmPcdPlcrBuildReadPlcrActionReg(absoluteProfileId);
1430 +            p_HcFrame->extraReg = 0x00008000;
1431 +            p_HcFrame->commandSequence = seqNum;
1432 +
1433 +            BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
1434 +
1435 +            if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1436 +            {
1437 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1438 +                RETURN_ERROR(MINOR, err, NO_MSG);
1439 +            }
1440 +
1441 +            tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_pegnia;
1442 +            if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
1443 +            {
1444 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1445 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,
1446 +                             ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
1447 +            }
1448 +
1449 +            tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
1450 +
1451 +            p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1452 +            p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
1453 +            p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(TRUE, FALSE, FALSE);
1454 +            p_HcFrame->extraReg = 0x00008000;
1455 +            p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
1456 +
1457 +            BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
1458 +
1459 +            if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1460 +            {
1461 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1462 +                RETURN_ERROR(MINOR, err, NO_MSG);
1463 +            }
1464 +
1465 +            tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_peynia;
1466 +            if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
1467 +            {
1468 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1469 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
1470 +            }
1471 +
1472 +            tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
1473 +
1474 +            p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1475 +            p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
1476 +            p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(FALSE, TRUE, FALSE);
1477 +            p_HcFrame->extraReg = 0x00008000;
1478 +            p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
1479 +
1480 +            BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
1481 +
1482 +            if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1483 +            {
1484 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1485 +                RETURN_ERROR(MINOR, err, NO_MSG);
1486 +            }
1487 +
1488 +            tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_pernia;
1489 +            if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
1490 +            {
1491 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1492 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
1493 +            }
1494 +
1495 +            tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
1496 +
1497 +            p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1498 +            p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
1499 +            p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(FALSE, FALSE, TRUE);
1500 +            p_HcFrame->extraReg = 0x00008000;
1501 +            p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
1502 +
1503 +            BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
1504 +
1505 +            if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1506 +            {
1507 +                PutBuf(p_FmHc, p_HcFrame, seqNum);
1508 +                RETURN_ERROR(MINOR, err, NO_MSG);
1509 +            }
1510 +
1511 +            PutBuf(p_FmHc, p_HcFrame, seqNum);
1512 +        }
1513 +    }
1514 +
1515 +    return E_OK;
1516 +}
1517 +
1518 +t_Error FmHcPcdPlcrSetProfile(t_Handle h_FmHc, t_Handle h_Profile, t_FmPcdPlcrProfileRegs *p_PlcrRegs)
1519 +{
1520 +    t_FmHc                              *p_FmHc = (t_FmHc*)h_FmHc;
1521 +    t_Error                             err = E_OK;
1522 +    uint16_t                            profileIndx;
1523 +    t_HcFrame                           *p_HcFrame;
1524 +    t_DpaaFD                            fmFd;
1525 +    uint32_t                            seqNum;
1526 +
1527 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1528 +    if (!p_HcFrame)
1529 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1530 +
1531 +    profileIndx = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
1532 +
1533 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1534 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1535 +    p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionRegs(profileIndx);
1536 +    p_HcFrame->extraReg = 0x00008000;
1537 +    memcpy(&p_HcFrame->hcSpecificData.profileRegs, p_PlcrRegs, sizeof(t_FmPcdPlcrProfileRegs));
1538 +    p_HcFrame->commandSequence = seqNum;
1539 +
1540 +    BUILD_FD(sizeof(t_HcFrame));
1541 +
1542 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1543 +
1544 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1545 +
1546 +    if (err != E_OK)
1547 +        RETURN_ERROR(MINOR, err, NO_MSG);
1548 +
1549 +    return E_OK;
1550 +}
1551 +
1552 +t_Error FmHcPcdPlcrDeleteProfile(t_Handle h_FmHc, t_Handle h_Profile)
1553 +{
1554 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1555 +    uint16_t    absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
1556 +    t_Error     err = E_OK;
1557 +    t_HcFrame   *p_HcFrame;
1558 +    t_DpaaFD    fmFd;
1559 +    uint32_t    seqNum;
1560 +
1561 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1562 +    if (!p_HcFrame)
1563 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1564 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1565 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1566 +    p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
1567 +    p_HcFrame->actionReg  |= 0x00008000;
1568 +    p_HcFrame->extraReg = 0x00008000;
1569 +    memset(&p_HcFrame->hcSpecificData.profileRegs, 0, sizeof(t_FmPcdPlcrProfileRegs));
1570 +    p_HcFrame->commandSequence = seqNum;
1571 +
1572 +    BUILD_FD(sizeof(t_HcFrame));
1573 +
1574 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1575 +
1576 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1577 +
1578 +    if (err != E_OK)
1579 +        RETURN_ERROR(MINOR, err, NO_MSG);
1580 +
1581 +    return E_OK;
1582 +}
1583 +
1584 +t_Error  FmHcPcdPlcrSetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value)
1585 +{
1586 +
1587 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1588 +    uint16_t    absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
1589 +    t_Error     err = E_OK;
1590 +    t_HcFrame   *p_HcFrame;
1591 +    t_DpaaFD    fmFd;
1592 +    uint32_t    seqNum;
1593 +
1594 +    /* first read scheme and check that it is valid */
1595 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1596 +    if (!p_HcFrame)
1597 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1598 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1599 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1600 +    p_HcFrame->actionReg  = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
1601 +    p_HcFrame->actionReg |= FmPcdPlcrBuildCounterProfileReg(counter);
1602 +    p_HcFrame->extraReg = 0x00008000;
1603 +    p_HcFrame->hcSpecificData.singleRegForWrite = value;
1604 +    p_HcFrame->commandSequence = seqNum;
1605 +
1606 +    BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
1607 +
1608 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1609 +
1610 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1611 +
1612 +    if (err != E_OK)
1613 +        RETURN_ERROR(MINOR, err, NO_MSG);
1614 +
1615 +    return E_OK;
1616 +}
1617 +
1618 +uint32_t FmHcPcdPlcrGetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter)
1619 +{
1620 +    t_FmHc      *p_FmHc = (t_FmHc*)h_FmHc;
1621 +    uint16_t    absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
1622 +    t_Error     err;
1623 +    t_HcFrame   *p_HcFrame;
1624 +    t_DpaaFD    fmFd;
1625 +    uint32_t    retVal = 0;
1626 +    uint32_t    seqNum;
1627 +
1628 +    SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
1629 +
1630 +    /* first read scheme and check that it is valid */
1631 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1632 +    if (!p_HcFrame)
1633 +    {
1634 +        REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1635 +        return 0;
1636 +    }
1637 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1638 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
1639 +    p_HcFrame->actionReg  = FmPcdPlcrBuildReadPlcrActionReg(absoluteProfileId);
1640 +    p_HcFrame->extraReg = 0x00008000;
1641 +    p_HcFrame->commandSequence = seqNum;
1642 +
1643 +    BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
1644 +
1645 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1646 +    if (err != E_OK)
1647 +    {
1648 +        PutBuf(p_FmHc, p_HcFrame, seqNum);
1649 +        REPORT_ERROR(MINOR, err, NO_MSG);
1650 +        return 0;
1651 +    }
1652 +
1653 +    switch (counter)
1654 +    {
1655 +        case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
1656 +            retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_pegpc;
1657 +            break;
1658 +        case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
1659 +            retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_peypc;
1660 +            break;
1661 +        case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
1662 +            retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perpc;
1663 +            break;
1664 +        case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
1665 +            retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perypc;
1666 +            break;
1667 +        case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
1668 +            retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perrpc;
1669 +            break;
1670 +        default:
1671 +            REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
1672 +    }
1673 +
1674 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1675 +    return retVal;
1676 +}
1677 +
1678 +t_Error FmHcKgWriteSp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t spReg, bool add)
1679 +{
1680 +    t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
1681 +    t_HcFrame               *p_HcFrame;
1682 +    t_DpaaFD                fmFd;
1683 +    t_Error                 err = E_OK;
1684 +    uint32_t                seqNum;
1685 +
1686 +    ASSERT_COND(p_FmHc);
1687 +
1688 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1689 +    if (!p_HcFrame)
1690 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1691 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1692 +    /* first read SP register */
1693 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1694 +    p_HcFrame->actionReg  = FmPcdKgBuildReadPortSchemeBindActionReg(hardwarePortId);
1695 +    p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1696 +    p_HcFrame->commandSequence = seqNum;
1697 +
1698 +    BUILD_FD(SIZE_OF_HC_FRAME_PORT_REGS);
1699 +
1700 +    if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
1701 +    {
1702 +        PutBuf(p_FmHc, p_HcFrame, seqNum);
1703 +        RETURN_ERROR(MINOR, err, NO_MSG);
1704 +    }
1705 +
1706 +    /* spReg is the first reg, so we can use it both for read and for write */
1707 +    if (add)
1708 +        p_HcFrame->hcSpecificData.portRegsForRead.spReg |= spReg;
1709 +    else
1710 +        p_HcFrame->hcSpecificData.portRegsForRead.spReg &= ~spReg;
1711 +
1712 +    p_HcFrame->actionReg  = FmPcdKgBuildWritePortSchemeBindActionReg(hardwarePortId);
1713 +
1714 +    BUILD_FD(sizeof(t_HcFrame));
1715 +
1716 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1717 +
1718 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1719 +
1720 +    if (err != E_OK)
1721 +        RETURN_ERROR(MINOR, err, NO_MSG);
1722 +
1723 +    return E_OK;
1724 +}
1725 +
1726 +t_Error FmHcKgWriteCpp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t cppReg)
1727 +{
1728 +    t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
1729 +    t_HcFrame               *p_HcFrame;
1730 +    t_DpaaFD                fmFd;
1731 +    t_Error                 err = E_OK;
1732 +    uint32_t                seqNum;
1733 +
1734 +    ASSERT_COND(p_FmHc);
1735 +
1736 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1737 +    if (!p_HcFrame)
1738 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1739 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1740 +    /* first read SP register */
1741 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
1742 +    p_HcFrame->actionReg  = FmPcdKgBuildWritePortClsPlanBindActionReg(hardwarePortId);
1743 +    p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
1744 +    p_HcFrame->hcSpecificData.singleRegForWrite = cppReg;
1745 +    p_HcFrame->commandSequence = seqNum;
1746 +
1747 +    BUILD_FD(sizeof(t_HcFrame));
1748 +
1749 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1750 +
1751 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1752 +
1753 +    if (err != E_OK)
1754 +        RETURN_ERROR(MINOR, err, NO_MSG);
1755 +
1756 +    return E_OK;
1757 +}
1758 +
1759 +t_Error FmHcPcdCcDoDynamicChange(t_Handle h_FmHc, uint32_t oldAdAddrOffset, uint32_t newAdAddrOffset)
1760 +{
1761 +    t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
1762 +    t_HcFrame               *p_HcFrame;
1763 +    t_DpaaFD                fmFd;
1764 +    t_Error                 err = E_OK;
1765 +    uint32_t                seqNum;
1766 +
1767 +    SANITY_CHECK_RETURN_ERROR(p_FmHc, E_INVALID_HANDLE);
1768 +
1769 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1770 +    if (!p_HcFrame)
1771 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1772 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1773 +
1774 +    p_HcFrame->opcode     = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC);
1775 +    p_HcFrame->actionReg  = newAdAddrOffset;
1776 +    p_HcFrame->actionReg |= 0xc0000000;
1777 +    p_HcFrame->extraReg   = oldAdAddrOffset;
1778 +    p_HcFrame->commandSequence = seqNum;
1779 +
1780 +    BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
1781 +
1782 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1783 +
1784 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1785 +
1786 +    if (err != E_OK)
1787 +        RETURN_ERROR(MAJOR, err, NO_MSG);
1788 +
1789 +    return E_OK;
1790 +}
1791 +
1792 +t_Error FmHcPcdSync(t_Handle h_FmHc)
1793 +{
1794 +    t_FmHc                  *p_FmHc = (t_FmHc*)h_FmHc;
1795 +    t_HcFrame               *p_HcFrame;
1796 +    t_DpaaFD                fmFd;
1797 +    t_Error                 err = E_OK;
1798 +    uint32_t                seqNum;
1799 +
1800 +    ASSERT_COND(p_FmHc);
1801 +
1802 +    p_HcFrame = GetBuf(p_FmHc, &seqNum);
1803 +    if (!p_HcFrame)
1804 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
1805 +    memset(p_HcFrame, 0, sizeof(t_HcFrame));
1806 +    /* first read SP register */
1807 +    p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_SYNC);
1808 +    p_HcFrame->actionReg = 0;
1809 +    p_HcFrame->extraReg = 0;
1810 +    p_HcFrame->commandSequence = seqNum;
1811 +
1812 +    BUILD_FD(sizeof(t_HcFrame));
1813 +
1814 +    err = EnQFrm(p_FmHc, &fmFd, seqNum);
1815 +
1816 +    PutBuf(p_FmHc, p_HcFrame, seqNum);
1817 +
1818 +    if (err != E_OK)
1819 +        RETURN_ERROR(MINOR, err, NO_MSG);
1820 +
1821 +    return E_OK;
1822 +}
1823 +
1824 +t_Handle    FmHcGetPort(t_Handle h_FmHc)
1825 +{
1826 +    t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
1827 +    return p_FmHc->h_HcPortDev;
1828 +}
1829 --- /dev/null
1830 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/Makefile
1831 @@ -0,0 +1,28 @@
1832 +#
1833 +# Makefile for the Freescale Ethernet controllers
1834 +#
1835 +ccflags-y           += -DVERSION=\"\"
1836 +#
1837 +#Include netcomm SW specific definitions
1838 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
1839 +
1840 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
1841 +
1842 +ccflags-y += -I$(NCSW_FM_INC)
1843 +
1844 +obj-y          += fsl-ncsw-MAC.o
1845 +
1846 +fsl-ncsw-MAC-objs      :=  dtsec.o dtsec_mii_acc.o fm_mac.o tgec.o tgec_mii_acc.o \
1847 +                           fman_dtsec.o fman_dtsec_mii_acc.o fman_memac.o \
1848 +                           fman_tgec.o fman_crc32.o
1849 +
1850 +ifeq ($(CONFIG_FMAN_V3H),y)
1851 +fsl-ncsw-MAC-objs      +=  memac.o memac_mii_acc.o fman_memac_mii_acc.o
1852 +endif
1853 +ifeq ($(CONFIG_FMAN_V3L),y)
1854 +fsl-ncsw-MAC-objs       +=  memac.o memac_mii_acc.o fman_memac_mii_acc.o
1855 +endif
1856 +ifeq ($(CONFIG_FMAN_ARM),y)
1857 +fsl-ncsw-MAC-objs       +=  memac.o memac_mii_acc.o fman_memac_mii_acc.o
1858 +endif
1859 +
1860 --- /dev/null
1861 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c
1862 @@ -0,0 +1,1464 @@
1863 +/*
1864 + * Copyright 2008-2013 Freescale Semiconductor Inc.
1865 + *
1866 + * Redistribution and use in source and binary forms, with or without
1867 + * modification, are permitted provided that the following conditions are met:
1868 + *     * Redistributions of source code must retain the above copyright
1869 + *       notice, this list of conditions and the following disclaimer.
1870 + *     * Redistributions in binary form must reproduce the above copyright
1871 + *       notice, this list of conditions and the following disclaimer in the
1872 + *       documentation and/or other materials provided with the distribution.
1873 + *     * Neither the name of Freescale Semiconductor nor the
1874 + *       names of its contributors may be used to endorse or promote products
1875 + *       derived from this software without specific prior written permission.
1876 + *
1877 + *
1878 + * ALTERNATIVELY, this software may be distributed under the terms of the
1879 + * GNU General Public License ("GPL") as published by the Free Software
1880 + * Foundation, either version 2 of that License or (at your option) any
1881 + * later version.
1882 + *
1883 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1884 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1885 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1886 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1887 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1888 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1889 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1890 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1891 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1892 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1893 + */
1894 +
1895 +/******************************************************************************
1896 + @File          dtsec.c
1897 +
1898 + @Description   FMan dTSEC driver
1899 +*//***************************************************************************/
1900 +
1901 +#include "std_ext.h"
1902 +#include "error_ext.h"
1903 +#include "string_ext.h"
1904 +#include "xx_ext.h"
1905 +#include "endian_ext.h"
1906 +#include "debug_ext.h"
1907 +#include "crc_mac_addr_ext.h"
1908 +
1909 +#include "fm_common.h"
1910 +#include "dtsec.h"
1911 +#include "fsl_fman_dtsec.h"
1912 +#include "fsl_fman_dtsec_mii_acc.h"
1913 +
1914 +/*****************************************************************************/
1915 +/*                      Internal routines                                    */
1916 +/*****************************************************************************/
1917 +
1918 +static t_Error CheckInitParameters(t_Dtsec *p_Dtsec)
1919 +{
1920 +    if (ENET_SPEED_FROM_MODE(p_Dtsec->enetMode) >= e_ENET_SPEED_10000)
1921 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 1G MAC driver only supports 1G or lower speeds"));
1922 +    if (p_Dtsec->macId >= FM_MAX_NUM_OF_1G_MACS)
1923 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("macId can not be greater than the number of 1G MACs"));
1924 +    if (p_Dtsec->addr == 0)
1925 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC Must have a valid MAC Address"));
1926 +    if ((ENET_SPEED_FROM_MODE(p_Dtsec->enetMode) >= e_ENET_SPEED_1000) &&
1927 +        p_Dtsec->p_DtsecDriverParam->halfdup_on)
1928 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC 1G can't work in half duplex"));
1929 +    if (p_Dtsec->p_DtsecDriverParam->halfdup_on && (p_Dtsec->p_DtsecDriverParam)->loopback)
1930 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("LoopBack is not supported in halfDuplex mode"));
1931 +#ifdef FM_RX_PREAM_4_ERRATA_DTSEC_A001
1932 +    if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev <= 6) /* fixed for rev3 */
1933 +        if (p_Dtsec->p_DtsecDriverParam->rx_preamble)
1934 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("preambleRxEn"));
1935 +#endif /* FM_RX_PREAM_4_ERRATA_DTSEC_A001 */
1936 +    if (((p_Dtsec->p_DtsecDriverParam)->tx_preamble || (p_Dtsec->p_DtsecDriverParam)->rx_preamble) &&( (p_Dtsec->p_DtsecDriverParam)->preamble_len != 0x7))
1937 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Preamble length should be 0x7 bytes"));
1938 +    if ((p_Dtsec->p_DtsecDriverParam)->halfdup_on &&
1939 +       (p_Dtsec->p_DtsecDriverParam->tx_time_stamp_en || p_Dtsec->p_DtsecDriverParam->rx_time_stamp_en))
1940 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dTSEC in half duplex mode has to be with 1588 timeStamping diable"));
1941 +    if ((p_Dtsec->p_DtsecDriverParam)->rx_flow && (p_Dtsec->p_DtsecDriverParam)->rx_ctrl_acc )
1942 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Receive control frame are not passed to the system memory so it can not be accept "));
1943 +    if ((p_Dtsec->p_DtsecDriverParam)->rx_prepend  > MAX_PACKET_ALIGNMENT)
1944 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("packetAlignmentPadding can't be greater than %d ",MAX_PACKET_ALIGNMENT ));
1945 +    if (((p_Dtsec->p_DtsecDriverParam)->non_back_to_back_ipg1  > MAX_INTER_PACKET_GAP) ||
1946 +        ((p_Dtsec->p_DtsecDriverParam)->non_back_to_back_ipg2 > MAX_INTER_PACKET_GAP) ||
1947 +        ((p_Dtsec->p_DtsecDriverParam)->back_to_back_ipg > MAX_INTER_PACKET_GAP))
1948 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inter packet gap can't be greater than %d ",MAX_INTER_PACKET_GAP ));
1949 +    if ((p_Dtsec->p_DtsecDriverParam)->halfdup_alt_backoff_val > MAX_INTER_PALTERNATE_BEB)
1950 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("alternateBackoffVal can't be greater than %d ",MAX_INTER_PALTERNATE_BEB ));
1951 +    if ((p_Dtsec->p_DtsecDriverParam)->halfdup_retransmit > MAX_RETRANSMISSION)
1952 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("maxRetransmission can't be greater than %d ",MAX_RETRANSMISSION ));
1953 +    if ((p_Dtsec->p_DtsecDriverParam)->halfdup_coll_window > MAX_COLLISION_WINDOW)
1954 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("collisionWindow can't be greater than %d ",MAX_COLLISION_WINDOW ));
1955 +
1956 +    /*  If Auto negotiation process is disabled, need to */
1957 +    /*  Set up the PHY using the MII Management Interface */
1958 +    if (p_Dtsec->p_DtsecDriverParam->tbipa > MAX_PHYS)
1959 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, ("PHY address (should be 0-%d)", MAX_PHYS));
1960 +    if (!p_Dtsec->f_Exception)
1961 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("uninitialized f_Exception"));
1962 +    if (!p_Dtsec->f_Event)
1963 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("uninitialized f_Event"));
1964 +
1965 +#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
1966 +    if (p_Dtsec->p_DtsecDriverParam->rx_len_check)
1967 +       RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
1968 +#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
1969 +
1970 +    return E_OK;
1971 +}
1972 +
1973 +/* ......................................................................... */
1974 +
1975 +static uint32_t GetMacAddrHashCode(uint64_t ethAddr)
1976 +{
1977 +    uint32_t crc;
1978 +
1979 +    /* CRC calculation */
1980 +    GET_MAC_ADDR_CRC(ethAddr, crc);
1981 +
1982 +    crc = GetMirror32(crc);
1983 +
1984 +    return crc;
1985 +}
1986 +
1987 +/* ......................................................................... */
1988 +
1989 +static void UpdateStatistics(t_Dtsec *p_Dtsec)
1990 +{
1991 +    uint32_t car1, car2;
1992 +
1993 +    fman_dtsec_get_clear_carry_regs(p_Dtsec->p_MemMap, &car1, &car2);
1994 +
1995 +    if (car1)
1996 +    {
1997 +        if (car1 & CAR1_TR64)
1998 +            p_Dtsec->internalStatistics.tr64 += VAL22BIT;
1999 +        if (car1 & CAR1_TR127)
2000 +            p_Dtsec->internalStatistics.tr127 += VAL22BIT;
2001 +        if (car1 & CAR1_TR255)
2002 +            p_Dtsec->internalStatistics.tr255 += VAL22BIT;
2003 +        if (car1 & CAR1_TR511)
2004 +            p_Dtsec->internalStatistics.tr511 += VAL22BIT;
2005 +        if (car1 & CAR1_TRK1)
2006 +            p_Dtsec->internalStatistics.tr1k += VAL22BIT;
2007 +        if (car1 & CAR1_TRMAX)
2008 +            p_Dtsec->internalStatistics.trmax += VAL22BIT;
2009 +        if (car1 & CAR1_TRMGV)
2010 +            p_Dtsec->internalStatistics.trmgv += VAL22BIT;
2011 +        if (car1 & CAR1_RBYT)
2012 +            p_Dtsec->internalStatistics.rbyt += (uint64_t)VAL32BIT;
2013 +        if (car1 & CAR1_RPKT)
2014 +            p_Dtsec->internalStatistics.rpkt += VAL22BIT;
2015 +        if (car1 & CAR1_RMCA)
2016 +            p_Dtsec->internalStatistics.rmca += VAL22BIT;
2017 +        if (car1 & CAR1_RBCA)
2018 +            p_Dtsec->internalStatistics.rbca += VAL22BIT;
2019 +        if (car1 & CAR1_RXPF)
2020 +            p_Dtsec->internalStatistics.rxpf += VAL16BIT;
2021 +        if (car1 & CAR1_RALN)
2022 +            p_Dtsec->internalStatistics.raln += VAL16BIT;
2023 +        if (car1 & CAR1_RFLR)
2024 +            p_Dtsec->internalStatistics.rflr += VAL16BIT;
2025 +        if (car1 & CAR1_RCDE)
2026 +            p_Dtsec->internalStatistics.rcde += VAL16BIT;
2027 +        if (car1 & CAR1_RCSE)
2028 +            p_Dtsec->internalStatistics.rcse += VAL16BIT;
2029 +        if (car1 & CAR1_RUND)
2030 +            p_Dtsec->internalStatistics.rund += VAL16BIT;
2031 +        if (car1 & CAR1_ROVR)
2032 +            p_Dtsec->internalStatistics.rovr += VAL16BIT;
2033 +        if (car1 & CAR1_RFRG)
2034 +            p_Dtsec->internalStatistics.rfrg += VAL16BIT;
2035 +        if (car1 & CAR1_RJBR)
2036 +            p_Dtsec->internalStatistics.rjbr += VAL16BIT;
2037 +        if (car1 & CAR1_RDRP)
2038 +            p_Dtsec->internalStatistics.rdrp += VAL16BIT;
2039 +    }
2040 +    if (car2)
2041 +    {
2042 +        if (car2  & CAR2_TFCS)
2043 +            p_Dtsec->internalStatistics.tfcs += VAL12BIT;
2044 +        if (car2  & CAR2_TBYT)
2045 +            p_Dtsec->internalStatistics.tbyt += (uint64_t)VAL32BIT;
2046 +        if (car2  & CAR2_TPKT)
2047 +            p_Dtsec->internalStatistics.tpkt += VAL22BIT;
2048 +        if (car2  & CAR2_TMCA)
2049 +            p_Dtsec->internalStatistics.tmca += VAL22BIT;
2050 +        if (car2  & CAR2_TBCA)
2051 +            p_Dtsec->internalStatistics.tbca += VAL22BIT;
2052 +        if (car2  & CAR2_TXPF)
2053 +            p_Dtsec->internalStatistics.txpf += VAL16BIT;
2054 +        if (car2  & CAR2_TDRP)
2055 +            p_Dtsec->internalStatistics.tdrp += VAL16BIT;
2056 +    }
2057 +}
2058 +
2059 +/* .............................................................................. */
2060 +
2061 +static uint16_t DtsecGetMaxFrameLength(t_Handle h_Dtsec)
2062 +{
2063 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2064 +
2065 +    SANITY_CHECK_RETURN_VALUE(p_Dtsec, E_INVALID_HANDLE, 0);
2066 +    SANITY_CHECK_RETURN_VALUE(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE, 0);
2067 +
2068 +    return fman_dtsec_get_max_frame_len(p_Dtsec->p_MemMap);
2069 +}
2070 +
2071 +/* .............................................................................. */
2072 +
2073 +static void DtsecIsr(t_Handle h_Dtsec)
2074 +{
2075 +    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
2076 +    uint32_t            event;
2077 +    struct dtsec_regs   *p_DtsecMemMap = p_Dtsec->p_MemMap;
2078 +
2079 +    /* do not handle MDIO events */
2080 +    event = fman_dtsec_get_event(p_DtsecMemMap, (uint32_t)(~(DTSEC_IMASK_MMRDEN | DTSEC_IMASK_MMWREN)));
2081 +
2082 +    event &= fman_dtsec_get_interrupt_mask(p_DtsecMemMap);
2083 +
2084 +    fman_dtsec_ack_event(p_DtsecMemMap, event);
2085 +
2086 +    if (event & DTSEC_IMASK_BREN)
2087 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_BAB_RX);
2088 +    if (event & DTSEC_IMASK_RXCEN)
2089 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_RX_CTL);
2090 +    if (event & DTSEC_IMASK_MSROEN)
2091 +        UpdateStatistics(p_Dtsec);
2092 +    if (event & DTSEC_IMASK_GTSCEN)
2093 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET);
2094 +    if (event & DTSEC_IMASK_BTEN)
2095 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_BAB_TX);
2096 +    if (event & DTSEC_IMASK_TXCEN)
2097 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_CTL);
2098 +    if (event & DTSEC_IMASK_TXEEN)
2099 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_ERR);
2100 +    if (event & DTSEC_IMASK_LCEN)
2101 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_LATE_COL);
2102 +    if (event & DTSEC_IMASK_CRLEN)
2103 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_COL_RET_LMT);
2104 +    if (event & DTSEC_IMASK_XFUNEN)
2105 +    {
2106 +#ifdef FM_TX_LOCKUP_ERRATA_DTSEC6
2107 +        if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
2108 +        {
2109 +            uint32_t  tpkt1, tmpReg1, tpkt2, tmpReg2, i;
2110 +            /* a. Write 0x00E0_0C00 to DTSEC_ID */
2111 +            /* This is a read only regidter */
2112 +
2113 +            /* b. Read and save the value of TPKT */
2114 +            tpkt1 = GET_UINT32(p_DtsecMemMap->tpkt);
2115 +
2116 +            /* c. Read the register at dTSEC address offset 0x32C */
2117 +            tmpReg1 =  GET_UINT32(*(uint32_t*)((uint8_t*)p_DtsecMemMap + 0x32c));
2118 +
2119 +            /* d. Compare bits [9:15] to bits [25:31] of the register at address offset 0x32C. */
2120 +            if ((tmpReg1 & 0x007F0000) != (tmpReg1 & 0x0000007F))
2121 +            {
2122 +                /* If they are not equal, save the value of this register and wait for at least
2123 +                 * MAXFRM*16 ns */
2124 +                XX_UDelay((uint32_t)(MIN(DtsecGetMaxFrameLength(p_Dtsec)*16/1000, 1)));
2125 +            }
2126 +
2127 +            /* e. Read and save TPKT again and read the register at dTSEC address offset
2128 +                0x32C again*/
2129 +            tpkt2 = GET_UINT32(p_DtsecMemMap->tpkt);
2130 +            tmpReg2 = GET_UINT32(*(uint32_t*)((uint8_t*)p_DtsecMemMap + 0x32c));
2131 +
2132 +            /* f. Compare the value of TPKT saved in step b to value read in step e. Also
2133 +                compare bits [9:15] of the register at offset 0x32C saved in step d to the value
2134 +                of bits [9:15] saved in step e. If the two registers values are unchanged, then
2135 +                the transmit portion of the dTSEC controller is locked up and the user should
2136 +                proceed to the recover sequence. */
2137 +            if ((tpkt1 == tpkt2) && ((tmpReg1 & 0x007F0000) == (tmpReg2 & 0x007F0000)))
2138 +            {
2139 +                /* recover sequence */
2140 +
2141 +                /* a.Write a 1 to RCTRL[GRS]*/
2142 +
2143 +                WRITE_UINT32(p_DtsecMemMap->rctrl, GET_UINT32(p_DtsecMemMap->rctrl) | RCTRL_GRS);
2144 +
2145 +                /* b.Wait until IEVENT[GRSC]=1, or at least 100 us has elapsed. */
2146 +                for (i = 0 ; i < 100 ; i++ )
2147 +                {
2148 +                    if (GET_UINT32(p_DtsecMemMap->ievent) & DTSEC_IMASK_GRSCEN)
2149 +                        break;
2150 +                    XX_UDelay(1);
2151 +                }
2152 +                if (GET_UINT32(p_DtsecMemMap->ievent) & DTSEC_IMASK_GRSCEN)
2153 +                    WRITE_UINT32(p_DtsecMemMap->ievent, DTSEC_IMASK_GRSCEN);
2154 +                else
2155 +                    DBG(INFO,("Rx lockup due to dTSEC Tx lockup"));
2156 +
2157 +                /* c.Write a 1 to bit n of FM_RSTC (offset 0x0CC of FPM)*/
2158 +                FmResetMac(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MAC_1G, p_Dtsec->fmMacControllerDriver.macId);
2159 +
2160 +                /* d.Wait 4 Tx clocks (32 ns) */
2161 +                XX_UDelay(1);
2162 +
2163 +                /* e.Write a 0 to bit n of FM_RSTC. */
2164 +                /* cleared by FMAN */
2165 +            }
2166 +        }
2167 +#endif /* FM_TX_LOCKUP_ERRATA_DTSEC6 */
2168 +
2169 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_FIFO_UNDRN);
2170 +    }
2171 +    if (event & DTSEC_IMASK_MAGEN)
2172 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_MAG_PCKT);
2173 +    if (event & DTSEC_IMASK_GRSCEN)
2174 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET);
2175 +    if (event & DTSEC_IMASK_TDPEEN)
2176 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_DATA_ERR);
2177 +    if (event & DTSEC_IMASK_RDPEEN)
2178 +        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_RX_DATA_ERR);
2179 +
2180 +    /*  - masked interrupts */
2181 +    ASSERT_COND(!(event & DTSEC_IMASK_ABRTEN));
2182 +    ASSERT_COND(!(event & DTSEC_IMASK_IFERREN));
2183 +}
2184 +
2185 +static void DtsecMdioIsr(t_Handle h_Dtsec)
2186 +{
2187 +    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
2188 +    uint32_t            event;
2189 +    struct dtsec_regs   *p_DtsecMemMap = p_Dtsec->p_MemMap;
2190 +
2191 +    event = GET_UINT32(p_DtsecMemMap->ievent);
2192 +    /* handle only MDIO events */
2193 +    event &= (DTSEC_IMASK_MMRDEN | DTSEC_IMASK_MMWREN);
2194 +    if (event)
2195 +    {
2196 +        event &= GET_UINT32(p_DtsecMemMap->imask);
2197 +
2198 +        WRITE_UINT32(p_DtsecMemMap->ievent, event);
2199 +
2200 +        if (event & DTSEC_IMASK_MMRDEN)
2201 +            p_Dtsec->f_Event(p_Dtsec->h_App, e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET);
2202 +        if (event & DTSEC_IMASK_MMWREN)
2203 +            p_Dtsec->f_Event(p_Dtsec->h_App, e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET);
2204 +    }
2205 +}
2206 +
2207 +static void Dtsec1588Isr(t_Handle h_Dtsec)
2208 +{
2209 +    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
2210 +    uint32_t            event;
2211 +    struct dtsec_regs   *p_DtsecMemMap = p_Dtsec->p_MemMap;
2212 +
2213 +    if (p_Dtsec->ptpTsuEnabled)
2214 +    {
2215 +        event = fman_dtsec_check_and_clear_tmr_event(p_DtsecMemMap);
2216 +
2217 +        if (event)
2218 +        {
2219 +            ASSERT_COND(event & TMR_PEVENT_TSRE);
2220 +            p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_1588_TS_RX_ERR);
2221 +        }
2222 +    }
2223 +}
2224 +
2225 +/* ........................................................................... */
2226 +
2227 +static void FreeInitResources(t_Dtsec *p_Dtsec)
2228 +{
2229 +    if (p_Dtsec->mdioIrq != NO_IRQ)
2230 +    {
2231 +        XX_DisableIntr(p_Dtsec->mdioIrq);
2232 +        XX_FreeIntr(p_Dtsec->mdioIrq);
2233 +    }
2234 +    FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_ERR);
2235 +    FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_NORMAL);
2236 +
2237 +    /* release the driver's group hash table */
2238 +    FreeHashTable(p_Dtsec->p_MulticastAddrHash);
2239 +    p_Dtsec->p_MulticastAddrHash =   NULL;
2240 +
2241 +    /* release the driver's individual hash table */
2242 +    FreeHashTable(p_Dtsec->p_UnicastAddrHash);
2243 +    p_Dtsec->p_UnicastAddrHash =     NULL;
2244 +}
2245 +
2246 +/* ........................................................................... */
2247 +
2248 +static t_Error GracefulStop(t_Dtsec *p_Dtsec, e_CommMode mode)
2249 +{
2250 +    struct dtsec_regs *p_MemMap;
2251 +
2252 +    ASSERT_COND(p_Dtsec);
2253 +
2254 +    p_MemMap = p_Dtsec->p_MemMap;
2255 +    ASSERT_COND(p_MemMap);
2256 +
2257 +    /* Assert the graceful transmit stop bit */
2258 +    if (mode & e_COMM_MODE_RX)
2259 +    {
2260 +        fman_dtsec_stop_rx(p_MemMap);
2261 +
2262 +#ifdef FM_GRS_ERRATA_DTSEC_A002
2263 +        if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
2264 +            XX_UDelay(100);
2265 +#else  /* FM_GRS_ERRATA_DTSEC_A002 */
2266 +#ifdef FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839
2267 +        XX_UDelay(10);
2268 +#endif /* FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839 */
2269 +#endif /* FM_GRS_ERRATA_DTSEC_A002 */
2270 +    }
2271 +
2272 +    if (mode & e_COMM_MODE_TX)
2273 +#if defined(FM_GTS_ERRATA_DTSEC_A004) || defined(FM_GTS_AFTER_MAC_ABORTED_FRAME_ERRATA_DTSEC_A0012)
2274 +    if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
2275 +        DBG(INFO, ("GTS not supported due to DTSEC_A004 errata."));
2276 +#else  /* not defined(FM_GTS_ERRATA_DTSEC_A004) ||... */
2277 +#ifdef FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014
2278 +        DBG(INFO, ("GTS not supported due to DTSEC_A0014 errata."));
2279 +#else  /* FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014 */
2280 +        fman_dtsec_stop_tx(p_MemMap);
2281 +#endif /* FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014 */
2282 +#endif /* defined(FM_GTS_ERRATA_DTSEC_A004) ||...  */
2283 +
2284 +    return E_OK;
2285 +}
2286 +
2287 +/* .............................................................................. */
2288 +
2289 +static t_Error GracefulRestart(t_Dtsec *p_Dtsec, e_CommMode mode)
2290 +{
2291 +    struct dtsec_regs *p_MemMap;
2292 +
2293 +    ASSERT_COND(p_Dtsec);
2294 +    p_MemMap = p_Dtsec->p_MemMap;
2295 +    ASSERT_COND(p_MemMap);
2296 +
2297 +    /* clear the graceful receive stop bit */
2298 +    if (mode & e_COMM_MODE_TX)
2299 +        fman_dtsec_start_tx(p_MemMap);
2300 +
2301 +    if (mode & e_COMM_MODE_RX)
2302 +        fman_dtsec_start_rx(p_MemMap);
2303 +
2304 +    return E_OK;
2305 +}
2306 +
2307 +
2308 +/*****************************************************************************/
2309 +/*                      dTSEC Configs modification functions                 */
2310 +/*****************************************************************************/
2311 +
2312 +/* .............................................................................. */
2313 +
2314 +static t_Error DtsecConfigLoopback(t_Handle h_Dtsec, bool newVal)
2315 +{
2316 +
2317 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2318 +
2319 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2320 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2321 +
2322 +    p_Dtsec->p_DtsecDriverParam->loopback = newVal;
2323 +
2324 +    return E_OK;
2325 +}
2326 +
2327 +/* .............................................................................. */
2328 +
2329 +static t_Error DtsecConfigMaxFrameLength(t_Handle h_Dtsec, uint16_t newVal)
2330 +{
2331 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2332 +
2333 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2334 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2335 +
2336 +    p_Dtsec->p_DtsecDriverParam->maximum_frame = newVal;
2337 +
2338 +    return E_OK;
2339 +}
2340 +
2341 +/* .............................................................................. */
2342 +
2343 +static t_Error DtsecConfigPadAndCrc(t_Handle h_Dtsec, bool newVal)
2344 +{
2345 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2346 +
2347 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2348 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2349 +
2350 +    p_Dtsec->p_DtsecDriverParam->tx_pad_crc = newVal;
2351 +
2352 +    return E_OK;
2353 +}
2354 +
2355 +/* .............................................................................. */
2356 +
2357 +static t_Error DtsecConfigHalfDuplex(t_Handle h_Dtsec, bool newVal)
2358 +{
2359 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2360 +
2361 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2362 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2363 +
2364 +    p_Dtsec->p_DtsecDriverParam->halfdup_on = newVal;
2365 +
2366 +    return E_OK;
2367 +}
2368 +
2369 +/* .............................................................................. */
2370 +
2371 +static t_Error DtsecConfigTbiPhyAddr(t_Handle h_Dtsec, uint8_t newVal)
2372 +{
2373 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2374 +
2375 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2376 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2377 +
2378 +    p_Dtsec->p_DtsecDriverParam->tbi_phy_addr = newVal;
2379 +
2380 +    return E_OK;
2381 +}
2382 +
2383 +/* .............................................................................. */
2384 +
2385 +static t_Error DtsecConfigLengthCheck(t_Handle h_Dtsec, bool newVal)
2386 +{
2387 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2388 +
2389 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2390 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2391 +
2392 +    p_Dtsec->p_DtsecDriverParam->rx_len_check = newVal;
2393 +
2394 +    return E_OK;
2395 +}
2396 +
2397 +/* .............................................................................. */
2398 +
2399 +static t_Error DtsecConfigException(t_Handle h_Dtsec, e_FmMacExceptions exception, bool enable)
2400 +{
2401 +    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
2402 +    uint32_t    bitMask = 0;
2403 +
2404 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2405 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2406 +
2407 +    if (exception != e_FM_MAC_EX_1G_1588_TS_RX_ERR)
2408 +    {
2409 +        GET_EXCEPTION_FLAG(bitMask, exception);
2410 +        if (bitMask)
2411 +        {
2412 +            if (enable)
2413 +                p_Dtsec->exceptions |= bitMask;
2414 +            else
2415 +                p_Dtsec->exceptions &= ~bitMask;
2416 +        }
2417 +        else
2418 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
2419 +    }
2420 +    else
2421 +    {
2422 +        if (!p_Dtsec->ptpTsuEnabled)
2423 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exception valid for 1588 only"));
2424 +
2425 +        if (enable)
2426 +            p_Dtsec->enTsuErrExeption = TRUE;
2427 +        else
2428 +            p_Dtsec->enTsuErrExeption = FALSE;
2429 +    }
2430 +
2431 +    return E_OK;
2432 +}
2433 +
2434 +
2435 +/*****************************************************************************/
2436 +/*                      dTSEC Run Time API functions                         */
2437 +/*****************************************************************************/
2438 +
2439 +/* .............................................................................. */
2440 +
2441 +static t_Error DtsecEnable(t_Handle h_Dtsec,  e_CommMode mode)
2442 +{
2443 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2444 +
2445 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2446 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2447 +
2448 +    fman_dtsec_enable(p_Dtsec->p_MemMap,
2449 +                 (bool)!!(mode & e_COMM_MODE_RX),
2450 +                 (bool)!!(mode & e_COMM_MODE_TX));
2451 +
2452 +    GracefulRestart(p_Dtsec, mode);
2453 +
2454 +    return E_OK;
2455 +}
2456 +
2457 +/* .............................................................................. */
2458 +
2459 +static t_Error DtsecDisable (t_Handle h_Dtsec, e_CommMode mode)
2460 +{
2461 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2462 +
2463 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2464 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2465 +
2466 +    GracefulStop(p_Dtsec, mode);
2467 +
2468 +    fman_dtsec_disable(p_Dtsec->p_MemMap,
2469 +                  (bool)!!(mode & e_COMM_MODE_RX),
2470 +                  (bool)!!(mode & e_COMM_MODE_TX));
2471 +
2472 +    return E_OK;
2473 +}
2474 +
2475 +/* .............................................................................. */
2476 +
2477 +static t_Error DtsecSetTxPauseFrames(t_Handle h_Dtsec,
2478 +                                     uint8_t  priority,
2479 +                                     uint16_t pauseTime,
2480 +                                     uint16_t threshTime)
2481 +{
2482 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2483 +
2484 +    UNUSED(priority);UNUSED(threshTime);
2485 +
2486 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
2487 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2488 +
2489 +#ifdef FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003
2490 +    if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
2491 +        if (0 < pauseTime && pauseTime <= 320)
2492 +            RETURN_ERROR(MINOR, E_INVALID_VALUE,
2493 +                     ("This pause-time value of %d is illegal due to errata dTSEC-A003!"
2494 +                      " value should be greater than 320."));
2495 +#endif /* FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 */
2496 +
2497 +    fman_dtsec_set_tx_pause_frames(p_Dtsec->p_MemMap, pauseTime);
2498 +    return E_OK;
2499 +}
2500 +
2501 +/* .............................................................................. */
2502 +/* backward compatibility. will be removed in the future. */
2503 +static t_Error DtsecTxMacPause(t_Handle h_Dtsec, uint16_t pauseTime)
2504 +{
2505 +    return DtsecSetTxPauseFrames(h_Dtsec, 0, pauseTime, 0);
2506 +}
2507 +
2508 +/* .............................................................................. */
2509 +
2510 +static t_Error DtsecRxIgnoreMacPause(t_Handle h_Dtsec, bool en)
2511 +{
2512 +    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
2513 +    bool            accept_pause = !en;
2514 +
2515 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
2516 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2517 +
2518 +    fman_dtsec_handle_rx_pause(p_Dtsec->p_MemMap, accept_pause);
2519 +
2520 +    return E_OK;
2521 +}
2522 +
2523 +/* .............................................................................. */
2524 +
2525 +static t_Error DtsecEnable1588TimeStamp(t_Handle h_Dtsec)
2526 +{
2527 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2528 +
2529 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2530 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2531 +
2532 +    p_Dtsec->ptpTsuEnabled = TRUE;
2533 +    fman_dtsec_set_ts(p_Dtsec->p_MemMap, TRUE);
2534 +
2535 +    return E_OK;
2536 +}
2537 +
2538 +/* .............................................................................. */
2539 +
2540 +static t_Error DtsecDisable1588TimeStamp(t_Handle h_Dtsec)
2541 +{
2542 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2543 +
2544 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2545 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2546 +
2547 +    p_Dtsec->ptpTsuEnabled = FALSE;
2548 +    fman_dtsec_set_ts(p_Dtsec->p_MemMap, FALSE);
2549 +
2550 +    return E_OK;
2551 +}
2552 +
2553 +/* .............................................................................. */
2554 +
2555 +static t_Error DtsecGetStatistics(t_Handle h_Dtsec, t_FmMacStatistics *p_Statistics)
2556 +{
2557 +    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
2558 +    struct dtsec_regs   *p_DtsecMemMap;
2559 +
2560 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2561 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2562 +    SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
2563 +
2564 +    p_DtsecMemMap = p_Dtsec->p_MemMap;
2565 +
2566 +    if (p_Dtsec->statisticsLevel == e_FM_MAC_NONE_STATISTICS)
2567 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("Statistics disabled"));
2568 +
2569 +    memset(p_Statistics, 0xff, sizeof(t_FmMacStatistics));
2570 +
2571 +    if (p_Dtsec->statisticsLevel == e_FM_MAC_FULL_STATISTICS)
2572 +    {
2573 +        p_Statistics->eStatPkts64 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR64)
2574 +                + p_Dtsec->internalStatistics.tr64;
2575 +        p_Statistics->eStatPkts65to127 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR127)
2576 +                + p_Dtsec->internalStatistics.tr127;
2577 +        p_Statistics->eStatPkts128to255 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR255)
2578 +                + p_Dtsec->internalStatistics.tr255;
2579 +        p_Statistics->eStatPkts256to511 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR511)
2580 +                + p_Dtsec->internalStatistics.tr511;
2581 +        p_Statistics->eStatPkts512to1023 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR1K)
2582 +                + p_Dtsec->internalStatistics.tr1k;
2583 +        p_Statistics->eStatPkts1024to1518 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TRMAX)
2584 +                + p_Dtsec->internalStatistics.trmax;
2585 +        p_Statistics->eStatPkts1519to1522 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TRMGV)
2586 +                + p_Dtsec->internalStatistics.trmgv;
2587 +
2588 +        /* MIB II */
2589 +        p_Statistics->ifInOctets = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RBYT)
2590 +                + p_Dtsec->internalStatistics.rbyt;
2591 +        p_Statistics->ifInPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RPKT)
2592 +                + p_Dtsec->internalStatistics.rpkt;
2593 +        p_Statistics->ifInUcastPkts = 0;
2594 +        p_Statistics->ifInMcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RMCA)
2595 +                + p_Dtsec->internalStatistics.rmca;
2596 +        p_Statistics->ifInBcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RBCA)
2597 +                + p_Dtsec->internalStatistics.rbca;
2598 +        p_Statistics->ifOutOctets = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TBYT)
2599 +                + p_Dtsec->internalStatistics.tbyt;
2600 +        p_Statistics->ifOutPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TPKT)
2601 +                + p_Dtsec->internalStatistics.tpkt;
2602 +        p_Statistics->ifOutUcastPkts = 0;
2603 +        p_Statistics->ifOutMcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TMCA)
2604 +                + p_Dtsec->internalStatistics.tmca;
2605 +        p_Statistics->ifOutBcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TBCA)
2606 +                + p_Dtsec->internalStatistics.tbca;
2607 +    }
2608 +
2609 +    p_Statistics->eStatFragments = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RFRG)
2610 +            + p_Dtsec->internalStatistics.rfrg;
2611 +    p_Statistics->eStatJabbers = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RJBR)
2612 +            + p_Dtsec->internalStatistics.rjbr;
2613 +    p_Statistics->eStatsDropEvents = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RDRP)
2614 +            + p_Dtsec->internalStatistics.rdrp;
2615 +    p_Statistics->eStatCRCAlignErrors = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RALN)
2616 +            + p_Dtsec->internalStatistics.raln;
2617 +    p_Statistics->eStatUndersizePkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RUND)
2618 +            + p_Dtsec->internalStatistics.rund;
2619 +    p_Statistics->eStatOversizePkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_ROVR)
2620 +            + p_Dtsec->internalStatistics.rovr;
2621 +    p_Statistics->reStatPause = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RXPF)
2622 +            + p_Dtsec->internalStatistics.rxpf;
2623 +    p_Statistics->teStatPause = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TXPF)
2624 +            + p_Dtsec->internalStatistics.txpf;
2625 +    p_Statistics->ifInDiscards = p_Statistics->eStatsDropEvents;
2626 +    p_Statistics->ifInErrors = p_Statistics->eStatsDropEvents + p_Statistics->eStatCRCAlignErrors
2627 +            + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_RFLR) + p_Dtsec->internalStatistics.rflr
2628 +            + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_RCDE) + p_Dtsec->internalStatistics.rcde
2629 +            + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_RCSE) + p_Dtsec->internalStatistics.rcse;
2630 +
2631 +    p_Statistics->ifOutDiscards = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TDRP)
2632 +            + p_Dtsec->internalStatistics.tdrp;
2633 +    p_Statistics->ifOutErrors = p_Statistics->ifOutDiscards                                           /**< Number of frames transmitted with error: */
2634 +            + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_TFCS)
2635 +            + p_Dtsec->internalStatistics.tfcs;
2636 +
2637 +    return E_OK;
2638 +}
2639 +
2640 +/* .............................................................................. */
2641 +
2642 +static t_Error DtsecModifyMacAddress (t_Handle h_Dtsec, t_EnetAddr *p_EnetAddr)
2643 +{
2644 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2645 +
2646 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2647 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2648 +
2649 +    /* Initialize MAC Station Address registers (1 & 2)    */
2650 +    /* Station address have to be swapped (big endian to little endian */
2651 +    p_Dtsec->addr = ENET_ADDR_TO_UINT64(*p_EnetAddr);
2652 +    fman_dtsec_set_mac_address(p_Dtsec->p_MemMap, (uint8_t *)(*p_EnetAddr));
2653 +
2654 +    return E_OK;
2655 +}
2656 +
2657 +/* .............................................................................. */
2658 +
2659 +static t_Error DtsecResetCounters (t_Handle h_Dtsec)
2660 +{
2661 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2662 +
2663 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2664 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2665 +
2666 +    /* clear HW counters */
2667 +    fman_dtsec_reset_stat(p_Dtsec->p_MemMap);
2668 +
2669 +    /* clear SW counters holding carries */
2670 +    memset(&p_Dtsec->internalStatistics, 0, sizeof(t_InternalStatistics));
2671 +
2672 +    return E_OK;
2673 +}
2674 +
2675 +/* .............................................................................. */
2676 +
2677 +static t_Error DtsecAddExactMatchMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
2678 +{
2679 +    t_Dtsec   *p_Dtsec = (t_Dtsec *) h_Dtsec;
2680 +    uint64_t  ethAddr;
2681 +    uint8_t   paddrNum;
2682 +
2683 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2684 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2685 +
2686 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
2687 +
2688 +    if (ethAddr & GROUP_ADDRESS)
2689 +        /* Multicast address has no effect in PADDR */
2690 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
2691 +
2692 +    /* Make sure no PADDR contains this address */
2693 +    for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
2694 +        if (p_Dtsec->indAddrRegUsed[paddrNum])
2695 +            if (p_Dtsec->paddr[paddrNum] == ethAddr)
2696 +                RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
2697 +
2698 +    /* Find first unused PADDR */
2699 +    for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
2700 +        if (!(p_Dtsec->indAddrRegUsed[paddrNum]))
2701 +        {
2702 +            /* mark this PADDR as used */
2703 +            p_Dtsec->indAddrRegUsed[paddrNum] = TRUE;
2704 +            /* store address */
2705 +            p_Dtsec->paddr[paddrNum] = ethAddr;
2706 +
2707 +            /* put in hardware */
2708 +            fman_dtsec_add_addr_in_paddr(p_Dtsec->p_MemMap, (uint64_t)PTR_TO_UINT(&ethAddr), paddrNum);
2709 +            p_Dtsec->numOfIndAddrInRegs++;
2710 +
2711 +            return E_OK;
2712 +        }
2713 +
2714 +    /* No free PADDR */
2715 +    RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
2716 +}
2717 +
2718 +/* .............................................................................. */
2719 +
2720 +static t_Error DtsecDelExactMatchMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
2721 +{
2722 +    t_Dtsec   *p_Dtsec = (t_Dtsec *) h_Dtsec;
2723 +    uint64_t  ethAddr;
2724 +    uint8_t   paddrNum;
2725 +
2726 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2727 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2728 +
2729 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
2730 +
2731 +    /* Find used PADDR containing this address */
2732 +    for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
2733 +    {
2734 +        if ((p_Dtsec->indAddrRegUsed[paddrNum]) &&
2735 +            (p_Dtsec->paddr[paddrNum] == ethAddr))
2736 +        {
2737 +            /* mark this PADDR as not used */
2738 +            p_Dtsec->indAddrRegUsed[paddrNum] = FALSE;
2739 +            /* clear in hardware */
2740 +            fman_dtsec_clear_addr_in_paddr(p_Dtsec->p_MemMap, paddrNum);
2741 +            p_Dtsec->numOfIndAddrInRegs--;
2742 +
2743 +            return E_OK;
2744 +        }
2745 +    }
2746 +
2747 +    RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
2748 +}
2749 +
2750 +/* .............................................................................. */
2751 +
2752 +static t_Error DtsecAddHashMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
2753 +{
2754 +    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
2755 +    t_EthHashEntry  *p_HashEntry;
2756 +    uint64_t        ethAddr;
2757 +    int32_t         bucket;
2758 +    uint32_t        crc;
2759 +    bool            mcast, ghtx;
2760 +
2761 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2762 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2763 +
2764 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
2765 +
2766 +    ghtx = (bool)((fman_dtsec_get_rctrl(p_Dtsec->p_MemMap) & RCTRL_GHTX) ? TRUE : FALSE);
2767 +    mcast = (bool)((ethAddr & MAC_GROUP_ADDRESS) ? TRUE : FALSE);
2768 +
2769 +    if (ghtx && !mcast) /* Cannot handle unicast mac addr when GHTX is on */
2770 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Could not compute hash bucket"));
2771 +
2772 +    crc = GetMacAddrHashCode(ethAddr);
2773 +
2774 +    /* considering the 9 highest order bits in crc H[8:0]:
2775 +     * if ghtx = 0 H[8:6] (highest order 3 bits) identify the hash register
2776 +     * and H[5:1] (next 5 bits) identify the hash bit
2777 +     * if ghts = 1 H[8:5] (highest order 4 bits) identify the hash register
2778 +     * and H[4:0] (next 5 bits) identify the hash bit.
2779 +     *
2780 +     * In bucket index output the low 5 bits identify the hash register bit,
2781 +     * while the higher 4 bits identify the hash register
2782 +     */
2783 +
2784 +    if (ghtx)
2785 +        bucket = (int32_t)((crc >> 23) & 0x1ff);
2786 +    else {
2787 +        bucket = (int32_t)((crc >> 24) & 0xff);
2788 +        /* if !ghtx and mcast the bit must be set in gaddr instead of igaddr. */
2789 +        if (mcast)
2790 +            bucket += 0x100;
2791 +    }
2792 +
2793 +    fman_dtsec_set_bucket(p_Dtsec->p_MemMap, bucket, TRUE);
2794 +
2795 +    /* Create element to be added to the driver hash table */
2796 +    p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
2797 +    p_HashEntry->addr = ethAddr;
2798 +    INIT_LIST(&p_HashEntry->node);
2799 +
2800 +    if (ethAddr & MAC_GROUP_ADDRESS)
2801 +        /* Group Address */
2802 +        LIST_AddToTail(&(p_HashEntry->node), &(p_Dtsec->p_MulticastAddrHash->p_Lsts[bucket]));
2803 +    else
2804 +        LIST_AddToTail(&(p_HashEntry->node), &(p_Dtsec->p_UnicastAddrHash->p_Lsts[bucket]));
2805 +
2806 +    return E_OK;
2807 +}
2808 +
2809 +/* .............................................................................. */
2810 +
2811 +static t_Error DtsecDelHashMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
2812 +{
2813 +    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
2814 +    t_List          *p_Pos;
2815 +    t_EthHashEntry  *p_HashEntry = NULL;
2816 +    uint64_t        ethAddr;
2817 +    int32_t         bucket;
2818 +    uint32_t        crc;
2819 +    bool            mcast, ghtx;
2820 +
2821 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2822 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2823 +
2824 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
2825 +
2826 +    ghtx = (bool)((fman_dtsec_get_rctrl(p_Dtsec->p_MemMap) & RCTRL_GHTX) ? TRUE : FALSE);
2827 +    mcast = (bool)((ethAddr & MAC_GROUP_ADDRESS) ? TRUE : FALSE);
2828 +
2829 +    if (ghtx && !mcast) /* Cannot handle unicast mac addr when GHTX is on */
2830 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Could not compute hash bucket"));
2831 +
2832 +    crc = GetMacAddrHashCode(ethAddr);
2833 +
2834 +    if (ghtx)
2835 +        bucket = (int32_t)((crc >> 23) & 0x1ff);
2836 +    else {
2837 +        bucket = (int32_t)((crc >> 24) & 0xff);
2838 +        /* if !ghtx and mcast the bit must be set in gaddr instead of igaddr. */
2839 +        if (mcast)
2840 +            bucket += 0x100;
2841 +    }
2842 +
2843 +    if (ethAddr & MAC_GROUP_ADDRESS)
2844 +    {
2845 +        /* Group Address */
2846 +        LIST_FOR_EACH(p_Pos, &(p_Dtsec->p_MulticastAddrHash->p_Lsts[bucket]))
2847 +        {
2848 +            p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
2849 +            if (p_HashEntry->addr == ethAddr)
2850 +            {
2851 +                LIST_DelAndInit(&p_HashEntry->node);
2852 +                XX_Free(p_HashEntry);
2853 +                break;
2854 +            }
2855 +        }
2856 +        if (LIST_IsEmpty(&p_Dtsec->p_MulticastAddrHash->p_Lsts[bucket]))
2857 +            fman_dtsec_set_bucket(p_Dtsec->p_MemMap, bucket, FALSE);
2858 +    }
2859 +    else
2860 +    {
2861 +        /* Individual Address */
2862 +        LIST_FOR_EACH(p_Pos, &(p_Dtsec->p_UnicastAddrHash->p_Lsts[bucket]))
2863 +        {
2864 +            p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
2865 +            if (p_HashEntry->addr == ethAddr)
2866 +            {
2867 +                LIST_DelAndInit(&p_HashEntry->node);
2868 +                XX_Free(p_HashEntry);
2869 +                break;
2870 +            }
2871 +        }
2872 +        if (LIST_IsEmpty(&p_Dtsec->p_UnicastAddrHash->p_Lsts[bucket]))
2873 +            fman_dtsec_set_bucket(p_Dtsec->p_MemMap, bucket, FALSE);
2874 +    }
2875 +
2876 +    /* address does not exist */
2877 +    ASSERT_COND(p_HashEntry != NULL);
2878 +
2879 +    return E_OK;
2880 +}
2881 +
2882 +/* .............................................................................. */
2883 +
2884 +static t_Error DtsecSetPromiscuous(t_Handle h_Dtsec, bool newVal)
2885 +{
2886 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2887 +
2888 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2889 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2890 +
2891 +    fman_dtsec_set_uc_promisc(p_Dtsec->p_MemMap, newVal);
2892 +    fman_dtsec_set_mc_promisc(p_Dtsec->p_MemMap, newVal);
2893 +
2894 +    return E_OK;
2895 +}
2896 +
2897 +/* .............................................................................. */
2898 +
2899 +static t_Error DtsecSetStatistics(t_Handle h_Dtsec, e_FmMacStatisticsLevel statisticsLevel)
2900 +{
2901 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2902 +    t_Error     err;
2903 +
2904 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2905 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2906 +
2907 +    p_Dtsec->statisticsLevel = statisticsLevel;
2908 +
2909 +    err = (t_Error)fman_dtsec_set_stat_level(p_Dtsec->p_MemMap,
2910 +                                        (enum dtsec_stat_level)statisticsLevel);
2911 +    if (err != E_OK)
2912 +        return err;
2913 +
2914 +    switch (statisticsLevel)
2915 +    {
2916 +    case (e_FM_MAC_NONE_STATISTICS):
2917 +            p_Dtsec->exceptions &= ~DTSEC_IMASK_MSROEN;
2918 +            break;
2919 +    case (e_FM_MAC_PARTIAL_STATISTICS):
2920 +            p_Dtsec->exceptions |= DTSEC_IMASK_MSROEN;
2921 +            break;
2922 +    case (e_FM_MAC_FULL_STATISTICS):
2923 +            p_Dtsec->exceptions |= DTSEC_IMASK_MSROEN;
2924 +            break;
2925 +        default:
2926 +            RETURN_ERROR(MINOR, E_INVALID_SELECTION, NO_MSG);
2927 +    }
2928 +
2929 +    return E_OK;
2930 +}
2931 +
2932 +/* .............................................................................. */
2933 +
2934 +static t_Error DtsecSetWakeOnLan(t_Handle h_Dtsec, bool en)
2935 +{
2936 +    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
2937 +
2938 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
2939 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2940 +
2941 +    fman_dtsec_set_wol(p_Dtsec->p_MemMap, en);
2942 +
2943 +    return E_OK;
2944 +}
2945 +
2946 +/* .............................................................................. */
2947 +
2948 +static t_Error DtsecAdjustLink(t_Handle h_Dtsec, e_EnetSpeed speed, bool fullDuplex)
2949 +{
2950 +    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
2951 +    int                 err;
2952 +    enum enet_interface enet_interface;
2953 +    enum enet_speed     enet_speed;
2954 +
2955 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2956 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2957 +
2958 +    p_Dtsec->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode), speed);
2959 +    enet_interface = (enum enet_interface) ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode);
2960 +    enet_speed = (enum enet_speed) ENET_SPEED_FROM_MODE(p_Dtsec->enetMode);
2961 +    p_Dtsec->halfDuplex = !fullDuplex;
2962 +
2963 +    err = fman_dtsec_adjust_link(p_Dtsec->p_MemMap, enet_interface, enet_speed, fullDuplex);
2964 +
2965 +    if (err == -EINVAL)
2966 +        RETURN_ERROR(MAJOR, E_CONFLICT, ("Ethernet interface does not support Half Duplex mode"));
2967 +
2968 +    return (t_Error)err;
2969 +}
2970 +
2971 +/* .............................................................................. */
2972 +
2973 +static t_Error DtsecRestartAutoneg(t_Handle h_Dtsec)
2974 +{
2975 +    t_Dtsec      *p_Dtsec = (t_Dtsec *)h_Dtsec;
2976 +    uint16_t     tmpReg16;
2977 +
2978 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2979 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2980 +
2981 +    DTSEC_MII_ReadPhyReg(p_Dtsec, p_Dtsec->tbi_phy_addr, 0, &tmpReg16);
2982 +
2983 +    tmpReg16 &= ~( PHY_CR_SPEED0 | PHY_CR_SPEED1 );
2984 +    tmpReg16 |= (PHY_CR_ANE | PHY_CR_RESET_AN | PHY_CR_FULLDUPLEX | PHY_CR_SPEED1);
2985 +
2986 +    DTSEC_MII_WritePhyReg(p_Dtsec, p_Dtsec->tbi_phy_addr, 0, tmpReg16);
2987 +
2988 +    return E_OK;
2989 +}
2990 +
2991 +/* .............................................................................. */
2992 +
2993 +static t_Error DtsecGetId(t_Handle h_Dtsec, uint32_t *macId)
2994 +{
2995 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
2996 +
2997 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
2998 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
2999 +
3000 +    *macId = p_Dtsec->macId;
3001 +
3002 +    return E_OK;
3003 +}
3004 +
3005 +/* .............................................................................. */
3006 +
3007 +static t_Error DtsecGetVersion(t_Handle h_Dtsec, uint32_t *macVersion)
3008 +{
3009 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
3010 +
3011 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
3012 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
3013 +
3014 +    *macVersion = fman_dtsec_get_revision(p_Dtsec->p_MemMap);
3015 +
3016 +    return E_OK;
3017 +}
3018 +
3019 +/* .............................................................................. */
3020 +
3021 +static t_Error DtsecSetException(t_Handle h_Dtsec, e_FmMacExceptions exception, bool enable)
3022 +{
3023 +    t_Dtsec     *p_Dtsec = (t_Dtsec *)h_Dtsec;
3024 +    uint32_t    bitMask = 0;
3025 +
3026 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
3027 +    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
3028 +
3029 +    if (exception != e_FM_MAC_EX_1G_1588_TS_RX_ERR)
3030 +    {
3031 +        GET_EXCEPTION_FLAG(bitMask, exception);
3032 +        if (bitMask)
3033 +        {
3034 +            if (enable)
3035 +                p_Dtsec->exceptions |= bitMask;
3036 +            else
3037 +                p_Dtsec->exceptions &= ~bitMask;
3038 +        }
3039 +        else
3040 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
3041 +
3042 +        if (enable)
3043 +            fman_dtsec_enable_interrupt(p_Dtsec->p_MemMap, bitMask);
3044 +        else
3045 +            fman_dtsec_disable_interrupt(p_Dtsec->p_MemMap, bitMask);
3046 +    }
3047 +    else
3048 +    {
3049 +        if (!p_Dtsec->ptpTsuEnabled)
3050 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exception valid for 1588 only"));
3051 +
3052 +        if (enable)
3053 +        {
3054 +            p_Dtsec->enTsuErrExeption = TRUE;
3055 +            fman_dtsec_enable_tmr_interrupt(p_Dtsec->p_MemMap);
3056 +        }
3057 +        else
3058 +        {
3059 +            p_Dtsec->enTsuErrExeption = FALSE;
3060 +            fman_dtsec_disable_tmr_interrupt(p_Dtsec->p_MemMap);
3061 +        }
3062 +    }
3063 +
3064 +    return E_OK;
3065 +}
3066 +
3067 +
3068 +/*****************************************************************************/
3069 +/*                      dTSEC Init & Free API                                   */
3070 +/*****************************************************************************/
3071 +
3072 +/* .............................................................................. */
3073 +
3074 +static t_Error DtsecInit(t_Handle h_Dtsec)
3075 +{
3076 +    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
3077 +    struct dtsec_cfg    *p_DtsecDriverParam;
3078 +    t_Error             err;
3079 +    uint16_t            maxFrmLn;
3080 +    enum enet_interface enet_interface;
3081 +    enum enet_speed     enet_speed;
3082 +    t_EnetAddr          ethAddr;
3083 +
3084 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
3085 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
3086 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->fmMacControllerDriver.h_Fm, E_INVALID_HANDLE);
3087 +
3088 +    FM_GetRevision(p_Dtsec->fmMacControllerDriver.h_Fm, &p_Dtsec->fmMacControllerDriver.fmRevInfo);
3089 +    CHECK_INIT_PARAMETERS(p_Dtsec, CheckInitParameters);
3090 +
3091 +    p_DtsecDriverParam  = p_Dtsec->p_DtsecDriverParam;
3092 +    p_Dtsec->halfDuplex = p_DtsecDriverParam->halfdup_on;
3093 +
3094 +    enet_interface = (enum enet_interface)ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode);
3095 +    enet_speed = (enum enet_speed)ENET_SPEED_FROM_MODE(p_Dtsec->enetMode);
3096 +    MAKE_ENET_ADDR_FROM_UINT64(p_Dtsec->addr, ethAddr);
3097 +
3098 +    err = (t_Error)fman_dtsec_init(p_Dtsec->p_MemMap,
3099 +                              p_DtsecDriverParam,
3100 +                              enet_interface,
3101 +                              enet_speed,
3102 +                              (uint8_t*)ethAddr,
3103 +                              p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev,
3104 +                              p_Dtsec->fmMacControllerDriver.fmRevInfo.minorRev,
3105 +                              p_Dtsec->exceptions);
3106 +    if (err)
3107 +    {
3108 +        FreeInitResources(p_Dtsec);
3109 +        RETURN_ERROR(MAJOR, err, ("This DTSEC version does not support the required i/f mode"));
3110 +    }
3111 +
3112 +    if (ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode) == e_ENET_IF_SGMII)
3113 +    {
3114 +        uint16_t            tmpReg16;
3115 +
3116 +        /* Configure the TBI PHY Control Register */
3117 +        tmpReg16 = PHY_TBICON_CLK_SEL | PHY_TBICON_SRESET;
3118 +        DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 17, tmpReg16);
3119 +
3120 +        tmpReg16 = PHY_TBICON_CLK_SEL;
3121 +        DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 17, tmpReg16);
3122 +
3123 +        tmpReg16 = (PHY_CR_PHY_RESET | PHY_CR_ANE | PHY_CR_FULLDUPLEX | PHY_CR_SPEED1);
3124 +        DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 0, tmpReg16);
3125 +
3126 +        if (p_Dtsec->enetMode & ENET_IF_SGMII_BASEX)
3127 +            tmpReg16 = PHY_TBIANA_1000X;
3128 +        else
3129 +            tmpReg16 = PHY_TBIANA_SGMII;
3130 +        DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 4, tmpReg16);
3131 +
3132 +        tmpReg16 = (PHY_CR_ANE | PHY_CR_RESET_AN | PHY_CR_FULLDUPLEX | PHY_CR_SPEED1);
3133 +
3134 +        DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 0, tmpReg16);
3135 +    }
3136 +
3137 +    /* Max Frame Length */
3138 +    maxFrmLn = fman_dtsec_get_max_frame_len(p_Dtsec->p_MemMap);
3139 +    err = FmSetMacMaxFrame(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MAC_1G,
3140 +            p_Dtsec->fmMacControllerDriver.macId, maxFrmLn);
3141 +    if (err)
3142 +        RETURN_ERROR(MINOR,err, NO_MSG);
3143 +
3144 +    p_Dtsec->p_MulticastAddrHash = AllocHashTable(EXTENDED_HASH_TABLE_SIZE);
3145 +    if (!p_Dtsec->p_MulticastAddrHash) {
3146 +        FreeInitResources(p_Dtsec);
3147 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MC hash table is FAILED"));
3148 +    }
3149 +
3150 +    p_Dtsec->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
3151 +    if (!p_Dtsec->p_UnicastAddrHash)
3152 +    {
3153 +        FreeInitResources(p_Dtsec);
3154 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("UC hash table is FAILED"));
3155 +    }
3156 +
3157 +    /* register err intr handler for dtsec to FPM (err)*/
3158 +    FmRegisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm,
3159 +                   e_FM_MOD_1G_MAC,
3160 +                   p_Dtsec->macId,
3161 +                   e_FM_INTR_TYPE_ERR,
3162 +                   DtsecIsr,
3163 +                   p_Dtsec);
3164 +    /* register 1588 intr handler for TMR to FPM (normal)*/
3165 +    FmRegisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm,
3166 +                   e_FM_MOD_1G_MAC,
3167 +                   p_Dtsec->macId,
3168 +                   e_FM_INTR_TYPE_NORMAL,
3169 +                   Dtsec1588Isr,
3170 +                   p_Dtsec);
3171 +    /* register normal intr handler for dtsec to main interrupt controller. */
3172 +    if (p_Dtsec->mdioIrq != NO_IRQ)
3173 +    {
3174 +        XX_SetIntr(p_Dtsec->mdioIrq, DtsecMdioIsr, p_Dtsec);
3175 +        XX_EnableIntr(p_Dtsec->mdioIrq);
3176 +    }
3177 +
3178 +    XX_Free(p_DtsecDriverParam);
3179 +    p_Dtsec->p_DtsecDriverParam = NULL;
3180 +
3181 +    err = DtsecSetStatistics(h_Dtsec, e_FM_MAC_FULL_STATISTICS);
3182 +    if (err)
3183 +    {
3184 +        FreeInitResources(p_Dtsec);
3185 +        RETURN_ERROR(MAJOR, err, ("Undefined statistics level"));
3186 +    }
3187 +
3188 +    return E_OK;
3189 +}
3190 +
3191 +/* ........................................................................... */
3192 +
3193 +static t_Error DtsecFree(t_Handle h_Dtsec)
3194 +{
3195 +    t_Dtsec      *p_Dtsec = (t_Dtsec *)h_Dtsec;
3196 +
3197 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
3198 +
3199 +    if (p_Dtsec->p_DtsecDriverParam)
3200 +    {
3201 +        /* Called after config */
3202 +        XX_Free(p_Dtsec->p_DtsecDriverParam);
3203 +        p_Dtsec->p_DtsecDriverParam = NULL;
3204 +    }
3205 +    else
3206 +        /* Called after init */
3207 +        FreeInitResources(p_Dtsec);
3208 +
3209 +    XX_Free(p_Dtsec);
3210 +
3211 +    return E_OK;
3212 +}
3213 +
3214 +/* .............................................................................. */
3215 +
3216 +static void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
3217 +{
3218 +    p_FmMacControllerDriver->f_FM_MAC_Init                      = DtsecInit;
3219 +    p_FmMacControllerDriver->f_FM_MAC_Free                      = DtsecFree;
3220 +
3221 +    p_FmMacControllerDriver->f_FM_MAC_SetStatistics             = DtsecSetStatistics;
3222 +    p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback            = DtsecConfigLoopback;
3223 +    p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength      = DtsecConfigMaxFrameLength;
3224 +
3225 +    p_FmMacControllerDriver->f_FM_MAC_ConfigWan                 = NULL; /* Not supported on dTSEC */
3226 +
3227 +    p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc           = DtsecConfigPadAndCrc;
3228 +    p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex          = DtsecConfigHalfDuplex;
3229 +    p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck         = DtsecConfigLengthCheck;
3230 +    p_FmMacControllerDriver->f_FM_MAC_ConfigTbiPhyAddr          = DtsecConfigTbiPhyAddr;
3231 +    p_FmMacControllerDriver->f_FM_MAC_ConfigException           = DtsecConfigException;
3232 +    p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit         = NULL;
3233 +
3234 +    p_FmMacControllerDriver->f_FM_MAC_Enable                    = DtsecEnable;
3235 +    p_FmMacControllerDriver->f_FM_MAC_Disable                   = DtsecDisable;
3236 +    p_FmMacControllerDriver->f_FM_MAC_Resume                    = NULL;
3237 +
3238 +    p_FmMacControllerDriver->f_FM_MAC_SetException              = DtsecSetException;
3239 +
3240 +    p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous            = DtsecSetPromiscuous;
3241 +    p_FmMacControllerDriver->f_FM_MAC_AdjustLink                = DtsecAdjustLink;
3242 +    p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan              = DtsecSetWakeOnLan;
3243 +    p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg            = DtsecRestartAutoneg;
3244 +
3245 +    p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp       = DtsecEnable1588TimeStamp;
3246 +    p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp      = DtsecDisable1588TimeStamp;
3247 +
3248 +    p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames      = DtsecTxMacPause;
3249 +    p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames          = DtsecSetTxPauseFrames;
3250 +    p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames    = DtsecRxIgnoreMacPause;
3251 +
3252 +    p_FmMacControllerDriver->f_FM_MAC_ResetCounters             = DtsecResetCounters;
3253 +    p_FmMacControllerDriver->f_FM_MAC_GetStatistics             = DtsecGetStatistics;
3254 +
3255 +    p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr             = DtsecModifyMacAddress;
3256 +    p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr            = DtsecAddHashMacAddress;
3257 +    p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr         = DtsecDelHashMacAddress;
3258 +    p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr      = DtsecAddExactMatchMacAddress;
3259 +    p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr  = DtsecDelExactMatchMacAddress;
3260 +    p_FmMacControllerDriver->f_FM_MAC_GetId                     = DtsecGetId;
3261 +    p_FmMacControllerDriver->f_FM_MAC_GetVersion                = DtsecGetVersion;
3262 +    p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength         = DtsecGetMaxFrameLength;
3263 +
3264 +    p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg           = DTSEC_MII_WritePhyReg;
3265 +    p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg            = DTSEC_MII_ReadPhyReg;
3266 +
3267 +}
3268 +
3269 +
3270 +/*****************************************************************************/
3271 +/*                      dTSEC Config Main Entry                             */
3272 +/*****************************************************************************/
3273 +
3274 +/* .............................................................................. */
3275 +
3276 +t_Handle  DTSEC_Config(t_FmMacParams *p_FmMacParam)
3277 +{
3278 +    t_Dtsec             *p_Dtsec;
3279 +    struct dtsec_cfg    *p_DtsecDriverParam;
3280 +    uintptr_t           baseAddr;
3281 +
3282 +    SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
3283 +
3284 +    baseAddr = p_FmMacParam->baseAddr;
3285 +
3286 +    /* allocate memory for the UCC GETH data structure. */
3287 +    p_Dtsec = (t_Dtsec *)XX_Malloc(sizeof(t_Dtsec));
3288 +    if (!p_Dtsec)
3289 +    {
3290 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("dTSEC driver structure"));
3291 +        return NULL;
3292 +    }
3293 +    memset(p_Dtsec, 0, sizeof(t_Dtsec));
3294 +    InitFmMacControllerDriver(&p_Dtsec->fmMacControllerDriver);
3295 +
3296 +    /* allocate memory for the dTSEC driver parameters data structure. */
3297 +    p_DtsecDriverParam = (struct dtsec_cfg *) XX_Malloc(sizeof(struct dtsec_cfg));
3298 +    if (!p_DtsecDriverParam)
3299 +    {
3300 +        XX_Free(p_Dtsec);
3301 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("dTSEC driver parameters"));
3302 +        return NULL;
3303 +    }
3304 +    memset(p_DtsecDriverParam, 0, sizeof(struct dtsec_cfg));
3305 +
3306 +    /* Plant parameter structure pointer */
3307 +    p_Dtsec->p_DtsecDriverParam = p_DtsecDriverParam;
3308 +
3309 +    fman_dtsec_defconfig(p_DtsecDriverParam);
3310 +
3311 +    p_Dtsec->p_MemMap           = (struct dtsec_regs *)UINT_TO_PTR(baseAddr);
3312 +    p_Dtsec->p_MiiMemMap        = (struct dtsec_mii_reg *)UINT_TO_PTR(baseAddr + DTSEC_TO_MII_OFFSET);
3313 +    p_Dtsec->addr               = ENET_ADDR_TO_UINT64(p_FmMacParam->addr);
3314 +    p_Dtsec->enetMode           = p_FmMacParam->enetMode;
3315 +    p_Dtsec->macId              = p_FmMacParam->macId;
3316 +    p_Dtsec->exceptions         = DEFAULT_exceptions;
3317 +    p_Dtsec->mdioIrq            = p_FmMacParam->mdioIrq;
3318 +    p_Dtsec->f_Exception        = p_FmMacParam->f_Exception;
3319 +    p_Dtsec->f_Event            = p_FmMacParam->f_Event;
3320 +    p_Dtsec->h_App              = p_FmMacParam->h_App;
3321 +    p_Dtsec->ptpTsuEnabled      = p_Dtsec->p_DtsecDriverParam->ptp_tsu_en;
3322 +    p_Dtsec->enTsuErrExeption   = p_Dtsec->p_DtsecDriverParam->ptp_exception_en;
3323 +    p_Dtsec->tbi_phy_addr       = p_Dtsec->p_DtsecDriverParam->tbi_phy_addr;
3324 +
3325 +    return p_Dtsec;
3326 +}
3327 --- /dev/null
3328 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h
3329 @@ -0,0 +1,228 @@
3330 +/*
3331 + * Copyright 2008-2013 Freescale Semiconductor Inc.
3332 + *
3333 + * Redistribution and use in source and binary forms, with or without
3334 + * modification, are permitted provided that the following conditions are met:
3335 + *     * Redistributions of source code must retain the above copyright
3336 + *       notice, this list of conditions and the following disclaimer.
3337 + *     * Redistributions in binary form must reproduce the above copyright
3338 + *       notice, this list of conditions and the following disclaimer in the
3339 + *       documentation and/or other materials provided with the distribution.
3340 + *     * Neither the name of Freescale Semiconductor nor the
3341 + *       names of its contributors may be used to endorse or promote products
3342 + *       derived from this software without specific prior written permission.
3343 + *
3344 + *
3345 + * ALTERNATIVELY, this software may be distributed under the terms of the
3346 + * GNU General Public License ("GPL") as published by the Free Software
3347 + * Foundation, either version 2 of that License or (at your option) any
3348 + * later version.
3349 + *
3350 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
3351 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
3352 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
3353 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
3354 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
3355 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
3356 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
3357 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3358 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3359 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3360 + */
3361 +
3362 +/******************************************************************************
3363 + @File          dtsec.h
3364 +
3365 + @Description   FM dTSEC ...
3366 +*//***************************************************************************/
3367 +#ifndef __DTSEC_H
3368 +#define __DTSEC_H
3369 +
3370 +#include "std_ext.h"
3371 +#include "error_ext.h"
3372 +#include "list_ext.h"
3373 +#include "enet_ext.h"
3374 +
3375 +#include "dtsec_mii_acc.h"
3376 +#include "fm_mac.h"
3377 +
3378 +
3379 +#define DEFAULT_exceptions            \
3380 +    ((uint32_t)(DTSEC_IMASK_BREN    | \
3381 +                DTSEC_IMASK_RXCEN   | \
3382 +                DTSEC_IMASK_BTEN    | \
3383 +                DTSEC_IMASK_TXCEN   | \
3384 +                DTSEC_IMASK_TXEEN   | \
3385 +                DTSEC_IMASK_ABRTEN  | \
3386 +                DTSEC_IMASK_LCEN    | \
3387 +                DTSEC_IMASK_CRLEN   | \
3388 +                DTSEC_IMASK_XFUNEN  | \
3389 +                DTSEC_IMASK_IFERREN | \
3390 +                DTSEC_IMASK_MAGEN   | \
3391 +                DTSEC_IMASK_TDPEEN  | \
3392 +                DTSEC_IMASK_RDPEEN))
3393 +
3394 +#define GET_EXCEPTION_FLAG(bitMask, exception)  switch (exception){ \
3395 +    case e_FM_MAC_EX_1G_BAB_RX:                                     \
3396 +        bitMask = DTSEC_IMASK_BREN; break;                          \
3397 +    case e_FM_MAC_EX_1G_RX_CTL:                                     \
3398 +        bitMask = DTSEC_IMASK_RXCEN; break;                         \
3399 +    case e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET:                    \
3400 +        bitMask = DTSEC_IMASK_GTSCEN ; break;                       \
3401 +    case e_FM_MAC_EX_1G_BAB_TX:                                     \
3402 +        bitMask = DTSEC_IMASK_BTEN   ; break;                       \
3403 +    case e_FM_MAC_EX_1G_TX_CTL:                                     \
3404 +        bitMask = DTSEC_IMASK_TXCEN  ; break;                       \
3405 +    case e_FM_MAC_EX_1G_TX_ERR:                                     \
3406 +        bitMask = DTSEC_IMASK_TXEEN  ; break;                       \
3407 +    case e_FM_MAC_EX_1G_LATE_COL:                                   \
3408 +        bitMask = DTSEC_IMASK_LCEN   ; break;                       \
3409 +    case e_FM_MAC_EX_1G_COL_RET_LMT:                                \
3410 +        bitMask = DTSEC_IMASK_CRLEN  ; break;                       \
3411 +    case e_FM_MAC_EX_1G_TX_FIFO_UNDRN:                              \
3412 +        bitMask = DTSEC_IMASK_XFUNEN ; break;                       \
3413 +    case e_FM_MAC_EX_1G_MAG_PCKT:                                   \
3414 +        bitMask = DTSEC_IMASK_MAGEN ; break;                        \
3415 +    case e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET:                         \
3416 +        bitMask = DTSEC_IMASK_MMRDEN; break;                        \
3417 +    case e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET:                         \
3418 +        bitMask = DTSEC_IMASK_MMWREN  ; break;                      \
3419 +    case e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET:                    \
3420 +        bitMask = DTSEC_IMASK_GRSCEN; break;                        \
3421 +    case e_FM_MAC_EX_1G_TX_DATA_ERR:                                \
3422 +        bitMask = DTSEC_IMASK_TDPEEN; break;                        \
3423 +    case e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL:                            \
3424 +        bitMask = DTSEC_IMASK_MSROEN ; break;                       \
3425 +    default: bitMask = 0;break;}
3426 +
3427 +
3428 +#define MAX_PACKET_ALIGNMENT        31
3429 +#define MAX_INTER_PACKET_GAP        0x7f
3430 +#define MAX_INTER_PALTERNATE_BEB    0x0f
3431 +#define MAX_RETRANSMISSION          0x0f
3432 +#define MAX_COLLISION_WINDOW        0x03ff
3433 +
3434 +
3435 +/********************* From mac ext ******************************************/
3436 +typedef  uint32_t t_ErrorDisable;
3437 +
3438 +#define ERROR_DISABLE_TRANSMIT              0x00400000
3439 +#define ERROR_DISABLE_LATE_COLLISION        0x00040000
3440 +#define ERROR_DISABLE_COLLISION_RETRY_LIMIT 0x00020000
3441 +#define ERROR_DISABLE_TxFIFO_UNDERRUN       0x00010000
3442 +#define ERROR_DISABLE_TxABORT               0x00008000
3443 +#define ERROR_DISABLE_INTERFACE             0x00004000
3444 +#define ERROR_DISABLE_TxDATA_PARITY         0x00000002
3445 +#define ERROR_DISABLE_RxDATA_PARITY         0x00000001
3446 +
3447 +/*****************************************************************************/
3448 +#define DTSEC_NUM_OF_PADDRS             15  /* number of pattern match registers (entries) */
3449 +
3450 +#define GROUP_ADDRESS                   0x0000010000000000LL /* Group address bit indication */
3451 +
3452 +#define HASH_TABLE_SIZE                 256 /* Hash table size (= 32 bits * 8 regs) */
3453 +
3454 +#define HASH_TABLE_SIZE                 256 /* Hash table size (32 bits * 8 regs) */
3455 +#define EXTENDED_HASH_TABLE_SIZE        512 /* Extended Hash table size (32 bits * 16 regs) */
3456 +
3457 +#define DTSEC_TO_MII_OFFSET             0x1000  /* number of pattern match registers (entries) */
3458 +
3459 +#define MAX_PHYS                    32 /* maximum number of phys */
3460 +
3461 +#define     VAL32BIT    0x100000000LL
3462 +#define     VAL22BIT    0x00400000
3463 +#define     VAL16BIT    0x00010000
3464 +#define     VAL12BIT    0x00001000
3465 +
3466 +/* CAR1/2 bits */
3467 +#define CAR1_TR64   0x80000000
3468 +#define CAR1_TR127  0x40000000
3469 +#define CAR1_TR255  0x20000000
3470 +#define CAR1_TR511  0x10000000
3471 +#define CAR1_TRK1   0x08000000
3472 +#define CAR1_TRMAX  0x04000000
3473 +#define CAR1_TRMGV  0x02000000
3474 +
3475 +#define CAR1_RBYT   0x00010000
3476 +#define CAR1_RPKT   0x00008000
3477 +#define CAR1_RMCA   0x00002000
3478 +#define CAR1_RBCA   0x00001000
3479 +#define CAR1_RXPF   0x00000400
3480 +#define CAR1_RALN   0x00000100
3481 +#define CAR1_RFLR   0x00000080
3482 +#define CAR1_RCDE   0x00000040
3483 +#define CAR1_RCSE   0x00000020
3484 +#define CAR1_RUND   0x00000010
3485 +#define CAR1_ROVR   0x00000008
3486 +#define CAR1_RFRG   0x00000004
3487 +#define CAR1_RJBR   0x00000002
3488 +#define CAR1_RDRP   0x00000001
3489 +
3490 +#define CAR2_TFCS   0x00040000
3491 +#define CAR2_TBYT   0x00002000
3492 +#define CAR2_TPKT   0x00001000
3493 +#define CAR2_TMCA   0x00000800
3494 +#define CAR2_TBCA   0x00000400
3495 +#define CAR2_TXPF   0x00000200
3496 +#define CAR2_TDRP   0x00000001
3497 +
3498 +typedef struct t_InternalStatistics
3499 +{
3500 +    uint64_t    tr64;
3501 +    uint64_t    tr127;
3502 +    uint64_t    tr255;
3503 +    uint64_t    tr511;
3504 +    uint64_t    tr1k;
3505 +    uint64_t    trmax;
3506 +    uint64_t    trmgv;
3507 +    uint64_t    rfrg;
3508 +    uint64_t    rjbr;
3509 +    uint64_t    rdrp;
3510 +    uint64_t    raln;
3511 +    uint64_t    rund;
3512 +    uint64_t    rovr;
3513 +    uint64_t    rxpf;
3514 +    uint64_t    txpf;
3515 +    uint64_t    rbyt;
3516 +    uint64_t    rpkt;
3517 +    uint64_t    rmca;
3518 +    uint64_t    rbca;
3519 +    uint64_t    rflr;
3520 +    uint64_t    rcde;
3521 +    uint64_t    rcse;
3522 +    uint64_t    tbyt;
3523 +    uint64_t    tpkt;
3524 +    uint64_t    tmca;
3525 +    uint64_t    tbca;
3526 +    uint64_t    tdrp;
3527 +    uint64_t    tfcs;
3528 +} t_InternalStatistics;
3529 +
3530 +typedef struct {
3531 +    t_FmMacControllerDriver     fmMacControllerDriver;
3532 +    t_Handle                    h_App;            /**< Handle to the upper layer application              */
3533 +    struct dtsec_regs           *p_MemMap;        /**< pointer to dTSEC memory mapped registers.          */
3534 +    struct dtsec_mii_reg        *p_MiiMemMap;     /**< pointer to dTSEC MII memory mapped registers.          */
3535 +    uint64_t                    addr;             /**< MAC address of device;                             */
3536 +    e_EnetMode                  enetMode;         /**< Ethernet physical interface  */
3537 +    t_FmMacExceptionCallback    *f_Exception;
3538 +    int                         mdioIrq;
3539 +    t_FmMacExceptionCallback    *f_Event;
3540 +    bool                        indAddrRegUsed[DTSEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
3541 +    uint64_t                    paddr[DTSEC_NUM_OF_PADDRS]; /**< MAC address for particular individual address recognition register */
3542 +    uint8_t                     numOfIndAddrInRegs; /**< Number of individual addresses in registers for this station. */
3543 +    bool                        halfDuplex;
3544 +    t_InternalStatistics        internalStatistics;
3545 +    t_EthHash                   *p_MulticastAddrHash;      /* pointer to driver's global address hash table  */
3546 +    t_EthHash                   *p_UnicastAddrHash;    /* pointer to driver's individual address hash table  */
3547 +    uint8_t                     macId;
3548 +    uint8_t                     tbi_phy_addr;
3549 +    uint32_t                    exceptions;
3550 +    bool                        ptpTsuEnabled;
3551 +    bool                        enTsuErrExeption;
3552 +    e_FmMacStatisticsLevel      statisticsLevel;
3553 +    struct dtsec_cfg            *p_DtsecDriverParam;
3554 +} t_Dtsec;
3555 +
3556 +
3557 +#endif /* __DTSEC_H */
3558 --- /dev/null
3559 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c
3560 @@ -0,0 +1,97 @@
3561 +/*
3562 + * Copyright 2008-2013 Freescale Semiconductor Inc.
3563 + *
3564 + * Redistribution and use in source and binary forms, with or without
3565 + * modification, are permitted provided that the following conditions are met:
3566 + *     * Redistributions of source code must retain the above copyright
3567 + *       notice, this list of conditions and the following disclaimer.
3568 + *     * Redistributions in binary form must reproduce the above copyright
3569 + *       notice, this list of conditions and the following disclaimer in the
3570 + *       documentation and/or other materials provided with the distribution.
3571 + *     * Neither the name of Freescale Semiconductor nor the
3572 + *       names of its contributors may be used to endorse or promote products
3573 + *       derived from this software without specific prior written permission.
3574 + *
3575 + *
3576 + * ALTERNATIVELY, this software may be distributed under the terms of the
3577 + * GNU General Public License ("GPL") as published by the Free Software
3578 + * Foundation, either version 2 of that License or (at your option) any
3579 + * later version.
3580 + *
3581 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
3582 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
3583 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
3584 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
3585 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
3586 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
3587 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
3588 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3589 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3590 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3591 + */
3592 +
3593 +
3594 +/******************************************************************************
3595 + @File          dtsec_mii_acc.c
3596 +
3597 + @Description   FM dtsec MII register access MAC ...
3598 +*//***************************************************************************/
3599 +
3600 +#include "error_ext.h"
3601 +#include "std_ext.h"
3602 +#include "fm_mac.h"
3603 +#include "dtsec.h"
3604 +#include "fsl_fman_dtsec_mii_acc.h"
3605 +
3606 +
3607 +/*****************************************************************************/
3608 +t_Error DTSEC_MII_WritePhyReg(t_Handle    h_Dtsec,
3609 +                              uint8_t     phyAddr,
3610 +                              uint8_t     reg,
3611 +                              uint16_t    data)
3612 +{
3613 +    t_Dtsec              *p_Dtsec = (t_Dtsec *)h_Dtsec;
3614 +    struct dtsec_mii_reg *miiregs;
3615 +    uint16_t              dtsec_freq;
3616 +    t_Error                   err;
3617 +
3618 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
3619 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
3620 +
3621 +    dtsec_freq = (uint16_t)(p_Dtsec->fmMacControllerDriver.clkFreq >> 1);
3622 +    miiregs = p_Dtsec->p_MiiMemMap;
3623 +
3624 +    err = (t_Error)fman_dtsec_mii_write_reg(miiregs, phyAddr, reg, data, dtsec_freq);
3625 +
3626 +    return err;
3627 +}
3628 +
3629 +/*****************************************************************************/
3630 +t_Error DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec,
3631 +                             uint8_t  phyAddr,
3632 +                             uint8_t  reg,
3633 +                             uint16_t *p_Data)
3634 +{
3635 +    t_Dtsec               *p_Dtsec = (t_Dtsec *)h_Dtsec;
3636 +    struct dtsec_mii_reg  *miiregs;
3637 +    uint16_t               dtsec_freq;
3638 +    t_Error                    err;
3639 +
3640 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
3641 +    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
3642 +
3643 +    dtsec_freq = (uint16_t)(p_Dtsec->fmMacControllerDriver.clkFreq >> 1);
3644 +    miiregs = p_Dtsec->p_MiiMemMap;
3645 +
3646 +    err = fman_dtsec_mii_read_reg(miiregs, phyAddr, reg, p_Data, dtsec_freq);
3647 +
3648 +    if (*p_Data == 0xffff)
3649 +        RETURN_ERROR(MINOR, E_NO_DEVICE,
3650 +                     ("Read wrong data (0xffff): phyAddr 0x%x, reg 0x%x",
3651 +                      phyAddr, reg));
3652 +    if (err)
3653 +        RETURN_ERROR(MINOR, (t_Error)err, NO_MSG);
3654 +
3655 +    return E_OK;
3656 +}
3657 +
3658 --- /dev/null
3659 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h
3660 @@ -0,0 +1,42 @@
3661 +/*
3662 + * Copyright 2008-2013 Freescale Semiconductor Inc.
3663 + *
3664 + * Redistribution and use in source and binary forms, with or without
3665 + * modification, are permitted provided that the following conditions are met:
3666 + *     * Redistributions of source code must retain the above copyright
3667 + *       notice, this list of conditions and the following disclaimer.
3668 + *     * Redistributions in binary form must reproduce the above copyright
3669 + *       notice, this list of conditions and the following disclaimer in the
3670 + *       documentation and/or other materials provided with the distribution.
3671 + *     * Neither the name of Freescale Semiconductor nor the
3672 + *       names of its contributors may be used to endorse or promote products
3673 + *       derived from this software without specific prior written permission.
3674 + *
3675 + *
3676 + * ALTERNATIVELY, this software may be distributed under the terms of the
3677 + * GNU General Public License ("GPL") as published by the Free Software
3678 + * Foundation, either version 2 of that License or (at your option) any
3679 + * later version.
3680 + *
3681 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
3682 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
3683 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
3684 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
3685 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
3686 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
3687 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
3688 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3689 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3690 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3691 + */
3692 +
3693 +#ifndef __DTSEC_MII_ACC_H
3694 +#define __DTSEC_MII_ACC_H
3695 +
3696 +#include "std_ext.h"
3697 +
3698 +
3699 +t_Error DTSEC_MII_WritePhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t data);
3700 +t_Error DTSEC_MII_ReadPhyReg(t_Handle  h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
3701 +
3702 +#endif /* __DTSEC_MII_ACC_H */
3703 --- /dev/null
3704 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c
3705 @@ -0,0 +1,658 @@
3706 +/*
3707 + * Copyright 2008-2012 Freescale Semiconductor Inc.
3708 + *
3709 + * Redistribution and use in source and binary forms, with or without
3710 + * modification, are permitted provided that the following conditions are met:
3711 + *     * Redistributions of source code must retain the above copyright
3712 + *       notice, this list of conditions and the following disclaimer.
3713 + *     * Redistributions in binary form must reproduce the above copyright
3714 + *       notice, this list of conditions and the following disclaimer in the
3715 + *       documentation and/or other materials provided with the distribution.
3716 + *     * Neither the name of Freescale Semiconductor nor the
3717 + *       names of its contributors may be used to endorse or promote products
3718 + *       derived from this software without specific prior written permission.
3719 + *
3720 + *
3721 + * ALTERNATIVELY, this software may be distributed under the terms of the
3722 + * GNU General Public License ("GPL") as published by the Free Software
3723 + * Foundation, either version 2 of that License or (at your option) any
3724 + * later version.
3725 + *
3726 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
3727 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
3728 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
3729 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
3730 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
3731 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
3732 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
3733 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3734 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3735 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3736 + */
3737 +
3738 +
3739 +/******************************************************************************
3740 + @File          fm_mac.c
3741 +
3742 + @Description   FM MAC ...
3743 +*//***************************************************************************/
3744 +#include "std_ext.h"
3745 +#include "string_ext.h"
3746 +#include "sprint_ext.h"
3747 +#include "error_ext.h"
3748 +#include "fm_ext.h"
3749 +
3750 +#include "fm_common.h"
3751 +#include "fm_mac.h"
3752 +
3753 +
3754 +/* ......................................................................... */
3755 +
3756 +t_Handle FM_MAC_Config (t_FmMacParams *p_FmMacParam)
3757 +{
3758 +    t_FmMacControllerDriver *p_FmMacControllerDriver;
3759 +    uint16_t                fmClkFreq;
3760 +
3761 +    SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_INVALID_HANDLE, NULL);
3762 +
3763 +    fmClkFreq = FmGetClockFreq(p_FmMacParam->h_Fm);
3764 +    if (fmClkFreq == 0)
3765 +    {
3766 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Can't get clock for MAC!"));
3767 +        return NULL;
3768 +    }
3769 +
3770 +#if (DPAA_VERSION == 10)
3771 +    if (ENET_SPEED_FROM_MODE(p_FmMacParam->enetMode) < e_ENET_SPEED_10000)
3772 +        p_FmMacControllerDriver = (t_FmMacControllerDriver *)DTSEC_Config(p_FmMacParam);
3773 +    else
3774 +#if FM_MAX_NUM_OF_10G_MACS > 0
3775 +        p_FmMacControllerDriver = (t_FmMacControllerDriver *)TGEC_Config(p_FmMacParam);
3776 +#else
3777 +        p_FmMacControllerDriver = NULL;
3778 +#endif /* FM_MAX_NUM_OF_10G_MACS > 0 */
3779 +#else
3780 +    p_FmMacControllerDriver = (t_FmMacControllerDriver *)MEMAC_Config(p_FmMacParam);
3781 +#endif /* (DPAA_VERSION == 10) */
3782 +
3783 +    if (!p_FmMacControllerDriver)
3784 +        return NULL;
3785 +
3786 +    p_FmMacControllerDriver->h_Fm           = p_FmMacParam->h_Fm;
3787 +    p_FmMacControllerDriver->enetMode       = p_FmMacParam->enetMode;
3788 +    p_FmMacControllerDriver->macId          = p_FmMacParam->macId;
3789 +    p_FmMacControllerDriver->resetOnInit    = DEFAULT_resetOnInit;
3790 +
3791 +    p_FmMacControllerDriver->clkFreq        = fmClkFreq;
3792 +
3793 +    return (t_Handle)p_FmMacControllerDriver;
3794 +}
3795 +
3796 +/* ......................................................................... */
3797 +
3798 +t_Error FM_MAC_Init (t_Handle h_FmMac)
3799 +{
3800 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3801 +
3802 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3803 +
3804 +    if (p_FmMacControllerDriver->resetOnInit &&
3805 +        !p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit &&
3806 +        (FmResetMac(p_FmMacControllerDriver->h_Fm,
3807 +                    ((ENET_INTERFACE_FROM_MODE(p_FmMacControllerDriver->enetMode) == e_ENET_IF_XGMII) ?
3808 +                        e_FM_MAC_10G : e_FM_MAC_1G),
3809 +                    p_FmMacControllerDriver->macId) != E_OK))
3810 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Can't reset MAC!"));
3811 +
3812 +    if (p_FmMacControllerDriver->f_FM_MAC_Init)
3813 +        return p_FmMacControllerDriver->f_FM_MAC_Init(h_FmMac);
3814 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3815 +}
3816 +
3817 +/* ......................................................................... */
3818 +
3819 +t_Error FM_MAC_Free (t_Handle h_FmMac)
3820 +{
3821 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3822 +
3823 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3824 +
3825 +    if (p_FmMacControllerDriver->f_FM_MAC_Free)
3826 +        return p_FmMacControllerDriver->f_FM_MAC_Free(h_FmMac);
3827 +
3828 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3829 +}
3830 +
3831 +/* ......................................................................... */
3832 +
3833 +t_Error FM_MAC_ConfigResetOnInit (t_Handle h_FmMac, bool enable)
3834 +{
3835 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3836 +
3837 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3838 +
3839 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit)
3840 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit(h_FmMac, enable);
3841 +
3842 +    p_FmMacControllerDriver->resetOnInit = enable;
3843 +
3844 +    return E_OK;
3845 +}
3846 +
3847 +/* ......................................................................... */
3848 +
3849 +t_Error FM_MAC_ConfigLoopback (t_Handle h_FmMac, bool newVal)
3850 +{
3851 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3852 +
3853 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3854 +
3855 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback)
3856 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback(h_FmMac, newVal);
3857 +
3858 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3859 +}
3860 +
3861 +/* ......................................................................... */
3862 +
3863 +t_Error FM_MAC_ConfigMaxFrameLength (t_Handle h_FmMac, uint16_t newVal)
3864 +{
3865 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3866 +
3867 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3868 +
3869 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength)
3870 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength(h_FmMac, newVal);
3871 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3872 +}
3873 +
3874 +/* ......................................................................... */
3875 +
3876 +t_Error FM_MAC_ConfigWan (t_Handle h_FmMac, bool flag)
3877 +{
3878 +   t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3879 +
3880 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3881 +
3882 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigWan)
3883 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigWan(h_FmMac, flag);
3884 +
3885 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3886 +}
3887 +
3888 +/* ......................................................................... */
3889 +
3890 +t_Error FM_MAC_ConfigPadAndCrc (t_Handle h_FmMac, bool newVal)
3891 +{
3892 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3893 +
3894 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3895 +
3896 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc)
3897 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc(h_FmMac, newVal);
3898 +
3899 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3900 +}
3901 +
3902 +/* ......................................................................... */
3903 +
3904 +t_Error FM_MAC_ConfigHalfDuplex (t_Handle h_FmMac, bool newVal)
3905 +{
3906 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3907 +
3908 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3909 +
3910 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex)
3911 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex(h_FmMac,newVal);
3912 +
3913 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3914 +}
3915 +
3916 +/* ......................................................................... */
3917 +
3918 +t_Error FM_MAC_ConfigTbiPhyAddr (t_Handle h_FmMac, uint8_t newVal)
3919 +{
3920 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3921 +
3922 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3923 +
3924 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigTbiPhyAddr)
3925 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigTbiPhyAddr(h_FmMac,newVal);
3926 +
3927 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3928 +}
3929 +
3930 +/* ......................................................................... */
3931 +
3932 +t_Error FM_MAC_ConfigLengthCheck (t_Handle h_FmMac, bool newVal)
3933 +{
3934 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3935 +
3936 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3937 +
3938 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck)
3939 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck(h_FmMac,newVal);
3940 +
3941 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3942 +}
3943 +
3944 +/* ......................................................................... */
3945 +
3946 +t_Error FM_MAC_ConfigException (t_Handle h_FmMac, e_FmMacExceptions ex, bool enable)
3947 +{
3948 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3949 +
3950 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3951 +
3952 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigException)
3953 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigException(h_FmMac, ex, enable);
3954 +
3955 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3956 +}
3957 +
3958 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
3959 +/* ......................................................................... */
3960 +
3961 +t_Error FM_MAC_ConfigSkipFman11Workaround (t_Handle h_FmMac)
3962 +{
3963 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3964 +
3965 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3966 +
3967 +    if (p_FmMacControllerDriver->f_FM_MAC_ConfigSkipFman11Workaround)
3968 +        return p_FmMacControllerDriver->f_FM_MAC_ConfigSkipFman11Workaround(h_FmMac);
3969 +
3970 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3971 +}
3972 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
3973 +
3974 +
3975 +/*****************************************************************************/
3976 +/* Run Time Control                                                          */
3977 +/*****************************************************************************/
3978 +
3979 +/* ......................................................................... */
3980 +
3981 +t_Error FM_MAC_Enable  (t_Handle h_FmMac,  e_CommMode mode)
3982 +{
3983 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3984 +
3985 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
3986 +
3987 +    if (p_FmMacControllerDriver->f_FM_MAC_Enable)
3988 +        return p_FmMacControllerDriver->f_FM_MAC_Enable(h_FmMac, mode);
3989 +
3990 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
3991 +}
3992 +
3993 +/* ......................................................................... */
3994 +
3995 +t_Error FM_MAC_Disable (t_Handle h_FmMac, e_CommMode mode)
3996 +{
3997 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
3998 +
3999 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4000 +
4001 +    if (p_FmMacControllerDriver->f_FM_MAC_Disable)
4002 +        return p_FmMacControllerDriver->f_FM_MAC_Disable(h_FmMac, mode);
4003 +
4004 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4005 +}
4006 +
4007 +t_Error FM_MAC_Resume (t_Handle h_FmMac)
4008 +{
4009 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4010 +
4011 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4012 +
4013 +    if (p_FmMacControllerDriver->f_FM_MAC_Resume)
4014 +        return p_FmMacControllerDriver->f_FM_MAC_Resume(h_FmMac);
4015 +
4016 +    return E_OK;
4017 +}
4018 +
4019 +/* ......................................................................... */
4020 +
4021 +t_Error FM_MAC_Enable1588TimeStamp (t_Handle h_FmMac)
4022 +{
4023 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4024 +
4025 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4026 +
4027 +    if (p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp)
4028 +        return p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp(h_FmMac);
4029 +
4030 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4031 +}
4032 +
4033 +/* ......................................................................... */
4034 +
4035 +t_Error FM_MAC_Disable1588TimeStamp (t_Handle h_FmMac)
4036 +{
4037 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4038 +
4039 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4040 +
4041 +    if (p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp)
4042 +        return p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp(h_FmMac);
4043 +
4044 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4045 +}
4046 +
4047 +/* ......................................................................... */
4048 +
4049 +t_Error FM_MAC_SetTxAutoPauseFrames(t_Handle h_FmMac,
4050 +                                    uint16_t pauseTime)
4051 +{
4052 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4053 +
4054 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4055 +
4056 +    if (p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames)
4057 +        return p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames(h_FmMac,
4058 +                                                                      pauseTime);
4059 +
4060 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4061 +}
4062 +
4063 +/* ......................................................................... */
4064 +
4065 +t_Error FM_MAC_SetTxPauseFrames(t_Handle h_FmMac,
4066 +                                uint8_t  priority,
4067 +                                uint16_t pauseTime,
4068 +                                uint16_t threshTime)
4069 +{
4070 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4071 +
4072 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4073 +
4074 +    if (p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames)
4075 +        return p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames(h_FmMac,
4076 +                                                                  priority,
4077 +                                                                  pauseTime,
4078 +                                                                  threshTime);
4079 +
4080 +    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
4081 +}
4082 +
4083 +/* ......................................................................... */
4084 +
4085 +t_Error FM_MAC_SetRxIgnorePauseFrames (t_Handle h_FmMac, bool en)
4086 +{
4087 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4088 +
4089 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4090 +
4091 +    if (p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames)
4092 +        return p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames(h_FmMac, en);
4093 +
4094 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4095 +}
4096 +
4097 +/* ......................................................................... */
4098 +
4099 +t_Error FM_MAC_SetWakeOnLan (t_Handle h_FmMac, bool en)
4100 +{
4101 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4102 +
4103 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4104 +
4105 +    if (p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan)
4106 +        return p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan(h_FmMac, en);
4107 +
4108 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4109 +}
4110 +
4111 +/* ......................................................................... */
4112 +
4113 +t_Error FM_MAC_ResetCounters (t_Handle h_FmMac)
4114 +{
4115 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4116 +
4117 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4118 +
4119 +    if (p_FmMacControllerDriver->f_FM_MAC_ResetCounters)
4120 +        return p_FmMacControllerDriver->f_FM_MAC_ResetCounters(h_FmMac);
4121 +
4122 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4123 +}
4124 +
4125 +/* ......................................................................... */
4126 +
4127 +t_Error FM_MAC_SetException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable)
4128 +{
4129 +   t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4130 +
4131 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4132 +
4133 +    if (p_FmMacControllerDriver->f_FM_MAC_SetException)
4134 +        return p_FmMacControllerDriver->f_FM_MAC_SetException(h_FmMac, ex, enable);
4135 +
4136 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4137 +}
4138 +
4139 +/* ......................................................................... */
4140 +
4141 +t_Error FM_MAC_SetStatistics (t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel)
4142 +{
4143 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4144 +
4145 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4146 +
4147 +    if (p_FmMacControllerDriver->f_FM_MAC_SetStatistics)
4148 +        return p_FmMacControllerDriver->f_FM_MAC_SetStatistics(h_FmMac, statisticsLevel);
4149 +
4150 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4151 +}
4152 +
4153 +/* ......................................................................... */
4154 +
4155 +t_Error FM_MAC_GetStatistics (t_Handle h_FmMac, t_FmMacStatistics *p_Statistics)
4156 +{
4157 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4158 +
4159 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4160 +
4161 +    if (p_FmMacControllerDriver->f_FM_MAC_GetStatistics)
4162 +        return p_FmMacControllerDriver->f_FM_MAC_GetStatistics(h_FmMac, p_Statistics);
4163 +
4164 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4165 +}
4166 +
4167 +/* ......................................................................... */
4168 +
4169 +t_Error FM_MAC_ModifyMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
4170 +{
4171 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4172 +
4173 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4174 +
4175 +    if (p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr)
4176 +        return p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr(h_FmMac, p_EnetAddr);
4177 +
4178 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4179 +}
4180 +
4181 +/* ......................................................................... */
4182 +
4183 +t_Error FM_MAC_AddHashMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
4184 +{
4185 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4186 +
4187 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4188 +
4189 +    if (p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr)
4190 +        return p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr(h_FmMac, p_EnetAddr);
4191 +
4192 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4193 +}
4194 +
4195 +/* ......................................................................... */
4196 +
4197 +t_Error FM_MAC_RemoveHashMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
4198 +{
4199 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4200 +
4201 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4202 +
4203 +    if (p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr)
4204 +        return p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr(h_FmMac, p_EnetAddr);
4205 +
4206 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4207 +}
4208 +
4209 +/* ......................................................................... */
4210 +
4211 +t_Error FM_MAC_AddExactMatchMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
4212 +{
4213 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4214 +
4215 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4216 +
4217 +    if (p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr)
4218 +        return p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr(h_FmMac, p_EnetAddr);
4219 +
4220 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4221 +}
4222 +
4223 +/* ......................................................................... */
4224 +
4225 +t_Error FM_MAC_RemovelExactMatchMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
4226 +{
4227 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4228 +
4229 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4230 +
4231 +    if (p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr)
4232 +        return p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr(h_FmMac, p_EnetAddr);
4233 +
4234 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4235 +}
4236 +
4237 +/* ......................................................................... */
4238 +
4239 +t_Error FM_MAC_GetVesrion (t_Handle h_FmMac, uint32_t *macVresion)
4240 +{
4241 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4242 +
4243 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4244 +
4245 +    if (p_FmMacControllerDriver->f_FM_MAC_GetVersion)
4246 +        return p_FmMacControllerDriver->f_FM_MAC_GetVersion(h_FmMac, macVresion);
4247 +
4248 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4249 +
4250 +}
4251 +
4252 +/* ......................................................................... */
4253 +
4254 +t_Error FM_MAC_GetId (t_Handle h_FmMac, uint32_t *macId)
4255 +{
4256 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4257 +
4258 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4259 +
4260 +    if (p_FmMacControllerDriver->f_FM_MAC_GetId)
4261 +        return p_FmMacControllerDriver->f_FM_MAC_GetId(h_FmMac, macId);
4262 +
4263 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4264 +}
4265 +
4266 +/* ......................................................................... */
4267 +
4268 +t_Error FM_MAC_SetPromiscuous (t_Handle h_FmMac, bool newVal)
4269 +{
4270 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4271 +
4272 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4273 +
4274 +    if (p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous)
4275 +        return p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous(h_FmMac, newVal);
4276 +
4277 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4278 +}
4279 +
4280 +/* ......................................................................... */
4281 +
4282 +t_Error FM_MAC_AdjustLink(t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex)
4283 +{
4284 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4285 +
4286 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4287 +
4288 +    if (p_FmMacControllerDriver->f_FM_MAC_AdjustLink)
4289 +        return p_FmMacControllerDriver->f_FM_MAC_AdjustLink(h_FmMac, speed, fullDuplex);
4290 +
4291 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4292 +}
4293 +
4294 +/* ......................................................................... */
4295 +
4296 +t_Error FM_MAC_RestartAutoneg(t_Handle h_FmMac)
4297 +{
4298 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4299 +
4300 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4301 +
4302 +    if (p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg)
4303 +        return p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg(h_FmMac);
4304 +
4305 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4306 +}
4307 +
4308 +/* ......................................................................... */
4309 +
4310 +t_Error FM_MAC_MII_WritePhyReg (t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data)
4311 +{
4312 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4313 +
4314 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4315 +
4316 +    if (p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg)
4317 +        return p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg(h_FmMac, phyAddr, reg, data);
4318 +
4319 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4320 +}
4321 +
4322 +/* ......................................................................... */
4323 +
4324 +t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data)
4325 +{
4326 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4327 +
4328 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4329 +
4330 +    if (p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg)
4331 +        return p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg(h_FmMac, phyAddr, reg, p_Data);
4332 +
4333 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4334 +}
4335 +
4336 +/* ......................................................................... */
4337 +
4338 +uint16_t FM_MAC_GetMaxFrameLength(t_Handle h_FmMac)
4339 +{
4340 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4341 +
4342 +    SANITY_CHECK_RETURN_VALUE(p_FmMacControllerDriver, E_INVALID_HANDLE, 0);
4343 +
4344 +    if (p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength)
4345 +        return p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength(h_FmMac);
4346 +
4347 +    REPORT_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4348 +    return 0;
4349 +}
4350 +
4351 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
4352 +/*****************************************************************************/
4353 +t_Error FM_MAC_DumpRegs(t_Handle h_FmMac)
4354 +{
4355 +    t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
4356 +
4357 +    SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
4358 +
4359 +    if (p_FmMacControllerDriver->f_FM_MAC_DumpRegs)
4360 +         return p_FmMacControllerDriver->f_FM_MAC_DumpRegs(h_FmMac);
4361 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
4362 +}
4363 +#endif /* (defined(DEBUG_ERRORS) && ... */
4364 --- /dev/null
4365 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h
4366 @@ -0,0 +1,225 @@
4367 +/*
4368 + * Copyright 2008-2012 Freescale Semiconductor Inc.
4369 + *
4370 + * Redistribution and use in source and binary forms, with or without
4371 + * modification, are permitted provided that the following conditions are met:
4372 + *     * Redistributions of source code must retain the above copyright
4373 + *       notice, this list of conditions and the following disclaimer.
4374 + *     * Redistributions in binary form must reproduce the above copyright
4375 + *       notice, this list of conditions and the following disclaimer in the
4376 + *       documentation and/or other materials provided with the distribution.
4377 + *     * Neither the name of Freescale Semiconductor nor the
4378 + *       names of its contributors may be used to endorse or promote products
4379 + *       derived from this software without specific prior written permission.
4380 + *
4381 + *
4382 + * ALTERNATIVELY, this software may be distributed under the terms of the
4383 + * GNU General Public License ("GPL") as published by the Free Software
4384 + * Foundation, either version 2 of that License or (at your option) any
4385 + * later version.
4386 + *
4387 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4388 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4389 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4390 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4391 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4392 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4393 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4394 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4395 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4396 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4397 + */
4398 +
4399 +
4400 +/******************************************************************************
4401 + @File          fm_mac.h
4402 +
4403 + @Description   FM MAC ...
4404 +*//***************************************************************************/
4405 +#ifndef __FM_MAC_H
4406 +#define __FM_MAC_H
4407 +
4408 +#include "std_ext.h"
4409 +#include "error_ext.h"
4410 +#include "list_ext.h"
4411 +#include "fm_mac_ext.h"
4412 +#include "fm_common.h"
4413 +
4414 +
4415 +#define __ERR_MODULE__  MODULE_FM_MAC
4416 +
4417 +/**************************************************************************//**
4418 + @Description       defaults
4419 +*//***************************************************************************/
4420 +
4421 +
4422 +#define DEFAULT_halfDuplex                  FALSE
4423 +#define DEFAULT_padAndCrcEnable             TRUE
4424 +#define DEFAULT_resetOnInit                 FALSE
4425 +
4426 +
4427 +typedef struct {
4428 +    uint64_t addr;      /* Ethernet Address  */
4429 +    t_List   node;
4430 +} t_EthHashEntry;
4431 +#define ETH_HASH_ENTRY_OBJ(ptr) LIST_OBJECT(ptr, t_EthHashEntry, node)
4432 +
4433 +typedef struct {
4434 +    uint16_t    size;
4435 +    t_List      *p_Lsts;
4436 +} t_EthHash;
4437 +
4438 +typedef struct {
4439 +    t_Error (*f_FM_MAC_Init) (t_Handle h_FmMac);
4440 +    t_Error (*f_FM_MAC_Free) (t_Handle h_FmMac);
4441 +
4442 +    t_Error (*f_FM_MAC_SetStatistics) (t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel);
4443 +    t_Error (*f_FM_MAC_ConfigLoopback) (t_Handle h_FmMac, bool newVal);
4444 +    t_Error (*f_FM_MAC_ConfigMaxFrameLength) (t_Handle h_FmMac, uint16_t newVal);
4445 +    t_Error (*f_FM_MAC_ConfigWan) (t_Handle h_FmMac, bool flag);
4446 +    t_Error (*f_FM_MAC_ConfigPadAndCrc) (t_Handle h_FmMac, bool newVal);
4447 +    t_Error (*f_FM_MAC_ConfigHalfDuplex) (t_Handle h_FmMac, bool newVal);
4448 +    t_Error (*f_FM_MAC_ConfigLengthCheck) (t_Handle h_FmMac, bool newVal);
4449 +    t_Error (*f_FM_MAC_ConfigTbiPhyAddr) (t_Handle h_FmMac, uint8_t newVal);
4450 +    t_Error (*f_FM_MAC_ConfigException) (t_Handle h_FmMac, e_FmMacExceptions, bool enable);
4451 +    t_Error (*f_FM_MAC_ConfigResetOnInit) (t_Handle h_FmMac, bool enable);
4452 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
4453 +    t_Error (*f_FM_MAC_ConfigSkipFman11Workaround) (t_Handle h_FmMac);
4454 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
4455 +
4456 +    t_Error (*f_FM_MAC_SetException) (t_Handle h_FmMac, e_FmMacExceptions ex, bool enable);
4457 +
4458 +    t_Error (*f_FM_MAC_Enable)  (t_Handle h_FmMac,  e_CommMode mode);
4459 +    t_Error (*f_FM_MAC_Disable) (t_Handle h_FmMac, e_CommMode mode);
4460 +    t_Error (*f_FM_MAC_Resume)  (t_Handle h_FmMac);
4461 +    t_Error (*f_FM_MAC_Enable1588TimeStamp) (t_Handle h_FmMac);
4462 +    t_Error (*f_FM_MAC_Disable1588TimeStamp) (t_Handle h_FmMac);
4463 +    t_Error (*f_FM_MAC_Reset)   (t_Handle h_FmMac, bool wait);
4464 +
4465 +    t_Error (*f_FM_MAC_SetTxAutoPauseFrames) (t_Handle h_FmMac,
4466 +                                              uint16_t pauseTime);
4467 +    t_Error (*f_FM_MAC_SetTxPauseFrames) (t_Handle h_FmMac,
4468 +                                          uint8_t  priority,
4469 +                                          uint16_t pauseTime,
4470 +                                          uint16_t threshTime);
4471 +    t_Error (*f_FM_MAC_SetRxIgnorePauseFrames) (t_Handle h_FmMac, bool en);
4472 +
4473 +    t_Error (*f_FM_MAC_ResetCounters) (t_Handle h_FmMac);
4474 +    t_Error (*f_FM_MAC_GetStatistics) (t_Handle h_FmMac, t_FmMacStatistics *p_Statistics);
4475 +
4476 +    t_Error (*f_FM_MAC_ModifyMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
4477 +    t_Error (*f_FM_MAC_AddHashMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
4478 +    t_Error (*f_FM_MAC_RemoveHashMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
4479 +    t_Error (*f_FM_MAC_AddExactMatchMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
4480 +    t_Error (*f_FM_MAC_RemovelExactMatchMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
4481 +
4482 +    t_Error (*f_FM_MAC_SetPromiscuous) (t_Handle h_FmMac, bool newVal);
4483 +    t_Error (*f_FM_MAC_AdjustLink)     (t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex);
4484 +    t_Error (*f_FM_MAC_RestartAutoneg) (t_Handle h_FmMac);
4485 +
4486 +    t_Error (*f_FM_MAC_SetWakeOnLan)   (t_Handle h_FmMac, bool en);
4487 +
4488 +    t_Error (*f_FM_MAC_GetId) (t_Handle h_FmMac, uint32_t *macId);
4489 +
4490 +    t_Error (*f_FM_MAC_GetVersion) (t_Handle h_FmMac, uint32_t *macVersion);
4491 +
4492 +    uint16_t (*f_FM_MAC_GetMaxFrameLength) (t_Handle h_FmMac);
4493 +
4494 +    t_Error (*f_FM_MAC_MII_WritePhyReg)(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data);
4495 +    t_Error (*f_FM_MAC_MII_ReadPhyReg)(t_Handle h_FmMac,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
4496 +
4497 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
4498 +    t_Error (*f_FM_MAC_DumpRegs) (t_Handle h_FmMac);
4499 +#endif /* (defined(DEBUG_ERRORS) && ... */
4500 +
4501 +    t_Handle            h_Fm;
4502 +    t_FmRevisionInfo    fmRevInfo;
4503 +    e_EnetMode          enetMode;
4504 +    uint8_t             macId;
4505 +    bool                resetOnInit;
4506 +    uint16_t            clkFreq;
4507 +} t_FmMacControllerDriver;
4508 +
4509 +
4510 +#if (DPAA_VERSION == 10)
4511 +t_Handle    DTSEC_Config(t_FmMacParams *p_FmMacParam);
4512 +t_Handle    TGEC_Config(t_FmMacParams *p_FmMacParams);
4513 +#else
4514 +t_Handle    MEMAC_Config(t_FmMacParams *p_FmMacParam);
4515 +#endif /* (DPAA_VERSION == 10) */
4516 +uint16_t    FM_MAC_GetMaxFrameLength(t_Handle FmMac);
4517 +
4518 +
4519 +/* ........................................................................... */
4520 +
4521 +static __inline__ t_EthHashEntry *DequeueAddrFromHashEntry(t_List *p_AddrLst)
4522 +{
4523 +   t_EthHashEntry *p_HashEntry = NULL;
4524 +    if (!LIST_IsEmpty(p_AddrLst))
4525 +    {
4526 +        p_HashEntry = ETH_HASH_ENTRY_OBJ(p_AddrLst->p_Next);
4527 +        LIST_DelAndInit(&p_HashEntry->node);
4528 +    }
4529 +    return p_HashEntry;
4530 +}
4531 +
4532 +/* ........................................................................... */
4533 +
4534 +static __inline__ void FreeHashTable(t_EthHash *p_Hash)
4535 +{
4536 +    t_EthHashEntry  *p_HashEntry;
4537 +    int             i = 0;
4538 +
4539 +    if (p_Hash)
4540 +    {
4541 +        if  (p_Hash->p_Lsts)
4542 +        {
4543 +            for (i=0; i<p_Hash->size; i++)
4544 +            {
4545 +                p_HashEntry = DequeueAddrFromHashEntry(&p_Hash->p_Lsts[i]);
4546 +                while (p_HashEntry)
4547 +                {
4548 +                    XX_Free(p_HashEntry);
4549 +                    p_HashEntry = DequeueAddrFromHashEntry(&p_Hash->p_Lsts[i]);
4550 +                }
4551 +            }
4552 +
4553 +            XX_Free(p_Hash->p_Lsts);
4554 +        }
4555 +
4556 +        XX_Free(p_Hash);
4557 +    }
4558 +}
4559 +
4560 +/* ........................................................................... */
4561 +
4562 +static __inline__ t_EthHash * AllocHashTable(uint16_t size)
4563 +{
4564 +    uint32_t    i;
4565 +    t_EthHash *p_Hash;
4566 +
4567 +    /* Allocate address hash table */
4568 +    p_Hash = (t_EthHash *)XX_Malloc(sizeof(t_EthHash));
4569 +    if (!p_Hash)
4570 +    {
4571 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Address hash table"));
4572 +        return NULL;
4573 +    }
4574 +    p_Hash->size = size;
4575 +
4576 +    p_Hash->p_Lsts = (t_List *)XX_Malloc(p_Hash->size*sizeof(t_List));
4577 +    if (!p_Hash->p_Lsts)
4578 +    {
4579 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Address hash table"));
4580 +        XX_Free(p_Hash);
4581 +        return NULL;
4582 +    }
4583 +
4584 +    for (i=0 ; i<p_Hash->size; i++)
4585 +        INIT_LIST(&p_Hash->p_Lsts[i]);
4586 +
4587 +    return p_Hash;
4588 +}
4589 +
4590 +
4591 +#endif /* __FM_MAC_H */
4592 --- /dev/null
4593 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.c
4594 @@ -0,0 +1,119 @@
4595 +/*
4596 + * Copyright 2008-2012 Freescale Semiconductor Inc.
4597 + *
4598 + * Redistribution and use in source and binary forms, with or without
4599 + * modification, are permitted provided that the following conditions are met:
4600 + *     * Redistributions of source code must retain the above copyright
4601 + *       notice, this list of conditions and the following disclaimer.
4602 + *     * Redistributions in binary form must reproduce the above copyright
4603 + *       notice, this list of conditions and the following disclaimer in the
4604 + *       documentation and/or other materials provided with the distribution.
4605 + *     * Neither the name of Freescale Semiconductor nor the
4606 + *       names of its contributors may be used to endorse or promote products
4607 + *       derived from this software without specific prior written permission.
4608 + *
4609 + *
4610 + * ALTERNATIVELY, this software may be distributed under the terms of the
4611 + * GNU General Public License ("GPL") as published by the Free Software
4612 + * Foundation, either version 2 of that License or (at your option) any
4613 + * later version.
4614 + *
4615 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4616 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4617 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4618 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4619 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4620 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4621 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4622 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4623 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4624 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4625 + */
4626 +
4627 +
4628 +#include "fman_crc32.h"
4629 +#include "common/general.h"
4630 +
4631 +
4632 +/* precomputed CRC values for address hashing */
4633 +static const uint32_t crc_tbl[256] = {
4634 +       0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
4635 +       0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
4636 +       0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
4637 +       0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
4638 +       0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
4639 +       0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
4640 +       0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
4641 +       0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
4642 +       0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
4643 +       0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
4644 +       0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
4645 +       0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
4646 +       0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
4647 +       0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
4648 +       0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
4649 +       0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
4650 +       0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
4651 +       0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
4652 +       0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
4653 +       0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
4654 +       0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
4655 +       0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
4656 +       0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
4657 +       0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
4658 +       0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
4659 +       0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
4660 +       0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
4661 +       0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
4662 +       0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
4663 +       0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
4664 +       0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
4665 +       0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
4666 +       0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
4667 +       0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
4668 +       0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
4669 +       0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
4670 +       0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
4671 +       0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
4672 +       0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
4673 +       0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
4674 +       0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
4675 +       0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
4676 +       0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
4677 +};
4678 +
4679 +/* Get the mirrored value of a byte size number. (0x11010011 --> 0x11001011) */
4680 +static inline uint8_t get_mirror8(uint8_t n)
4681 +{
4682 +       uint8_t mirror[16] = {
4683 +               0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
4684 +               0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
4685 +       };
4686 +       return (uint8_t)(((mirror[n & 0x0f] << 4) | (mirror[n >> 4])));
4687 +}
4688 +
4689 +static inline uint32_t get_mirror32(uint32_t n)
4690 +{
4691 +       return ((uint32_t)get_mirror8((uint8_t)(n))<<24) |
4692 +               ((uint32_t)get_mirror8((uint8_t)(n>>8))<<16) |
4693 +               ((uint32_t)get_mirror8((uint8_t)(n>>16))<<8) |
4694 +               ((uint32_t)get_mirror8((uint8_t)(n>>24)));
4695 +}
4696 +
4697 +uint32_t get_mac_addr_crc(uint64_t _addr)
4698 +{
4699 +       uint32_t i;
4700 +       uint8_t  data;
4701 +       uint32_t crc;
4702 +
4703 +       /* CRC calculation */
4704 +       crc = 0xffffffff;
4705 +       for (i = 0; i < 6; i++) {
4706 +               data = (uint8_t)(_addr >> ((5-i)*8));
4707 +               crc = crc ^ data;
4708 +               crc = crc_tbl[crc&0xff] ^ (crc>>8);
4709 +       }
4710 +
4711 +       crc = get_mirror32(crc);
4712 +       return crc;
4713 +}
4714 --- /dev/null
4715 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.h
4716 @@ -0,0 +1,43 @@
4717 +/*
4718 + * Copyright 2008-2012 Freescale Semiconductor Inc.
4719 + *
4720 + * Redistribution and use in source and binary forms, with or without
4721 + * modification, are permitted provided that the following conditions are met:
4722 + *     * Redistributions of source code must retain the above copyright
4723 + *       notice, this list of conditions and the following disclaimer.
4724 + *     * Redistributions in binary form must reproduce the above copyright
4725 + *       notice, this list of conditions and the following disclaimer in the
4726 + *       documentation and/or other materials provided with the distribution.
4727 + *     * Neither the name of Freescale Semiconductor nor the
4728 + *       names of its contributors may be used to endorse or promote products
4729 + *       derived from this software without specific prior written permission.
4730 + *
4731 + *
4732 + * ALTERNATIVELY, this software may be distributed under the terms of the
4733 + * GNU General Public License ("GPL") as published by the Free Software
4734 + * Foundation, either version 2 of that License or (at your option) any
4735 + * later version.
4736 + *
4737 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4738 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4739 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4740 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4741 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4742 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4743 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4744 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4745 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4746 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4747 + */
4748 +
4749 +
4750 +#ifndef __FMAN_CRC32_H
4751 +#define __FMAN_CRC32_H
4752 +
4753 +#include "common/general.h"
4754 +
4755 +
4756 +uint32_t get_mac_addr_crc(uint64_t _addr);
4757 +
4758 +
4759 +#endif /* __FMAN_CRC32_H */
4760 --- /dev/null
4761 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec.c
4762 @@ -0,0 +1,845 @@
4763 +/*
4764 + * Copyright 2008-2012 Freescale Semiconductor Inc.
4765 + *
4766 + * Redistribution and use in source and binary forms, with or without
4767 + * modification, are permitted provided that the following conditions are met:
4768 + *     * Redistributions of source code must retain the above copyright
4769 + *       notice, this list of conditions and the following disclaimer.
4770 + *     * Redistributions in binary form must reproduce the above copyright
4771 + *       notice, this list of conditions and the following disclaimer in the
4772 + *       documentation and/or other materials provided with the distribution.
4773 + *     * Neither the name of Freescale Semiconductor nor the
4774 + *       names of its contributors may be used to endorse or promote products
4775 + *       derived from this software without specific prior written permission.
4776 + *
4777 + *
4778 + * ALTERNATIVELY, this software may be distributed under the terms of the
4779 + * GNU General Public License ("GPL") as published by the Free Software
4780 + * Foundation, either version 2 of that License or (at your option) any
4781 + * later version.
4782 + *
4783 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4784 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4785 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4786 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4787 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4788 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4789 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4790 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4791 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4792 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4793 + */
4794 +
4795 +
4796 +#include "fsl_fman_dtsec.h"
4797 +
4798 +
4799 +void fman_dtsec_stop_rx(struct dtsec_regs *regs)
4800 +{
4801 +       /* Assert the graceful stop bit */
4802 +       iowrite32be(ioread32be(&regs->rctrl) | RCTRL_GRS, &regs->rctrl);
4803 +}
4804 +
4805 +void fman_dtsec_stop_tx(struct dtsec_regs *regs)
4806 +{
4807 +       /* Assert the graceful stop bit */
4808 +       iowrite32be(ioread32be(&regs->tctrl) | DTSEC_TCTRL_GTS, &regs->tctrl);
4809 +}
4810 +
4811 +void fman_dtsec_start_tx(struct dtsec_regs *regs)
4812 +{
4813 +       /* clear the graceful stop bit */
4814 +       iowrite32be(ioread32be(&regs->tctrl) & ~DTSEC_TCTRL_GTS, &regs->tctrl);
4815 +}
4816 +
4817 +void fman_dtsec_start_rx(struct dtsec_regs *regs)
4818 +{
4819 +       /* clear the graceful stop bit */
4820 +       iowrite32be(ioread32be(&regs->rctrl) & ~RCTRL_GRS, &regs->rctrl);
4821 +}
4822 +
4823 +void fman_dtsec_defconfig(struct dtsec_cfg *cfg)
4824 +{
4825 +       cfg->halfdup_on = DEFAULT_HALFDUP_ON;
4826 +       cfg->halfdup_retransmit = DEFAULT_HALFDUP_RETRANSMIT;
4827 +       cfg->halfdup_coll_window = DEFAULT_HALFDUP_COLL_WINDOW;
4828 +       cfg->halfdup_excess_defer = DEFAULT_HALFDUP_EXCESS_DEFER;
4829 +       cfg->halfdup_no_backoff = DEFAULT_HALFDUP_NO_BACKOFF;
4830 +       cfg->halfdup_bp_no_backoff = DEFAULT_HALFDUP_BP_NO_BACKOFF;
4831 +       cfg->halfdup_alt_backoff_val = DEFAULT_HALFDUP_ALT_BACKOFF_VAL;
4832 +       cfg->halfdup_alt_backoff_en = DEFAULT_HALFDUP_ALT_BACKOFF_EN;
4833 +       cfg->rx_drop_bcast = DEFAULT_RX_DROP_BCAST;
4834 +       cfg->rx_short_frm = DEFAULT_RX_SHORT_FRM;
4835 +       cfg->rx_len_check = DEFAULT_RX_LEN_CHECK;
4836 +       cfg->tx_pad_crc = DEFAULT_TX_PAD_CRC;
4837 +       cfg->tx_crc = DEFAULT_TX_CRC;
4838 +       cfg->rx_ctrl_acc = DEFAULT_RX_CTRL_ACC;
4839 +       cfg->tx_pause_time = DEFAULT_TX_PAUSE_TIME;
4840 +       cfg->tbipa = DEFAULT_TBIPA; /* PHY address 0 is reserved (DPAA RM)*/
4841 +       cfg->rx_prepend = DEFAULT_RX_PREPEND;
4842 +       cfg->ptp_tsu_en = DEFAULT_PTP_TSU_EN;
4843 +       cfg->ptp_exception_en = DEFAULT_PTP_EXCEPTION_EN;
4844 +       cfg->preamble_len = DEFAULT_PREAMBLE_LEN;
4845 +       cfg->rx_preamble = DEFAULT_RX_PREAMBLE;
4846 +       cfg->tx_preamble = DEFAULT_TX_PREAMBLE;
4847 +       cfg->loopback = DEFAULT_LOOPBACK;
4848 +       cfg->rx_time_stamp_en = DEFAULT_RX_TIME_STAMP_EN;
4849 +       cfg->tx_time_stamp_en = DEFAULT_TX_TIME_STAMP_EN;
4850 +       cfg->rx_flow = DEFAULT_RX_FLOW;
4851 +       cfg->tx_flow = DEFAULT_TX_FLOW;
4852 +       cfg->rx_group_hash_exd = DEFAULT_RX_GROUP_HASH_EXD;
4853 +       cfg->tx_pause_time_extd = DEFAULT_TX_PAUSE_TIME_EXTD;
4854 +       cfg->rx_promisc = DEFAULT_RX_PROMISC;
4855 +       cfg->non_back_to_back_ipg1 = DEFAULT_NON_BACK_TO_BACK_IPG1;
4856 +       cfg->non_back_to_back_ipg2 = DEFAULT_NON_BACK_TO_BACK_IPG2;
4857 +       cfg->min_ifg_enforcement = DEFAULT_MIN_IFG_ENFORCEMENT;
4858 +       cfg->back_to_back_ipg = DEFAULT_BACK_TO_BACK_IPG;
4859 +       cfg->maximum_frame = DEFAULT_MAXIMUM_FRAME;
4860 +       cfg->tbi_phy_addr = DEFAULT_TBI_PHY_ADDR;
4861 +       cfg->wake_on_lan = DEFAULT_WAKE_ON_LAN;
4862 +}
4863 +
4864 +int fman_dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg,
4865 +               enum enet_interface iface_mode,
4866 +               enum enet_speed iface_speed,
4867 +               uint8_t *macaddr,
4868 +               uint8_t fm_rev_maj,
4869 +               uint8_t fm_rev_min,
4870 +               uint32_t exception_mask)
4871 +{
4872 +       bool            is_rgmii = FALSE;
4873 +       bool            is_sgmii = FALSE;
4874 +       bool            is_qsgmii = FALSE;
4875 +       int             i;
4876 +       uint32_t        tmp;
4877 +
4878 +UNUSED(fm_rev_maj);UNUSED(fm_rev_min);
4879 +
4880 +       /* let's start with a soft reset */
4881 +       iowrite32be(MACCFG1_SOFT_RESET, &regs->maccfg1);
4882 +       iowrite32be(0, &regs->maccfg1);
4883 +
4884 +       /*************dtsec_id2******************/
4885 +       tmp =  ioread32be(&regs->tsec_id2);
4886 +
4887 +       /* check RGMII support */
4888 +       if (iface_mode == E_ENET_IF_RGMII ||
4889 +                       iface_mode == E_ENET_IF_RMII)
4890 +               if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
4891 +                       return -EINVAL;
4892 +
4893 +       if (iface_mode == E_ENET_IF_SGMII ||
4894 +                       iface_mode == E_ENET_IF_MII)
4895 +               if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
4896 +                       return -EINVAL;
4897 +
4898 +       /***************ECNTRL************************/
4899 +
4900 +       is_rgmii = (bool)((iface_mode == E_ENET_IF_RGMII) ? TRUE : FALSE);
4901 +       is_sgmii = (bool)((iface_mode == E_ENET_IF_SGMII) ? TRUE : FALSE);
4902 +       is_qsgmii = (bool)((iface_mode == E_ENET_IF_QSGMII) ? TRUE : FALSE);
4903 +
4904 +       tmp = 0;
4905 +       if (is_rgmii || iface_mode == E_ENET_IF_GMII)
4906 +               tmp |= DTSEC_ECNTRL_GMIIM;
4907 +       if (is_sgmii)
4908 +               tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM);
4909 +       if (is_qsgmii)
4910 +               tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM |
4911 +                               DTSEC_ECNTRL_QSGMIIM);
4912 +       if (is_rgmii)
4913 +               tmp |= DTSEC_ECNTRL_RPM;
4914 +       if (iface_speed == E_ENET_SPEED_100)
4915 +               tmp |= DTSEC_ECNTRL_R100M;
4916 +
4917 +       iowrite32be(tmp, &regs->ecntrl);
4918 +       /***************ECNTRL************************/
4919 +
4920 +       /***************TCTRL************************/
4921 +       tmp = 0;
4922 +       if (cfg->halfdup_on)
4923 +               tmp |= DTSEC_TCTRL_THDF;
4924 +       if (cfg->tx_time_stamp_en)
4925 +               tmp |= DTSEC_TCTRL_TTSE;
4926 +
4927 +       iowrite32be(tmp, &regs->tctrl);
4928 +
4929 +       /***************TCTRL************************/
4930 +
4931 +       /***************PTV************************/
4932 +       tmp = 0;
4933 +
4934 +#ifdef FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1
4935 +       if ((fm_rev_maj == 1) && (fm_rev_min == 0))
4936 +               cfg->tx_pause_time += 2;
4937 +#endif /* FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1 */
4938 +
4939 +       if (cfg->tx_pause_time)
4940 +               tmp |= cfg->tx_pause_time;
4941 +       if (cfg->tx_pause_time_extd)
4942 +               tmp |= cfg->tx_pause_time_extd << PTV_PTE_OFST;
4943 +       iowrite32be(tmp, &regs->ptv);
4944 +
4945 +       /***************RCTRL************************/
4946 +       tmp = 0;
4947 +       tmp |= ((uint32_t)(cfg->rx_prepend & 0x0000001f)) << 16;
4948 +       if (cfg->rx_ctrl_acc)
4949 +               tmp |= RCTRL_CFA;
4950 +       if (cfg->rx_group_hash_exd)
4951 +               tmp |= RCTRL_GHTX;
4952 +       if (cfg->rx_time_stamp_en)
4953 +               tmp |= RCTRL_RTSE;
4954 +       if (cfg->rx_drop_bcast)
4955 +               tmp |= RCTRL_BC_REJ;
4956 +       if (cfg->rx_short_frm)
4957 +               tmp |= RCTRL_RSF;
4958 +       if (cfg->rx_promisc)
4959 +               tmp |= RCTRL_PROM;
4960 +
4961 +       iowrite32be(tmp, &regs->rctrl);
4962 +       /***************RCTRL************************/
4963 +
4964 +       /*
4965 +        * Assign a Phy Address to the TBI (TBIPA).
4966 +        * Done also in cases where TBI is not selected to avoid conflict with
4967 +        * the external PHY's Physical address
4968 +        */
4969 +       iowrite32be(cfg->tbipa, &regs->tbipa);
4970 +
4971 +       /***************TMR_CTL************************/
4972 +       iowrite32be(0, &regs->tmr_ctrl);
4973 +
4974 +       if (cfg->ptp_tsu_en) {
4975 +               tmp = 0;
4976 +               tmp |= TMR_PEVENT_TSRE;
4977 +               iowrite32be(tmp, &regs->tmr_pevent);
4978 +
4979 +               if (cfg->ptp_exception_en) {
4980 +                       tmp = 0;
4981 +                       tmp |= TMR_PEMASK_TSREEN;
4982 +                       iowrite32be(tmp, &regs->tmr_pemask);
4983 +               }
4984 +       }
4985 +
4986 +       /***************MACCFG1***********************/
4987 +       tmp = 0;
4988 +       if (cfg->loopback)
4989 +               tmp |= MACCFG1_LOOPBACK;
4990 +       if (cfg->rx_flow)
4991 +               tmp |= MACCFG1_RX_FLOW;
4992 +       if (cfg->tx_flow)
4993 +               tmp |= MACCFG1_TX_FLOW;
4994 +       iowrite32be(tmp, &regs->maccfg1);
4995 +
4996 +       /***************MACCFG1***********************/
4997 +
4998 +       /***************MACCFG2***********************/
4999 +       tmp = 0;
5000 +
5001 +       if (iface_speed < E_ENET_SPEED_1000)
5002 +               tmp |= MACCFG2_NIBBLE_MODE;
5003 +       else if (iface_speed == E_ENET_SPEED_1000)
5004 +               tmp |= MACCFG2_BYTE_MODE;
5005 +
5006 +       tmp |= ((uint32_t) cfg->preamble_len & 0x0000000f)
5007 +               << PREAMBLE_LENGTH_SHIFT;
5008 +
5009 +       if (cfg->rx_preamble)
5010 +               tmp |= MACCFG2_PRE_AM_Rx_EN;
5011 +       if (cfg->tx_preamble)
5012 +               tmp |= MACCFG2_PRE_AM_Tx_EN;
5013 +       if (cfg->rx_len_check)
5014 +               tmp |= MACCFG2_LENGTH_CHECK;
5015 +       if (cfg->tx_pad_crc)
5016 +               tmp |= MACCFG2_PAD_CRC_EN;
5017 +       if (cfg->tx_crc)
5018 +               tmp |= MACCFG2_CRC_EN;
5019 +       if (!cfg->halfdup_on)
5020 +               tmp |= MACCFG2_FULL_DUPLEX;
5021 +       iowrite32be(tmp, &regs->maccfg2);
5022 +
5023 +       /***************MACCFG2***********************/
5024 +
5025 +       /***************IPGIFG************************/
5026 +       tmp = (((cfg->non_back_to_back_ipg1 <<
5027 +               IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT)
5028 +               & IPGIFG_NON_BACK_TO_BACK_IPG_1)
5029 +               | ((cfg->non_back_to_back_ipg2 <<
5030 +               IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT)
5031 +               & IPGIFG_NON_BACK_TO_BACK_IPG_2)
5032 +               | ((cfg->min_ifg_enforcement <<
5033 +               IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT)
5034 +               & IPGIFG_MIN_IFG_ENFORCEMENT)
5035 +               | (cfg->back_to_back_ipg & IPGIFG_BACK_TO_BACK_IPG));
5036 +       iowrite32be(tmp, &regs->ipgifg);
5037 +
5038 +       /***************IPGIFG************************/
5039 +
5040 +       /***************HAFDUP************************/
5041 +       tmp = 0;
5042 +
5043 +       if (cfg->halfdup_alt_backoff_en)
5044 +               tmp = (uint32_t)(HAFDUP_ALT_BEB |
5045 +                               ((cfg->halfdup_alt_backoff_val & 0x0000000f)
5046 +                                << HAFDUP_ALTERNATE_BEB_TRUNCATION_SHIFT));
5047 +       if (cfg->halfdup_bp_no_backoff)
5048 +               tmp |= HAFDUP_BP_NO_BACKOFF;
5049 +       if (cfg->halfdup_no_backoff)
5050 +               tmp |= HAFDUP_NO_BACKOFF;
5051 +       if (cfg->halfdup_excess_defer)
5052 +               tmp |= HAFDUP_EXCESS_DEFER;
5053 +       tmp |= ((cfg->halfdup_retransmit << HAFDUP_RETRANSMISSION_MAX_SHIFT)
5054 +               & HAFDUP_RETRANSMISSION_MAX);
5055 +       tmp |= (cfg->halfdup_coll_window & HAFDUP_COLLISION_WINDOW);
5056 +
5057 +       iowrite32be(tmp, &regs->hafdup);
5058 +       /***************HAFDUP************************/
5059 +
5060 +       /***************MAXFRM************************/
5061 +       /* Initialize MAXFRM */
5062 +       iowrite32be(cfg->maximum_frame, &regs->maxfrm);
5063 +
5064 +       /***************MAXFRM************************/
5065 +
5066 +       /***************CAM1************************/
5067 +       iowrite32be(0xffffffff, &regs->cam1);
5068 +       iowrite32be(0xffffffff, &regs->cam2);
5069 +
5070 +       /***************IMASK************************/
5071 +       iowrite32be(exception_mask, &regs->imask);
5072 +       /***************IMASK************************/
5073 +
5074 +       /***************IEVENT************************/
5075 +       iowrite32be(0xffffffff, &regs->ievent);
5076 +
5077 +       /***************MACSTNADDR1/2*****************/
5078 +
5079 +       tmp = (uint32_t)((macaddr[5] << 24) |
5080 +                        (macaddr[4] << 16) |
5081 +                        (macaddr[3] << 8) |
5082 +                         macaddr[2]);
5083 +       iowrite32be(tmp, &regs->macstnaddr1);
5084 +
5085 +       tmp = (uint32_t)((macaddr[1] << 24) |
5086 +                        (macaddr[0] << 16));
5087 +       iowrite32be(tmp, &regs->macstnaddr2);
5088 +
5089 +       /***************MACSTNADDR1/2*****************/
5090 +
5091 +       /*****************HASH************************/
5092 +       for (i = 0; i < NUM_OF_HASH_REGS ; i++) {
5093 +               /* Initialize IADDRx */
5094 +               iowrite32be(0, &regs->igaddr[i]);
5095 +               /* Initialize GADDRx */
5096 +               iowrite32be(0, &regs->gaddr[i]);
5097 +       }
5098 +
5099 +       fman_dtsec_reset_stat(regs);
5100 +
5101 +       return 0;
5102 +}
5103 +
5104 +uint16_t fman_dtsec_get_max_frame_len(struct dtsec_regs *regs)
5105 +{
5106 +       return (uint16_t)ioread32be(&regs->maxfrm);
5107 +}
5108 +
5109 +void fman_dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length)
5110 +{
5111 +       iowrite32be(length, &regs->maxfrm);
5112 +}
5113 +
5114 +void fman_dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *adr)
5115 +{
5116 +       uint32_t tmp;
5117 +
5118 +       tmp = (uint32_t)((adr[5] << 24) |
5119 +                        (adr[4] << 16) |
5120 +                        (adr[3] << 8) |
5121 +                         adr[2]);
5122 +       iowrite32be(tmp, &regs->macstnaddr1);
5123 +
5124 +       tmp = (uint32_t)((adr[1] << 24) |
5125 +                        (adr[0] << 16));
5126 +       iowrite32be(tmp, &regs->macstnaddr2);
5127 +}
5128 +
5129 +void fman_dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr)
5130 +{
5131 +       uint32_t tmp1, tmp2;
5132 +
5133 +       tmp1 = ioread32be(&regs->macstnaddr1);
5134 +       tmp2 = ioread32be(&regs->macstnaddr2);
5135 +
5136 +       macaddr[0] = (uint8_t)((tmp2 & 0x00ff0000) >> 16);
5137 +       macaddr[1] = (uint8_t)((tmp2 & 0xff000000) >> 24);
5138 +       macaddr[2] = (uint8_t)(tmp1 & 0x000000ff);
5139 +       macaddr[3] = (uint8_t)((tmp1 & 0x0000ff00) >> 8);
5140 +       macaddr[4] = (uint8_t)((tmp1 & 0x00ff0000) >> 16);
5141 +       macaddr[5] = (uint8_t)((tmp1 & 0xff000000) >> 24);
5142 +}
5143 +
5144 +void fman_dtsec_set_hash_table(struct dtsec_regs *regs, uint32_t crc, bool mcast, bool ghtx)
5145 +{
5146 +    int32_t bucket;
5147 +    if (ghtx)
5148 +        bucket = (int32_t)((crc >> 23) & 0x1ff);
5149 +    else {
5150 +        bucket = (int32_t)((crc >> 24) & 0xff);
5151 +        /* if !ghtx and mcast the bit must be set in gaddr instead of igaddr. */
5152 +        if (mcast)
5153 +            bucket += 0x100;
5154 +    }
5155 +    fman_dtsec_set_bucket(regs, bucket, TRUE);
5156 +}
5157 +
5158 +void fman_dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable)
5159 +{
5160 +       int reg_idx = (bucket >> 5) & 0xf;
5161 +       int bit_idx = bucket & 0x1f;
5162 +       uint32_t bit_mask = 0x80000000 >> bit_idx;
5163 +       uint32_t *reg;
5164 +
5165 +       if (reg_idx > 7)
5166 +               reg = &regs->gaddr[reg_idx-8];
5167 +       else
5168 +               reg = &regs->igaddr[reg_idx];
5169 +
5170 +       if (enable)
5171 +               iowrite32be(ioread32be(reg) | bit_mask, reg);
5172 +       else
5173 +               iowrite32be(ioread32be(reg) & (~bit_mask), reg);
5174 +}
5175 +
5176 +void fman_dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast, bool ucast)
5177 +{
5178 +       int             i;
5179 +       bool    ghtx;
5180 +
5181 +       ghtx = (bool)((ioread32be(&regs->rctrl) & RCTRL_GHTX) ? TRUE : FALSE);
5182 +
5183 +       if (ucast || (ghtx && mcast)) {
5184 +               for (i = 0; i < NUM_OF_HASH_REGS; i++)
5185 +                       iowrite32be(0, &regs->igaddr[i]);
5186 +       }
5187 +       if (mcast) {
5188 +               for (i = 0; i < NUM_OF_HASH_REGS; i++)
5189 +                       iowrite32be(0, &regs->gaddr[i]);
5190 +       }
5191 +}
5192 +
5193 +int fman_dtsec_set_tbi_phy_addr(struct dtsec_regs *regs,
5194 +               uint8_t addr)
5195 +{
5196 +       if (addr > 0 && addr < 32)
5197 +               iowrite32be(addr, &regs->tbipa);
5198 +       else
5199 +               return -EINVAL;
5200 +
5201 +       return 0;
5202 +}
5203 +
5204 +void fman_dtsec_set_wol(struct dtsec_regs *regs, bool en)
5205 +{
5206 +       uint32_t tmp;
5207 +
5208 +       tmp = ioread32be(&regs->maccfg2);
5209 +       if (en)
5210 +               tmp |= MACCFG2_MAGIC_PACKET_EN;
5211 +       else
5212 +               tmp &= ~MACCFG2_MAGIC_PACKET_EN;
5213 +       iowrite32be(tmp, &regs->maccfg2);
5214 +}
5215 +
5216 +int fman_dtsec_adjust_link(struct dtsec_regs *regs,
5217 +               enum enet_interface iface_mode,
5218 +               enum enet_speed speed, bool full_dx)
5219 +{
5220 +       uint32_t                tmp;
5221 +
5222 +       UNUSED(iface_mode);
5223 +
5224 +       if ((speed == E_ENET_SPEED_1000) && !full_dx)
5225 +               return -EINVAL;
5226 +
5227 +       tmp = ioread32be(&regs->maccfg2);
5228 +       if (!full_dx)
5229 +               tmp &= ~MACCFG2_FULL_DUPLEX;
5230 +       else
5231 +               tmp |= MACCFG2_FULL_DUPLEX;
5232 +
5233 +       tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
5234 +       if (speed < E_ENET_SPEED_1000)
5235 +               tmp |= MACCFG2_NIBBLE_MODE;
5236 +       else if (speed == E_ENET_SPEED_1000)
5237 +               tmp |= MACCFG2_BYTE_MODE;
5238 +       iowrite32be(tmp, &regs->maccfg2);
5239 +
5240 +       tmp = ioread32be(&regs->ecntrl);
5241 +       if (speed == E_ENET_SPEED_100)
5242 +               tmp |= DTSEC_ECNTRL_R100M;
5243 +       else
5244 +               tmp &= ~DTSEC_ECNTRL_R100M;
5245 +       iowrite32be(tmp, &regs->ecntrl);
5246 +
5247 +       return 0;
5248 +}
5249 +
5250 +void fman_dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable)
5251 +{
5252 +       uint32_t                tmp;
5253 +
5254 +       tmp = ioread32be(&regs->rctrl);
5255 +
5256 +       if (enable)
5257 +               tmp |= RCTRL_UPROM;
5258 +       else
5259 +               tmp &= ~RCTRL_UPROM;
5260 +
5261 +       iowrite32be(tmp, &regs->rctrl);
5262 +}
5263 +
5264 +void fman_dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable)
5265 +{
5266 +       uint32_t                tmp;
5267 +
5268 +       tmp = ioread32be(&regs->rctrl);
5269 +
5270 +       if (enable)
5271 +               tmp |= RCTRL_MPROM;
5272 +       else
5273 +               tmp &= ~RCTRL_MPROM;
5274 +
5275 +       iowrite32be(tmp, &regs->rctrl);
5276 +}
5277 +
5278 +bool fman_dtsec_get_clear_carry_regs(struct dtsec_regs *regs,
5279 +                               uint32_t *car1, uint32_t *car2)
5280 +{
5281 +       /* read carry registers */
5282 +       *car1 = ioread32be(&regs->car1);
5283 +       *car2 = ioread32be(&regs->car2);
5284 +       /* clear carry registers */
5285 +       if (*car1)
5286 +               iowrite32be(*car1, &regs->car1);
5287 +       if (*car2)
5288 +               iowrite32be(*car2, &regs->car2);
5289 +
5290 +       return (bool)((*car1 | *car2) ? TRUE : FALSE);
5291 +}
5292 +
5293 +void fman_dtsec_reset_stat(struct dtsec_regs *regs)
5294 +{
5295 +       /* clear HW counters */
5296 +       iowrite32be(ioread32be(&regs->ecntrl) |
5297 +                       DTSEC_ECNTRL_CLRCNT, &regs->ecntrl);
5298 +}
5299 +
5300 +int fman_dtsec_set_stat_level(struct dtsec_regs *regs, enum dtsec_stat_level level)
5301 +{
5302 +       switch (level) {
5303 +       case E_MAC_STAT_NONE:
5304 +               iowrite32be(0xffffffff, &regs->cam1);
5305 +               iowrite32be(0xffffffff, &regs->cam2);
5306 +               iowrite32be(ioread32be(&regs->ecntrl) & ~DTSEC_ECNTRL_STEN,
5307 +                               &regs->ecntrl);
5308 +               iowrite32be(ioread32be(&regs->imask) & ~DTSEC_IMASK_MSROEN,
5309 +                               &regs->imask);
5310 +               break;
5311 +       case E_MAC_STAT_PARTIAL:
5312 +               iowrite32be(CAM1_ERRORS_ONLY, &regs->cam1);
5313 +               iowrite32be(CAM2_ERRORS_ONLY, &regs->cam2);
5314 +               iowrite32be(ioread32be(&regs->ecntrl) | DTSEC_ECNTRL_STEN,
5315 +                               &regs->ecntrl);
5316 +               iowrite32be(ioread32be(&regs->imask) | DTSEC_IMASK_MSROEN,
5317 +                               &regs->imask);
5318 +               break;
5319 +       case E_MAC_STAT_MIB_GRP1:
5320 +               iowrite32be((uint32_t)~CAM1_MIB_GRP_1, &regs->cam1);
5321 +               iowrite32be((uint32_t)~CAM2_MIB_GRP_1, &regs->cam2);
5322 +               iowrite32be(ioread32be(&regs->ecntrl) | DTSEC_ECNTRL_STEN,
5323 +                               &regs->ecntrl);
5324 +               iowrite32be(ioread32be(&regs->imask) | DTSEC_IMASK_MSROEN,
5325 +                               &regs->imask);
5326 +               break;
5327 +       case E_MAC_STAT_FULL:
5328 +               iowrite32be(0, &regs->cam1);
5329 +               iowrite32be(0, &regs->cam2);
5330 +               iowrite32be(ioread32be(&regs->ecntrl) | DTSEC_ECNTRL_STEN,
5331 +                               &regs->ecntrl);
5332 +               iowrite32be(ioread32be(&regs->imask) | DTSEC_IMASK_MSROEN,
5333 +                               &regs->imask);
5334 +               break;
5335 +       default:
5336 +               return -EINVAL;
5337 +       }
5338 +
5339 +       return 0;
5340 +}
5341 +
5342 +void fman_dtsec_set_ts(struct dtsec_regs *regs, bool en)
5343 +{
5344 +       if (en) {
5345 +               iowrite32be(ioread32be(&regs->rctrl) | RCTRL_RTSE,
5346 +                               &regs->rctrl);
5347 +               iowrite32be(ioread32be(&regs->tctrl) | DTSEC_TCTRL_TTSE,
5348 +                               &regs->tctrl);
5349 +       } else {
5350 +               iowrite32be(ioread32be(&regs->rctrl) & ~RCTRL_RTSE,
5351 +                               &regs->rctrl);
5352 +               iowrite32be(ioread32be(&regs->tctrl) & ~DTSEC_TCTRL_TTSE,
5353 +                               &regs->tctrl);
5354 +       }
5355 +}
5356 +
5357 +void fman_dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx)
5358 +{
5359 +       uint32_t tmp;
5360 +
5361 +       tmp = ioread32be(&regs->maccfg1);
5362 +
5363 +       if (apply_rx)
5364 +               tmp |= MACCFG1_RX_EN ;
5365 +
5366 +       if (apply_tx)
5367 +               tmp |= MACCFG1_TX_EN ;
5368 +
5369 +       iowrite32be(tmp, &regs->maccfg1);
5370 +}
5371 +
5372 +void fman_dtsec_clear_addr_in_paddr(struct dtsec_regs *regs, uint8_t paddr_num)
5373 +{
5374 +    iowrite32be(0, &regs->macaddr[paddr_num].exact_match1);
5375 +    iowrite32be(0, &regs->macaddr[paddr_num].exact_match2);
5376 +}
5377 +
5378 +void fman_dtsec_add_addr_in_paddr(struct dtsec_regs *regs,
5379 +                               uint64_t addr,
5380 +                               uint8_t paddr_num)
5381 +{
5382 +       uint32_t tmp;
5383 +
5384 +       tmp = (uint32_t)(addr);
5385 +       /* swap */
5386 +       tmp = (((tmp & 0x000000FF) << 24) |
5387 +               ((tmp & 0x0000FF00) <<  8) |
5388 +               ((tmp & 0x00FF0000) >>  8) |
5389 +               ((tmp & 0xFF000000) >> 24));
5390 +       iowrite32be(tmp, &regs->macaddr[paddr_num].exact_match1);
5391 +
5392 +       tmp = (uint32_t)(addr>>32);
5393 +       /* swap */
5394 +       tmp = (((tmp & 0x000000FF) << 24) |
5395 +               ((tmp & 0x0000FF00) <<  8) |
5396 +               ((tmp & 0x00FF0000) >>  8) |
5397 +               ((tmp & 0xFF000000) >> 24));
5398 +       iowrite32be(tmp, &regs->macaddr[paddr_num].exact_match2);
5399 +}
5400 +
5401 +void fman_dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx)
5402 +{
5403 +       uint32_t tmp;
5404 +
5405 +       tmp = ioread32be(&regs->maccfg1);
5406 +
5407 +       if (apply_rx)
5408 +               tmp &= ~MACCFG1_RX_EN;
5409 +
5410 +       if (apply_tx)
5411 +               tmp &= ~MACCFG1_TX_EN;
5412 +
5413 +       iowrite32be(tmp, &regs->maccfg1);
5414 +}
5415 +
5416 +void fman_dtsec_set_tx_pause_frames(struct dtsec_regs *regs, uint16_t time)
5417 +{
5418 +       uint32_t ptv = 0;
5419 +
5420 +       /* fixme: don't enable tx pause for half-duplex */
5421 +
5422 +       if (time) {
5423 +               ptv = ioread32be(&regs->ptv);
5424 +               ptv &= 0xffff0000;
5425 +               ptv |= time & 0x0000ffff;
5426 +               iowrite32be(ptv, &regs->ptv);
5427 +
5428 +               /* trigger the transmission of a flow-control pause frame */
5429 +               iowrite32be(ioread32be(&regs->maccfg1) | MACCFG1_TX_FLOW,
5430 +                               &regs->maccfg1);
5431 +       } else
5432 +               iowrite32be(ioread32be(&regs->maccfg1) & ~MACCFG1_TX_FLOW,
5433 +                               &regs->maccfg1);
5434 +}
5435 +
5436 +void fman_dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en)
5437 +{
5438 +       uint32_t tmp;
5439 +
5440 +       /* todo: check if mac is set to full-duplex */
5441 +
5442 +       tmp = ioread32be(&regs->maccfg1);
5443 +       if (en)
5444 +               tmp |= MACCFG1_RX_FLOW;
5445 +       else
5446 +               tmp &= ~MACCFG1_RX_FLOW;
5447 +       iowrite32be(tmp, &regs->maccfg1);
5448 +}
5449 +
5450 +uint32_t fman_dtsec_get_rctrl(struct dtsec_regs *regs)
5451 +{
5452 +       return ioread32be(&regs->rctrl);
5453 +}
5454 +
5455 +uint32_t fman_dtsec_get_revision(struct dtsec_regs *regs)
5456 +{
5457 +       return ioread32be(&regs->tsec_id);
5458 +}
5459 +
5460 +uint32_t fman_dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask)
5461 +{
5462 +       return ioread32be(&regs->ievent) & ev_mask;
5463 +}
5464 +
5465 +void fman_dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask)
5466 +{
5467 +       iowrite32be(ev_mask, &regs->ievent);
5468 +}
5469 +
5470 +uint32_t fman_dtsec_get_interrupt_mask(struct dtsec_regs *regs)
5471 +{
5472 +       return ioread32be(&regs->imask);
5473 +}
5474 +
5475 +uint32_t fman_dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs)
5476 +{
5477 +       uint32_t event;
5478 +
5479 +       event = ioread32be(&regs->tmr_pevent);
5480 +       event &= ioread32be(&regs->tmr_pemask);
5481 +
5482 +       if (event)
5483 +               iowrite32be(event, &regs->tmr_pevent);
5484 +       return event;
5485 +}
5486 +
5487 +void fman_dtsec_enable_tmr_interrupt(struct dtsec_regs *regs)
5488 +{
5489 +       iowrite32be(ioread32be(&regs->tmr_pemask) | TMR_PEMASK_TSREEN,
5490 +                       &regs->tmr_pemask);
5491 +}
5492 +
5493 +void fman_dtsec_disable_tmr_interrupt(struct dtsec_regs *regs)
5494 +{
5495 +       iowrite32be(ioread32be(&regs->tmr_pemask) & ~TMR_PEMASK_TSREEN,
5496 +                       &regs->tmr_pemask);
5497 +}
5498 +
5499 +void fman_dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask)
5500 +{
5501 +       iowrite32be(ioread32be(&regs->imask) | ev_mask, &regs->imask);
5502 +}
5503 +
5504 +void fman_dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask)
5505 +{
5506 +       iowrite32be(ioread32be(&regs->imask) & ~ev_mask, &regs->imask);
5507 +}
5508 +
5509 +uint32_t fman_dtsec_get_stat_counter(struct dtsec_regs *regs,
5510 +               enum dtsec_stat_counters reg_name)
5511 +{
5512 +       uint32_t ret_val;
5513 +
5514 +       switch (reg_name) {
5515 +       case E_DTSEC_STAT_TR64:
5516 +               ret_val = ioread32be(&regs->tr64);
5517 +               break;
5518 +       case E_DTSEC_STAT_TR127:
5519 +               ret_val = ioread32be(&regs->tr127);
5520 +               break;
5521 +       case E_DTSEC_STAT_TR255:
5522 +               ret_val = ioread32be(&regs->tr255);
5523 +               break;
5524 +       case E_DTSEC_STAT_TR511:
5525 +               ret_val = ioread32be(&regs->tr511);
5526 +               break;
5527 +       case E_DTSEC_STAT_TR1K:
5528 +               ret_val = ioread32be(&regs->tr1k);
5529 +               break;
5530 +       case E_DTSEC_STAT_TRMAX:
5531 +               ret_val = ioread32be(&regs->trmax);
5532 +               break;
5533 +       case E_DTSEC_STAT_TRMGV:
5534 +               ret_val = ioread32be(&regs->trmgv);
5535 +               break;
5536 +       case E_DTSEC_STAT_RBYT:
5537 +               ret_val = ioread32be(&regs->rbyt);
5538 +               break;
5539 +       case E_DTSEC_STAT_RPKT:
5540 +               ret_val = ioread32be(&regs->rpkt);
5541 +               break;
5542 +       case E_DTSEC_STAT_RMCA:
5543 +               ret_val = ioread32be(&regs->rmca);
5544 +               break;
5545 +       case E_DTSEC_STAT_RBCA:
5546 +               ret_val = ioread32be(&regs->rbca);
5547 +               break;
5548 +       case E_DTSEC_STAT_RXPF:
5549 +               ret_val = ioread32be(&regs->rxpf);
5550 +               break;
5551 +       case E_DTSEC_STAT_RALN:
5552 +               ret_val = ioread32be(&regs->raln);
5553 +               break;
5554 +       case E_DTSEC_STAT_RFLR:
5555 +               ret_val = ioread32be(&regs->rflr);
5556 +               break;
5557 +       case E_DTSEC_STAT_RCDE:
5558 +               ret_val = ioread32be(&regs->rcde);
5559 +               break;
5560 +       case E_DTSEC_STAT_RCSE:
5561 +               ret_val = ioread32be(&regs->rcse);
5562 +               break;
5563 +       case E_DTSEC_STAT_RUND:
5564 +               ret_val = ioread32be(&regs->rund);
5565 +               break;
5566 +       case E_DTSEC_STAT_ROVR:
5567 +               ret_val = ioread32be(&regs->rovr);
5568 +               break;
5569 +       case E_DTSEC_STAT_RFRG:
5570 +               ret_val = ioread32be(&regs->rfrg);
5571 +               break;
5572 +       case E_DTSEC_STAT_RJBR:
5573 +               ret_val = ioread32be(&regs->rjbr);
5574 +               break;
5575 +       case E_DTSEC_STAT_RDRP:
5576 +               ret_val = ioread32be(&regs->rdrp);
5577 +               break;
5578 +       case E_DTSEC_STAT_TFCS:
5579 +               ret_val = ioread32be(&regs->tfcs);
5580 +               break;
5581 +       case E_DTSEC_STAT_TBYT:
5582 +               ret_val = ioread32be(&regs->tbyt);
5583 +               break;
5584 +       case E_DTSEC_STAT_TPKT:
5585 +               ret_val = ioread32be(&regs->tpkt);
5586 +               break;
5587 +       case E_DTSEC_STAT_TMCA:
5588 +               ret_val = ioread32be(&regs->tmca);
5589 +               break;
5590 +       case E_DTSEC_STAT_TBCA:
5591 +               ret_val = ioread32be(&regs->tbca);
5592 +               break;
5593 +       case E_DTSEC_STAT_TXPF:
5594 +               ret_val = ioread32be(&regs->txpf);
5595 +               break;
5596 +       case E_DTSEC_STAT_TNCL:
5597 +               ret_val = ioread32be(&regs->tncl);
5598 +               break;
5599 +       case E_DTSEC_STAT_TDRP:
5600 +               ret_val = ioread32be(&regs->tdrp);
5601 +               break;
5602 +       default:
5603 +               ret_val = 0;
5604 +       }
5605 +
5606 +       return ret_val;
5607 +}
5608 --- /dev/null
5609 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec_mii_acc.c
5610 @@ -0,0 +1,163 @@
5611 +/*
5612 + * Copyright 2008-2013 Freescale Semiconductor Inc.
5613 + *
5614 + * Redistribution and use in source and binary forms, with or without
5615 + * modification, are permitted provided that the following conditions are met:
5616 + *     * Redistributions of source code must retain the above copyright
5617 + *       notice, this list of conditions and the following disclaimer.
5618 + *     * Redistributions in binary form must reproduce the above copyright
5619 + *       notice, this list of conditions and the following disclaimer in the
5620 + *       documentation and/or other materials provided with the distribution.
5621 + *     * Neither the name of Freescale Semiconductor nor the
5622 + *       names of its contributors may be used to endorse or promote products
5623 + *       derived from this software without specific prior written permission.
5624 + *
5625 + *
5626 + * ALTERNATIVELY, this software may be distributed under the terms of the
5627 + * GNU General Public License ("GPL") as published by the Free Software
5628 + * Foundation, either version 2 of that License or (at your option) any
5629 + * later version.
5630 + *
5631 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
5632 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
5633 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
5634 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
5635 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
5636 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
5637 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
5638 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
5639 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
5640 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
5641 + */
5642 +
5643 +
5644 +#include "common/general.h"
5645 +#include "fsl_fman_dtsec_mii_acc.h"
5646 +
5647 +
5648 +/**
5649 + * dtsec_mii_get_div() - calculates the value of the dtsec mii divider
5650 + * @dtsec_freq:                dtsec clock frequency (in Mhz)
5651 + *
5652 + * This function calculates the dtsec mii clock divider that determines
5653 + * the MII MDC clock. MII MDC clock will be set to work in the range
5654 + * of 1.5 to 2.5Mhz
5655 + * The output of this function is the value of MIIMCFG[MgmtClk] which
5656 + * implicitly determines the divider value.
5657 + * Note: the dTSEC system clock is equal to 1/2 of the FMan clock.
5658 + *
5659 + * The table below which reflects dtsec_mii_get_div() functionality
5660 + * shows the relations among dtsec_freq, MgmtClk, actual divider
5661 + * and the MII frequency:
5662 + *
5663 + * dtsec freq   MgmtClk     div        MII freq Mhz
5664 + * [0.....80]     1      (1/4)(1/8)    [0   to 2.5]
5665 + * [81...120]     2      (1/6)(1/8)    [1.6 to 2.5]
5666 + * [121..160]     3      (1/8)(1/8)    [1.8 to 2.5]
5667 + * [161..200]     4      (1/10)(1/8)   [2.0 to 2.5]
5668 + * [201..280]     5      (1/14)(1/8)   [1.8 to 2.5]
5669 + * [281..400]     6      (1/20)(1/8)   [1.1 to 2.5]
5670 + * [401..560]     7      (1/28)(1/8)   [1.8 to 2.5]
5671 + * [560..frq]     7      (1/28)(1/8)   [frq/224]
5672 + *
5673 + * Returns: the MIIMCFG[MgmtClk] appropriate value
5674 + */
5675 +
5676 +static uint8_t dtsec_mii_get_div(uint16_t dtsec_freq)
5677 +{
5678 +       uint16_t mgmt_clk;
5679 +
5680 +       if (dtsec_freq < 80) mgmt_clk = 1;
5681 +       else if (dtsec_freq < 120) mgmt_clk = 2;
5682 +       else if (dtsec_freq < 160) mgmt_clk = 3;
5683 +       else if (dtsec_freq < 200) mgmt_clk = 4;
5684 +       else if (dtsec_freq < 280) mgmt_clk = 5;
5685 +       else if (dtsec_freq < 400) mgmt_clk = 6;
5686 +       else mgmt_clk = 7;
5687 +
5688 +       return (uint8_t)mgmt_clk;
5689 +}
5690 +
5691 +void fman_dtsec_mii_reset(struct dtsec_mii_reg *regs)
5692 +{
5693 +       /* Reset the management interface */
5694 +       iowrite32be(ioread32be(&regs->miimcfg) | MIIMCFG_RESET_MGMT,
5695 +                       &regs->miimcfg);
5696 +       iowrite32be(ioread32be(&regs->miimcfg) & ~MIIMCFG_RESET_MGMT,
5697 +                       &regs->miimcfg);
5698 +}
5699 +
5700 +
5701 +int fman_dtsec_mii_write_reg(struct dtsec_mii_reg *regs, uint8_t addr,
5702 +               uint8_t reg, uint16_t data, uint16_t dtsec_freq)
5703 +{
5704 +       uint32_t        tmp;
5705 +
5706 +       /* Setup the MII Mgmt clock speed */
5707 +       iowrite32be((uint32_t)dtsec_mii_get_div(dtsec_freq), &regs->miimcfg);
5708 +       wmb();
5709 +
5710 +       /* Stop the MII management read cycle */
5711 +       iowrite32be(0, &regs->miimcom);
5712 +       /* Dummy read to make sure MIIMCOM is written */
5713 +       tmp = ioread32be(&regs->miimcom);
5714 +       wmb();
5715 +
5716 +       /* Setting up MII Management Address Register */
5717 +       tmp = (uint32_t)((addr << MIIMADD_PHY_ADDR_SHIFT) | reg);
5718 +       iowrite32be(tmp, &regs->miimadd);
5719 +       wmb();
5720 +
5721 +       /* Setting up MII Management Control Register with data */
5722 +       iowrite32be((uint32_t)data, &regs->miimcon);
5723 +       /* Dummy read to make sure MIIMCON is written */
5724 +       tmp = ioread32be(&regs->miimcon);
5725 +       wmb();
5726 +
5727 +       /* Wait until MII management write is complete */
5728 +       /* todo: a timeout could be useful here */
5729 +       while ((ioread32be(&regs->miimind)) & MIIMIND_BUSY)
5730 +               /* busy wait */;
5731 +
5732 +       return 0;
5733 +}
5734 +
5735 +int fman_dtsec_mii_read_reg(struct dtsec_mii_reg *regs, uint8_t  addr,
5736 +               uint8_t reg, uint16_t *data, uint16_t dtsec_freq)
5737 +{
5738 +       uint32_t        tmp;
5739 +
5740 +       /* Setup the MII Mgmt clock speed */
5741 +       iowrite32be((uint32_t)dtsec_mii_get_div(dtsec_freq), &regs->miimcfg);
5742 +       wmb();
5743 +
5744 +       /* Setting up the MII Management Address Register */
5745 +       tmp = (uint32_t)((addr << MIIMADD_PHY_ADDR_SHIFT) | reg);
5746 +       iowrite32be(tmp, &regs->miimadd);
5747 +       wmb();
5748 +
5749 +       /* Perform an MII management read cycle */
5750 +       iowrite32be(MIIMCOM_READ_CYCLE, &regs->miimcom);
5751 +       /* Dummy read to make sure MIIMCOM is written */
5752 +       tmp = ioread32be(&regs->miimcom);
5753 +       wmb();
5754 +
5755 +       /* Wait until MII management read is complete */
5756 +       /* todo: a timeout could be useful here */
5757 +       while ((ioread32be(&regs->miimind)) & MIIMIND_BUSY)
5758 +               /* busy wait */;
5759 +
5760 +       /* Read MII management status  */
5761 +       *data = (uint16_t)ioread32be(&regs->miimstat);
5762 +       wmb();
5763 +
5764 +       iowrite32be(0, &regs->miimcom);
5765 +       /* Dummy read to make sure MIIMCOM is written */
5766 +       tmp = ioread32be(&regs->miimcom);
5767 +
5768 +       if (*data == 0xffff)
5769 +               return -ENXIO;
5770 +
5771 +       return 0;
5772 +}
5773 +
5774 --- /dev/null
5775 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac.c
5776 @@ -0,0 +1,511 @@
5777 +/*
5778 + * Copyright 2008-2012 Freescale Semiconductor Inc.
5779 + *
5780 + * Redistribution and use in source and binary forms, with or without
5781 + * modification, are permitted provided that the following conditions are met:
5782 + *     * Redistributions of source code must retain the above copyright
5783 + *       notice, this list of conditions and the following disclaimer.
5784 + *     * Redistributions in binary form must reproduce the above copyright
5785 + *       notice, this list of conditions and the following disclaimer in the
5786 + *       documentation and/or other materials provided with the distribution.
5787 + *     * Neither the name of Freescale Semiconductor nor the
5788 + *       names of its contributors may be used to endorse or promote products
5789 + *       derived from this software without specific prior written permission.
5790 + *
5791 + *
5792 + * ALTERNATIVELY, this software may be distributed under the terms of the
5793 + * GNU General Public License ("GPL") as published by the Free Software
5794 + * Foundation, either version 2 of that License or (at your option) any
5795 + * later version.
5796 + *
5797 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
5798 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
5799 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
5800 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
5801 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
5802 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
5803 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
5804 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
5805 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
5806 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
5807 + */
5808 +
5809 +
5810 +#include "fsl_fman_memac.h"
5811 +
5812 +
5813 +uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask)
5814 +{
5815 +    return ioread32be(&regs->ievent) & ev_mask;
5816 +}
5817 +
5818 +uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs)
5819 +{
5820 +    return ioread32be(&regs->imask);
5821 +}
5822 +
5823 +void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask)
5824 +{
5825 +    iowrite32be(ev_mask, &regs->ievent);
5826 +}
5827 +
5828 +void fman_memac_set_promiscuous(struct memac_regs *regs, bool val)
5829 +{
5830 +    uint32_t tmp;
5831 +
5832 +    tmp = ioread32be(&regs->command_config);
5833 +
5834 +    if (val)
5835 +        tmp |= CMD_CFG_PROMIS_EN;
5836 +    else
5837 +        tmp &= ~CMD_CFG_PROMIS_EN;
5838 +
5839 +    iowrite32be(tmp, &regs->command_config);
5840 +}
5841 +
5842 +void fman_memac_clear_addr_in_paddr(struct memac_regs *regs,
5843 +                    uint8_t paddr_num)
5844 +{
5845 +    if (paddr_num == 0) {
5846 +        iowrite32be(0, &regs->mac_addr0.mac_addr_l);
5847 +        iowrite32be(0, &regs->mac_addr0.mac_addr_u);
5848 +    } else {
5849 +        iowrite32be(0x0, &regs->mac_addr[paddr_num - 1].mac_addr_l);
5850 +        iowrite32be(0x0, &regs->mac_addr[paddr_num - 1].mac_addr_u);
5851 +    }
5852 +}
5853 +
5854 +void fman_memac_add_addr_in_paddr(struct memac_regs *regs,
5855 +                    uint8_t *adr,
5856 +                    uint8_t paddr_num)
5857 +{
5858 +    uint32_t tmp0, tmp1;
5859 +
5860 +    tmp0 = (uint32_t)(adr[0] |
5861 +            adr[1] << 8 |
5862 +            adr[2] << 16 |
5863 +            adr[3] << 24);
5864 +    tmp1 = (uint32_t)(adr[4] | adr[5] << 8);
5865 +
5866 +    if (paddr_num == 0) {
5867 +        iowrite32be(tmp0, &regs->mac_addr0.mac_addr_l);
5868 +        iowrite32be(tmp1, &regs->mac_addr0.mac_addr_u);
5869 +    } else {
5870 +        iowrite32be(tmp0, &regs->mac_addr[paddr_num-1].mac_addr_l);
5871 +        iowrite32be(tmp1, &regs->mac_addr[paddr_num-1].mac_addr_u);
5872 +    }
5873 +}
5874 +
5875 +void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx)
5876 +{
5877 +    uint32_t tmp;
5878 +
5879 +    tmp = ioread32be(&regs->command_config);
5880 +
5881 +    if (apply_rx)
5882 +        tmp |= CMD_CFG_RX_EN;
5883 +
5884 +    if (apply_tx)
5885 +        tmp |= CMD_CFG_TX_EN;
5886 +
5887 +    iowrite32be(tmp, &regs->command_config);
5888 +}
5889 +
5890 +void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx)
5891 +{
5892 +    uint32_t tmp;
5893 +
5894 +    tmp = ioread32be(&regs->command_config);
5895 +
5896 +    if (apply_rx)
5897 +        tmp &= ~CMD_CFG_RX_EN;
5898 +
5899 +    if (apply_tx)
5900 +        tmp &= ~CMD_CFG_TX_EN;
5901 +
5902 +    iowrite32be(tmp, &regs->command_config);
5903 +}
5904 +
5905 +void fman_memac_reset_stat(struct memac_regs *regs)
5906 +{
5907 +    uint32_t tmp;
5908 +
5909 +    tmp = ioread32be(&regs->statn_config);
5910 +
5911 +    tmp |= STATS_CFG_CLR;
5912 +
5913 +    iowrite32be(tmp, &regs->statn_config);
5914 +
5915 +    while (ioread32be(&regs->statn_config) & STATS_CFG_CLR);
5916 +}
5917 +
5918 +void fman_memac_reset(struct memac_regs *regs)
5919 +{
5920 +    uint32_t tmp;
5921 +
5922 +    tmp = ioread32be(&regs->command_config);
5923 +
5924 +    tmp |= CMD_CFG_SW_RESET;
5925 +
5926 +    iowrite32be(tmp, &regs->command_config);
5927 +
5928 +    while (ioread32be(&regs->command_config) & CMD_CFG_SW_RESET);
5929 +}
5930 +
5931 +int fman_memac_init(struct memac_regs *regs,
5932 +        struct memac_cfg *cfg,
5933 +        enum enet_interface enet_interface,
5934 +        enum enet_speed enet_speed,
5935 +       bool slow_10g_if,
5936 +        uint32_t exceptions)
5937 +{
5938 +    uint32_t    tmp;
5939 +
5940 +    /* Config */
5941 +    tmp = 0;
5942 +    if (cfg->wan_mode_enable)
5943 +        tmp |= CMD_CFG_WAN_MODE;
5944 +    if (cfg->promiscuous_mode_enable)
5945 +        tmp |= CMD_CFG_PROMIS_EN;
5946 +    if (cfg->pause_forward_enable)
5947 +        tmp |= CMD_CFG_PAUSE_FWD;
5948 +    if (cfg->pause_ignore)
5949 +        tmp |= CMD_CFG_PAUSE_IGNORE;
5950 +    if (cfg->tx_addr_ins_enable)
5951 +        tmp |= CMD_CFG_TX_ADDR_INS;
5952 +    if (cfg->loopback_enable)
5953 +        tmp |= CMD_CFG_LOOPBACK_EN;
5954 +    if (cfg->cmd_frame_enable)
5955 +        tmp |= CMD_CFG_CNT_FRM_EN;
5956 +    if (cfg->send_idle_enable)
5957 +        tmp |= CMD_CFG_SEND_IDLE;
5958 +    if (cfg->no_length_check_enable)
5959 +        tmp |= CMD_CFG_NO_LEN_CHK;
5960 +    if (cfg->rx_sfd_any)
5961 +        tmp |= CMD_CFG_SFD_ANY;
5962 +    if (cfg->pad_enable)
5963 +        tmp |= CMD_CFG_TX_PAD_EN;
5964 +    if (cfg->wake_on_lan)
5965 +        tmp |= CMD_CFG_MG;
5966 +
5967 +    tmp |= CMD_CFG_CRC_FWD;
5968 +
5969 +    iowrite32be(tmp, &regs->command_config);
5970 +
5971 +    /* Max Frame Length */
5972 +    iowrite32be((uint32_t)cfg->max_frame_length, &regs->maxfrm);
5973 +
5974 +    /* Pause Time */
5975 +    iowrite32be((uint32_t)cfg->pause_quanta, &regs->pause_quanta[0]);
5976 +    iowrite32be((uint32_t)0, &regs->pause_thresh[0]);
5977 +
5978 +    /* IF_MODE */
5979 +    tmp = 0;
5980 +    switch (enet_interface) {
5981 +    case E_ENET_IF_XGMII:
5982 +    case E_ENET_IF_XFI:
5983 +        tmp |= IF_MODE_XGMII;
5984 +        break;
5985 +    default:
5986 +        tmp |= IF_MODE_GMII;
5987 +        if (enet_interface == E_ENET_IF_RGMII && !cfg->loopback_enable)
5988 +            tmp |= IF_MODE_RGMII | IF_MODE_RGMII_AUTO;
5989 +    }
5990 +    iowrite32be(tmp, &regs->if_mode);
5991 +
5992 +       /* TX_FIFO_SECTIONS */
5993 +       tmp = 0;
5994 +       if (enet_interface == E_ENET_IF_XGMII ||
5995 +               enet_interface == E_ENET_IF_XFI) {
5996 +               if(slow_10g_if) {
5997 +                       tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G |
5998 +                               TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
5999 +               } else {
6000 +                       tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_10G |
6001 +                               TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
6002 +               }
6003 +       } else {
6004 +               tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_1G |
6005 +                               TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G);
6006 +       }
6007 +       iowrite32be(tmp, &regs->tx_fifo_sections);
6008 +
6009 +    /* clear all pending events and set-up interrupts */
6010 +    fman_memac_ack_event(regs, 0xffffffff);
6011 +    fman_memac_set_exception(regs, exceptions, TRUE);
6012 +
6013 +    return 0;
6014 +}
6015 +
6016 +void fman_memac_set_exception(struct memac_regs *regs, uint32_t val, bool enable)
6017 +{
6018 +    uint32_t tmp;
6019 +
6020 +    tmp = ioread32be(&regs->imask);
6021 +    if (enable)
6022 +        tmp |= val;
6023 +    else
6024 +        tmp &= ~val;
6025 +
6026 +    iowrite32be(tmp, &regs->imask);
6027 +}
6028 +
6029 +void fman_memac_reset_filter_table(struct memac_regs *regs)
6030 +{
6031 +       uint32_t i;
6032 +       for (i = 0; i < 64; i++)
6033 +               iowrite32be(i & ~HASH_CTRL_MCAST_EN, &regs->hashtable_ctrl);
6034 +}
6035 +
6036 +void fman_memac_set_hash_table_entry(struct memac_regs *regs, uint32_t crc)
6037 +{
6038 +       iowrite32be(crc | HASH_CTRL_MCAST_EN, &regs->hashtable_ctrl);
6039 +}
6040 +
6041 +void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val)
6042 +{
6043 +    iowrite32be(val, &regs->hashtable_ctrl);
6044 +}
6045 +
6046 +uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs)
6047 +{
6048 +    uint32_t tmp;
6049 +
6050 +    tmp = ioread32be(&regs->maxfrm);
6051 +
6052 +    return(uint16_t)tmp;
6053 +}
6054 +
6055 +
6056 +void fman_memac_set_tx_pause_frames(struct memac_regs *regs,
6057 +                uint8_t priority,
6058 +                uint16_t pause_time,
6059 +                uint16_t thresh_time)
6060 +{
6061 +    uint32_t tmp;
6062 +
6063 +       tmp = ioread32be(&regs->tx_fifo_sections);
6064 +
6065 +       if (priority == 0xff) {
6066 +               GET_TX_EMPTY_DEFAULT_VALUE(tmp);
6067 +               iowrite32be(tmp, &regs->tx_fifo_sections);
6068 +
6069 +               tmp = ioread32be(&regs->command_config);
6070 +               tmp &= ~CMD_CFG_PFC_MODE;
6071 +               priority = 0;
6072 +       } else {
6073 +               GET_TX_EMPTY_PFC_VALUE(tmp);
6074 +               iowrite32be(tmp, &regs->tx_fifo_sections);
6075 +
6076 +               tmp = ioread32be(&regs->command_config);
6077 +               tmp |= CMD_CFG_PFC_MODE;
6078 +    }
6079 +
6080 +    iowrite32be(tmp, &regs->command_config);
6081 +
6082 +    tmp = ioread32be(&regs->pause_quanta[priority / 2]);
6083 +    if (priority % 2)
6084 +        tmp &= 0x0000FFFF;
6085 +    else
6086 +        tmp &= 0xFFFF0000;
6087 +    tmp |= ((uint32_t)pause_time << (16 * (priority % 2)));
6088 +    iowrite32be(tmp, &regs->pause_quanta[priority / 2]);
6089 +
6090 +    tmp = ioread32be(&regs->pause_thresh[priority / 2]);
6091 +    if (priority % 2)
6092 +            tmp &= 0x0000FFFF;
6093 +    else
6094 +            tmp &= 0xFFFF0000;
6095 +    tmp |= ((uint32_t)thresh_time<<(16 * (priority % 2)));
6096 +    iowrite32be(tmp, &regs->pause_thresh[priority / 2]);
6097 +}
6098 +
6099 +void fman_memac_set_rx_ignore_pause_frames(struct memac_regs    *regs,bool enable)
6100 +{
6101 +    uint32_t tmp;
6102 +
6103 +    tmp = ioread32be(&regs->command_config);
6104 +    if (enable)
6105 +        tmp |= CMD_CFG_PAUSE_IGNORE;
6106 +    else
6107 +        tmp &= ~CMD_CFG_PAUSE_IGNORE;
6108 +
6109 +    iowrite32be(tmp, &regs->command_config);
6110 +}
6111 +
6112 +void fman_memac_set_wol(struct memac_regs *regs, bool enable)
6113 +{
6114 +    uint32_t tmp;
6115 +
6116 +    tmp = ioread32be(&regs->command_config);
6117 +
6118 +    if (enable)
6119 +        tmp |= CMD_CFG_MG;
6120 +    else
6121 +        tmp &= ~CMD_CFG_MG;
6122 +
6123 +    iowrite32be(tmp, &regs->command_config);
6124 +}
6125 +
6126 +#define GET_MEMAC_CNTR_64(bn) \
6127 +        (ioread32be(&regs->bn ## _l) | \
6128 +        ((uint64_t)ioread32be(&regs->bn ## _u) << 32))
6129 +
6130 +uint64_t fman_memac_get_counter(struct memac_regs *regs,
6131 +                enum memac_counters reg_name)
6132 +{
6133 +    uint64_t ret_val;
6134 +
6135 +    switch (reg_name) {
6136 +    case E_MEMAC_COUNTER_R64:
6137 +        ret_val = GET_MEMAC_CNTR_64(r64);
6138 +        break;
6139 +    case E_MEMAC_COUNTER_R127:
6140 +        ret_val = GET_MEMAC_CNTR_64(r127);
6141 +        break;
6142 +    case E_MEMAC_COUNTER_R255:
6143 +        ret_val = GET_MEMAC_CNTR_64(r255);
6144 +        break;
6145 +    case E_MEMAC_COUNTER_R511:
6146 +        ret_val = GET_MEMAC_CNTR_64(r511);
6147 +        break;
6148 +    case E_MEMAC_COUNTER_R1023:
6149 +        ret_val = GET_MEMAC_CNTR_64(r1023);
6150 +        break;
6151 +    case E_MEMAC_COUNTER_R1518:
6152 +        ret_val = GET_MEMAC_CNTR_64(r1518);
6153 +        break;
6154 +    case E_MEMAC_COUNTER_R1519X:
6155 +        ret_val = GET_MEMAC_CNTR_64(r1519x);
6156 +        break;
6157 +    case E_MEMAC_COUNTER_RFRG:
6158 +        ret_val = GET_MEMAC_CNTR_64(rfrg);
6159 +        break;
6160 +    case E_MEMAC_COUNTER_RJBR:
6161 +        ret_val = GET_MEMAC_CNTR_64(rjbr);
6162 +        break;
6163 +    case E_MEMAC_COUNTER_RDRP:
6164 +        ret_val = GET_MEMAC_CNTR_64(rdrp);
6165 +        break;
6166 +    case E_MEMAC_COUNTER_RALN:
6167 +        ret_val = GET_MEMAC_CNTR_64(raln);
6168 +        break;
6169 +    case E_MEMAC_COUNTER_TUND:
6170 +        ret_val = GET_MEMAC_CNTR_64(tund);
6171 +        break;
6172 +    case E_MEMAC_COUNTER_ROVR:
6173 +        ret_val = GET_MEMAC_CNTR_64(rovr);
6174 +        break;
6175 +    case E_MEMAC_COUNTER_RXPF:
6176 +        ret_val = GET_MEMAC_CNTR_64(rxpf);
6177 +        break;
6178 +    case E_MEMAC_COUNTER_TXPF:
6179 +        ret_val = GET_MEMAC_CNTR_64(txpf);
6180 +        break;
6181 +    case E_MEMAC_COUNTER_ROCT:
6182 +        ret_val = GET_MEMAC_CNTR_64(roct);
6183 +        break;
6184 +    case E_MEMAC_COUNTER_RMCA:
6185 +        ret_val = GET_MEMAC_CNTR_64(rmca);
6186 +        break;
6187 +    case E_MEMAC_COUNTER_RBCA:
6188 +        ret_val = GET_MEMAC_CNTR_64(rbca);
6189 +        break;
6190 +    case E_MEMAC_COUNTER_RPKT:
6191 +        ret_val = GET_MEMAC_CNTR_64(rpkt);
6192 +        break;
6193 +    case E_MEMAC_COUNTER_RUCA:
6194 +        ret_val = GET_MEMAC_CNTR_64(ruca);
6195 +        break;
6196 +    case E_MEMAC_COUNTER_RERR:
6197 +        ret_val = GET_MEMAC_CNTR_64(rerr);
6198 +        break;
6199 +    case E_MEMAC_COUNTER_TOCT:
6200 +        ret_val = GET_MEMAC_CNTR_64(toct);
6201 +        break;
6202 +    case E_MEMAC_COUNTER_TMCA:
6203 +        ret_val = GET_MEMAC_CNTR_64(tmca);
6204 +        break;
6205 +    case E_MEMAC_COUNTER_TBCA:
6206 +        ret_val = GET_MEMAC_CNTR_64(tbca);
6207 +        break;
6208 +    case E_MEMAC_COUNTER_TUCA:
6209 +        ret_val = GET_MEMAC_CNTR_64(tuca);
6210 +        break;
6211 +    case E_MEMAC_COUNTER_TERR:
6212 +        ret_val = GET_MEMAC_CNTR_64(terr);
6213 +        break;
6214 +    default:
6215 +        ret_val = 0;
6216 +    }
6217 +
6218 +    return ret_val;
6219 +}
6220 +
6221 +void fman_memac_adjust_link(struct memac_regs *regs,
6222 +        enum enet_interface iface_mode,
6223 +        enum enet_speed speed, bool full_dx)
6224 +{
6225 +    uint32_t    tmp;
6226 +
6227 +    tmp = ioread32be(&regs->if_mode);
6228 +
6229 +    if (full_dx)
6230 +        tmp &= ~IF_MODE_HD;
6231 +    else
6232 +        tmp |= IF_MODE_HD;
6233 +
6234 +    if (iface_mode == E_ENET_IF_RGMII) {
6235 +        /* Configure RGMII in manual mode */
6236 +        tmp &= ~IF_MODE_RGMII_AUTO;
6237 +        tmp &= ~IF_MODE_RGMII_SP_MASK;
6238 +
6239 +        if (full_dx)
6240 +            tmp |= IF_MODE_RGMII_FD;
6241 +        else
6242 +            tmp &= ~IF_MODE_RGMII_FD;
6243 +
6244 +        switch (speed) {
6245 +        case E_ENET_SPEED_1000:
6246 +            tmp |= IF_MODE_RGMII_1000;
6247 +            break;
6248 +        case E_ENET_SPEED_100:
6249 +            tmp |= IF_MODE_RGMII_100;
6250 +            break;
6251 +        case E_ENET_SPEED_10:
6252 +            tmp |= IF_MODE_RGMII_10;
6253 +            break;
6254 +        default:
6255 +            break;
6256 +        }
6257 +    }
6258 +
6259 +    iowrite32be(tmp, &regs->if_mode);
6260 +}
6261 +
6262 +void fman_memac_defconfig(struct memac_cfg *cfg)
6263 +{
6264 +    cfg->reset_on_init         = FALSE;
6265 +    cfg->wan_mode_enable               = FALSE;
6266 +    cfg->promiscuous_mode_enable       = FALSE;
6267 +    cfg->pause_forward_enable  = FALSE;
6268 +    cfg->pause_ignore          = FALSE;
6269 +    cfg->tx_addr_ins_enable            = FALSE;
6270 +    cfg->loopback_enable               = FALSE;
6271 +    cfg->cmd_frame_enable              = FALSE;
6272 +    cfg->rx_error_discard              = FALSE;
6273 +    cfg->send_idle_enable              = FALSE;
6274 +    cfg->no_length_check_enable        = TRUE;
6275 +    cfg->lgth_check_nostdr             = FALSE;
6276 +    cfg->time_stamp_enable             = FALSE;
6277 +    cfg->tx_ipg_length         = DEFAULT_TX_IPG_LENGTH;
6278 +    cfg->max_frame_length              = DEFAULT_FRAME_LENGTH;
6279 +    cfg->pause_quanta          = DEFAULT_PAUSE_QUANTA;
6280 +    cfg->pad_enable                    = TRUE;
6281 +    cfg->phy_tx_ena_on         = FALSE;
6282 +    cfg->rx_sfd_any                    = FALSE;
6283 +    cfg->rx_pbl_fwd                    = FALSE;
6284 +    cfg->tx_pbl_fwd                    = FALSE;
6285 +    cfg->debug_mode                    = FALSE;
6286 +    cfg->wake_on_lan        = FALSE;
6287 +}
6288 --- /dev/null
6289 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac_mii_acc.c
6290 @@ -0,0 +1,213 @@
6291 +/*
6292 + * Copyright 2008-2013 Freescale Semiconductor Inc.
6293 + *
6294 + * Redistribution and use in source and binary forms, with or without
6295 + * modification, are permitted provided that the following conditions are met:
6296 + *     * Redistributions of source code must retain the above copyright
6297 + *       notice, this list of conditions and the following disclaimer.
6298 + *     * Redistributions in binary form must reproduce the above copyright
6299 + *       notice, this list of conditions and the following disclaimer in the
6300 + *       documentation and/or other materials provided with the distribution.
6301 + *     * Neither the name of Freescale Semiconductor nor the
6302 + *       names of its contributors may be used to endorse or promote products
6303 + *       derived from this software without specific prior written permission.
6304 + *
6305 + *
6306 + * ALTERNATIVELY, this software may be distributed under the terms of the
6307 + * GNU General Public License ("GPL") as published by the Free Software
6308 + * Foundation, either version 2 of that License or (at your option) any
6309 + * later version.
6310 + *
6311 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
6312 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
6313 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
6314 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
6315 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
6316 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
6317 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
6318 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
6319 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
6320 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
6321 + */
6322 +
6323 +
6324 +#include "fsl_fman_memac_mii_acc.h"
6325 +
6326 +static void write_phy_reg_10g(struct memac_mii_access_mem_map *mii_regs,
6327 +       uint8_t phy_addr, uint8_t reg, uint16_t data)
6328 +{
6329 +       uint32_t                tmp_reg;
6330 +
6331 +       tmp_reg = ioread32be(&mii_regs->mdio_cfg);
6332 +       /* Leave only MDIO_CLK_DIV bits set on */
6333 +       tmp_reg &= MDIO_CFG_CLK_DIV_MASK;
6334 +       /* Set maximum MDIO_HOLD value to allow phy to see
6335 +       change of data signal */
6336 +       tmp_reg |= MDIO_CFG_HOLD_MASK;
6337 +       /* Add 10G interface mode */
6338 +       tmp_reg |= MDIO_CFG_ENC45;
6339 +       iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
6340 +
6341 +       /* Wait for command completion */
6342 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6343 +               udelay(1);
6344 +
6345 +       /* Specify phy and register to be accessed */
6346 +       iowrite32be(phy_addr, &mii_regs->mdio_ctrl);
6347 +       iowrite32be(reg, &mii_regs->mdio_addr);
6348 +       wmb();
6349 +
6350 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6351 +               udelay(1);
6352 +
6353 +       /* Write data */
6354 +       iowrite32be(data, &mii_regs->mdio_data);
6355 +       wmb();
6356 +
6357 +       /* Wait for write transaction end */
6358 +       while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
6359 +               udelay(1);
6360 +}
6361 +
6362 +static uint32_t read_phy_reg_10g(struct memac_mii_access_mem_map *mii_regs,
6363 +       uint8_t phy_addr, uint8_t reg, uint16_t *data)
6364 +{
6365 +       uint32_t                tmp_reg;
6366 +
6367 +       tmp_reg = ioread32be(&mii_regs->mdio_cfg);
6368 +       /* Leave only MDIO_CLK_DIV bits set on */
6369 +       tmp_reg &= MDIO_CFG_CLK_DIV_MASK;
6370 +       /* Set maximum MDIO_HOLD value to allow phy to see
6371 +       change of data signal */
6372 +       tmp_reg |= MDIO_CFG_HOLD_MASK;
6373 +       /* Add 10G interface mode */
6374 +       tmp_reg |= MDIO_CFG_ENC45;
6375 +       iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
6376 +
6377 +       /* Wait for command completion */
6378 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6379 +               udelay(1);
6380 +
6381 +       /* Specify phy and register to be accessed */
6382 +       iowrite32be(phy_addr, &mii_regs->mdio_ctrl);
6383 +       iowrite32be(reg, &mii_regs->mdio_addr);
6384 +       wmb();
6385 +
6386 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6387 +               udelay(1);
6388 +
6389 +       /* Read cycle */
6390 +       tmp_reg = phy_addr;
6391 +       tmp_reg |= MDIO_CTL_READ;
6392 +       iowrite32be(tmp_reg, &mii_regs->mdio_ctrl);
6393 +       wmb();
6394 +
6395 +       /* Wait for data to be available */
6396 +       while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
6397 +               udelay(1);
6398 +
6399 +       *data =  (uint16_t)ioread32be(&mii_regs->mdio_data);
6400 +
6401 +       /* Check if there was an error */
6402 +       return ioread32be(&mii_regs->mdio_cfg);
6403 +}
6404 +
6405 +static void write_phy_reg_1g(struct memac_mii_access_mem_map *mii_regs,
6406 +       uint8_t phy_addr, uint8_t reg, uint16_t data)
6407 +{
6408 +       uint32_t                tmp_reg;
6409 +
6410 +       /* Leave only MDIO_CLK_DIV and MDIO_HOLD bits set on */
6411 +       tmp_reg = ioread32be(&mii_regs->mdio_cfg);
6412 +       tmp_reg &= (MDIO_CFG_CLK_DIV_MASK | MDIO_CFG_HOLD_MASK);
6413 +       iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
6414 +
6415 +       /* Wait for command completion */
6416 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6417 +               udelay(1);
6418 +
6419 +       /* Write transaction */
6420 +       tmp_reg = (phy_addr << MDIO_CTL_PHY_ADDR_SHIFT);
6421 +       tmp_reg |= reg;
6422 +       iowrite32be(tmp_reg, &mii_regs->mdio_ctrl);
6423 +
6424 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6425 +               udelay(1);
6426 +
6427 +       iowrite32be(data, &mii_regs->mdio_data);
6428 +
6429 +       wmb();
6430 +
6431 +       /* Wait for write transaction to end */
6432 +       while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
6433 +               udelay(1);
6434 +}
6435 +
6436 +static uint32_t read_phy_reg_1g(struct memac_mii_access_mem_map *mii_regs,
6437 +       uint8_t phy_addr, uint8_t reg, uint16_t *data)
6438 +{
6439 +       uint32_t tmp_reg;
6440 +
6441 +       /* Leave only MDIO_CLK_DIV and MDIO_HOLD bits set on */
6442 +       tmp_reg = ioread32be(&mii_regs->mdio_cfg);
6443 +       tmp_reg &= (MDIO_CFG_CLK_DIV_MASK | MDIO_CFG_HOLD_MASK);
6444 +       iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
6445 +
6446 +       /* Wait for command completion */
6447 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6448 +               udelay(1);
6449 +
6450 +       /* Read transaction */
6451 +       tmp_reg = (phy_addr << MDIO_CTL_PHY_ADDR_SHIFT);
6452 +       tmp_reg |= reg;
6453 +       tmp_reg |= MDIO_CTL_READ;
6454 +       iowrite32be(tmp_reg, &mii_regs->mdio_ctrl);
6455 +
6456 +       while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
6457 +               udelay(1);
6458 +
6459 +       /* Wait for data to be available */
6460 +       while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
6461 +               udelay(1);
6462 +
6463 +       *data =  (uint16_t)ioread32be(&mii_regs->mdio_data);
6464 +
6465 +       /* Check error */
6466 +       return ioread32be(&mii_regs->mdio_cfg);
6467 +}
6468 +
6469 +/*****************************************************************************/
6470 +int fman_memac_mii_write_phy_reg(struct memac_mii_access_mem_map *mii_regs,
6471 +       uint8_t phy_addr, uint8_t reg, uint16_t data,
6472 +       enum enet_speed enet_speed)
6473 +{
6474 +       /* Figure out interface type - 10G vs 1G.
6475 +       In 10G interface both phy_addr and devAddr present. */
6476 +       if (enet_speed == E_ENET_SPEED_10000)
6477 +               write_phy_reg_10g(mii_regs, phy_addr, reg, data);
6478 +       else
6479 +               write_phy_reg_1g(mii_regs, phy_addr, reg, data);
6480 +
6481 +       return 0;
6482 +}
6483 +
6484 +/*****************************************************************************/
6485 +int fman_memac_mii_read_phy_reg(struct memac_mii_access_mem_map *mii_regs,
6486 +       uint8_t phy_addr, uint8_t reg, uint16_t *data,
6487 +       enum enet_speed enet_speed)
6488 +{
6489 +       uint32_t ans;
6490 +       /* Figure out interface type - 10G vs 1G.
6491 +       In 10G interface both phy_addr and devAddr present. */
6492 +       if (enet_speed == E_ENET_SPEED_10000)
6493 +               ans = read_phy_reg_10g(mii_regs, phy_addr, reg, data);
6494 +       else
6495 +               ans = read_phy_reg_1g(mii_regs, phy_addr, reg, data);
6496 +
6497 +       if (ans & MDIO_CFG_READ_ERR)
6498 +               return -EINVAL;
6499 +       return 0;
6500 +}
6501 +
6502 +/* ......................................................................... */
6503 +
6504 --- /dev/null
6505 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_tgec.c
6506 @@ -0,0 +1,367 @@
6507 +/*
6508 + * Copyright 2008-2012 Freescale Semiconductor Inc.
6509 + *
6510 + * Redistribution and use in source and binary forms, with or without
6511 + * modification, are permitted provided that the following conditions are met:
6512 + *     * Redistributions of source code must retain the above copyright
6513 + *       notice, this list of conditions and the following disclaimer.
6514 + *     * Redistributions in binary form must reproduce the above copyright
6515 + *       notice, this list of conditions and the following disclaimer in the
6516 + *       documentation and/or other materials provided with the distribution.
6517 + *     * Neither the name of Freescale Semiconductor nor the
6518 + *       names of its contributors may be used to endorse or promote products
6519 + *       derived from this software without specific prior written permission.
6520 + *
6521 + *
6522 + * ALTERNATIVELY, this software may be distributed under the terms of the
6523 + * GNU General Public License ("GPL") as published by the Free Software
6524 + * Foundation, either version 2 of that License or (at your option) any
6525 + * later version.
6526 + *
6527 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
6528 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
6529 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
6530 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
6531 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
6532 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
6533 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
6534 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
6535 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
6536 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
6537 + */
6538 +
6539 +
6540 +#include "fsl_fman_tgec.h"
6541 +
6542 +
6543 +void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *adr)
6544 +{
6545 +       uint32_t tmp0, tmp1;
6546 +
6547 +       tmp0 = (uint32_t)(adr[0] |
6548 +                       adr[1] << 8 |
6549 +                       adr[2] << 16 |
6550 +                       adr[3] << 24);
6551 +       tmp1 = (uint32_t)(adr[4] | adr[5] << 8);
6552 +       iowrite32be(tmp0, &regs->mac_addr_0);
6553 +       iowrite32be(tmp1, &regs->mac_addr_1);
6554 +}
6555 +
6556 +void fman_tgec_reset_stat(struct tgec_regs *regs)
6557 +{
6558 +       uint32_t tmp;
6559 +
6560 +       tmp = ioread32be(&regs->command_config);
6561 +
6562 +       tmp |= CMD_CFG_STAT_CLR;
6563 +
6564 +       iowrite32be(tmp, &regs->command_config);
6565 +
6566 +       while (ioread32be(&regs->command_config) & CMD_CFG_STAT_CLR) ;
6567 +}
6568 +
6569 +#define GET_TGEC_CNTR_64(bn) \
6570 +       (((uint64_t)ioread32be(&regs->bn ## _u) << 32) | \
6571 +                       ioread32be(&regs->bn ## _l))
6572 +
6573 +uint64_t fman_tgec_get_counter(struct tgec_regs *regs, enum tgec_counters reg_name)
6574 +{
6575 +       uint64_t ret_val;
6576 +
6577 +       switch (reg_name) {
6578 +       case E_TGEC_COUNTER_R64:
6579 +               ret_val = GET_TGEC_CNTR_64(r64);
6580 +               break;
6581 +       case E_TGEC_COUNTER_R127:
6582 +               ret_val = GET_TGEC_CNTR_64(r127);
6583 +               break;
6584 +       case E_TGEC_COUNTER_R255:
6585 +               ret_val = GET_TGEC_CNTR_64(r255);
6586 +               break;
6587 +       case E_TGEC_COUNTER_R511:
6588 +               ret_val = GET_TGEC_CNTR_64(r511);
6589 +               break;
6590 +       case E_TGEC_COUNTER_R1023:
6591 +               ret_val = GET_TGEC_CNTR_64(r1023);
6592 +               break;
6593 +       case E_TGEC_COUNTER_R1518:
6594 +               ret_val = GET_TGEC_CNTR_64(r1518);
6595 +               break;
6596 +       case E_TGEC_COUNTER_R1519X:
6597 +               ret_val = GET_TGEC_CNTR_64(r1519x);
6598 +               break;
6599 +       case E_TGEC_COUNTER_TRFRG:
6600 +               ret_val = GET_TGEC_CNTR_64(trfrg);
6601 +               break;
6602 +       case E_TGEC_COUNTER_TRJBR:
6603 +               ret_val = GET_TGEC_CNTR_64(trjbr);
6604 +               break;
6605 +       case E_TGEC_COUNTER_RDRP:
6606 +               ret_val = GET_TGEC_CNTR_64(rdrp);
6607 +               break;
6608 +       case E_TGEC_COUNTER_RALN:
6609 +               ret_val = GET_TGEC_CNTR_64(raln);
6610 +               break;
6611 +       case E_TGEC_COUNTER_TRUND:
6612 +               ret_val = GET_TGEC_CNTR_64(trund);
6613 +               break;
6614 +       case E_TGEC_COUNTER_TROVR:
6615 +               ret_val = GET_TGEC_CNTR_64(trovr);
6616 +               break;
6617 +       case E_TGEC_COUNTER_RXPF:
6618 +               ret_val = GET_TGEC_CNTR_64(rxpf);
6619 +               break;
6620 +       case E_TGEC_COUNTER_TXPF:
6621 +               ret_val = GET_TGEC_CNTR_64(txpf);
6622 +               break;
6623 +       case E_TGEC_COUNTER_ROCT:
6624 +               ret_val = GET_TGEC_CNTR_64(roct);
6625 +               break;
6626 +       case E_TGEC_COUNTER_RMCA:
6627 +               ret_val = GET_TGEC_CNTR_64(rmca);
6628 +               break;
6629 +       case E_TGEC_COUNTER_RBCA:
6630 +               ret_val = GET_TGEC_CNTR_64(rbca);
6631 +               break;
6632 +       case E_TGEC_COUNTER_RPKT:
6633 +               ret_val = GET_TGEC_CNTR_64(rpkt);
6634 +               break;
6635 +       case E_TGEC_COUNTER_RUCA:
6636 +               ret_val = GET_TGEC_CNTR_64(ruca);
6637 +               break;
6638 +       case E_TGEC_COUNTER_RERR:
6639 +               ret_val = GET_TGEC_CNTR_64(rerr);
6640 +               break;
6641 +       case E_TGEC_COUNTER_TOCT:
6642 +               ret_val = GET_TGEC_CNTR_64(toct);
6643 +               break;
6644 +       case E_TGEC_COUNTER_TMCA:
6645 +               ret_val = GET_TGEC_CNTR_64(tmca);
6646 +               break;
6647 +       case E_TGEC_COUNTER_TBCA:
6648 +               ret_val = GET_TGEC_CNTR_64(tbca);
6649 +               break;
6650 +       case E_TGEC_COUNTER_TUCA:
6651 +               ret_val = GET_TGEC_CNTR_64(tuca);
6652 +               break;
6653 +       case E_TGEC_COUNTER_TERR:
6654 +               ret_val = GET_TGEC_CNTR_64(terr);
6655 +               break;
6656 +       default:
6657 +               ret_val = 0;
6658 +       }
6659 +
6660 +       return ret_val;
6661 +}
6662 +
6663 +void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx)
6664 +{
6665 +       uint32_t tmp;
6666 +
6667 +       tmp = ioread32be(&regs->command_config);
6668 +       if (apply_rx)
6669 +               tmp |= CMD_CFG_RX_EN;
6670 +       if (apply_tx)
6671 +               tmp |= CMD_CFG_TX_EN;
6672 +       iowrite32be(tmp, &regs->command_config);
6673 +}
6674 +
6675 +void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx)
6676 +{
6677 +       uint32_t tmp_reg_32;
6678 +
6679 +       tmp_reg_32 = ioread32be(&regs->command_config);
6680 +       if (apply_rx)
6681 +               tmp_reg_32 &= ~CMD_CFG_RX_EN;
6682 +       if (apply_tx)
6683 +               tmp_reg_32 &= ~CMD_CFG_TX_EN;
6684 +       iowrite32be(tmp_reg_32, &regs->command_config);
6685 +}
6686 +
6687 +void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val)
6688 +{
6689 +       uint32_t tmp;
6690 +
6691 +       tmp = ioread32be(&regs->command_config);
6692 +       if (val)
6693 +               tmp |= CMD_CFG_PROMIS_EN;
6694 +       else
6695 +               tmp &= ~CMD_CFG_PROMIS_EN;
6696 +       iowrite32be(tmp, &regs->command_config);
6697 +}
6698 +
6699 +void fman_tgec_reset_filter_table(struct tgec_regs *regs)
6700 +{
6701 +       uint32_t i;
6702 +       for (i = 0; i < 512; i++)
6703 +               iowrite32be(i & ~TGEC_HASH_MCAST_EN, &regs->hashtable_ctrl);
6704 +}
6705 +
6706 +void fman_tgec_set_hash_table_entry(struct tgec_regs *regs, uint32_t crc)
6707 +{
6708 +    uint32_t hash = (crc >> TGEC_HASH_MCAST_SHIFT) & TGEC_HASH_ADR_MSK;        /* Take 9 MSB bits */
6709 +       iowrite32be(hash | TGEC_HASH_MCAST_EN, &regs->hashtable_ctrl);
6710 +}
6711 +
6712 +void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value)
6713 +{
6714 +       iowrite32be(value, &regs->hashtable_ctrl);
6715 +}
6716 +
6717 +void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time)
6718 +{
6719 +       iowrite32be((uint32_t)pause_time, &regs->pause_quant);
6720 +}
6721 +
6722 +void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en)
6723 +{
6724 +       uint32_t tmp;
6725 +
6726 +       tmp = ioread32be(&regs->command_config);
6727 +       if (en)
6728 +               tmp |= CMD_CFG_PAUSE_IGNORE;
6729 +       else
6730 +               tmp &= ~CMD_CFG_PAUSE_IGNORE;
6731 +       iowrite32be(tmp, &regs->command_config);
6732 +}
6733 +
6734 +void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en)
6735 +{
6736 +       uint32_t tmp;
6737 +
6738 +       tmp = ioread32be(&regs->command_config);
6739 +       if (en)
6740 +               tmp |= CMD_CFG_EN_TIMESTAMP;
6741 +       else
6742 +               tmp &= ~CMD_CFG_EN_TIMESTAMP;
6743 +       iowrite32be(tmp, &regs->command_config);
6744 +}
6745 +
6746 +uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask)
6747 +{
6748 +       return ioread32be(&regs->ievent) & ev_mask;
6749 +}
6750 +
6751 +void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask)
6752 +{
6753 +       iowrite32be(ev_mask, &regs->ievent);
6754 +}
6755 +
6756 +uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs)
6757 +{
6758 +       return ioread32be(&regs->imask);
6759 +}
6760 +
6761 +void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *adr)
6762 +{
6763 +       uint32_t tmp0, tmp1;
6764 +
6765 +       tmp0 = (uint32_t)(adr[0] |
6766 +                       adr[1] << 8 |
6767 +                       adr[2] << 16 |
6768 +                       adr[3] << 24);
6769 +       tmp1 = (uint32_t)(adr[4] | adr[5] << 8);
6770 +       iowrite32be(tmp0, &regs->mac_addr_2);
6771 +       iowrite32be(tmp1, &regs->mac_addr_3);
6772 +}
6773 +
6774 +void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs)
6775 +{
6776 +       iowrite32be(0, &regs->mac_addr_2);
6777 +       iowrite32be(0, &regs->mac_addr_3);
6778 +}
6779 +
6780 +uint32_t fman_tgec_get_revision(struct tgec_regs *regs)
6781 +{
6782 +       return ioread32be(&regs->tgec_id);
6783 +}
6784 +
6785 +void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask)
6786 +{
6787 +       iowrite32be(ioread32be(&regs->imask) | ev_mask, &regs->imask);
6788 +}
6789 +
6790 +void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask)
6791 +{
6792 +       iowrite32be(ioread32be(&regs->imask) & ~ev_mask, &regs->imask);
6793 +}
6794 +
6795 +uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs)
6796 +{
6797 +       return (uint16_t) ioread32be(&regs->maxfrm);
6798 +}
6799 +
6800 +void fman_tgec_defconfig(struct tgec_cfg *cfg)
6801 +{
6802 +       cfg->wan_mode_enable = DEFAULT_WAN_MODE_ENABLE;
6803 +       cfg->promiscuous_mode_enable = DEFAULT_PROMISCUOUS_MODE_ENABLE;
6804 +       cfg->pause_forward_enable = DEFAULT_PAUSE_FORWARD_ENABLE;
6805 +       cfg->pause_ignore = DEFAULT_PAUSE_IGNORE;
6806 +       cfg->tx_addr_ins_enable = DEFAULT_TX_ADDR_INS_ENABLE;
6807 +       cfg->loopback_enable = DEFAULT_LOOPBACK_ENABLE;
6808 +       cfg->cmd_frame_enable = DEFAULT_CMD_FRAME_ENABLE;
6809 +       cfg->rx_error_discard = DEFAULT_RX_ERROR_DISCARD;
6810 +       cfg->send_idle_enable = DEFAULT_SEND_IDLE_ENABLE;
6811 +       cfg->no_length_check_enable = DEFAULT_NO_LENGTH_CHECK_ENABLE;
6812 +       cfg->lgth_check_nostdr = DEFAULT_LGTH_CHECK_NOSTDR;
6813 +       cfg->time_stamp_enable = DEFAULT_TIME_STAMP_ENABLE;
6814 +       cfg->tx_ipg_length = DEFAULT_TX_IPG_LENGTH;
6815 +       cfg->max_frame_length = DEFAULT_MAX_FRAME_LENGTH;
6816 +       cfg->pause_quant = DEFAULT_PAUSE_QUANT;
6817 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
6818 +       cfg->skip_fman11_workaround = FALSE;
6819 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
6820 +}
6821 +
6822 +int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,
6823 +               uint32_t exception_mask)
6824 +{
6825 +       uint32_t tmp;
6826 +
6827 +       /* Config */
6828 +       tmp = 0x40; /* CRC forward */
6829 +       if (cfg->wan_mode_enable)
6830 +               tmp |= CMD_CFG_WAN_MODE;
6831 +       if (cfg->promiscuous_mode_enable)
6832 +               tmp |= CMD_CFG_PROMIS_EN;
6833 +       if (cfg->pause_forward_enable)
6834 +               tmp |= CMD_CFG_PAUSE_FWD;
6835 +       if (cfg->pause_ignore)
6836 +               tmp |= CMD_CFG_PAUSE_IGNORE;
6837 +       if (cfg->tx_addr_ins_enable)
6838 +               tmp |= CMD_CFG_TX_ADDR_INS;
6839 +       if (cfg->loopback_enable)
6840 +               tmp |= CMD_CFG_LOOPBACK_EN;
6841 +       if (cfg->cmd_frame_enable)
6842 +               tmp |= CMD_CFG_CMD_FRM_EN;
6843 +       if (cfg->rx_error_discard)
6844 +               tmp |= CMD_CFG_RX_ER_DISC;
6845 +       if (cfg->send_idle_enable)
6846 +               tmp |= CMD_CFG_SEND_IDLE;
6847 +       if (cfg->no_length_check_enable)
6848 +               tmp |= CMD_CFG_NO_LEN_CHK;
6849 +       if (cfg->time_stamp_enable)
6850 +               tmp |= CMD_CFG_EN_TIMESTAMP;
6851 +       iowrite32be(tmp, &regs->command_config);
6852 +
6853 +       /* Max Frame Length */
6854 +       iowrite32be((uint32_t)cfg->max_frame_length, &regs->maxfrm);
6855 +       /* Pause Time */
6856 +       iowrite32be(cfg->pause_quant, &regs->pause_quant);
6857 +
6858 +       /* clear all pending events and set-up interrupts */
6859 +       fman_tgec_ack_event(regs, 0xffffffff);
6860 +       fman_tgec_enable_interrupt(regs, exception_mask);
6861 +
6862 +       return 0;
6863 +}
6864 +
6865 +void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs *regs)
6866 +{
6867 +       uint32_t tmp;
6868 +
6869 +       /* restore the default tx ipg Length */
6870 +       tmp = (ioread32be(&regs->tx_ipg_len) & ~TGEC_TX_IPG_LENGTH_MASK) | 12;
6871 +
6872 +       iowrite32be(tmp, &regs->tx_ipg_len);
6873 +}
6874 --- /dev/null
6875 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
6876 @@ -0,0 +1,1096 @@
6877 +/*
6878 + * Copyright 2008-2012 Freescale Semiconductor Inc.
6879 + *
6880 + * Redistribution and use in source and binary forms, with or without
6881 + * modification, are permitted provided that the following conditions are met:
6882 + *     * Redistributions of source code must retain the above copyright
6883 + *       notice, this list of conditions and the following disclaimer.
6884 + *     * Redistributions in binary form must reproduce the above copyright
6885 + *       notice, this list of conditions and the following disclaimer in the
6886 + *       documentation and/or other materials provided with the distribution.
6887 + *     * Neither the name of Freescale Semiconductor nor the
6888 + *       names of its contributors may be used to endorse or promote products
6889 + *       derived from this software without specific prior written permission.
6890 + *
6891 + *
6892 + * ALTERNATIVELY, this software may be distributed under the terms of the
6893 + * GNU General Public License ("GPL") as published by the Free Software
6894 + * Foundation, either version 2 of that License or (at your option) any
6895 + * later version.
6896 + *
6897 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
6898 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
6899 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
6900 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
6901 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
6902 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
6903 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
6904 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
6905 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
6906 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
6907 + */
6908 +
6909 +
6910 +/******************************************************************************
6911 + @File          memac.c
6912 +
6913 + @Description   FM mEMAC driver
6914 +*//***************************************************************************/
6915 +
6916 +#include "std_ext.h"
6917 +#include "string_ext.h"
6918 +#include "error_ext.h"
6919 +#include "xx_ext.h"
6920 +#include "endian_ext.h"
6921 +#include "debug_ext.h"
6922 +
6923 +#include "fm_common.h"
6924 +#include "memac.h"
6925 +
6926 +
6927 +/*****************************************************************************/
6928 +/*                      Internal routines                                    */
6929 +/*****************************************************************************/
6930 +
6931 +/* ......................................................................... */
6932 +
6933 +static uint32_t GetMacAddrHashCode(uint64_t ethAddr)
6934 +{
6935 +    uint64_t    mask1, mask2;
6936 +    uint32_t    xorVal = 0;
6937 +    uint8_t     i, j;
6938 +
6939 +    for (i=0; i<6; i++)
6940 +    {
6941 +        mask1 = ethAddr & (uint64_t)0x01;
6942 +        ethAddr >>= 1;
6943 +
6944 +        for (j=0; j<7; j++)
6945 +        {
6946 +            mask2 = ethAddr & (uint64_t)0x01;
6947 +            mask1 ^= mask2;
6948 +            ethAddr >>= 1;
6949 +        }
6950 +
6951 +        xorVal |= (mask1 << (5-i));
6952 +    }
6953 +
6954 +    return xorVal;
6955 +}
6956 +
6957 +/* ......................................................................... */
6958 +
6959 +static void SetupSgmiiInternalPhy(t_Memac *p_Memac, uint8_t phyAddr)
6960 +{
6961 +    uint16_t    tmpReg16;
6962 +    e_EnetMode  enetMode;
6963 +
6964 +     /* In case the higher MACs are used (i.e. the MACs that should support 10G),
6965 +        speed=10000 is provided for SGMII ports. Temporary modify enet mode
6966 +        to 1G one, so MII functions can work correctly. */
6967 +    enetMode = p_Memac->enetMode;
6968 +
6969 +    /* SGMII mode + AN enable */
6970 +    tmpReg16 = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII;
6971 +    if ((p_Memac->enetMode) == e_ENET_MODE_SGMII_2500)
6972 +        tmpReg16 = PHY_SGMII_CR_PHY_RESET | PHY_SGMII_IF_SPEED_GIGABIT | PHY_SGMII_IF_MODE_SGMII;
6973 +
6974 +    p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000);
6975 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16);
6976 +
6977 +    /* Device ability according to SGMII specification */
6978 +    tmpReg16 = PHY_SGMII_DEV_ABILITY_SGMII;
6979 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x4, tmpReg16);
6980 +
6981 +    /* Adjust link timer for SGMII  -
6982 +       According to Cisco SGMII specification the timer should be 1.6 ms.
6983 +       The link_timer register is configured in units of the clock.
6984 +       - When running as 1G SGMII, Serdes clock is 125 MHz, so
6985 +         unit = 1 / (125*10^6 Hz) = 8 ns.
6986 +         1.6 ms in units of 8 ns = 1.6ms / 8ns = 2 * 10^5 = 0x30d40
6987 +       - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so
6988 +         unit = 1 / (312.5*10^6 Hz) = 3.2 ns.
6989 +         1.6 ms in units of 3.2 ns = 1.6ms / 3.2ns = 5 * 10^5 = 0x7a120.
6990 +       Since link_timer value of 1G SGMII will be too short for 2.5 SGMII,
6991 +       we always set up here a value of 2.5 SGMII. */
6992 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x13, 0x0007);
6993 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x12, 0xa120);
6994 +
6995 +    /* Restart AN */
6996 +    tmpReg16 = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
6997 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x0, tmpReg16);
6998 +
6999 +    /* Restore original enet mode */
7000 +    p_Memac->enetMode = enetMode;
7001 +}
7002 +
7003 +/* ......................................................................... */
7004 +
7005 +static void SetupSgmiiInternalPhyBaseX(t_Memac *p_Memac, uint8_t phyAddr)
7006 +{
7007 +    uint16_t    tmpReg16;
7008 +    e_EnetMode  enetMode;
7009 +
7010 +     /* In case the higher MACs are used (i.e. the MACs that should support 10G),
7011 +        speed=10000 is provided for SGMII ports. Temporary modify enet mode
7012 +        to 1G one, so MII functions can work correctly. */
7013 +    enetMode = p_Memac->enetMode;
7014 +    p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000);
7015 +
7016 +    /* 1000BaseX mode */
7017 +    tmpReg16 = PHY_SGMII_IF_MODE_1000X;
7018 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16);
7019 +
7020 +    /* AN Device capability  */
7021 +    tmpReg16 = PHY_SGMII_DEV_ABILITY_1000X;
7022 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x4, tmpReg16);
7023 +
7024 +    /* Adjust link timer for SGMII  -
7025 +       For Serdes 1000BaseX auto-negotiation the timer should be 10 ms.
7026 +       The link_timer register is configured in units of the clock.
7027 +       - When running as 1G SGMII, Serdes clock is 125 MHz, so
7028 +         unit = 1 / (125*10^6 Hz) = 8 ns.
7029 +         10 ms in units of 8 ns = 10ms / 8ns = 1250000 = 0x1312d0
7030 +       - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so
7031 +         unit = 1 / (312.5*10^6 Hz) = 3.2 ns.
7032 +         10 ms in units of 3.2 ns = 10ms / 3.2ns = 3125000 = 0x2faf08.
7033 +       Since link_timer value of 1G SGMII will be too short for 2.5 SGMII,
7034 +       we always set up here a value of 2.5 SGMII. */
7035 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x13, 0x002f);
7036 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x12, 0xaf08);
7037 +
7038 +    /* Restart AN */
7039 +    tmpReg16 = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
7040 +    MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x0, tmpReg16);
7041 +
7042 +    /* Restore original enet mode */
7043 +    p_Memac->enetMode = enetMode;
7044 +}
7045 +
7046 +/* ......................................................................... */
7047 +
7048 +static t_Error CheckInitParameters(t_Memac *p_Memac)
7049 +{
7050 +    e_FmMacType portType;
7051 +
7052 +    portType = ((ENET_SPEED_FROM_MODE(p_Memac->enetMode) < e_ENET_SPEED_10000) ? e_FM_MAC_1G : e_FM_MAC_10G);
7053 +
7054 +#if (FM_MAX_NUM_OF_10G_MACS > 0)
7055 +    if ((portType == e_FM_MAC_10G) && (p_Memac->macId >= FM_MAX_NUM_OF_10G_MACS))
7056 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("10G MAC ID must be less than %d", FM_MAX_NUM_OF_10G_MACS));
7057 +#endif /* (FM_MAX_NUM_OF_10G_MACS > 0) */
7058 +
7059 +    if ((portType == e_FM_MAC_1G) && (p_Memac->macId >= FM_MAX_NUM_OF_1G_MACS))
7060 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("1G MAC ID must be less than %d", FM_MAX_NUM_OF_1G_MACS));
7061 +    if (p_Memac->addr == 0)
7062 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC must have a valid MAC address"));
7063 +    if (!p_Memac->f_Exception)
7064 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Uninitialized f_Exception"));
7065 +    if (!p_Memac->f_Event)
7066 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Uninitialized f_Event"));
7067 +#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
7068 +    if (!p_Memac->p_MemacDriverParam->no_length_check_enable)
7069 +       RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
7070 +#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
7071 +
7072 +    return E_OK;
7073 +}
7074 +
7075 +/* ........................................................................... */
7076 +
7077 +static void MemacErrException(t_Handle h_Memac)
7078 +{
7079 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7080 +    uint32_t    event, imask;
7081 +
7082 +    event = fman_memac_get_event(p_Memac->p_MemMap, 0xffffffff);
7083 +    imask = fman_memac_get_interrupt_mask(p_Memac->p_MemMap);
7084 +
7085 +    /* Imask include both error and notification/event bits.
7086 +       Leaving only error bits enabled by imask.
7087 +       The imask error bits are shifted by 16 bits offset from
7088 +       their corresponding location in the ievent - hence the >> 16 */
7089 +    event &= ((imask & MEMAC_ALL_ERRS_IMASK) >> 16);
7090 +
7091 +    fman_memac_ack_event(p_Memac->p_MemMap, event);
7092 +
7093 +    if (event & MEMAC_IEVNT_TS_ECC_ER)
7094 +        p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_TS_FIFO_ECC_ERR);
7095 +    if (event & MEMAC_IEVNT_TX_ECC_ER)
7096 +        p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_10G_1TX_ECC_ER);
7097 +    if (event & MEMAC_IEVNT_RX_ECC_ER)
7098 +        p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_10G_RX_ECC_ER);
7099 +}
7100 +
7101 +static void MemacException(t_Handle h_Memac)
7102 +{
7103 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7104 +    uint32_t    event, imask;
7105 +
7106 +    event = fman_memac_get_event(p_Memac->p_MemMap, 0xffffffff);
7107 +    imask = fman_memac_get_interrupt_mask(p_Memac->p_MemMap);
7108 +
7109 +    /* Imask include both error and notification/event bits.
7110 +       Leaving only error bits enabled by imask.
7111 +       The imask error bits are shifted by 16 bits offset from
7112 +       their corresponding location in the ievent - hence the >> 16 */
7113 +    event &= ((imask & MEMAC_ALL_ERRS_IMASK) >> 16);
7114 +
7115 +    fman_memac_ack_event(p_Memac->p_MemMap, event);
7116 +
7117 +    if (event & MEMAC_IEVNT_MGI)
7118 +        p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_MAGIC_PACKET_INDICATION);
7119 +}
7120 +
7121 +/* ......................................................................... */
7122 +
7123 +static void FreeInitResources(t_Memac *p_Memac)
7124 +{
7125 +    e_FmMacType portType;
7126 +
7127 +    portType =
7128 +        ((ENET_SPEED_FROM_MODE(p_Memac->enetMode) < e_ENET_SPEED_10000) ? e_FM_MAC_1G : e_FM_MAC_10G);
7129 +
7130 +    if (portType == e_FM_MAC_10G)
7131 +        FmUnregisterIntr(p_Memac->fmMacControllerDriver.h_Fm, e_FM_MOD_10G_MAC, p_Memac->macId, e_FM_INTR_TYPE_ERR);
7132 +    else
7133 +        FmUnregisterIntr(p_Memac->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Memac->macId, e_FM_INTR_TYPE_ERR);
7134 +
7135 +    /* release the driver's group hash table */
7136 +    FreeHashTable(p_Memac->p_MulticastAddrHash);
7137 +    p_Memac->p_MulticastAddrHash =   NULL;
7138 +
7139 +    /* release the driver's individual hash table */
7140 +    FreeHashTable(p_Memac->p_UnicastAddrHash);
7141 +    p_Memac->p_UnicastAddrHash =     NULL;
7142 +}
7143 +
7144 +
7145 +/*****************************************************************************/
7146 +/*                     mEMAC API routines                                    */
7147 +/*****************************************************************************/
7148 +
7149 +/* ......................................................................... */
7150 +
7151 +static t_Error MemacEnable(t_Handle h_Memac,  e_CommMode mode)
7152 +{
7153 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7154 +
7155 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7156 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7157 +
7158 +    fman_memac_enable(p_Memac->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
7159 +
7160 +    return E_OK;
7161 +}
7162 +
7163 +/* ......................................................................... */
7164 +
7165 +static t_Error MemacDisable (t_Handle h_Memac, e_CommMode mode)
7166 +{
7167 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7168 +
7169 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7170 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7171 +
7172 +    fman_memac_disable(p_Memac->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
7173 +
7174 +    return E_OK;
7175 +}
7176 +
7177 +/* ......................................................................... */
7178 +
7179 +static t_Error MemacSetPromiscuous(t_Handle h_Memac, bool newVal)
7180 +{
7181 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7182 +
7183 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7184 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7185 +
7186 +    fman_memac_set_promiscuous(p_Memac->p_MemMap, newVal);
7187 +
7188 +    return E_OK;
7189 +}
7190 +
7191 +/* .............................................................................. */
7192 +
7193 +static t_Error MemacAdjustLink(t_Handle h_Memac, e_EnetSpeed speed, bool fullDuplex)
7194 +{
7195 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7196 +
7197 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7198 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7199 +
7200 +    if ((speed >= e_ENET_SPEED_1000) && (!fullDuplex))
7201 +        RETURN_ERROR(MAJOR, E_CONFLICT,
7202 +                     ("Ethernet MAC 1G or 10G does not support half-duplex"));
7203 +
7204 +    fman_memac_adjust_link(p_Memac->p_MemMap,
7205 +                           (enum enet_interface)ENET_INTERFACE_FROM_MODE(p_Memac->enetMode),
7206 +                           (enum enet_speed)speed,
7207 +                           fullDuplex);
7208 +    return E_OK;
7209 +}
7210 +
7211 +
7212 +/*****************************************************************************/
7213 +/*                      Memac Configs modification functions                 */
7214 +/*****************************************************************************/
7215 +
7216 +/* ......................................................................... */
7217 +
7218 +static t_Error MemacConfigLoopback(t_Handle h_Memac, bool newVal)
7219 +{
7220 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7221 +
7222 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7223 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7224 +
7225 +    p_Memac->p_MemacDriverParam->loopback_enable = newVal;
7226 +
7227 +    return E_OK;
7228 +}
7229 +
7230 +/* ......................................................................... */
7231 +
7232 +static t_Error MemacConfigWan(t_Handle h_Memac, bool newVal)
7233 +{
7234 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7235 +
7236 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7237 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7238 +
7239 +    p_Memac->p_MemacDriverParam->wan_mode_enable = newVal;
7240 +
7241 +    return E_OK;
7242 +}
7243 +
7244 +/* ......................................................................... */
7245 +
7246 +static t_Error MemacConfigMaxFrameLength(t_Handle h_Memac, uint16_t newVal)
7247 +{
7248 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7249 +
7250 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7251 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7252 +
7253 +    p_Memac->p_MemacDriverParam->max_frame_length = newVal;
7254 +
7255 +    return E_OK;
7256 +}
7257 +
7258 +/* ......................................................................... */
7259 +
7260 +static t_Error MemacConfigPad(t_Handle h_Memac, bool newVal)
7261 +{
7262 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7263 +
7264 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7265 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7266 +
7267 +    p_Memac->p_MemacDriverParam->pad_enable = newVal;
7268 +
7269 +    return E_OK;
7270 +}
7271 +
7272 +/* ......................................................................... */
7273 +
7274 +static t_Error MemacConfigLengthCheck(t_Handle h_Memac, bool newVal)
7275 +{
7276 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7277 +
7278 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7279 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7280 +
7281 +    p_Memac->p_MemacDriverParam->no_length_check_enable = !newVal;
7282 +
7283 +    return E_OK;
7284 +}
7285 +
7286 +/* ......................................................................... */
7287 +
7288 +static t_Error MemacConfigException(t_Handle h_Memac, e_FmMacExceptions exception, bool enable)
7289 +{
7290 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7291 +    uint32_t    bitMask = 0;
7292 +
7293 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7294 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7295 +
7296 +    GET_EXCEPTION_FLAG(bitMask, exception);
7297 +    if (bitMask)
7298 +    {
7299 +        if (enable)
7300 +            p_Memac->exceptions |= bitMask;
7301 +        else
7302 +            p_Memac->exceptions &= ~bitMask;
7303 +    }
7304 +    else
7305 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
7306 +
7307 +    return E_OK;
7308 +}
7309 +
7310 +/* ......................................................................... */
7311 +
7312 +static t_Error MemacConfigResetOnInit(t_Handle h_Memac, bool enable)
7313 +{
7314 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7315 +
7316 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7317 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7318 +
7319 +    p_Memac->p_MemacDriverParam->reset_on_init = enable;
7320 +
7321 +    return E_OK;
7322 +}
7323 +
7324 +
7325 +/*****************************************************************************/
7326 +/*                      Memac Run Time API functions                         */
7327 +/*****************************************************************************/
7328 +
7329 +/* ......................................................................... */
7330 +
7331 +static t_Error MemacSetTxPauseFrames(t_Handle h_Memac,
7332 +                                     uint8_t  priority,
7333 +                                     uint16_t pauseTime,
7334 +                                     uint16_t threshTime)
7335 +{
7336 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7337 +
7338 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_STATE);
7339 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7340 +
7341 +    if (priority != 0xFF)
7342 +    {
7343 +        bool   PortConfigured, PreFetchEnabled;
7344 +
7345 +        if (FmGetTnumAgingPeriod(p_Memac->fmMacControllerDriver.h_Fm) == 0)
7346 +            RETURN_ERROR(MAJOR, E_CONFLICT, ("For PFC operation, TNUM aging must be enabled"));
7347 +
7348 +        FmGetPortPreFetchConfiguration(p_Memac->fmMacControllerDriver.h_Fm,
7349 +                                       p_Memac->fmMacControllerDriver.macId,
7350 +                                       &PortConfigured,
7351 +                                       &PreFetchEnabled);
7352 +
7353 +        if ((ENET_SPEED_FROM_MODE(p_Memac->fmMacControllerDriver.enetMode) == e_ENET_SPEED_1000) && !PortConfigured)
7354 +            DBG(INFO, ("For PFC correct operation, prefetch must be configured on the FM Tx PORT"));
7355 +
7356 +        if ((ENET_SPEED_FROM_MODE(p_Memac->fmMacControllerDriver.enetMode) == e_ENET_SPEED_1000) && PortConfigured && !PreFetchEnabled)
7357 +            DBG(WARNING, ("For PFC correct operation, prefetch must be configured on the FM Tx PORT"));
7358 +    }
7359 +
7360 +    fman_memac_set_tx_pause_frames(p_Memac->p_MemMap, priority, pauseTime, threshTime);
7361 +
7362 +    return E_OK;
7363 +}
7364 +
7365 +/* ......................................................................... */
7366 +
7367 +static t_Error MemacSetTxAutoPauseFrames(t_Handle h_Memac,
7368 +                                         uint16_t pauseTime)
7369 +{
7370 +    return MemacSetTxPauseFrames(h_Memac, FM_MAC_NO_PFC, pauseTime, 0);
7371 +}
7372 +
7373 +/* ......................................................................... */
7374 +
7375 +static t_Error MemacSetRxIgnorePauseFrames(t_Handle h_Memac, bool en)
7376 +{
7377 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7378 +
7379 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_STATE);
7380 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7381 +
7382 +    fman_memac_set_rx_ignore_pause_frames(p_Memac->p_MemMap, en);
7383 +
7384 +    return E_OK;
7385 +}
7386 +
7387 +/* ......................................................................... */
7388 +
7389 +static t_Error MemacSetWakeOnLan(t_Handle h_Memac, bool en)
7390 +{
7391 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7392 +
7393 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_STATE);
7394 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7395 +
7396 +    fman_memac_set_wol(p_Memac->p_MemMap, en);
7397 +
7398 +    return E_OK;
7399 +}
7400 +
7401 +/* .............................................................................. */
7402 +
7403 +static t_Error MemacEnable1588TimeStamp(t_Handle h_Memac)
7404 +{
7405 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7406 +
7407 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7408 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7409 +UNUSED(p_Memac);
7410 +DBG(WARNING, ("mEMAC has 1588 always enabled!"));
7411 +
7412 +    return E_OK;
7413 +}
7414 +
7415 +/* Counters handling */
7416 +/* ......................................................................... */
7417 +
7418 +static t_Error MemacGetStatistics(t_Handle h_Memac, t_FmMacStatistics *p_Statistics)
7419 +{
7420 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7421 +
7422 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
7423 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7424 +    SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
7425 +
7426 +    p_Statistics->eStatPkts64           = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R64);
7427 +    p_Statistics->eStatPkts65to127      = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R127);
7428 +    p_Statistics->eStatPkts128to255     = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R255);
7429 +    p_Statistics->eStatPkts256to511     = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R511);
7430 +    p_Statistics->eStatPkts512to1023    = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1023);
7431 +    p_Statistics->eStatPkts1024to1518   = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1518);
7432 +    p_Statistics->eStatPkts1519to1522   = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1519X);
7433 +/* */
7434 +    p_Statistics->eStatFragments        = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RFRG);
7435 +    p_Statistics->eStatJabbers          = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RJBR);
7436 +
7437 +    p_Statistics->eStatsDropEvents      = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RDRP);
7438 +    p_Statistics->eStatCRCAlignErrors   = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RALN);
7439 +
7440 +    p_Statistics->eStatUndersizePkts    = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TUND);
7441 +    p_Statistics->eStatOversizePkts     = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_ROVR);
7442 +/* Pause */
7443 +    p_Statistics->reStatPause           = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RXPF);
7444 +    p_Statistics->teStatPause           = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TXPF);
7445 +
7446 +/* MIB II */
7447 +    p_Statistics->ifInOctets            = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_ROCT);
7448 +    p_Statistics->ifInUcastPkts         = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RUCA);
7449 +    p_Statistics->ifInMcastPkts         = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RMCA);
7450 +    p_Statistics->ifInBcastPkts         = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RBCA);
7451 +    p_Statistics->ifInPkts              = p_Statistics->ifInUcastPkts
7452 +                                        + p_Statistics->ifInMcastPkts
7453 +                                        + p_Statistics->ifInBcastPkts;
7454 +    p_Statistics->ifInDiscards          = 0;
7455 +    p_Statistics->ifInErrors            = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RERR);
7456 +
7457 +    p_Statistics->ifOutOctets           = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TOCT);
7458 +    p_Statistics->ifOutUcastPkts        = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TUCA);
7459 +    p_Statistics->ifOutMcastPkts        = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TMCA);
7460 +    p_Statistics->ifOutBcastPkts        = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TBCA);
7461 +    p_Statistics->ifOutPkts             = p_Statistics->ifOutUcastPkts
7462 +                                        + p_Statistics->ifOutMcastPkts
7463 +                                        + p_Statistics->ifOutBcastPkts;
7464 +    p_Statistics->ifOutDiscards         = 0;
7465 +    p_Statistics->ifOutErrors           = fman_memac_get_counter(p_Memac->p_MemMap,  E_MEMAC_COUNTER_TERR);
7466 +
7467 +    return E_OK;
7468 +}
7469 +
7470 +/* ......................................................................... */
7471 +
7472 +static t_Error MemacModifyMacAddress (t_Handle h_Memac, t_EnetAddr *p_EnetAddr)
7473 +{
7474 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7475 +
7476 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
7477 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7478 +
7479 +    fman_memac_add_addr_in_paddr(p_Memac->p_MemMap, (uint8_t *)(*p_EnetAddr), 0);
7480 +
7481 +    return E_OK;
7482 +}
7483 +
7484 +/* ......................................................................... */
7485 +
7486 +static t_Error MemacResetCounters (t_Handle h_Memac)
7487 +{
7488 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7489 +
7490 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7491 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7492 +
7493 +    fman_memac_reset_stat(p_Memac->p_MemMap);
7494 +
7495 +    return E_OK;
7496 +}
7497 +
7498 +/* ......................................................................... */
7499 +
7500 +static t_Error MemacAddExactMatchMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
7501 +{
7502 +    t_Memac     *p_Memac = (t_Memac *) h_Memac;
7503 +    uint64_t    ethAddr;
7504 +    uint8_t     paddrNum;
7505 +
7506 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7507 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7508 +
7509 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
7510 +
7511 +    if (ethAddr & GROUP_ADDRESS)
7512 +        /* Multicast address has no effect in PADDR */
7513 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
7514 +
7515 +    /* Make sure no PADDR contains this address */
7516 +    for (paddrNum = 0; paddrNum < MEMAC_NUM_OF_PADDRS; paddrNum++)
7517 +        if (p_Memac->indAddrRegUsed[paddrNum])
7518 +            if (p_Memac->paddr[paddrNum] == ethAddr)
7519 +                RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
7520 +
7521 +    /* Find first unused PADDR */
7522 +    for (paddrNum = 0; paddrNum < MEMAC_NUM_OF_PADDRS; paddrNum++)
7523 +        if (!(p_Memac->indAddrRegUsed[paddrNum]))
7524 +        {
7525 +            /* mark this PADDR as used */
7526 +            p_Memac->indAddrRegUsed[paddrNum] = TRUE;
7527 +            /* store address */
7528 +            p_Memac->paddr[paddrNum] = ethAddr;
7529 +
7530 +            /* put in hardware */
7531 +            fman_memac_add_addr_in_paddr(p_Memac->p_MemMap, (uint8_t*)(*p_EthAddr), paddrNum);
7532 +            p_Memac->numOfIndAddrInRegs++;
7533 +
7534 +            return E_OK;
7535 +        }
7536 +
7537 +    /* No free PADDR */
7538 +    RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
7539 +}
7540 +
7541 +/* ......................................................................... */
7542 +
7543 +static t_Error MemacDelExactMatchMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
7544 +{
7545 +    t_Memac     *p_Memac = (t_Memac *) h_Memac;
7546 +    uint64_t    ethAddr;
7547 +    uint8_t     paddrNum;
7548 +
7549 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7550 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7551 +
7552 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
7553 +
7554 +    /* Find used PADDR containing this address */
7555 +    for (paddrNum = 0; paddrNum < MEMAC_NUM_OF_PADDRS; paddrNum++)
7556 +    {
7557 +        if ((p_Memac->indAddrRegUsed[paddrNum]) &&
7558 +            (p_Memac->paddr[paddrNum] == ethAddr))
7559 +        {
7560 +            /* mark this PADDR as not used */
7561 +            p_Memac->indAddrRegUsed[paddrNum] = FALSE;
7562 +            /* clear in hardware */
7563 +            fman_memac_clear_addr_in_paddr(p_Memac->p_MemMap, paddrNum);
7564 +            p_Memac->numOfIndAddrInRegs--;
7565 +
7566 +            return E_OK;
7567 +        }
7568 +    }
7569 +
7570 +    RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
7571 +}
7572 +
7573 +/* ......................................................................... */
7574 +
7575 +static t_Error MemacGetId(t_Handle h_Memac, uint32_t *macId)
7576 +{
7577 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7578 +
7579 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7580 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7581 +
7582 +    *macId = p_Memac->macId;
7583 +
7584 +    return E_OK;
7585 +}
7586 +
7587 +/* ......................................................................... */
7588 +
7589 +
7590 +static t_Error MemacAddHashMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
7591 +{
7592 +    t_Memac             *p_Memac = (t_Memac *)h_Memac;
7593 +    t_EthHashEntry      *p_HashEntry;
7594 +    uint32_t            hash;
7595 +    uint64_t            ethAddr;
7596 +
7597 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
7598 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7599 +
7600 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
7601 +
7602 +    if (!(ethAddr & GROUP_ADDRESS))
7603 +        /* Unicast addresses not supported in hash */
7604 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unicast Address"));
7605 +
7606 +    hash = GetMacAddrHashCode(ethAddr) & HASH_CTRL_ADDR_MASK;
7607 +
7608 +    /* Create element to be added to the driver hash table */
7609 +    p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
7610 +    p_HashEntry->addr = ethAddr;
7611 +    INIT_LIST(&p_HashEntry->node);
7612 +
7613 +    LIST_AddToTail(&(p_HashEntry->node), &(p_Memac->p_MulticastAddrHash->p_Lsts[hash]));
7614 +    fman_memac_set_hash_table(p_Memac->p_MemMap, (hash | HASH_CTRL_MCAST_EN));
7615 +
7616 +    return E_OK;
7617 +}
7618 +
7619 +/* ......................................................................... */
7620 +
7621 +static t_Error MemacDelHashMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
7622 +{
7623 +    t_Memac             *p_Memac = (t_Memac *)h_Memac;
7624 +    t_EthHashEntry      *p_HashEntry = NULL;
7625 +    t_List              *p_Pos;
7626 +    uint32_t            hash;
7627 +    uint64_t            ethAddr;
7628 +
7629 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
7630 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7631 +
7632 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
7633 +
7634 +    hash = GetMacAddrHashCode(ethAddr) & HASH_CTRL_ADDR_MASK;
7635 +
7636 +    LIST_FOR_EACH(p_Pos, &(p_Memac->p_MulticastAddrHash->p_Lsts[hash]))
7637 +    {
7638 +        p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
7639 +        if (p_HashEntry->addr == ethAddr)
7640 +        {
7641 +            LIST_DelAndInit(&p_HashEntry->node);
7642 +            XX_Free(p_HashEntry);
7643 +            break;
7644 +        }
7645 +    }
7646 +    if (LIST_IsEmpty(&p_Memac->p_MulticastAddrHash->p_Lsts[hash]))
7647 +        fman_memac_set_hash_table(p_Memac->p_MemMap, (hash & ~HASH_CTRL_MCAST_EN));
7648 +
7649 +    return E_OK;
7650 +}
7651 +
7652 +
7653 +/* ......................................................................... */
7654 +
7655 +static t_Error MemacSetException(t_Handle h_Memac, e_FmMacExceptions exception, bool enable)
7656 +{
7657 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7658 +    uint32_t    bitMask = 0;
7659 +
7660 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7661 +    SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7662 +
7663 +    GET_EXCEPTION_FLAG(bitMask, exception);
7664 +    if (bitMask)
7665 +    {
7666 +        if (enable)
7667 +            p_Memac->exceptions |= bitMask;
7668 +        else
7669 +            p_Memac->exceptions &= ~bitMask;
7670 +    }
7671 +    else
7672 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
7673 +
7674 +    fman_memac_set_exception(p_Memac->p_MemMap, bitMask, enable);
7675 +
7676 +    return E_OK;
7677 +}
7678 +
7679 +/* ......................................................................... */
7680 +
7681 +static uint16_t MemacGetMaxFrameLength(t_Handle h_Memac)
7682 +{
7683 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7684 +
7685 +    SANITY_CHECK_RETURN_VALUE(p_Memac, E_INVALID_HANDLE, 0);
7686 +    SANITY_CHECK_RETURN_VALUE(!p_Memac->p_MemacDriverParam, E_INVALID_STATE, 0);
7687 +
7688 +    return fman_memac_get_max_frame_len(p_Memac->p_MemMap);
7689 +}
7690 +
7691 +static t_Error MemacInitInternalPhy(t_Handle h_Memac)
7692 +{
7693 +    t_Memac *p_Memac = (t_Memac *)h_Memac;
7694 +    uint8_t i, phyAddr;
7695 +
7696 +    if (ENET_INTERFACE_FROM_MODE(p_Memac->enetMode) == e_ENET_IF_SGMII)
7697 +    {
7698 +        /* Configure internal SGMII PHY */
7699 +        if (p_Memac->enetMode & ENET_IF_SGMII_BASEX)
7700 +            SetupSgmiiInternalPhyBaseX(p_Memac, PHY_MDIO_ADDR);
7701 +        else
7702 +            SetupSgmiiInternalPhy(p_Memac, PHY_MDIO_ADDR);
7703 +    }
7704 +    else if (ENET_INTERFACE_FROM_MODE(p_Memac->enetMode) == e_ENET_IF_QSGMII)
7705 +    {
7706 +        /* Configure 4 internal SGMII PHYs */
7707 +        for (i = 0; i < 4; i++)
7708 +        {
7709 +            /* QSGMII PHY address occupies 3 upper bits of 5-bit
7710 +               phyAddress; the lower 2 bits are used to extend
7711 +               register address space and access each one of 4
7712 +               ports inside QSGMII. */
7713 +            phyAddr = (uint8_t)((PHY_MDIO_ADDR << 2) | i);
7714 +            if (p_Memac->enetMode & ENET_IF_SGMII_BASEX)
7715 +                SetupSgmiiInternalPhyBaseX(p_Memac, phyAddr);
7716 +            else
7717 +                SetupSgmiiInternalPhy(p_Memac, phyAddr);
7718 +        }
7719 +    }
7720 +    return E_OK;
7721 +}
7722 +
7723 +/*****************************************************************************/
7724 +/*                      mEMAC Init & Free API                                   */
7725 +/*****************************************************************************/
7726 +
7727 +/* ......................................................................... */
7728 +void *g_MemacRegs;
7729 +static t_Error MemacInit(t_Handle h_Memac)
7730 +{
7731 +    t_Memac                 *p_Memac = (t_Memac *)h_Memac;
7732 +    struct memac_cfg        *p_MemacDriverParam;
7733 +    enum enet_interface     enet_interface;
7734 +    enum enet_speed         enet_speed;
7735 +    t_EnetAddr              ethAddr;
7736 +    e_FmMacType             portType;
7737 +    t_Error                 err;
7738 +    bool                    slow_10g_if = FALSE;
7739 +    if (p_Memac->macId == 3) /* This is a quick WA */
7740 +               g_MemacRegs = p_Memac->p_MemMap;
7741 +
7742 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7743 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
7744 +    SANITY_CHECK_RETURN_ERROR(p_Memac->fmMacControllerDriver.h_Fm, E_INVALID_HANDLE);
7745 +
7746 +    FM_GetRevision(p_Memac->fmMacControllerDriver.h_Fm, &p_Memac->fmMacControllerDriver.fmRevInfo);
7747 +    if (p_Memac->fmMacControllerDriver.fmRevInfo.majorRev == 6 &&
7748 +        p_Memac->fmMacControllerDriver.fmRevInfo.minorRev == 4)
7749 +        slow_10g_if = TRUE;
7750 +
7751 +    CHECK_INIT_PARAMETERS(p_Memac, CheckInitParameters);
7752 +
7753 +    p_MemacDriverParam = p_Memac->p_MemacDriverParam;
7754 +
7755 +    portType =
7756 +        ((ENET_SPEED_FROM_MODE(p_Memac->enetMode) < e_ENET_SPEED_10000) ? e_FM_MAC_1G : e_FM_MAC_10G);
7757 +
7758 +    /* First, reset the MAC if desired. */
7759 +    if (p_MemacDriverParam->reset_on_init)
7760 +        fman_memac_reset(p_Memac->p_MemMap);
7761 +
7762 +    /* MAC Address */
7763 +    MAKE_ENET_ADDR_FROM_UINT64(p_Memac->addr, ethAddr);
7764 +    fman_memac_add_addr_in_paddr(p_Memac->p_MemMap, (uint8_t*)ethAddr, 0);
7765 +
7766 +    enet_interface = (enum enet_interface) ENET_INTERFACE_FROM_MODE(p_Memac->enetMode);
7767 +    enet_speed = (enum enet_speed) ENET_SPEED_FROM_MODE(p_Memac->enetMode);
7768 +
7769 +    fman_memac_init(p_Memac->p_MemMap,
7770 +               p_Memac->p_MemacDriverParam,
7771 +               enet_interface,
7772 +               enet_speed,
7773 +               slow_10g_if,
7774 +               p_Memac->exceptions);
7775 +
7776 +#ifdef FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
7777 +    {
7778 +       uint32_t tmpReg = 0;
7779 +
7780 +       FM_GetRevision(p_Memac->fmMacControllerDriver.h_Fm, &p_Memac->fmMacControllerDriver.fmRevInfo);
7781 +        /* check the FMAN version - the bug exists only in rev1 */
7782 +        if ((p_Memac->fmMacControllerDriver.fmRevInfo.majorRev == 6) &&
7783 +               (p_Memac->fmMacControllerDriver.fmRevInfo.minorRev == 0))
7784 +        {
7785 +               /* MAC strips CRC from received frames - this workaround should
7786 +                  decrease the likelihood of bug appearance
7787 +            */
7788 +                       tmpReg = GET_UINT32(p_Memac->p_MemMap->command_config);
7789 +                       tmpReg &= ~CMD_CFG_CRC_FWD;
7790 +                       WRITE_UINT32(p_Memac->p_MemMap->command_config, tmpReg);
7791 +                       /* DBG(WARNING, ("mEMAC strips CRC from received frames as part of A006320 errata workaround"));*/
7792 +        }
7793 +    }
7794 +#endif /* FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 */
7795 +
7796 +    MemacInitInternalPhy(h_Memac);
7797 +
7798 +    /* Max Frame Length */
7799 +    err = FmSetMacMaxFrame(p_Memac->fmMacControllerDriver.h_Fm,
7800 +                           portType,
7801 +                           p_Memac->fmMacControllerDriver.macId,
7802 +                           p_MemacDriverParam->max_frame_length);
7803 +    if (err)
7804 +        RETURN_ERROR(MAJOR, err, ("settings Mac max frame length is FAILED"));
7805 +
7806 +    p_Memac->p_MulticastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
7807 +    if (!p_Memac->p_MulticastAddrHash)
7808 +    {
7809 +        FreeInitResources(p_Memac);
7810 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
7811 +    }
7812 +
7813 +    p_Memac->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
7814 +    if (!p_Memac->p_UnicastAddrHash)
7815 +    {
7816 +        FreeInitResources(p_Memac);
7817 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
7818 +    }
7819 +
7820 +    FmRegisterIntr(p_Memac->fmMacControllerDriver.h_Fm,
7821 +                   (portType == e_FM_MAC_10G) ? e_FM_MOD_10G_MAC : e_FM_MOD_1G_MAC,
7822 +                   p_Memac->macId,
7823 +                   e_FM_INTR_TYPE_ERR,
7824 +                   MemacErrException,
7825 +                   p_Memac);
7826 +
7827 +    FmRegisterIntr(p_Memac->fmMacControllerDriver.h_Fm,
7828 +                   (portType == e_FM_MAC_10G) ? e_FM_MOD_10G_MAC : e_FM_MOD_1G_MAC,
7829 +                   p_Memac->macId,
7830 +                   e_FM_INTR_TYPE_NORMAL,
7831 +                   MemacException,
7832 +                   p_Memac);
7833 +
7834 +    XX_Free(p_MemacDriverParam);
7835 +    p_Memac->p_MemacDriverParam = NULL;
7836 +
7837 +    return E_OK;
7838 +}
7839 +
7840 +/* ......................................................................... */
7841 +
7842 +static t_Error MemacFree(t_Handle h_Memac)
7843 +{
7844 +    t_Memac     *p_Memac = (t_Memac *)h_Memac;
7845 +
7846 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
7847 +
7848 +    if (p_Memac->p_MemacDriverParam)
7849 +    {
7850 +        /* Called after config */
7851 +        XX_Free(p_Memac->p_MemacDriverParam);
7852 +        p_Memac->p_MemacDriverParam = NULL;
7853 +    }
7854 +    else
7855 +        /* Called after init */
7856 +        FreeInitResources(p_Memac);
7857 +
7858 +    XX_Free(p_Memac);
7859 +
7860 +    return E_OK;
7861 +}
7862 +
7863 +/* ......................................................................... */
7864 +
7865 +static void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
7866 +{
7867 +    p_FmMacControllerDriver->f_FM_MAC_Init                      = MemacInit;
7868 +    p_FmMacControllerDriver->f_FM_MAC_Free                      = MemacFree;
7869 +
7870 +    p_FmMacControllerDriver->f_FM_MAC_SetStatistics             = NULL;
7871 +    p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback            = MemacConfigLoopback;
7872 +    p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength      = MemacConfigMaxFrameLength;
7873 +
7874 +    p_FmMacControllerDriver->f_FM_MAC_ConfigWan                 = MemacConfigWan;
7875 +
7876 +    p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc           = MemacConfigPad;
7877 +    p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex          = NULL; /* half-duplex is detected automatically */
7878 +    p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck         = MemacConfigLengthCheck;
7879 +
7880 +    p_FmMacControllerDriver->f_FM_MAC_ConfigException           = MemacConfigException;
7881 +    p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit         = MemacConfigResetOnInit;
7882 +
7883 +    p_FmMacControllerDriver->f_FM_MAC_SetException              = MemacSetException;
7884 +
7885 +    p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp       = MemacEnable1588TimeStamp; /* always enabled */
7886 +    p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp      = NULL;
7887 +
7888 +    p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous            = MemacSetPromiscuous;
7889 +    p_FmMacControllerDriver->f_FM_MAC_AdjustLink                = MemacAdjustLink;
7890 +    p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg            = NULL;
7891 +
7892 +    p_FmMacControllerDriver->f_FM_MAC_Enable                    = MemacEnable;
7893 +    p_FmMacControllerDriver->f_FM_MAC_Disable                   = MemacDisable;
7894 +    p_FmMacControllerDriver->f_FM_MAC_Resume                    = MemacInitInternalPhy;
7895 +
7896 +    p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames      = MemacSetTxAutoPauseFrames;
7897 +    p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames          = MemacSetTxPauseFrames;
7898 +    p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames    = MemacSetRxIgnorePauseFrames;
7899 +
7900 +    p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan              = MemacSetWakeOnLan;
7901 +
7902 +    p_FmMacControllerDriver->f_FM_MAC_ResetCounters             = MemacResetCounters;
7903 +    p_FmMacControllerDriver->f_FM_MAC_GetStatistics             = MemacGetStatistics;
7904 +
7905 +    p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr             = MemacModifyMacAddress;
7906 +    p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr            = MemacAddHashMacAddress;
7907 +    p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr         = MemacDelHashMacAddress;
7908 +    p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr      = MemacAddExactMatchMacAddress;
7909 +    p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr  = MemacDelExactMatchMacAddress;
7910 +    p_FmMacControllerDriver->f_FM_MAC_GetId                     = MemacGetId;
7911 +    p_FmMacControllerDriver->f_FM_MAC_GetVersion                = NULL;
7912 +    p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength         = MemacGetMaxFrameLength;
7913 +
7914 +    p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg           = MEMAC_MII_WritePhyReg;
7915 +    p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg            = MEMAC_MII_ReadPhyReg;
7916 +}
7917 +
7918 +
7919 +/*****************************************************************************/
7920 +/*                      mEMAC Config Main Entry                             */
7921 +/*****************************************************************************/
7922 +
7923 +/* ......................................................................... */
7924 +
7925 +t_Handle MEMAC_Config(t_FmMacParams *p_FmMacParam)
7926 +{
7927 +    t_Memac             *p_Memac;
7928 +    struct memac_cfg    *p_MemacDriverParam;
7929 +    uintptr_t           baseAddr;
7930 +
7931 +    SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
7932 +
7933 +    baseAddr = p_FmMacParam->baseAddr;
7934 +    /* Allocate memory for the mEMAC data structure */
7935 +    p_Memac = (t_Memac *)XX_Malloc(sizeof(t_Memac));
7936 +    if (!p_Memac)
7937 +    {
7938 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("mEMAC driver structure"));
7939 +        return NULL;
7940 +    }
7941 +    memset(p_Memac, 0, sizeof(t_Memac));
7942 +    InitFmMacControllerDriver(&p_Memac->fmMacControllerDriver);
7943 +
7944 +    /* Allocate memory for the mEMAC driver parameters data structure */
7945 +    p_MemacDriverParam = (struct memac_cfg *)XX_Malloc(sizeof(struct memac_cfg));
7946 +    if (!p_MemacDriverParam)
7947 +    {
7948 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("mEMAC driver parameters"));
7949 +        XX_Free(p_Memac);
7950 +        return NULL;
7951 +    }
7952 +    memset(p_MemacDriverParam, 0, sizeof(struct memac_cfg));
7953 +
7954 +    /* Plant parameter structure pointer */
7955 +    p_Memac->p_MemacDriverParam = p_MemacDriverParam;
7956 +
7957 +    fman_memac_defconfig(p_MemacDriverParam);
7958 +
7959 +    p_Memac->addr           = ENET_ADDR_TO_UINT64(p_FmMacParam->addr);
7960 +
7961 +    p_Memac->p_MemMap       = (struct memac_regs *)UINT_TO_PTR(baseAddr);
7962 +    p_Memac->p_MiiMemMap    = (struct memac_mii_access_mem_map*)UINT_TO_PTR(baseAddr + MEMAC_TO_MII_OFFSET);
7963 +
7964 +    p_Memac->enetMode       = p_FmMacParam->enetMode;
7965 +    p_Memac->macId          = p_FmMacParam->macId;
7966 +    p_Memac->exceptions     = MEMAC_default_exceptions;
7967 +    p_Memac->f_Exception    = p_FmMacParam->f_Exception;
7968 +    p_Memac->f_Event        = p_FmMacParam->f_Event;
7969 +    p_Memac->h_App          = p_FmMacParam->h_App;
7970 +
7971 +    return p_Memac;
7972 +}
7973 --- /dev/null
7974 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h
7975 @@ -0,0 +1,110 @@
7976 +/*
7977 + * Copyright 2008-2012 Freescale Semiconductor Inc.
7978 + *
7979 + * Redistribution and use in source and binary forms, with or without
7980 + * modification, are permitted provided that the following conditions are met:
7981 + *     * Redistributions of source code must retain the above copyright
7982 + *       notice, this list of conditions and the following disclaimer.
7983 + *     * Redistributions in binary form must reproduce the above copyright
7984 + *       notice, this list of conditions and the following disclaimer in the
7985 + *       documentation and/or other materials provided with the distribution.
7986 + *     * Neither the name of Freescale Semiconductor nor the
7987 + *       names of its contributors may be used to endorse or promote products
7988 + *       derived from this software without specific prior written permission.
7989 + *
7990 + *
7991 + * ALTERNATIVELY, this software may be distributed under the terms of the
7992 + * GNU General Public License ("GPL") as published by the Free Software
7993 + * Foundation, either version 2 of that License or (at your option) any
7994 + * later version.
7995 + *
7996 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
7997 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
7998 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
7999 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
8000 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
8001 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
8002 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
8003 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8004 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
8005 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8006 + */
8007 +
8008 +
8009 +/******************************************************************************
8010 + @File          memac.h
8011 +
8012 + @Description   FM Multirate Ethernet MAC (mEMAC)
8013 +*//***************************************************************************/
8014 +#ifndef __MEMAC_H
8015 +#define __MEMAC_H
8016 +
8017 +#include "std_ext.h"
8018 +#include "error_ext.h"
8019 +#include "list_ext.h"
8020 +
8021 +#include "fsl_fman_memac_mii_acc.h"
8022 +#include "fm_mac.h"
8023 +#include "fsl_fman_memac.h"
8024 +
8025 +
8026 +#define MEMAC_default_exceptions    \
8027 +        ((uint32_t)(MEMAC_IMASK_TSECC_ER | MEMAC_IMASK_TECC_ER | MEMAC_IMASK_RECC_ER | MEMAC_IMASK_MGI))
8028 +
8029 +#define GET_EXCEPTION_FLAG(bitMask, exception)       switch (exception){    \
8030 +    case e_FM_MAC_EX_10G_1TX_ECC_ER:                                        \
8031 +        bitMask = MEMAC_IMASK_TECC_ER; break;                               \
8032 +    case e_FM_MAC_EX_10G_RX_ECC_ER:                                         \
8033 +        bitMask = MEMAC_IMASK_RECC_ER; break;                               \
8034 +    case e_FM_MAC_EX_TS_FIFO_ECC_ERR:                                       \
8035 +        bitMask = MEMAC_IMASK_TSECC_ER; break;                              \
8036 +    case e_FM_MAC_EX_MAGIC_PACKET_INDICATION:                               \
8037 +        bitMask = MEMAC_IMASK_MGI; break;                                   \
8038 +    default: bitMask = 0;break;}
8039 +
8040 +
8041 +typedef struct
8042 +{
8043 +    t_FmMacControllerDriver     fmMacControllerDriver;               /**< Upper Mac control block */
8044 +    t_Handle                    h_App;                               /**< Handle to the upper layer application  */
8045 +    struct memac_regs           *p_MemMap;                           /**< Pointer to MAC memory mapped registers */
8046 +    struct memac_mii_access_mem_map *p_MiiMemMap;                        /**< Pointer to MII memory mapped registers */
8047 +    uint64_t                    addr;                                /**< MAC address of device */
8048 +    e_EnetMode                  enetMode;                            /**< Ethernet physical interface  */
8049 +    t_FmMacExceptionCallback    *f_Exception;
8050 +    int                         mdioIrq;
8051 +    t_FmMacExceptionCallback    *f_Event;
8052 +    bool                        indAddrRegUsed[MEMAC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
8053 +    uint64_t                    paddr[MEMAC_NUM_OF_PADDRS];          /**< MAC address for particular individual address recognition register */
8054 +    uint8_t                     numOfIndAddrInRegs;                  /**< Number of individual addresses in registers for this station. */
8055 +    t_EthHash                   *p_MulticastAddrHash;                /**< Pointer to driver's global address hash table  */
8056 +    t_EthHash                   *p_UnicastAddrHash;                  /**< Pointer to driver's individual address hash table  */
8057 +    bool                        debugMode;
8058 +    uint8_t                     macId;
8059 +    uint32_t                    exceptions;
8060 +    struct memac_cfg            *p_MemacDriverParam;
8061 +} t_Memac;
8062 +
8063 +
8064 +/* Internal PHY access */
8065 +#define PHY_MDIO_ADDR               0
8066 +
8067 +/* Internal PHY Registers - SGMII */
8068 +#define PHY_SGMII_CR_PHY_RESET          0x8000
8069 +#define PHY_SGMII_CR_RESET_AN           0x0200
8070 +#define PHY_SGMII_CR_DEF_VAL            0x1140
8071 +#define PHY_SGMII_DEV_ABILITY_SGMII     0x4001
8072 +#define PHY_SGMII_DEV_ABILITY_1000X     0x01A0
8073 +#define PHY_SGMII_IF_SPEED_GIGABIT     0x0008
8074 +#define PHY_SGMII_IF_MODE_AN            0x0002
8075 +#define PHY_SGMII_IF_MODE_SGMII         0x0001
8076 +#define PHY_SGMII_IF_MODE_1000X         0x0000
8077 +
8078 +
8079 +#define MEMAC_TO_MII_OFFSET         0x030       /* Offset from the MEM map to the MDIO mem map */
8080 +
8081 +t_Error MEMAC_MII_WritePhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t data);
8082 +t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
8083 +
8084 +
8085 +#endif /* __MEMAC_H */
8086 --- /dev/null
8087 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c
8088 @@ -0,0 +1,78 @@
8089 +/*
8090 + * Copyright 2008-2012 Freescale Semiconductor Inc.
8091 + *
8092 + * Redistribution and use in source and binary forms, with or without
8093 + * modification, are permitted provided that the following conditions are met:
8094 + *     * Redistributions of source code must retain the above copyright
8095 + *       notice, this list of conditions and the following disclaimer.
8096 + *     * Redistributions in binary form must reproduce the above copyright
8097 + *       notice, this list of conditions and the following disclaimer in the
8098 + *       documentation and/or other materials provided with the distribution.
8099 + *     * Neither the name of Freescale Semiconductor nor the
8100 + *       names of its contributors may be used to endorse or promote products
8101 + *       derived from this software without specific prior written permission.
8102 + *
8103 + *
8104 + * ALTERNATIVELY, this software may be distributed under the terms of the
8105 + * GNU General Public License ("GPL") as published by the Free Software
8106 + * Foundation, either version 2 of that License or (at your option) any
8107 + * later version.
8108 + *
8109 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
8110 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
8111 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
8112 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
8113 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
8114 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
8115 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
8116 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8117 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
8118 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8119 + */
8120 +
8121 +
8122 +#include "error_ext.h"
8123 +#include "std_ext.h"
8124 +#include "fm_mac.h"
8125 +#include "memac.h"
8126 +#include "xx_ext.h"
8127 +
8128 +#include "fm_common.h"
8129 +#include "memac_mii_acc.h"
8130 +
8131 +
8132 +/*****************************************************************************/
8133 +t_Error MEMAC_MII_WritePhyReg(t_Handle  h_Memac,
8134 +                             uint8_t    phyAddr,
8135 +                             uint8_t    reg,
8136 +                             uint16_t   data)
8137 +{
8138 +    t_Memac                 *p_Memac = (t_Memac *)h_Memac;
8139 +
8140 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
8141 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MiiMemMap, E_INVALID_HANDLE);
8142 +
8143 +    return (t_Error)fman_memac_mii_write_phy_reg(p_Memac->p_MiiMemMap,
8144 +                                                 phyAddr,
8145 +                                                 reg,
8146 +                                                 data,
8147 +                                                 (enum enet_speed)ENET_SPEED_FROM_MODE(p_Memac->enetMode));
8148 +}
8149 +
8150 +/*****************************************************************************/
8151 +t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac,
8152 +                            uint8_t   phyAddr,
8153 +                            uint8_t   reg,
8154 +                            uint16_t  *p_Data)
8155 +{
8156 +    t_Memac                 *p_Memac = (t_Memac *)h_Memac;
8157 +
8158 +    SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
8159 +    SANITY_CHECK_RETURN_ERROR(p_Memac->p_MiiMemMap, E_INVALID_HANDLE);
8160 +
8161 +    return fman_memac_mii_read_phy_reg(p_Memac->p_MiiMemMap,
8162 +                                       phyAddr,
8163 +                                       reg,
8164 +                                       p_Data,
8165 +                                       (enum enet_speed)ENET_SPEED_FROM_MODE(p_Memac->enetMode));
8166 +}
8167 --- /dev/null
8168 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h
8169 @@ -0,0 +1,73 @@
8170 +/*
8171 + * Copyright 2008-2012 Freescale Semiconductor Inc.
8172 + *
8173 + * Redistribution and use in source and binary forms, with or without
8174 + * modification, are permitted provided that the following conditions are met:
8175 + *     * Redistributions of source code must retain the above copyright
8176 + *       notice, this list of conditions and the following disclaimer.
8177 + *     * Redistributions in binary form must reproduce the above copyright
8178 + *       notice, this list of conditions and the following disclaimer in the
8179 + *       documentation and/or other materials provided with the distribution.
8180 + *     * Neither the name of Freescale Semiconductor nor the
8181 + *       names of its contributors may be used to endorse or promote products
8182 + *       derived from this software without specific prior written permission.
8183 + *
8184 + *
8185 + * ALTERNATIVELY, this software may be distributed under the terms of the
8186 + * GNU General Public License ("GPL") as published by the Free Software
8187 + * Foundation, either version 2 of that License or (at your option) any
8188 + * later version.
8189 + *
8190 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
8191 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
8192 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
8193 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
8194 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
8195 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
8196 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
8197 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8198 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
8199 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8200 + */
8201 +
8202 +
8203 +#ifndef __MEMAC_MII_ACC_H
8204 +#define __MEMAC_MII_ACC_H
8205 +
8206 +#include "std_ext.h"
8207 +
8208 +
8209 +/* MII Management Registers */
8210 +#define MDIO_CFG_CLK_DIV_MASK       0x0080ff80
8211 +#define MDIO_CFG_CLK_DIV_SHIFT      7
8212 +#define MDIO_CFG_HOLD_MASK          0x0000001c
8213 +#define MDIO_CFG_ENC45              0x00000040
8214 +#define MDIO_CFG_READ_ERR           0x00000002
8215 +#define MDIO_CFG_BSY                0x00000001
8216 +
8217 +#define MDIO_CTL_PHY_ADDR_SHIFT     5
8218 +#define MDIO_CTL_READ               0x00008000
8219 +
8220 +#define MDIO_DATA_BSY               0x80000000
8221 +
8222 +#if defined(__MWERKS__) && !defined(__GNUC__)
8223 +#pragma pack(push,1)
8224 +#endif /* defined(__MWERKS__) && ... */
8225 +
8226 +/*----------------------------------------------------*/
8227 +/* MII Configuration Control Memory Map Registers     */
8228 +/*----------------------------------------------------*/
8229 +typedef struct t_MemacMiiAccessMemMap
8230 +{
8231 +    volatile uint32_t   mdio_cfg;       /* 0x030  */
8232 +    volatile uint32_t   mdio_ctrl;      /* 0x034  */
8233 +    volatile uint32_t   mdio_data;      /* 0x038  */
8234 +    volatile uint32_t   mdio_addr;      /* 0x03c  */
8235 +} t_MemacMiiAccessMemMap ;
8236 +
8237 +#if defined(__MWERKS__) && !defined(__GNUC__)
8238 +#pragma pack(pop)
8239 +#endif /* defined(__MWERKS__) && ... */
8240 +
8241 +
8242 +#endif /* __MEMAC_MII_ACC_H */
8243 --- /dev/null
8244 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.c
8245 @@ -0,0 +1,975 @@
8246 +/*
8247 + * Copyright 2008-2012 Freescale Semiconductor Inc.
8248 + *
8249 + * Redistribution and use in source and binary forms, with or without
8250 + * modification, are permitted provided that the following conditions are met:
8251 + *     * Redistributions of source code must retain the above copyright
8252 + *       notice, this list of conditions and the following disclaimer.
8253 + *     * Redistributions in binary form must reproduce the above copyright
8254 + *       notice, this list of conditions and the following disclaimer in the
8255 + *       documentation and/or other materials provided with the distribution.
8256 + *     * Neither the name of Freescale Semiconductor nor the
8257 + *       names of its contributors may be used to endorse or promote products
8258 + *       derived from this software without specific prior written permission.
8259 + *
8260 + *
8261 + * ALTERNATIVELY, this software may be distributed under the terms of the
8262 + * GNU General Public License ("GPL") as published by the Free Software
8263 + * Foundation, either version 2 of that License or (at your option) any
8264 + * later version.
8265 + *
8266 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
8267 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
8268 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
8269 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
8270 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
8271 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
8272 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
8273 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8274 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
8275 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8276 + */
8277 +
8278 +
8279 +/******************************************************************************
8280 + @File          tgec.c
8281 +
8282 + @Description   FM 10G MAC ...
8283 +*//***************************************************************************/
8284 +
8285 +#include "std_ext.h"
8286 +#include "string_ext.h"
8287 +#include "error_ext.h"
8288 +#include "xx_ext.h"
8289 +#include "endian_ext.h"
8290 +#include "debug_ext.h"
8291 +#include "crc_mac_addr_ext.h"
8292 +
8293 +#include "fm_common.h"
8294 +#include "fsl_fman_tgec.h"
8295 +#include "tgec.h"
8296 +
8297 +
8298 +/*****************************************************************************/
8299 +/*                      Internal routines                                    */
8300 +/*****************************************************************************/
8301 +
8302 +static t_Error CheckInitParameters(t_Tgec    *p_Tgec)
8303 +{
8304 +    if (ENET_SPEED_FROM_MODE(p_Tgec->enetMode) < e_ENET_SPEED_10000)
8305 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 10G MAC driver only support 10G speed"));
8306 +#if (FM_MAX_NUM_OF_10G_MACS > 0)
8307 +    if (p_Tgec->macId >= FM_MAX_NUM_OF_10G_MACS)
8308 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("macId of 10G can not be greater than 0"));
8309 +#endif /* (FM_MAX_NUM_OF_10G_MACS > 0) */
8310 +
8311 +    if (p_Tgec->addr == 0)
8312 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 10G MAC Must have a valid MAC Address"));
8313 +    if (!p_Tgec->f_Exception)
8314 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("uninitialized f_Exception"));
8315 +    if (!p_Tgec->f_Event)
8316 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("uninitialized f_Event"));
8317 +#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
8318 +    if (!p_Tgec->p_TgecDriverParam->no_length_check_enable)
8319 +       RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
8320 +#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
8321 +    return E_OK;
8322 +}
8323 +
8324 +/* ......................................................................... */
8325 +
8326 +static uint32_t GetMacAddrHashCode(uint64_t ethAddr)
8327 +{
8328 +    uint32_t crc;
8329 +
8330 +    /* CRC calculation */
8331 +    GET_MAC_ADDR_CRC(ethAddr, crc);
8332 +
8333 +    crc = GetMirror32(crc);
8334 +
8335 +    return crc;
8336 +}
8337 +
8338 +/* ......................................................................... */
8339 +
8340 +static void TgecErrException(t_Handle h_Tgec)
8341 +{
8342 +    t_Tgec              *p_Tgec = (t_Tgec *)h_Tgec;
8343 +    uint32_t            event;
8344 +    struct tgec_regs    *p_TgecMemMap = p_Tgec->p_MemMap;
8345 +
8346 +    /* do not handle MDIO events */
8347 +    event = fman_tgec_get_event(p_TgecMemMap, ~(TGEC_IMASK_MDIO_SCAN_EVENT | TGEC_IMASK_MDIO_CMD_CMPL));
8348 +    event &= fman_tgec_get_interrupt_mask(p_TgecMemMap);
8349 +
8350 +    fman_tgec_ack_event(p_TgecMemMap, event);
8351 +
8352 +    if (event & TGEC_IMASK_REM_FAULT)
8353 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_REM_FAULT);
8354 +    if (event & TGEC_IMASK_LOC_FAULT)
8355 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_LOC_FAULT);
8356 +    if (event & TGEC_IMASK_TX_ECC_ER)
8357 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_1TX_ECC_ER);
8358 +    if (event & TGEC_IMASK_TX_FIFO_UNFL)
8359 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_TX_FIFO_UNFL);
8360 +    if (event & TGEC_IMASK_TX_FIFO_OVFL)
8361 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_TX_FIFO_OVFL);
8362 +    if (event & TGEC_IMASK_TX_ER)
8363 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_TX_ER);
8364 +    if (event & TGEC_IMASK_RX_FIFO_OVFL)
8365 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_FIFO_OVFL);
8366 +    if (event & TGEC_IMASK_RX_ECC_ER)
8367 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_ECC_ER);
8368 +    if (event & TGEC_IMASK_RX_JAB_FRM)
8369 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_JAB_FRM);
8370 +    if (event & TGEC_IMASK_RX_OVRSZ_FRM)
8371 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_OVRSZ_FRM);
8372 +    if (event & TGEC_IMASK_RX_RUNT_FRM)
8373 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_RUNT_FRM);
8374 +    if (event & TGEC_IMASK_RX_FRAG_FRM)
8375 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_FRAG_FRM);
8376 +    if (event & TGEC_IMASK_RX_LEN_ER)
8377 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_LEN_ER);
8378 +    if (event & TGEC_IMASK_RX_CRC_ER)
8379 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_CRC_ER);
8380 +    if (event & TGEC_IMASK_RX_ALIGN_ER)
8381 +        p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_ALIGN_ER);
8382 +}
8383 +
8384 +/* ......................................................................... */
8385 +
8386 +static void TgecException(t_Handle h_Tgec)
8387 +{
8388 +     t_Tgec             *p_Tgec = (t_Tgec *)h_Tgec;
8389 +     uint32_t           event;
8390 +     struct tgec_regs   *p_TgecMemMap = p_Tgec->p_MemMap;
8391 +
8392 +     /* handle only MDIO events */
8393 +     event = fman_tgec_get_event(p_TgecMemMap, (TGEC_IMASK_MDIO_SCAN_EVENT | TGEC_IMASK_MDIO_CMD_CMPL));
8394 +     event &= fman_tgec_get_interrupt_mask(p_TgecMemMap);
8395 +
8396 +     fman_tgec_ack_event(p_TgecMemMap, event);
8397 +
8398 +     if (event & TGEC_IMASK_MDIO_SCAN_EVENT)
8399 +         p_Tgec->f_Event(p_Tgec->h_App, e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO);
8400 +     if (event & TGEC_IMASK_MDIO_CMD_CMPL)
8401 +         p_Tgec->f_Event(p_Tgec->h_App, e_FM_MAC_EX_10G_MDIO_CMD_CMPL);
8402 +}
8403 +
8404 +/* ......................................................................... */
8405 +
8406 +static void FreeInitResources(t_Tgec *p_Tgec)
8407 +{
8408 +    if (p_Tgec->mdioIrq != NO_IRQ)
8409 +    {
8410 +        XX_DisableIntr(p_Tgec->mdioIrq);
8411 +        XX_FreeIntr(p_Tgec->mdioIrq);
8412 +    }
8413 +
8414 +    FmUnregisterIntr(p_Tgec->fmMacControllerDriver.h_Fm, e_FM_MOD_10G_MAC, p_Tgec->macId, e_FM_INTR_TYPE_ERR);
8415 +
8416 +    /* release the driver's group hash table */
8417 +    FreeHashTable(p_Tgec->p_MulticastAddrHash);
8418 +    p_Tgec->p_MulticastAddrHash =   NULL;
8419 +
8420 +    /* release the driver's individual hash table */
8421 +    FreeHashTable(p_Tgec->p_UnicastAddrHash);
8422 +    p_Tgec->p_UnicastAddrHash =     NULL;
8423 +}
8424 +
8425 +
8426 +/*****************************************************************************/
8427 +/*                     10G MAC API routines                                  */
8428 +/*****************************************************************************/
8429 +
8430 +/* ......................................................................... */
8431 +
8432 +static t_Error TgecEnable(t_Handle h_Tgec,  e_CommMode mode)
8433 +{
8434 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8435 +
8436 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8437 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8438 +
8439 +    fman_tgec_enable(p_Tgec->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
8440 +
8441 +    return E_OK;
8442 +}
8443 +
8444 +/* ......................................................................... */
8445 +
8446 +static t_Error TgecDisable (t_Handle h_Tgec, e_CommMode mode)
8447 +{
8448 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8449 +
8450 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8451 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8452 +
8453 +    fman_tgec_disable(p_Tgec->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
8454 +
8455 +    return E_OK;
8456 +}
8457 +
8458 +/* ......................................................................... */
8459 +
8460 +static t_Error TgecSetPromiscuous(t_Handle h_Tgec, bool newVal)
8461 +{
8462 +    t_Tgec       *p_Tgec = (t_Tgec *)h_Tgec;
8463 +
8464 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8465 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8466 +
8467 +    fman_tgec_set_promiscuous(p_Tgec->p_MemMap, newVal);
8468 +
8469 +    return E_OK;
8470 +}
8471 +
8472 +
8473 +/*****************************************************************************/
8474 +/*                      Tgec Configs modification functions                 */
8475 +/*****************************************************************************/
8476 +
8477 +/* ......................................................................... */
8478 +
8479 +static t_Error TgecConfigLoopback(t_Handle h_Tgec, bool newVal)
8480 +{
8481 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8482 +
8483 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8484 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8485 +
8486 +    p_Tgec->p_TgecDriverParam->loopback_enable = newVal;
8487 +
8488 +    return E_OK;
8489 +}
8490 +
8491 +/* ......................................................................... */
8492 +
8493 +static t_Error TgecConfigWan(t_Handle h_Tgec, bool newVal)
8494 +{
8495 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8496 +
8497 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8498 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8499 +
8500 +    p_Tgec->p_TgecDriverParam->wan_mode_enable = newVal;
8501 +
8502 +    return E_OK;
8503 +}
8504 +
8505 +/* ......................................................................... */
8506 +
8507 +static t_Error TgecConfigMaxFrameLength(t_Handle h_Tgec, uint16_t newVal)
8508 +{
8509 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8510 +
8511 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8512 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8513 +
8514 +    p_Tgec->p_TgecDriverParam->max_frame_length = newVal;
8515 +
8516 +    return E_OK;
8517 +}
8518 +
8519 +/* ......................................................................... */
8520 +
8521 +static t_Error TgecConfigLengthCheck(t_Handle h_Tgec, bool newVal)
8522 +{
8523 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8524 +
8525 +    UNUSED(newVal);
8526 +
8527 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8528 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8529 +
8530 +    p_Tgec->p_TgecDriverParam->no_length_check_enable = !newVal;
8531 +
8532 +    return E_OK;
8533 +}
8534 +
8535 +/* ......................................................................... */
8536 +
8537 +static t_Error TgecConfigException(t_Handle h_Tgec, e_FmMacExceptions exception, bool enable)
8538 +{
8539 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8540 +    uint32_t    bitMask = 0;
8541 +
8542 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8543 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8544 +
8545 +    GET_EXCEPTION_FLAG(bitMask, exception);
8546 +    if (bitMask)
8547 +    {
8548 +        if (enable)
8549 +            p_Tgec->exceptions |= bitMask;
8550 +        else
8551 +            p_Tgec->exceptions &= ~bitMask;
8552 +    }
8553 +    else
8554 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
8555 +
8556 +    return E_OK;
8557 +}
8558 +
8559 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
8560 +/* ......................................................................... */
8561 +
8562 +static t_Error TgecConfigSkipFman11Workaround(t_Handle h_Tgec)
8563 +{
8564 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8565 +
8566 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8567 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8568 +
8569 +    p_Tgec->p_TgecDriverParam->skip_fman11_workaround = TRUE;
8570 +
8571 +    return E_OK;
8572 +}
8573 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
8574 +
8575 +
8576 +/*****************************************************************************/
8577 +/*                      Tgec Run Time API functions                         */
8578 +/*****************************************************************************/
8579 +
8580 +/* ......................................................................... */
8581 +/* backward compatibility. will be removed in the future. */
8582 +static t_Error TgecTxMacPause(t_Handle h_Tgec, uint16_t pauseTime)
8583 +{
8584 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8585 +
8586 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_STATE);
8587 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8588 +    fman_tgec_set_tx_pause_frames(p_Tgec->p_MemMap, pauseTime);
8589 +
8590 +
8591 +    return E_OK;
8592 +}
8593 +
8594 +/* ......................................................................... */
8595 +
8596 +static t_Error TgecSetTxPauseFrames(t_Handle h_Tgec,
8597 +                                    uint8_t  priority,
8598 +                                    uint16_t pauseTime,
8599 +                                    uint16_t threshTime)
8600 +{
8601 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8602 +
8603 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_STATE);
8604 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8605 +
8606 +    UNUSED(priority); UNUSED(threshTime);
8607 +
8608 +    fman_tgec_set_tx_pause_frames(p_Tgec->p_MemMap, pauseTime);
8609 +
8610 +    return E_OK;
8611 +}
8612 +
8613 +/* ......................................................................... */
8614 +
8615 +static t_Error TgecRxIgnoreMacPause(t_Handle h_Tgec, bool en)
8616 +{
8617 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8618 +
8619 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_STATE);
8620 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8621 +
8622 +    fman_tgec_set_rx_ignore_pause_frames(p_Tgec->p_MemMap, en);
8623 +
8624 +    return E_OK;
8625 +}
8626 +
8627 +/* ......................................................................... */
8628 +
8629 +static t_Error TgecGetStatistics(t_Handle h_Tgec, t_FmMacStatistics *p_Statistics)
8630 +{
8631 +    t_Tgec              *p_Tgec = (t_Tgec *)h_Tgec;
8632 +    struct tgec_regs    *p_TgecMemMap;
8633 +
8634 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
8635 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8636 +    SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
8637 +
8638 +    p_TgecMemMap = p_Tgec->p_MemMap;
8639 +
8640 +    p_Statistics->eStatPkts64           = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R64);
8641 +    p_Statistics->eStatPkts65to127      = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R127);
8642 +    p_Statistics->eStatPkts128to255     = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R255);
8643 +    p_Statistics->eStatPkts256to511     = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R511);
8644 +    p_Statistics->eStatPkts512to1023    = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1023);
8645 +    p_Statistics->eStatPkts1024to1518   = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1518);
8646 +    p_Statistics->eStatPkts1519to1522   = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1519X);
8647 +/* */
8648 +    p_Statistics->eStatFragments        = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TRFRG);
8649 +    p_Statistics->eStatJabbers          = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TRJBR);
8650 +
8651 +    p_Statistics->eStatsDropEvents      = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RDRP);
8652 +    p_Statistics->eStatCRCAlignErrors   = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RALN);
8653 +
8654 +    p_Statistics->eStatUndersizePkts    = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TRUND);
8655 +    p_Statistics->eStatOversizePkts     = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TROVR);
8656 +/* Pause */
8657 +    p_Statistics->reStatPause           = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RXPF);
8658 +    p_Statistics->teStatPause           = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TXPF);
8659 +
8660 +/* MIB II */
8661 +    p_Statistics->ifInOctets            = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_ROCT);
8662 +    p_Statistics->ifInUcastPkts         = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RUCA);
8663 +    p_Statistics->ifInMcastPkts         = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RMCA);
8664 +    p_Statistics->ifInBcastPkts         = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RBCA);
8665 +    p_Statistics->ifInPkts              = p_Statistics->ifInUcastPkts
8666 +                                        + p_Statistics->ifInMcastPkts
8667 +                                        + p_Statistics->ifInBcastPkts;
8668 +    p_Statistics->ifInDiscards          = 0;
8669 +    p_Statistics->ifInErrors            = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RERR);
8670 +
8671 +    p_Statistics->ifOutOctets           = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TOCT);
8672 +    p_Statistics->ifOutUcastPkts        = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TUCA);
8673 +    p_Statistics->ifOutMcastPkts        = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TMCA);
8674 +    p_Statistics->ifOutBcastPkts        = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TBCA);
8675 +    p_Statistics->ifOutPkts             = p_Statistics->ifOutUcastPkts
8676 +                                        + p_Statistics->ifOutMcastPkts
8677 +                                        + p_Statistics->ifOutBcastPkts;
8678 +    p_Statistics->ifOutDiscards         = 0;
8679 +    p_Statistics->ifOutErrors           = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TERR);
8680 +
8681 +    return E_OK;
8682 +}
8683 +
8684 +/* ......................................................................... */
8685 +
8686 +static t_Error TgecEnable1588TimeStamp(t_Handle h_Tgec)
8687 +{
8688 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8689 +
8690 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8691 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8692 +
8693 +    fman_tgec_enable_1588_time_stamp(p_Tgec->p_MemMap, 1);
8694 +
8695 +    return E_OK;
8696 +}
8697 +
8698 +/* ......................................................................... */
8699 +
8700 +static t_Error TgecDisable1588TimeStamp(t_Handle h_Tgec)
8701 +{
8702 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8703 +
8704 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8705 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8706 +
8707 +    fman_tgec_enable_1588_time_stamp(p_Tgec->p_MemMap, 0);
8708 +
8709 +    return E_OK;
8710 +}
8711 +
8712 +/* ......................................................................... */
8713 +
8714 +static t_Error TgecModifyMacAddress (t_Handle h_Tgec, t_EnetAddr *p_EnetAddr)
8715 +{
8716 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8717 +
8718 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
8719 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8720 +
8721 +    p_Tgec->addr = ENET_ADDR_TO_UINT64(*p_EnetAddr);
8722 +    fman_tgec_set_mac_address(p_Tgec->p_MemMap, (uint8_t *)(*p_EnetAddr));
8723 +
8724 +    return E_OK;
8725 +}
8726 +
8727 +/* ......................................................................... */
8728 +
8729 +static t_Error TgecResetCounters (t_Handle h_Tgec)
8730 +{
8731 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8732 +
8733 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8734 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8735 +
8736 +    fman_tgec_reset_stat(p_Tgec->p_MemMap);
8737 +
8738 +    return E_OK;
8739 +}
8740 +
8741 +/* ......................................................................... */
8742 +
8743 +static t_Error TgecAddExactMatchMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
8744 +{
8745 +    t_Tgec      *p_Tgec = (t_Tgec *) h_Tgec;
8746 +    uint64_t    ethAddr;
8747 +    uint8_t     paddrNum;
8748 +
8749 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8750 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8751 +
8752 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
8753 +
8754 +    if (ethAddr & GROUP_ADDRESS)
8755 +        /* Multicast address has no effect in PADDR */
8756 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
8757 +
8758 +    /* Make sure no PADDR contains this address */
8759 +    for (paddrNum = 0; paddrNum < TGEC_NUM_OF_PADDRS; paddrNum++)
8760 +        if (p_Tgec->indAddrRegUsed[paddrNum])
8761 +            if (p_Tgec->paddr[paddrNum] == ethAddr)
8762 +                RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
8763 +
8764 +    /* Find first unused PADDR */
8765 +    for (paddrNum = 0; paddrNum < TGEC_NUM_OF_PADDRS; paddrNum++)
8766 +    {
8767 +        if (!(p_Tgec->indAddrRegUsed[paddrNum]))
8768 +        {
8769 +            /* mark this PADDR as used */
8770 +            p_Tgec->indAddrRegUsed[paddrNum] = TRUE;
8771 +            /* store address */
8772 +            p_Tgec->paddr[paddrNum] = ethAddr;
8773 +
8774 +            /* put in hardware */
8775 +            fman_tgec_add_addr_in_paddr(p_Tgec->p_MemMap, (uint8_t*)(*p_EthAddr)/* , paddrNum */);
8776 +            p_Tgec->numOfIndAddrInRegs++;
8777 +
8778 +            return E_OK;
8779 +        }
8780 +    }
8781 +
8782 +    /* No free PADDR */
8783 +    RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
8784 +}
8785 +
8786 +/* ......................................................................... */
8787 +
8788 +static t_Error TgecDelExactMatchMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
8789 +{
8790 +    t_Tgec      *p_Tgec = (t_Tgec *) h_Tgec;
8791 +    uint64_t    ethAddr;
8792 +    uint8_t     paddrNum;
8793 +
8794 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8795 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8796 +
8797 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
8798 +
8799 +    /* Find used PADDR containing this address */
8800 +    for (paddrNum = 0; paddrNum < TGEC_NUM_OF_PADDRS; paddrNum++)
8801 +    {
8802 +        if ((p_Tgec->indAddrRegUsed[paddrNum]) &&
8803 +            (p_Tgec->paddr[paddrNum] == ethAddr))
8804 +        {
8805 +            /* mark this PADDR as not used */
8806 +            p_Tgec->indAddrRegUsed[paddrNum] = FALSE;
8807 +            /* clear in hardware */
8808 +            fman_tgec_clear_addr_in_paddr(p_Tgec->p_MemMap /*, paddrNum */);
8809 +            p_Tgec->numOfIndAddrInRegs--;
8810 +
8811 +            return E_OK;
8812 +        }
8813 +    }
8814 +
8815 +    RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
8816 +}
8817 +
8818 +/* ......................................................................... */
8819 +
8820 +static t_Error TgecAddHashMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
8821 +{
8822 +    t_Tgec          *p_Tgec = (t_Tgec *)h_Tgec;
8823 +    t_EthHashEntry  *p_HashEntry;
8824 +    uint32_t        crc;
8825 +    uint32_t        hash;
8826 +    uint64_t        ethAddr;
8827 +
8828 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
8829 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8830 +
8831 +    ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
8832 +
8833 +    if (!(ethAddr & GROUP_ADDRESS))
8834 +        /* Unicast addresses not supported in hash */
8835 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unicast Address"));
8836 +
8837 +    /* CRC calculation */
8838 +    crc = GetMacAddrHashCode(ethAddr);
8839 +
8840 +    hash = (crc >> TGEC_HASH_MCAST_SHIFT) & TGEC_HASH_ADR_MSK;        /* Take 9 MSB bits */
8841 +
8842 +    /* Create element to be added to the driver hash table */
8843 +    p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
8844 +    p_HashEntry->addr = ethAddr;
8845 +    INIT_LIST(&p_HashEntry->node);
8846 +
8847 +    LIST_AddToTail(&(p_HashEntry->node), &(p_Tgec->p_MulticastAddrHash->p_Lsts[hash]));
8848 +    fman_tgec_set_hash_table(p_Tgec->p_MemMap, (hash | TGEC_HASH_MCAST_EN));
8849 +
8850 +    return E_OK;
8851 +}
8852 +
8853 +/* ......................................................................... */
8854 +
8855 +static t_Error TgecDelHashMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
8856 +{
8857 +    t_Tgec           *p_Tgec = (t_Tgec *)h_Tgec;
8858 +    t_EthHashEntry   *p_HashEntry = NULL;
8859 +    t_List           *p_Pos;
8860 +    uint32_t         crc;
8861 +    uint32_t         hash;
8862 +    uint64_t         ethAddr;
8863 +
8864 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
8865 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8866 +
8867 +    ethAddr = ((*(uint64_t *)p_EthAddr) >> 16);
8868 +
8869 +    /* CRC calculation */
8870 +    crc = GetMacAddrHashCode(ethAddr);
8871 +
8872 +    hash = (crc >> TGEC_HASH_MCAST_SHIFT) & TGEC_HASH_ADR_MSK;        /* Take 9 MSB bits */
8873 +
8874 +    LIST_FOR_EACH(p_Pos, &(p_Tgec->p_MulticastAddrHash->p_Lsts[hash]))
8875 +    {
8876 +        p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
8877 +        if (p_HashEntry->addr == ethAddr)
8878 +        {
8879 +            LIST_DelAndInit(&p_HashEntry->node);
8880 +            XX_Free(p_HashEntry);
8881 +            break;
8882 +        }
8883 +    }
8884 +    if (LIST_IsEmpty(&p_Tgec->p_MulticastAddrHash->p_Lsts[hash]))
8885 +        fman_tgec_set_hash_table(p_Tgec->p_MemMap, (hash & ~TGEC_HASH_MCAST_EN));
8886 +
8887 +    return E_OK;
8888 +}
8889 +
8890 +/* ......................................................................... */
8891 +
8892 +static t_Error TgecGetId(t_Handle h_Tgec, uint32_t *macId)
8893 +{
8894 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8895 +
8896 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8897 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8898 +
8899 +    UNUSED(p_Tgec);
8900 +    UNUSED(macId);
8901 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("TgecGetId Not Supported"));
8902 +}
8903 +
8904 +/* ......................................................................... */
8905 +
8906 +static t_Error TgecGetVersion(t_Handle h_Tgec, uint32_t *macVersion)
8907 +{
8908 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8909 +
8910 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8911 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8912 +
8913 +    *macVersion = fman_tgec_get_revision(p_Tgec->p_MemMap);
8914 +
8915 +    return E_OK;
8916 +}
8917 +
8918 +/* ......................................................................... */
8919 +
8920 +static t_Error TgecSetExcpetion(t_Handle h_Tgec, e_FmMacExceptions exception, bool enable)
8921 +{
8922 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8923 +    uint32_t    bitMask = 0;
8924 +
8925 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
8926 +    SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
8927 +
8928 +    GET_EXCEPTION_FLAG(bitMask, exception);
8929 +    if (bitMask)
8930 +    {
8931 +        if (enable)
8932 +            p_Tgec->exceptions |= bitMask;
8933 +        else
8934 +            p_Tgec->exceptions &= ~bitMask;
8935 +   }
8936 +    else
8937 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
8938 +
8939 +    if (enable)
8940 +        fman_tgec_enable_interrupt(p_Tgec->p_MemMap, bitMask);
8941 +    else
8942 +        fman_tgec_disable_interrupt(p_Tgec->p_MemMap, bitMask);
8943 +
8944 +    return E_OK;
8945 +}
8946 +
8947 +/* ......................................................................... */
8948 +
8949 +static uint16_t TgecGetMaxFrameLength(t_Handle h_Tgec)
8950 +{
8951 +    t_Tgec      *p_Tgec = (t_Tgec *)h_Tgec;
8952 +
8953 +    SANITY_CHECK_RETURN_VALUE(p_Tgec, E_INVALID_HANDLE, 0);
8954 +    SANITY_CHECK_RETURN_VALUE(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE, 0);
8955 +
8956 +    return fman_tgec_get_max_frame_len(p_Tgec->p_MemMap);
8957 +}
8958 +
8959 +/* ......................................................................... */
8960 +
8961 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
8962 +static t_Error TgecTxEccWorkaround(t_Tgec *p_Tgec)
8963 +{
8964 +    t_Error err;
8965 +
8966 +#if defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)
8967 +    XX_Print("Applying 10G TX ECC workaround (10GMAC-A004) ... ");
8968 +#endif /* (DEBUG_ERRORS > 0) */
8969 +    /* enable and set promiscuous */
8970 +    fman_tgec_enable(p_Tgec->p_MemMap, TRUE, TRUE);
8971 +    fman_tgec_set_promiscuous(p_Tgec->p_MemMap, TRUE);
8972 +    err = Fm10GTxEccWorkaround(p_Tgec->fmMacControllerDriver.h_Fm, p_Tgec->macId);
8973 +    /* disable */
8974 +    fman_tgec_set_promiscuous(p_Tgec->p_MemMap, FALSE);
8975 +    fman_tgec_enable(p_Tgec->p_MemMap, FALSE, FALSE);
8976 +    fman_tgec_reset_stat(p_Tgec->p_MemMap);
8977 +    fman_tgec_ack_event(p_Tgec->p_MemMap, 0xffffffff);
8978 +#if defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)
8979 +    if (err)
8980 +        XX_Print("FAILED!\n");
8981 +    else
8982 +        XX_Print("done.\n");
8983 +#endif /* (DEBUG_ERRORS > 0) */
8984 +
8985 +    return err;
8986 +}
8987 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
8988 +
8989 +/*****************************************************************************/
8990 +/*                      FM Init & Free API                                   */
8991 +/*****************************************************************************/
8992 +
8993 +/* ......................................................................... */
8994 +
8995 +static t_Error TgecInit(t_Handle h_Tgec)
8996 +{
8997 +    t_Tgec                  *p_Tgec = (t_Tgec *)h_Tgec;
8998 +    struct tgec_cfg         *p_TgecDriverParam;
8999 +    t_EnetAddr              ethAddr;
9000 +    t_Error                 err;
9001 +
9002 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
9003 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
9004 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->fmMacControllerDriver.h_Fm, E_INVALID_HANDLE);
9005 +
9006 +    FM_GetRevision(p_Tgec->fmMacControllerDriver.h_Fm, &p_Tgec->fmMacControllerDriver.fmRevInfo);
9007 +    CHECK_INIT_PARAMETERS(p_Tgec, CheckInitParameters);
9008 +
9009 +    p_TgecDriverParam = p_Tgec->p_TgecDriverParam;
9010 +
9011 +    MAKE_ENET_ADDR_FROM_UINT64(p_Tgec->addr, ethAddr);
9012 +    fman_tgec_set_mac_address(p_Tgec->p_MemMap, (uint8_t *)ethAddr);
9013 +
9014 +    /* interrupts */
9015 +#ifdef FM_10G_REM_N_LCL_FLT_EX_10GMAC_ERRATA_SW005
9016 +    {
9017 +        if (p_Tgec->fmMacControllerDriver.fmRevInfo.majorRev <=2)
9018 +            p_Tgec->exceptions &= ~(TGEC_IMASK_REM_FAULT | TGEC_IMASK_LOC_FAULT);
9019 +    }
9020 +#endif /* FM_10G_REM_N_LCL_FLT_EX_10GMAC_ERRATA_SW005 */
9021 +
9022 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
9023 +    if (!p_Tgec->p_TgecDriverParam->skip_fman11_workaround &&
9024 +        ((err = TgecTxEccWorkaround(p_Tgec)) != E_OK))
9025 +    {
9026 +        FreeInitResources(p_Tgec);
9027 +        REPORT_ERROR(MINOR, err, ("TgecTxEccWorkaround FAILED"));
9028 +    }
9029 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
9030 +
9031 +    err = fman_tgec_init(p_Tgec->p_MemMap, p_TgecDriverParam, p_Tgec->exceptions);
9032 +    if (err)
9033 +    {
9034 +        FreeInitResources(p_Tgec);
9035 +        RETURN_ERROR(MAJOR, err, ("This TGEC version does not support the required i/f mode"));
9036 +    }
9037 +
9038 +    /* Max Frame Length */
9039 +    err = FmSetMacMaxFrame(p_Tgec->fmMacControllerDriver.h_Fm,
9040 +                           e_FM_MAC_10G,
9041 +                           p_Tgec->fmMacControllerDriver.macId,
9042 +                           p_TgecDriverParam->max_frame_length);
9043 +    if (err != E_OK)
9044 +    {
9045 +        FreeInitResources(p_Tgec);
9046 +        RETURN_ERROR(MINOR, err, NO_MSG);
9047 +    }
9048 +/* we consider having no IPC a non crasher... */
9049 +
9050 +#ifdef FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007
9051 +    if (p_Tgec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
9052 +        fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(p_Tgec->p_MemMap);
9053 +#endif /* FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007 */
9054 +
9055 +    p_Tgec->p_MulticastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
9056 +    if (!p_Tgec->p_MulticastAddrHash)
9057 +    {
9058 +        FreeInitResources(p_Tgec);
9059 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
9060 +    }
9061 +
9062 +    p_Tgec->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
9063 +    if (!p_Tgec->p_UnicastAddrHash)
9064 +    {
9065 +        FreeInitResources(p_Tgec);
9066 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
9067 +    }
9068 +
9069 +    FmRegisterIntr(p_Tgec->fmMacControllerDriver.h_Fm,
9070 +                   e_FM_MOD_10G_MAC,
9071 +                   p_Tgec->macId,
9072 +                   e_FM_INTR_TYPE_ERR,
9073 +                   TgecErrException,
9074 +                   p_Tgec);
9075 +    if (p_Tgec->mdioIrq != NO_IRQ)
9076 +    {
9077 +        XX_SetIntr(p_Tgec->mdioIrq, TgecException, p_Tgec);
9078 +        XX_EnableIntr(p_Tgec->mdioIrq);
9079 +    }
9080 +
9081 +    XX_Free(p_TgecDriverParam);
9082 +    p_Tgec->p_TgecDriverParam = NULL;
9083 +
9084 +    return E_OK;
9085 +}
9086 +
9087 +/* ......................................................................... */
9088 +
9089 +static t_Error TgecFree(t_Handle h_Tgec)
9090 +{
9091 +    t_Tgec       *p_Tgec = (t_Tgec *)h_Tgec;
9092 +
9093 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
9094 +
9095 +    if (p_Tgec->p_TgecDriverParam)
9096 +    {
9097 +        /* Called after config */
9098 +        XX_Free(p_Tgec->p_TgecDriverParam);
9099 +        p_Tgec->p_TgecDriverParam = NULL;
9100 +    }
9101 +    else
9102 +        /* Called after init */
9103 +        FreeInitResources(p_Tgec);
9104 +
9105 +    XX_Free(p_Tgec);
9106 +
9107 +    return E_OK;
9108 +}
9109 +
9110 +/* ......................................................................... */
9111 +
9112 +static void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
9113 +{
9114 +    p_FmMacControllerDriver->f_FM_MAC_Init                      = TgecInit;
9115 +    p_FmMacControllerDriver->f_FM_MAC_Free                      = TgecFree;
9116 +
9117 +    p_FmMacControllerDriver->f_FM_MAC_SetStatistics             = NULL;
9118 +    p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback            = TgecConfigLoopback;
9119 +    p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength      = TgecConfigMaxFrameLength;
9120 +
9121 +    p_FmMacControllerDriver->f_FM_MAC_ConfigWan                 = TgecConfigWan;
9122 +
9123 +    p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc           = NULL; /* TGEC always works with pad+crc */
9124 +    p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex          = NULL; /* half-duplex is not supported in xgec */
9125 +    p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck         = TgecConfigLengthCheck;
9126 +    p_FmMacControllerDriver->f_FM_MAC_ConfigException           = TgecConfigException;
9127 +    p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit         = NULL;
9128 +
9129 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
9130 +    p_FmMacControllerDriver->f_FM_MAC_ConfigSkipFman11Workaround= TgecConfigSkipFman11Workaround;
9131 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
9132 +
9133 +    p_FmMacControllerDriver->f_FM_MAC_SetException              = TgecSetExcpetion;
9134 +
9135 +    p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp       = TgecEnable1588TimeStamp;
9136 +    p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp      = TgecDisable1588TimeStamp;
9137 +
9138 +    p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous            = TgecSetPromiscuous;
9139 +    p_FmMacControllerDriver->f_FM_MAC_AdjustLink                = NULL;
9140 +    p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan              = NULL;
9141 +    p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg            = NULL;
9142 +
9143 +    p_FmMacControllerDriver->f_FM_MAC_Enable                    = TgecEnable;
9144 +    p_FmMacControllerDriver->f_FM_MAC_Disable                   = TgecDisable;
9145 +    p_FmMacControllerDriver->f_FM_MAC_Resume                    = NULL;
9146 +
9147 +    p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames      = TgecTxMacPause;
9148 +    p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames          = TgecSetTxPauseFrames;
9149 +    p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames    = TgecRxIgnoreMacPause;
9150 +
9151 +    p_FmMacControllerDriver->f_FM_MAC_ResetCounters             = TgecResetCounters;
9152 +    p_FmMacControllerDriver->f_FM_MAC_GetStatistics             = TgecGetStatistics;
9153 +
9154 +    p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr             = TgecModifyMacAddress;
9155 +    p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr            = TgecAddHashMacAddress;
9156 +    p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr         = TgecDelHashMacAddress;
9157 +    p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr      = TgecAddExactMatchMacAddress;
9158 +    p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr  = TgecDelExactMatchMacAddress;
9159 +    p_FmMacControllerDriver->f_FM_MAC_GetId                     = TgecGetId;
9160 +    p_FmMacControllerDriver->f_FM_MAC_GetVersion                = TgecGetVersion;
9161 +    p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength         = TgecGetMaxFrameLength;
9162 +
9163 +    p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg           = TGEC_MII_WritePhyReg;
9164 +    p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg            = TGEC_MII_ReadPhyReg;
9165 +}
9166 +
9167 +
9168 +/*****************************************************************************/
9169 +/*                      Tgec Config  Main Entry                             */
9170 +/*****************************************************************************/
9171 +
9172 +/* ......................................................................... */
9173 +
9174 +t_Handle TGEC_Config(t_FmMacParams *p_FmMacParam)
9175 +{
9176 +    t_Tgec              *p_Tgec;
9177 +    struct tgec_cfg     *p_TgecDriverParam;
9178 +    uintptr_t           baseAddr;
9179 +
9180 +    SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
9181 +
9182 +    baseAddr = p_FmMacParam->baseAddr;
9183 +    /* allocate memory for the UCC GETH data structure. */
9184 +    p_Tgec = (t_Tgec *)XX_Malloc(sizeof(t_Tgec));
9185 +    if (!p_Tgec)
9186 +    {
9187 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("10G MAC driver structure"));
9188 +        return NULL;
9189 +    }
9190 +    memset(p_Tgec, 0, sizeof(t_Tgec));
9191 +    InitFmMacControllerDriver(&p_Tgec->fmMacControllerDriver);
9192 +
9193 +    /* allocate memory for the 10G MAC driver parameters data structure. */
9194 +    p_TgecDriverParam = (struct tgec_cfg *) XX_Malloc(sizeof(struct tgec_cfg));
9195 +    if (!p_TgecDriverParam)
9196 +    {
9197 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("10G MAC driver parameters"));
9198 +        XX_Free(p_Tgec);
9199 +        return NULL;
9200 +    }
9201 +    memset(p_TgecDriverParam, 0, sizeof(struct tgec_cfg));
9202 +
9203 +    /* Plant parameter structure pointer */
9204 +    p_Tgec->p_TgecDriverParam = p_TgecDriverParam;
9205 +
9206 +    fman_tgec_defconfig(p_TgecDriverParam);
9207 +
9208 +    p_Tgec->p_MemMap        = (struct tgec_regs *)UINT_TO_PTR(baseAddr);
9209 +    p_Tgec->p_MiiMemMap     = (t_TgecMiiAccessMemMap *)UINT_TO_PTR(baseAddr + TGEC_TO_MII_OFFSET);
9210 +    p_Tgec->addr            = ENET_ADDR_TO_UINT64(p_FmMacParam->addr);
9211 +    p_Tgec->enetMode        = p_FmMacParam->enetMode;
9212 +    p_Tgec->macId           = p_FmMacParam->macId;
9213 +    p_Tgec->exceptions      = DEFAULT_exceptions;
9214 +    p_Tgec->mdioIrq         = p_FmMacParam->mdioIrq;
9215 +    p_Tgec->f_Exception     = p_FmMacParam->f_Exception;
9216 +    p_Tgec->f_Event         = p_FmMacParam->f_Event;
9217 +    p_Tgec->h_App           = p_FmMacParam->h_App;
9218 +
9219 +    return p_Tgec;
9220 +}
9221 --- /dev/null
9222 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.h
9223 @@ -0,0 +1,151 @@
9224 +/*
9225 + * Copyright 2008-2012 Freescale Semiconductor Inc.
9226 + *
9227 + * Redistribution and use in source and binary forms, with or without
9228 + * modification, are permitted provided that the following conditions are met:
9229 + *     * Redistributions of source code must retain the above copyright
9230 + *       notice, this list of conditions and the following disclaimer.
9231 + *     * Redistributions in binary form must reproduce the above copyright
9232 + *       notice, this list of conditions and the following disclaimer in the
9233 + *       documentation and/or other materials provided with the distribution.
9234 + *     * Neither the name of Freescale Semiconductor nor the
9235 + *       names of its contributors may be used to endorse or promote products
9236 + *       derived from this software without specific prior written permission.
9237 + *
9238 + *
9239 + * ALTERNATIVELY, this software may be distributed under the terms of the
9240 + * GNU General Public License ("GPL") as published by the Free Software
9241 + * Foundation, either version 2 of that License or (at your option) any
9242 + * later version.
9243 + *
9244 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9245 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9246 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9247 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9248 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9249 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9250 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9251 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9252 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9253 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9254 + */
9255 +
9256 +
9257 +/******************************************************************************
9258 + @File          tgec.h
9259 +
9260 + @Description   FM 10G MAC ...
9261 +*//***************************************************************************/
9262 +#ifndef __TGEC_H
9263 +#define __TGEC_H
9264 +
9265 +#include "std_ext.h"
9266 +#include "error_ext.h"
9267 +#include "list_ext.h"
9268 +#include "enet_ext.h"
9269 +
9270 +#include "tgec_mii_acc.h"
9271 +#include "fm_mac.h"
9272 +
9273 +
9274 +#define DEFAULT_exceptions                        \
9275 +    ((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT     |  \
9276 +                TGEC_IMASK_REM_FAULT           |  \
9277 +                TGEC_IMASK_LOC_FAULT           |  \
9278 +                TGEC_IMASK_TX_ECC_ER           |  \
9279 +                TGEC_IMASK_TX_FIFO_UNFL        |  \
9280 +                TGEC_IMASK_TX_FIFO_OVFL        |  \
9281 +                TGEC_IMASK_TX_ER               |  \
9282 +                TGEC_IMASK_RX_FIFO_OVFL        |  \
9283 +                TGEC_IMASK_RX_ECC_ER           |  \
9284 +                TGEC_IMASK_RX_JAB_FRM          |  \
9285 +                TGEC_IMASK_RX_OVRSZ_FRM        |  \
9286 +                TGEC_IMASK_RX_RUNT_FRM         |  \
9287 +                TGEC_IMASK_RX_FRAG_FRM         |  \
9288 +                TGEC_IMASK_RX_CRC_ER           |  \
9289 +                TGEC_IMASK_RX_ALIGN_ER))
9290 +
9291 +#define GET_EXCEPTION_FLAG(bitMask, exception)      switch (exception){ \
9292 +    case e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO:                           \
9293 +        bitMask = TGEC_IMASK_MDIO_SCAN_EVENT    ; break;                \
9294 +    case e_FM_MAC_EX_10G_MDIO_CMD_CMPL:                                 \
9295 +        bitMask = TGEC_IMASK_MDIO_CMD_CMPL      ; break;                \
9296 +    case e_FM_MAC_EX_10G_REM_FAULT:                                     \
9297 +        bitMask = TGEC_IMASK_REM_FAULT          ; break;                \
9298 +    case e_FM_MAC_EX_10G_LOC_FAULT:                                     \
9299 +        bitMask = TGEC_IMASK_LOC_FAULT          ; break;                \
9300 +    case e_FM_MAC_EX_10G_1TX_ECC_ER:                                    \
9301 +        bitMask = TGEC_IMASK_TX_ECC_ER         ; break;                 \
9302 +    case e_FM_MAC_EX_10G_TX_FIFO_UNFL:                                  \
9303 +        bitMask = TGEC_IMASK_TX_FIFO_UNFL       ; break;                \
9304 +    case e_FM_MAC_EX_10G_TX_FIFO_OVFL:                                  \
9305 +        bitMask = TGEC_IMASK_TX_FIFO_OVFL       ; break;                \
9306 +    case e_FM_MAC_EX_10G_TX_ER:                                         \
9307 +        bitMask = TGEC_IMASK_TX_ER              ; break;                \
9308 +    case e_FM_MAC_EX_10G_RX_FIFO_OVFL:                                  \
9309 +        bitMask = TGEC_IMASK_RX_FIFO_OVFL       ; break;                \
9310 +    case e_FM_MAC_EX_10G_RX_ECC_ER:                                     \
9311 +        bitMask = TGEC_IMASK_RX_ECC_ER          ; break;                \
9312 +    case e_FM_MAC_EX_10G_RX_JAB_FRM:                                    \
9313 +        bitMask = TGEC_IMASK_RX_JAB_FRM         ; break;                \
9314 +    case e_FM_MAC_EX_10G_RX_OVRSZ_FRM:                                  \
9315 +        bitMask = TGEC_IMASK_RX_OVRSZ_FRM       ; break;                \
9316 +    case e_FM_MAC_EX_10G_RX_RUNT_FRM:                                   \
9317 +        bitMask = TGEC_IMASK_RX_RUNT_FRM        ; break;                \
9318 +    case e_FM_MAC_EX_10G_RX_FRAG_FRM:                                   \
9319 +        bitMask = TGEC_IMASK_RX_FRAG_FRM        ; break;                \
9320 +    case e_FM_MAC_EX_10G_RX_LEN_ER:                                     \
9321 +        bitMask = TGEC_IMASK_RX_LEN_ER          ; break;                \
9322 +    case e_FM_MAC_EX_10G_RX_CRC_ER:                                     \
9323 +        bitMask = TGEC_IMASK_RX_CRC_ER          ; break;                \
9324 +    case e_FM_MAC_EX_10G_RX_ALIGN_ER:                                   \
9325 +        bitMask = TGEC_IMASK_RX_ALIGN_ER        ; break;                \
9326 +    default: bitMask = 0;break;}
9327 +
9328 +#define MAX_PACKET_ALIGNMENT        31
9329 +#define MAX_INTER_PACKET_GAP        0x7f
9330 +#define MAX_INTER_PALTERNATE_BEB    0x0f
9331 +#define MAX_RETRANSMISSION          0x0f
9332 +#define MAX_COLLISION_WINDOW        0x03ff
9333 +
9334 +#define TGEC_NUM_OF_PADDRS          1                   /* number of pattern match registers (entries) */
9335 +
9336 +#define GROUP_ADDRESS               0x0000010000000000LL /* Group address bit indication */
9337 +
9338 +#define HASH_TABLE_SIZE             512                 /* Hash table size (= 32 bits * 8 regs) */
9339 +
9340 +#define TGEC_TO_MII_OFFSET          0x1030              /* Offset from the MEM map to the MDIO mem map */
9341 +
9342 +/* 10-gigabit Ethernet MAC Controller ID (10GEC_ID) */
9343 +#define TGEC_ID_ID                  0xffff0000
9344 +#define TGEC_ID_MAC_VERSION         0x0000FF00
9345 +#define TGEC_ID_MAC_REV             0x000000ff
9346 +
9347 +
9348 +typedef struct {
9349 +    t_FmMacControllerDriver     fmMacControllerDriver;              /**< Upper Mac control block */
9350 +    t_Handle                    h_App;                              /**< Handle to the upper layer application  */
9351 +    struct tgec_regs            *p_MemMap;                          /**< pointer to 10G memory mapped registers. */
9352 +    t_TgecMiiAccessMemMap       *p_MiiMemMap;                       /**< pointer to MII memory mapped registers.          */
9353 +    uint64_t                    addr;                               /**< MAC address of device; */
9354 +    e_EnetMode                  enetMode;                           /**< Ethernet physical interface  */
9355 +    t_FmMacExceptionCallback    *f_Exception;
9356 +    int                         mdioIrq;
9357 +    t_FmMacExceptionCallback    *f_Event;
9358 +    bool                        indAddrRegUsed[TGEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
9359 +    uint64_t                    paddr[TGEC_NUM_OF_PADDRS];          /**< MAC address for particular individual address recognition register */
9360 +    uint8_t                     numOfIndAddrInRegs;                 /**< Number of individual addresses in registers for this station. */
9361 +    t_EthHash                   *p_MulticastAddrHash;               /**< pointer to driver's global address hash table  */
9362 +    t_EthHash                   *p_UnicastAddrHash;                 /**< pointer to driver's individual address hash table  */
9363 +    bool                        debugMode;
9364 +    uint8_t                     macId;
9365 +    uint32_t                    exceptions;
9366 +    struct tgec_cfg             *p_TgecDriverParam;
9367 +} t_Tgec;
9368 +
9369 +
9370 +t_Error TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data);
9371 +t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
9372 +
9373 +
9374 +#endif /* __TGEC_H */
9375 --- /dev/null
9376 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c
9377 @@ -0,0 +1,139 @@
9378 +/*
9379 + * Copyright 2008-2012 Freescale Semiconductor Inc.
9380 + *
9381 + * Redistribution and use in source and binary forms, with or without
9382 + * modification, are permitted provided that the following conditions are met:
9383 + *     * Redistributions of source code must retain the above copyright
9384 + *       notice, this list of conditions and the following disclaimer.
9385 + *     * Redistributions in binary form must reproduce the above copyright
9386 + *       notice, this list of conditions and the following disclaimer in the
9387 + *       documentation and/or other materials provided with the distribution.
9388 + *     * Neither the name of Freescale Semiconductor nor the
9389 + *       names of its contributors may be used to endorse or promote products
9390 + *       derived from this software without specific prior written permission.
9391 + *
9392 + *
9393 + * ALTERNATIVELY, this software may be distributed under the terms of the
9394 + * GNU General Public License ("GPL") as published by the Free Software
9395 + * Foundation, either version 2 of that License or (at your option) any
9396 + * later version.
9397 + *
9398 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9399 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9400 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9401 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9402 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9403 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9404 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9405 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9406 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9407 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9408 + */
9409 +
9410 +
9411 +
9412 +#include "error_ext.h"
9413 +#include "std_ext.h"
9414 +#include "fm_mac.h"
9415 +#include "tgec.h"
9416 +#include "xx_ext.h"
9417 +
9418 +#include "fm_common.h"
9419 +
9420 +
9421 +/*****************************************************************************/
9422 +t_Error TGEC_MII_WritePhyReg(t_Handle   h_Tgec,
9423 +                             uint8_t    phyAddr,
9424 +                             uint8_t    reg,
9425 +                             uint16_t   data)
9426 +{
9427 +    t_Tgec                  *p_Tgec = (t_Tgec *)h_Tgec;
9428 +    t_TgecMiiAccessMemMap   *p_MiiAccess;
9429 +    uint32_t                cfgStatusReg;
9430 +
9431 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
9432 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_MiiMemMap, E_INVALID_HANDLE);
9433 +
9434 +    p_MiiAccess = p_Tgec->p_MiiMemMap;
9435 +
9436 +    /* Configure MII */
9437 +    cfgStatusReg  = GET_UINT32(p_MiiAccess->mdio_cfg_status);
9438 +    cfgStatusReg &= ~MIIMCOM_DIV_MASK;
9439 +     /* (one half of fm clock => 2.5Mhz) */
9440 +    cfgStatusReg |=((((p_Tgec->fmMacControllerDriver.clkFreq*10)/2)/25) << MIIMCOM_DIV_SHIFT);
9441 +    WRITE_UINT32(p_MiiAccess->mdio_cfg_status, cfgStatusReg);
9442 +
9443 +    while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
9444 +        XX_UDelay (1);
9445 +
9446 +    WRITE_UINT32(p_MiiAccess->mdio_command, phyAddr);
9447 +
9448 +    WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg);
9449 +
9450 +    CORE_MemoryBarrier();
9451 +
9452 +    while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
9453 +        XX_UDelay (1);
9454 +
9455 +    WRITE_UINT32(p_MiiAccess->mdio_data, data);
9456 +
9457 +    CORE_MemoryBarrier();
9458 +
9459 +    while ((GET_UINT32(p_MiiAccess->mdio_data)) & MIIDATA_BUSY)
9460 +        XX_UDelay (1);
9461 +
9462 +    return E_OK;
9463 +}
9464 +
9465 +/*****************************************************************************/
9466 +t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec,
9467 +                            uint8_t  phyAddr,
9468 +                            uint8_t  reg,
9469 +                            uint16_t *p_Data)
9470 +{
9471 +    t_Tgec                  *p_Tgec = (t_Tgec *)h_Tgec;
9472 +    t_TgecMiiAccessMemMap   *p_MiiAccess;
9473 +    uint32_t                cfgStatusReg;
9474 +
9475 +    SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
9476 +    SANITY_CHECK_RETURN_ERROR(p_Tgec->p_MiiMemMap, E_INVALID_HANDLE);
9477 +
9478 +    p_MiiAccess = p_Tgec->p_MiiMemMap;
9479 +
9480 +    /* Configure MII */
9481 +    cfgStatusReg  = GET_UINT32(p_MiiAccess->mdio_cfg_status);
9482 +    cfgStatusReg &= ~MIIMCOM_DIV_MASK;
9483 +     /* (one half of fm clock => 2.5Mhz) */
9484 +    cfgStatusReg |=((((p_Tgec->fmMacControllerDriver.clkFreq*10)/2)/25) << MIIMCOM_DIV_SHIFT);
9485 +    WRITE_UINT32(p_MiiAccess->mdio_cfg_status, cfgStatusReg);
9486 +
9487 +    while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
9488 +        XX_UDelay (1);
9489 +
9490 +    WRITE_UINT32(p_MiiAccess->mdio_command, phyAddr);
9491 +
9492 +    WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg);
9493 +
9494 +    CORE_MemoryBarrier();
9495 +
9496 +    while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
9497 +        XX_UDelay (1);
9498 +
9499 +    WRITE_UINT32(p_MiiAccess->mdio_command, (uint32_t)(phyAddr | MIIMCOM_READ_CYCLE));
9500 +
9501 +    CORE_MemoryBarrier();
9502 +
9503 +    while ((GET_UINT32(p_MiiAccess->mdio_data)) & MIIDATA_BUSY)
9504 +        XX_UDelay (1);
9505 +
9506 +    *p_Data =  (uint16_t)GET_UINT32(p_MiiAccess->mdio_data);
9507 +
9508 +    cfgStatusReg  = GET_UINT32(p_MiiAccess->mdio_cfg_status);
9509 +
9510 +    if (cfgStatusReg & MIIMIND_READ_ERROR)
9511 +        RETURN_ERROR(MINOR, E_INVALID_VALUE,
9512 +                     ("Read Error: phyAddr 0x%x, dev 0x%x, reg 0x%x, cfgStatusReg 0x%x",
9513 +                      ((phyAddr & 0xe0)>>5), (phyAddr & 0x1f), reg, cfgStatusReg));
9514 +
9515 +    return E_OK;
9516 +}
9517 --- /dev/null
9518 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h
9519 @@ -0,0 +1,80 @@
9520 +/*
9521 + * Copyright 2008-2012 Freescale Semiconductor Inc.
9522 + *
9523 + * Redistribution and use in source and binary forms, with or without
9524 + * modification, are permitted provided that the following conditions are met:
9525 + *     * Redistributions of source code must retain the above copyright
9526 + *       notice, this list of conditions and the following disclaimer.
9527 + *     * Redistributions in binary form must reproduce the above copyright
9528 + *       notice, this list of conditions and the following disclaimer in the
9529 + *       documentation and/or other materials provided with the distribution.
9530 + *     * Neither the name of Freescale Semiconductor nor the
9531 + *       names of its contributors may be used to endorse or promote products
9532 + *       derived from this software without specific prior written permission.
9533 + *
9534 + *
9535 + * ALTERNATIVELY, this software may be distributed under the terms of the
9536 + * GNU General Public License ("GPL") as published by the Free Software
9537 + * Foundation, either version 2 of that License or (at your option) any
9538 + * later version.
9539 + *
9540 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9541 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9542 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9543 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9544 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9545 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9546 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9547 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9548 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9549 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9550 + */
9551 +
9552 +
9553 +#ifndef __TGEC_MII_ACC_H
9554 +#define __TGEC_MII_ACC_H
9555 +
9556 +#include "std_ext.h"
9557 +
9558 +
9559 +/* MII  Management Command Register */
9560 +#define MIIMCOM_READ_POST_INCREMENT 0x00004000
9561 +#define MIIMCOM_READ_CYCLE          0x00008000
9562 +#define MIIMCOM_SCAN_CYCLE          0x00000800
9563 +#define MIIMCOM_PREAMBLE_DISABLE    0x00000400
9564 +
9565 +#define MIIMCOM_MDIO_HOLD_1_REG_CLK 0
9566 +#define MIIMCOM_MDIO_HOLD_2_REG_CLK 1
9567 +#define MIIMCOM_MDIO_HOLD_3_REG_CLK 2
9568 +#define MIIMCOM_MDIO_HOLD_4_REG_CLK 3
9569 +
9570 +#define MIIMCOM_DIV_MASK            0x0000ff00
9571 +#define MIIMCOM_DIV_SHIFT           8
9572 +
9573 +/* MII Management Indicator Register */
9574 +#define MIIMIND_BUSY                0x00000001
9575 +#define MIIMIND_READ_ERROR          0x00000002
9576 +
9577 +#define MIIDATA_BUSY                0x80000000
9578 +
9579 +#if defined(__MWERKS__) && !defined(__GNUC__)
9580 +#pragma pack(push,1)
9581 +#endif /* defined(__MWERKS__) && ... */
9582 +
9583 +/*----------------------------------------------------*/
9584 +/* MII Configuration Control Memory Map Registers     */
9585 +/*----------------------------------------------------*/
9586 +typedef _Packed struct t_TgecMiiAccessMemMap
9587 +{
9588 +    volatile uint32_t   mdio_cfg_status;    /* 0x030  */
9589 +    volatile uint32_t   mdio_command;       /* 0x034  */
9590 +    volatile uint32_t   mdio_data;          /* 0x038  */
9591 +    volatile uint32_t   mdio_regaddr;       /* 0x03c  */
9592 +} _PackedType t_TgecMiiAccessMemMap ;
9593 +
9594 +#if defined(__MWERKS__) && !defined(__GNUC__)
9595 +#pragma pack(pop)
9596 +#endif /* defined(__MWERKS__) && ... */
9597 +
9598 +
9599 +#endif /* __TGEC_MII_ACC_H */
9600 --- /dev/null
9601 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/Makefile
9602 @@ -0,0 +1,15 @@
9603 +#
9604 +# Makefile for the Freescale Ethernet controllers
9605 +#
9606 +ccflags-y           += -DVERSION=\"\"
9607 +#
9608 +#Include netcomm SW specific definitions
9609 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
9610 +
9611 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
9612 +
9613 +ccflags-y += -I$(NCSW_FM_INC)
9614 +
9615 +obj-y          += fsl-ncsw-macsec.o
9616 +
9617 +fsl-ncsw-macsec-objs   := fm_macsec.o fm_macsec_guest.o fm_macsec_master.o fm_macsec_secy.o
9618 --- /dev/null
9619 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.c
9620 @@ -0,0 +1,237 @@
9621 +/*
9622 + * Copyright 2008-2015 Freescale Semiconductor Inc.
9623 + *
9624 + * Redistribution and use in source and binary forms, with or without
9625 + * modification, are permitted provided that the following conditions are met:
9626 + *     * Redistributions of source code must retain the above copyright
9627 + *       notice, this list of conditions and the following disclaimer.
9628 + *     * Redistributions in binary form must reproduce the above copyright
9629 + *       notice, this list of conditions and the following disclaimer in the
9630 + *       documentation and/or other materials provided with the distribution.
9631 + *     * Neither the name of Freescale Semiconductor nor the
9632 + *       names of its contributors may be used to endorse or promote products
9633 + *       derived from this software without specific prior written permission.
9634 + *
9635 + *
9636 + * ALTERNATIVELY, this software may be distributed under the terms of the
9637 + * GNU General Public License ("GPL") as published by the Free Software
9638 + * Foundation, either version 2 of that License or (at your option) any
9639 + * later version.
9640 + *
9641 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9642 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9643 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9644 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9645 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9646 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9647 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9648 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9649 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9650 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9651 + */
9652 +/******************************************************************************
9653 +
9654 + @File          fm_macsec.c
9655 +
9656 + @Description   FM MACSEC driver routines implementation.
9657 +*//***************************************************************************/
9658 +
9659 +#include "std_ext.h"
9660 +#include "error_ext.h"
9661 +#include "xx_ext.h"
9662 +#include "string_ext.h"
9663 +#include "sprint_ext.h"
9664 +#include "debug_ext.h"
9665 +
9666 +#include "fm_macsec.h"
9667 +
9668 +
9669 +/****************************************/
9670 +/*       API Init unit functions        */
9671 +/****************************************/
9672 +t_Handle FM_MACSEC_Config(t_FmMacsecParams *p_FmMacsecParam)
9673 +{
9674 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver;
9675 +
9676 +    SANITY_CHECK_RETURN_VALUE(p_FmMacsecParam, E_INVALID_HANDLE, NULL);
9677 +
9678 +    if (p_FmMacsecParam->guestMode)
9679 +        p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)FM_MACSEC_GUEST_Config(p_FmMacsecParam);
9680 +    else
9681 +        p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)FM_MACSEC_MASTER_Config(p_FmMacsecParam);
9682 +
9683 +    if (!p_FmMacsecControllerDriver)
9684 +        return NULL;
9685 +
9686 +    return (t_Handle)p_FmMacsecControllerDriver;
9687 +}
9688 +
9689 +t_Error FM_MACSEC_Init(t_Handle h_FmMacsec)
9690 +{
9691 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9692 +
9693 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9694 +
9695 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_Init)
9696 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_Init(h_FmMacsec);
9697 +
9698 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9699 +}
9700 +
9701 +t_Error FM_MACSEC_Free(t_Handle h_FmMacsec)
9702 +{
9703 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9704 +
9705 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9706 +
9707 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_Free)
9708 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_Free(h_FmMacsec);
9709 +
9710 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9711 +}
9712 +
9713 +t_Error FM_MACSEC_ConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode)
9714 +{
9715 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9716 +
9717 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9718 +
9719 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUnknownSciFrameTreatment)
9720 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUnknownSciFrameTreatment(h_FmMacsec, treatMode);
9721 +
9722 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9723 +}
9724 +
9725 +t_Error FM_MACSEC_ConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
9726 +{
9727 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9728 +
9729 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9730 +
9731 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigInvalidTagsFrameTreatment)
9732 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigInvalidTagsFrameTreatment(h_FmMacsec, deliverUncontrolled);
9733 +
9734 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9735 +}
9736 +
9737 +t_Error FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled)
9738 +{
9739 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9740 +
9741 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9742 +
9743 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment)
9744 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(h_FmMacsec, discardUncontrolled);
9745 +
9746 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9747 +}
9748 +
9749 +t_Error FM_MACSEC_ConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode)
9750 +{
9751 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9752 +
9753 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9754 +
9755 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUntagFrameTreatment)
9756 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUntagFrameTreatment(h_FmMacsec, treatMode);
9757 +
9758 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9759 +}
9760 +
9761 +t_Error FM_MACSEC_ConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr)
9762 +{
9763 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9764 +
9765 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9766 +
9767 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigPnExhaustionThreshold)
9768 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigPnExhaustionThreshold(h_FmMacsec, pnExhThr);
9769 +
9770 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9771 +}
9772 +
9773 +t_Error FM_MACSEC_ConfigKeysUnreadable(t_Handle h_FmMacsec)
9774 +{
9775 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9776 +
9777 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9778 +
9779 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigKeysUnreadable)
9780 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigKeysUnreadable(h_FmMacsec);
9781 +
9782 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9783 +}
9784 +
9785 +t_Error FM_MACSEC_ConfigSectagWithoutSCI(t_Handle h_FmMacsec)
9786 +{
9787 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9788 +
9789 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9790 +
9791 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigSectagWithoutSCI)
9792 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigSectagWithoutSCI(h_FmMacsec);
9793 +
9794 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9795 +}
9796 +
9797 +t_Error FM_MACSEC_ConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
9798 +{
9799 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9800 +
9801 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9802 +
9803 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigException)
9804 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigException(h_FmMacsec, exception, enable);
9805 +
9806 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9807 +}
9808 +
9809 +t_Error FM_MACSEC_GetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision)
9810 +{
9811 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9812 +
9813 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9814 +
9815 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_GetRevision)
9816 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_GetRevision(h_FmMacsec, p_MacsecRevision);
9817 +
9818 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9819 +}
9820 +
9821 +
9822 +t_Error FM_MACSEC_Enable(t_Handle h_FmMacsec)
9823 +{
9824 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9825 +
9826 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9827 +
9828 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_Enable)
9829 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_Enable(h_FmMacsec);
9830 +
9831 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9832 +}
9833 +
9834 +t_Error FM_MACSEC_Disable(t_Handle h_FmMacsec)
9835 +{
9836 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9837 +
9838 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9839 +
9840 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_Disable)
9841 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_Disable(h_FmMacsec);
9842 +
9843 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9844 +}
9845 +
9846 +t_Error FM_MACSEC_SetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
9847 +{
9848 +    t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
9849 +
9850 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
9851 +
9852 +    if (p_FmMacsecControllerDriver->f_FM_MACSEC_SetException)
9853 +        return p_FmMacsecControllerDriver->f_FM_MACSEC_SetException(h_FmMacsec, exception, enable);
9854 +
9855 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
9856 +}
9857 +
9858 --- /dev/null
9859 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.h
9860 @@ -0,0 +1,203 @@
9861 +/*
9862 + * Copyright 2008-2015 Freescale Semiconductor Inc.
9863 + *
9864 + * Redistribution and use in source and binary forms, with or without
9865 + * modification, are permitted provided that the following conditions are met:
9866 + *     * Redistributions of source code must retain the above copyright
9867 + *       notice, this list of conditions and the following disclaimer.
9868 + *     * Redistributions in binary form must reproduce the above copyright
9869 + *       notice, this list of conditions and the following disclaimer in the
9870 + *       documentation and/or other materials provided with the distribution.
9871 + *     * Neither the name of Freescale Semiconductor nor the
9872 + *       names of its contributors may be used to endorse or promote products
9873 + *       derived from this software without specific prior written permission.
9874 + *
9875 + *
9876 + * ALTERNATIVELY, this software may be distributed under the terms of the
9877 + * GNU General Public License ("GPL") as published by the Free Software
9878 + * Foundation, either version 2 of that License or (at your option) any
9879 + * later version.
9880 + *
9881 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9882 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9883 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9884 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9885 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9886 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9887 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9888 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9889 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9890 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9891 + */
9892 +
9893 +/******************************************************************************
9894 + @File          fm_macsec.h
9895 +
9896 + @Description   FM MACSEC internal structures and definitions.
9897 +*//***************************************************************************/
9898 +#ifndef __FM_MACSEC_H
9899 +#define __FM_MACSEC_H
9900 +
9901 +#include "error_ext.h"
9902 +#include "std_ext.h"
9903 +#include "fm_macsec_ext.h"
9904 +
9905 +#include "fm_common.h"
9906 +
9907 +
9908 +#define __ERR_MODULE__  MODULE_FM_MACSEC
9909 +
9910 +
9911 +typedef struct
9912 +{
9913 +    t_Error (*f_FM_MACSEC_Init) (t_Handle h_FmMacsec);
9914 +    t_Error (*f_FM_MACSEC_Free) (t_Handle h_FmMacsec);
9915 +
9916 +    t_Error (*f_FM_MACSEC_ConfigUnknownSciFrameTreatment) (t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode);
9917 +    t_Error (*f_FM_MACSEC_ConfigInvalidTagsFrameTreatment) (t_Handle h_FmMacsec, bool deliverUncontrolled);
9918 +    t_Error (*f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment) (t_Handle h_FmMacsec, bool discardUncontrolled);
9919 +    t_Error (*f_FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment) (t_Handle h_FmMacsec, bool deliverUncontrolled);
9920 +    t_Error (*f_FM_MACSEC_ConfigUntagFrameTreatment) (t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode);
9921 +    t_Error (*f_FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment) (t_Handle h_FmMacsec, bool deliverUncontrolled);
9922 +    t_Error (*f_FM_MACSEC_ConfigPnExhaustionThreshold) (t_Handle h_FmMacsec, uint32_t pnExhThr);
9923 +    t_Error (*f_FM_MACSEC_ConfigKeysUnreadable) (t_Handle h_FmMacsec);
9924 +    t_Error (*f_FM_MACSEC_ConfigSectagWithoutSCI) (t_Handle h_FmMacsec);
9925 +    t_Error (*f_FM_MACSEC_ConfigException) (t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
9926 +
9927 +    t_Error (*f_FM_MACSEC_GetRevision) (t_Handle h_FmMacsec, uint32_t *p_MacsecRevision);
9928 +    t_Error (*f_FM_MACSEC_Enable) (t_Handle h_FmMacsec);
9929 +    t_Error (*f_FM_MACSEC_Disable) (t_Handle h_FmMacsec);
9930 +    t_Error (*f_FM_MACSEC_SetException) (t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
9931 +
9932 +} t_FmMacsecControllerDriver;
9933 +
9934 +t_Handle  FM_MACSEC_GUEST_Config(t_FmMacsecParams *p_FmMacsecParam);
9935 +t_Handle  FM_MACSEC_MASTER_Config(t_FmMacsecParams *p_FmMacsecParams);
9936 +
9937 +/***********************************************************************/
9938 +/*  MACSEC internal routines                                              */
9939 +/***********************************************************************/
9940 +
9941 +/**************************************************************************//**
9942 +
9943 + @Group         FM_MACSEC_InterModule_grp FM MACSEC Inter-Module Unit
9944 +
9945 + @Description   FM MACSEC Inter Module functions -
9946 +                These are not User API routines but routines that may be called
9947 +                from other modules. This will be the case in a single core environment,
9948 +                where instead of using the XX messaging mechanism, the routines may be
9949 +                called from other modules. In a multicore environment, the other modules may
9950 +                be run by other cores and therefore these routines may not be called directly.
9951 +
9952 + @{
9953 +*//***************************************************************************/
9954 +
9955 +#define MAX_NUM_OF_SA_PER_SC        4
9956 +
9957 +typedef enum
9958 +{
9959 +    e_SC_RX = 0,
9960 +    e_SC_TX
9961 +} e_ScType;
9962 +
9963 +typedef enum
9964 +{
9965 +    e_SC_SA_A = 0,
9966 +    e_SC_SA_B ,
9967 +    e_SC_SA_C ,
9968 +    e_SC_SA_D
9969 +} e_ScSaId;
9970 +
9971 +typedef struct
9972 +{
9973 +    uint32_t                        scId;
9974 +    macsecSCI_t                     sci;
9975 +    bool                            replayProtect;
9976 +    uint32_t                        replayWindow;
9977 +    e_FmMacsecValidFrameBehavior    validateFrames;
9978 +    uint16_t                        confidentialityOffset;
9979 +    e_FmMacsecSecYCipherSuite       cipherSuite;
9980 +} t_RxScParams;
9981 +
9982 +typedef struct
9983 +{
9984 +    uint32_t                        scId;
9985 +    macsecSCI_t                     sci;
9986 +    bool                            protectFrames;
9987 +    e_FmMacsecSciInsertionMode      sciInsertionMode;
9988 +    bool                            confidentialityEnable;
9989 +    uint16_t                        confidentialityOffset;
9990 +    e_FmMacsecSecYCipherSuite       cipherSuite;
9991 +} t_TxScParams;
9992 +
9993 +typedef enum e_FmMacsecGlobalExceptions {
9994 +    e_FM_MACSEC_EX_TX_SC,               /**< Tx Sc 0 frame discarded error. */
9995 +    e_FM_MACSEC_EX_ECC                  /**< MACSEC memory ECC multiple-bit error. */
9996 +} e_FmMacsecGlobalExceptions;
9997 +
9998 +typedef enum e_FmMacsecGlobalEvents {
9999 +    e_FM_MACSEC_EV_TX_SC_NEXT_PN        /**< Tx Sc 0 Next Pn exhaustion threshold reached. */
10000 +} e_FmMacsecGlobalEvents;
10001 +
10002 +/**************************************************************************//**
10003 + @Description   Enum for inter-module interrupts registration
10004 +*//***************************************************************************/
10005 +typedef enum e_FmMacsecEventModules{
10006 +    e_FM_MACSEC_MOD_SC_TX,
10007 +    e_FM_MACSEC_MOD_DUMMY_LAST
10008 +} e_FmMacsecEventModules;
10009 +
10010 +typedef enum e_FmMacsecInterModuleEvent {
10011 +    e_FM_MACSEC_EV_SC_TX,
10012 +    e_FM_MACSEC_EV_ERR_SC_TX,
10013 +    e_FM_MACSEC_EV_DUMMY_LAST
10014 +} e_FmMacsecInterModuleEvent;
10015 +
10016 +#define NUM_OF_INTER_MODULE_EVENTS (NUM_OF_TX_SC * 2)
10017 +
10018 +#define GET_MACSEC_MODULE_EVENT(mod, id, intrType, event) \
10019 +    switch(mod){                                          \
10020 +        case e_FM_MACSEC_MOD_SC_TX:                       \
10021 +             event = (intrType == e_FM_INTR_TYPE_ERR) ?   \
10022 +                        e_FM_MACSEC_EV_ERR_SC_TX:         \
10023 +                        e_FM_MACSEC_EV_SC_TX;             \
10024 +             event += (uint8_t)(2 * id);break;            \
10025 +            break;                                        \
10026 +        default:event = e_FM_MACSEC_EV_DUMMY_LAST;        \
10027 +        break;}
10028 +
10029 +void FmMacsecRegisterIntr(t_Handle                h_FmMacsec,
10030 +                          e_FmMacsecEventModules  module,
10031 +                          uint8_t                 modId,
10032 +                          e_FmIntrType            intrType,
10033 +                          void (*f_Isr) (t_Handle h_Arg, uint32_t id),
10034 +                          t_Handle                h_Arg);
10035 +
10036 +void FmMacsecUnregisterIntr(t_Handle                h_FmMacsec,
10037 +                            e_FmMacsecEventModules  module,
10038 +                            uint8_t                 modId,
10039 +                            e_FmIntrType            intrType);
10040 +
10041 +t_Error FmMacsecAllocScs(t_Handle h_FmMacsec, e_ScType type, bool isPtp, uint32_t numOfScs, uint32_t *p_ScIds);
10042 +t_Error FmMacsecFreeScs(t_Handle h_FmMacsec, e_ScType type, uint32_t numOfScs, uint32_t *p_ScIds);
10043 +t_Error FmMacsecCreateRxSc(t_Handle h_FmMacsec, t_RxScParams *p_RxScParams);
10044 +t_Error FmMacsecDeleteRxSc(t_Handle h_FmMacsec, uint32_t scId);
10045 +t_Error FmMacsecCreateTxSc(t_Handle h_FmMacsec, t_TxScParams *p_RxScParams);
10046 +t_Error FmMacsecDeleteTxSc(t_Handle h_FmMacsec, uint32_t scId);
10047 +t_Error FmMacsecCreateRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key);
10048 +t_Error FmMacsecCreateTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecSAKey_t key);
10049 +t_Error FmMacsecDeleteRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId);
10050 +t_Error FmMacsecDeleteTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId);
10051 +t_Error FmMacsecRxSaSetReceive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, bool enableReceive);
10052 +t_Error FmMacsecRxSaUpdateNextPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtNextPN);
10053 +t_Error FmMacsecRxSaUpdateLowestPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtLowestPN);
10054 +t_Error FmMacsecTxSaSetActive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an);
10055 +t_Error FmMacsecTxSaGetActive(t_Handle h_FmMacsec, uint32_t scId, macsecAN_t *p_An);
10056 +t_Error FmMacsecSetPTP(t_Handle h_FmMacsec, bool enable);
10057 +
10058 +t_Error FmMacsecSetException(t_Handle h_FmMacsec, e_FmMacsecGlobalExceptions exception, uint32_t scId, bool enable);
10059 +t_Error FmMacsecSetEvent(t_Handle h_FmMacsec, e_FmMacsecGlobalEvents event, uint32_t scId, bool enable);
10060 +
10061 +
10062 +
10063 +#endif /* __FM_MACSEC_H */
10064 --- /dev/null
10065 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_guest.c
10066 @@ -0,0 +1,59 @@
10067 +/*
10068 + * Copyright 2008-2015 Freescale Semiconductor Inc.
10069 + *
10070 + * Redistribution and use in source and binary forms, with or without
10071 + * modification, are permitted provided that the following conditions are met:
10072 + *     * Redistributions of source code must retain the above copyright
10073 + *       notice, this list of conditions and the following disclaimer.
10074 + *     * Redistributions in binary form must reproduce the above copyright
10075 + *       notice, this list of conditions and the following disclaimer in the
10076 + *       documentation and/or other materials provided with the distribution.
10077 + *     * Neither the name of Freescale Semiconductor nor the
10078 + *       names of its contributors may be used to endorse or promote products
10079 + *       derived from this software without specific prior written permission.
10080 + *
10081 + *
10082 + * ALTERNATIVELY, this software may be distributed under the terms of the
10083 + * GNU General Public License ("GPL") as published by the Free Software
10084 + * Foundation, either version 2 of that License or (at your option) any
10085 + * later version.
10086 + *
10087 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
10088 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
10089 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
10090 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
10091 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10092 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
10093 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
10094 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10095 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
10096 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10097 + */
10098 +
10099 +/******************************************************************************
10100 + @File          fm_macsec.c
10101 +
10102 + @Description   FM MACSEC driver routines implementation.
10103 +*//***************************************************************************/
10104 +
10105 +#include "std_ext.h"
10106 +#include "error_ext.h"
10107 +#include "xx_ext.h"
10108 +#include "string_ext.h"
10109 +#include "sprint_ext.h"
10110 +#include "debug_ext.h"
10111 +#include "fm_macsec.h"
10112 +
10113 +
10114 +/****************************************/
10115 +/*       static functions               */
10116 +/****************************************/
10117 +
10118 +/****************************************/
10119 +/*       API Init unit functions        */
10120 +/****************************************/
10121 +t_Handle FM_MACSEC_GUEST_Config(t_FmMacsecParams *p_FmMacsecParam)
10122 +{
10123 +    UNUSED(p_FmMacsecParam);
10124 +    return NULL;
10125 +}
10126 --- /dev/null
10127 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.c
10128 @@ -0,0 +1,1031 @@
10129 +/*
10130 + * Copyright 2008-2015 Freescale Semiconductor Inc.
10131 + *
10132 + * Redistribution and use in source and binary forms, with or without
10133 + * modification, are permitted provided that the following conditions are met:
10134 + *     * Redistributions of source code must retain the above copyright
10135 + *       notice, this list of conditions and the following disclaimer.
10136 + *     * Redistributions in binary form must reproduce the above copyright
10137 + *       notice, this list of conditions and the following disclaimer in the
10138 + *       documentation and/or other materials provided with the distribution.
10139 + *     * Neither the name of Freescale Semiconductor nor the
10140 + *       names of its contributors may be used to endorse or promote products
10141 + *       derived from this software without specific prior written permission.
10142 + *
10143 + *
10144 + * ALTERNATIVELY, this software may be distributed under the terms of the
10145 + * GNU General Public License ("GPL") as published by the Free Software
10146 + * Foundation, either version 2 of that License or (at your option) any
10147 + * later version.
10148 + *
10149 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
10150 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
10151 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
10152 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
10153 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10154 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
10155 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
10156 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10157 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
10158 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10159 + */
10160 +
10161 +/******************************************************************************
10162 + @File          fm_macsec.c
10163 +
10164 + @Description   FM MACSEC driver routines implementation.
10165 +*//***************************************************************************/
10166 +
10167 +#include "std_ext.h"
10168 +#include "error_ext.h"
10169 +#include "xx_ext.h"
10170 +#include "string_ext.h"
10171 +#include "sprint_ext.h"
10172 +#include "fm_mac_ext.h"
10173 +
10174 +#include "fm_macsec_master.h"
10175 +
10176 +
10177 +extern uint16_t    FM_MAC_GetMaxFrameLength(t_Handle FmMac);
10178 +
10179 +
10180 +/****************************************/
10181 +/*       static functions               */
10182 +/****************************************/
10183 +static t_Error CheckFmMacsecParameters(t_FmMacsec *p_FmMacsec)
10184 +{
10185 +    if (!p_FmMacsec->f_Exception)
10186 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
10187 +
10188 +    return E_OK;
10189 +}
10190 +
10191 +static void UnimplementedIsr(t_Handle h_Arg, uint32_t id)
10192 +{
10193 +    UNUSED(h_Arg); UNUSED(id);
10194 +
10195 +    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unimplemented Isr!"));
10196 +}
10197 +
10198 +static void MacsecEventIsr(t_Handle h_FmMacsec)
10199 +{
10200 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10201 +    uint32_t    events,event,i;
10202 +
10203 +    SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
10204 +
10205 +    events = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->evr);
10206 +    events |= GET_UINT32(p_FmMacsec->p_FmMacsecRegs->ever);
10207 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->evr,events);
10208 +
10209 +    for (i=0; i<NUM_OF_TX_SC; i++)
10210 +        if (events & FM_MACSEC_EV_TX_SC_NEXT_PN(i))
10211 +        {
10212 +            GET_MACSEC_MODULE_EVENT(e_FM_MACSEC_MOD_SC_TX, i, e_FM_INTR_TYPE_NORMAL, event);
10213 +            p_FmMacsec->intrMng[event].f_Isr(p_FmMacsec->intrMng[event].h_SrcHandle, i);
10214 +        }
10215 +}
10216 +
10217 +static void MacsecErrorIsr(t_Handle h_FmMacsec)
10218 +{
10219 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10220 +    uint32_t    errors,error,i;
10221 +
10222 +    SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
10223 +
10224 +    errors = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->err);
10225 +    errors |= GET_UINT32(p_FmMacsec->p_FmMacsecRegs->erer);
10226 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->err,errors);
10227 +
10228 +    for (i=0; i<NUM_OF_TX_SC; i++)
10229 +        if (errors & FM_MACSEC_EX_TX_SC(i))
10230 +        {
10231 +            GET_MACSEC_MODULE_EVENT(e_FM_MACSEC_MOD_SC_TX, i, e_FM_INTR_TYPE_ERR, error);
10232 +            p_FmMacsec->intrMng[error].f_Isr(p_FmMacsec->intrMng[error].h_SrcHandle, i);
10233 +        }
10234 +
10235 +    if (errors & FM_MACSEC_EX_ECC)
10236 +    {
10237 +        uint8_t     eccType;
10238 +        uint32_t    tmpReg;
10239 +
10240 +        tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->meec);
10241 +        ASSERT_COND(tmpReg & MECC_CAP);
10242 +        eccType = (uint8_t)((tmpReg & MECC_CET) >> MECC_CET_SHIFT);
10243 +
10244 +        if (!eccType && (p_FmMacsec->userExceptions & FM_MACSEC_USER_EX_SINGLE_BIT_ECC))
10245 +            p_FmMacsec->f_Exception(p_FmMacsec->h_App,e_FM_MACSEC_EX_SINGLE_BIT_ECC);
10246 +        else if (eccType && (p_FmMacsec->userExceptions & FM_MACSEC_USER_EX_MULTI_BIT_ECC))
10247 +            p_FmMacsec->f_Exception(p_FmMacsec->h_App,e_FM_MACSEC_EX_MULTI_BIT_ECC);
10248 +        else
10249 +            WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->meec,tmpReg);
10250 +    }
10251 +}
10252 +
10253 +static t_Error MacsecInit(t_Handle h_FmMacsec)
10254 +{
10255 +    t_FmMacsec                  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10256 +    t_FmMacsecDriverParam       *p_FmMacsecDriverParam = NULL;
10257 +    uint32_t                    tmpReg,i,macId;
10258 +
10259 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10260 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10261 +
10262 +    CHECK_INIT_PARAMETERS(p_FmMacsec, CheckFmMacsecParameters);
10263 +
10264 +    p_FmMacsecDriverParam = p_FmMacsec->p_FmMacsecDriverParam;
10265 +
10266 +    for (i=0;i<e_FM_MACSEC_EV_DUMMY_LAST;i++)
10267 +        p_FmMacsec->intrMng[i].f_Isr = UnimplementedIsr;
10268 +
10269 +    tmpReg = 0;
10270 +    tmpReg |= (p_FmMacsecDriverParam->changedTextWithNoEncryptDeliverUncontrolled << CFG_UECT_SHIFT)|
10271 +              (p_FmMacsecDriverParam->onlyScbIsSetDeliverUncontrolled << CFG_ESCBT_SHIFT)           |
10272 +              (p_FmMacsecDriverParam->unknownSciTreatMode << CFG_USFT_SHIFT)                        |
10273 +              (p_FmMacsecDriverParam->invalidTagsDeliverUncontrolled << CFG_ITT_SHIFT)              |
10274 +              (p_FmMacsecDriverParam->encryptWithNoChangedTextDiscardUncontrolled << CFG_KFT_SHIFT) |
10275 +              (p_FmMacsecDriverParam->untagTreatMode << CFG_UFT_SHIFT)                              |
10276 +              (p_FmMacsecDriverParam->keysUnreadable << CFG_KSS_SHIFT)                              |
10277 +              (p_FmMacsecDriverParam->reservedSc0 << CFG_S0I_SHIFT)                                 |
10278 +              (p_FmMacsecDriverParam->byPassMode << CFG_BYPN_SHIFT);
10279 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg, tmpReg);
10280 +
10281 +    tmpReg = FM_MAC_GetMaxFrameLength(p_FmMacsec->h_FmMac);
10282 +    /* At least Ethernet FCS (4 bytes) overhead must be subtracted from MFL.
10283 +     * In addition, the SCI (8 bytes) overhead might be subtracted as well. */
10284 +    tmpReg -= p_FmMacsecDriverParam->mflSubtract;
10285 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->mfl, tmpReg);
10286 +
10287 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->tpnet, p_FmMacsecDriverParam->pnExhThr);
10288 +
10289 +    if (!p_FmMacsec->userExceptions)
10290 +        p_FmMacsec->exceptions &= ~FM_MACSEC_EX_ECC;
10291 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->erer, p_FmMacsec->exceptions);
10292 +
10293 +    p_FmMacsec->numRxScAvailable = NUM_OF_RX_SC;
10294 +    if (p_FmMacsecDriverParam->reservedSc0)
10295 +        p_FmMacsec->numRxScAvailable --;
10296 +    p_FmMacsec->numTxScAvailable = NUM_OF_TX_SC;
10297 +
10298 +    XX_Free(p_FmMacsecDriverParam);
10299 +    p_FmMacsec->p_FmMacsecDriverParam = NULL;
10300 +
10301 +    FM_MAC_GetId(p_FmMacsec->h_FmMac, &macId);
10302 +    FmRegisterIntr(p_FmMacsec->h_Fm,
10303 +                   e_FM_MOD_MACSEC,
10304 +                   (uint8_t)macId,
10305 +                   e_FM_INTR_TYPE_NORMAL,
10306 +                   MacsecEventIsr,
10307 +                   p_FmMacsec);
10308 +
10309 +    FmRegisterIntr(p_FmMacsec->h_Fm,
10310 +                   e_FM_MOD_MACSEC,
10311 +                   0,
10312 +                   e_FM_INTR_TYPE_ERR,
10313 +                   MacsecErrorIsr,
10314 +                   p_FmMacsec);
10315 +
10316 +    return E_OK;
10317 +}
10318 +
10319 +static t_Error MacsecFree(t_Handle h_FmMacsec)
10320 +{
10321 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10322 +    uint32_t    macId;
10323 +
10324 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10325 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10326 +
10327 +    FM_MAC_GetId(p_FmMacsec->h_FmMac, &macId);
10328 +    FmUnregisterIntr(p_FmMacsec->h_Fm,
10329 +                   e_FM_MOD_MACSEC,
10330 +                   (uint8_t)macId,
10331 +                   e_FM_INTR_TYPE_NORMAL);
10332 +
10333 +    FmUnregisterIntr(p_FmMacsec->h_Fm,
10334 +                   e_FM_MOD_MACSEC,
10335 +                   0,
10336 +                   e_FM_INTR_TYPE_ERR);
10337 +
10338 +    if (p_FmMacsec->rxScSpinLock)
10339 +        XX_FreeSpinlock(p_FmMacsec->rxScSpinLock);
10340 +    if (p_FmMacsec->txScSpinLock)
10341 +        XX_FreeSpinlock(p_FmMacsec->txScSpinLock);
10342 +
10343 +    XX_Free(p_FmMacsec);
10344 +
10345 +    return E_OK;
10346 +}
10347 +
10348 +static t_Error MacsecConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode)
10349 +{
10350 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10351 +
10352 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10353 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10354 +
10355 +    p_FmMacsec->p_FmMacsecDriverParam->unknownSciTreatMode = treatMode;
10356 +
10357 +    return E_OK;
10358 +}
10359 +
10360 +static t_Error MacsecConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
10361 +{
10362 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10363 +
10364 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10365 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10366 +
10367 +    p_FmMacsec->p_FmMacsecDriverParam->invalidTagsDeliverUncontrolled = deliverUncontrolled;
10368 +
10369 +    return E_OK;
10370 +}
10371 +
10372 +static t_Error MacsecConfigChangedTextWithNoEncryptFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
10373 +{
10374 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10375 +
10376 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10377 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10378 +
10379 +    p_FmMacsec->p_FmMacsecDriverParam->changedTextWithNoEncryptDeliverUncontrolled = deliverUncontrolled;
10380 +
10381 +    return E_OK;
10382 +}
10383 +
10384 +static t_Error MacsecConfigOnlyScbIsSetFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
10385 +{
10386 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10387 +
10388 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10389 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10390 +
10391 +    p_FmMacsec->p_FmMacsecDriverParam->onlyScbIsSetDeliverUncontrolled = deliverUncontrolled;
10392 +
10393 +    return E_OK;
10394 +}
10395 +
10396 +static t_Error MacsecConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled)
10397 +{
10398 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10399 +
10400 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10401 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10402 +
10403 +    p_FmMacsec->p_FmMacsecDriverParam->encryptWithNoChangedTextDiscardUncontrolled = discardUncontrolled;
10404 +
10405 +    return E_OK;
10406 +}
10407 +
10408 +static t_Error MacsecConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode)
10409 +{
10410 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10411 +
10412 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10413 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10414 +
10415 +    p_FmMacsec->p_FmMacsecDriverParam->untagTreatMode = treatMode;
10416 +
10417 +    return E_OK;
10418 +}
10419 +
10420 +static t_Error MacsecConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr)
10421 +{
10422 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10423 +
10424 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10425 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10426 +
10427 +    p_FmMacsec->p_FmMacsecDriverParam->pnExhThr = pnExhThr;
10428 +
10429 +    return E_OK;
10430 +}
10431 +
10432 +static t_Error MacsecConfigKeysUnreadable(t_Handle h_FmMacsec)
10433 +{
10434 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10435 +
10436 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10437 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10438 +
10439 +    p_FmMacsec->p_FmMacsecDriverParam->keysUnreadable = TRUE;
10440 +
10441 +    return E_OK;
10442 +}
10443 +
10444 +static t_Error MacsecConfigSectagWithoutSCI(t_Handle h_FmMacsec)
10445 +{
10446 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10447 +
10448 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10449 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10450 +
10451 +    p_FmMacsec->p_FmMacsecDriverParam->sectagOverhead -= MACSEC_SCI_SIZE;
10452 +    p_FmMacsec->p_FmMacsecDriverParam->mflSubtract += MACSEC_SCI_SIZE;
10453 +
10454 +    return E_OK;
10455 +}
10456 +
10457 +static t_Error MacsecConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
10458 +{
10459 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10460 +    uint32_t    bitMask = 0;
10461 +
10462 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10463 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10464 +
10465 +    GET_USER_EXCEPTION_FLAG(bitMask, exception);
10466 +    if (bitMask)
10467 +    {
10468 +        if (enable)
10469 +            p_FmMacsec->userExceptions |= bitMask;
10470 +        else
10471 +            p_FmMacsec->userExceptions &= ~bitMask;
10472 +    }
10473 +    else
10474 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
10475 +
10476 +    return E_OK;
10477 +}
10478 +
10479 +static t_Error MacsecGetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision)
10480 +{
10481 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10482 +
10483 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10484 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10485 +
10486 +    *p_MacsecRevision = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->ip_rev1);
10487 +
10488 +    return E_OK;
10489 +}
10490 +
10491 +static t_Error MacsecEnable(t_Handle h_FmMacsec)
10492 +{
10493 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10494 +    uint32_t    tmpReg;
10495 +
10496 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10497 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10498 +
10499 +    tmpReg  = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg);
10500 +    tmpReg |= CFG_BYPN;
10501 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg,tmpReg);
10502 +
10503 +    return E_OK;
10504 +}
10505 +
10506 +static t_Error MacsecDisable(t_Handle h_FmMacsec)
10507 +{
10508 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10509 +    uint32_t    tmpReg;
10510 +
10511 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10512 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10513 +
10514 +    tmpReg  = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg);
10515 +    tmpReg &= ~CFG_BYPN;
10516 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg,tmpReg);
10517 +
10518 +    return E_OK;
10519 +}
10520 +
10521 +static t_Error MacsecSetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
10522 +{
10523 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10524 +    uint32_t    bitMask;
10525 +
10526 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10527 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
10528 +
10529 +    GET_USER_EXCEPTION_FLAG(bitMask, exception);
10530 +    if (bitMask)
10531 +    {
10532 +        if (enable)
10533 +            p_FmMacsec->userExceptions |= bitMask;
10534 +        else
10535 +            p_FmMacsec->userExceptions &= ~bitMask;
10536 +    }
10537 +    else
10538 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
10539 +
10540 +    if (!p_FmMacsec->userExceptions)
10541 +        p_FmMacsec->exceptions &= ~FM_MACSEC_EX_ECC;
10542 +    else
10543 +        p_FmMacsec->exceptions |= FM_MACSEC_EX_ECC;
10544 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->erer, p_FmMacsec->exceptions);
10545 +
10546 +    return E_OK;
10547 +}
10548 +
10549 +static void InitFmMacsecControllerDriver(t_FmMacsecControllerDriver *p_FmMacsecControllerDriver)
10550 +{
10551 +    p_FmMacsecControllerDriver->f_FM_MACSEC_Init                                            = MacsecInit;
10552 +    p_FmMacsecControllerDriver->f_FM_MACSEC_Free                                            = MacsecFree;
10553 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUnknownSciFrameTreatment                  = MacsecConfigUnknownSciFrameTreatment;
10554 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigInvalidTagsFrameTreatment                 = MacsecConfigInvalidTagsFrameTreatment;
10555 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment    = MacsecConfigEncryptWithNoChangedTextFrameTreatment;
10556 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUntagFrameTreatment                       = MacsecConfigUntagFrameTreatment;
10557 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment    = MacsecConfigChangedTextWithNoEncryptFrameTreatment;
10558 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment                = MacsecConfigOnlyScbIsSetFrameTreatment;
10559 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigPnExhaustionThreshold                     = MacsecConfigPnExhaustionThreshold;
10560 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigKeysUnreadable                            = MacsecConfigKeysUnreadable;
10561 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigSectagWithoutSCI                          = MacsecConfigSectagWithoutSCI;
10562 +    p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigException                                 = MacsecConfigException;
10563 +    p_FmMacsecControllerDriver->f_FM_MACSEC_GetRevision                                     = MacsecGetRevision;
10564 +    p_FmMacsecControllerDriver->f_FM_MACSEC_Enable                                          = MacsecEnable;
10565 +    p_FmMacsecControllerDriver->f_FM_MACSEC_Disable                                         = MacsecDisable;
10566 +    p_FmMacsecControllerDriver->f_FM_MACSEC_SetException                                    = MacsecSetException;
10567 +}
10568 +
10569 +/****************************************/
10570 +/*       Inter-Module functions         */
10571 +/****************************************/
10572 +
10573 +void FmMacsecRegisterIntr(t_Handle                h_FmMacsec,
10574 +                          e_FmMacsecEventModules  module,
10575 +                          uint8_t                 modId,
10576 +                          e_FmIntrType            intrType,
10577 +                          void (*f_Isr) (t_Handle h_Arg, uint32_t id),
10578 +                          t_Handle                h_Arg)
10579 +{
10580 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10581 +    uint8_t     event= 0;
10582 +
10583 +    SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
10584 +
10585 +    GET_MACSEC_MODULE_EVENT(module, modId, intrType, event);
10586 +
10587 +    ASSERT_COND(event != e_FM_MACSEC_EV_DUMMY_LAST);
10588 +    p_FmMacsec->intrMng[event].f_Isr = f_Isr;
10589 +    p_FmMacsec->intrMng[event].h_SrcHandle = h_Arg;
10590 +}
10591 +
10592 +void FmMacsecUnregisterIntr(t_Handle                h_FmMacsec,
10593 +                            e_FmMacsecEventModules  module,
10594 +                            uint8_t                 modId,
10595 +                            e_FmIntrType            intrType)
10596 +{
10597 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10598 +    uint8_t     event= 0;
10599 +
10600 +    SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
10601 +
10602 +    GET_MACSEC_MODULE_EVENT(module, modId,intrType, event);
10603 +
10604 +    ASSERT_COND(event != e_FM_MACSEC_EV_DUMMY_LAST);
10605 +    p_FmMacsec->intrMng[event].f_Isr = NULL;
10606 +    p_FmMacsec->intrMng[event].h_SrcHandle = NULL;
10607 +}
10608 +
10609 +t_Error FmMacsecAllocScs(t_Handle h_FmMacsec, e_ScType type, bool isPtp, uint32_t numOfScs, uint32_t *p_ScIds)
10610 +{
10611 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10612 +    t_Error     err = E_OK;
10613 +    bool        *p_ScTable;
10614 +    uint32_t    *p_ScAvailable,i;
10615 +
10616 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10617 +    SANITY_CHECK_RETURN_ERROR(p_ScIds, E_INVALID_HANDLE);
10618 +    SANITY_CHECK_RETURN_ERROR(numOfScs, E_INVALID_HANDLE);
10619 +
10620 +    if (type == e_SC_RX)
10621 +    {
10622 +        p_ScTable       = (bool *)p_FmMacsec->rxScTable;
10623 +        p_ScAvailable   = &p_FmMacsec->numRxScAvailable;
10624 +        i               = (NUM_OF_RX_SC - 1);
10625 +    }
10626 +    else
10627 +    {
10628 +        p_ScTable       = (bool *)p_FmMacsec->txScTable;
10629 +        p_ScAvailable   = &p_FmMacsec->numTxScAvailable;
10630 +        i               = (NUM_OF_TX_SC - 1);
10631 +
10632 +    }
10633 +    if (*p_ScAvailable < numOfScs)
10634 +        RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Not enough SCs available"));
10635 +
10636 +    if (isPtp)
10637 +    {
10638 +        i = 0;
10639 +        if (p_ScTable[i])
10640 +            RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Sc 0 Not available"));
10641 +    }
10642 +
10643 +    for (;numOfScs;i--)
10644 +    {
10645 +        if (p_ScTable[i])
10646 +            continue;
10647 +        numOfScs --;
10648 +        (*p_ScAvailable)--;
10649 +        p_ScIds[numOfScs] = i;
10650 +        p_ScTable[i] = TRUE;
10651 +    }
10652 +
10653 +    return err;
10654 +}
10655 +
10656 +t_Error FmMacsecFreeScs(t_Handle h_FmMacsec, e_ScType type, uint32_t numOfScs, uint32_t *p_ScIds)
10657 +{
10658 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10659 +    t_Error     err = E_OK;
10660 +    bool        *p_ScTable;
10661 +    uint32_t    *p_ScAvailable,maxNumOfSc,i;
10662 +
10663 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10664 +    SANITY_CHECK_RETURN_ERROR(p_ScIds, E_INVALID_HANDLE);
10665 +    SANITY_CHECK_RETURN_ERROR(numOfScs, E_INVALID_HANDLE);
10666 +
10667 +    if (type == e_SC_RX)
10668 +    {
10669 +        p_ScTable       = (bool *)p_FmMacsec->rxScTable;
10670 +        p_ScAvailable   = &p_FmMacsec->numRxScAvailable;
10671 +        maxNumOfSc      = NUM_OF_RX_SC;
10672 +    }
10673 +    else
10674 +    {
10675 +        p_ScTable       = (bool *)p_FmMacsec->txScTable;
10676 +        p_ScAvailable   = &p_FmMacsec->numTxScAvailable;
10677 +        maxNumOfSc      = NUM_OF_TX_SC;
10678 +    }
10679 +
10680 +    if ((*p_ScAvailable + numOfScs) > maxNumOfSc)
10681 +        RETURN_ERROR(MINOR, E_FULL, ("Too much SCs"));
10682 +
10683 +    for (i=0;i<numOfScs;i++)
10684 +    {
10685 +        p_ScTable[p_ScIds[i]] = FALSE;
10686 +        (*p_ScAvailable)++;
10687 +    }
10688 +
10689 +    return err;
10690 +
10691 +}
10692 +
10693 +t_Error FmMacsecSetPTP(t_Handle h_FmMacsec, bool enable)
10694 +{
10695 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10696 +    uint32_t    tmpReg = 0;
10697 +
10698 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10699 +
10700 +    tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg);
10701 +    if (enable && (tmpReg & CFG_S0I))
10702 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("MACSEC already in point-to-point mode"));
10703 +
10704 +    if (enable)
10705 +        tmpReg |= CFG_S0I;
10706 +    else
10707 +        tmpReg &= ~CFG_S0I;
10708 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg, tmpReg);
10709 +
10710 +    return E_OK;
10711 +}
10712 +
10713 +t_Error FmMacsecCreateRxSc(t_Handle h_FmMacsec, t_RxScParams *p_RxScParams)
10714 +{
10715 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10716 +    t_Error     err = E_OK;
10717 +    uint32_t    tmpReg = 0, intFlags;
10718 +
10719 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10720 +    SANITY_CHECK_RETURN_ERROR(p_RxScParams, E_INVALID_HANDLE);
10721 +    SANITY_CHECK_RETURN_ERROR(p_RxScParams->scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10722 +
10723 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10724 +
10725 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, p_RxScParams->scId);
10726 +    tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsccfg);
10727 +    if (tmpReg & RX_SCCFG_SCI_EN_MASK)
10728 +    {
10729 +        XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10730 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("Rx Sc %d must be disable",p_RxScParams->scId));
10731 +    }
10732 +
10733 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsci1h, GET_SCI_FIRST_HALF(p_RxScParams->sci));
10734 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsci2h, GET_SCI_SECOND_HALF(p_RxScParams->sci));
10735 +    tmpReg |= ((p_RxScParams->replayProtect << RX_SCCFG_RP_SHIFT) & RX_SCCFG_RP_MASK);
10736 +    tmpReg |= ((p_RxScParams->validateFrames << RX_SCCFG_VF_SHIFT) & RX_SCCFG_VF_MASK);
10737 +    tmpReg |= ((p_RxScParams->confidentialityOffset << RX_SCCFG_CO_SHIFT) & RX_SCCFG_CO_MASK);
10738 +    tmpReg |= RX_SCCFG_SCI_EN_MASK;
10739 +    tmpReg |= (p_RxScParams->cipherSuite << RX_SCCFG_CS_SHIFT);
10740 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsccfg, tmpReg);
10741 +
10742 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rpw, p_RxScParams->replayWindow);
10743 +
10744 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10745 +
10746 +    return err;
10747 +}
10748 +
10749 +t_Error FmMacsecDeleteRxSc(t_Handle h_FmMacsec, uint32_t scId)
10750 +{
10751 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10752 +    t_Error     err = E_OK;
10753 +    uint32_t    tmpReg = 0, intFlags;
10754 +
10755 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10756 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10757 +
10758 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10759 +
10760 +    tmpReg &= ~RX_SCCFG_SCI_EN_MASK;
10761 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
10762 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsccfg, tmpReg);
10763 +
10764 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10765 +
10766 +    return err;
10767 +}
10768 +
10769 +t_Error FmMacsecCreateTxSc(t_Handle h_FmMacsec, t_TxScParams *p_TxScParams)
10770 +{
10771 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10772 +    t_Error     err = E_OK;
10773 +    uint32_t    tmpReg = 0, intFlags;
10774 +    bool        alwaysIncludeSCI = FALSE, useES = FALSE, useSCB = FALSE;
10775 +
10776 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10777 +    SANITY_CHECK_RETURN_ERROR(p_TxScParams, E_INVALID_HANDLE);
10778 +    SANITY_CHECK_RETURN_ERROR(p_TxScParams->scId < NUM_OF_TX_SC, E_INVALID_HANDLE);
10779 +
10780 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
10781 +
10782 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, p_TxScParams->scId);
10783 +
10784 +    tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg);
10785 +    if (tmpReg & TX_SCCFG_SCE_MASK)
10786 +    {
10787 +        XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
10788 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("Tx Sc %d must be disable",p_TxScParams->scId));
10789 +    }
10790 +
10791 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsci1h, GET_SCI_FIRST_HALF(p_TxScParams->sci));
10792 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsci2h, GET_SCI_SECOND_HALF(p_TxScParams->sci));
10793 +    alwaysIncludeSCI = (p_TxScParams->sciInsertionMode == e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG);
10794 +    useES            = (p_TxScParams->sciInsertionMode == e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA);
10795 +
10796 +    tmpReg |= ((p_TxScParams->protectFrames << TX_SCCFG_PF_SHIFT) & TX_SCCFG_PF_MASK);
10797 +    tmpReg |= ((alwaysIncludeSCI << TX_SCCFG_AIS_SHIFT) & TX_SCCFG_AIS_MASK);
10798 +    tmpReg |= ((useES << TX_SCCFG_UES_SHIFT) & TX_SCCFG_UES_MASK);
10799 +    tmpReg |= ((useSCB << TX_SCCFG_USCB_SHIFT) & TX_SCCFG_USCB_MASK);
10800 +    tmpReg |= ((p_TxScParams->confidentialityEnable << TX_SCCFG_CE_SHIFT) & TX_SCCFG_CE_MASK);
10801 +    tmpReg |= ((p_TxScParams->confidentialityOffset << TX_SCCFG_CO_SHIFT) & TX_SCCFG_CO_MASK);
10802 +    tmpReg |= TX_SCCFG_SCE_MASK;
10803 +    tmpReg |= (p_TxScParams->cipherSuite << TX_SCCFG_CS_SHIFT);
10804 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg, tmpReg);
10805 +
10806 +    XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
10807 +
10808 +    return err;
10809 +}
10810 +
10811 +t_Error FmMacsecDeleteTxSc(t_Handle h_FmMacsec, uint32_t scId)
10812 +{
10813 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10814 +    t_Error     err = E_OK;
10815 +    uint32_t    tmpReg = 0, intFlags;
10816 +
10817 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10818 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_TX_SC, E_INVALID_HANDLE);
10819 +
10820 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
10821 +
10822 +    tmpReg &= ~TX_SCCFG_SCE_MASK;
10823 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
10824 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg, tmpReg);
10825 +
10826 +    XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
10827 +
10828 +    return err;
10829 +}
10830 +
10831 +t_Error FmMacsecCreateRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key)
10832 +{
10833 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10834 +    t_Error     err = E_OK;
10835 +    uint32_t    tmpReg = 0, intFlags;
10836 +
10837 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10838 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10839 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
10840 +
10841 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10842 +
10843 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
10844 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsanpn, DEFAULT_initNextPn);
10845 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsalpn, lowestPn);
10846 +    MemCpy8((void*)p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsak, key, sizeof(macsecSAKey_t));
10847 +
10848 +    tmpReg |= RX_SACFG_ACTIVE;
10849 +    tmpReg |= ((an << RX_SACFG_AN_SHIFT) & RX_SACFG_AN_MASK);
10850 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs, tmpReg);
10851 +
10852 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10853 +
10854 +    return err;
10855 +}
10856 +
10857 +t_Error FmMacsecCreateTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecSAKey_t key)
10858 +{
10859 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10860 +    t_Error     err = E_OK;
10861 +    uint32_t    tmpReg = 0, intFlags;
10862 +
10863 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10864 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10865 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_TX_SC, E_INVALID_HANDLE);
10866 +
10867 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
10868 +
10869 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
10870 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsanpn, DEFAULT_initNextPn);
10871 +    MemCpy8((void*)p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsak, key, sizeof(macsecSAKey_t));
10872 +
10873 +    tmpReg |= TX_SACFG_ACTIVE;
10874 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsacs, tmpReg);
10875 +
10876 +    XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
10877 +
10878 +    return err;
10879 +}
10880 +
10881 +t_Error FmMacsecDeleteRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId)
10882 +{
10883 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10884 +    t_Error     err = E_OK;
10885 +    uint32_t    tmpReg = 0, i, intFlags;
10886 +
10887 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10888 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10889 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
10890 +
10891 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10892 +
10893 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
10894 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsanpn, 0x0);
10895 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsalpn, 0x0);
10896 +    for (i=0; i<4; i++)
10897 +        WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsak[i], 0x0);
10898 +
10899 +    tmpReg |= RX_SACFG_ACTIVE;
10900 +    tmpReg &= ~RX_SACFG_EN_MASK;
10901 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs, tmpReg);
10902 +
10903 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10904 +
10905 +    return err;
10906 +}
10907 +
10908 +t_Error FmMacsecDeleteTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId)
10909 +{
10910 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10911 +    t_Error     err = E_OK;
10912 +    uint32_t    tmpReg = 0, i, intFlags;
10913 +
10914 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10915 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10916 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_TX_SC, E_INVALID_HANDLE);
10917 +
10918 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
10919 +
10920 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
10921 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsanpn, 0x0);
10922 +    for (i=0; i<4; i++)
10923 +        WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsak[i], 0x0);
10924 +
10925 +    tmpReg |= TX_SACFG_ACTIVE;
10926 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsacs, tmpReg);
10927 +
10928 +    XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
10929 +
10930 +    return err;
10931 +}
10932 +
10933 +t_Error FmMacsecRxSaSetReceive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, bool enableReceive)
10934 +{
10935 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10936 +    t_Error     err = E_OK;
10937 +    uint32_t    tmpReg = 0, intFlags;
10938 +
10939 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10940 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10941 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
10942 +
10943 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10944 +
10945 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
10946 +    tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs);
10947 +    if (enableReceive)
10948 +        tmpReg |= RX_SACFG_EN_MASK;
10949 +    else
10950 +        tmpReg &= ~RX_SACFG_EN_MASK;
10951 +
10952 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs, tmpReg);
10953 +
10954 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10955 +
10956 +    return err;
10957 +}
10958 +
10959 +t_Error FmMacsecRxSaUpdateNextPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtNextPN)
10960 +{
10961 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10962 +    t_Error     err = E_OK;
10963 +    uint32_t    intFlags;
10964 +
10965 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10966 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10967 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
10968 +
10969 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10970 +
10971 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
10972 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsanpn, updtNextPN);
10973 +
10974 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10975 +
10976 +    return err;
10977 +}
10978 +
10979 +t_Error FmMacsecRxSaUpdateLowestPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtLowestPN)
10980 +{
10981 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
10982 +    t_Error     err = E_OK;
10983 +    uint32_t    intFlags;
10984 +
10985 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
10986 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
10987 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
10988 +
10989 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
10990 +
10991 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
10992 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsalpn, updtLowestPN);
10993 +
10994 +    XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
10995 +
10996 +    return err;
10997 +}
10998 +
10999 +t_Error FmMacsecTxSaSetActive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an)
11000 +{
11001 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
11002 +    t_Error     err = E_OK;
11003 +    uint32_t    tmpReg = 0, intFlags;
11004 +
11005 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
11006 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
11007 +    SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_TX_SC, E_INVALID_HANDLE);
11008 +
11009 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
11010 +
11011 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
11012 +
11013 +    tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg);
11014 +
11015 +    tmpReg |= ((an << TX_SCCFG_AN_SHIFT) & TX_SCCFG_AN_MASK);
11016 +    tmpReg |= ((saId << TX_SCCFG_ASA_SHIFT) & TX_SCCFG_ASA_MASK);
11017 +
11018 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg, tmpReg);
11019 +
11020 +    XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
11021 +
11022 +    return err;
11023 +}
11024 +
11025 +t_Error FmMacsecTxSaGetActive(t_Handle h_FmMacsec, uint32_t scId, macsecAN_t *p_An)
11026 +{
11027 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
11028 +    t_Error     err = E_OK;
11029 +    uint32_t    tmpReg = 0, intFlags;
11030 +
11031 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
11032 +    SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
11033 +    SANITY_CHECK_RETURN_ERROR(p_An, E_INVALID_HANDLE);
11034 +
11035 +    intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
11036 +
11037 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
11038 +
11039 +    tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg);
11040 +
11041 +    XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
11042 +
11043 +    *p_An = (macsecAN_t)((tmpReg & TX_SCCFG_AN_MASK) >> TX_SCCFG_AN_SHIFT);
11044 +
11045 +    return err;
11046 +}
11047 +
11048 +t_Error FmMacsecSetException(t_Handle h_FmMacsec, e_FmMacsecGlobalExceptions exception, uint32_t scId, bool enable)
11049 +{
11050 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
11051 +    uint32_t    bitMask;
11052 +
11053 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
11054 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
11055 +
11056 +    GET_EXCEPTION_FLAG(bitMask, exception, scId);
11057 +    if (bitMask)
11058 +    {
11059 +        if (enable)
11060 +            p_FmMacsec->exceptions |= bitMask;
11061 +        else
11062 +            p_FmMacsec->exceptions &= ~bitMask;
11063 +    }
11064 +    else
11065 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
11066 +
11067 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->erer, p_FmMacsec->exceptions);
11068 +
11069 +    return E_OK;
11070 +}
11071 +
11072 +t_Error FmMacsecSetEvent(t_Handle h_FmMacsec, e_FmMacsecGlobalEvents event, uint32_t scId, bool enable)
11073 +{
11074 +    t_FmMacsec  *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
11075 +    uint32_t    bitMask;
11076 +
11077 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
11078 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
11079 +
11080 +    GET_EVENT_FLAG(bitMask, event, scId);
11081 +    if (bitMask)
11082 +    {
11083 +        if (enable)
11084 +            p_FmMacsec->events |= bitMask;
11085 +        else
11086 +            p_FmMacsec->events &= ~bitMask;
11087 +    }
11088 +    else
11089 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined event"));
11090 +
11091 +    WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->ever, p_FmMacsec->events);
11092 +
11093 +    return E_OK;
11094 +}
11095 +
11096 +/****************************************/
11097 +/*       API Init unit functions        */
11098 +/****************************************/
11099 +t_Handle FM_MACSEC_MASTER_Config(t_FmMacsecParams *p_FmMacsecParam)
11100 +{
11101 +    t_FmMacsec  *p_FmMacsec;
11102 +    uint32_t    macId;
11103 +
11104 +    /* Allocate FM MACSEC structure */
11105 +    p_FmMacsec = (t_FmMacsec *) XX_Malloc(sizeof(t_FmMacsec));
11106 +    if (!p_FmMacsec)
11107 +    {
11108 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC driver structure"));
11109 +        return NULL;
11110 +    }
11111 +    memset(p_FmMacsec, 0, sizeof(t_FmMacsec));
11112 +    InitFmMacsecControllerDriver(&p_FmMacsec->fmMacsecControllerDriver);
11113 +
11114 +    /* Allocate the FM MACSEC driver's parameters structure */
11115 +    p_FmMacsec->p_FmMacsecDriverParam = (t_FmMacsecDriverParam *)XX_Malloc(sizeof(t_FmMacsecDriverParam));
11116 +    if (!p_FmMacsec->p_FmMacsecDriverParam)
11117 +    {
11118 +        XX_Free(p_FmMacsec);
11119 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC driver parameters"));
11120 +        return NULL;
11121 +    }
11122 +    memset(p_FmMacsec->p_FmMacsecDriverParam, 0, sizeof(t_FmMacsecDriverParam));
11123 +
11124 +    /* Initialize FM MACSEC parameters which will be kept by the driver */
11125 +    p_FmMacsec->h_Fm            = p_FmMacsecParam->h_Fm;
11126 +    p_FmMacsec->h_FmMac         = p_FmMacsecParam->nonGuestParams.h_FmMac;
11127 +    p_FmMacsec->p_FmMacsecRegs  = (t_FmMacsecRegs *)UINT_TO_PTR(p_FmMacsecParam->nonGuestParams.baseAddr);
11128 +    p_FmMacsec->f_Exception     = p_FmMacsecParam->nonGuestParams.f_Exception;
11129 +    p_FmMacsec->h_App           = p_FmMacsecParam->nonGuestParams.h_App;
11130 +    p_FmMacsec->userExceptions  = DEFAULT_userExceptions;
11131 +    p_FmMacsec->exceptions      = DEFAULT_exceptions;
11132 +    p_FmMacsec->events          = DEFAULT_events;
11133 +    p_FmMacsec->rxScSpinLock    = XX_InitSpinlock();
11134 +    p_FmMacsec->txScSpinLock    = XX_InitSpinlock();
11135 +
11136 +    /* Initialize FM MACSEC driver parameters parameters (for initialization phase only) */
11137 +    p_FmMacsec->p_FmMacsecDriverParam->unknownSciTreatMode                           = DEFAULT_unknownSciFrameTreatment;
11138 +    p_FmMacsec->p_FmMacsecDriverParam->invalidTagsDeliverUncontrolled                = DEFAULT_invalidTagsFrameTreatment;
11139 +    p_FmMacsec->p_FmMacsecDriverParam->encryptWithNoChangedTextDiscardUncontrolled   = DEFAULT_encryptWithNoChangedTextFrameTreatment;
11140 +    p_FmMacsec->p_FmMacsecDriverParam->untagTreatMode                                = DEFAULT_untagFrameTreatment;
11141 +    p_FmMacsec->p_FmMacsecDriverParam->keysUnreadable                                = DEFAULT_keysUnreadable;
11142 +    p_FmMacsec->p_FmMacsecDriverParam->reservedSc0                                   = DEFAULT_sc0ReservedForPTP;
11143 +    p_FmMacsec->p_FmMacsecDriverParam->byPassMode                                    = !DEFAULT_normalMode;
11144 +    p_FmMacsec->p_FmMacsecDriverParam->pnExhThr                                      = DEFAULT_pnExhThr;
11145 +    p_FmMacsec->p_FmMacsecDriverParam->sectagOverhead                                = DEFAULT_sectagOverhead;
11146 +    p_FmMacsec->p_FmMacsecDriverParam->mflSubtract                                   = DEFAULT_mflSubtract;
11147 +    /* build the FM MACSEC master IPC address */
11148 +    memset(p_FmMacsec->fmMacsecModuleName, 0, (sizeof(char))*MODULE_NAME_SIZE);
11149 +    FM_MAC_GetId(p_FmMacsec->h_FmMac,&macId);
11150 +    if (Sprint (p_FmMacsec->fmMacsecModuleName, "FM-%d-MAC-%d-MACSEC-Master",
11151 +        FmGetId(p_FmMacsec->h_Fm),macId) != 24)
11152 +    {
11153 +        XX_Free(p_FmMacsec->p_FmMacsecDriverParam);
11154 +        XX_Free(p_FmMacsec);
11155 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
11156 +        return NULL;
11157 +    }
11158 +    return p_FmMacsec;
11159 +}
11160 --- /dev/null
11161 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.h
11162 @@ -0,0 +1,479 @@
11163 +/*
11164 + * Copyright 2008-2015 Freescale Semiconductor Inc.
11165 + *
11166 + * Redistribution and use in source and binary forms, with or without
11167 + * modification, are permitted provided that the following conditions are met:
11168 + *     * Redistributions of source code must retain the above copyright
11169 + *       notice, this list of conditions and the following disclaimer.
11170 + *     * Redistributions in binary form must reproduce the above copyright
11171 + *       notice, this list of conditions and the following disclaimer in the
11172 + *       documentation and/or other materials provided with the distribution.
11173 + *     * Neither the name of Freescale Semiconductor nor the
11174 + *       names of its contributors may be used to endorse or promote products
11175 + *       derived from this software without specific prior written permission.
11176 + *
11177 + *
11178 + * ALTERNATIVELY, this software may be distributed under the terms of the
11179 + * GNU General Public License ("GPL") as published by the Free Software
11180 + * Foundation, either version 2 of that License or (at your option) any
11181 + * later version.
11182 + *
11183 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
11184 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
11185 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
11186 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
11187 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11188 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
11189 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
11190 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
11191 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
11192 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
11193 + */
11194 +
11195 +/******************************************************************************
11196 + @File          fm_macsec_master.h
11197 +
11198 + @Description   FM MACSEC internal structures and definitions.
11199 +*//***************************************************************************/
11200 +#ifndef __FM_MACSEC_MASTER_H
11201 +#define __FM_MACSEC_MASTER_H
11202 +
11203 +#include "error_ext.h"
11204 +#include "std_ext.h"
11205 +
11206 +#include "fm_macsec.h"
11207 +
11208 +
11209 +#define MACSEC_ICV_SIZE             16
11210 +#define MACSEC_SECTAG_SIZE          16
11211 +#define MACSEC_SCI_SIZE             8
11212 +#define MACSEC_FCS_SIZE             4
11213 +
11214 +/**************************************************************************//**
11215 + @Description       Exceptions
11216 +*//***************************************************************************/
11217 +
11218 +#define FM_MACSEC_EX_TX_SC_0       0x80000000
11219 +#define FM_MACSEC_EX_TX_SC(sc)     (FM_MACSEC_EX_TX_SC_0 >> (sc))
11220 +#define FM_MACSEC_EX_ECC           0x00000001
11221 +
11222 +#define GET_EXCEPTION_FLAG(bitMask, exception, id)  switch (exception){     \
11223 +    case e_FM_MACSEC_EX_TX_SC:                                              \
11224 +        bitMask = FM_MACSEC_EX_TX_SC(id); break;                            \
11225 +    case e_FM_MACSEC_EX_ECC:                                                \
11226 +        bitMask = FM_MACSEC_EX_ECC; break;                                  \
11227 +    default: bitMask = 0;break;}
11228 +
11229 +#define FM_MACSEC_USER_EX_SINGLE_BIT_ECC            0x80000000
11230 +#define FM_MACSEC_USER_EX_MULTI_BIT_ECC             0x40000000
11231 +
11232 +#define GET_USER_EXCEPTION_FLAG(bitMask, exception)     switch (exception){ \
11233 +    case e_FM_MACSEC_EX_SINGLE_BIT_ECC:                                     \
11234 +        bitMask = FM_MACSEC_USER_EX_SINGLE_BIT_ECC; break;                  \
11235 +    case e_FM_MACSEC_EX_MULTI_BIT_ECC:                                      \
11236 +        bitMask = FM_MACSEC_USER_EX_MULTI_BIT_ECC; break;                   \
11237 +    default: bitMask = 0;break;}
11238 +
11239 +/**************************************************************************//**
11240 + @Description       Events
11241 +*//***************************************************************************/
11242 +
11243 +#define FM_MACSEC_EV_TX_SC_0_NEXT_PN                  0x80000000
11244 +#define FM_MACSEC_EV_TX_SC_NEXT_PN(sc)                (FM_MACSEC_EV_TX_SC_0_NEXT_PN >> (sc))
11245 +
11246 +#define GET_EVENT_FLAG(bitMask, event, id)      switch (event){     \
11247 +    case e_FM_MACSEC_EV_TX_SC_NEXT_PN:                              \
11248 +        bitMask = FM_MACSEC_EV_TX_SC_NEXT_PN(id); break;            \
11249 +    default: bitMask = 0;break;}
11250 +
11251 +/**************************************************************************//**
11252 + @Description       Defaults
11253 +*//***************************************************************************/
11254 +#define DEFAULT_userExceptions              (FM_MACSEC_USER_EX_SINGLE_BIT_ECC     |\
11255 +                                            FM_MACSEC_USER_EX_MULTI_BIT_ECC)
11256 +
11257 +#define DEFAULT_exceptions                  (FM_MACSEC_EX_TX_SC(0)     |\
11258 +                                            FM_MACSEC_EX_TX_SC(1)      |\
11259 +                                            FM_MACSEC_EX_TX_SC(2)      |\
11260 +                                            FM_MACSEC_EX_TX_SC(3)      |\
11261 +                                            FM_MACSEC_EX_TX_SC(4)      |\
11262 +                                            FM_MACSEC_EX_TX_SC(5)      |\
11263 +                                            FM_MACSEC_EX_TX_SC(6)      |\
11264 +                                            FM_MACSEC_EX_TX_SC(7)      |\
11265 +                                            FM_MACSEC_EX_TX_SC(8)      |\
11266 +                                            FM_MACSEC_EX_TX_SC(9)      |\
11267 +                                            FM_MACSEC_EX_TX_SC(10)     |\
11268 +                                            FM_MACSEC_EX_TX_SC(11)     |\
11269 +                                            FM_MACSEC_EX_TX_SC(12)     |\
11270 +                                            FM_MACSEC_EX_TX_SC(13)     |\
11271 +                                            FM_MACSEC_EX_TX_SC(14)     |\
11272 +                                            FM_MACSEC_EX_TX_SC(15)     |\
11273 +                                            FM_MACSEC_EX_ECC          )
11274 +
11275 +#define DEFAULT_events                      (FM_MACSEC_EV_TX_SC_NEXT_PN(0)   |\
11276 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(1)    |\
11277 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(2)    |\
11278 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(3)    |\
11279 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(4)    |\
11280 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(5)    |\
11281 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(6)    |\
11282 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(7)    |\
11283 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(8)    |\
11284 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(9)    |\
11285 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(10)   |\
11286 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(11)   |\
11287 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(12)   |\
11288 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(13)   |\
11289 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(14)   |\
11290 +                                            FM_MACSEC_EV_TX_SC_NEXT_PN(15)   )
11291 +
11292 +#define DEFAULT_unknownSciFrameTreatment                e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH
11293 +#define DEFAULT_invalidTagsFrameTreatment               FALSE
11294 +#define DEFAULT_encryptWithNoChangedTextFrameTreatment  FALSE
11295 +#define DEFAULT_untagFrameTreatment                     e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED
11296 +#define DEFAULT_changedTextWithNoEncryptFrameTreatment  FALSE
11297 +#define DEFAULT_onlyScbIsSetFrameTreatment              FALSE
11298 +#define DEFAULT_keysUnreadable                          FALSE
11299 +#define DEFAULT_normalMode                              TRUE
11300 +#define DEFAULT_sc0ReservedForPTP                       FALSE
11301 +#define DEFAULT_initNextPn                              1
11302 +#define DEFAULT_pnExhThr                                0xffffffff
11303 +#define DEFAULT_sectagOverhead                          (MACSEC_ICV_SIZE + MACSEC_SECTAG_SIZE)
11304 +#define DEFAULT_mflSubtract                             MACSEC_FCS_SIZE
11305 +
11306 +
11307 +/**************************************************************************//**
11308 + @Description       Memory Mapped Registers
11309 +*//***************************************************************************/
11310 +
11311 +#if defined(__MWERKS__) && !defined(__GNUC__)
11312 +#pragma pack(push,1)
11313 +#endif /* defined(__MWERKS__) && ... */
11314 +
11315 +typedef _Packed struct
11316 +{
11317 +    /* MACsec configuration */
11318 +    volatile uint32_t   cfg;            /**< MACsec configuration */
11319 +    volatile uint32_t   et;             /**< MACsec EtherType */
11320 +    volatile uint8_t    res1[56];       /**< reserved */
11321 +    volatile uint32_t   mfl;            /**< Maximum Frame Length */
11322 +    volatile uint32_t   tpnet;          /**< TX Packet Number exhaustion threshold */
11323 +    volatile uint8_t    res2[56];       /**< reserved */
11324 +    volatile uint32_t   rxsca;          /**< RX SC access select */
11325 +    volatile uint8_t    res3[60];       /**< reserved */
11326 +    volatile uint32_t   txsca;          /**< TX SC access select */
11327 +    volatile uint8_t    res4[60];       /**< reserved */
11328 +
11329 +    /* RX configuration, status and statistic */
11330 +    volatile uint32_t   rxsci1h;        /**< RX Secure Channel Identifier first half */
11331 +    volatile uint32_t   rxsci2h;        /**< RX Secure Channel Identifier second half */
11332 +    volatile uint8_t    res5[8];        /**< reserved */
11333 +    volatile uint32_t   ifio1hs;        /**< ifInOctets first half Statistic */
11334 +    volatile uint32_t   ifio2hs;        /**< ifInOctets second half Statistic */
11335 +    volatile uint32_t   ifiups;         /**< ifInUcastPkts Statistic */
11336 +    volatile uint8_t    res6[4];        /**< reserved */
11337 +    volatile uint32_t   ifimps;         /**< ifInMulticastPkts Statistic */
11338 +    volatile uint32_t   ifibps;         /**< ifInBroadcastPkts Statistic */
11339 +    volatile uint32_t   rxsccfg;        /**< RX Secure Channel configuration */
11340 +    volatile uint32_t   rpw;            /**< replayWindow */
11341 +    volatile uint8_t    res7[16];       /**< reserved */
11342 +    volatile uint32_t   inov1hs;        /**< InOctetsValidated first half Statistic */
11343 +    volatile uint32_t   inov2hs;        /**< InOctetsValidated second half Statistic */
11344 +    volatile uint32_t   inod1hs;        /**< InOctetsDecrypted first half Statistic */
11345 +    volatile uint32_t   inod2hs;        /**< InOctetsDecrypted second half Statistic */
11346 +    volatile uint32_t   rxscipus;       /**< RX Secure Channel InPktsUnchecked Statistic */
11347 +    volatile uint32_t   rxscipds;       /**< RX Secure Channel InPktsDelayed Statistic */
11348 +    volatile uint32_t   rxscipls;       /**< RX Secure Channel InPktsLate Statistic */
11349 +    volatile uint8_t    res8[4];        /**< reserved */
11350 +    volatile uint32_t   rxaninuss[MAX_NUM_OF_SA_PER_SC];   /**< RX AN 0-3 InNotUsingSA Statistic */
11351 +    volatile uint32_t   rxanipuss[MAX_NUM_OF_SA_PER_SC];   /**< RX AN 0-3 InPktsUnusedSA Statistic */
11352 +    _Packed struct
11353 +    {
11354 +        volatile uint32_t   rxsacs;     /**< RX Security Association configuration and status */
11355 +        volatile uint32_t   rxsanpn;    /**< RX Security Association nextPN */
11356 +        volatile uint32_t   rxsalpn;    /**< RX Security Association lowestPN */
11357 +        volatile uint32_t   rxsaipos;   /**< RX Security Association InPktsOK Statistic */
11358 +        volatile uint32_t   rxsak[4];   /**< RX Security Association key (128 bit) */
11359 +        volatile uint32_t   rxsah[4];   /**< RX Security Association hash (128 bit) */
11360 +        volatile uint32_t   rxsaipis;   /**< RX Security Association InPktsInvalid Statistic */
11361 +        volatile uint32_t   rxsaipnvs;  /**< RX Security Association InPktsNotValid Statistic */
11362 +        volatile uint8_t    res9[8];    /**< reserved */
11363 +    } _PackedType fmMacsecRxScSa[NUM_OF_SA_PER_RX_SC];
11364 +
11365 +    /* TX configuration, status and statistic */
11366 +    volatile uint32_t   txsci1h;        /**< TX Secure Channel Identifier first half */
11367 +    volatile uint32_t   txsci2h;        /**< TX Secure Channel Identifier second half */
11368 +    volatile uint8_t    res10[8];        /**< reserved */
11369 +    volatile uint32_t   ifoo1hs;        /**< ifOutOctets first half Statistic */
11370 +    volatile uint32_t   ifoo2hs;        /**< ifOutOctets second half Statistic */
11371 +    volatile uint32_t   ifoups;         /**< ifOutUcastPkts Statistic */
11372 +    volatile uint32_t   opus;           /**< OutPktsUntagged Statistic */
11373 +    volatile uint32_t   ifomps;         /**< ifOutMulticastPkts Statistic */
11374 +    volatile uint32_t   ifobps;         /**< ifOutBroadcastPkts Statistic */
11375 +    volatile uint32_t   txsccfg;        /**< TX Secure Channel configuration */
11376 +    volatile uint32_t   optls;          /**< OutPktsTooLong Statistic */
11377 +    volatile uint8_t    res11[16];      /**< reserved */
11378 +    volatile uint32_t   oop1hs;         /**< OutOctetsProtected first half Statistic */
11379 +    volatile uint32_t   oop2hs;         /**< OutOctetsProtected second half Statistic */
11380 +    volatile uint32_t   ooe1hs;         /**< OutOctetsEncrypted first half Statistic */
11381 +    volatile uint32_t   ooe2hs;         /**< OutOctetsEncrypted second half Statistic */
11382 +    volatile uint8_t    res12[48];      /**< reserved */
11383 +    _Packed struct
11384 +    {
11385 +        volatile uint32_t   txsacs;     /**< TX Security Association configuration and status */
11386 +        volatile uint32_t   txsanpn;    /**< TX Security Association nextPN */
11387 +        volatile uint32_t   txsaopps;   /**< TX Security Association OutPktsProtected Statistic */
11388 +        volatile uint32_t   txsaopes;   /**< TX Security Association OutPktsEncrypted Statistic */
11389 +        volatile uint32_t   txsak[4];   /**< TX Security Association key (128 bit) */
11390 +        volatile uint32_t   txsah[4];   /**< TX Security Association hash (128 bit) */
11391 +        volatile uint8_t    res13[16];  /**< reserved */
11392 +    } _PackedType fmMacsecTxScSa[NUM_OF_SA_PER_TX_SC];
11393 +    volatile uint8_t    res14[248];     /**< reserved */
11394 +
11395 +    /* Global configuration and status */
11396 +    volatile uint32_t   ip_rev1;        /**< MACsec IP Block Revision 1 register */
11397 +    volatile uint32_t   ip_rev2;        /**< MACsec IP Block Revision 2 register */
11398 +    volatile uint32_t   evr;            /**< MACsec Event Register */
11399 +    volatile uint32_t   ever;           /**< MACsec Event Enable Register */
11400 +    volatile uint32_t   evfr;           /**< MACsec Event Force Register */
11401 +    volatile uint32_t   err;            /**< MACsec Error Register */
11402 +    volatile uint32_t   erer;           /**< MACsec Error Enable Register */
11403 +    volatile uint32_t   erfr;           /**< MACsec Error Force Register */
11404 +    volatile uint8_t    res15[40];      /**< reserved */
11405 +    volatile uint32_t   meec;           /**< MACsec Memory ECC Error Capture Register */
11406 +    volatile uint32_t   idle;           /**< MACsec Idle status Register */
11407 +    volatile uint8_t    res16[184];     /**< reserved */
11408 +    /* DEBUG */
11409 +    volatile uint32_t   rxec;           /**< MACsec RX error capture Register */
11410 +    volatile uint8_t    res17[28];      /**< reserved */
11411 +    volatile uint32_t   txec;           /**< MACsec TX error capture Register */
11412 +    volatile uint8_t    res18[220];     /**< reserved */
11413 +
11414 +    /* Macsec Rx global statistic */
11415 +    volatile uint32_t   ifiocp1hs;      /**< ifInOctetsCp first half Statistic */
11416 +    volatile uint32_t   ifiocp2hs;      /**< ifInOctetsCp second half Statistic */
11417 +    volatile uint32_t   ifiupcps;       /**< ifInUcastPktsCp Statistic */
11418 +    volatile uint8_t    res19[4];       /**< reserved */
11419 +    volatile uint32_t   ifioup1hs;      /**< ifInOctetsUp first half Statistic */
11420 +    volatile uint32_t   ifioup2hs;      /**< ifInOctetsUp second half Statistic */
11421 +    volatile uint32_t   ifiupups;       /**< ifInUcastPktsUp Statistic */
11422 +    volatile uint8_t    res20[4];       /**< reserved */
11423 +    volatile uint32_t   ifimpcps;       /**< ifInMulticastPktsCp Statistic */
11424 +    volatile uint32_t   ifibpcps;       /**< ifInBroadcastPktsCp Statistic */
11425 +    volatile uint32_t   ifimpups;       /**< ifInMulticastPktsUp Statistic */
11426 +    volatile uint32_t   ifibpups;       /**< ifInBroadcastPktsUp Statistic */
11427 +    volatile uint32_t   ipwts;          /**< InPktsWithoutTag Statistic */
11428 +    volatile uint32_t   ipkays;         /**< InPktsKaY Statistic */
11429 +    volatile uint32_t   ipbts;          /**< InPktsBadTag Statistic */
11430 +    volatile uint32_t   ipsnfs;         /**< InPktsSCINotFound Statistic */
11431 +    volatile uint32_t   ipuecs;         /**< InPktsUnsupportedEC Statistic */
11432 +    volatile uint32_t   ipescbs;        /**< InPktsEponSingleCopyBroadcast Statistic */
11433 +    volatile uint32_t   iptls;          /**< InPktsTooLong Statistic */
11434 +    volatile uint8_t    res21[52];      /**< reserved */
11435 +
11436 +    /* Macsec Tx global statistic */
11437 +    volatile uint32_t   opds;           /**< OutPktsDiscarded Statistic */
11438 +#if (DPAA_VERSION >= 11)
11439 +    volatile uint8_t    res22[124];     /**< reserved */
11440 +    _Packed struct
11441 +    {
11442 +        volatile uint32_t   rxsak[8];   /**< RX Security Association key (128/256 bit) */
11443 +        volatile uint8_t    res23[32];  /**< reserved */
11444 +    } _PackedType rxScSaKey[NUM_OF_SA_PER_RX_SC];
11445 +    _Packed struct
11446 +    {
11447 +        volatile uint32_t   txsak[8];   /**< TX Security Association key (128/256 bit) */
11448 +        volatile uint8_t    res24[32];  /**< reserved */
11449 +    } _PackedType txScSaKey[NUM_OF_SA_PER_TX_SC];
11450 +#endif /* (DPAA_VERSION >= 11) */
11451 +} _PackedType t_FmMacsecRegs;
11452 +
11453 +#if defined(__MWERKS__) && !defined(__GNUC__)
11454 +#pragma pack(pop)
11455 +#endif /* defined(__MWERKS__) && ... */
11456 +
11457 +
11458 +/**************************************************************************//**
11459 + @Description       General defines
11460 +*//***************************************************************************/
11461 +
11462 +#define SCI_HIGH_MASK   0xffffffff00000000LL
11463 +#define SCI_LOW_MASK    0x00000000ffffffffLL
11464 +
11465 +#define LONG_SHIFT      32
11466 +
11467 +#define GET_SCI_FIRST_HALF(sci)     (uint32_t)((macsecSCI_t)((macsecSCI_t)(sci) & SCI_HIGH_MASK) >> LONG_SHIFT)
11468 +#define GET_SCI_SECOND_HALF(sci)    (uint32_t)((macsecSCI_t)(sci) & SCI_LOW_MASK)
11469 +
11470 +/**************************************************************************//**
11471 + @Description       Configuration defines
11472 +*//***************************************************************************/
11473 +
11474 +/* masks */
11475 +#define CFG_UECT                        0x00000800
11476 +#define CFG_ESCBT                       0x00000400
11477 +#define CFG_USFT                        0x00000300
11478 +#define CFG_ITT                         0x00000080
11479 +#define CFG_KFT                         0x00000040
11480 +#define CFG_UFT                         0x00000030
11481 +#define CFG_KSS                         0x00000004
11482 +#define CFG_BYPN                        0x00000002
11483 +#define CFG_S0I                         0x00000001
11484 +
11485 +#define ET_TYPE                         0x0000ffff
11486 +
11487 +#define MFL_MAX_LEN                     0x0000ffff
11488 +
11489 +#define RXSCA_SC_SEL                    0x0000000f
11490 +
11491 +#define TXSCA_SC_SEL                    0x0000000f
11492 +
11493 +#define IP_REV_1_IP_ID                  0xffff0000
11494 +#define IP_REV_1_IP_MJ                  0x0000ff00
11495 +#define IP_REV_1_IP_MM                  0x000000ff
11496 +
11497 +#define IP_REV_2_IP_INT                 0x00ff0000
11498 +#define IP_REV_2_IP_ERR                 0x0000ff00
11499 +#define IP_REV_2_IP_CFG                 0x000000ff
11500 +
11501 +#define MECC_CAP                        0x80000000
11502 +#define MECC_CET                        0x40000000
11503 +#define MECC_SERCNT                     0x00ff0000
11504 +#define MECC_MEMADDR                    0x000001ff
11505 +
11506 +/* shifts */
11507 +#define CFG_UECT_SHIFT                  (31-20)
11508 +#define CFG_ESCBT_SHIFT                 (31-21)
11509 +#define CFG_USFT_SHIFT                  (31-23)
11510 +#define CFG_ITT_SHIFT                   (31-24)
11511 +#define CFG_KFT_SHIFT                   (31-25)
11512 +#define CFG_UFT_SHIFT                   (31-27)
11513 +#define CFG_KSS_SHIFT                   (31-29)
11514 +#define CFG_BYPN_SHIFT                  (31-30)
11515 +#define CFG_S0I_SHIFT                   (31-31)
11516 +
11517 +#define IP_REV_1_IP_ID_SHIFT            (31-15)
11518 +#define IP_REV_1_IP_MJ_SHIFT            (31-23)
11519 +#define IP_REV_1_IP_MM_SHIFT            (31-31)
11520 +
11521 +#define IP_REV_2_IP_INT_SHIFT           (31-15)
11522 +#define IP_REV_2_IP_ERR_SHIFT           (31-23)
11523 +#define IP_REV_2_IP_CFG_SHIFT           (31-31)
11524 +
11525 +#define MECC_CAP_SHIFT                  (31-0)
11526 +#define MECC_CET_SHIFT                  (31-1)
11527 +#define MECC_SERCNT_SHIFT               (31-15)
11528 +#define MECC_MEMADDR_SHIFT              (31-31)
11529 +
11530 +/**************************************************************************//**
11531 + @Description       RX SC defines
11532 +*//***************************************************************************/
11533 +
11534 +/* masks */
11535 +#define RX_SCCFG_SCI_EN_MASK            0x00000800
11536 +#define RX_SCCFG_RP_MASK                0x00000400
11537 +#define RX_SCCFG_VF_MASK                0x00000300
11538 +#define RX_SCCFG_CO_MASK                0x0000003f
11539 +
11540 +/* shifts */
11541 +#define RX_SCCFG_SCI_EN_SHIFT           (31-20)
11542 +#define RX_SCCFG_RP_SHIFT               (31-21)
11543 +#define RX_SCCFG_VF_SHIFT               (31-23)
11544 +#define RX_SCCFG_CO_SHIFT               (31-31)
11545 +#define RX_SCCFG_CS_SHIFT               (31-7)
11546 +
11547 +/**************************************************************************//**
11548 + @Description       RX SA defines
11549 +*//***************************************************************************/
11550 +
11551 +/* masks */
11552 +#define RX_SACFG_ACTIVE                 0x80000000
11553 +#define RX_SACFG_AN_MASK                0x00000006
11554 +#define RX_SACFG_EN_MASK                0x00000001
11555 +
11556 +/* shifts */
11557 +#define RX_SACFG_AN_SHIFT               (31-30)
11558 +#define RX_SACFG_EN_SHIFT               (31-31)
11559 +
11560 +/**************************************************************************//**
11561 + @Description       TX SC defines
11562 +*//***************************************************************************/
11563 +
11564 +/* masks */
11565 +#define TX_SCCFG_AN_MASK                0x000c0000
11566 +#define TX_SCCFG_ASA_MASK               0x00020000
11567 +#define TX_SCCFG_SCE_MASK               0x00010000
11568 +#define TX_SCCFG_CO_MASK                0x00003f00
11569 +#define TX_SCCFG_CE_MASK                0x00000010
11570 +#define TX_SCCFG_PF_MASK                0x00000008
11571 +#define TX_SCCFG_AIS_MASK               0x00000004
11572 +#define TX_SCCFG_UES_MASK               0x00000002
11573 +#define TX_SCCFG_USCB_MASK              0x00000001
11574 +
11575 +/* shifts */
11576 +#define TX_SCCFG_AN_SHIFT               (31-13)
11577 +#define TX_SCCFG_ASA_SHIFT              (31-14)
11578 +#define TX_SCCFG_SCE_SHIFT              (31-15)
11579 +#define TX_SCCFG_CO_SHIFT               (31-23)
11580 +#define TX_SCCFG_CE_SHIFT               (31-27)
11581 +#define TX_SCCFG_PF_SHIFT               (31-28)
11582 +#define TX_SCCFG_AIS_SHIFT              (31-29)
11583 +#define TX_SCCFG_UES_SHIFT              (31-30)
11584 +#define TX_SCCFG_USCB_SHIFT             (31-31)
11585 +#define TX_SCCFG_CS_SHIFT               (31-7)
11586 +
11587 +/**************************************************************************//**
11588 + @Description       TX SA defines
11589 +*//***************************************************************************/
11590 +
11591 +/* masks */
11592 +#define TX_SACFG_ACTIVE                 0x80000000
11593 +
11594 +
11595 +typedef struct
11596 +{
11597 +    void        (*f_Isr) (t_Handle h_Arg, uint32_t id);
11598 +    t_Handle    h_SrcHandle;
11599 +} t_FmMacsecIntrSrc;
11600 +
11601 +typedef struct
11602 +{
11603 +    e_FmMacsecUnknownSciFrameTreatment  unknownSciTreatMode;
11604 +    bool                                invalidTagsDeliverUncontrolled;
11605 +    bool                                changedTextWithNoEncryptDeliverUncontrolled;
11606 +    bool                                onlyScbIsSetDeliverUncontrolled;
11607 +    bool                                encryptWithNoChangedTextDiscardUncontrolled;
11608 +    e_FmMacsecUntagFrameTreatment       untagTreatMode;
11609 +    uint32_t                            pnExhThr;
11610 +    bool                                keysUnreadable;
11611 +    bool                                byPassMode;
11612 +    bool                                reservedSc0;
11613 +    uint32_t                            sectagOverhead;
11614 +    uint32_t                            mflSubtract;
11615 +} t_FmMacsecDriverParam;
11616 +
11617 +typedef struct
11618 +{
11619 +    t_FmMacsecControllerDriver      fmMacsecControllerDriver;
11620 +    t_Handle                        h_Fm;
11621 +    t_FmMacsecRegs                  *p_FmMacsecRegs;
11622 +    t_Handle                        h_FmMac;            /**< A handle to the FM MAC object  related to */
11623 +    char                            fmMacsecModuleName[MODULE_NAME_SIZE];
11624 +    t_FmMacsecIntrSrc               intrMng[NUM_OF_INTER_MODULE_EVENTS];
11625 +    uint32_t                        events;
11626 +    uint32_t                        exceptions;
11627 +    uint32_t                        userExceptions;
11628 +    t_FmMacsecExceptionsCallback    *f_Exception;       /**< Exception Callback Routine         */
11629 +    t_Handle                        h_App;              /**< A handle to an application layer object; This handle will
11630 +                                                             be passed by the driver upon calling the above callbacks */
11631 +    bool                            rxScTable[NUM_OF_RX_SC];
11632 +    uint32_t                        numRxScAvailable;
11633 +    bool                            txScTable[NUM_OF_TX_SC];
11634 +    uint32_t                        numTxScAvailable;
11635 +    t_Handle                        rxScSpinLock;
11636 +    t_Handle                        txScSpinLock;
11637 +    t_FmMacsecDriverParam           *p_FmMacsecDriverParam;
11638 +} t_FmMacsec;
11639 +
11640 +
11641 +#endif /* __FM_MACSEC_MASTER_H */
11642 --- /dev/null
11643 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.c
11644 @@ -0,0 +1,883 @@
11645 +/*
11646 + * Copyright 2008-2015 Freescale Semiconductor Inc.
11647 + *
11648 + * Redistribution and use in source and binary forms, with or without
11649 + * modification, are permitted provided that the following conditions are met:
11650 + *     * Redistributions of source code must retain the above copyright
11651 + *       notice, this list of conditions and the following disclaimer.
11652 + *     * Redistributions in binary form must reproduce the above copyright
11653 + *       notice, this list of conditions and the following disclaimer in the
11654 + *       documentation and/or other materials provided with the distribution.
11655 + *     * Neither the name of Freescale Semiconductor nor the
11656 + *       names of its contributors may be used to endorse or promote products
11657 + *       derived from this software without specific prior written permission.
11658 + *
11659 + *
11660 + * ALTERNATIVELY, this software may be distributed under the terms of the
11661 + * GNU General Public License ("GPL") as published by the Free Software
11662 + * Foundation, either version 2 of that License or (at your option) any
11663 + * later version.
11664 + *
11665 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
11666 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
11667 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
11668 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
11669 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11670 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
11671 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
11672 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
11673 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
11674 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
11675 + */
11676 +
11677 +/******************************************************************************
11678 + @File          fm_macsec_secy.c
11679 +
11680 + @Description   FM MACSEC SECY driver routines implementation.
11681 +*//***************************************************************************/
11682 +
11683 +#include "std_ext.h"
11684 +#include "error_ext.h"
11685 +#include "xx_ext.h"
11686 +#include "string_ext.h"
11687 +#include "sprint_ext.h"
11688 +
11689 +#include "fm_macsec_secy.h"
11690 +
11691 +
11692 +/****************************************/
11693 +/*       static functions               */
11694 +/****************************************/
11695 +static void FmMacsecSecYExceptionsIsr(t_Handle h_FmMacsecSecY, uint32_t id)
11696 +{
11697 +    t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
11698 +
11699 +    UNUSED(id);
11700 +    SANITY_CHECK_RETURN(p_FmMacsecSecY, E_INVALID_HANDLE);
11701 +
11702 +    if (p_FmMacsecSecY->exceptions & FM_MACSEC_SECY_EX_FRAME_DISCARDED)
11703 +        p_FmMacsecSecY->f_Exception(p_FmMacsecSecY->h_App, e_FM_MACSEC_SECY_EX_FRAME_DISCARDED);
11704 +}
11705 +
11706 +static void FmMacsecSecYEventsIsr(t_Handle h_FmMacsecSecY, uint32_t id)
11707 +{
11708 +    t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
11709 +
11710 +    UNUSED(id);
11711 +    SANITY_CHECK_RETURN(p_FmMacsecSecY, E_INVALID_HANDLE);
11712 +
11713 +    if (p_FmMacsecSecY->events & FM_MACSEC_SECY_EV_NEXT_PN)
11714 +        p_FmMacsecSecY->f_Event(p_FmMacsecSecY->h_App, e_FM_MACSEC_SECY_EV_NEXT_PN);
11715 +}
11716 +
11717 +static t_Error CheckFmMacsecSecYParameters(t_FmMacsecSecY *p_FmMacsecSecY)
11718 +{
11719 +    if (!p_FmMacsecSecY->f_Exception)
11720 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
11721 +
11722 +    if (!p_FmMacsecSecY->f_Event)
11723 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Events callback not provided"));
11724 +
11725 +    if (!p_FmMacsecSecY->numOfRxSc)
11726 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Num of Rx Scs must be greater than '0'"));
11727 +
11728 +
11729 +    return E_OK;
11730 +}
11731 +
11732 +static t_Handle FmMacsecSecYCreateSc(t_FmMacsecSecY             *p_FmMacsecSecY,
11733 +                                     macsecSCI_t                sci,
11734 +                                     e_FmMacsecSecYCipherSuite  cipherSuite,
11735 +                                     e_ScType                   type)
11736 +{
11737 +    t_SecYSc        *p_ScTable;
11738 +    void            *p_Params;
11739 +    uint32_t        numOfSc,i;
11740 +    t_Error         err = E_OK;
11741 +    t_RxScParams    rxScParams;
11742 +    t_TxScParams    txScParams;
11743 +
11744 +    ASSERT_COND(p_FmMacsecSecY);
11745 +    ASSERT_COND(p_FmMacsecSecY->h_FmMacsec);
11746 +
11747 +    if (type == e_SC_RX)
11748 +    {
11749 +        memset(&rxScParams, 0, sizeof(rxScParams));
11750 +        i                                   = (NUM_OF_RX_SC - 1);
11751 +        p_ScTable                           = p_FmMacsecSecY->p_RxSc;
11752 +        numOfSc                             = p_FmMacsecSecY->numOfRxSc;
11753 +        rxScParams.confidentialityOffset    = p_FmMacsecSecY->confidentialityOffset;
11754 +        rxScParams.replayProtect            = p_FmMacsecSecY->replayProtect;
11755 +        rxScParams.replayWindow             = p_FmMacsecSecY->replayWindow;
11756 +        rxScParams.validateFrames           = p_FmMacsecSecY->validateFrames;
11757 +        rxScParams.cipherSuite              = cipherSuite;
11758 +        p_Params = &rxScParams;
11759 +    }
11760 +    else
11761 +    {
11762 +        memset(&txScParams, 0, sizeof(txScParams));
11763 +        i                                   = (NUM_OF_TX_SC - 1);
11764 +        p_ScTable                           = p_FmMacsecSecY->p_TxSc;
11765 +        numOfSc                             = p_FmMacsecSecY->numOfTxSc;
11766 +        txScParams.sciInsertionMode         = p_FmMacsecSecY->sciInsertionMode;
11767 +        txScParams.protectFrames            = p_FmMacsecSecY->protectFrames;
11768 +        txScParams.confidentialityEnable    = p_FmMacsecSecY->confidentialityEnable;
11769 +        txScParams.confidentialityOffset    = p_FmMacsecSecY->confidentialityOffset;
11770 +        txScParams.cipherSuite              = cipherSuite;
11771 +        p_Params = &txScParams;
11772 +    }
11773 +
11774 +    for (i=0;i<numOfSc;i++)
11775 +        if (!p_ScTable[i].inUse)
11776 +            break;
11777 +    if (i == numOfSc)
11778 +    {
11779 +        REPORT_ERROR(MAJOR, E_FULL, ("FM MACSEC SECY SC"));
11780 +        return NULL;
11781 +    }
11782 +
11783 +    if (type == e_SC_RX)
11784 +    {
11785 +        ((t_RxScParams *)p_Params)->scId = p_ScTable[i].scId;
11786 +        ((t_RxScParams *)p_Params)->sci  = sci;
11787 +        if ((err = FmMacsecCreateRxSc(p_FmMacsecSecY->h_FmMacsec, (t_RxScParams *)p_Params)) != E_OK)
11788 +        {
11789 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY RX SC"));
11790 +            return NULL;
11791 +        }
11792 +    }
11793 +    else
11794 +    {
11795 +        ((t_TxScParams *)p_Params)->scId = p_ScTable[i].scId;
11796 +        ((t_TxScParams *)p_Params)->sci  = sci;
11797 +        if ((err = FmMacsecCreateTxSc(p_FmMacsecSecY->h_FmMacsec, (t_TxScParams *)p_Params)) != E_OK)
11798 +        {
11799 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY TX SC"));
11800 +            return NULL;
11801 +        }
11802 +    }
11803 +
11804 +    p_ScTable[i].inUse = TRUE;
11805 +    return &p_ScTable[i];
11806 +}
11807 +
11808 +static t_Error FmMacsecSecYDeleteSc(t_FmMacsecSecY *p_FmMacsecSecY, t_SecYSc *p_FmSecYSc, e_ScType type)
11809 +{
11810 +    t_Error         err = E_OK;
11811 +
11812 +    ASSERT_COND(p_FmMacsecSecY);
11813 +    ASSERT_COND(p_FmMacsecSecY->h_FmMacsec);
11814 +    ASSERT_COND(p_FmSecYSc);
11815 +
11816 +    if (type == e_SC_RX)
11817 +    {
11818 +        if ((err = FmMacsecDeleteRxSc(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId)) != E_OK)
11819 +            RETURN_ERROR(MINOR, err, NO_MSG);
11820 +    }
11821 +    else
11822 +        if ((err = FmMacsecDeleteTxSc(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId)) != E_OK)
11823 +            RETURN_ERROR(MINOR, err, NO_MSG);
11824 +
11825 +    p_FmSecYSc->inUse = FALSE;
11826 +
11827 +    return err;
11828 +}
11829 +
11830 +/****************************************/
11831 +/*       API Init unit functions        */
11832 +/****************************************/
11833 +t_Handle FM_MACSEC_SECY_Config(t_FmMacsecSecYParams *p_FmMacsecSecYParam)
11834 +{
11835 +    t_FmMacsecSecY  *p_FmMacsecSecY;
11836 +
11837 +    /* Allocate FM MACSEC structure */
11838 +    p_FmMacsecSecY = (t_FmMacsecSecY *) XX_Malloc(sizeof(t_FmMacsecSecY));
11839 +    if (!p_FmMacsecSecY)
11840 +    {
11841 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY driver structure"));
11842 +        return NULL;
11843 +    }
11844 +    memset(p_FmMacsecSecY, 0, sizeof(t_FmMacsecSecY));
11845 +
11846 +    /* Allocate the FM MACSEC driver's parameters structure */
11847 +    p_FmMacsecSecY->p_FmMacsecSecYDriverParam = (t_FmMacsecSecYDriverParam *)XX_Malloc(sizeof(t_FmMacsecSecYDriverParam));
11848 +    if (!p_FmMacsecSecY->p_FmMacsecSecYDriverParam)
11849 +    {
11850 +        XX_Free(p_FmMacsecSecY);
11851 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY driver parameters"));
11852 +        return NULL;
11853 +    }
11854 +    memset(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, 0, sizeof(t_FmMacsecSecYDriverParam));
11855 +
11856 +    /* Initialize FM MACSEC SECY parameters which will be kept by the driver */
11857 +    p_FmMacsecSecY->h_FmMacsec              = p_FmMacsecSecYParam->h_FmMacsec;
11858 +    p_FmMacsecSecY->f_Event                 = p_FmMacsecSecYParam->f_Event;
11859 +    p_FmMacsecSecY->f_Exception             = p_FmMacsecSecYParam->f_Exception;
11860 +    p_FmMacsecSecY->h_App                   = p_FmMacsecSecYParam->h_App;
11861 +    p_FmMacsecSecY->confidentialityEnable   = DEFAULT_confidentialityEnable;
11862 +    p_FmMacsecSecY->confidentialityOffset   = DEFAULT_confidentialityOffset;
11863 +    p_FmMacsecSecY->validateFrames          = DEFAULT_validateFrames;
11864 +    p_FmMacsecSecY->replayProtect           = DEFAULT_replayEnable;
11865 +    p_FmMacsecSecY->replayWindow            = DEFAULT_replayWindow;
11866 +    p_FmMacsecSecY->protectFrames           = DEFAULT_protectFrames;
11867 +    p_FmMacsecSecY->sciInsertionMode        = DEFAULT_sciInsertionMode;
11868 +    p_FmMacsecSecY->isPointToPoint          = DEFAULT_ptp;
11869 +    p_FmMacsecSecY->numOfRxSc               = p_FmMacsecSecYParam->numReceiveChannels;
11870 +    p_FmMacsecSecY->numOfTxSc               = DEFAULT_numOfTxSc;
11871 +    p_FmMacsecSecY->exceptions              = DEFAULT_exceptions;
11872 +    p_FmMacsecSecY->events                  = DEFAULT_events;
11873 +
11874 +    memcpy(&p_FmMacsecSecY->p_FmMacsecSecYDriverParam->txScParams,
11875 +           &p_FmMacsecSecYParam->txScParams,
11876 +           sizeof(t_FmMacsecSecYSCParams));
11877 +    return p_FmMacsecSecY;
11878 +}
11879 +
11880 +t_Error FM_MACSEC_SECY_Init(t_Handle h_FmMacsecSecY)
11881 +{
11882 +    t_FmMacsecSecY              *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
11883 +    t_FmMacsecSecYDriverParam   *p_FmMacsecSecYDriverParam = NULL;
11884 +    uint32_t                    rxScIds[NUM_OF_RX_SC], txScIds[NUM_OF_TX_SC], i, j;
11885 +    t_Error                     err;
11886 +
11887 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
11888 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_HANDLE);
11889 +
11890 +    CHECK_INIT_PARAMETERS(p_FmMacsecSecY, CheckFmMacsecSecYParameters);
11891 +
11892 +    p_FmMacsecSecYDriverParam = p_FmMacsecSecY->p_FmMacsecSecYDriverParam;
11893 +
11894 +    if ((p_FmMacsecSecY->isPointToPoint) &&
11895 +        ((err = FmMacsecSetPTP(p_FmMacsecSecY->h_FmMacsec, TRUE)) != E_OK))
11896 +        RETURN_ERROR(MAJOR, err, ("Can't set Poin-to-Point"));
11897 +
11898 +    /* Rx Sc Allocation */
11899 +    p_FmMacsecSecY->p_RxSc = (t_SecYSc *)XX_Malloc(sizeof(t_SecYSc) * p_FmMacsecSecY->numOfRxSc);
11900 +    if (!p_FmMacsecSecY->p_RxSc)
11901 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY RX SC"));
11902 +    memset(p_FmMacsecSecY->p_RxSc, 0, sizeof(t_SecYSc) * p_FmMacsecSecY->numOfRxSc);
11903 +    if ((err = FmMacsecAllocScs(p_FmMacsecSecY->h_FmMacsec, e_SC_RX, p_FmMacsecSecY->isPointToPoint, p_FmMacsecSecY->numOfRxSc, rxScIds)) != E_OK)
11904 +    {
11905 +        if (p_FmMacsecSecY->p_TxSc)
11906 +            XX_Free(p_FmMacsecSecY->p_TxSc);
11907 +        if (p_FmMacsecSecY->p_RxSc)
11908 +            XX_Free(p_FmMacsecSecY->p_RxSc);
11909 +        return ERROR_CODE(err);
11910 +    }
11911 +    for (i=0; i<p_FmMacsecSecY->numOfRxSc; i++)
11912 +    {
11913 +        p_FmMacsecSecY->p_RxSc[i].scId  = rxScIds[i];
11914 +        p_FmMacsecSecY->p_RxSc[i].type  = e_SC_RX;
11915 +        for (j=0; j<MAX_NUM_OF_SA_PER_SC;j++)
11916 +            p_FmMacsecSecY->p_RxSc[i].sa[j].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
11917 +    }
11918 +
11919 +    /* Tx Sc Allocation */
11920 +    p_FmMacsecSecY->p_TxSc = (t_SecYSc *)XX_Malloc(sizeof(t_SecYSc) * p_FmMacsecSecY->numOfTxSc);
11921 +    if (!p_FmMacsecSecY->p_TxSc)
11922 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY TX SC"));
11923 +    memset(p_FmMacsecSecY->p_TxSc, 0, sizeof(t_SecYSc) * p_FmMacsecSecY->numOfTxSc);
11924 +
11925 +    if ((err = FmMacsecAllocScs(p_FmMacsecSecY->h_FmMacsec, e_SC_TX, p_FmMacsecSecY->isPointToPoint, p_FmMacsecSecY->numOfTxSc, txScIds)) != E_OK)
11926 +    {
11927 +        if (p_FmMacsecSecY->p_TxSc)
11928 +            XX_Free(p_FmMacsecSecY->p_TxSc);
11929 +        if (p_FmMacsecSecY->p_RxSc)
11930 +            XX_Free(p_FmMacsecSecY->p_RxSc);
11931 +        return ERROR_CODE(err);
11932 +    }
11933 +    for (i=0; i<p_FmMacsecSecY->numOfTxSc; i++)
11934 +    {
11935 +        p_FmMacsecSecY->p_TxSc[i].scId  = txScIds[i];
11936 +        p_FmMacsecSecY->p_TxSc[i].type  = e_SC_TX;
11937 +        for (j=0; j<MAX_NUM_OF_SA_PER_SC;j++)
11938 +            p_FmMacsecSecY->p_TxSc[i].sa[j].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
11939 +        FmMacsecRegisterIntr(p_FmMacsecSecY->h_FmMacsec,
11940 +                             e_FM_MACSEC_MOD_SC_TX,
11941 +                             (uint8_t)txScIds[i],
11942 +                             e_FM_INTR_TYPE_ERR,
11943 +                             FmMacsecSecYExceptionsIsr,
11944 +                             p_FmMacsecSecY);
11945 +        FmMacsecRegisterIntr(p_FmMacsecSecY->h_FmMacsec,
11946 +                             e_FM_MACSEC_MOD_SC_TX,
11947 +                             (uint8_t)txScIds[i],
11948 +                             e_FM_INTR_TYPE_NORMAL,
11949 +                             FmMacsecSecYEventsIsr,
11950 +                             p_FmMacsecSecY);
11951 +
11952 +        if (p_FmMacsecSecY->exceptions & FM_MACSEC_SECY_EX_FRAME_DISCARDED)
11953 +            FmMacsecSetException(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EX_TX_SC, txScIds[i], TRUE);
11954 +        if (p_FmMacsecSecY->events & FM_MACSEC_SECY_EV_NEXT_PN)
11955 +            FmMacsecSetEvent(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EV_TX_SC_NEXT_PN, txScIds[i], TRUE);
11956 +    }
11957 +
11958 +    FmMacsecSecYCreateSc(p_FmMacsecSecY,
11959 +                         p_FmMacsecSecYDriverParam->txScParams.sci,
11960 +                         p_FmMacsecSecYDriverParam->txScParams.cipherSuite,
11961 +                         e_SC_TX);
11962 +    XX_Free(p_FmMacsecSecYDriverParam);
11963 +    p_FmMacsecSecY->p_FmMacsecSecYDriverParam = NULL;
11964 +
11965 +    return E_OK;
11966 +}
11967 +
11968 +t_Error FM_MACSEC_SECY_Free(t_Handle h_FmMacsecSecY)
11969 +{
11970 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
11971 +    t_Error         err             = E_OK;
11972 +    uint32_t        rxScIds[NUM_OF_RX_SC], txScIds[NUM_OF_TX_SC], i;
11973 +
11974 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
11975 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
11976 +
11977 +    if (p_FmMacsecSecY->isPointToPoint)
11978 +        FmMacsecSetPTP(p_FmMacsecSecY->h_FmMacsec, FALSE);
11979 +    if (p_FmMacsecSecY->p_RxSc)
11980 +    {
11981 +        for (i=0; i<p_FmMacsecSecY->numOfRxSc; i++)
11982 +            rxScIds[i] = p_FmMacsecSecY->p_RxSc[i].scId;
11983 +        if ((err = FmMacsecFreeScs(p_FmMacsecSecY->h_FmMacsec, e_SC_RX, p_FmMacsecSecY->numOfRxSc, rxScIds)) != E_OK)
11984 +            return ERROR_CODE(err);
11985 +        XX_Free(p_FmMacsecSecY->p_RxSc);
11986 +    }
11987 +    if (p_FmMacsecSecY->p_TxSc)
11988 +    {
11989 +       FmMacsecSecYDeleteSc(p_FmMacsecSecY, &p_FmMacsecSecY->p_TxSc[0], e_SC_TX);
11990 +
11991 +       for (i=0; i<p_FmMacsecSecY->numOfTxSc; i++) {
11992 +             txScIds[i] = p_FmMacsecSecY->p_TxSc[i].scId;
11993 +            FmMacsecUnregisterIntr(p_FmMacsecSecY->h_FmMacsec,
11994 +                                 e_FM_MACSEC_MOD_SC_TX,
11995 +                                 (uint8_t)txScIds[i],
11996 +                                 e_FM_INTR_TYPE_ERR);
11997 +            FmMacsecUnregisterIntr(p_FmMacsecSecY->h_FmMacsec,
11998 +                                 e_FM_MACSEC_MOD_SC_TX,
11999 +                                 (uint8_t)txScIds[i],
12000 +                                 e_FM_INTR_TYPE_NORMAL);
12001 +
12002 +            if (p_FmMacsecSecY->exceptions & FM_MACSEC_SECY_EX_FRAME_DISCARDED)
12003 +                FmMacsecSetException(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EX_TX_SC, txScIds[i], FALSE);
12004 +            if (p_FmMacsecSecY->events & FM_MACSEC_SECY_EV_NEXT_PN)
12005 +                FmMacsecSetEvent(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EV_TX_SC_NEXT_PN, txScIds[i], FALSE);
12006 +       }
12007 +
12008 +        if ((err = FmMacsecFreeScs(p_FmMacsecSecY->h_FmMacsec, e_SC_TX, p_FmMacsecSecY->numOfTxSc, txScIds)) != E_OK)
12009 +            return ERROR_CODE(err);
12010 +        XX_Free(p_FmMacsecSecY->p_TxSc);
12011 +    }
12012 +
12013 +    XX_Free(p_FmMacsecSecY);
12014 +
12015 +    return err;
12016 +}
12017 +
12018 +t_Error FM_MACSEC_SECY_ConfigSciInsertionMode(t_Handle h_FmMacsecSecY, e_FmMacsecSciInsertionMode sciInsertionMode)
12019 +{
12020 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12021 +
12022 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12023 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12024 +
12025 +    p_FmMacsecSecY->sciInsertionMode = sciInsertionMode;
12026 +
12027 +    return E_OK;
12028 +}
12029 +
12030 +t_Error FM_MACSEC_SECY_ConfigProtectFrames(t_Handle h_FmMacsecSecY, bool protectFrames)
12031 +{
12032 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12033 +
12034 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12035 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12036 +
12037 +    p_FmMacsecSecY->protectFrames = protectFrames;
12038 +
12039 +    return E_OK;
12040 +}
12041 +
12042 +t_Error FM_MACSEC_SECY_ConfigReplayWindow(t_Handle h_FmMacsecSecY, bool replayProtect, uint32_t replayWindow)
12043 +{
12044 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12045 +
12046 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12047 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12048 +
12049 +    p_FmMacsecSecY->replayProtect   = replayProtect;
12050 +    p_FmMacsecSecY->replayWindow    = replayWindow;
12051 +
12052 +    return E_OK;
12053 +}
12054 +
12055 +t_Error FM_MACSEC_SECY_ConfigValidationMode(t_Handle h_FmMacsecSecY, e_FmMacsecValidFrameBehavior validateFrames)
12056 +{
12057 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12058 +
12059 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12060 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12061 +
12062 +    p_FmMacsecSecY->validateFrames = validateFrames;
12063 +
12064 +    return E_OK;
12065 +}
12066 +
12067 +t_Error FM_MACSEC_SECY_ConfigConfidentiality(t_Handle h_FmMacsecSecY, bool confidentialityEnable, uint16_t confidentialityOffset)
12068 +{
12069 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12070 +
12071 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12072 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12073 +
12074 +    p_FmMacsecSecY->confidentialityEnable = confidentialityEnable;
12075 +    p_FmMacsecSecY->confidentialityOffset = confidentialityOffset;
12076 +
12077 +    return E_OK;
12078 +}
12079 +
12080 +t_Error FM_MACSEC_SECY_ConfigPointToPoint(t_Handle h_FmMacsecSecY)
12081 +{
12082 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12083 +
12084 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12085 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12086 +
12087 +    p_FmMacsecSecY->numOfRxSc = 1;
12088 +    p_FmMacsecSecY->isPointToPoint = TRUE;
12089 +    p_FmMacsecSecY->sciInsertionMode = e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP;
12090 +
12091 +    return E_OK;
12092 +}
12093 +
12094 +t_Error FM_MACSEC_SECY_ConfigException(t_Handle h_FmMacsecSecY, e_FmMacsecSecYExceptions exception, bool enable)
12095 +{
12096 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12097 +    uint32_t        bitMask         = 0;
12098 +
12099 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12100 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12101 +
12102 +    GET_EXCEPTION_FLAG(bitMask, exception);
12103 +    if (bitMask)
12104 +    {
12105 +        if (enable)
12106 +            p_FmMacsecSecY->exceptions |= bitMask;
12107 +        else
12108 +            p_FmMacsecSecY->exceptions &= ~bitMask;
12109 +    }
12110 +    else
12111 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
12112 +
12113 +    return E_OK;
12114 +}
12115 +
12116 +t_Error FM_MACSEC_SECY_ConfigEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable)
12117 +{
12118 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12119 +    uint32_t        bitMask         = 0;
12120 +
12121 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12122 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12123 +
12124 +    GET_EVENT_FLAG(bitMask, event);
12125 +    if (bitMask)
12126 +    {
12127 +        if (enable)
12128 +            p_FmMacsecSecY->events |= bitMask;
12129 +        else
12130 +            p_FmMacsecSecY->events &= ~bitMask;
12131 +    }
12132 +    else
12133 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined event"));
12134 +
12135 +    return E_OK;
12136 +}
12137 +
12138 +t_Handle FM_MACSEC_SECY_CreateRxSc(t_Handle h_FmMacsecSecY, t_FmMacsecSecYSCParams *p_ScParams)
12139 +{
12140 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12141 +
12142 +    SANITY_CHECK_RETURN_VALUE(p_FmMacsecSecY, E_INVALID_HANDLE, NULL);
12143 +    SANITY_CHECK_RETURN_VALUE(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE, NULL);
12144 +    SANITY_CHECK_RETURN_VALUE(p_ScParams, E_NULL_POINTER, NULL);
12145 +    SANITY_CHECK_RETURN_VALUE(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE, NULL);
12146 +
12147 +    return FmMacsecSecYCreateSc(p_FmMacsecSecY, p_ScParams->sci, p_ScParams->cipherSuite, e_SC_RX);
12148 +}
12149 +
12150 +t_Error FM_MACSEC_SECY_DeleteRxSc(t_Handle h_FmMacsecSecY, t_Handle h_Sc)
12151 +{
12152 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12153 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12154 +
12155 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12156 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12157 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12158 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12159 +
12160 +    return FmMacsecSecYDeleteSc(p_FmMacsecSecY, p_FmSecYSc, e_SC_RX);
12161 +}
12162 +
12163 +t_Error FM_MACSEC_SECY_CreateRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key)
12164 +{
12165 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12166 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12167 +    t_Error         err = E_OK;
12168 +
12169 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12170 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12171 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12172 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12173 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12174 +
12175 +    if (p_FmSecYSc->sa[an].saId != SECY_AN_FREE_VALUE)
12176 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is already assigned",an));
12177 +
12178 +    if ((err = FmMacsecCreateRxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, (e_ScSaId)p_FmSecYSc->numOfSa, an, lowestPn, key)) != E_OK)
12179 +        RETURN_ERROR(MINOR, err, NO_MSG);
12180 +
12181 +    p_FmSecYSc->sa[an].saId = (e_ScSaId)p_FmSecYSc->numOfSa++;
12182 +    return err;
12183 +}
12184 +
12185 +t_Error FM_MACSEC_SECY_DeleteRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an)
12186 +{
12187 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12188 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12189 +    t_Error         err             = E_OK;
12190 +
12191 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12192 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12193 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12194 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12195 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12196 +
12197 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12198 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is already deleted",an));
12199 +
12200 +    if ((err = FmMacsecDeleteRxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId)) != E_OK)
12201 +        RETURN_ERROR(MINOR, err, NO_MSG);
12202 +
12203 +    p_FmSecYSc->numOfSa--;
12204 +    p_FmSecYSc->sa[an].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
12205 +    /* TODO - check if statistics need to be read*/
12206 +    return err;
12207 +}
12208 +
12209 +t_Error FM_MACSEC_SECY_RxSaEnableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an)
12210 +{
12211 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12212 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12213 +    t_Error         err = E_OK;
12214 +
12215 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12216 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12217 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12218 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12219 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12220 +
12221 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12222 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
12223 +
12224 +    if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, TRUE)) != E_OK)
12225 +        RETURN_ERROR(MINOR, err, NO_MSG);
12226 +
12227 +    p_FmSecYSc->sa[an].active = TRUE;
12228 +    return err;
12229 +}
12230 +
12231 +t_Error FM_MACSEC_SECY_RxSaDisableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an)
12232 +{
12233 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12234 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12235 +    t_Error         err = E_OK;
12236 +
12237 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12238 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12239 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12240 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12241 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12242 +
12243 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12244 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
12245 +
12246 +    if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, FALSE)) != E_OK)
12247 +        RETURN_ERROR(MINOR, err, NO_MSG);
12248 +
12249 +    p_FmSecYSc->sa[an].active = FALSE;
12250 +    return err;
12251 +}
12252 +
12253 +t_Error FM_MACSEC_SECY_RxSaUpdateNextPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtNextPN)
12254 +{
12255 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12256 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12257 +    t_Error         err = E_OK;
12258 +
12259 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12260 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12261 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12262 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12263 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12264 +
12265 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12266 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
12267 +
12268 +    if ((err = FmMacsecRxSaUpdateNextPn(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, updtNextPN)) != E_OK)
12269 +        RETURN_ERROR(MINOR, err, NO_MSG);
12270 +
12271 +    return err;
12272 +}
12273 +
12274 +t_Error FM_MACSEC_SECY_RxSaUpdateLowestPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtLowestPN)
12275 +{
12276 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12277 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12278 +    t_Error         err = E_OK;
12279 +
12280 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12281 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12282 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12283 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12284 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12285 +
12286 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12287 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
12288 +
12289 +    if ((err = FmMacsecRxSaUpdateLowestPn(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, updtLowestPN)) != E_OK)
12290 +        RETURN_ERROR(MINOR, err, NO_MSG);
12291 +
12292 +    return err;
12293 +}
12294 +
12295 +t_Error FM_MACSEC_SECY_RxSaModifyKey(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, macsecSAKey_t key)
12296 +{
12297 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12298 +    t_SecYSc        *p_FmSecYSc     = (t_SecYSc *)h_Sc;
12299 +    t_Error         err = E_OK;
12300 +
12301 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12302 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12303 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12304 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12305 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12306 +
12307 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12308 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
12309 +
12310 +    if (p_FmSecYSc->sa[an].active)
12311 +        if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, FALSE)) != E_OK)
12312 +            RETURN_ERROR(MINOR, err, NO_MSG);
12313 +
12314 +    /* TODO - statistics should be read */
12315 +
12316 +    if ((err = FmMacsecCreateRxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, an, 1, key)) != E_OK)
12317 +        RETURN_ERROR(MINOR, err, NO_MSG);
12318 +
12319 +    if (p_FmSecYSc->sa[an].active)
12320 +        if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, TRUE)) != E_OK)
12321 +            RETURN_ERROR(MINOR, err, NO_MSG);
12322 +    return err;
12323 +}
12324 +
12325 +
12326 +t_Error FM_MACSEC_SECY_CreateTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an, macsecSAKey_t key)
12327 +{
12328 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12329 +    t_SecYSc        *p_FmSecYSc;
12330 +    t_Error         err = E_OK;
12331 +
12332 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12333 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12334 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12335 +    p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
12336 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12337 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12338 +
12339 +    if (p_FmSecYSc->sa[an].saId != SECY_AN_FREE_VALUE)
12340 +        RETURN_ERROR(MINOR, err, ("An %d is already assigned",an));
12341 +
12342 +    if ((err = FmMacsecCreateTxSa(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, (e_ScSaId)p_FmSecYSc->numOfSa, key)) != E_OK)
12343 +        RETURN_ERROR(MINOR, err, NO_MSG);
12344 +
12345 +    p_FmSecYSc->sa[an].saId = (e_ScSaId)p_FmSecYSc->numOfSa++;
12346 +    return err;
12347 +}
12348 +
12349 +t_Error FM_MACSEC_SECY_DeleteTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an)
12350 +{
12351 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12352 +    t_SecYSc        *p_FmSecYSc;
12353 +    t_Error         err = E_OK;
12354 +
12355 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12356 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12357 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12358 +    p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
12359 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12360 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12361 +
12362 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12363 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is already deleted",an));
12364 +
12365 +    if ((err = FmMacsecDeleteTxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId)) != E_OK)
12366 +        RETURN_ERROR(MINOR, err, NO_MSG);
12367 +
12368 +    p_FmSecYSc->numOfSa--;
12369 +    p_FmSecYSc->sa[an].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
12370 +    /* TODO - check if statistics need to be read*/
12371 +    return err;
12372 +}
12373 +
12374 +t_Error FM_MACSEC_SECY_TxSaModifyKey(t_Handle h_FmMacsecSecY, macsecAN_t nextActiveAn, macsecSAKey_t key)
12375 +{
12376 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12377 +    t_SecYSc        *p_FmSecYSc;
12378 +    macsecAN_t      currentAn;
12379 +    t_Error         err = E_OK;
12380 +
12381 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12382 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12383 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12384 +    p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
12385 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12386 +    SANITY_CHECK_RETURN_ERROR(nextActiveAn < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12387 +
12388 +    if ((err = FmMacsecTxSaGetActive(p_FmMacsecSecY->h_FmMacsec,
12389 +                                     p_FmSecYSc->scId,
12390 +                                     &currentAn)) != E_OK)
12391 +        RETURN_ERROR(MINOR, err, NO_MSG);
12392 +
12393 +    if ((err = FmMacsecTxSaSetActive(p_FmMacsecSecY->h_FmMacsec,
12394 +                                     p_FmSecYSc->scId,
12395 +                                     p_FmSecYSc->sa[nextActiveAn].saId,
12396 +                                     nextActiveAn)) != E_OK)
12397 +        RETURN_ERROR(MINOR, err, NO_MSG);
12398 +
12399 +    /* TODO - statistics should be read */
12400 +
12401 +    if ((err = FmMacsecCreateTxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[currentAn].saId, key)) != E_OK)
12402 +        RETURN_ERROR(MINOR, err, NO_MSG);
12403 +
12404 +    return err;
12405 +}
12406 +
12407 +t_Error FM_MACSEC_SECY_TxSaSetActive(t_Handle h_FmMacsecSecY, macsecAN_t an)
12408 +{
12409 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12410 +    t_SecYSc        *p_FmSecYSc;
12411 +    t_Error         err = E_OK;
12412 +
12413 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12414 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12415 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12416 +    p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
12417 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12418 +    SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
12419 +
12420 +    if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
12421 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
12422 +
12423 +    if ((err = FmMacsecTxSaSetActive(p_FmMacsecSecY->h_FmMacsec,
12424 +                                     p_FmSecYSc->scId,
12425 +                                     p_FmSecYSc->sa[an].saId,
12426 +                                     an)) != E_OK)
12427 +        RETURN_ERROR(MINOR, err, NO_MSG);
12428 +
12429 +    return err;
12430 +}
12431 +
12432 +t_Error FM_MACSEC_SECY_TxSaGetActive(t_Handle h_FmMacsecSecY, macsecAN_t *p_An)
12433 +{
12434 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12435 +    t_SecYSc        *p_FmSecYSc;
12436 +    t_Error         err = E_OK;
12437 +
12438 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12439 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12440 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12441 +    p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
12442 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12443 +    SANITY_CHECK_RETURN_ERROR(p_An, E_INVALID_HANDLE);
12444 +
12445 +    if ((err = FmMacsecTxSaGetActive(p_FmMacsecSecY->h_FmMacsec,
12446 +                                     p_FmSecYSc->scId,
12447 +                                     p_An)) != E_OK)
12448 +        RETURN_ERROR(MINOR, err, NO_MSG);
12449 +
12450 +    return err;
12451 +}
12452 +
12453 +t_Error FM_MACSEC_SECY_GetRxScPhysId(t_Handle h_FmMacsecSecY, t_Handle h_Sc, uint32_t *p_ScPhysId)
12454 +{
12455 +    t_SecYSc        *p_FmSecYSc = (t_SecYSc *)h_Sc;
12456 +    t_Error         err = E_OK;
12457 +
12458 +    SANITY_CHECK_RETURN_ERROR(h_FmMacsecSecY, E_INVALID_HANDLE);
12459 +    SANITY_CHECK_RETURN_ERROR(((t_FmMacsecSecY *)h_FmMacsecSecY)->h_FmMacsec, E_INVALID_HANDLE);
12460 +    SANITY_CHECK_RETURN_ERROR(!((t_FmMacsecSecY *)h_FmMacsecSecY)->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12461 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12462 +#ifdef DISABLE_SANITY_CHECKS
12463 +    UNUSED(h_FmMacsecSecY);
12464 +#endif /* DISABLE_SANITY_CHECKS */
12465 +
12466 +    *p_ScPhysId = p_FmSecYSc->scId;
12467 +    return err;
12468 +}
12469 +
12470 +t_Error FM_MACSEC_SECY_GetTxScPhysId(t_Handle h_FmMacsecSecY, uint32_t *p_ScPhysId)
12471 +{
12472 +    t_FmMacsecSecY  *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
12473 +    t_SecYSc        *p_FmSecYSc;
12474 +    t_Error         err = E_OK;
12475 +
12476 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
12477 +    SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
12478 +    SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
12479 +    p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
12480 +    SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
12481 +
12482 +    *p_ScPhysId = p_FmSecYSc->scId;
12483 +    return err;
12484 +}
12485 +
12486 +t_Error FM_MACSEC_SECY_SetException(t_Handle h_FmMacsecSecY, e_FmMacsecExceptions exception, bool enable)
12487 +{
12488 +   UNUSED(h_FmMacsecSecY);UNUSED(exception);UNUSED(enable);
12489 +   RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12490 +}
12491 +
12492 +t_Error FM_MACSEC_SECY_SetEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable)
12493 +{
12494 +    UNUSED(h_FmMacsecSecY);UNUSED(event);UNUSED(enable);
12495 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12496 +}
12497 +
12498 +t_Error FM_MACSEC_SECY_GetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYStatistics *p_Statistics)
12499 +{
12500 +    UNUSED(h_FmMacsecSecY);UNUSED(p_Statistics);
12501 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12502 +}
12503 +
12504 +t_Error FM_MACSEC_SECY_RxScGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, t_FmMacsecSecYRxScStatistics *p_Statistics)
12505 +{
12506 +    UNUSED(h_FmMacsecSecY);UNUSED(h_Sc);UNUSED(p_Statistics);
12507 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12508 +}
12509 +
12510 +t_Error FM_MACSEC_SECY_RxSaGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, t_FmMacsecSecYRxSaStatistics *p_Statistics)
12511 +{
12512 +    UNUSED(h_FmMacsecSecY);UNUSED(h_Sc);UNUSED(an);UNUSED(p_Statistics);
12513 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12514 +}
12515 +
12516 +t_Error FM_MACSEC_SECY_TxScGetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYTxScStatistics *p_Statistics)
12517 +{
12518 +    UNUSED(h_FmMacsecSecY);UNUSED(p_Statistics);
12519 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12520 +}
12521 +
12522 +t_Error FM_MACSEC_SECY_TxSaGetStatistics(t_Handle h_FmMacsecSecY, macsecAN_t an, t_FmMacsecSecYTxSaStatistics *p_Statistics)
12523 +{
12524 +    UNUSED(h_FmMacsecSecY);UNUSED(an);UNUSED(p_Statistics);
12525 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
12526 +}
12527 +
12528 --- /dev/null
12529 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.h
12530 @@ -0,0 +1,144 @@
12531 +/*
12532 + * Copyright 2008-2015 Freescale Semiconductor Inc.
12533 + *
12534 + * Redistribution and use in source and binary forms, with or without
12535 + * modification, are permitted provided that the following conditions are met:
12536 + *     * Redistributions of source code must retain the above copyright
12537 + *       notice, this list of conditions and the following disclaimer.
12538 + *     * Redistributions in binary form must reproduce the above copyright
12539 + *       notice, this list of conditions and the following disclaimer in the
12540 + *       documentation and/or other materials provided with the distribution.
12541 + *     * Neither the name of Freescale Semiconductor nor the
12542 + *       names of its contributors may be used to endorse or promote products
12543 + *       derived from this software without specific prior written permission.
12544 + *
12545 + *
12546 + * ALTERNATIVELY, this software may be distributed under the terms of the
12547 + * GNU General Public License ("GPL") as published by the Free Software
12548 + * Foundation, either version 2 of that License or (at your option) any
12549 + * later version.
12550 + *
12551 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
12552 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
12553 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
12554 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
12555 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
12556 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
12557 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
12558 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
12559 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
12560 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
12561 + */
12562 +
12563 +/******************************************************************************
12564 + @File          fm_macsec_secy.h
12565 +
12566 + @Description   FM MACSEC SecY internal structures and definitions.
12567 +*//***************************************************************************/
12568 +#ifndef __FM_MACSEC_SECY_H
12569 +#define __FM_MACSEC_SECY_H
12570 +
12571 +#include "error_ext.h"
12572 +#include "std_ext.h"
12573 +
12574 +#include "fm_macsec.h"
12575 +
12576 +
12577 +/**************************************************************************//**
12578 + @Description       Exceptions
12579 +*//***************************************************************************/
12580 +
12581 +#define FM_MACSEC_SECY_EX_FRAME_DISCARDED           0x80000000
12582 +
12583 +#define GET_EXCEPTION_FLAG(bitMask, exception)  switch (exception){     \
12584 +    case e_FM_MACSEC_SECY_EX_FRAME_DISCARDED:                           \
12585 +        bitMask = FM_MACSEC_SECY_EX_FRAME_DISCARDED; break;             \
12586 +    default: bitMask = 0;break;}
12587 +
12588 +/**************************************************************************//**
12589 + @Description       Events
12590 +*//***************************************************************************/
12591 +
12592 +#define FM_MACSEC_SECY_EV_NEXT_PN                        0x80000000
12593 +
12594 +#define GET_EVENT_FLAG(bitMask, event)          switch (event){     \
12595 +    case e_FM_MACSEC_SECY_EV_NEXT_PN:                               \
12596 +        bitMask = FM_MACSEC_SECY_EV_NEXT_PN; break;                 \
12597 +    default: bitMask = 0;break;}
12598 +
12599 +/**************************************************************************//**
12600 + @Description       Defaults
12601 +*//***************************************************************************/
12602 +
12603 +#define DEFAULT_exceptions                  (FM_MACSEC_SECY_EX_FRAME_DISCARDED)
12604 +#define DEFAULT_events                      (FM_MACSEC_SECY_EV_NEXT_PN)
12605 +#define DEFAULT_numOfTxSc                   1
12606 +#define DEFAULT_confidentialityEnable       FALSE
12607 +#define DEFAULT_confidentialityOffset       0
12608 +#define DEFAULT_sciInsertionMode            e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG
12609 +#define DEFAULT_validateFrames              e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT
12610 +#define DEFAULT_replayEnable                FALSE
12611 +#define DEFAULT_replayWindow                0
12612 +#define DEFAULT_protectFrames               TRUE
12613 +#define DEFAULT_ptp                         FALSE
12614 +
12615 +/**************************************************************************//**
12616 + @Description       General defines
12617 +*//***************************************************************************/
12618 +
12619 +#define SECY_AN_FREE_VALUE              MAX_NUM_OF_SA_PER_SC
12620 +
12621 +
12622 +typedef struct {
12623 +    e_ScSaId                            saId;
12624 +    bool                                active;
12625 +    union {
12626 +        t_FmMacsecSecYRxSaStatistics    rxSaStatistics;
12627 +        t_FmMacsecSecYTxSaStatistics    txSaStatistics;
12628 +    };
12629 +} t_SecYSa;
12630 +
12631 +typedef struct {
12632 +    bool                                inUse;
12633 +    uint32_t                            scId;
12634 +    e_ScType                            type;
12635 +    uint8_t                             numOfSa;
12636 +    t_SecYSa                            sa[MAX_NUM_OF_SA_PER_SC];
12637 +    union {
12638 +        t_FmMacsecSecYRxScStatistics    rxScStatistics;
12639 +        t_FmMacsecSecYTxScStatistics    txScStatistics;
12640 +    };
12641 +} t_SecYSc;
12642 +
12643 +typedef struct {
12644 +    t_FmMacsecSecYSCParams              txScParams;             /**< Tx SC Params */
12645 +} t_FmMacsecSecYDriverParam;
12646 +
12647 +typedef struct {
12648 +    t_Handle                            h_FmMacsec;
12649 +    bool                                confidentialityEnable;  /**< TRUE  - confidentiality protection and integrity protection
12650 +                                                                     FALSE - no confidentiality protection, only integrity protection*/
12651 +    uint16_t                            confidentialityOffset;  /**< The number of initial octets of each MSDU without confidentiality protection
12652 +                                                                     common values are 0, 30, and 50 */
12653 +    bool                                replayProtect;          /**< replay protection function mode */
12654 +    uint32_t                            replayWindow;           /**< the size of the replay window */
12655 +    e_FmMacsecValidFrameBehavior        validateFrames;         /**< validation function mode */
12656 +    e_FmMacsecSciInsertionMode          sciInsertionMode;
12657 +    bool                                protectFrames;
12658 +    bool                                isPointToPoint;
12659 +    e_FmMacsecSecYCipherSuite           cipherSuite;            /**< Cipher suite to be used for this SecY */
12660 +    uint32_t                            numOfRxSc;              /**< Number of receive channels */
12661 +    uint32_t                            numOfTxSc;              /**< Number of transmit channels */
12662 +    t_SecYSc                            *p_RxSc;
12663 +    t_SecYSc                            *p_TxSc;
12664 +    uint32_t                            events;
12665 +    uint32_t                            exceptions;
12666 +    t_FmMacsecSecYExceptionsCallback    *f_Exception;           /**< TODO */
12667 +    t_FmMacsecSecYEventsCallback        *f_Event;               /**< TODO */
12668 +    t_Handle                            h_App;
12669 +    t_FmMacsecSecYStatistics            statistics;
12670 +    t_FmMacsecSecYDriverParam           *p_FmMacsecSecYDriverParam;
12671 +} t_FmMacsecSecY;
12672 +
12673 +
12674 +#endif /* __FM_MACSEC_SECY_H */
12675 --- /dev/null
12676 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Makefile
12677 @@ -0,0 +1,23 @@
12678 +#
12679 +# Makefile for the Freescale Ethernet controllers
12680 +#
12681 +ccflags-y           += -DVERSION=\"\"
12682 +#
12683 +#Include netcomm SW specific definitions
12684 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
12685 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
12686 +
12687 +ccflags-y += -I$(NCSW_FM_INC)
12688 +
12689 +
12690 +obj-y          += fsl-ncsw-PFM1.o
12691 +
12692 +fsl-ncsw-PFM1-objs     :=   fm.o fm_muram.o fman.o
12693 +
12694 +obj-y          += MAC/
12695 +obj-y          += Pcd/
12696 +obj-y          += SP/
12697 +obj-y          += Port/
12698 +obj-y          += HC/
12699 +obj-y          += Rtc/
12700 +obj-y          += MACSEC/
12701 --- /dev/null
12702 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/Makefile
12703 @@ -0,0 +1,26 @@
12704 +#
12705 +# Makefile for the Freescale Ethernet controllers
12706 +#
12707 +ccflags-y           += -DVERSION=\"\"
12708 +#
12709 +#Include netcomm SW specific definitions
12710 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
12711 +
12712 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
12713 +
12714 +ccflags-y += -I$(NCSW_FM_INC)
12715 +
12716 +obj-y          += fsl-ncsw-Pcd.o
12717 +
12718 +fsl-ncsw-Pcd-objs      := fman_kg.o fman_prs.o fm_cc.o fm_kg.o fm_pcd.o fm_plcr.o fm_prs.o fm_manip.o
12719 +
12720 +ifeq ($(CONFIG_FMAN_V3H),y)
12721 +fsl-ncsw-Pcd-objs      += fm_replic.o
12722 +endif
12723 +ifeq ($(CONFIG_FMAN_V3L),y)
12724 +fsl-ncsw-Pcd-objs       += fm_replic.o
12725 +endif
12726 +ifeq ($(CONFIG_FMAN_ARM),y)
12727 +fsl-ncsw-Pcd-objs      += fm_replic.o
12728 +endif
12729 +
12730 --- /dev/null
12731 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/crc64.h
12732 @@ -0,0 +1,360 @@
12733 +/*
12734 + * Copyright 2008-2012 Freescale Semiconductor Inc.
12735 + *
12736 + * Redistribution and use in source and binary forms, with or without
12737 + * modification, are permitted provided that the following conditions are met:
12738 + *     * Redistributions of source code must retain the above copyright
12739 + *       notice, this list of conditions and the following disclaimer.
12740 + *     * Redistributions in binary form must reproduce the above copyright
12741 + *       notice, this list of conditions and the following disclaimer in the
12742 + *       documentation and/or other materials provided with the distribution.
12743 + *     * Neither the name of Freescale Semiconductor nor the
12744 + *       names of its contributors may be used to endorse or promote products
12745 + *       derived from this software without specific prior written permission.
12746 + *
12747 + *
12748 + * ALTERNATIVELY, this software may be distributed under the terms of the
12749 + * GNU General Public License ("GPL") as published by the Free Software
12750 + * Foundation, either version 2 of that License or (at your option) any
12751 + * later version.
12752 + *
12753 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
12754 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
12755 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
12756 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
12757 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
12758 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
12759 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
12760 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
12761 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
12762 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
12763 + */
12764 +
12765 +
12766 + /**************************************************************************//**
12767 + @File          crc64.h
12768 +
12769 + @Description   brief This file contains the CRC64 Table, and __inline__
12770 +                functions used for calculating crc.
12771 +*//***************************************************************************/
12772 +#ifndef __CRC64_H
12773 +#define __CRC64_H
12774 +
12775 +#include "std_ext.h"
12776 +
12777 +
12778 +#define BITS_PER_BYTE                   8
12779 +
12780 +#define CRC64_EXPON_ECMA_182            0xC96C5795D7870F42ULL
12781 +#define CRC64_DEFAULT_INITVAL           0xFFFFFFFFFFFFFFFFULL
12782 +
12783 +#define CRC64_BYTE_MASK                 0xFF
12784 +#define CRC64_TABLE_ENTRIES             ( 1 << BITS_PER_BYTE )
12785 +#define CRC64_ODD_MASK                  1
12786 +
12787 +
12788 +/**
12789 + \brief '64 bit crc' Table
12790 + */
12791 +struct crc64_t {
12792 +    uint64_t initial;                       /**< Initial seed */
12793 +    uint64_t table[CRC64_TABLE_ENTRIES];    /**< CRC table entries */
12794 +};
12795 +
12796 +
12797 +static struct crc64_t CRC64_ECMA_182 = {
12798 +    CRC64_DEFAULT_INITVAL,
12799 +    {
12800 +        0x0000000000000000ULL,
12801 +        0xb32e4cbe03a75f6fULL,
12802 +        0xf4843657a840a05bULL,
12803 +        0x47aa7ae9abe7ff34ULL,
12804 +        0x7bd0c384ff8f5e33ULL,
12805 +        0xc8fe8f3afc28015cULL,
12806 +        0x8f54f5d357cffe68ULL,
12807 +        0x3c7ab96d5468a107ULL,
12808 +        0xf7a18709ff1ebc66ULL,
12809 +        0x448fcbb7fcb9e309ULL,
12810 +        0x0325b15e575e1c3dULL,
12811 +        0xb00bfde054f94352ULL,
12812 +        0x8c71448d0091e255ULL,
12813 +        0x3f5f08330336bd3aULL,
12814 +        0x78f572daa8d1420eULL,
12815 +        0xcbdb3e64ab761d61ULL,
12816 +        0x7d9ba13851336649ULL,
12817 +        0xceb5ed8652943926ULL,
12818 +        0x891f976ff973c612ULL,
12819 +        0x3a31dbd1fad4997dULL,
12820 +        0x064b62bcaebc387aULL,
12821 +        0xb5652e02ad1b6715ULL,
12822 +        0xf2cf54eb06fc9821ULL,
12823 +        0x41e11855055bc74eULL,
12824 +        0x8a3a2631ae2dda2fULL,
12825 +        0x39146a8fad8a8540ULL,
12826 +        0x7ebe1066066d7a74ULL,
12827 +        0xcd905cd805ca251bULL,
12828 +        0xf1eae5b551a2841cULL,
12829 +        0x42c4a90b5205db73ULL,
12830 +        0x056ed3e2f9e22447ULL,
12831 +        0xb6409f5cfa457b28ULL,
12832 +        0xfb374270a266cc92ULL,
12833 +        0x48190ecea1c193fdULL,
12834 +        0x0fb374270a266cc9ULL,
12835 +        0xbc9d3899098133a6ULL,
12836 +        0x80e781f45de992a1ULL,
12837 +        0x33c9cd4a5e4ecdceULL,
12838 +        0x7463b7a3f5a932faULL,
12839 +        0xc74dfb1df60e6d95ULL,
12840 +        0x0c96c5795d7870f4ULL,
12841 +        0xbfb889c75edf2f9bULL,
12842 +        0xf812f32ef538d0afULL,
12843 +        0x4b3cbf90f69f8fc0ULL,
12844 +        0x774606fda2f72ec7ULL,
12845 +        0xc4684a43a15071a8ULL,
12846 +        0x83c230aa0ab78e9cULL,
12847 +        0x30ec7c140910d1f3ULL,
12848 +        0x86ace348f355aadbULL,
12849 +        0x3582aff6f0f2f5b4ULL,
12850 +        0x7228d51f5b150a80ULL,
12851 +        0xc10699a158b255efULL,
12852 +        0xfd7c20cc0cdaf4e8ULL,
12853 +        0x4e526c720f7dab87ULL,
12854 +        0x09f8169ba49a54b3ULL,
12855 +        0xbad65a25a73d0bdcULL,
12856 +        0x710d64410c4b16bdULL,
12857 +        0xc22328ff0fec49d2ULL,
12858 +        0x85895216a40bb6e6ULL,
12859 +        0x36a71ea8a7ace989ULL,
12860 +        0x0adda7c5f3c4488eULL,
12861 +        0xb9f3eb7bf06317e1ULL,
12862 +        0xfe5991925b84e8d5ULL,
12863 +        0x4d77dd2c5823b7baULL,
12864 +        0x64b62bcaebc387a1ULL,
12865 +        0xd7986774e864d8ceULL,
12866 +        0x90321d9d438327faULL,
12867 +        0x231c512340247895ULL,
12868 +        0x1f66e84e144cd992ULL,
12869 +        0xac48a4f017eb86fdULL,
12870 +        0xebe2de19bc0c79c9ULL,
12871 +        0x58cc92a7bfab26a6ULL,
12872 +        0x9317acc314dd3bc7ULL,
12873 +        0x2039e07d177a64a8ULL,
12874 +        0x67939a94bc9d9b9cULL,
12875 +        0xd4bdd62abf3ac4f3ULL,
12876 +        0xe8c76f47eb5265f4ULL,
12877 +        0x5be923f9e8f53a9bULL,
12878 +        0x1c4359104312c5afULL,
12879 +        0xaf6d15ae40b59ac0ULL,
12880 +        0x192d8af2baf0e1e8ULL,
12881 +        0xaa03c64cb957be87ULL,
12882 +        0xeda9bca512b041b3ULL,
12883 +        0x5e87f01b11171edcULL,
12884 +        0x62fd4976457fbfdbULL,
12885 +        0xd1d305c846d8e0b4ULL,
12886 +        0x96797f21ed3f1f80ULL,
12887 +        0x2557339fee9840efULL,
12888 +        0xee8c0dfb45ee5d8eULL,
12889 +        0x5da24145464902e1ULL,
12890 +        0x1a083bacedaefdd5ULL,
12891 +        0xa9267712ee09a2baULL,
12892 +        0x955cce7fba6103bdULL,
12893 +        0x267282c1b9c65cd2ULL,
12894 +        0x61d8f8281221a3e6ULL,
12895 +        0xd2f6b4961186fc89ULL,
12896 +        0x9f8169ba49a54b33ULL,
12897 +        0x2caf25044a02145cULL,
12898 +        0x6b055fede1e5eb68ULL,
12899 +        0xd82b1353e242b407ULL,
12900 +        0xe451aa3eb62a1500ULL,
12901 +        0x577fe680b58d4a6fULL,
12902 +        0x10d59c691e6ab55bULL,
12903 +        0xa3fbd0d71dcdea34ULL,
12904 +        0x6820eeb3b6bbf755ULL,
12905 +        0xdb0ea20db51ca83aULL,
12906 +        0x9ca4d8e41efb570eULL,
12907 +        0x2f8a945a1d5c0861ULL,
12908 +        0x13f02d374934a966ULL,
12909 +        0xa0de61894a93f609ULL,
12910 +        0xe7741b60e174093dULL,
12911 +        0x545a57dee2d35652ULL,
12912 +        0xe21ac88218962d7aULL,
12913 +        0x5134843c1b317215ULL,
12914 +        0x169efed5b0d68d21ULL,
12915 +        0xa5b0b26bb371d24eULL,
12916 +        0x99ca0b06e7197349ULL,
12917 +        0x2ae447b8e4be2c26ULL,
12918 +        0x6d4e3d514f59d312ULL,
12919 +        0xde6071ef4cfe8c7dULL,
12920 +        0x15bb4f8be788911cULL,
12921 +        0xa6950335e42fce73ULL,
12922 +        0xe13f79dc4fc83147ULL,
12923 +        0x521135624c6f6e28ULL,
12924 +        0x6e6b8c0f1807cf2fULL,
12925 +        0xdd45c0b11ba09040ULL,
12926 +        0x9aefba58b0476f74ULL,
12927 +        0x29c1f6e6b3e0301bULL,
12928 +        0xc96c5795d7870f42ULL,
12929 +        0x7a421b2bd420502dULL,
12930 +        0x3de861c27fc7af19ULL,
12931 +        0x8ec62d7c7c60f076ULL,
12932 +        0xb2bc941128085171ULL,
12933 +        0x0192d8af2baf0e1eULL,
12934 +        0x4638a2468048f12aULL,
12935 +        0xf516eef883efae45ULL,
12936 +        0x3ecdd09c2899b324ULL,
12937 +        0x8de39c222b3eec4bULL,
12938 +        0xca49e6cb80d9137fULL,
12939 +        0x7967aa75837e4c10ULL,
12940 +        0x451d1318d716ed17ULL,
12941 +        0xf6335fa6d4b1b278ULL,
12942 +        0xb199254f7f564d4cULL,
12943 +        0x02b769f17cf11223ULL,
12944 +        0xb4f7f6ad86b4690bULL,
12945 +        0x07d9ba1385133664ULL,
12946 +        0x4073c0fa2ef4c950ULL,
12947 +        0xf35d8c442d53963fULL,
12948 +        0xcf273529793b3738ULL,
12949 +        0x7c0979977a9c6857ULL,
12950 +        0x3ba3037ed17b9763ULL,
12951 +        0x888d4fc0d2dcc80cULL,
12952 +        0x435671a479aad56dULL,
12953 +        0xf0783d1a7a0d8a02ULL,
12954 +        0xb7d247f3d1ea7536ULL,
12955 +        0x04fc0b4dd24d2a59ULL,
12956 +        0x3886b22086258b5eULL,
12957 +        0x8ba8fe9e8582d431ULL,
12958 +        0xcc0284772e652b05ULL,
12959 +        0x7f2cc8c92dc2746aULL,
12960 +        0x325b15e575e1c3d0ULL,
12961 +        0x8175595b76469cbfULL,
12962 +        0xc6df23b2dda1638bULL,
12963 +        0x75f16f0cde063ce4ULL,
12964 +        0x498bd6618a6e9de3ULL,
12965 +        0xfaa59adf89c9c28cULL,
12966 +        0xbd0fe036222e3db8ULL,
12967 +        0x0e21ac88218962d7ULL,
12968 +        0xc5fa92ec8aff7fb6ULL,
12969 +        0x76d4de52895820d9ULL,
12970 +        0x317ea4bb22bfdfedULL,
12971 +        0x8250e80521188082ULL,
12972 +        0xbe2a516875702185ULL,
12973 +        0x0d041dd676d77eeaULL,
12974 +        0x4aae673fdd3081deULL,
12975 +        0xf9802b81de97deb1ULL,
12976 +        0x4fc0b4dd24d2a599ULL,
12977 +        0xfceef8632775faf6ULL,
12978 +        0xbb44828a8c9205c2ULL,
12979 +        0x086ace348f355aadULL,
12980 +        0x34107759db5dfbaaULL,
12981 +        0x873e3be7d8faa4c5ULL,
12982 +        0xc094410e731d5bf1ULL,
12983 +        0x73ba0db070ba049eULL,
12984 +        0xb86133d4dbcc19ffULL,
12985 +        0x0b4f7f6ad86b4690ULL,
12986 +        0x4ce50583738cb9a4ULL,
12987 +        0xffcb493d702be6cbULL,
12988 +        0xc3b1f050244347ccULL,
12989 +        0x709fbcee27e418a3ULL,
12990 +        0x3735c6078c03e797ULL,
12991 +        0x841b8ab98fa4b8f8ULL,
12992 +        0xadda7c5f3c4488e3ULL,
12993 +        0x1ef430e13fe3d78cULL,
12994 +        0x595e4a08940428b8ULL,
12995 +        0xea7006b697a377d7ULL,
12996 +        0xd60abfdbc3cbd6d0ULL,
12997 +        0x6524f365c06c89bfULL,
12998 +        0x228e898c6b8b768bULL,
12999 +        0x91a0c532682c29e4ULL,
13000 +        0x5a7bfb56c35a3485ULL,
13001 +        0xe955b7e8c0fd6beaULL,
13002 +        0xaeffcd016b1a94deULL,
13003 +        0x1dd181bf68bdcbb1ULL,
13004 +        0x21ab38d23cd56ab6ULL,
13005 +        0x9285746c3f7235d9ULL,
13006 +        0xd52f0e859495caedULL,
13007 +        0x6601423b97329582ULL,
13008 +        0xd041dd676d77eeaaULL,
13009 +        0x636f91d96ed0b1c5ULL,
13010 +        0x24c5eb30c5374ef1ULL,
13011 +        0x97eba78ec690119eULL,
13012 +        0xab911ee392f8b099ULL,
13013 +        0x18bf525d915feff6ULL,
13014 +        0x5f1528b43ab810c2ULL,
13015 +        0xec3b640a391f4fadULL,
13016 +        0x27e05a6e926952ccULL,
13017 +        0x94ce16d091ce0da3ULL,
13018 +        0xd3646c393a29f297ULL,
13019 +        0x604a2087398eadf8ULL,
13020 +        0x5c3099ea6de60cffULL,
13021 +        0xef1ed5546e415390ULL,
13022 +        0xa8b4afbdc5a6aca4ULL,
13023 +        0x1b9ae303c601f3cbULL,
13024 +        0x56ed3e2f9e224471ULL,
13025 +        0xe5c372919d851b1eULL,
13026 +        0xa26908783662e42aULL,
13027 +        0x114744c635c5bb45ULL,
13028 +        0x2d3dfdab61ad1a42ULL,
13029 +        0x9e13b115620a452dULL,
13030 +        0xd9b9cbfcc9edba19ULL,
13031 +        0x6a978742ca4ae576ULL,
13032 +        0xa14cb926613cf817ULL,
13033 +        0x1262f598629ba778ULL,
13034 +        0x55c88f71c97c584cULL,
13035 +        0xe6e6c3cfcadb0723ULL,
13036 +        0xda9c7aa29eb3a624ULL,
13037 +        0x69b2361c9d14f94bULL,
13038 +        0x2e184cf536f3067fULL,
13039 +        0x9d36004b35545910ULL,
13040 +        0x2b769f17cf112238ULL,
13041 +        0x9858d3a9ccb67d57ULL,
13042 +        0xdff2a94067518263ULL,
13043 +        0x6cdce5fe64f6dd0cULL,
13044 +        0x50a65c93309e7c0bULL,
13045 +        0xe388102d33392364ULL,
13046 +        0xa4226ac498dedc50ULL,
13047 +        0x170c267a9b79833fULL,
13048 +        0xdcd7181e300f9e5eULL,
13049 +        0x6ff954a033a8c131ULL,
13050 +        0x28532e49984f3e05ULL,
13051 +        0x9b7d62f79be8616aULL,
13052 +        0xa707db9acf80c06dULL,
13053 +        0x14299724cc279f02ULL,
13054 +        0x5383edcd67c06036ULL,
13055 +        0xe0ada17364673f59ULL
13056 +    }
13057 +};
13058 +
13059 +
13060 +/**
13061 + \brief Initializes the crc seed
13062 + */
13063 +static __inline__ uint64_t crc64_init(void)
13064 +{
13065 +    return CRC64_ECMA_182.initial;
13066 +}
13067 +
13068 +/**
13069 + \brief Computes 64 bit the crc
13070 + \param[in] data Pointer to the Data in the frame
13071 + \param[in] len Length of the Data
13072 + \param[in] crc seed
13073 + \return calculated crc
13074 + */
13075 +static __inline__ uint64_t crc64_compute(void const *data,
13076 +                                         uint32_t   len,
13077 +                                         uint64_t   seed)
13078 +{
13079 +    uint32_t i;
13080 +    uint64_t crc = seed;
13081 +    uint8_t *bdata = (uint8_t *) data;
13082 +
13083 +    for (i = 0; i < len; i++)
13084 +        crc =
13085 +            CRC64_ECMA_182.
13086 +            table[(crc ^ *bdata++) & CRC64_BYTE_MASK] ^ (crc >> 8);
13087 +
13088 +    return crc;
13089 +}
13090 +
13091 +
13092 +#endif /* __CRC64_H */
13093 --- /dev/null
13094 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c
13095 @@ -0,0 +1,7582 @@
13096 +/*
13097 + * Copyright 2008-2012 Freescale Semiconductor Inc.
13098 + *
13099 + * Redistribution and use in source and binary forms, with or without
13100 + * modification, are permitted provided that the following conditions are met:
13101 + *     * Redistributions of source code must retain the above copyright
13102 + *       notice, this list of conditions and the following disclaimer.
13103 + *     * Redistributions in binary form must reproduce the above copyright
13104 + *       notice, this list of conditions and the following disclaimer in the
13105 + *       documentation and/or other materials provided with the distribution.
13106 + *     * Neither the name of Freescale Semiconductor nor the
13107 + *       names of its contributors may be used to endorse or promote products
13108 + *       derived from this software without specific prior written permission.
13109 + *
13110 + *
13111 + * ALTERNATIVELY, this software may be distributed under the terms of the
13112 + * GNU General Public License ("GPL") as published by the Free Software
13113 + * Foundation, either version 2 of that License or (at your option) any
13114 + * later version.
13115 + *
13116 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
13117 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
13118 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
13119 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
13120 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
13121 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
13122 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
13123 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
13124 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
13125 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
13126 + */
13127 +
13128 +
13129 +/******************************************************************************
13130 + @File          fm_cc.c
13131 +
13132 + @Description   FM Coarse Classifier implementation
13133 + *//***************************************************************************/
13134 +#include <linux/math64.h>
13135 +#include "std_ext.h"
13136 +#include "error_ext.h"
13137 +#include "string_ext.h"
13138 +#include "debug_ext.h"
13139 +#include "fm_pcd_ext.h"
13140 +#include "fm_muram_ext.h"
13141 +
13142 +#include "fm_common.h"
13143 +#include "fm_pcd.h"
13144 +#include "fm_hc.h"
13145 +#include "fm_cc.h"
13146 +#include "crc64.h"
13147 +
13148 +/****************************************/
13149 +/*       static functions               */
13150 +/****************************************/
13151 +
13152 +
13153 +static t_Error CcRootTryLock(t_Handle h_FmPcdCcTree)
13154 +{
13155 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
13156 +
13157 +    ASSERT_COND(h_FmPcdCcTree);
13158 +
13159 +    if (FmPcdLockTryLock(p_FmPcdCcTree->p_Lock))
13160 +        return E_OK;
13161 +
13162 +    return ERROR_CODE(E_BUSY);
13163 +}
13164 +
13165 +static void CcRootReleaseLock(t_Handle h_FmPcdCcTree)
13166 +{
13167 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
13168 +
13169 +    ASSERT_COND(h_FmPcdCcTree);
13170 +
13171 +    FmPcdLockUnlock(p_FmPcdCcTree->p_Lock);
13172 +}
13173 +
13174 +static void UpdateNodeOwner(t_FmPcdCcNode *p_CcNode, bool add)
13175 +{
13176 +    uint32_t intFlags;
13177 +
13178 +    ASSERT_COND(p_CcNode);
13179 +
13180 +    intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
13181 +
13182 +    if (add)
13183 +        p_CcNode->owners++;
13184 +    else
13185 +    {
13186 +        ASSERT_COND(p_CcNode->owners);
13187 +        p_CcNode->owners--;
13188 +    }
13189 +
13190 +    XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
13191 +}
13192 +
13193 +static __inline__ t_FmPcdStatsObj* DequeueStatsObj(t_List *p_List)
13194 +{
13195 +    t_FmPcdStatsObj *p_StatsObj = NULL;
13196 +    t_List *p_Next;
13197 +
13198 +    if (!LIST_IsEmpty(p_List))
13199 +    {
13200 +        p_Next = LIST_FIRST(p_List);
13201 +        p_StatsObj = LIST_OBJECT(p_Next, t_FmPcdStatsObj, node);
13202 +        ASSERT_COND(p_StatsObj);
13203 +        LIST_DelAndInit(p_Next);
13204 +    }
13205 +
13206 +    return p_StatsObj;
13207 +}
13208 +
13209 +static __inline__ void EnqueueStatsObj(t_List *p_List,
13210 +                                       t_FmPcdStatsObj *p_StatsObj)
13211 +{
13212 +    LIST_AddToTail(&p_StatsObj->node, p_List);
13213 +}
13214 +
13215 +static void FreeStatObjects(t_List *p_List, t_Handle h_FmMuram)
13216 +{
13217 +    t_FmPcdStatsObj *p_StatsObj;
13218 +
13219 +    while (!LIST_IsEmpty(p_List))
13220 +    {
13221 +        p_StatsObj = DequeueStatsObj(p_List);
13222 +        ASSERT_COND(p_StatsObj);
13223 +
13224 +        FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd);
13225 +        FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsCounters);
13226 +
13227 +        XX_Free(p_StatsObj);
13228 +    }
13229 +}
13230 +
13231 +static t_FmPcdStatsObj* GetStatsObj(t_FmPcdCcNode *p_CcNode)
13232 +{
13233 +    t_FmPcdStatsObj* p_StatsObj;
13234 +    t_Handle h_FmMuram;
13235 +
13236 +    ASSERT_COND(p_CcNode);
13237 +
13238 +    /* If 'maxNumOfKeys' was passed, all statistics object were preallocated
13239 +     upon node initialization */
13240 +    if (p_CcNode->maxNumOfKeys)
13241 +    {
13242 +        p_StatsObj = DequeueStatsObj(&p_CcNode->availableStatsLst);
13243 +
13244 +               /* Clean statistics counters & ADs */
13245 +               MemSet8(p_StatsObj->h_StatsAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
13246 +               MemSet8(p_StatsObj->h_StatsCounters, 0, p_CcNode->countersArraySize);
13247 +    }
13248 +    else
13249 +    {
13250 +        h_FmMuram = ((t_FmPcd *)(p_CcNode->h_FmPcd))->h_FmMuram;
13251 +        ASSERT_COND(h_FmMuram);
13252 +
13253 +        p_StatsObj = XX_Malloc(sizeof(t_FmPcdStatsObj));
13254 +        if (!p_StatsObj)
13255 +        {
13256 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("statistics object"));
13257 +            return NULL;
13258 +        }
13259 +
13260 +        p_StatsObj->h_StatsAd = (t_Handle)FM_MURAM_AllocMem(
13261 +                h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE, FM_PCD_CC_AD_TABLE_ALIGN);
13262 +        if (!p_StatsObj->h_StatsAd)
13263 +        {
13264 +            XX_Free(p_StatsObj);
13265 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for statistics ADs"));
13266 +            return NULL;
13267 +        }
13268 +        MemSet8(p_StatsObj->h_StatsAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
13269 +
13270 +        p_StatsObj->h_StatsCounters = (t_Handle)FM_MURAM_AllocMem(
13271 +                h_FmMuram, p_CcNode->countersArraySize,
13272 +                FM_PCD_CC_AD_TABLE_ALIGN);
13273 +        if (!p_StatsObj->h_StatsCounters)
13274 +        {
13275 +            FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd);
13276 +            XX_Free(p_StatsObj);
13277 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for statistics counters"));
13278 +            return NULL;
13279 +        }
13280 +        MemSet8(p_StatsObj->h_StatsCounters, 0, p_CcNode->countersArraySize);
13281 +    }
13282 +
13283 +    return p_StatsObj;
13284 +}
13285 +
13286 +static void PutStatsObj(t_FmPcdCcNode *p_CcNode, t_FmPcdStatsObj *p_StatsObj)
13287 +{
13288 +    t_Handle h_FmMuram;
13289 +
13290 +    ASSERT_COND(p_CcNode);
13291 +    ASSERT_COND(p_StatsObj);
13292 +
13293 +    /* If 'maxNumOfKeys' was passed, all statistics object were preallocated
13294 +     upon node initialization and now will be enqueued back to the list */
13295 +    if (p_CcNode->maxNumOfKeys)
13296 +    {
13297 +               /* Clean statistics counters */
13298 +               MemSet8(p_StatsObj->h_StatsCounters, 0, p_CcNode->countersArraySize);
13299 +
13300 +               /* Clean statistics ADs */
13301 +               MemSet8(p_StatsObj->h_StatsAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
13302 +
13303 +        EnqueueStatsObj(&p_CcNode->availableStatsLst, p_StatsObj);
13304 +    }
13305 +    else
13306 +    {
13307 +        h_FmMuram = ((t_FmPcd *)(p_CcNode->h_FmPcd))->h_FmMuram;
13308 +        ASSERT_COND(h_FmMuram);
13309 +
13310 +        FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd);
13311 +        FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsCounters);
13312 +
13313 +        XX_Free(p_StatsObj);
13314 +    }
13315 +}
13316 +
13317 +static void SetStatsCounters(t_AdOfTypeStats *p_StatsAd,
13318 +                             uint32_t statsCountersAddr)
13319 +{
13320 +    uint32_t tmp = (statsCountersAddr & FM_PCD_AD_STATS_COUNTERS_ADDR_MASK);
13321 +
13322 +    WRITE_UINT32(p_StatsAd->statsTableAddr, tmp);
13323 +}
13324 +
13325 +
13326 +static void UpdateStatsAd(t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
13327 +                          t_Handle h_Ad, uint64_t physicalMuramBase)
13328 +{
13329 +    t_AdOfTypeStats *p_StatsAd;
13330 +    uint32_t statsCountersAddr, nextActionAddr, tmp;
13331 +#if (DPAA_VERSION >= 11)
13332 +    uint32_t frameLengthRangesAddr;
13333 +#endif /* (DPAA_VERSION >= 11) */
13334 +
13335 +    p_StatsAd = (t_AdOfTypeStats *)p_FmPcdCcStatsParams->h_StatsAd;
13336 +
13337 +    tmp = FM_PCD_AD_STATS_TYPE;
13338 +
13339 +#if (DPAA_VERSION >= 11)
13340 +    if (p_FmPcdCcStatsParams->h_StatsFLRs)
13341 +    {
13342 +        frameLengthRangesAddr = (uint32_t)((XX_VirtToPhys(
13343 +                p_FmPcdCcStatsParams->h_StatsFLRs) - physicalMuramBase));
13344 +        tmp |= (frameLengthRangesAddr & FM_PCD_AD_STATS_FLR_ADDR_MASK);
13345 +    }
13346 +#endif /* (DPAA_VERSION >= 11) */
13347 +    WRITE_UINT32(p_StatsAd->profileTableAddr, tmp);
13348 +
13349 +    nextActionAddr = (uint32_t)((XX_VirtToPhys(h_Ad) - physicalMuramBase));
13350 +    tmp = 0;
13351 +    tmp |= (uint32_t)((nextActionAddr << FM_PCD_AD_STATS_NEXT_ACTION_SHIFT)
13352 +            & FM_PCD_AD_STATS_NEXT_ACTION_MASK);
13353 +    tmp |= (FM_PCD_AD_STATS_NAD_EN | FM_PCD_AD_STATS_OP_CODE);
13354 +
13355 +#if (DPAA_VERSION >= 11)
13356 +    if (p_FmPcdCcStatsParams->h_StatsFLRs)
13357 +        tmp |= FM_PCD_AD_STATS_FLR_EN;
13358 +#endif /* (DPAA_VERSION >= 11) */
13359 +
13360 +    WRITE_UINT32(p_StatsAd->nextActionIndx, tmp);
13361 +
13362 +    statsCountersAddr = (uint32_t)((XX_VirtToPhys(
13363 +            p_FmPcdCcStatsParams->h_StatsCounters) - physicalMuramBase));
13364 +    SetStatsCounters(p_StatsAd, statsCountersAddr);
13365 +}
13366 +
13367 +static void FillAdOfTypeContLookup(t_Handle h_Ad,
13368 +                                   t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
13369 +                                   t_Handle h_FmPcd, t_Handle p_CcNode,
13370 +                                   t_Handle h_Manip, t_Handle h_FrmReplic)
13371 +{
13372 +    t_FmPcdCcNode *p_Node = (t_FmPcdCcNode *)p_CcNode;
13373 +    t_AdOfTypeContLookup *p_AdContLookup = (t_AdOfTypeContLookup *)h_Ad;
13374 +    t_Handle h_TmpAd;
13375 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
13376 +    uint32_t tmpReg32;
13377 +    t_Handle p_AdNewPtr = NULL;
13378 +
13379 +    UNUSED(h_Manip);
13380 +    UNUSED(h_FrmReplic);
13381 +
13382 +    /* there are 3 cases handled in this routine of building a "Continue lookup" type AD.
13383 +     * Case 1: No Manip. The action descriptor is built within the match table.
13384 +     *         p_AdResult = p_AdNewPtr;
13385 +     * Case 2: Manip exists. A new AD is created - p_AdNewPtr. It is initialized
13386 +     *         either in the FmPcdManipUpdateAdResultForCc routine or it was already
13387 +     *         initialized and returned here.
13388 +     *         p_AdResult (within the match table) will be initialized after
13389 +     *         this routine returns and point to the existing AD.
13390 +     * Case 3: Manip exists. The action descriptor is built within the match table.
13391 +     *         FmPcdManipUpdateAdContLookupForCc returns a NULL p_AdNewPtr.
13392 +     */
13393 +
13394 +    /* As default, the "new" ptr is the current one. i.e. the content of the result
13395 +     * AD will be written into the match table itself (case (1))*/
13396 +    p_AdNewPtr = p_AdContLookup;
13397 +
13398 +    /* Initialize an action descriptor, if current statistics mode requires an Ad */
13399 +    if (p_FmPcdCcStatsParams)
13400 +    {
13401 +        ASSERT_COND(p_FmPcdCcStatsParams->h_StatsAd);
13402 +        ASSERT_COND(p_FmPcdCcStatsParams->h_StatsCounters);
13403 +
13404 +        /* Swapping addresses between statistics Ad and the current lookup AD */
13405 +        h_TmpAd = p_FmPcdCcStatsParams->h_StatsAd;
13406 +        p_FmPcdCcStatsParams->h_StatsAd = h_Ad;
13407 +        h_Ad = h_TmpAd;
13408 +
13409 +        p_AdNewPtr = h_Ad;
13410 +        p_AdContLookup = h_Ad;
13411 +
13412 +        /* Init statistics Ad and connect current lookup AD as 'next action' from statistics Ad */
13413 +        UpdateStatsAd(p_FmPcdCcStatsParams, h_Ad, p_FmPcd->physicalMuramBase);
13414 +    }
13415 +
13416 +#if DPAA_VERSION >= 11
13417 +    if (h_Manip && h_FrmReplic)
13418 +        FmPcdManipUpdateAdContLookupForCc(
13419 +                h_Manip,
13420 +                h_Ad,
13421 +                &p_AdNewPtr,
13422 +                (uint32_t)((XX_VirtToPhys(
13423 +                        FrmReplicGroupGetSourceTableDescriptor(h_FrmReplic))
13424 +                        - p_FmPcd->physicalMuramBase)));
13425 +    else
13426 +        if (h_FrmReplic)
13427 +            FrmReplicGroupUpdateAd(h_FrmReplic, h_Ad, &p_AdNewPtr);
13428 +        else
13429 +#endif /* (DPAA_VERSION >= 11) */
13430 +            if (h_Manip)
13431 +                FmPcdManipUpdateAdContLookupForCc(
13432 +                        h_Manip,
13433 +                        h_Ad,
13434 +                        &p_AdNewPtr,
13435 +
13436 +#ifdef FM_CAPWAP_SUPPORT
13437 +                        /*no check for opcode of manip - this step can be reached only with capwap_applic_specific*/
13438 +                        (uint32_t)((XX_VirtToPhys(p_Node->h_AdTable) - p_FmPcd->physicalMuramBase))
13439 +#else  /* not FM_CAPWAP_SUPPORT */
13440 +                        (uint32_t)((XX_VirtToPhys(p_Node->h_Ad)
13441 +                                - p_FmPcd->physicalMuramBase))
13442 +#endif /* not FM_CAPWAP_SUPPORT */
13443 +                        );
13444 +
13445 +    /* if (p_AdNewPtr = NULL) --> Done. (case (3)) */
13446 +    if (p_AdNewPtr)
13447 +    {
13448 +        /* cases (1) & (2) */
13449 +        tmpReg32 = 0;
13450 +        tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
13451 +        tmpReg32 |=
13452 +                p_Node->sizeOfExtraction ? ((p_Node->sizeOfExtraction - 1) << 24) :
13453 +                        0;
13454 +        tmpReg32 |= (uint32_t)(XX_VirtToPhys(p_Node->h_AdTable)
13455 +                - p_FmPcd->physicalMuramBase);
13456 +        WRITE_UINT32(p_AdContLookup->ccAdBase, tmpReg32);
13457 +
13458 +        tmpReg32 = 0;
13459 +        tmpReg32 |= p_Node->numOfKeys << 24;
13460 +        tmpReg32 |= (p_Node->lclMask ? FM_PCD_AD_CONT_LOOKUP_LCL_MASK : 0);
13461 +        tmpReg32 |=
13462 +                p_Node->h_KeysMatchTable ? (uint32_t)(XX_VirtToPhys(
13463 +                        p_Node->h_KeysMatchTable) - p_FmPcd->physicalMuramBase) :
13464 +                        0;
13465 +        WRITE_UINT32(p_AdContLookup->matchTblPtr, tmpReg32);
13466 +
13467 +        tmpReg32 = 0;
13468 +        tmpReg32 |= p_Node->prsArrayOffset << 24;
13469 +        tmpReg32 |= p_Node->offset << 16;
13470 +        tmpReg32 |= p_Node->parseCode;
13471 +        WRITE_UINT32(p_AdContLookup->pcAndOffsets, tmpReg32);
13472 +
13473 +        MemCpy8((void*)&p_AdContLookup->gmask, p_Node->p_GlblMask,
13474 +                    CC_GLBL_MASK_SIZE);
13475 +    }
13476 +}
13477 +
13478 +static t_Error AllocAndFillAdForContLookupManip(t_Handle h_CcNode)
13479 +{
13480 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
13481 +    uint32_t intFlags;
13482 +
13483 +    ASSERT_COND(p_CcNode);
13484 +
13485 +    intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
13486 +
13487 +    if (!p_CcNode->h_Ad)
13488 +    {
13489 +        if (p_CcNode->maxNumOfKeys)
13490 +            p_CcNode->h_Ad = p_CcNode->h_TmpAd;
13491 +        else
13492 +            p_CcNode->h_Ad = (t_Handle)FM_MURAM_AllocMem(
13493 +                    ((t_FmPcd *)(p_CcNode->h_FmPcd))->h_FmMuram,
13494 +                    FM_PCD_CC_AD_ENTRY_SIZE, FM_PCD_CC_AD_TABLE_ALIGN);
13495 +
13496 +        XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
13497 +
13498 +        if (!p_CcNode->h_Ad)
13499 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
13500 +                         ("MURAM allocation for CC action descriptor"));
13501 +
13502 +        MemSet8(p_CcNode->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
13503 +
13504 +        FillAdOfTypeContLookup(p_CcNode->h_Ad, NULL, p_CcNode->h_FmPcd,
13505 +                               p_CcNode, NULL, NULL);
13506 +    }
13507 +    else
13508 +        XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
13509 +
13510 +    return E_OK;
13511 +}
13512 +
13513 +static t_Error SetRequiredAction1(
13514 +        t_Handle h_FmPcd, uint32_t requiredAction,
13515 +        t_FmPcdCcKeyAndNextEngineParams *p_CcKeyAndNextEngineParamsTmp,
13516 +        t_Handle h_AdTmp, uint16_t numOfEntries, t_Handle h_Tree)
13517 +{
13518 +    t_AdOfTypeResult *p_AdTmp = (t_AdOfTypeResult *)h_AdTmp;
13519 +    uint32_t tmpReg32;
13520 +    t_Error err;
13521 +    t_FmPcdCcNode *p_CcNode;
13522 +    int i = 0;
13523 +    uint16_t tmp = 0;
13524 +    uint16_t profileId;
13525 +    uint8_t relativeSchemeId, physicalSchemeId;
13526 +    t_CcNodeInformation ccNodeInfo;
13527 +
13528 +    for (i = 0; i < numOfEntries; i++)
13529 +    {
13530 +        if (i == 0)
13531 +            h_AdTmp = PTR_MOVE(h_AdTmp, i*FM_PCD_CC_AD_ENTRY_SIZE);
13532 +        else
13533 +            h_AdTmp = PTR_MOVE(h_AdTmp, FM_PCD_CC_AD_ENTRY_SIZE);
13534 +
13535 +        switch (p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.nextEngine)
13536 +        {
13537 +            case (e_FM_PCD_CC):
13538 +                if (requiredAction)
13539 +                {
13540 +                    p_CcNode =
13541 +                            p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.ccParams.h_CcNode;
13542 +                    ASSERT_COND(p_CcNode);
13543 +                    if (p_CcNode->shadowAction == requiredAction)
13544 +                        break;
13545 +                    if ((requiredAction & UPDATE_CC_WITH_TREE)
13546 +                            && !(p_CcNode->shadowAction & UPDATE_CC_WITH_TREE))
13547 +                    {
13548 +
13549 +                        memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
13550 +                        ccNodeInfo.h_CcNode = h_Tree;
13551 +                        EnqueueNodeInfoToRelevantLst(&p_CcNode->ccTreesLst,
13552 +                                                     &ccNodeInfo, NULL);
13553 +                        p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
13554 +                                UPDATE_CC_WITH_TREE;
13555 +                    }
13556 +                    if ((requiredAction & UPDATE_CC_SHADOW_CLEAR)
13557 +                            && !(p_CcNode->shadowAction & UPDATE_CC_SHADOW_CLEAR))
13558 +                    {
13559 +
13560 +                        p_CcNode->shadowAction = 0;
13561 +                    }
13562 +
13563 +                    if ((requiredAction & UPDATE_CC_WITH_DELETE_TREE)
13564 +                            && !(p_CcNode->shadowAction
13565 +                                    & UPDATE_CC_WITH_DELETE_TREE))
13566 +                    {
13567 +                        DequeueNodeInfoFromRelevantLst(&p_CcNode->ccTreesLst,
13568 +                                                       h_Tree, NULL);
13569 +                        p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
13570 +                                UPDATE_CC_WITH_DELETE_TREE;
13571 +                    }
13572 +                    if (p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
13573 +                            != e_FM_PCD_INVALID)
13574 +                        tmp = (uint8_t)(p_CcNode->numOfKeys + 1);
13575 +                    else
13576 +                        tmp = p_CcNode->numOfKeys;
13577 +                    err = SetRequiredAction1(h_FmPcd, requiredAction,
13578 +                                             p_CcNode->keyAndNextEngineParams,
13579 +                                             p_CcNode->h_AdTable, tmp, h_Tree);
13580 +                    if (err != E_OK)
13581 +                        return err;
13582 +                    if (requiredAction != UPDATE_CC_SHADOW_CLEAR)
13583 +                        p_CcNode->shadowAction |= requiredAction;
13584 +                }
13585 +                break;
13586 +
13587 +            case (e_FM_PCD_KG):
13588 +                if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
13589 +                        && !(p_CcKeyAndNextEngineParamsTmp[i].shadowAction
13590 +                                & UPDATE_NIA_ENQ_WITHOUT_DMA))
13591 +                {
13592 +                    physicalSchemeId =
13593 +                            FmPcdKgGetSchemeId(
13594 +                                    p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.kgParams.h_DirectScheme);
13595 +                    relativeSchemeId = FmPcdKgGetRelativeSchemeId(
13596 +                            h_FmPcd, physicalSchemeId);
13597 +                    if (relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
13598 +                        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
13599 +                    if (!FmPcdKgIsSchemeValidSw(
13600 +                            p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.kgParams.h_DirectScheme))
13601 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE,
13602 +                                     ("Invalid direct scheme."));
13603 +                    if (!KgIsSchemeAlwaysDirect(h_FmPcd, relativeSchemeId))
13604 +                        RETURN_ERROR(
13605 +                                MAJOR, E_INVALID_STATE,
13606 +                                ("For this action scheme has to be direct."));
13607 +                    err =
13608 +                            FmPcdKgCcGetSetParams(
13609 +                                    h_FmPcd,
13610 +                                    p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.kgParams.h_DirectScheme,
13611 +                                    requiredAction, 0);
13612 +                    if (err != E_OK)
13613 +                        RETURN_ERROR(MAJOR, err, NO_MSG);
13614 +                    p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
13615 +                            requiredAction;
13616 +                }
13617 +                break;
13618 +
13619 +            case (e_FM_PCD_PLCR):
13620 +                if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
13621 +                        && !(p_CcKeyAndNextEngineParamsTmp[i].shadowAction
13622 +                                & UPDATE_NIA_ENQ_WITHOUT_DMA))
13623 +                {
13624 +                    if (!p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.plcrParams.overrideParams)
13625 +                        RETURN_ERROR(
13626 +                                MAJOR,
13627 +                                E_NOT_SUPPORTED,
13628 +                                ("In this initialization only overrideFqid can be initialized"));
13629 +                    if (!p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.plcrParams.sharedProfile)
13630 +                        RETURN_ERROR(
13631 +                                MAJOR,
13632 +                                E_NOT_SUPPORTED,
13633 +                                ("In this initialization only overrideFqid can be initialized"));
13634 +                    err =
13635 +                            FmPcdPlcrGetAbsoluteIdByProfileParams(
13636 +                                    h_FmPcd,
13637 +                                    e_FM_PCD_PLCR_SHARED,
13638 +                                    NULL,
13639 +                                    p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.plcrParams.newRelativeProfileId,
13640 +                                    &profileId);
13641 +                    if (err != E_OK)
13642 +                        RETURN_ERROR(MAJOR, err, NO_MSG);
13643 +                    err = FmPcdPlcrCcGetSetParams(h_FmPcd, profileId,
13644 +                                                  requiredAction);
13645 +                    if (err != E_OK)
13646 +                        RETURN_ERROR(MAJOR, err, NO_MSG);
13647 +                    p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
13648 +                            requiredAction;
13649 +                }
13650 +                break;
13651 +
13652 +            case (e_FM_PCD_DONE):
13653 +                if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
13654 +                        && !(p_CcKeyAndNextEngineParamsTmp[i].shadowAction
13655 +                                & UPDATE_NIA_ENQ_WITHOUT_DMA))
13656 +                {
13657 +                    tmpReg32 = GET_UINT32(p_AdTmp->nia);
13658 +                    if ((tmpReg32 & GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd))
13659 +                            != GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd))
13660 +                        RETURN_ERROR(
13661 +                                MAJOR,
13662 +                                E_INVALID_STATE,
13663 +                                ("Next engine was previously assigned not as PCD_DONE"));
13664 +                    tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
13665 +                    WRITE_UINT32(p_AdTmp->nia, tmpReg32);
13666 +                    p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
13667 +                            requiredAction;
13668 +                }
13669 +                break;
13670 +
13671 +            default:
13672 +                break;
13673 +        }
13674 +    }
13675 +
13676 +    return E_OK;
13677 +}
13678 +
13679 +static t_Error SetRequiredAction(
13680 +        t_Handle h_FmPcd, uint32_t requiredAction,
13681 +        t_FmPcdCcKeyAndNextEngineParams *p_CcKeyAndNextEngineParamsTmp,
13682 +        t_Handle h_AdTmp, uint16_t numOfEntries, t_Handle h_Tree)
13683 +{
13684 +    t_Error err = SetRequiredAction1(h_FmPcd, requiredAction,
13685 +                                     p_CcKeyAndNextEngineParamsTmp, h_AdTmp,
13686 +                                     numOfEntries, h_Tree);
13687 +    if (err != E_OK)
13688 +        return err;
13689 +    return SetRequiredAction1(h_FmPcd, UPDATE_CC_SHADOW_CLEAR,
13690 +                              p_CcKeyAndNextEngineParamsTmp, h_AdTmp,
13691 +                              numOfEntries, h_Tree);
13692 +}
13693 +
13694 +static t_Error ReleaseModifiedDataStructure(
13695 +        t_Handle h_FmPcd, t_List *h_FmPcdOldPointersLst,
13696 +        t_List *h_FmPcdNewPointersLst,
13697 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalParams,
13698 +        bool useShadowStructs)
13699 +{
13700 +    t_List *p_Pos;
13701 +    t_Error err = E_OK;
13702 +    t_CcNodeInformation ccNodeInfo, *p_CcNodeInformation;
13703 +    t_Handle h_Muram;
13704 +    t_FmPcdCcNode *p_FmPcdCcNextNode, *p_FmPcdCcWorkingOnNode;
13705 +    t_List *p_UpdateLst;
13706 +    uint32_t intFlags;
13707 +
13708 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
13709 +    SANITY_CHECK_RETURN_ERROR(p_AdditionalParams->h_CurrentNode,
13710 +                              E_INVALID_HANDLE);
13711 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdOldPointersLst, E_INVALID_HANDLE);
13712 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdNewPointersLst, E_INVALID_HANDLE);
13713 +
13714 +    /* We don't update subtree of the new node with new tree because it was done in the previous stage */
13715 +    if (p_AdditionalParams->h_NodeForAdd)
13716 +    {
13717 +        p_FmPcdCcNextNode = (t_FmPcdCcNode*)p_AdditionalParams->h_NodeForAdd;
13718 +
13719 +        if (!p_AdditionalParams->tree)
13720 +            p_UpdateLst = &p_FmPcdCcNextNode->ccPrevNodesLst;
13721 +        else
13722 +            p_UpdateLst = &p_FmPcdCcNextNode->ccTreeIdLst;
13723 +
13724 +        p_CcNodeInformation = FindNodeInfoInReleventLst(
13725 +                p_UpdateLst, p_AdditionalParams->h_CurrentNode,
13726 +                p_FmPcdCcNextNode->h_Spinlock);
13727 +
13728 +        if (p_CcNodeInformation)
13729 +            p_CcNodeInformation->index++;
13730 +        else
13731 +        {
13732 +            memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
13733 +            ccNodeInfo.h_CcNode = (t_Handle)p_AdditionalParams->h_CurrentNode;
13734 +            ccNodeInfo.index = 1;
13735 +            EnqueueNodeInfoToRelevantLst(p_UpdateLst, &ccNodeInfo,
13736 +                                         p_FmPcdCcNextNode->h_Spinlock);
13737 +        }
13738 +        if (p_AdditionalParams->h_ManipForAdd)
13739 +        {
13740 +            p_CcNodeInformation = FindNodeInfoInReleventLst(
13741 +                    FmPcdManipGetNodeLstPointedOnThisManip(
13742 +                            p_AdditionalParams->h_ManipForAdd),
13743 +                    p_AdditionalParams->h_CurrentNode,
13744 +                    FmPcdManipGetSpinlock(p_AdditionalParams->h_ManipForAdd));
13745 +
13746 +            if (p_CcNodeInformation)
13747 +                p_CcNodeInformation->index++;
13748 +            else
13749 +            {
13750 +                memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
13751 +                ccNodeInfo.h_CcNode =
13752 +                        (t_Handle)p_AdditionalParams->h_CurrentNode;
13753 +                ccNodeInfo.index = 1;
13754 +                EnqueueNodeInfoToRelevantLst(
13755 +                        FmPcdManipGetNodeLstPointedOnThisManip(
13756 +                                p_AdditionalParams->h_ManipForAdd),
13757 +                        &ccNodeInfo,
13758 +                        FmPcdManipGetSpinlock(
13759 +                                p_AdditionalParams->h_ManipForAdd));
13760 +            }
13761 +        }
13762 +    }
13763 +
13764 +    if (p_AdditionalParams->h_NodeForRmv)
13765 +    {
13766 +        p_FmPcdCcNextNode = (t_FmPcdCcNode*)p_AdditionalParams->h_NodeForRmv;
13767 +
13768 +        if (!p_AdditionalParams->tree)
13769 +        {
13770 +            p_UpdateLst = &p_FmPcdCcNextNode->ccPrevNodesLst;
13771 +            p_FmPcdCcWorkingOnNode =
13772 +                    (t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode);
13773 +
13774 +            for (p_Pos = LIST_FIRST(&p_FmPcdCcWorkingOnNode->ccTreesLst);
13775 +                    p_Pos != (&p_FmPcdCcWorkingOnNode->ccTreesLst); p_Pos =
13776 +                            LIST_NEXT(p_Pos))
13777 +            {
13778 +                p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
13779 +
13780 +                ASSERT_COND(p_CcNodeInformation->h_CcNode);
13781 +
13782 +                err =
13783 +                        SetRequiredAction(
13784 +                                h_FmPcd,
13785 +                                UPDATE_CC_WITH_DELETE_TREE,
13786 +                                &((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams[p_AdditionalParams->savedKeyIndex],
13787 +                                PTR_MOVE(((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_AdTable, p_AdditionalParams->savedKeyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
13788 +                                1, p_CcNodeInformation->h_CcNode);
13789 +            }
13790 +        }
13791 +        else
13792 +        {
13793 +            p_UpdateLst = &p_FmPcdCcNextNode->ccTreeIdLst;
13794 +
13795 +            err =
13796 +                    SetRequiredAction(
13797 +                            h_FmPcd,
13798 +                            UPDATE_CC_WITH_DELETE_TREE,
13799 +                            &((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams[p_AdditionalParams->savedKeyIndex],
13800 +                            UINT_TO_PTR(((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->ccTreeBaseAddr + p_AdditionalParams->savedKeyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
13801 +                            1, p_AdditionalParams->h_CurrentNode);
13802 +        }
13803 +        if (err)
13804 +            return err;
13805 +
13806 +        /* We remove from the subtree of the removed node tree because it wasn't done in the previous stage
13807 +         Update ccPrevNodesLst or ccTreeIdLst of the removed node
13808 +         Update of the node owner */
13809 +        p_CcNodeInformation = FindNodeInfoInReleventLst(
13810 +                p_UpdateLst, p_AdditionalParams->h_CurrentNode,
13811 +                p_FmPcdCcNextNode->h_Spinlock);
13812 +
13813 +        ASSERT_COND(p_CcNodeInformation);
13814 +        ASSERT_COND(p_CcNodeInformation->index);
13815 +
13816 +        p_CcNodeInformation->index--;
13817 +
13818 +        if (p_CcNodeInformation->index == 0)
13819 +            DequeueNodeInfoFromRelevantLst(p_UpdateLst,
13820 +                                           p_AdditionalParams->h_CurrentNode,
13821 +                                           p_FmPcdCcNextNode->h_Spinlock);
13822 +
13823 +        UpdateNodeOwner(p_FmPcdCcNextNode, FALSE);
13824 +
13825 +        if (p_AdditionalParams->h_ManipForRmv)
13826 +        {
13827 +            p_CcNodeInformation = FindNodeInfoInReleventLst(
13828 +                    FmPcdManipGetNodeLstPointedOnThisManip(
13829 +                            p_AdditionalParams->h_ManipForRmv),
13830 +                    p_AdditionalParams->h_CurrentNode,
13831 +                    FmPcdManipGetSpinlock(p_AdditionalParams->h_ManipForRmv));
13832 +
13833 +            ASSERT_COND(p_CcNodeInformation);
13834 +            ASSERT_COND(p_CcNodeInformation->index);
13835 +
13836 +            p_CcNodeInformation->index--;
13837 +
13838 +            if (p_CcNodeInformation->index == 0)
13839 +                DequeueNodeInfoFromRelevantLst(
13840 +                        FmPcdManipGetNodeLstPointedOnThisManip(
13841 +                                p_AdditionalParams->h_ManipForRmv),
13842 +                        p_AdditionalParams->h_CurrentNode,
13843 +                        FmPcdManipGetSpinlock(
13844 +                                p_AdditionalParams->h_ManipForRmv));
13845 +        }
13846 +    }
13847 +
13848 +    if (p_AdditionalParams->h_ManipForRmv)
13849 +        FmPcdManipUpdateOwner(p_AdditionalParams->h_ManipForRmv, FALSE);
13850 +
13851 +    if (p_AdditionalParams->p_StatsObjForRmv)
13852 +        PutStatsObj((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode),
13853 +                    p_AdditionalParams->p_StatsObjForRmv);
13854 +
13855 +#if (DPAA_VERSION >= 11)
13856 +    if (p_AdditionalParams->h_FrmReplicForRmv)
13857 +        FrmReplicGroupUpdateOwner(p_AdditionalParams->h_FrmReplicForRmv,
13858 +                                  FALSE/* remove */);
13859 +#endif /* (DPAA_VERSION >= 11) */
13860 +
13861 +    if (!useShadowStructs)
13862 +    {
13863 +        h_Muram = FmPcdGetMuramHandle(h_FmPcd);
13864 +        ASSERT_COND(h_Muram);
13865 +
13866 +        if ((p_AdditionalParams->tree && !((t_FmPcd *)h_FmPcd)->p_CcShadow)
13867 +                || (!p_AdditionalParams->tree
13868 +                        && !((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->maxNumOfKeys))
13869 +        {
13870 +            /* We release new AD which was allocated and updated for copy from to actual AD */
13871 +            for (p_Pos = LIST_FIRST(h_FmPcdNewPointersLst);
13872 +                    p_Pos != (h_FmPcdNewPointersLst); p_Pos = LIST_NEXT(p_Pos))
13873 +            {
13874 +
13875 +                p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
13876 +                ASSERT_COND(p_CcNodeInformation->h_CcNode);
13877 +                FM_MURAM_FreeMem(h_Muram, p_CcNodeInformation->h_CcNode);
13878 +            }
13879 +        }
13880 +
13881 +        /* Free Old data structure if it has to be freed - new data structure was allocated*/
13882 +        if (p_AdditionalParams->p_AdTableOld)
13883 +            FM_MURAM_FreeMem(h_Muram, p_AdditionalParams->p_AdTableOld);
13884 +
13885 +        if (p_AdditionalParams->p_KeysMatchTableOld)
13886 +            FM_MURAM_FreeMem(h_Muram, p_AdditionalParams->p_KeysMatchTableOld);
13887 +    }
13888 +
13889 +    /* Update current modified node with changed fields if it's required*/
13890 +    if (!p_AdditionalParams->tree)
13891 +    {
13892 +        if (p_AdditionalParams->p_AdTableNew)
13893 +            ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_AdTable =
13894 +                    p_AdditionalParams->p_AdTableNew;
13895 +
13896 +        if (p_AdditionalParams->p_KeysMatchTableNew)
13897 +            ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_KeysMatchTable =
13898 +                    p_AdditionalParams->p_KeysMatchTableNew;
13899 +
13900 +        /* Locking node's spinlock before updating 'keys and next engine' structure,
13901 +         as it maybe used to retrieve keys statistics */
13902 +        intFlags =
13903 +                XX_LockIntrSpinlock(
13904 +                        ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_Spinlock);
13905 +
13906 +        ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->numOfKeys =
13907 +                p_AdditionalParams->numOfKeys;
13908 +
13909 +        memcpy(((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams,
13910 +               &p_AdditionalParams->keyAndNextEngineParams,
13911 +               sizeof(t_FmPcdCcKeyAndNextEngineParams) * (CC_MAX_NUM_OF_KEYS));
13912 +
13913 +        XX_UnlockIntrSpinlock(
13914 +                ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_Spinlock,
13915 +                intFlags);
13916 +    }
13917 +    else
13918 +    {
13919 +        uint8_t numEntries =
13920 +                ((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->numOfEntries;
13921 +        ASSERT_COND(numEntries < FM_PCD_MAX_NUM_OF_CC_GROUPS);
13922 +        memcpy(&((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams,
13923 +               &p_AdditionalParams->keyAndNextEngineParams,
13924 +               sizeof(t_FmPcdCcKeyAndNextEngineParams) * numEntries);
13925 +    }
13926 +
13927 +    ReleaseLst(h_FmPcdOldPointersLst);
13928 +    ReleaseLst(h_FmPcdNewPointersLst);
13929 +
13930 +    XX_Free(p_AdditionalParams);
13931 +
13932 +    return E_OK;
13933 +}
13934 +
13935 +static t_Handle BuildNewAd(
13936 +        t_Handle h_Ad,
13937 +        t_FmPcdModifyCcKeyAdditionalParams *p_FmPcdModifyCcKeyAdditionalParams,
13938 +        t_FmPcdCcNode *p_CcNode,
13939 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
13940 +{
13941 +    t_FmPcdCcNode *p_FmPcdCcNodeTmp;
13942 +    t_Handle h_OrigAd = NULL;
13943 +
13944 +    p_FmPcdCcNodeTmp = (t_FmPcdCcNode*)XX_Malloc(sizeof(t_FmPcdCcNode));
13945 +    if (!p_FmPcdCcNodeTmp)
13946 +    {
13947 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_FmPcdCcNodeTmp"));
13948 +        return NULL;
13949 +    }
13950 +    memset(p_FmPcdCcNodeTmp, 0, sizeof(t_FmPcdCcNode));
13951 +
13952 +    p_FmPcdCcNodeTmp->numOfKeys = p_FmPcdModifyCcKeyAdditionalParams->numOfKeys;
13953 +    p_FmPcdCcNodeTmp->h_KeysMatchTable =
13954 +            p_FmPcdModifyCcKeyAdditionalParams->p_KeysMatchTableNew;
13955 +    p_FmPcdCcNodeTmp->h_AdTable =
13956 +            p_FmPcdModifyCcKeyAdditionalParams->p_AdTableNew;
13957 +
13958 +    p_FmPcdCcNodeTmp->lclMask = p_CcNode->lclMask;
13959 +    p_FmPcdCcNodeTmp->parseCode = p_CcNode->parseCode;
13960 +    p_FmPcdCcNodeTmp->offset = p_CcNode->offset;
13961 +    p_FmPcdCcNodeTmp->prsArrayOffset = p_CcNode->prsArrayOffset;
13962 +    p_FmPcdCcNodeTmp->ctrlFlow = p_CcNode->ctrlFlow;
13963 +    p_FmPcdCcNodeTmp->ccKeySizeAccExtraction = p_CcNode->ccKeySizeAccExtraction;
13964 +    p_FmPcdCcNodeTmp->sizeOfExtraction = p_CcNode->sizeOfExtraction;
13965 +    p_FmPcdCcNodeTmp->glblMaskSize = p_CcNode->glblMaskSize;
13966 +    p_FmPcdCcNodeTmp->p_GlblMask = p_CcNode->p_GlblMask;
13967 +
13968 +    if (p_FmPcdCcNextEngineParams->nextEngine == e_FM_PCD_CC)
13969 +    {
13970 +        if (p_FmPcdCcNextEngineParams->h_Manip)
13971 +        {
13972 +            h_OrigAd = p_CcNode->h_Ad;
13973 +            if (AllocAndFillAdForContLookupManip(
13974 +                    p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode)
13975 +                    != E_OK)
13976 +            {
13977 +                REPORT_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
13978 +                XX_Free(p_FmPcdCcNodeTmp);
13979 +                return NULL;
13980 +            }
13981 +        }
13982 +        FillAdOfTypeContLookup(h_Ad, NULL, p_CcNode->h_FmPcd, p_FmPcdCcNodeTmp,
13983 +                               h_OrigAd ? NULL : p_FmPcdCcNextEngineParams->h_Manip, NULL);
13984 +    }
13985 +
13986 +#if (DPAA_VERSION >= 11)
13987 +    if ((p_FmPcdCcNextEngineParams->nextEngine == e_FM_PCD_FR)
13988 +            && (p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic))
13989 +    {
13990 +        FillAdOfTypeContLookup(
13991 +                h_Ad, NULL, p_CcNode->h_FmPcd, p_FmPcdCcNodeTmp,
13992 +                p_FmPcdCcNextEngineParams->h_Manip,
13993 +                p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic);
13994 +    }
13995 +#endif /* (DPAA_VERSION >= 11) */
13996 +
13997 +    XX_Free(p_FmPcdCcNodeTmp);
13998 +
13999 +    return E_OK;
14000 +}
14001 +
14002 +static t_Error DynamicChangeHc(
14003 +        t_Handle h_FmPcd, t_List *h_OldPointersLst, t_List *h_NewPointersLst,
14004 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalParams,
14005 +        bool useShadowStructs)
14006 +{
14007 +    t_List *p_PosOld, *p_PosNew;
14008 +    uint32_t oldAdAddrOffset, newAdAddrOffset;
14009 +    uint16_t i = 0;
14010 +    t_Error err = E_OK;
14011 +    uint8_t numOfModifiedPtr;
14012 +
14013 +    ASSERT_COND(h_FmPcd);
14014 +    ASSERT_COND(h_OldPointersLst);
14015 +    ASSERT_COND(h_NewPointersLst);
14016 +
14017 +    numOfModifiedPtr = (uint8_t)LIST_NumOfObjs(h_OldPointersLst);
14018 +
14019 +    if (numOfModifiedPtr)
14020 +    {
14021 +        p_PosNew = LIST_FIRST(h_NewPointersLst);
14022 +        p_PosOld = LIST_FIRST(h_OldPointersLst);
14023 +
14024 +        /* Retrieve address of new AD */
14025 +        newAdAddrOffset = FmPcdCcGetNodeAddrOffsetFromNodeInfo(h_FmPcd,
14026 +                                                               p_PosNew);
14027 +        if (newAdAddrOffset == (uint32_t)ILLEGAL_BASE)
14028 +        {
14029 +            ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
14030 +                                         h_NewPointersLst,
14031 +                                         p_AdditionalParams, useShadowStructs);
14032 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("New AD address"));
14033 +        }
14034 +
14035 +        for (i = 0; i < numOfModifiedPtr; i++)
14036 +        {
14037 +            /* Retrieve address of current AD */
14038 +            oldAdAddrOffset = FmPcdCcGetNodeAddrOffsetFromNodeInfo(h_FmPcd,
14039 +                                                                   p_PosOld);
14040 +            if (oldAdAddrOffset == (uint32_t)ILLEGAL_BASE)
14041 +            {
14042 +                ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
14043 +                                             h_NewPointersLst,
14044 +                                             p_AdditionalParams,
14045 +                                             useShadowStructs);
14046 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Old AD address"));
14047 +            }
14048 +
14049 +            /* Invoke host command to copy from new AD to old AD */
14050 +            err = FmHcPcdCcDoDynamicChange(((t_FmPcd *)h_FmPcd)->h_Hc,
14051 +                                           oldAdAddrOffset, newAdAddrOffset);
14052 +            if (err)
14053 +            {
14054 +                ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
14055 +                                             h_NewPointersLst,
14056 +                                             p_AdditionalParams,
14057 +                                             useShadowStructs);
14058 +                RETURN_ERROR(
14059 +                        MAJOR,
14060 +                        err,
14061 +                        ("For part of nodes changes are done - situation is danger"));
14062 +            }
14063 +
14064 +            p_PosOld = LIST_NEXT(p_PosOld);
14065 +        }
14066 +    }
14067 +    return E_OK;
14068 +}
14069 +
14070 +static t_Error DoDynamicChange(
14071 +        t_Handle h_FmPcd, t_List *h_OldPointersLst, t_List *h_NewPointersLst,
14072 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalParams,
14073 +        bool useShadowStructs)
14074 +{
14075 +    t_FmPcdCcNode *p_CcNode =
14076 +            (t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode);
14077 +    t_List *p_PosNew;
14078 +    t_CcNodeInformation *p_CcNodeInfo;
14079 +    t_FmPcdCcNextEngineParams nextEngineParams;
14080 +    t_Handle h_Ad;
14081 +    uint32_t keySize;
14082 +    t_Error err = E_OK;
14083 +    uint8_t numOfModifiedPtr;
14084 +
14085 +    ASSERT_COND(h_FmPcd);
14086 +
14087 +    memset(&nextEngineParams, 0, sizeof(t_FmPcdCcNextEngineParams));
14088 +
14089 +    numOfModifiedPtr = (uint8_t)LIST_NumOfObjs(h_OldPointersLst);
14090 +
14091 +    if (numOfModifiedPtr)
14092 +    {
14093 +
14094 +        p_PosNew = LIST_FIRST(h_NewPointersLst);
14095 +
14096 +        /* Invoke host-command to copy from the new Ad to existing Ads */
14097 +        err = DynamicChangeHc(h_FmPcd, h_OldPointersLst, h_NewPointersLst,
14098 +                              p_AdditionalParams, useShadowStructs);
14099 +        if (err)
14100 +            RETURN_ERROR(MAJOR, err, NO_MSG);
14101 +
14102 +               if (useShadowStructs)
14103 +               {
14104 +                       /* When the host-command above has ended, the old structures are 'free'and we can update
14105 +                        them by copying from the new shadow structures. */
14106 +                       if (p_CcNode->lclMask)
14107 +                               keySize = (uint32_t)(2 * p_CcNode->ccKeySizeAccExtraction);
14108 +                       else
14109 +                               keySize = p_CcNode->ccKeySizeAccExtraction;
14110 +
14111 +                       MemCpy8(p_AdditionalParams->p_KeysMatchTableOld,
14112 +                                          p_AdditionalParams->p_KeysMatchTableNew,
14113 +                                          p_CcNode->maxNumOfKeys * keySize * sizeof(uint8_t));
14114 +
14115 +                       MemCpy8(
14116 +                                       p_AdditionalParams->p_AdTableOld,
14117 +                                       p_AdditionalParams->p_AdTableNew,
14118 +                                       (uint32_t)((p_CcNode->maxNumOfKeys + 1)
14119 +                                                       * FM_PCD_CC_AD_ENTRY_SIZE));
14120 +
14121 +                       /* Retrieve the address of the allocated Ad */
14122 +                       p_CcNodeInfo = CC_NODE_F_OBJECT(p_PosNew);
14123 +                       h_Ad = p_CcNodeInfo->h_CcNode;
14124 +
14125 +                       /* Build a new Ad that holds the old (now updated) structures */
14126 +                       p_AdditionalParams->p_KeysMatchTableNew =
14127 +                                       p_AdditionalParams->p_KeysMatchTableOld;
14128 +                       p_AdditionalParams->p_AdTableNew = p_AdditionalParams->p_AdTableOld;
14129 +
14130 +                       nextEngineParams.nextEngine = e_FM_PCD_CC;
14131 +                       nextEngineParams.params.ccParams.h_CcNode = (t_Handle)p_CcNode;
14132 +
14133 +                       BuildNewAd(h_Ad, p_AdditionalParams, p_CcNode, &nextEngineParams);
14134 +
14135 +                       /* HC to copy from the new Ad (old updated structures) to current Ad (uses shadow structures) */
14136 +                       err = DynamicChangeHc(h_FmPcd, h_OldPointersLst, h_NewPointersLst,
14137 +                                                                 p_AdditionalParams, useShadowStructs);
14138 +                       if (err)
14139 +                               RETURN_ERROR(MAJOR, err, NO_MSG);
14140 +               }
14141 +    }
14142 +
14143 +    err = ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
14144 +                                       h_NewPointersLst,
14145 +                                       p_AdditionalParams, useShadowStructs);
14146 +    if (err)
14147 +        RETURN_ERROR(MAJOR, err, NO_MSG);
14148 +
14149 +    return E_OK;
14150 +}
14151 +
14152 +#ifdef FM_CAPWAP_SUPPORT
14153 +static bool IsCapwapApplSpecific(t_Handle h_Node)
14154 +{
14155 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_Node;
14156 +    bool isManipForCapwapApplSpecificBuild = FALSE;
14157 +    int i = 0;
14158 +
14159 +    ASSERT_COND(h_Node);
14160 +    /* assumption that this function called only for INDEXED_FLOW_ID - so no miss*/
14161 +    for (i = 0; i < p_CcNode->numOfKeys; i++)
14162 +    {
14163 +        if ( p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip &&
14164 +                FmPcdManipIsCapwapApplSpecific(p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip))
14165 +        {
14166 +            isManipForCapwapApplSpecificBuild = TRUE;
14167 +            break;
14168 +        }
14169 +    }
14170 +    return isManipForCapwapApplSpecificBuild;
14171 +
14172 +}
14173 +#endif /* FM_CAPWAP_SUPPORT */
14174 +
14175 +static t_Error CcUpdateParam(
14176 +        t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_FmPort,
14177 +        t_FmPcdCcKeyAndNextEngineParams *p_CcKeyAndNextEngineParams,
14178 +        uint16_t numOfEntries, t_Handle h_Ad, bool validate, uint16_t level,
14179 +        t_Handle h_FmTree, bool modify)
14180 +{
14181 +    t_FmPcdCcNode *p_CcNode;
14182 +    t_Error err;
14183 +    uint16_t tmp = 0;
14184 +    int i = 0;
14185 +    t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_FmTree;
14186 +
14187 +    level++;
14188 +
14189 +    if (p_CcTree->h_IpReassemblyManip)
14190 +    {
14191 +        err = FmPcdManipUpdate(h_FmPcd, h_PcdParams, h_FmPort,
14192 +                               p_CcTree->h_IpReassemblyManip, NULL, validate,
14193 +                               level, h_FmTree, modify);
14194 +        if (err)
14195 +            RETURN_ERROR(MAJOR, err, NO_MSG);
14196 +    }
14197 +
14198 +    if (p_CcTree->h_CapwapReassemblyManip)
14199 +    {
14200 +        err = FmPcdManipUpdate(h_FmPcd, h_PcdParams, h_FmPort,
14201 +                               p_CcTree->h_CapwapReassemblyManip, NULL, validate,
14202 +                               level, h_FmTree, modify);
14203 +        if (err)
14204 +            RETURN_ERROR(MAJOR, err, NO_MSG);
14205 +    }
14206 +
14207 +    if (numOfEntries)
14208 +    {
14209 +        for (i = 0; i < numOfEntries; i++)
14210 +        {
14211 +            if (i == 0)
14212 +                h_Ad = PTR_MOVE(h_Ad, i*FM_PCD_CC_AD_ENTRY_SIZE);
14213 +            else
14214 +                h_Ad = PTR_MOVE(h_Ad, FM_PCD_CC_AD_ENTRY_SIZE);
14215 +
14216 +            if (p_CcKeyAndNextEngineParams[i].nextEngineParams.nextEngine
14217 +                    == e_FM_PCD_CC)
14218 +            {
14219 +                p_CcNode =
14220 +                        p_CcKeyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
14221 +                ASSERT_COND(p_CcNode);
14222 +
14223 +                if (p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip)
14224 +                {
14225 +                    err =
14226 +                            FmPcdManipUpdate(
14227 +                                    h_FmPcd,
14228 +                                    NULL,
14229 +                                    h_FmPort,
14230 +                                    p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip,
14231 +                                    h_Ad, validate, level, h_FmTree, modify);
14232 +                    if (err)
14233 +                        RETURN_ERROR(MAJOR, err, NO_MSG);
14234 +                }
14235 +
14236 +                if (p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
14237 +                        != e_FM_PCD_INVALID)
14238 +                    tmp = (uint8_t)(p_CcNode->numOfKeys + 1);
14239 +                else
14240 +                    tmp = p_CcNode->numOfKeys;
14241 +
14242 +                err = CcUpdateParam(h_FmPcd, h_PcdParams, h_FmPort,
14243 +                                    p_CcNode->keyAndNextEngineParams, tmp,
14244 +                                    p_CcNode->h_AdTable, validate, level,
14245 +                                    h_FmTree, modify);
14246 +                if (err)
14247 +                    RETURN_ERROR(MAJOR, err, NO_MSG);
14248 +            }
14249 +            else
14250 +            {
14251 +                if (p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip)
14252 +                {
14253 +                    err =
14254 +                            FmPcdManipUpdate(
14255 +                                    h_FmPcd,
14256 +                                    NULL,
14257 +                                    h_FmPort,
14258 +                                    p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip,
14259 +                                    h_Ad, validate, level, h_FmTree, modify);
14260 +                    if (err)
14261 +                        RETURN_ERROR(MAJOR, err, NO_MSG);
14262 +                }
14263 +            }
14264 +        }
14265 +    }
14266 +
14267 +    return E_OK;
14268 +}
14269 +
14270 +static ccPrivateInfo_t IcDefineCode(t_FmPcdCcNodeParams *p_CcNodeParam)
14271 +{
14272 +    switch (p_CcNodeParam->extractCcParams.extractNonHdr.action)
14273 +    {
14274 +        case (e_FM_PCD_ACTION_EXACT_MATCH):
14275 +            switch (p_CcNodeParam->extractCcParams.extractNonHdr.src)
14276 +            {
14277 +                case (e_FM_PCD_EXTRACT_FROM_KEY):
14278 +                    return CC_PRIVATE_INFO_IC_KEY_EXACT_MATCH;
14279 +                case (e_FM_PCD_EXTRACT_FROM_HASH):
14280 +                    return CC_PRIVATE_INFO_IC_HASH_EXACT_MATCH;
14281 +                default:
14282 +                    return CC_PRIVATE_INFO_NONE;
14283 +            }
14284 +
14285 +        case (e_FM_PCD_ACTION_INDEXED_LOOKUP):
14286 +            switch (p_CcNodeParam->extractCcParams.extractNonHdr.src)
14287 +            {
14288 +                case (e_FM_PCD_EXTRACT_FROM_HASH):
14289 +                    return CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP;
14290 +                case (e_FM_PCD_EXTRACT_FROM_FLOW_ID):
14291 +                    return CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP;
14292 +                default:
14293 +                    return CC_PRIVATE_INFO_NONE;
14294 +            }
14295 +
14296 +        default:
14297 +            break;
14298 +    }
14299 +
14300 +    return CC_PRIVATE_INFO_NONE;
14301 +}
14302 +
14303 +static t_CcNodeInformation * DequeueAdditionalInfoFromRelevantLst(
14304 +        t_List *p_List)
14305 +{
14306 +    t_CcNodeInformation *p_CcNodeInfo = NULL;
14307 +
14308 +    if (!LIST_IsEmpty(p_List))
14309 +    {
14310 +        p_CcNodeInfo = CC_NODE_F_OBJECT(p_List->p_Next);
14311 +        LIST_DelAndInit(&p_CcNodeInfo->node);
14312 +    }
14313 +
14314 +    return p_CcNodeInfo;
14315 +}
14316 +
14317 +void ReleaseLst(t_List *p_List)
14318 +{
14319 +    t_CcNodeInformation *p_CcNodeInfo = NULL;
14320 +
14321 +    if (!LIST_IsEmpty(p_List))
14322 +    {
14323 +        p_CcNodeInfo = DequeueAdditionalInfoFromRelevantLst(p_List);
14324 +        while (p_CcNodeInfo)
14325 +        {
14326 +            XX_Free(p_CcNodeInfo);
14327 +            p_CcNodeInfo = DequeueAdditionalInfoFromRelevantLst(p_List);
14328 +        }
14329 +    }
14330 +
14331 +    LIST_Del(p_List);
14332 +}
14333 +
14334 +static void DeleteNode(t_FmPcdCcNode *p_CcNode)
14335 +{
14336 +    uint32_t i;
14337 +
14338 +    if (!p_CcNode)
14339 +        return;
14340 +
14341 +    if (p_CcNode->p_GlblMask)
14342 +    {
14343 +        XX_Free(p_CcNode->p_GlblMask);
14344 +        p_CcNode->p_GlblMask = NULL;
14345 +    }
14346 +
14347 +    if (p_CcNode->h_KeysMatchTable)
14348 +    {
14349 +        FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
14350 +                         p_CcNode->h_KeysMatchTable);
14351 +        p_CcNode->h_KeysMatchTable = NULL;
14352 +    }
14353 +
14354 +    if (p_CcNode->h_AdTable)
14355 +    {
14356 +        FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
14357 +                         p_CcNode->h_AdTable);
14358 +        p_CcNode->h_AdTable = NULL;
14359 +    }
14360 +
14361 +    if (p_CcNode->h_Ad)
14362 +    {
14363 +        FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
14364 +                         p_CcNode->h_Ad);
14365 +        p_CcNode->h_Ad = NULL;
14366 +        p_CcNode->h_TmpAd = NULL;
14367 +    }
14368 +
14369 +    if (p_CcNode->h_StatsFLRs)
14370 +    {
14371 +        FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
14372 +                         p_CcNode->h_StatsFLRs);
14373 +        p_CcNode->h_StatsFLRs = NULL;
14374 +    }
14375 +
14376 +    if (p_CcNode->h_Spinlock)
14377 +    {
14378 +        XX_FreeSpinlock(p_CcNode->h_Spinlock);
14379 +        p_CcNode->h_Spinlock = NULL;
14380 +    }
14381 +
14382 +    /* Restore the original counters pointer instead of the mutual pointer (mutual to all hash buckets) */
14383 +    if (p_CcNode->isHashBucket
14384 +            && (p_CcNode->statisticsMode != e_FM_PCD_CC_STATS_MODE_NONE))
14385 +        p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].p_StatsObj->h_StatsCounters =
14386 +                p_CcNode->h_PrivMissStatsCounters;
14387 +
14388 +    /* Releasing all currently used statistics objects, including 'miss' entry */
14389 +    for (i = 0; i < p_CcNode->numOfKeys + 1; i++)
14390 +        if (p_CcNode->keyAndNextEngineParams[i].p_StatsObj)
14391 +            PutStatsObj(p_CcNode,
14392 +                        p_CcNode->keyAndNextEngineParams[i].p_StatsObj);
14393 +
14394 +    if (!LIST_IsEmpty(&p_CcNode->availableStatsLst))
14395 +    {
14396 +        t_Handle h_FmMuram = FmPcdGetMuramHandle(p_CcNode->h_FmPcd);
14397 +        ASSERT_COND(h_FmMuram);
14398 +
14399 +        FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
14400 +    }
14401 +
14402 +    LIST_Del(&p_CcNode->availableStatsLst);
14403 +
14404 +       ReleaseLst(&p_CcNode->availableStatsLst);
14405 +    ReleaseLst(&p_CcNode->ccPrevNodesLst);
14406 +    ReleaseLst(&p_CcNode->ccTreeIdLst);
14407 +    ReleaseLst(&p_CcNode->ccTreesLst);
14408 +
14409 +    XX_Free(p_CcNode);
14410 +}
14411 +
14412 +static void DeleteTree(t_FmPcdCcTree *p_FmPcdTree, t_FmPcd *p_FmPcd)
14413 +{
14414 +    if (p_FmPcdTree)
14415 +    {
14416 +        if (p_FmPcdTree->ccTreeBaseAddr)
14417 +        {
14418 +            FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_FmPcd),
14419 +                             UINT_TO_PTR(p_FmPcdTree->ccTreeBaseAddr));
14420 +            p_FmPcdTree->ccTreeBaseAddr = 0;
14421 +        }
14422 +
14423 +        ReleaseLst(&p_FmPcdTree->fmPortsLst);
14424 +
14425 +        XX_Free(p_FmPcdTree);
14426 +    }
14427 +}
14428 +
14429 +static void GetCcExtractKeySize(uint8_t parseCodeRealSize,
14430 +                                uint8_t *parseCodeCcSize)
14431 +{
14432 +    if ((parseCodeRealSize > 0) && (parseCodeRealSize < 2))
14433 +        *parseCodeCcSize = 1;
14434 +    else
14435 +        if (parseCodeRealSize == 2)
14436 +            *parseCodeCcSize = 2;
14437 +        else
14438 +            if ((parseCodeRealSize > 2) && (parseCodeRealSize <= 4))
14439 +                *parseCodeCcSize = 4;
14440 +            else
14441 +                if ((parseCodeRealSize > 4) && (parseCodeRealSize <= 8))
14442 +                    *parseCodeCcSize = 8;
14443 +                else
14444 +                    if ((parseCodeRealSize > 8) && (parseCodeRealSize <= 16))
14445 +                        *parseCodeCcSize = 16;
14446 +                    else
14447 +                        if ((parseCodeRealSize > 16)
14448 +                                && (parseCodeRealSize <= 24))
14449 +                            *parseCodeCcSize = 24;
14450 +                        else
14451 +                            if ((parseCodeRealSize > 24)
14452 +                                    && (parseCodeRealSize <= 32))
14453 +                                *parseCodeCcSize = 32;
14454 +                            else
14455 +                                if ((parseCodeRealSize > 32)
14456 +                                        && (parseCodeRealSize <= 40))
14457 +                                    *parseCodeCcSize = 40;
14458 +                                else
14459 +                                    if ((parseCodeRealSize > 40)
14460 +                                            && (parseCodeRealSize <= 48))
14461 +                                        *parseCodeCcSize = 48;
14462 +                                    else
14463 +                                        if ((parseCodeRealSize > 48)
14464 +                                                && (parseCodeRealSize <= 56))
14465 +                                            *parseCodeCcSize = 56;
14466 +                                        else
14467 +                                            *parseCodeCcSize = 0;
14468 +}
14469 +
14470 +static void GetSizeHeaderField(e_NetHeaderType hdr, t_FmPcdFields field,
14471 +                                      uint8_t *parseCodeRealSize)
14472 +{
14473 +    switch (hdr)
14474 +    {
14475 +        case (HEADER_TYPE_ETH):
14476 +            switch (field.eth)
14477 +            {
14478 +                case (NET_HEADER_FIELD_ETH_DA):
14479 +                    *parseCodeRealSize = 6;
14480 +                    break;
14481 +
14482 +                case (NET_HEADER_FIELD_ETH_SA):
14483 +                    *parseCodeRealSize = 6;
14484 +                    break;
14485 +
14486 +                case (NET_HEADER_FIELD_ETH_TYPE):
14487 +                    *parseCodeRealSize = 2;
14488 +                    break;
14489 +
14490 +                default:
14491 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported1"));
14492 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14493 +                    break;
14494 +            }
14495 +            break;
14496 +
14497 +        case (HEADER_TYPE_PPPoE):
14498 +            switch (field.pppoe)
14499 +            {
14500 +                case (NET_HEADER_FIELD_PPPoE_PID):
14501 +                    *parseCodeRealSize = 2;
14502 +                    break;
14503 +
14504 +                default:
14505 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported1"));
14506 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14507 +                    break;
14508 +            }
14509 +            break;
14510 +
14511 +        case (HEADER_TYPE_VLAN):
14512 +            switch (field.vlan)
14513 +            {
14514 +                case (NET_HEADER_FIELD_VLAN_TCI):
14515 +                    *parseCodeRealSize = 2;
14516 +                    break;
14517 +
14518 +                default:
14519 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported2"));
14520 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14521 +                    break;
14522 +            }
14523 +            break;
14524 +
14525 +        case (HEADER_TYPE_MPLS):
14526 +            switch (field.mpls)
14527 +            {
14528 +                case (NET_HEADER_FIELD_MPLS_LABEL_STACK):
14529 +                    *parseCodeRealSize = 4;
14530 +                    break;
14531 +
14532 +                default:
14533 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported3"));
14534 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14535 +                    break;
14536 +            }
14537 +            break;
14538 +
14539 +        case (HEADER_TYPE_IPv4):
14540 +            switch (field.ipv4)
14541 +            {
14542 +                case (NET_HEADER_FIELD_IPv4_DST_IP):
14543 +                case (NET_HEADER_FIELD_IPv4_SRC_IP):
14544 +                    *parseCodeRealSize = 4;
14545 +                    break;
14546 +
14547 +                case (NET_HEADER_FIELD_IPv4_TOS):
14548 +                case (NET_HEADER_FIELD_IPv4_PROTO):
14549 +                    *parseCodeRealSize = 1;
14550 +                    break;
14551 +
14552 +                case (NET_HEADER_FIELD_IPv4_DST_IP
14553 +                        | NET_HEADER_FIELD_IPv4_SRC_IP):
14554 +                    *parseCodeRealSize = 8;
14555 +                    break;
14556 +
14557 +                case (NET_HEADER_FIELD_IPv4_TTL):
14558 +                    *parseCodeRealSize = 1;
14559 +                    break;
14560 +
14561 +                default:
14562 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported4"));
14563 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14564 +                    break;
14565 +            }
14566 +            break;
14567 +
14568 +        case (HEADER_TYPE_IPv6):
14569 +            switch (field.ipv6)
14570 +            {
14571 +                case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL
14572 +                        | NET_HEADER_FIELD_IPv6_TC):
14573 +                    *parseCodeRealSize = 4;
14574 +                    break;
14575 +
14576 +                case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
14577 +                case (NET_HEADER_FIELD_IPv6_HOP_LIMIT):
14578 +                    *parseCodeRealSize = 1;
14579 +                    break;
14580 +
14581 +                case (NET_HEADER_FIELD_IPv6_DST_IP):
14582 +                case (NET_HEADER_FIELD_IPv6_SRC_IP):
14583 +                    *parseCodeRealSize = 16;
14584 +                    break;
14585 +
14586 +                default:
14587 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported5"));
14588 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14589 +                    break;
14590 +            }
14591 +            break;
14592 +
14593 +        case (HEADER_TYPE_IP):
14594 +            switch (field.ip)
14595 +            {
14596 +                case (NET_HEADER_FIELD_IP_DSCP):
14597 +                case (NET_HEADER_FIELD_IP_PROTO):
14598 +                    *parseCodeRealSize = 1;
14599 +                    break;
14600 +
14601 +                default:
14602 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported5"));
14603 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14604 +                    break;
14605 +            }
14606 +            break;
14607 +
14608 +        case (HEADER_TYPE_GRE):
14609 +            switch (field.gre)
14610 +            {
14611 +                case (NET_HEADER_FIELD_GRE_TYPE):
14612 +                    *parseCodeRealSize = 2;
14613 +                    break;
14614 +
14615 +                default:
14616 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported6"));
14617 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14618 +                    break;
14619 +            }
14620 +            break;
14621 +
14622 +        case (HEADER_TYPE_MINENCAP):
14623 +            switch (field.minencap)
14624 +            {
14625 +                case (NET_HEADER_FIELD_MINENCAP_TYPE):
14626 +                    *parseCodeRealSize = 1;
14627 +                    break;
14628 +
14629 +                case (NET_HEADER_FIELD_MINENCAP_DST_IP):
14630 +                case (NET_HEADER_FIELD_MINENCAP_SRC_IP):
14631 +                    *parseCodeRealSize = 4;
14632 +                    break;
14633 +
14634 +                case (NET_HEADER_FIELD_MINENCAP_SRC_IP
14635 +                        | NET_HEADER_FIELD_MINENCAP_DST_IP):
14636 +                    *parseCodeRealSize = 8;
14637 +                    break;
14638 +
14639 +                default:
14640 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported7"));
14641 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14642 +                    break;
14643 +            }
14644 +            break;
14645 +
14646 +        case (HEADER_TYPE_TCP):
14647 +            switch (field.tcp)
14648 +            {
14649 +                case (NET_HEADER_FIELD_TCP_PORT_SRC):
14650 +                case (NET_HEADER_FIELD_TCP_PORT_DST):
14651 +                    *parseCodeRealSize = 2;
14652 +                    break;
14653 +
14654 +                case (NET_HEADER_FIELD_TCP_PORT_SRC
14655 +                        | NET_HEADER_FIELD_TCP_PORT_DST):
14656 +                    *parseCodeRealSize = 4;
14657 +                    break;
14658 +
14659 +                default:
14660 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported8"));
14661 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14662 +                    break;
14663 +            }
14664 +            break;
14665 +
14666 +        case (HEADER_TYPE_UDP):
14667 +            switch (field.udp)
14668 +            {
14669 +                case (NET_HEADER_FIELD_UDP_PORT_SRC):
14670 +                case (NET_HEADER_FIELD_UDP_PORT_DST):
14671 +                    *parseCodeRealSize = 2;
14672 +                    break;
14673 +
14674 +                case (NET_HEADER_FIELD_UDP_PORT_SRC
14675 +                        | NET_HEADER_FIELD_UDP_PORT_DST):
14676 +                    *parseCodeRealSize = 4;
14677 +                    break;
14678 +
14679 +                default:
14680 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported9"));
14681 +                    *parseCodeRealSize = CC_SIZE_ILLEGAL;
14682 +                    break;
14683 +            }
14684 +            break;
14685 +
14686 +        default:
14687 +            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported10"));
14688 +            *parseCodeRealSize = CC_SIZE_ILLEGAL;
14689 +            break;
14690 +    }
14691 +}
14692 +
14693 +t_Error ValidateNextEngineParams(
14694 +        t_Handle h_FmPcd, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
14695 +        e_FmPcdCcStatsMode statsMode)
14696 +{
14697 +    uint16_t absoluteProfileId;
14698 +    t_Error err = E_OK;
14699 +    uint8_t relativeSchemeId;
14700 +
14701 +    if ((statsMode == e_FM_PCD_CC_STATS_MODE_NONE)
14702 +            && (p_FmPcdCcNextEngineParams->statisticsEn))
14703 +        RETURN_ERROR(
14704 +                MAJOR,
14705 +                E_CONFLICT,
14706 +                ("Statistics are requested for a key, but statistics mode was set"
14707 +                "to 'NONE' upon initialization"));
14708 +
14709 +    switch (p_FmPcdCcNextEngineParams->nextEngine)
14710 +    {
14711 +        case (e_FM_PCD_INVALID):
14712 +            err = E_NOT_SUPPORTED;
14713 +            break;
14714 +
14715 +        case (e_FM_PCD_DONE):
14716 +            if ((p_FmPcdCcNextEngineParams->params.enqueueParams.action
14717 +                    == e_FM_PCD_ENQ_FRAME)
14718 +                    && p_FmPcdCcNextEngineParams->params.enqueueParams.overrideFqid)
14719 +            {
14720 +                if (!p_FmPcdCcNextEngineParams->params.enqueueParams.newFqid)
14721 +                    RETURN_ERROR(
14722 +                            MAJOR,
14723 +                            E_CONFLICT,
14724 +                            ("When overrideFqid is set, newFqid must not be zero"));
14725 +                if (p_FmPcdCcNextEngineParams->params.enqueueParams.newFqid
14726 +                        & ~0x00FFFFFF)
14727 +                    RETURN_ERROR(
14728 +                            MAJOR, E_INVALID_VALUE,
14729 +                            ("fqidForCtrlFlow must be between 1 and 2^24-1"));
14730 +            }
14731 +            break;
14732 +
14733 +        case (e_FM_PCD_KG):
14734 +            relativeSchemeId =
14735 +                    FmPcdKgGetRelativeSchemeId(
14736 +                            h_FmPcd,
14737 +                            FmPcdKgGetSchemeId(
14738 +                                    p_FmPcdCcNextEngineParams->params.kgParams.h_DirectScheme));
14739 +            if (relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
14740 +                RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
14741 +            if (!FmPcdKgIsSchemeValidSw(
14742 +                    p_FmPcdCcNextEngineParams->params.kgParams.h_DirectScheme))
14743 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,
14744 +                             ("not valid schemeIndex in KG next engine param"));
14745 +            if (!KgIsSchemeAlwaysDirect(h_FmPcd, relativeSchemeId))
14746 +                RETURN_ERROR(
14747 +                        MAJOR,
14748 +                        E_INVALID_STATE,
14749 +                        ("CC Node may point only to a scheme that is always direct."));
14750 +            break;
14751 +
14752 +        case (e_FM_PCD_PLCR):
14753 +            if (p_FmPcdCcNextEngineParams->params.plcrParams.overrideParams)
14754 +            {
14755 +                /* if private policer profile, it may be uninitialized yet, therefore no checks are done at this stage */
14756 +                if (p_FmPcdCcNextEngineParams->params.plcrParams.sharedProfile)
14757 +                {
14758 +                    err =
14759 +                            FmPcdPlcrGetAbsoluteIdByProfileParams(
14760 +                                    h_FmPcd,
14761 +                                    e_FM_PCD_PLCR_SHARED,
14762 +                                    NULL,
14763 +                                    p_FmPcdCcNextEngineParams->params.plcrParams.newRelativeProfileId,
14764 +                                    &absoluteProfileId);
14765 +                    if (err)
14766 +                        RETURN_ERROR(MAJOR, err,
14767 +                                     ("Shared profile offset is out of range"));
14768 +                    if (!FmPcdPlcrIsProfileValid(h_FmPcd, absoluteProfileId))
14769 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE,
14770 +                                     ("Invalid profile"));
14771 +                }
14772 +            }
14773 +            break;
14774 +
14775 +        case (e_FM_PCD_HASH):
14776 +            p_FmPcdCcNextEngineParams->nextEngine = e_FM_PCD_CC;
14777 +        case (e_FM_PCD_CC):
14778 +            if (!p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode)
14779 +                RETURN_ERROR(MAJOR, E_NULL_POINTER,
14780 +                             ("handler to next Node is NULL"));
14781 +            break;
14782 +
14783 +#if (DPAA_VERSION >= 11)
14784 +        case (e_FM_PCD_FR):
14785 +            if (!p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic)
14786 +                err = E_NOT_SUPPORTED;
14787 +            break;
14788 +#endif /* (DPAA_VERSION >= 11) */
14789 +
14790 +        default:
14791 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
14792 +                         ("Next engine is not correct"));
14793 +    }
14794 +
14795 +
14796 +    return err;
14797 +}
14798 +
14799 +static uint8_t GetGenParseCode(e_FmPcdExtractFrom src,
14800 +                               uint32_t offset, bool glblMask,
14801 +                               uint8_t *parseArrayOffset, bool fromIc,
14802 +                               ccPrivateInfo_t icCode)
14803 +{
14804 +    if (!fromIc)
14805 +    {
14806 +        switch (src)
14807 +        {
14808 +            case (e_FM_PCD_EXTRACT_FROM_FRAME_START):
14809 +                if (glblMask)
14810 +                    return CC_PC_GENERIC_WITH_MASK;
14811 +                else
14812 +                    return CC_PC_GENERIC_WITHOUT_MASK;
14813 +
14814 +            case (e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE):
14815 +                *parseArrayOffset = CC_PC_PR_NEXT_HEADER_OFFSET;
14816 +                if (offset)
14817 +                    return CC_PR_OFFSET;
14818 +                else
14819 +                    return CC_PR_WITHOUT_OFFSET;
14820 +
14821 +            default:
14822 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 'extract from' src"));
14823 +                return CC_PC_ILLEGAL;
14824 +        }
14825 +    }
14826 +    else
14827 +    {
14828 +        switch (icCode)
14829 +        {
14830 +            case (CC_PRIVATE_INFO_IC_KEY_EXACT_MATCH):
14831 +                *parseArrayOffset = 0x50;
14832 +                return CC_PC_GENERIC_IC_GMASK;
14833 +
14834 +            case (CC_PRIVATE_INFO_IC_HASH_EXACT_MATCH):
14835 +                *parseArrayOffset = 0x48;
14836 +                return CC_PC_GENERIC_IC_GMASK;
14837 +
14838 +            case (CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP):
14839 +                *parseArrayOffset = 0x48;
14840 +                return CC_PC_GENERIC_IC_HASH_INDEXED;
14841 +
14842 +            case (CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP):
14843 +                *parseArrayOffset = 0x16;
14844 +                return CC_PC_GENERIC_IC_HASH_INDEXED;
14845 +
14846 +            default:
14847 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 'extract from' src"));
14848 +                break;
14849 +        }
14850 +    }
14851 +
14852 +    return CC_PC_ILLEGAL;
14853 +}
14854 +
14855 +static uint8_t GetFullFieldParseCode(e_NetHeaderType hdr, e_FmPcdHdrIndex index,
14856 +                                     t_FmPcdFields field)
14857 +{
14858 +    switch (hdr)
14859 +    {
14860 +        case (HEADER_TYPE_NONE):
14861 +            ASSERT_COND(FALSE);
14862 +            return CC_PC_ILLEGAL;
14863 +
14864 +        case (HEADER_TYPE_ETH):
14865 +            switch (field.eth)
14866 +            {
14867 +                case (NET_HEADER_FIELD_ETH_DA):
14868 +                    return CC_PC_FF_MACDST;
14869 +                case (NET_HEADER_FIELD_ETH_SA):
14870 +                    return CC_PC_FF_MACSRC;
14871 +                case (NET_HEADER_FIELD_ETH_TYPE):
14872 +                    return CC_PC_FF_ETYPE;
14873 +                default:
14874 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
14875 +                    return CC_PC_ILLEGAL;
14876 +            }
14877 +
14878 +        case (HEADER_TYPE_VLAN):
14879 +            switch (field.vlan)
14880 +            {
14881 +                case (NET_HEADER_FIELD_VLAN_TCI):
14882 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14883 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14884 +                        return CC_PC_FF_TCI1;
14885 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
14886 +                        return CC_PC_FF_TCI2;
14887 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
14888 +                    return CC_PC_ILLEGAL;
14889 +                default:
14890 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
14891 +                    return CC_PC_ILLEGAL;
14892 +            }
14893 +
14894 +        case (HEADER_TYPE_MPLS):
14895 +            switch (field.mpls)
14896 +            {
14897 +                case (NET_HEADER_FIELD_MPLS_LABEL_STACK):
14898 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14899 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14900 +                        return CC_PC_FF_MPLS1;
14901 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
14902 +                        return CC_PC_FF_MPLS_LAST;
14903 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS index"));
14904 +                    return CC_PC_ILLEGAL;
14905 +                default:
14906 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
14907 +                    return CC_PC_ILLEGAL;
14908 +            }
14909 +
14910 +        case (HEADER_TYPE_IPv4):
14911 +            switch (field.ipv4)
14912 +            {
14913 +                case (NET_HEADER_FIELD_IPv4_DST_IP):
14914 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14915 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14916 +                        return CC_PC_FF_IPV4DST1;
14917 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14918 +                        return CC_PC_FF_IPV4DST2;
14919 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
14920 +                    return CC_PC_ILLEGAL;
14921 +                case (NET_HEADER_FIELD_IPv4_TOS):
14922 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14923 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14924 +                        return CC_PC_FF_IPV4IPTOS_TC1;
14925 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14926 +                        return CC_PC_FF_IPV4IPTOS_TC2;
14927 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
14928 +                    return CC_PC_ILLEGAL;
14929 +                case (NET_HEADER_FIELD_IPv4_PROTO):
14930 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14931 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14932 +                        return CC_PC_FF_IPV4PTYPE1;
14933 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14934 +                        return CC_PC_FF_IPV4PTYPE2;
14935 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
14936 +                    return CC_PC_ILLEGAL;
14937 +                case (NET_HEADER_FIELD_IPv4_SRC_IP):
14938 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14939 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14940 +                        return CC_PC_FF_IPV4SRC1;
14941 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14942 +                        return CC_PC_FF_IPV4SRC2;
14943 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
14944 +                    return CC_PC_ILLEGAL;
14945 +                case (NET_HEADER_FIELD_IPv4_SRC_IP
14946 +                        | NET_HEADER_FIELD_IPv4_DST_IP):
14947 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14948 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14949 +                        return CC_PC_FF_IPV4SRC1_IPV4DST1;
14950 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14951 +                        return CC_PC_FF_IPV4SRC2_IPV4DST2;
14952 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
14953 +                    return CC_PC_ILLEGAL;
14954 +                case (NET_HEADER_FIELD_IPv4_TTL):
14955 +                    return CC_PC_FF_IPV4TTL;
14956 +                default:
14957 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
14958 +                    return CC_PC_ILLEGAL;
14959 +            }
14960 +
14961 +        case (HEADER_TYPE_IPv6):
14962 +            switch (field.ipv6)
14963 +            {
14964 +                case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL
14965 +                        | NET_HEADER_FIELD_IPv6_TC):
14966 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14967 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14968 +                        return CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1;
14969 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14970 +                        return CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2;
14971 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
14972 +                    return CC_PC_ILLEGAL;
14973 +
14974 +                case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
14975 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14976 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14977 +                        return CC_PC_FF_IPV6PTYPE1;
14978 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14979 +                        return CC_PC_FF_IPV6PTYPE2;
14980 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
14981 +                        return CC_PC_FF_IPPID;
14982 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
14983 +                    return CC_PC_ILLEGAL;
14984 +
14985 +                case (NET_HEADER_FIELD_IPv6_DST_IP):
14986 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14987 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14988 +                        return CC_PC_FF_IPV6DST1;
14989 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14990 +                        return CC_PC_FF_IPV6DST2;
14991 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
14992 +                    return CC_PC_ILLEGAL;
14993 +
14994 +                case (NET_HEADER_FIELD_IPv6_SRC_IP):
14995 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
14996 +                            || (index == e_FM_PCD_HDR_INDEX_1))
14997 +                        return CC_PC_FF_IPV6SRC1;
14998 +                    if (index == e_FM_PCD_HDR_INDEX_2)
14999 +                        return CC_PC_FF_IPV6SRC2;
15000 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
15001 +                    return CC_PC_ILLEGAL;
15002 +
15003 +                case (NET_HEADER_FIELD_IPv6_HOP_LIMIT):
15004 +                    return CC_PC_FF_IPV6HOP_LIMIT;
15005 +
15006 +                default:
15007 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15008 +                    return CC_PC_ILLEGAL;
15009 +            }
15010 +
15011 +        case (HEADER_TYPE_IP):
15012 +            switch (field.ip)
15013 +            {
15014 +                case (NET_HEADER_FIELD_IP_DSCP):
15015 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE)
15016 +                            || (index == e_FM_PCD_HDR_INDEX_1))
15017 +                        return CC_PC_FF_IPDSCP;
15018 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP index"));
15019 +                    return CC_PC_ILLEGAL;
15020 +
15021 +                case (NET_HEADER_FIELD_IP_PROTO):
15022 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
15023 +                        return CC_PC_FF_IPPID;
15024 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP index"));
15025 +                    return CC_PC_ILLEGAL;
15026 +
15027 +                default:
15028 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15029 +                    return CC_PC_ILLEGAL;
15030 +            }
15031 +
15032 +        case (HEADER_TYPE_GRE):
15033 +            switch (field.gre)
15034 +            {
15035 +                case (NET_HEADER_FIELD_GRE_TYPE):
15036 +                    return CC_PC_FF_GREPTYPE;
15037 +
15038 +                default:
15039 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15040 +                    return CC_PC_ILLEGAL;
15041 +            }
15042 +
15043 +        case (HEADER_TYPE_MINENCAP):
15044 +            switch (field.minencap)
15045 +            {
15046 +                case (NET_HEADER_FIELD_MINENCAP_TYPE):
15047 +                    return CC_PC_FF_MINENCAP_PTYPE;
15048 +
15049 +                case (NET_HEADER_FIELD_MINENCAP_DST_IP):
15050 +                    return CC_PC_FF_MINENCAP_IPDST;
15051 +
15052 +                case (NET_HEADER_FIELD_MINENCAP_SRC_IP):
15053 +                    return CC_PC_FF_MINENCAP_IPSRC;
15054 +
15055 +                case (NET_HEADER_FIELD_MINENCAP_SRC_IP
15056 +                        | NET_HEADER_FIELD_MINENCAP_DST_IP):
15057 +                    return CC_PC_FF_MINENCAP_IPSRC_IPDST;
15058 +
15059 +                default:
15060 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15061 +                    return CC_PC_ILLEGAL;
15062 +            }
15063 +
15064 +        case (HEADER_TYPE_TCP):
15065 +            switch (field.tcp)
15066 +            {
15067 +                case (NET_HEADER_FIELD_TCP_PORT_SRC):
15068 +                    return CC_PC_FF_L4PSRC;
15069 +
15070 +                case (NET_HEADER_FIELD_TCP_PORT_DST):
15071 +                    return CC_PC_FF_L4PDST;
15072 +
15073 +                case (NET_HEADER_FIELD_TCP_PORT_DST
15074 +                        | NET_HEADER_FIELD_TCP_PORT_SRC):
15075 +                    return CC_PC_FF_L4PSRC_L4PDST;
15076 +
15077 +                default:
15078 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15079 +                    return CC_PC_ILLEGAL;
15080 +            }
15081 +
15082 +        case (HEADER_TYPE_PPPoE):
15083 +            switch (field.pppoe)
15084 +            {
15085 +                case (NET_HEADER_FIELD_PPPoE_PID):
15086 +                    return CC_PC_FF_PPPPID;
15087 +
15088 +                default:
15089 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15090 +                    return CC_PC_ILLEGAL;
15091 +            }
15092 +
15093 +        case (HEADER_TYPE_UDP):
15094 +            switch (field.udp)
15095 +            {
15096 +                case (NET_HEADER_FIELD_UDP_PORT_SRC):
15097 +                    return CC_PC_FF_L4PSRC;
15098 +
15099 +                case (NET_HEADER_FIELD_UDP_PORT_DST):
15100 +                    return CC_PC_FF_L4PDST;
15101 +
15102 +                case (NET_HEADER_FIELD_UDP_PORT_DST
15103 +                        | NET_HEADER_FIELD_UDP_PORT_SRC):
15104 +                    return CC_PC_FF_L4PSRC_L4PDST;
15105 +
15106 +                default:
15107 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15108 +                    return CC_PC_ILLEGAL;
15109 +            }
15110 +
15111 +        default:
15112 +            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15113 +            return CC_PC_ILLEGAL;
15114 +    }
15115 +}
15116 +
15117 +static uint8_t GetPrParseCode(e_NetHeaderType hdr, e_FmPcdHdrIndex hdrIndex,
15118 +                              uint32_t offset, bool glblMask,
15119 +                              uint8_t *parseArrayOffset)
15120 +{
15121 +    bool offsetRelevant = FALSE;
15122 +
15123 +    if (offset)
15124 +        offsetRelevant = TRUE;
15125 +
15126 +    switch (hdr)
15127 +    {
15128 +        case (HEADER_TYPE_NONE):
15129 +            ASSERT_COND(FALSE);
15130 +            return CC_PC_ILLEGAL;
15131 +
15132 +        case (HEADER_TYPE_ETH):
15133 +            *parseArrayOffset = (uint8_t)CC_PC_PR_ETH_OFFSET;
15134 +            break;
15135 +
15136 +        case (HEADER_TYPE_USER_DEFINED_SHIM1):
15137 +            if (offset || glblMask)
15138 +                *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM1_OFFSET;
15139 +            else
15140 +                return CC_PC_PR_SHIM1;
15141 +            break;
15142 +
15143 +        case (HEADER_TYPE_USER_DEFINED_SHIM2):
15144 +            if (offset || glblMask)
15145 +                *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM2_OFFSET;
15146 +            else
15147 +                return CC_PC_PR_SHIM2;
15148 +            break;
15149 +
15150 +        case (HEADER_TYPE_LLC_SNAP):
15151 +            *parseArrayOffset = CC_PC_PR_USER_LLC_SNAP_OFFSET;
15152 +            break;
15153 +
15154 +        case (HEADER_TYPE_PPPoE):
15155 +            *parseArrayOffset = CC_PC_PR_PPPOE_OFFSET;
15156 +            break;
15157 +
15158 +        case (HEADER_TYPE_MPLS):
15159 +            if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
15160 +                    || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
15161 +                *parseArrayOffset = CC_PC_PR_MPLS1_OFFSET;
15162 +            else
15163 +                if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
15164 +                    *parseArrayOffset = CC_PC_PR_MPLS_LAST_OFFSET;
15165 +                else
15166 +                {
15167 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS header index"));
15168 +                    return CC_PC_ILLEGAL;
15169 +                }
15170 +            break;
15171 +
15172 +        case (HEADER_TYPE_IPv4):
15173 +        case (HEADER_TYPE_IPv6):
15174 +            if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
15175 +                    || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
15176 +                *parseArrayOffset = CC_PC_PR_IP1_OFFSET;
15177 +            else
15178 +                if (hdrIndex == e_FM_PCD_HDR_INDEX_2)
15179 +                    *parseArrayOffset = CC_PC_PR_IP_LAST_OFFSET;
15180 +                else
15181 +                {
15182 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP header index"));
15183 +                    return CC_PC_ILLEGAL;
15184 +                }
15185 +            break;
15186 +
15187 +        case (HEADER_TYPE_MINENCAP):
15188 +            *parseArrayOffset = CC_PC_PR_MINENC_OFFSET;
15189 +            break;
15190 +
15191 +        case (HEADER_TYPE_GRE):
15192 +            *parseArrayOffset = CC_PC_PR_GRE_OFFSET;
15193 +            break;
15194 +
15195 +        case (HEADER_TYPE_TCP):
15196 +        case (HEADER_TYPE_UDP):
15197 +        case (HEADER_TYPE_IPSEC_AH):
15198 +        case (HEADER_TYPE_IPSEC_ESP):
15199 +        case (HEADER_TYPE_DCCP):
15200 +        case (HEADER_TYPE_SCTP):
15201 +            *parseArrayOffset = CC_PC_PR_L4_OFFSET;
15202 +            break;
15203 +
15204 +        default:
15205 +            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP header for this type of operation"));
15206 +            return CC_PC_ILLEGAL;
15207 +    }
15208 +
15209 +    if (offsetRelevant)
15210 +        return CC_PR_OFFSET;
15211 +    else
15212 +        return CC_PR_WITHOUT_OFFSET;
15213 +}
15214 +
15215 +static uint8_t GetFieldParseCode(e_NetHeaderType hdr, t_FmPcdFields field,
15216 +                                 uint32_t offset, uint8_t *parseArrayOffset,
15217 +                                 e_FmPcdHdrIndex hdrIndex)
15218 +{
15219 +    bool offsetRelevant = FALSE;
15220 +
15221 +    if (offset)
15222 +        offsetRelevant = TRUE;
15223 +
15224 +    switch (hdr)
15225 +    {
15226 +        case (HEADER_TYPE_NONE):
15227 +            ASSERT_COND(FALSE);
15228 +                break;
15229 +        case (HEADER_TYPE_ETH):
15230 +            switch (field.eth)
15231 +            {
15232 +                case (NET_HEADER_FIELD_ETH_TYPE):
15233 +                    *parseArrayOffset = CC_PC_PR_ETYPE_LAST_OFFSET;
15234 +                    break;
15235 +
15236 +                default:
15237 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15238 +                    return CC_PC_ILLEGAL;
15239 +            }
15240 +            break;
15241 +
15242 +        case (HEADER_TYPE_VLAN):
15243 +            switch (field.vlan)
15244 +            {
15245 +                case (NET_HEADER_FIELD_VLAN_TCI):
15246 +                    if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
15247 +                            || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
15248 +                        *parseArrayOffset = CC_PC_PR_VLAN1_OFFSET;
15249 +                    else
15250 +                        if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
15251 +                            *parseArrayOffset = CC_PC_PR_VLAN2_OFFSET;
15252 +                    break;
15253 +
15254 +                default:
15255 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
15256 +                    return CC_PC_ILLEGAL;
15257 +            }
15258 +            break;
15259 +
15260 +        default:
15261 +            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal header "));
15262 +            return CC_PC_ILLEGAL;
15263 +    }
15264 +
15265 +    if (offsetRelevant)
15266 +        return CC_PR_OFFSET;
15267 +    else
15268 +        return CC_PR_WITHOUT_OFFSET;
15269 +}
15270 +
15271 +static void FillAdOfTypeResult(t_Handle h_Ad,
15272 +                               t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
15273 +                               t_FmPcd *p_FmPcd,
15274 +                               t_FmPcdCcNextEngineParams *p_CcNextEngineParams)
15275 +{
15276 +    t_AdOfTypeResult *p_AdResult = (t_AdOfTypeResult *)h_Ad;
15277 +    t_Handle h_TmpAd;
15278 +    uint32_t tmp = 0, tmpNia = 0;
15279 +    uint16_t profileId;
15280 +    t_Handle p_AdNewPtr = NULL;
15281 +    t_Error err = E_OK;
15282 +
15283 +    /* There are 3 cases handled in this routine of building a "result" type AD.
15284 +     * Case 1: No Manip. The action descriptor is built within the match table.
15285 +     * Case 2: Manip exists. A new AD is created - p_AdNewPtr. It is initialized
15286 +     *         either in the FmPcdManipUpdateAdResultForCc routine or it was already
15287 +     *         initialized and returned here.
15288 +     *         p_AdResult (within the match table) will be initialized after
15289 +     *         this routine returns and point to the existing AD.
15290 +     * Case 3: Manip exists. The action descriptor is built within the match table.
15291 +     *         FmPcdManipUpdateAdResultForCc returns a NULL p_AdNewPtr.
15292 +     *
15293 +     * If statistics were enabled and the statistics mode of this node requires
15294 +     * a statistics Ad, it will be placed after the result Ad and before the
15295 +     * manip Ad, if manip Ad exists here.
15296 +     */
15297 +
15298 +    /* As default, the "new" ptr is the current one. i.e. the content of the result
15299 +     * AD will be written into the match table itself (case (1))*/
15300 +    p_AdNewPtr = p_AdResult;
15301 +
15302 +    /* Initialize an action descriptor, if current statistics mode requires an Ad */
15303 +    if (p_FmPcdCcStatsParams)
15304 +    {
15305 +        ASSERT_COND(p_FmPcdCcStatsParams->h_StatsAd);
15306 +        ASSERT_COND(p_FmPcdCcStatsParams->h_StatsCounters);
15307 +
15308 +        /* Swapping addresses between statistics Ad and the current lookup AD addresses */
15309 +        h_TmpAd = p_FmPcdCcStatsParams->h_StatsAd;
15310 +        p_FmPcdCcStatsParams->h_StatsAd = h_Ad;
15311 +        h_Ad = h_TmpAd;
15312 +
15313 +        p_AdNewPtr = h_Ad;
15314 +        p_AdResult = h_Ad;
15315 +
15316 +        /* Init statistics Ad and connect current lookup AD as 'next action' from statistics Ad */
15317 +        UpdateStatsAd(p_FmPcdCcStatsParams, h_Ad, p_FmPcd->physicalMuramBase);
15318 +    }
15319 +
15320 +    /* Create manip and return p_AdNewPtr to either a new descriptor or NULL */
15321 +    if (p_CcNextEngineParams->h_Manip)
15322 +        FmPcdManipUpdateAdResultForCc(p_CcNextEngineParams->h_Manip,
15323 +                                      p_CcNextEngineParams, h_Ad, &p_AdNewPtr);
15324 +
15325 +    /* if (p_AdNewPtr = NULL) --> Done. (case (3)) */
15326 +    if (p_AdNewPtr)
15327 +    {
15328 +        /* case (1) and (2) */
15329 +        switch (p_CcNextEngineParams->nextEngine)
15330 +        {
15331 +            case (e_FM_PCD_DONE):
15332 +                if (p_CcNextEngineParams->params.enqueueParams.action
15333 +                        == e_FM_PCD_ENQ_FRAME)
15334 +                {
15335 +                    if (p_CcNextEngineParams->params.enqueueParams.overrideFqid)
15336 +                    {
15337 +                        tmp = FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE;
15338 +                        tmp |=
15339 +                                p_CcNextEngineParams->params.enqueueParams.newFqid;
15340 +#if (DPAA_VERSION >= 11)
15341 +                        tmp |=
15342 +                                (p_CcNextEngineParams->params.enqueueParams.newRelativeStorageProfileId
15343 +                                        & FM_PCD_AD_RESULT_VSP_MASK)
15344 +                                        << FM_PCD_AD_RESULT_VSP_SHIFT;
15345 +#endif /* (DPAA_VERSION >= 11) */
15346 +                    }
15347 +                    else
15348 +                    {
15349 +                        tmp = FM_PCD_AD_RESULT_DATA_FLOW_TYPE;
15350 +                        tmp |= FM_PCD_AD_RESULT_PLCR_DIS;
15351 +                    }
15352 +                }
15353 +
15354 +                if (p_CcNextEngineParams->params.enqueueParams.action
15355 +                        == e_FM_PCD_DROP_FRAME)
15356 +                    tmpNia |= GET_NIA_BMI_AC_DISCARD_FRAME(p_FmPcd);
15357 +                else
15358 +                    tmpNia |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
15359 +                break;
15360 +
15361 +            case (e_FM_PCD_KG):
15362 +                if (p_CcNextEngineParams->params.kgParams.overrideFqid)
15363 +                {
15364 +                    tmp = FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE;
15365 +                    tmp |= p_CcNextEngineParams->params.kgParams.newFqid;
15366 +#if (DPAA_VERSION >= 11)
15367 +                    tmp |=
15368 +                            (p_CcNextEngineParams->params.kgParams.newRelativeStorageProfileId
15369 +                                    & FM_PCD_AD_RESULT_VSP_MASK)
15370 +                                    << FM_PCD_AD_RESULT_VSP_SHIFT;
15371 +#endif /* (DPAA_VERSION >= 11) */
15372 +                }
15373 +                else
15374 +                {
15375 +                    tmp = FM_PCD_AD_RESULT_DATA_FLOW_TYPE;
15376 +                    tmp |= FM_PCD_AD_RESULT_PLCR_DIS;
15377 +                }
15378 +                tmpNia = NIA_KG_DIRECT;
15379 +                tmpNia |= NIA_ENG_KG;
15380 +                tmpNia |= NIA_KG_CC_EN;
15381 +                tmpNia |= FmPcdKgGetSchemeId(
15382 +                        p_CcNextEngineParams->params.kgParams.h_DirectScheme);
15383 +                break;
15384 +
15385 +            case (e_FM_PCD_PLCR):
15386 +                if (p_CcNextEngineParams->params.plcrParams.overrideParams)
15387 +                {
15388 +                    tmp = FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE;
15389 +
15390 +                    /* if private policer profile, it may be uninitialized yet, therefore no checks are done at this stage */
15391 +                    if (p_CcNextEngineParams->params.plcrParams.sharedProfile)
15392 +                    {
15393 +                        tmpNia |= NIA_PLCR_ABSOLUTE;
15394 +                        err = FmPcdPlcrGetAbsoluteIdByProfileParams(
15395 +                                (t_Handle)p_FmPcd,
15396 +                                e_FM_PCD_PLCR_SHARED,
15397 +                                NULL,
15398 +                                p_CcNextEngineParams->params.plcrParams.newRelativeProfileId,
15399 +                                &profileId);
15400 +
15401 +                                               if (err != E_OK) {
15402 +                                                       REPORT_ERROR(MAJOR, err, NO_MSG);
15403 +                                                       return;
15404 +                                               }
15405 +
15406 +                    }
15407 +                    else
15408 +                        profileId =
15409 +                                p_CcNextEngineParams->params.plcrParams.newRelativeProfileId;
15410 +
15411 +                    tmp |= p_CcNextEngineParams->params.plcrParams.newFqid;
15412 +#if (DPAA_VERSION >= 11)
15413 +                    tmp |=
15414 +                            (p_CcNextEngineParams->params.plcrParams.newRelativeStorageProfileId
15415 +                                    & FM_PCD_AD_RESULT_VSP_MASK)
15416 +                                    << FM_PCD_AD_RESULT_VSP_SHIFT;
15417 +#endif /* (DPAA_VERSION >= 11) */
15418 +                    WRITE_UINT32(
15419 +                            p_AdResult->plcrProfile,
15420 +                            (uint32_t)((uint32_t)profileId << FM_PCD_AD_PROFILEID_FOR_CNTRL_SHIFT));
15421 +                }
15422 +                else
15423 +                    tmp = FM_PCD_AD_RESULT_DATA_FLOW_TYPE;
15424 +
15425 +                tmpNia |=
15426 +                        NIA_ENG_PLCR
15427 +                                | p_CcNextEngineParams->params.plcrParams.newRelativeProfileId;
15428 +                break;
15429 +
15430 +            default:
15431 +                return;
15432 +        }WRITE_UINT32(p_AdResult->fqid, tmp);
15433 +
15434 +        if (p_CcNextEngineParams->h_Manip)
15435 +        {
15436 +            tmp = GET_UINT32(p_AdResult->plcrProfile);
15437 +            tmp |= (uint32_t)(XX_VirtToPhys(p_AdNewPtr)
15438 +                    - (p_FmPcd->physicalMuramBase)) >> 4;
15439 +            WRITE_UINT32(p_AdResult->plcrProfile, tmp);
15440 +
15441 +            tmpNia |= FM_PCD_AD_RESULT_EXTENDED_MODE;
15442 +            tmpNia |= FM_PCD_AD_RESULT_NADEN;
15443 +        }
15444 +
15445 +#if (DPAA_VERSION >= 11)
15446 +        tmpNia |= FM_PCD_AD_RESULT_NO_OM_VSPE;
15447 +#endif /* (DPAA_VERSION >= 11) */
15448 +        WRITE_UINT32(p_AdResult->nia, tmpNia);
15449 +    }
15450 +}
15451 +
15452 +static t_Error CcUpdateParams(t_Handle h_FmPcd, t_Handle h_PcdParams,
15453 +                              t_Handle h_FmPort, t_Handle h_FmTree,
15454 +                              bool validate)
15455 +{
15456 +    t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_FmTree;
15457 +
15458 +    return CcUpdateParam(h_FmPcd, h_PcdParams, h_FmPort,
15459 +                         p_CcTree->keyAndNextEngineParams,
15460 +                         p_CcTree->numOfEntries,
15461 +                         UINT_TO_PTR(p_CcTree->ccTreeBaseAddr), validate, 0,
15462 +                         h_FmTree, FALSE);
15463 +}
15464 +
15465 +
15466 +static void ReleaseNewNodeCommonPart(
15467 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
15468 +{
15469 +    if (p_AdditionalInfo->p_AdTableNew)
15470 +        FM_MURAM_FreeMem(
15471 +                FmPcdGetMuramHandle(
15472 +                        ((t_FmPcdCcNode *)(p_AdditionalInfo->h_CurrentNode))->h_FmPcd),
15473 +                p_AdditionalInfo->p_AdTableNew);
15474 +
15475 +    if (p_AdditionalInfo->p_KeysMatchTableNew)
15476 +        FM_MURAM_FreeMem(
15477 +                FmPcdGetMuramHandle(
15478 +                        ((t_FmPcdCcNode *)(p_AdditionalInfo->h_CurrentNode))->h_FmPcd),
15479 +                p_AdditionalInfo->p_KeysMatchTableNew);
15480 +}
15481 +
15482 +static t_Error UpdateGblMask(t_FmPcdCcNode *p_CcNode, uint8_t keySize,
15483 +                             uint8_t *p_Mask)
15484 +{
15485 +    uint8_t prvGlblMaskSize = p_CcNode->glblMaskSize;
15486 +
15487 +    if (p_Mask && !p_CcNode->glblMaskUpdated && (keySize <= 4)
15488 +            && !p_CcNode->lclMask)
15489 +    {
15490 +        if (p_CcNode->parseCode && (p_CcNode->parseCode != CC_PC_FF_TCI1)
15491 +                && (p_CcNode->parseCode != CC_PC_FF_TCI2)
15492 +                && (p_CcNode->parseCode != CC_PC_FF_MPLS1)
15493 +                && (p_CcNode->parseCode != CC_PC_FF_MPLS_LAST)
15494 +                && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC1)
15495 +                && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC2)
15496 +                && (p_CcNode->parseCode != CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1)
15497 +                && (p_CcNode->parseCode != CC_PC_FF_IPDSCP)
15498 +                && (p_CcNode->parseCode != CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2))
15499 +        {
15500 +            p_CcNode->glblMaskSize = 0;
15501 +            p_CcNode->lclMask = TRUE;
15502 +        }
15503 +        else
15504 +        {
15505 +            memcpy(p_CcNode->p_GlblMask, p_Mask, (sizeof(uint8_t)) * keySize);
15506 +            p_CcNode->glblMaskUpdated = TRUE;
15507 +            p_CcNode->glblMaskSize = 4;
15508 +        }
15509 +    }
15510 +    else
15511 +        if (p_Mask && (keySize <= 4) && !p_CcNode->lclMask)
15512 +        {
15513 +            if (memcmp(p_CcNode->p_GlblMask, p_Mask, keySize) != 0)
15514 +            {
15515 +                p_CcNode->lclMask = TRUE;
15516 +                p_CcNode->glblMaskSize = 0;
15517 +            }
15518 +        }
15519 +        else
15520 +            if (!p_Mask && p_CcNode->glblMaskUpdated && (keySize <= 4))
15521 +            {
15522 +                uint32_t tmpMask = 0xffffffff;
15523 +                if (memcmp(p_CcNode->p_GlblMask, &tmpMask, 4) != 0)
15524 +                {
15525 +                    p_CcNode->lclMask = TRUE;
15526 +                    p_CcNode->glblMaskSize = 0;
15527 +                }
15528 +            }
15529 +            else
15530 +                if (p_Mask)
15531 +                {
15532 +                    p_CcNode->lclMask = TRUE;
15533 +                    p_CcNode->glblMaskSize = 0;
15534 +                }
15535 +
15536 +    /* In static mode (maxNumOfKeys > 0), local mask is supported
15537 +     only is mask support was enabled at initialization */
15538 +    if (p_CcNode->maxNumOfKeys && (!p_CcNode->maskSupport) && p_CcNode->lclMask)
15539 +    {
15540 +        p_CcNode->lclMask = FALSE;
15541 +        p_CcNode->glblMaskSize = prvGlblMaskSize;
15542 +        return ERROR_CODE(E_NOT_SUPPORTED);
15543 +    }
15544 +
15545 +    return E_OK;
15546 +}
15547 +
15548 +static __inline__ t_Handle GetNewAd(t_Handle h_FmPcdCcNodeOrTree, bool isTree)
15549 +{
15550 +    t_FmPcd *p_FmPcd;
15551 +    t_Handle h_Ad;
15552 +
15553 +    if (isTree)
15554 +        p_FmPcd = (t_FmPcd *)(((t_FmPcdCcTree *)h_FmPcdCcNodeOrTree)->h_FmPcd);
15555 +    else
15556 +        p_FmPcd = (t_FmPcd *)(((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->h_FmPcd);
15557 +
15558 +    if ((isTree && p_FmPcd->p_CcShadow)
15559 +            || (!isTree && ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->maxNumOfKeys))
15560 +    {
15561 +        /* The allocated shadow is divided as follows:
15562 +         0 . . .       16 . . .
15563 +         ---------------------------------------------------
15564 +         |   Shadow   |   Shadow Keys   |   Shadow Next    |
15565 +         |     Ad     |   Match Table   |   Engine Table   |
15566 +         | (16 bytes) | (maximal size)  |  (maximal size)  |
15567 +         ---------------------------------------------------
15568 +         */
15569 +        if (!p_FmPcd->p_CcShadow)
15570 +        {
15571 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("CC Shadow not allocated"));
15572 +            return NULL;
15573 +        }
15574 +
15575 +        h_Ad = p_FmPcd->p_CcShadow;
15576 +    }
15577 +    else
15578 +    {
15579 +        h_Ad = (t_Handle)FM_MURAM_AllocMem(FmPcdGetMuramHandle(p_FmPcd),
15580 +                                           FM_PCD_CC_AD_ENTRY_SIZE,
15581 +                                           FM_PCD_CC_AD_TABLE_ALIGN);
15582 +        if (!h_Ad)
15583 +        {
15584 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC node action descriptor"));
15585 +            return NULL;
15586 +        }
15587 +    }
15588 +
15589 +    return h_Ad;
15590 +}
15591 +
15592 +static t_Error BuildNewNodeCommonPart(
15593 +        t_FmPcdCcNode *p_CcNode, int *size,
15594 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
15595 +{
15596 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
15597 +
15598 +    if (p_CcNode->lclMask)
15599 +        *size = 2 * p_CcNode->ccKeySizeAccExtraction;
15600 +    else
15601 +        *size = p_CcNode->ccKeySizeAccExtraction;
15602 +
15603 +    if (p_CcNode->maxNumOfKeys == 0)
15604 +    {
15605 +        p_AdditionalInfo->p_AdTableNew = (t_Handle)FM_MURAM_AllocMem(
15606 +                FmPcdGetMuramHandle(p_FmPcd),
15607 +                (uint32_t)((p_AdditionalInfo->numOfKeys + 1)
15608 +                        * FM_PCD_CC_AD_ENTRY_SIZE),
15609 +                FM_PCD_CC_AD_TABLE_ALIGN);
15610 +        if (!p_AdditionalInfo->p_AdTableNew)
15611 +            RETURN_ERROR(
15612 +                    MAJOR, E_NO_MEMORY,
15613 +                    ("MURAM allocation for CC node action descriptors table"));
15614 +
15615 +        p_AdditionalInfo->p_KeysMatchTableNew = (t_Handle)FM_MURAM_AllocMem(
15616 +                FmPcdGetMuramHandle(p_FmPcd),
15617 +                (uint32_t)(*size * sizeof(uint8_t)
15618 +                        * (p_AdditionalInfo->numOfKeys + 1)),
15619 +                FM_PCD_CC_KEYS_MATCH_TABLE_ALIGN);
15620 +        if (!p_AdditionalInfo->p_KeysMatchTableNew)
15621 +        {
15622 +            FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
15623 +                             p_AdditionalInfo->p_AdTableNew);
15624 +            p_AdditionalInfo->p_AdTableNew = NULL;
15625 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
15626 +                         ("MURAM allocation for CC node key match table"));
15627 +        }
15628 +
15629 +        MemSet8(
15630 +                (uint8_t*)p_AdditionalInfo->p_AdTableNew,
15631 +                0,
15632 +                (uint32_t)((p_AdditionalInfo->numOfKeys + 1)
15633 +                        * FM_PCD_CC_AD_ENTRY_SIZE));
15634 +        MemSet8((uint8_t*)p_AdditionalInfo->p_KeysMatchTableNew, 0,
15635 +                   *size * sizeof(uint8_t) * (p_AdditionalInfo->numOfKeys + 1));
15636 +    }
15637 +    else
15638 +    {
15639 +        /* The allocated shadow is divided as follows:
15640 +         0 . . .       16 . . .
15641 +         ---------------------------------------------------
15642 +         |   Shadow   |   Shadow Keys   |   Shadow Next    |
15643 +         |     Ad     |   Match Table   |   Engine Table   |
15644 +         | (16 bytes) | (maximal size)  |  (maximal size)  |
15645 +         ---------------------------------------------------
15646 +         */
15647 +
15648 +        if (!p_FmPcd->p_CcShadow)
15649 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("CC Shadow not allocated"));
15650 +
15651 +        p_AdditionalInfo->p_KeysMatchTableNew =
15652 +                PTR_MOVE(p_FmPcd->p_CcShadow, FM_PCD_CC_AD_ENTRY_SIZE);
15653 +        p_AdditionalInfo->p_AdTableNew =
15654 +                PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, p_CcNode->keysMatchTableMaxSize);
15655 +
15656 +        MemSet8(
15657 +                (uint8_t*)p_AdditionalInfo->p_AdTableNew,
15658 +                0,
15659 +                (uint32_t)((p_CcNode->maxNumOfKeys + 1)
15660 +                        * FM_PCD_CC_AD_ENTRY_SIZE));
15661 +        MemSet8((uint8_t*)p_AdditionalInfo->p_KeysMatchTableNew, 0,
15662 +                   (*size) * sizeof(uint8_t) * (p_CcNode->maxNumOfKeys));
15663 +    }
15664 +
15665 +    p_AdditionalInfo->p_AdTableOld = p_CcNode->h_AdTable;
15666 +    p_AdditionalInfo->p_KeysMatchTableOld = p_CcNode->h_KeysMatchTable;
15667 +
15668 +    return E_OK;
15669 +}
15670 +
15671 +static t_Error BuildNewNodeAddOrMdfyKeyAndNextEngine(
15672 +        t_Handle h_FmPcd, t_FmPcdCcNode *p_CcNode, uint16_t keyIndex,
15673 +        t_FmPcdCcKeyParams *p_KeyParams,
15674 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo, bool add)
15675 +{
15676 +    t_Error err = E_OK;
15677 +    t_Handle p_AdTableNewTmp, p_KeysMatchTableNewTmp;
15678 +    t_Handle p_KeysMatchTableOldTmp, p_AdTableOldTmp;
15679 +    int size;
15680 +    int i = 0, j = 0;
15681 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
15682 +    uint32_t requiredAction = 0;
15683 +    bool prvLclMask;
15684 +    t_CcNodeInformation *p_CcNodeInformation;
15685 +    t_FmPcdCcStatsParams statsParams = { 0 };
15686 +    t_List *p_Pos;
15687 +    t_FmPcdStatsObj *p_StatsObj;
15688 +
15689 +    /* Check that new NIA is legal */
15690 +    err = ValidateNextEngineParams(h_FmPcd, &p_KeyParams->ccNextEngineParams,
15691 +                                   p_CcNode->statisticsMode);
15692 +    if (err)
15693 +        RETURN_ERROR(MAJOR, err, NO_MSG);
15694 +
15695 +    prvLclMask = p_CcNode->lclMask;
15696 +
15697 +    /* Check that new key is not require update of localMask */
15698 +    err = UpdateGblMask(p_CcNode, p_CcNode->ccKeySizeAccExtraction,
15699 +                        p_KeyParams->p_Mask);
15700 +    if (err)
15701 +        RETURN_ERROR(MAJOR, err, (NO_MSG));
15702 +
15703 +    /* Update internal data structure with new next engine for the given index */
15704 +    memcpy(&p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams,
15705 +           &p_KeyParams->ccNextEngineParams, sizeof(t_FmPcdCcNextEngineParams));
15706 +
15707 +    memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].key,
15708 +           p_KeyParams->p_Key, p_CcNode->userSizeOfExtraction);
15709 +
15710 +    if ((p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
15711 +            == e_FM_PCD_CC)
15712 +            && p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
15713 +    {
15714 +        err =
15715 +                AllocAndFillAdForContLookupManip(
15716 +                        p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode);
15717 +        if (err)
15718 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
15719 +    }
15720 +
15721 +    if (p_KeyParams->p_Mask)
15722 +        memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask,
15723 +               p_KeyParams->p_Mask, p_CcNode->userSizeOfExtraction);
15724 +    else
15725 +        memset(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask, 0xFF,
15726 +               p_CcNode->userSizeOfExtraction);
15727 +
15728 +    /* Update numOfKeys */
15729 +    if (add)
15730 +        p_AdditionalInfo->numOfKeys = (uint8_t)(p_CcNode->numOfKeys + 1);
15731 +    else
15732 +        p_AdditionalInfo->numOfKeys = (uint8_t)p_CcNode->numOfKeys;
15733 +
15734 +    /* Allocate new tables in MURAM: keys match table and action descriptors table */
15735 +    err = BuildNewNodeCommonPart(p_CcNode, &size, p_AdditionalInfo);
15736 +    if (err)
15737 +        RETURN_ERROR(MAJOR, err, NO_MSG);
15738 +
15739 +    /* Check that manip is legal and what requiredAction is necessary for this manip */
15740 +    if (p_KeyParams->ccNextEngineParams.h_Manip)
15741 +    {
15742 +        err = FmPcdManipCheckParamsForCcNextEngine(
15743 +                &p_KeyParams->ccNextEngineParams, &requiredAction);
15744 +        if (err)
15745 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
15746 +    }
15747 +
15748 +    p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction =
15749 +            requiredAction;
15750 +    p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction |=
15751 +            UPDATE_CC_WITH_TREE;
15752 +
15753 +    /* Update new Ad and new Key Table according to new requirement */
15754 +    i = 0;
15755 +    for (j = 0; j < p_AdditionalInfo->numOfKeys; j++)
15756 +    {
15757 +        p_AdTableNewTmp =
15758 +                PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j*FM_PCD_CC_AD_ENTRY_SIZE);
15759 +
15760 +        if (j == keyIndex)
15761 +        {
15762 +            if (p_KeyParams->ccNextEngineParams.statisticsEn)
15763 +            {
15764 +                /* Allocate a statistics object that holds statistics AD and counters.
15765 +                 - For added key - New statistics AD and counters pointer need to be allocated
15766 +                 new statistics object. If statistics were enabled, we need to replace the
15767 +                 existing descriptor with a new descriptor with nullified counters.
15768 +                 */
15769 +                p_StatsObj = GetStatsObj(p_CcNode);
15770 +                ASSERT_COND(p_StatsObj);
15771 +
15772 +                /* Store allocated statistics object */
15773 +                ASSERT_COND(keyIndex < CC_MAX_NUM_OF_KEYS);
15774 +                p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj =
15775 +                        p_StatsObj;
15776 +
15777 +                statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
15778 +                statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
15779 +#if (DPAA_VERSION >= 11)
15780 +                statsParams.h_StatsFLRs = p_CcNode->h_StatsFLRs;
15781 +
15782 +#endif /* (DPAA_VERSION >= 11) */
15783 +
15784 +                /* Building action descriptor for the received new key */
15785 +                NextStepAd(p_AdTableNewTmp, &statsParams,
15786 +                           &p_KeyParams->ccNextEngineParams, p_FmPcd);
15787 +            }
15788 +            else
15789 +            {
15790 +                /* Building action descriptor for the received new key */
15791 +                NextStepAd(p_AdTableNewTmp, NULL,
15792 +                           &p_KeyParams->ccNextEngineParams, p_FmPcd);
15793 +            }
15794 +
15795 +            /* Copy the received new key into keys match table */
15796 +            p_KeysMatchTableNewTmp =
15797 +                    PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j*size*sizeof(uint8_t));
15798 +
15799 +            MemCpy8((void*)p_KeysMatchTableNewTmp, p_KeyParams->p_Key,
15800 +                        p_CcNode->userSizeOfExtraction);
15801 +
15802 +            /* Update mask for the received new key */
15803 +            if (p_CcNode->lclMask)
15804 +            {
15805 +                if (p_KeyParams->p_Mask)
15806 +                {
15807 +                    MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
15808 +                            p_CcNode->ccKeySizeAccExtraction),
15809 +                                p_KeyParams->p_Mask,
15810 +                                p_CcNode->userSizeOfExtraction);
15811 +                }
15812 +                else
15813 +                    if (p_CcNode->ccKeySizeAccExtraction > 4)
15814 +                    {
15815 +                        MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
15816 +                                p_CcNode->ccKeySizeAccExtraction),
15817 +                                   0xff, p_CcNode->userSizeOfExtraction);
15818 +                    }
15819 +                    else
15820 +                    {
15821 +                        MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
15822 +                                p_CcNode->ccKeySizeAccExtraction),
15823 +                                    p_CcNode->p_GlblMask,
15824 +                                    p_CcNode->userSizeOfExtraction);
15825 +                    }
15826 +            }
15827 +
15828 +            /* If key modification requested, the old entry is omitted and replaced by the new parameters */
15829 +            if (!add)
15830 +                i++;
15831 +        }
15832 +        else
15833 +        {
15834 +            /* Copy existing action descriptors to the newly allocated Ad table */
15835 +            p_AdTableOldTmp =
15836 +                    PTR_MOVE(p_AdditionalInfo->p_AdTableOld, i*FM_PCD_CC_AD_ENTRY_SIZE);
15837 +            MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp,
15838 +                       FM_PCD_CC_AD_ENTRY_SIZE);
15839 +
15840 +            /* Copy existing keys and their masks to the newly allocated keys match table */
15841 +            p_KeysMatchTableNewTmp =
15842 +                    PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j * size * sizeof(uint8_t));
15843 +            p_KeysMatchTableOldTmp =
15844 +                    PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableOld, i * size * sizeof(uint8_t));
15845 +
15846 +            if (p_CcNode->lclMask)
15847 +            {
15848 +                if (prvLclMask)
15849 +                {
15850 +                    MemCpy8(
15851 +                            PTR_MOVE(p_KeysMatchTableNewTmp, p_CcNode->ccKeySizeAccExtraction),
15852 +                            PTR_MOVE(p_KeysMatchTableOldTmp, p_CcNode->ccKeySizeAccExtraction),
15853 +                            p_CcNode->ccKeySizeAccExtraction);
15854 +                }
15855 +                else
15856 +                {
15857 +                    p_KeysMatchTableOldTmp =
15858 +                            PTR_MOVE(p_CcNode->h_KeysMatchTable,
15859 +                                    i * (int)p_CcNode->ccKeySizeAccExtraction * sizeof(uint8_t));
15860 +
15861 +                    if (p_CcNode->ccKeySizeAccExtraction > 4)
15862 +                    {
15863 +                        MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
15864 +                                p_CcNode->ccKeySizeAccExtraction),
15865 +                                   0xff, p_CcNode->userSizeOfExtraction);
15866 +                    }
15867 +                    else
15868 +                    {
15869 +                        MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
15870 +                                p_CcNode->ccKeySizeAccExtraction),
15871 +                                   p_CcNode->p_GlblMask,
15872 +                                   p_CcNode->userSizeOfExtraction);
15873 +                    }
15874 +                }
15875 +            }
15876 +
15877 +            MemCpy8(p_KeysMatchTableNewTmp, p_KeysMatchTableOldTmp,
15878 +                       p_CcNode->ccKeySizeAccExtraction);
15879 +
15880 +            i++;
15881 +        }
15882 +    }
15883 +
15884 +    /* Miss action descriptor */
15885 +    p_AdTableNewTmp =
15886 +            PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j * FM_PCD_CC_AD_ENTRY_SIZE);
15887 +    p_AdTableOldTmp =
15888 +            PTR_MOVE(p_AdditionalInfo->p_AdTableOld, i * FM_PCD_CC_AD_ENTRY_SIZE);
15889 +    MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
15890 +
15891 +    if (!LIST_IsEmpty(&p_CcNode->ccTreesLst))
15892 +    {
15893 +        LIST_FOR_EACH(p_Pos, &p_CcNode->ccTreesLst)
15894 +        {
15895 +            p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
15896 +            ASSERT_COND(p_CcNodeInformation->h_CcNode);
15897 +            /* Update the manipulation which has to be updated from parameters of the port */
15898 +            /* It's has to be updated with restrictions defined in the function */
15899 +            err =
15900 +                    SetRequiredAction(
15901 +                            p_CcNode->h_FmPcd,
15902 +                            p_CcNode->shadowAction
15903 +                                    | p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction,
15904 +                            &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
15905 +                            PTR_MOVE(p_AdditionalInfo->p_AdTableNew, keyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
15906 +                            1, p_CcNodeInformation->h_CcNode);
15907 +            if (err)
15908 +                RETURN_ERROR(MAJOR, err, (NO_MSG));
15909 +
15910 +            err =
15911 +                    CcUpdateParam(
15912 +                            p_CcNode->h_FmPcd,
15913 +                            NULL,
15914 +                            NULL,
15915 +                            &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
15916 +                            1,
15917 +                            PTR_MOVE(p_AdditionalInfo->p_AdTableNew, keyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
15918 +                            TRUE, p_CcNodeInformation->index,
15919 +                            p_CcNodeInformation->h_CcNode, TRUE);
15920 +            if (err)
15921 +                RETURN_ERROR(MAJOR, err, (NO_MSG));
15922 +        }
15923 +    }
15924 +
15925 +    if (p_CcNode->lclMask)
15926 +        memset(p_CcNode->p_GlblMask, 0xff, CC_GLBL_MASK_SIZE * sizeof(uint8_t));
15927 +
15928 +    if (p_KeyParams->ccNextEngineParams.nextEngine == e_FM_PCD_CC)
15929 +        p_AdditionalInfo->h_NodeForAdd =
15930 +                p_KeyParams->ccNextEngineParams.params.ccParams.h_CcNode;
15931 +    if (p_KeyParams->ccNextEngineParams.h_Manip)
15932 +        p_AdditionalInfo->h_ManipForAdd =
15933 +                p_KeyParams->ccNextEngineParams.h_Manip;
15934 +
15935 +#if (DPAA_VERSION >= 11)
15936 +    if ((p_KeyParams->ccNextEngineParams.nextEngine == e_FM_PCD_FR)
15937 +            && (p_KeyParams->ccNextEngineParams.params.frParams.h_FrmReplic))
15938 +        p_AdditionalInfo->h_FrmReplicForAdd =
15939 +                p_KeyParams->ccNextEngineParams.params.frParams.h_FrmReplic;
15940 +#endif /* (DPAA_VERSION >= 11) */
15941 +
15942 +    if (!add)
15943 +    {
15944 +        if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
15945 +                == e_FM_PCD_CC)
15946 +            p_AdditionalInfo->h_NodeForRmv =
15947 +                    p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
15948 +
15949 +        if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
15950 +            p_AdditionalInfo->h_ManipForRmv =
15951 +                    p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
15952 +
15953 +        /* If statistics were previously enabled, store the old statistics object to be released */
15954 +        if (p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
15955 +        {
15956 +            p_AdditionalInfo->p_StatsObjForRmv =
15957 +                    p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj;
15958 +        }
15959 +
15960 +#if (DPAA_VERSION >= 11)
15961 +        if ((p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
15962 +                == e_FM_PCD_FR)
15963 +                && (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
15964 +            p_AdditionalInfo->h_FrmReplicForRmv =
15965 +                    p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
15966 +#endif /* (DPAA_VERSION >= 11) */
15967 +    }
15968 +
15969 +    return E_OK;
15970 +}
15971 +
15972 +static t_Error BuildNewNodeRemoveKey(
15973 +        t_FmPcdCcNode *p_CcNode, uint16_t keyIndex,
15974 +        t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
15975 +{
15976 +    int i = 0, j = 0;
15977 +    t_Handle p_AdTableNewTmp, p_KeysMatchTableNewTmp;
15978 +    t_Handle p_KeysMatchTableOldTmp, p_AdTableOldTmp;
15979 +    int size;
15980 +    t_Error err = E_OK;
15981 +
15982 +    /*save new numOfKeys*/
15983 +    p_AdditionalInfo->numOfKeys = (uint16_t)(p_CcNode->numOfKeys - 1);
15984 +
15985 +    /*function which allocates in the memory new KeyTbl, AdTbl*/
15986 +    err = BuildNewNodeCommonPart(p_CcNode, &size, p_AdditionalInfo);
15987 +    if (err)
15988 +        RETURN_ERROR(MAJOR, err, NO_MSG);
15989 +
15990 +    /*update new Ad and new Key Table according to new requirement*/
15991 +    for (i = 0, j = 0; j < p_CcNode->numOfKeys; i++, j++)
15992 +    {
15993 +        if (j == keyIndex)
15994 +            j++;
15995 +
15996 +        if (j == p_CcNode->numOfKeys)
15997 +            break;
15998 +        p_AdTableNewTmp =
15999 +                PTR_MOVE(p_AdditionalInfo->p_AdTableNew, i * FM_PCD_CC_AD_ENTRY_SIZE);
16000 +        p_AdTableOldTmp =
16001 +                PTR_MOVE(p_AdditionalInfo->p_AdTableOld, j * FM_PCD_CC_AD_ENTRY_SIZE);
16002 +        MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
16003 +
16004 +        p_KeysMatchTableOldTmp =
16005 +                PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableOld, j * size * sizeof(uint8_t));
16006 +        p_KeysMatchTableNewTmp =
16007 +                PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, i * size * sizeof(uint8_t));
16008 +        MemCpy8(p_KeysMatchTableNewTmp, p_KeysMatchTableOldTmp,
16009 +                   size * sizeof(uint8_t));
16010 +    }
16011 +
16012 +    p_AdTableNewTmp =
16013 +            PTR_MOVE(p_AdditionalInfo->p_AdTableNew, i * FM_PCD_CC_AD_ENTRY_SIZE);
16014 +    p_AdTableOldTmp =
16015 +            PTR_MOVE(p_AdditionalInfo->p_AdTableOld, j * FM_PCD_CC_AD_ENTRY_SIZE);
16016 +    MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
16017 +
16018 +    if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
16019 +            == e_FM_PCD_CC)
16020 +        p_AdditionalInfo->h_NodeForRmv =
16021 +                p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
16022 +
16023 +    if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
16024 +        p_AdditionalInfo->h_ManipForRmv =
16025 +                p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
16026 +
16027 +    /* If statistics were previously enabled, store the old statistics object to be released */
16028 +    if (p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
16029 +    {
16030 +        p_AdditionalInfo->p_StatsObjForRmv =
16031 +                p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj;
16032 +    }
16033 +
16034 +#if (DPAA_VERSION >= 11)
16035 +    if ((p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
16036 +            == e_FM_PCD_FR)
16037 +            && (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
16038 +        p_AdditionalInfo->h_FrmReplicForRmv =
16039 +                p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
16040 +#endif /* (DPAA_VERSION >= 11) */
16041 +
16042 +    return E_OK;
16043 +}
16044 +
16045 +static t_Error BuildNewNodeModifyKey(
16046 +        t_FmPcdCcNode *p_CcNode, uint16_t keyIndex, uint8_t *p_Key,
16047 +        uint8_t *p_Mask, t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
16048 +{
16049 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
16050 +    t_Error err = E_OK;
16051 +    t_Handle p_AdTableNewTmp, p_KeysMatchTableNewTmp;
16052 +    t_Handle p_KeysMatchTableOldTmp, p_AdTableOldTmp;
16053 +    int size;
16054 +    int i = 0, j = 0;
16055 +    bool prvLclMask;
16056 +    t_FmPcdStatsObj *p_StatsObj, tmpStatsObj;
16057 +    p_AdditionalInfo->numOfKeys = p_CcNode->numOfKeys;
16058 +
16059 +    prvLclMask = p_CcNode->lclMask;
16060 +
16061 +    /* Check that new key is not require update of localMask */
16062 +    err = UpdateGblMask(p_CcNode, p_CcNode->ccKeySizeAccExtraction, p_Mask);
16063 +    if (err)
16064 +        RETURN_ERROR(MAJOR, err, (NO_MSG));
16065 +
16066 +    /* Update internal data structure with new next engine for the given index */
16067 +    memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].key, p_Key,
16068 +           p_CcNode->userSizeOfExtraction);
16069 +
16070 +    if (p_Mask)
16071 +        memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask, p_Mask,
16072 +               p_CcNode->userSizeOfExtraction);
16073 +    else
16074 +        memset(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask, 0xFF,
16075 +               p_CcNode->userSizeOfExtraction);
16076 +
16077 +    /*function which build in the memory new KeyTbl, AdTbl*/
16078 +    err = BuildNewNodeCommonPart(p_CcNode, &size, p_AdditionalInfo);
16079 +    if (err)
16080 +        RETURN_ERROR(MAJOR, err, NO_MSG);
16081 +
16082 +    /*fill the New AdTable and New KeyTable*/
16083 +    for (j = 0, i = 0; j < p_AdditionalInfo->numOfKeys; j++, i++)
16084 +    {
16085 +        p_AdTableNewTmp =
16086 +                PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j*FM_PCD_CC_AD_ENTRY_SIZE);
16087 +        p_AdTableOldTmp =
16088 +                PTR_MOVE(p_AdditionalInfo->p_AdTableOld, i*FM_PCD_CC_AD_ENTRY_SIZE);
16089 +
16090 +        MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
16091 +
16092 +        if (j == keyIndex)
16093 +        {
16094 +            ASSERT_COND(keyIndex < CC_MAX_NUM_OF_KEYS);
16095 +            if (p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
16096 +            {
16097 +                /* As statistics were enabled, we need to update the existing
16098 +                 statistics descriptor with a new nullified counters. */
16099 +                p_StatsObj = GetStatsObj(p_CcNode);
16100 +                ASSERT_COND(p_StatsObj);
16101 +
16102 +                SetStatsCounters(
16103 +                        p_AdTableNewTmp,
16104 +                        (uint32_t)((XX_VirtToPhys(p_StatsObj->h_StatsCounters)
16105 +                                - p_FmPcd->physicalMuramBase)));
16106 +
16107 +                tmpStatsObj.h_StatsAd = p_StatsObj->h_StatsAd;
16108 +                tmpStatsObj.h_StatsCounters = p_StatsObj->h_StatsCounters;
16109 +
16110 +                /* As we need to replace only the counters, we build a new statistics
16111 +                 object that holds the old AD and the new counters - this will be the
16112 +                 currently used statistics object.
16113 +                 The newly allocated AD is not required and may be released back to
16114 +                 the available objects with the previous counters pointer. */
16115 +                p_StatsObj->h_StatsAd =
16116 +                        p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsAd;
16117 +
16118 +                p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsAd =
16119 +                        tmpStatsObj.h_StatsAd;
16120 +
16121 +                /* Store allocated statistics object */
16122 +                p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj =
16123 +                        p_StatsObj;
16124 +
16125 +                /* As statistics were previously enabled, store the old statistics object to be released */
16126 +                p_AdditionalInfo->p_StatsObjForRmv =
16127 +                        p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj;
16128 +            }
16129 +
16130 +            p_KeysMatchTableNewTmp =
16131 +                    PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j * size * sizeof(uint8_t));
16132 +
16133 +            MemCpy8(p_KeysMatchTableNewTmp, p_Key,
16134 +                        p_CcNode->userSizeOfExtraction);
16135 +
16136 +            if (p_CcNode->lclMask)
16137 +            {
16138 +                if (p_Mask)
16139 +                    MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
16140 +                            p_CcNode->ccKeySizeAccExtraction),
16141 +                                p_Mask, p_CcNode->userSizeOfExtraction);
16142 +                else
16143 +                    if (p_CcNode->ccKeySizeAccExtraction > 4)
16144 +                        MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
16145 +                                p_CcNode->ccKeySizeAccExtraction),
16146 +                                   0xff, p_CcNode->userSizeOfExtraction);
16147 +                    else
16148 +                        MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
16149 +                                p_CcNode->ccKeySizeAccExtraction),
16150 +                                    p_CcNode->p_GlblMask,
16151 +                                    p_CcNode->userSizeOfExtraction);
16152 +            }
16153 +        }
16154 +        else
16155 +        {
16156 +            p_KeysMatchTableNewTmp =
16157 +                    PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j * size * sizeof(uint8_t));
16158 +            p_KeysMatchTableOldTmp =
16159 +                    PTR_MOVE(p_CcNode->h_KeysMatchTable, i * size * sizeof(uint8_t));
16160 +
16161 +            if (p_CcNode->lclMask)
16162 +            {
16163 +                if (prvLclMask)
16164 +                    MemCpy8(
16165 +                            PTR_MOVE(p_KeysMatchTableNewTmp, p_CcNode->ccKeySizeAccExtraction),
16166 +                            PTR_MOVE(p_KeysMatchTableOldTmp, p_CcNode->ccKeySizeAccExtraction),
16167 +                            p_CcNode->userSizeOfExtraction);
16168 +                else
16169 +                {
16170 +                    p_KeysMatchTableOldTmp =
16171 +                            PTR_MOVE(p_CcNode->h_KeysMatchTable,
16172 +                                     i * (int)p_CcNode->ccKeySizeAccExtraction * sizeof(uint8_t));
16173 +
16174 +                    if (p_CcNode->ccKeySizeAccExtraction > 4)
16175 +                        MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
16176 +                                p_CcNode->ccKeySizeAccExtraction),
16177 +                                   0xff, p_CcNode->userSizeOfExtraction);
16178 +                    else
16179 +                        MemCpy8(
16180 +                                PTR_MOVE(p_KeysMatchTableNewTmp, p_CcNode->ccKeySizeAccExtraction),
16181 +                                p_CcNode->p_GlblMask,
16182 +                                p_CcNode->userSizeOfExtraction);
16183 +                }
16184 +            }
16185 +            MemCpy8((void*)p_KeysMatchTableNewTmp, p_KeysMatchTableOldTmp,
16186 +                       p_CcNode->ccKeySizeAccExtraction);
16187 +        }
16188 +    }
16189 +
16190 +    p_AdTableNewTmp =
16191 +            PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j * FM_PCD_CC_AD_ENTRY_SIZE);
16192 +    p_AdTableOldTmp = PTR_MOVE(p_CcNode->h_AdTable, i * FM_PCD_CC_AD_ENTRY_SIZE);
16193 +
16194 +    MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
16195 +
16196 +    return E_OK;
16197 +}
16198 +
16199 +static t_Error BuildNewNodeModifyNextEngine(
16200 +        t_Handle h_FmPcd, t_Handle h_FmPcdCcNodeOrTree, uint16_t keyIndex,
16201 +        t_FmPcdCcNextEngineParams *p_CcNextEngineParams, t_List *h_OldLst,
16202 +        t_List *h_NewLst, t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
16203 +{
16204 +    t_Error err = E_OK;
16205 +    uint32_t requiredAction = 0;
16206 +    t_List *p_Pos;
16207 +    t_CcNodeInformation *p_CcNodeInformation, ccNodeInfo;
16208 +    t_Handle p_Ad;
16209 +    t_FmPcdCcNode *p_FmPcdCcNode1 = NULL;
16210 +    t_FmPcdCcTree *p_FmPcdCcTree = NULL;
16211 +    t_FmPcdStatsObj *p_StatsObj;
16212 +    t_FmPcdCcStatsParams statsParams = { 0 };
16213 +
16214 +    ASSERT_COND(p_CcNextEngineParams);
16215 +
16216 +    /* check that new NIA is legal */
16217 +    if (!p_AdditionalInfo->tree)
16218 +        err = ValidateNextEngineParams(
16219 +                h_FmPcd, p_CcNextEngineParams,
16220 +                ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->statisticsMode);
16221 +    else
16222 +        /* Statistics are not supported for CC root */
16223 +        err = ValidateNextEngineParams(h_FmPcd, p_CcNextEngineParams,
16224 +                                       e_FM_PCD_CC_STATS_MODE_NONE);
16225 +    if (err)
16226 +        RETURN_ERROR(MAJOR, err, NO_MSG);
16227 +
16228 +    /* Update internal data structure for next engine per index (index - key) */
16229 +    memcpy(&p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams,
16230 +           p_CcNextEngineParams, sizeof(t_FmPcdCcNextEngineParams));
16231 +
16232 +    /* Check that manip is legal and what requiredAction is necessary for this manip */
16233 +    if (p_CcNextEngineParams->h_Manip)
16234 +    {
16235 +        err = FmPcdManipCheckParamsForCcNextEngine(p_CcNextEngineParams,
16236 +                                                   &requiredAction);
16237 +        if (err)
16238 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16239 +    }
16240 +
16241 +    if (!p_AdditionalInfo->tree)
16242 +    {
16243 +        p_FmPcdCcNode1 = (t_FmPcdCcNode *)h_FmPcdCcNodeOrTree;
16244 +        p_AdditionalInfo->numOfKeys = p_FmPcdCcNode1->numOfKeys;
16245 +        p_Ad = p_FmPcdCcNode1->h_AdTable;
16246 +
16247 +        if (p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
16248 +                == e_FM_PCD_CC)
16249 +            p_AdditionalInfo->h_NodeForRmv =
16250 +                    p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
16251 +
16252 +        if (p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
16253 +            p_AdditionalInfo->h_ManipForRmv =
16254 +                    p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
16255 +
16256 +#if (DPAA_VERSION >= 11)
16257 +        if ((p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
16258 +                == e_FM_PCD_FR)
16259 +                && (p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
16260 +            p_AdditionalInfo->h_FrmReplicForRmv =
16261 +                    p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
16262 +#endif /* (DPAA_VERSION >= 11) */
16263 +    }
16264 +    else
16265 +    {
16266 +        p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcNodeOrTree;
16267 +        p_Ad = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
16268 +
16269 +        if (p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
16270 +                == e_FM_PCD_CC)
16271 +            p_AdditionalInfo->h_NodeForRmv =
16272 +                    p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
16273 +
16274 +        if (p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
16275 +            p_AdditionalInfo->h_ManipForRmv =
16276 +                    p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
16277 +
16278 +#if (DPAA_VERSION >= 11)
16279 +        if ((p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
16280 +                == e_FM_PCD_FR)
16281 +                && (p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
16282 +            p_AdditionalInfo->h_FrmReplicForRmv =
16283 +                    p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
16284 +#endif /* (DPAA_VERSION >= 11) */
16285 +    }
16286 +
16287 +    if ((p_CcNextEngineParams->nextEngine == e_FM_PCD_CC)
16288 +            && p_CcNextEngineParams->h_Manip)
16289 +    {
16290 +        err = AllocAndFillAdForContLookupManip(
16291 +                p_CcNextEngineParams->params.ccParams.h_CcNode);
16292 +        if (err)
16293 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16294 +    }
16295 +
16296 +    ASSERT_COND(p_Ad);
16297 +
16298 +    memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
16299 +    ccNodeInfo.h_CcNode = PTR_MOVE(p_Ad, keyIndex * FM_PCD_CC_AD_ENTRY_SIZE);
16300 +
16301 +    /* If statistics were enabled, this Ad is the statistics Ad. Need to follow its
16302 +     nextAction to retrieve the actual Nia-Ad. If statistics should remain enabled,
16303 +     only the actual Nia-Ad should be modified. */
16304 +    if ((!p_AdditionalInfo->tree)
16305 +            && (((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj)
16306 +            && (p_CcNextEngineParams->statisticsEn))
16307 +        ccNodeInfo.h_CcNode =
16308 +                ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsAd;
16309 +
16310 +    EnqueueNodeInfoToRelevantLst(h_OldLst, &ccNodeInfo, NULL);
16311 +
16312 +    memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
16313 +    p_Ad = GetNewAd(h_FmPcdCcNodeOrTree, p_AdditionalInfo->tree);
16314 +    if (!p_Ad)
16315 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
16316 +                     ("MURAM allocation for CC node action descriptor"));
16317 +    MemSet8((uint8_t *)p_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
16318 +
16319 +    /* If statistics were not enabled before, but requested now -  Allocate a statistics
16320 +     object that holds statistics AD and counters. */
16321 +    if ((!p_AdditionalInfo->tree)
16322 +            && (!((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj)
16323 +            && (p_CcNextEngineParams->statisticsEn))
16324 +    {
16325 +        p_StatsObj = GetStatsObj((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree);
16326 +        ASSERT_COND(p_StatsObj);
16327 +
16328 +        /* Store allocated statistics object */
16329 +        p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj =
16330 +                p_StatsObj;
16331 +
16332 +        statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
16333 +        statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
16334 +
16335 +#if (DPAA_VERSION >= 11)
16336 +        statsParams.h_StatsFLRs =
16337 +                ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->h_StatsFLRs;
16338 +
16339 +#endif /* (DPAA_VERSION >= 11) */
16340 +
16341 +        NextStepAd(p_Ad, &statsParams, p_CcNextEngineParams, h_FmPcd);
16342 +    }
16343 +    else
16344 +        NextStepAd(p_Ad, NULL, p_CcNextEngineParams, h_FmPcd);
16345 +
16346 +    ccNodeInfo.h_CcNode = p_Ad;
16347 +    EnqueueNodeInfoToRelevantLst(h_NewLst, &ccNodeInfo, NULL);
16348 +
16349 +    p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction =
16350 +            requiredAction;
16351 +    p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction |=
16352 +            UPDATE_CC_WITH_TREE;
16353 +
16354 +    if (!p_AdditionalInfo->tree)
16355 +    {
16356 +        ASSERT_COND(p_FmPcdCcNode1);
16357 +        if (!LIST_IsEmpty(&p_FmPcdCcNode1->ccTreesLst))
16358 +        {
16359 +            LIST_FOR_EACH(p_Pos, &p_FmPcdCcNode1->ccTreesLst)
16360 +            {
16361 +                p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
16362 +
16363 +                ASSERT_COND(p_CcNodeInformation->h_CcNode);
16364 +                /* Update the manipulation which has to be updated from parameters of the port
16365 +                 it's has to be updated with restrictions defined in the function */
16366 +
16367 +                err =
16368 +                        SetRequiredAction(
16369 +                                p_FmPcdCcNode1->h_FmPcd,
16370 +                                p_FmPcdCcNode1->shadowAction
16371 +                                        | p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction,
16372 +                                &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
16373 +                                p_Ad, 1, p_CcNodeInformation->h_CcNode);
16374 +                if (err)
16375 +                    RETURN_ERROR(MAJOR, err, (NO_MSG));
16376 +
16377 +                err = CcUpdateParam(
16378 +                        p_FmPcdCcNode1->h_FmPcd, NULL, NULL,
16379 +                        &p_AdditionalInfo->keyAndNextEngineParams[keyIndex], 1,
16380 +                        p_Ad, TRUE, p_CcNodeInformation->index,
16381 +                        p_CcNodeInformation->h_CcNode, TRUE);
16382 +                if (err)
16383 +                    RETURN_ERROR(MAJOR, err, (NO_MSG));
16384 +            }
16385 +        }
16386 +    }
16387 +    else
16388 +    {
16389 +        ASSERT_COND(p_FmPcdCcTree);
16390 +
16391 +        err =
16392 +                SetRequiredAction(
16393 +                        h_FmPcd,
16394 +                        p_FmPcdCcTree->requiredAction
16395 +                                | p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction,
16396 +                        &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
16397 +                        p_Ad, 1, (t_Handle)p_FmPcdCcTree);
16398 +        if (err)
16399 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16400 +
16401 +        err = CcUpdateParam(h_FmPcd, NULL, NULL,
16402 +                            &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
16403 +                            1, p_Ad, TRUE, 0, (t_Handle)p_FmPcdCcTree, TRUE);
16404 +        if (err)
16405 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16406 +    }
16407 +
16408 +    if (p_CcNextEngineParams->nextEngine == e_FM_PCD_CC)
16409 +        p_AdditionalInfo->h_NodeForAdd =
16410 +                p_CcNextEngineParams->params.ccParams.h_CcNode;
16411 +    if (p_CcNextEngineParams->h_Manip)
16412 +        p_AdditionalInfo->h_ManipForAdd = p_CcNextEngineParams->h_Manip;
16413 +
16414 +    /* If statistics were previously enabled, but now are disabled,
16415 +     store the old statistics object to be released */
16416 +    if ((!p_AdditionalInfo->tree)
16417 +            && (((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj)
16418 +            && (!p_CcNextEngineParams->statisticsEn))
16419 +    {
16420 +        p_AdditionalInfo->p_StatsObjForRmv =
16421 +                ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj;
16422 +
16423 +
16424 +        p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj = NULL;
16425 +    }
16426 +#if (DPAA_VERSION >= 11)
16427 +    if ((p_CcNextEngineParams->nextEngine == e_FM_PCD_FR)
16428 +            && (p_CcNextEngineParams->params.frParams.h_FrmReplic))
16429 +        p_AdditionalInfo->h_FrmReplicForAdd =
16430 +                p_CcNextEngineParams->params.frParams.h_FrmReplic;
16431 +#endif /* (DPAA_VERSION >= 11) */
16432 +
16433 +    return E_OK;
16434 +}
16435 +
16436 +static void UpdateAdPtrOfNodesWhichPointsOnCrntMdfNode(
16437 +        t_FmPcdCcNode *p_CrntMdfNode, t_List *h_OldLst,
16438 +        t_FmPcdCcNextEngineParams **p_NextEngineParams)
16439 +{
16440 +    t_CcNodeInformation *p_CcNodeInformation;
16441 +    t_FmPcdCcNode *p_NodePtrOnCurrentMdfNode = NULL;
16442 +    t_List *p_Pos;
16443 +    int i = 0;
16444 +    t_Handle p_AdTablePtOnCrntCurrentMdfNode/*, p_AdTableNewModified*/;
16445 +    t_CcNodeInformation ccNodeInfo;
16446 +
16447 +    LIST_FOR_EACH(p_Pos, &p_CrntMdfNode->ccPrevNodesLst)
16448 +    {
16449 +        p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
16450 +        p_NodePtrOnCurrentMdfNode =
16451 +                (t_FmPcdCcNode *)p_CcNodeInformation->h_CcNode;
16452 +
16453 +        ASSERT_COND(p_NodePtrOnCurrentMdfNode);
16454 +
16455 +        /* Search in the previous node which exact index points on this current modified node for getting AD */
16456 +        for (i = 0; i < p_NodePtrOnCurrentMdfNode->numOfKeys + 1; i++)
16457 +        {
16458 +            if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
16459 +                    == e_FM_PCD_CC)
16460 +            {
16461 +                if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode
16462 +                        == (t_Handle)p_CrntMdfNode)
16463 +                {
16464 +                    if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
16465 +                        p_AdTablePtOnCrntCurrentMdfNode = p_CrntMdfNode->h_Ad;
16466 +                    else
16467 +                        if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].p_StatsObj)
16468 +                            p_AdTablePtOnCrntCurrentMdfNode =
16469 +                                    p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].p_StatsObj->h_StatsAd;
16470 +                        else
16471 +                            p_AdTablePtOnCrntCurrentMdfNode =
16472 +                                    PTR_MOVE(p_NodePtrOnCurrentMdfNode->h_AdTable, i*FM_PCD_CC_AD_ENTRY_SIZE);
16473 +
16474 +                    memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
16475 +                    ccNodeInfo.h_CcNode = p_AdTablePtOnCrntCurrentMdfNode;
16476 +                    EnqueueNodeInfoToRelevantLst(h_OldLst, &ccNodeInfo, NULL);
16477 +
16478 +                    if (!(*p_NextEngineParams))
16479 +                        *p_NextEngineParams =
16480 +                                &p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams;
16481 +                }
16482 +            }
16483 +        }
16484 +
16485 +        ASSERT_COND(i != p_NodePtrOnCurrentMdfNode->numOfKeys);
16486 +    }
16487 +}
16488 +
16489 +static void UpdateAdPtrOfTreesWhichPointsOnCrntMdfNode(
16490 +        t_FmPcdCcNode *p_CrntMdfNode, t_List *h_OldLst,
16491 +        t_FmPcdCcNextEngineParams **p_NextEngineParams)
16492 +{
16493 +    t_CcNodeInformation *p_CcNodeInformation;
16494 +    t_FmPcdCcTree *p_TreePtrOnCurrentMdfNode = NULL;
16495 +    t_List *p_Pos;
16496 +    int i = 0;
16497 +    t_Handle p_AdTableTmp;
16498 +    t_CcNodeInformation ccNodeInfo;
16499 +
16500 +    LIST_FOR_EACH(p_Pos, &p_CrntMdfNode->ccTreeIdLst)
16501 +    {
16502 +        p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
16503 +        p_TreePtrOnCurrentMdfNode =
16504 +                (t_FmPcdCcTree *)p_CcNodeInformation->h_CcNode;
16505 +
16506 +        ASSERT_COND(p_TreePtrOnCurrentMdfNode);
16507 +
16508 +        /*search in the trees which exact index points on this current modified node for getting AD */
16509 +        for (i = 0; i < p_TreePtrOnCurrentMdfNode->numOfEntries; i++)
16510 +        {
16511 +            if (p_TreePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
16512 +                    == e_FM_PCD_CC)
16513 +            {
16514 +                if (p_TreePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode
16515 +                        == (t_Handle)p_CrntMdfNode)
16516 +                {
16517 +                    p_AdTableTmp =
16518 +                            UINT_TO_PTR(p_TreePtrOnCurrentMdfNode->ccTreeBaseAddr + i*FM_PCD_CC_AD_ENTRY_SIZE);
16519 +                    memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
16520 +                    ccNodeInfo.h_CcNode = p_AdTableTmp;
16521 +                    EnqueueNodeInfoToRelevantLst(h_OldLst, &ccNodeInfo, NULL);
16522 +
16523 +                    if (!(*p_NextEngineParams))
16524 +                        *p_NextEngineParams =
16525 +                                &p_TreePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams;
16526 +                }
16527 +            }
16528 +        }
16529 +
16530 +        ASSERT_COND(i == p_TreePtrOnCurrentMdfNode->numOfEntries);
16531 +    }
16532 +}
16533 +
16534 +static t_FmPcdModifyCcKeyAdditionalParams * ModifyNodeCommonPart(
16535 +        t_Handle h_FmPcdCcNodeOrTree, uint16_t keyIndex,
16536 +        e_ModifyState modifyState, bool ttlCheck, bool hashCheck, bool tree)
16537 +{
16538 +    t_FmPcdModifyCcKeyAdditionalParams *p_FmPcdModifyCcKeyAdditionalParams;
16539 +    int i = 0, j = 0;
16540 +    bool wasUpdate = FALSE;
16541 +    t_FmPcdCcNode *p_CcNode = NULL;
16542 +    t_FmPcdCcTree *p_FmPcdCcTree;
16543 +    uint16_t numOfKeys;
16544 +    t_FmPcdCcKeyAndNextEngineParams *p_KeyAndNextEngineParams;
16545 +
16546 +    SANITY_CHECK_RETURN_VALUE(h_FmPcdCcNodeOrTree, E_INVALID_HANDLE, NULL);
16547 +
16548 +    if (!tree)
16549 +    {
16550 +        p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNodeOrTree;
16551 +        numOfKeys = p_CcNode->numOfKeys;
16552 +
16553 +        /* node has to be pointed by another node or tree */
16554 +
16555 +        p_KeyAndNextEngineParams = (t_FmPcdCcKeyAndNextEngineParams *)XX_Malloc(
16556 +                sizeof(t_FmPcdCcKeyAndNextEngineParams) * (numOfKeys + 1));
16557 +        if (!p_KeyAndNextEngineParams)
16558 +        {
16559 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Next engine and required action structure"));
16560 +            return NULL;
16561 +        }
16562 +        memcpy(p_KeyAndNextEngineParams, p_CcNode->keyAndNextEngineParams,
16563 +               (numOfKeys + 1) * sizeof(t_FmPcdCcKeyAndNextEngineParams));
16564 +
16565 +        if (ttlCheck)
16566 +        {
16567 +            if ((p_CcNode->parseCode == CC_PC_FF_IPV4TTL)
16568 +                    || (p_CcNode->parseCode == CC_PC_FF_IPV6HOP_LIMIT))
16569 +            {
16570 +                XX_Free(p_KeyAndNextEngineParams);
16571 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("nodeId of CC_PC_FF_IPV4TTL or CC_PC_FF_IPV6HOP_LIMIT can not be used for this operation"));
16572 +                return NULL;
16573 +            }
16574 +        }
16575 +
16576 +        if (hashCheck)
16577 +        {
16578 +            if (p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED)
16579 +            {
16580 +                XX_Free(p_KeyAndNextEngineParams);
16581 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("nodeId of CC_PC_GENERIC_IC_HASH_INDEXED can not be used for this operation"));
16582 +                return NULL;
16583 +            }
16584 +        }
16585 +    }
16586 +    else
16587 +    {
16588 +        p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcNodeOrTree;
16589 +        numOfKeys = p_FmPcdCcTree->numOfEntries;
16590 +
16591 +        p_KeyAndNextEngineParams = (t_FmPcdCcKeyAndNextEngineParams *)XX_Malloc(
16592 +                sizeof(t_FmPcdCcKeyAndNextEngineParams)
16593 +                        * FM_PCD_MAX_NUM_OF_CC_GROUPS);
16594 +        if (!p_KeyAndNextEngineParams)
16595 +        {
16596 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Next engine and required action structure"));
16597 +            return NULL;
16598 +        }
16599 +        memcpy(p_KeyAndNextEngineParams,
16600 +               p_FmPcdCcTree->keyAndNextEngineParams,
16601 +               FM_PCD_MAX_NUM_OF_CC_GROUPS
16602 +                       * sizeof(t_FmPcdCcKeyAndNextEngineParams));
16603 +    }
16604 +
16605 +    p_FmPcdModifyCcKeyAdditionalParams =
16606 +            (t_FmPcdModifyCcKeyAdditionalParams *)XX_Malloc(
16607 +                    sizeof(t_FmPcdModifyCcKeyAdditionalParams));
16608 +    if (!p_FmPcdModifyCcKeyAdditionalParams)
16609 +    {
16610 +        XX_Free(p_KeyAndNextEngineParams);
16611 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Allocation of internal data structure FAILED"));
16612 +        return NULL;
16613 +    }
16614 +    memset(p_FmPcdModifyCcKeyAdditionalParams, 0,
16615 +           sizeof(t_FmPcdModifyCcKeyAdditionalParams));
16616 +
16617 +    p_FmPcdModifyCcKeyAdditionalParams->h_CurrentNode = h_FmPcdCcNodeOrTree;
16618 +    p_FmPcdModifyCcKeyAdditionalParams->savedKeyIndex = keyIndex;
16619 +
16620 +    while (i < numOfKeys)
16621 +    {
16622 +        if ((j == keyIndex) && !wasUpdate)
16623 +        {
16624 +            if (modifyState == e_MODIFY_STATE_ADD)
16625 +                j++;
16626 +            else
16627 +                if (modifyState == e_MODIFY_STATE_REMOVE)
16628 +                    i++;
16629 +            wasUpdate = TRUE;
16630 +        }
16631 +        else
16632 +        {
16633 +            memcpy(&p_FmPcdModifyCcKeyAdditionalParams->keyAndNextEngineParams[j],
16634 +                   p_KeyAndNextEngineParams + i,
16635 +                   sizeof(t_FmPcdCcKeyAndNextEngineParams));
16636 +            i++;
16637 +            j++;
16638 +        }
16639 +    }
16640 +
16641 +    if (keyIndex == numOfKeys)
16642 +    {
16643 +        if (modifyState == e_MODIFY_STATE_ADD)
16644 +            j++;
16645 +    }
16646 +
16647 +    memcpy(&p_FmPcdModifyCcKeyAdditionalParams->keyAndNextEngineParams[j],
16648 +           p_KeyAndNextEngineParams + numOfKeys,
16649 +           sizeof(t_FmPcdCcKeyAndNextEngineParams));
16650 +
16651 +    XX_Free(p_KeyAndNextEngineParams);
16652 +
16653 +    return p_FmPcdModifyCcKeyAdditionalParams;
16654 +}
16655 +
16656 +static t_Error UpdatePtrWhichPointOnCrntMdfNode(
16657 +        t_FmPcdCcNode *p_CcNode,
16658 +        t_FmPcdModifyCcKeyAdditionalParams *p_FmPcdModifyCcKeyAdditionalParams,
16659 +        t_List *h_OldLst, t_List *h_NewLst)
16660 +{
16661 +    t_FmPcdCcNextEngineParams *p_NextEngineParams = NULL;
16662 +    t_CcNodeInformation ccNodeInfo = { 0 };
16663 +    t_Handle h_NewAd;
16664 +    t_Handle h_OrigAd = NULL;
16665 +
16666 +    /* Building a list of all action descriptors that point to the previous node */
16667 +    if (!LIST_IsEmpty(&p_CcNode->ccPrevNodesLst))
16668 +        UpdateAdPtrOfNodesWhichPointsOnCrntMdfNode(p_CcNode, h_OldLst,
16669 +                                                   &p_NextEngineParams);
16670 +
16671 +    if (!LIST_IsEmpty(&p_CcNode->ccTreeIdLst))
16672 +        UpdateAdPtrOfTreesWhichPointsOnCrntMdfNode(p_CcNode, h_OldLst,
16673 +                                                   &p_NextEngineParams);
16674 +
16675 +    /* This node must be found as next engine of one of its previous nodes or trees*/
16676 +    if (p_NextEngineParams)
16677 +    {
16678 +        /* Building a new action descriptor that points to the modified node */
16679 +        h_NewAd = GetNewAd(p_CcNode, FALSE);
16680 +        if (!h_NewAd)
16681 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
16682 +        MemSet8(h_NewAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
16683 +
16684 +        h_OrigAd = p_CcNode->h_Ad;
16685 +        BuildNewAd(h_NewAd, p_FmPcdModifyCcKeyAdditionalParams, p_CcNode,
16686 +                   p_NextEngineParams);
16687 +
16688 +        ccNodeInfo.h_CcNode = h_NewAd;
16689 +        EnqueueNodeInfoToRelevantLst(h_NewLst, &ccNodeInfo, NULL);
16690 +
16691 +        if (p_NextEngineParams->h_Manip && !h_OrigAd)
16692 +            FmPcdManipUpdateOwner(p_NextEngineParams->h_Manip, FALSE);
16693 +    }
16694 +    return E_OK;
16695 +}
16696 +
16697 +static void UpdateCcRootOwner(t_FmPcdCcTree *p_FmPcdCcTree, bool add)
16698 +{
16699 +    ASSERT_COND(p_FmPcdCcTree);
16700 +
16701 +    /* this routine must be protected by the calling routine! */
16702 +
16703 +    if (add)
16704 +        p_FmPcdCcTree->owners++;
16705 +    else
16706 +    {
16707 +        ASSERT_COND(p_FmPcdCcTree->owners);
16708 +        p_FmPcdCcTree->owners--;
16709 +    }
16710 +}
16711 +
16712 +static t_Error CheckAndSetManipParamsWithCcNodeParams(t_FmPcdCcNode *p_CcNode)
16713 +{
16714 +    t_Error err = E_OK;
16715 +    int i = 0;
16716 +
16717 +    for (i = 0; i < p_CcNode->numOfKeys; i++)
16718 +    {
16719 +        if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
16720 +        {
16721 +            err =
16722 +                    FmPcdManipCheckParamsWithCcNodeParams(
16723 +                            p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip,
16724 +                            (t_Handle)p_CcNode);
16725 +            if (err)
16726 +                return err;
16727 +        }
16728 +    }
16729 +
16730 +    return err;
16731 +}
16732 +static t_Error ValidateAndCalcStatsParams(t_FmPcdCcNode *p_CcNode,
16733 +                                          t_FmPcdCcNodeParams *p_CcNodeParam,
16734 +                                          uint32_t *p_NumOfRanges,
16735 +                                          uint32_t *p_CountersArraySize)
16736 +{
16737 +    e_FmPcdCcStatsMode statisticsMode = p_CcNode->statisticsMode;
16738 +    uint32_t i;
16739 +
16740 +    UNUSED(p_CcNodeParam);
16741 +
16742 +    switch (statisticsMode)
16743 +    {
16744 +        case e_FM_PCD_CC_STATS_MODE_NONE:
16745 +            for (i = 0; i < p_CcNode->numOfKeys; i++)
16746 +                if (p_CcNodeParam->keysParams.keyParams[i].ccNextEngineParams.statisticsEn)
16747 +                    RETURN_ERROR(
16748 +                            MAJOR,
16749 +                            E_INVALID_VALUE,
16750 +                            ("Statistics cannot be enabled for key %d when statistics mode was set to 'NONE'", i));
16751 +            return E_OK;
16752 +
16753 +        case e_FM_PCD_CC_STATS_MODE_FRAME:
16754 +        case e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME:
16755 +            *p_NumOfRanges = 1;
16756 +            *p_CountersArraySize = 2 * FM_PCD_CC_STATS_COUNTER_SIZE;
16757 +            return E_OK;
16758 +
16759 +#if (DPAA_VERSION >= 11)
16760 +        case e_FM_PCD_CC_STATS_MODE_RMON:
16761 +        {
16762 +            uint16_t *p_FrameLengthRanges =
16763 +                    p_CcNodeParam->keysParams.frameLengthRanges;
16764 +            uint32_t i;
16765 +
16766 +            if (p_FrameLengthRanges[0] <= 0)
16767 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Statistics mode"));
16768 +
16769 +            if (p_FrameLengthRanges[0] == 0xFFFF)
16770 +            {
16771 +                *p_NumOfRanges = 1;
16772 +                *p_CountersArraySize = 2 * FM_PCD_CC_STATS_COUNTER_SIZE;
16773 +                return E_OK;
16774 +            }
16775 +
16776 +            for (i = 1; i < FM_PCD_CC_STATS_MAX_NUM_OF_FLR; i++)
16777 +            {
16778 +                if (p_FrameLengthRanges[i - 1] >= p_FrameLengthRanges[i])
16779 +                    RETURN_ERROR(
16780 +                            MAJOR,
16781 +                            E_INVALID_VALUE,
16782 +                            ("Frame length range must be larger at least by 1 from preceding range"));
16783 +
16784 +                /* Stop when last range is reached */
16785 +                if (p_FrameLengthRanges[i] == 0xFFFF)
16786 +                    break;
16787 +            }
16788 +
16789 +            if ((i >= FM_PCD_CC_STATS_MAX_NUM_OF_FLR)
16790 +                    || (p_FrameLengthRanges[i] != 0xFFFF))
16791 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE,
16792 +                             ("Last Frame length range must be 0xFFFF"));
16793 +
16794 +            *p_NumOfRanges = i + 1;
16795 +
16796 +            /* Allocate an extra counter for byte count, as counters
16797 +             array always begins with byte count */
16798 +            *p_CountersArraySize = (*p_NumOfRanges + 1)
16799 +                    * FM_PCD_CC_STATS_COUNTER_SIZE;
16800 +
16801 +        }
16802 +            return E_OK;
16803 +#endif /* (DPAA_VERSION >= 11) */
16804 +
16805 +        default:
16806 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Statistics mode"));
16807 +    }
16808 +}
16809 +
16810 +static t_Error CheckParams(t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_CcNodeParam,
16811 +                           t_FmPcdCcNode *p_CcNode, bool *isKeyTblAlloc)
16812 +{
16813 +    int tmp = 0;
16814 +    t_FmPcdCcKeyParams *p_KeyParams;
16815 +    t_Error err;
16816 +    uint32_t requiredAction = 0;
16817 +
16818 +    /* Validate statistics parameters */
16819 +    err = ValidateAndCalcStatsParams(p_CcNode, p_CcNodeParam,
16820 +                                     &(p_CcNode->numOfStatsFLRs),
16821 +                                     &(p_CcNode->countersArraySize));
16822 +    if (err)
16823 +        RETURN_ERROR(MAJOR, err, ("Invalid statistics parameters"));
16824 +
16825 +    /* Validate next engine parameters on Miss */
16826 +    err = ValidateNextEngineParams(
16827 +            h_FmPcd, &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
16828 +            p_CcNode->statisticsMode);
16829 +    if (err)
16830 +        RETURN_ERROR(MAJOR, err,
16831 +                     ("For this node MissNextEngineParams are not valid"));
16832 +
16833 +    if (p_CcNodeParam->keysParams.ccNextEngineParamsForMiss.h_Manip)
16834 +    {
16835 +        err = FmPcdManipCheckParamsForCcNextEngine(
16836 +                &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
16837 +                &requiredAction);
16838 +        if (err)
16839 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16840 +    }
16841 +
16842 +    memcpy(&p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams,
16843 +           &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
16844 +           sizeof(t_FmPcdCcNextEngineParams));
16845 +
16846 +    p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].requiredAction =
16847 +            requiredAction;
16848 +
16849 +    if ((p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
16850 +            == e_FM_PCD_CC)
16851 +            && p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.h_Manip)
16852 +    {
16853 +        err =
16854 +                AllocAndFillAdForContLookupManip(
16855 +                        p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.params.ccParams.h_CcNode);
16856 +        if (err)
16857 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16858 +    }
16859 +
16860 +    for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
16861 +    {
16862 +        p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
16863 +
16864 +        if (!p_KeyParams->p_Key)
16865 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_Key is not initialized"));
16866 +
16867 +        err = ValidateNextEngineParams(h_FmPcd,
16868 +                                       &p_KeyParams->ccNextEngineParams,
16869 +                                       p_CcNode->statisticsMode);
16870 +        if (err)
16871 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16872 +
16873 +        err = UpdateGblMask(p_CcNode, p_CcNodeParam->keysParams.keySize,
16874 +                            p_KeyParams->p_Mask);
16875 +        if (err)
16876 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16877 +
16878 +        if (p_KeyParams->ccNextEngineParams.h_Manip)
16879 +        {
16880 +            err = FmPcdManipCheckParamsForCcNextEngine(
16881 +                    &p_KeyParams->ccNextEngineParams, &requiredAction);
16882 +            if (err)
16883 +                RETURN_ERROR(MAJOR, err, (NO_MSG));
16884 +        }
16885 +
16886 +        /* Store 'key' parameters - key, mask (if passed by the user) */
16887 +        memcpy(p_CcNode->keyAndNextEngineParams[tmp].key, p_KeyParams->p_Key,
16888 +               p_CcNodeParam->keysParams.keySize);
16889 +
16890 +        if (p_KeyParams->p_Mask)
16891 +            memcpy(p_CcNode->keyAndNextEngineParams[tmp].mask,
16892 +                   p_KeyParams->p_Mask, p_CcNodeParam->keysParams.keySize);
16893 +        else
16894 +            memset((void *)(p_CcNode->keyAndNextEngineParams[tmp].mask), 0xFF,
16895 +                   p_CcNodeParam->keysParams.keySize);
16896 +
16897 +        /* Store next engine parameters */
16898 +        memcpy(&p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams,
16899 +               &p_KeyParams->ccNextEngineParams,
16900 +               sizeof(t_FmPcdCcNextEngineParams));
16901 +
16902 +        p_CcNode->keyAndNextEngineParams[tmp].requiredAction = requiredAction;
16903 +
16904 +        if ((p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
16905 +                == e_FM_PCD_CC)
16906 +                && p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
16907 +        {
16908 +            err =
16909 +                    AllocAndFillAdForContLookupManip(
16910 +                            p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode);
16911 +            if (err)
16912 +                RETURN_ERROR(MAJOR, err, (NO_MSG));
16913 +        }
16914 +    }
16915 +
16916 +    if (p_CcNode->maxNumOfKeys)
16917 +    {
16918 +        if (p_CcNode->maxNumOfKeys < p_CcNode->numOfKeys)
16919 +            RETURN_ERROR(
16920 +                    MAJOR,
16921 +                    E_INVALID_VALUE,
16922 +                    ("Number of keys exceed the provided maximal number of keys"));
16923 +    }
16924 +
16925 +    *isKeyTblAlloc = TRUE;
16926 +
16927 +    return E_OK;
16928 +}
16929 +
16930 +static t_Error Ipv4TtlOrIpv6HopLimitCheckParams(
16931 +        t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_CcNodeParam,
16932 +        t_FmPcdCcNode *p_CcNode, bool *isKeyTblAlloc)
16933 +{
16934 +    int tmp = 0;
16935 +    t_FmPcdCcKeyParams *p_KeyParams;
16936 +    t_Error err;
16937 +    uint8_t key = 0x01;
16938 +    uint32_t requiredAction = 0;
16939 +
16940 +    if (p_CcNode->numOfKeys != 1)
16941 +        RETURN_ERROR(
16942 +                MAJOR,
16943 +                E_INVALID_VALUE,
16944 +                ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT the maximal supported 'numOfKeys' is 1"));
16945 +
16946 +    if ((p_CcNodeParam->keysParams.maxNumOfKeys)
16947 +            && (p_CcNodeParam->keysParams.maxNumOfKeys != 1))
16948 +        RETURN_ERROR(
16949 +                MAJOR,
16950 +                E_INVALID_VALUE,
16951 +                ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT the maximal supported 'maxNumOfKeys' is 1"));
16952 +
16953 +    /* Validate statistics parameters */
16954 +    err = ValidateAndCalcStatsParams(p_CcNode, p_CcNodeParam,
16955 +                                     &(p_CcNode->numOfStatsFLRs),
16956 +                                     &(p_CcNode->countersArraySize));
16957 +    if (err)
16958 +        RETURN_ERROR(MAJOR, err, ("Invalid statistics parameters"));
16959 +
16960 +    err = ValidateNextEngineParams(
16961 +            h_FmPcd, &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
16962 +            p_CcNodeParam->keysParams.statisticsMode);
16963 +    if (err)
16964 +        RETURN_ERROR(MAJOR, err,
16965 +                     ("For this node MissNextEngineParams are not valid"));
16966 +
16967 +    if (p_CcNodeParam->keysParams.ccNextEngineParamsForMiss.h_Manip)
16968 +    {
16969 +        err = FmPcdManipCheckParamsForCcNextEngine(
16970 +                &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
16971 +                &requiredAction);
16972 +        if (err)
16973 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16974 +    }
16975 +
16976 +    memcpy(&p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams,
16977 +           &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
16978 +           sizeof(t_FmPcdCcNextEngineParams));
16979 +
16980 +    p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].requiredAction =
16981 +            requiredAction;
16982 +
16983 +    if ((p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
16984 +            == e_FM_PCD_CC)
16985 +            && p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.h_Manip)
16986 +    {
16987 +        err =
16988 +                AllocAndFillAdForContLookupManip(
16989 +                        p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.params.ccParams.h_CcNode);
16990 +        if (err)
16991 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
16992 +    }
16993 +
16994 +    for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
16995 +    {
16996 +        p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
16997 +
16998 +        if (p_KeyParams->p_Mask)
16999 +            RETURN_ERROR(
17000 +                    MAJOR,
17001 +                    E_INVALID_VALUE,
17002 +                    ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT p_Mask can not be initialized"));
17003 +
17004 +        if (memcmp(p_KeyParams->p_Key, &key, 1) != 0)
17005 +            RETURN_ERROR(
17006 +                    MAJOR,
17007 +                    E_INVALID_VALUE,
17008 +                    ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT p_Key has to be 1"));
17009 +
17010 +        err = ValidateNextEngineParams(h_FmPcd,
17011 +                                       &p_KeyParams->ccNextEngineParams,
17012 +                                       p_CcNode->statisticsMode);
17013 +        if (err)
17014 +            RETURN_ERROR(MAJOR, err, (NO_MSG));
17015 +
17016 +        if (p_KeyParams->ccNextEngineParams.h_Manip)
17017 +        {
17018 +            err = FmPcdManipCheckParamsForCcNextEngine(
17019 +                    &p_KeyParams->ccNextEngineParams, &requiredAction);
17020 +            if (err)
17021 +                RETURN_ERROR(MAJOR, err, (NO_MSG));
17022 +        }
17023 +
17024 +        /* Store 'key' parameters - key (fixed to 0x01), key size of 1 byte and full mask */
17025 +        p_CcNode->keyAndNextEngineParams[tmp].key[0] = key;
17026 +        p_CcNode->keyAndNextEngineParams[tmp].mask[0] = 0xFF;
17027 +
17028 +        /* Store NextEngine parameters */
17029 +        memcpy(&p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams,
17030 +               &p_KeyParams->ccNextEngineParams,
17031 +               sizeof(t_FmPcdCcNextEngineParams));
17032 +
17033 +        if ((p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
17034 +                == e_FM_PCD_CC)
17035 +                && p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
17036 +        {
17037 +            err =
17038 +                    AllocAndFillAdForContLookupManip(
17039 +                            p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode);
17040 +            if (err)
17041 +                RETURN_ERROR(MAJOR, err, (NO_MSG));
17042 +        }
17043 +        p_CcNode->keyAndNextEngineParams[tmp].requiredAction = requiredAction;
17044 +    }
17045 +
17046 +    *isKeyTblAlloc = FALSE;
17047 +
17048 +    return E_OK;
17049 +}
17050 +
17051 +static t_Error IcHashIndexedCheckParams(t_Handle h_FmPcd,
17052 +                                        t_FmPcdCcNodeParams *p_CcNodeParam,
17053 +                                        t_FmPcdCcNode *p_CcNode,
17054 +                                        bool *isKeyTblAlloc)
17055 +{
17056 +    int tmp = 0, countOnes = 0;
17057 +    t_FmPcdCcKeyParams *p_KeyParams;
17058 +    t_Error err;
17059 +    uint16_t glblMask = p_CcNodeParam->extractCcParams.extractNonHdr.icIndxMask;
17060 +    uint16_t countMask = (uint16_t)(glblMask >> 4);
17061 +    uint32_t requiredAction = 0;
17062 +
17063 +    if (glblMask & 0x000f)
17064 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
17065 +                     ("icIndxMask has to be with last nibble 0"));
17066 +
17067 +    while (countMask)
17068 +    {
17069 +        countOnes++;
17070 +        countMask = (uint16_t)(countMask >> 1);
17071 +    }
17072 +
17073 +    if (!POWER_OF_2(p_CcNode->numOfKeys))
17074 +        RETURN_ERROR(
17075 +                MAJOR,
17076 +                E_INVALID_VALUE,
17077 +                ("For Node of the type INDEXED numOfKeys has to be powerOfTwo"));
17078 +
17079 +    if (p_CcNode->numOfKeys != ((uint32_t)1 << countOnes))
17080 +        RETURN_ERROR(
17081 +                MAJOR,
17082 +                E_INVALID_VALUE,
17083 +                ("For Node of the type IC_HASH_INDEXED numOfKeys has to be powerOfTwo"));
17084 +
17085 +    if (p_CcNodeParam->keysParams.maxNumOfKeys
17086 +            && (p_CcNodeParam->keysParams.maxNumOfKeys != p_CcNode->numOfKeys))
17087 +        RETURN_ERROR(
17088 +                MAJOR,
17089 +                E_INVALID_VALUE,
17090 +                ("For Node of the type INDEXED 'maxNumOfKeys' should be 0 or equal 'numOfKeys'"));
17091 +
17092 +    /* Validate statistics parameters */
17093 +    err = ValidateAndCalcStatsParams(p_CcNode, p_CcNodeParam,
17094 +                                     &(p_CcNode->numOfStatsFLRs),
17095 +                                     &(p_CcNode->countersArraySize));
17096 +    if (err)
17097 +        RETURN_ERROR(MAJOR, err, ("Invalid statistics parameters"));
17098 +
17099 +    err = ValidateNextEngineParams(
17100 +            h_FmPcd, &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
17101 +            p_CcNode->statisticsMode);
17102 +    if (GET_ERROR_TYPE(err) != E_NOT_SUPPORTED)
17103 +        RETURN_ERROR(
17104 +                MAJOR,
17105 +                err,
17106 +                ("MissNextEngineParams for the node of the type IC_INDEX_HASH has to be UnInitialized"));
17107 +
17108 +    for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
17109 +    {
17110 +        p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
17111 +
17112 +        if (p_KeyParams->p_Mask || p_KeyParams->p_Key)
17113 +            RETURN_ERROR(
17114 +                    MAJOR,
17115 +                    E_INVALID_VALUE,
17116 +                    ("For Node of the type IC_HASH_INDEXED p_Key or p_Mask has to be NULL"));
17117 +
17118 +        if ((glblMask & (tmp * 16)) == (tmp * 16))
17119 +        {
17120 +            err = ValidateNextEngineParams(h_FmPcd,
17121 +                                           &p_KeyParams->ccNextEngineParams,
17122 +                                           p_CcNode->statisticsMode);
17123 +            if (err)
17124 +                RETURN_ERROR(
17125 +                        MAJOR,
17126 +                        err,
17127 +                        ("This index has to be initialized for the node of the type IC_INDEX_HASH according to settings of GlobalMask "));
17128 +
17129 +            if (p_KeyParams->ccNextEngineParams.h_Manip)
17130 +            {
17131 +                err = FmPcdManipCheckParamsForCcNextEngine(
17132 +                        &p_KeyParams->ccNextEngineParams, &requiredAction);
17133 +                if (err)
17134 +                    RETURN_ERROR(MAJOR, err, (NO_MSG));
17135 +                p_CcNode->keyAndNextEngineParams[tmp].requiredAction =
17136 +                        requiredAction;
17137 +            }
17138 +
17139 +            memcpy(&p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams,
17140 +                   &p_KeyParams->ccNextEngineParams,
17141 +                   sizeof(t_FmPcdCcNextEngineParams));
17142 +
17143 +            if ((p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
17144 +                    == e_FM_PCD_CC)
17145 +                    && p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
17146 +            {
17147 +                err =
17148 +                        AllocAndFillAdForContLookupManip(
17149 +                                p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode);
17150 +                if (err)
17151 +                    RETURN_ERROR(MAJOR, err, (NO_MSG));
17152 +            }
17153 +        }
17154 +        else
17155 +        {
17156 +            err = ValidateNextEngineParams(h_FmPcd,
17157 +                                           &p_KeyParams->ccNextEngineParams,
17158 +                                           p_CcNode->statisticsMode);
17159 +            if (GET_ERROR_TYPE(err) != E_NOT_SUPPORTED)
17160 +                RETURN_ERROR(
17161 +                        MAJOR,
17162 +                        err,
17163 +                        ("This index has to be UnInitialized for the node of the type IC_INDEX_HASH according to settings of GlobalMask"));
17164 +        }
17165 +    }
17166 +
17167 +    *isKeyTblAlloc = FALSE;
17168 +    cpu_to_be16s(&glblMask);
17169 +    memcpy(PTR_MOVE(p_CcNode->p_GlblMask, 2), &glblMask, 2);
17170 +
17171 +    return E_OK;
17172 +}
17173 +
17174 +static t_Error ModifyNextEngineParamNode(
17175 +        t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex,
17176 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
17177 +{
17178 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
17179 +    t_FmPcd *p_FmPcd;
17180 +    t_List h_OldPointersLst, h_NewPointersLst;
17181 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
17182 +    t_Error err = E_OK;
17183 +
17184 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_VALUE);
17185 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
17186 +
17187 +    if (keyIndex >= p_CcNode->numOfKeys)
17188 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
17189 +                     ("keyIndex > previously cleared last index + 1"));
17190 +
17191 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
17192 +
17193 +    INIT_LIST(&h_OldPointersLst);
17194 +    INIT_LIST(&h_NewPointersLst);
17195 +
17196 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
17197 +                                             e_MODIFY_STATE_CHANGE, FALSE,
17198 +                                             FALSE, FALSE);
17199 +    if (!p_ModifyKeyParams)
17200 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
17201 +
17202 +    if (p_CcNode->maxNumOfKeys
17203 +            && !TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
17204 +    {
17205 +        XX_Free(p_ModifyKeyParams);
17206 +        return ERROR_CODE(E_BUSY);
17207 +    }
17208 +
17209 +    err = BuildNewNodeModifyNextEngine(h_FmPcd, p_CcNode, keyIndex,
17210 +                                       p_FmPcdCcNextEngineParams,
17211 +                                       &h_OldPointersLst, &h_NewPointersLst,
17212 +                                       p_ModifyKeyParams);
17213 +    if (err)
17214 +    {
17215 +        XX_Free(p_ModifyKeyParams);
17216 +        if (p_CcNode->maxNumOfKeys)
17217 +            RELEASE_LOCK(p_FmPcd->shadowLock);
17218 +        RETURN_ERROR(MAJOR, err, NO_MSG);
17219 +    }
17220 +
17221 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
17222 +                          p_ModifyKeyParams, FALSE);
17223 +
17224 +    if (p_CcNode->maxNumOfKeys)
17225 +        RELEASE_LOCK(p_FmPcd->shadowLock);
17226 +
17227 +       ReleaseLst(&h_OldPointersLst);
17228 +       ReleaseLst(&h_NewPointersLst);
17229 +
17230 +    return err;
17231 +}
17232 +
17233 +static t_Error FindKeyIndex(t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key,
17234 +                            uint8_t *p_Mask, uint16_t *p_KeyIndex)
17235 +{
17236 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
17237 +    uint8_t tmpMask[FM_PCD_MAX_SIZE_OF_KEY];
17238 +    uint16_t i;
17239 +
17240 +    ASSERT_COND(p_Key);
17241 +    ASSERT_COND(p_KeyIndex);
17242 +    ASSERT_COND(keySize < FM_PCD_MAX_SIZE_OF_KEY);
17243 +
17244 +    if (keySize != p_CcNode->userSizeOfExtraction)
17245 +        RETURN_ERROR(
17246 +                MINOR, E_INVALID_VALUE,
17247 +                ("Key size doesn't match the extraction size of the node"));
17248 +
17249 +    /* If user didn't pass a mask for this key, we'll look for full extraction mask */
17250 +    if (!p_Mask)
17251 +        memset(tmpMask, 0xFF, keySize);
17252 +
17253 +    for (i = 0; i < p_CcNode->numOfKeys; i++)
17254 +    {
17255 +        /* Comparing received key */
17256 +        if (memcmp(p_Key, p_CcNode->keyAndNextEngineParams[i].key, keySize)
17257 +                == 0)
17258 +        {
17259 +            if (p_Mask)
17260 +            {
17261 +                /* If a user passed a mask for this key, it must match to the existing key's mask for a correct match */
17262 +                if (memcmp(p_Mask, p_CcNode->keyAndNextEngineParams[i].mask,
17263 +                           keySize) == 0)
17264 +                {
17265 +                    *p_KeyIndex = i;
17266 +                    return E_OK;
17267 +                }
17268 +            }
17269 +            else
17270 +            {
17271 +                /* If user didn't pass a mask for this key, check if the existing key mask is full extraction */
17272 +                if (memcmp(tmpMask, p_CcNode->keyAndNextEngineParams[i].mask,
17273 +                           keySize) == 0)
17274 +                {
17275 +                    *p_KeyIndex = i;
17276 +                    return E_OK;
17277 +                }
17278 +            }
17279 +        }
17280 +    }
17281 +
17282 +    return ERROR_CODE(E_NOT_FOUND);
17283 +}
17284 +
17285 +static t_Error CalcAndUpdateCcShadow(t_FmPcdCcNode *p_CcNode,
17286 +                                     bool isKeyTblAlloc,
17287 +                                     uint32_t *p_MatchTableSize,
17288 +                                     uint32_t *p_AdTableSize)
17289 +{
17290 +    uint32_t shadowSize;
17291 +    t_Error err;
17292 +
17293 +    /* Calculate keys table maximal size - each entry consists of a key and a mask,
17294 +     (if local mask support is requested) */
17295 +    *p_MatchTableSize = p_CcNode->ccKeySizeAccExtraction * sizeof(uint8_t)
17296 +            * p_CcNode->maxNumOfKeys;
17297 +
17298 +    if (p_CcNode->maskSupport)
17299 +        *p_MatchTableSize *= 2;
17300 +
17301 +    /* Calculate next action descriptors table, including one more entry for miss */
17302 +    *p_AdTableSize = (uint32_t)((p_CcNode->maxNumOfKeys + 1)
17303 +            * FM_PCD_CC_AD_ENTRY_SIZE);
17304 +
17305 +    /* Calculate maximal shadow size of this node.
17306 +     All shadow structures will be used for runtime modifications host command. If
17307 +     keys table was allocated for this node, the keys table and next engines table may
17308 +     be modified in run time (entries added or removed), so shadow tables are requires.
17309 +     Otherwise, the only supported runtime modification is a specific next engine update
17310 +     and this requires shadow memory of a single AD */
17311 +
17312 +    /* Shadow size should be enough to hold the following 3 structures:
17313 +     * 1 - an action descriptor */
17314 +    shadowSize = FM_PCD_CC_AD_ENTRY_SIZE;
17315 +
17316 +    /* 2 - keys match table, if was allocated for the current node */
17317 +    if (isKeyTblAlloc)
17318 +        shadowSize += *p_MatchTableSize;
17319 +
17320 +    /* 3 - next action descriptors table */
17321 +    shadowSize += *p_AdTableSize;
17322 +
17323 +    /* Update shadow to the calculated size */
17324 +    err = FmPcdUpdateCcShadow(p_CcNode->h_FmPcd, (uint32_t)shadowSize,
17325 +                              FM_PCD_CC_AD_TABLE_ALIGN);
17326 +    if (err != E_OK)
17327 +    {
17328 +        DeleteNode(p_CcNode);
17329 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC node shadow"));
17330 +    }
17331 +
17332 +    return E_OK;
17333 +}
17334 +
17335 +static t_Error AllocStatsObjs(t_FmPcdCcNode *p_CcNode)
17336 +{
17337 +    t_FmPcdStatsObj *p_StatsObj;
17338 +    t_Handle h_FmMuram, h_StatsAd, h_StatsCounters;
17339 +    uint32_t i;
17340 +
17341 +    h_FmMuram = FmPcdGetMuramHandle(p_CcNode->h_FmPcd);
17342 +    if (!h_FmMuram)
17343 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM MURAM"));
17344 +
17345 +    /* Allocate statistics ADs and statistics counter. An extra pair (AD + counters)
17346 +     will be allocated to support runtime modifications */
17347 +    for (i = 0; i < p_CcNode->maxNumOfKeys + 2; i++)
17348 +    {
17349 +        /* Allocate list object structure */
17350 +        p_StatsObj = XX_Malloc(sizeof(t_FmPcdStatsObj));
17351 +        if (!p_StatsObj)
17352 +        {
17353 +            FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
17354 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Statistics object"));
17355 +        }
17356 +        memset(p_StatsObj, 0, sizeof(t_FmPcdStatsObj));
17357 +
17358 +        /* Allocate statistics AD from MURAM */
17359 +        h_StatsAd = (t_Handle)FM_MURAM_AllocMem(h_FmMuram,
17360 +                                                FM_PCD_CC_AD_ENTRY_SIZE,
17361 +                                                FM_PCD_CC_AD_TABLE_ALIGN);
17362 +        if (!h_StatsAd)
17363 +        {
17364 +            FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
17365 +            XX_Free(p_StatsObj);
17366 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
17367 +                         ("MURAM allocation for statistics ADs"));
17368 +        }
17369 +        MemSet8(h_StatsAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
17370 +
17371 +        /* Allocate statistics counters from MURAM */
17372 +        h_StatsCounters = (t_Handle)FM_MURAM_AllocMem(
17373 +                h_FmMuram, p_CcNode->countersArraySize,
17374 +                FM_PCD_CC_AD_TABLE_ALIGN);
17375 +        if (!h_StatsCounters)
17376 +        {
17377 +            FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
17378 +            FM_MURAM_FreeMem(h_FmMuram, h_StatsAd);
17379 +            XX_Free(p_StatsObj);
17380 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
17381 +                         ("MURAM allocation for statistics counters"));
17382 +        }
17383 +        MemSet8(h_StatsCounters, 0, p_CcNode->countersArraySize);
17384 +
17385 +        p_StatsObj->h_StatsAd = h_StatsAd;
17386 +        p_StatsObj->h_StatsCounters = h_StatsCounters;
17387 +
17388 +        EnqueueStatsObj(&p_CcNode->availableStatsLst, p_StatsObj);
17389 +    }
17390 +
17391 +    return E_OK;
17392 +}
17393 +
17394 +static t_Error MatchTableGetKeyStatistics(
17395 +        t_FmPcdCcNode *p_CcNode, uint16_t keyIndex,
17396 +        t_FmPcdCcKeyStatistics *p_KeyStatistics)
17397 +{
17398 +    uint32_t *p_StatsCounters, i;
17399 +
17400 +    if (p_CcNode->statisticsMode == e_FM_PCD_CC_STATS_MODE_NONE)
17401 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
17402 +                     ("Statistics were not enabled for this match table"));
17403 +
17404 +    if (!p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
17405 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
17406 +                     ("Statistics were not enabled for this key"));
17407 +
17408 +    memset(p_KeyStatistics, 0, sizeof(t_FmPcdCcKeyStatistics));
17409 +
17410 +    p_StatsCounters =
17411 +            p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsCounters;
17412 +    ASSERT_COND(p_StatsCounters);
17413 +
17414 +    p_KeyStatistics->byteCount = GET_UINT32(*p_StatsCounters);
17415 +
17416 +    for (i = 1; i <= p_CcNode->numOfStatsFLRs; i++)
17417 +    {
17418 +        p_StatsCounters =
17419 +                PTR_MOVE(p_StatsCounters, FM_PCD_CC_STATS_COUNTER_SIZE);
17420 +
17421 +        p_KeyStatistics->frameCount += GET_UINT32(*p_StatsCounters);
17422 +
17423 +#if (DPAA_VERSION >= 11)
17424 +        p_KeyStatistics->frameLengthRangeCount[i - 1] =
17425 +                GET_UINT32(*p_StatsCounters);
17426 +#endif /* (DPAA_VERSION >= 11) */
17427 +    }
17428 +
17429 +    return E_OK;
17430 +}
17431 +
17432 +static t_Error MatchTableSet(t_Handle h_FmPcd, t_FmPcdCcNode *p_CcNode,
17433 +                             t_FmPcdCcNodeParams *p_CcNodeParam)
17434 +{
17435 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
17436 +    t_FmPcdCcNode *p_FmPcdCcNextNode;
17437 +    t_Error err = E_OK;
17438 +    uint32_t tmp, keySize;
17439 +    bool glblMask = FALSE;
17440 +    t_FmPcdCcKeyParams *p_KeyParams;
17441 +    t_Handle h_FmMuram, p_KeysMatchTblTmp, p_AdTableTmp;
17442 +#if (DPAA_VERSION >= 11)
17443 +    t_Handle h_StatsFLRs;
17444 +#endif /* (DPAA_VERSION >= 11) */
17445 +    bool fullField = FALSE;
17446 +    ccPrivateInfo_t icCode = CC_PRIVATE_INFO_NONE;
17447 +    bool isKeyTblAlloc, fromIc = FALSE;
17448 +    uint32_t matchTableSize, adTableSize;
17449 +    t_CcNodeInformation ccNodeInfo, *p_CcInformation;
17450 +    t_FmPcdStatsObj *p_StatsObj;
17451 +    t_FmPcdCcStatsParams statsParams = { 0 };
17452 +    t_Handle h_Manip;
17453 +
17454 +    ASSERT_COND(h_FmPcd);
17455 +    ASSERT_COND(p_CcNode);
17456 +    ASSERT_COND(p_CcNodeParam);
17457 +
17458 +    p_CcNode->p_GlblMask = (t_Handle)XX_Malloc(
17459 +            CC_GLBL_MASK_SIZE * sizeof(uint8_t));
17460 +    memset(p_CcNode->p_GlblMask, 0, CC_GLBL_MASK_SIZE * sizeof(uint8_t));
17461 +
17462 +    p_CcNode->h_FmPcd = h_FmPcd;
17463 +    p_CcNode->numOfKeys = p_CcNodeParam->keysParams.numOfKeys;
17464 +    p_CcNode->maxNumOfKeys = p_CcNodeParam->keysParams.maxNumOfKeys;
17465 +    p_CcNode->maskSupport = p_CcNodeParam->keysParams.maskSupport;
17466 +    p_CcNode->statisticsMode = p_CcNodeParam->keysParams.statisticsMode;
17467 +
17468 +    /* For backward compatibility - even if statistics mode is nullified,
17469 +     we'll fix it to frame mode so we can support per-key request for
17470 +     statistics using 'statisticsEn' in next engine parameters */
17471 +    if (!p_CcNode->maxNumOfKeys
17472 +            && (p_CcNode->statisticsMode == e_FM_PCD_CC_STATS_MODE_NONE))
17473 +        p_CcNode->statisticsMode = e_FM_PCD_CC_STATS_MODE_FRAME;
17474 +
17475 +    h_FmMuram = FmPcdGetMuramHandle(h_FmPcd);
17476 +    if (!h_FmMuram)
17477 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM MURAM"));
17478 +
17479 +    INIT_LIST(&p_CcNode->ccPrevNodesLst);
17480 +    INIT_LIST(&p_CcNode->ccTreeIdLst);
17481 +    INIT_LIST(&p_CcNode->ccTreesLst);
17482 +    INIT_LIST(&p_CcNode->availableStatsLst);
17483 +
17484 +    p_CcNode->h_Spinlock = XX_InitSpinlock();
17485 +    if (!p_CcNode->h_Spinlock)
17486 +    {
17487 +        DeleteNode(p_CcNode);
17488 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("CC node spinlock"));
17489 +    }
17490 +
17491 +    if ((p_CcNodeParam->extractCcParams.type == e_FM_PCD_EXTRACT_BY_HDR)
17492 +            && ((p_CcNodeParam->extractCcParams.extractByHdr.hdr
17493 +                    == HEADER_TYPE_IPv4)
17494 +                    || (p_CcNodeParam->extractCcParams.extractByHdr.hdr
17495 +                            == HEADER_TYPE_IPv6))
17496 +            && (p_CcNodeParam->extractCcParams.extractByHdr.type
17497 +                    == e_FM_PCD_EXTRACT_FULL_FIELD)
17498 +            && ((p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField.ipv6
17499 +                    == NET_HEADER_FIELD_IPv6_HOP_LIMIT)
17500 +                    || (p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField.ipv4
17501 +                            == NET_HEADER_FIELD_IPv4_TTL)))
17502 +    {
17503 +        err = Ipv4TtlOrIpv6HopLimitCheckParams(h_FmPcd, p_CcNodeParam, p_CcNode,
17504 +                                               &isKeyTblAlloc);
17505 +        glblMask = FALSE;
17506 +    }
17507 +    else
17508 +        if ((p_CcNodeParam->extractCcParams.type == e_FM_PCD_EXTRACT_NON_HDR)
17509 +                && ((p_CcNodeParam->extractCcParams.extractNonHdr.src
17510 +                        == e_FM_PCD_EXTRACT_FROM_KEY)
17511 +                        || (p_CcNodeParam->extractCcParams.extractNonHdr.src
17512 +                                == e_FM_PCD_EXTRACT_FROM_HASH)
17513 +                        || (p_CcNodeParam->extractCcParams.extractNonHdr.src
17514 +                                == e_FM_PCD_EXTRACT_FROM_FLOW_ID)))
17515 +        {
17516 +            if ((p_CcNodeParam->extractCcParams.extractNonHdr.src
17517 +                    == e_FM_PCD_EXTRACT_FROM_FLOW_ID)
17518 +                    && (p_CcNodeParam->extractCcParams.extractNonHdr.offset != 0))
17519 +            {
17520 +                DeleteNode(p_CcNode);
17521 +                RETURN_ERROR(
17522 +                        MAJOR,
17523 +                        E_INVALID_VALUE,
17524 +                        ("In the case of the extraction from e_FM_PCD_EXTRACT_FROM_FLOW_ID offset has to be 0"));
17525 +            }
17526 +
17527 +            icCode = IcDefineCode(p_CcNodeParam);
17528 +            fromIc = TRUE;
17529 +            if (icCode == CC_PRIVATE_INFO_NONE)
17530 +            {
17531 +                DeleteNode(p_CcNode);
17532 +                RETURN_ERROR(
17533 +                        MAJOR,
17534 +                        E_INVALID_STATE,
17535 +                        ("user asked extraction from IC and field in internal context or action wasn't initialized in the right way"));
17536 +            }
17537 +
17538 +            if ((icCode == CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP)
17539 +                    || (icCode == CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP))
17540 +            {
17541 +                err = IcHashIndexedCheckParams(h_FmPcd, p_CcNodeParam, p_CcNode,
17542 +                                               &isKeyTblAlloc);
17543 +                glblMask = TRUE;
17544 +            }
17545 +            else
17546 +            {
17547 +                err = CheckParams(h_FmPcd, p_CcNodeParam, p_CcNode,
17548 +                                  &isKeyTblAlloc);
17549 +                if (p_CcNode->glblMaskSize)
17550 +                    glblMask = TRUE;
17551 +            }
17552 +        }
17553 +        else
17554 +        {
17555 +            err = CheckParams(h_FmPcd, p_CcNodeParam, p_CcNode, &isKeyTblAlloc);
17556 +            if (p_CcNode->glblMaskSize)
17557 +                glblMask = TRUE;
17558 +        }
17559 +
17560 +    if (err)
17561 +    {
17562 +        DeleteNode(p_CcNode);
17563 +        RETURN_ERROR(MAJOR, err, NO_MSG);
17564 +    }
17565 +
17566 +    switch (p_CcNodeParam->extractCcParams.type)
17567 +    {
17568 +        case (e_FM_PCD_EXTRACT_BY_HDR):
17569 +            switch (p_CcNodeParam->extractCcParams.extractByHdr.type)
17570 +            {
17571 +                case (e_FM_PCD_EXTRACT_FULL_FIELD):
17572 +                    p_CcNode->parseCode =
17573 +                            GetFullFieldParseCode(
17574 +                                    p_CcNodeParam->extractCcParams.extractByHdr.hdr,
17575 +                                    p_CcNodeParam->extractCcParams.extractByHdr.hdrIndex,
17576 +                                    p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField);
17577 +                    GetSizeHeaderField(
17578 +                            p_CcNodeParam->extractCcParams.extractByHdr.hdr,
17579 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField,
17580 +                            &p_CcNode->sizeOfExtraction);
17581 +                    fullField = TRUE;
17582 +                    if ((p_CcNode->parseCode != CC_PC_FF_TCI1)
17583 +                            && (p_CcNode->parseCode != CC_PC_FF_TCI2)
17584 +                            && (p_CcNode->parseCode != CC_PC_FF_MPLS1)
17585 +                            && (p_CcNode->parseCode != CC_PC_FF_MPLS_LAST)
17586 +                            && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC1)
17587 +                            && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC2)
17588 +                            && (p_CcNode->parseCode
17589 +                                    != CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1)
17590 +                            && (p_CcNode->parseCode != CC_PC_FF_IPDSCP)
17591 +                            && (p_CcNode->parseCode
17592 +                                    != CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2)
17593 +                            && glblMask)
17594 +                    {
17595 +                        glblMask = FALSE;
17596 +                        p_CcNode->glblMaskSize = 4;
17597 +                        p_CcNode->lclMask = TRUE;
17598 +                    }
17599 +                    break;
17600 +
17601 +                case (e_FM_PCD_EXTRACT_FROM_HDR):
17602 +                    p_CcNode->sizeOfExtraction =
17603 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromHdr.size;
17604 +                    p_CcNode->offset =
17605 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromHdr.offset;
17606 +                    p_CcNode->userOffset =
17607 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromHdr.offset;
17608 +                    p_CcNode->parseCode =
17609 +                            GetPrParseCode(
17610 +                                    p_CcNodeParam->extractCcParams.extractByHdr.hdr,
17611 +                                    p_CcNodeParam->extractCcParams.extractByHdr.hdrIndex,
17612 +                                    p_CcNode->offset, glblMask,
17613 +                                    &p_CcNode->prsArrayOffset);
17614 +                    break;
17615 +
17616 +                case (e_FM_PCD_EXTRACT_FROM_FIELD):
17617 +                    p_CcNode->offset =
17618 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.offset;
17619 +                    p_CcNode->userOffset =
17620 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.offset;
17621 +                    p_CcNode->sizeOfExtraction =
17622 +                            p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.size;
17623 +                    p_CcNode->parseCode =
17624 +                            GetFieldParseCode(
17625 +                                    p_CcNodeParam->extractCcParams.extractByHdr.hdr,
17626 +                                    p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.field,
17627 +                                    p_CcNode->offset,
17628 +                                    &p_CcNode->prsArrayOffset,
17629 +                                    p_CcNodeParam->extractCcParams.extractByHdr.hdrIndex);
17630 +                    break;
17631 +
17632 +                default:
17633 +                    DeleteNode(p_CcNode);
17634 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
17635 +            }
17636 +            break;
17637 +
17638 +        case (e_FM_PCD_EXTRACT_NON_HDR):
17639 +            /* get the field code for the generic extract */
17640 +            p_CcNode->sizeOfExtraction =
17641 +                    p_CcNodeParam->extractCcParams.extractNonHdr.size;
17642 +            p_CcNode->offset =
17643 +                    p_CcNodeParam->extractCcParams.extractNonHdr.offset;
17644 +            p_CcNode->userOffset =
17645 +                    p_CcNodeParam->extractCcParams.extractNonHdr.offset;
17646 +            p_CcNode->parseCode = GetGenParseCode(
17647 +                    p_CcNodeParam->extractCcParams.extractNonHdr.src,
17648 +                    p_CcNode->offset, glblMask, &p_CcNode->prsArrayOffset,
17649 +                    fromIc, icCode);
17650 +
17651 +            if (p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED)
17652 +            {
17653 +                if ((p_CcNode->offset + p_CcNode->sizeOfExtraction) > 8)
17654 +                {
17655 +                    DeleteNode(p_CcNode);
17656 +                    RETURN_ERROR(
17657 +                            MAJOR,
17658 +                            E_INVALID_SELECTION,
17659 +                            ("when node of the type CC_PC_GENERIC_IC_HASH_INDEXED offset + size can not be bigger then size of HASH 64 bits (8 bytes)"));
17660 +                }
17661 +            }
17662 +            if ((p_CcNode->parseCode == CC_PC_GENERIC_IC_GMASK)
17663 +                    || (p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED))
17664 +            {
17665 +                p_CcNode->offset += p_CcNode->prsArrayOffset;
17666 +                p_CcNode->prsArrayOffset = 0;
17667 +            }
17668 +            break;
17669 +
17670 +        default:
17671 +            DeleteNode(p_CcNode);
17672 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
17673 +    }
17674 +
17675 +    if (p_CcNode->parseCode == CC_PC_ILLEGAL)
17676 +    {
17677 +        DeleteNode(p_CcNode);
17678 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("illegal extraction type"));
17679 +    }
17680 +
17681 +    if ((p_CcNode->sizeOfExtraction > FM_PCD_MAX_SIZE_OF_KEY)
17682 +            || !p_CcNode->sizeOfExtraction)
17683 +    {
17684 +        DeleteNode(p_CcNode);
17685 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
17686 +                     ("sizeOfExatrction can not be greater than 56 and not 0"));
17687 +    }
17688 +
17689 +    if (p_CcNodeParam->keysParams.keySize != p_CcNode->sizeOfExtraction)
17690 +    {
17691 +        DeleteNode(p_CcNode);
17692 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
17693 +                     ("keySize has to be equal to sizeOfExtraction"));
17694 +    }
17695 +
17696 +    p_CcNode->userSizeOfExtraction = p_CcNode->sizeOfExtraction;
17697 +
17698 +    if (!glblMask)
17699 +        memset(p_CcNode->p_GlblMask, 0xff, CC_GLBL_MASK_SIZE * sizeof(uint8_t));
17700 +
17701 +    err = CheckAndSetManipParamsWithCcNodeParams(p_CcNode);
17702 +    if (err != E_OK)
17703 +    {
17704 +        DeleteNode(p_CcNode);
17705 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
17706 +                     ("keySize has to be equal to sizeOfExtraction"));
17707 +    }
17708 +
17709 +    /* Calculating matching table entry size by rounding up the user-defined size of extraction to valid entry size */
17710 +    GetCcExtractKeySize(p_CcNode->sizeOfExtraction,
17711 +                        &p_CcNode->ccKeySizeAccExtraction);
17712 +
17713 +    /* If local mask is used, it is stored next to each key in the keys match table */
17714 +    if (p_CcNode->lclMask)
17715 +        keySize = (uint32_t)(2 * p_CcNode->ccKeySizeAccExtraction);
17716 +    else
17717 +        keySize = p_CcNode->ccKeySizeAccExtraction;
17718 +
17719 +    /* Update CC shadow with maximal size required by this node */
17720 +    if (p_CcNode->maxNumOfKeys)
17721 +    {
17722 +        err = CalcAndUpdateCcShadow(p_CcNode, isKeyTblAlloc, &matchTableSize,
17723 +                                    &adTableSize);
17724 +        if (err != E_OK)
17725 +        {
17726 +            DeleteNode(p_CcNode);
17727 +            RETURN_ERROR(MAJOR, err, NO_MSG);
17728 +        }
17729 +
17730 +        p_CcNode->keysMatchTableMaxSize = matchTableSize;
17731 +
17732 +        if (p_CcNode->statisticsMode != e_FM_PCD_CC_STATS_MODE_NONE)
17733 +        {
17734 +            err = AllocStatsObjs(p_CcNode);
17735 +            if (err != E_OK)
17736 +            {
17737 +                DeleteNode(p_CcNode);
17738 +                RETURN_ERROR(MAJOR, err, NO_MSG);
17739 +            }
17740 +        }
17741 +
17742 +        /* If manipulation will be initialized before this node, it will use the table
17743 +         descriptor in the AD table of previous node and this node will need an extra
17744 +         AD as his table descriptor. */
17745 +        p_CcNode->h_TmpAd = (t_Handle)FM_MURAM_AllocMem(
17746 +                h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE, FM_PCD_CC_AD_TABLE_ALIGN);
17747 +        if (!p_CcNode->h_TmpAd)
17748 +        {
17749 +            DeleteNode(p_CcNode);
17750 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
17751 +                         ("MURAM allocation for CC action descriptor"));
17752 +        }
17753 +    }
17754 +    else
17755 +    {
17756 +        matchTableSize = (uint32_t)(keySize * sizeof(uint8_t)
17757 +                * (p_CcNode->numOfKeys + 1));
17758 +        adTableSize = (uint32_t)(FM_PCD_CC_AD_ENTRY_SIZE
17759 +                * (p_CcNode->numOfKeys + 1));
17760 +    }
17761 +
17762 +#if (DPAA_VERSION >= 11)
17763 +    switch (p_CcNode->statisticsMode)
17764 +    {
17765 +
17766 +        case e_FM_PCD_CC_STATS_MODE_RMON:
17767 +            /* If RMON statistics or RMON conditional statistics modes are requested,
17768 +             allocate frame length ranges array */
17769 +            p_CcNode->h_StatsFLRs = FM_MURAM_AllocMem(
17770 +                    h_FmMuram,
17771 +                    (uint32_t)(p_CcNode->numOfStatsFLRs)
17772 +                            * FM_PCD_CC_STATS_FLR_SIZE,
17773 +                    FM_PCD_CC_AD_TABLE_ALIGN);
17774 +
17775 +            if (!p_CcNode->h_StatsFLRs)
17776 +            {
17777 +                DeleteNode(p_CcNode);
17778 +                RETURN_ERROR(
17779 +                        MAJOR, E_NO_MEMORY,
17780 +                        ("MURAM allocation for CC frame length ranges array"));
17781 +            }
17782 +
17783 +            /* Initialize using value received from the user */
17784 +            for (tmp = 0; tmp < p_CcNode->numOfStatsFLRs; tmp++)
17785 +            {
17786 +                uint16_t flr =
17787 +                         cpu_to_be16(p_CcNodeParam->keysParams.frameLengthRanges[tmp]);
17788 +
17789 +                h_StatsFLRs =
17790 +                        PTR_MOVE(p_CcNode->h_StatsFLRs, tmp * FM_PCD_CC_STATS_FLR_SIZE);
17791 +
17792 +                MemCpy8(h_StatsFLRs,
17793 +                            &flr,
17794 +                            FM_PCD_CC_STATS_FLR_SIZE);
17795 +            }
17796 +            break;
17797 +
17798 +        default:
17799 +            break;
17800 +    }
17801 +#endif /* (DPAA_VERSION >= 11) */
17802 +
17803 +    /* Allocate keys match table. Not required for some CC nodes, for example for IPv4 TTL
17804 +     identification, IPv6 hop count identification, etc. */
17805 +    if (isKeyTblAlloc)
17806 +    {
17807 +        p_CcNode->h_KeysMatchTable = (t_Handle)FM_MURAM_AllocMem(
17808 +                h_FmMuram, matchTableSize, FM_PCD_CC_KEYS_MATCH_TABLE_ALIGN);
17809 +        if (!p_CcNode->h_KeysMatchTable)
17810 +        {
17811 +            DeleteNode(p_CcNode);
17812 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
17813 +                         ("MURAM allocation for CC node key match table"));
17814 +        }
17815 +        MemSet8((uint8_t *)p_CcNode->h_KeysMatchTable, 0, matchTableSize);
17816 +    }
17817 +
17818 +    /* Allocate action descriptors table */
17819 +    p_CcNode->h_AdTable = (t_Handle)FM_MURAM_AllocMem(h_FmMuram, adTableSize,
17820 +                                                      FM_PCD_CC_AD_TABLE_ALIGN);
17821 +    if (!p_CcNode->h_AdTable)
17822 +    {
17823 +        DeleteNode(p_CcNode);
17824 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
17825 +                     ("MURAM allocation for CC node action descriptors table"));
17826 +    }
17827 +    MemSet8((uint8_t *)p_CcNode->h_AdTable, 0, adTableSize);
17828 +
17829 +    p_KeysMatchTblTmp = p_CcNode->h_KeysMatchTable;
17830 +    p_AdTableTmp = p_CcNode->h_AdTable;
17831 +
17832 +    /* For each key, create the key and the next step AD */
17833 +    for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
17834 +    {
17835 +        p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
17836 +
17837 +        if (p_KeysMatchTblTmp)
17838 +        {
17839 +            /* Copy the key */
17840 +            MemCpy8((void*)p_KeysMatchTblTmp, p_KeyParams->p_Key,
17841 +                        p_CcNode->sizeOfExtraction);
17842 +
17843 +            /* Copy the key mask or initialize it to 0xFF..F */
17844 +            if (p_CcNode->lclMask && p_KeyParams->p_Mask)
17845 +            {
17846 +                MemCpy8(PTR_MOVE(p_KeysMatchTblTmp,
17847 +                        p_CcNode->ccKeySizeAccExtraction), /* User's size of extraction rounded up to a valid matching table entry size */
17848 +                            p_KeyParams->p_Mask, p_CcNode->sizeOfExtraction); /* Exact size of extraction as received from the user */
17849 +            }
17850 +            else
17851 +                if (p_CcNode->lclMask)
17852 +                {
17853 +                    MemSet8(PTR_MOVE(p_KeysMatchTblTmp,
17854 +                            p_CcNode->ccKeySizeAccExtraction), /* User's size of extraction rounded up to a valid matching table entry size */
17855 +                               0xff, p_CcNode->sizeOfExtraction); /* Exact size of extraction as received from the user */
17856 +                }
17857 +
17858 +            p_KeysMatchTblTmp =
17859 +                    PTR_MOVE(p_KeysMatchTblTmp, keySize * sizeof(uint8_t));
17860 +        }
17861 +
17862 +        /* Create the next action descriptor in the match table */
17863 +        if (p_KeyParams->ccNextEngineParams.statisticsEn)
17864 +        {
17865 +            p_StatsObj = GetStatsObj(p_CcNode);
17866 +            ASSERT_COND(p_StatsObj);
17867 +
17868 +            statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
17869 +            statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
17870 +#if (DPAA_VERSION >= 11)
17871 +            statsParams.h_StatsFLRs = p_CcNode->h_StatsFLRs;
17872 +
17873 +#endif /* (DPAA_VERSION >= 11) */
17874 +            NextStepAd(p_AdTableTmp, &statsParams,
17875 +                       &p_KeyParams->ccNextEngineParams, p_FmPcd);
17876 +
17877 +            p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = p_StatsObj;
17878 +        }
17879 +        else
17880 +        {
17881 +            NextStepAd(p_AdTableTmp, NULL, &p_KeyParams->ccNextEngineParams,
17882 +                       p_FmPcd);
17883 +
17884 +            p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = NULL;
17885 +        }
17886 +
17887 +        p_AdTableTmp = PTR_MOVE(p_AdTableTmp, FM_PCD_CC_AD_ENTRY_SIZE);
17888 +    }
17889 +
17890 +    /* Update next engine for the 'miss' entry */
17891 +    if (p_CcNodeParam->keysParams.ccNextEngineParamsForMiss.statisticsEn)
17892 +    {
17893 +        p_StatsObj = GetStatsObj(p_CcNode);
17894 +        ASSERT_COND(p_StatsObj);
17895 +
17896 +        /* All 'bucket' nodes of a hash table should share the same statistics counters,
17897 +         allocated by the hash table. So, if this node is a bucket of a hash table,
17898 +         we'll replace the locally allocated counters with the shared counters. */
17899 +        if (p_CcNode->isHashBucket)
17900 +        {
17901 +            ASSERT_COND(p_CcNode->h_MissStatsCounters);
17902 +
17903 +            /* Store original counters pointer and replace it with mutual preallocated pointer */
17904 +            p_CcNode->h_PrivMissStatsCounters = p_StatsObj->h_StatsCounters;
17905 +            p_StatsObj->h_StatsCounters = p_CcNode->h_MissStatsCounters;
17906 +        }
17907 +
17908 +        statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
17909 +        statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
17910 +#if (DPAA_VERSION >= 11)
17911 +        statsParams.h_StatsFLRs = p_CcNode->h_StatsFLRs;
17912 +
17913 +#endif /* (DPAA_VERSION >= 11) */
17914 +
17915 +        NextStepAd(p_AdTableTmp, &statsParams,
17916 +                   &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
17917 +                   p_FmPcd);
17918 +
17919 +        p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = p_StatsObj;
17920 +    }
17921 +    else
17922 +    {
17923 +        NextStepAd(p_AdTableTmp, NULL,
17924 +                   &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
17925 +                   p_FmPcd);
17926 +
17927 +        p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = NULL;
17928 +    }
17929 +
17930 +    /* This parameter will be used to initialize the "key length" field in the action descriptor
17931 +     that points to this node and it should be 0 for full field extraction */
17932 +    if (fullField == TRUE)
17933 +        p_CcNode->sizeOfExtraction = 0;
17934 +
17935 +    for (tmp = 0; tmp < MIN(p_CcNode->numOfKeys + 1, CC_MAX_NUM_OF_KEYS); tmp++)
17936 +    {
17937 +        if (p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
17938 +                == e_FM_PCD_CC)
17939 +        {
17940 +            p_FmPcdCcNextNode =
17941 +                    (t_FmPcdCcNode*)p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode;
17942 +            p_CcInformation = FindNodeInfoInReleventLst(
17943 +                    &p_FmPcdCcNextNode->ccPrevNodesLst, (t_Handle)p_CcNode,
17944 +                    p_FmPcdCcNextNode->h_Spinlock);
17945 +            if (!p_CcInformation)
17946 +            {
17947 +                memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
17948 +                ccNodeInfo.h_CcNode = (t_Handle)p_CcNode;
17949 +                ccNodeInfo.index = 1;
17950 +                EnqueueNodeInfoToRelevantLst(&p_FmPcdCcNextNode->ccPrevNodesLst,
17951 +                                             &ccNodeInfo,
17952 +                                             p_FmPcdCcNextNode->h_Spinlock);
17953 +            }
17954 +            else
17955 +                p_CcInformation->index++;
17956 +
17957 +            if (p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
17958 +            {
17959 +                h_Manip =
17960 +                        p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip;
17961 +                p_CcInformation = FindNodeInfoInReleventLst(
17962 +                        FmPcdManipGetNodeLstPointedOnThisManip(h_Manip),
17963 +                        (t_Handle)p_CcNode, FmPcdManipGetSpinlock(h_Manip));
17964 +                if (!p_CcInformation)
17965 +                {
17966 +                    memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
17967 +                    ccNodeInfo.h_CcNode = (t_Handle)p_CcNode;
17968 +                    ccNodeInfo.index = 1;
17969 +                    EnqueueNodeInfoToRelevantLst(
17970 +                            FmPcdManipGetNodeLstPointedOnThisManip(h_Manip),
17971 +                            &ccNodeInfo, FmPcdManipGetSpinlock(h_Manip));
17972 +                }
17973 +                else
17974 +                    p_CcInformation->index++;
17975 +            }
17976 +        }
17977 +    }
17978 +
17979 +    p_AdTableTmp = p_CcNode->h_AdTable;
17980 +
17981 +    if (!FmPcdLockTryLockAll(h_FmPcd))
17982 +    {
17983 +        FM_PCD_MatchTableDelete((t_Handle)p_CcNode);
17984 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
17985 +        return ERROR_CODE(E_BUSY);
17986 +    }
17987 +
17988 +    /* Required action for each next engine */
17989 +    for (tmp = 0; tmp < MIN(p_CcNode->numOfKeys + 1, CC_MAX_NUM_OF_KEYS); tmp++)
17990 +    {
17991 +        if (p_CcNode->keyAndNextEngineParams[tmp].requiredAction)
17992 +        {
17993 +            err = SetRequiredAction(
17994 +                    h_FmPcd,
17995 +                    p_CcNode->keyAndNextEngineParams[tmp].requiredAction,
17996 +                    &p_CcNode->keyAndNextEngineParams[tmp], p_AdTableTmp, 1,
17997 +                    NULL);
17998 +            if (err)
17999 +            {
18000 +                FmPcdLockUnlockAll(h_FmPcd);
18001 +                FM_PCD_MatchTableDelete((t_Handle)p_CcNode);
18002 +                RETURN_ERROR(MAJOR, err, NO_MSG);
18003 +            }
18004 +            p_AdTableTmp = PTR_MOVE(p_AdTableTmp, FM_PCD_CC_AD_ENTRY_SIZE);
18005 +        }
18006 +    }
18007 +
18008 +    FmPcdLockUnlockAll(h_FmPcd);
18009 +
18010 +    return E_OK;
18011 +}
18012 +/************************** End of static functions **************************/
18013 +
18014 +/*****************************************************************************/
18015 +/*              Inter-module API routines                                    */
18016 +/*****************************************************************************/
18017 +
18018 +t_CcNodeInformation* FindNodeInfoInReleventLst(t_List *p_List, t_Handle h_Info,
18019 +                                               t_Handle h_Spinlock)
18020 +{
18021 +    t_CcNodeInformation *p_CcInformation;
18022 +    t_List *p_Pos;
18023 +    uint32_t intFlags;
18024 +
18025 +    intFlags = XX_LockIntrSpinlock(h_Spinlock);
18026 +
18027 +    for (p_Pos = LIST_FIRST(p_List); p_Pos != (p_List);
18028 +            p_Pos = LIST_NEXT(p_Pos))
18029 +    {
18030 +        p_CcInformation = CC_NODE_F_OBJECT(p_Pos);
18031 +
18032 +        ASSERT_COND(p_CcInformation->h_CcNode);
18033 +
18034 +        if (p_CcInformation->h_CcNode == h_Info)
18035 +        {
18036 +            XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
18037 +            return p_CcInformation;
18038 +        }
18039 +    }
18040 +
18041 +    XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
18042 +
18043 +    return NULL;
18044 +}
18045 +
18046 +void EnqueueNodeInfoToRelevantLst(t_List *p_List, t_CcNodeInformation *p_CcInfo,
18047 +                                  t_Handle h_Spinlock)
18048 +{
18049 +    t_CcNodeInformation *p_CcInformation;
18050 +    uint32_t intFlags = 0;
18051 +
18052 +    p_CcInformation = (t_CcNodeInformation *)XX_Malloc(
18053 +            sizeof(t_CcNodeInformation));
18054 +
18055 +    if (p_CcInformation)
18056 +    {
18057 +        memset(p_CcInformation, 0, sizeof(t_CcNodeInformation));
18058 +        memcpy(p_CcInformation, p_CcInfo, sizeof(t_CcNodeInformation));
18059 +        INIT_LIST(&p_CcInformation->node);
18060 +
18061 +        if (h_Spinlock)
18062 +            intFlags = XX_LockIntrSpinlock(h_Spinlock);
18063 +
18064 +        LIST_AddToTail(&p_CcInformation->node, p_List);
18065 +
18066 +        if (h_Spinlock)
18067 +            XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
18068 +    }
18069 +    else
18070 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("CC Node Information"));
18071 +}
18072 +
18073 +void DequeueNodeInfoFromRelevantLst(t_List *p_List, t_Handle h_Info,
18074 +                                    t_Handle h_Spinlock)
18075 +{
18076 +    t_CcNodeInformation *p_CcInformation = NULL;
18077 +    uint32_t intFlags = 0;
18078 +    t_List *p_Pos;
18079 +
18080 +    if (h_Spinlock)
18081 +        intFlags = XX_LockIntrSpinlock(h_Spinlock);
18082 +
18083 +    if (LIST_IsEmpty(p_List))
18084 +    {
18085 +        XX_RestoreAllIntr(intFlags);
18086 +        return;
18087 +    }
18088 +
18089 +    for (p_Pos = LIST_FIRST(p_List); p_Pos != (p_List);
18090 +            p_Pos = LIST_NEXT(p_Pos))
18091 +    {
18092 +        p_CcInformation = CC_NODE_F_OBJECT(p_Pos);
18093 +        ASSERT_COND(p_CcInformation);
18094 +        ASSERT_COND(p_CcInformation->h_CcNode);
18095 +        if (p_CcInformation->h_CcNode == h_Info)
18096 +            break;
18097 +    }
18098 +
18099 +    if (p_CcInformation)
18100 +    {
18101 +        LIST_DelAndInit(&p_CcInformation->node);
18102 +        XX_Free(p_CcInformation);
18103 +    }
18104 +
18105 +    if (h_Spinlock)
18106 +        XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
18107 +}
18108 +
18109 +void NextStepAd(t_Handle h_Ad, t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
18110 +                t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
18111 +                t_FmPcd *p_FmPcd)
18112 +{
18113 +    switch (p_FmPcdCcNextEngineParams->nextEngine)
18114 +    {
18115 +        case (e_FM_PCD_KG):
18116 +        case (e_FM_PCD_PLCR):
18117 +        case (e_FM_PCD_DONE):
18118 +            /* if NIA is not CC, create a "result" type AD */
18119 +            FillAdOfTypeResult(h_Ad, p_FmPcdCcStatsParams, p_FmPcd,
18120 +                               p_FmPcdCcNextEngineParams);
18121 +            break;
18122 +#if (DPAA_VERSION >= 11)
18123 +        case (e_FM_PCD_FR):
18124 +            if (p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic)
18125 +            {
18126 +                FillAdOfTypeContLookup(
18127 +                        h_Ad, p_FmPcdCcStatsParams, p_FmPcd,
18128 +                        p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode,
18129 +                        p_FmPcdCcNextEngineParams->h_Manip,
18130 +                        p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic);
18131 +                FrmReplicGroupUpdateOwner(
18132 +                        p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic,
18133 +                        TRUE/* add */);
18134 +            }
18135 +            break;
18136 +#endif /* (DPAA_VERSION >= 11) */
18137 +
18138 +        case (e_FM_PCD_CC):
18139 +            /* if NIA is not CC, create a TD to continue the CC lookup */
18140 +            FillAdOfTypeContLookup(
18141 +                    h_Ad, p_FmPcdCcStatsParams, p_FmPcd,
18142 +                    p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode,
18143 +                    p_FmPcdCcNextEngineParams->h_Manip, NULL);
18144 +
18145 +            UpdateNodeOwner(p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode,
18146 +                            TRUE);
18147 +            break;
18148 +
18149 +        default:
18150 +            return;
18151 +    }
18152 +}
18153 +
18154 +t_Error FmPcdCcTreeAddIPR(t_Handle h_FmPcd, t_Handle h_FmTree,
18155 +                          t_Handle h_NetEnv, t_Handle h_IpReassemblyManip,
18156 +                          bool createSchemes)
18157 +{
18158 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
18159 +    t_FmPcdCcNextEngineParams nextEngineParams;
18160 +    t_NetEnvParams netEnvParams;
18161 +    t_Handle h_Ad;
18162 +    bool isIpv6Present;
18163 +    uint8_t ipv4GroupId, ipv6GroupId;
18164 +    t_Error err;
18165 +
18166 +    ASSERT_COND(p_FmPcdCcTree);
18167 +
18168 +    /* this routine must be protected by the calling routine! */
18169 +
18170 +    memset(&nextEngineParams, 0, sizeof(t_FmPcdCcNextEngineParams));
18171 +    memset(&netEnvParams, 0, sizeof(t_NetEnvParams));
18172 +
18173 +    h_Ad = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
18174 +
18175 +    isIpv6Present = FmPcdManipIpReassmIsIpv6Hdr(h_IpReassemblyManip);
18176 +
18177 +    if (isIpv6Present
18178 +            && (p_FmPcdCcTree->numOfEntries > (FM_PCD_MAX_NUM_OF_CC_GROUPS - 2)))
18179 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("need two free entries for IPR"));
18180 +
18181 +    if (p_FmPcdCcTree->numOfEntries > (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1))
18182 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("need two free entries for IPR"));
18183 +
18184 +    nextEngineParams.nextEngine = e_FM_PCD_DONE;
18185 +    nextEngineParams.h_Manip = h_IpReassemblyManip;
18186 +
18187 +    /* Lock tree */
18188 +    err = CcRootTryLock(p_FmPcdCcTree);
18189 +    if (err)
18190 +        return ERROR_CODE(E_BUSY);
18191 +
18192 +    if (p_FmPcdCcTree->h_IpReassemblyManip == h_IpReassemblyManip)
18193 +    {
18194 +        CcRootReleaseLock(p_FmPcdCcTree);
18195 +        return E_OK;
18196 +    }
18197 +
18198 +    if ((p_FmPcdCcTree->h_IpReassemblyManip)
18199 +            && (p_FmPcdCcTree->h_IpReassemblyManip != h_IpReassemblyManip))
18200 +    {
18201 +        CcRootReleaseLock(p_FmPcdCcTree);
18202 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
18203 +                     ("This tree was previously updated with different IPR"));
18204 +    }
18205 +
18206 +    /* Initialize IPR for the first time for this tree */
18207 +    if (isIpv6Present)
18208 +    {
18209 +        ipv6GroupId = p_FmPcdCcTree->numOfGrps++;
18210 +        p_FmPcdCcTree->fmPcdGroupParam[ipv6GroupId].baseGroupEntry =
18211 +                (FM_PCD_MAX_NUM_OF_CC_GROUPS - 2);
18212 +
18213 +        if (createSchemes)
18214 +        {
18215 +            err = FmPcdManipBuildIpReassmScheme(h_FmPcd, h_NetEnv,
18216 +                                                p_FmPcdCcTree,
18217 +                                                h_IpReassemblyManip, FALSE,
18218 +                                                ipv6GroupId);
18219 +            if (err)
18220 +            {
18221 +                p_FmPcdCcTree->numOfGrps--;
18222 +                CcRootReleaseLock(p_FmPcdCcTree);
18223 +                RETURN_ERROR(MAJOR, err, NO_MSG);
18224 +            }
18225 +        }
18226 +
18227 +        NextStepAd(
18228 +                PTR_MOVE(h_Ad, (FM_PCD_MAX_NUM_OF_CC_GROUPS-2) * FM_PCD_CC_AD_ENTRY_SIZE),
18229 +                NULL, &nextEngineParams, h_FmPcd);
18230 +    }
18231 +
18232 +    ipv4GroupId = p_FmPcdCcTree->numOfGrps++;
18233 +    p_FmPcdCcTree->fmPcdGroupParam[ipv4GroupId].totalBitsMask = 0;
18234 +    p_FmPcdCcTree->fmPcdGroupParam[ipv4GroupId].baseGroupEntry =
18235 +            (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1);
18236 +
18237 +    if (createSchemes)
18238 +    {
18239 +        err = FmPcdManipBuildIpReassmScheme(h_FmPcd, h_NetEnv, p_FmPcdCcTree,
18240 +                                            h_IpReassemblyManip, TRUE,
18241 +                                            ipv4GroupId);
18242 +        if (err)
18243 +        {
18244 +            p_FmPcdCcTree->numOfGrps--;
18245 +            if (isIpv6Present)
18246 +            {
18247 +                p_FmPcdCcTree->numOfGrps--;
18248 +                FmPcdManipDeleteIpReassmSchemes(h_IpReassemblyManip);
18249 +            }
18250 +            CcRootReleaseLock(p_FmPcdCcTree);
18251 +            RETURN_ERROR(MAJOR, err, NO_MSG);
18252 +        }
18253 +    }
18254 +
18255 +    NextStepAd(
18256 +            PTR_MOVE(h_Ad, (FM_PCD_MAX_NUM_OF_CC_GROUPS-1) * FM_PCD_CC_AD_ENTRY_SIZE),
18257 +            NULL, &nextEngineParams, h_FmPcd);
18258 +
18259 +    p_FmPcdCcTree->h_IpReassemblyManip = h_IpReassemblyManip;
18260 +
18261 +    CcRootReleaseLock(p_FmPcdCcTree);
18262 +
18263 +    return E_OK;
18264 +}
18265 +
18266 +t_Error FmPcdCcTreeAddCPR(t_Handle h_FmPcd, t_Handle h_FmTree,
18267 +                          t_Handle h_NetEnv, t_Handle h_ReassemblyManip,
18268 +                          bool createSchemes)
18269 +{
18270 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
18271 +    t_FmPcdCcNextEngineParams nextEngineParams;
18272 +    t_NetEnvParams netEnvParams;
18273 +    t_Handle h_Ad;
18274 +    uint8_t groupId;
18275 +    t_Error err;
18276 +
18277 +    ASSERT_COND(p_FmPcdCcTree);
18278 +
18279 +    /* this routine must be protected by the calling routine! */
18280 +    memset(&nextEngineParams, 0, sizeof(t_FmPcdCcNextEngineParams));
18281 +    memset(&netEnvParams, 0, sizeof(t_NetEnvParams));
18282 +
18283 +    h_Ad = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
18284 +
18285 +    if (p_FmPcdCcTree->numOfEntries > (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1))
18286 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("need one free entries for CPR"));
18287 +
18288 +    nextEngineParams.nextEngine = e_FM_PCD_DONE;
18289 +    nextEngineParams.h_Manip = h_ReassemblyManip;
18290 +
18291 +    /* Lock tree */
18292 +    err = CcRootTryLock(p_FmPcdCcTree);
18293 +    if (err)
18294 +        return ERROR_CODE(E_BUSY);
18295 +
18296 +    if (p_FmPcdCcTree->h_CapwapReassemblyManip == h_ReassemblyManip)
18297 +    {
18298 +        CcRootReleaseLock(p_FmPcdCcTree);
18299 +        return E_OK;
18300 +    }
18301 +
18302 +    if ((p_FmPcdCcTree->h_CapwapReassemblyManip)
18303 +            && (p_FmPcdCcTree->h_CapwapReassemblyManip != h_ReassemblyManip))
18304 +    {
18305 +        CcRootReleaseLock(p_FmPcdCcTree);
18306 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
18307 +                     ("This tree was previously updated with different CPR"));
18308 +    }
18309 +
18310 +    groupId = p_FmPcdCcTree->numOfGrps++;
18311 +    p_FmPcdCcTree->fmPcdGroupParam[groupId].baseGroupEntry =
18312 +            (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1);
18313 +
18314 +    if (createSchemes)
18315 +    {
18316 +        err = FmPcdManipBuildCapwapReassmScheme(h_FmPcd, h_NetEnv,
18317 +                                                p_FmPcdCcTree,
18318 +                                                h_ReassemblyManip, groupId);
18319 +        if (err)
18320 +        {
18321 +            p_FmPcdCcTree->numOfGrps--;
18322 +            CcRootReleaseLock(p_FmPcdCcTree);
18323 +            RETURN_ERROR(MAJOR, err, NO_MSG);
18324 +        }
18325 +    }
18326 +
18327 +    NextStepAd(
18328 +            PTR_MOVE(h_Ad, (FM_PCD_MAX_NUM_OF_CC_GROUPS-1) * FM_PCD_CC_AD_ENTRY_SIZE),
18329 +            NULL, &nextEngineParams, h_FmPcd);
18330 +
18331 +    p_FmPcdCcTree->h_CapwapReassemblyManip = h_ReassemblyManip;
18332 +
18333 +    CcRootReleaseLock(p_FmPcdCcTree);
18334 +
18335 +    return E_OK;
18336 +}
18337 +
18338 +t_Handle FmPcdCcTreeGetSavedManipParams(t_Handle h_FmTree)
18339 +{
18340 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
18341 +
18342 +    ASSERT_COND(p_FmPcdCcTree);
18343 +
18344 +    return p_FmPcdCcTree->h_FmPcdCcSavedManipParams;
18345 +}
18346 +
18347 +void FmPcdCcTreeSetSavedManipParams(t_Handle h_FmTree,
18348 +                                    t_Handle h_SavedManipParams)
18349 +{
18350 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
18351 +
18352 +    ASSERT_COND(p_FmPcdCcTree);
18353 +
18354 +    p_FmPcdCcTree->h_FmPcdCcSavedManipParams = h_SavedManipParams;
18355 +}
18356 +
18357 +uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode)
18358 +{
18359 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
18360 +
18361 +    ASSERT_COND(p_CcNode);
18362 +
18363 +    return p_CcNode->parseCode;
18364 +}
18365 +
18366 +uint8_t FmPcdCcGetOffset(t_Handle h_CcNode)
18367 +{
18368 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
18369 +
18370 +    ASSERT_COND(p_CcNode);
18371 +
18372 +    return p_CcNode->offset;
18373 +}
18374 +
18375 +uint16_t FmPcdCcGetNumOfKeys(t_Handle h_CcNode)
18376 +{
18377 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
18378 +
18379 +    ASSERT_COND(p_CcNode);
18380 +
18381 +    return p_CcNode->numOfKeys;
18382 +}
18383 +
18384 +t_Error FmPcdCcModifyNextEngineParamTree(
18385 +        t_Handle h_FmPcd, t_Handle h_FmPcdCcTree, uint8_t grpId, uint8_t index,
18386 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
18387 +{
18388 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
18389 +    t_FmPcd *p_FmPcd;
18390 +    t_List h_OldPointersLst, h_NewPointersLst;
18391 +    uint16_t keyIndex;
18392 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
18393 +    t_Error err = E_OK;
18394 +
18395 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
18396 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
18397 +    SANITY_CHECK_RETURN_ERROR((grpId <= 7), E_INVALID_VALUE);
18398 +
18399 +    if (grpId >= p_FmPcdCcTree->numOfGrps)
18400 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE,
18401 +                     ("grpId you asked > numOfGroup of relevant tree"));
18402 +
18403 +    if (index >= p_FmPcdCcTree->fmPcdGroupParam[grpId].numOfEntriesInGroup)
18404 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("index > numOfEntriesInGroup"));
18405 +
18406 +    p_FmPcd = (t_FmPcd *)h_FmPcd;
18407 +
18408 +    INIT_LIST(&h_OldPointersLst);
18409 +    INIT_LIST(&h_NewPointersLst);
18410 +
18411 +    keyIndex = (uint16_t)(p_FmPcdCcTree->fmPcdGroupParam[grpId].baseGroupEntry
18412 +            + index);
18413 +
18414 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_FmPcdCcTree, keyIndex,
18415 +                                             e_MODIFY_STATE_CHANGE, FALSE,
18416 +                                             FALSE, TRUE);
18417 +    if (!p_ModifyKeyParams)
18418 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
18419 +
18420 +    p_ModifyKeyParams->tree = TRUE;
18421 +
18422 +    if (p_FmPcd->p_CcShadow
18423 +            && !TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
18424 +    {
18425 +        XX_Free(p_ModifyKeyParams);
18426 +        return ERROR_CODE(E_BUSY);
18427 +    }
18428 +
18429 +    err = BuildNewNodeModifyNextEngine(p_FmPcd, p_FmPcdCcTree, keyIndex,
18430 +                                       p_FmPcdCcNextEngineParams,
18431 +                                       &h_OldPointersLst, &h_NewPointersLst,
18432 +                                       p_ModifyKeyParams);
18433 +    if (err)
18434 +    {
18435 +        XX_Free(p_ModifyKeyParams);
18436 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18437 +    }
18438 +
18439 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
18440 +                          p_ModifyKeyParams, FALSE);
18441 +
18442 +    if (p_FmPcd->p_CcShadow)
18443 +        RELEASE_LOCK(p_FmPcd->shadowLock);
18444 +
18445 +       ReleaseLst(&h_OldPointersLst);
18446 +       ReleaseLst(&h_NewPointersLst);
18447 +
18448 +    return err;
18449 +
18450 +}
18451 +
18452 +t_Error FmPcdCcRemoveKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
18453 +                         uint16_t keyIndex)
18454 +{
18455 +
18456 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
18457 +    t_FmPcd *p_FmPcd;
18458 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
18459 +    t_List h_OldPointersLst, h_NewPointersLst;
18460 +    bool useShadowStructs = FALSE;
18461 +    t_Error err = E_OK;
18462 +
18463 +    if (keyIndex >= p_CcNode->numOfKeys)
18464 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
18465 +                     ("impossible to remove key when numOfKeys <= keyIndex"));
18466 +
18467 +    if (p_CcNode->h_FmPcd != h_FmPcd)
18468 +        RETURN_ERROR(
18469 +                MAJOR,
18470 +                E_INVALID_VALUE,
18471 +                ("handler to FmPcd is different from the handle provided at node initialization time"));
18472 +
18473 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
18474 +
18475 +    INIT_LIST(&h_OldPointersLst);
18476 +    INIT_LIST(&h_NewPointersLst);
18477 +
18478 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
18479 +                                             e_MODIFY_STATE_REMOVE, TRUE, TRUE,
18480 +                                             FALSE);
18481 +    if (!p_ModifyKeyParams)
18482 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
18483 +
18484 +    if (p_CcNode->maxNumOfKeys)
18485 +    {
18486 +        if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
18487 +        {
18488 +            XX_Free(p_ModifyKeyParams);
18489 +            return ERROR_CODE(E_BUSY);
18490 +        }
18491 +
18492 +        useShadowStructs = TRUE;
18493 +    }
18494 +
18495 +    err = BuildNewNodeRemoveKey(p_CcNode, keyIndex, p_ModifyKeyParams);
18496 +    if (err)
18497 +    {
18498 +        XX_Free(p_ModifyKeyParams);
18499 +        if (p_CcNode->maxNumOfKeys)
18500 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18501 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18502 +    }
18503 +
18504 +    err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
18505 +                                           &h_OldPointersLst,
18506 +                                           &h_NewPointersLst);
18507 +    if (err)
18508 +    {
18509 +        ReleaseNewNodeCommonPart(p_ModifyKeyParams);
18510 +        XX_Free(p_ModifyKeyParams);
18511 +        if (p_CcNode->maxNumOfKeys)
18512 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18513 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18514 +    }
18515 +
18516 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
18517 +                          p_ModifyKeyParams, useShadowStructs);
18518 +
18519 +    if (p_CcNode->maxNumOfKeys)
18520 +        RELEASE_LOCK(p_FmPcd->shadowLock);
18521 +
18522 +       ReleaseLst(&h_OldPointersLst);
18523 +       ReleaseLst(&h_NewPointersLst);
18524 +
18525 +    return err;
18526 +}
18527 +
18528 +t_Error FmPcdCcModifyKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
18529 +                         uint16_t keyIndex, uint8_t keySize, uint8_t *p_Key,
18530 +                         uint8_t *p_Mask)
18531 +{
18532 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
18533 +    t_FmPcd *p_FmPcd;
18534 +    t_List h_OldPointersLst, h_NewPointersLst;
18535 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
18536 +    uint16_t tmpKeyIndex;
18537 +    bool useShadowStructs = FALSE;
18538 +    t_Error err = E_OK;
18539 +
18540 +    if (keyIndex >= p_CcNode->numOfKeys)
18541 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
18542 +                     ("keyIndex > previously cleared last index + 1"));
18543 +
18544 +    if (keySize != p_CcNode->userSizeOfExtraction)
18545 +        RETURN_ERROR(
18546 +                MAJOR,
18547 +                E_INVALID_VALUE,
18548 +                ("size for ModifyKey has to be the same as defined in SetNode"));
18549 +
18550 +    if (p_CcNode->h_FmPcd != h_FmPcd)
18551 +        RETURN_ERROR(
18552 +                MAJOR,
18553 +                E_INVALID_VALUE,
18554 +                ("handler to FmPcd is different from the handle provided at node initialization time"));
18555 +
18556 +    err = FindKeyIndex(h_FmPcdCcNode, keySize, p_Key, p_Mask, &tmpKeyIndex);
18557 +    if (GET_ERROR_TYPE(err) != E_NOT_FOUND)
18558 +        RETURN_ERROR(
18559 +                MINOR,
18560 +                E_ALREADY_EXISTS,
18561 +                ("The received key and mask pair was already found in the match table of the provided node"));
18562 +
18563 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
18564 +
18565 +    INIT_LIST(&h_OldPointersLst);
18566 +    INIT_LIST(&h_NewPointersLst);
18567 +
18568 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
18569 +                                             e_MODIFY_STATE_CHANGE, TRUE, TRUE,
18570 +                                             FALSE);
18571 +    if (!p_ModifyKeyParams)
18572 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
18573 +
18574 +    if (p_CcNode->maxNumOfKeys)
18575 +    {
18576 +        if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
18577 +        {
18578 +            XX_Free(p_ModifyKeyParams);
18579 +            return ERROR_CODE(E_BUSY);
18580 +        }
18581 +
18582 +        useShadowStructs = TRUE;
18583 +    }
18584 +
18585 +    err = BuildNewNodeModifyKey(p_CcNode, keyIndex, p_Key, p_Mask,
18586 +                                p_ModifyKeyParams);
18587 +    if (err)
18588 +    {
18589 +        XX_Free(p_ModifyKeyParams);
18590 +        if (p_CcNode->maxNumOfKeys)
18591 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18592 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18593 +    }
18594 +
18595 +    err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
18596 +                                           &h_OldPointersLst,
18597 +                                           &h_NewPointersLst);
18598 +    if (err)
18599 +    {
18600 +        ReleaseNewNodeCommonPart(p_ModifyKeyParams);
18601 +        XX_Free(p_ModifyKeyParams);
18602 +        if (p_CcNode->maxNumOfKeys)
18603 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18604 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18605 +    }
18606 +
18607 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
18608 +                          p_ModifyKeyParams, useShadowStructs);
18609 +
18610 +    if (p_CcNode->maxNumOfKeys)
18611 +        RELEASE_LOCK(p_FmPcd->shadowLock);
18612 +
18613 +       ReleaseLst(&h_OldPointersLst);
18614 +       ReleaseLst(&h_NewPointersLst);
18615 +
18616 +    return err;
18617 +}
18618 +
18619 +t_Error FmPcdCcModifyMissNextEngineParamNode(
18620 +        t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
18621 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
18622 +{
18623 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
18624 +    t_FmPcd *p_FmPcd;
18625 +    t_List h_OldPointersLst, h_NewPointersLst;
18626 +    uint16_t keyIndex;
18627 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
18628 +    t_Error err = E_OK;
18629 +
18630 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_VALUE);
18631 +
18632 +    keyIndex = p_CcNode->numOfKeys;
18633 +
18634 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
18635 +
18636 +    INIT_LIST(&h_OldPointersLst);
18637 +    INIT_LIST(&h_NewPointersLst);
18638 +
18639 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
18640 +                                             e_MODIFY_STATE_CHANGE, FALSE, TRUE,
18641 +                                             FALSE);
18642 +    if (!p_ModifyKeyParams)
18643 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
18644 +
18645 +    if (p_CcNode->maxNumOfKeys
18646 +            && !TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
18647 +    {
18648 +        XX_Free(p_ModifyKeyParams);
18649 +        return ERROR_CODE(E_BUSY);
18650 +    }
18651 +
18652 +    err = BuildNewNodeModifyNextEngine(h_FmPcd, p_CcNode, keyIndex,
18653 +                                       p_FmPcdCcNextEngineParams,
18654 +                                       &h_OldPointersLst, &h_NewPointersLst,
18655 +                                       p_ModifyKeyParams);
18656 +    if (err)
18657 +    {
18658 +        XX_Free(p_ModifyKeyParams);
18659 +        if (p_CcNode->maxNumOfKeys)
18660 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18661 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18662 +    }
18663 +
18664 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
18665 +                          p_ModifyKeyParams, FALSE);
18666 +
18667 +    if (p_CcNode->maxNumOfKeys)
18668 +        RELEASE_LOCK(p_FmPcd->shadowLock);
18669 +
18670 +       ReleaseLst(&h_OldPointersLst);
18671 +       ReleaseLst(&h_NewPointersLst);
18672 +
18673 +    return err;
18674 +}
18675 +
18676 +t_Error FmPcdCcAddKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
18677 +                      uint16_t keyIndex, uint8_t keySize,
18678 +                      t_FmPcdCcKeyParams *p_FmPcdCcKeyParams)
18679 +{
18680 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
18681 +    t_FmPcd *p_FmPcd;
18682 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
18683 +    t_List h_OldPointersLst, h_NewPointersLst;
18684 +    bool useShadowStructs = FALSE;
18685 +    uint16_t tmpKeyIndex;
18686 +    t_Error err = E_OK;
18687 +
18688 +    if (keyIndex > p_CcNode->numOfKeys)
18689 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
18690 +                     ("keyIndex > previously cleared last index + 1"));
18691 +
18692 +    if (keySize != p_CcNode->userSizeOfExtraction)
18693 +        RETURN_ERROR(
18694 +                MAJOR,
18695 +                E_INVALID_VALUE,
18696 +                ("keySize has to be defined as it was defined in initialization step"));
18697 +
18698 +    if (p_CcNode->h_FmPcd != h_FmPcd)
18699 +        RETURN_ERROR(
18700 +                MAJOR,
18701 +                E_INVALID_VALUE,
18702 +                ("handler to FmPcd is different from the handle provided at node initialization time"));
18703 +
18704 +    if (p_CcNode->maxNumOfKeys)
18705 +    {
18706 +        if (p_CcNode->numOfKeys == p_CcNode->maxNumOfKeys)
18707 +            RETURN_ERROR(
18708 +                    MAJOR,
18709 +                    E_FULL,
18710 +                    ("number of keys exceeds the maximal number of keys provided at node initialization time"));
18711 +    }
18712 +    else
18713 +        if (p_CcNode->numOfKeys == FM_PCD_MAX_NUM_OF_KEYS)
18714 +            RETURN_ERROR(
18715 +                    MAJOR,
18716 +                    E_INVALID_VALUE,
18717 +                    ("number of keys can not be larger than %d", FM_PCD_MAX_NUM_OF_KEYS));
18718 +
18719 +    err = FindKeyIndex(h_FmPcdCcNode, keySize, p_FmPcdCcKeyParams->p_Key,
18720 +                       p_FmPcdCcKeyParams->p_Mask, &tmpKeyIndex);
18721 +    if (GET_ERROR_TYPE(err) != E_NOT_FOUND)
18722 +        RETURN_ERROR(
18723 +                MAJOR,
18724 +                E_ALREADY_EXISTS,
18725 +                ("The received key and mask pair was already found in the match table of the provided node"));
18726 +
18727 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
18728 +
18729 +    INIT_LIST(&h_OldPointersLst);
18730 +    INIT_LIST(&h_NewPointersLst);
18731 +
18732 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
18733 +                                             e_MODIFY_STATE_ADD, TRUE, TRUE,
18734 +                                             FALSE);
18735 +    if (!p_ModifyKeyParams)
18736 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
18737 +
18738 +    if (p_CcNode->maxNumOfKeys)
18739 +    {
18740 +        if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
18741 +        {
18742 +            XX_Free(p_ModifyKeyParams);
18743 +            return ERROR_CODE(E_BUSY);
18744 +        }
18745 +
18746 +        useShadowStructs = TRUE;
18747 +    }
18748 +
18749 +    err = BuildNewNodeAddOrMdfyKeyAndNextEngine(h_FmPcd, p_CcNode, keyIndex,
18750 +                                                p_FmPcdCcKeyParams,
18751 +                                                p_ModifyKeyParams, TRUE);
18752 +    if (err)
18753 +    {
18754 +        ReleaseNewNodeCommonPart(p_ModifyKeyParams);
18755 +        XX_Free(p_ModifyKeyParams);
18756 +        if (p_CcNode->maxNumOfKeys)
18757 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18758 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18759 +    }
18760 +
18761 +    err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
18762 +                                           &h_OldPointersLst,
18763 +                                           &h_NewPointersLst);
18764 +    if (err)
18765 +    {
18766 +        ReleaseNewNodeCommonPart(p_ModifyKeyParams);
18767 +        XX_Free(p_ModifyKeyParams);
18768 +        if (p_CcNode->maxNumOfKeys)
18769 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18770 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18771 +    }
18772 +
18773 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
18774 +                          p_ModifyKeyParams, useShadowStructs);
18775 +    if (p_CcNode->maxNumOfKeys)
18776 +        RELEASE_LOCK(p_FmPcd->shadowLock);
18777 +
18778 +       ReleaseLst(&h_OldPointersLst);
18779 +       ReleaseLst(&h_NewPointersLst);
18780 +
18781 +    return err;
18782 +}
18783 +
18784 +t_Error FmPcdCcModifyKeyAndNextEngine(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
18785 +                                      uint16_t keyIndex, uint8_t keySize,
18786 +                                      t_FmPcdCcKeyParams *p_FmPcdCcKeyParams)
18787 +{
18788 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
18789 +    t_FmPcd *p_FmPcd;
18790 +    t_List h_OldPointersLst, h_NewPointersLst;
18791 +    t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
18792 +    uint16_t tmpKeyIndex;
18793 +    bool useShadowStructs = FALSE;
18794 +    t_Error err = E_OK;
18795 +
18796 +    if (keyIndex > p_CcNode->numOfKeys)
18797 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
18798 +                     ("keyIndex > previously cleared last index + 1"));
18799 +
18800 +    if (keySize != p_CcNode->userSizeOfExtraction)
18801 +        RETURN_ERROR(
18802 +                MAJOR,
18803 +                E_INVALID_VALUE,
18804 +                ("keySize has to be defined as it was defined in initialization step"));
18805 +
18806 +    if (p_CcNode->h_FmPcd != h_FmPcd)
18807 +        RETURN_ERROR(
18808 +                MAJOR,
18809 +                E_INVALID_VALUE,
18810 +                ("handler to FmPcd is different from the handle provided at node initialization time"));
18811 +
18812 +    err = FindKeyIndex(h_FmPcdCcNode, keySize, p_FmPcdCcKeyParams->p_Key,
18813 +                       p_FmPcdCcKeyParams->p_Mask, &tmpKeyIndex);
18814 +    if (GET_ERROR_TYPE(err) != E_NOT_FOUND)
18815 +        RETURN_ERROR(
18816 +                MINOR,
18817 +                E_ALREADY_EXISTS,
18818 +                ("The received key and mask pair was already found in the match table of the provided node"));
18819 +
18820 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
18821 +
18822 +    INIT_LIST(&h_OldPointersLst);
18823 +    INIT_LIST(&h_NewPointersLst);
18824 +
18825 +    p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
18826 +                                             e_MODIFY_STATE_CHANGE, TRUE, TRUE,
18827 +                                             FALSE);
18828 +    if (!p_ModifyKeyParams)
18829 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
18830 +
18831 +    if (p_CcNode->maxNumOfKeys)
18832 +    {
18833 +        if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
18834 +        {
18835 +            XX_Free(p_ModifyKeyParams);
18836 +            return ERROR_CODE(E_BUSY);
18837 +        }
18838 +
18839 +        useShadowStructs = TRUE;
18840 +    }
18841 +
18842 +    err = BuildNewNodeAddOrMdfyKeyAndNextEngine(h_FmPcd, p_CcNode, keyIndex,
18843 +                                                p_FmPcdCcKeyParams,
18844 +                                                p_ModifyKeyParams, FALSE);
18845 +    if (err)
18846 +    {
18847 +        ReleaseNewNodeCommonPart(p_ModifyKeyParams);
18848 +        XX_Free(p_ModifyKeyParams);
18849 +        if (p_CcNode->maxNumOfKeys)
18850 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18851 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18852 +    }
18853 +
18854 +    err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
18855 +                                           &h_OldPointersLst,
18856 +                                           &h_NewPointersLst);
18857 +    if (err)
18858 +    {
18859 +        ReleaseNewNodeCommonPart(p_ModifyKeyParams);
18860 +        XX_Free(p_ModifyKeyParams);
18861 +        if (p_CcNode->maxNumOfKeys)
18862 +            RELEASE_LOCK(p_FmPcd->shadowLock);
18863 +        RETURN_ERROR(MAJOR, err, NO_MSG);
18864 +    }
18865 +
18866 +    err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
18867 +                          p_ModifyKeyParams, useShadowStructs);
18868 +
18869 +    if (p_CcNode->maxNumOfKeys)
18870 +        RELEASE_LOCK(p_FmPcd->shadowLock);
18871 +
18872 +       ReleaseLst(&h_OldPointersLst);
18873 +       ReleaseLst(&h_NewPointersLst);
18874 +
18875 +    return err;
18876 +}
18877 +
18878 +uint32_t FmPcdCcGetNodeAddrOffsetFromNodeInfo(t_Handle h_FmPcd,
18879 +                                              t_Handle h_Pointer)
18880 +{
18881 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
18882 +    t_CcNodeInformation *p_CcNodeInfo;
18883 +
18884 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE,
18885 +                              (uint32_t)ILLEGAL_BASE);
18886 +
18887 +    p_CcNodeInfo = CC_NODE_F_OBJECT(h_Pointer);
18888 +
18889 +    return (uint32_t)(XX_VirtToPhys(p_CcNodeInfo->h_CcNode)
18890 +            - p_FmPcd->physicalMuramBase);
18891 +}
18892 +
18893 +t_Error FmPcdCcGetGrpParams(t_Handle h_FmPcdCcTree, uint8_t grpId,
18894 +                            uint32_t *p_GrpBits, uint8_t *p_GrpBase)
18895 +{
18896 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
18897 +
18898 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
18899 +
18900 +    if (grpId >= p_FmPcdCcTree->numOfGrps)
18901 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE,
18902 +                     ("grpId you asked > numOfGroup of relevant tree"));
18903 +
18904 +    *p_GrpBits = p_FmPcdCcTree->fmPcdGroupParam[grpId].totalBitsMask;
18905 +    *p_GrpBase = p_FmPcdCcTree->fmPcdGroupParam[grpId].baseGroupEntry;
18906 +
18907 +    return E_OK;
18908 +}
18909 +
18910 +t_Error FmPcdCcBindTree(t_Handle h_FmPcd, t_Handle h_PcdParams,
18911 +                        t_Handle h_FmPcdCcTree, uint32_t *p_Offset,
18912 +                        t_Handle h_FmPort)
18913 +{
18914 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
18915 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
18916 +    t_Error err = E_OK;
18917 +
18918 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
18919 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
18920 +
18921 +    /* this routine must be protected by the calling routine by locking all PCD modules! */
18922 +
18923 +    err = CcUpdateParams(h_FmPcd, h_PcdParams, h_FmPort, h_FmPcdCcTree, TRUE);
18924 +
18925 +    if (err == E_OK)
18926 +        UpdateCcRootOwner(p_FmPcdCcTree, TRUE);
18927 +
18928 +    *p_Offset = (uint32_t)(XX_VirtToPhys(
18929 +            UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr))
18930 +            - p_FmPcd->physicalMuramBase);
18931 +
18932 +    return err;
18933 +}
18934 +
18935 +t_Error FmPcdCcUnbindTree(t_Handle h_FmPcd, t_Handle h_FmPcdCcTree)
18936 +{
18937 +    t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
18938 +
18939 +    /* this routine must be protected by the calling routine by locking all PCD modules! */
18940 +
18941 +    UNUSED(h_FmPcd);
18942 +
18943 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
18944 +
18945 +    UpdateCcRootOwner(p_FmPcdCcTree, FALSE);
18946 +
18947 +    return E_OK;
18948 +}
18949 +
18950 +t_Error FmPcdCcNodeTreeTryLock(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
18951 +                               t_List *p_List)
18952 +{
18953 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
18954 +    t_List *p_Pos, *p_Tmp;
18955 +    t_CcNodeInformation *p_CcNodeInfo, nodeInfo;
18956 +    uint32_t intFlags;
18957 +    t_Error err = E_OK;
18958 +
18959 +    intFlags = FmPcdLock(h_FmPcd);
18960 +
18961 +    LIST_FOR_EACH(p_Pos, &p_CcNode->ccTreesLst)
18962 +    {
18963 +        p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
18964 +        ASSERT_COND(p_CcNodeInfo->h_CcNode);
18965 +
18966 +        err = CcRootTryLock(p_CcNodeInfo->h_CcNode);
18967 +
18968 +        if (err)
18969 +        {
18970 +            LIST_FOR_EACH(p_Tmp, &p_CcNode->ccTreesLst)
18971 +            {
18972 +                if (p_Tmp == p_Pos)
18973 +                    break;
18974 +
18975 +                CcRootReleaseLock(p_CcNodeInfo->h_CcNode);
18976 +            }
18977 +            break;
18978 +        }
18979 +
18980 +        memset(&nodeInfo, 0, sizeof(t_CcNodeInformation));
18981 +        nodeInfo.h_CcNode = p_CcNodeInfo->h_CcNode;
18982 +        EnqueueNodeInfoToRelevantLst(p_List, &nodeInfo, NULL);
18983 +    }
18984 +
18985 +    FmPcdUnlock(h_FmPcd, intFlags);
18986 +    CORE_MemoryBarrier();
18987 +
18988 +    return err;
18989 +}
18990 +
18991 +void FmPcdCcNodeTreeReleaseLock(t_Handle h_FmPcd, t_List *p_List)
18992 +{
18993 +    t_List *p_Pos;
18994 +    t_CcNodeInformation *p_CcNodeInfo;
18995 +    t_Handle h_FmPcdCcTree;
18996 +    uint32_t intFlags;
18997 +
18998 +    intFlags = FmPcdLock(h_FmPcd);
18999 +
19000 +    LIST_FOR_EACH(p_Pos, p_List)
19001 +    {
19002 +        p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
19003 +        h_FmPcdCcTree = p_CcNodeInfo->h_CcNode;
19004 +        CcRootReleaseLock(h_FmPcdCcTree);
19005 +    }
19006 +
19007 +    ReleaseLst(p_List);
19008 +
19009 +    FmPcdUnlock(h_FmPcd, intFlags);
19010 +    CORE_MemoryBarrier();
19011 +}
19012 +
19013 +t_Error FmPcdUpdateCcShadow(t_FmPcd *p_FmPcd, uint32_t size, uint32_t align)
19014 +{
19015 +    uint32_t intFlags;
19016 +    uint32_t newSize = 0, newAlign = 0;
19017 +    bool allocFail = FALSE;
19018 +
19019 +    ASSERT_COND(p_FmPcd);
19020 +
19021 +    if (!size)
19022 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("size must be larger then 0"));
19023 +
19024 +    if (!POWER_OF_2(align))
19025 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("alignment must be power of 2"));
19026 +
19027 +    newSize = p_FmPcd->ccShadowSize;
19028 +    newAlign = p_FmPcd->ccShadowAlign;
19029 +
19030 +    /* Check if current shadow is large enough to hold the requested size */
19031 +    if (size > p_FmPcd->ccShadowSize)
19032 +        newSize = size;
19033 +
19034 +    /* Check if current shadow matches the requested alignment */
19035 +    if (align > p_FmPcd->ccShadowAlign)
19036 +        newAlign = align;
19037 +
19038 +    /* If a bigger shadow size or bigger shadow alignment are required,
19039 +     a new shadow will be allocated */
19040 +    if ((newSize != p_FmPcd->ccShadowSize)
19041 +            || (newAlign != p_FmPcd->ccShadowAlign))
19042 +    {
19043 +        intFlags = FmPcdLock(p_FmPcd);
19044 +
19045 +        if (p_FmPcd->p_CcShadow)
19046 +        {
19047 +            FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_FmPcd), p_FmPcd->p_CcShadow);
19048 +            p_FmPcd->ccShadowSize = 0;
19049 +            p_FmPcd->ccShadowAlign = 0;
19050 +        }
19051 +
19052 +        p_FmPcd->p_CcShadow = FM_MURAM_AllocMem(FmPcdGetMuramHandle(p_FmPcd),
19053 +                                                newSize, newAlign);
19054 +        if (!p_FmPcd->p_CcShadow)
19055 +        {
19056 +            allocFail = TRUE;
19057 +
19058 +            /* If new shadow size allocation failed,
19059 +             re-allocate with previous parameters */
19060 +            p_FmPcd->p_CcShadow = FM_MURAM_AllocMem(
19061 +                    FmPcdGetMuramHandle(p_FmPcd), p_FmPcd->ccShadowSize,
19062 +                    p_FmPcd->ccShadowAlign);
19063 +        }
19064 +
19065 +        FmPcdUnlock(p_FmPcd, intFlags);
19066 +
19067 +        if (allocFail)
19068 +            RETURN_ERROR(MAJOR, E_NO_MEMORY,
19069 +                         ("MURAM allocation for CC Shadow memory"));
19070 +
19071 +        p_FmPcd->ccShadowSize = newSize;
19072 +        p_FmPcd->ccShadowAlign = newAlign;
19073 +    }
19074 +
19075 +    return E_OK;
19076 +}
19077 +
19078 +#if (DPAA_VERSION >= 11)
19079 +void FmPcdCcGetAdTablesThatPointOnReplicGroup(t_Handle h_Node,
19080 +                                              t_Handle h_ReplicGroup,
19081 +                                              t_List *p_AdTables,
19082 +                                              uint32_t *p_NumOfAdTables)
19083 +{
19084 +    t_FmPcdCcNode *p_CurrentNode = (t_FmPcdCcNode *)h_Node;
19085 +    int i = 0;
19086 +    void * p_AdTable;
19087 +    t_CcNodeInformation ccNodeInfo;
19088 +
19089 +    ASSERT_COND(h_Node);
19090 +    *p_NumOfAdTables = 0;
19091 +
19092 +    /* search in the current node which exact index points on this current replicator group for getting AD */
19093 +    for (i = 0; i < p_CurrentNode->numOfKeys + 1; i++)
19094 +    {
19095 +        if ((p_CurrentNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19096 +                == e_FM_PCD_FR)
19097 +                && ((p_CurrentNode->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic
19098 +                        == (t_Handle)h_ReplicGroup)))
19099 +        {
19100 +            /* save the current ad table in the list */
19101 +            /* this entry uses the input replicator group */
19102 +            p_AdTable =
19103 +                    PTR_MOVE(p_CurrentNode->h_AdTable, i*FM_PCD_CC_AD_ENTRY_SIZE);
19104 +            memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
19105 +            ccNodeInfo.h_CcNode = p_AdTable;
19106 +            EnqueueNodeInfoToRelevantLst(p_AdTables, &ccNodeInfo, NULL);
19107 +            (*p_NumOfAdTables)++;
19108 +        }
19109 +    }
19110 +
19111 +    ASSERT_COND(i != p_CurrentNode->numOfKeys);
19112 +}
19113 +#endif /* (DPAA_VERSION >= 11) */
19114 +/*********************** End of inter-module routines ************************/
19115 +
19116 +/****************************************/
19117 +/*       API Init unit functions        */
19118 +/****************************************/
19119 +
19120 +t_Handle FM_PCD_CcRootBuild(t_Handle h_FmPcd,
19121 +                            t_FmPcdCcTreeParams *p_PcdGroupsParam)
19122 +{
19123 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
19124 +    t_Error err = E_OK;
19125 +    int i = 0, j = 0, k = 0;
19126 +    t_FmPcdCcTree *p_FmPcdCcTree;
19127 +    uint8_t numOfEntries;
19128 +    t_Handle p_CcTreeTmp;
19129 +    t_FmPcdCcGrpParams *p_FmPcdCcGroupParams;
19130 +    t_FmPcdCcKeyAndNextEngineParams *p_Params, *p_KeyAndNextEngineParams;
19131 +    t_NetEnvParams netEnvParams;
19132 +    uint8_t lastOne = 0;
19133 +    uint32_t requiredAction = 0;
19134 +    t_FmPcdCcNode *p_FmPcdCcNextNode;
19135 +    t_CcNodeInformation ccNodeInfo, *p_CcInformation;
19136 +
19137 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
19138 +    SANITY_CHECK_RETURN_VALUE(p_PcdGroupsParam, E_INVALID_HANDLE, NULL);
19139 +
19140 +    if (p_PcdGroupsParam->numOfGrps > FM_PCD_MAX_NUM_OF_CC_GROUPS)
19141 +    {
19142 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("numOfGrps should not exceed %d", FM_PCD_MAX_NUM_OF_CC_GROUPS));
19143 +        return NULL;
19144 +    }
19145 +
19146 +    p_FmPcdCcTree = (t_FmPcdCcTree*)XX_Malloc(sizeof(t_FmPcdCcTree));
19147 +    if (!p_FmPcdCcTree)
19148 +    {
19149 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("PCD tree structure"));
19150 +        return NULL;
19151 +    }
19152 +    memset(p_FmPcdCcTree, 0, sizeof(t_FmPcdCcTree));
19153 +    p_FmPcdCcTree->h_FmPcd = h_FmPcd;
19154 +
19155 +    p_Params = (t_FmPcdCcKeyAndNextEngineParams*)XX_Malloc(
19156 +            FM_PCD_MAX_NUM_OF_CC_GROUPS
19157 +                    * sizeof(t_FmPcdCcKeyAndNextEngineParams));
19158 +    memset(p_Params,
19159 +           0,
19160 +           FM_PCD_MAX_NUM_OF_CC_GROUPS
19161 +                   * sizeof(t_FmPcdCcKeyAndNextEngineParams));
19162 +
19163 +    INIT_LIST(&p_FmPcdCcTree->fmPortsLst);
19164 +
19165 +#ifdef FM_CAPWAP_SUPPORT
19166 +    if ((p_PcdGroupsParam->numOfGrps == 1) &&
19167 +            (p_PcdGroupsParam->ccGrpParams[0].numOfDistinctionUnits == 0) &&
19168 +            (p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].nextEngine == e_FM_PCD_CC) &&
19169 +            p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].params.ccParams.h_CcNode &&
19170 +            IsCapwapApplSpecific(p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].params.ccParams.h_CcNode))
19171 +    {
19172 +        p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].h_Manip = FmPcdManipApplSpecificBuild();
19173 +        if (!p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].h_Manip)
19174 +        {
19175 +            DeleteTree(p_FmPcdCcTree,p_FmPcd);
19176 +            XX_Free(p_Params);
19177 +            REPORT_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
19178 +            return NULL;
19179 +        }
19180 +    }
19181 +#endif /* FM_CAPWAP_SUPPORT */
19182 +
19183 +    numOfEntries = 0;
19184 +    p_FmPcdCcTree->netEnvId = FmPcdGetNetEnvId(p_PcdGroupsParam->h_NetEnv);
19185 +
19186 +    for (i = 0; i < p_PcdGroupsParam->numOfGrps; i++)
19187 +    {
19188 +        p_FmPcdCcGroupParams = &p_PcdGroupsParam->ccGrpParams[i];
19189 +
19190 +        if (p_FmPcdCcGroupParams->numOfDistinctionUnits
19191 +                > FM_PCD_MAX_NUM_OF_CC_UNITS)
19192 +        {
19193 +            DeleteTree(p_FmPcdCcTree, p_FmPcd);
19194 +            XX_Free(p_Params);
19195 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE,
19196 +                    ("numOfDistinctionUnits (group %d) should not exceed %d", i, FM_PCD_MAX_NUM_OF_CC_UNITS));
19197 +            return NULL;
19198 +        }
19199 +
19200 +        p_FmPcdCcTree->fmPcdGroupParam[i].baseGroupEntry = numOfEntries;
19201 +        p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup = (uint8_t)(0x01
19202 +                << p_FmPcdCcGroupParams->numOfDistinctionUnits);
19203 +        numOfEntries += p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup;
19204 +        if (numOfEntries > FM_PCD_MAX_NUM_OF_CC_GROUPS)
19205 +        {
19206 +            DeleteTree(p_FmPcdCcTree, p_FmPcd);
19207 +            XX_Free(p_Params);
19208 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("numOfEntries can not be larger than %d", FM_PCD_MAX_NUM_OF_CC_GROUPS));
19209 +            return NULL;
19210 +        }
19211 +
19212 +        if (lastOne)
19213 +        {
19214 +            if (p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup > lastOne)
19215 +            {
19216 +                DeleteTree(p_FmPcdCcTree, p_FmPcd);
19217 +                XX_Free(p_Params);
19218 +                REPORT_ERROR(MAJOR, E_CONFLICT, ("numOfEntries per group must be set in descending order"));
19219 +                return NULL;
19220 +            }
19221 +        }
19222 +
19223 +        lastOne = p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup;
19224 +
19225 +        netEnvParams.netEnvId = p_FmPcdCcTree->netEnvId;
19226 +        netEnvParams.numOfDistinctionUnits =
19227 +                p_FmPcdCcGroupParams->numOfDistinctionUnits;
19228 +
19229 +        memcpy(netEnvParams.unitIds, &p_FmPcdCcGroupParams->unitIds,
19230 +               (sizeof(uint8_t)) * p_FmPcdCcGroupParams->numOfDistinctionUnits);
19231 +
19232 +        err = PcdGetUnitsVector(p_FmPcd, &netEnvParams);
19233 +        if (err)
19234 +        {
19235 +            DeleteTree(p_FmPcdCcTree, p_FmPcd);
19236 +            XX_Free(p_Params);
19237 +            REPORT_ERROR(MAJOR, err, NO_MSG);
19238 +            return NULL;
19239 +        }
19240 +
19241 +        p_FmPcdCcTree->fmPcdGroupParam[i].totalBitsMask = netEnvParams.vector;
19242 +        for (j = 0; j < p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup;
19243 +                j++)
19244 +        {
19245 +            err = ValidateNextEngineParams(
19246 +                    h_FmPcd,
19247 +                    &p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j],
19248 +                    e_FM_PCD_CC_STATS_MODE_NONE);
19249 +            if (err)
19250 +            {
19251 +                DeleteTree(p_FmPcdCcTree, p_FmPcd);
19252 +                XX_Free(p_Params);
19253 +                REPORT_ERROR(MAJOR, err, (NO_MSG));
19254 +                return NULL;
19255 +            }
19256 +
19257 +            if (p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j].h_Manip)
19258 +            {
19259 +                err = FmPcdManipCheckParamsForCcNextEngine(
19260 +                        &p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j],
19261 +                        &requiredAction);
19262 +                if (err)
19263 +                {
19264 +                    DeleteTree(p_FmPcdCcTree, p_FmPcd);
19265 +                    XX_Free(p_Params);
19266 +                    REPORT_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
19267 +                    return NULL;
19268 +                }
19269 +            }
19270 +            p_KeyAndNextEngineParams = p_Params + k;
19271 +
19272 +            memcpy(&p_KeyAndNextEngineParams->nextEngineParams,
19273 +                   &p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j],
19274 +                   sizeof(t_FmPcdCcNextEngineParams));
19275 +
19276 +            if ((p_KeyAndNextEngineParams->nextEngineParams.nextEngine
19277 +                    == e_FM_PCD_CC)
19278 +                    && p_KeyAndNextEngineParams->nextEngineParams.h_Manip)
19279 +            {
19280 +                err =
19281 +                        AllocAndFillAdForContLookupManip(
19282 +                                p_KeyAndNextEngineParams->nextEngineParams.params.ccParams.h_CcNode);
19283 +                if (err)
19284 +                {
19285 +                    DeleteTree(p_FmPcdCcTree, p_FmPcd);
19286 +                    XX_Free(p_Params);
19287 +                    REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC Tree"));
19288 +                    return NULL;
19289 +                }
19290 +            }
19291 +
19292 +            requiredAction |= UPDATE_CC_WITH_TREE;
19293 +            p_KeyAndNextEngineParams->requiredAction = requiredAction;
19294 +
19295 +            k++;
19296 +        }
19297 +    }
19298 +
19299 +    p_FmPcdCcTree->numOfEntries = (uint8_t)k;
19300 +    p_FmPcdCcTree->numOfGrps = p_PcdGroupsParam->numOfGrps;
19301 +
19302 +    p_FmPcdCcTree->ccTreeBaseAddr =
19303 +            PTR_TO_UINT(FM_MURAM_AllocMem(FmPcdGetMuramHandle(h_FmPcd),
19304 +                            (uint32_t)( FM_PCD_MAX_NUM_OF_CC_GROUPS * FM_PCD_CC_AD_ENTRY_SIZE),
19305 +                            FM_PCD_CC_TREE_ADDR_ALIGN));
19306 +    if (!p_FmPcdCcTree->ccTreeBaseAddr)
19307 +    {
19308 +        DeleteTree(p_FmPcdCcTree, p_FmPcd);
19309 +        XX_Free(p_Params);
19310 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC Tree"));
19311 +        return NULL;
19312 +    }
19313 +    MemSet8(
19314 +            UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr), 0,
19315 +            (uint32_t)(FM_PCD_MAX_NUM_OF_CC_GROUPS * FM_PCD_CC_AD_ENTRY_SIZE));
19316 +
19317 +    p_CcTreeTmp = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
19318 +
19319 +    for (i = 0; i < numOfEntries; i++)
19320 +    {
19321 +        p_KeyAndNextEngineParams = p_Params + i;
19322 +
19323 +        NextStepAd(p_CcTreeTmp, NULL,
19324 +                   &p_KeyAndNextEngineParams->nextEngineParams, p_FmPcd);
19325 +
19326 +        p_CcTreeTmp = PTR_MOVE(p_CcTreeTmp, FM_PCD_CC_AD_ENTRY_SIZE);
19327 +
19328 +        memcpy(&p_FmPcdCcTree->keyAndNextEngineParams[i],
19329 +               p_KeyAndNextEngineParams,
19330 +               sizeof(t_FmPcdCcKeyAndNextEngineParams));
19331 +
19332 +        if (p_FmPcdCcTree->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19333 +                == e_FM_PCD_CC)
19334 +        {
19335 +            p_FmPcdCcNextNode =
19336 +                    (t_FmPcdCcNode*)p_FmPcdCcTree->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
19337 +            p_CcInformation = FindNodeInfoInReleventLst(
19338 +                    &p_FmPcdCcNextNode->ccTreeIdLst, (t_Handle)p_FmPcdCcTree,
19339 +                    p_FmPcdCcNextNode->h_Spinlock);
19340 +
19341 +            if (!p_CcInformation)
19342 +            {
19343 +                memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
19344 +                ccNodeInfo.h_CcNode = (t_Handle)p_FmPcdCcTree;
19345 +                ccNodeInfo.index = 1;
19346 +                EnqueueNodeInfoToRelevantLst(&p_FmPcdCcNextNode->ccTreeIdLst,
19347 +                                             &ccNodeInfo,
19348 +                                             p_FmPcdCcNextNode->h_Spinlock);
19349 +            }
19350 +            else
19351 +                p_CcInformation->index++;
19352 +        }
19353 +    }
19354 +
19355 +    FmPcdIncNetEnvOwners(h_FmPcd, p_FmPcdCcTree->netEnvId);
19356 +    p_CcTreeTmp = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
19357 +
19358 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19359 +    {
19360 +        FM_PCD_CcRootDelete(p_FmPcdCcTree);
19361 +        XX_Free(p_Params);
19362 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19363 +        return NULL;
19364 +    }
19365 +
19366 +    for (i = 0; i < numOfEntries; i++)
19367 +    {
19368 +        if (p_FmPcdCcTree->keyAndNextEngineParams[i].requiredAction)
19369 +        {
19370 +            err = SetRequiredAction(
19371 +                    h_FmPcd,
19372 +                    p_FmPcdCcTree->keyAndNextEngineParams[i].requiredAction,
19373 +                    &p_FmPcdCcTree->keyAndNextEngineParams[i], p_CcTreeTmp, 1,
19374 +                    p_FmPcdCcTree);
19375 +            if (err)
19376 +            {
19377 +                FmPcdLockUnlockAll(p_FmPcd);
19378 +                FM_PCD_CcRootDelete(p_FmPcdCcTree);
19379 +                XX_Free(p_Params);
19380 +                REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
19381 +                return NULL;
19382 +            }
19383 +            p_CcTreeTmp = PTR_MOVE(p_CcTreeTmp, FM_PCD_CC_AD_ENTRY_SIZE);
19384 +        }
19385 +    }
19386 +
19387 +    FmPcdLockUnlockAll(p_FmPcd);
19388 +    p_FmPcdCcTree->p_Lock = FmPcdAcquireLock(p_FmPcd);
19389 +    if (!p_FmPcdCcTree->p_Lock)
19390 +    {
19391 +        FM_PCD_CcRootDelete(p_FmPcdCcTree);
19392 +        XX_Free(p_Params);
19393 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM CC lock"));
19394 +        return NULL;
19395 +    }
19396 +
19397 +    XX_Free(p_Params);
19398 +
19399 +    return p_FmPcdCcTree;
19400 +}
19401 +
19402 +t_Error FM_PCD_CcRootDelete(t_Handle h_CcTree)
19403 +{
19404 +    t_FmPcd *p_FmPcd;
19405 +    t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_CcTree;
19406 +    int i = 0;
19407 +
19408 +    SANITY_CHECK_RETURN_ERROR(p_CcTree, E_INVALID_STATE);
19409 +    p_FmPcd = (t_FmPcd *)p_CcTree->h_FmPcd;
19410 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19411 +
19412 +    FmPcdDecNetEnvOwners(p_FmPcd, p_CcTree->netEnvId);
19413 +
19414 +    if (p_CcTree->owners)
19415 +        RETURN_ERROR(
19416 +                MAJOR,
19417 +                E_INVALID_SELECTION,
19418 +                ("the tree with this ID can not be removed because this tree is occupied, first - unbind this tree"));
19419 +
19420 +    /* Delete ip-reassembly schemes if exist */
19421 +    if (p_CcTree->h_IpReassemblyManip)
19422 +    {
19423 +        FmPcdManipDeleteIpReassmSchemes(p_CcTree->h_IpReassemblyManip);
19424 +        FmPcdManipUpdateOwner(p_CcTree->h_IpReassemblyManip, FALSE);
19425 +    }
19426 +
19427 +    /* Delete capwap-reassembly schemes if exist */
19428 +    if (p_CcTree->h_CapwapReassemblyManip)
19429 +    {
19430 +        FmPcdManipDeleteCapwapReassmSchemes(p_CcTree->h_CapwapReassemblyManip);
19431 +        FmPcdManipUpdateOwner(p_CcTree->h_CapwapReassemblyManip, FALSE);
19432 +    }
19433 +
19434 +    for (i = 0; i < p_CcTree->numOfEntries; i++)
19435 +    {
19436 +        if (p_CcTree->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19437 +                == e_FM_PCD_CC)
19438 +            UpdateNodeOwner(
19439 +                    p_CcTree->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode,
19440 +                    FALSE);
19441 +
19442 +        if (p_CcTree->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
19443 +            FmPcdManipUpdateOwner(
19444 +                    p_CcTree->keyAndNextEngineParams[i].nextEngineParams.h_Manip,
19445 +                    FALSE);
19446 +
19447 +#ifdef FM_CAPWAP_SUPPORT
19448 +        if ((p_CcTree->numOfGrps == 1) &&
19449 +                (p_CcTree->fmPcdGroupParam[0].numOfEntriesInGroup == 1) &&
19450 +                (p_CcTree->keyAndNextEngineParams[0].nextEngineParams.nextEngine == e_FM_PCD_CC) &&
19451 +                p_CcTree->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode &&
19452 +                IsCapwapApplSpecific(p_CcTree->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode))
19453 +        {
19454 +            if (FM_PCD_ManipNodeDelete(p_CcTree->keyAndNextEngineParams[0].nextEngineParams.h_Manip) != E_OK)
19455 +            return E_INVALID_STATE;
19456 +        }
19457 +#endif /* FM_CAPWAP_SUPPORT */
19458 +
19459 +#if (DPAA_VERSION >= 11)
19460 +        if ((p_CcTree->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19461 +                == e_FM_PCD_FR)
19462 +                && (p_CcTree->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic))
19463 +            FrmReplicGroupUpdateOwner(
19464 +                    p_CcTree->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic,
19465 +                    FALSE);
19466 +#endif /* (DPAA_VERSION >= 11) */
19467 +    }
19468 +
19469 +    if (p_CcTree->p_Lock)
19470 +        FmPcdReleaseLock(p_CcTree->h_FmPcd, p_CcTree->p_Lock);
19471 +
19472 +    DeleteTree(p_CcTree, p_FmPcd);
19473 +
19474 +    return E_OK;
19475 +}
19476 +
19477 +t_Error FM_PCD_CcRootModifyNextEngine(
19478 +        t_Handle h_CcTree, uint8_t grpId, uint8_t index,
19479 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
19480 +{
19481 +    t_FmPcd *p_FmPcd;
19482 +    t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_CcTree;
19483 +    t_Error err = E_OK;
19484 +
19485 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
19486 +    SANITY_CHECK_RETURN_ERROR(p_CcTree, E_INVALID_STATE);
19487 +    p_FmPcd = (t_FmPcd *)p_CcTree->h_FmPcd;
19488 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19489 +
19490 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19491 +    {
19492 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19493 +        return ERROR_CODE(E_BUSY);
19494 +    }
19495 +
19496 +    err = FmPcdCcModifyNextEngineParamTree(p_FmPcd, p_CcTree, grpId, index,
19497 +                                           p_FmPcdCcNextEngineParams);
19498 +    FmPcdLockUnlockAll(p_FmPcd);
19499 +
19500 +    if (err)
19501 +    {
19502 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19503 +    }
19504 +
19505 +    return E_OK;
19506 +}
19507 +
19508 +t_Handle FM_PCD_MatchTableSet(t_Handle h_FmPcd,
19509 +                              t_FmPcdCcNodeParams *p_CcNodeParam)
19510 +{
19511 +    t_FmPcdCcNode *p_CcNode;
19512 +    t_Error err;
19513 +
19514 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
19515 +    SANITY_CHECK_RETURN_VALUE(p_CcNodeParam, E_NULL_POINTER, NULL);
19516 +
19517 +    p_CcNode = (t_FmPcdCcNode*)XX_Malloc(sizeof(t_FmPcdCcNode));
19518 +    if (!p_CcNode)
19519 +    {
19520 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
19521 +        return NULL;
19522 +    }
19523 +    memset(p_CcNode, 0, sizeof(t_FmPcdCcNode));
19524 +
19525 +    err = MatchTableSet(h_FmPcd, p_CcNode, p_CcNodeParam);
19526 +
19527 +    switch(GET_ERROR_TYPE(err)
19528 +)    {
19529 +        case E_OK:
19530 +        break;
19531 +
19532 +        case E_BUSY:
19533 +        DBG(TRACE, ("E_BUSY error"));
19534 +        return NULL;
19535 +
19536 +        default:
19537 +        REPORT_ERROR(MAJOR, err, NO_MSG);
19538 +        return NULL;
19539 +    }
19540 +
19541 +    return p_CcNode;
19542 +}
19543 +
19544 +t_Error FM_PCD_MatchTableDelete(t_Handle h_CcNode)
19545 +{
19546 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19547 +    int i = 0;
19548 +
19549 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19550 +    SANITY_CHECK_RETURN_ERROR(p_CcNode->h_FmPcd, E_INVALID_HANDLE);
19551 +
19552 +    if (p_CcNode->owners)
19553 +        RETURN_ERROR(
19554 +                MAJOR,
19555 +                E_INVALID_STATE,
19556 +                ("This node cannot be removed because it is occupied; first unbind this node"));
19557 +
19558 +    for (i = 0; i < p_CcNode->numOfKeys; i++)
19559 +        if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19560 +                == e_FM_PCD_CC)
19561 +            UpdateNodeOwner(
19562 +                    p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode,
19563 +                    FALSE);
19564 +
19565 +    if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19566 +            == e_FM_PCD_CC)
19567 +        UpdateNodeOwner(
19568 +                p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode,
19569 +                FALSE);
19570 +
19571 +    /* Handle also Miss entry */
19572 +    for (i = 0; i < p_CcNode->numOfKeys + 1; i++)
19573 +    {
19574 +        if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
19575 +            FmPcdManipUpdateOwner(
19576 +                    p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip,
19577 +                    FALSE);
19578 +
19579 +#if (DPAA_VERSION >= 11)
19580 +        if ((p_CcNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
19581 +                == e_FM_PCD_FR)
19582 +                && (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic))
19583 +        {
19584 +            FrmReplicGroupUpdateOwner(
19585 +                    p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic,
19586 +                    FALSE);
19587 +        }
19588 +#endif /* (DPAA_VERSION >= 11) */
19589 +    }
19590 +
19591 +    DeleteNode(p_CcNode);
19592 +
19593 +    return E_OK;
19594 +}
19595 +
19596 +t_Error FM_PCD_MatchTableAddKey(t_Handle h_CcNode, uint16_t keyIndex,
19597 +                                uint8_t keySize,
19598 +                                t_FmPcdCcKeyParams *p_KeyParams)
19599 +{
19600 +    t_FmPcd *p_FmPcd;
19601 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19602 +    t_Error err = E_OK;
19603 +
19604 +    SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
19605 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19606 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19607 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19608 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19609 +
19610 +    if (keyIndex == FM_PCD_LAST_KEY_INDEX)
19611 +        keyIndex = p_CcNode->numOfKeys;
19612 +
19613 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19614 +    {
19615 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19616 +        return ERROR_CODE(E_BUSY);
19617 +    }
19618 +
19619 +    err = FmPcdCcAddKey(p_FmPcd, p_CcNode, keyIndex, keySize, p_KeyParams);
19620 +
19621 +    FmPcdLockUnlockAll(p_FmPcd);
19622 +
19623 +    switch(GET_ERROR_TYPE(err)
19624 +)    {
19625 +        case E_OK:
19626 +        return E_OK;
19627 +
19628 +        case E_BUSY:
19629 +        DBG(TRACE, ("E_BUSY error"));
19630 +        return ERROR_CODE(E_BUSY);
19631 +
19632 +        default:
19633 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19634 +    }
19635 +}
19636 +
19637 +t_Error FM_PCD_MatchTableRemoveKey(t_Handle h_CcNode, uint16_t keyIndex)
19638 +{
19639 +    t_FmPcd *p_FmPcd;
19640 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19641 +    t_Error err = E_OK;
19642 +
19643 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19644 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19645 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19646 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19647 +
19648 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19649 +    {
19650 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19651 +        return ERROR_CODE(E_BUSY);
19652 +    }
19653 +
19654 +    err = FmPcdCcRemoveKey(p_FmPcd, p_CcNode, keyIndex);
19655 +
19656 +    FmPcdLockUnlockAll(p_FmPcd);
19657 +
19658 +    switch(GET_ERROR_TYPE(err)
19659 +)    {
19660 +        case E_OK:
19661 +        return E_OK;
19662 +
19663 +        case E_BUSY:
19664 +        DBG(TRACE, ("E_BUSY error"));
19665 +        return ERROR_CODE(E_BUSY);
19666 +
19667 +        default:
19668 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19669 +    }
19670 +
19671 +    return E_OK;
19672 +}
19673 +
19674 +t_Error FM_PCD_MatchTableModifyKey(t_Handle h_CcNode, uint16_t keyIndex,
19675 +                                   uint8_t keySize, uint8_t *p_Key,
19676 +                                   uint8_t *p_Mask)
19677 +{
19678 +    t_FmPcd *p_FmPcd;
19679 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19680 +    t_Error err = E_OK;
19681 +
19682 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19683 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
19684 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19685 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19686 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19687 +
19688 +
19689 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19690 +    {
19691 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19692 +        return ERROR_CODE(E_BUSY);
19693 +    }
19694 +
19695 +    err = FmPcdCcModifyKey(p_FmPcd, p_CcNode, keyIndex, keySize, p_Key, p_Mask);
19696 +
19697 +    FmPcdLockUnlockAll(p_FmPcd);
19698 +
19699 +    switch(GET_ERROR_TYPE(err)
19700 +)    {
19701 +        case E_OK:
19702 +        return E_OK;
19703 +
19704 +        case E_BUSY:
19705 +        DBG(TRACE, ("E_BUSY error"));
19706 +        return ERROR_CODE(E_BUSY);
19707 +
19708 +        default:
19709 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19710 +    }
19711 +}
19712 +
19713 +t_Error FM_PCD_MatchTableModifyNextEngine(
19714 +        t_Handle h_CcNode, uint16_t keyIndex,
19715 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
19716 +{
19717 +    t_FmPcd *p_FmPcd;
19718 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19719 +    t_Error err = E_OK;
19720 +
19721 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
19722 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19723 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19724 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19725 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19726 +
19727 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19728 +    {
19729 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19730 +        return ERROR_CODE(E_BUSY);
19731 +    }
19732 +
19733 +    err = ModifyNextEngineParamNode(p_FmPcd, p_CcNode, keyIndex,
19734 +                                    p_FmPcdCcNextEngineParams);
19735 +
19736 +    FmPcdLockUnlockAll(p_FmPcd);
19737 +
19738 +    switch(GET_ERROR_TYPE(err)
19739 +)    {
19740 +        case E_OK:
19741 +        return E_OK;
19742 +
19743 +        case E_BUSY:
19744 +        DBG(TRACE, ("E_BUSY error"));
19745 +        return ERROR_CODE(E_BUSY);
19746 +
19747 +        default:
19748 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19749 +    }
19750 +}
19751 +
19752 +t_Error FM_PCD_MatchTableModifyMissNextEngine(
19753 +        t_Handle h_CcNode, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
19754 +{
19755 +    t_FmPcd *p_FmPcd;
19756 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19757 +    t_Error err = E_OK;
19758 +
19759 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
19760 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19761 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19762 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19763 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19764 +
19765 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19766 +    {
19767 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19768 +        return ERROR_CODE(E_BUSY);
19769 +    }
19770 +
19771 +    err = FmPcdCcModifyMissNextEngineParamNode(p_FmPcd, p_CcNode,
19772 +                                               p_FmPcdCcNextEngineParams);
19773 +
19774 +    FmPcdLockUnlockAll(p_FmPcd);
19775 +
19776 +    switch(GET_ERROR_TYPE(err)
19777 +)    {
19778 +        case E_OK:
19779 +        return E_OK;
19780 +
19781 +        case E_BUSY:
19782 +        DBG(TRACE, ("E_BUSY error"));
19783 +        return ERROR_CODE(E_BUSY);
19784 +
19785 +        default:
19786 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19787 +    }
19788 +}
19789 +
19790 +t_Error FM_PCD_MatchTableModifyKeyAndNextEngine(t_Handle h_CcNode,
19791 +                                                uint16_t keyIndex,
19792 +                                                uint8_t keySize,
19793 +                                                t_FmPcdCcKeyParams *p_KeyParams)
19794 +{
19795 +    t_FmPcd *p_FmPcd;
19796 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19797 +    t_Error err = E_OK;
19798 +
19799 +    SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
19800 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19801 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19802 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19803 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19804 +
19805 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19806 +    {
19807 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19808 +        return ERROR_CODE(E_BUSY);
19809 +    }
19810 +
19811 +    err = FmPcdCcModifyKeyAndNextEngine(p_FmPcd, p_CcNode, keyIndex, keySize,
19812 +                                        p_KeyParams);
19813 +
19814 +    FmPcdLockUnlockAll(p_FmPcd);
19815 +
19816 +    switch(GET_ERROR_TYPE(err)
19817 +)    {
19818 +        case E_OK:
19819 +        return E_OK;
19820 +
19821 +        case E_BUSY:
19822 +        DBG(TRACE, ("E_BUSY error"));
19823 +        return ERROR_CODE(E_BUSY);
19824 +
19825 +        default:
19826 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19827 +    }
19828 +}
19829 +
19830 +t_Error FM_PCD_MatchTableFindNRemoveKey(t_Handle h_CcNode, uint8_t keySize,
19831 +                                        uint8_t *p_Key, uint8_t *p_Mask)
19832 +{
19833 +    t_FmPcd *p_FmPcd;
19834 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19835 +    uint16_t keyIndex;
19836 +    t_Error err;
19837 +
19838 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
19839 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19840 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19841 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19842 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19843 +
19844 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19845 +    {
19846 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19847 +        return ERROR_CODE(E_BUSY);
19848 +    }
19849 +
19850 +    err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
19851 +    if (GET_ERROR_TYPE(err) != E_OK)
19852 +    {
19853 +        FmPcdLockUnlockAll(p_FmPcd);
19854 +        RETURN_ERROR(
19855 +                MAJOR,
19856 +                err,
19857 +                ("The received key and mask pair was not found in the match table of the provided node"));
19858 +    }
19859 +
19860 +    err = FmPcdCcRemoveKey(p_FmPcd, p_CcNode, keyIndex);
19861 +
19862 +    FmPcdLockUnlockAll(p_FmPcd);
19863 +
19864 +    switch(GET_ERROR_TYPE(err)
19865 +)    {
19866 +        case E_OK:
19867 +        return E_OK;
19868 +
19869 +        case E_BUSY:
19870 +        DBG(TRACE, ("E_BUSY error"));
19871 +        return ERROR_CODE(E_BUSY);
19872 +
19873 +        default:
19874 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19875 +    }
19876 +}
19877 +
19878 +t_Error FM_PCD_MatchTableFindNModifyNextEngine(
19879 +        t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask,
19880 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
19881 +{
19882 +    t_FmPcd *p_FmPcd;
19883 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19884 +    uint16_t keyIndex;
19885 +    t_Error err;
19886 +
19887 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
19888 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
19889 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19890 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19891 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19892 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19893 +
19894 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19895 +    {
19896 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19897 +        return ERROR_CODE(E_BUSY);
19898 +    }
19899 +
19900 +    err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
19901 +    if (GET_ERROR_TYPE(err) != E_OK)
19902 +    {
19903 +        FmPcdLockUnlockAll(p_FmPcd);
19904 +        RETURN_ERROR(
19905 +                MAJOR,
19906 +                err,
19907 +                ("The received key and mask pair was not found in the match table of the provided node"));
19908 +    }
19909 +
19910 +    err = ModifyNextEngineParamNode(p_FmPcd, p_CcNode, keyIndex,
19911 +                                    p_FmPcdCcNextEngineParams);
19912 +
19913 +    FmPcdLockUnlockAll(p_FmPcd);
19914 +
19915 +    switch(GET_ERROR_TYPE(err)
19916 +)    {
19917 +        case E_OK:
19918 +        return E_OK;
19919 +
19920 +        case E_BUSY:
19921 +        DBG(TRACE, ("E_BUSY error"));
19922 +        return ERROR_CODE(E_BUSY);
19923 +
19924 +        default:
19925 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19926 +    }
19927 +}
19928 +
19929 +t_Error FM_PCD_MatchTableFindNModifyKeyAndNextEngine(
19930 +        t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask,
19931 +        t_FmPcdCcKeyParams *p_KeyParams)
19932 +{
19933 +    t_FmPcd *p_FmPcd;
19934 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19935 +    uint16_t keyIndex;
19936 +    t_Error err;
19937 +
19938 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
19939 +    SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
19940 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19941 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19942 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19943 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19944 +
19945 +    if (!FmPcdLockTryLockAll(p_FmPcd))
19946 +    {
19947 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
19948 +        return ERROR_CODE(E_BUSY);
19949 +    }
19950 +
19951 +    err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
19952 +    if (GET_ERROR_TYPE(err) != E_OK)
19953 +    {
19954 +        FmPcdLockUnlockAll(p_FmPcd);
19955 +        RETURN_ERROR(
19956 +                MAJOR,
19957 +                err,
19958 +                ("The received key and mask pair was not found in the match table of the provided node"));
19959 +    }
19960 +
19961 +    err = FmPcdCcModifyKeyAndNextEngine(p_FmPcd, h_CcNode, keyIndex, keySize,
19962 +                                        p_KeyParams);
19963 +
19964 +    FmPcdLockUnlockAll(p_FmPcd);
19965 +
19966 +    switch(GET_ERROR_TYPE(err)
19967 +)    {
19968 +        case E_OK:
19969 +        return E_OK;
19970 +
19971 +        case E_BUSY:
19972 +        DBG(TRACE, ("E_BUSY error"));
19973 +        return ERROR_CODE(E_BUSY);
19974 +
19975 +        default:
19976 +        RETURN_ERROR(MAJOR, err, NO_MSG);
19977 +    }
19978 +}
19979 +
19980 +t_Error FM_PCD_MatchTableFindNModifyKey(t_Handle h_CcNode, uint8_t keySize,
19981 +                                        uint8_t *p_Key, uint8_t *p_Mask,
19982 +                                        uint8_t *p_NewKey, uint8_t *p_NewMask)
19983 +{
19984 +    t_FmPcd *p_FmPcd;
19985 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
19986 +    t_List h_List;
19987 +    uint16_t keyIndex;
19988 +    t_Error err;
19989 +
19990 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
19991 +    SANITY_CHECK_RETURN_ERROR(p_NewKey, E_NULL_POINTER);
19992 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
19993 +    p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
19994 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
19995 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
19996 +
19997 +    INIT_LIST(&h_List);
19998 +
19999 +    err = FmPcdCcNodeTreeTryLock(p_FmPcd, p_CcNode, &h_List);
20000 +    if (err)
20001 +    {
20002 +        DBG(TRACE, ("Node's trees lock failed"));
20003 +        return ERROR_CODE(E_BUSY);
20004 +    }
20005 +
20006 +    err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
20007 +    if (GET_ERROR_TYPE(err) != E_OK)
20008 +    {
20009 +        FmPcdCcNodeTreeReleaseLock(p_FmPcd, &h_List);
20010 +        RETURN_ERROR(MAJOR, err,
20011 +                     ("The received key and mask pair was not found in the "
20012 +                     "match table of the provided node"));
20013 +    }
20014 +
20015 +    err = FmPcdCcModifyKey(p_FmPcd, p_CcNode, keyIndex, keySize, p_NewKey,
20016 +                           p_NewMask);
20017 +
20018 +    FmPcdCcNodeTreeReleaseLock(p_FmPcd, &h_List);
20019 +
20020 +    switch(GET_ERROR_TYPE(err)
20021 +)    {
20022 +        case E_OK:
20023 +        return E_OK;
20024 +
20025 +        case E_BUSY:
20026 +        DBG(TRACE, ("E_BUSY error"));
20027 +        return ERROR_CODE(E_BUSY);
20028 +
20029 +        default:
20030 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20031 +    }
20032 +}
20033 +
20034 +t_Error FM_PCD_MatchTableGetNextEngine(
20035 +        t_Handle h_CcNode, uint16_t keyIndex,
20036 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
20037 +{
20038 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
20039 +
20040 +    SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
20041 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
20042 +
20043 +    if (keyIndex >= p_CcNode->numOfKeys)
20044 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
20045 +                     ("keyIndex exceeds current number of keys"));
20046 +
20047 +    if (keyIndex > (FM_PCD_MAX_NUM_OF_KEYS - 1))
20048 +        RETURN_ERROR(
20049 +                MAJOR,
20050 +                E_INVALID_VALUE,
20051 +                ("keyIndex can not be larger than %d", (FM_PCD_MAX_NUM_OF_KEYS - 1)));
20052 +
20053 +    memcpy(p_FmPcdCcNextEngineParams,
20054 +           &p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams,
20055 +           sizeof(t_FmPcdCcNextEngineParams));
20056 +
20057 +    return E_OK;
20058 +}
20059 +
20060 +
20061 +uint32_t FM_PCD_MatchTableGetKeyCounter(t_Handle h_CcNode, uint16_t keyIndex)
20062 +{
20063 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
20064 +    uint32_t *p_StatsCounters, frameCount;
20065 +    uint32_t intFlags;
20066 +
20067 +    SANITY_CHECK_RETURN_VALUE(p_CcNode, E_INVALID_HANDLE, 0);
20068 +
20069 +    if (p_CcNode->statisticsMode == e_FM_PCD_CC_STATS_MODE_NONE)
20070 +    {
20071 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Statistics were not enabled for this match table"));
20072 +        return 0;
20073 +    }
20074 +
20075 +    if ((p_CcNode->statisticsMode != e_FM_PCD_CC_STATS_MODE_FRAME)
20076 +            && (p_CcNode->statisticsMode
20077 +                    != e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME))
20078 +    {
20079 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Frame count is not supported in the statistics mode of this match table"));
20080 +        return 0;
20081 +    }
20082 +
20083 +    intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
20084 +
20085 +    if (keyIndex >= p_CcNode->numOfKeys)
20086 +    {
20087 +        XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20088 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("The provided keyIndex exceeds the number of keys in this match table"));
20089 +        return 0;
20090 +    }
20091 +
20092 +    if (!p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
20093 +    {
20094 +        XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20095 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Statistics were not enabled for this key"));
20096 +        return 0;
20097 +    }
20098 +
20099 +    p_StatsCounters =
20100 +            p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsCounters;
20101 +    ASSERT_COND(p_StatsCounters);
20102 +
20103 +    /* The first counter is byte counter, so we need to advance to the next counter */
20104 +    frameCount = GET_UINT32(*(uint32_t *)(PTR_MOVE(p_StatsCounters,
20105 +                            FM_PCD_CC_STATS_COUNTER_SIZE)));
20106 +
20107 +    XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20108 +
20109 +    return frameCount;
20110 +}
20111 +
20112 +t_Error FM_PCD_MatchTableGetKeyStatistics(
20113 +        t_Handle h_CcNode, uint16_t keyIndex,
20114 +        t_FmPcdCcKeyStatistics *p_KeyStatistics)
20115 +{
20116 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
20117 +    uint32_t intFlags;
20118 +    t_Error err;
20119 +
20120 +    SANITY_CHECK_RETURN_ERROR(h_CcNode, E_INVALID_HANDLE);
20121 +    SANITY_CHECK_RETURN_ERROR(p_KeyStatistics, E_NULL_POINTER);
20122 +
20123 +    intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
20124 +
20125 +    if (keyIndex >= p_CcNode->numOfKeys)
20126 +        RETURN_ERROR(
20127 +                MAJOR,
20128 +                E_INVALID_STATE,
20129 +                ("The provided keyIndex exceeds the number of keys in this match table"));
20130 +
20131 +    err = MatchTableGetKeyStatistics(p_CcNode, keyIndex, p_KeyStatistics);
20132 +
20133 +    XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20134 +
20135 +    if (err != E_OK)
20136 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20137 +
20138 +    return E_OK;
20139 +}
20140 +
20141 +t_Error FM_PCD_MatchTableGetMissStatistics(
20142 +        t_Handle h_CcNode, t_FmPcdCcKeyStatistics *p_MissStatistics)
20143 +{
20144 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
20145 +    uint32_t intFlags;
20146 +    t_Error err;
20147 +
20148 +    SANITY_CHECK_RETURN_ERROR(h_CcNode, E_INVALID_HANDLE);
20149 +    SANITY_CHECK_RETURN_ERROR(p_MissStatistics, E_NULL_POINTER);
20150 +
20151 +    intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
20152 +
20153 +    err = MatchTableGetKeyStatistics(p_CcNode, p_CcNode->numOfKeys,
20154 +                                     p_MissStatistics);
20155 +
20156 +    XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20157 +
20158 +    if (err != E_OK)
20159 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20160 +
20161 +    return E_OK;
20162 +}
20163 +
20164 +t_Error FM_PCD_MatchTableFindNGetKeyStatistics(
20165 +        t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask,
20166 +        t_FmPcdCcKeyStatistics *p_KeyStatistics)
20167 +{
20168 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
20169 +    uint16_t keyIndex;
20170 +    uint32_t intFlags;
20171 +    t_Error err;
20172 +
20173 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
20174 +    SANITY_CHECK_RETURN_ERROR(p_KeyStatistics, E_NULL_POINTER);
20175 +
20176 +    intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
20177 +
20178 +    err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
20179 +    if (GET_ERROR_TYPE(err) != E_OK)
20180 +    {
20181 +        XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20182 +        RETURN_ERROR(MAJOR, err,
20183 +                     ("The received key and mask pair was not found in the "
20184 +                     "match table of the provided node"));
20185 +    }
20186 +
20187 +    ASSERT_COND(keyIndex < p_CcNode->numOfKeys);
20188 +
20189 +    err = MatchTableGetKeyStatistics(p_CcNode, keyIndex, p_KeyStatistics);
20190 +
20191 +    XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
20192 +
20193 +    if (err != E_OK)
20194 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20195 +
20196 +    return E_OK;
20197 +}
20198 +
20199 +t_Error FM_PCD_MatchTableGetIndexedHashBucket(t_Handle h_CcNode,
20200 +                                              uint8_t keySize, uint8_t *p_Key,
20201 +                                              uint8_t hashShift,
20202 +                                              t_Handle *p_CcNodeBucketHandle,
20203 +                                              uint8_t *p_BucketIndex,
20204 +                                              uint16_t *p_LastIndex)
20205 +{
20206 +    t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
20207 +    uint16_t glblMask;
20208 +    uint64_t crc64 = 0;
20209 +
20210 +    SANITY_CHECK_RETURN_ERROR(h_CcNode, E_INVALID_HANDLE);
20211 +    SANITY_CHECK_RETURN_ERROR(
20212 +            p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED,
20213 +            E_INVALID_STATE);
20214 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
20215 +    SANITY_CHECK_RETURN_ERROR(p_CcNodeBucketHandle, E_NULL_POINTER);
20216 +
20217 +    memcpy(&glblMask, PTR_MOVE(p_CcNode->p_GlblMask, 2), 2);
20218 +    be16_to_cpus(&glblMask);
20219 +
20220 +    crc64 = crc64_init();
20221 +    crc64 = crc64_compute(p_Key, keySize, crc64);
20222 +    crc64 >>= hashShift;
20223 +
20224 +    *p_BucketIndex = (uint8_t)(((crc64 >> (8 * (6 - p_CcNode->userOffset)))
20225 +            & glblMask) >> 4);
20226 +    if (*p_BucketIndex >= p_CcNode->numOfKeys)
20227 +        RETURN_ERROR(MINOR, E_NOT_IN_RANGE, ("bucket index!"));
20228 +
20229 +    *p_CcNodeBucketHandle =
20230 +            p_CcNode->keyAndNextEngineParams[*p_BucketIndex].nextEngineParams.params.ccParams.h_CcNode;
20231 +    if (!*p_CcNodeBucketHandle)
20232 +        RETURN_ERROR(MINOR, E_NOT_FOUND, ("bucket!"));
20233 +
20234 +    *p_LastIndex = ((t_FmPcdCcNode *)*p_CcNodeBucketHandle)->numOfKeys;
20235 +
20236 +    return E_OK;
20237 +}
20238 +
20239 +t_Handle FM_PCD_HashTableSet(t_Handle h_FmPcd, t_FmPcdHashTableParams *p_Param)
20240 +{
20241 +    t_FmPcdCcNode *p_CcNodeHashTbl;
20242 +    t_FmPcdCcNodeParams *p_IndxHashCcNodeParam, *p_ExactMatchCcNodeParam;
20243 +    t_FmPcdCcNode *p_CcNode;
20244 +    t_Handle h_MissStatsCounters = NULL;
20245 +    t_FmPcdCcKeyParams *p_HashKeyParams;
20246 +    int i;
20247 +    uint16_t numOfSets, numOfWays, countMask, onesCount = 0;
20248 +    bool statsEnForMiss = FALSE;
20249 +    t_Error err;
20250 +
20251 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
20252 +    SANITY_CHECK_RETURN_VALUE(p_Param, E_NULL_POINTER, NULL);
20253 +
20254 +    if (p_Param->maxNumOfKeys == 0)
20255 +    {
20256 +        REPORT_ERROR(MINOR, E_INVALID_VALUE, ("Max number of keys must be higher then 0"));
20257 +        return NULL;
20258 +    }
20259 +
20260 +    if (p_Param->hashResMask == 0)
20261 +    {
20262 +        REPORT_ERROR(MINOR, E_INVALID_VALUE, ("Hash result mask must differ from 0"));
20263 +        return NULL;
20264 +    }
20265 +
20266 +    /*Fix: QorIQ SDK / QSDK-2131*/
20267 +    if (p_Param->ccNextEngineParamsForMiss.nextEngine == e_FM_PCD_INVALID)
20268 +    {
20269 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Next PCD Engine for on-miss entry is invalid. On-miss entry is always required. You can use e_FM_PCD_DONE."));
20270 +        return NULL;
20271 +    }
20272 +
20273 +#if (DPAA_VERSION >= 11)
20274 +    if (p_Param->statisticsMode == e_FM_PCD_CC_STATS_MODE_RMON)
20275 +    {
20276 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE,
20277 +                ("RMON statistics mode is not supported for hash table"));
20278 +        return NULL;
20279 +    }
20280 +#endif /* (DPAA_VERSION >= 11) */
20281 +
20282 +    p_ExactMatchCcNodeParam = (t_FmPcdCcNodeParams*)XX_Malloc(
20283 +            sizeof(t_FmPcdCcNodeParams));
20284 +    if (!p_ExactMatchCcNodeParam)
20285 +    {
20286 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_ExactMatchCcNodeParam"));
20287 +        return NULL;
20288 +    }
20289 +    memset(p_ExactMatchCcNodeParam, 0, sizeof(t_FmPcdCcNodeParams));
20290 +
20291 +    p_IndxHashCcNodeParam = (t_FmPcdCcNodeParams*)XX_Malloc(
20292 +            sizeof(t_FmPcdCcNodeParams));
20293 +    if (!p_IndxHashCcNodeParam)
20294 +    {
20295 +        XX_Free(p_ExactMatchCcNodeParam);
20296 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_IndxHashCcNodeParam"));
20297 +        return NULL;
20298 +    }
20299 +    memset(p_IndxHashCcNodeParam, 0, sizeof(t_FmPcdCcNodeParams));
20300 +
20301 +    /* Calculate number of sets and number of ways of the hash table */
20302 +    countMask = (uint16_t)(p_Param->hashResMask >> 4);
20303 +    while (countMask)
20304 +    {
20305 +        onesCount++;
20306 +        countMask = (uint16_t)(countMask >> 1);
20307 +    }
20308 +
20309 +    numOfSets = (uint16_t)(1 << onesCount);
20310 +    numOfWays = (uint16_t)DIV_CEIL(p_Param->maxNumOfKeys, numOfSets);
20311 +
20312 +    if (p_Param->maxNumOfKeys % numOfSets)
20313 +        DBG(INFO, ("'maxNumOfKeys' is not a multiple of hash number of ways, so number of ways will be rounded up"));
20314 +
20315 +    if ((p_Param->statisticsMode == e_FM_PCD_CC_STATS_MODE_FRAME)
20316 +            || (p_Param->statisticsMode == e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME))
20317 +    {
20318 +        /* Allocating a statistics counters table that will be used by all
20319 +         'miss' entries of the hash table */
20320 +        h_MissStatsCounters = (t_Handle)FM_MURAM_AllocMem(
20321 +                FmPcdGetMuramHandle(h_FmPcd), 2 * FM_PCD_CC_STATS_COUNTER_SIZE,
20322 +                FM_PCD_CC_AD_TABLE_ALIGN);
20323 +        if (!h_MissStatsCounters)
20324 +        {
20325 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for statistics table for hash miss"));
20326 +            XX_Free(p_IndxHashCcNodeParam);
20327 +            XX_Free(p_ExactMatchCcNodeParam);
20328 +            return NULL;
20329 +        }
20330 +        memset(h_MissStatsCounters, 0, (2 * FM_PCD_CC_STATS_COUNTER_SIZE));
20331 +
20332 +        /* Always enable statistics for 'miss', so that a statistics AD will be
20333 +         initialized from the start. We'll store the requested 'statistics enable'
20334 +         value and it will be used when statistics are read by the user. */
20335 +        statsEnForMiss = p_Param->ccNextEngineParamsForMiss.statisticsEn;
20336 +        p_Param->ccNextEngineParamsForMiss.statisticsEn = TRUE;
20337 +    }
20338 +
20339 +    /* Building exact-match node params, will be used to create the hash buckets */
20340 +    p_ExactMatchCcNodeParam->extractCcParams.type = e_FM_PCD_EXTRACT_NON_HDR;
20341 +
20342 +    p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.src =
20343 +            e_FM_PCD_EXTRACT_FROM_KEY;
20344 +    p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.action =
20345 +            e_FM_PCD_ACTION_EXACT_MATCH;
20346 +    p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.offset = 0;
20347 +    p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.size =
20348 +            p_Param->matchKeySize;
20349 +
20350 +    p_ExactMatchCcNodeParam->keysParams.maxNumOfKeys = numOfWays;
20351 +    p_ExactMatchCcNodeParam->keysParams.maskSupport = FALSE;
20352 +    p_ExactMatchCcNodeParam->keysParams.statisticsMode =
20353 +            p_Param->statisticsMode;
20354 +    p_ExactMatchCcNodeParam->keysParams.numOfKeys = 0;
20355 +    p_ExactMatchCcNodeParam->keysParams.keySize = p_Param->matchKeySize;
20356 +    p_ExactMatchCcNodeParam->keysParams.ccNextEngineParamsForMiss =
20357 +            p_Param->ccNextEngineParamsForMiss;
20358 +
20359 +    p_HashKeyParams = p_IndxHashCcNodeParam->keysParams.keyParams;
20360 +
20361 +    for (i = 0; i < numOfSets; i++)
20362 +    {
20363 +        /* Each exact-match node will be marked as a 'bucket' and provided with
20364 +           a pointer to statistics counters, to be used for 'miss' entry
20365 +           statistics */
20366 +        p_CcNode = (t_FmPcdCcNode *)XX_Malloc(sizeof(t_FmPcdCcNode));
20367 +        if (!p_CcNode)
20368 +            break;
20369 +        memset(p_CcNode, 0, sizeof(t_FmPcdCcNode));
20370 +
20371 +        p_CcNode->isHashBucket = TRUE;
20372 +        p_CcNode->h_MissStatsCounters = h_MissStatsCounters;
20373 +
20374 +        err = MatchTableSet(h_FmPcd, p_CcNode, p_ExactMatchCcNodeParam);
20375 +        if (err)
20376 +            break;
20377 +
20378 +        p_HashKeyParams[i].ccNextEngineParams.nextEngine = e_FM_PCD_CC;
20379 +        p_HashKeyParams[i].ccNextEngineParams.statisticsEn = FALSE;
20380 +        p_HashKeyParams[i].ccNextEngineParams.params.ccParams.h_CcNode =
20381 +                p_CcNode;
20382 +    }
20383 +
20384 +    if (i < numOfSets)
20385 +    {
20386 +        for (i = i - 1; i >= 0; i--)
20387 +            FM_PCD_MatchTableDelete(
20388 +                    p_HashKeyParams[i].ccNextEngineParams.params.ccParams.h_CcNode);
20389 +
20390 +        FM_MURAM_FreeMem(FmPcdGetMuramHandle(h_FmPcd), h_MissStatsCounters);
20391 +
20392 +        REPORT_ERROR(MAJOR, E_NULL_POINTER, NO_MSG);
20393 +        XX_Free(p_IndxHashCcNodeParam);
20394 +        XX_Free(p_ExactMatchCcNodeParam);
20395 +        return NULL;
20396 +    }
20397 +
20398 +    /* Creating indexed-hash CC node */
20399 +    p_IndxHashCcNodeParam->extractCcParams.type = e_FM_PCD_EXTRACT_NON_HDR;
20400 +    p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.src =
20401 +            e_FM_PCD_EXTRACT_FROM_HASH;
20402 +    p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.action =
20403 +            e_FM_PCD_ACTION_INDEXED_LOOKUP;
20404 +    p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.icIndxMask =
20405 +            p_Param->hashResMask;
20406 +    p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.offset =
20407 +            p_Param->hashShift;
20408 +    p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.size = 2;
20409 +
20410 +    p_IndxHashCcNodeParam->keysParams.maxNumOfKeys = numOfSets;
20411 +    p_IndxHashCcNodeParam->keysParams.maskSupport = FALSE;
20412 +    p_IndxHashCcNodeParam->keysParams.statisticsMode =
20413 +            e_FM_PCD_CC_STATS_MODE_NONE;
20414 +    /* Number of keys of this node is number of sets of the hash */
20415 +    p_IndxHashCcNodeParam->keysParams.numOfKeys = numOfSets;
20416 +    p_IndxHashCcNodeParam->keysParams.keySize = 2;
20417 +
20418 +    p_CcNodeHashTbl = FM_PCD_MatchTableSet(h_FmPcd, p_IndxHashCcNodeParam);
20419 +
20420 +    if (p_CcNodeHashTbl)
20421 +    {
20422 +        p_CcNodeHashTbl->kgHashShift = p_Param->kgHashShift;
20423 +
20424 +        /* Storing the allocated counters for buckets 'miss' in the hash table
20425 +         and if statistics for miss were enabled. */
20426 +        p_CcNodeHashTbl->h_MissStatsCounters = h_MissStatsCounters;
20427 +        p_CcNodeHashTbl->statsEnForMiss = statsEnForMiss;
20428 +    }
20429 +
20430 +    XX_Free(p_IndxHashCcNodeParam);
20431 +    XX_Free(p_ExactMatchCcNodeParam);
20432 +
20433 +    return p_CcNodeHashTbl;
20434 +}
20435 +
20436 +t_Error FM_PCD_HashTableDelete(t_Handle h_HashTbl)
20437 +{
20438 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20439 +    t_Handle h_FmPcd;
20440 +    t_Handle *p_HashBuckets, h_MissStatsCounters;
20441 +    uint16_t i, numOfBuckets;
20442 +    t_Error err;
20443 +
20444 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20445 +
20446 +    /* Store all hash buckets before the hash is freed */
20447 +    numOfBuckets = p_HashTbl->numOfKeys;
20448 +
20449 +    p_HashBuckets = (t_Handle *)XX_Malloc(numOfBuckets * sizeof(t_Handle));
20450 +    if (!p_HashBuckets)
20451 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
20452 +
20453 +    for (i = 0; i < numOfBuckets; i++)
20454 +        p_HashBuckets[i] =
20455 +                p_HashTbl->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
20456 +
20457 +    h_FmPcd = p_HashTbl->h_FmPcd;
20458 +    h_MissStatsCounters = p_HashTbl->h_MissStatsCounters;
20459 +
20460 +    /* Free the hash */
20461 +    err = FM_PCD_MatchTableDelete(p_HashTbl);
20462 +
20463 +    /* Free each hash bucket */
20464 +    for (i = 0; i < numOfBuckets; i++)
20465 +        err |= FM_PCD_MatchTableDelete(p_HashBuckets[i]);
20466 +
20467 +    XX_Free(p_HashBuckets);
20468 +
20469 +    /* Free statistics counters for 'miss', if these were allocated */
20470 +    if (h_MissStatsCounters)
20471 +        FM_MURAM_FreeMem(FmPcdGetMuramHandle(h_FmPcd), h_MissStatsCounters);
20472 +
20473 +    if (err)
20474 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20475 +
20476 +    return E_OK;
20477 +}
20478 +
20479 +t_Error FM_PCD_HashTableAddKey(t_Handle h_HashTbl, uint8_t keySize,
20480 +                               t_FmPcdCcKeyParams *p_KeyParams)
20481 +{
20482 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20483 +    t_Handle h_HashBucket;
20484 +    uint8_t bucketIndex;
20485 +    uint16_t lastIndex;
20486 +    t_Error err;
20487 +
20488 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20489 +    SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
20490 +    SANITY_CHECK_RETURN_ERROR(p_KeyParams->p_Key, E_NULL_POINTER);
20491 +
20492 +    if (p_KeyParams->p_Mask)
20493 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
20494 +                     ("Keys masks not supported for hash table"));
20495 +
20496 +    err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize,
20497 +                                                p_KeyParams->p_Key,
20498 +                                                p_HashTbl->kgHashShift,
20499 +                                                &h_HashBucket, &bucketIndex,
20500 +                                                &lastIndex);
20501 +    if (err)
20502 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20503 +
20504 +    return FM_PCD_MatchTableAddKey(h_HashBucket, FM_PCD_LAST_KEY_INDEX, keySize,
20505 +                                   p_KeyParams);
20506 +}
20507 +
20508 +t_Error FM_PCD_HashTableRemoveKey(t_Handle h_HashTbl, uint8_t keySize,
20509 +                                  uint8_t *p_Key)
20510 +{
20511 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20512 +    t_Handle h_HashBucket;
20513 +    uint8_t bucketIndex;
20514 +    uint16_t lastIndex;
20515 +    t_Error err;
20516 +
20517 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20518 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
20519 +
20520 +    err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize, p_Key,
20521 +                                                p_HashTbl->kgHashShift,
20522 +                                                &h_HashBucket, &bucketIndex,
20523 +                                                &lastIndex);
20524 +    if (err)
20525 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20526 +
20527 +    return FM_PCD_MatchTableFindNRemoveKey(h_HashBucket, keySize, p_Key, NULL);
20528 +}
20529 +
20530 +t_Error FM_PCD_HashTableModifyNextEngine(
20531 +        t_Handle h_HashTbl, uint8_t keySize, uint8_t *p_Key,
20532 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
20533 +{
20534 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20535 +    t_Handle h_HashBucket;
20536 +    uint8_t bucketIndex;
20537 +    uint16_t lastIndex;
20538 +    t_Error err;
20539 +
20540 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20541 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
20542 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
20543 +
20544 +    err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize, p_Key,
20545 +                                                p_HashTbl->kgHashShift,
20546 +                                                &h_HashBucket, &bucketIndex,
20547 +                                                &lastIndex);
20548 +    if (err)
20549 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20550 +
20551 +    return FM_PCD_MatchTableFindNModifyNextEngine(h_HashBucket, keySize, p_Key,
20552 +                                                  NULL,
20553 +                                                  p_FmPcdCcNextEngineParams);
20554 +}
20555 +
20556 +t_Error FM_PCD_HashTableModifyMissNextEngine(
20557 +        t_Handle h_HashTbl,
20558 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
20559 +{
20560 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20561 +    t_Handle h_HashBucket;
20562 +    uint8_t i;
20563 +    bool nullifyMissStats = FALSE;
20564 +    t_Error err;
20565 +
20566 +    SANITY_CHECK_RETURN_ERROR(h_HashTbl, E_INVALID_HANDLE);
20567 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
20568 +
20569 +    if ((!p_HashTbl->h_MissStatsCounters)
20570 +            && (p_FmPcdCcNextEngineParams->statisticsEn))
20571 +        RETURN_ERROR(
20572 +                MAJOR,
20573 +                E_CONFLICT,
20574 +                ("Statistics are requested for a key, but statistics mode was set"
20575 +                "to 'NONE' upon initialization"));
20576 +
20577 +    if (p_HashTbl->h_MissStatsCounters)
20578 +    {
20579 +        if ((!p_HashTbl->statsEnForMiss)
20580 +                && (p_FmPcdCcNextEngineParams->statisticsEn))
20581 +            nullifyMissStats = TRUE;
20582 +
20583 +        if ((p_HashTbl->statsEnForMiss)
20584 +                && (!p_FmPcdCcNextEngineParams->statisticsEn))
20585 +        {
20586 +            p_HashTbl->statsEnForMiss = FALSE;
20587 +            p_FmPcdCcNextEngineParams->statisticsEn = TRUE;
20588 +        }
20589 +    }
20590 +
20591 +    for (i = 0; i < p_HashTbl->numOfKeys; i++)
20592 +    {
20593 +        h_HashBucket =
20594 +                p_HashTbl->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
20595 +
20596 +        err = FM_PCD_MatchTableModifyMissNextEngine(h_HashBucket,
20597 +                                                    p_FmPcdCcNextEngineParams);
20598 +        if (err)
20599 +            RETURN_ERROR(MAJOR, err, NO_MSG);
20600 +    }
20601 +
20602 +    if (nullifyMissStats)
20603 +    {
20604 +        memset(p_HashTbl->h_MissStatsCounters, 0,
20605 +               (2 * FM_PCD_CC_STATS_COUNTER_SIZE));
20606 +        memset(p_HashTbl->h_MissStatsCounters, 0,
20607 +               (2 * FM_PCD_CC_STATS_COUNTER_SIZE));
20608 +        p_HashTbl->statsEnForMiss = TRUE;
20609 +    }
20610 +
20611 +    return E_OK;
20612 +}
20613 +
20614 +
20615 +t_Error FM_PCD_HashTableGetMissNextEngine(
20616 +        t_Handle h_HashTbl,
20617 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
20618 +{
20619 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20620 +    t_FmPcdCcNode *p_HashBucket;
20621 +
20622 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20623 +
20624 +    /* Miss next engine of each bucket was initialized with the next engine of the hash table */
20625 +    p_HashBucket =
20626 +            p_HashTbl->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode;
20627 +
20628 +    memcpy(p_FmPcdCcNextEngineParams,
20629 +           &p_HashBucket->keyAndNextEngineParams[p_HashBucket->numOfKeys].nextEngineParams,
20630 +           sizeof(t_FmPcdCcNextEngineParams));
20631 +
20632 +    return E_OK;
20633 +}
20634 +
20635 +t_Error FM_PCD_HashTableFindNGetKeyStatistics(
20636 +        t_Handle h_HashTbl, uint8_t keySize, uint8_t *p_Key,
20637 +        t_FmPcdCcKeyStatistics *p_KeyStatistics)
20638 +{
20639 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20640 +    t_Handle h_HashBucket;
20641 +    uint8_t bucketIndex;
20642 +    uint16_t lastIndex;
20643 +    t_Error err;
20644 +
20645 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20646 +    SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
20647 +    SANITY_CHECK_RETURN_ERROR(p_KeyStatistics, E_NULL_POINTER);
20648 +
20649 +    err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize, p_Key,
20650 +                                                p_HashTbl->kgHashShift,
20651 +                                                &h_HashBucket, &bucketIndex,
20652 +                                                &lastIndex);
20653 +    if (err)
20654 +        RETURN_ERROR(MAJOR, err, NO_MSG);
20655 +
20656 +    return FM_PCD_MatchTableFindNGetKeyStatistics(h_HashBucket, keySize, p_Key,
20657 +                                                  NULL, p_KeyStatistics);
20658 +}
20659 +
20660 +t_Error FM_PCD_HashTableGetMissStatistics(
20661 +        t_Handle h_HashTbl, t_FmPcdCcKeyStatistics *p_MissStatistics)
20662 +{
20663 +    t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
20664 +    t_Handle h_HashBucket;
20665 +
20666 +    SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
20667 +    SANITY_CHECK_RETURN_ERROR(p_MissStatistics, E_NULL_POINTER);
20668 +
20669 +    if (!p_HashTbl->statsEnForMiss)
20670 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
20671 +                     ("Statistics were not enabled for miss"));
20672 +
20673 +    h_HashBucket =
20674 +            p_HashTbl->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode;
20675 +
20676 +    return FM_PCD_MatchTableGetMissStatistics(h_HashBucket, p_MissStatistics);
20677 +}
20678 --- /dev/null
20679 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.h
20680 @@ -0,0 +1,399 @@
20681 +/*
20682 + * Copyright 2008-2012 Freescale Semiconductor Inc.
20683 + *
20684 + * Redistribution and use in source and binary forms, with or without
20685 + * modification, are permitted provided that the following conditions are met:
20686 + *     * Redistributions of source code must retain the above copyright
20687 + *       notice, this list of conditions and the following disclaimer.
20688 + *     * Redistributions in binary form must reproduce the above copyright
20689 + *       notice, this list of conditions and the following disclaimer in the
20690 + *       documentation and/or other materials provided with the distribution.
20691 + *     * Neither the name of Freescale Semiconductor nor the
20692 + *       names of its contributors may be used to endorse or promote products
20693 + *       derived from this software without specific prior written permission.
20694 + *
20695 + *
20696 + * ALTERNATIVELY, this software may be distributed under the terms of the
20697 + * GNU General Public License ("GPL") as published by the Free Software
20698 + * Foundation, either version 2 of that License or (at your option) any
20699 + * later version.
20700 + *
20701 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
20702 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20703 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20704 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
20705 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20706 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20707 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
20708 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20709 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
20710 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20711 + */
20712 +
20713 +
20714 +/******************************************************************************
20715 + @File          fm_cc.h
20716 +
20717 + @Description   FM PCD CC ...
20718 +*//***************************************************************************/
20719 +#ifndef __FM_CC_H
20720 +#define __FM_CC_H
20721 +
20722 +#include "std_ext.h"
20723 +#include "error_ext.h"
20724 +#include "list_ext.h"
20725 +
20726 +#include "fm_pcd.h"
20727 +
20728 +
20729 +/***********************************************************************/
20730 +/*          Coarse classification defines                              */
20731 +/***********************************************************************/
20732 +
20733 +#define CC_MAX_NUM_OF_KEYS                  (FM_PCD_MAX_NUM_OF_KEYS + 1)
20734 +
20735 +#define CC_PC_FF_MACDST                     0x00
20736 +#define CC_PC_FF_MACSRC                     0x01
20737 +#define CC_PC_FF_ETYPE                      0x02
20738 +
20739 +#define CC_PC_FF_TCI1                       0x03
20740 +#define CC_PC_FF_TCI2                       0x04
20741 +
20742 +#define CC_PC_FF_MPLS1                      0x06
20743 +#define CC_PC_FF_MPLS_LAST                  0x07
20744 +
20745 +#define CC_PC_FF_IPV4DST1                   0x08
20746 +#define CC_PC_FF_IPV4DST2                   0x16
20747 +#define CC_PC_FF_IPV4IPTOS_TC1              0x09
20748 +#define CC_PC_FF_IPV4IPTOS_TC2              0x17
20749 +#define CC_PC_FF_IPV4PTYPE1                 0x0A
20750 +#define CC_PC_FF_IPV4PTYPE2                 0x18
20751 +#define CC_PC_FF_IPV4SRC1                   0x0b
20752 +#define CC_PC_FF_IPV4SRC2                   0x19
20753 +#define CC_PC_FF_IPV4SRC1_IPV4DST1          0x0c
20754 +#define CC_PC_FF_IPV4SRC2_IPV4DST2          0x1a
20755 +#define CC_PC_FF_IPV4TTL                    0x29
20756 +
20757 +
20758 +#define CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1    0x0d /*TODO - CLASS - what is it? TOS*/
20759 +#define CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2    0x1b
20760 +#define CC_PC_FF_IPV6PTYPE1                 0x0e
20761 +#define CC_PC_FF_IPV6PTYPE2                 0x1c
20762 +#define CC_PC_FF_IPV6DST1                   0x0f
20763 +#define CC_PC_FF_IPV6DST2                   0x1d
20764 +#define CC_PC_FF_IPV6SRC1                   0x10
20765 +#define CC_PC_FF_IPV6SRC2                   0x1e
20766 +#define CC_PC_FF_IPV6HOP_LIMIT              0x2a
20767 +#define CC_PC_FF_IPPID                      0x24
20768 +#define CC_PC_FF_IPDSCP                     0x76
20769 +
20770 +#define CC_PC_FF_GREPTYPE                   0x11
20771 +
20772 +#define CC_PC_FF_MINENCAP_PTYPE             0x12
20773 +#define CC_PC_FF_MINENCAP_IPDST             0x13
20774 +#define CC_PC_FF_MINENCAP_IPSRC             0x14
20775 +#define CC_PC_FF_MINENCAP_IPSRC_IPDST       0x15
20776 +
20777 +#define CC_PC_FF_L4PSRC                     0x1f
20778 +#define CC_PC_FF_L4PDST                     0x20
20779 +#define CC_PC_FF_L4PSRC_L4PDST              0x21
20780 +
20781 +#define CC_PC_FF_PPPPID                     0x05
20782 +
20783 +#define CC_PC_PR_SHIM1                      0x22
20784 +#define CC_PC_PR_SHIM2                      0x23
20785 +
20786 +#define CC_PC_GENERIC_WITHOUT_MASK          0x27
20787 +#define CC_PC_GENERIC_WITH_MASK             0x28
20788 +#define CC_PC_GENERIC_IC_GMASK              0x2B
20789 +#define CC_PC_GENERIC_IC_HASH_INDEXED       0x2C
20790 +#define CC_PC_GENERIC_IC_AGING_MASK         0x2D
20791 +
20792 +#define CC_PR_OFFSET                        0x25
20793 +#define CC_PR_WITHOUT_OFFSET                0x26
20794 +
20795 +#define CC_PC_PR_ETH_OFFSET                 19
20796 +#define CC_PC_PR_USER_DEFINED_SHIM1_OFFSET  16
20797 +#define CC_PC_PR_USER_DEFINED_SHIM2_OFFSET  17
20798 +#define CC_PC_PR_USER_LLC_SNAP_OFFSET       20
20799 +#define CC_PC_PR_VLAN1_OFFSET               21
20800 +#define CC_PC_PR_VLAN2_OFFSET               22
20801 +#define CC_PC_PR_PPPOE_OFFSET               24
20802 +#define CC_PC_PR_MPLS1_OFFSET               25
20803 +#define CC_PC_PR_MPLS_LAST_OFFSET           26
20804 +#define CC_PC_PR_IP1_OFFSET                 27
20805 +#define CC_PC_PR_IP_LAST_OFFSET             28
20806 +#define CC_PC_PR_MINENC_OFFSET              28
20807 +#define CC_PC_PR_L4_OFFSET                  30
20808 +#define CC_PC_PR_GRE_OFFSET                 29
20809 +#define CC_PC_PR_ETYPE_LAST_OFFSET          23
20810 +#define CC_PC_PR_NEXT_HEADER_OFFSET         31
20811 +
20812 +#define CC_PC_ILLEGAL                       0xff
20813 +#define CC_SIZE_ILLEGAL                     0
20814 +
20815 +#define FM_PCD_CC_KEYS_MATCH_TABLE_ALIGN    16
20816 +#define FM_PCD_CC_AD_TABLE_ALIGN            16
20817 +#define FM_PCD_CC_AD_ENTRY_SIZE             16
20818 +#define FM_PCD_CC_NUM_OF_KEYS               255
20819 +#define FM_PCD_CC_TREE_ADDR_ALIGN           256
20820 +
20821 +#define FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE   0x00000000
20822 +#define FM_PCD_AD_RESULT_DATA_FLOW_TYPE     0x80000000
20823 +#define FM_PCD_AD_RESULT_PLCR_DIS           0x20000000
20824 +#define FM_PCD_AD_RESULT_EXTENDED_MODE      0x80000000
20825 +#define FM_PCD_AD_RESULT_NADEN              0x20000000
20826 +#define FM_PCD_AD_RESULT_STATISTICS_EN      0x40000000
20827 +
20828 +#define FM_PCD_AD_CONT_LOOKUP_TYPE          0x40000000
20829 +#define FM_PCD_AD_CONT_LOOKUP_LCL_MASK      0x00800000
20830 +
20831 +#define FM_PCD_AD_STATS_TYPE                0x40000000
20832 +#define FM_PCD_AD_STATS_FLR_ADDR_MASK       0x00FFFFFF
20833 +#define FM_PCD_AD_STATS_COUNTERS_ADDR_MASK  0x00FFFFFF
20834 +#define FM_PCD_AD_STATS_NEXT_ACTION_MASK    0xFFFF0000
20835 +#define FM_PCD_AD_STATS_NEXT_ACTION_SHIFT   12
20836 +#define FM_PCD_AD_STATS_NAD_EN              0x00008000
20837 +#define FM_PCD_AD_STATS_OP_CODE             0x00000036
20838 +#define FM_PCD_AD_STATS_FLR_EN              0x00004000
20839 +#define FM_PCD_AD_STATS_COND_EN             0x00002000
20840 +
20841 +
20842 +
20843 +#define FM_PCD_AD_BYPASS_TYPE               0xc0000000
20844 +
20845 +#define FM_PCD_AD_TYPE_MASK                 0xc0000000
20846 +#define FM_PCD_AD_OPCODE_MASK               0x0000000f
20847 +
20848 +#define FM_PCD_AD_PROFILEID_FOR_CNTRL_SHIFT 16
20849 +#if (DPAA_VERSION >= 11)
20850 +#define FM_PCD_AD_RESULT_VSP_SHIFT           24
20851 +#define FM_PCD_AD_RESULT_NO_OM_VSPE          0x02000000
20852 +#define FM_PCD_AD_RESULT_VSP_MASK            0x3f
20853 +#define FM_PCD_AD_NCSPFQIDM_MASK             0x80000000
20854 +#endif /* (DPAA_VERSION >= 11) */
20855 +
20856 +#define GLBL_MASK_FOR_HASH_INDEXED          0xfff00000
20857 +#define CC_GLBL_MASK_SIZE                   4
20858 +#define CC_AGING_MASK_SIZE                  4
20859 +
20860 +typedef uint32_t ccPrivateInfo_t; /**< private info of CC: */
20861 +
20862 +#define CC_PRIVATE_INFO_NONE                       0
20863 +#define CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP       0x80000000
20864 +#define CC_PRIVATE_INFO_IC_HASH_EXACT_MATCH        0x40000000
20865 +#define CC_PRIVATE_INFO_IC_KEY_EXACT_MATCH         0x20000000
20866 +#define CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP   0x10000000
20867 +
20868 +#define CC_BUILD_AGING_MASK(numOfKeys)      ((((1LL << ((numOfKeys) + 1)) - 1)) << (31 - (numOfKeys)))
20869 +/***********************************************************************/
20870 +/*          Memory map                                                 */
20871 +/***********************************************************************/
20872 +#if defined(__MWERKS__) && !defined(__GNUC__)
20873 +#pragma pack(push,1)
20874 +#endif /* defined(__MWERKS__) && ... */
20875 +
20876 +typedef struct
20877 +{
20878 +    volatile uint32_t fqid;
20879 +    volatile uint32_t plcrProfile;
20880 +    volatile uint32_t nia;
20881 +    volatile uint32_t res;
20882 +} t_AdOfTypeResult;
20883 +
20884 +typedef struct
20885 +{
20886 +    volatile uint32_t ccAdBase;
20887 +    volatile uint32_t matchTblPtr;
20888 +    volatile uint32_t pcAndOffsets;
20889 +    volatile uint32_t gmask;
20890 +} t_AdOfTypeContLookup;
20891 +
20892 +typedef struct
20893 +{
20894 +    volatile uint32_t profileTableAddr;
20895 +    volatile uint32_t reserved;
20896 +    volatile uint32_t nextActionIndx;
20897 +    volatile uint32_t statsTableAddr;
20898 +} t_AdOfTypeStats;
20899 +
20900 +typedef union
20901 +{
20902 +    volatile t_AdOfTypeResult        adResult;
20903 +    volatile t_AdOfTypeContLookup    adContLookup;
20904 +} t_Ad;
20905 +
20906 +#if defined(__MWERKS__) && !defined(__GNUC__)
20907 +#pragma pack(pop)
20908 +#endif /* defined(__MWERKS__) && ... */
20909 +
20910 +
20911 +/***********************************************************************/
20912 +/*  Driver's internal structures                                       */
20913 +/***********************************************************************/
20914 +
20915 +typedef struct t_FmPcdStatsObj
20916 +{
20917 +    t_Handle        h_StatsAd;
20918 +    t_Handle        h_StatsCounters;
20919 +    t_List          node;
20920 +} t_FmPcdStatsObj;
20921 +
20922 +typedef struct
20923 +{
20924 +    uint8_t                     key[FM_PCD_MAX_SIZE_OF_KEY];
20925 +    uint8_t                     mask[FM_PCD_MAX_SIZE_OF_KEY];
20926 +
20927 +    t_FmPcdCcNextEngineParams   nextEngineParams;
20928 +    uint32_t                    requiredAction;
20929 +    uint32_t                    shadowAction;
20930 +
20931 +    t_FmPcdStatsObj             *p_StatsObj;
20932 +
20933 +} t_FmPcdCcKeyAndNextEngineParams;
20934 +
20935 +typedef struct
20936 +{
20937 +    t_Handle        p_Ad;
20938 +    e_FmPcdEngine   fmPcdEngine;
20939 +    bool            adAllocated;
20940 +    bool            isTree;
20941 +
20942 +    uint32_t        myInfo;
20943 +    t_List          *h_CcNextNodesLst;
20944 +    t_Handle        h_AdditionalInfo;
20945 +    t_Handle        h_Node;
20946 +} t_FmPcdModifyCcAdditionalParams;
20947 +
20948 +typedef struct
20949 +{
20950 +    t_Handle            p_AdTableNew;
20951 +    t_Handle            p_KeysMatchTableNew;
20952 +    t_Handle            p_AdTableOld;
20953 +    t_Handle            p_KeysMatchTableOld;
20954 +    uint16_t            numOfKeys;
20955 +    t_Handle            h_CurrentNode;
20956 +    uint16_t            savedKeyIndex;
20957 +    t_Handle            h_NodeForAdd;
20958 +    t_Handle            h_NodeForRmv;
20959 +    t_Handle            h_ManipForRmv;
20960 +    t_Handle            h_ManipForAdd;
20961 +    t_FmPcdStatsObj     *p_StatsObjForRmv;
20962 +#if (DPAA_VERSION >= 11)
20963 +    t_Handle            h_FrmReplicForAdd;
20964 +    t_Handle            h_FrmReplicForRmv;
20965 +#endif /* (DPAA_VERSION >= 11) */
20966 +    bool                tree;
20967 +
20968 +    t_FmPcdCcKeyAndNextEngineParams  keyAndNextEngineParams[CC_MAX_NUM_OF_KEYS];
20969 +} t_FmPcdModifyCcKeyAdditionalParams;
20970 +
20971 +typedef struct
20972 +{
20973 +    t_Handle    h_Manip;
20974 +    t_Handle    h_CcNode;
20975 +} t_CcNextEngineInfo;
20976 +
20977 +typedef struct
20978 +{
20979 +    uint16_t            numOfKeys;
20980 +    uint16_t            maxNumOfKeys;
20981 +
20982 +    bool                maskSupport;
20983 +    uint32_t            keysMatchTableMaxSize;
20984 +
20985 +    e_FmPcdCcStatsMode  statisticsMode;
20986 +    uint32_t            numOfStatsFLRs;
20987 +    uint32_t            countersArraySize;
20988 +
20989 +    bool                isHashBucket;               /**< Valid for match table node that is a bucket of a hash table only */
20990 +    t_Handle            h_MissStatsCounters;        /**< Valid for hash table node and match table that is a bucket;
20991 +                                                         Holds the statistics counters allocated by the hash table and
20992 +                                                         are shared by all hash table buckets; */
20993 +    t_Handle            h_PrivMissStatsCounters;    /**< Valid for match table node that is a bucket of a hash table only;
20994 +                                                         Holds the statistics counters that were allocated for this node
20995 +                                                         and replaced by the shared counters (allocated by the hash table); */
20996 +    bool                statsEnForMiss;             /**< Valid for hash table node only; TRUE is statistics are currently
20997 +                                                         enabled for hash 'miss', FALSE otherwise; This parameter effects the
20998 +                                                         returned statistics count to user, statistics AD always present for 'miss'
20999 +                                                         for all hash buckets; */
21000 +    bool                glblMaskUpdated;
21001 +    t_Handle            p_GlblMask;
21002 +    bool                lclMask;
21003 +    uint8_t             parseCode;
21004 +    uint8_t             offset;
21005 +    uint8_t             prsArrayOffset;
21006 +    bool                ctrlFlow;
21007 +    uint16_t            owners;
21008 +
21009 +    uint8_t             ccKeySizeAccExtraction;
21010 +    uint8_t             sizeOfExtraction;
21011 +    uint8_t             glblMaskSize;
21012 +
21013 +    t_Handle            h_KeysMatchTable;
21014 +    t_Handle            h_AdTable;
21015 +    t_Handle            h_StatsAds;
21016 +    t_Handle            h_TmpAd;
21017 +    t_Handle            h_Ad;
21018 +    t_Handle            h_StatsFLRs;
21019 +
21020 +    t_List              availableStatsLst;
21021 +
21022 +    t_List              ccPrevNodesLst;
21023 +
21024 +    t_List              ccTreeIdLst;
21025 +    t_List              ccTreesLst;
21026 +
21027 +    t_Handle            h_FmPcd;
21028 +    uint32_t            shadowAction;
21029 +    uint8_t             userSizeOfExtraction;
21030 +    uint8_t             userOffset;
21031 +    uint8_t             kgHashShift;            /* used in hash-table */
21032 +
21033 +    t_Handle            h_Spinlock;
21034 +
21035 +    t_FmPcdCcKeyAndNextEngineParams keyAndNextEngineParams[CC_MAX_NUM_OF_KEYS];
21036 +} t_FmPcdCcNode;
21037 +
21038 +typedef struct
21039 +{
21040 +    t_FmPcdCcNode       *p_FmPcdCcNode;
21041 +    bool                occupied;
21042 +    uint16_t            owners;
21043 +    volatile bool       lock;
21044 +} t_FmPcdCcNodeArray;
21045 +
21046 +typedef struct
21047 +{
21048 +    uint8_t             numOfEntriesInGroup;
21049 +    uint32_t            totalBitsMask;
21050 +    uint8_t             baseGroupEntry;
21051 +} t_FmPcdCcGroupParam;
21052 +
21053 +typedef struct
21054 +{
21055 +    t_Handle            h_FmPcd;
21056 +    uint8_t             netEnvId;
21057 +    uintptr_t           ccTreeBaseAddr;
21058 +    uint8_t             numOfGrps;
21059 +    t_FmPcdCcGroupParam fmPcdGroupParam[FM_PCD_MAX_NUM_OF_CC_GROUPS];
21060 +    t_List              fmPortsLst;
21061 +    t_FmPcdLock         *p_Lock;
21062 +    uint8_t             numOfEntries;
21063 +    uint16_t            owners;
21064 +    t_Handle            h_FmPcdCcSavedManipParams;
21065 +    bool                modifiedState;
21066 +    uint32_t            requiredAction;
21067 +    t_Handle            h_IpReassemblyManip;
21068 +    t_Handle            h_CapwapReassemblyManip;
21069 +
21070 +    t_FmPcdCcKeyAndNextEngineParams keyAndNextEngineParams[FM_PCD_MAX_NUM_OF_CC_GROUPS];
21071 +} t_FmPcdCcTree;
21072 +
21073 +
21074 +t_Error     FmPcdCcNodeTreeTryLock(t_Handle h_FmPcd,t_Handle h_FmPcdCcNode, t_List *p_List);
21075 +void        FmPcdCcNodeTreeReleaseLock(t_Handle h_FmPcd, t_List *p_List);
21076 +t_Error     FmPcdUpdateCcShadow (t_FmPcd *p_FmPcd, uint32_t size, uint32_t align);
21077 +
21078 +
21079 +#endif /* __FM_CC_H */
21080 --- /dev/null
21081 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c
21082 @@ -0,0 +1,3242 @@
21083 +/*
21084 + * Copyright 2008-2012 Freescale Semiconductor Inc.
21085 + *
21086 + * Redistribution and use in source and binary forms, with or without
21087 + * modification, are permitted provided that the following conditions are met:
21088 + *     * Redistributions of source code must retain the above copyright
21089 + *       notice, this list of conditions and the following disclaimer.
21090 + *     * Redistributions in binary form must reproduce the above copyright
21091 + *       notice, this list of conditions and the following disclaimer in the
21092 + *       documentation and/or other materials provided with the distribution.
21093 + *     * Neither the name of Freescale Semiconductor nor the
21094 + *       names of its contributors may be used to endorse or promote products
21095 + *       derived from this software without specific prior written permission.
21096 + *
21097 + *
21098 + * ALTERNATIVELY, this software may be distributed under the terms of the
21099 + * GNU General Public License ("GPL") as published by the Free Software
21100 + * Foundation, either version 2 of that License or (at your option) any
21101 + * later version.
21102 + *
21103 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
21104 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21105 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21106 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
21107 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21108 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21109 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
21110 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21111 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
21112 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21113 + */
21114 +
21115 +
21116 +/******************************************************************************
21117 + @File          fm_kg.c
21118 +
21119 + @Description   FM PCD ...
21120 +*//***************************************************************************/
21121 +#include "std_ext.h"
21122 +#include "error_ext.h"
21123 +#include "string_ext.h"
21124 +#include "debug_ext.h"
21125 +#include "net_ext.h"
21126 +#include "fm_port_ext.h"
21127 +
21128 +#include "fm_common.h"
21129 +#include "fm_pcd.h"
21130 +#include "fm_hc.h"
21131 +#include "fm_pcd_ipc.h"
21132 +#include "fm_kg.h"
21133 +#include "fsl_fman_kg.h"
21134 +
21135 +
21136 +/****************************************/
21137 +/*       static functions               */
21138 +/****************************************/
21139 +
21140 +static uint32_t KgHwLock(t_Handle h_FmPcdKg)
21141 +{
21142 +    ASSERT_COND(h_FmPcdKg);
21143 +    return XX_LockIntrSpinlock(((t_FmPcdKg *)h_FmPcdKg)->h_HwSpinlock);
21144 +}
21145 +
21146 +static void KgHwUnlock(t_Handle h_FmPcdKg, uint32_t intFlags)
21147 +{
21148 +    ASSERT_COND(h_FmPcdKg);
21149 +    XX_UnlockIntrSpinlock(((t_FmPcdKg *)h_FmPcdKg)->h_HwSpinlock, intFlags);
21150 +}
21151 +
21152 +static uint32_t KgSchemeLock(t_Handle h_Scheme)
21153 +{
21154 +    ASSERT_COND(h_Scheme);
21155 +    return FmPcdLockSpinlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock);
21156 +}
21157 +
21158 +static void KgSchemeUnlock(t_Handle h_Scheme, uint32_t intFlags)
21159 +{
21160 +    ASSERT_COND(h_Scheme);
21161 +    FmPcdUnlockSpinlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock, intFlags);
21162 +}
21163 +
21164 +static bool KgSchemeFlagTryLock(t_Handle h_Scheme)
21165 +{
21166 +    ASSERT_COND(h_Scheme);
21167 +    return FmPcdLockTryLock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock);
21168 +}
21169 +
21170 +static void KgSchemeFlagUnlock(t_Handle h_Scheme)
21171 +{
21172 +    ASSERT_COND(h_Scheme);
21173 +    FmPcdLockUnlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock);
21174 +}
21175 +
21176 +static t_Error WriteKgarWait(t_FmPcd *p_FmPcd, uint32_t fmkg_ar)
21177 +{
21178 +
21179 +    struct fman_kg_regs *regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
21180 +
21181 +    if (fman_kg_write_ar_wait(regs, fmkg_ar))
21182 +        RETURN_ERROR(MINOR, E_INVALID_STATE, ("Keygen scheme access violation"));
21183 +
21184 +    return E_OK;
21185 +}
21186 +
21187 +static e_FmPcdKgExtractDfltSelect GetGenericSwDefault(t_FmPcdKgExtractDflt swDefaults[], uint8_t numOfSwDefaults, uint8_t code)
21188 +{
21189 +    int i;
21190 +
21191 +    switch (code)
21192 +    {
21193 +        case (KG_SCH_GEN_PARSE_RESULT_N_FQID):
21194 +        case (KG_SCH_GEN_DEFAULT):
21195 +        case (KG_SCH_GEN_NEXTHDR):
21196 +            for (i=0 ; i<numOfSwDefaults ; i++)
21197 +                if (swDefaults[i].type == e_FM_PCD_KG_GENERIC_NOT_FROM_DATA)
21198 +                    return swDefaults[i].dfltSelect;
21199 +            break;
21200 +        case (KG_SCH_GEN_SHIM1):
21201 +        case (KG_SCH_GEN_SHIM2):
21202 +        case (KG_SCH_GEN_IP_PID_NO_V):
21203 +        case (KG_SCH_GEN_ETH_NO_V):
21204 +        case (KG_SCH_GEN_SNAP_NO_V):
21205 +        case (KG_SCH_GEN_VLAN1_NO_V):
21206 +        case (KG_SCH_GEN_VLAN2_NO_V):
21207 +        case (KG_SCH_GEN_ETH_TYPE_NO_V):
21208 +        case (KG_SCH_GEN_PPP_NO_V):
21209 +        case (KG_SCH_GEN_MPLS1_NO_V):
21210 +        case (KG_SCH_GEN_MPLS_LAST_NO_V):
21211 +        case (KG_SCH_GEN_L3_NO_V):
21212 +        case (KG_SCH_GEN_IP2_NO_V):
21213 +        case (KG_SCH_GEN_GRE_NO_V):
21214 +        case (KG_SCH_GEN_L4_NO_V):
21215 +            for (i=0 ; i<numOfSwDefaults ; i++)
21216 +                if (swDefaults[i].type == e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V)
21217 +                    return swDefaults[i].dfltSelect;
21218 +            break;
21219 +        case (KG_SCH_GEN_START_OF_FRM):
21220 +        case (KG_SCH_GEN_ETH):
21221 +        case (KG_SCH_GEN_SNAP):
21222 +        case (KG_SCH_GEN_VLAN1):
21223 +        case (KG_SCH_GEN_VLAN2):
21224 +        case (KG_SCH_GEN_ETH_TYPE):
21225 +        case (KG_SCH_GEN_PPP):
21226 +        case (KG_SCH_GEN_MPLS1):
21227 +        case (KG_SCH_GEN_MPLS2):
21228 +        case (KG_SCH_GEN_MPLS3):
21229 +        case (KG_SCH_GEN_MPLS_LAST):
21230 +        case (KG_SCH_GEN_IPV4):
21231 +        case (KG_SCH_GEN_IPV6):
21232 +        case (KG_SCH_GEN_IPV4_TUNNELED):
21233 +        case (KG_SCH_GEN_IPV6_TUNNELED):
21234 +        case (KG_SCH_GEN_MIN_ENCAP):
21235 +        case (KG_SCH_GEN_GRE):
21236 +        case (KG_SCH_GEN_TCP):
21237 +        case (KG_SCH_GEN_UDP):
21238 +        case (KG_SCH_GEN_IPSEC_AH):
21239 +        case (KG_SCH_GEN_SCTP):
21240 +        case (KG_SCH_GEN_DCCP):
21241 +        case (KG_SCH_GEN_IPSEC_ESP):
21242 +            for (i=0 ; i<numOfSwDefaults ; i++)
21243 +                if (swDefaults[i].type == e_FM_PCD_KG_GENERIC_FROM_DATA)
21244 +                    return swDefaults[i].dfltSelect;
21245 +            break;
21246 +        default:
21247 +            break;
21248 +    }
21249 +
21250 +    return e_FM_PCD_KG_DFLT_ILLEGAL;
21251 +}
21252 +
21253 +static uint8_t GetGenCode(e_FmPcdExtractFrom src, uint8_t *p_Offset)
21254 +{
21255 +    *p_Offset = 0;
21256 +
21257 +    switch (src)
21258 +    {
21259 +        case (e_FM_PCD_EXTRACT_FROM_FRAME_START):
21260 +            return KG_SCH_GEN_START_OF_FRM;
21261 +        case (e_FM_PCD_EXTRACT_FROM_DFLT_VALUE):
21262 +            return KG_SCH_GEN_DEFAULT;
21263 +        case (e_FM_PCD_EXTRACT_FROM_PARSE_RESULT):
21264 +            return KG_SCH_GEN_PARSE_RESULT_N_FQID;
21265 +        case (e_FM_PCD_EXTRACT_FROM_ENQ_FQID):
21266 +            *p_Offset = 32;
21267 +            return KG_SCH_GEN_PARSE_RESULT_N_FQID;
21268 +        case (e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE):
21269 +            return KG_SCH_GEN_NEXTHDR;
21270 +        default:
21271 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 'extract from' src"));
21272 +            return 0;
21273 +    }
21274 +}
21275 +
21276 +static uint8_t GetGenHdrCode(e_NetHeaderType hdr, e_FmPcdHdrIndex hdrIndex, bool ignoreProtocolValidation)
21277 +{
21278 +    if (!ignoreProtocolValidation)
21279 +        switch (hdr)
21280 +        {
21281 +            case (HEADER_TYPE_NONE):
21282 +                ASSERT_COND(FALSE);
21283 +            case (HEADER_TYPE_ETH):
21284 +                return KG_SCH_GEN_ETH;
21285 +            case (HEADER_TYPE_LLC_SNAP):
21286 +                return KG_SCH_GEN_SNAP;
21287 +            case (HEADER_TYPE_PPPoE):
21288 +                return KG_SCH_GEN_PPP;
21289 +            case (HEADER_TYPE_MPLS):
21290 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21291 +                    return KG_SCH_GEN_MPLS1;
21292 +                if (hdrIndex == e_FM_PCD_HDR_INDEX_2)
21293 +                    return KG_SCH_GEN_MPLS2;
21294 +                if (hdrIndex == e_FM_PCD_HDR_INDEX_3)
21295 +                    return KG_SCH_GEN_MPLS3;
21296 +                if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
21297 +                    return KG_SCH_GEN_MPLS_LAST;
21298 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS header index"));
21299 +                return 0;
21300 +            case (HEADER_TYPE_IPv4):
21301 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21302 +                    return KG_SCH_GEN_IPV4;
21303 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_LAST))
21304 +                    return KG_SCH_GEN_IPV4_TUNNELED;
21305 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 header index"));
21306 +                return 0;
21307 +            case (HEADER_TYPE_IPv6):
21308 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21309 +                    return KG_SCH_GEN_IPV6;
21310 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_LAST))
21311 +                    return KG_SCH_GEN_IPV6_TUNNELED;
21312 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 header index"));
21313 +                return 0;
21314 +            case (HEADER_TYPE_GRE):
21315 +                return KG_SCH_GEN_GRE;
21316 +            case (HEADER_TYPE_TCP):
21317 +                return KG_SCH_GEN_TCP;
21318 +            case (HEADER_TYPE_UDP):
21319 +                return KG_SCH_GEN_UDP;
21320 +            case (HEADER_TYPE_IPSEC_AH):
21321 +                return KG_SCH_GEN_IPSEC_AH;
21322 +            case (HEADER_TYPE_IPSEC_ESP):
21323 +                return KG_SCH_GEN_IPSEC_ESP;
21324 +            case (HEADER_TYPE_SCTP):
21325 +                return KG_SCH_GEN_SCTP;
21326 +            case (HEADER_TYPE_DCCP):
21327 +                return KG_SCH_GEN_DCCP;
21328 +            default:
21329 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21330 +                return 0;
21331 +        }
21332 +    else
21333 +        switch (hdr)
21334 +        {
21335 +            case (HEADER_TYPE_NONE):
21336 +                ASSERT_COND(FALSE);
21337 +            case (HEADER_TYPE_ETH):
21338 +                return KG_SCH_GEN_ETH_NO_V;
21339 +            case (HEADER_TYPE_LLC_SNAP):
21340 +                return KG_SCH_GEN_SNAP_NO_V;
21341 +            case (HEADER_TYPE_PPPoE):
21342 +                return KG_SCH_GEN_PPP_NO_V;
21343 +            case (HEADER_TYPE_MPLS):
21344 +                 if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21345 +                    return KG_SCH_GEN_MPLS1_NO_V;
21346 +                if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
21347 +                    return KG_SCH_GEN_MPLS_LAST_NO_V;
21348 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_3) )
21349 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Indexed MPLS Extraction not supported"));
21350 +                else
21351 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS header index"));
21352 +                return 0;
21353 +            case (HEADER_TYPE_IPv4):
21354 +            case (HEADER_TYPE_IPv6):
21355 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21356 +                    return KG_SCH_GEN_L3_NO_V;
21357 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_LAST))
21358 +                    return KG_SCH_GEN_IP2_NO_V;
21359 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP header index"));
21360 +            case (HEADER_TYPE_MINENCAP):
21361 +                return KG_SCH_GEN_IP2_NO_V;
21362 +            case (HEADER_TYPE_USER_DEFINED_L3):
21363 +                return KG_SCH_GEN_L3_NO_V;
21364 +            case (HEADER_TYPE_GRE):
21365 +                return KG_SCH_GEN_GRE_NO_V;
21366 +            case (HEADER_TYPE_TCP):
21367 +            case (HEADER_TYPE_UDP):
21368 +            case (HEADER_TYPE_IPSEC_AH):
21369 +            case (HEADER_TYPE_IPSEC_ESP):
21370 +            case (HEADER_TYPE_SCTP):
21371 +            case (HEADER_TYPE_DCCP):
21372 +                return KG_SCH_GEN_L4_NO_V;
21373 +            case (HEADER_TYPE_USER_DEFINED_SHIM1):
21374 +                return KG_SCH_GEN_SHIM1;
21375 +            case (HEADER_TYPE_USER_DEFINED_SHIM2):
21376 +                return KG_SCH_GEN_SHIM2;
21377 +            default:
21378 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21379 +                return 0;
21380 +        }
21381 +}
21382 +static t_GenericCodes GetGenFieldCode(e_NetHeaderType hdr, t_FmPcdFields field, bool ignoreProtocolValidation, e_FmPcdHdrIndex hdrIndex)
21383 +{
21384 +    if (!ignoreProtocolValidation)
21385 +        switch (hdr)
21386 +        {
21387 +            case (HEADER_TYPE_NONE):
21388 +                ASSERT_COND(FALSE);
21389 +                break;
21390 +            case (HEADER_TYPE_ETH):
21391 +                switch (field.eth)
21392 +                {
21393 +                    case (NET_HEADER_FIELD_ETH_TYPE):
21394 +                        return KG_SCH_GEN_ETH_TYPE;
21395 +                    default:
21396 +                        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21397 +                        return 0;
21398 +                }
21399 +                break;
21400 +            case (HEADER_TYPE_VLAN):
21401 +                switch (field.vlan)
21402 +                {
21403 +                    case (NET_HEADER_FIELD_VLAN_TCI):
21404 +                        if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21405 +                            return KG_SCH_GEN_VLAN1;
21406 +                        if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
21407 +                            return KG_SCH_GEN_VLAN2;
21408 +                        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal VLAN header index"));
21409 +                        return 0;
21410 +                }
21411 +                break;
21412 +            case (HEADER_TYPE_MPLS):
21413 +            case (HEADER_TYPE_IPSEC_AH):
21414 +            case (HEADER_TYPE_IPSEC_ESP):
21415 +            case (HEADER_TYPE_LLC_SNAP):
21416 +            case (HEADER_TYPE_PPPoE):
21417 +            case (HEADER_TYPE_IPv4):
21418 +            case (HEADER_TYPE_IPv6):
21419 +            case (HEADER_TYPE_GRE):
21420 +            case (HEADER_TYPE_MINENCAP):
21421 +            case (HEADER_TYPE_USER_DEFINED_L3):
21422 +            case (HEADER_TYPE_TCP):
21423 +            case (HEADER_TYPE_UDP):
21424 +            case (HEADER_TYPE_SCTP):
21425 +            case (HEADER_TYPE_DCCP):
21426 +            case (HEADER_TYPE_USER_DEFINED_L4):
21427 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21428 +                return 0;
21429 +            default:
21430 +                break;
21431 +
21432 +        }
21433 +        else
21434 +            switch (hdr)
21435 +            {
21436 +                case (HEADER_TYPE_NONE):
21437 +                    ASSERT_COND(FALSE);
21438 +                    break;
21439 +                case (HEADER_TYPE_ETH):
21440 +                    switch (field.eth)
21441 +                    {
21442 +                        case (NET_HEADER_FIELD_ETH_TYPE):
21443 +                            return KG_SCH_GEN_ETH_TYPE_NO_V;
21444 +                        default:
21445 +                            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21446 +                            return 0;
21447 +                    }
21448 +                    break;
21449 +                case (HEADER_TYPE_VLAN):
21450 +                    switch (field.vlan)
21451 +                    {
21452 +                        case (NET_HEADER_FIELD_VLAN_TCI) :
21453 +                            if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
21454 +                                return KG_SCH_GEN_VLAN1_NO_V;
21455 +                            if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
21456 +                                return KG_SCH_GEN_VLAN2_NO_V;
21457 +                            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal VLAN header index"));
21458 +                            return 0;
21459 +                    }
21460 +                    break;
21461 +                case (HEADER_TYPE_IPv4):
21462 +                    switch (field.ipv4)
21463 +                    {
21464 +                        case (NET_HEADER_FIELD_IPv4_PROTO):
21465 +                            return KG_SCH_GEN_IP_PID_NO_V;
21466 +                        default:
21467 +                            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21468 +                            return 0;
21469 +                    }
21470 +                    break;
21471 +                case (HEADER_TYPE_IPv6):
21472 +                   switch (field.ipv6)
21473 +                    {
21474 +                        case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
21475 +                            return KG_SCH_GEN_IP_PID_NO_V;
21476 +                        default:
21477 +                            REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21478 +                            return 0;
21479 +                    }
21480 +                    break;
21481 +                case (HEADER_TYPE_MPLS):
21482 +                case (HEADER_TYPE_LLC_SNAP):
21483 +                case (HEADER_TYPE_PPPoE):
21484 +                case (HEADER_TYPE_GRE):
21485 +                case (HEADER_TYPE_MINENCAP):
21486 +                case (HEADER_TYPE_USER_DEFINED_L3):
21487 +                case (HEADER_TYPE_TCP):
21488 +                case (HEADER_TYPE_UDP):
21489 +                case (HEADER_TYPE_IPSEC_AH):
21490 +                case (HEADER_TYPE_IPSEC_ESP):
21491 +                case (HEADER_TYPE_SCTP):
21492 +                case (HEADER_TYPE_DCCP):
21493 +                case (HEADER_TYPE_USER_DEFINED_L4):
21494 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21495 +                    return 0;
21496 +                default:
21497 +                    break;
21498 +            }
21499 +    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Header not supported"));
21500 +    return 0;
21501 +}
21502 +
21503 +static t_KnownFieldsMasks GetKnownProtMask(t_FmPcd *p_FmPcd, e_NetHeaderType hdr, e_FmPcdHdrIndex index, t_FmPcdFields field)
21504 +{
21505 +    UNUSED(p_FmPcd);
21506 +
21507 +    switch (hdr)
21508 +    {
21509 +        case (HEADER_TYPE_NONE):
21510 +            ASSERT_COND(FALSE);
21511 +            break;
21512 +        case (HEADER_TYPE_ETH):
21513 +            switch (field.eth)
21514 +            {
21515 +                case (NET_HEADER_FIELD_ETH_DA):
21516 +                    return KG_SCH_KN_MACDST;
21517 +                case (NET_HEADER_FIELD_ETH_SA):
21518 +                    return KG_SCH_KN_MACSRC;
21519 +                case (NET_HEADER_FIELD_ETH_TYPE):
21520 +                    return KG_SCH_KN_ETYPE;
21521 +                default:
21522 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21523 +                    return 0;
21524 +            }
21525 +        case (HEADER_TYPE_LLC_SNAP):
21526 +            switch (field.llcSnap)
21527 +            {
21528 +                case (NET_HEADER_FIELD_LLC_SNAP_TYPE):
21529 +                    return KG_SCH_KN_ETYPE;
21530 +                default:
21531 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21532 +                    return 0;
21533 +            }
21534 +        case (HEADER_TYPE_VLAN):
21535 +            switch (field.vlan)
21536 +            {
21537 +                case (NET_HEADER_FIELD_VLAN_TCI):
21538 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21539 +                        return KG_SCH_KN_TCI1;
21540 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
21541 +                        return KG_SCH_KN_TCI2;
21542 +                    else
21543 +                    {
21544 +                        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21545 +                        return 0;
21546 +                    }
21547 +                default:
21548 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21549 +                    return 0;
21550 +            }
21551 +        case (HEADER_TYPE_MPLS):
21552 +            switch (field.mpls)
21553 +            {
21554 +                case (NET_HEADER_FIELD_MPLS_LABEL_STACK):
21555 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21556 +                        return KG_SCH_KN_MPLS1;
21557 +                    if (index == e_FM_PCD_HDR_INDEX_2)
21558 +                        return KG_SCH_KN_MPLS2;
21559 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
21560 +                        return KG_SCH_KN_MPLS_LAST;
21561 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS index"));
21562 +                    return 0;
21563 +                default:
21564 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21565 +                    return 0;
21566 +            }
21567 +        case (HEADER_TYPE_IPv4):
21568 +            switch (field.ipv4)
21569 +            {
21570 +                case (NET_HEADER_FIELD_IPv4_SRC_IP):
21571 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21572 +                        return KG_SCH_KN_IPSRC1;
21573 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21574 +                        return KG_SCH_KN_IPSRC2;
21575 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
21576 +                    return 0;
21577 +                case (NET_HEADER_FIELD_IPv4_DST_IP):
21578 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21579 +                        return KG_SCH_KN_IPDST1;
21580 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21581 +                        return KG_SCH_KN_IPDST2;
21582 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
21583 +                    return 0;
21584 +                case (NET_HEADER_FIELD_IPv4_PROTO):
21585 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21586 +                        return KG_SCH_KN_PTYPE1;
21587 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21588 +                        return KG_SCH_KN_PTYPE2;
21589 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
21590 +                    return 0;
21591 +                case (NET_HEADER_FIELD_IPv4_TOS):
21592 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21593 +                        return KG_SCH_KN_IPTOS_TC1;
21594 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21595 +                        return KG_SCH_KN_IPTOS_TC2;
21596 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
21597 +                    return 0;
21598 +                default:
21599 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21600 +                    return 0;
21601 +            }
21602 +        case (HEADER_TYPE_IPv6):
21603 +             switch (field.ipv6)
21604 +            {
21605 +                case (NET_HEADER_FIELD_IPv6_SRC_IP):
21606 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21607 +                        return KG_SCH_KN_IPSRC1;
21608 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21609 +                        return KG_SCH_KN_IPSRC2;
21610 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
21611 +                    return 0;
21612 +                case (NET_HEADER_FIELD_IPv6_DST_IP):
21613 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21614 +                        return KG_SCH_KN_IPDST1;
21615 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21616 +                        return KG_SCH_KN_IPDST2;
21617 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
21618 +                    return 0;
21619 +                case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
21620 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21621 +                        return KG_SCH_KN_PTYPE1;
21622 +                    if (index == e_FM_PCD_HDR_INDEX_2)
21623 +                        return KG_SCH_KN_PTYPE2;
21624 +                    if (index == e_FM_PCD_HDR_INDEX_LAST)
21625 +#ifdef FM_KG_NO_IPPID_SUPPORT
21626 +                    if (p_FmPcd->fmRevInfo.majorRev < 6)
21627 +                        return KG_SCH_KN_PTYPE2;
21628 +#endif /* FM_KG_NO_IPPID_SUPPORT */
21629 +                        return KG_SCH_KN_IPPID;
21630 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
21631 +                    return 0;
21632 +                case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL | NET_HEADER_FIELD_IPv6_TC):
21633 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21634 +                        return (KG_SCH_KN_IPV6FL1 | KG_SCH_KN_IPTOS_TC1);
21635 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21636 +                        return (KG_SCH_KN_IPV6FL2 | KG_SCH_KN_IPTOS_TC2);
21637 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
21638 +                    return 0;
21639 +                case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_TC):
21640 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21641 +                        return KG_SCH_KN_IPTOS_TC1;
21642 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21643 +                        return KG_SCH_KN_IPTOS_TC2;
21644 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
21645 +                    return 0;
21646 +                case (NET_HEADER_FIELD_IPv6_FL):
21647 +                    if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
21648 +                        return KG_SCH_KN_IPV6FL1;
21649 +                    if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
21650 +                        return KG_SCH_KN_IPV6FL2;
21651 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
21652 +                    return 0;
21653 +                default:
21654 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21655 +                    return 0;
21656 +            }
21657 +        case (HEADER_TYPE_GRE):
21658 +            switch (field.gre)
21659 +            {
21660 +                case (NET_HEADER_FIELD_GRE_TYPE):
21661 +                    return KG_SCH_KN_GREPTYPE;
21662 +                default:
21663 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21664 +                    return 0;
21665 +            }
21666 +        case (HEADER_TYPE_MINENCAP):
21667 +            switch (field.minencap)
21668 +            {
21669 +                case (NET_HEADER_FIELD_MINENCAP_SRC_IP):
21670 +                    return KG_SCH_KN_IPSRC2;
21671 +                case (NET_HEADER_FIELD_MINENCAP_DST_IP):
21672 +                    return KG_SCH_KN_IPDST2;
21673 +                case (NET_HEADER_FIELD_MINENCAP_TYPE):
21674 +                    return KG_SCH_KN_PTYPE2;
21675 +                default:
21676 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21677 +                    return 0;
21678 +            }
21679 +        case (HEADER_TYPE_TCP):
21680 +            switch (field.tcp)
21681 +            {
21682 +                case (NET_HEADER_FIELD_TCP_PORT_SRC):
21683 +                    return KG_SCH_KN_L4PSRC;
21684 +                case (NET_HEADER_FIELD_TCP_PORT_DST):
21685 +                    return KG_SCH_KN_L4PDST;
21686 +                case (NET_HEADER_FIELD_TCP_FLAGS):
21687 +                    return KG_SCH_KN_TFLG;
21688 +                default:
21689 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21690 +                    return 0;
21691 +            }
21692 +        case (HEADER_TYPE_UDP):
21693 +            switch (field.udp)
21694 +            {
21695 +                case (NET_HEADER_FIELD_UDP_PORT_SRC):
21696 +                    return KG_SCH_KN_L4PSRC;
21697 +                case (NET_HEADER_FIELD_UDP_PORT_DST):
21698 +                    return KG_SCH_KN_L4PDST;
21699 +                default:
21700 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21701 +                    return 0;
21702 +            }
21703 +        case (HEADER_TYPE_IPSEC_AH):
21704 +            switch (field.ipsecAh)
21705 +            {
21706 +                case (NET_HEADER_FIELD_IPSEC_AH_SPI):
21707 +                    return KG_SCH_KN_IPSEC_SPI;
21708 +                case (NET_HEADER_FIELD_IPSEC_AH_NH):
21709 +                    return KG_SCH_KN_IPSEC_NH;
21710 +                default:
21711 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21712 +                    return 0;
21713 +            }
21714 +        case (HEADER_TYPE_IPSEC_ESP):
21715 +            switch (field.ipsecEsp)
21716 +            {
21717 +                case (NET_HEADER_FIELD_IPSEC_ESP_SPI):
21718 +                    return KG_SCH_KN_IPSEC_SPI;
21719 +                default:
21720 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21721 +                    return 0;
21722 +            }
21723 +        case (HEADER_TYPE_SCTP):
21724 +            switch (field.sctp)
21725 +            {
21726 +                case (NET_HEADER_FIELD_SCTP_PORT_SRC):
21727 +                    return KG_SCH_KN_L4PSRC;
21728 +                case (NET_HEADER_FIELD_SCTP_PORT_DST):
21729 +                    return KG_SCH_KN_L4PDST;
21730 +                default:
21731 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21732 +                    return 0;
21733 +            }
21734 +        case (HEADER_TYPE_DCCP):
21735 +            switch (field.dccp)
21736 +            {
21737 +                case (NET_HEADER_FIELD_DCCP_PORT_SRC):
21738 +                    return KG_SCH_KN_L4PSRC;
21739 +                case (NET_HEADER_FIELD_DCCP_PORT_DST):
21740 +                    return KG_SCH_KN_L4PDST;
21741 +                default:
21742 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21743 +                    return 0;
21744 +            }
21745 +        case (HEADER_TYPE_PPPoE):
21746 +            switch (field.pppoe)
21747 +            {
21748 +                case (NET_HEADER_FIELD_PPPoE_PID):
21749 +                    return KG_SCH_KN_PPPID;
21750 +                case (NET_HEADER_FIELD_PPPoE_SID):
21751 +                    return KG_SCH_KN_PPPSID;
21752 +                default:
21753 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21754 +                    return 0;
21755 +            }
21756 +        default:
21757 +            break;
21758 +
21759 +    }
21760 +
21761 +    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
21762 +    return 0;
21763 +}
21764 +
21765 +
21766 +static uint8_t GetKnownFieldId(uint32_t bitMask)
21767 +{
21768 +    uint8_t cnt = 0;
21769 +
21770 +    while (bitMask)
21771 +        if (bitMask & 0x80000000)
21772 +            break;
21773 +        else
21774 +        {
21775 +            cnt++;
21776 +            bitMask <<= 1;
21777 +        }
21778 +    return cnt;
21779 +
21780 +}
21781 +
21782 +static uint8_t GetExtractedOrMask(uint8_t bitOffset, bool fqid)
21783 +{
21784 +    uint8_t i, mask, numOfOnesToClear, walking1Mask = 1;
21785 +
21786 +    /* bitOffset 1-7 --> mask 0x1-0x7F */
21787 +    if (bitOffset<8)
21788 +    {
21789 +        mask = 0;
21790 +        for (i = 0 ; i < bitOffset ; i++, walking1Mask <<= 1)
21791 +            mask |= walking1Mask;
21792 +    }
21793 +    else
21794 +    {
21795 +       mask = 0xFF;
21796 +       numOfOnesToClear = 0;
21797 +       if (fqid && bitOffset>24)
21798 +           /* bitOffset 25-31 --> mask 0xFE-0x80 */
21799 +           numOfOnesToClear = (uint8_t)(bitOffset-24);
21800 +       else
21801 +          /* bitOffset 9-15 --> mask 0xFE-0x80 */
21802 +          if (!fqid && bitOffset>8)
21803 +               numOfOnesToClear = (uint8_t)(bitOffset-8);
21804 +       for (i = 0 ; i < numOfOnesToClear ; i++, walking1Mask <<= 1)
21805 +           mask &= ~walking1Mask;
21806 +       /* bitOffset 8-24 for FQID, 8 for PP --> no mask (0xFF)*/
21807 +    }
21808 +    return mask;
21809 +}
21810 +
21811 +static void IncSchemeOwners(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_BindPort)
21812 +{
21813 +    t_FmPcdKg           *p_FmPcdKg;
21814 +    t_FmPcdKgScheme     *p_Scheme;
21815 +    uint32_t            intFlags;
21816 +    uint8_t             relativeSchemeId;
21817 +    int                 i;
21818 +
21819 +    p_FmPcdKg = p_FmPcd->p_FmPcdKg;
21820 +
21821 +    /* for each scheme - update owners counters */
21822 +    for (i = 0; i < p_BindPort->numOfSchemes; i++)
21823 +    {
21824 +        relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, p_BindPort->schemesIds[i]);
21825 +        ASSERT_COND(relativeSchemeId < FM_PCD_KG_NUM_OF_SCHEMES);
21826 +
21827 +        p_Scheme = &p_FmPcdKg->schemes[relativeSchemeId];
21828 +
21829 +        /* increment owners number */
21830 +        intFlags = KgSchemeLock(p_Scheme);
21831 +        p_Scheme->owners++;
21832 +        KgSchemeUnlock(p_Scheme, intFlags);
21833 +    }
21834 +}
21835 +
21836 +static void DecSchemeOwners(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_BindPort)
21837 +{
21838 +    t_FmPcdKg           *p_FmPcdKg;
21839 +    t_FmPcdKgScheme     *p_Scheme;
21840 +    uint32_t            intFlags;
21841 +    uint8_t             relativeSchemeId;
21842 +    int                 i;
21843 +
21844 +    p_FmPcdKg = p_FmPcd->p_FmPcdKg;
21845 +
21846 +    /* for each scheme - update owners counters */
21847 +    for (i = 0; i < p_BindPort->numOfSchemes; i++)
21848 +    {
21849 +        relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, p_BindPort->schemesIds[i]);
21850 +        ASSERT_COND(relativeSchemeId < FM_PCD_KG_NUM_OF_SCHEMES);
21851 +
21852 +        p_Scheme = &p_FmPcdKg->schemes[relativeSchemeId];
21853 +
21854 +        /* increment owners number */
21855 +        ASSERT_COND(p_Scheme->owners);
21856 +        intFlags = KgSchemeLock(p_Scheme);
21857 +        p_Scheme->owners--;
21858 +        KgSchemeUnlock(p_Scheme, intFlags);
21859 +    }
21860 +}
21861 +
21862 +static void UpdateRequiredActionFlag(t_FmPcdKgScheme *p_Scheme, bool set)
21863 +{
21864 +    /* this routine is locked by the calling routine */
21865 +    ASSERT_COND(p_Scheme);
21866 +    ASSERT_COND(p_Scheme->valid);
21867 +
21868 +    if (set)
21869 +        p_Scheme->requiredActionFlag = TRUE;
21870 +    else
21871 +    {
21872 +        p_Scheme->requiredAction = 0;
21873 +        p_Scheme->requiredActionFlag = FALSE;
21874 +    }
21875 +}
21876 +
21877 +static t_Error KgWriteSp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, uint32_t spReg, bool add)
21878 +{
21879 +    struct fman_kg_regs *p_KgRegs;
21880 +
21881 +    uint32_t                tmpKgarReg = 0, intFlags;
21882 +    t_Error                 err = E_OK;
21883 +
21884 +    /* The calling routine had locked the port, so for each port only one core can access
21885 +     * (so we don't need a lock here) */
21886 +
21887 +    if (p_FmPcd->h_Hc)
21888 +        return FmHcKgWriteSp(p_FmPcd->h_Hc, hardwarePortId, spReg, add);
21889 +
21890 +    p_KgRegs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
21891 +
21892 +    tmpKgarReg = FmPcdKgBuildReadPortSchemeBindActionReg(hardwarePortId);
21893 +    /* lock a common KG reg */
21894 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
21895 +    err = WriteKgarWait(p_FmPcd, tmpKgarReg);
21896 +    if (err)
21897 +    {
21898 +        KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
21899 +        RETURN_ERROR(MINOR, err, NO_MSG);
21900 +    }
21901 +
21902 +    fman_kg_write_sp(p_KgRegs, spReg, add);
21903 +
21904 +    tmpKgarReg = FmPcdKgBuildWritePortSchemeBindActionReg(hardwarePortId);
21905 +
21906 +    err = WriteKgarWait(p_FmPcd, tmpKgarReg);
21907 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
21908 +    return err;
21909 +}
21910 +
21911 +static t_Error KgWriteCpp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, uint32_t cppReg)
21912 +{
21913 +    struct fman_kg_regs    *p_KgRegs;
21914 +    uint32_t                tmpKgarReg, intFlags;
21915 +    t_Error                 err;
21916 +
21917 +    p_KgRegs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
21918 +
21919 +    if (p_FmPcd->h_Hc)
21920 +    {
21921 +        err = FmHcKgWriteCpp(p_FmPcd->h_Hc, hardwarePortId, cppReg);
21922 +        return err;
21923 +    }
21924 +
21925 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
21926 +    fman_kg_write_cpp(p_KgRegs, cppReg);
21927 +    tmpKgarReg = FmPcdKgBuildWritePortClsPlanBindActionReg(hardwarePortId);
21928 +    err = WriteKgarWait(p_FmPcd, tmpKgarReg);
21929 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
21930 +
21931 +    return err;
21932 +}
21933 +
21934 +static uint32_t BuildCppReg(t_FmPcd *p_FmPcd, uint8_t clsPlanGrpId)
21935 +{
21936 +    uint32_t    tmpKgpeCpp;
21937 +
21938 +    tmpKgpeCpp = (uint32_t)(p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].baseEntry / 8);
21939 +    tmpKgpeCpp |= (uint32_t)(((p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].sizeOfGrp / 8) - 1) << FM_KG_PE_CPP_MASK_SHIFT);
21940 +
21941 +    return tmpKgpeCpp;
21942 +}
21943 +
21944 +static t_Error BindPortToClsPlanGrp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId)
21945 +{
21946 +    uint32_t                tmpKgpeCpp = 0;
21947 +
21948 +    tmpKgpeCpp = BuildCppReg(p_FmPcd, clsPlanGrpId);
21949 +    return KgWriteCpp(p_FmPcd, hardwarePortId, tmpKgpeCpp);
21950 +}
21951 +
21952 +static void UnbindPortToClsPlanGrp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId)
21953 +{
21954 +    KgWriteCpp(p_FmPcd, hardwarePortId, 0);
21955 +}
21956 +
21957 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
21958 +static uint32_t __attribute__((unused)) ReadClsPlanBlockActionReg(uint8_t grpId)
21959 +{
21960 +    return (uint32_t)(FM_KG_KGAR_GO |
21961 +                      FM_KG_KGAR_READ |
21962 +                      FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
21963 +                      DUMMY_PORT_ID |
21964 +                      ((uint32_t)grpId << FM_PCD_KG_KGAR_NUM_SHIFT) |
21965 +                      FM_PCD_KG_KGAR_WSEL_MASK);
21966 +
21967 +    /* if we ever want to write 1 by 1, use:
21968 +       sel = (uint8_t)(0x01 << (7- (entryId % CLS_PLAN_NUM_PER_GRP)));
21969 +     */
21970 +}
21971 +#endif /* (defined(DEBUG_ERRORS) && ... */
21972 +
21973 +static void PcdKgErrorException(t_Handle h_FmPcd)
21974 +{
21975 +    t_FmPcd                 *p_FmPcd = (t_FmPcd *)h_FmPcd;
21976 +    uint32_t                event,schemeIndexes = 0, index = 0;
21977 +    struct fman_kg_regs    *p_KgRegs;
21978 +
21979 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
21980 +    p_KgRegs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
21981 +    fman_kg_get_event(p_KgRegs, &event, &schemeIndexes);
21982 +
21983 +    if (event & FM_EX_KG_DOUBLE_ECC)
21984 +        p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC);
21985 +    if (event & FM_EX_KG_KEYSIZE_OVERFLOW)
21986 +    {
21987 +        if (schemeIndexes)
21988 +        {
21989 +            while (schemeIndexes)
21990 +            {
21991 +                if (schemeIndexes & 0x1)
21992 +                    p_FmPcd->f_FmPcdIndexedException(p_FmPcd->h_App,e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW, (uint16_t)(31 - index));
21993 +                schemeIndexes >>= 1;
21994 +                index+=1;
21995 +            }
21996 +        }
21997 +        else /* this should happen only when interrupt is forced. */
21998 +            p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW);
21999 +    }
22000 +}
22001 +
22002 +static t_Error KgInitGuest(t_FmPcd *p_FmPcd)
22003 +{
22004 +    t_Error                     err = E_OK;
22005 +    t_FmPcdIpcKgSchemesParams   kgAlloc;
22006 +    uint32_t                    replyLength;
22007 +    t_FmPcdIpcReply             reply;
22008 +    t_FmPcdIpcMsg               msg;
22009 +
22010 +    ASSERT_COND(p_FmPcd->guestId != NCSW_MASTER_ID);
22011 +
22012 +    /* in GUEST_PARTITION, we use the IPC  */
22013 +    memset(&reply, 0, sizeof(reply));
22014 +    memset(&msg, 0, sizeof(msg));
22015 +    memset(&kgAlloc, 0, sizeof(t_FmPcdIpcKgSchemesParams));
22016 +    kgAlloc.numOfSchemes = p_FmPcd->p_FmPcdKg->numOfSchemes;
22017 +    kgAlloc.guestId = p_FmPcd->guestId;
22018 +    msg.msgId = FM_PCD_ALLOC_KG_SCHEMES;
22019 +    memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
22020 +    replyLength = sizeof(uint32_t) + p_FmPcd->p_FmPcdKg->numOfSchemes*sizeof(uint8_t);
22021 +    if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
22022 +                                 (uint8_t*)&msg,
22023 +                                 sizeof(msg.msgId) + sizeof(kgAlloc),
22024 +                                 (uint8_t*)&reply,
22025 +                                 &replyLength,
22026 +                                 NULL,
22027 +                                 NULL)) != E_OK)
22028 +        RETURN_ERROR(MAJOR, err, NO_MSG);
22029 +    if (replyLength != (sizeof(uint32_t) + p_FmPcd->p_FmPcdKg->numOfSchemes*sizeof(uint8_t)))
22030 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
22031 +    memcpy(p_FmPcd->p_FmPcdKg->schemesIds, (uint8_t*)(reply.replyBody),p_FmPcd->p_FmPcdKg->numOfSchemes*sizeof(uint8_t));
22032 +
22033 +    return (t_Error)reply.error;
22034 +}
22035 +
22036 +static t_Error KgInitMaster(t_FmPcd *p_FmPcd)
22037 +{
22038 +    t_Error                     err = E_OK;
22039 +    struct fman_kg_regs         *p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
22040 +
22041 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
22042 +
22043 +    if (p_FmPcd->exceptions & FM_EX_KG_DOUBLE_ECC)
22044 +        FmEnableRamsEcc(p_FmPcd->h_Fm);
22045 +
22046 +    fman_kg_init(p_Regs, p_FmPcd->exceptions, GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd));
22047 +
22048 +    /* register even if no interrupts enabled, to allow future enablement */
22049 +    FmRegisterIntr(p_FmPcd->h_Fm,
22050 +                   e_FM_MOD_KG,
22051 +                   0,
22052 +                   e_FM_INTR_TYPE_ERR,
22053 +                   PcdKgErrorException,
22054 +                   p_FmPcd);
22055 +
22056 +    fman_kg_enable_scheme_interrupts(p_Regs);
22057 +
22058 +    if (p_FmPcd->p_FmPcdKg->numOfSchemes)
22059 +    {
22060 +        err = FmPcdKgAllocSchemes(p_FmPcd,
22061 +                                  p_FmPcd->p_FmPcdKg->numOfSchemes,
22062 +                                  p_FmPcd->guestId,
22063 +                                  p_FmPcd->p_FmPcdKg->schemesIds);
22064 +        if (err)
22065 +            RETURN_ERROR(MINOR, err, NO_MSG);
22066 +    }
22067 +
22068 +    return E_OK;
22069 +}
22070 +
22071 +static void  ValidateSchemeSw(t_FmPcdKgScheme *p_Scheme)
22072 +{
22073 +    ASSERT_COND(!p_Scheme->valid);
22074 +    if (p_Scheme->netEnvId != ILLEGAL_NETENV)
22075 +        FmPcdIncNetEnvOwners(p_Scheme->h_FmPcd, p_Scheme->netEnvId);
22076 +    p_Scheme->valid = TRUE;
22077 +}
22078 +
22079 +static t_Error InvalidateSchemeSw(t_FmPcdKgScheme *p_Scheme)
22080 +{
22081 +    if (p_Scheme->owners)
22082 +       RETURN_ERROR(MINOR, E_INVALID_STATE, ("Trying to delete a scheme that has ports bound to"));
22083 +
22084 +    if (p_Scheme->netEnvId != ILLEGAL_NETENV)
22085 +        FmPcdDecNetEnvOwners(p_Scheme->h_FmPcd, p_Scheme->netEnvId);
22086 +    p_Scheme->valid = FALSE;
22087 +
22088 +    return E_OK;
22089 +}
22090 +
22091 +static t_Error BuildSchemeRegs(t_FmPcdKgScheme            *p_Scheme,
22092 +                               t_FmPcdKgSchemeParams      *p_SchemeParams,
22093 +                               struct fman_kg_scheme_regs *p_SchemeRegs)
22094 +{
22095 +    t_FmPcd                             *p_FmPcd = (t_FmPcd *)(p_Scheme->h_FmPcd);
22096 +    uint32_t                            grpBits = 0;
22097 +    uint8_t                             grpBase;
22098 +    bool                                direct=TRUE, absolute=FALSE;
22099 +    uint16_t                            profileId=0, numOfProfiles=0, relativeProfileId;
22100 +    t_Error                             err = E_OK;
22101 +    int                                 i = 0;
22102 +    t_NetEnvParams                      netEnvParams;
22103 +    uint32_t                            tmpReg, fqbTmp = 0, ppcTmp = 0, selectTmp, maskTmp, knownTmp, genTmp;
22104 +    t_FmPcdKgKeyExtractAndHashParams    *p_KeyAndHash = NULL;
22105 +    uint8_t                             j, curr, idx;
22106 +    uint8_t                             id, shift=0, code=0, offset=0, size=0;
22107 +    t_FmPcdExtractEntry                 *p_Extract = NULL;
22108 +    t_FmPcdKgExtractedOrParams          *p_ExtractOr;
22109 +    bool                                generic = FALSE;
22110 +    t_KnownFieldsMasks                  bitMask;
22111 +    e_FmPcdKgExtractDfltSelect          swDefault = (e_FmPcdKgExtractDfltSelect)0;
22112 +    t_FmPcdKgSchemesExtracts            *p_LocalExtractsArray;
22113 +    uint8_t                             numOfSwDefaults = 0;
22114 +    t_FmPcdKgExtractDflt                swDefaults[NUM_OF_SW_DEFAULTS];
22115 +    uint8_t                             currGenId = 0;
22116 +
22117 +    memset(swDefaults, 0, NUM_OF_SW_DEFAULTS*sizeof(t_FmPcdKgExtractDflt));
22118 +    memset(p_SchemeRegs, 0, sizeof(struct fman_kg_scheme_regs));
22119 +
22120 +    if (p_SchemeParams->netEnvParams.numOfDistinctionUnits > FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
22121 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
22122 +                     ("numOfDistinctionUnits should not exceed %d", FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS));
22123 +
22124 +    /* by netEnv parameters, get match vector */
22125 +    if (!p_SchemeParams->alwaysDirect)
22126 +    {
22127 +        p_Scheme->netEnvId = FmPcdGetNetEnvId(p_SchemeParams->netEnvParams.h_NetEnv);
22128 +        netEnvParams.netEnvId = p_Scheme->netEnvId;
22129 +        netEnvParams.numOfDistinctionUnits = p_SchemeParams->netEnvParams.numOfDistinctionUnits;
22130 +        memcpy(netEnvParams.unitIds, p_SchemeParams->netEnvParams.unitIds, (sizeof(uint8_t))*p_SchemeParams->netEnvParams.numOfDistinctionUnits);
22131 +        err = PcdGetUnitsVector(p_FmPcd, &netEnvParams);
22132 +        if (err)
22133 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
22134 +        p_Scheme->matchVector = netEnvParams.vector;
22135 +    }
22136 +    else
22137 +    {
22138 +        p_Scheme->matchVector = SCHEME_ALWAYS_DIRECT;
22139 +        p_Scheme->netEnvId = ILLEGAL_NETENV;
22140 +    }
22141 +
22142 +    if (p_SchemeParams->nextEngine == e_FM_PCD_INVALID)
22143 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next Engine of the scheme is not Valid"));
22144 +
22145 +    if (p_SchemeParams->bypassFqidGeneration)
22146 +    {
22147 +#ifdef FM_KG_NO_BYPASS_FQID_GEN
22148 +        if ((p_FmPcd->fmRevInfo.majorRev != 4) && (p_FmPcd->fmRevInfo.majorRev < 6))
22149 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("bypassFqidGeneration."));
22150 +#endif /* FM_KG_NO_BYPASS_FQID_GEN */
22151 +        if (p_SchemeParams->baseFqid)
22152 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("baseFqid set for a scheme that does not generate an FQID"));
22153 +    }
22154 +    else
22155 +        if (!p_SchemeParams->baseFqid)
22156 +            DBG(WARNING, ("baseFqid is 0."));
22157 +
22158 +    if (p_SchemeParams->nextEngine == e_FM_PCD_PLCR)
22159 +    {
22160 +        direct = p_SchemeParams->kgNextEngineParams.plcrProfile.direct;
22161 +        p_Scheme->directPlcr = direct;
22162 +        absolute = (bool)(p_SchemeParams->kgNextEngineParams.plcrProfile.sharedProfile ? TRUE : FALSE);
22163 +        if (!direct && absolute)
22164 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Indirect policing is not available when profile is shared."));
22165 +
22166 +        if (direct)
22167 +        {
22168 +            profileId = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.directRelativeProfileId;
22169 +            numOfProfiles = 1;
22170 +        }
22171 +        else
22172 +        {
22173 +            profileId = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.indirectProfile.fqidOffsetRelativeProfileIdBase;
22174 +            shift = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.indirectProfile.fqidOffsetShift;
22175 +            numOfProfiles = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.indirectProfile.numOfProfiles;
22176 +        }
22177 +    }
22178 +
22179 +    if (p_SchemeParams->nextEngine == e_FM_PCD_CC)
22180 +    {
22181 +#ifdef FM_KG_NO_BYPASS_PLCR_PROFILE_GEN
22182 +        if ((p_SchemeParams->kgNextEngineParams.cc.plcrNext) && (p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration))
22183 +        {
22184 +            if ((p_FmPcd->fmRevInfo.majorRev != 4) && (p_FmPcd->fmRevInfo.majorRev < 6))
22185 +                RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("bypassPlcrProfileGeneration."));
22186 +        }
22187 +#endif /* FM_KG_NO_BYPASS_PLCR_PROFILE_GEN */
22188 +
22189 +        err = FmPcdCcGetGrpParams(p_SchemeParams->kgNextEngineParams.cc.h_CcTree,
22190 +                             p_SchemeParams->kgNextEngineParams.cc.grpId,
22191 +                             &grpBits,
22192 +                             &grpBase);
22193 +        if (err)
22194 +            RETURN_ERROR(MAJOR, err, NO_MSG);
22195 +        p_Scheme->ccUnits = grpBits;
22196 +
22197 +        if ((p_SchemeParams->kgNextEngineParams.cc.plcrNext) &&
22198 +           (!p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration))
22199 +        {
22200 +                if (p_SchemeParams->kgNextEngineParams.cc.plcrProfile.sharedProfile)
22201 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Shared profile may not be used after Coarse classification."));
22202 +                absolute = FALSE;
22203 +                direct = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.direct;
22204 +                if (direct)
22205 +                {
22206 +                    profileId = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.directRelativeProfileId;
22207 +                    numOfProfiles = 1;
22208 +                }
22209 +                else
22210 +                {
22211 +                    profileId = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.indirectProfile.fqidOffsetRelativeProfileIdBase;
22212 +                    shift = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.indirectProfile.fqidOffsetShift;
22213 +                    numOfProfiles = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.indirectProfile.numOfProfiles;
22214 +                }
22215 +        }
22216 +    }
22217 +
22218 +    /* if policer is used directly after KG, or after CC */
22219 +    if ((p_SchemeParams->nextEngine == e_FM_PCD_PLCR)  ||
22220 +       ((p_SchemeParams->nextEngine == e_FM_PCD_CC) &&
22221 +        (p_SchemeParams->kgNextEngineParams.cc.plcrNext) &&
22222 +        (!p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration)))
22223 +    {
22224 +        /* if private policer profile, it may be uninitialized yet, therefore no checks are done at this stage */
22225 +        if (absolute)
22226 +        {
22227 +            /* for absolute direct policy only, */
22228 +            relativeProfileId = profileId;
22229 +            err = FmPcdPlcrGetAbsoluteIdByProfileParams((t_Handle)p_FmPcd,e_FM_PCD_PLCR_SHARED,NULL, relativeProfileId, &profileId);
22230 +            if (err)
22231 +                RETURN_ERROR(MAJOR, err, ("Shared profile not valid offset"));
22232 +            if (!FmPcdPlcrIsProfileValid(p_FmPcd, profileId))
22233 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Shared profile not valid."));
22234 +            p_Scheme->relativeProfileId = profileId;
22235 +        }
22236 +        else
22237 +        {
22238 +            /* save relative profile id's for later check */
22239 +            p_Scheme->nextRelativePlcrProfile = TRUE;
22240 +            p_Scheme->relativeProfileId = profileId;
22241 +            p_Scheme->numOfProfiles = numOfProfiles;
22242 +        }
22243 +    }
22244 +    else
22245 +    {
22246 +        /* if policer is NOT going to be used after KG at all than if bypassFqidGeneration
22247 +        is set, we do not need numOfUsedExtractedOrs and hashDistributionNumOfFqids */
22248 +        if (p_SchemeParams->bypassFqidGeneration && p_SchemeParams->numOfUsedExtractedOrs)
22249 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
22250 +                    ("numOfUsedExtractedOrs is set in a scheme that does not generate FQID or policer profile ID"));
22251 +        if (p_SchemeParams->bypassFqidGeneration &&
22252 +                p_SchemeParams->useHash &&
22253 +                p_SchemeParams->keyExtractAndHashParams.hashDistributionNumOfFqids)
22254 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
22255 +                    ("hashDistributionNumOfFqids is set in a scheme that does not generate FQID or policer profile ID"));
22256 +    }
22257 +
22258 +    /* configure all 21 scheme registers */
22259 +    tmpReg =  KG_SCH_MODE_EN;
22260 +    switch (p_SchemeParams->nextEngine)
22261 +    {
22262 +        case (e_FM_PCD_PLCR):
22263 +            /* add to mode register - NIA */
22264 +            tmpReg |= KG_SCH_MODE_NIA_PLCR;
22265 +            tmpReg |= NIA_ENG_PLCR;
22266 +            tmpReg |= (uint32_t)(p_SchemeParams->kgNextEngineParams.plcrProfile.sharedProfile ? NIA_PLCR_ABSOLUTE:0);
22267 +            /* initialize policer profile command - */
22268 +            /*  configure kgse_ppc  */
22269 +            if (direct)
22270 +            /* use profileId as base, other fields are 0 */
22271 +                p_SchemeRegs->kgse_ppc = (uint32_t)profileId;
22272 +            else
22273 +            {
22274 +                if (shift > MAX_PP_SHIFT)
22275 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fqidOffsetShift may not be larger than %d", MAX_PP_SHIFT));
22276 +
22277 +                if (!numOfProfiles || !POWER_OF_2(numOfProfiles))
22278 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfProfiles must not be 0 and must be a power of 2"));
22279 +
22280 +                ppcTmp = ((uint32_t)shift << KG_SCH_PP_SHIFT_HIGH_SHIFT) & KG_SCH_PP_SHIFT_HIGH;
22281 +                ppcTmp |= ((uint32_t)shift << KG_SCH_PP_SHIFT_LOW_SHIFT) & KG_SCH_PP_SHIFT_LOW;
22282 +                ppcTmp |= ((uint32_t)(numOfProfiles-1) << KG_SCH_PP_MASK_SHIFT);
22283 +                ppcTmp |= (uint32_t)profileId;
22284 +
22285 +                p_SchemeRegs->kgse_ppc = ppcTmp;
22286 +            }
22287 +            break;
22288 +        case (e_FM_PCD_CC):
22289 +            /* mode reg - define NIA */
22290 +            tmpReg |= (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC);
22291 +
22292 +            p_SchemeRegs->kgse_ccbs = grpBits;
22293 +            tmpReg |= (uint32_t)(grpBase << KG_SCH_MODE_CCOBASE_SHIFT);
22294 +
22295 +            if (p_SchemeParams->kgNextEngineParams.cc.plcrNext)
22296 +            {
22297 +                if (!p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration)
22298 +                {
22299 +                    /* find out if absolute or relative */
22300 +                    if (absolute)
22301 +                         RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("It is illegal to request a shared profile in a scheme that is in a KG->CC->PLCR flow"));
22302 +                    if (direct)
22303 +                    {
22304 +                        /* mask = 0, base = directProfileId */
22305 +                        p_SchemeRegs->kgse_ppc = (uint32_t)profileId;
22306 +                    }
22307 +                    else
22308 +                    {
22309 +                        if (shift > MAX_PP_SHIFT)
22310 +                            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fqidOffsetShift may not be larger than %d", MAX_PP_SHIFT));
22311 +                        if (!numOfProfiles || !POWER_OF_2(numOfProfiles))
22312 +                            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfProfiles must not be 0 and must be a power of 2"));
22313 +
22314 +                        ppcTmp = ((uint32_t)shift << KG_SCH_PP_SHIFT_HIGH_SHIFT) & KG_SCH_PP_SHIFT_HIGH;
22315 +                        ppcTmp |= ((uint32_t)shift << KG_SCH_PP_SHIFT_LOW_SHIFT) & KG_SCH_PP_SHIFT_LOW;
22316 +                        ppcTmp |= ((uint32_t)(numOfProfiles-1) << KG_SCH_PP_MASK_SHIFT);
22317 +                        ppcTmp |= (uint32_t)profileId;
22318 +
22319 +                        p_SchemeRegs->kgse_ppc = ppcTmp;
22320 +                    }
22321 +                }
22322 +            }
22323 +            break;
22324 +        case (e_FM_PCD_DONE):
22325 +            if (p_SchemeParams->kgNextEngineParams.doneAction == e_FM_PCD_DROP_FRAME)
22326 +                tmpReg |= GET_NIA_BMI_AC_DISCARD_FRAME(p_FmPcd);
22327 +            else
22328 +                tmpReg |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
22329 +            break;
22330 +        default:
22331 +             RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Next engine not supported"));
22332 +    }
22333 +    p_SchemeRegs->kgse_mode = tmpReg;
22334 +
22335 +    p_SchemeRegs->kgse_mv = p_Scheme->matchVector;
22336 +
22337 +#if (DPAA_VERSION >= 11)
22338 +    if (p_SchemeParams->overrideStorageProfile)
22339 +    {
22340 +        p_SchemeRegs->kgse_om |= KG_SCH_OM_VSPE;
22341 +
22342 +        if (p_SchemeParams->storageProfile.direct)
22343 +        {
22344 +            profileId = p_SchemeParams->storageProfile.profileSelect.directRelativeProfileId;
22345 +            shift = 0;
22346 +            numOfProfiles = 1;
22347 +        }
22348 +        else
22349 +        {
22350 +            profileId = p_SchemeParams->storageProfile.profileSelect.indirectProfile.fqidOffsetRelativeProfileIdBase;
22351 +            shift = p_SchemeParams->storageProfile.profileSelect.indirectProfile.fqidOffsetShift;
22352 +            numOfProfiles = p_SchemeParams->storageProfile.profileSelect.indirectProfile.numOfProfiles;
22353 +        }
22354 +        if (shift > MAX_SP_SHIFT)
22355 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fqidOffsetShift may not be larger than %d", MAX_SP_SHIFT));
22356 +
22357 +        if (!numOfProfiles || !POWER_OF_2(numOfProfiles))
22358 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfProfiles must not be 0 and must be a power of 2"));
22359 +
22360 +        tmpReg = (uint32_t)shift << KG_SCH_VSP_SHIFT;
22361 +        tmpReg |= ((uint32_t)(numOfProfiles-1) << KG_SCH_VSP_MASK_SHIFT);
22362 +        tmpReg |= (uint32_t)profileId;
22363 +
22364 +
22365 +        p_SchemeRegs->kgse_vsp = tmpReg;
22366 +
22367 +        p_Scheme->vspe = TRUE;
22368 +
22369 +    }
22370 +    else
22371 +        p_SchemeRegs->kgse_vsp = KG_SCH_VSP_NO_KSP_EN;
22372 +#endif /* (DPAA_VERSION >= 11) */
22373 +
22374 +    if (p_SchemeParams->useHash)
22375 +    {
22376 +        p_KeyAndHash = &p_SchemeParams->keyExtractAndHashParams;
22377 +
22378 +        if (p_KeyAndHash->numOfUsedExtracts >= FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY)
22379 +             RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfUsedExtracts out of range"));
22380 +
22381 +        /*  configure kgse_dv0  */
22382 +        p_SchemeRegs->kgse_dv0 = p_KeyAndHash->privateDflt0;
22383 +
22384 +        /*  configure kgse_dv1  */
22385 +        p_SchemeRegs->kgse_dv1 = p_KeyAndHash->privateDflt1;
22386 +
22387 +        if (!p_SchemeParams->bypassFqidGeneration)
22388 +        {
22389 +            if (!p_KeyAndHash->hashDistributionNumOfFqids || !POWER_OF_2(p_KeyAndHash->hashDistributionNumOfFqids))
22390 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("hashDistributionNumOfFqids must not be 0 and must be a power of 2"));
22391 +            if ((p_KeyAndHash->hashDistributionNumOfFqids-1) & p_SchemeParams->baseFqid)
22392 +                DBG(WARNING, ("baseFqid unaligned. Distribution may result in less than hashDistributionNumOfFqids queues."));
22393 +        }
22394 +
22395 +        /*  configure kgse_ekdv  */
22396 +        tmpReg = 0;
22397 +        for ( i=0 ;i<p_KeyAndHash->numOfUsedDflts ; i++)
22398 +        {
22399 +            switch (p_KeyAndHash->dflts[i].type)
22400 +            {
22401 +                case (e_FM_PCD_KG_MAC_ADDR):
22402 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_MAC_ADDR_SHIFT);
22403 +                    break;
22404 +                case (e_FM_PCD_KG_TCI):
22405 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_TCI_SHIFT);
22406 +                    break;
22407 +                case (e_FM_PCD_KG_ENET_TYPE):
22408 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_ENET_TYPE_SHIFT);
22409 +                    break;
22410 +                case (e_FM_PCD_KG_PPP_SESSION_ID):
22411 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_PPP_SESSION_ID_SHIFT);
22412 +                    break;
22413 +                case (e_FM_PCD_KG_PPP_PROTOCOL_ID):
22414 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_PPP_PROTOCOL_ID_SHIFT);
22415 +                    break;
22416 +                case (e_FM_PCD_KG_MPLS_LABEL):
22417 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_MPLS_LABEL_SHIFT);
22418 +                    break;
22419 +                case (e_FM_PCD_KG_IP_ADDR):
22420 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_IP_ADDR_SHIFT);
22421 +                    break;
22422 +                case (e_FM_PCD_KG_PROTOCOL_TYPE):
22423 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_PROTOCOL_TYPE_SHIFT);
22424 +                    break;
22425 +                case (e_FM_PCD_KG_IP_TOS_TC):
22426 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_IP_TOS_TC_SHIFT);
22427 +                    break;
22428 +                case (e_FM_PCD_KG_IPV6_FLOW_LABEL):
22429 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_L4_PORT_SHIFT);
22430 +                    break;
22431 +                case (e_FM_PCD_KG_IPSEC_SPI):
22432 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_IPSEC_SPI_SHIFT);
22433 +                    break;
22434 +                case (e_FM_PCD_KG_L4_PORT):
22435 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_L4_PORT_SHIFT);
22436 +                    break;
22437 +                case (e_FM_PCD_KG_TCP_FLAG):
22438 +                    tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_TCP_FLAG_SHIFT);
22439 +                    break;
22440 +                case (e_FM_PCD_KG_GENERIC_FROM_DATA):
22441 +                    swDefaults[numOfSwDefaults].type = e_FM_PCD_KG_GENERIC_FROM_DATA;
22442 +                    swDefaults[numOfSwDefaults].dfltSelect = p_KeyAndHash->dflts[i].dfltSelect;
22443 +                    numOfSwDefaults ++;
22444 +                    break;
22445 +                case (e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V):
22446 +                    swDefaults[numOfSwDefaults].type = e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V;
22447 +                    swDefaults[numOfSwDefaults].dfltSelect = p_KeyAndHash->dflts[i].dfltSelect;
22448 +                    numOfSwDefaults ++;
22449 +                    break;
22450 +                case (e_FM_PCD_KG_GENERIC_NOT_FROM_DATA):
22451 +                    swDefaults[numOfSwDefaults].type = e_FM_PCD_KG_GENERIC_NOT_FROM_DATA;
22452 +                    swDefaults[numOfSwDefaults].dfltSelect = p_KeyAndHash->dflts[i].dfltSelect;
22453 +                    numOfSwDefaults ++;
22454 +                   break;
22455 +                default:
22456 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
22457 +            }
22458 +        }
22459 +        p_SchemeRegs->kgse_ekdv = tmpReg;
22460 +
22461 +        p_LocalExtractsArray = (t_FmPcdKgSchemesExtracts *)XX_Malloc(sizeof(t_FmPcdKgSchemesExtracts));
22462 +        if (!p_LocalExtractsArray)
22463 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
22464 +
22465 +        /*  configure kgse_ekfc and  kgse_gec */
22466 +        knownTmp = 0;
22467 +        for ( i=0 ;i<p_KeyAndHash->numOfUsedExtracts ; i++)
22468 +        {
22469 +            p_Extract = &p_KeyAndHash->extractArray[i];
22470 +            switch (p_Extract->type)
22471 +            {
22472 +                case (e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO):
22473 +                    knownTmp |= KG_SCH_KN_PORT_ID;
22474 +                    /* save in driver structure */
22475 +                    p_LocalExtractsArray->extractsArray[i].id = GetKnownFieldId(KG_SCH_KN_PORT_ID);
22476 +                    p_LocalExtractsArray->extractsArray[i].known = TRUE;
22477 +                    break;
22478 +                case (e_FM_PCD_EXTRACT_BY_HDR):
22479 +                    switch (p_Extract->extractByHdr.hdr)
22480 +                    {
22481 +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
22482 +                        case (HEADER_TYPE_UDP_LITE):
22483 +                            p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
22484 +                            break;
22485 +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
22486 +                        case (HEADER_TYPE_UDP_ENCAP_ESP):
22487 +                            switch (p_Extract->extractByHdr.type)
22488 +                            {
22489 +                                case (e_FM_PCD_EXTRACT_FROM_HDR):
22490 +                                    /* case where extraction from ESP only */
22491 +                                    if (p_Extract->extractByHdr.extractByHdrType.fromHdr.offset >= UDP_HEADER_SIZE)
22492 +                                    {
22493 +                                        p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
22494 +                                        p_Extract->extractByHdr.extractByHdrType.fromHdr.offset -= UDP_HEADER_SIZE;
22495 +                                        p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
22496 +                                    }
22497 +                                    else
22498 +                                    {
22499 +                                        p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
22500 +                                        p_Extract->extractByHdr.ignoreProtocolValidation = FALSE;
22501 +                                    }
22502 +                                    break;
22503 +                                case (e_FM_PCD_EXTRACT_FROM_FIELD):
22504 +                                    switch (p_Extract->extractByHdr.extractByHdrType.fromField.field.udpEncapEsp)
22505 +                                    {
22506 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC):
22507 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST):
22508 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN):
22509 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM):
22510 +                                            p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
22511 +                                            break;
22512 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI):
22513 +                                            p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
22514 +                                            p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
22515 +                                            /*p_Extract->extractByHdr.extractByHdrType.fromField.offset += ESP_SPI_OFFSET;*/
22516 +                                            p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
22517 +                                            break;
22518 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM):
22519 +                                            p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
22520 +                                            p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
22521 +                                            p_Extract->extractByHdr.extractByHdrType.fromField.offset += ESP_SEQ_NUM_OFFSET;
22522 +                                            p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
22523 +                                            break;
22524 +                                    }
22525 +                                    break;
22526 +                                case (e_FM_PCD_EXTRACT_FULL_FIELD):
22527 +                                    switch (p_Extract->extractByHdr.extractByHdrType.fullField.udpEncapEsp)
22528 +                                    {
22529 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC):
22530 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST):
22531 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN):
22532 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM):
22533 +                                            p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
22534 +                                            break;
22535 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI):
22536 +                                            p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
22537 +                                            p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
22538 +                                            p_Extract->extractByHdr.extractByHdrType.fromHdr.size = ESP_SPI_SIZE;
22539 +                                            p_Extract->extractByHdr.extractByHdrType.fromHdr.offset = ESP_SPI_OFFSET;
22540 +                                            p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
22541 +                                            break;
22542 +                                        case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM):
22543 +                                            p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
22544 +                                            p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
22545 +                                            p_Extract->extractByHdr.extractByHdrType.fromHdr.size = ESP_SEQ_NUM_SIZE;
22546 +                                            p_Extract->extractByHdr.extractByHdrType.fromHdr.offset = ESP_SEQ_NUM_OFFSET;
22547 +                                            p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
22548 +                                            break;
22549 +                                    }
22550 +                                    break;
22551 +                            }
22552 +                            break;
22553 +                        default:
22554 +                            break;
22555 +                    }
22556 +                    switch (p_Extract->extractByHdr.type)
22557 +                    {
22558 +                        case (e_FM_PCD_EXTRACT_FROM_HDR):
22559 +                            generic = TRUE;
22560 +                            /* get the header code for the generic extract */
22561 +                            code = GetGenHdrCode(p_Extract->extractByHdr.hdr, p_Extract->extractByHdr.hdrIndex, p_Extract->extractByHdr.ignoreProtocolValidation);
22562 +                            /* set generic register fields */
22563 +                            offset = p_Extract->extractByHdr.extractByHdrType.fromHdr.offset;
22564 +                            size = p_Extract->extractByHdr.extractByHdrType.fromHdr.size;
22565 +                            break;
22566 +                        case (e_FM_PCD_EXTRACT_FROM_FIELD):
22567 +                            generic = TRUE;
22568 +                            /* get the field code for the generic extract */
22569 +                            code = GetGenFieldCode(p_Extract->extractByHdr.hdr,
22570 +                                        p_Extract->extractByHdr.extractByHdrType.fromField.field, p_Extract->extractByHdr.ignoreProtocolValidation,p_Extract->extractByHdr.hdrIndex);
22571 +                            offset = p_Extract->extractByHdr.extractByHdrType.fromField.offset;
22572 +                            size = p_Extract->extractByHdr.extractByHdrType.fromField.size;
22573 +                            break;
22574 +                        case (e_FM_PCD_EXTRACT_FULL_FIELD):
22575 +                            if (!p_Extract->extractByHdr.ignoreProtocolValidation)
22576 +                            {
22577 +                                /* if we have a known field for it - use it, otherwise use generic */
22578 +                                bitMask = GetKnownProtMask(p_FmPcd, p_Extract->extractByHdr.hdr, p_Extract->extractByHdr.hdrIndex,
22579 +                                            p_Extract->extractByHdr.extractByHdrType.fullField);
22580 +                                if (bitMask)
22581 +                                {
22582 +                                    knownTmp |= bitMask;
22583 +                                    /* save in driver structure */
22584 +                                    p_LocalExtractsArray->extractsArray[i].id = GetKnownFieldId(bitMask);
22585 +                                    p_LocalExtractsArray->extractsArray[i].known = TRUE;
22586 +                                }
22587 +                                else
22588 +                                    generic = TRUE;
22589 +                            }
22590 +                            else
22591 +                                generic = TRUE;
22592 +                            if (generic)
22593 +                            {
22594 +                                /* tmp - till we cover more headers under generic */
22595 +                                XX_Free(p_LocalExtractsArray);
22596 +                                RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Full header selection not supported"));
22597 +                            }
22598 +                            break;
22599 +                        default:
22600 +                            XX_Free(p_LocalExtractsArray);
22601 +                            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
22602 +                    }
22603 +                    break;
22604 +                case (e_FM_PCD_EXTRACT_NON_HDR):
22605 +                    /* use generic */
22606 +                    generic = TRUE;
22607 +                    offset = 0;
22608 +                    /* get the field code for the generic extract */
22609 +                    code = GetGenCode(p_Extract->extractNonHdr.src, &offset);
22610 +                    offset += p_Extract->extractNonHdr.offset;
22611 +                    size = p_Extract->extractNonHdr.size;
22612 +                    break;
22613 +                default:
22614 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
22615 +            }
22616 +
22617 +            if (generic)
22618 +            {
22619 +                /* set generic register fields */
22620 +                if (currGenId >= FM_KG_NUM_OF_GENERIC_REGS)
22621 +                {
22622 +                    XX_Free(p_LocalExtractsArray);
22623 +                    RETURN_ERROR(MAJOR, E_FULL, ("Generic registers are fully used"));
22624 +                }
22625 +                if (!code)
22626 +                {
22627 +                    XX_Free(p_LocalExtractsArray);
22628 +                    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
22629 +                }
22630 +
22631 +                genTmp = KG_SCH_GEN_VALID;
22632 +                genTmp |= (uint32_t)(code << KG_SCH_GEN_HT_SHIFT);
22633 +                genTmp |= offset;
22634 +                if ((size > MAX_KG_SCH_SIZE) || (size < 1))
22635 +                {
22636 +                    XX_Free(p_LocalExtractsArray);
22637 +                    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal extraction (size out of range)"));
22638 +                }
22639 +                genTmp |= (uint32_t)((size - 1) << KG_SCH_GEN_SIZE_SHIFT);
22640 +                swDefault = GetGenericSwDefault(swDefaults, numOfSwDefaults, code);
22641 +                if (swDefault == e_FM_PCD_KG_DFLT_ILLEGAL)
22642 +                    DBG(WARNING, ("No sw default configured"));
22643 +                else
22644 +                    genTmp |= swDefault << KG_SCH_GEN_DEF_SHIFT;
22645 +
22646 +                genTmp |= KG_SCH_GEN_MASK;
22647 +                p_SchemeRegs->kgse_gec[currGenId] = genTmp;
22648 +                /* save in driver structure */
22649 +                p_LocalExtractsArray->extractsArray[i].id = currGenId++;
22650 +                p_LocalExtractsArray->extractsArray[i].known = FALSE;
22651 +                generic = FALSE;
22652 +            }
22653 +        }
22654 +        p_SchemeRegs->kgse_ekfc = knownTmp;
22655 +
22656 +        selectTmp = 0;
22657 +        maskTmp = 0xFFFFFFFF;
22658 +        /*  configure kgse_bmch, kgse_bmcl and kgse_fqb */
22659 +
22660 +        if (p_KeyAndHash->numOfUsedMasks > FM_PCD_KG_NUM_OF_EXTRACT_MASKS)
22661 +        {
22662 +            XX_Free(p_LocalExtractsArray);
22663 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Only %d masks supported", FM_PCD_KG_NUM_OF_EXTRACT_MASKS));
22664 +        }
22665 +        for ( i=0 ;i<p_KeyAndHash->numOfUsedMasks ; i++)
22666 +        {
22667 +            /* Get the relative id of the extract (for known 0-0x1f, for generic 0-7) */
22668 +            id = p_LocalExtractsArray->extractsArray[p_KeyAndHash->masks[i].extractArrayIndex].id;
22669 +            /* Get the shift of the select field (depending on i) */
22670 +            GET_MASK_SEL_SHIFT(shift,i);
22671 +            if (p_LocalExtractsArray->extractsArray[p_KeyAndHash->masks[i].extractArrayIndex].known)
22672 +                selectTmp |= id << shift;
22673 +            else
22674 +                selectTmp |= (id + MASK_FOR_GENERIC_BASE_ID) << shift;
22675 +
22676 +            /* Get the shift of the offset field (depending on i) - may
22677 +               be in  kgse_bmch or in kgse_fqb (depending on i) */
22678 +            GET_MASK_OFFSET_SHIFT(shift,i);
22679 +            if (i<=1)
22680 +                selectTmp |= p_KeyAndHash->masks[i].offset << shift;
22681 +            else
22682 +                fqbTmp |= p_KeyAndHash->masks[i].offset << shift;
22683 +
22684 +            /* Get the shift of the mask field (depending on i) */
22685 +            GET_MASK_SHIFT(shift,i);
22686 +            /* pass all bits */
22687 +            maskTmp |= KG_SCH_BITMASK_MASK << shift;
22688 +            /* clear bits that need masking */
22689 +            maskTmp &= ~(0xFF << shift) ;
22690 +            /* set mask bits */
22691 +            maskTmp |= (p_KeyAndHash->masks[i].mask << shift) ;
22692 +        }
22693 +        p_SchemeRegs->kgse_bmch = selectTmp;
22694 +        p_SchemeRegs->kgse_bmcl = maskTmp;
22695 +        /* kgse_fqb will be written t the end of the routine */
22696 +
22697 +        /*  configure kgse_hc  */
22698 +        if (p_KeyAndHash->hashShift > MAX_HASH_SHIFT)
22699 +        {
22700 +            XX_Free(p_LocalExtractsArray);
22701 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("hashShift must not be larger than %d", MAX_HASH_SHIFT));
22702 +        }
22703 +        if (p_KeyAndHash->hashDistributionFqidsShift > MAX_DIST_FQID_SHIFT)
22704 +        {
22705 +            XX_Free(p_LocalExtractsArray);
22706 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("hashDistributionFqidsShift must not be larger than %d", MAX_DIST_FQID_SHIFT));
22707 +        }
22708 +
22709 +        tmpReg = 0;
22710 +
22711 +        tmpReg |= ((p_KeyAndHash->hashDistributionNumOfFqids - 1) << p_KeyAndHash->hashDistributionFqidsShift);
22712 +        tmpReg |= p_KeyAndHash->hashShift << KG_SCH_HASH_CONFIG_SHIFT_SHIFT;
22713 +
22714 +        if (p_KeyAndHash->symmetricHash)
22715 +        {
22716 +            if ((!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_MACSRC) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_MACDST)) ||
22717 +                    (!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPSRC1) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPDST1)) ||
22718 +                    (!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPSRC2) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPDST2)) ||
22719 +                    (!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_L4PSRC) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_L4PDST)))
22720 +            {
22721 +                XX_Free(p_LocalExtractsArray);
22722 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("symmetricHash set but src/dest extractions missing"));
22723 +            }
22724 +            tmpReg |= KG_SCH_HASH_CONFIG_SYM;
22725 +        }
22726 +        p_SchemeRegs->kgse_hc = tmpReg;
22727 +
22728 +        /* build the return array describing the order of the extractions */
22729 +
22730 +        /* the last currGenId places of the array
22731 +           are for generic extracts that are always last.
22732 +           We now sort for the calculation of the order of the known
22733 +           extractions we sort the known extracts between orderedArray[0] and
22734 +           orderedArray[p_KeyAndHash->numOfUsedExtracts - currGenId - 1].
22735 +           for the calculation of the order of the generic extractions we use:
22736 +           num_of_generic - currGenId
22737 +           num_of_known - p_KeyAndHash->numOfUsedExtracts - currGenId
22738 +           first_generic_index = num_of_known */
22739 +        curr = 0;
22740 +        for (i=0;i<p_KeyAndHash->numOfUsedExtracts ; i++)
22741 +        {
22742 +            if (p_LocalExtractsArray->extractsArray[i].known)
22743 +            {
22744 +                ASSERT_COND(curr<(p_KeyAndHash->numOfUsedExtracts - currGenId));
22745 +                j = curr;
22746 +                /* id is the extract id (port id = 0, mac src = 1 etc.). the value in the array is the original
22747 +                index in the user's extractions array */
22748 +                /* we compare the id of the current extract with the id of the extract in the orderedArray[j-1]
22749 +                location */
22750 +                while ((j > 0) && (p_LocalExtractsArray->extractsArray[i].id <
22751 +                      p_LocalExtractsArray->extractsArray[p_Scheme->orderedArray[j-1]].id))
22752 +                {
22753 +                    p_Scheme->orderedArray[j] =
22754 +                        p_Scheme->orderedArray[j-1];
22755 +                    j--;
22756 +                }
22757 +                p_Scheme->orderedArray[j] = (uint8_t)i;
22758 +                curr++;
22759 +            }
22760 +            else
22761 +            {
22762 +                /* index is first_generic_index + generic index (id) */
22763 +                idx = (uint8_t)(p_KeyAndHash->numOfUsedExtracts - currGenId + p_LocalExtractsArray->extractsArray[i].id);
22764 +                ASSERT_COND(idx < FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY);
22765 +                p_Scheme->orderedArray[idx]= (uint8_t)i;
22766 +            }
22767 +        }
22768 +        XX_Free(p_LocalExtractsArray);
22769 +    }
22770 +    else
22771 +    {
22772 +        /* clear all unused registers: */
22773 +        p_SchemeRegs->kgse_ekfc = 0;
22774 +        p_SchemeRegs->kgse_ekdv = 0;
22775 +        p_SchemeRegs->kgse_bmch = 0;
22776 +        p_SchemeRegs->kgse_bmcl = 0;
22777 +        p_SchemeRegs->kgse_hc = 0;
22778 +        p_SchemeRegs->kgse_dv0 = 0;
22779 +        p_SchemeRegs->kgse_dv1 = 0;
22780 +    }
22781 +
22782 +    if (p_SchemeParams->bypassFqidGeneration)
22783 +        p_SchemeRegs->kgse_hc |= KG_SCH_HASH_CONFIG_NO_FQID;
22784 +
22785 +    /*  configure kgse_spc  */
22786 +    if ( p_SchemeParams->schemeCounter.update)
22787 +        p_SchemeRegs->kgse_spc = p_SchemeParams->schemeCounter.value;
22788 +
22789 +
22790 +    /* check that are enough generic registers */
22791 +    if (p_SchemeParams->numOfUsedExtractedOrs + currGenId > FM_KG_NUM_OF_GENERIC_REGS)
22792 +        RETURN_ERROR(MAJOR, E_FULL, ("Generic registers are fully used"));
22793 +
22794 +    /* extracted OR mask on Qid */
22795 +    for ( i=0 ;i<p_SchemeParams->numOfUsedExtractedOrs ; i++)
22796 +    {
22797 +
22798 +        p_Scheme->extractedOrs = TRUE;
22799 +        /*  configure kgse_gec[i]  */
22800 +        p_ExtractOr = &p_SchemeParams->extractedOrs[i];
22801 +        switch (p_ExtractOr->type)
22802 +        {
22803 +            case (e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO):
22804 +                code = KG_SCH_GEN_PARSE_RESULT_N_FQID;
22805 +                offset = 0;
22806 +                break;
22807 +            case (e_FM_PCD_EXTRACT_BY_HDR):
22808 +                /* get the header code for the generic extract */
22809 +                code = GetGenHdrCode(p_ExtractOr->extractByHdr.hdr, p_ExtractOr->extractByHdr.hdrIndex, p_ExtractOr->extractByHdr.ignoreProtocolValidation);
22810 +                /* set generic register fields */
22811 +                offset = p_ExtractOr->extractionOffset;
22812 +                break;
22813 +            case (e_FM_PCD_EXTRACT_NON_HDR):
22814 +                /* get the field code for the generic extract */
22815 +                offset = 0;
22816 +                code = GetGenCode(p_ExtractOr->src, &offset);
22817 +                offset += p_ExtractOr->extractionOffset;
22818 +                break;
22819 +            default:
22820 +                RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
22821 +        }
22822 +
22823 +        /* set generic register fields */
22824 +        if (!code)
22825 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
22826 +        genTmp = KG_SCH_GEN_EXTRACT_TYPE | KG_SCH_GEN_VALID;
22827 +        genTmp |= (uint32_t)(code << KG_SCH_GEN_HT_SHIFT);
22828 +        genTmp |= offset;
22829 +        if (!!p_ExtractOr->bitOffsetInFqid == !!p_ExtractOr->bitOffsetInPlcrProfile)
22830 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, (" extracted byte must effect either FQID or Policer profile"));
22831 +
22832 +        /************************************************************************************
22833 +            bitOffsetInFqid and bitOffsetInPolicerProfile are translated to rotate parameter
22834 +            in the following way:
22835 +
22836 +            Driver API and implementation:
22837 +            ==============================
22838 +            FQID: extracted OR byte may be shifted right 1-31 bits to effect parts of the FQID.
22839 +            if shifted less than 8 bits, or more than 24 bits a mask is set on the bits that
22840 +            are not overlapping FQID.
22841 +                     ------------------------
22842 +                    |      FQID (24)         |
22843 +                     ------------------------
22844 +            --------
22845 +           |        |  extracted OR byte
22846 +            --------
22847 +
22848 +            Policer Profile: extracted OR byte may be shifted right 1-15 bits to effect parts of the
22849 +            PP id. Unless shifted exactly 8 bits to overlap the PP id, a mask is set on the bits that
22850 +            are not overlapping PP id.
22851 +
22852 +                     --------
22853 +                    | PP (8) |
22854 +                     --------
22855 +            --------
22856 +           |        |  extracted OR byte
22857 +            --------
22858 +
22859 +            HW implementation
22860 +            =================
22861 +            FQID and PP construct a 32 bit word in the way describe below. Extracted byte is located
22862 +            as the highest byte of that word and may be rotated to effect any part os the FQID or
22863 +            the PP.
22864 +             ------------------------  --------
22865 +            |      FQID (24)         || PP (8) |
22866 +             ------------------------  --------
22867 +             --------
22868 +            |        |  extracted OR byte
22869 +             --------
22870 +
22871 +        ************************************************************************************/
22872 +
22873 +        if (p_ExtractOr->bitOffsetInFqid)
22874 +        {
22875 +            if (p_ExtractOr->bitOffsetInFqid > MAX_KG_SCH_FQID_BIT_OFFSET )
22876 +              RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal extraction (bitOffsetInFqid out of range)"));
22877 +            if (p_ExtractOr->bitOffsetInFqid<8)
22878 +                genTmp |= (uint32_t)((p_ExtractOr->bitOffsetInFqid+24) << KG_SCH_GEN_SIZE_SHIFT);
22879 +            else
22880 +                genTmp |= (uint32_t)((p_ExtractOr->bitOffsetInFqid-8) << KG_SCH_GEN_SIZE_SHIFT);
22881 +            p_ExtractOr->mask &= GetExtractedOrMask(p_ExtractOr->bitOffsetInFqid, TRUE);
22882 +        }
22883 +        else /* effect policer profile */
22884 +        {
22885 +            if (p_ExtractOr->bitOffsetInPlcrProfile > MAX_KG_SCH_PP_BIT_OFFSET )
22886 +              RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal extraction (bitOffsetInPlcrProfile out of range)"));
22887 +            p_Scheme->bitOffsetInPlcrProfile = p_ExtractOr->bitOffsetInPlcrProfile;
22888 +            genTmp |= (uint32_t)((p_ExtractOr->bitOffsetInPlcrProfile+16) << KG_SCH_GEN_SIZE_SHIFT);
22889 +            p_ExtractOr->mask &= GetExtractedOrMask(p_ExtractOr->bitOffsetInPlcrProfile, FALSE);
22890 +        }
22891 +
22892 +        genTmp |= (uint32_t)(p_ExtractOr->extractionOffset << KG_SCH_GEN_DEF_SHIFT);
22893 +        /* clear bits that need masking */
22894 +        genTmp &= ~KG_SCH_GEN_MASK ;
22895 +        /* set mask bits */
22896 +        genTmp |= (uint32_t)(p_ExtractOr->mask << KG_SCH_GEN_MASK_SHIFT);
22897 +        p_SchemeRegs->kgse_gec[currGenId++] = genTmp;
22898 +
22899 +    }
22900 +    /* clear all unused GEC registers */
22901 +    for ( i=currGenId ;i<FM_KG_NUM_OF_GENERIC_REGS ; i++)
22902 +        p_SchemeRegs->kgse_gec[i] = 0;
22903 +
22904 +    /* add base Qid for this scheme */
22905 +    /* add configuration for kgse_fqb */
22906 +    if (p_SchemeParams->baseFqid & ~0x00FFFFFF)
22907 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("baseFqid must be between 1 and 2^24-1"));
22908 +
22909 +    fqbTmp |= p_SchemeParams->baseFqid;
22910 +    p_SchemeRegs->kgse_fqb = fqbTmp;
22911 +
22912 +    p_Scheme->nextEngine = p_SchemeParams->nextEngine;
22913 +    p_Scheme->doneAction = p_SchemeParams->kgNextEngineParams.doneAction;
22914 +
22915 +    return E_OK;
22916 +}
22917 +
22918 +
22919 +/*****************************************************************************/
22920 +/*              Inter-module API routines                                    */
22921 +/*****************************************************************************/
22922 +
22923 +t_Error FmPcdKgBuildClsPlanGrp(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_Grp, t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet)
22924 +{
22925 +    t_FmPcd                         *p_FmPcd = (t_FmPcd*)h_FmPcd;
22926 +    t_FmPcdKgClsPlanGrp             *p_ClsPlanGrp;
22927 +    t_FmPcdIpcKgClsPlanParams       kgAlloc;
22928 +    t_Error                         err = E_OK;
22929 +    uint32_t                        oredVectors = 0;
22930 +    int                             i, j;
22931 +
22932 +    /* this routine is protected by the calling routine ! */
22933 +    if (p_Grp->numOfOptions >= FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS))
22934 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,("Too many classification plan basic options selected."));
22935 +
22936 +    /* find a new clsPlan group */
22937 +    for (i = 0; i < FM_MAX_NUM_OF_PORTS; i++)
22938 +        if (!p_FmPcd->p_FmPcdKg->clsPlanGrps[i].used)
22939 +            break;
22940 +    if (i == FM_MAX_NUM_OF_PORTS)
22941 +        RETURN_ERROR(MAJOR, E_FULL,("No classification plan groups available."));
22942 +
22943 +    p_FmPcd->p_FmPcdKg->clsPlanGrps[i].used = TRUE;
22944 +
22945 +    p_Grp->clsPlanGrpId = (uint8_t)i;
22946 +
22947 +    if (p_Grp->numOfOptions == 0)
22948 +        p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId = (uint8_t)i;
22949 +
22950 +    p_ClsPlanGrp = &p_FmPcd->p_FmPcdKg->clsPlanGrps[i];
22951 +    p_ClsPlanGrp->netEnvId = p_Grp->netEnvId;
22952 +    p_ClsPlanGrp->owners = 0;
22953 +    FmPcdSetClsPlanGrpId(p_FmPcd, p_Grp->netEnvId, p_Grp->clsPlanGrpId);
22954 +    if (p_Grp->numOfOptions != 0)
22955 +        FmPcdIncNetEnvOwners(p_FmPcd, p_Grp->netEnvId);
22956 +
22957 +    p_ClsPlanGrp->sizeOfGrp = (uint16_t)(1 << p_Grp->numOfOptions);
22958 +    /* a minimal group of 8 is required */
22959 +    if (p_ClsPlanGrp->sizeOfGrp < CLS_PLAN_NUM_PER_GRP)
22960 +        p_ClsPlanGrp->sizeOfGrp = CLS_PLAN_NUM_PER_GRP;
22961 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
22962 +    {
22963 +        err = KgAllocClsPlanEntries(h_FmPcd, p_ClsPlanGrp->sizeOfGrp, p_FmPcd->guestId, &p_ClsPlanGrp->baseEntry);
22964 +
22965 +        if (err)
22966 +            RETURN_ERROR(MINOR, E_INVALID_STATE, NO_MSG);
22967 +    }
22968 +    else
22969 +    {
22970 +        t_FmPcdIpcMsg   msg;
22971 +        uint32_t        replyLength;
22972 +        t_FmPcdIpcReply reply;
22973 +
22974 +        /* in GUEST_PARTITION, we use the IPC, to also set a private driver group if required */
22975 +        memset(&reply, 0, sizeof(reply));
22976 +        memset(&msg, 0, sizeof(msg));
22977 +        memset(&kgAlloc, 0, sizeof(kgAlloc));
22978 +        kgAlloc.guestId = p_FmPcd->guestId;
22979 +        kgAlloc.numOfClsPlanEntries = p_ClsPlanGrp->sizeOfGrp;
22980 +        msg.msgId = FM_PCD_ALLOC_KG_CLSPLAN;
22981 +        memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
22982 +        replyLength = (sizeof(uint32_t) + sizeof(p_ClsPlanGrp->baseEntry));
22983 +        if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
22984 +                                     (uint8_t*)&msg,
22985 +                                     sizeof(msg.msgId) + sizeof(kgAlloc),
22986 +                                     (uint8_t*)&reply,
22987 +                                     &replyLength,
22988 +                                     NULL,
22989 +                                     NULL)) != E_OK)
22990 +            RETURN_ERROR(MAJOR, err, NO_MSG);
22991 +
22992 +        if (replyLength != (sizeof(uint32_t) + sizeof(p_ClsPlanGrp->baseEntry)))
22993 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
22994 +        if ((t_Error)reply.error != E_OK)
22995 +            RETURN_ERROR(MINOR, (t_Error)reply.error, NO_MSG);
22996 +
22997 +        p_ClsPlanGrp->baseEntry = *(uint8_t*)(reply.replyBody);
22998 +    }
22999 +
23000 +    /* build classification plan entries parameters */
23001 +    p_ClsPlanSet->baseEntry = p_ClsPlanGrp->baseEntry;
23002 +    p_ClsPlanSet->numOfClsPlanEntries = p_ClsPlanGrp->sizeOfGrp;
23003 +
23004 +    oredVectors = 0;
23005 +    for (i = 0; i<p_Grp->numOfOptions; i++)
23006 +    {
23007 +        oredVectors |= p_Grp->optVectors[i];
23008 +        /* save an array of used options - the indexes represent the power of 2 index */
23009 +        p_ClsPlanGrp->optArray[i] = p_Grp->options[i];
23010 +    }
23011 +    /* set the classification plan relevant entries so that all bits
23012 +     * relevant to the list of options is cleared
23013 +     */
23014 +    for (j = 0; j<p_ClsPlanGrp->sizeOfGrp; j++)
23015 +        p_ClsPlanSet->vectors[j] = ~oredVectors;
23016 +
23017 +    for (i = 0; i<p_Grp->numOfOptions; i++)
23018 +    {
23019 +       /* option i got the place 2^i in the clsPlan array. all entries that
23020 +         * have bit i set, should have the vector bit cleared. So each option
23021 +         * has one location that it is exclusive (1,2,4,8...) and represent the
23022 +         * presence of that option only, and other locations that represent a
23023 +         * combination of options.
23024 +         * e.g:
23025 +         * If ethernet-BC is option 1 it gets entry 2 in the table. Entry 2
23026 +         * now represents a frame with ethernet-BC header - so the bit
23027 +         * representing ethernet-BC should be set and all other option bits
23028 +         * should be cleared.
23029 +         * Entries 2,3,6,7,10... also have ethernet-BC and therefore have bit
23030 +         * vector[1] set, but they also have other bits set:
23031 +         * 3=1+2, options 0 and 1
23032 +         * 6=2+4, options 1 and 2
23033 +         * 7=1+2+4, options 0,1,and 2
23034 +         * 10=2+8, options 1 and 3
23035 +         * etc.
23036 +         * */
23037 +
23038 +        /* now for each option (i), we set their bits in all entries (j)
23039 +         * that contain bit 2^i.
23040 +         */
23041 +        for (j = 0; j<p_ClsPlanGrp->sizeOfGrp; j++)
23042 +        {
23043 +            if (j & (1<<i))
23044 +                p_ClsPlanSet->vectors[j] |= p_Grp->optVectors[i];
23045 +        }
23046 +    }
23047 +
23048 +    return E_OK;
23049 +}
23050 +
23051 +void FmPcdKgDestroyClsPlanGrp(t_Handle h_FmPcd, uint8_t grpId)
23052 +{
23053 +    t_FmPcd                         *p_FmPcd = (t_FmPcd*)h_FmPcd;
23054 +    t_FmPcdIpcKgClsPlanParams       kgAlloc;
23055 +    t_Error                         err;
23056 +    t_FmPcdIpcMsg                   msg;
23057 +    uint32_t                        replyLength;
23058 +    t_FmPcdIpcReply                 reply;
23059 +
23060 +    /* check that no port is bound to this clsPlan */
23061 +    if (p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].owners)
23062 +    {
23063 +        REPORT_ERROR(MINOR, E_INVALID_STATE, ("Trying to delete a clsPlan grp that has ports bound to"));
23064 +        return;
23065 +    }
23066 +
23067 +    FmPcdSetClsPlanGrpId(p_FmPcd, p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].netEnvId, ILLEGAL_CLS_PLAN);
23068 +
23069 +    if (grpId == p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId)
23070 +        p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId = ILLEGAL_CLS_PLAN;
23071 +    else
23072 +        FmPcdDecNetEnvOwners(p_FmPcd, p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].netEnvId);
23073 +
23074 +    /* free blocks */
23075 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
23076 +        KgFreeClsPlanEntries(h_FmPcd,
23077 +                             p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].sizeOfGrp,
23078 +                             p_FmPcd->guestId,
23079 +                             p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].baseEntry);
23080 +    else    /* in GUEST_PARTITION, we use the IPC, to also set a private driver group if required */
23081 +    {
23082 +        memset(&reply, 0, sizeof(reply));
23083 +        memset(&msg, 0, sizeof(msg));
23084 +        kgAlloc.guestId = p_FmPcd->guestId;
23085 +        kgAlloc.numOfClsPlanEntries = p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].sizeOfGrp;
23086 +        kgAlloc.clsPlanBase = p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].baseEntry;
23087 +        msg.msgId = FM_PCD_FREE_KG_CLSPLAN;
23088 +        memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
23089 +        replyLength = sizeof(uint32_t);
23090 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
23091 +                                (uint8_t*)&msg,
23092 +                                sizeof(msg.msgId) + sizeof(kgAlloc),
23093 +                                (uint8_t*)&reply,
23094 +                                &replyLength,
23095 +                                NULL,
23096 +                                NULL);
23097 +        if (err != E_OK)
23098 +        {
23099 +            REPORT_ERROR(MINOR, err, NO_MSG);
23100 +            return;
23101 +        }
23102 +        if (replyLength != sizeof(uint32_t))
23103 +        {
23104 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
23105 +            return;
23106 +        }
23107 +        if ((t_Error)reply.error != E_OK)
23108 +        {
23109 +            REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Free KG clsPlan failed"));
23110 +            return;
23111 +        }
23112 +    }
23113 +
23114 +    /* clear clsPlan driver structure */
23115 +    memset(&p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId], 0, sizeof(t_FmPcdKgClsPlanGrp));
23116 +}
23117 +
23118 +t_Error FmPcdKgBuildBindPortToSchemes(t_Handle h_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_BindPort, uint32_t *p_SpReg, bool add)
23119 +{
23120 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
23121 +    uint32_t                j, schemesPerPortVector = 0;
23122 +    t_FmPcdKgScheme         *p_Scheme;
23123 +    uint8_t                 i, relativeSchemeId;
23124 +    uint32_t                tmp, walking1Mask;
23125 +    uint8_t                 swPortIndex = 0;
23126 +
23127 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
23128 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE);
23129 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
23130 +
23131 +    /* for each scheme */
23132 +    for (i = 0; i<p_BindPort->numOfSchemes; i++)
23133 +    {
23134 +        relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, p_BindPort->schemesIds[i]);
23135 +        if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
23136 +            RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
23137 +
23138 +        if (add)
23139 +        {
23140 +            p_Scheme = &p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId];
23141 +            if (!FmPcdKgIsSchemeValidSw(p_Scheme))
23142 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Requested scheme is invalid."));
23143 +            /* check netEnvId  of the port against the scheme netEnvId */
23144 +            if ((p_Scheme->netEnvId != p_BindPort->netEnvId) && (p_Scheme->netEnvId != ILLEGAL_NETENV))
23145 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Port may not be bound to requested scheme - differ in netEnvId"));
23146 +
23147 +            /* if next engine is private port policer profile, we need to check that it is valid */
23148 +            HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, p_BindPort->hardwarePortId);
23149 +            if (p_Scheme->nextRelativePlcrProfile)
23150 +            {
23151 +                for (j = 0;j<p_Scheme->numOfProfiles;j++)
23152 +                {
23153 +                    ASSERT_COND(p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].h_FmPort);
23154 +                    if (p_Scheme->relativeProfileId+j >= p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles)
23155 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Relative profile not in range"));
23156 +                     if (!FmPcdPlcrIsProfileValid(p_FmPcd, (uint16_t)(p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase + p_Scheme->relativeProfileId + j)))
23157 +                        RETURN_ERROR(MINOR, E_INVALID_STATE, ("Relative profile not valid."));
23158 +                }
23159 +            }
23160 +            if (!p_BindPort->useClsPlan)
23161 +            {
23162 +                /* This check may be redundant as port is a assigned to the whole NetEnv */
23163 +
23164 +                /* if this port does not use clsPlan, it may not be bound to schemes with units that contain
23165 +                cls plan options. Schemes that are used only directly, should not be checked.
23166 +                it also may not be bound to schemes that go to CC with units that are options  - so we OR
23167 +                the match vector and the grpBits (= ccUnits) */
23168 +                if ((p_Scheme->matchVector != SCHEME_ALWAYS_DIRECT) || p_Scheme->ccUnits)
23169 +                {
23170 +                    uint8_t netEnvId;
23171 +                    walking1Mask = 0x80000000;
23172 +                    netEnvId = (p_Scheme->netEnvId == ILLEGAL_NETENV)? p_BindPort->netEnvId:p_Scheme->netEnvId;
23173 +                    tmp = (p_Scheme->matchVector == SCHEME_ALWAYS_DIRECT)? 0:p_Scheme->matchVector;
23174 +                    tmp |= p_Scheme->ccUnits;
23175 +                    while (tmp)
23176 +                    {
23177 +                        if (tmp & walking1Mask)
23178 +                        {
23179 +                            tmp &= ~walking1Mask;
23180 +                            if (!PcdNetEnvIsUnitWithoutOpts(p_FmPcd, netEnvId, walking1Mask))
23181 +                                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Port (without clsPlan) may not be bound to requested scheme - uses clsPlan options"));
23182 +                        }
23183 +                        walking1Mask >>= 1;
23184 +                    }
23185 +                }
23186 +            }
23187 +        }
23188 +        /* build vector */
23189 +        schemesPerPortVector |= 1 << (31 - p_BindPort->schemesIds[i]);
23190 +    }
23191 +
23192 +    *p_SpReg = schemesPerPortVector;
23193 +
23194 +    return E_OK;
23195 +}
23196 +
23197 +t_Error FmPcdKgBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes  *p_SchemeBind)
23198 +{
23199 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
23200 +    uint32_t                spReg;
23201 +    t_Error                 err = E_OK;
23202 +
23203 +    err = FmPcdKgBuildBindPortToSchemes(h_FmPcd, p_SchemeBind, &spReg, TRUE);
23204 +    if (err)
23205 +        RETURN_ERROR(MAJOR, err, NO_MSG);
23206 +
23207 +    err = KgWriteSp(p_FmPcd, p_SchemeBind->hardwarePortId, spReg, TRUE);
23208 +    if (err)
23209 +        RETURN_ERROR(MAJOR, err, NO_MSG);
23210 +
23211 +    IncSchemeOwners(p_FmPcd, p_SchemeBind);
23212 +
23213 +    return E_OK;
23214 +}
23215 +
23216 +t_Error FmPcdKgUnbindPortToSchemes(t_Handle h_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind)
23217 +{
23218 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
23219 +    uint32_t                spReg;
23220 +    t_Error                 err = E_OK;
23221 +
23222 +    err = FmPcdKgBuildBindPortToSchemes(p_FmPcd, p_SchemeBind, &spReg, FALSE);
23223 +    if (err)
23224 +        RETURN_ERROR(MAJOR, err, NO_MSG);
23225 +
23226 +    err = KgWriteSp(p_FmPcd, p_SchemeBind->hardwarePortId, spReg, FALSE);
23227 +    if (err)
23228 +        RETURN_ERROR(MAJOR, err, NO_MSG);
23229 +
23230 +    DecSchemeOwners(p_FmPcd, p_SchemeBind);
23231 +
23232 +    return E_OK;
23233 +}
23234 +
23235 +bool FmPcdKgIsSchemeValidSw(t_Handle h_Scheme)
23236 +{
23237 +    t_FmPcdKgScheme     *p_Scheme = (t_FmPcdKgScheme*)h_Scheme;
23238 +
23239 +    return p_Scheme->valid;
23240 +}
23241 +
23242 +bool KgIsSchemeAlwaysDirect(t_Handle h_FmPcd, uint8_t schemeId)
23243 +{
23244 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23245 +
23246 +    if (p_FmPcd->p_FmPcdKg->schemes[schemeId].matchVector == SCHEME_ALWAYS_DIRECT)
23247 +        return TRUE;
23248 +    else
23249 +        return FALSE;
23250 +}
23251 +
23252 +t_Error  FmPcdKgAllocSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds)
23253 +{
23254 +    t_FmPcd             *p_FmPcd = (t_FmPcd *)h_FmPcd;
23255 +    uint8_t             i, j;
23256 +
23257 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
23258 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE);
23259 +
23260 +    /* This routine is issued only on master core of master partition -
23261 +       either directly or through IPC, so no need for lock */
23262 +
23263 +    for (j = 0, i = 0; i < FM_PCD_KG_NUM_OF_SCHEMES && j < numOfSchemes; i++)
23264 +    {
23265 +        if (!p_FmPcd->p_FmPcdKg->schemesMng[i].allocated)
23266 +        {
23267 +            p_FmPcd->p_FmPcdKg->schemesMng[i].allocated = TRUE;
23268 +            p_FmPcd->p_FmPcdKg->schemesMng[i].ownerId = guestId;
23269 +            p_SchemesIds[j] = i;
23270 +            j++;
23271 +        }
23272 +    }
23273 +
23274 +    if (j != numOfSchemes)
23275 +    {
23276 +        /* roll back */
23277 +        for (j--; j; j--)
23278 +        {
23279 +            p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[j]].allocated = FALSE;
23280 +            p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[j]].ownerId = 0;
23281 +            p_SchemesIds[j] = 0;
23282 +        }
23283 +
23284 +        RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("No schemes found"));
23285 +    }
23286 +
23287 +    return E_OK;
23288 +}
23289 +
23290 +t_Error  FmPcdKgFreeSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds)
23291 +{
23292 +    t_FmPcd             *p_FmPcd = (t_FmPcd *)h_FmPcd;
23293 +    uint8_t             i;
23294 +
23295 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
23296 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE);
23297 +
23298 +    /* This routine is issued only on master core of master partition -
23299 +       either directly or through IPC */
23300 +
23301 +    for (i = 0; i < numOfSchemes; i++)
23302 +    {
23303 +        if (!p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].allocated)
23304 +        {
23305 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Scheme was not previously allocated"));
23306 +        }
23307 +        if (p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].ownerId != guestId)
23308 +        {
23309 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Scheme is not owned by caller. "));
23310 +        }
23311 +        p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].allocated = FALSE;
23312 +        p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].ownerId = 0;
23313 +    }
23314 +
23315 +    return E_OK;
23316 +}
23317 +
23318 +t_Error  KgAllocClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t *p_First)
23319 +{
23320 +    t_FmPcd     *p_FmPcd = (t_FmPcd *)h_FmPcd;
23321 +    uint8_t     numOfBlocks, blocksFound=0, first=0;
23322 +    uint8_t     i, j;
23323 +
23324 +    /* This routine is issued only on master core of master partition -
23325 +       either directly or through IPC, so no need for lock */
23326 +
23327 +    if (!numOfClsPlanEntries)
23328 +        return E_OK;
23329 +
23330 +    if ((numOfClsPlanEntries % CLS_PLAN_NUM_PER_GRP) || (!POWER_OF_2(numOfClsPlanEntries)))
23331 +         RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfClsPlanEntries must be a power of 2 and divisible by 8"));
23332 +
23333 +    numOfBlocks =  (uint8_t)(numOfClsPlanEntries/CLS_PLAN_NUM_PER_GRP);
23334 +
23335 +    /* try to find consequent blocks */
23336 +    first = 0;
23337 +    for (i = 0; i < FM_PCD_MAX_NUM_OF_CLS_PLANS/CLS_PLAN_NUM_PER_GRP;)
23338 +    {
23339 +        if (!p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].allocated)
23340 +        {
23341 +            blocksFound++;
23342 +            i++;
23343 +            if (blocksFound == numOfBlocks)
23344 +                break;
23345 +        }
23346 +        else
23347 +        {
23348 +            blocksFound = 0;
23349 +            /* advance i to the next aligned address */
23350 +            first = i = (uint8_t)(first + numOfBlocks);
23351 +        }
23352 +    }
23353 +
23354 +    if (blocksFound == numOfBlocks)
23355 +    {
23356 +        *p_First = (uint8_t)(first * CLS_PLAN_NUM_PER_GRP);
23357 +        for (j = first; j < (first + numOfBlocks); j++)
23358 +        {
23359 +            p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[j].allocated = TRUE;
23360 +            p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[j].ownerId = guestId;
23361 +        }
23362 +        return E_OK;
23363 +    }
23364 +    else
23365 +        RETURN_ERROR(MINOR, E_FULL, ("No resources for clsPlan"));
23366 +}
23367 +
23368 +void KgFreeClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t base)
23369 +{
23370 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23371 +    uint8_t     numOfBlocks;
23372 +    uint8_t     i, baseBlock;
23373 +
23374 +#ifdef DISABLE_ASSERTIONS
23375 +UNUSED(guestId);
23376 +#endif /* DISABLE_ASSERTIONS */
23377 +
23378 +    /* This routine is issued only on master core of master partition -
23379 +       either directly or through IPC, so no need for lock */
23380 +
23381 +    numOfBlocks =  (uint8_t)(numOfClsPlanEntries/CLS_PLAN_NUM_PER_GRP);
23382 +    ASSERT_COND(!(base%CLS_PLAN_NUM_PER_GRP));
23383 +
23384 +    baseBlock = (uint8_t)(base/CLS_PLAN_NUM_PER_GRP);
23385 +    for (i=baseBlock;i<baseBlock+numOfBlocks;i++)
23386 +    {
23387 +        ASSERT_COND(p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].allocated);
23388 +        ASSERT_COND(guestId == p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].ownerId);
23389 +        p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].allocated = FALSE;
23390 +        p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].ownerId = 0;
23391 +    }
23392 +}
23393 +
23394 +void KgEnable(t_FmPcd *p_FmPcd)
23395 +{
23396 +    struct fman_kg_regs *p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
23397 +
23398 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
23399 +    fman_kg_enable(p_Regs);
23400 +}
23401 +
23402 +void KgDisable(t_FmPcd *p_FmPcd)
23403 +{
23404 +    struct fman_kg_regs *p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
23405 +
23406 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
23407 +    fman_kg_disable(p_Regs);
23408 +}
23409 +
23410 +void KgSetClsPlan(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanSet *p_Set)
23411 +{
23412 +    t_FmPcd                 *p_FmPcd = (t_FmPcd *)h_FmPcd;
23413 +    struct fman_kg_cp_regs  *p_FmPcdKgPortRegs;
23414 +    uint32_t                tmpKgarReg = 0, intFlags;
23415 +    uint16_t                i, j;
23416 +
23417 +    /* This routine is protected by the calling routine ! */
23418 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
23419 +    p_FmPcdKgPortRegs = &p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->clsPlanRegs;
23420 +
23421 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
23422 +    for (i=p_Set->baseEntry;i<p_Set->baseEntry+p_Set->numOfClsPlanEntries;i+=8)
23423 +    {
23424 +        tmpKgarReg = FmPcdKgBuildWriteClsPlanBlockActionReg((uint8_t)(i / CLS_PLAN_NUM_PER_GRP));
23425 +
23426 +        for (j = i; j < i+8; j++)
23427 +        {
23428 +            ASSERT_COND(IN_RANGE(0, (j - p_Set->baseEntry), FM_PCD_MAX_NUM_OF_CLS_PLANS-1));
23429 +            WRITE_UINT32(p_FmPcdKgPortRegs->kgcpe[j % CLS_PLAN_NUM_PER_GRP],p_Set->vectors[j - p_Set->baseEntry]);
23430 +        }
23431 +
23432 +        if (WriteKgarWait(p_FmPcd, tmpKgarReg) != E_OK)
23433 +        {
23434 +            REPORT_ERROR(MAJOR, E_INVALID_STATE, ("WriteKgarWait FAILED"));
23435 +            KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
23436 +            return;
23437 +        }
23438 +    }
23439 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
23440 +}
23441 +
23442 +t_Handle KgConfig( t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams)
23443 +{
23444 +    t_FmPcdKg   *p_FmPcdKg;
23445 +
23446 +    UNUSED(p_FmPcd);
23447 +
23448 +    if (p_FmPcdParams->numOfSchemes > FM_PCD_KG_NUM_OF_SCHEMES)
23449 +    {
23450 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE,
23451 +                     ("numOfSchemes should not exceed %d", FM_PCD_KG_NUM_OF_SCHEMES));
23452 +        return NULL;
23453 +    }
23454 +
23455 +    p_FmPcdKg = (t_FmPcdKg *)XX_Malloc(sizeof(t_FmPcdKg));
23456 +    if (!p_FmPcdKg)
23457 +    {
23458 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Keygen allocation FAILED"));
23459 +        return NULL;
23460 +    }
23461 +    memset(p_FmPcdKg, 0, sizeof(t_FmPcdKg));
23462 +
23463 +
23464 +    if (FmIsMaster(p_FmPcd->h_Fm))
23465 +    {
23466 +        p_FmPcdKg->p_FmPcdKgRegs  = (struct fman_kg_regs *)UINT_TO_PTR(FmGetPcdKgBaseAddr(p_FmPcdParams->h_Fm));
23467 +        p_FmPcd->exceptions |= DEFAULT_fmPcdKgErrorExceptions;
23468 +        p_FmPcdKg->p_IndirectAccessRegs = (u_FmPcdKgIndirectAccessRegs *)&p_FmPcdKg->p_FmPcdKgRegs->fmkg_indirect[0];
23469 +    }
23470 +
23471 +    p_FmPcdKg->numOfSchemes = p_FmPcdParams->numOfSchemes;
23472 +    if ((p_FmPcd->guestId == NCSW_MASTER_ID) && !p_FmPcdKg->numOfSchemes)
23473 +    {
23474 +        p_FmPcdKg->numOfSchemes = FM_PCD_KG_NUM_OF_SCHEMES;
23475 +        DBG(WARNING, ("numOfSchemes was defined 0 by user, re-defined by driver to FM_PCD_KG_NUM_OF_SCHEMES"));
23476 +    }
23477 +
23478 +    p_FmPcdKg->emptyClsPlanGrpId = ILLEGAL_CLS_PLAN;
23479 +
23480 +    return p_FmPcdKg;
23481 +}
23482 +
23483 +t_Error KgInit(t_FmPcd *p_FmPcd)
23484 +{
23485 +    t_Error err = E_OK;
23486 +
23487 +    p_FmPcd->p_FmPcdKg->h_HwSpinlock = XX_InitSpinlock();
23488 +    if (!p_FmPcd->p_FmPcdKg->h_HwSpinlock)
23489 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM KG HW spinlock"));
23490 +
23491 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
23492 +        err =  KgInitMaster(p_FmPcd);
23493 +    else
23494 +        err =  KgInitGuest(p_FmPcd);
23495 +
23496 +    if (err != E_OK)
23497 +    {
23498 +        if (p_FmPcd->p_FmPcdKg->h_HwSpinlock)
23499 +            XX_FreeSpinlock(p_FmPcd->p_FmPcdKg->h_HwSpinlock);
23500 +    }
23501 +
23502 +    return err;
23503 +}
23504 +
23505 +t_Error KgFree(t_FmPcd *p_FmPcd)
23506 +{
23507 +    t_FmPcdIpcKgSchemesParams       kgAlloc;
23508 +    t_Error                         err = E_OK;
23509 +    t_FmPcdIpcMsg                   msg;
23510 +    uint32_t                        replyLength;
23511 +    t_FmPcdIpcReply                 reply;
23512 +
23513 +    FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_KG, 0, e_FM_INTR_TYPE_ERR);
23514 +
23515 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
23516 +    {
23517 +        err = FmPcdKgFreeSchemes(p_FmPcd,
23518 +                                    p_FmPcd->p_FmPcdKg->numOfSchemes,
23519 +                                    p_FmPcd->guestId,
23520 +                                    p_FmPcd->p_FmPcdKg->schemesIds);
23521 +        if (err)
23522 +            RETURN_ERROR(MAJOR, err, NO_MSG);
23523 +
23524 +        if (p_FmPcd->p_FmPcdKg->h_HwSpinlock)
23525 +            XX_FreeSpinlock(p_FmPcd->p_FmPcdKg->h_HwSpinlock);
23526 +
23527 +        return E_OK;
23528 +    }
23529 +
23530 +    /* guest */
23531 +    memset(&reply, 0, sizeof(reply));
23532 +    memset(&msg, 0, sizeof(msg));
23533 +    kgAlloc.numOfSchemes = p_FmPcd->p_FmPcdKg->numOfSchemes;
23534 +    kgAlloc.guestId = p_FmPcd->guestId;
23535 +    ASSERT_COND(kgAlloc.numOfSchemes < FM_PCD_KG_NUM_OF_SCHEMES);
23536 +    memcpy(kgAlloc.schemesIds, p_FmPcd->p_FmPcdKg->schemesIds, (sizeof(uint8_t))*kgAlloc.numOfSchemes);
23537 +    msg.msgId = FM_PCD_FREE_KG_SCHEMES;
23538 +    memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
23539 +    replyLength = sizeof(uint32_t);
23540 +    if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
23541 +                                 (uint8_t*)&msg,
23542 +                                 sizeof(msg.msgId) + sizeof(kgAlloc),
23543 +                                 (uint8_t*)&reply,
23544 +                                 &replyLength,
23545 +                                 NULL,
23546 +                                 NULL)) != E_OK)
23547 +        RETURN_ERROR(MAJOR, err, NO_MSG);
23548 +    if (replyLength != sizeof(uint32_t))
23549 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
23550 +
23551 +    if (p_FmPcd->p_FmPcdKg->h_HwSpinlock)
23552 +        XX_FreeSpinlock(p_FmPcd->p_FmPcdKg->h_HwSpinlock);
23553 +
23554 +    return (t_Error)reply.error;
23555 +}
23556 +
23557 +t_Error FmPcdKgSetOrBindToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t netEnvId, protocolOpt_t *p_OptArray, uint8_t *p_ClsPlanGrpId, bool *p_IsEmptyClsPlanGrp)
23558 +{
23559 +    t_FmPcd                                 *p_FmPcd = (t_FmPcd *)h_FmPcd;
23560 +    t_FmPcdKgInterModuleClsPlanGrpParams    grpParams, *p_GrpParams;
23561 +    t_FmPcdKgClsPlanGrp                     *p_ClsPlanGrp;
23562 +    t_FmPcdKgInterModuleClsPlanSet          *p_ClsPlanSet;
23563 +    t_Error                                 err;
23564 +
23565 +    /* This function is issued only from FM_PORT_SetPcd which locked all PCD modules,
23566 +       so no need for lock here */
23567 +
23568 +    memset(&grpParams, 0, sizeof(grpParams));
23569 +    grpParams.clsPlanGrpId = ILLEGAL_CLS_PLAN;
23570 +    p_GrpParams = &grpParams;
23571 +
23572 +    p_GrpParams->netEnvId = netEnvId;
23573 +
23574 +    /* Get from the NetEnv the information of the clsPlan (can be already created,
23575 +     * or needs to build) */
23576 +    err = PcdGetClsPlanGrpParams(h_FmPcd, p_GrpParams);
23577 +    if (err)
23578 +        RETURN_ERROR(MINOR,err,NO_MSG);
23579 +
23580 +    if (p_GrpParams->grpExists)
23581 +    {
23582 +        /* this group was already updated (at least) in SW */
23583 +        *p_ClsPlanGrpId = p_GrpParams->clsPlanGrpId;
23584 +    }
23585 +    else
23586 +    {
23587 +        p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
23588 +        if (!p_ClsPlanSet)
23589 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
23590 +        memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
23591 +        /* Build (in SW) the clsPlan parameters, including the vectors to be written to HW */
23592 +        err = FmPcdKgBuildClsPlanGrp(h_FmPcd, p_GrpParams, p_ClsPlanSet);
23593 +        if (err)
23594 +        {
23595 +            XX_Free(p_ClsPlanSet);
23596 +            RETURN_ERROR(MINOR, err, NO_MSG);
23597 +        }
23598 +        *p_ClsPlanGrpId = p_GrpParams->clsPlanGrpId;
23599 +
23600 +        if (p_FmPcd->h_Hc)
23601 +        {
23602 +            /* write clsPlan entries to memory */
23603 +            err = FmHcPcdKgSetClsPlan(p_FmPcd->h_Hc, p_ClsPlanSet);
23604 +            if (err)
23605 +            {
23606 +                XX_Free(p_ClsPlanSet);
23607 +                RETURN_ERROR(MAJOR, err, NO_MSG);
23608 +            }
23609 +        }
23610 +        else
23611 +            /* write clsPlan entries to memory */
23612 +            KgSetClsPlan(p_FmPcd, p_ClsPlanSet);
23613 +
23614 +        XX_Free(p_ClsPlanSet);
23615 +    }
23616 +
23617 +    /* Set caller parameters     */
23618 +
23619 +    /* mark if this is an empty classification group */
23620 +    if (*p_ClsPlanGrpId == p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId)
23621 +        *p_IsEmptyClsPlanGrp = TRUE;
23622 +    else
23623 +        *p_IsEmptyClsPlanGrp = FALSE;
23624 +
23625 +    p_ClsPlanGrp = &p_FmPcd->p_FmPcdKg->clsPlanGrps[*p_ClsPlanGrpId];
23626 +
23627 +   /* increment owners number */
23628 +    p_ClsPlanGrp->owners++;
23629 +
23630 +    /* copy options array for port */
23631 +    memcpy(p_OptArray, &p_FmPcd->p_FmPcdKg->clsPlanGrps[*p_ClsPlanGrpId].optArray, FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)*sizeof(protocolOpt_t));
23632 +
23633 +    /* bind port to the new or existing group */
23634 +    err = BindPortToClsPlanGrp(p_FmPcd, hardwarePortId, p_GrpParams->clsPlanGrpId);
23635 +    if (err)
23636 +        RETURN_ERROR(MINOR, err, NO_MSG);
23637 +
23638 +    return E_OK;
23639 +}
23640 +
23641 +t_Error FmPcdKgDeleteOrUnbindPortToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId)
23642 +{
23643 +    t_FmPcd                         *p_FmPcd = (t_FmPcd *)h_FmPcd;
23644 +    t_FmPcdKgClsPlanGrp             *p_ClsPlanGrp = &p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId];
23645 +    t_FmPcdKgInterModuleClsPlanSet  *p_ClsPlanSet;
23646 +    t_Error                         err;
23647 +
23648 +    /* This function is issued only from FM_PORT_DeletePcd which locked all PCD modules,
23649 +       so no need for lock here */
23650 +
23651 +    UnbindPortToClsPlanGrp(p_FmPcd, hardwarePortId);
23652 +
23653 +    /* decrement owners number */
23654 +    ASSERT_COND(p_ClsPlanGrp->owners);
23655 +    p_ClsPlanGrp->owners--;
23656 +
23657 +    if (!p_ClsPlanGrp->owners)
23658 +    {
23659 +        if (p_FmPcd->h_Hc)
23660 +        {
23661 +            err = FmHcPcdKgDeleteClsPlan(p_FmPcd->h_Hc, clsPlanGrpId);
23662 +            return err;
23663 +        }
23664 +        else
23665 +        {
23666 +            /* clear clsPlan entries in memory */
23667 +            p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
23668 +            if (!p_ClsPlanSet)
23669 +            {
23670 +                RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
23671 +            }
23672 +            memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
23673 +
23674 +            p_ClsPlanSet->baseEntry = p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].baseEntry;
23675 +            p_ClsPlanSet->numOfClsPlanEntries = p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].sizeOfGrp;
23676 +            KgSetClsPlan(p_FmPcd, p_ClsPlanSet);
23677 +            XX_Free(p_ClsPlanSet);
23678 +
23679 +            FmPcdKgDestroyClsPlanGrp(h_FmPcd, clsPlanGrpId);
23680 +       }
23681 +    }
23682 +    return E_OK;
23683 +}
23684 +
23685 +uint32_t FmPcdKgGetRequiredAction(t_Handle h_FmPcd, uint8_t schemeId)
23686 +{
23687 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23688 +    ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
23689 +
23690 +    return p_FmPcd->p_FmPcdKg->schemes[schemeId].requiredAction;
23691 +}
23692 +
23693 +uint32_t FmPcdKgGetRequiredActionFlag(t_Handle h_FmPcd, uint8_t schemeId)
23694 +{
23695 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23696 +
23697 +   ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
23698 +
23699 +    return p_FmPcd->p_FmPcdKg->schemes[schemeId].requiredActionFlag;
23700 +}
23701 +
23702 +bool FmPcdKgIsDirectPlcr(t_Handle h_FmPcd, uint8_t schemeId)
23703 +{
23704 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23705 +
23706 +   ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
23707 +
23708 +    return p_FmPcd->p_FmPcdKg->schemes[schemeId].directPlcr;
23709 +}
23710 +
23711 +
23712 +uint16_t FmPcdKgGetRelativeProfileId(t_Handle h_FmPcd, uint8_t schemeId)
23713 +{
23714 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23715 +
23716 +   ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
23717 +
23718 +    return p_FmPcd->p_FmPcdKg->schemes[schemeId].relativeProfileId;
23719 +}
23720 +
23721 +bool FmPcdKgIsDistrOnPlcrProfile(t_Handle h_FmPcd, uint8_t schemeId)
23722 +{
23723 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23724 +
23725 +   ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
23726 +
23727 +    if ((p_FmPcd->p_FmPcdKg->schemes[schemeId].extractedOrs &&
23728 +        p_FmPcd->p_FmPcdKg->schemes[schemeId].bitOffsetInPlcrProfile) ||
23729 +        p_FmPcd->p_FmPcdKg->schemes[schemeId].nextRelativePlcrProfile)
23730 +        return TRUE;
23731 +    else
23732 +        return FALSE;
23733 +
23734 +}
23735 +
23736 +e_FmPcdEngine FmPcdKgGetNextEngine(t_Handle h_FmPcd, uint8_t relativeSchemeId)
23737 +{
23738 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23739 +
23740 +    ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].valid);
23741 +
23742 +    return p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextEngine;
23743 +}
23744 +
23745 +e_FmPcdDoneAction FmPcdKgGetDoneAction(t_Handle h_FmPcd, uint8_t schemeId)
23746 +{
23747 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23748 +
23749 +    ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
23750 +
23751 +    return p_FmPcd->p_FmPcdKg->schemes[schemeId].doneAction;
23752 +}
23753 +
23754 +void FmPcdKgUpdateRequiredAction(t_Handle h_Scheme, uint32_t requiredAction)
23755 +{
23756 +    t_FmPcdKgScheme *p_Scheme = (t_FmPcdKgScheme *)h_Scheme;
23757 +
23758 +    /* this routine is protected by calling routine */
23759 +
23760 +    ASSERT_COND(p_Scheme->valid);
23761 +
23762 +    p_Scheme->requiredAction |= requiredAction;
23763 +}
23764 +
23765 +bool FmPcdKgHwSchemeIsValid(uint32_t schemeModeReg)
23766 +{
23767 +    return (bool)!!(schemeModeReg & KG_SCH_MODE_EN);
23768 +}
23769 +
23770 +uint32_t FmPcdKgBuildWriteSchemeActionReg(uint8_t schemeId, bool updateCounter)
23771 +{
23772 +    return (uint32_t)(((uint32_t)schemeId << FM_PCD_KG_KGAR_NUM_SHIFT) |
23773 +                      FM_KG_KGAR_GO |
23774 +                      FM_KG_KGAR_WRITE |
23775 +                      FM_KG_KGAR_SEL_SCHEME_ENTRY |
23776 +                      DUMMY_PORT_ID |
23777 +                      (updateCounter ? FM_KG_KGAR_SCM_WSEL_UPDATE_CNT:0));
23778 +}
23779 +
23780 +uint32_t FmPcdKgBuildReadSchemeActionReg(uint8_t schemeId)
23781 +{
23782 +    return (uint32_t)(((uint32_t)schemeId << FM_PCD_KG_KGAR_NUM_SHIFT) |
23783 +                      FM_KG_KGAR_GO |
23784 +                      FM_KG_KGAR_READ |
23785 +                      FM_KG_KGAR_SEL_SCHEME_ENTRY |
23786 +                      DUMMY_PORT_ID |
23787 +                      FM_KG_KGAR_SCM_WSEL_UPDATE_CNT);
23788 +
23789 +}
23790 +
23791 +uint32_t FmPcdKgBuildWriteClsPlanBlockActionReg(uint8_t grpId)
23792 +{
23793 +    return (uint32_t)(FM_KG_KGAR_GO |
23794 +                      FM_KG_KGAR_WRITE |
23795 +                      FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
23796 +                      DUMMY_PORT_ID |
23797 +                      ((uint32_t)grpId << FM_PCD_KG_KGAR_NUM_SHIFT) |
23798 +                      FM_PCD_KG_KGAR_WSEL_MASK);
23799 +
23800 +    /* if we ever want to write 1 by 1, use:
23801 +       sel = (uint8_t)(0x01 << (7- (entryId % CLS_PLAN_NUM_PER_GRP)));
23802 +     */
23803 +}
23804 +
23805 +uint32_t FmPcdKgBuildWritePortSchemeBindActionReg(uint8_t hardwarePortId)
23806 +{
23807 +
23808 +    return (uint32_t)(FM_KG_KGAR_GO |
23809 +                      FM_KG_KGAR_WRITE |
23810 +                      FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
23811 +                      hardwarePortId |
23812 +                      FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP);
23813 +}
23814 +
23815 +uint32_t FmPcdKgBuildReadPortSchemeBindActionReg(uint8_t hardwarePortId)
23816 +{
23817 +
23818 +    return (uint32_t)(FM_KG_KGAR_GO |
23819 +                      FM_KG_KGAR_READ |
23820 +                      FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
23821 +                      hardwarePortId |
23822 +                      FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP);
23823 +}
23824 +
23825 +uint32_t FmPcdKgBuildWritePortClsPlanBindActionReg(uint8_t hardwarePortId)
23826 +{
23827 +
23828 +    return (uint32_t)(FM_KG_KGAR_GO |
23829 +                      FM_KG_KGAR_WRITE |
23830 +                      FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
23831 +                      hardwarePortId |
23832 +                      FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP);
23833 +}
23834 +
23835 +uint8_t FmPcdKgGetClsPlanGrpBase(t_Handle h_FmPcd, uint8_t clsPlanGrp)
23836 +{
23837 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23838 +
23839 +    return p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrp].baseEntry;
23840 +}
23841 +
23842 +uint16_t FmPcdKgGetClsPlanGrpSize(t_Handle h_FmPcd, uint8_t clsPlanGrp)
23843 +{
23844 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23845 +
23846 +    return p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrp].sizeOfGrp;
23847 +}
23848 +
23849 +
23850 +uint8_t FmPcdKgGetSchemeId(t_Handle h_Scheme)
23851 +{
23852 +    return ((t_FmPcdKgScheme*)h_Scheme)->schemeId;
23853 +
23854 +}
23855 +
23856 +#if (DPAA_VERSION >= 11)
23857 +bool FmPcdKgGetVspe(t_Handle h_Scheme)
23858 +{
23859 +    return ((t_FmPcdKgScheme*)h_Scheme)->vspe;
23860 +
23861 +}
23862 +#endif /* (DPAA_VERSION >= 11) */
23863 +
23864 +uint8_t FmPcdKgGetRelativeSchemeId(t_Handle h_FmPcd, uint8_t schemeId)
23865 +{
23866 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23867 +    uint8_t     i;
23868 +
23869 +    for (i = 0;i<p_FmPcd->p_FmPcdKg->numOfSchemes;i++)
23870 +        if (p_FmPcd->p_FmPcdKg->schemesIds[i] == schemeId)
23871 +            return i;
23872 +
23873 +    if (i == p_FmPcd->p_FmPcdKg->numOfSchemes)
23874 +        REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, ("Scheme is out of partition range"));
23875 +
23876 +    return FM_PCD_KG_NUM_OF_SCHEMES;
23877 +}
23878 +
23879 +t_Handle FmPcdKgGetSchemeHandle(t_Handle h_FmPcd, uint8_t relativeSchemeId)
23880 +{
23881 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
23882 +
23883 +    ASSERT_COND(p_FmPcd);
23884 +
23885 +    /* check that schemeId is in range */
23886 +    if (relativeSchemeId >= p_FmPcd->p_FmPcdKg->numOfSchemes)
23887 +    {
23888 +        REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, ("relative-scheme-id %d!", relativeSchemeId));
23889 +        return NULL;
23890 +    }
23891 +
23892 +    if (!FmPcdKgIsSchemeValidSw(&p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId]))
23893 +        return NULL;
23894 +
23895 +    return &p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId];
23896 +}
23897 +
23898 +bool FmPcdKgIsSchemeHasOwners(t_Handle h_Scheme)
23899 +{
23900 +    return (((t_FmPcdKgScheme*)h_Scheme)->owners == 0)?FALSE:TRUE;
23901 +}
23902 +
23903 +t_Error FmPcdKgCcGetSetParams(t_Handle h_FmPcd, t_Handle h_Scheme, uint32_t requiredAction, uint32_t value)
23904 +{
23905 +    t_FmPcd             *p_FmPcd = (t_FmPcd*)h_FmPcd;
23906 +    uint8_t             relativeSchemeId, physicalSchemeId;
23907 +    uint32_t            tmpKgarReg, tmpReg32 = 0, intFlags;
23908 +    t_Error             err;
23909 +    t_FmPcdKgScheme     *p_Scheme = (t_FmPcdKgScheme*)h_Scheme;
23910 +
23911 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, 0);
23912 +    SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE, 0);
23913 +    SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, 0);
23914 +
23915 +    /* Calling function locked all PCD modules, so no need to lock here */
23916 +
23917 +    if (!FmPcdKgIsSchemeValidSw(h_Scheme))
23918 +        RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is Invalid"));
23919 +
23920 +    if (p_FmPcd->h_Hc)
23921 +    {
23922 +        err = FmHcPcdKgCcGetSetParams(p_FmPcd->h_Hc, h_Scheme, requiredAction, value);
23923 +
23924 +        UpdateRequiredActionFlag(h_Scheme,TRUE);
23925 +        FmPcdKgUpdateRequiredAction(h_Scheme,requiredAction);
23926 +        return err;
23927 +    }
23928 +
23929 +    physicalSchemeId = p_Scheme->schemeId;
23930 +
23931 +    relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId);
23932 +    if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
23933 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
23934 +
23935 +    if (!p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].requiredActionFlag ||
23936 +        !(p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].requiredAction & requiredAction))
23937 +    {
23938 +        if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
23939 +        {
23940 +            switch (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextEngine)
23941 +            {
23942 +                case (e_FM_PCD_DONE):
23943 +                    if (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].doneAction == e_FM_PCD_ENQ_FRAME)
23944 +                    {
23945 +                        tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
23946 +                        intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
23947 +                        WriteKgarWait(p_FmPcd, tmpKgarReg);
23948 +                        tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode);
23949 +                        ASSERT_COND(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME));
23950 +                        WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, tmpReg32 | NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA);
23951 +                        /* call indirect command for scheme write */
23952 +                        tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
23953 +                        WriteKgarWait(p_FmPcd, tmpKgarReg);
23954 +                        KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
23955 +                    }
23956 +                break;
23957 +                case (e_FM_PCD_PLCR):
23958 +                    if (!p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].directPlcr ||
23959 +                       (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].extractedOrs &&
23960 +                        p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].bitOffsetInPlcrProfile) ||
23961 +                        p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextRelativePlcrProfile)
23962 +                        {
23963 +                            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("In this situation PP can not be with distribution and has to be shared"));
23964 +                        }
23965 +                        err = FmPcdPlcrCcGetSetParams(h_FmPcd, p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].relativeProfileId, requiredAction);
23966 +                        if (err)
23967 +                        {
23968 +                            RETURN_ERROR(MAJOR, err, NO_MSG);
23969 +                        }
23970 +               break;
23971 +               default:
23972 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE,("in this situation the next engine after scheme can be or PLCR or ENQ_FRAME"));
23973 +            }
23974 +        }
23975 +        if (requiredAction & UPDATE_KG_NIA_CC_WA)
23976 +        {
23977 +            if (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextEngine == e_FM_PCD_CC)
23978 +            {
23979 +                tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
23980 +                intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
23981 +                WriteKgarWait(p_FmPcd, tmpKgarReg);
23982 +                tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode);
23983 +                ASSERT_COND(tmpReg32 & (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
23984 +                tmpReg32 &= ~NIA_FM_CTL_AC_CC;
23985 +                WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, tmpReg32 | NIA_FM_CTL_AC_PRE_CC);
23986 +                /* call indirect command for scheme write */
23987 +                tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
23988 +                WriteKgarWait(p_FmPcd, tmpKgarReg);
23989 +                KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
23990 +           }
23991 +        }
23992 +        if (requiredAction & UPDATE_KG_OPT_MODE)
23993 +        {
23994 +            tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
23995 +            intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
23996 +            WriteKgarWait(p_FmPcd, tmpKgarReg);
23997 +            WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_om, value);
23998 +            /* call indirect command for scheme write */
23999 +            tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
24000 +            WriteKgarWait(p_FmPcd, tmpKgarReg);
24001 +            KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24002 +        }
24003 +        if (requiredAction & UPDATE_KG_NIA)
24004 +        {
24005 +            tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
24006 +            intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
24007 +            WriteKgarWait(p_FmPcd, tmpKgarReg);
24008 +            tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode);
24009 +            tmpReg32 &= ~(NIA_ENG_MASK | NIA_AC_MASK);
24010 +            tmpReg32 |= value;
24011 +            WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, tmpReg32);
24012 +            /* call indirect command for scheme write */
24013 +            tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
24014 +            WriteKgarWait(p_FmPcd, tmpKgarReg);
24015 +            KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24016 +        }
24017 +    }
24018 +
24019 +    UpdateRequiredActionFlag(h_Scheme, TRUE);
24020 +    FmPcdKgUpdateRequiredAction(h_Scheme, requiredAction);
24021 +
24022 +    return E_OK;
24023 +}
24024 +/*********************** End of inter-module routines ************************/
24025 +
24026 +
24027 +/****************************************/
24028 +/*  API routines                        */
24029 +/****************************************/
24030 +
24031 +t_Handle FM_PCD_KgSchemeSet(t_Handle h_FmPcd,  t_FmPcdKgSchemeParams *p_SchemeParams)
24032 +{
24033 +    t_FmPcd                             *p_FmPcd;
24034 +    struct fman_kg_scheme_regs          schemeRegs;
24035 +    struct fman_kg_scheme_regs          *p_MemRegs;
24036 +    uint8_t                             i;
24037 +    t_Error                             err = E_OK;
24038 +    uint32_t                            tmpKgarReg;
24039 +    uint32_t                            intFlags;
24040 +    uint8_t                             physicalSchemeId, relativeSchemeId = 0;
24041 +    t_FmPcdKgScheme                     *p_Scheme;
24042 +
24043 +    if (p_SchemeParams->modify)
24044 +    {
24045 +        p_Scheme = (t_FmPcdKgScheme *)p_SchemeParams->id.h_Scheme;
24046 +        p_FmPcd = p_Scheme->h_FmPcd;
24047 +
24048 +        SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, NULL);
24049 +        SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE, NULL);
24050 +
24051 +        if (!FmPcdKgIsSchemeValidSw(p_Scheme))
24052 +        {
24053 +            REPORT_ERROR(MAJOR, E_ALREADY_EXISTS,
24054 +                         ("Scheme is invalid"));
24055 +            return NULL;
24056 +        }
24057 +
24058 +        if (!KgSchemeFlagTryLock(p_Scheme))
24059 +        {
24060 +            DBG(TRACE, ("Scheme Try Lock - BUSY"));
24061 +            /* Signal to caller BUSY condition */
24062 +            p_SchemeParams->id.h_Scheme = NULL;
24063 +            return NULL;
24064 +        }
24065 +    }
24066 +    else
24067 +    {
24068 +        p_FmPcd = (t_FmPcd*)h_FmPcd;
24069 +
24070 +        SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, NULL);
24071 +        SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE, NULL);
24072 +
24073 +        relativeSchemeId = p_SchemeParams->id.relativeSchemeId;
24074 +        /* check that schemeId is in range */
24075 +        if (relativeSchemeId >= p_FmPcd->p_FmPcdKg->numOfSchemes)
24076 +        {
24077 +            REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, ("relative-scheme-id %d!", relativeSchemeId));
24078 +            return NULL;
24079 +        }
24080 +
24081 +        p_Scheme = &p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId];
24082 +        if (FmPcdKgIsSchemeValidSw(p_Scheme))
24083 +        {
24084 +            REPORT_ERROR(MAJOR, E_ALREADY_EXISTS,
24085 +                         ("Scheme id (%d)!", relativeSchemeId));
24086 +            return NULL;
24087 +        }
24088 +        /* Clear all fields, scheme may have beed previously used */
24089 +        memset(p_Scheme, 0, sizeof(t_FmPcdKgScheme));
24090 +
24091 +        p_Scheme->schemeId = p_FmPcd->p_FmPcdKg->schemesIds[relativeSchemeId];
24092 +        p_Scheme->h_FmPcd = p_FmPcd;
24093 +
24094 +        p_Scheme->p_Lock = FmPcdAcquireLock(p_FmPcd);
24095 +        if (!p_Scheme->p_Lock)
24096 +            REPORT_ERROR(MAJOR, E_NOT_AVAILABLE, ("FM KG Scheme lock obj!"));
24097 +    }
24098 +
24099 +    err = BuildSchemeRegs((t_Handle)p_Scheme, p_SchemeParams, &schemeRegs);
24100 +    if (err)
24101 +    {
24102 +        REPORT_ERROR(MAJOR, err, NO_MSG);
24103 +        if (p_SchemeParams->modify)
24104 +            KgSchemeFlagUnlock(p_Scheme);
24105 +        if (!p_SchemeParams->modify &&
24106 +            p_Scheme->p_Lock)
24107 +            FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
24108 +        return NULL;
24109 +    }
24110 +
24111 +    if (p_FmPcd->h_Hc)
24112 +    {
24113 +        err = FmHcPcdKgSetScheme(p_FmPcd->h_Hc,
24114 +                                 (t_Handle)p_Scheme,
24115 +                                 &schemeRegs,
24116 +                                 p_SchemeParams->schemeCounter.update);
24117 +        if (p_SchemeParams->modify)
24118 +            KgSchemeFlagUnlock(p_Scheme);
24119 +        if (err)
24120 +        {
24121 +            if (!p_SchemeParams->modify &&
24122 +                p_Scheme->p_Lock)
24123 +                FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
24124 +            return NULL;
24125 +        }
24126 +        if (!p_SchemeParams->modify)
24127 +            ValidateSchemeSw(p_Scheme);
24128 +        return (t_Handle)p_Scheme;
24129 +    }
24130 +
24131 +    physicalSchemeId = p_Scheme->schemeId;
24132 +
24133 +    /* configure all 21 scheme registers */
24134 +    p_MemRegs = &p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs;
24135 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
24136 +    WRITE_UINT32(p_MemRegs->kgse_ppc,   schemeRegs.kgse_ppc);
24137 +    WRITE_UINT32(p_MemRegs->kgse_ccbs,  schemeRegs.kgse_ccbs);
24138 +    WRITE_UINT32(p_MemRegs->kgse_mode,  schemeRegs.kgse_mode);
24139 +    WRITE_UINT32(p_MemRegs->kgse_mv,    schemeRegs.kgse_mv);
24140 +    WRITE_UINT32(p_MemRegs->kgse_dv0,   schemeRegs.kgse_dv0);
24141 +    WRITE_UINT32(p_MemRegs->kgse_dv1,   schemeRegs.kgse_dv1);
24142 +    WRITE_UINT32(p_MemRegs->kgse_ekdv,  schemeRegs.kgse_ekdv);
24143 +    WRITE_UINT32(p_MemRegs->kgse_ekfc,  schemeRegs.kgse_ekfc);
24144 +    WRITE_UINT32(p_MemRegs->kgse_bmch,  schemeRegs.kgse_bmch);
24145 +    WRITE_UINT32(p_MemRegs->kgse_bmcl,  schemeRegs.kgse_bmcl);
24146 +    WRITE_UINT32(p_MemRegs->kgse_hc,    schemeRegs.kgse_hc);
24147 +    WRITE_UINT32(p_MemRegs->kgse_spc,   schemeRegs.kgse_spc);
24148 +    WRITE_UINT32(p_MemRegs->kgse_fqb,   schemeRegs.kgse_fqb);
24149 +    WRITE_UINT32(p_MemRegs->kgse_om,    schemeRegs.kgse_om);
24150 +    WRITE_UINT32(p_MemRegs->kgse_vsp,   schemeRegs.kgse_vsp);
24151 +    for (i=0 ; i<FM_KG_NUM_OF_GENERIC_REGS ; i++)
24152 +        WRITE_UINT32(p_MemRegs->kgse_gec[i], schemeRegs.kgse_gec[i]);
24153 +
24154 +    /* call indirect command for scheme write */
24155 +    tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, p_SchemeParams->schemeCounter.update);
24156 +
24157 +    WriteKgarWait(p_FmPcd, tmpKgarReg);
24158 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24159 +
24160 +    if (!p_SchemeParams->modify)
24161 +        ValidateSchemeSw(p_Scheme);
24162 +    else
24163 +        KgSchemeFlagUnlock(p_Scheme);
24164 +
24165 +    return (t_Handle)p_Scheme;
24166 +}
24167 +
24168 +t_Error  FM_PCD_KgSchemeDelete(t_Handle h_Scheme)
24169 +{
24170 +    t_FmPcd             *p_FmPcd;
24171 +    uint8_t             physicalSchemeId;
24172 +    uint32_t            tmpKgarReg, intFlags;
24173 +    t_Error             err = E_OK;
24174 +    t_FmPcdKgScheme     *p_Scheme = (t_FmPcdKgScheme *)h_Scheme;
24175 +
24176 +    SANITY_CHECK_RETURN_ERROR(h_Scheme, E_INVALID_HANDLE);
24177 +
24178 +    p_FmPcd = (t_FmPcd*)(p_Scheme->h_FmPcd);
24179 +
24180 +    UpdateRequiredActionFlag(h_Scheme, FALSE);
24181 +
24182 +    /* check that no port is bound to this scheme */
24183 +    err = InvalidateSchemeSw(h_Scheme);
24184 +    if (err)
24185 +        RETURN_ERROR(MINOR, err, NO_MSG);
24186 +
24187 +    if (p_FmPcd->h_Hc)
24188 +    {
24189 +        err = FmHcPcdKgDeleteScheme(p_FmPcd->h_Hc, h_Scheme);
24190 +        if (p_Scheme->p_Lock)
24191 +            FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
24192 +        return err;
24193 +    }
24194 +
24195 +    physicalSchemeId = ((t_FmPcdKgScheme *)h_Scheme)->schemeId;
24196 +
24197 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
24198 +    /* clear mode register, including enable bit */
24199 +    WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, 0);
24200 +
24201 +    /* call indirect command for scheme write */
24202 +    tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
24203 +
24204 +    WriteKgarWait(p_FmPcd, tmpKgarReg);
24205 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24206 +
24207 +    if (p_Scheme->p_Lock)
24208 +        FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
24209 +
24210 +    return E_OK;
24211 +}
24212 +
24213 +uint32_t  FM_PCD_KgSchemeGetCounter(t_Handle h_Scheme)
24214 +{
24215 +    t_FmPcd             *p_FmPcd;
24216 +    uint32_t            tmpKgarReg, spc, intFlags;
24217 +    uint8_t             physicalSchemeId;
24218 +
24219 +    SANITY_CHECK_RETURN_VALUE(h_Scheme, E_INVALID_HANDLE, 0);
24220 +
24221 +    p_FmPcd = (t_FmPcd*)(((t_FmPcdKgScheme *)h_Scheme)->h_FmPcd);
24222 +    if (p_FmPcd->h_Hc)
24223 +        return FmHcPcdKgGetSchemeCounter(p_FmPcd->h_Hc, h_Scheme);
24224 +
24225 +    physicalSchemeId = ((t_FmPcdKgScheme *)h_Scheme)->schemeId;
24226 +
24227 +    if (FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId) == FM_PCD_KG_NUM_OF_SCHEMES)
24228 +        REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
24229 +
24230 +    tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
24231 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
24232 +    WriteKgarWait(p_FmPcd, tmpKgarReg);
24233 +    if (!(GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode) & KG_SCH_MODE_EN))
24234 +       REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is Invalid"));
24235 +    spc = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_spc);
24236 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24237 +
24238 +    return spc;
24239 +}
24240 +
24241 +t_Error  FM_PCD_KgSchemeSetCounter(t_Handle h_Scheme, uint32_t value)
24242 +{
24243 +    t_FmPcd             *p_FmPcd;
24244 +    uint32_t            tmpKgarReg, intFlags;
24245 +    uint8_t             physicalSchemeId;
24246 +
24247 +    SANITY_CHECK_RETURN_VALUE(h_Scheme, E_INVALID_HANDLE, 0);
24248 +
24249 +    p_FmPcd = (t_FmPcd*)(((t_FmPcdKgScheme *)h_Scheme)->h_FmPcd);
24250 +
24251 +    if (!FmPcdKgIsSchemeValidSw(h_Scheme))
24252 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Requested scheme is invalid."));
24253 +
24254 +    if (p_FmPcd->h_Hc)
24255 +        return FmHcPcdKgSetSchemeCounter(p_FmPcd->h_Hc, h_Scheme, value);
24256 +
24257 +    physicalSchemeId = ((t_FmPcdKgScheme *)h_Scheme)->schemeId;
24258 +    /* check that schemeId is in range */
24259 +    if (FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId) == FM_PCD_KG_NUM_OF_SCHEMES)
24260 +        REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
24261 +
24262 +    /* read specified scheme into scheme registers */
24263 +    tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
24264 +    intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
24265 +    WriteKgarWait(p_FmPcd, tmpKgarReg);
24266 +    if (!(GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode) & KG_SCH_MODE_EN))
24267 +    {
24268 +       KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24269 +       RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is Invalid"));
24270 +    }
24271 +
24272 +    /* change counter value */
24273 +    WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_spc, value);
24274 +
24275 +    /* call indirect command for scheme write */
24276 +    tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
24277 +
24278 +    WriteKgarWait(p_FmPcd, tmpKgarReg);
24279 +    KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
24280 +
24281 +    return E_OK;
24282 +}
24283 +
24284 +t_Error FM_PCD_KgSetAdditionalDataAfterParsing(t_Handle h_FmPcd, uint8_t payloadOffset)
24285 +{
24286 +   t_FmPcd              *p_FmPcd = (t_FmPcd*)h_FmPcd;
24287 +   struct fman_kg_regs  *p_Regs;
24288 +
24289 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
24290 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_NULL_POINTER);
24291 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_NULL_POINTER);
24292 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs, E_NULL_POINTER);
24293 +
24294 +    p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
24295 +    if (!FmIsMaster(p_FmPcd->h_Fm))
24296 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_KgSetAdditionalDataAfterParsing - guest mode!"));
24297 +
24298 +    WRITE_UINT32(p_Regs->fmkg_fdor,payloadOffset);
24299 +
24300 +    return E_OK;
24301 +}
24302 +
24303 +t_Error FM_PCD_KgSetDfltValue(t_Handle h_FmPcd, uint8_t valueId, uint32_t value)
24304 +{
24305 +   t_FmPcd              *p_FmPcd = (t_FmPcd*)h_FmPcd;
24306 +   struct fman_kg_regs  *p_Regs;
24307 +
24308 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
24309 +    SANITY_CHECK_RETURN_ERROR(((valueId == 0) || (valueId == 1)), E_INVALID_VALUE);
24310 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_NULL_POINTER);
24311 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_NULL_POINTER);
24312 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs, E_NULL_POINTER);
24313 +
24314 +    p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
24315 +
24316 +    if (!FmIsMaster(p_FmPcd->h_Fm))
24317 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_KgSetDfltValue - guest mode!"));
24318 +
24319 +    if (valueId == 0)
24320 +        WRITE_UINT32(p_Regs->fmkg_gdv0r,value);
24321 +    else
24322 +        WRITE_UINT32(p_Regs->fmkg_gdv1r,value);
24323 +    return E_OK;
24324 +}
24325 --- /dev/null
24326 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.h
24327 @@ -0,0 +1,206 @@
24328 +/*
24329 + * Copyright 2008-2012 Freescale Semiconductor Inc.
24330 + *
24331 + * Redistribution and use in source and binary forms, with or without
24332 + * modification, are permitted provided that the following conditions are met:
24333 + *     * Redistributions of source code must retain the above copyright
24334 + *       notice, this list of conditions and the following disclaimer.
24335 + *     * Redistributions in binary form must reproduce the above copyright
24336 + *       notice, this list of conditions and the following disclaimer in the
24337 + *       documentation and/or other materials provided with the distribution.
24338 + *     * Neither the name of Freescale Semiconductor nor the
24339 + *       names of its contributors may be used to endorse or promote products
24340 + *       derived from this software without specific prior written permission.
24341 + *
24342 + *
24343 + * ALTERNATIVELY, this software may be distributed under the terms of the
24344 + * GNU General Public License ("GPL") as published by the Free Software
24345 + * Foundation, either version 2 of that License or (at your option) any
24346 + * later version.
24347 + *
24348 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24349 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24350 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24351 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
24352 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24353 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24354 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24355 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24356 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24357 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24358 + */
24359 +
24360 +
24361 +/******************************************************************************
24362 + @File          fm_kg.h
24363 +
24364 + @Description   FM KG private header
24365 +*//***************************************************************************/
24366 +#ifndef __FM_KG_H
24367 +#define __FM_KG_H
24368 +
24369 +#include "std_ext.h"
24370 +
24371 +/***********************************************************************/
24372 +/*          Keygen defines                                             */
24373 +/***********************************************************************/
24374 +/* maskes */
24375 +#if (DPAA_VERSION >= 11)
24376 +#define KG_SCH_VSP_SHIFT_MASK                   0x0003f000
24377 +#define KG_SCH_OM_VSPE                          0x00000001
24378 +#define KG_SCH_VSP_NO_KSP_EN                    0x80000000
24379 +
24380 +#define MAX_SP_SHIFT                            23
24381 +#define KG_SCH_VSP_MASK_SHIFT                   12
24382 +#define KG_SCH_VSP_SHIFT                        24
24383 +#endif /* (DPAA_VERSION >= 11) */
24384 +
24385 +typedef uint32_t t_KnownFieldsMasks;
24386 +#define KG_SCH_KN_PORT_ID                   0x80000000
24387 +#define KG_SCH_KN_MACDST                    0x40000000
24388 +#define KG_SCH_KN_MACSRC                    0x20000000
24389 +#define KG_SCH_KN_TCI1                      0x10000000
24390 +#define KG_SCH_KN_TCI2                      0x08000000
24391 +#define KG_SCH_KN_ETYPE                     0x04000000
24392 +#define KG_SCH_KN_PPPSID                    0x02000000
24393 +#define KG_SCH_KN_PPPID                     0x01000000
24394 +#define KG_SCH_KN_MPLS1                     0x00800000
24395 +#define KG_SCH_KN_MPLS2                     0x00400000
24396 +#define KG_SCH_KN_MPLS_LAST                 0x00200000
24397 +#define KG_SCH_KN_IPSRC1                    0x00100000
24398 +#define KG_SCH_KN_IPDST1                    0x00080000
24399 +#define KG_SCH_KN_PTYPE1                    0x00040000
24400 +#define KG_SCH_KN_IPTOS_TC1                 0x00020000
24401 +#define KG_SCH_KN_IPV6FL1                   0x00010000
24402 +#define KG_SCH_KN_IPSRC2                    0x00008000
24403 +#define KG_SCH_KN_IPDST2                    0x00004000
24404 +#define KG_SCH_KN_PTYPE2                    0x00002000
24405 +#define KG_SCH_KN_IPTOS_TC2                 0x00001000
24406 +#define KG_SCH_KN_IPV6FL2                   0x00000800
24407 +#define KG_SCH_KN_GREPTYPE                  0x00000400
24408 +#define KG_SCH_KN_IPSEC_SPI                 0x00000200
24409 +#define KG_SCH_KN_IPSEC_NH                  0x00000100
24410 +#define KG_SCH_KN_IPPID                     0x00000080
24411 +#define KG_SCH_KN_L4PSRC                    0x00000004
24412 +#define KG_SCH_KN_L4PDST                    0x00000002
24413 +#define KG_SCH_KN_TFLG                      0x00000001
24414 +
24415 +typedef uint8_t t_GenericCodes;
24416 +#define KG_SCH_GEN_SHIM1                       0x70
24417 +#define KG_SCH_GEN_DEFAULT                     0x10
24418 +#define KG_SCH_GEN_PARSE_RESULT_N_FQID         0x20
24419 +#define KG_SCH_GEN_START_OF_FRM                0x40
24420 +#define KG_SCH_GEN_SHIM2                       0x71
24421 +#define KG_SCH_GEN_IP_PID_NO_V                 0x72
24422 +#define KG_SCH_GEN_ETH                         0x03
24423 +#define KG_SCH_GEN_ETH_NO_V                    0x73
24424 +#define KG_SCH_GEN_SNAP                        0x04
24425 +#define KG_SCH_GEN_SNAP_NO_V                   0x74
24426 +#define KG_SCH_GEN_VLAN1                       0x05
24427 +#define KG_SCH_GEN_VLAN1_NO_V                  0x75
24428 +#define KG_SCH_GEN_VLAN2                       0x06
24429 +#define KG_SCH_GEN_VLAN2_NO_V                  0x76
24430 +#define KG_SCH_GEN_ETH_TYPE                    0x07
24431 +#define KG_SCH_GEN_ETH_TYPE_NO_V               0x77
24432 +#define KG_SCH_GEN_PPP                         0x08
24433 +#define KG_SCH_GEN_PPP_NO_V                    0x78
24434 +#define KG_SCH_GEN_MPLS1                       0x09
24435 +#define KG_SCH_GEN_MPLS2                       0x19
24436 +#define KG_SCH_GEN_MPLS3                       0x29
24437 +#define KG_SCH_GEN_MPLS1_NO_V                  0x79
24438 +#define KG_SCH_GEN_MPLS_LAST                   0x0a
24439 +#define KG_SCH_GEN_MPLS_LAST_NO_V              0x7a
24440 +#define KG_SCH_GEN_IPV4                        0x0b
24441 +#define KG_SCH_GEN_IPV6                        0x1b
24442 +#define KG_SCH_GEN_L3_NO_V                     0x7b
24443 +#define KG_SCH_GEN_IPV4_TUNNELED               0x0c
24444 +#define KG_SCH_GEN_IPV6_TUNNELED               0x1c
24445 +#define KG_SCH_GEN_MIN_ENCAP                   0x2c
24446 +#define KG_SCH_GEN_IP2_NO_V                    0x7c
24447 +#define KG_SCH_GEN_GRE                         0x0d
24448 +#define KG_SCH_GEN_GRE_NO_V                    0x7d
24449 +#define KG_SCH_GEN_TCP                         0x0e
24450 +#define KG_SCH_GEN_UDP                         0x1e
24451 +#define KG_SCH_GEN_IPSEC_AH                    0x2e
24452 +#define KG_SCH_GEN_SCTP                        0x3e
24453 +#define KG_SCH_GEN_DCCP                        0x4e
24454 +#define KG_SCH_GEN_IPSEC_ESP                   0x6e
24455 +#define KG_SCH_GEN_L4_NO_V                     0x7e
24456 +#define KG_SCH_GEN_NEXTHDR                     0x7f
24457 +/* shifts */
24458 +#define KG_SCH_PP_SHIFT_HIGH_SHIFT          27
24459 +#define KG_SCH_PP_SHIFT_LOW_SHIFT           12
24460 +#define KG_SCH_PP_MASK_SHIFT                16
24461 +#define KG_SCH_MODE_CCOBASE_SHIFT           24
24462 +#define KG_SCH_DEF_MAC_ADDR_SHIFT           30
24463 +#define KG_SCH_DEF_TCI_SHIFT                28
24464 +#define KG_SCH_DEF_ENET_TYPE_SHIFT          26
24465 +#define KG_SCH_DEF_PPP_SESSION_ID_SHIFT     24
24466 +#define KG_SCH_DEF_PPP_PROTOCOL_ID_SHIFT    22
24467 +#define KG_SCH_DEF_MPLS_LABEL_SHIFT         20
24468 +#define KG_SCH_DEF_IP_ADDR_SHIFT            18
24469 +#define KG_SCH_DEF_PROTOCOL_TYPE_SHIFT      16
24470 +#define KG_SCH_DEF_IP_TOS_TC_SHIFT          14
24471 +#define KG_SCH_DEF_IPV6_FLOW_LABEL_SHIFT    12
24472 +#define KG_SCH_DEF_IPSEC_SPI_SHIFT          10
24473 +#define KG_SCH_DEF_L4_PORT_SHIFT            8
24474 +#define KG_SCH_DEF_TCP_FLAG_SHIFT           6
24475 +#define KG_SCH_HASH_CONFIG_SHIFT_SHIFT      24
24476 +#define KG_SCH_GEN_MASK_SHIFT               16
24477 +#define KG_SCH_GEN_HT_SHIFT                 8
24478 +#define KG_SCH_GEN_SIZE_SHIFT               24
24479 +#define KG_SCH_GEN_DEF_SHIFT                29
24480 +#define FM_PCD_KG_KGAR_NUM_SHIFT            16
24481 +
24482 +/* others */
24483 +#define NUM_OF_SW_DEFAULTS                  3
24484 +#define MAX_PP_SHIFT                        23
24485 +#define MAX_KG_SCH_SIZE                     16
24486 +#define MASK_FOR_GENERIC_BASE_ID            0x20
24487 +#define MAX_HASH_SHIFT                      40
24488 +#define MAX_KG_SCH_FQID_BIT_OFFSET          31
24489 +#define MAX_KG_SCH_PP_BIT_OFFSET            15
24490 +#define MAX_DIST_FQID_SHIFT                 23
24491 +
24492 +#define GET_MASK_SEL_SHIFT(shift,i)                 \
24493 +switch (i) {                                        \
24494 +    case (0):shift = 26;break;                      \
24495 +    case (1):shift = 20;break;                      \
24496 +    case (2):shift = 10;break;                      \
24497 +    case (3):shift = 4;break;                       \
24498 +    default:                                        \
24499 +    RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);   \
24500 +}
24501 +
24502 +#define GET_MASK_OFFSET_SHIFT(shift,i)              \
24503 +switch (i) {                                        \
24504 +    case (0):shift = 16;break;                      \
24505 +    case (1):shift = 0;break;                       \
24506 +    case (2):shift = 28;break;                      \
24507 +    case (3):shift = 24;break;                      \
24508 +    default:                                        \
24509 +    RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);   \
24510 +}
24511 +
24512 +#define GET_MASK_SHIFT(shift,i)                     \
24513 +switch (i) {                                        \
24514 +    case (0):shift = 24;break;                      \
24515 +    case (1):shift = 16;break;                      \
24516 +    case (2):shift = 8;break;                       \
24517 +    case (3):shift = 0;break;                       \
24518 +    default:                                        \
24519 +    RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);   \
24520 +}
24521 +
24522 +/***********************************************************************/
24523 +/*          Keygen defines                                             */
24524 +/***********************************************************************/
24525 +
24526 +#define KG_DOUBLE_MEANING_REGS_OFFSET           0x100
24527 +#define NO_VALIDATION                           0x70
24528 +#define KG_ACTION_REG_TO                        1024
24529 +#define KG_MAX_PROFILE                          255
24530 +#define SCHEME_ALWAYS_DIRECT                    0xFFFFFFFF
24531 +
24532 +
24533 +#endif /* __FM_KG_H */
24534 --- /dev/null
24535 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c
24536 @@ -0,0 +1,5571 @@
24537 +/*
24538 + * Copyright 2008-2012 Freescale Semiconductor Inc.
24539 + *
24540 + * Redistribution and use in source and binary forms, with or without
24541 + * modification, are permitted provided that the following conditions are met:
24542 + *     * Redistributions of source code must retain the above copyright
24543 + *       notice, this list of conditions and the following disclaimer.
24544 + *     * Redistributions in binary form must reproduce the above copyright
24545 + *       notice, this list of conditions and the following disclaimer in the
24546 + *       documentation and/or other materials provided with the distribution.
24547 + *     * Neither the name of Freescale Semiconductor nor the
24548 + *       names of its contributors may be used to endorse or promote products
24549 + *       derived from this software without specific prior written permission.
24550 + *
24551 + *
24552 + * ALTERNATIVELY, this software may be distributed under the terms of the
24553 + * GNU General Public License ("GPL") as published by the Free Software
24554 + * Foundation, either version 2 of that License or (at your option) any
24555 + * later version.
24556 + *
24557 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24558 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24559 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24560 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
24561 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24562 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24563 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24564 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24565 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24566 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24567 + */
24568 +
24569 +
24570 +/******************************************************************************
24571 + @File          fm_manip.c
24572 +
24573 + @Description   FM PCD manip ...
24574 + *//***************************************************************************/
24575 +#include "std_ext.h"
24576 +#include "error_ext.h"
24577 +#include "string_ext.h"
24578 +#include "debug_ext.h"
24579 +#include "fm_pcd_ext.h"
24580 +#include "fm_port_ext.h"
24581 +#include "fm_muram_ext.h"
24582 +#include "memcpy_ext.h"
24583 +
24584 +#include "fm_common.h"
24585 +#include "fm_hc.h"
24586 +#include "fm_manip.h"
24587 +
24588 +/****************************************/
24589 +/*       static functions               */
24590 +/****************************************/
24591 +static t_Handle GetManipInfo(t_FmPcdManip *p_Manip, e_ManipInfo manipInfo)
24592 +{
24593 +    t_FmPcdManip *p_CurManip = p_Manip;
24594 +
24595 +    if (!MANIP_IS_UNIFIED(p_Manip))
24596 +        p_CurManip = p_Manip;
24597 +    else
24598 +    {
24599 +        /* go to first unified */
24600 +        while (MANIP_IS_UNIFIED_NON_FIRST(p_CurManip))
24601 +            p_CurManip = p_CurManip->h_PrevManip;
24602 +    }
24603 +
24604 +    switch (manipInfo)
24605 +    {
24606 +        case (e_MANIP_HMCT):
24607 +            return p_CurManip->p_Hmct;
24608 +        case (e_MANIP_HMTD):
24609 +            return p_CurManip->h_Ad;
24610 +        case (e_MANIP_HANDLER_TABLE_OWNER):
24611 +            return (t_Handle)p_CurManip;
24612 +        default:
24613 +            return NULL;
24614 +    }
24615 +}
24616 +
24617 +static uint16_t GetHmctSize(t_FmPcdManip *p_Manip)
24618 +{
24619 +    uint16_t size = 0;
24620 +    t_FmPcdManip *p_CurManip = p_Manip;
24621 +
24622 +    if (!MANIP_IS_UNIFIED(p_Manip))
24623 +        return p_Manip->tableSize;
24624 +
24625 +    /* accumulate sizes, starting with the first node */
24626 +    while (MANIP_IS_UNIFIED_NON_FIRST(p_CurManip))
24627 +        p_CurManip = p_CurManip->h_PrevManip;
24628 +
24629 +    while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
24630 +    {
24631 +        size += p_CurManip->tableSize;
24632 +        p_CurManip = (t_FmPcdManip *)p_CurManip->h_NextManip;
24633 +    }
24634 +    size += p_CurManip->tableSize; /* add last size */
24635 +
24636 +    return (size);
24637 +}
24638 +
24639 +static uint16_t GetDataSize(t_FmPcdManip *p_Manip)
24640 +{
24641 +    uint16_t size = 0;
24642 +    t_FmPcdManip *p_CurManip = p_Manip;
24643 +
24644 +    if (!MANIP_IS_UNIFIED(p_Manip))
24645 +        return p_Manip->dataSize;
24646 +
24647 +    /* accumulate sizes, starting with the first node */
24648 +    while (MANIP_IS_UNIFIED_NON_FIRST(p_CurManip))
24649 +        p_CurManip = p_CurManip->h_PrevManip;
24650 +
24651 +    while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
24652 +    {
24653 +        size += p_CurManip->dataSize;
24654 +        p_CurManip = (t_FmPcdManip *)p_CurManip->h_NextManip;
24655 +    }
24656 +    size += p_CurManip->dataSize; /* add last size */
24657 +
24658 +    return (size);
24659 +}
24660 +
24661 +static t_Error CalculateTableSize(t_FmPcdManipParams *p_FmPcdManipParams,
24662 +                                  uint16_t *p_TableSize, uint8_t *p_DataSize)
24663 +{
24664 +    uint8_t localDataSize, remain, tableSize = 0, dataSize = 0;
24665 +
24666 +    if (p_FmPcdManipParams->u.hdr.rmv)
24667 +    {
24668 +        switch (p_FmPcdManipParams->u.hdr.rmvParams.type)
24669 +        {
24670 +            case (e_FM_PCD_MANIP_RMV_GENERIC):
24671 +                tableSize += HMCD_BASIC_SIZE;
24672 +                break;
24673 +            case (e_FM_PCD_MANIP_RMV_BY_HDR):
24674 +                switch (p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.type)
24675 +                {
24676 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2):
24677 +#if (DPAA_VERSION >= 11)
24678 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP):
24679 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START):
24680 +#endif /* (DPAA_VERSION >= 11) */
24681 +                        tableSize += HMCD_BASIC_SIZE;
24682 +                        break;
24683 +                    default:
24684 +                        RETURN_ERROR(MINOR, E_INVALID_SELECTION,
24685 +                                     ("Unknown byHdr.type"));
24686 +                }
24687 +                break;
24688 +            default:
24689 +                RETURN_ERROR(MINOR, E_INVALID_SELECTION,
24690 +                             ("Unknown rmvParams.type"));
24691 +        }
24692 +    }
24693 +
24694 +    if (p_FmPcdManipParams->u.hdr.insrt)
24695 +    {
24696 +        switch (p_FmPcdManipParams->u.hdr.insrtParams.type)
24697 +        {
24698 +            case (e_FM_PCD_MANIP_INSRT_GENERIC):
24699 +                remain =
24700 +                        (uint8_t)(p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size
24701 +                                % 4);
24702 +                if (remain)
24703 +                    localDataSize =
24704 +                            (uint8_t)(p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size
24705 +                                    + 4 - remain);
24706 +                else
24707 +                    localDataSize =
24708 +                            p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size;
24709 +                tableSize += (uint8_t)(HMCD_BASIC_SIZE + localDataSize);
24710 +                break;
24711 +            case (e_FM_PCD_MANIP_INSRT_BY_HDR):
24712 +            {
24713 +                switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.type)
24714 +                {
24715 +
24716 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2):
24717 +                        tableSize += HMCD_BASIC_SIZE + HMCD_PTR_SIZE;
24718 +                        switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.specificL2)
24719 +                        {
24720 +                            case (e_FM_PCD_MANIP_HDR_INSRT_MPLS):
24721 +                            case (e_FM_PCD_MANIP_HDR_INSRT_PPPOE):
24722 +                                dataSize +=
24723 +                                        p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.size;
24724 +                                break;
24725 +                            default:
24726 +                                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
24727 +                        }
24728 +                        break;
24729 +#if (DPAA_VERSION >= 11)
24730 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_IP):
24731 +                        tableSize +=
24732 +                                (HMCD_BASIC_SIZE + HMCD_PTR_SIZE
24733 +                                        + HMCD_PARAM_SIZE
24734 +                                        + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size);
24735 +                        dataSize += 2;
24736 +                        break;
24737 +
24738 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
24739 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE):
24740 +                        tableSize += (HMCD_BASIC_SIZE + HMCD_L4_HDR_SIZE);
24741 +
24742 +                        break;
24743 +
24744 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP):
24745 +                        tableSize +=
24746 +                                (HMCD_BASIC_SIZE
24747 +                                        + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size);
24748 +                        break;
24749 +#endif /* (DPAA_VERSION >= 11) */
24750 +                    default:
24751 +                        RETURN_ERROR(MINOR, E_INVALID_SELECTION,
24752 +                                     ("Unknown byHdr.type"));
24753 +                }
24754 +            }
24755 +                break;
24756 +            default:
24757 +                RETURN_ERROR(MINOR, E_INVALID_SELECTION,
24758 +                             ("Unknown insrtParams.type"));
24759 +        }
24760 +    }
24761 +
24762 +    if (p_FmPcdManipParams->u.hdr.fieldUpdate)
24763 +    {
24764 +        switch (p_FmPcdManipParams->u.hdr.fieldUpdateParams.type)
24765 +        {
24766 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN):
24767 +                tableSize += HMCD_BASIC_SIZE;
24768 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
24769 +                        == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN)
24770 +                {
24771 +                    tableSize += HMCD_PTR_SIZE;
24772 +                    dataSize += DSCP_TO_VLAN_TABLE_SIZE;
24773 +                }
24774 +                break;
24775 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4):
24776 +                tableSize += HMCD_BASIC_SIZE;
24777 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
24778 +                        & HDR_MANIP_IPV4_ID)
24779 +                {
24780 +                    tableSize += HMCD_PARAM_SIZE;
24781 +                    dataSize += 2;
24782 +                }
24783 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
24784 +                        & HDR_MANIP_IPV4_SRC)
24785 +                    tableSize += HMCD_IPV4_ADDR_SIZE;
24786 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
24787 +                        & HDR_MANIP_IPV4_DST)
24788 +                    tableSize += HMCD_IPV4_ADDR_SIZE;
24789 +                break;
24790 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6):
24791 +                tableSize += HMCD_BASIC_SIZE;
24792 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
24793 +                        & HDR_MANIP_IPV6_SRC)
24794 +                    tableSize += HMCD_IPV6_ADDR_SIZE;
24795 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
24796 +                        & HDR_MANIP_IPV6_DST)
24797 +                    tableSize += HMCD_IPV6_ADDR_SIZE;
24798 +                break;
24799 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP):
24800 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
24801 +                        == HDR_MANIP_TCP_UDP_CHECKSUM)
24802 +                    /* we implement this case with the update-checksum descriptor */
24803 +                    tableSize += HMCD_BASIC_SIZE;
24804 +                else
24805 +                    /* we implement this case with the TCP/UDP-update descriptor */
24806 +                    tableSize += HMCD_BASIC_SIZE + HMCD_PARAM_SIZE;
24807 +                break;
24808 +            default:
24809 +                RETURN_ERROR(MINOR, E_INVALID_SELECTION,
24810 +                             ("Unknown fieldUpdateParams.type"));
24811 +        }
24812 +    }
24813 +
24814 +    if (p_FmPcdManipParams->u.hdr.custom)
24815 +    {
24816 +        switch (p_FmPcdManipParams->u.hdr.customParams.type)
24817 +        {
24818 +            case (e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE):
24819 +            {
24820 +                tableSize += HMCD_BASIC_SIZE + HMCD_PARAM_SIZE + HMCD_PARAM_SIZE;
24821 +                dataSize +=
24822 +                        p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.hdrSize;
24823 +                if ((p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
24824 +                        == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4)
24825 +                        && (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.updateIpv4Id))
24826 +                    dataSize += 2;
24827 +            }
24828 +                break;
24829 +            case (e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE):
24830 +                tableSize += HMCD_BASIC_SIZE + HMCD_PARAM_SIZE;
24831 +            break;
24832 +            default:
24833 +                RETURN_ERROR(MINOR, E_INVALID_SELECTION,
24834 +                             ("Unknown customParams.type"));
24835 +        }
24836 +    }
24837 +
24838 +    *p_TableSize = tableSize;
24839 +    *p_DataSize = dataSize;
24840 +
24841 +    return E_OK;
24842 +}
24843 +
24844 +static t_Error GetPrOffsetByHeaderOrField(t_FmManipHdrInfo *p_HdrInfo,
24845 +                                          uint8_t *parseArrayOffset)
24846 +{
24847 +    e_NetHeaderType hdr = p_HdrInfo->hdr;
24848 +    e_FmPcdHdrIndex hdrIndex = p_HdrInfo->hdrIndex;
24849 +    bool byField = p_HdrInfo->byField;
24850 +    t_FmPcdFields field;
24851 +
24852 +    if (byField)
24853 +        field = p_HdrInfo->fullField;
24854 +
24855 +    if (byField)
24856 +    {
24857 +        switch (hdr)
24858 +        {
24859 +            case (HEADER_TYPE_ETH):
24860 +                switch (field.eth)
24861 +                {
24862 +                    case (NET_HEADER_FIELD_ETH_TYPE):
24863 +                        *parseArrayOffset = CC_PC_PR_ETYPE_LAST_OFFSET;
24864 +                        break;
24865 +                    default:
24866 +                        RETURN_ERROR(
24867 +                                MAJOR,
24868 +                                E_NOT_SUPPORTED,
24869 +                                ("Header manipulation of the type Ethernet with this field not supported"));
24870 +                }
24871 +                break;
24872 +            case (HEADER_TYPE_VLAN):
24873 +                switch (field.vlan)
24874 +                {
24875 +                    case (NET_HEADER_FIELD_VLAN_TCI):
24876 +                        if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
24877 +                                || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
24878 +                            *parseArrayOffset = CC_PC_PR_VLAN1_OFFSET;
24879 +                        else
24880 +                            if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
24881 +                                *parseArrayOffset = CC_PC_PR_VLAN2_OFFSET;
24882 +                        break;
24883 +                    default:
24884 +                        RETURN_ERROR(
24885 +                                MAJOR,
24886 +                                E_NOT_SUPPORTED,
24887 +                                ("Header manipulation of the type VLAN with this field not supported"));
24888 +                }
24889 +                break;
24890 +            default:
24891 +                RETURN_ERROR(
24892 +                        MAJOR,
24893 +                        E_NOT_SUPPORTED,
24894 +                        ("Header manipulation of this header by field not supported"));
24895 +        }
24896 +    }
24897 +    else
24898 +    {
24899 +        switch (hdr)
24900 +        {
24901 +            case (HEADER_TYPE_ETH):
24902 +                *parseArrayOffset = (uint8_t)CC_PC_PR_ETH_OFFSET;
24903 +                break;
24904 +            case (HEADER_TYPE_USER_DEFINED_SHIM1):
24905 +                *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM1_OFFSET;
24906 +                break;
24907 +            case (HEADER_TYPE_USER_DEFINED_SHIM2):
24908 +                *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM2_OFFSET;
24909 +                break;
24910 +            case (HEADER_TYPE_LLC_SNAP):
24911 +                *parseArrayOffset = CC_PC_PR_USER_LLC_SNAP_OFFSET;
24912 +                break;
24913 +            case (HEADER_TYPE_PPPoE):
24914 +                *parseArrayOffset = CC_PC_PR_PPPOE_OFFSET;
24915 +                break;
24916 +            case (HEADER_TYPE_MPLS):
24917 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
24918 +                        || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
24919 +                    *parseArrayOffset = CC_PC_PR_MPLS1_OFFSET;
24920 +                else
24921 +                    if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
24922 +                        *parseArrayOffset = CC_PC_PR_MPLS_LAST_OFFSET;
24923 +                break;
24924 +            case (HEADER_TYPE_IPv4):
24925 +            case (HEADER_TYPE_IPv6):
24926 +                if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
24927 +                        || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
24928 +                    *parseArrayOffset = CC_PC_PR_IP1_OFFSET;
24929 +                else
24930 +                    if (hdrIndex == e_FM_PCD_HDR_INDEX_2)
24931 +                        *parseArrayOffset = CC_PC_PR_IP_LAST_OFFSET;
24932 +                break;
24933 +            case (HEADER_TYPE_MINENCAP):
24934 +                *parseArrayOffset = CC_PC_PR_MINENC_OFFSET;
24935 +                break;
24936 +            case (HEADER_TYPE_GRE):
24937 +                *parseArrayOffset = CC_PC_PR_GRE_OFFSET;
24938 +                break;
24939 +            case (HEADER_TYPE_TCP):
24940 +            case (HEADER_TYPE_UDP):
24941 +            case (HEADER_TYPE_IPSEC_AH):
24942 +            case (HEADER_TYPE_IPSEC_ESP):
24943 +            case (HEADER_TYPE_DCCP):
24944 +            case (HEADER_TYPE_SCTP):
24945 +                *parseArrayOffset = CC_PC_PR_L4_OFFSET;
24946 +                break;
24947 +            case (HEADER_TYPE_CAPWAP):
24948 +            case (HEADER_TYPE_CAPWAP_DTLS):
24949 +                *parseArrayOffset = CC_PC_PR_NEXT_HEADER_OFFSET;
24950 +                break;
24951 +            default:
24952 +                RETURN_ERROR(
24953 +                        MAJOR,
24954 +                        E_NOT_SUPPORTED,
24955 +                        ("Header manipulation of this header is not supported"));
24956 +        }
24957 +    }
24958 +    return E_OK;
24959 +}
24960 +
24961 +static t_Error BuildHmct(t_FmPcdManip *p_Manip,
24962 +                         t_FmPcdManipParams *p_FmPcdManipParams,
24963 +                         uint8_t *p_DestHmct, uint8_t *p_DestData, bool new)
24964 +{
24965 +    uint32_t *p_TmpHmct = (uint32_t*)p_DestHmct, *p_LocalData;
24966 +    uint32_t tmpReg = 0, *p_Last = NULL, tmp_ipv6_addr;
24967 +    uint8_t remain, i, size = 0, origSize, *p_UsrData = NULL, *p_TmpData =
24968 +            p_DestData;
24969 +    t_Handle h_FmPcd = p_Manip->h_FmPcd;
24970 +    uint8_t j = 0;
24971 +
24972 +    if (p_FmPcdManipParams->u.hdr.rmv)
24973 +    {
24974 +        if (p_FmPcdManipParams->u.hdr.rmvParams.type
24975 +                == e_FM_PCD_MANIP_RMV_GENERIC)
24976 +        {
24977 +            /* initialize HMCD */
24978 +            tmpReg = (uint32_t)(HMCD_OPCODE_GENERIC_RMV) << HMCD_OC_SHIFT;
24979 +            /* tmp, should be conditional */
24980 +            tmpReg |= p_FmPcdManipParams->u.hdr.rmvParams.u.generic.offset
24981 +                    << HMCD_RMV_OFFSET_SHIFT;
24982 +            tmpReg |= p_FmPcdManipParams->u.hdr.rmvParams.u.generic.size
24983 +                    << HMCD_RMV_SIZE_SHIFT;
24984 +        }
24985 +        else
24986 +            if (p_FmPcdManipParams->u.hdr.rmvParams.type
24987 +                    == e_FM_PCD_MANIP_RMV_BY_HDR)
24988 +            {
24989 +                switch (p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.type)
24990 +                {
24991 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2):
24992 +                    {
24993 +                        uint8_t hmcdOpt;
24994 +
24995 +                        /* initialize HMCD */
24996 +                        tmpReg = (uint32_t)(HMCD_OPCODE_L2_RMV) << HMCD_OC_SHIFT;
24997 +
24998 +                        switch (p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.u.specificL2)
24999 +                        {
25000 +                            case (e_FM_PCD_MANIP_HDR_RMV_ETHERNET):
25001 +                                hmcdOpt = HMCD_RMV_L2_ETHERNET;
25002 +                                break;
25003 +                            case (e_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS):
25004 +                                hmcdOpt = HMCD_RMV_L2_STACKED_QTAGS;
25005 +                                break;
25006 +                            case (e_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS):
25007 +                                hmcdOpt = HMCD_RMV_L2_ETHERNET_AND_MPLS;
25008 +                                break;
25009 +                            case (e_FM_PCD_MANIP_HDR_RMV_MPLS):
25010 +                                hmcdOpt = HMCD_RMV_L2_MPLS;
25011 +                                break;
25012 +                            case (e_FM_PCD_MANIP_HDR_RMV_PPPOE):
25013 +                                hmcdOpt = HMCD_RMV_L2_PPPOE;
25014 +                                break;
25015 +                            default:
25016 +                                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
25017 +                        }
25018 +                        tmpReg |= hmcdOpt << HMCD_L2_MODE_SHIFT;
25019 +                        break;
25020 +                    }
25021 +#if (DPAA_VERSION >= 11)
25022 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP):
25023 +                        tmpReg = (uint32_t)(HMCD_OPCODE_CAPWAP_RMV)
25024 +                                << HMCD_OC_SHIFT;
25025 +                        break;
25026 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START):
25027 +                    {
25028 +                        uint8_t prsArrayOffset;
25029 +                        t_Error err = E_OK;
25030 +
25031 +                        tmpReg = (uint32_t)(HMCD_OPCODE_RMV_TILL)
25032 +                                << HMCD_OC_SHIFT;
25033 +
25034 +                        err =
25035 +                                GetPrOffsetByHeaderOrField(
25036 +                                        &p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.u.hdrInfo,
25037 +                                        &prsArrayOffset);
25038 +                        ASSERT_COND(!err);
25039 +                        /* was previously checked */
25040 +
25041 +                        tmpReg |= ((uint32_t)prsArrayOffset << 16);
25042 +                    }
25043 +                        break;
25044 +#endif /* (DPAA_VERSION >= 11) */
25045 +                    default:
25046 +                        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
25047 +                                     ("manip header remove by hdr type!"));
25048 +                }
25049 +            }
25050 +
25051 +        WRITE_UINT32(*p_TmpHmct, tmpReg);
25052 +        /* save a pointer to the "last" indication word */
25053 +        p_Last = p_TmpHmct;
25054 +        /* advance to next command */
25055 +        p_TmpHmct += HMCD_BASIC_SIZE / 4;
25056 +    }
25057 +
25058 +    if (p_FmPcdManipParams->u.hdr.insrt)
25059 +    {
25060 +        if (p_FmPcdManipParams->u.hdr.insrtParams.type
25061 +                == e_FM_PCD_MANIP_INSRT_GENERIC)
25062 +        {
25063 +            /* initialize HMCD */
25064 +            if (p_FmPcdManipParams->u.hdr.insrtParams.u.generic.replace)
25065 +                tmpReg = (uint32_t)(HMCD_OPCODE_GENERIC_REPLACE)
25066 +                        << HMCD_OC_SHIFT;
25067 +            else
25068 +                tmpReg = (uint32_t)(HMCD_OPCODE_GENERIC_INSRT) << HMCD_OC_SHIFT;
25069 +
25070 +            tmpReg |= p_FmPcdManipParams->u.hdr.insrtParams.u.generic.offset
25071 +                    << HMCD_INSRT_OFFSET_SHIFT;
25072 +            tmpReg |= p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size
25073 +                    << HMCD_INSRT_SIZE_SHIFT;
25074 +
25075 +            size = p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size;
25076 +            p_UsrData = p_FmPcdManipParams->u.hdr.insrtParams.u.generic.p_Data;
25077 +
25078 +            WRITE_UINT32(*p_TmpHmct, tmpReg);
25079 +            /* save a pointer to the "last" indication word */
25080 +            p_Last = p_TmpHmct;
25081 +
25082 +            p_TmpHmct += HMCD_BASIC_SIZE / 4;
25083 +
25084 +            /* initialize data to be inserted */
25085 +            /* if size is not a multiple of 4, padd with 0's */
25086 +            origSize = size;
25087 +            remain = (uint8_t)(size % 4);
25088 +            if (remain)
25089 +            {
25090 +                size += (uint8_t)(4 - remain);
25091 +                p_LocalData = (uint32_t *)XX_Malloc(size);
25092 +                memset((uint8_t *)p_LocalData, 0, size);
25093 +                memcpy((uint8_t *)p_LocalData, p_UsrData, origSize);
25094 +            }
25095 +            else
25096 +                p_LocalData = (uint32_t*)p_UsrData;
25097 +
25098 +            /* initialize data and advance pointer to next command */
25099 +            MemCpy8(p_TmpHmct, p_LocalData, size);
25100 +            p_TmpHmct += size / sizeof(uint32_t);
25101 +
25102 +            if (remain)
25103 +                XX_Free(p_LocalData);
25104 +        }
25105 +
25106 +        else
25107 +            if (p_FmPcdManipParams->u.hdr.insrtParams.type
25108 +                    == e_FM_PCD_MANIP_INSRT_BY_HDR)
25109 +            {
25110 +                switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.type)
25111 +                {
25112 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2):
25113 +                    {
25114 +                        uint8_t hmcdOpt;
25115 +
25116 +                        /* initialize HMCD */
25117 +                        tmpReg = (uint32_t)(HMCD_OPCODE_L2_INSRT)
25118 +                                << HMCD_OC_SHIFT;
25119 +
25120 +                        switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.specificL2)
25121 +                        {
25122 +                            case (e_FM_PCD_MANIP_HDR_INSRT_MPLS):
25123 +                                if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.update)
25124 +                                    hmcdOpt = HMCD_INSRT_N_UPDATE_L2_MPLS;
25125 +                                else
25126 +                                    hmcdOpt = HMCD_INSRT_L2_MPLS;
25127 +                                break;
25128 +                            case (e_FM_PCD_MANIP_HDR_INSRT_PPPOE):
25129 +                                hmcdOpt = HMCD_INSRT_L2_PPPOE;
25130 +                                break;
25131 +                            default:
25132 +                                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
25133 +                        }
25134 +                        tmpReg |= hmcdOpt << HMCD_L2_MODE_SHIFT;
25135 +
25136 +                        WRITE_UINT32(*p_TmpHmct, tmpReg);
25137 +                        /* save a pointer to the "last" indication word */
25138 +                        p_Last = p_TmpHmct;
25139 +
25140 +                        p_TmpHmct += HMCD_BASIC_SIZE / 4;
25141 +
25142 +                        /* set size and pointer of user's data */
25143 +                        size =
25144 +                                (uint8_t)p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.size;
25145 +
25146 +                        ASSERT_COND(p_TmpData);
25147 +                        MemCpy8(
25148 +                                p_TmpData,
25149 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.p_Data,
25150 +                                size);
25151 +                        tmpReg =
25152 +                                (size << HMCD_INSRT_L2_SIZE_SHIFT)
25153 +                                        | (uint32_t)(XX_VirtToPhys(p_TmpData)
25154 +                                                - (((t_FmPcd*)h_FmPcd)->physicalMuramBase));
25155 +                        WRITE_UINT32(*p_TmpHmct, tmpReg);
25156 +                        p_TmpHmct += HMCD_PTR_SIZE / 4;
25157 +                        p_TmpData += size;
25158 +                    }
25159 +                        break;
25160 +#if (DPAA_VERSION >= 11)
25161 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_IP):
25162 +                        tmpReg = (uint32_t)(HMCD_OPCODE_IP_INSRT)
25163 +                                << HMCD_OC_SHIFT;
25164 +                        if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.calcL4Checksum)
25165 +                            tmpReg |= HMCD_IP_L4_CS_CALC;
25166 +                        if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.mappingMode
25167 +                                == e_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS)
25168 +                            tmpReg |= HMCD_IP_OR_QOS;
25169 +                        tmpReg |=
25170 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.lastPidOffset
25171 +                                        & HMCD_IP_LAST_PID_MASK;
25172 +                        tmpReg |=
25173 +                                ((p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size
25174 +                                        << HMCD_IP_SIZE_SHIFT)
25175 +                                        & HMCD_IP_SIZE_MASK);
25176 +                        if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.dontFragOverwrite)
25177 +                            tmpReg |= HMCD_IP_DF_MODE;
25178 +
25179 +                        WRITE_UINT32(*p_TmpHmct, tmpReg);
25180 +
25181 +                        /* save a pointer to the "last" indication word */
25182 +                        p_Last = p_TmpHmct;
25183 +
25184 +                        p_TmpHmct += HMCD_BASIC_SIZE / 4;
25185 +
25186 +                        /* set IP id */
25187 +                        ASSERT_COND(p_TmpData);
25188 +                        WRITE_UINT16(
25189 +                                *(uint16_t*)p_TmpData,
25190 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.id);
25191 +                        WRITE_UINT32(
25192 +                                *p_TmpHmct,
25193 +                                (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)));
25194 +                        p_TmpData += 2;
25195 +                        p_TmpHmct += HMCD_PTR_SIZE / 4;
25196 +
25197 +                        WRITE_UINT8(*p_TmpHmct, p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.lastDstOffset);
25198 +                        p_TmpHmct += HMCD_PARAM_SIZE / 4;
25199 +
25200 +                        MemCpy8(
25201 +                                p_TmpHmct,
25202 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.p_Data,
25203 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size);
25204 +                        p_TmpHmct +=
25205 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size
25206 +                                        / 4;
25207 +                        break;
25208 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE):
25209 +                        tmpReg = HMCD_INSRT_UDP_LITE;
25210 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
25211 +                        tmpReg |= (uint32_t)(HMCD_OPCODE_UDP_INSRT)
25212 +                                << HMCD_OC_SHIFT;
25213 +
25214 +                        WRITE_UINT32(*p_TmpHmct, tmpReg);
25215 +
25216 +                        /* save a pointer to the "last" indication word */
25217 +                        p_Last = p_TmpHmct;
25218 +
25219 +                        p_TmpHmct += HMCD_BASIC_SIZE / 4;
25220 +
25221 +                        MemCpy8(
25222 +                                p_TmpHmct,
25223 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.p_Data,
25224 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size);
25225 +                        p_TmpHmct +=
25226 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
25227 +                                        / 4;
25228 +                        break;
25229 +                    case (e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP):
25230 +                        tmpReg = (uint32_t)(HMCD_OPCODE_CAPWAP_INSRT)
25231 +                                << HMCD_OC_SHIFT;
25232 +                        tmpReg |= HMCD_CAPWAP_INSRT;
25233 +
25234 +                        WRITE_UINT32(*p_TmpHmct, tmpReg);
25235 +
25236 +                        /* save a pointer to the "last" indication word */
25237 +                        p_Last = p_TmpHmct;
25238 +
25239 +                        p_TmpHmct += HMCD_BASIC_SIZE / 4;
25240 +
25241 +                        MemCpy8(
25242 +                                p_TmpHmct,
25243 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.p_Data,
25244 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size);
25245 +                        p_TmpHmct +=
25246 +                                p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
25247 +                                        / 4;
25248 +                        break;
25249 +#endif /* (DPAA_VERSION >= 11) */
25250 +                    default:
25251 +                        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
25252 +                                     ("manip header insert by header type!"));
25253 +
25254 +                }
25255 +            }
25256 +    }
25257 +
25258 +    if (p_FmPcdManipParams->u.hdr.fieldUpdate)
25259 +    {
25260 +        switch (p_FmPcdManipParams->u.hdr.fieldUpdateParams.type)
25261 +        {
25262 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN):
25263 +                /* set opcode */
25264 +                tmpReg = (uint32_t)(HMCD_OPCODE_VLAN_PRI_UPDATE)
25265 +                        << HMCD_OC_SHIFT;
25266 +
25267 +                /* set mode & table pointer */
25268 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
25269 +                        == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN)
25270 +                {
25271 +                    /* set Mode */
25272 +                    tmpReg |= (uint32_t)(HMCD_VLAN_PRI_UPDATE_DSCP_TO_VPRI)
25273 +                            << HMCD_VLAN_PRI_REP_MODE_SHIFT;
25274 +                    /* set VPRI default */
25275 +                    tmpReg |=
25276 +                            p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.vpriDefVal;
25277 +                    WRITE_UINT32(*p_TmpHmct, tmpReg);
25278 +                    /* save a pointer to the "last" indication word */
25279 +                    p_Last = p_TmpHmct;
25280 +                    /* write the table pointer into the Manip descriptor */
25281 +                    p_TmpHmct += HMCD_BASIC_SIZE / 4;
25282 +
25283 +                    tmpReg = 0;
25284 +                    ASSERT_COND(p_TmpData);
25285 +                    for (i = 0; i < HMCD_DSCP_VALUES; i++)
25286 +                    {
25287 +                        /* first we build from each 8 values a 32bit register */
25288 +                        tmpReg |=
25289 +                                (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.dscpToVpriTable[i])
25290 +                                        << (32 - 4 * (j + 1));
25291 +                        j++;
25292 +                        /* Than we write this register to the next table word
25293 +                         * (i=7-->word 0, i=15-->word 1,... i=63-->word 7) */
25294 +                        if ((i % 8) == 7)
25295 +                        {
25296 +                            WRITE_UINT32(*((uint32_t*)p_TmpData + (i+1)/8-1),
25297 +                                         tmpReg);
25298 +                            tmpReg = 0;
25299 +                            j = 0;
25300 +                        }
25301 +                    }
25302 +
25303 +                    WRITE_UINT32(
25304 +                            *p_TmpHmct,
25305 +                            (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)h_FmPcd)->physicalMuramBase)));
25306 +                    p_TmpHmct += HMCD_PTR_SIZE / 4;
25307 +
25308 +                    p_TmpData += DSCP_TO_VLAN_TABLE_SIZE;
25309 +                }
25310 +                else
25311 +                    if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
25312 +                            == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI)
25313 +                    {
25314 +                        /* set Mode */
25315 +                        /* line commented out as it has no-side-effect ('0' value). */
25316 +                        /*tmpReg |= HMCD_VLAN_PRI_UPDATE << HMCD_VLAN_PRI_REP_MODE_SHIFT*/;
25317 +                        /* set VPRI parameter */
25318 +                        tmpReg |=
25319 +                                p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.u.vpri;
25320 +                        WRITE_UINT32(*p_TmpHmct, tmpReg);
25321 +                        /* save a pointer to the "last" indication word */
25322 +                        p_Last = p_TmpHmct;
25323 +                        p_TmpHmct += HMCD_BASIC_SIZE / 4;
25324 +                    }
25325 +                break;
25326 +
25327 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4):
25328 +                /* set opcode */
25329 +                tmpReg = (uint32_t)(HMCD_OPCODE_IPV4_UPDATE) << HMCD_OC_SHIFT;
25330 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25331 +                        & HDR_MANIP_IPV4_TTL)
25332 +                    tmpReg |= HMCD_IPV4_UPDATE_TTL;
25333 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25334 +                        & HDR_MANIP_IPV4_TOS)
25335 +                {
25336 +                    tmpReg |= HMCD_IPV4_UPDATE_TOS;
25337 +                    tmpReg |=
25338 +                            p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.tos
25339 +                                    << HMCD_IPV4_UPDATE_TOS_SHIFT;
25340 +                }
25341 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25342 +                        & HDR_MANIP_IPV4_ID)
25343 +                    tmpReg |= HMCD_IPV4_UPDATE_ID;
25344 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25345 +                        & HDR_MANIP_IPV4_SRC)
25346 +                    tmpReg |= HMCD_IPV4_UPDATE_SRC;
25347 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25348 +                        & HDR_MANIP_IPV4_DST)
25349 +                    tmpReg |= HMCD_IPV4_UPDATE_DST;
25350 +                /* write the first 4 bytes of the descriptor */
25351 +                WRITE_UINT32(*p_TmpHmct, tmpReg);
25352 +                /* save a pointer to the "last" indication word */
25353 +                p_Last = p_TmpHmct;
25354 +
25355 +                p_TmpHmct += HMCD_BASIC_SIZE / 4;
25356 +
25357 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25358 +                        & HDR_MANIP_IPV4_ID)
25359 +                {
25360 +                    ASSERT_COND(p_TmpData);
25361 +                    WRITE_UINT16(
25362 +                            *(uint16_t*)p_TmpData,
25363 +                            p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.id);
25364 +                    WRITE_UINT32(
25365 +                            *p_TmpHmct,
25366 +                            (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)));
25367 +                    p_TmpData += 2;
25368 +                    p_TmpHmct += HMCD_PTR_SIZE / 4;
25369 +                }
25370 +
25371 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25372 +                        & HDR_MANIP_IPV4_SRC)
25373 +                {
25374 +                    WRITE_UINT32(
25375 +                            *p_TmpHmct,
25376 +                            p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.src);
25377 +                    p_TmpHmct += HMCD_IPV4_ADDR_SIZE / 4;
25378 +                }
25379 +
25380 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
25381 +                        & HDR_MANIP_IPV4_DST)
25382 +                {
25383 +                    WRITE_UINT32(
25384 +                            *p_TmpHmct,
25385 +                            p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.dst);
25386 +                    p_TmpHmct += HMCD_IPV4_ADDR_SIZE / 4;
25387 +                }
25388 +                break;
25389 +
25390 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6):
25391 +                /* set opcode */
25392 +                tmpReg = (uint32_t)(HMCD_OPCODE_IPV6_UPDATE) << HMCD_OC_SHIFT;
25393 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
25394 +                        & HDR_MANIP_IPV6_HL)
25395 +                    tmpReg |= HMCD_IPV6_UPDATE_HL;
25396 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
25397 +                        & HDR_MANIP_IPV6_TC)
25398 +                {
25399 +                    tmpReg |= HMCD_IPV6_UPDATE_TC;
25400 +                    tmpReg |=
25401 +                            p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.trafficClass
25402 +                                    << HMCD_IPV6_UPDATE_TC_SHIFT;
25403 +                }
25404 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
25405 +                        & HDR_MANIP_IPV6_SRC)
25406 +                    tmpReg |= HMCD_IPV6_UPDATE_SRC;
25407 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
25408 +                        & HDR_MANIP_IPV6_DST)
25409 +                    tmpReg |= HMCD_IPV6_UPDATE_DST;
25410 +                /* write the first 4 bytes of the descriptor */
25411 +                WRITE_UINT32(*p_TmpHmct, tmpReg);
25412 +                /* save a pointer to the "last" indication word */
25413 +                p_Last = p_TmpHmct;
25414 +
25415 +                p_TmpHmct += HMCD_BASIC_SIZE / 4;
25416 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
25417 +                        & HDR_MANIP_IPV6_SRC)
25418 +                {
25419 +                    for (i = 0; i < NET_HEADER_FIELD_IPv6_ADDR_SIZE; i += 4)
25420 +                    {
25421 +                        memcpy(&tmp_ipv6_addr,
25422 +                               &p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.src[i],
25423 +                               sizeof(uint32_t));
25424 +                        WRITE_UINT32(*p_TmpHmct, tmp_ipv6_addr);
25425 +                        p_TmpHmct += HMCD_PTR_SIZE / 4;
25426 +                    }
25427 +                }
25428 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
25429 +                        & HDR_MANIP_IPV6_DST)
25430 +                {
25431 +                    for (i = 0; i < NET_HEADER_FIELD_IPv6_ADDR_SIZE; i += 4)
25432 +                    {
25433 +                        memcpy(&tmp_ipv6_addr,
25434 +                               &p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.dst[i],
25435 +                               sizeof(uint32_t));
25436 +                        WRITE_UINT32(*p_TmpHmct, tmp_ipv6_addr);
25437 +                        p_TmpHmct += HMCD_PTR_SIZE / 4;
25438 +                    }
25439 +                }
25440 +                break;
25441 +
25442 +            case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP):
25443 +                if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
25444 +                        == HDR_MANIP_TCP_UDP_CHECKSUM)
25445 +                {
25446 +                    /* we implement this case with the update-checksum descriptor */
25447 +                    /* set opcode */
25448 +                    tmpReg = (uint32_t)(HMCD_OPCODE_TCP_UDP_CHECKSUM)
25449 +                            << HMCD_OC_SHIFT;
25450 +                    /* write the first 4 bytes of the descriptor */
25451 +                    WRITE_UINT32(*p_TmpHmct, tmpReg);
25452 +                    /* save a pointer to the "last" indication word */
25453 +                    p_Last = p_TmpHmct;
25454 +
25455 +                    p_TmpHmct += HMCD_BASIC_SIZE / 4;
25456 +                }
25457 +                else
25458 +                {
25459 +                    /* we implement this case with the TCP/UDP update descriptor */
25460 +                    /* set opcode */
25461 +                    tmpReg = (uint32_t)(HMCD_OPCODE_TCP_UDP_UPDATE)
25462 +                            << HMCD_OC_SHIFT;
25463 +                    if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
25464 +                            & HDR_MANIP_TCP_UDP_DST)
25465 +                        tmpReg |= HMCD_TCP_UDP_UPDATE_DST;
25466 +                    if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
25467 +                            & HDR_MANIP_TCP_UDP_SRC)
25468 +                        tmpReg |= HMCD_TCP_UDP_UPDATE_SRC;
25469 +                    /* write the first 4 bytes of the descriptor */
25470 +                    WRITE_UINT32(*p_TmpHmct, tmpReg);
25471 +                    /* save a pointer to the "last" indication word */
25472 +                    p_Last = p_TmpHmct;
25473 +
25474 +                    p_TmpHmct += HMCD_BASIC_SIZE / 4;
25475 +
25476 +                    tmpReg = 0;
25477 +                    if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
25478 +                            & HDR_MANIP_TCP_UDP_SRC)
25479 +                        tmpReg |=
25480 +                                ((uint32_t)p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.src)
25481 +                                        << HMCD_TCP_UDP_UPDATE_SRC_SHIFT;
25482 +                    if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
25483 +                            & HDR_MANIP_TCP_UDP_DST)
25484 +                        tmpReg |=
25485 +                                ((uint32_t)p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.dst);
25486 +                    WRITE_UINT32(*p_TmpHmct, tmpReg);
25487 +                    p_TmpHmct += HMCD_PTR_SIZE / 4;
25488 +                }
25489 +                break;
25490 +
25491 +            default:
25492 +                RETURN_ERROR(MINOR, E_INVALID_SELECTION,
25493 +                             ("Unknown fieldUpdateParams.type"));
25494 +        }
25495 +    }
25496 +
25497 +    if (p_FmPcdManipParams->u.hdr.custom)
25498 +    {
25499 +        switch (p_FmPcdManipParams->u.hdr.customParams.type)
25500 +        {
25501 +            case (e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE):
25502 +                /* set opcode */
25503 +                tmpReg = (uint32_t)(HMCD_OPCODE_REPLACE_IP) << HMCD_OC_SHIFT;
25504 +
25505 +                if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.decTtlHl)
25506 +                    tmpReg |= HMCD_IP_REPLACE_TTL_HL;
25507 +                if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
25508 +                        == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6)
25509 +                    /* line commented out as it has no-side-effect ('0' value). */
25510 +                    /*tmpReg |= HMCD_IP_REPLACE_REPLACE_IPV4*/;
25511 +                else
25512 +                    if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
25513 +                            == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4)
25514 +                    {
25515 +                        tmpReg |= HMCD_IP_REPLACE_REPLACE_IPV6;
25516 +                        if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.updateIpv4Id)
25517 +                            tmpReg |= HMCD_IP_REPLACE_ID;
25518 +                    }
25519 +                    else
25520 +                        RETURN_ERROR(
25521 +                                MINOR,
25522 +                                E_NOT_SUPPORTED,
25523 +                                ("One flag out of HDR_MANIP_IP_REPLACE_IPV4, HDR_MANIP_IP_REPLACE_IPV6 - must be set."));
25524 +
25525 +                /* write the first 4 bytes of the descriptor */
25526 +                WRITE_UINT32(*p_TmpHmct, tmpReg);
25527 +                /* save a pointer to the "last" indication word */
25528 +                p_Last = p_TmpHmct;
25529 +
25530 +                p_TmpHmct += HMCD_BASIC_SIZE / 4;
25531 +
25532 +                size =
25533 +                        p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.hdrSize;
25534 +                ASSERT_COND(p_TmpData);
25535 +                MemCpy8(
25536 +                        p_TmpData,
25537 +                        p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.hdr,
25538 +                        size);
25539 +                tmpReg = (uint32_t)(size << HMCD_IP_REPLACE_L3HDRSIZE_SHIFT);
25540 +                tmpReg |= (uint32_t)(XX_VirtToPhys(p_TmpData)
25541 +                        - (((t_FmPcd*)h_FmPcd)->physicalMuramBase));
25542 +                WRITE_UINT32(*p_TmpHmct, tmpReg);
25543 +                p_TmpHmct += HMCD_PTR_SIZE / 4;
25544 +                p_TmpData += size;
25545 +
25546 +                if ((p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
25547 +                        == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4)
25548 +                        && (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.updateIpv4Id))
25549 +                {
25550 +                    WRITE_UINT16(
25551 +                            *(uint16_t*)p_TmpData,
25552 +                            p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.id);
25553 +                    WRITE_UINT32(
25554 +                            *p_TmpHmct,
25555 +                            (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)h_FmPcd)->physicalMuramBase)));
25556 +                    p_TmpData += 2;
25557 +                }
25558 +                p_TmpHmct += HMCD_PTR_SIZE / 4;
25559 +                break;
25560 +            case (e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE):
25561 +                /* set opcode */
25562 +                tmpReg = (uint32_t)(HMCD_OPCODE_GEN_FIELD_REPLACE) << HMCD_OC_SHIFT;
25563 +                tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.size << HMCD_GEN_FIELD_SIZE_SHIFT;
25564 +                tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.srcOffset << HMCD_GEN_FIELD_SRC_OFF_SHIFT;
25565 +                tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.dstOffset << HMCD_GEN_FIELD_DST_OFF_SHIFT;
25566 +                if (p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.mask)
25567 +                    tmpReg |= HMCD_GEN_FIELD_MASK_EN;
25568 +
25569 +                /* write the first 4 bytes of the descriptor */
25570 +                WRITE_UINT32(*p_TmpHmct, tmpReg);
25571 +                /* save a pointer to the "last" indication word */
25572 +                p_Last = p_TmpHmct;
25573 +
25574 +                p_TmpHmct += HMCD_BASIC_SIZE/4;
25575 +
25576 +                if (p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.mask)
25577 +                {
25578 +                    tmpReg = p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.mask << HMCD_GEN_FIELD_MASK_SHIFT;
25579 +                    tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.maskOffset << HMCD_GEN_FIELD_MASK_OFF_SHIFT;
25580 +                    /* write the next 4 bytes of the descriptor */
25581 +                    WRITE_UINT32(*p_TmpHmct, tmpReg);
25582 +                }
25583 +                p_TmpHmct += HMCD_PARAM_SIZE/4;
25584 +                break;
25585 +            default:
25586 +                RETURN_ERROR(MINOR, E_INVALID_SELECTION,
25587 +                             ("Unknown customParams.type"));
25588 +        }
25589 +    }
25590 +
25591 +    /* If this node has a nextManip, and no parsing is required, the old table must be copied to the new table
25592 +     the old table and should be freed */
25593 +    if (p_FmPcdManipParams->h_NextManip
25594 +            && (p_Manip->nextManipType == e_FM_PCD_MANIP_HDR)
25595 +            && (MANIP_DONT_REPARSE(p_Manip)))
25596 +    {
25597 +        if (new)
25598 +        {
25599 +            /* If this is the first time this manip is created we need to free unused memory. If it
25600 +             * is a dynamic changes case, the memory used is either the CC shadow or the existing
25601 +             * table - no allocation, no free */
25602 +            MANIP_UPDATE_UNIFIED_POSITION(p_FmPcdManipParams->h_NextManip);
25603 +
25604 +            p_Manip->unifiedPosition = e_MANIP_UNIFIED_FIRST;
25605 +        }
25606 +    }
25607 +    else
25608 +    {
25609 +        ASSERT_COND(p_Last);
25610 +        /* set the "last" indication on the last command of the current table */
25611 +        WRITE_UINT32(*p_Last, GET_UINT32(*p_Last) | HMCD_LAST);
25612 +    }
25613 +
25614 +    return E_OK;
25615 +}
25616 +
25617 +static t_Error CreateManipActionNew(t_FmPcdManip *p_Manip,
25618 +                                    t_FmPcdManipParams *p_FmPcdManipParams)
25619 +{
25620 +    t_FmPcdManip *p_CurManip;
25621 +    t_Error err;
25622 +    uint32_t nextSize = 0, totalSize;
25623 +    uint16_t tmpReg;
25624 +    uint8_t *p_OldHmct, *p_TmpHmctPtr, *p_TmpDataPtr;
25625 +
25626 +    /* set Manip structure */
25627 +
25628 +    p_Manip->dontParseAfterManip =
25629 +            p_FmPcdManipParams->u.hdr.dontParseAfterManip;
25630 +
25631 +    if (p_FmPcdManipParams->h_NextManip)
25632 +    {   /* Next Header manipulation exists */
25633 +        p_Manip->nextManipType = MANIP_GET_TYPE(p_FmPcdManipParams->h_NextManip);
25634 +
25635 +        if ((p_Manip->nextManipType == e_FM_PCD_MANIP_HDR) && p_Manip->dontParseAfterManip)
25636 +            nextSize = (uint32_t)(GetHmctSize(p_FmPcdManipParams->h_NextManip)
25637 +                    + GetDataSize(p_FmPcdManipParams->h_NextManip));
25638 +        else /* either parsing is required or next manip is Frag; no table merging. */
25639 +            p_Manip->cascaded = TRUE;
25640 +        /* pass up the "cascaded" attribute. The whole chain is cascaded
25641 +         * if something is cascaded along the way. */
25642 +        if (MANIP_IS_CASCADED(p_FmPcdManipParams->h_NextManip))
25643 +            p_Manip->cascaded = TRUE;
25644 +    }
25645 +
25646 +    /* Allocate new table */
25647 +    /* calculate table size according to manip parameters */
25648 +    err = CalculateTableSize(p_FmPcdManipParams, &p_Manip->tableSize,
25649 +                             &p_Manip->dataSize);
25650 +    if (err)
25651 +        RETURN_ERROR(MINOR, err, NO_MSG);
25652 +
25653 +    totalSize = (uint16_t)(p_Manip->tableSize + p_Manip->dataSize + nextSize);
25654 +
25655 +    p_Manip->p_Hmct = (uint8_t*)FM_MURAM_AllocMem(
25656 +            ((t_FmPcd *)p_Manip->h_FmPcd)->h_FmMuram, totalSize, 4);
25657 +    if (!p_Manip->p_Hmct)
25658 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc failed"));
25659 +
25660 +    if (p_Manip->dataSize)
25661 +        p_Manip->p_Data =
25662 +                (uint8_t*)PTR_MOVE(p_Manip->p_Hmct, (p_Manip->tableSize + nextSize));
25663 +
25664 +    /* update shadow size to allow runtime replacement of Header manipulation */
25665 +    /* The allocated shadow is divided as follows:
25666 +     0 . . .       16 . . .
25667 +     --------------------------------
25668 +     |   Shadow   |   Shadow HMTD   |
25669 +     |   HMTD     |   Match Table   |
25670 +     | (16 bytes) | (maximal size)  |
25671 +     --------------------------------
25672 +     */
25673 +
25674 +    err = FmPcdUpdateCcShadow(p_Manip->h_FmPcd, (uint32_t)(totalSize + 16),
25675 +                              (uint16_t)FM_PCD_CC_AD_TABLE_ALIGN);
25676 +    if (err != E_OK)
25677 +    {
25678 +        FM_MURAM_FreeMem(p_Manip->h_FmPcd, p_Manip->p_Hmct);
25679 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
25680 +                     ("MURAM allocation for HdrManip node shadow"));
25681 +    }
25682 +
25683 +    if (p_FmPcdManipParams->h_NextManip
25684 +            && (p_Manip->nextManipType == e_FM_PCD_MANIP_HDR)
25685 +            && (MANIP_DONT_REPARSE(p_Manip)))
25686 +    {
25687 +        p_OldHmct = (uint8_t *)GetManipInfo(p_FmPcdManipParams->h_NextManip,
25688 +                                            e_MANIP_HMCT);
25689 +        p_CurManip = p_FmPcdManipParams->h_NextManip;
25690 +        /* Run till the last Manip (which is the first to configure) */
25691 +        while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
25692 +            p_CurManip = p_CurManip->h_NextManip;
25693 +
25694 +        while (p_CurManip)
25695 +        {
25696 +            /* If this is a unified table, point to the part of the table
25697 +             * which is the relative offset in HMCT.
25698 +             */
25699 +            p_TmpHmctPtr = (uint8_t*)PTR_MOVE(p_Manip->p_Hmct,
25700 +                    (p_Manip->tableSize +
25701 +                            (PTR_TO_UINT(p_CurManip->p_Hmct) -
25702 +                                    PTR_TO_UINT(p_OldHmct))));
25703 +            if (p_CurManip->p_Data)
25704 +                p_TmpDataPtr = (uint8_t*)PTR_MOVE(p_Manip->p_Hmct,
25705 +                        (p_Manip->tableSize +
25706 +                                (PTR_TO_UINT(p_CurManip->p_Data) -
25707 +                                        PTR_TO_UINT(p_OldHmct))));
25708 +            else
25709 +                p_TmpDataPtr = NULL;
25710 +
25711 +            BuildHmct(p_CurManip, &p_CurManip->manipParams, p_TmpHmctPtr,
25712 +                      p_TmpDataPtr, FALSE);
25713 +            /* update old manip table pointer */
25714 +            MANIP_SET_HMCT_PTR(p_CurManip, p_TmpHmctPtr);
25715 +            MANIP_SET_DATA_PTR(p_CurManip, p_TmpDataPtr);
25716 +
25717 +            p_CurManip = p_CurManip->h_PrevManip;
25718 +        }
25719 +        /* We copied the HMCT to create a new large HMCT so we can free the old one */
25720 +        FM_MURAM_FreeMem(MANIP_GET_MURAM(p_FmPcdManipParams->h_NextManip),
25721 +                         p_OldHmct);
25722 +    }
25723 +
25724 +    /* Fill table */
25725 +    err = BuildHmct(p_Manip, p_FmPcdManipParams, p_Manip->p_Hmct,
25726 +                    p_Manip->p_Data, TRUE);
25727 +    if (err)
25728 +    {
25729 +        FM_MURAM_FreeMem(p_Manip->h_FmPcd, p_Manip->p_Hmct);
25730 +        RETURN_ERROR(MINOR, err, NO_MSG);
25731 +    }
25732 +
25733 +    /* Build HMTD (table descriptor) */
25734 +     tmpReg = HMTD_CFG_TYPE; /* NADEN = 0 */
25735 +
25736 +     /* add parseAfterManip */
25737 +      if (!p_Manip->dontParseAfterManip)
25738 +          tmpReg |= HMTD_CFG_PRS_AFTER_HM;
25739 +
25740 +    /* create cascade */
25741 +    /*if (p_FmPcdManipParams->h_NextManip
25742 +            && (!MANIP_DONT_REPARSE(p_Manip) || (p_Manip->nextManipType != e_FM_PCD_MANIP_HDR)))*/
25743 +    if (p_Manip->cascaded)
25744 +    {
25745 +        uint16_t nextAd;
25746 +        /* indicate that there's another HM table descriptor */
25747 +        tmpReg |= HMTD_CFG_NEXT_AD_EN;
25748 +        /* get address of next HMTD (table descriptor; h_Ad).
25749 +         * If the next HMTD was removed due to table unifing, get the address
25750 +         * of the "next next" as written in the h_Ad of the next h_Manip node.
25751 +         */
25752 +        if (p_Manip->unifiedPosition != e_MANIP_UNIFIED_FIRST)
25753 +            nextAd = (uint16_t)((uint32_t)(XX_VirtToPhys(MANIP_GET_HMTD_PTR(p_FmPcdManipParams->h_NextManip)) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)) >> 4);
25754 +        else
25755 +            nextAd = ((t_Hmtd *)((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad)->nextAdIdx;
25756 +
25757 +        WRITE_UINT16(((t_Hmtd *)p_Manip->h_Ad)->nextAdIdx, nextAd);
25758 +    }
25759 +
25760 +    WRITE_UINT16(((t_Hmtd *)p_Manip->h_Ad)->cfg, tmpReg);
25761 +    WRITE_UINT32(
25762 +            ((t_Hmtd *)p_Manip->h_Ad)->hmcdBasePtr,
25763 +            (uint32_t)(XX_VirtToPhys(p_Manip->p_Hmct) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)));
25764 +
25765 +    WRITE_UINT8(((t_Hmtd *)p_Manip->h_Ad)->opCode, HMAN_OC);
25766 +
25767 +    if (p_Manip->unifiedPosition == e_MANIP_UNIFIED_FIRST)
25768 +    {
25769 +        /* The HMTD of the next Manip is never going to be used */
25770 +        if (((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->muramAllocate)
25771 +            FM_MURAM_FreeMem(
25772 +                    ((t_FmPcd *)((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_FmPcd)->h_FmMuram,
25773 +                    ((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad);
25774 +        else
25775 +            XX_Free(((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad);
25776 +        ((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad = NULL;
25777 +    }
25778 +
25779 +    return E_OK;
25780 +}
25781 +
25782 +static t_Error CreateManipActionShadow(t_FmPcdManip *p_Manip,
25783 +                                       t_FmPcdManipParams *p_FmPcdManipParams)
25784 +{
25785 +    uint8_t *p_WholeHmct, *p_TmpHmctPtr, newDataSize, *p_TmpDataPtr = NULL;
25786 +    uint16_t newSize;
25787 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
25788 +    t_Error err;
25789 +    t_FmPcdManip *p_CurManip = p_Manip;
25790 +
25791 +    err = CalculateTableSize(p_FmPcdManipParams, &newSize, &newDataSize);
25792 +    if (err)
25793 +        RETURN_ERROR(MINOR, err, NO_MSG);
25794 +
25795 +    /* check coherency of new table parameters */
25796 +    if (newSize > p_Manip->tableSize)
25797 +        RETURN_ERROR(
25798 +                MINOR,
25799 +                E_INVALID_VALUE,
25800 +                ("New Hdr Manip configuration requires larger size than current one (command table)."));
25801 +    if (newDataSize > p_Manip->dataSize)
25802 +        RETURN_ERROR(
25803 +                MINOR,
25804 +                E_INVALID_VALUE,
25805 +                ("New Hdr Manip configuration requires larger size than current one (data)."));
25806 +    if (p_FmPcdManipParams->h_NextManip)
25807 +        RETURN_ERROR(
25808 +                MINOR, E_INVALID_VALUE,
25809 +                ("New Hdr Manip configuration can not contain h_NextManip."));
25810 +    if (MANIP_IS_UNIFIED(p_Manip) && (newSize != p_Manip->tableSize))
25811 +        RETURN_ERROR(
25812 +                MINOR,
25813 +                E_INVALID_VALUE,
25814 +                ("New Hdr Manip configuration in a chained manipulation requires different size than current one."));
25815 +    if (p_Manip->dontParseAfterManip
25816 +            != p_FmPcdManipParams->u.hdr.dontParseAfterManip)
25817 +        RETURN_ERROR(
25818 +                MINOR,
25819 +                E_INVALID_VALUE,
25820 +                ("New Hdr Manip configuration differs in dontParseAfterManip value."));
25821 +
25822 +    p_Manip->tableSize = newSize;
25823 +    p_Manip->dataSize = newDataSize;
25824 +
25825 +    /* Build the new table in the shadow */
25826 +    if (!MANIP_IS_UNIFIED(p_Manip))
25827 +    {
25828 +        p_TmpHmctPtr = (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow, 16);
25829 +        if (p_Manip->p_Data)
25830 +            p_TmpDataPtr =
25831 +                    (uint8_t*)PTR_MOVE(p_TmpHmctPtr,
25832 +                            (PTR_TO_UINT(p_Manip->p_Data) - PTR_TO_UINT(p_Manip->p_Hmct)));
25833 +
25834 +        BuildHmct(p_Manip, p_FmPcdManipParams, p_TmpHmctPtr, p_Manip->p_Data,
25835 +                  FALSE);
25836 +    }
25837 +    else
25838 +    {
25839 +        p_WholeHmct = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMCT);
25840 +        ASSERT_COND(p_WholeHmct);
25841 +
25842 +        /* Run till the last Manip (which is the first to configure) */
25843 +        while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
25844 +            p_CurManip = p_CurManip->h_NextManip;
25845 +
25846 +        while (p_CurManip)
25847 +        {
25848 +            /* If this is a non-head node in a unified table, point to the part of the shadow
25849 +             * which is the relative offset in HMCT.
25850 +             * else, point to the beginning of the
25851 +             * shadow table (we save 16 for the HMTD.
25852 +             */
25853 +            p_TmpHmctPtr =
25854 +                    (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow,
25855 +                            (16 + PTR_TO_UINT(p_CurManip->p_Hmct) - PTR_TO_UINT(p_WholeHmct)));
25856 +            if (p_CurManip->p_Data)
25857 +                p_TmpDataPtr =
25858 +                        (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow,
25859 +                                (16 + PTR_TO_UINT(p_CurManip->p_Data) - PTR_TO_UINT(p_WholeHmct)));
25860 +
25861 +            BuildHmct(p_CurManip, &p_CurManip->manipParams, p_TmpHmctPtr,
25862 +                      p_TmpDataPtr, FALSE);
25863 +            p_CurManip = p_CurManip->h_PrevManip;
25864 +        }
25865 +    }
25866 +
25867 +    return E_OK;
25868 +}
25869 +
25870 +static t_Error CreateManipActionBackToOrig(
25871 +        t_FmPcdManip *p_Manip, t_FmPcdManipParams *p_FmPcdManipParams)
25872 +{
25873 +    uint8_t *p_WholeHmct = NULL, *p_TmpHmctPtr, *p_TmpDataPtr;
25874 +    t_FmPcdManip *p_CurManip = p_Manip;
25875 +
25876 +    /* Build the new table in the shadow */
25877 +    if (!MANIP_IS_UNIFIED(p_Manip))
25878 +        BuildHmct(p_Manip, p_FmPcdManipParams, p_Manip->p_Hmct, p_Manip->p_Data,
25879 +                  FALSE);
25880 +    else
25881 +    {
25882 +        p_WholeHmct = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMCT);
25883 +        ASSERT_COND(p_WholeHmct);
25884 +
25885 +        /* Run till the last Manip (which is the first to configure) */
25886 +        while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
25887 +            p_CurManip = p_CurManip->h_NextManip;
25888 +
25889 +        while (p_CurManip)
25890 +        {
25891 +            /* If this is a unified table, point to the part of the table
25892 +             * which is the relative offset in HMCT.
25893 +             */
25894 +            p_TmpHmctPtr = p_CurManip->p_Hmct; /*- (uint32_t)p_WholeHmct*/
25895 +            p_TmpDataPtr = p_CurManip->p_Data; /*- (uint32_t)p_WholeHmct*/
25896 +
25897 +            BuildHmct(p_CurManip, &p_CurManip->manipParams, p_TmpHmctPtr,
25898 +                      p_TmpDataPtr, FALSE);
25899 +
25900 +            p_CurManip = p_CurManip->h_PrevManip;
25901 +        }
25902 +    }
25903 +
25904 +    return E_OK;
25905 +}
25906 +
25907 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
25908 +static t_Error UpdateManipIc(t_Handle h_Manip, uint8_t icOffset)
25909 +{
25910 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
25911 +    t_Handle p_Ad;
25912 +    uint32_t tmpReg32 = 0;
25913 +    SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
25914 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
25915 +
25916 +    switch (p_Manip->opcode)
25917 +    {
25918 +        case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
25919 +        p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
25920 +        if (p_Manip->updateParams & INTERNAL_CONTEXT_OFFSET)
25921 +        {
25922 +            tmpReg32 =
25923 +            *(uint32_t *)&((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets;
25924 +            tmpReg32 |= (uint32_t)((uint32_t)icOffset << 16);
25925 +            *(uint32_t *)&((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets =
25926 +            tmpReg32;
25927 +            p_Manip->updateParams &= ~INTERNAL_CONTEXT_OFFSET;
25928 +            p_Manip->icOffset = icOffset;
25929 +        }
25930 +        else
25931 +        {
25932 +            if (p_Manip->icOffset != icOffset)
25933 +            RETURN_ERROR(
25934 +                    MAJOR,
25935 +                    E_INVALID_VALUE,
25936 +                    ("this manipulation was updated previously by different value"););
25937 +        }
25938 +        break;
25939 +        case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
25940 +        if (p_Manip->h_Frag)
25941 +        {
25942 +            if (p_Manip->updateParams & INTERNAL_CONTEXT_OFFSET)
25943 +            {
25944 +                p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
25945 +                tmpReg32 |= GET_UINT32(((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets);
25946 +                tmpReg32 |= (uint32_t)((uint32_t)icOffset << 16);
25947 +                WRITE_UINT32(((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets, tmpReg32);
25948 +                p_Manip->updateParams &= ~INTERNAL_CONTEXT_OFFSET;
25949 +                p_Manip->icOffset = icOffset;
25950 +            }
25951 +            else
25952 +            {
25953 +                if (p_Manip->icOffset != icOffset)
25954 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("this manipulation was updated previousely by different value"););
25955 +            }
25956 +        }
25957 +        break;
25958 +    }
25959 +
25960 +    return E_OK;
25961 +}
25962 +
25963 +static t_Error UpdateInitMvIntFrameHeaderFromFrameToBufferPrefix(
25964 +        t_Handle h_FmPort, t_FmPcdManip *p_Manip, t_Handle h_Ad, bool validate)
25965 +{
25966 +
25967 +    t_AdOfTypeContLookup *p_Ad = (t_AdOfTypeContLookup *)h_Ad;
25968 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
25969 +    t_Error err;
25970 +    uint32_t tmpReg32;
25971 +
25972 +    memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
25973 +
25974 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
25975 +    SANITY_CHECK_RETURN_ERROR(
25976 +            (p_Manip->opcode & HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX),
25977 +            E_INVALID_STATE);
25978 +    SANITY_CHECK_RETURN_ERROR(!p_Manip->muramAllocate, E_INVALID_STATE);
25979 +
25980 +    if (p_Manip->updateParams)
25981 +    {
25982 +        if ((!(p_Manip->updateParams & OFFSET_OF_PR))
25983 +                || (p_Manip->shadowUpdateParams & OFFSET_OF_PR))
25984 +        RETURN_ERROR(
25985 +                MAJOR, E_INVALID_STATE,
25986 +                ("in this stage parameters from Port has not be updated"));
25987 +
25988 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams;
25989 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_PSO;
25990 +        fmPortGetSetCcParams.setCcParams.psoSize = 16;
25991 +
25992 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
25993 +        if (err)
25994 +        RETURN_ERROR(MAJOR, err, NO_MSG);
25995 +        if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR)
25996 +        RETURN_ERROR(
25997 +                MAJOR, E_INVALID_STATE,
25998 +                ("Parser result offset wasn't configured previousely"));
25999 +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
26000 +        ASSERT_COND(!(fmPortGetSetCcParams.getCcParams.prOffset % 16));
26001 +#endif
26002 +    }
26003 +    else
26004 +    if (validate)
26005 +    {
26006 +        if ((!(p_Manip->shadowUpdateParams & OFFSET_OF_PR))
26007 +                || (p_Manip->updateParams & OFFSET_OF_PR))
26008 +        RETURN_ERROR(
26009 +                MAJOR, E_INVALID_STATE,
26010 +                ("in this stage parameters from Port has be updated"));
26011 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->shadowUpdateParams;
26012 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_PSO;
26013 +        fmPortGetSetCcParams.setCcParams.psoSize = 16;
26014 +
26015 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
26016 +        if (err)
26017 +        RETURN_ERROR(MAJOR, err, NO_MSG);
26018 +        if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR)
26019 +        RETURN_ERROR(
26020 +                MAJOR, E_INVALID_STATE,
26021 +                ("Parser result offset wasn't configured previousely"));
26022 +
26023 +    }
26024 +
26025 +    ASSERT_COND(p_Ad);
26026 +
26027 +    if (p_Manip->updateParams & OFFSET_OF_PR)
26028 +    {
26029 +        tmpReg32 = 0;
26030 +        tmpReg32 |= fmPortGetSetCcParams.getCcParams.prOffset;
26031 +        WRITE_UINT32(p_Ad->matchTblPtr,
26032 +                (GET_UINT32(p_Ad->matchTblPtr) | tmpReg32));
26033 +        p_Manip->updateParams &= ~OFFSET_OF_PR;
26034 +        p_Manip->shadowUpdateParams |= OFFSET_OF_PR;
26035 +    }
26036 +    else
26037 +    if (validate)
26038 +    {
26039 +        tmpReg32 = GET_UINT32(p_Ad->matchTblPtr);
26040 +        if ((uint8_t)tmpReg32 != fmPortGetSetCcParams.getCcParams.prOffset)
26041 +        RETURN_ERROR(
26042 +                MAJOR,
26043 +                E_INVALID_STATE,
26044 +                ("this manipulation was updated previousely by different value"););
26045 +    }
26046 +
26047 +    return E_OK;
26048 +}
26049 +
26050 +static t_Error UpdateModifyCapwapFragmenation(t_FmPcdManip *p_Manip, t_Handle h_Ad, bool validate,t_Handle h_FmTree)
26051 +{
26052 +    t_AdOfTypeContLookup *p_Ad = (t_AdOfTypeContLookup *)h_Ad;
26053 +    t_FmPcdCcSavedManipParams *p_SavedManipParams = NULL;
26054 +    uint32_t tmpReg32 = 0;
26055 +
26056 +    SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
26057 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Frag,E_INVALID_HANDLE);
26058 +    SANITY_CHECK_RETURN_ERROR(p_Manip->frag,E_INVALID_HANDLE);
26059 +    SANITY_CHECK_RETURN_ERROR(((p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION) || (p_Manip->opcode == HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER)), E_INVALID_STATE);
26060 +
26061 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Frag;
26062 +
26063 +    if (p_Manip->updateParams)
26064 +    {
26065 +
26066 +        if ((!(p_Manip->updateParams & OFFSET_OF_DATA)) ||
26067 +                ((p_Manip->shadowUpdateParams & OFFSET_OF_DATA)))
26068 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has not be updated"));
26069 +        p_SavedManipParams = FmPcdCcTreeGetSavedManipParams(h_FmTree);
26070 +        if (!p_SavedManipParams)
26071 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("for this manipulation tree has to be configured previosely with this type"));
26072 +        p_Manip->capwapFragParams.dataOffset = p_SavedManipParams->capwapParams.dataOffset;
26073 +
26074 +        tmpReg32 = GET_UINT32(p_Ad->pcAndOffsets);
26075 +        tmpReg32 |= ((uint32_t)p_Manip->capwapFragParams.dataOffset<< 16);
26076 +        WRITE_UINT32(p_Ad->pcAndOffsets,tmpReg32);
26077 +
26078 +        p_Manip->updateParams &= ~OFFSET_OF_DATA;
26079 +        p_Manip->shadowUpdateParams |= OFFSET_OF_DATA;
26080 +    }
26081 +    else if (validate)
26082 +    {
26083 +
26084 +        p_SavedManipParams = FmPcdCcTreeGetSavedManipParams(h_FmTree);
26085 +        if (!p_SavedManipParams)
26086 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("for this manipulation tree has to be configured previosely with this type"));
26087 +        if (p_Manip->capwapFragParams.dataOffset != p_SavedManipParams->capwapParams.dataOffset)
26088 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("this manipulation was updated previousely by different value"));
26089 +    }
26090 +
26091 +    return E_OK;
26092 +}
26093 +
26094 +static t_Error UpdateInitCapwapFragmentation(t_Handle h_FmPort,
26095 +        t_FmPcdManip *p_Manip,
26096 +        t_Handle h_Ad,
26097 +        bool validate,
26098 +        t_Handle h_FmTree)
26099 +{
26100 +    t_AdOfTypeContLookup *p_Ad;
26101 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
26102 +    t_Error err;
26103 +    uint32_t tmpReg32 = 0;
26104 +    t_FmPcdCcSavedManipParams *p_SavedManipParams;
26105 +
26106 +    UNUSED(h_Ad);
26107 +
26108 +    SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
26109 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Frag,E_INVALID_HANDLE);
26110 +    SANITY_CHECK_RETURN_ERROR(p_Manip->frag,E_INVALID_HANDLE);
26111 +    SANITY_CHECK_RETURN_ERROR(((p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION) ||
26112 +                    (p_Manip->opcode == HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER)), E_INVALID_STATE);
26113 +
26114 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Frag;
26115 +
26116 +    if (p_Manip->updateParams)
26117 +    {
26118 +        if ((!(p_Manip->updateParams & OFFSET_OF_DATA)) ||
26119 +                ((p_Manip->shadowUpdateParams & OFFSET_OF_DATA)))
26120 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has not be updated"));
26121 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams;
26122 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN | UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY;
26123 +        fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
26124 +        /* For CAPWAP Rassembly used FMAN_CTRL2 hardcoded - so for fragmentation its better to use FMAN_CTRL1 */
26125 +        fmPortGetSetCcParams.setCcParams.orFmanCtrl = FPM_PORT_FM_CTL1;
26126 +
26127 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
26128 +        if (err)
26129 +        RETURN_ERROR(MAJOR, err, NO_MSG);
26130 +
26131 +        if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
26132 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Data offset wasn't configured previousely"));
26133 +
26134 +        p_SavedManipParams = (t_FmPcdCcSavedManipParams *)XX_Malloc(sizeof(t_FmPcdCcSavedManipParams));
26135 +        p_SavedManipParams->capwapParams.dataOffset = fmPortGetSetCcParams.getCcParams.dataOffset;
26136 +
26137 +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
26138 +        ASSERT_COND(!(p_SavedManipParams->capwapParams.dataOffset % 16));
26139 +#endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
26140 +
26141 +        FmPcdCcTreeSetSavedManipParams(h_FmTree, (t_Handle)p_SavedManipParams);
26142 +    }
26143 +    else if (validate)
26144 +    {
26145 +        if ((!(p_Manip->shadowUpdateParams & OFFSET_OF_DATA)) ||
26146 +                ((p_Manip->updateParams & OFFSET_OF_DATA)))
26147 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has be updated"));
26148 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->shadowUpdateParams;
26149 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN | UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY;
26150 +        fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
26151 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
26152 +        if (err)
26153 +        RETURN_ERROR(MAJOR, err, NO_MSG);
26154 +
26155 +        if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
26156 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Data offset wasn't configured previousely"));
26157 +    }
26158 +
26159 +    if (p_Manip->updateParams)
26160 +    {
26161 +        tmpReg32 = GET_UINT32(p_Ad->pcAndOffsets);
26162 +        tmpReg32 |= ((uint32_t)fmPortGetSetCcParams.getCcParams.dataOffset<< 16);
26163 +        WRITE_UINT32(p_Ad->pcAndOffsets,tmpReg32);
26164 +
26165 +        p_Manip->updateParams &= ~OFFSET_OF_DATA;
26166 +        p_Manip->shadowUpdateParams |= OFFSET_OF_DATA;
26167 +        p_Manip->capwapFragParams.dataOffset = fmPortGetSetCcParams.getCcParams.dataOffset;
26168 +    }
26169 +    else if (validate)
26170 +    {
26171 +        if (p_Manip->capwapFragParams.dataOffset != fmPortGetSetCcParams.getCcParams.dataOffset)
26172 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("this manipulation was updated previousely by different value"));
26173 +    }
26174 +
26175 +    return E_OK;
26176 +}
26177 +
26178 +static t_Error UpdateInitCapwapReasm(t_Handle h_FmPcd,
26179 +        t_Handle h_FmPort,
26180 +        t_FmPcdManip *p_Manip,
26181 +        t_Handle h_Ad,
26182 +        bool validate)
26183 +{
26184 +    t_CapwapReasmPram *p_ReassmTbl;
26185 +    t_Error err;
26186 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
26187 +    uint8_t i = 0;
26188 +    uint16_t size;
26189 +    uint32_t tmpReg32;
26190 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
26191 +    t_FmPcdCcCapwapReassmTimeoutParams ccCapwapReassmTimeoutParams;
26192 +
26193 +    SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
26194 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Frag,E_INVALID_HANDLE);
26195 +    SANITY_CHECK_RETURN_ERROR(!p_Manip->frag,E_INVALID_HANDLE);
26196 +    SANITY_CHECK_RETURN_ERROR((p_Manip->opcode == HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST), E_INVALID_STATE);
26197 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd,E_INVALID_HANDLE);
26198 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc,E_INVALID_HANDLE);
26199 +
26200 +    if (p_Manip->h_FmPcd != h_FmPcd)
26201 +    RETURN_ERROR(MAJOR, E_INVALID_STATE,
26202 +            ("handler of PCD previously was initiated by different value"));
26203 +
26204 +    UNUSED(h_Ad);
26205 +
26206 +    memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
26207 +    p_ReassmTbl = (t_CapwapReasmPram *)p_Manip->h_Frag;
26208 +
26209 +    if (p_Manip->updateParams)
26210 +    {
26211 +        if ((!(p_Manip->updateParams & NUM_OF_TASKS) &&
26212 +                        !(p_Manip->updateParams & OFFSET_OF_DATA) &&
26213 +                        !(p_Manip->updateParams & OFFSET_OF_PR) &&
26214 +                        !(p_Manip->updateParams & HW_PORT_ID)) ||
26215 +                ((p_Manip->shadowUpdateParams & NUM_OF_TASKS) ||
26216 +                        (p_Manip->shadowUpdateParams & OFFSET_OF_DATA) || (p_Manip->shadowUpdateParams & OFFSET_OF_PR) ||
26217 +                        (p_Manip->shadowUpdateParams & HW_PORT_ID)))
26218 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has not be updated"));
26219 +
26220 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams;
26221 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN;
26222 +        fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
26223 +
26224 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
26225 +        if (err)
26226 +        RETURN_ERROR(MAJOR, err, NO_MSG);
26227 +
26228 +        if (fmPortGetSetCcParams.getCcParams.type & NUM_OF_TASKS)
26229 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Num of tasks wasn't configured previousely"));
26230 +        if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
26231 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("offset of the data  wasn't configured previousely"));
26232 +        if (fmPortGetSetCcParams.getCcParams.type & HW_PORT_ID)
26233 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("hwPortId wasn't updated"));
26234 +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
26235 +        ASSERT_COND((fmPortGetSetCcParams.getCcParams.dataOffset % 16) == 0);
26236 +#endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
26237 +    }
26238 +    else if (validate)
26239 +    {
26240 +        if ((!(p_Manip->shadowUpdateParams & NUM_OF_TASKS) &&
26241 +                        !(p_Manip->shadowUpdateParams & OFFSET_OF_DATA) &&
26242 +                        !(p_Manip->shadowUpdateParams & OFFSET_OF_PR) &&
26243 +                        !(p_Manip->shadowUpdateParams & HW_PORT_ID)) &&
26244 +                ((p_Manip->updateParams & NUM_OF_TASKS) ||
26245 +                        (p_Manip->updateParams & OFFSET_OF_DATA) || (p_Manip->updateParams & OFFSET_OF_PR) ||
26246 +                        (p_Manip->updateParams & HW_PORT_ID)))
26247 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has be updated"));
26248 +
26249 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->shadowUpdateParams;
26250 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN;
26251 +        fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
26252 +
26253 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
26254 +        if (err)
26255 +        RETURN_ERROR(MAJOR, err, NO_MSG);
26256 +
26257 +        if (fmPortGetSetCcParams.getCcParams.type & NUM_OF_TASKS)
26258 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("NumOfTasks wasn't configured previously"));
26259 +        if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
26260 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("offset of the data  wasn't configured previously"));
26261 +        if (fmPortGetSetCcParams.getCcParams.type & HW_PORT_ID)
26262 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("hwPortId wasn't updated"));
26263 +    }
26264 +
26265 +    if (p_Manip->updateParams)
26266 +    {
26267 +        if (p_Manip->updateParams & NUM_OF_TASKS)
26268 +        {
26269 +            /*recommendation of Microcode team - (maxNumFramesInProcess * 2) */
26270 +            size = (uint16_t)(p_Manip->capwapFragParams.maxNumFramesInProcess*2 + fmPortGetSetCcParams.getCcParams.numOfTasks);
26271 +            if (size > 255)
26272 +            RETURN_ERROR(MAJOR,E_INVALID_VALUE, ("numOfOpenReassmEntries + numOfTasks per port can not be greater than 256"));
26273 +
26274 +            p_Manip->capwapFragParams.numOfTasks = fmPortGetSetCcParams.getCcParams.numOfTasks;
26275 +
26276 +            /*p_ReassmFrmDescrIndxPoolTbl*/
26277 +            p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl =
26278 +            (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
26279 +                    (uint32_t)(size + 1),
26280 +                    4);
26281 +            if (!p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl)
26282 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP Reassembly frame buffer index pool table"));
26283 +
26284 +            MemSet8(p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl, 0, (uint32_t)(size + 1));
26285 +
26286 +            for ( i = 0; i < size; i++)
26287 +            WRITE_UINT8(*(uint8_t *)PTR_MOVE(p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl, i), (uint8_t)(i+1));
26288 +
26289 +            tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl) - p_FmPcd->physicalMuramBase);
26290 +
26291 +            WRITE_UINT32(p_ReassmTbl->reasmFrmDescIndexPoolTblPtr, tmpReg32);
26292 +
26293 +            /*p_ReassmFrmDescrPoolTbl*/
26294 +            p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl =
26295 +            (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
26296 +                    (uint32_t)((size + 1) * FM_PCD_MANIP_CAPWAP_REASM_RFD_SIZE),
26297 +                    4);
26298 +
26299 +            if (!p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl)
26300 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP Reassembly frame buffer pool table"));
26301 +
26302 +            MemSet8(p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl, 0, (uint32_t)((size +1)* FM_PCD_MANIP_CAPWAP_REASM_RFD_SIZE));
26303 +
26304 +            tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl) - p_FmPcd->physicalMuramBase);
26305 +
26306 +            WRITE_UINT32(p_ReassmTbl->reasmFrmDescPoolTblPtr, tmpReg32);
26307 +
26308 +            /*p_TimeOutTbl*/
26309 +
26310 +            p_Manip->capwapFragParams.p_TimeOutTbl =
26311 +            (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
26312 +                    (uint32_t)((size + 1)* FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_ENTRY_SIZE),
26313 +                    4);
26314 +
26315 +            if (!p_Manip->capwapFragParams.p_TimeOutTbl)
26316 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP Reassembly timeout table"));
26317 +
26318 +            MemSet8(p_Manip->capwapFragParams.p_TimeOutTbl, 0, (uint16_t)((size + 1)*FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_ENTRY_SIZE));
26319 +
26320 +            tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_TimeOutTbl) - p_FmPcd->physicalMuramBase);
26321 +            WRITE_UINT32(p_ReassmTbl->timeOutTblPtr, tmpReg32);
26322 +
26323 +            p_Manip->updateParams &= ~NUM_OF_TASKS;
26324 +            p_Manip->shadowUpdateParams |= NUM_OF_TASKS;
26325 +        }
26326 +
26327 +        if (p_Manip->updateParams & OFFSET_OF_DATA)
26328 +        {
26329 +            p_Manip->capwapFragParams.dataOffset = fmPortGetSetCcParams.getCcParams.dataOffset;
26330 +            tmpReg32 = GET_UINT32(p_ReassmTbl->mode);
26331 +            tmpReg32|= p_Manip->capwapFragParams.dataOffset;
26332 +            WRITE_UINT32(p_ReassmTbl->mode, tmpReg32);
26333 +            p_Manip->updateParams &= ~OFFSET_OF_DATA;
26334 +            p_Manip->shadowUpdateParams |= OFFSET_OF_DATA;
26335 +        }
26336 +
26337 +        if (!(fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR))
26338 +        {
26339 +            p_Manip->capwapFragParams.prOffset = fmPortGetSetCcParams.getCcParams.prOffset;
26340 +
26341 +            tmpReg32 = GET_UINT32(p_ReassmTbl->mode);
26342 +            tmpReg32|= FM_PCD_MANIP_CAPWAP_REASM_PR_COPY;
26343 +            WRITE_UINT32(p_ReassmTbl->mode, tmpReg32);
26344 +
26345 +            tmpReg32 = GET_UINT32(p_ReassmTbl->intStatsTblPtr);
26346 +            tmpReg32 |= (uint32_t)p_Manip->capwapFragParams.prOffset << 24;
26347 +            WRITE_UINT32(p_ReassmTbl->intStatsTblPtr, tmpReg32);
26348 +            p_Manip->updateParams &= ~OFFSET_OF_PR;
26349 +            p_Manip->shadowUpdateParams |= OFFSET_OF_PR;
26350 +        }
26351 +        else
26352 +        {
26353 +            p_Manip->capwapFragParams.prOffset = 0xff;
26354 +            p_Manip->updateParams &= ~OFFSET_OF_PR;
26355 +            p_Manip->shadowUpdateParams |= OFFSET_OF_PR;
26356 +        }
26357 +
26358 +        p_Manip->capwapFragParams.hwPortId = fmPortGetSetCcParams.getCcParams.hardwarePortId;
26359 +        p_Manip->updateParams &= ~HW_PORT_ID;
26360 +        p_Manip->shadowUpdateParams |= HW_PORT_ID;
26361 +
26362 +        /*timeout hc */
26363 +        ccCapwapReassmTimeoutParams.fqidForTimeOutFrames = p_Manip->capwapFragParams.fqidForTimeOutFrames;
26364 +        ccCapwapReassmTimeoutParams.portIdAndCapwapReassmTbl = (uint32_t)p_Manip->capwapFragParams.hwPortId << 24;
26365 +        ccCapwapReassmTimeoutParams.portIdAndCapwapReassmTbl |= (uint32_t)((XX_VirtToPhys(p_ReassmTbl) - p_FmPcd->physicalMuramBase));
26366 +        ccCapwapReassmTimeoutParams.timeoutRequestTime = (((uint32_t)1<<p_Manip->capwapFragParams.bitFor1Micro) * p_Manip->capwapFragParams.timeoutRoutineRequestTime)/2;
26367 +        return FmHcPcdCcCapwapTimeoutReassm(p_FmPcd->h_Hc,&ccCapwapReassmTimeoutParams);
26368 +    }
26369 +
26370 +    else if (validate)
26371 +    {
26372 +        if (fmPortGetSetCcParams.getCcParams.hardwarePortId != p_Manip->capwapFragParams.hwPortId)
26373 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Reassembly manipulation previously was assigned to another port"));
26374 +        if (fmPortGetSetCcParams.getCcParams.numOfTasks != p_Manip->capwapFragParams.numOfTasks)
26375 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfTasks for this manipulation previously was defined by another value "));
26376 +
26377 +        if (!(fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR))
26378 +        {
26379 +            if (p_Manip->capwapFragParams.prOffset != fmPortGetSetCcParams.getCcParams.prOffset)
26380 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Parse result offset previously was defined by another value "));
26381 +        }
26382 +        else
26383 +        {
26384 +            if (p_Manip->capwapFragParams.prOffset != 0xff)
26385 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Parse result offset previously was defined by another value "));
26386 +        }
26387 +        if (fmPortGetSetCcParams.getCcParams.dataOffset != p_Manip->capwapFragParams.dataOffset)
26388 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Data offset previously was defined by another value "));
26389 +    }
26390 +
26391 +    return E_OK;
26392 +}
26393 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
26394 +
26395 +t_Error FmPcdRegisterReassmPort(t_Handle h_FmPcd, t_Handle h_ReasmCommonPramTbl)
26396 +{
26397 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
26398 +    t_FmPcdCcReassmTimeoutParams ccReassmTimeoutParams = { 0 };
26399 +    t_Error err = E_OK;
26400 +    uint8_t result;
26401 +    uint32_t bitFor1Micro, tsbs, log2num;
26402 +
26403 +    ASSERT_COND(p_FmPcd);
26404 +    ASSERT_COND(h_ReasmCommonPramTbl);
26405 +
26406 +    bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
26407 +    if (bitFor1Micro == 0)
26408 +        RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
26409 +
26410 +    bitFor1Micro = 32 - bitFor1Micro;
26411 +    LOG2(FM_PCD_MANIP_REASM_TIMEOUT_THREAD_THRESH, log2num);
26412 +    tsbs = bitFor1Micro - log2num;
26413 +
26414 +    ccReassmTimeoutParams.iprcpt = (uint32_t)(XX_VirtToPhys(
26415 +            h_ReasmCommonPramTbl) - p_FmPcd->physicalMuramBase);
26416 +    ccReassmTimeoutParams.tsbs = (uint8_t)tsbs;
26417 +    ccReassmTimeoutParams.activate = TRUE;
26418 +    if ((err = FmHcPcdCcTimeoutReassm(p_FmPcd->h_Hc, &ccReassmTimeoutParams,
26419 +                                      &result)) != E_OK)
26420 +        RETURN_ERROR(MAJOR, err, NO_MSG);
26421 +
26422 +    switch (result)
26423 +    {
26424 +        case (0):
26425 +            return E_OK;
26426 +        case (1):
26427 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("failed to allocate TNUM"));
26428 +        case (2):
26429 +            RETURN_ERROR(
26430 +                    MAJOR, E_NO_MEMORY,
26431 +                    ("failed to allocate internal buffer from the HC-Port"));
26432 +        case (3):
26433 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
26434 +                         ("'Disable Timeout Task' with invalid IPRCPT"));
26435 +        case (4):
26436 +            RETURN_ERROR(MAJOR, E_FULL, ("too many timeout tasks"));
26437 +        case (5):
26438 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("invalid sub command"));
26439 +        default:
26440 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
26441 +    }
26442 +    return E_OK;
26443 +}
26444 +
26445 +static t_Error CreateReassCommonTable(t_FmPcdManip *p_Manip)
26446 +{
26447 +    uint32_t tmpReg32 = 0, i, bitFor1Micro;
26448 +    uint64_t tmpReg64, size;
26449 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
26450 +    t_Error err = E_OK;
26451 +
26452 +    bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
26453 +    if (bitFor1Micro == 0)
26454 +        RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
26455 +
26456 +    /* Allocation of the Reassembly Common Parameters table. This table is located in the
26457 +     MURAM. Its size is 64 bytes and its base address should be 8-byte aligned. */
26458 +    p_Manip->reassmParams.p_ReassCommonTbl =
26459 +            (t_ReassCommonTbl *)FM_MURAM_AllocMem(
26460 +                    p_FmPcd->h_FmMuram,
26461 +                    FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_SIZE,
26462 +                    FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_ALIGN);
26463 +
26464 +    if (!p_Manip->reassmParams.p_ReassCommonTbl)
26465 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
26466 +                     ("MURAM alloc for Reassembly common parameters table"));
26467 +
26468 +    MemSet8(p_Manip->reassmParams.p_ReassCommonTbl, 0,
26469 +               FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_SIZE);
26470 +
26471 +    /* Setting the TimeOut Mode.*/
26472 +    tmpReg32 = 0;
26473 +    if (p_Manip->reassmParams.timeOutMode
26474 +            == e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES)
26475 +        tmpReg32 |= FM_PCD_MANIP_REASM_TIME_OUT_BETWEEN_FRAMES;
26476 +
26477 +    /* Setting TimeOut FQID - Frames that time out are enqueued to this FQID.
26478 +     In order to cause TimeOut frames to be discarded, this queue should be configured accordingly*/
26479 +    tmpReg32 |= p_Manip->reassmParams.fqidForTimeOutFrames;
26480 +    WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->timeoutModeAndFqid,
26481 +                 tmpReg32);
26482 +
26483 +    /* Calculation the size of IP Reassembly Frame Descriptor - number of frames that are allowed to be reassembled simultaneously + 129.*/
26484 +    size = p_Manip->reassmParams.maxNumFramesInProcess + 129;
26485 +
26486 +    /*Allocation of IP Reassembly Frame Descriptor Indexes Pool - This pool resides in the MURAM */
26487 +    p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr =
26488 +            PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
26489 +                            (uint32_t)(size * 2),
26490 +                            256));
26491 +    if (!p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr)
26492 +        RETURN_ERROR(
26493 +                MAJOR, E_NO_MEMORY,
26494 +                ("MURAM alloc for Reassembly frame descriptor indexes pool"));
26495 +
26496 +    MemSet8(UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr),
26497 +               0, (uint32_t)(size * 2));
26498 +
26499 +    /* The entries in IP Reassembly Frame Descriptor Indexes Pool contains indexes starting with 1 up to
26500 +     the maximum number of frames that are allowed to be reassembled simultaneously + 128.
26501 +     The last entry in this pool must contain the index zero*/
26502 +    for (i = 0; i < (size - 1); i++)
26503 +        WRITE_UINT16(
26504 +                *(uint16_t *)PTR_MOVE(UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr), (i<<1)),
26505 +                (uint16_t)(i+1));
26506 +
26507 +    /* Sets the IP Reassembly Frame Descriptor Indexes Pool offset from MURAM */
26508 +    tmpReg32 = (uint32_t)(XX_VirtToPhys(
26509 +            UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr))
26510 +            - p_FmPcd->physicalMuramBase);
26511 +    WRITE_UINT32(
26512 +            p_Manip->reassmParams.p_ReassCommonTbl->reassFrmDescIndexPoolTblPtr,
26513 +            tmpReg32);
26514 +
26515 +    /* Allocation of the Reassembly Frame Descriptors Pool - This pool resides in external memory.
26516 +     The number of entries in this pool should be equal to the number of entries in IP Reassembly Frame Descriptor Indexes Pool.*/
26517 +    p_Manip->reassmParams.reassFrmDescrPoolTblAddr =
26518 +            PTR_TO_UINT(XX_MallocSmart((uint32_t)(size * 64), p_Manip->reassmParams.dataMemId, 64));
26519 +
26520 +    if (!p_Manip->reassmParams.reassFrmDescrPoolTblAddr)
26521 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation FAILED"));
26522 +
26523 +    MemSet8(UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrPoolTblAddr), 0,
26524 +               (uint32_t)(size * 64));
26525 +
26526 +    /* Sets the Reassembly Frame Descriptors Pool and liodn offset*/
26527 +    tmpReg64 = (uint64_t)(XX_VirtToPhys(
26528 +            UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrPoolTblAddr)));
26529 +    tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
26530 +            & FM_PCD_MANIP_REASM_LIODN_MASK)
26531 +            << (uint64_t)FM_PCD_MANIP_REASM_LIODN_SHIFT);
26532 +    tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
26533 +            & FM_PCD_MANIP_REASM_ELIODN_MASK)
26534 +            << (uint64_t)FM_PCD_MANIP_REASM_ELIODN_SHIFT);
26535 +    WRITE_UINT32(
26536 +            p_Manip->reassmParams.p_ReassCommonTbl->liodnAndReassFrmDescPoolPtrHi,
26537 +            (uint32_t)(tmpReg64 >> 32));
26538 +    WRITE_UINT32(
26539 +            p_Manip->reassmParams.p_ReassCommonTbl->reassFrmDescPoolPtrLow,
26540 +            (uint32_t)tmpReg64);
26541 +
26542 +    /*Allocation of the TimeOut table - This table resides in the MURAM.
26543 +     The number of entries in this table is identical to the number of entries in the Reassembly Frame Descriptors Pool*/
26544 +    p_Manip->reassmParams.timeOutTblAddr =
26545 +            PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram, (uint32_t)(size * 8),8));
26546 +
26547 +    if (!p_Manip->reassmParams.timeOutTblAddr)
26548 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
26549 +                     ("MURAM alloc for Reassembly timeout table"));
26550 +
26551 +    MemSet8(UINT_TO_PTR(p_Manip->reassmParams.timeOutTblAddr), 0,
26552 +               (uint16_t)(size * 8));
26553 +
26554 +    /* Sets the TimeOut table offset from MURAM */
26555 +    tmpReg32 = (uint32_t)(XX_VirtToPhys(
26556 +            UINT_TO_PTR(p_Manip->reassmParams.timeOutTblAddr))
26557 +            - p_FmPcd->physicalMuramBase);
26558 +    WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->timeOutTblPtr,
26559 +                 tmpReg32);
26560 +
26561 +    /* Sets the Expiration Delay */
26562 +    tmpReg32 = 0;
26563 +    tmpReg32 |= (((uint32_t)(1 << bitFor1Micro))
26564 +            * p_Manip->reassmParams.timeoutThresholdForReassmProcess);
26565 +    WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->expirationDelay,
26566 +                 tmpReg32);
26567 +
26568 +    err = FmPcdRegisterReassmPort(p_FmPcd,
26569 +                                  p_Manip->reassmParams.p_ReassCommonTbl);
26570 +    if (err != E_OK)
26571 +    {
26572 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
26573 +                         p_Manip->reassmParams.p_ReassCommonTbl);
26574 +        RETURN_ERROR(MAJOR, err, ("port registration"));
26575 +    }
26576 +
26577 +    return err;
26578 +}
26579 +
26580 +static t_Error CreateReassTable(t_FmPcdManip *p_Manip, e_NetHeaderType hdr)
26581 +{
26582 +    t_FmPcd *p_FmPcd = p_Manip->h_FmPcd;
26583 +    uint32_t tmpReg32, autoLearnHashTblSize;
26584 +    uint32_t numOfWays, setSize, setSizeCode, keySize;
26585 +    uint32_t waySize, numOfSets, numOfEntries;
26586 +    uint64_t tmpReg64;
26587 +    uint16_t minFragSize;
26588 +    uint16_t maxReassemSize;
26589 +    uintptr_t *p_AutoLearnHashTblAddr, *p_AutoLearnSetLockTblAddr;
26590 +    t_ReassTbl **p_ReassTbl;
26591 +
26592 +    switch (hdr)
26593 +    {
26594 +        case HEADER_TYPE_IPv4:
26595 +            p_ReassTbl = &p_Manip->reassmParams.ip.p_Ipv4ReassTbl;
26596 +            p_AutoLearnHashTblAddr =
26597 +                    &p_Manip->reassmParams.ip.ipv4AutoLearnHashTblAddr;
26598 +            p_AutoLearnSetLockTblAddr =
26599 +                    &p_Manip->reassmParams.ip.ipv4AutoLearnSetLockTblAddr;
26600 +            minFragSize = p_Manip->reassmParams.ip.minFragSize[0];
26601 +            maxReassemSize = 0;
26602 +            numOfWays = p_Manip->reassmParams.ip.numOfFramesPerHashEntry[0];
26603 +            keySize = 4 + 4 + 1 + 2; /* 3-tuple + IP-Id */
26604 +            break;
26605 +        case HEADER_TYPE_IPv6:
26606 +            p_ReassTbl = &p_Manip->reassmParams.ip.p_Ipv6ReassTbl;
26607 +            p_AutoLearnHashTblAddr =
26608 +                    &p_Manip->reassmParams.ip.ipv6AutoLearnHashTblAddr;
26609 +            p_AutoLearnSetLockTblAddr =
26610 +                    &p_Manip->reassmParams.ip.ipv6AutoLearnSetLockTblAddr;
26611 +            minFragSize = p_Manip->reassmParams.ip.minFragSize[1];
26612 +            maxReassemSize = 0;
26613 +            numOfWays = p_Manip->reassmParams.ip.numOfFramesPerHashEntry[1];
26614 +            keySize = 16 + 16 + 4; /* 2-tuple + IP-Id */
26615 +            if (numOfWays > e_FM_PCD_MANIP_SIX_WAYS_HASH)
26616 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("num of ways"));
26617 +            break;
26618 +        case HEADER_TYPE_CAPWAP:
26619 +            p_ReassTbl = &p_Manip->reassmParams.capwap.p_ReassTbl;
26620 +            p_AutoLearnHashTblAddr =
26621 +                    &p_Manip->reassmParams.capwap.autoLearnHashTblAddr;
26622 +            p_AutoLearnSetLockTblAddr =
26623 +                    &p_Manip->reassmParams.capwap.autoLearnSetLockTblAddr;
26624 +            minFragSize = 0;
26625 +            maxReassemSize = p_Manip->reassmParams.capwap.maxRessembledsSize;
26626 +            numOfWays = p_Manip->reassmParams.capwap.numOfFramesPerHashEntry;
26627 +            keySize = 4;
26628 +            break;
26629 +        default:
26630 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("header type"));
26631 +    }
26632 +    keySize += 2; /* 2 bytes reserved for RFDIndex */
26633 +#if (DPAA_VERSION >= 11)
26634 +    keySize += 2; /* 2 bytes reserved */
26635 +#endif /* (DPAA_VERSION >= 11) */
26636 +    waySize = ROUND_UP(keySize, 8);
26637 +
26638 +    /* Allocates the Reassembly Parameters Table - This table is located in the MURAM.*/
26639 +    *p_ReassTbl = (t_ReassTbl *)FM_MURAM_AllocMem(
26640 +            p_FmPcd->h_FmMuram, FM_PCD_MANIP_REASM_TABLE_SIZE,
26641 +            FM_PCD_MANIP_REASM_TABLE_ALIGN);
26642 +    if (!*p_ReassTbl)
26643 +        RETURN_ERROR( MAJOR, E_NO_MEMORY,
26644 +                     ("MURAM alloc for Reassembly specific parameters table"));
26645 +    memset(*p_ReassTbl, 0, sizeof(t_ReassTbl));
26646 +
26647 +    /* Sets the Reassembly common Parameters table offset from MURAM in the Reassembly Table descriptor*/
26648 +    tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->reassmParams.p_ReassCommonTbl)
26649 +            - p_FmPcd->physicalMuramBase);
26650 +    WRITE_UINT32((*p_ReassTbl)->reassCommonPrmTblPtr, tmpReg32);
26651 +
26652 +    /* Calculate set size (set size is rounded-up to next power of 2) */
26653 +    NEXT_POWER_OF_2(numOfWays * waySize, setSize);
26654 +
26655 +    /* Get set size code */
26656 +    LOG2(setSize, setSizeCode);
26657 +
26658 +    /* Sets ways number and set size code */
26659 +    WRITE_UINT16((*p_ReassTbl)->waysNumAndSetSize,
26660 +                 (uint16_t)((numOfWays << 8) | setSizeCode));
26661 +
26662 +    /* It is recommended that the total number of entries in this table
26663 +     (number of sets * number of ways) will be twice the number of frames that
26664 +     are expected to be reassembled simultaneously.*/
26665 +    numOfEntries = (uint32_t)(p_Manip->reassmParams.maxNumFramesInProcess * 2);
26666 +
26667 +    /* sets number calculation - number of entries = number of sets * number of ways */
26668 +    numOfSets = numOfEntries / numOfWays;
26669 +
26670 +    /* Sets AutoLearnHashKeyMask*/
26671 +    NEXT_POWER_OF_2(numOfSets, numOfSets);
26672 +
26673 +    WRITE_UINT16((*p_ReassTbl)->autoLearnHashKeyMask,
26674 +                 (uint16_t)(numOfSets - 1));
26675 +
26676 +    /* Allocation of Reassembly Automatic Learning Hash Table - This table resides in external memory.
26677 +     The size of this table is determined by the number of sets and the set size.
26678 +     Table size = set size * number of sets
26679 +     This table base address should be aligned to SetSize.*/
26680 +    autoLearnHashTblSize = numOfSets * setSize;
26681 +
26682 +    *p_AutoLearnHashTblAddr =
26683 +            PTR_TO_UINT(XX_MallocSmart(autoLearnHashTblSize, p_Manip->reassmParams.dataMemId, setSize));
26684 +    if (!*p_AutoLearnHashTblAddr)
26685 +    {
26686 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, *p_ReassTbl);
26687 +        *p_ReassTbl = NULL;
26688 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation FAILED"));
26689 +    }
26690 +    MemSet8(UINT_TO_PTR(*p_AutoLearnHashTblAddr), 0, autoLearnHashTblSize);
26691 +
26692 +    /* Sets the Reassembly Automatic Learning Hash Table and liodn offset */
26693 +    tmpReg64 = ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
26694 +            & FM_PCD_MANIP_REASM_LIODN_MASK)
26695 +            << (uint64_t)FM_PCD_MANIP_REASM_LIODN_SHIFT);
26696 +    tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
26697 +            & FM_PCD_MANIP_REASM_ELIODN_MASK)
26698 +            << (uint64_t)FM_PCD_MANIP_REASM_ELIODN_SHIFT);
26699 +    tmpReg64 |= XX_VirtToPhys(UINT_TO_PTR(*p_AutoLearnHashTblAddr));
26700 +    WRITE_UINT32( (*p_ReassTbl)->liodnAlAndAutoLearnHashTblPtrHi,
26701 +                 (uint32_t)(tmpReg64 >> 32));
26702 +    WRITE_UINT32((*p_ReassTbl)->autoLearnHashTblPtrLow, (uint32_t)tmpReg64);
26703 +
26704 +    /* Allocation of the Set Lock table - This table resides in external memory
26705 +     The size of this table is (number of sets in the Reassembly Automatic Learning Hash table)*4 bytes.
26706 +     This table resides in external memory and its base address should be 4-byte aligned */
26707 +    *p_AutoLearnSetLockTblAddr =
26708 +            PTR_TO_UINT(XX_MallocSmart((uint32_t)(numOfSets * 4), p_Manip->reassmParams.dataMemId, 4));
26709 +    if (!*p_AutoLearnSetLockTblAddr)
26710 +    {
26711 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, *p_ReassTbl);
26712 +        *p_ReassTbl = NULL;
26713 +        XX_FreeSmart(UINT_TO_PTR(*p_AutoLearnHashTblAddr));
26714 +        *p_AutoLearnHashTblAddr = 0;
26715 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation FAILED"));
26716 +    }
26717 +    MemSet8(UINT_TO_PTR(*p_AutoLearnSetLockTblAddr), 0, (numOfSets * 4));
26718 +
26719 +    /* sets Set Lock table pointer and liodn offset*/
26720 +    tmpReg64 = ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
26721 +            & FM_PCD_MANIP_REASM_LIODN_MASK)
26722 +            << (uint64_t)FM_PCD_MANIP_REASM_LIODN_SHIFT);
26723 +    tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
26724 +            & FM_PCD_MANIP_REASM_ELIODN_MASK)
26725 +            << (uint64_t)FM_PCD_MANIP_REASM_ELIODN_SHIFT);
26726 +    tmpReg64 |= XX_VirtToPhys(UINT_TO_PTR(*p_AutoLearnSetLockTblAddr));
26727 +    WRITE_UINT32( (*p_ReassTbl)->liodnSlAndAutoLearnSetLockTblPtrHi,
26728 +                 (uint32_t)(tmpReg64 >> 32));
26729 +    WRITE_UINT32((*p_ReassTbl)->autoLearnSetLockTblPtrLow, (uint32_t)tmpReg64);
26730 +
26731 +    /* Sets user's requested minimum fragment size (in Bytes) for First/Middle fragment */
26732 +    WRITE_UINT16((*p_ReassTbl)->minFragSize, minFragSize);
26733 +
26734 +    WRITE_UINT16((*p_ReassTbl)->maxReassemblySize, maxReassemSize);
26735 +
26736 +    return E_OK;
26737 +}
26738 +
26739 +static t_Error UpdateInitReasm(t_Handle h_FmPcd, t_Handle h_PcdParams,
26740 +                               t_Handle h_FmPort, t_FmPcdManip *p_Manip,
26741 +                               t_Handle h_Ad, bool validate)
26742 +{
26743 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
26744 +    uint32_t tmpReg32;
26745 +    t_Error err;
26746 +    t_FmPortPcdParams *p_PcdParams = (t_FmPortPcdParams *)h_PcdParams;
26747 +#if (DPAA_VERSION >= 11)
26748 +    t_FmPcdCtrlParamsPage *p_ParamsPage;
26749 +#endif /* (DPAA_VERSION >= 11) */
26750 +
26751 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
26752 +    SANITY_CHECK_RETURN_ERROR(!p_Manip->frag, E_INVALID_HANDLE);
26753 +    SANITY_CHECK_RETURN_ERROR(
26754 +            (p_Manip->opcode == HMAN_OC_IP_REASSEMBLY) || (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY),
26755 +            E_INVALID_STATE);
26756 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
26757 +    SANITY_CHECK_RETURN_ERROR(!p_Manip->updateParams || h_PcdParams,
26758 +                              E_INVALID_HANDLE);
26759 +
26760 +    UNUSED(h_Ad);
26761 +
26762 +    if (!p_Manip->updateParams)
26763 +        return E_OK;
26764 +
26765 +    if (p_Manip->h_FmPcd != h_FmPcd)
26766 +        RETURN_ERROR(
26767 +                MAJOR, E_INVALID_STATE,
26768 +                ("handler of PCD previously was initiated by different value"));
26769 +
26770 +    if (p_Manip->updateParams)
26771 +    {
26772 +        if ((!(p_Manip->updateParams
26773 +                & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK)))
26774 +                || ((p_Manip->shadowUpdateParams
26775 +                        & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK))))
26776 +            RETURN_ERROR(
26777 +                    MAJOR, E_INVALID_STATE,
26778 +                    ("in this stage parameters from Port has not be updated"));
26779 +
26780 +        fmPortGetSetCcParams.setCcParams.type = 0;
26781 +        if (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY)
26782 +        {
26783 +            fmPortGetSetCcParams.setCcParams.type |= UPDATE_OFP_DPTE;
26784 +            fmPortGetSetCcParams.setCcParams.ofpDpde = 0xF;
26785 +        }
26786 +        fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams | FM_REV;
26787 +        if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
26788 +                != E_OK)
26789 +            RETURN_ERROR(MAJOR, err, NO_MSG);
26790 +        if (fmPortGetSetCcParams.getCcParams.type
26791 +                & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK | FM_REV))
26792 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
26793 +                         ("offset of the data wasn't configured previously"));
26794 +        if (p_Manip->updateParams
26795 +                & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK))
26796 +        {
26797 +            t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
26798 +            uint8_t *p_Ptr, i, totalNumOfTnums;
26799 +
26800 +            totalNumOfTnums =
26801 +                    (uint8_t)(fmPortGetSetCcParams.getCcParams.numOfTasks
26802 +                            + fmPortGetSetCcParams.getCcParams.numOfExtraTasks);
26803 +
26804 +            p_Manip->reassmParams.internalBufferPoolAddr =
26805 +                    PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
26806 +                                    (uint32_t)(totalNumOfTnums * BMI_FIFO_UNITS),
26807 +                                    BMI_FIFO_UNITS));
26808 +            if (!p_Manip->reassmParams.internalBufferPoolAddr)
26809 +                RETURN_ERROR(
26810 +                        MAJOR, E_NO_MEMORY,
26811 +                        ("MURAM alloc for Reassembly internal buffers pool"));
26812 +            MemSet8(
26813 +                    UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolAddr),
26814 +                    0, (uint32_t)(totalNumOfTnums * BMI_FIFO_UNITS));
26815 +
26816 +            p_Manip->reassmParams.internalBufferPoolManagementIndexAddr =
26817 +                    PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
26818 +                                    (uint32_t)(5 + totalNumOfTnums),
26819 +                                    4));
26820 +            if (!p_Manip->reassmParams.internalBufferPoolManagementIndexAddr)
26821 +                RETURN_ERROR(
26822 +                        MAJOR,
26823 +                        E_NO_MEMORY,
26824 +                        ("MURAM alloc for Reassembly internal buffers management"));
26825 +
26826 +            p_Ptr =
26827 +                    (uint8_t*)UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolManagementIndexAddr);
26828 +            WRITE_UINT32(
26829 +                    *(uint32_t*)p_Ptr,
26830 +                    (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolAddr)) - p_FmPcd->physicalMuramBase));
26831 +            for (i = 0, p_Ptr += 4; i < totalNumOfTnums; i++, p_Ptr++)
26832 +                WRITE_UINT8(*p_Ptr, i);
26833 +            WRITE_UINT8(*p_Ptr, 0xFF);
26834 +
26835 +            tmpReg32 =
26836 +                    (4 << FM_PCD_MANIP_REASM_COMMON_INT_BUFFER_IDX_SHIFT)
26837 +                            | ((uint32_t)(XX_VirtToPhys(
26838 +                                    UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolManagementIndexAddr))
26839 +                                    - p_FmPcd->physicalMuramBase));
26840 +            WRITE_UINT32(
26841 +                    p_Manip->reassmParams.p_ReassCommonTbl->internalBufferManagement,
26842 +                    tmpReg32);
26843 +
26844 +            p_Manip->updateParams &= ~(NUM_OF_TASKS | NUM_OF_EXTRA_TASKS
26845 +                    | DISCARD_MASK);
26846 +            p_Manip->shadowUpdateParams |= (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS
26847 +                    | DISCARD_MASK);
26848 +        }
26849 +    }
26850 +
26851 +    if (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY)
26852 +    {
26853 +        if (p_Manip->reassmParams.capwap.h_Scheme)
26854 +        {
26855 +            p_PcdParams->p_KgParams->h_Schemes[p_PcdParams->p_KgParams->numOfSchemes] =
26856 +                    p_Manip->reassmParams.capwap.h_Scheme;
26857 +            p_PcdParams->p_KgParams->numOfSchemes++;
26858 +        }
26859 +
26860 +    }
26861 +    else
26862 +    {
26863 +        if (p_Manip->reassmParams.ip.h_Ipv4Scheme)
26864 +        {
26865 +            p_PcdParams->p_KgParams->h_Schemes[p_PcdParams->p_KgParams->numOfSchemes] =
26866 +                    p_Manip->reassmParams.ip.h_Ipv4Scheme;
26867 +            p_PcdParams->p_KgParams->numOfSchemes++;
26868 +        }
26869 +        if (p_Manip->reassmParams.ip.h_Ipv6Scheme)
26870 +        {
26871 +            p_PcdParams->p_KgParams->h_Schemes[p_PcdParams->p_KgParams->numOfSchemes] =
26872 +                    p_Manip->reassmParams.ip.h_Ipv6Scheme;
26873 +            p_PcdParams->p_KgParams->numOfSchemes++;
26874 +        }
26875 +#if (DPAA_VERSION >= 11)
26876 +        if (fmPortGetSetCcParams.getCcParams.revInfo.majorRev >= 6)
26877 +        {
26878 +            if ((err = FmPortSetGprFunc(h_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
26879 +                                        (void**)&p_ParamsPage)) != E_OK)
26880 +                RETURN_ERROR(MAJOR, err, NO_MSG);
26881 +
26882 +            tmpReg32 = NIA_ENG_KG;
26883 +            if (p_Manip->reassmParams.ip.h_Ipv4Scheme)
26884 +            {
26885 +                tmpReg32 |= NIA_KG_DIRECT;
26886 +                tmpReg32 |= NIA_KG_CC_EN;
26887 +                tmpReg32 |= FmPcdKgGetSchemeId(
26888 +                        p_Manip->reassmParams.ip.h_Ipv4Scheme);
26889 +                WRITE_UINT32(p_ParamsPage->iprIpv4Nia, tmpReg32);
26890 +            }
26891 +            if (p_Manip->reassmParams.ip.h_Ipv6Scheme)
26892 +            {
26893 +                tmpReg32 &= ~NIA_AC_MASK;
26894 +                tmpReg32 |= NIA_KG_DIRECT;
26895 +                tmpReg32 |= NIA_KG_CC_EN;
26896 +                tmpReg32 |= FmPcdKgGetSchemeId(
26897 +                        p_Manip->reassmParams.ip.h_Ipv6Scheme);
26898 +                WRITE_UINT32(p_ParamsPage->iprIpv6Nia, tmpReg32);
26899 +            }
26900 +        }
26901 +#else
26902 +        if (fmPortGetSetCcParams.getCcParams.revInfo.majorRev < 6)
26903 +        {
26904 +            WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->discardMask,
26905 +                    fmPortGetSetCcParams.getCcParams.discardMask);
26906 +        }
26907 +#endif /* (DPAA_VERSION >= 11) */
26908 +    }
26909 +    return E_OK;
26910 +}
26911 +
26912 +#if (DPAA_VERSION == 10)
26913 +static t_Error FmPcdFragHcScratchPoolFill(t_Handle h_FmPcd, uint8_t scratchBpid)
26914 +{
26915 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
26916 +    t_FmPcdCcFragScratchPoolCmdParams fmPcdCcFragScratchPoolCmdParams;
26917 +    t_Error err;
26918 +
26919 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
26920 +
26921 +    memset(&fmPcdCcFragScratchPoolCmdParams, 0, sizeof(t_FmPcdCcFragScratchPoolCmdParams));
26922 +
26923 +    fmPcdCcFragScratchPoolCmdParams.numOfBuffers = NUM_OF_SCRATCH_POOL_BUFFERS;
26924 +    fmPcdCcFragScratchPoolCmdParams.bufferPoolId = scratchBpid;
26925 +    if ((err = FmHcPcdCcIpFragScratchPollCmd(p_FmPcd->h_Hc, TRUE, &fmPcdCcFragScratchPoolCmdParams)) != E_OK)
26926 +    RETURN_ERROR(MAJOR, err, NO_MSG);
26927 +
26928 +    if (fmPcdCcFragScratchPoolCmdParams.numOfBuffers != 0)
26929 +    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Fill scratch pool failed,"
26930 +                    "Failed to release %d buffers to the BM (missing FBPRs)",
26931 +                    fmPcdCcFragScratchPoolCmdParams.numOfBuffers));
26932 +
26933 +    return E_OK;
26934 +}
26935 +
26936 +static t_Error FmPcdFragHcScratchPoolEmpty(t_Handle h_FmPcd, uint8_t scratchBpid)
26937 +{
26938 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
26939 +    t_FmPcdCcFragScratchPoolCmdParams fmPcdCcFragScratchPoolCmdParams;
26940 +    t_Error err;
26941 +
26942 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
26943 +
26944 +    memset(&fmPcdCcFragScratchPoolCmdParams, 0, sizeof(t_FmPcdCcFragScratchPoolCmdParams));
26945 +
26946 +    fmPcdCcFragScratchPoolCmdParams.bufferPoolId = scratchBpid;
26947 +    if ((err = FmHcPcdCcIpFragScratchPollCmd(p_FmPcd->h_Hc, FALSE, &fmPcdCcFragScratchPoolCmdParams)) != E_OK)
26948 +    RETURN_ERROR(MAJOR, err, NO_MSG);
26949 +
26950 +    return E_OK;
26951 +}
26952 +#endif /* (DPAA_VERSION == 10) */
26953 +
26954 +static void ReleaseManipHandler(t_FmPcdManip *p_Manip, t_FmPcd *p_FmPcd)
26955 +{
26956 +    if (p_Manip->h_Ad)
26957 +    {
26958 +        if (p_Manip->muramAllocate)
26959 +            FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->h_Ad);
26960 +        else
26961 +            XX_Free(p_Manip->h_Ad);
26962 +        p_Manip->h_Ad = NULL;
26963 +    }
26964 +    if (p_Manip->p_Template)
26965 +    {
26966 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->p_Template);
26967 +        p_Manip->p_Template = NULL;
26968 +    }
26969 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
26970 +    if (p_Manip->h_Frag)
26971 +    {
26972 +        if (p_Manip->capwapFragParams.p_AutoLearnHashTbl)
26973 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
26974 +                p_Manip->capwapFragParams.p_AutoLearnHashTbl);
26975 +        if (p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl)
26976 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
26977 +                p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl);
26978 +        if (p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl)
26979 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
26980 +                p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl);
26981 +        if (p_Manip->capwapFragParams.p_TimeOutTbl)
26982 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
26983 +                p_Manip->capwapFragParams.p_TimeOutTbl);
26984 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->h_Frag);
26985 +
26986 +    }
26987 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
26988 +    if (p_Manip->frag)
26989 +    {
26990 +        if (p_Manip->fragParams.p_Frag)
26991 +        {
26992 +#if (DPAA_VERSION == 10)
26993 +            FmPcdFragHcScratchPoolEmpty((t_Handle)p_FmPcd, p_Manip->fragParams.scratchBpid);
26994 +#endif /* (DPAA_VERSION == 10) */
26995 +
26996 +            FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->fragParams.p_Frag);
26997 +        }
26998 +    }
26999 +    else
27000 +        if (p_Manip->reassm)
27001 +        {
27002 +            FmPcdUnregisterReassmPort(p_FmPcd,
27003 +                                      p_Manip->reassmParams.p_ReassCommonTbl);
27004 +
27005 +            if (p_Manip->reassmParams.timeOutTblAddr)
27006 +                FM_MURAM_FreeMem(
27007 +                        p_FmPcd->h_FmMuram,
27008 +                        UINT_TO_PTR(p_Manip->reassmParams.timeOutTblAddr));
27009 +            if (p_Manip->reassmParams.reassFrmDescrPoolTblAddr)
27010 +                XX_FreeSmart(
27011 +                        UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrPoolTblAddr));
27012 +            if (p_Manip->reassmParams.p_ReassCommonTbl)
27013 +                FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
27014 +                                 p_Manip->reassmParams.p_ReassCommonTbl);
27015 +            if (p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr)
27016 +                FM_MURAM_FreeMem(
27017 +                        p_FmPcd->h_FmMuram,
27018 +                        UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr));
27019 +            if (p_Manip->reassmParams.internalBufferPoolManagementIndexAddr)
27020 +                FM_MURAM_FreeMem(
27021 +                        p_FmPcd->h_FmMuram,
27022 +                        UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolManagementIndexAddr));
27023 +            if (p_Manip->reassmParams.internalBufferPoolAddr)
27024 +                FM_MURAM_FreeMem(
27025 +                        p_FmPcd->h_FmMuram,
27026 +                        UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolAddr));
27027 +            if (p_Manip->reassmParams.hdr == HEADER_TYPE_CAPWAP)
27028 +            {
27029 +
27030 +            }
27031 +            else
27032 +            {
27033 +                if (p_Manip->reassmParams.ip.ipv4AutoLearnHashTblAddr)
27034 +                    XX_FreeSmart(
27035 +                            UINT_TO_PTR(p_Manip->reassmParams.ip.ipv4AutoLearnHashTblAddr));
27036 +                if (p_Manip->reassmParams.ip.ipv6AutoLearnHashTblAddr)
27037 +                    XX_FreeSmart(
27038 +                            UINT_TO_PTR(p_Manip->reassmParams.ip.ipv6AutoLearnHashTblAddr));
27039 +                if (p_Manip->reassmParams.ip.ipv4AutoLearnSetLockTblAddr)
27040 +                    XX_FreeSmart(
27041 +                            UINT_TO_PTR(p_Manip->reassmParams.ip.ipv4AutoLearnSetLockTblAddr));
27042 +                if (p_Manip->reassmParams.ip.ipv6AutoLearnSetLockTblAddr)
27043 +                    XX_FreeSmart(
27044 +                            UINT_TO_PTR(p_Manip->reassmParams.ip.ipv6AutoLearnSetLockTblAddr));
27045 +                if (p_Manip->reassmParams.ip.p_Ipv4ReassTbl)
27046 +                    FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
27047 +                                     p_Manip->reassmParams.ip.p_Ipv4ReassTbl);
27048 +                if (p_Manip->reassmParams.ip.p_Ipv6ReassTbl)
27049 +                    FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
27050 +                                     p_Manip->reassmParams.ip.p_Ipv6ReassTbl);
27051 +                if (p_Manip->reassmParams.ip.h_Ipv6Ad)
27052 +                    XX_FreeSmart(p_Manip->reassmParams.ip.h_Ipv6Ad);
27053 +                if (p_Manip->reassmParams.ip.h_Ipv4Ad)
27054 +                    XX_FreeSmart(p_Manip->reassmParams.ip.h_Ipv4Ad);
27055 +            }
27056 +        }
27057 +
27058 +    if (p_Manip->p_StatsTbl)
27059 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->p_StatsTbl);
27060 +}
27061 +
27062 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
27063 +static t_Error CheckManipParamsAndSetType(t_FmPcdManip *p_Manip, t_FmPcdManipParams *p_ManipParams)
27064 +{
27065 +    if (p_ManipParams->u.hdr.rmv)
27066 +    {
27067 +        switch (p_ManipParams->u.hdr.rmvParams.type)
27068 +        {
27069 +            case (e_FM_PCD_MANIP_RMV_BY_HDR):
27070 +            switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.type)
27071 +            {
27072 +                case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START) :
27073 +                if (p_ManipParams->u.hdr.rmvParams.u.byHdr.u.fromStartByHdr.include)
27074 +                {
27075 +                    switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.u.fromStartByHdr.hdrInfo.hdr)
27076 +                    {
27077 +                        case (HEADER_TYPE_CAPWAP_DTLS) :
27078 +                        p_Manip->opcode = HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST;
27079 +                        p_Manip->muramAllocate = TRUE;
27080 +                        if (p_ManipParams->u.hdr.insrt)
27081 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for  CAPWAP_DTLS_HDR remove can not be insrt manipualtion after"));
27082 +                        if (p_ManipParams->fragOrReasm)
27083 +                        {
27084 +                            if (!p_ManipParams->fragOrReasmParams.frag)
27085 +                            {
27086 +                                switch (p_ManipParams->fragOrReasmParams.hdr)
27087 +                                {
27088 +                                    case (HEADER_TYPE_CAPWAP):
27089 +                                    p_Manip->opcode = HMAN_OC_CAPWAP_REASSEMBLY;
27090 +                                    break;
27091 +                                    default:
27092 +                                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("unsupported header for Reassembly"));
27093 +                                }
27094 +                            }
27095 +                            else
27096 +                            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for this type of manipulation frag can not be TRUE"));
27097 +                        }
27098 +                        break;
27099 +                        default:
27100 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("non valid net header of remove location"));
27101 +                    }
27102 +                }
27103 +                else
27104 +                {
27105 +                    switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.u.fromStartByHdr.hdrInfo.hdr)
27106 +                    {
27107 +                        case (HEADER_TYPE_CAPWAP_DTLS) :
27108 +                        case (HEADER_TYPE_CAPWAP) :
27109 +                        if (p_ManipParams->fragOrReasm || p_ManipParams->u.hdr.insrt)
27110 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for the type of remove e_FM_PCD_MANIP_RMV_FROM_START_OF_FRAME_TILL_CAPWAP can not be insert or fragOrReasm TRUE"));
27111 +                        p_Manip->opcode = HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR;
27112 +                        p_Manip->muramAllocate = TRUE;
27113 +                        p_ManipParams->u.hdr.insrt = TRUE; //internal frame header
27114 +                        break;
27115 +                        default :
27116 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid type of remove manipulation"));
27117 +                    }
27118 +                }
27119 +                break;
27120 +                default :
27121 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid type of remove manipulation"));
27122 +            }
27123 +            break;
27124 +            default:
27125 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid type of remove manipulation"));
27126 +        }
27127 +    }
27128 +    else if (p_ManipParams->u.hdr.insrt)
27129 +    {
27130 +        switch (p_ManipParams->u.hdr.insrtParams.type)
27131 +        {
27132 +            case (e_FM_PCD_MANIP_INSRT_BY_TEMPLATE) :
27133 +
27134 +            p_Manip->opcode = HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER;
27135 +            p_Manip->muramAllocate = FALSE;
27136 +            if (p_ManipParams->fragOrReasm)
27137 +            {
27138 +                if (p_ManipParams->fragOrReasmParams.frag)
27139 +                {
27140 +                    switch (p_ManipParams->fragOrReasmParams.hdr)
27141 +                    {
27142 +                        case (HEADER_TYPE_CAPWAP):
27143 +                        p_Manip->opcode = HMAN_OC_CAPWAP_FRAGMENTATION;
27144 +                        break;
27145 +                        default:
27146 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid header for fragmentation"));
27147 +                    }
27148 +                }
27149 +                else
27150 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,("can not reach this point"));
27151 +            }
27152 +            break;
27153 +
27154 +            default:
27155 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for only isert manipulation unsupported type"));
27156 +        }
27157 +    }
27158 +    else if (p_ManipParams->fragOrReasm)
27159 +    {
27160 +        if (p_ManipParams->fragOrReasmParams.frag)
27161 +        {
27162 +            switch (p_ManipParams->fragOrReasmParams.hdr)
27163 +            {
27164 +                case (HEADER_TYPE_CAPWAP):
27165 +                p_Manip->opcode = HMAN_OC_CAPWAP_FRAGMENTATION;
27166 +                p_Manip->muramAllocate = FALSE;
27167 +                break;
27168 +                default:
27169 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported header for fragmentation"));
27170 +            }
27171 +        }
27172 +        else
27173 +        {
27174 +            switch (p_ManipParams->fragOrReasmParams.hdr)
27175 +            {
27176 +                case (HEADER_TYPE_CAPWAP):
27177 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Reassembly has to be with additional operation - rmv = TRUE, type of remove - e_FM_PCD_MANIP_RMV_FROM_START_OF_FRAME_INCLUDE_SPECIFIC_LOCATION,type = e_FM_PCD_MANIP_LOC_BY_HDR, hdr = HEADER_TYPE_CAPWAP_DTLS"));
27178 +                default:
27179 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported header for reassembly"));
27180 +            }
27181 +        }
27182 +
27183 +    }
27184 +    else
27185 +    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("User didn't ask for any manipulation"));
27186 +
27187 +    p_Manip->insrt = p_ManipParams->u.hdr.insrt;
27188 +    p_Manip->rmv = p_ManipParams->u.hdr.rmv;
27189 +
27190 +    return E_OK;
27191 +}
27192 +
27193 +#else /* not (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
27194 +static t_Error CheckManipParamsAndSetType(t_FmPcdManip *p_Manip,
27195 +                                          t_FmPcdManipParams *p_ManipParams)
27196 +{
27197 +    switch (p_ManipParams->type)
27198 +    {
27199 +        case e_FM_PCD_MANIP_HDR:
27200 +            /* Check that next-manip is not already used */
27201 +            if (p_ManipParams->h_NextManip)
27202 +            {
27203 +                if (!MANIP_IS_FIRST(p_ManipParams->h_NextManip))
27204 +                    RETURN_ERROR(
27205 +                            MAJOR, E_INVALID_STATE,
27206 +                            ("h_NextManip is already a part of another chain"));
27207 +                if ((MANIP_GET_TYPE(p_ManipParams->h_NextManip)
27208 +                        != e_FM_PCD_MANIP_HDR) &&
27209 +                        (MANIP_GET_TYPE(p_ManipParams->h_NextManip)
27210 +                        != e_FM_PCD_MANIP_FRAG))
27211 +                    RETURN_ERROR(
27212 +                            MAJOR,
27213 +                            E_NOT_SUPPORTED,
27214 +                            ("For a Header Manipulation node - no support of h_NextManip of type other than Header Manipulation or Fragmentation."));
27215 +            }
27216 +
27217 +            if (p_ManipParams->u.hdr.rmv)
27218 +            {
27219 +                switch (p_ManipParams->u.hdr.rmvParams.type)
27220 +                {
27221 +                    case (e_FM_PCD_MANIP_RMV_BY_HDR):
27222 +                        switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.type)
27223 +                        {
27224 +                            case (e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2):
27225 +                                break;
27226 +#if (DPAA_VERSION >= 11)
27227 +                            case (e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP):
27228 +                                break;
27229 +                            case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START):
27230 +                            {
27231 +                                t_Error err;
27232 +                                uint8_t prsArrayOffset;
27233 +
27234 +                                err =
27235 +                                        GetPrOffsetByHeaderOrField(
27236 +                                                &p_ManipParams->u.hdr.rmvParams.u.byHdr.u.hdrInfo,
27237 +                                                &prsArrayOffset);
27238 +                                if (err)
27239 +                                    RETURN_ERROR(MAJOR, err, NO_MSG);
27240 +                                break;
27241 +                            }
27242 +#endif /* (DPAA_VERSION >= 11) */
27243 +                            default:
27244 +                                RETURN_ERROR(
27245 +                                        MAJOR,
27246 +                                        E_INVALID_STATE,
27247 +                                        ("invalid type of remove manipulation"));
27248 +                        }
27249 +                        break;
27250 +                    case (e_FM_PCD_MANIP_RMV_GENERIC):
27251 +                        break;
27252 +                    default:
27253 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE,
27254 +                                     ("invalid type of remove manipulation"));
27255 +                }
27256 +                p_Manip->opcode = HMAN_OC;
27257 +                p_Manip->muramAllocate = TRUE;
27258 +                p_Manip->rmv = TRUE;
27259 +            }
27260 +            else
27261 +                if (p_ManipParams->u.hdr.insrt)
27262 +                {
27263 +                    switch (p_ManipParams->u.hdr.insrtParams.type)
27264 +                    {
27265 +                        case (e_FM_PCD_MANIP_INSRT_BY_HDR):
27266 +                        {
27267 +                            switch (p_ManipParams->u.hdr.insrtParams.u.byHdr.type)
27268 +                            {
27269 +                                case (e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2):
27270 +                                    /* nothing to check */
27271 +                                    break;
27272 +#if (DPAA_VERSION >= 11)
27273 +                                case (e_FM_PCD_MANIP_INSRT_BY_HDR_IP):
27274 +                                    if (p_ManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size
27275 +                                            % 4)
27276 +                                        RETURN_ERROR(
27277 +                                                MAJOR,
27278 +                                                E_INVALID_VALUE,
27279 +                                                ("IP inserted header must be of size which is a multiple of four bytes"));
27280 +                                    break;
27281 +                                case (e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP):
27282 +                                    if (p_ManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
27283 +                                            % 4)
27284 +                                        RETURN_ERROR(
27285 +                                                MAJOR,
27286 +                                                E_INVALID_VALUE,
27287 +                                                ("CAPWAP inserted header must be of size which is a multiple of four bytes"));
27288 +                                    break;
27289 +                                case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
27290 +                                case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE):
27291 +                                    if (p_ManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
27292 +                                            != 8)
27293 +                                        RETURN_ERROR(
27294 +                                                MAJOR,
27295 +                                                E_INVALID_VALUE,
27296 +                                                ("Inserted header must be of size 8"));
27297 +                                    break;
27298 +#endif /* (DPAA_VERSION >= 11) */
27299 +                                default:
27300 +                                    RETURN_ERROR(
27301 +                                            MAJOR,
27302 +                                            E_INVALID_STATE,
27303 +                                            ("unsupported insert by header type"));
27304 +                            }
27305 +                        }
27306 +                        case (e_FM_PCD_MANIP_INSRT_GENERIC):
27307 +                            break;
27308 +                        default:
27309 +                            RETURN_ERROR(
27310 +                                    MAJOR,
27311 +                                    E_INVALID_STATE,
27312 +                                    ("for only insert manipulation unsupported type"));
27313 +                    }
27314 +                    p_Manip->opcode = HMAN_OC;
27315 +                    p_Manip->muramAllocate = TRUE;
27316 +                    p_Manip->insrt = TRUE;
27317 +                }
27318 +                else
27319 +                    if (p_ManipParams->u.hdr.fieldUpdate)
27320 +                    {
27321 +                        /* Check parameters */
27322 +                        if (p_ManipParams->u.hdr.fieldUpdateParams.type
27323 +                                == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN)
27324 +                        {
27325 +                            if ((p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
27326 +                                    == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI)
27327 +                                    && (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.u.vpri
27328 +                                            > 7))
27329 +                                RETURN_ERROR(
27330 +                                        MAJOR, E_INVALID_VALUE,
27331 +                                        ("vpri should get values of 0-7 "));
27332 +                            if (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
27333 +                                    == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN)
27334 +                            {
27335 +                                int i;
27336 +
27337 +                                if (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.vpriDefVal
27338 +                                        > 7)
27339 +                                    RETURN_ERROR(
27340 +                                            MAJOR,
27341 +                                            E_INVALID_VALUE,
27342 +                                            ("vpriDefVal should get values of 0-7 "));
27343 +                                for (i = 0; i < FM_PCD_MANIP_DSCP_TO_VLAN_TRANS;
27344 +                                        i++)
27345 +                                    if (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.dscpToVpriTable[i]
27346 +                                            & 0xf0)
27347 +                                        RETURN_ERROR(
27348 +                                                MAJOR,
27349 +                                                E_INVALID_VALUE,
27350 +                                                ("dscpToVpriTabl value out of range (0-15)"));
27351 +                            }
27352 +
27353 +                        }
27354 +
27355 +                        p_Manip->opcode = HMAN_OC;
27356 +                        p_Manip->muramAllocate = TRUE;
27357 +                        p_Manip->fieldUpdate = TRUE;
27358 +                    }
27359 +                    else
27360 +                        if (p_ManipParams->u.hdr.custom)
27361 +                        {
27362 +                            if (p_ManipParams->u.hdr.customParams.type == e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE)
27363 +                            {
27364 +
27365 +                            if ((p_ManipParams->u.hdr.customParams.u.genFieldReplace.size == 0) ||
27366 +                                    (p_ManipParams->u.hdr.customParams.u.genFieldReplace.size > 8))
27367 +                                RETURN_ERROR(
27368 +                                        MAJOR, E_INVALID_VALUE,
27369 +                                        ("size should get values of 1-8 "));
27370 +
27371 +                            if (p_ManipParams->u.hdr.customParams.u.genFieldReplace.srcOffset > 7)
27372 +                                RETURN_ERROR(
27373 +                                        MAJOR, E_INVALID_VALUE,
27374 +                                        ("srcOffset should be <= 7"));
27375 +
27376 +                            if ((p_ManipParams->u.hdr.customParams.u.genFieldReplace.srcOffset +
27377 +                                    p_ManipParams->u.hdr.customParams.u.genFieldReplace.size) > 8)
27378 +                                RETURN_ERROR(
27379 +                                        MAJOR, E_INVALID_VALUE,
27380 +                                        ("(srcOffset + size) should be <= 8"));
27381 +
27382 +                            if ((p_ManipParams->u.hdr.customParams.u.genFieldReplace.dstOffset +
27383 +                                    p_ManipParams->u.hdr.customParams.u.genFieldReplace.size) > 256)
27384 +                                RETURN_ERROR(
27385 +                                        MAJOR, E_INVALID_VALUE,
27386 +                                        ("(dstOffset + size) should be <= 256"));
27387 +
27388 +                            }
27389 +
27390 +                            p_Manip->opcode = HMAN_OC;
27391 +                            p_Manip->muramAllocate = TRUE;
27392 +                            p_Manip->custom = TRUE;
27393 +                        }
27394 +            break;
27395 +        case e_FM_PCD_MANIP_REASSEM:
27396 +            if (p_ManipParams->h_NextManip)
27397 +                RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
27398 +                             ("next manip with reassembly"));
27399 +            switch (p_ManipParams->u.reassem.hdr)
27400 +            {
27401 +                case (HEADER_TYPE_IPv4):
27402 +                    p_Manip->reassmParams.hdr = HEADER_TYPE_IPv4;
27403 +                    p_Manip->opcode = HMAN_OC_IP_REASSEMBLY;
27404 +                    break;
27405 +                case (HEADER_TYPE_IPv6):
27406 +                    p_Manip->reassmParams.hdr = HEADER_TYPE_IPv6;
27407 +                    p_Manip->opcode = HMAN_OC_IP_REASSEMBLY;
27408 +                    break;
27409 +#if (DPAA_VERSION >= 11)
27410 +                case (HEADER_TYPE_CAPWAP):
27411 +                    p_Manip->reassmParams.hdr = HEADER_TYPE_CAPWAP;
27412 +                    p_Manip->opcode = HMAN_OC_CAPWAP_REASSEMBLY;
27413 +                    break;
27414 +#endif /* (DPAA_VERSION >= 11) */
27415 +                default:
27416 +                    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
27417 +                                 ("header for reassembly"));
27418 +            }
27419 +            break;
27420 +        case e_FM_PCD_MANIP_FRAG:
27421 +            if (p_ManipParams->h_NextManip)
27422 +                RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
27423 +                             ("next manip with fragmentation"));
27424 +            switch (p_ManipParams->u.frag.hdr)
27425 +            {
27426 +                case (HEADER_TYPE_IPv4):
27427 +                case (HEADER_TYPE_IPv6):
27428 +                    p_Manip->opcode = HMAN_OC_IP_FRAGMENTATION;
27429 +                    break;
27430 +#if (DPAA_VERSION >= 11)
27431 +                case (HEADER_TYPE_CAPWAP):
27432 +                    p_Manip->opcode = HMAN_OC_CAPWAP_FRAGMENTATION;
27433 +                    break;
27434 +#endif /* (DPAA_VERSION >= 11) */
27435 +                default:
27436 +                    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
27437 +                                 ("header for fragmentation"));
27438 +            }
27439 +            p_Manip->muramAllocate = TRUE;
27440 +            break;
27441 +        case e_FM_PCD_MANIP_SPECIAL_OFFLOAD:
27442 +            switch (p_ManipParams->u.specialOffload.type)
27443 +            {
27444 +                case (e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC):
27445 +                    p_Manip->opcode = HMAN_OC_IPSEC_MANIP;
27446 +                    p_Manip->muramAllocate = TRUE;
27447 +                    break;
27448 +#if (DPAA_VERSION >= 11)
27449 +                case (e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP):
27450 +                    p_Manip->opcode = HMAN_OC_CAPWAP_MANIP;
27451 +                    p_Manip->muramAllocate = TRUE;
27452 +                    break;
27453 +#endif /* (DPAA_VERSION >= 11) */
27454 +                default:
27455 +                    RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
27456 +                                 ("special offload type"));
27457 +            }
27458 +            break;
27459 +        default:
27460 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("manip type"));
27461 +    }
27462 +
27463 +    return E_OK;
27464 +}
27465 +#endif /* not (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
27466 +
27467 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
27468 +
27469 +static t_Error UpdateIndxStats(t_Handle h_FmPcd,
27470 +        t_Handle h_FmPort,
27471 +        t_FmPcdManip *p_Manip)
27472 +{
27473 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
27474 +    uint32_t tmpReg32 = 0;
27475 +    t_AdOfTypeContLookup *p_Ad;
27476 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
27477 +    t_Error err;
27478 +
27479 +    SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
27480 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
27481 +
27482 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
27483 +    if (p_Manip->h_FmPcd != h_FmPcd)
27484 +    RETURN_ERROR(MAJOR, E_INVALID_STATE,
27485 +            ("handler of PCD previously was initiated by different value"));
27486 +
27487 +    memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
27488 +
27489 +    if (!p_Manip->p_StatsTbl)
27490 +    {
27491 +
27492 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNDN;
27493 +        fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_CC;
27494 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
27495 +        if (err)
27496 +        RETURN_ERROR(MAJOR, err, NO_MSG);
27497 +
27498 +        tmpReg32 = GET_UINT32(p_Ad->ccAdBase);
27499 +
27500 +        p_Manip->p_StatsTbl =
27501 +        (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
27502 +                (uint32_t)p_Manip->owner * FM_PCD_MANIP_INDEXED_STATS_ENTRY_SIZE,
27503 +                4);
27504 +        if (!p_Manip->p_StatsTbl)
27505 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for Manipulation indexed statistics table"));
27506 +
27507 +        MemSet8(p_Manip->p_StatsTbl, 0, (uint32_t)(p_Manip->owner * 4));
27508 +
27509 +        tmpReg32 |= (uint32_t)(XX_VirtToPhys(p_Manip->p_StatsTbl) - p_FmPcd->physicalMuramBase);
27510 +
27511 +        if (p_Manip->cnia)
27512 +        tmpReg32 |= FM_PCD_MANIP_INDEXED_STATS_CNIA;
27513 +
27514 +        tmpReg32 |= FM_PCD_MANIP_INDEXED_STATS_DPD;
27515 +        WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
27516 +    }
27517 +    else
27518 +    {
27519 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNDN;
27520 +        fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_CC;
27521 +        err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
27522 +        if (err)
27523 +        RETURN_ERROR(MAJOR, err, NO_MSG);
27524 +    }
27525 +
27526 +    return E_OK;
27527 +}
27528 +
27529 +static t_Error RmvHdrTillSpecLocNOrInsrtIntFrmHdr(t_FmPcdManipHdrRmvParams *p_ManipParams, t_FmPcdManip *p_Manip)
27530 +{
27531 +    t_AdOfTypeContLookup *p_Ad;
27532 +    uint32_t tmpReg32 = 0;
27533 +    uint8_t prsArrayOffset = 0;
27534 +    t_Error err;
27535 +
27536 +    SANITY_CHECK_RETURN_ERROR(p_Manip,E_NULL_POINTER);
27537 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams,E_NULL_POINTER);
27538 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
27539 +
27540 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
27541 +    if (p_Manip->rmv)
27542 +    {
27543 +        err = GetPrOffsetByHeaderOrField(&p_ManipParams->u.byHdr.u.fromStartByHdr.hdrInfo, &prsArrayOffset);
27544 +        if (err)
27545 +        RETURN_ERROR(MAJOR, err, NO_MSG);
27546 +
27547 +        tmpReg32 |= (uint32_t)prsArrayOffset << 24;
27548 +        tmpReg32 |= HMAN_RMV_HDR;
27549 +    }
27550 +
27551 +    if (p_Manip->insrt)
27552 +    tmpReg32 |= HMAN_INSRT_INT_FRM_HDR;
27553 +
27554 +    tmpReg32 |= (uint32_t)HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR;
27555 +
27556 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
27557 +
27558 +    tmpReg32 = 0;
27559 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
27560 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
27561 +
27562 +    return E_OK;
27563 +}
27564 +
27565 +static t_Error MvIntFrameHeaderFromFrameToBufferPrefix(t_FmPcdManip *p_Manip,
27566 +        bool caamUsed)
27567 +{
27568 +    t_AdOfTypeContLookup *p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
27569 +    uint32_t tmpReg32 = 0;
27570 +
27571 +    SANITY_CHECK_RETURN_ERROR(p_Ad, E_INVALID_HANDLE);
27572 +
27573 +    p_Manip->updateParams |= OFFSET_OF_PR | INTERNAL_CONTEXT_OFFSET;
27574 +
27575 +    tmpReg32 = 0;
27576 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
27577 +    *(uint32_t *)&p_Ad->ccAdBase = tmpReg32;
27578 +
27579 +    tmpReg32 = 0;
27580 +    tmpReg32 |= HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX;
27581 +    tmpReg32 |= (uint32_t)0x16 << 16;
27582 +    *(uint32_t *)&p_Ad->pcAndOffsets = tmpReg32;
27583 +
27584 +    if (caamUsed)
27585 +    *(uint32_t *)&p_Ad->gmask = 0xf0000000;
27586 +
27587 +    return E_OK;
27588 +}
27589 +
27590 +static t_Error CapwapRmvDtlsHdr(t_FmPcd *p_FmPcd, t_FmPcdManip *p_Manip)
27591 +{
27592 +    t_AdOfTypeContLookup *p_Ad;
27593 +    uint32_t tmpReg32 = 0;
27594 +    t_Error err = E_OK;
27595 +
27596 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
27597 +
27598 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
27599 +
27600 +    tmpReg32 = 0;
27601 +    tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST;
27602 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
27603 +
27604 +    tmpReg32 = 0;
27605 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
27606 +
27607 +
27608 +    if (p_Manip->h_Frag)
27609 +    {
27610 +        p_Manip->updateParams |= INTERNAL_CONTEXT_OFFSET;
27611 +        tmpReg32 |= (uint32_t)(XX_VirtToPhys(p_Manip->h_Frag) - (p_FmPcd->physicalMuramBase));
27612 +    }
27613 +
27614 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
27615 +
27616 +    return err;
27617 +}
27618 +
27619 +static t_Error CapwapReassembly(t_CapwapReassemblyParams *p_ManipParams,
27620 +        t_FmPcdManip *p_Manip,
27621 +        t_FmPcd *p_FmPcd,
27622 +        uint8_t poolId)
27623 +{
27624 +    t_Handle p_Table;
27625 +    uint32_t tmpReg32 = 0;
27626 +    int i = 0;
27627 +    uint8_t log2Num;
27628 +    uint8_t numOfSets;
27629 +    uint32_t j = 0;
27630 +    uint32_t bitFor1Micro;
27631 +
27632 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
27633 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
27634 +
27635 +    if (!p_FmPcd->h_Hc)
27636 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,("hc port has to be initialized in this mode"));
27637 +    if (!POWER_OF_2(p_ManipParams->timeoutRoutineRequestTime))
27638 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("timeoutRoutineRequestTime has to be power of 2"));
27639 +    if (!POWER_OF_2(p_ManipParams->maxNumFramesInProcess))
27640 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,("maxNumFramesInProcess has to be power of 2"));
27641 +    if (!p_ManipParams->timeoutRoutineRequestTime && p_ManipParams->timeoutThresholdForReassmProcess)
27642 +        DBG(WARNING, ("if timeoutRoutineRequestTime 0,  timeoutThresholdForReassmProcess is uselessly"));
27643 +    if (p_ManipParams->numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH)
27644 +    {
27645 +        if ((p_ManipParams->maxNumFramesInProcess < 4) ||
27646 +                (p_ManipParams->maxNumFramesInProcess > 512))
27647 +        RETURN_ERROR(MAJOR,E_INVALID_VALUE, ("In the case of numOfFramesPerHashEntry = e_FM_PCD_MANIP_EIGHT_WAYS_HASH maxNumFramesInProcess has to be in the range 4-512"));
27648 +    }
27649 +    else
27650 +    {
27651 +        if ((p_ManipParams->maxNumFramesInProcess < 8) ||
27652 +                (p_ManipParams->maxNumFramesInProcess > 2048))
27653 +        RETURN_ERROR(MAJOR,E_INVALID_VALUE, ("In the case of numOfFramesPerHashEntry = e_FM_PCD_MANIP_FOUR_WAYS_HASH maxNumFramesInProcess has to be in the range 8-2048"));
27654 +    }
27655 +
27656 +    bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
27657 +    if (bitFor1Micro == 0)
27658 +        RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
27659 +
27660 +    p_Manip->updateParams |= (NUM_OF_TASKS | OFFSET_OF_PR | OFFSET_OF_DATA | HW_PORT_ID);
27661 +
27662 +    p_Manip->h_Frag = (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
27663 +            FM_PCD_MANIP_CAPWAP_REASM_TABLE_SIZE,
27664 +            FM_PCD_MANIP_CAPWAP_REASM_TABLE_ALIGN);
27665 +    if (!p_Manip->h_Frag)
27666 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc CAPWAP reassembly parameters table"));
27667 +
27668 +    MemSet8(p_Manip->h_Frag, 0, FM_PCD_MANIP_CAPWAP_REASM_TABLE_SIZE);
27669 +
27670 +    p_Table = (t_CapwapReasmPram *)p_Manip->h_Frag;
27671 +
27672 +    p_Manip->capwapFragParams.p_AutoLearnHashTbl =
27673 +    (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
27674 +            (uint32_t)(p_ManipParams->maxNumFramesInProcess * 2 * FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE),
27675 +            FM_PCD_MANIP_CAPWAP_REASM_TABLE_ALIGN);
27676 +
27677 +    if (!p_Manip->capwapFragParams.p_AutoLearnHashTbl)
27678 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,("MURAM alloc for CAPWAP automatic learning hash table"));
27679 +
27680 +    MemSet8(p_Manip->capwapFragParams.p_AutoLearnHashTbl, 0, (uint32_t)(p_ManipParams->maxNumFramesInProcess * 2 * FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE));
27681 +
27682 +    tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_AutoLearnHashTbl) - p_FmPcd->physicalMuramBase);
27683 +
27684 +    WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->autoLearnHashTblPtr, tmpReg32);
27685 +
27686 +    tmpReg32 = 0;
27687 +    if (p_ManipParams->timeOutMode == e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES)
27688 +        tmpReg32 |= FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_BETWEEN_FRAMES;
27689 +    if (p_ManipParams->haltOnDuplicationFrag)
27690 +        tmpReg32 |= FM_PCD_MANIP_CAPWAP_REASM_HALT_ON_DUPLICATE_FRAG;
27691 +    if (p_ManipParams->numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH)
27692 +    {
27693 +        i = 8;
27694 +        tmpReg32 |= FM_PCD_MANIP_CAPWAP_REASM_AUTOMATIC_LEARNIN_HASH_8_WAYS;
27695 +    }
27696 +    else
27697 +    i = 4;
27698 +
27699 +    numOfSets = (uint8_t)((p_ManipParams->maxNumFramesInProcess * 2) / i);
27700 +    LOG2(numOfSets, log2Num);
27701 +    tmpReg32 |= (uint32_t)(log2Num - 1) << 24;
27702 +
27703 +    WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->mode, tmpReg32);
27704 +
27705 +    for (j=0; j<p_ManipParams->maxNumFramesInProcess*2; j++)
27706 +        if (((j / i) % 2)== 0)
27707 +            WRITE_UINT32(*(uint32_t *)PTR_MOVE(p_Manip->capwapFragParams.p_AutoLearnHashTbl, j * FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE), 0x80000000);
27708 +
27709 +    tmpReg32 = 0x00008000;
27710 +    tmpReg32 |= (uint32_t)poolId << 16;
27711 +    WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->bufferPoolIdAndRisc1SetIndexes, tmpReg32);
27712 +    WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->risc23SetIndexes, 0x80008000);
27713 +    WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->risc4SetIndexesAndExtendedStatsTblPtr, 0x80000000);
27714 +
27715 +    p_Manip->capwapFragParams.maxNumFramesInProcess = p_ManipParams->maxNumFramesInProcess;
27716 +
27717 +    p_Manip->capwapFragParams.sgBpid = poolId;
27718 +
27719 +    p_Manip->capwapFragParams.fqidForTimeOutFrames = p_ManipParams->fqidForTimeOutFrames;
27720 +    p_Manip->capwapFragParams.timeoutRoutineRequestTime = p_ManipParams->timeoutRoutineRequestTime;
27721 +    p_Manip->capwapFragParams.bitFor1Micro = bitFor1Micro;
27722 +
27723 +    tmpReg32 = 0;
27724 +    tmpReg32 |= (((uint32_t)1<<p_Manip->capwapFragParams.bitFor1Micro) * p_ManipParams->timeoutThresholdForReassmProcess);
27725 +    WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->expirationDelay, tmpReg32);
27726 +
27727 +    return E_OK;
27728 +}
27729 +
27730 +static t_Error CapwapFragmentation(t_CapwapFragmentationParams *p_ManipParams,
27731 +        t_FmPcdManip *p_Manip,
27732 +        t_FmPcd *p_FmPcd,
27733 +        uint8_t poolId)
27734 +{
27735 +    t_AdOfTypeContLookup *p_Ad;
27736 +    uint32_t tmpReg32 = 0;
27737 +
27738 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
27739 +
27740 +    p_Manip->updateParams |= OFFSET_OF_DATA;
27741 +
27742 +    p_Manip->frag = TRUE;
27743 +
27744 +    p_Manip->h_Frag = (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
27745 +            FM_PCD_CC_AD_ENTRY_SIZE,
27746 +            FM_PCD_CC_AD_TABLE_ALIGN);
27747 +    if (!p_Manip->h_Frag)
27748 +    RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP fragmentation table descriptor"));
27749 +
27750 +    MemSet8(p_Manip->h_Frag, 0, FM_PCD_CC_AD_ENTRY_SIZE);
27751 +
27752 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Frag;
27753 +
27754 +    tmpReg32 = 0;
27755 +    tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_FRAGMENTATION;
27756 +
27757 +    if (p_ManipParams->headerOptionsCompr)
27758 +    tmpReg32 |= FM_PCD_MANIP_CAPWAP_FRAG_COMPR_OPTION_FIELD_EN;
27759 +    tmpReg32 |= ((uint32_t)poolId << 8);
27760 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
27761 +
27762 +    tmpReg32 = 0;
27763 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
27764 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
27765 +
27766 +    p_Manip->sizeForFragmentation = p_ManipParams->sizeForFragmentation;
27767 +    p_Manip->capwapFragParams.sgBpid = poolId;
27768 +
27769 +    return E_OK;
27770 +}
27771 +
27772 +static t_Error IndxStats(t_FmPcdStatsParams *p_StatsParams,t_FmPcdManip *p_Manip,t_FmPcd *p_FmPcd)
27773 +{
27774 +    t_AdOfTypeContLookup *p_Ad;
27775 +    uint32_t tmpReg32 = 0;
27776 +
27777 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
27778 +
27779 +    UNUSED(p_FmPcd);
27780 +
27781 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
27782 +
27783 +    tmpReg32 = 0;
27784 +    tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_INDEXED_STATS;
27785 +    if (p_StatsParams->type == e_FM_PCD_STATS_PER_FLOWID)
27786 +    tmpReg32 |= (uint32_t)0x16 << 16;
27787 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
27788 +
27789 +    tmpReg32 = 0;
27790 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
27791 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
27792 +
27793 +    return E_OK;
27794 +}
27795 +
27796 +static t_Error InsrtHdrByTempl(t_FmPcdManipHdrInsrtParams *p_ManipParams, t_FmPcdManip *p_Manip, t_FmPcd *p_FmPcd)
27797 +{
27798 +    t_FmPcdManipHdrInsrtByTemplateParams *p_InsrtByTemplate = &p_ManipParams->u.byTemplate;
27799 +    uint8_t tmpReg8 = 0xff;
27800 +    t_AdOfTypeContLookup *p_Ad;
27801 +    bool ipModify = FALSE;
27802 +    uint32_t tmpReg32 = 0, tmpRegNia = 0;
27803 +    uint16_t tmpReg16 = 0;
27804 +    t_Error err = E_OK;
27805 +    uint8_t extraAddedBytes = 0, blockSize = 0, extraAddedBytesAlignedToBlockSize = 0, log2Num = 0;
27806 +    uint8_t *p_Template = NULL;
27807 +
27808 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams,E_NULL_POINTER);
27809 +    SANITY_CHECK_RETURN_ERROR(p_Manip,E_NULL_POINTER);
27810 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
27811 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd,E_NULL_POINTER);
27812 +
27813 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
27814 +    if (p_Manip->insrt)
27815 +    {
27816 +        if ((!p_InsrtByTemplate->size && p_InsrtByTemplate->modifyOuterIp) ||
27817 +                (!p_InsrtByTemplate->size && p_InsrtByTemplate->modifyOuterVlan))
27818 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : asking for header template modifications with no template for insertion (template size)"));
27819 +
27820 +        if (p_InsrtByTemplate->size && p_InsrtByTemplate->modifyOuterIp && (p_InsrtByTemplate->size <= p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset))
27821 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : size of template < ipOuterOffset"));
27822 +
27823 +        if (p_InsrtByTemplate->size > 128)
27824 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Size of header template for insertion can not be more than 128"));
27825 +
27826 +        if (p_InsrtByTemplate->size)
27827 +        {
27828 +            p_Manip->p_Template = (uint8_t *)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
27829 +                    p_InsrtByTemplate->size,
27830 +                    FM_PCD_CC_AD_TABLE_ALIGN);
27831 +            if(!p_Manip->p_Template)
27832 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation in MURAM FAILED"));
27833 +
27834 +            tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->p_Template) - (p_FmPcd->physicalMuramBase));
27835 +            tmpReg32 |= (uint32_t)p_InsrtByTemplate->size << 24;
27836 +            *(uint32_t *)&p_Ad->matchTblPtr = tmpReg32;
27837 +        }
27838 +
27839 +        tmpReg32 = 0;
27840 +
27841 +        p_Template = (uint8_t *)XX_Malloc(p_InsrtByTemplate->size * sizeof(uint8_t));
27842 +
27843 +        if (!p_Template)
27844 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("XX_Malloc allocation FAILED"));
27845 +
27846 +        memcpy(p_Template, p_InsrtByTemplate->hdrTemplate, p_InsrtByTemplate->size * sizeof(uint8_t));
27847 +
27848 +        if (p_InsrtByTemplate->modifyOuterIp)
27849 +        {
27850 +            ipModify = TRUE;
27851 +
27852 +            tmpReg8 = (uint8_t)p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset];
27853 +
27854 +            if((tmpReg8 & 0xf0) == 0x40)
27855 +            tmpReg8 = 4;
27856 +            else if((tmpReg8 & 0xf0) == 0x60)
27857 +            tmpReg8 = 6;
27858 +            else
27859 +            tmpReg8 = 0xff;
27860 +
27861 +            if (tmpReg8 != 0xff)
27862 +            {
27863 +                if(p_InsrtByTemplate->modifyOuterIpParams.dscpEcn & 0xff00)
27864 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : IPV4 present in header template, dscpEcn has to be only 1 byte"));
27865 +                if(p_InsrtByTemplate->modifyOuterIpParams.recalculateLength)
27866 +                {
27867 +
27868 +                    if((p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedAlignedToBlockSize + p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedNotAlignedToBlockSize) > 255)
27869 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("extra Byte added can not be more than 256 bytes"));
27870 +                    extraAddedBytes = (uint8_t) (p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedAlignedToBlockSize + p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedNotAlignedToBlockSize);
27871 +                    blockSize = p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.blockSize;
27872 +                    extraAddedBytesAlignedToBlockSize = p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedAlignedToBlockSize;
27873 +                    /*IP header template - IP totalLength -
27874 +                     (1 byte) extraByteForIp = headerTemplateSize - ipOffset + insertedBytesAfterThisStage ,
27875 +                     in the case of SEC insertedBytesAfterThisStage - SEC trailer (21/31) + header(13)
27876 +                     second byte - extraByteForIp = headerTemplate - ipOffset + insertedBytesAfterThisStage*/
27877 +                }
27878 +                if (blockSize)
27879 +                {
27880 +                    if (!POWER_OF_2(blockSize))
27881 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("inputFrmPaddingUpToBlockSize has to be power of 2"));
27882 +                }
27883 +
27884 +            }
27885 +            if (tmpReg8 == 4)
27886 +            {
27887 +                if ((IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP + p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset) > p_InsrtByTemplate->size)
27888 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : IP present in header template, user asked for IP modifications but ipOffset + ipTotalLengthFieldOffset in header template bigger than template size"));
27889 +
27890 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_DSCECN_FIELD_OFFSET_FROM_IP] = (uint8_t)p_InsrtByTemplate->modifyOuterIpParams.dscpEcn;
27891 +
27892 +                if (blockSize)
27893 +                blockSize -= 1;
27894 +
27895 +                if ((p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes) > 255)
27896 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes has to be less than 255"));
27897 +
27898 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_TOTALLENGTH_FIELD_OFFSET_FROM_IP + 1] = blockSize; // IPV6 - in AD instead of SEQ IND
27899 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_TOTALLENGTH_FIELD_OFFSET_FROM_IP] = (uint8_t)(p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes);// for IPV6 decrement additional 40 bytes of IPV6 heade size
27900 +
27901 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_ID_FIELD_OFFSET_FROM_IP] = 0x00;
27902 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_ID_FIELD_OFFSET_FROM_IP + 1] = extraAddedBytesAlignedToBlockSize;
27903 +
27904 +                /*IP header template - relevant only for ipv4 CheckSum = 0*/
27905 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP] = 0x00;
27906 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP + 1] = 0x00;
27907 +
27908 +                /*UDP checksum has to be 0*/
27909 +                if (p_InsrtByTemplate->modifyOuterIpParams.udpPresent)
27910 +                {
27911 +                    if ((p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + UDP_CHECKSUM_FIELD_SIZE) > p_InsrtByTemplate->size)
27912 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : UDP present according to user but (UDP offset + UDP header size) < size of header template"));
27913 +
27914 +                    p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP ] = 0x00;
27915 +                    p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + 1] = 0x00;
27916 +
27917 +                }
27918 +
27919 +                if (p_InsrtByTemplate->modifyOuterIpParams.ipIdentGenId > 7)
27920 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("ipIdentGenId has to be one out of 8 sequence number generators (0 - 7) for IP identification field"));
27921 +
27922 +                tmpRegNia |= (uint32_t)p_InsrtByTemplate->modifyOuterIpParams.ipIdentGenId<<24;
27923 +            }
27924 +            else if (tmpReg8 == 6)
27925 +            {
27926 +                /*TODO - add check for maximum value of blockSize;*/
27927 +                if (blockSize)
27928 +                LOG2(blockSize, log2Num);
27929 +                tmpRegNia |= (uint32_t)log2Num << 24;
27930 +
27931 +                // for IPV6 decrement additional 40 bytes of IPV6 heade size - because IPV6 header size is not included in payloadLength
27932 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv6_PAYLOAD_LENGTH_OFFSET_FROM_IP] = (uint8_t)(p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes - 40);
27933 +                p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv6_PAYLOAD_LENGTH_OFFSET_FROM_IP + 1] = extraAddedBytesAlignedToBlockSize;
27934 +                if (p_InsrtByTemplate->modifyOuterIpParams.udpPresent)
27935 +                {
27936 +                    if ((p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + UDP_CHECKSUM_FIELD_SIZE) > p_InsrtByTemplate->size)
27937 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : UDP present according to user but (UDP offset + UDP header size) < size of header template"));
27938 +                    if (p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv6_NEXT_HEADER_OFFSET_FROM_IP] != 0x88)
27939 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("OUr suppport is only IPv6/UDPLite"));
27940 +                    p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_LENGTH_FIELD_OFFSET_FROM_UDP] = 0x00;
27941 +                    p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_LENGTH_FIELD_OFFSET_FROM_UDP + 1] = 0x08;
27942 +                    p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP] = 0x00;
27943 +                    p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + 1] = 0x00;
27944 +                }
27945 +            }
27946 +            else
27947 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("IP version supported only IPV4"));
27948 +        }
27949 +
27950 +        tmpReg32 = tmpReg16 = tmpReg8 = 0;
27951 +        /*TODO - check it*/
27952 +        if (p_InsrtByTemplate->modifyOuterVlan)
27953 +        {
27954 +            if (p_InsrtByTemplate->modifyOuterVlanParams.vpri & ~0x07)
27955 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,("Inconsistent parameters : user asked for VLAN modifications but VPRI more than 3 bits"));
27956 +
27957 +            memcpy(&tmpReg16, &p_Template[VLAN_TAG_FIELD_OFFSET_FROM_ETH], 2*(sizeof(uint8_t)));
27958 +            if ((tmpReg16 != 0x9100) && (tmpReg16!= 0x9200) && (tmpReg16 != 0x8100))
27959 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,("Inconsistent parameters : user asked for VLAN modifications but Tag Protocol identifier is not VLAN "));
27960 +
27961 +            memcpy(&tmpReg8, &p_Template[14],1*(sizeof(uint8_t)));
27962 +            tmpReg8 &= 0x1f;
27963 +            tmpReg8 |= (uint8_t)(p_InsrtByTemplate->modifyOuterVlanParams.vpri << 5);
27964 +
27965 +            p_Template[14] = tmpReg8;
27966 +        }
27967 +
27968 +        MemCpy8(p_Manip->p_Template, p_Template, p_InsrtByTemplate->size);
27969 +
27970 +        XX_Free(p_Template);
27971 +    }
27972 +
27973 +    tmpReg32 = 0;
27974 +    if (p_Manip->h_Frag)
27975 +    {
27976 +        tmpRegNia |= (uint32_t)(XX_VirtToPhys(p_Manip->h_Frag) - (p_FmPcd->physicalMuramBase));
27977 +        tmpReg32 |= (uint32_t)p_Manip->sizeForFragmentation << 16;
27978 +    }
27979 +    else
27980 +    tmpReg32 = 0xffff0000;
27981 +
27982 +    if (ipModify)
27983 +    tmpReg32 |= (uint32_t)p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset << 8;
27984 +    else
27985 +    tmpReg32 |= (uint32_t)0x0000ff00;
27986 +
27987 +    tmpReg32 |= (uint32_t)HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER;
27988 +    *(uint32_t *)&p_Ad->pcAndOffsets = tmpReg32;
27989 +
27990 +    tmpRegNia |= FM_PCD_AD_CONT_LOOKUP_TYPE;
27991 +    *(uint32_t *)&p_Ad->ccAdBase = tmpRegNia;
27992 +
27993 +    return err;
27994 +}
27995 +
27996 +static t_Error CheckStatsParamsAndSetType(t_FmPcdManip *p_Manip, t_FmPcdStatsParams *p_StatsParams)
27997 +{
27998 +
27999 +    switch (p_StatsParams->type)
28000 +    {
28001 +        case (e_FM_PCD_STATS_PER_FLOWID):
28002 +        p_Manip->opcode = HMAN_OC_CAPWAP_INDEXED_STATS;
28003 +        p_Manip->muramAllocate = TRUE;
28004 +        break;
28005 +        default:
28006 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported statistics type"));
28007 +    }
28008 +
28009 +    return E_OK;
28010 +}
28011 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
28012 +
28013 +static t_Error FillReassmManipParams(t_FmPcdManip *p_Manip, e_NetHeaderType hdr)
28014 +{
28015 +    t_AdOfTypeContLookup *p_Ad;
28016 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
28017 +    uint32_t tmpReg32;
28018 +    t_Error err = E_OK;
28019 +
28020 +    /* Creates the Reassembly Parameters table. It contains parameters that are specific to either the IPv4 reassembly
28021 +     function or to the IPv6 reassembly function. If both IPv4 reassembly and IPv6 reassembly are required, then
28022 +     two separate IP Reassembly Parameter tables are required.*/
28023 +    if ((err = CreateReassTable(p_Manip, hdr)) != E_OK)
28024 +        RETURN_ERROR(MAJOR, err, NO_MSG);
28025 +
28026 +    /* Sets the first Ad register (ccAdBase) - Action Descriptor Type and Pointer to the Reassembly Parameters Table offset from MURAM*/
28027 +    tmpReg32 = 0;
28028 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
28029 +
28030 +    /* Gets the required Action descriptor table pointer */
28031 +    switch (hdr)
28032 +    {
28033 +        case HEADER_TYPE_IPv4:
28034 +            p_Ad = (t_AdOfTypeContLookup *)p_Manip->reassmParams.ip.h_Ipv4Ad;
28035 +            tmpReg32 |= (uint32_t)(XX_VirtToPhys(
28036 +                    p_Manip->reassmParams.ip.p_Ipv4ReassTbl)
28037 +                    - (p_FmPcd->physicalMuramBase));
28038 +            break;
28039 +        case HEADER_TYPE_IPv6:
28040 +            p_Ad = (t_AdOfTypeContLookup *)p_Manip->reassmParams.ip.h_Ipv6Ad;
28041 +            tmpReg32 |= (uint32_t)(XX_VirtToPhys(
28042 +                    p_Manip->reassmParams.ip.p_Ipv6ReassTbl)
28043 +                    - (p_FmPcd->physicalMuramBase));
28044 +            break;
28045 +        case HEADER_TYPE_CAPWAP:
28046 +            p_Ad = (t_AdOfTypeContLookup *)p_Manip->reassmParams.capwap.h_Ad;
28047 +            tmpReg32 |= (uint32_t)(XX_VirtToPhys(
28048 +                    p_Manip->reassmParams.capwap.p_ReassTbl)
28049 +                    - (p_FmPcd->physicalMuramBase));
28050 +            break;
28051 +        default:
28052 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("header type"));
28053 +    }
28054 +
28055 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
28056 +
28057 +    /* Sets the second Ad register (matchTblPtr) - Buffer pool ID (BPID for V2) and Scatter/Gather table offset*/
28058 +    /* mark the Scatter/Gather table offset to be set later on when the port will be known */
28059 +    p_Manip->updateParams = (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK);
28060 +
28061 +    if ((hdr == HEADER_TYPE_IPv6) || (hdr == HEADER_TYPE_IPv4))
28062 +    {
28063 +#if (DPAA_VERSION == 10)
28064 +        tmpReg32 = (uint32_t)(p_Manip->reassmParams.sgBpid << 8);
28065 +        WRITE_UINT32(p_Ad->matchTblPtr, tmpReg32);
28066 +#endif /* (DPAA_VERSION == 10) */
28067 +#if (DPAA_VERSION >= 11)
28068 +        if (p_Manip->reassmParams.ip.nonConsistentSpFqid != 0)
28069 +        {
28070 +            tmpReg32 = FM_PCD_AD_NCSPFQIDM_MASK
28071 +                    | (uint32_t)(p_Manip->reassmParams.ip.nonConsistentSpFqid);
28072 +            WRITE_UINT32(p_Ad->gmask, tmpReg32);
28073 +        }
28074 +#endif /* (DPAA_VERSION >= 11) */
28075 +        /* Sets the third Ad register (pcAndOffsets)- IP Reassemble Operation Code*/
28076 +        tmpReg32 = 0;
28077 +        tmpReg32 |= (uint32_t)HMAN_OC_IP_REASSEMBLY;
28078 +    }
28079 +#if (DPAA_VERSION >= 11)
28080 +    else
28081 +        if (hdr == HEADER_TYPE_CAPWAP)
28082 +        {
28083 +            tmpReg32 = 0;
28084 +            tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_REASSEMBLY;
28085 +        }
28086 +#endif /* (DPAA_VERSION >= 11) */
28087 +
28088 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
28089 +
28090 +    p_Manip->reassm = TRUE;
28091 +
28092 +    return E_OK;
28093 +}
28094 +
28095 +static t_Error SetIpv4ReassmManip(t_FmPcdManip *p_Manip)
28096 +{
28097 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
28098 +
28099 +    /* Allocation if IPv4 Action descriptor */
28100 +    p_Manip->reassmParams.ip.h_Ipv4Ad = (t_Handle)XX_MallocSmart(
28101 +            FM_PCD_CC_AD_ENTRY_SIZE, p_Manip->reassmParams.dataMemId,
28102 +            FM_PCD_CC_AD_TABLE_ALIGN);
28103 +    if (!p_Manip->reassmParams.ip.h_Ipv4Ad)
28104 +    {
28105 +        ReleaseManipHandler(p_Manip, p_FmPcd);
28106 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
28107 +                     ("Allocation of IPv4 table descriptor"));
28108 +    }
28109 +
28110 +    memset(p_Manip->reassmParams.ip.h_Ipv4Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
28111 +
28112 +    /* Fill reassembly manipulation parameter in the IP Reassembly Action Descriptor */
28113 +    return FillReassmManipParams(p_Manip, HEADER_TYPE_IPv4);
28114 +}
28115 +
28116 +static t_Error SetIpv6ReassmManip(t_FmPcdManip *p_Manip)
28117 +{
28118 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
28119 +
28120 +    /* Allocation if IPv6 Action descriptor */
28121 +    p_Manip->reassmParams.ip.h_Ipv6Ad = (t_Handle)XX_MallocSmart(
28122 +            FM_PCD_CC_AD_ENTRY_SIZE, p_Manip->reassmParams.dataMemId,
28123 +            FM_PCD_CC_AD_TABLE_ALIGN);
28124 +    if (!p_Manip->reassmParams.ip.h_Ipv6Ad)
28125 +    {
28126 +        ReleaseManipHandler(p_Manip, p_FmPcd);
28127 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
28128 +                     ("Allocation of IPv6 table descriptor"));
28129 +    }
28130 +
28131 +    memset(p_Manip->reassmParams.ip.h_Ipv6Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
28132 +
28133 +    /* Fill reassembly manipulation parameter in the IP Reassembly Action Descriptor */
28134 +    return FillReassmManipParams(p_Manip, HEADER_TYPE_IPv6);
28135 +}
28136 +
28137 +static t_Error IpReassembly(t_FmPcdManipReassemParams *p_ManipReassmParams,
28138 +                            t_FmPcdManip *p_Manip)
28139 +{
28140 +    uint32_t maxSetNumber = 10000;
28141 +    t_FmPcdManipReassemIpParams reassmManipParams =
28142 +            p_ManipReassmParams->u.ipReassem;
28143 +    t_Error res;
28144 +
28145 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_FmPcd, E_INVALID_HANDLE);
28146 +    SANITY_CHECK_RETURN_ERROR(((t_FmPcd *)p_Manip->h_FmPcd)->h_Hc,
28147 +                              E_INVALID_HANDLE);
28148 +
28149 +    /* Check validation of user's parameter.*/
28150 +    if ((reassmManipParams.timeoutThresholdForReassmProcess < 1000)
28151 +            || (reassmManipParams.timeoutThresholdForReassmProcess > 8000000))
28152 +        RETURN_ERROR(
28153 +                MAJOR, E_INVALID_VALUE,
28154 +                ("timeoutThresholdForReassmProcess should be 1msec - 8sec"));
28155 +    /* It is recommended that the total number of entries in this table (number of sets * number of ways)
28156 +     will be twice the number of frames that are expected to be reassembled simultaneously.*/
28157 +    if (reassmManipParams.maxNumFramesInProcess
28158 +            > (reassmManipParams.maxNumFramesInProcess * maxSetNumber / 2))
28159 +        RETURN_ERROR(
28160 +                MAJOR,
28161 +                E_INVALID_VALUE,
28162 +                ("maxNumFramesInProcess has to be less than (maximun set number * number of ways / 2)"));
28163 +
28164 +    if ((p_ManipReassmParams->hdr == HEADER_TYPE_IPv6)
28165 +            && (reassmManipParams.minFragSize[1] < 256))
28166 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("minFragSize[1] must be >= 256"));
28167 +
28168 +    /* Saves user's reassembly manipulation parameters */
28169 +    p_Manip->reassmParams.ip.relativeSchemeId[0] =
28170 +            reassmManipParams.relativeSchemeId[0];
28171 +    p_Manip->reassmParams.ip.relativeSchemeId[1] =
28172 +            reassmManipParams.relativeSchemeId[1];
28173 +    p_Manip->reassmParams.ip.numOfFramesPerHashEntry[0] =
28174 +            reassmManipParams.numOfFramesPerHashEntry[0];
28175 +    p_Manip->reassmParams.ip.numOfFramesPerHashEntry[1] =
28176 +            reassmManipParams.numOfFramesPerHashEntry[1];
28177 +    p_Manip->reassmParams.ip.minFragSize[0] = reassmManipParams.minFragSize[0];
28178 +    p_Manip->reassmParams.ip.minFragSize[1] = reassmManipParams.minFragSize[1];
28179 +    p_Manip->reassmParams.maxNumFramesInProcess =
28180 +            reassmManipParams.maxNumFramesInProcess;
28181 +    p_Manip->reassmParams.timeOutMode = reassmManipParams.timeOutMode;
28182 +    p_Manip->reassmParams.fqidForTimeOutFrames =
28183 +            reassmManipParams.fqidForTimeOutFrames;
28184 +    p_Manip->reassmParams.timeoutThresholdForReassmProcess =
28185 +            reassmManipParams.timeoutThresholdForReassmProcess;
28186 +    p_Manip->reassmParams.dataMemId = reassmManipParams.dataMemId;
28187 +    p_Manip->reassmParams.dataLiodnOffset = reassmManipParams.dataLiodnOffset;
28188 +#if (DPAA_VERSION == 10)
28189 +    p_Manip->reassmParams.sgBpid = reassmManipParams.sgBpid;
28190 +#endif /* (DPAA_VERSION == 10) */
28191 +#if (DPAA_VERSION >= 11)
28192 +    if (reassmManipParams.nonConsistentSpFqid != 0)
28193 +    {
28194 +        p_Manip->reassmParams.ip.nonConsistentSpFqid =
28195 +                reassmManipParams.nonConsistentSpFqid;
28196 +    }
28197 +#endif /* (DPAA_VERSION >= 11) */
28198 +
28199 +    /* Creates and initializes the IP Reassembly common parameter table */
28200 +    CreateReassCommonTable(p_Manip);
28201 +
28202 +    /* Creation of IPv4 reassembly manipulation */
28203 +    if ((p_Manip->reassmParams.hdr == HEADER_TYPE_IPv6)
28204 +            || (p_Manip->reassmParams.hdr == HEADER_TYPE_IPv4))
28205 +    {
28206 +        res = SetIpv4ReassmManip(p_Manip);
28207 +        if (res != E_OK)
28208 +            return res;
28209 +    }
28210 +
28211 +    /* Creation of IPv6 reassembly manipulation */
28212 +    if (p_Manip->reassmParams.hdr == HEADER_TYPE_IPv6)
28213 +    {
28214 +        res = SetIpv6ReassmManip(p_Manip);
28215 +        if (res != E_OK)
28216 +            return res;
28217 +    }
28218 +
28219 +    return E_OK;
28220 +}
28221 +
28222 +static void setIpReassmSchemeParams(t_FmPcd* p_FmPcd,
28223 +                                    t_FmPcdKgSchemeParams *p_Scheme,
28224 +                                    t_Handle h_CcTree, bool ipv4,
28225 +                                    uint8_t groupId)
28226 +{
28227 +    uint32_t j;
28228 +    uint8_t res;
28229 +
28230 +    /* Configures scheme's network environment parameters */
28231 +    p_Scheme->netEnvParams.numOfDistinctionUnits = 2;
28232 +    if (ipv4)
28233 +        res = FmPcdNetEnvGetUnitId(
28234 +                p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
28235 +                HEADER_TYPE_IPv4, FALSE, 0);
28236 +    else
28237 +        res = FmPcdNetEnvGetUnitId(
28238 +                p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
28239 +                HEADER_TYPE_IPv6, FALSE, 0);
28240 +    ASSERT_COND(res != FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
28241 +    p_Scheme->netEnvParams.unitIds[0] = res;
28242 +
28243 +    res = FmPcdNetEnvGetUnitId(
28244 +            p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
28245 +            HEADER_TYPE_USER_DEFINED_SHIM2, FALSE, 0);
28246 +    ASSERT_COND(res != FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
28247 +    p_Scheme->netEnvParams.unitIds[1] = res;
28248 +
28249 +    /* Configures scheme's next engine parameters*/
28250 +    p_Scheme->nextEngine = e_FM_PCD_CC;
28251 +    p_Scheme->kgNextEngineParams.cc.h_CcTree = h_CcTree;
28252 +    p_Scheme->kgNextEngineParams.cc.grpId = groupId;
28253 +    p_Scheme->useHash = TRUE;
28254 +
28255 +    /* Configures scheme's key*/
28256 +    if (ipv4 == TRUE)
28257 +    {
28258 +        p_Scheme->keyExtractAndHashParams.numOfUsedExtracts = 4;
28259 +        p_Scheme->keyExtractAndHashParams.extractArray[0].type =
28260 +                e_FM_PCD_EXTRACT_BY_HDR;
28261 +        p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.type =
28262 +                e_FM_PCD_EXTRACT_FULL_FIELD;
28263 +        p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.hdr =
28264 +                HEADER_TYPE_IPv4;
28265 +        p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.extractByHdrType.fullField.ipv4 =
28266 +                NET_HEADER_FIELD_IPv4_DST_IP;
28267 +        p_Scheme->keyExtractAndHashParams.extractArray[1].type =
28268 +                e_FM_PCD_EXTRACT_BY_HDR;
28269 +        p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.type =
28270 +                e_FM_PCD_EXTRACT_FULL_FIELD;
28271 +        p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.hdr =
28272 +                HEADER_TYPE_IPv4;
28273 +        p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.extractByHdrType.fullField.ipv4 =
28274 +                NET_HEADER_FIELD_IPv4_SRC_IP;
28275 +        p_Scheme->keyExtractAndHashParams.extractArray[2].type =
28276 +                e_FM_PCD_EXTRACT_BY_HDR;
28277 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.type =
28278 +                e_FM_PCD_EXTRACT_FULL_FIELD;
28279 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.hdr =
28280 +                HEADER_TYPE_IPv4;
28281 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.extractByHdrType.fullField.ipv4 =
28282 +                NET_HEADER_FIELD_IPv4_PROTO;
28283 +        p_Scheme->keyExtractAndHashParams.extractArray[3].type =
28284 +                e_FM_PCD_EXTRACT_BY_HDR;
28285 +        p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.hdr =
28286 +                HEADER_TYPE_IPv4;
28287 +        p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.type =
28288 +                e_FM_PCD_EXTRACT_FROM_HDR;
28289 +        p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.ignoreProtocolValidation =
28290 +                FALSE;
28291 +        p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.extractByHdrType.fromHdr.size =
28292 +                2;
28293 +        p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.extractByHdrType.fromHdr.offset =
28294 +                4;
28295 +    }
28296 +    else /* IPv6 */
28297 +    {
28298 +        p_Scheme->keyExtractAndHashParams.numOfUsedExtracts = 3;
28299 +        p_Scheme->keyExtractAndHashParams.extractArray[0].type =
28300 +                e_FM_PCD_EXTRACT_BY_HDR;
28301 +        p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.type =
28302 +                e_FM_PCD_EXTRACT_FULL_FIELD;
28303 +        p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.hdr =
28304 +                HEADER_TYPE_IPv6;
28305 +        p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.extractByHdrType.fullField.ipv6 =
28306 +                NET_HEADER_FIELD_IPv6_DST_IP;
28307 +        p_Scheme->keyExtractAndHashParams.extractArray[1].type =
28308 +                e_FM_PCD_EXTRACT_BY_HDR;
28309 +        p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.type =
28310 +                e_FM_PCD_EXTRACT_FULL_FIELD;
28311 +        p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.hdr =
28312 +                HEADER_TYPE_IPv6;
28313 +        p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.extractByHdrType.fullField.ipv6 =
28314 +                NET_HEADER_FIELD_IPv6_SRC_IP;
28315 +        p_Scheme->keyExtractAndHashParams.extractArray[2].type =
28316 +                e_FM_PCD_EXTRACT_BY_HDR;
28317 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.hdr =
28318 +                HEADER_TYPE_USER_DEFINED_SHIM2;
28319 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.type =
28320 +                e_FM_PCD_EXTRACT_FROM_HDR;
28321 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.extractByHdrType.fromHdr.size =
28322 +                4;
28323 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.extractByHdrType.fromHdr.offset =
28324 +                4;
28325 +        p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.ignoreProtocolValidation =
28326 +                TRUE;
28327 +    }
28328 +
28329 +    p_Scheme->keyExtractAndHashParams.privateDflt0 = 0x01020304;
28330 +    p_Scheme->keyExtractAndHashParams.privateDflt1 = 0x11121314;
28331 +    p_Scheme->keyExtractAndHashParams.numOfUsedDflts =
28332 +            FM_PCD_KG_NUM_OF_DEFAULT_GROUPS;
28333 +    for (j = 0; j < FM_PCD_KG_NUM_OF_DEFAULT_GROUPS; j++)
28334 +    {
28335 +        p_Scheme->keyExtractAndHashParams.dflts[j].type =
28336 +                (e_FmPcdKgKnownFieldsDfltTypes)j; /* all types */
28337 +        p_Scheme->keyExtractAndHashParams.dflts[j].dfltSelect =
28338 +                e_FM_PCD_KG_DFLT_GBL_0;
28339 +    }
28340 +}
28341 +
28342 +static t_Error IpReassemblyStats(t_FmPcdManip *p_Manip,
28343 +                                 t_FmPcdManipReassemIpStats *p_Stats)
28344 +{
28345 +    ASSERT_COND(p_Manip);
28346 +    ASSERT_COND(p_Stats);
28347 +    ASSERT_COND(p_Manip->reassmParams.p_ReassCommonTbl);
28348 +
28349 +    p_Stats->timeout =
28350 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalTimeOutCounter);
28351 +    p_Stats->rfdPoolBusy =
28352 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalRfdPoolBusyCounter);
28353 +    p_Stats->internalBufferBusy =
28354 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalInternalBufferBusy);
28355 +    p_Stats->externalBufferBusy =
28356 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalExternalBufferBusy);
28357 +    p_Stats->sgFragments =
28358 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalSgFragmentCounter);
28359 +    p_Stats->dmaSemaphoreDepletion =
28360 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalDmaSemaphoreDepletionCounter);
28361 +#if (DPAA_VERSION >= 11)
28362 +    p_Stats->nonConsistentSp =
28363 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalNCSPCounter);
28364 +#endif /* (DPAA_VERSION >= 11) */
28365 +
28366 +    if (p_Manip->reassmParams.ip.p_Ipv4ReassTbl)
28367 +    {
28368 +        p_Stats->specificHdrStatistics[0].successfullyReassembled =
28369 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalSuccessfullyReasmFramesCounter);
28370 +        p_Stats->specificHdrStatistics[0].validFragments =
28371 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalValidFragmentCounter);
28372 +        p_Stats->specificHdrStatistics[0].processedFragments =
28373 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalProcessedFragCounter);
28374 +        p_Stats->specificHdrStatistics[0].malformedFragments =
28375 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalMalformdFragCounter);
28376 +        p_Stats->specificHdrStatistics[0].autoLearnBusy =
28377 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalSetBusyCounter);
28378 +        p_Stats->specificHdrStatistics[0].discardedFragments =
28379 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalDiscardedFragsCounter);
28380 +        p_Stats->specificHdrStatistics[0].moreThan16Fragments =
28381 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalMoreThan16FramesCounter);
28382 +    }
28383 +    if (p_Manip->reassmParams.ip.p_Ipv6ReassTbl)
28384 +    {
28385 +        p_Stats->specificHdrStatistics[1].successfullyReassembled =
28386 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalSuccessfullyReasmFramesCounter);
28387 +        p_Stats->specificHdrStatistics[1].validFragments =
28388 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalValidFragmentCounter);
28389 +        p_Stats->specificHdrStatistics[1].processedFragments =
28390 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalProcessedFragCounter);
28391 +        p_Stats->specificHdrStatistics[1].malformedFragments =
28392 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalMalformdFragCounter);
28393 +        p_Stats->specificHdrStatistics[1].autoLearnBusy =
28394 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalSetBusyCounter);
28395 +        p_Stats->specificHdrStatistics[1].discardedFragments =
28396 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalDiscardedFragsCounter);
28397 +        p_Stats->specificHdrStatistics[1].moreThan16Fragments =
28398 +                GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalMoreThan16FramesCounter);
28399 +    }
28400 +    return E_OK;
28401 +}
28402 +
28403 +static t_Error IpFragmentationStats(t_FmPcdManip *p_Manip,
28404 +                                    t_FmPcdManipFragIpStats *p_Stats)
28405 +{
28406 +    t_AdOfTypeContLookup *p_Ad;
28407 +
28408 +    ASSERT_COND(p_Manip);
28409 +    ASSERT_COND(p_Stats);
28410 +    ASSERT_COND(p_Manip->h_Ad);
28411 +    ASSERT_COND(p_Manip->fragParams.p_Frag);
28412 +
28413 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
28414 +
28415 +    p_Stats->totalFrames = GET_UINT32(p_Ad->gmask);
28416 +    p_Stats->fragmentedFrames = GET_UINT32(p_Manip->fragParams.p_Frag->ccAdBase)
28417 +            & 0x00ffffff;
28418 +    p_Stats->generatedFragments =
28419 +            GET_UINT32(p_Manip->fragParams.p_Frag->matchTblPtr);
28420 +
28421 +    return E_OK;
28422 +}
28423 +
28424 +static t_Error IpFragmentation(t_FmPcdManipFragIpParams *p_ManipParams,
28425 +                               t_FmPcdManip *p_Manip)
28426 +{
28427 +    uint32_t pcAndOffsetsReg = 0, ccAdBaseReg = 0, gmaskReg = 0;
28428 +    t_FmPcd *p_FmPcd;
28429 +#if (DPAA_VERSION == 10)
28430 +    t_Error err = E_OK;
28431 +#endif /* (DPAA_VERSION == 10) */
28432 +
28433 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
28434 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams->sizeForFragmentation != 0xFFFF,
28435 +                              E_INVALID_VALUE);
28436 +
28437 +    p_FmPcd = p_Manip->h_FmPcd;
28438 +    /* Allocation of fragmentation Action Descriptor */
28439 +    p_Manip->fragParams.p_Frag = (t_AdOfTypeContLookup *)FM_MURAM_AllocMem(
28440 +            p_FmPcd->h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE,
28441 +            FM_PCD_CC_AD_TABLE_ALIGN);
28442 +    if (!p_Manip->fragParams.p_Frag)
28443 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
28444 +                     ("MURAM alloc for Fragmentation table descriptor"));
28445 +    MemSet8(p_Manip->fragParams.p_Frag, 0, FM_PCD_CC_AD_ENTRY_SIZE);
28446 +
28447 +    /* Prepare the third Ad register (pcAndOffsets)- OperationCode */
28448 +    pcAndOffsetsReg = (uint32_t)HMAN_OC_IP_FRAGMENTATION;
28449 +
28450 +    /* Prepare the first Ad register (ccAdBase) - Don't frag action and Action descriptor type*/
28451 +    ccAdBaseReg = FM_PCD_AD_CONT_LOOKUP_TYPE;
28452 +    ccAdBaseReg |= (p_ManipParams->dontFragAction
28453 +            << FM_PCD_MANIP_IP_FRAG_DF_SHIFT);
28454 +
28455 +
28456 +    /* Set Scatter/Gather BPid */
28457 +    if (p_ManipParams->sgBpidEn)
28458 +    {
28459 +        ccAdBaseReg |= FM_PCD_MANIP_IP_FRAG_SG_BDID_EN;
28460 +        pcAndOffsetsReg |= ((p_ManipParams->sgBpid
28461 +                << FM_PCD_MANIP_IP_FRAG_SG_BDID_SHIFT)
28462 +                & FM_PCD_MANIP_IP_FRAG_SG_BDID_MASK);
28463 +    }
28464 +
28465 +    /* Prepare the first Ad register (gmask) - scratch buffer pool id and Pointer to fragment ID */
28466 +    gmaskReg = (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_FmPcd->ipv6FrameIdAddr))
28467 +            - p_FmPcd->physicalMuramBase);
28468 +#if (DPAA_VERSION == 10)
28469 +    gmaskReg |= p_ManipParams->scratchBpid << FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID;
28470 +#else
28471 +    gmaskReg |= (0xFF) << FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID;
28472 +#endif /* (DPAA_VERSION == 10) */
28473 +
28474 +    /* Set all Ad registers */
28475 +    WRITE_UINT32(p_Manip->fragParams.p_Frag->pcAndOffsets, pcAndOffsetsReg);
28476 +    WRITE_UINT32(p_Manip->fragParams.p_Frag->ccAdBase, ccAdBaseReg);
28477 +    WRITE_UINT32(p_Manip->fragParams.p_Frag->gmask, gmaskReg);
28478 +
28479 +    /* Saves user's fragmentation manipulation parameters */
28480 +    p_Manip->frag = TRUE;
28481 +    p_Manip->sizeForFragmentation = p_ManipParams->sizeForFragmentation;
28482 +
28483 +#if (DPAA_VERSION == 10)
28484 +    p_Manip->fragParams.scratchBpid = p_ManipParams->scratchBpid;
28485 +
28486 +    /* scratch buffer pool initialization */
28487 +    if ((err = FmPcdFragHcScratchPoolFill((t_Handle)p_FmPcd, p_ManipParams->scratchBpid)) != E_OK)
28488 +    {
28489 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->fragParams.p_Frag);
28490 +        p_Manip->fragParams.p_Frag = NULL;
28491 +        RETURN_ERROR(MAJOR, err, NO_MSG);
28492 +    }
28493 +#endif /* (DPAA_VERSION == 10) */
28494 +
28495 +    return E_OK;
28496 +}
28497 +
28498 +static t_Error IPManip(t_FmPcdManip *p_Manip)
28499 +{
28500 +    t_Error err = E_OK;
28501 +    t_FmPcd *p_FmPcd;
28502 +    t_AdOfTypeContLookup *p_Ad;
28503 +    uint32_t tmpReg32 = 0, tmpRegNia = 0;
28504 +
28505 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
28506 +    p_FmPcd = p_Manip->h_FmPcd;
28507 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
28508 +
28509 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
28510 +
28511 +    tmpReg32 = FM_PCD_MANIP_IP_NO_FRAGMENTATION;
28512 +    if (p_Manip->frag == TRUE)
28513 +    {
28514 +        tmpRegNia = (uint32_t)(XX_VirtToPhys(p_Manip->fragParams.p_Frag)
28515 +                - (p_FmPcd->physicalMuramBase));
28516 +        tmpReg32 = (uint32_t)p_Manip->sizeForFragmentation
28517 +                << FM_PCD_MANIP_IP_MTU_SHIFT;
28518 +    }
28519 +
28520 +    tmpRegNia |= FM_PCD_AD_CONT_LOOKUP_TYPE;
28521 +    tmpReg32 |= HMAN_OC_IP_MANIP;
28522 +
28523 +#if (DPAA_VERSION >= 11)
28524 +    tmpRegNia |= FM_PCD_MANIP_IP_CNIA;
28525 +#endif /* (DPAA_VERSION >= 11) */
28526 +
28527 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
28528 +    WRITE_UINT32(p_Ad->ccAdBase, tmpRegNia);
28529 +    WRITE_UINT32(p_Ad->gmask, 0);
28530 +    /* Total frame counter - MUST be initialized to zero.*/
28531 +
28532 +    return err;
28533 +}
28534 +
28535 +static t_Error UpdateInitIpFrag(t_Handle h_FmPcd, t_Handle h_PcdParams,
28536 +                                t_Handle h_FmPort, t_FmPcdManip *p_Manip,
28537 +                                t_Handle h_Ad, bool validate)
28538 +{
28539 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
28540 +    t_Error err;
28541 +
28542 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
28543 +    SANITY_CHECK_RETURN_ERROR((p_Manip->opcode == HMAN_OC_IP_FRAGMENTATION),
28544 +                              E_INVALID_STATE);
28545 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
28546 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
28547 +
28548 +    UNUSED(h_FmPcd);
28549 +    UNUSED(h_Ad);
28550 +    UNUSED(h_PcdParams);
28551 +    UNUSED(validate);
28552 +    UNUSED(p_Manip);
28553 +
28554 +    fmPortGetSetCcParams.setCcParams.type = 0;
28555 +    fmPortGetSetCcParams.getCcParams.type = MANIP_EXTRA_SPACE;
28556 +    if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams)) != E_OK)
28557 +        RETURN_ERROR(MAJOR, err, NO_MSG);
28558 +
28559 +    if (!fmPortGetSetCcParams.getCcParams.internalBufferOffset)
28560 +        DBG(WARNING, ("manipExtraSpace must be larger than '0'"));
28561 +
28562 +    return E_OK;
28563 +}
28564 +
28565 +static t_Error IPSecManip(t_FmPcdManipParams *p_ManipParams,
28566 +                          t_FmPcdManip *p_Manip)
28567 +{
28568 +    t_AdOfTypeContLookup *p_Ad;
28569 +    t_FmPcdManipSpecialOffloadIPSecParams *p_IPSecParams;
28570 +    t_Error err = E_OK;
28571 +    uint32_t tmpReg32 = 0;
28572 +    uint32_t power;
28573 +
28574 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
28575 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams, E_INVALID_HANDLE);
28576 +
28577 +    p_IPSecParams = &p_ManipParams->u.specialOffload.u.ipsec;
28578 +
28579 +    SANITY_CHECK_RETURN_ERROR(
28580 +            !p_IPSecParams->variableIpHdrLen || p_IPSecParams->decryption,
28581 +            E_INVALID_VALUE);
28582 +    SANITY_CHECK_RETURN_ERROR(
28583 +            !p_IPSecParams->variableIpVersion || !p_IPSecParams->decryption,
28584 +            E_INVALID_VALUE);
28585 +    SANITY_CHECK_RETURN_ERROR(
28586 +            !p_IPSecParams->variableIpVersion || p_IPSecParams->outerIPHdrLen,
28587 +            E_INVALID_VALUE);
28588 +    SANITY_CHECK_RETURN_ERROR(
28589 +            !p_IPSecParams->arwSize || p_IPSecParams->arwAddr,
28590 +            E_INVALID_VALUE);
28591 +    SANITY_CHECK_RETURN_ERROR(
28592 +            !p_IPSecParams->arwSize || p_IPSecParams->decryption,
28593 +            E_INVALID_VALUE);
28594 +    SANITY_CHECK_RETURN_ERROR((p_IPSecParams->arwSize % 16) == 0, E_INVALID_VALUE);
28595 +
28596 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
28597 +
28598 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
28599 +    tmpReg32 |= (p_IPSecParams->decryption) ? FM_PCD_MANIP_IPSEC_DEC : 0;
28600 +    tmpReg32 |= (p_IPSecParams->ecnCopy) ? FM_PCD_MANIP_IPSEC_ECN_EN : 0;
28601 +    tmpReg32 |= (p_IPSecParams->dscpCopy) ? FM_PCD_MANIP_IPSEC_DSCP_EN : 0;
28602 +    tmpReg32 |=
28603 +            (p_IPSecParams->variableIpHdrLen) ? FM_PCD_MANIP_IPSEC_VIPL_EN : 0;
28604 +    tmpReg32 |=
28605 +            (p_IPSecParams->variableIpVersion) ? FM_PCD_MANIP_IPSEC_VIPV_EN : 0;
28606 +    if (p_IPSecParams->arwSize)
28607 +        tmpReg32 |= (uint32_t)((XX_VirtToPhys(UINT_TO_PTR(p_IPSecParams->arwAddr))-FM_MM_MURAM)
28608 +                & (FM_MURAM_SIZE-1));
28609 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
28610 +
28611 +    tmpReg32 = 0;
28612 +    if (p_IPSecParams->arwSize) {
28613 +        NEXT_POWER_OF_2((p_IPSecParams->arwSize + 32), power);
28614 +        LOG2(power, power);
28615 +        tmpReg32 = (p_IPSecParams->arwSize | (power - 5)) << FM_PCD_MANIP_IPSEC_ARW_SIZE_SHIFT;
28616 +    }
28617 +
28618 +    if (p_ManipParams->h_NextManip)
28619 +        tmpReg32 |=
28620 +                (uint32_t)(XX_VirtToPhys(((t_FmPcdManip *)p_ManipParams->h_NextManip)->h_Ad)-
28621 +                        (((t_FmPcd *)p_Manip->h_FmPcd)->physicalMuramBase)) >> 4;
28622 +    WRITE_UINT32(p_Ad->matchTblPtr, tmpReg32);
28623 +
28624 +    tmpReg32 = HMAN_OC_IPSEC_MANIP;
28625 +    tmpReg32 |= p_IPSecParams->outerIPHdrLen
28626 +            << FM_PCD_MANIP_IPSEC_IP_HDR_LEN_SHIFT;
28627 +    if (p_ManipParams->h_NextManip)
28628 +        tmpReg32 |= FM_PCD_MANIP_IPSEC_NADEN;
28629 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
28630 +
28631 +    return err;
28632 +}
28633 +
28634 +static t_Error SetCapwapReassmManip(t_FmPcdManip *p_Manip)
28635 +{
28636 +    t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
28637 +
28638 +    /* Allocation if CAPWAP Action descriptor */
28639 +    p_Manip->reassmParams.capwap.h_Ad = (t_Handle)XX_MallocSmart(
28640 +            FM_PCD_CC_AD_ENTRY_SIZE, p_Manip->reassmParams.dataMemId,
28641 +            FM_PCD_CC_AD_TABLE_ALIGN);
28642 +    if (!p_Manip->reassmParams.capwap.h_Ad)
28643 +    {
28644 +        ReleaseManipHandler(p_Manip, p_FmPcd);
28645 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
28646 +                     ("Allocation of CAPWAP table descriptor"));
28647 +    }
28648 +
28649 +    memset(p_Manip->reassmParams.capwap.h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
28650 +
28651 +    /* Fill reassembly manipulation parameter in the Reassembly Action Descriptor */
28652 +    return FillReassmManipParams(p_Manip, HEADER_TYPE_CAPWAP);
28653 +}
28654 +
28655 +static void setCapwapReassmSchemeParams(t_FmPcd* p_FmPcd,
28656 +                                        t_FmPcdKgSchemeParams *p_Scheme,
28657 +                                        t_Handle h_CcTree, uint8_t groupId)
28658 +{
28659 +    uint8_t res;
28660 +
28661 +    /* Configures scheme's network environment parameters */
28662 +    p_Scheme->netEnvParams.numOfDistinctionUnits = 1;
28663 +    res = FmPcdNetEnvGetUnitId(
28664 +            p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
28665 +            HEADER_TYPE_USER_DEFINED_SHIM2, FALSE, 0);
28666 +    ASSERT_COND(res != FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
28667 +    p_Scheme->netEnvParams.unitIds[0] = res;
28668 +
28669 +    /* Configures scheme's next engine parameters*/
28670 +    p_Scheme->nextEngine = e_FM_PCD_CC;
28671 +    p_Scheme->kgNextEngineParams.cc.h_CcTree = h_CcTree;
28672 +    p_Scheme->kgNextEngineParams.cc.grpId = groupId;
28673 +    p_Scheme->useHash = TRUE;
28674 +
28675 +    /* Configures scheme's key*/
28676 +    p_Scheme->keyExtractAndHashParams.numOfUsedExtracts = 2;
28677 +    p_Scheme->keyExtractAndHashParams.extractArray[0].type =
28678 +            e_FM_PCD_EXTRACT_NON_HDR;
28679 +    p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.src =
28680 +            e_FM_PCD_EXTRACT_FROM_PARSE_RESULT;
28681 +    p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.action =
28682 +            e_FM_PCD_ACTION_NONE;
28683 +    p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.offset = 20;
28684 +    p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.size = 4;
28685 +    p_Scheme->keyExtractAndHashParams.extractArray[1].type =
28686 +            e_FM_PCD_EXTRACT_NON_HDR;
28687 +    p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.src =
28688 +            e_FM_PCD_EXTRACT_FROM_DFLT_VALUE;
28689 +    p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.action =
28690 +            e_FM_PCD_ACTION_NONE;
28691 +    p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.offset = 0;
28692 +    p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.size = 1;
28693 +
28694 +    p_Scheme->keyExtractAndHashParams.privateDflt0 = 0x0;
28695 +    p_Scheme->keyExtractAndHashParams.privateDflt1 = 0x0;
28696 +    p_Scheme->keyExtractAndHashParams.numOfUsedDflts = 1;
28697 +    p_Scheme->keyExtractAndHashParams.dflts[0].type = e_FM_PCD_KG_GENERIC_NOT_FROM_DATA;
28698 +    p_Scheme->keyExtractAndHashParams.dflts[0].dfltSelect = e_FM_PCD_KG_DFLT_PRIVATE_0;
28699 +}
28700 +
28701 +#if (DPAA_VERSION >= 11)
28702 +static t_Error CapwapReassemblyStats(t_FmPcdManip *p_Manip,
28703 +                                     t_FmPcdManipReassemCapwapStats *p_Stats)
28704 +{
28705 +    ASSERT_COND(p_Manip);
28706 +    ASSERT_COND(p_Stats);
28707 +    ASSERT_COND(p_Manip->reassmParams.p_ReassCommonTbl);
28708 +
28709 +    p_Stats->timeout =
28710 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalTimeOutCounter);
28711 +    p_Stats->rfdPoolBusy =
28712 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalRfdPoolBusyCounter);
28713 +    p_Stats->internalBufferBusy =
28714 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalInternalBufferBusy);
28715 +    p_Stats->externalBufferBusy =
28716 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalExternalBufferBusy);
28717 +    p_Stats->sgFragments =
28718 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalSgFragmentCounter);
28719 +    p_Stats->dmaSemaphoreDepletion =
28720 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalDmaSemaphoreDepletionCounter);
28721 +    p_Stats->exceedMaxReassemblyFrameLen =
28722 +            GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalNCSPCounter);
28723 +
28724 +    p_Stats->successfullyReassembled =
28725 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalSuccessfullyReasmFramesCounter);
28726 +    p_Stats->validFragments =
28727 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalValidFragmentCounter);
28728 +    p_Stats->processedFragments =
28729 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalProcessedFragCounter);
28730 +    p_Stats->malformedFragments =
28731 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalMalformdFragCounter);
28732 +    p_Stats->autoLearnBusy =
28733 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalSetBusyCounter);
28734 +    p_Stats->discardedFragments =
28735 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalDiscardedFragsCounter);
28736 +    p_Stats->moreThan16Fragments =
28737 +            GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalMoreThan16FramesCounter);
28738 +
28739 +    return E_OK;
28740 +}
28741 +
28742 +static t_Error CapwapFragmentationStats(t_FmPcdManip *p_Manip,
28743 +               t_FmPcdManipFragCapwapStats *p_Stats)
28744 +{
28745 +       t_AdOfTypeContLookup *p_Ad;
28746 +
28747 +       ASSERT_COND(p_Manip);
28748 +       ASSERT_COND(p_Stats);
28749 +       ASSERT_COND(p_Manip->h_Ad);
28750 +       ASSERT_COND(p_Manip->fragParams.p_Frag);
28751 +
28752 +       p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
28753 +
28754 +       p_Stats->totalFrames = GET_UINT32(p_Ad->gmask);
28755 +
28756 +       return E_OK;
28757 +}
28758 +
28759 +static t_Error CapwapReassembly(t_FmPcdManipReassemParams *p_ManipReassmParams,
28760 +                                t_FmPcdManip *p_Manip)
28761 +{
28762 +    uint32_t maxSetNumber = 10000;
28763 +    t_FmPcdManipReassemCapwapParams reassmManipParams =
28764 +            p_ManipReassmParams->u.capwapReassem;
28765 +    t_Error res;
28766 +
28767 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_FmPcd, E_INVALID_HANDLE);
28768 +    SANITY_CHECK_RETURN_ERROR(((t_FmPcd *)p_Manip->h_FmPcd)->h_Hc,
28769 +                              E_INVALID_HANDLE);
28770 +
28771 +    /* Check validation of user's parameter.*/
28772 +    if ((reassmManipParams.timeoutThresholdForReassmProcess < 1000)
28773 +            || (reassmManipParams.timeoutThresholdForReassmProcess > 8000000))
28774 +        RETURN_ERROR(
28775 +                MAJOR, E_INVALID_VALUE,
28776 +                ("timeoutThresholdForReassmProcess should be 1msec - 8sec"));
28777 +    /* It is recommended that the total number of entries in this table (number of sets * number of ways)
28778 +     will be twice the number of frames that are expected to be reassembled simultaneously.*/
28779 +    if (reassmManipParams.maxNumFramesInProcess
28780 +            > (reassmManipParams.maxNumFramesInProcess * maxSetNumber / 2))
28781 +        RETURN_ERROR(
28782 +                MAJOR,
28783 +                E_INVALID_VALUE,
28784 +                ("maxNumFramesInProcess has to be less than (maximun set number * number of ways / 2)"));
28785 +
28786 +    /* Saves user's reassembly manipulation parameters */
28787 +    p_Manip->reassmParams.capwap.relativeSchemeId =
28788 +            reassmManipParams.relativeSchemeId;
28789 +    p_Manip->reassmParams.capwap.numOfFramesPerHashEntry =
28790 +            reassmManipParams.numOfFramesPerHashEntry;
28791 +    p_Manip->reassmParams.capwap.maxRessembledsSize =
28792 +            reassmManipParams.maxReassembledFrameLength;
28793 +    p_Manip->reassmParams.maxNumFramesInProcess =
28794 +            reassmManipParams.maxNumFramesInProcess;
28795 +    p_Manip->reassmParams.timeOutMode = reassmManipParams.timeOutMode;
28796 +    p_Manip->reassmParams.fqidForTimeOutFrames =
28797 +            reassmManipParams.fqidForTimeOutFrames;
28798 +    p_Manip->reassmParams.timeoutThresholdForReassmProcess =
28799 +            reassmManipParams.timeoutThresholdForReassmProcess;
28800 +    p_Manip->reassmParams.dataMemId = reassmManipParams.dataMemId;
28801 +    p_Manip->reassmParams.dataLiodnOffset = reassmManipParams.dataLiodnOffset;
28802 +
28803 +    /* Creates and initializes the Reassembly common parameter table */
28804 +    CreateReassCommonTable(p_Manip);
28805 +
28806 +    res = SetCapwapReassmManip(p_Manip);
28807 +    if (res != E_OK)
28808 +        return res;
28809 +
28810 +    return E_OK;
28811 +}
28812 +
28813 +static t_Error CapwapFragmentation(t_FmPcdManipFragCapwapParams *p_ManipParams,
28814 +                                   t_FmPcdManip *p_Manip)
28815 +{
28816 +    t_FmPcd *p_FmPcd;
28817 +    t_AdOfTypeContLookup *p_Ad;
28818 +    uint32_t pcAndOffsetsReg = 0, ccAdBaseReg = 0, gmaskReg = 0;
28819 +    uint32_t tmpReg32 = 0, tmpRegNia = 0;
28820 +
28821 +    SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
28822 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams->sizeForFragmentation != 0xFFFF,
28823 +                              E_INVALID_VALUE);
28824 +    p_FmPcd = p_Manip->h_FmPcd;
28825 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
28826 +
28827 +    /* Allocation of fragmentation Action Descriptor */
28828 +    p_Manip->fragParams.p_Frag = (t_AdOfTypeContLookup *)FM_MURAM_AllocMem(
28829 +            p_FmPcd->h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE,
28830 +            FM_PCD_CC_AD_TABLE_ALIGN);
28831 +    if (!p_Manip->fragParams.p_Frag)
28832 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
28833 +                     ("MURAM alloc for Fragmentation table descriptor"));
28834 +    MemSet8(p_Manip->fragParams.p_Frag, 0, FM_PCD_CC_AD_ENTRY_SIZE);
28835 +
28836 +    /* Prepare the third Ad register (pcAndOffsets)- OperationCode */
28837 +    pcAndOffsetsReg = (uint32_t)HMAN_OC_CAPWAP_FRAGMENTATION;
28838 +
28839 +    /* Prepare the first Ad register (ccAdBase) - Don't frag action and Action descriptor type*/
28840 +    ccAdBaseReg = FM_PCD_AD_CONT_LOOKUP_TYPE;
28841 +    ccAdBaseReg |=
28842 +            (p_ManipParams->compressModeEn) ? FM_PCD_MANIP_CAPWAP_FRAG_COMPRESS_EN :
28843 +                    0;
28844 +
28845 +    /* Set Scatter/Gather BPid */
28846 +    if (p_ManipParams->sgBpidEn)
28847 +    {
28848 +        ccAdBaseReg |= FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_EN;
28849 +        pcAndOffsetsReg |= ((p_ManipParams->sgBpid
28850 +                << FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_SHIFT)
28851 +                & FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_MASK);
28852 +    }
28853 +
28854 +    /* Prepare the first Ad register (gmask) - scratch buffer pool id and Pointer to fragment ID */
28855 +    gmaskReg = (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_FmPcd->capwapFrameIdAddr))
28856 +            - p_FmPcd->physicalMuramBase);
28857 +    gmaskReg |= (0xFF) << FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID;
28858 +
28859 +    /* Set all Ad registers */
28860 +    WRITE_UINT32(p_Manip->fragParams.p_Frag->pcAndOffsets, pcAndOffsetsReg);
28861 +    WRITE_UINT32(p_Manip->fragParams.p_Frag->ccAdBase, ccAdBaseReg);
28862 +    WRITE_UINT32(p_Manip->fragParams.p_Frag->gmask, gmaskReg);
28863 +
28864 +    /* Saves user's fragmentation manipulation parameters */
28865 +    p_Manip->frag = TRUE;
28866 +    p_Manip->sizeForFragmentation = p_ManipParams->sizeForFragmentation;
28867 +
28868 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
28869 +
28870 +    tmpRegNia = (uint32_t)(XX_VirtToPhys(p_Manip->fragParams.p_Frag)
28871 +            - (p_FmPcd->physicalMuramBase));
28872 +    tmpReg32 = (uint32_t)p_Manip->sizeForFragmentation
28873 +            << FM_PCD_MANIP_CAPWAP_FRAG_CHECK_MTU_SHIFT;
28874 +
28875 +    tmpRegNia |= FM_PCD_AD_CONT_LOOKUP_TYPE;
28876 +    tmpReg32 |= HMAN_OC_CAPWAP_FRAG_CHECK;
28877 +
28878 +    tmpRegNia |= FM_PCD_MANIP_CAPWAP_FRAG_CHECK_CNIA;
28879 +
28880 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
28881 +    WRITE_UINT32(p_Ad->ccAdBase, tmpRegNia);
28882 +    WRITE_UINT32(p_Ad->gmask, 0);
28883 +    /* Total frame counter - MUST be initialized to zero.*/
28884 +
28885 +    return E_OK;
28886 +}
28887 +
28888 +static t_Error UpdateInitCapwapFrag(t_Handle h_FmPcd, t_Handle h_PcdParams,
28889 +                                    t_Handle h_FmPort, t_FmPcdManip *p_Manip,
28890 +                                    t_Handle h_Ad, bool validate)
28891 +{
28892 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
28893 +    t_Error err;
28894 +
28895 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
28896 +    SANITY_CHECK_RETURN_ERROR((p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION),
28897 +                              E_INVALID_STATE);
28898 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
28899 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
28900 +
28901 +    UNUSED(h_FmPcd);
28902 +    UNUSED(h_Ad);
28903 +    UNUSED(h_PcdParams);
28904 +    UNUSED(validate);
28905 +    UNUSED(p_Manip);
28906 +
28907 +    fmPortGetSetCcParams.setCcParams.type = 0;
28908 +    fmPortGetSetCcParams.getCcParams.type = MANIP_EXTRA_SPACE;
28909 +    if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams)) != E_OK)
28910 +        RETURN_ERROR(MAJOR, err, NO_MSG);
28911 +
28912 +    if (!fmPortGetSetCcParams.getCcParams.internalBufferOffset)
28913 +        DBG(WARNING, ("manipExtraSpace must be larger than '0'"));
28914 +
28915 +    return E_OK;
28916 +}
28917 +
28918 +static t_Error CapwapManip(t_FmPcdManipParams *p_ManipParams,
28919 +                           t_FmPcdManip *p_Manip)
28920 +{
28921 +    t_AdOfTypeContLookup *p_Ad;
28922 +    t_FmPcdManipSpecialOffloadCapwapParams *p_Params;
28923 +    t_Error err = E_OK;
28924 +    uint32_t tmpReg32 = 0;
28925 +
28926 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
28927 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams, E_INVALID_HANDLE);
28928 +
28929 +    p_Params = &p_ManipParams->u.specialOffload.u.capwap;
28930 +
28931 +    p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
28932 +    tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
28933 +    tmpReg32 |= (p_Params->dtls) ? FM_PCD_MANIP_CAPWAP_DTLS : 0;
28934 +    /* TODO - add 'qosSrc' */
28935 +    WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
28936 +
28937 +    tmpReg32 = HMAN_OC_CAPWAP_MANIP;
28938 +    if (p_ManipParams->h_NextManip)
28939 +    {
28940 +        WRITE_UINT32(
28941 +                p_Ad->matchTblPtr,
28942 +                (uint32_t)(XX_VirtToPhys(((t_FmPcdManip *)p_ManipParams->h_NextManip)->h_Ad)- (((t_FmPcd *)p_Manip->h_FmPcd)->physicalMuramBase)) >> 4);
28943 +
28944 +        tmpReg32 |= FM_PCD_MANIP_CAPWAP_NADEN;
28945 +    }
28946 +
28947 +    WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
28948 +
28949 +    return err;
28950 +}
28951 +#endif /* (DPAA_VERSION >= 11) */
28952 +
28953 +static t_Handle ManipOrStatsSetNode(t_Handle h_FmPcd, t_Handle *p_Params,
28954 +                                    bool stats)
28955 +{
28956 +    t_FmPcdManip *p_Manip;
28957 +    t_Error err;
28958 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
28959 +
28960 +    p_Manip = (t_FmPcdManip*)XX_Malloc(sizeof(t_FmPcdManip));
28961 +    if (!p_Manip)
28962 +    {
28963 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
28964 +        return NULL;
28965 +    }
28966 +    memset(p_Manip, 0, sizeof(t_FmPcdManip));
28967 +
28968 +    p_Manip->type = ((t_FmPcdManipParams *)p_Params)->type;
28969 +    memcpy((uint8_t*)&p_Manip->manipParams, p_Params,
28970 +           sizeof(p_Manip->manipParams));
28971 +
28972 +    if (!stats)
28973 +        err = CheckManipParamsAndSetType(p_Manip,
28974 +                                         (t_FmPcdManipParams *)p_Params);
28975 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
28976 +    else
28977 +        err = CheckStatsParamsAndSetType(p_Manip, (t_FmPcdStatsParams *)p_Params);
28978 +#else /* not (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
28979 +    else
28980 +    {
28981 +        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Statistics node!"));
28982 +        XX_Free(p_Manip);
28983 +        return NULL;
28984 +    }
28985 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
28986 +    if (err)
28987 +    {
28988 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Invalid header manipulation type"));
28989 +        XX_Free(p_Manip);
28990 +        return NULL;
28991 +    }
28992 +
28993 +    if ((p_Manip->opcode != HMAN_OC_IP_REASSEMBLY) && (p_Manip->opcode != HMAN_OC_CAPWAP_REASSEMBLY))
28994 +    {
28995 +        /* In Case of reassembly manipulation the reassembly action descriptor will
28996 +         be defines later on */
28997 +        if (p_Manip->muramAllocate)
28998 +        {
28999 +            p_Manip->h_Ad = (t_Handle)FM_MURAM_AllocMem(
29000 +                    p_FmPcd->h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE,
29001 +                    FM_PCD_CC_AD_TABLE_ALIGN);
29002 +            if (!p_Manip->h_Ad)
29003 +            {
29004 +                REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for Manipulation action descriptor"));
29005 +                ReleaseManipHandler(p_Manip, p_FmPcd);
29006 +                XX_Free(p_Manip);
29007 +                return NULL;
29008 +            }
29009 +
29010 +            MemSet8(p_Manip->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
29011 +        }
29012 +        else
29013 +        {
29014 +            p_Manip->h_Ad = (t_Handle)XX_Malloc(
29015 +                    FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
29016 +            if (!p_Manip->h_Ad)
29017 +            {
29018 +                REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Allocation of Manipulation action descriptor"));
29019 +                ReleaseManipHandler(p_Manip, p_FmPcd);
29020 +                XX_Free(p_Manip);
29021 +                return NULL;
29022 +            }
29023 +
29024 +            memset(p_Manip->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
29025 +        }
29026 +    }
29027 +
29028 +    p_Manip->h_FmPcd = h_FmPcd;
29029 +
29030 +    return p_Manip;
29031 +}
29032 +
29033 +static void UpdateAdPtrOfNodesWhichPointsOnCrntMdfManip(
29034 +        t_FmPcdManip *p_CrntMdfManip, t_List *h_NodesLst)
29035 +{
29036 +    t_CcNodeInformation *p_CcNodeInformation;
29037 +    t_FmPcdCcNode *p_NodePtrOnCurrentMdfManip = NULL;
29038 +    t_List *p_Pos;
29039 +    int i = 0;
29040 +    t_Handle p_AdTablePtOnCrntCurrentMdfNode/*, p_AdTableNewModified*/;
29041 +    t_CcNodeInformation ccNodeInfo;
29042 +
29043 +    LIST_FOR_EACH(p_Pos, &p_CrntMdfManip->nodesLst)
29044 +    {
29045 +        p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
29046 +        p_NodePtrOnCurrentMdfManip =
29047 +                (t_FmPcdCcNode *)p_CcNodeInformation->h_CcNode;
29048 +
29049 +        ASSERT_COND(p_NodePtrOnCurrentMdfManip);
29050 +
29051 +        /* Search in the previous node which exact index points on this current modified node for getting AD */
29052 +        for (i = 0; i < p_NodePtrOnCurrentMdfManip->numOfKeys + 1; i++)
29053 +        {
29054 +            if (p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].nextEngineParams.nextEngine
29055 +                    == e_FM_PCD_CC)
29056 +            {
29057 +                if (p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].nextEngineParams.h_Manip
29058 +                        == (t_Handle)p_CrntMdfManip)
29059 +                {
29060 +                    if (p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].p_StatsObj)
29061 +                        p_AdTablePtOnCrntCurrentMdfNode =
29062 +                                p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].p_StatsObj->h_StatsAd;
29063 +                    else
29064 +                        p_AdTablePtOnCrntCurrentMdfNode =
29065 +                                PTR_MOVE(p_NodePtrOnCurrentMdfManip->h_AdTable, i*FM_PCD_CC_AD_ENTRY_SIZE);
29066 +
29067 +                    memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
29068 +                    ccNodeInfo.h_CcNode = p_AdTablePtOnCrntCurrentMdfNode;
29069 +                    EnqueueNodeInfoToRelevantLst(h_NodesLst, &ccNodeInfo, NULL);
29070 +                }
29071 +            }
29072 +        }
29073 +
29074 +        ASSERT_COND(i != p_NodePtrOnCurrentMdfManip->numOfKeys);
29075 +    }
29076 +}
29077 +
29078 +static void BuildHmtd(uint8_t *p_Dest, uint8_t *p_Src, uint8_t *p_Hmcd,
29079 +                      t_FmPcd *p_FmPcd)
29080 +{
29081 +    t_Error err;
29082 +
29083 +    /* Copy the HMTD */
29084 +    MemCpy8(p_Dest, (uint8_t*)p_Src, 16);
29085 +    /* Replace the HMCT table pointer  */
29086 +    WRITE_UINT32(
29087 +            ((t_Hmtd *)p_Dest)->hmcdBasePtr,
29088 +            (uint32_t)(XX_VirtToPhys(p_Hmcd) - ((t_FmPcd*)p_FmPcd)->physicalMuramBase));
29089 +    /* Call Host Command to replace HMTD by a new HMTD */
29090 +    err = FmHcPcdCcDoDynamicChange(
29091 +            p_FmPcd->h_Hc,
29092 +            (uint32_t)(XX_VirtToPhys(p_Src) - p_FmPcd->physicalMuramBase),
29093 +            (uint32_t)(XX_VirtToPhys(p_Dest) - p_FmPcd->physicalMuramBase));
29094 +    if (err)
29095 +        REPORT_ERROR(MINOR, err, ("Failed in dynamic manip change, continued to the rest of the owners."));
29096 +}
29097 +
29098 +static t_Error FmPcdManipInitUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams,
29099 +                                    t_Handle h_FmPort, t_Handle h_Manip,
29100 +                                    t_Handle h_Ad, bool validate, int level,
29101 +                                    t_Handle h_FmTree)
29102 +{
29103 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29104 +    t_Error err = E_OK;
29105 +
29106 +    SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
29107 +
29108 +    UNUSED(level);
29109 +    UNUSED(h_FmTree);
29110 +
29111 +    switch (p_Manip->opcode)
29112 +    {
29113 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29114 +        case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
29115 +        err = UpdateInitMvIntFrameHeaderFromFrameToBufferPrefix(h_FmPort,
29116 +                p_Manip,
29117 +                h_Ad,
29118 +                validate);
29119 +        break;
29120 +        case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
29121 +        if (!p_Manip->h_Frag)
29122 +        break;
29123 +        case (HMAN_OC_CAPWAP_FRAGMENTATION):
29124 +        err = UpdateInitCapwapFragmentation(h_FmPort, p_Manip, h_Ad, validate, h_FmTree);
29125 +        break;
29126 +        case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
29127 +        if (p_Manip->h_Frag)
29128 +        err = UpdateInitCapwapReasm(h_FmPcd, h_FmPort, p_Manip, h_Ad, validate);
29129 +        break;
29130 +        case (HMAN_OC_CAPWAP_INDEXED_STATS):
29131 +        err = UpdateIndxStats(h_FmPcd, h_FmPort, p_Manip);
29132 +        break;
29133 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29134 +        case (HMAN_OC_IP_REASSEMBLY):
29135 +            err = UpdateInitReasm(h_FmPcd, h_PcdParams, h_FmPort, p_Manip, h_Ad,
29136 +                                  validate);
29137 +            break;
29138 +        case (HMAN_OC_IP_FRAGMENTATION):
29139 +            err = UpdateInitIpFrag(h_FmPcd, h_PcdParams, h_FmPort, p_Manip,
29140 +                                   h_Ad, validate);
29141 +            break;
29142 +#if (DPAA_VERSION >= 11)
29143 +        case (HMAN_OC_CAPWAP_FRAGMENTATION):
29144 +            err = UpdateInitCapwapFrag(h_FmPcd, h_PcdParams, h_FmPort, p_Manip,
29145 +                                       h_Ad, validate);
29146 +            break;
29147 +        case (HMAN_OC_CAPWAP_REASSEMBLY):
29148 +            err = UpdateInitReasm(h_FmPcd, h_PcdParams, h_FmPort, p_Manip, h_Ad,
29149 +                                  validate);
29150 +            break;
29151 +#endif /* (DPAA_VERSION >= 11) */
29152 +        default:
29153 +            return E_OK;
29154 +    }
29155 +
29156 +    return err;
29157 +}
29158 +
29159 +static t_Error FmPcdManipModifyUpdate(t_Handle h_Manip, t_Handle h_Ad,
29160 +                                      bool validate, int level,
29161 +                                      t_Handle h_FmTree)
29162 +{
29163 +
29164 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29165 +    t_Error err = E_OK;
29166 +
29167 +    UNUSED(level);
29168 +
29169 +    switch (p_Manip->opcode)
29170 +    {
29171 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29172 +        case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
29173 +        RETURN_ERROR(
29174 +                MAJOR,
29175 +                E_INVALID_STATE,
29176 +                ("modify node with this type of manipulation  is not suppported"));
29177 +        case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
29178 +
29179 +        if (p_Manip->h_Frag)
29180 +        {
29181 +            if (!(p_Manip->shadowUpdateParams & NUM_OF_TASKS)
29182 +                    && !(p_Manip->shadowUpdateParams & OFFSET_OF_DATA)
29183 +                    && !(p_Manip->shadowUpdateParams & OFFSET_OF_PR))
29184 +            RETURN_ERROR(
29185 +                    MAJOR,
29186 +                    E_INVALID_STATE,
29187 +                    ("modify node with this type of manipulation requires manipulation be updated previously in SetPcd function"));
29188 +        }
29189 +        break;
29190 +        case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
29191 +        if (p_Manip->h_Frag)
29192 +        err = UpdateModifyCapwapFragmenation(p_Manip, h_Ad, validate, h_FmTree);
29193 +        break;
29194 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29195 +        default:
29196 +            return E_OK;
29197 +    }
29198 +
29199 +    return err;
29200 +}
29201 +
29202 +/*****************************************************************************/
29203 +/*              Inter-module API routines                                    */
29204 +/*****************************************************************************/
29205 +
29206 +t_Error FmPcdManipUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams,
29207 +                         t_Handle h_FmPort, t_Handle h_Manip, t_Handle h_Ad,
29208 +                         bool validate, int level, t_Handle h_FmTree,
29209 +                         bool modify)
29210 +{
29211 +    t_Error err;
29212 +
29213 +    if (!modify)
29214 +        err = FmPcdManipInitUpdate(h_FmPcd, h_PcdParams, h_FmPort, h_Manip,
29215 +                                   h_Ad, validate, level, h_FmTree);
29216 +    else
29217 +        err = FmPcdManipModifyUpdate(h_Manip, h_Ad, validate, level, h_FmTree);
29218 +
29219 +    return err;
29220 +}
29221 +
29222 +void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add)
29223 +{
29224 +
29225 +    uint32_t intFlags;
29226 +
29227 +    intFlags = XX_LockIntrSpinlock(((t_FmPcdManip *)h_Manip)->h_Spinlock);
29228 +    if (add)
29229 +        ((t_FmPcdManip *)h_Manip)->owner++;
29230 +    else
29231 +    {
29232 +        ASSERT_COND(((t_FmPcdManip *)h_Manip)->owner);
29233 +        ((t_FmPcdManip *)h_Manip)->owner--;
29234 +    }
29235 +    XX_UnlockIntrSpinlock(((t_FmPcdManip *)h_Manip)->h_Spinlock, intFlags);
29236 +}
29237 +
29238 +t_List *FmPcdManipGetNodeLstPointedOnThisManip(t_Handle h_Manip)
29239 +{
29240 +    ASSERT_COND(h_Manip);
29241 +    return &((t_FmPcdManip *)h_Manip)->nodesLst;
29242 +}
29243 +
29244 +t_List *FmPcdManipGetSpinlock(t_Handle h_Manip)
29245 +{
29246 +    ASSERT_COND(h_Manip);
29247 +    return ((t_FmPcdManip *)h_Manip)->h_Spinlock;
29248 +}
29249 +
29250 +t_Error FmPcdManipCheckParamsForCcNextEngine(
29251 +        t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
29252 +        uint32_t *requiredAction)
29253 +{
29254 +    t_FmPcdManip *p_Manip;
29255 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29256 +    t_Error err = E_OK;
29257 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))*/
29258 +    bool pointFromCc = TRUE;
29259 +
29260 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
29261 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams->h_Manip,
29262 +                              E_NULL_POINTER);
29263 +
29264 +    p_Manip = (t_FmPcdManip *)(p_FmPcdCcNextEngineParams->h_Manip);
29265 +    *requiredAction = 0;
29266 +
29267 +    while (p_Manip)
29268 +    {
29269 +        switch (p_Manip->opcode)
29270 +        {
29271 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29272 +            case (HMAN_OC_CAPWAP_INDEXED_STATS):
29273 +                if (p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_DONE)
29274 +                    RETURN_ERROR(MAJOR,        E_INVALID_STATE, ("For this type of header manipulation has to be nextEngine e_FM_PCD_DONE"));
29275 +                if (p_FmPcdCcNextEngineParams->params.enqueueParams.overrideFqid)
29276 +                    p_Manip->cnia = TRUE;
29277 +            case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
29278 +                *requiredAction = UPDATE_NIA_ENQ_WITHOUT_DMA;
29279 +            case (HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR):
29280 +                p_Manip->ownerTmp++;
29281 +                break;
29282 +            case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
29283 +                if ((p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_DONE)
29284 +                    && !p_FmPcdCcNextEngineParams->params.enqueueParams.overrideFqid)
29285 +                    RETURN_ERROR(
29286 +                        MAJOR,
29287 +                        E_INVALID_STATE,
29288 +                        ("For this type of header manipulation has to be nextEngine e_FM_PCD_DONE with fqidForCtrlFlow FALSE"));
29289 +                p_Manip->ownerTmp++;
29290 +                break;
29291 +            case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
29292 +                if ((p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_CC)
29293 +                    && (FmPcdCcGetParseCode(p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode)
29294 +                        != CC_PC_GENERIC_IC_HASH_INDEXED))
29295 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("For this type of header manipulation next engine has to be CC and action = e_FM_PCD_ACTION_INDEXED_LOOKUP"));
29296 +                err = UpdateManipIc(p_FmPcdCcNextEngineParams->h_Manip,
29297 +                                    FmPcdCcGetOffset(p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode));
29298 +                if (err)
29299 +                    RETURN_ERROR(MAJOR, err, NO_MSG);
29300 +                *requiredAction = UPDATE_NIA_ENQ_WITHOUT_DMA;
29301 +                break;
29302 + #endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29303 +            case (HMAN_OC_IP_FRAGMENTATION):
29304 +            case (HMAN_OC_IP_REASSEMBLY):
29305 +#if (DPAA_VERSION >= 11)
29306 +            case (HMAN_OC_CAPWAP_REASSEMBLY):
29307 +            case (HMAN_OC_CAPWAP_FRAGMENTATION):
29308 +#endif /* (DPAA_VERSION >= 11) */
29309 +                if (p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_DONE)
29310 +                    RETURN_ERROR(
29311 +                            MAJOR,
29312 +                            E_INVALID_STATE,
29313 +                            ("For this type of header manipulation has to be nextEngine e_FM_PCD_DONE"));
29314 +                p_Manip->ownerTmp++;
29315 +                break;
29316 +            case (HMAN_OC_IPSEC_MANIP):
29317 +#if (DPAA_VERSION >= 11)
29318 +            case (HMAN_OC_CAPWAP_MANIP):
29319 +#endif /* (DPAA_VERSION >= 11) */
29320 +                p_Manip->ownerTmp++;
29321 +                break;
29322 +            case (HMAN_OC):
29323 +                if ((p_FmPcdCcNextEngineParams->nextEngine == e_FM_PCD_CC)
29324 +                        && MANIP_IS_CASCADED(p_Manip))
29325 +                    RETURN_ERROR(
29326 +                            MINOR,
29327 +                            E_INVALID_STATE,
29328 +                            ("Can't have a cascaded manipulation when and Next Engine is CC"));
29329 +                if (!MANIP_IS_FIRST(p_Manip) && pointFromCc)
29330 +                    RETURN_ERROR(
29331 +                            MAJOR,
29332 +                            E_INVALID_STATE,
29333 +                            ("h_Manip is already used and may not be shared (no sharing of non-head manip nodes)"));
29334 +                break;
29335 +            default:
29336 +                RETURN_ERROR(
29337 +                        MAJOR, E_INVALID_STATE,
29338 +                        ("invalid type of header manipulation for this state"));
29339 +        }
29340 +        p_Manip = p_Manip->h_NextManip;
29341 +        pointFromCc = FALSE;
29342 +    }
29343 +    return E_OK;
29344 +}
29345 +
29346 +
29347 +t_Error FmPcdManipCheckParamsWithCcNodeParams(t_Handle h_Manip,
29348 +                                              t_Handle h_FmPcdCcNode)
29349 +{
29350 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29351 +    t_Error err = E_OK;
29352 +
29353 +    SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
29354 +    SANITY_CHECK_RETURN_ERROR(h_FmPcdCcNode, E_INVALID_HANDLE);
29355 +
29356 +    switch (p_Manip->opcode)
29357 +    {
29358 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29359 +        case (HMAN_OC_CAPWAP_INDEXED_STATS):
29360 +        if (p_Manip->ownerTmp != FmPcdCcGetNumOfKeys(h_FmPcdCcNode))
29361 +        RETURN_ERROR(
29362 +                MAJOR,
29363 +                E_INVALID_VALUE,
29364 +                ("The manipulation of the type statistics flowId if exist has to be pointed by all numOfKeys"));
29365 +        break;
29366 +        case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
29367 +        if (p_Manip->h_Frag)
29368 +        {
29369 +            if (p_Manip->ownerTmp != FmPcdCcGetNumOfKeys(h_FmPcdCcNode))
29370 +            RETURN_ERROR(
29371 +                    MAJOR,
29372 +                    E_INVALID_VALUE,
29373 +                    ("The manipulation of the type remove DTLS if exist has to be pointed by all numOfKeys"));
29374 +            err = UpdateManipIc(h_Manip, FmPcdCcGetOffset(h_FmPcdCcNode));
29375 +            if (err)
29376 +            RETURN_ERROR(MAJOR, err, NO_MSG);
29377 +        }
29378 +        break;
29379 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29380 +        default:
29381 +            break;
29382 +    }
29383 +
29384 +    return err;
29385 +}
29386 +
29387 +void FmPcdManipUpdateAdResultForCc(
29388 +        t_Handle h_Manip, t_FmPcdCcNextEngineParams *p_CcNextEngineParams,
29389 +        t_Handle p_Ad, t_Handle *p_AdNewPtr)
29390 +{
29391 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29392 +
29393 +    /* This routine creates a Manip AD and can return in "p_AdNewPtr"
29394 +     * either the new descriptor or NULL if it writes the Manip AD into p_AD (into the match table) */
29395 +
29396 +    ASSERT_COND(p_Manip);
29397 +    ASSERT_COND(p_CcNextEngineParams);
29398 +    ASSERT_COND(p_Ad);
29399 +    ASSERT_COND(p_AdNewPtr);
29400 +
29401 +    FmPcdManipUpdateOwner(h_Manip, TRUE);
29402 +
29403 +    /* According to "type", either build & initialize a new AD (p_AdNew) or initialize
29404 +     * p_Ad ( the AD in the match table) and set p_AdNew = NULL. */
29405 +    switch (p_Manip->opcode)
29406 +    {
29407 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29408 +        case (HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR):
29409 +        case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
29410 +        case (HMAN_OC_CAPWAP_INDEXED_STATS):
29411 +        *p_AdNewPtr = p_Manip->h_Ad;
29412 +        break;
29413 +        case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
29414 +        case (HMAN_OC_CAPWAP_FRAGMENTATION):
29415 +        WRITE_UINT32(((t_AdOfTypeResult *)p_Ad)->fqid,
29416 +                ((t_AdOfTypeResult *)(p_Manip->h_Ad))->fqid);
29417 +        WRITE_UINT32(((t_AdOfTypeResult *)p_Ad)->plcrProfile,
29418 +                ((t_AdOfTypeResult *)(p_Manip->h_Ad))->plcrProfile);
29419 +        WRITE_UINT32(((t_AdOfTypeResult *)p_Ad)->nia,
29420 +                ((t_AdOfTypeResult *)(p_Manip->h_Ad))->nia);
29421 +        *p_AdNewPtr = NULL;
29422 +        break;
29423 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29424 +        case (HMAN_OC_IPSEC_MANIP):
29425 +#if (DPAA_VERSION >= 11)
29426 +        case (HMAN_OC_CAPWAP_MANIP):
29427 +#endif /* (DPAA_VERSION >= 11) */
29428 +            *p_AdNewPtr = p_Manip->h_Ad;
29429 +            break;
29430 +        case (HMAN_OC_IP_FRAGMENTATION):
29431 +#if (DPAA_VERSION >= 11)
29432 +        case (HMAN_OC_CAPWAP_FRAGMENTATION):
29433 +#endif /* (DPAA_VERSION >= 11) */
29434 +            if ((p_CcNextEngineParams->nextEngine == e_FM_PCD_DONE)
29435 +                    && (!p_CcNextEngineParams->params.enqueueParams.overrideFqid))
29436 +            {
29437 +                memcpy((uint8_t *)p_Ad, (uint8_t *)p_Manip->h_Ad,
29438 +                       sizeof(t_AdOfTypeContLookup));
29439 +#if (DPAA_VERSION >= 11)
29440 +                WRITE_UINT32(
29441 +                        ((t_AdOfTypeContLookup *)p_Ad)->ccAdBase,
29442 +                        GET_UINT32(((t_AdOfTypeContLookup *)p_Ad)->ccAdBase) & ~FM_PCD_MANIP_IP_CNIA);
29443 +#endif /* (DPAA_VERSION >= 11) */
29444 +                *p_AdNewPtr = NULL;
29445 +            }
29446 +            else
29447 +                *p_AdNewPtr = p_Manip->h_Ad;
29448 +            break;
29449 +        case (HMAN_OC_IP_REASSEMBLY):
29450 +            if (FmPcdManipIpReassmIsIpv6Hdr(p_Manip))
29451 +            {
29452 +                if (!p_Manip->reassmParams.ip.ipv6Assigned)
29453 +                {
29454 +                    *p_AdNewPtr = p_Manip->reassmParams.ip.h_Ipv6Ad;
29455 +                    p_Manip->reassmParams.ip.ipv6Assigned = TRUE;
29456 +                    FmPcdManipUpdateOwner(h_Manip, FALSE);
29457 +                }
29458 +                else
29459 +                {
29460 +                    *p_AdNewPtr = p_Manip->reassmParams.ip.h_Ipv4Ad;
29461 +                    p_Manip->reassmParams.ip.ipv6Assigned = FALSE;
29462 +                }
29463 +            }
29464 +            else
29465 +                *p_AdNewPtr = p_Manip->reassmParams.ip.h_Ipv4Ad;
29466 +            memcpy((uint8_t *)p_Ad, (uint8_t *)*p_AdNewPtr,
29467 +                   sizeof(t_AdOfTypeContLookup));
29468 +            *p_AdNewPtr = NULL;
29469 +            break;
29470 +#if (DPAA_VERSION >= 11)
29471 +        case (HMAN_OC_CAPWAP_REASSEMBLY):
29472 +            *p_AdNewPtr = p_Manip->reassmParams.capwap.h_Ad;
29473 +            memcpy((uint8_t *)p_Ad, (uint8_t *)*p_AdNewPtr,
29474 +                   sizeof(t_AdOfTypeContLookup));
29475 +            *p_AdNewPtr = NULL;
29476 +            break;
29477 +#endif /* (DPAA_VERSION >= 11) */
29478 +        case (HMAN_OC):
29479 +            /* Allocate and initialize HMTD */
29480 +            *p_AdNewPtr = p_Manip->h_Ad;
29481 +            break;
29482 +        default:
29483 +            break;
29484 +    }
29485 +}
29486 +
29487 +void FmPcdManipUpdateAdContLookupForCc(t_Handle h_Manip, t_Handle p_Ad,
29488 +                                       t_Handle *p_AdNewPtr,
29489 +                                       uint32_t adTableOffset)
29490 +{
29491 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29492 +
29493 +    /* This routine creates a Manip AD and can return in "p_AdNewPtr"
29494 +     * either the new descriptor or NULL if it writes the Manip AD into p_AD (into the match table) */
29495 +    ASSERT_COND(p_Manip);
29496 +
29497 +    FmPcdManipUpdateOwner(h_Manip, TRUE);
29498 +
29499 +    switch (p_Manip->opcode)
29500 +    {
29501 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29502 +        case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
29503 +        WRITE_UINT32(((t_AdOfTypeContLookup *)p_Ad)->ccAdBase,
29504 +                ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->ccAdBase);
29505 +        WRITE_UINT32(
29506 +                ((t_AdOfTypeContLookup *)p_Ad)->matchTblPtr,
29507 +                ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->matchTblPtr);
29508 +        WRITE_UINT32(
29509 +                ((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets,
29510 +                ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->pcAndOffsets);
29511 +        WRITE_UINT32(((t_AdOfTypeContLookup *)p_Ad)->gmask,
29512 +                ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->gmask);
29513 +        WRITE_UINT32(
29514 +                ((t_AdOfTypeContLookup *)p_Ad)->ccAdBase,
29515 +                (GET_UINT32(((t_AdOfTypeContLookup *)p_Ad)->ccAdBase) | adTableOffset));
29516 +        *p_AdNewPtr = NULL;
29517 +        break;
29518 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29519 +        case (HMAN_OC):
29520 +            /* Initialize HMTD within the match table*/
29521 +            MemSet8(p_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
29522 +            /* copy the existing HMTD *//* ask Alla - memcpy??? */
29523 +            memcpy((uint8_t*)p_Ad, p_Manip->h_Ad, sizeof(t_Hmtd));
29524 +            /* update NADEN to be "1"*/
29525 +            WRITE_UINT16(
29526 +                    ((t_Hmtd *)p_Ad)->cfg,
29527 +                    (uint16_t)(GET_UINT16(((t_Hmtd *)p_Ad)->cfg) | HMTD_CFG_NEXT_AD_EN));
29528 +            /* update next action descriptor */
29529 +            WRITE_UINT16(((t_Hmtd *)p_Ad)->nextAdIdx,
29530 +                         (uint16_t)(adTableOffset >> 4));
29531 +            /* mark that Manip's HMTD is not used */
29532 +            *p_AdNewPtr = NULL;
29533 +            break;
29534 +
29535 +        default:
29536 +            break;
29537 +    }
29538 +}
29539 +
29540 +t_Error FmPcdManipBuildIpReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv,
29541 +                                      t_Handle h_CcTree, t_Handle h_Manip,
29542 +                                      bool isIpv4, uint8_t groupId)
29543 +{
29544 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29545 +    t_FmPcdKgSchemeParams *p_SchemeParams = NULL;
29546 +    t_Handle h_Scheme;
29547 +
29548 +    ASSERT_COND(p_FmPcd);
29549 +    ASSERT_COND(h_NetEnv);
29550 +    ASSERT_COND(p_Manip);
29551 +
29552 +    /* scheme was already build, no need to check for IPv6 */
29553 +    if (p_Manip->reassmParams.ip.h_Ipv4Scheme)
29554 +        return E_OK;
29555 +
29556 +    if (isIpv4) {
29557 +        h_Scheme = FmPcdKgGetSchemeHandle(p_FmPcd, p_Manip->reassmParams.ip.relativeSchemeId[0]);
29558 +        if (h_Scheme) {
29559 +            /* scheme was found */
29560 +            p_Manip->reassmParams.ip.h_Ipv4Scheme = h_Scheme;
29561 +            return E_OK;
29562 +        }
29563 +    } else {
29564 +        h_Scheme = FmPcdKgGetSchemeHandle(p_FmPcd, p_Manip->reassmParams.ip.relativeSchemeId[1]);
29565 +        if (h_Scheme) {
29566 +            /* scheme was found */
29567 +            p_Manip->reassmParams.ip.h_Ipv6Scheme = h_Scheme;
29568 +            return E_OK;
29569 +        }
29570 +    }
29571 +
29572 +     p_SchemeParams = XX_Malloc(sizeof(t_FmPcdKgSchemeParams));
29573 +    if (!p_SchemeParams)
29574 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
29575 +                     ("Memory allocation failed for scheme"));
29576 +
29577 +    /* Configures the IPv4 or IPv6 scheme*/
29578 +    memset(p_SchemeParams, 0, sizeof(t_FmPcdKgSchemeParams));
29579 +    p_SchemeParams->netEnvParams.h_NetEnv = h_NetEnv;
29580 +    p_SchemeParams->id.relativeSchemeId = (uint8_t)(
29581 +            (isIpv4 == TRUE) ? p_Manip->reassmParams.ip.relativeSchemeId[0] :
29582 +                    p_Manip->reassmParams.ip.relativeSchemeId[1]);
29583 +    p_SchemeParams->schemeCounter.update = TRUE;
29584 +#if (DPAA_VERSION >= 11)
29585 +    p_SchemeParams->alwaysDirect = TRUE;
29586 +    p_SchemeParams->bypassFqidGeneration = TRUE;
29587 +#else
29588 +    p_SchemeParams->keyExtractAndHashParams.hashDistributionNumOfFqids = 1;
29589 +    p_SchemeParams->baseFqid = 0xFFFFFF; /*TODO- baseFqid*/
29590 +#endif /* (DPAA_VERSION >= 11) */
29591 +
29592 +    setIpReassmSchemeParams(p_FmPcd, p_SchemeParams, h_CcTree, isIpv4, groupId);
29593 +
29594 +    /* Sets the new scheme */
29595 +    if (isIpv4)
29596 +        p_Manip->reassmParams.ip.h_Ipv4Scheme = FM_PCD_KgSchemeSet(
29597 +                p_FmPcd, p_SchemeParams);
29598 +    else
29599 +        p_Manip->reassmParams.ip.h_Ipv6Scheme = FM_PCD_KgSchemeSet(
29600 +                p_FmPcd, p_SchemeParams);
29601 +
29602 +    XX_Free(p_SchemeParams);
29603 +
29604 +    return E_OK;
29605 +}
29606 +
29607 +t_Error FmPcdManipDeleteIpReassmSchemes(t_Handle h_Manip)
29608 +{
29609 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29610 +
29611 +    ASSERT_COND(p_Manip);
29612 +
29613 +    if ((p_Manip->reassmParams.ip.h_Ipv4Scheme) &&
29614 +        !FmPcdKgIsSchemeHasOwners(p_Manip->reassmParams.ip.h_Ipv4Scheme))
29615 +        FM_PCD_KgSchemeDelete(p_Manip->reassmParams.ip.h_Ipv4Scheme);
29616 +
29617 +    if ((p_Manip->reassmParams.ip.h_Ipv6Scheme) &&
29618 +        !FmPcdKgIsSchemeHasOwners(p_Manip->reassmParams.ip.h_Ipv6Scheme))
29619 +        FM_PCD_KgSchemeDelete(p_Manip->reassmParams.ip.h_Ipv6Scheme);
29620 +
29621 +    return E_OK;
29622 +}
29623 +
29624 +bool FmPcdManipIpReassmIsIpv6Hdr(t_Handle h_Manip)
29625 +{
29626 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29627 +
29628 +    ASSERT_COND(p_Manip);
29629 +
29630 +    return (p_Manip->reassmParams.hdr == HEADER_TYPE_IPv6);
29631 +}
29632 +
29633 +t_Error FmPcdManipBuildCapwapReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv,
29634 +                                          t_Handle h_CcTree, t_Handle h_Manip,
29635 +                                          uint8_t groupId)
29636 +{
29637 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29638 +    t_FmPcdKgSchemeParams *p_SchemeParams = NULL;
29639 +
29640 +    ASSERT_COND(p_FmPcd);
29641 +    ASSERT_COND(h_NetEnv);
29642 +    ASSERT_COND(p_Manip);
29643 +
29644 +    /* scheme was already build, no need to check for IPv6 */
29645 +    if (p_Manip->reassmParams.capwap.h_Scheme)
29646 +        return E_OK;
29647 +
29648 +    p_SchemeParams = XX_Malloc(sizeof(t_FmPcdKgSchemeParams));
29649 +    if (!p_SchemeParams)
29650 +        RETURN_ERROR(MAJOR, E_NO_MEMORY,
29651 +                     ("Memory allocation failed for scheme"));
29652 +
29653 +    memset(p_SchemeParams, 0, sizeof(t_FmPcdKgSchemeParams));
29654 +    p_SchemeParams->netEnvParams.h_NetEnv = h_NetEnv;
29655 +    p_SchemeParams->id.relativeSchemeId =
29656 +            (uint8_t)p_Manip->reassmParams.capwap.relativeSchemeId;
29657 +    p_SchemeParams->schemeCounter.update = TRUE;
29658 +    p_SchemeParams->bypassFqidGeneration = TRUE;
29659 +
29660 +    setCapwapReassmSchemeParams(p_FmPcd, p_SchemeParams, h_CcTree, groupId);
29661 +
29662 +    p_Manip->reassmParams.capwap.h_Scheme = FM_PCD_KgSchemeSet(p_FmPcd,
29663 +                                                               p_SchemeParams);
29664 +
29665 +    XX_Free(p_SchemeParams);
29666 +
29667 +    return E_OK;
29668 +}
29669 +
29670 +t_Error FmPcdManipDeleteCapwapReassmSchemes(t_Handle h_Manip)
29671 +{
29672 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29673 +
29674 +    ASSERT_COND(p_Manip);
29675 +
29676 +    if (p_Manip->reassmParams.capwap.h_Scheme)
29677 +        FM_PCD_KgSchemeDelete(p_Manip->reassmParams.capwap.h_Scheme);
29678 +
29679 +    return E_OK;
29680 +}
29681 +
29682 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29683 +t_Handle FmPcdManipApplSpecificBuild(void)
29684 +{
29685 +    t_FmPcdManip *p_Manip;
29686 +
29687 +    p_Manip = (t_FmPcdManip*)XX_Malloc(sizeof(t_FmPcdManip));
29688 +    if (!p_Manip)
29689 +    {
29690 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
29691 +        return NULL;
29692 +    }
29693 +    memset(p_Manip, 0, sizeof(t_FmPcdManip));
29694 +
29695 +    p_Manip->opcode = HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX;
29696 +    p_Manip->muramAllocate = FALSE;
29697 +
29698 +    p_Manip->h_Ad = (t_Handle)XX_Malloc(FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
29699 +    if (!p_Manip->h_Ad)
29700 +    {
29701 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Allocation of Manipulation action descriptor"));
29702 +        XX_Free(p_Manip);
29703 +        return NULL;
29704 +    }
29705 +
29706 +    memset(p_Manip->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
29707 +
29708 +    /*treatFdStatusFieldsAsErrors = TRUE hardcoded - assumption its always come after CAAM*/
29709 +    /*Application specific = type of flowId index, move internal frame header from data to IC,
29710 +     SEC errors check*/
29711 +    if (MvIntFrameHeaderFromFrameToBufferPrefix(p_Manip, TRUE)!= E_OK)
29712 +    {
29713 +        XX_Free(p_Manip->h_Ad);
29714 +        XX_Free(p_Manip);
29715 +        return NULL;
29716 +    }
29717 +    return p_Manip;
29718 +}
29719 +
29720 +bool FmPcdManipIsCapwapApplSpecific(t_Handle h_Manip)
29721 +{
29722 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
29723 +    ASSERT_COND(h_Manip);
29724 +
29725 +    return (bool)((p_Manip->opcode == HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST) ? TRUE : FALSE);
29726 +}
29727 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29728 +/*********************** End of inter-module routines ************************/
29729 +
29730 +/****************************************/
29731 +/*       API Init unit functions        */
29732 +/****************************************/
29733 +
29734 +t_Handle FM_PCD_ManipNodeSet(t_Handle h_FmPcd,
29735 +                             t_FmPcdManipParams *p_ManipParams)
29736 +{
29737 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
29738 +    t_FmPcdManip *p_Manip;
29739 +    t_Error err;
29740 +
29741 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
29742 +    SANITY_CHECK_RETURN_VALUE(p_ManipParams, E_INVALID_HANDLE, NULL);
29743 +
29744 +    p_Manip = ManipOrStatsSetNode(h_FmPcd, (t_Handle)p_ManipParams, FALSE);
29745 +    if (!p_Manip)
29746 +        return NULL;
29747 +
29748 +    if (((p_Manip->opcode == HMAN_OC_IP_REASSEMBLY)
29749 +            || (p_Manip->opcode == HMAN_OC_IP_FRAGMENTATION)
29750 +            || (p_Manip->opcode == HMAN_OC)
29751 +            || (p_Manip->opcode == HMAN_OC_IPSEC_MANIP)
29752 +#if (DPAA_VERSION >= 11)
29753 +            || (p_Manip->opcode == HMAN_OC_CAPWAP_MANIP)
29754 +            || (p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION)
29755 +            || (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY)
29756 +#endif /* (DPAA_VERSION >= 11) */
29757 +            ) && (!FmPcdIsAdvancedOffloadSupported(p_FmPcd)))
29758 +    {
29759 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Advanced-offload must be enabled"));
29760 +        XX_Free(p_Manip);
29761 +        return NULL;
29762 +    }
29763 +    p_Manip->h_Spinlock = XX_InitSpinlock();
29764 +    if (!p_Manip->h_Spinlock)
29765 +    {
29766 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
29767 +        ReleaseManipHandler(p_Manip, p_FmPcd);
29768 +        XX_Free(p_Manip);
29769 +        return NULL;
29770 +    }INIT_LIST(&p_Manip->nodesLst);
29771 +
29772 +    switch (p_Manip->opcode)
29773 +    {
29774 +        case (HMAN_OC_IP_REASSEMBLY):
29775 +            /* IpReassembly */
29776 +            err = IpReassembly(&p_ManipParams->u.reassem, p_Manip);
29777 +            break;
29778 +        case (HMAN_OC_IP_FRAGMENTATION):
29779 +            /* IpFragmentation */
29780 +            err = IpFragmentation(&p_ManipParams->u.frag.u.ipFrag, p_Manip);
29781 +            if (err)
29782 +                break;
29783 +            err = IPManip(p_Manip);
29784 +            break;
29785 +        case (HMAN_OC_IPSEC_MANIP):
29786 +            err = IPSecManip(p_ManipParams, p_Manip);
29787 +            break;
29788 +#if (DPAA_VERSION >= 11)
29789 +        case (HMAN_OC_CAPWAP_REASSEMBLY):
29790 +            /* CapwapReassembly */
29791 +            err = CapwapReassembly(&p_ManipParams->u.reassem, p_Manip);
29792 +            break;
29793 +        case (HMAN_OC_CAPWAP_FRAGMENTATION):
29794 +            /* CapwapFragmentation */
29795 +            err = CapwapFragmentation(&p_ManipParams->u.frag.u.capwapFrag,
29796 +                                      p_Manip);
29797 +            break;
29798 +        case (HMAN_OC_CAPWAP_MANIP):
29799 +            err = CapwapManip(p_ManipParams, p_Manip);
29800 +            break;
29801 +#endif /* (DPAA_VERSION >= 11) */
29802 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
29803 +            case (HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR):
29804 +            /* HmanType1 */
29805 +            err = RmvHdrTillSpecLocNOrInsrtIntFrmHdr(&p_ManipParams->u.hdr.rmvParams, p_Manip);
29806 +            break;
29807 +            case (HMAN_OC_CAPWAP_FRAGMENTATION):
29808 +            err = CapwapFragmentation(&p_ManipParams->fragOrReasmParams.u.capwapFragParams,
29809 +                    p_Manip,
29810 +                    p_FmPcd,
29811 +                    p_ManipParams->fragOrReasmParams.sgBpid);
29812 +            if (err)
29813 +            {
29814 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
29815 +                ReleaseManipHandler(p_Manip, p_FmPcd);
29816 +                XX_Free(p_Manip);
29817 +                return NULL;
29818 +            }
29819 +            if (p_Manip->insrt)
29820 +            p_Manip->opcode = HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER;
29821 +            case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
29822 +            /* HmanType2 + if user asked only for fragmentation still need to allocate HmanType2 */
29823 +            err = InsrtHdrByTempl(&p_ManipParams->u.hdr.insrtParams, p_Manip, p_FmPcd);
29824 +            break;
29825 +            case (HMAN_OC_CAPWAP_REASSEMBLY):
29826 +            err = CapwapReassembly(&p_ManipParams->fragOrReasmParams.u.capwapReasmParams,
29827 +                    p_Manip,
29828 +                    p_FmPcd,
29829 +                    p_ManipParams->fragOrReasmParams.sgBpid);
29830 +            if (err)
29831 +            {
29832 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
29833 +                ReleaseManipHandler(p_Manip, p_FmPcd);
29834 +                XX_Free(p_Manip);
29835 +                return NULL;
29836 +            }
29837 +            if (p_Manip->rmv)
29838 +            p_Manip->opcode = HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST;
29839 +            case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
29840 +            /*CAPWAP decapsulation + if user asked only for reassembly still need to allocate CAPWAP decapsulation*/
29841 +            err = CapwapRmvDtlsHdr(p_FmPcd, p_Manip);
29842 +            break;
29843 +            case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
29844 +            /*Application Specific type 1*/
29845 +            err = MvIntFrameHeaderFromFrameToBufferPrefix(p_Manip, TRUE);
29846 +            break;
29847 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
29848 +        case (HMAN_OC):
29849 +            /* New Manip */
29850 +            err = CreateManipActionNew(p_Manip, p_ManipParams);
29851 +            break;
29852 +        default:
29853 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
29854 +            ReleaseManipHandler(p_Manip, p_FmPcd);
29855 +            XX_Free(p_Manip);
29856 +            return NULL;
29857 +    }
29858 +
29859 +    if (err)
29860 +    {
29861 +        REPORT_ERROR(MAJOR, err, NO_MSG);
29862 +        ReleaseManipHandler(p_Manip, p_FmPcd);
29863 +        XX_Free(p_Manip);
29864 +        return NULL;
29865 +    }
29866 +
29867 +    if (p_ManipParams->h_NextManip)
29868 +    {
29869 +        /* in the check routine we've verified that h_NextManip has no owners
29870 +         * and that only supported types are allowed. */
29871 +        p_Manip->h_NextManip = p_ManipParams->h_NextManip;
29872 +        /* save a "prev" pointer in h_NextManip */
29873 +        MANIP_SET_PREV(p_Manip->h_NextManip, p_Manip);
29874 +        FmPcdManipUpdateOwner(p_Manip->h_NextManip, TRUE);
29875 +    }
29876 +
29877 +    return p_Manip;
29878 +}
29879 +
29880 +t_Error FM_PCD_ManipNodeReplace(t_Handle h_Manip,
29881 +                                t_FmPcdManipParams *p_ManipParams)
29882 +{
29883 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip, *p_FirstManip;
29884 +    t_FmPcd *p_FmPcd = (t_FmPcd *)(p_Manip->h_FmPcd);
29885 +    t_Error err;
29886 +    uint8_t *p_WholeHmct = NULL, *p_ShadowHmct = NULL, *p_Hmtd = NULL;
29887 +    t_List lstOfNodeshichPointsOnCrntMdfManip, *p_Pos;
29888 +    t_CcNodeInformation *p_CcNodeInfo;
29889 +    SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
29890 +    SANITY_CHECK_RETURN_ERROR(p_ManipParams, E_INVALID_HANDLE);
29891 +
29892 +    INIT_LIST(&lstOfNodeshichPointsOnCrntMdfManip);
29893 +
29894 +    if ((p_ManipParams->type != e_FM_PCD_MANIP_HDR)
29895 +            || (p_Manip->type != e_FM_PCD_MANIP_HDR))
29896 +        RETURN_ERROR(
29897 +                MINOR,
29898 +                E_NOT_SUPPORTED,
29899 +                ("FM_PCD_ManipNodeReplace Functionality supported only for Header Manipulation."));
29900 +
29901 +    ASSERT_COND(p_Manip->opcode == HMAN_OC);
29902 +    ASSERT_COND(p_Manip->manipParams.h_NextManip == p_Manip->h_NextManip);
29903 +    memcpy((uint8_t*)&p_Manip->manipParams, p_ManipParams,
29904 +           sizeof(p_Manip->manipParams));
29905 +    p_Manip->manipParams.h_NextManip = p_Manip->h_NextManip;
29906 +
29907 +    /* The replacement of the HdrManip depends on the node type.*/
29908 +    /*
29909 +     * (1) If this is an independent node, all its owners should be updated.
29910 +     *
29911 +     * (2) If it is the head of a cascaded chain (it does not have a "prev" but
29912 +     * it has a "next" and it has a "cascaded" indication), the next
29913 +     * node remains unchanged, and the behavior is as in (1).
29914 +     *
29915 +     * (3) If it is not the head, but a part of a cascaded chain, in can be
29916 +     * also replaced as a regular node with just one owner.
29917 +     *
29918 +     * (4) If it is a part of a chain implemented as a unified table, the
29919 +     * whole table is replaced and the owners of the head node must be updated.
29920 +     *
29921 +     */
29922 +    /* lock shadow */
29923 +    if (!p_FmPcd->p_CcShadow)
29924 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("CC Shadow not allocated"));
29925 +
29926 +    if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
29927 +        return ERROR_CODE(E_BUSY);
29928 +
29929 +    /* this routine creates a new manip action in the CC Shadow. */
29930 +    err = CreateManipActionShadow(p_Manip, p_ManipParams);
29931 +    if (err)
29932 +        RETURN_ERROR(MINOR, err, NO_MSG);
29933 +
29934 +    /* If the owners list is empty (these are NOT the "owners" counter, but pointers from CC)
29935 +     * replace only HMTD and no lcok is required. Otherwise
29936 +     * lock the whole PCD
29937 +     * In case 4 MANIP_IS_UNIFIED_NON_FIRST(p_Manip) - Use the head node instead. */
29938 +    if (!FmPcdLockTryLockAll(p_FmPcd))
29939 +    {
29940 +        DBG(TRACE, ("FmPcdLockTryLockAll failed"));
29941 +        return ERROR_CODE(E_BUSY);
29942 +    }
29943 +
29944 +    p_ShadowHmct = (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow, 16);
29945 +
29946 +    p_FirstManip = (t_FmPcdManip*)GetManipInfo(p_Manip,
29947 +                                               e_MANIP_HANDLER_TABLE_OWNER);
29948 +    ASSERT_COND(p_FirstManip);
29949 +
29950 +    if (!LIST_IsEmpty(&p_FirstManip->nodesLst))
29951 +        UpdateAdPtrOfNodesWhichPointsOnCrntMdfManip(
29952 +                p_FirstManip, &lstOfNodeshichPointsOnCrntMdfManip);
29953 +
29954 +    p_Hmtd = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMTD);
29955 +    ASSERT_COND(p_Hmtd);
29956 +    BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_Hmtd, p_ShadowHmct,
29957 +              ((t_FmPcd*)(p_Manip->h_FmPcd)));
29958 +
29959 +    LIST_FOR_EACH(p_Pos, &lstOfNodeshichPointsOnCrntMdfManip)
29960 +    {
29961 +        p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
29962 +        BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_CcNodeInfo->h_CcNode,
29963 +                  p_ShadowHmct, ((t_FmPcd*)(p_Manip->h_FmPcd)));
29964 +    }
29965 +
29966 +    p_WholeHmct = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMCT);
29967 +    ASSERT_COND(p_WholeHmct);
29968 +
29969 +    /* re-build the HMCT n the original location */
29970 +    err = CreateManipActionBackToOrig(p_Manip, p_ManipParams);
29971 +    if (err)
29972 +    {
29973 +        RELEASE_LOCK(p_FmPcd->shadowLock);
29974 +        RETURN_ERROR(MINOR, err, NO_MSG);
29975 +    }
29976 +
29977 +    p_Hmtd = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMTD);
29978 +    ASSERT_COND(p_Hmtd);
29979 +    BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_Hmtd, p_WholeHmct,
29980 +              ((t_FmPcd*)p_Manip->h_FmPcd));
29981 +
29982 +    /* If LIST > 0, create a list of p_Ad's that point to the HMCT. Join also t_HMTD to this list.
29983 +     * For each p_Hmct (from list+fixed):
29984 +     * call Host Command to replace HMTD by a new one */LIST_FOR_EACH(p_Pos, &lstOfNodeshichPointsOnCrntMdfManip)
29985 +    {
29986 +        p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
29987 +        BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_CcNodeInfo->h_CcNode,
29988 +                  p_WholeHmct, ((t_FmPcd*)(p_Manip->h_FmPcd)));
29989 +    }
29990 +
29991 +
29992 +    ReleaseLst(&lstOfNodeshichPointsOnCrntMdfManip);
29993 +
29994 +    FmPcdLockUnlockAll(p_FmPcd);
29995 +
29996 +    /* unlock shadow */
29997 +    RELEASE_LOCK(p_FmPcd->shadowLock);
29998 +
29999 +    return E_OK;
30000 +}
30001 +
30002 +t_Error FM_PCD_ManipNodeDelete(t_Handle h_ManipNode)
30003 +{
30004 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_ManipNode;
30005 +
30006 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
30007 +
30008 +    if (p_Manip->owner)
30009 +        RETURN_ERROR(
30010 +                MAJOR,
30011 +                E_INVALID_STATE,
30012 +                ("This manipulation node not be removed because this node is occupied, first - unbind this node "));
30013 +
30014 +    if (p_Manip->h_NextManip)
30015 +    {
30016 +        MANIP_SET_PREV(p_Manip->h_NextManip, NULL);
30017 +        FmPcdManipUpdateOwner(p_Manip->h_NextManip, FALSE);
30018 +    }
30019 +
30020 +    if (p_Manip->p_Hmct
30021 +            && (MANIP_IS_UNIFIED_FIRST(p_Manip) || !MANIP_IS_UNIFIED(p_Manip)))
30022 +        FM_MURAM_FreeMem(((t_FmPcd *)p_Manip->h_FmPcd)->h_FmMuram,
30023 +                         p_Manip->p_Hmct);
30024 +
30025 +    if (p_Manip->h_Spinlock)
30026 +    {
30027 +        XX_FreeSpinlock(p_Manip->h_Spinlock);
30028 +        p_Manip->h_Spinlock = NULL;
30029 +    }
30030 +
30031 +    ReleaseManipHandler(p_Manip, p_Manip->h_FmPcd);
30032 +
30033 +    XX_Free(h_ManipNode);
30034 +
30035 +    return E_OK;
30036 +}
30037 +
30038 +t_Error FM_PCD_ManipGetStatistics(t_Handle h_ManipNode,
30039 +                                  t_FmPcdManipStats *p_FmPcdManipStats)
30040 +{
30041 +    t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_ManipNode;
30042 +
30043 +    SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
30044 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdManipStats, E_NULL_POINTER);
30045 +
30046 +    switch (p_Manip->opcode)
30047 +    {
30048 +        case (HMAN_OC_IP_REASSEMBLY):
30049 +            return IpReassemblyStats(p_Manip,
30050 +                                     &p_FmPcdManipStats->u.reassem.u.ipReassem);
30051 +        case (HMAN_OC_IP_FRAGMENTATION):
30052 +            return IpFragmentationStats(p_Manip,
30053 +                                        &p_FmPcdManipStats->u.frag.u.ipFrag);
30054 +#if (DPAA_VERSION >= 11)
30055 +        case (HMAN_OC_CAPWAP_REASSEMBLY):
30056 +            return CapwapReassemblyStats(
30057 +                    p_Manip, &p_FmPcdManipStats->u.reassem.u.capwapReassem);
30058 +       case (HMAN_OC_CAPWAP_FRAGMENTATION):
30059 +               return CapwapFragmentationStats(
30060 +                       p_Manip, &p_FmPcdManipStats->u.frag.u.capwapFrag);
30061 +#endif /* (DPAA_VERSION >= 11) */
30062 +        default:
30063 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
30064 +                         ("no statistics to this type of manip"));
30065 +    }
30066 +
30067 +    return E_OK;
30068 +}
30069 +
30070 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
30071 +t_Handle FM_PCD_StatisticsSetNode(t_Handle h_FmPcd, t_FmPcdStatsParams *p_StatsParams)
30072 +{
30073 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
30074 +    t_FmPcdManip *p_Manip;
30075 +    t_Error err;
30076 +
30077 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd,E_INVALID_HANDLE,NULL);
30078 +    SANITY_CHECK_RETURN_VALUE(p_StatsParams,E_INVALID_HANDLE,NULL);
30079 +
30080 +    p_Manip = ManipOrStatsSetNode(h_FmPcd, (t_Handle)p_StatsParams, TRUE);
30081 +    if (!p_Manip)
30082 +    return NULL;
30083 +
30084 +    switch (p_Manip->opcode)
30085 +    {
30086 +        case (HMAN_OC_CAPWAP_INDEXED_STATS):
30087 +        /* Indexed statistics */
30088 +        err = IndxStats(p_StatsParams, p_Manip, p_FmPcd);
30089 +        break;
30090 +        default:
30091 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED Statistics type"));
30092 +        ReleaseManipHandler(p_Manip, p_FmPcd);
30093 +        XX_Free(p_Manip);
30094 +        return NULL;
30095 +    }
30096 +
30097 +    if (err)
30098 +    {
30099 +        REPORT_ERROR(MAJOR, err, NO_MSG);
30100 +        ReleaseManipHandler(p_Manip, p_FmPcd);
30101 +        XX_Free(p_Manip);
30102 +        return NULL;
30103 +    }
30104 +
30105 +    return p_Manip;
30106 +}
30107 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
30108 --- /dev/null
30109 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.h
30110 @@ -0,0 +1,555 @@
30111 +/*
30112 + * Copyright 2008-2012 Freescale Semiconductor Inc.
30113 + *
30114 + * Redistribution and use in source and binary forms, with or without
30115 + * modification, are permitted provided that the following conditions are met:
30116 + *     * Redistributions of source code must retain the above copyright
30117 + *       notice, this list of conditions and the following disclaimer.
30118 + *     * Redistributions in binary form must reproduce the above copyright
30119 + *       notice, this list of conditions and the following disclaimer in the
30120 + *       documentation and/or other materials provided with the distribution.
30121 + *     * Neither the name of Freescale Semiconductor nor the
30122 + *       names of its contributors may be used to endorse or promote products
30123 + *       derived from this software without specific prior written permission.
30124 + *
30125 + *
30126 + * ALTERNATIVELY, this software may be distributed under the terms of the
30127 + * GNU General Public License ("GPL") as published by the Free Software
30128 + * Foundation, either version 2 of that License or (at your option) any
30129 + * later version.
30130 + *
30131 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
30132 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
30133 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30134 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
30135 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30136 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30137 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30138 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30139 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30140 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30141 + */
30142 +
30143 +
30144 +/******************************************************************************
30145 + @File          fm_manip.h
30146 +
30147 + @Description   FM PCD manip...
30148 +*//***************************************************************************/
30149 +#ifndef __FM_MANIP_H
30150 +#define __FM_MANIP_H
30151 +
30152 +#include "std_ext.h"
30153 +#include "error_ext.h"
30154 +#include "list_ext.h"
30155 +
30156 +#include "fm_cc.h"
30157 +
30158 +
30159 +/***********************************************************************/
30160 +/*          Header manipulations defines                              */
30161 +/***********************************************************************/
30162 +
30163 +#define NUM_OF_SCRATCH_POOL_BUFFERS             1000 /*TODO - Change it!!*/
30164 +
30165 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
30166 +#define HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR                      0x2e
30167 +#define HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER              0x31
30168 +#define HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX     0x2f
30169 +#define HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST                        0x30
30170 +#define HMAN_OC_CAPWAP_REASSEMBLY                               0x11 /* dummy */
30171 +#define HMAN_OC_CAPWAP_INDEXED_STATS                            0x32 /* dummy */
30172 +#define HMAN_OC_CAPWAP_FRAGMENTATION                            0x33
30173 +#else
30174 +#define HMAN_OC_CAPWAP_MANIP                                    0x2F
30175 +#define HMAN_OC_CAPWAP_FRAG_CHECK                               0x2E
30176 +#define HMAN_OC_CAPWAP_FRAGMENTATION                            0x33
30177 +#define HMAN_OC_CAPWAP_REASSEMBLY                               0x30
30178 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
30179 +#define HMAN_OC_IP_MANIP                                        0x34
30180 +#define HMAN_OC_IP_FRAGMENTATION                                0x74
30181 +#define HMAN_OC_IP_REASSEMBLY                                   0xB4
30182 +#define HMAN_OC_IPSEC_MANIP                                     0xF4
30183 +#define HMAN_OC                                                 0x35
30184 +
30185 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
30186 +#define HMAN_RMV_HDR                               0x80000000
30187 +#define HMAN_INSRT_INT_FRM_HDR                     0x40000000
30188 +
30189 +#define UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP          6
30190 +#define UDP_CHECKSUM_FIELD_SIZE                     2
30191 +#define UDP_LENGTH_FIELD_OFFSET_FROM_UDP            4
30192 +
30193 +#define IPv4_DSCECN_FIELD_OFFSET_FROM_IP            1
30194 +#define IPv4_TOTALLENGTH_FIELD_OFFSET_FROM_IP       2
30195 +#define IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP       10
30196 +#define VLAN_TAG_FIELD_OFFSET_FROM_ETH              12
30197 +#define IPv4_ID_FIELD_OFFSET_FROM_IP                4
30198 +
30199 +#define IPv6_PAYLOAD_LENGTH_OFFSET_FROM_IP          4
30200 +#define IPv6_NEXT_HEADER_OFFSET_FROM_IP             6
30201 +
30202 +#define FM_PCD_MANIP_CAPWAP_REASM_TABLE_SIZE               0x80
30203 +#define FM_PCD_MANIP_CAPWAP_REASM_TABLE_ALIGN              8
30204 +#define FM_PCD_MANIP_CAPWAP_REASM_RFD_SIZE                 32
30205 +#define FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE 4
30206 +#define FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_ENTRY_SIZE      8
30207 +
30208 +
30209 +#define FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_BETWEEN_FRAMES          0x40000000
30210 +#define FM_PCD_MANIP_CAPWAP_REASM_HALT_ON_DUPLICATE_FRAG           0x10000000
30211 +#define FM_PCD_MANIP_CAPWAP_REASM_AUTOMATIC_LEARNIN_HASH_8_WAYS    0x08000000
30212 +#define FM_PCD_MANIP_CAPWAP_REASM_PR_COPY                          0x00800000
30213 +
30214 +#define FM_PCD_MANIP_CAPWAP_FRAG_COMPR_OPTION_FIELD_EN             0x80000000
30215 +
30216 +#define FM_PCD_MANIP_INDEXED_STATS_ENTRY_SIZE               4
30217 +#define FM_PCD_MANIP_INDEXED_STATS_CNIA                     0x20000000
30218 +#define FM_PCD_MANIP_INDEXED_STATS_DPD                      0x10000000
30219 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
30220 +
30221 +#if (DPAA_VERSION >= 11)
30222 +#define FM_PCD_MANIP_CAPWAP_DTLS                            0x00040000
30223 +#define FM_PCD_MANIP_CAPWAP_NADEN                           0x20000000
30224 +
30225 +#define FM_PCD_MANIP_CAPWAP_FRAG_CHECK_MTU_SHIFT            16
30226 +#define FM_PCD_MANIP_CAPWAP_FRAG_CHECK_NO_FRAGMENTATION     0xFFFF0000
30227 +#define FM_PCD_MANIP_CAPWAP_FRAG_CHECK_CNIA                 0x20000000
30228 +
30229 +#define FM_PCD_MANIP_CAPWAP_FRAG_COMPRESS_EN                0x04000000
30230 +#define FM_PCD_MANIP_CAPWAP_FRAG_SCRATCH_BPID               24
30231 +#define FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_EN                 0x08000000
30232 +#define FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_MASK               0xFF000000
30233 +#define FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_SHIFT              24
30234 +#endif /* (DPAA_VERSION >= 11) */
30235 +
30236 +#define FM_PCD_MANIP_REASM_TABLE_SIZE                    0x40
30237 +#define FM_PCD_MANIP_REASM_TABLE_ALIGN                   8
30238 +
30239 +#define FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_SIZE       64
30240 +#define FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_ALIGN      8
30241 +#define FM_PCD_MANIP_REASM_TIME_OUT_BETWEEN_FRAMES       0x80000000
30242 +#define FM_PCD_MANIP_REASM_COUPLING_ENABLE               0x40000000
30243 +#define FM_PCD_MANIP_REASM_COUPLING_MASK                 0xFF000000
30244 +#define FM_PCD_MANIP_REASM_COUPLING_SHIFT                24
30245 +#define FM_PCD_MANIP_REASM_LIODN_MASK                    0x0000003F
30246 +#define FM_PCD_MANIP_REASM_LIODN_SHIFT                   56
30247 +#define FM_PCD_MANIP_REASM_ELIODN_MASK                   0x000003c0
30248 +#define FM_PCD_MANIP_REASM_ELIODN_SHIFT                  38
30249 +#define FM_PCD_MANIP_REASM_COMMON_INT_BUFFER_IDX_MASK    0x000000FF
30250 +#define FM_PCD_MANIP_REASM_COMMON_INT_BUFFER_IDX_SHIFT   24
30251 +#define FM_PCD_MANIP_REASM_TIMEOUT_THREAD_THRESH        1024
30252 +
30253 +#define FM_PCD_MANIP_IP_MTU_SHIFT                           16
30254 +#define FM_PCD_MANIP_IP_NO_FRAGMENTATION                    0xFFFF0000
30255 +#define FM_PCD_MANIP_IP_CNIA                                0x20000000
30256 +
30257 +#define FM_PCD_MANIP_IP_FRAG_DF_SHIFT                       28
30258 +#define FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID                   24
30259 +#define FM_PCD_MANIP_IP_FRAG_SG_BDID_EN                     0x08000000
30260 +#define FM_PCD_MANIP_IP_FRAG_SG_BDID_MASK                   0xFF000000
30261 +#define FM_PCD_MANIP_IP_FRAG_SG_BDID_SHIFT                  24
30262 +
30263 +#define FM_PCD_MANIP_IPSEC_DEC                              0x10000000
30264 +#define FM_PCD_MANIP_IPSEC_VIPV_EN                          0x08000000
30265 +#define FM_PCD_MANIP_IPSEC_ECN_EN                           0x04000000
30266 +#define FM_PCD_MANIP_IPSEC_DSCP_EN                          0x02000000
30267 +#define FM_PCD_MANIP_IPSEC_VIPL_EN                          0x01000000
30268 +#define FM_PCD_MANIP_IPSEC_NADEN                            0x20000000
30269 +
30270 +#define FM_PCD_MANIP_IPSEC_IP_HDR_LEN_MASK                  0x00FF0000
30271 +#define FM_PCD_MANIP_IPSEC_IP_HDR_LEN_SHIFT                 16
30272 +
30273 +#define FM_PCD_MANIP_IPSEC_ARW_SIZE_MASK                    0xFFFF0000
30274 +#define FM_PCD_MANIP_IPSEC_ARW_SIZE_SHIFT                   16
30275 +
30276 +#define e_FM_MANIP_IP_INDX                                  1
30277 +
30278 +#define HMCD_OPCODE_GENERIC_RMV                 0x01
30279 +#define HMCD_OPCODE_GENERIC_INSRT               0x02
30280 +#define HMCD_OPCODE_GENERIC_REPLACE             0x05
30281 +#define HMCD_OPCODE_L2_RMV                      0x08
30282 +#define HMCD_OPCODE_L2_INSRT                    0x09
30283 +#define HMCD_OPCODE_VLAN_PRI_UPDATE             0x0B
30284 +#define HMCD_OPCODE_IPV4_UPDATE                 0x0C
30285 +#define HMCD_OPCODE_IPV6_UPDATE                 0x10
30286 +#define HMCD_OPCODE_TCP_UDP_UPDATE              0x0E
30287 +#define HMCD_OPCODE_TCP_UDP_CHECKSUM            0x14
30288 +#define HMCD_OPCODE_REPLACE_IP                  0x12
30289 +#define HMCD_OPCODE_RMV_TILL                    0x15
30290 +#define HMCD_OPCODE_UDP_INSRT                   0x16
30291 +#define HMCD_OPCODE_IP_INSRT                    0x17
30292 +#define HMCD_OPCODE_CAPWAP_RMV                  0x18
30293 +#define HMCD_OPCODE_CAPWAP_INSRT                0x18
30294 +#define HMCD_OPCODE_GEN_FIELD_REPLACE           0x19
30295 +
30296 +#define HMCD_LAST                               0x00800000
30297 +
30298 +#define HMCD_DSCP_VALUES                        64
30299 +
30300 +#define HMCD_BASIC_SIZE                         4
30301 +#define HMCD_PTR_SIZE                           4
30302 +#define HMCD_PARAM_SIZE                         4
30303 +#define HMCD_IPV4_ADDR_SIZE                     4
30304 +#define HMCD_IPV6_ADDR_SIZE                     0x10
30305 +#define HMCD_L4_HDR_SIZE                        8
30306 +
30307 +#define HMCD_CAPWAP_INSRT                       0x00010000
30308 +#define HMCD_INSRT_UDP_LITE                     0x00010000
30309 +#define HMCD_IP_ID_MASK                         0x0000FFFF
30310 +#define HMCD_IP_SIZE_MASK                       0x0000FF00
30311 +#define HMCD_IP_SIZE_SHIFT                      8
30312 +#define HMCD_IP_LAST_PID_MASK                   0x000000FF
30313 +#define HMCD_IP_OR_QOS                          0x00010000
30314 +#define HMCD_IP_L4_CS_CALC                      0x00040000
30315 +#define HMCD_IP_DF_MODE                         0x00400000
30316 +
30317 +
30318 +#define HMCD_OC_SHIFT                           24
30319 +
30320 +#define HMCD_RMV_OFFSET_SHIFT                   0
30321 +#define HMCD_RMV_SIZE_SHIFT                     8
30322 +
30323 +#define HMCD_INSRT_OFFSET_SHIFT                 0
30324 +#define HMCD_INSRT_SIZE_SHIFT                   8
30325 +
30326 +#define HMTD_CFG_TYPE                           0x4000
30327 +#define HMTD_CFG_EXT_HMCT                       0x0080
30328 +#define HMTD_CFG_PRS_AFTER_HM                   0x0040
30329 +#define HMTD_CFG_NEXT_AD_EN                     0x0020
30330 +
30331 +#define HMCD_RMV_L2_ETHERNET                    0
30332 +#define HMCD_RMV_L2_STACKED_QTAGS               1
30333 +#define HMCD_RMV_L2_ETHERNET_AND_MPLS           2
30334 +#define HMCD_RMV_L2_MPLS                        3
30335 +#define HMCD_RMV_L2_PPPOE                        4
30336 +
30337 +#define HMCD_INSRT_L2_MPLS                      0
30338 +#define HMCD_INSRT_N_UPDATE_L2_MPLS             1
30339 +#define HMCD_INSRT_L2_PPPOE                     2
30340 +#define HMCD_INSRT_L2_SIZE_SHIFT                24
30341 +
30342 +#define HMCD_L2_MODE_SHIFT                      16
30343 +
30344 +#define HMCD_VLAN_PRI_REP_MODE_SHIFT            16
30345 +#define HMCD_VLAN_PRI_UPDATE                    0
30346 +#define HMCD_VLAN_PRI_UPDATE_DSCP_TO_VPRI       1
30347 +
30348 +#define HMCD_IPV4_UPDATE_TTL                    0x00000001
30349 +#define HMCD_IPV4_UPDATE_TOS                    0x00000002
30350 +#define HMCD_IPV4_UPDATE_DST                    0x00000020
30351 +#define HMCD_IPV4_UPDATE_SRC                    0x00000040
30352 +#define HMCD_IPV4_UPDATE_ID                     0x00000080
30353 +#define HMCD_IPV4_UPDATE_TOS_SHIFT              8
30354 +
30355 +#define HMCD_IPV6_UPDATE_HL                     0x00000001
30356 +#define HMCD_IPV6_UPDATE_TC                     0x00000002
30357 +#define HMCD_IPV6_UPDATE_DST                    0x00000040
30358 +#define HMCD_IPV6_UPDATE_SRC                    0x00000080
30359 +#define HMCD_IPV6_UPDATE_TC_SHIFT               8
30360 +
30361 +#define HMCD_TCP_UDP_UPDATE_DST                 0x00004000
30362 +#define HMCD_TCP_UDP_UPDATE_SRC                 0x00008000
30363 +#define HMCD_TCP_UDP_UPDATE_SRC_SHIFT           16
30364 +
30365 +#define HMCD_IP_REPLACE_REPLACE_IPV4            0x00000000
30366 +#define HMCD_IP_REPLACE_REPLACE_IPV6            0x00010000
30367 +#define HMCD_IP_REPLACE_TTL_HL                  0x00200000
30368 +#define HMCD_IP_REPLACE_ID                      0x00400000
30369 +
30370 +#define HMCD_IP_REPLACE_L3HDRSIZE_SHIFT         24
30371 +
30372 +#define HMCD_GEN_FIELD_SIZE_SHIFT               16
30373 +#define HMCD_GEN_FIELD_SRC_OFF_SHIFT            8
30374 +#define HMCD_GEN_FIELD_DST_OFF_SHIFT            0
30375 +#define HMCD_GEN_FIELD_MASK_EN                  0x00400000
30376 +
30377 +#define HMCD_GEN_FIELD_MASK_OFF_SHIFT           16
30378 +#define HMCD_GEN_FIELD_MASK_SHIFT               24
30379 +
30380 +#define DSCP_TO_VLAN_TABLE_SIZE                    32
30381 +
30382 +#define MANIP_GET_HMCT_SIZE(h_Manip)                    (((t_FmPcdManip *)h_Manip)->tableSize)
30383 +#define MANIP_GET_DATA_SIZE(h_Manip)                    (((t_FmPcdManip *)h_Manip)->dataSize)
30384 +
30385 +#define MANIP_GET_HMCT_PTR(h_Manip)                     (((t_FmPcdManip *)h_Manip)->p_Hmct)
30386 +#define MANIP_GET_DATA_PTR(h_Manip)                     (((t_FmPcdManip *)h_Manip)->p_Data)
30387 +
30388 +#define MANIP_SET_HMCT_PTR(h_Manip, h_NewPtr)           (((t_FmPcdManip *)h_Manip)->p_Hmct = h_NewPtr)
30389 +#define MANIP_SET_DATA_PTR(h_Manip, h_NewPtr)           (((t_FmPcdManip *)h_Manip)->p_Data = h_NewPtr)
30390 +
30391 +#define MANIP_GET_HMTD_PTR(h_Manip)                     (((t_FmPcdManip *)h_Manip)->h_Ad)
30392 +#define MANIP_DONT_REPARSE(h_Manip)                     (((t_FmPcdManip *)h_Manip)->dontParseAfterManip)
30393 +#define MANIP_SET_PREV(h_Manip, h_Prev)                 (((t_FmPcdManip *)h_Manip)->h_PrevManip = h_Prev)
30394 +#define MANIP_GET_OWNERS(h_Manip)                       (((t_FmPcdManip *)h_Manip)->owner)
30395 +#define MANIP_GET_TYPE(h_Manip)                         (((t_FmPcdManip *)h_Manip)->type)
30396 +#define MANIP_SET_UNIFIED_TBL_PTR_INDICATION(h_Manip)   (((t_FmPcdManip *)h_Manip)->unifiedTablePtr = TRUE)
30397 +#define MANIP_GET_MURAM(h_Manip)                        (((t_FmPcd *)((t_FmPcdManip *)h_Manip)->h_FmPcd)->h_FmMuram)
30398 +#define MANIP_FREE_HMTD(h_Manip)                        \
30399 +        {if (((t_FmPcdManip *)h_Manip)->muramAllocate)    \
30400 +            FM_MURAM_FreeMem(((t_FmPcd *)((t_FmPcdManip *)h_Manip)->h_FmPcd)->h_FmMuram, ((t_FmPcdManip *)h_Manip)->h_Ad);\
30401 +        else                                            \
30402 +            XX_Free(((t_FmPcdManip *)h_Manip)->h_Ad);    \
30403 +        ((t_FmPcdManip *)h_Manip)->h_Ad = NULL;            \
30404 +        }
30405 +/* position regarding Manip SW structure */
30406 +#define MANIP_IS_FIRST(h_Manip)                         (!(((t_FmPcdManip *)h_Manip)->h_PrevManip))
30407 +#define MANIP_IS_CASCADED(h_Manip)                       (((t_FmPcdManip *)h_Manip)->cascaded)
30408 +#define MANIP_IS_UNIFIED(h_Manip)                       (!(((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_NONE))
30409 +#define MANIP_IS_UNIFIED_NON_FIRST(h_Manip)             ((((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_MID) || \
30410 +                                                         (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_LAST))
30411 +#define MANIP_IS_UNIFIED_NON_LAST(h_Manip)              ((((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_FIRST) ||\
30412 +                                                         (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_MID))
30413 +#define MANIP_IS_UNIFIED_FIRST(h_Manip)                    (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_FIRST)
30414 +#define MANIP_IS_UNIFIED_LAST(h_Manip)                   (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_LAST)
30415 +
30416 +#define MANIP_UPDATE_UNIFIED_POSITION(h_Manip)          (((t_FmPcdManip *)h_Manip)->unifiedPosition = \
30417 +                                                         (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_NONE)? \
30418 +                                                            e_MANIP_UNIFIED_LAST : e_MANIP_UNIFIED_MID)
30419 +
30420 +typedef enum e_ManipUnifiedPosition {
30421 +    e_MANIP_UNIFIED_NONE = 0,
30422 +    e_MANIP_UNIFIED_FIRST,
30423 +    e_MANIP_UNIFIED_MID,
30424 +    e_MANIP_UNIFIED_LAST
30425 +} e_ManipUnifiedPosition;
30426 +
30427 +typedef enum e_ManipInfo {
30428 +    e_MANIP_HMTD,
30429 +    e_MANIP_HMCT,
30430 +    e_MANIP_HANDLER_TABLE_OWNER
30431 +}e_ManipInfo;
30432 +/***********************************************************************/
30433 +/*          Memory map                                                 */
30434 +/***********************************************************************/
30435 +#if defined(__MWERKS__) && !defined(__GNUC__)
30436 +#pragma pack(push,1)
30437 +#endif /* defined(__MWERKS__) && ... */
30438 +
30439 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
30440 +typedef struct t_CapwapReasmPram {
30441 +    volatile uint32_t mode;
30442 +    volatile uint32_t autoLearnHashTblPtr;
30443 +    volatile uint32_t intStatsTblPtr;
30444 +    volatile uint32_t reasmFrmDescPoolTblPtr;
30445 +    volatile uint32_t reasmFrmDescIndexPoolTblPtr;
30446 +    volatile uint32_t timeOutTblPtr;
30447 +    volatile uint32_t bufferPoolIdAndRisc1SetIndexes;
30448 +    volatile uint32_t risc23SetIndexes;
30449 +    volatile uint32_t risc4SetIndexesAndExtendedStatsTblPtr;
30450 +    volatile uint32_t extendedStatsTblPtr;
30451 +    volatile uint32_t expirationDelay;
30452 +    volatile uint32_t totalProcessedFragCounter;
30453 +    volatile uint32_t totalUnsuccessfulReasmFramesCounter;
30454 +    volatile uint32_t totalDuplicatedFragCounter;
30455 +    volatile uint32_t totalMalformdFragCounter;
30456 +    volatile uint32_t totalTimeOutCounter;
30457 +    volatile uint32_t totalSetBusyCounter;
30458 +    volatile uint32_t totalRfdPoolBusyCounter;
30459 +    volatile uint32_t totalDiscardedFragsCounter;
30460 +    volatile uint32_t totalMoreThan16FramesCounter;
30461 +    volatile uint32_t internalBufferBusy;
30462 +    volatile uint32_t externalBufferBusy;
30463 +    volatile uint32_t reserved1[4];
30464 +} t_CapwapReasmPram;
30465 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
30466 +
30467 +typedef _Packed struct t_ReassTbl {
30468 +    volatile uint16_t waysNumAndSetSize;
30469 +    volatile uint16_t autoLearnHashKeyMask;
30470 +    volatile uint32_t reassCommonPrmTblPtr;
30471 +    volatile uint32_t liodnAlAndAutoLearnHashTblPtrHi;
30472 +    volatile uint32_t autoLearnHashTblPtrLow;
30473 +    volatile uint32_t liodnSlAndAutoLearnSetLockTblPtrHi;
30474 +    volatile uint32_t autoLearnSetLockTblPtrLow;
30475 +    volatile uint16_t minFragSize; /* Not relevant for CAPWAP*/
30476 +    volatile uint16_t maxReassemblySize; /* Only relevant for CAPWAP*/
30477 +    volatile uint32_t totalSuccessfullyReasmFramesCounter;
30478 +    volatile uint32_t totalValidFragmentCounter;
30479 +    volatile uint32_t totalProcessedFragCounter;
30480 +    volatile uint32_t totalMalformdFragCounter;
30481 +    volatile uint32_t totalSetBusyCounter;
30482 +    volatile uint32_t totalDiscardedFragsCounter;
30483 +    volatile uint32_t totalMoreThan16FramesCounter;
30484 +    volatile uint32_t reserved2[2];
30485 +} _PackedType t_ReassTbl;
30486 +
30487 +typedef struct t_ReassCommonTbl {
30488 +    volatile uint32_t timeoutModeAndFqid;
30489 +    volatile uint32_t reassFrmDescIndexPoolTblPtr;
30490 +    volatile uint32_t liodnAndReassFrmDescPoolPtrHi;
30491 +    volatile uint32_t reassFrmDescPoolPtrLow;
30492 +    volatile uint32_t timeOutTblPtr;
30493 +    volatile uint32_t expirationDelay;
30494 +    volatile uint32_t internalBufferManagement;
30495 +    volatile uint32_t reserved2;
30496 +    volatile uint32_t totalTimeOutCounter;
30497 +    volatile uint32_t totalRfdPoolBusyCounter;
30498 +    volatile uint32_t totalInternalBufferBusy;
30499 +    volatile uint32_t totalExternalBufferBusy;
30500 +    volatile uint32_t totalSgFragmentCounter;
30501 +    volatile uint32_t totalDmaSemaphoreDepletionCounter;
30502 +    volatile uint32_t totalNCSPCounter;
30503 +    volatile uint32_t discardMask;
30504 +} t_ReassCommonTbl;
30505 +
30506 +typedef _Packed struct t_Hmtd {
30507 +    volatile uint16_t   cfg;
30508 +    volatile uint8_t    eliodnOffset;
30509 +    volatile uint8_t    extHmcdBasePtrHi;
30510 +    volatile uint32_t   hmcdBasePtr;
30511 +    volatile uint16_t   nextAdIdx;
30512 +    volatile uint8_t    res1;
30513 +    volatile uint8_t    opCode;
30514 +    volatile uint32_t   res2;
30515 +} _PackedType t_Hmtd;
30516 +
30517 +#if defined(__MWERKS__) && !defined(__GNUC__)
30518 +#pragma pack(pop)
30519 +#endif /* defined(__MWERKS__) && ... */
30520 +
30521 +
30522 +/***********************************************************************/
30523 +/*  Driver's internal structures                                       */
30524 +/***********************************************************************/
30525 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
30526 +typedef struct
30527 +{
30528 +    t_Handle p_AutoLearnHashTbl;
30529 +    t_Handle p_ReassmFrmDescrPoolTbl;
30530 +    t_Handle p_ReassmFrmDescrIndxPoolTbl;
30531 +    t_Handle p_TimeOutTbl;
30532 +    uint16_t maxNumFramesInProcess;
30533 +    uint8_t  numOfTasks;
30534 +    //uint8_t  poolId;
30535 +    uint8_t  prOffset;
30536 +    uint16_t dataOffset;
30537 +    uint8_t  sgBpid;
30538 +    uint8_t  hwPortId;
30539 +    uint32_t fqidForTimeOutFrames;
30540 +    uint32_t timeoutRoutineRequestTime;
30541 +    uint32_t bitFor1Micro;
30542 +} t_CapwapFragParams;
30543 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
30544 +
30545 +typedef struct
30546 +{
30547 +    t_AdOfTypeContLookup    *p_Frag;
30548 +#if (DPAA_VERSION == 10)
30549 +    uint8_t                 scratchBpid;
30550 +#endif /* (DPAA_VERSION == 10) */
30551 +} t_FragParams;
30552 +
30553 +typedef struct t_ReassmParams
30554 +{
30555 +    e_NetHeaderType                 hdr; /* Header selection */
30556 +    t_ReassCommonTbl                   *p_ReassCommonTbl;
30557 +    uintptr_t                       reassFrmDescrIndxPoolTblAddr;
30558 +    uintptr_t                       reassFrmDescrPoolTblAddr;
30559 +    uintptr_t                       timeOutTblAddr;
30560 +    uintptr_t                       internalBufferPoolManagementIndexAddr;
30561 +    uintptr_t                       internalBufferPoolAddr;
30562 +    uint32_t                        maxNumFramesInProcess;
30563 +    uint8_t                         sgBpid;
30564 +    uint8_t                         dataMemId;
30565 +    uint16_t                        dataLiodnOffset;
30566 +    uint32_t                        fqidForTimeOutFrames;
30567 +    e_FmPcdManipReassemTimeOutMode  timeOutMode;
30568 +    uint32_t                        timeoutThresholdForReassmProcess;
30569 +    union {
30570 +       struct {
30571 +               t_Handle                h_Ipv4Ad;
30572 +           t_Handle                h_Ipv6Ad;
30573 +           bool                    ipv6Assigned;
30574 +           t_ReassTbl                          *p_Ipv4ReassTbl;
30575 +           t_ReassTbl              *p_Ipv6ReassTbl;
30576 +           uintptr_t               ipv4AutoLearnHashTblAddr;
30577 +           uintptr_t               ipv6AutoLearnHashTblAddr;
30578 +           uintptr_t               ipv4AutoLearnSetLockTblAddr;
30579 +           uintptr_t               ipv6AutoLearnSetLockTblAddr;
30580 +           uint16_t                        minFragSize[2];
30581 +           e_FmPcdManipReassemWaysNumber   numOfFramesPerHashEntry[2];
30582 +           uint8_t                         relativeSchemeId[2];
30583 +           t_Handle                        h_Ipv4Scheme;
30584 +           t_Handle                        h_Ipv6Scheme;
30585 +           uint32_t                        nonConsistentSpFqid;
30586 +       } ip;
30587 +       struct {
30588 +               t_Handle                h_Ad;
30589 +           t_ReassTbl                          *p_ReassTbl;
30590 +           uintptr_t               autoLearnHashTblAddr;
30591 +           uintptr_t               autoLearnSetLockTblAddr;
30592 +           uint16_t                maxRessembledsSize;
30593 +           e_FmPcdManipReassemWaysNumber   numOfFramesPerHashEntry;
30594 +           uint8_t                 relativeSchemeId;
30595 +           t_Handle                h_Scheme;
30596 +       } capwap;
30597 +    };
30598 +} t_ReassmParams;
30599 +
30600 +typedef struct{
30601 +    e_FmPcdManipType        type;
30602 +    t_FmPcdManipParams      manipParams;
30603 +    bool                    muramAllocate;
30604 +    t_Handle                h_Ad;
30605 +    uint32_t                opcode;
30606 +    bool                    rmv;
30607 +    bool                    insrt;
30608 +    t_Handle                h_NextManip;
30609 +    t_Handle                h_PrevManip;
30610 +    e_FmPcdManipType        nextManipType;
30611 +    /* HdrManip parameters*/
30612 +    uint8_t                 *p_Hmct;
30613 +    uint8_t                 *p_Data;
30614 +    bool                    dontParseAfterManip;
30615 +    bool                    fieldUpdate;
30616 +    bool                    custom;
30617 +    uint16_t                tableSize;
30618 +    uint8_t                 dataSize;
30619 +    bool                    cascaded;
30620 +    e_ManipUnifiedPosition  unifiedPosition;
30621 +    /* end HdrManip */
30622 +    uint8_t                 *p_Template;
30623 +    uint16_t                owner;
30624 +    uint32_t                updateParams;
30625 +    uint32_t                shadowUpdateParams;
30626 +    bool                    frag;
30627 +    bool                    reassm;
30628 +    uint16_t                sizeForFragmentation;
30629 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
30630 +    t_Handle                h_Frag;
30631 +    t_CapwapFragParams      capwapFragParams;
30632 +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
30633 +    union {
30634 +        t_ReassmParams         reassmParams;
30635 +        t_FragParams           fragParams;
30636 +    };
30637 +    uint8_t                 icOffset;
30638 +    uint16_t                ownerTmp;
30639 +    bool                    cnia;
30640 +    t_Handle                p_StatsTbl;
30641 +    t_Handle                h_FmPcd;
30642 +    t_List                  nodesLst;
30643 +    t_Handle                h_Spinlock;
30644 +} t_FmPcdManip;
30645 +
30646 +typedef struct t_FmPcdCcSavedManipParams
30647 +{
30648 +    union
30649 +    {
30650 +        struct
30651 +        {
30652 +            uint16_t    dataOffset;
30653 +            //uint8_t     poolId;
30654 +        }capwapParams;
30655 +        struct
30656 +        {
30657 +            uint16_t    dataOffset;
30658 +            uint8_t     poolId;
30659 +        }ipParams;
30660 +    };
30661 +
30662 +} t_FmPcdCcSavedManipParams;
30663 +
30664 +
30665 +#endif /* __FM_MANIP_H */
30666 --- /dev/null
30667 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.c
30668 @@ -0,0 +1,2095 @@
30669 +/*
30670 + * Copyright 2008-2012 Freescale Semiconductor Inc.
30671 + *
30672 + * Redistribution and use in source and binary forms, with or without
30673 + * modification, are permitted provided that the following conditions are met:
30674 + *     * Redistributions of source code must retain the above copyright
30675 + *       notice, this list of conditions and the following disclaimer.
30676 + *     * Redistributions in binary form must reproduce the above copyright
30677 + *       notice, this list of conditions and the following disclaimer in the
30678 + *       documentation and/or other materials provided with the distribution.
30679 + *     * Neither the name of Freescale Semiconductor nor the
30680 + *       names of its contributors may be used to endorse or promote products
30681 + *       derived from this software without specific prior written permission.
30682 + *
30683 + *
30684 + * ALTERNATIVELY, this software may be distributed under the terms of the
30685 + * GNU General Public License ("GPL") as published by the Free Software
30686 + * Foundation, either version 2 of that License or (at your option) any
30687 + * later version.
30688 + *
30689 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
30690 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
30691 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30692 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
30693 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30694 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30695 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30696 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30697 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30698 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30699 + */
30700 +
30701 +
30702 +/******************************************************************************
30703 + @File          fm_pcd.c
30704 +
30705 + @Description   FM PCD ...
30706 +*//***************************************************************************/
30707 +#include "std_ext.h"
30708 +#include "error_ext.h"
30709 +#include "string_ext.h"
30710 +#include "xx_ext.h"
30711 +#include "sprint_ext.h"
30712 +#include "debug_ext.h"
30713 +#include "net_ext.h"
30714 +#include "fm_ext.h"
30715 +#include "fm_pcd_ext.h"
30716 +
30717 +#include "fm_common.h"
30718 +#include "fm_pcd.h"
30719 +#include "fm_pcd_ipc.h"
30720 +#include "fm_hc.h"
30721 +#include "fm_muram_ext.h"
30722 +
30723 +
30724 +/****************************************/
30725 +/*       static functions               */
30726 +/****************************************/
30727 +
30728 +static t_Error CheckFmPcdParameters(t_FmPcd *p_FmPcd)
30729 +{
30730 +    if (!p_FmPcd->h_Fm)
30731 +         RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("h_Fm has to be initialized"));
30732 +
30733 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
30734 +    {
30735 +        if (p_FmPcd->p_FmPcdKg && !p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs)
30736 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Something WRONG"));
30737 +
30738 +        if (p_FmPcd->p_FmPcdPlcr && !p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs)
30739 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Something WRONG"));
30740 +
30741 +        if (!p_FmPcd->f_Exception)
30742 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("f_FmPcdExceptions has to be initialized"));
30743 +
30744 +        if ((!p_FmPcd->f_FmPcdIndexedException) && (p_FmPcd->p_FmPcdPlcr || p_FmPcd->p_FmPcdKg))
30745 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("f_FmPcdIndexedException has to be initialized"));
30746 +
30747 +        if (p_FmPcd->p_FmPcdDriverParam->prsMaxParseCycleLimit > PRS_MAX_CYCLE_LIMIT)
30748 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("prsMaxParseCycleLimit has to be less than 8191"));
30749 +    }
30750 +
30751 +    return E_OK;
30752 +}
30753 +
30754 +static volatile bool blockingFlag = FALSE;
30755 +static void IpcMsgCompletionCB(t_Handle   h_FmPcd,
30756 +                               uint8_t    *p_Msg,
30757 +                               uint8_t    *p_Reply,
30758 +                               uint32_t   replyLength,
30759 +                               t_Error    status)
30760 +{
30761 +    UNUSED(h_FmPcd);UNUSED(p_Msg);UNUSED(p_Reply);UNUSED(replyLength);UNUSED(status);
30762 +    blockingFlag = FALSE;
30763 +}
30764 +
30765 +static t_Error IpcMsgHandlerCB(t_Handle  h_FmPcd,
30766 +                               uint8_t   *p_Msg,
30767 +                               uint32_t  msgLength,
30768 +                               uint8_t   *p_Reply,
30769 +                               uint32_t  *p_ReplyLength)
30770 +{
30771 +    t_FmPcd             *p_FmPcd = (t_FmPcd*)h_FmPcd;
30772 +    t_Error             err = E_OK;
30773 +    t_FmPcdIpcMsg       *p_IpcMsg   = (t_FmPcdIpcMsg*)p_Msg;
30774 +    t_FmPcdIpcReply     *p_IpcReply = (t_FmPcdIpcReply*)p_Reply;
30775 +
30776 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
30777 +    SANITY_CHECK_RETURN_ERROR((msgLength >= sizeof(uint32_t)), E_INVALID_VALUE);
30778 +
30779 +#ifdef DISABLE_SANITY_CHECKS
30780 +    UNUSED(msgLength);
30781 +#endif /* DISABLE_SANITY_CHECKS */
30782 +
30783 +    ASSERT_COND(p_Msg);
30784 +
30785 +    memset(p_IpcReply, 0, (sizeof(uint8_t) * FM_PCD_MAX_REPLY_SIZE));
30786 +    *p_ReplyLength = 0;
30787 +
30788 +    switch (p_IpcMsg->msgId)
30789 +    {
30790 +        case (FM_PCD_MASTER_IS_ALIVE):
30791 +            *(uint8_t*)(p_IpcReply->replyBody) = 1;
30792 +            p_IpcReply->error = E_OK;
30793 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
30794 +            break;
30795 +        case (FM_PCD_MASTER_IS_ENABLED):
30796 +            /* count partitions registrations */
30797 +            if (p_FmPcd->enabled)
30798 +                p_FmPcd->numOfEnabledGuestPartitionsPcds++;
30799 +            *(uint8_t*)(p_IpcReply->replyBody)  = (uint8_t)p_FmPcd->enabled;
30800 +            p_IpcReply->error = E_OK;
30801 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
30802 +            break;
30803 +        case (FM_PCD_GUEST_DISABLE):
30804 +            if (p_FmPcd->numOfEnabledGuestPartitionsPcds)
30805 +            {
30806 +                p_FmPcd->numOfEnabledGuestPartitionsPcds--;
30807 +                p_IpcReply->error = E_OK;
30808 +            }
30809 +            else
30810 +            {
30811 +                REPORT_ERROR(MINOR, E_INVALID_STATE,("Trying to disable an unregistered partition"));
30812 +                p_IpcReply->error = E_INVALID_STATE;
30813 +            }
30814 +            *p_ReplyLength = sizeof(uint32_t);
30815 +            break;
30816 +        case (FM_PCD_GET_COUNTER):
30817 +        {
30818 +            e_FmPcdCounters inCounter;
30819 +            uint32_t        outCounter;
30820 +
30821 +            memcpy((uint8_t*)&inCounter, p_IpcMsg->msgBody, sizeof(uint32_t));
30822 +            outCounter = FM_PCD_GetCounter(h_FmPcd, inCounter);
30823 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&outCounter, sizeof(uint32_t));
30824 +            p_IpcReply->error = E_OK;
30825 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
30826 +            break;
30827 +        }
30828 +        case (FM_PCD_ALLOC_KG_SCHEMES):
30829 +        {
30830 +            t_FmPcdIpcKgSchemesParams   ipcSchemesParams;
30831 +
30832 +            memcpy((uint8_t*)&ipcSchemesParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgSchemesParams));
30833 +            err = FmPcdKgAllocSchemes(h_FmPcd,
30834 +                                      ipcSchemesParams.numOfSchemes,
30835 +                                      ipcSchemesParams.guestId,
30836 +                                      p_IpcReply->replyBody);
30837 +            p_IpcReply->error = err;
30838 +            *p_ReplyLength = sizeof(uint32_t) + ipcSchemesParams.numOfSchemes*sizeof(uint8_t);
30839 +            break;
30840 +        }
30841 +        case (FM_PCD_FREE_KG_SCHEMES):
30842 +        {
30843 +            t_FmPcdIpcKgSchemesParams   ipcSchemesParams;
30844 +
30845 +            memcpy((uint8_t*)&ipcSchemesParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgSchemesParams));
30846 +            err = FmPcdKgFreeSchemes(h_FmPcd,
30847 +                                     ipcSchemesParams.numOfSchemes,
30848 +                                     ipcSchemesParams.guestId,
30849 +                                     ipcSchemesParams.schemesIds);
30850 +            p_IpcReply->error = err;
30851 +            *p_ReplyLength = sizeof(uint32_t);
30852 +            break;
30853 +        }
30854 +        case (FM_PCD_ALLOC_KG_CLSPLAN):
30855 +        {
30856 +            t_FmPcdIpcKgClsPlanParams   ipcKgClsPlanParams;
30857 +
30858 +            memcpy((uint8_t*)&ipcKgClsPlanParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgClsPlanParams));
30859 +            err = KgAllocClsPlanEntries(h_FmPcd,
30860 +                                        ipcKgClsPlanParams.numOfClsPlanEntries,
30861 +                                        ipcKgClsPlanParams.guestId,
30862 +                                        p_IpcReply->replyBody);
30863 +            p_IpcReply->error = err;
30864 +            *p_ReplyLength =  sizeof(uint32_t) + sizeof(uint8_t);
30865 +            break;
30866 +        }
30867 +        case (FM_PCD_FREE_KG_CLSPLAN):
30868 +        {
30869 +            t_FmPcdIpcKgClsPlanParams   ipcKgClsPlanParams;
30870 +
30871 +            memcpy((uint8_t*)&ipcKgClsPlanParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgClsPlanParams));
30872 +            KgFreeClsPlanEntries(h_FmPcd,
30873 +                                 ipcKgClsPlanParams.numOfClsPlanEntries,
30874 +                                 ipcKgClsPlanParams.guestId,
30875 +                                 ipcKgClsPlanParams.clsPlanBase);
30876 +            *p_ReplyLength = sizeof(uint32_t);
30877 +            break;
30878 +        }
30879 +        case (FM_PCD_ALLOC_PROFILES):
30880 +        {
30881 +            t_FmIpcResourceAllocParams      ipcAllocParams;
30882 +            uint16_t                        base;
30883 +            memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
30884 +            base =  PlcrAllocProfilesForPartition(h_FmPcd,
30885 +                                                  ipcAllocParams.base,
30886 +                                                  ipcAllocParams.num,
30887 +                                                  ipcAllocParams.guestId);
30888 +            memcpy(p_IpcReply->replyBody, (uint16_t*)&base, sizeof(uint16_t));
30889 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint16_t);
30890 +            break;
30891 +        }
30892 +        case (FM_PCD_FREE_PROFILES):
30893 +        {
30894 +            t_FmIpcResourceAllocParams   ipcAllocParams;
30895 +            memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
30896 +            PlcrFreeProfilesForPartition(h_FmPcd,
30897 +                                         ipcAllocParams.base,
30898 +                                         ipcAllocParams.num,
30899 +                                         ipcAllocParams.guestId);
30900 +            break;
30901 +        }
30902 +        case (FM_PCD_SET_PORT_PROFILES):
30903 +        {
30904 +            t_FmIpcResourceAllocParams   ipcAllocParams;
30905 +            memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
30906 +            PlcrSetPortProfiles(h_FmPcd,
30907 +                                ipcAllocParams.guestId,
30908 +                                ipcAllocParams.num,
30909 +                                ipcAllocParams.base);
30910 +            break;
30911 +        }
30912 +        case (FM_PCD_CLEAR_PORT_PROFILES):
30913 +        {
30914 +            t_FmIpcResourceAllocParams   ipcAllocParams;
30915 +            memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
30916 +            PlcrClearPortProfiles(h_FmPcd,
30917 +                                  ipcAllocParams.guestId);
30918 +            break;
30919 +        }
30920 +        case (FM_PCD_GET_SW_PRS_OFFSET):
30921 +        {
30922 +            t_FmPcdIpcSwPrsLable   ipcSwPrsLable;
30923 +            uint32_t               swPrsOffset;
30924 +
30925 +            memcpy((uint8_t*)&ipcSwPrsLable, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcSwPrsLable));
30926 +            swPrsOffset =
30927 +                FmPcdGetSwPrsOffset(h_FmPcd,
30928 +                                    (e_NetHeaderType)ipcSwPrsLable.enumHdr,
30929 +                                    ipcSwPrsLable.indexPerHdr);
30930 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&swPrsOffset, sizeof(uint32_t));
30931 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
30932 +            break;
30933 +        }
30934 +        case (FM_PCD_PRS_INC_PORT_STATS):
30935 +        {
30936 +            t_FmPcdIpcPrsIncludePort   ipcPrsIncludePort;
30937 +
30938 +            memcpy((uint8_t*)&ipcPrsIncludePort, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcPrsIncludePort));
30939 +            PrsIncludePortInStatistics(h_FmPcd,
30940 +                                       ipcPrsIncludePort.hardwarePortId,
30941 +                                       ipcPrsIncludePort.include);
30942 +           break;
30943 +        }
30944 +        default:
30945 +            *p_ReplyLength = 0;
30946 +            RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("command not found!!!"));
30947 +    }
30948 +    return E_OK;
30949 +}
30950 +
30951 +static uint32_t NetEnvLock(t_Handle h_NetEnv)
30952 +{
30953 +    ASSERT_COND(h_NetEnv);
30954 +    return XX_LockIntrSpinlock(((t_FmPcdNetEnv*)h_NetEnv)->h_Spinlock);
30955 +}
30956 +
30957 +static void NetEnvUnlock(t_Handle h_NetEnv, uint32_t intFlags)
30958 +{
30959 +    ASSERT_COND(h_NetEnv);
30960 +    XX_UnlockIntrSpinlock(((t_FmPcdNetEnv*)h_NetEnv)->h_Spinlock, intFlags);
30961 +}
30962 +
30963 +static void EnqueueLockToFreeLst(t_FmPcd *p_FmPcd, t_FmPcdLock *p_Lock)
30964 +{
30965 +    uint32_t   intFlags;
30966 +
30967 +    intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
30968 +    LIST_AddToTail(&p_Lock->node, &p_FmPcd->freeLocksLst);
30969 +    XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
30970 +}
30971 +
30972 +static t_FmPcdLock * DequeueLockFromFreeLst(t_FmPcd *p_FmPcd)
30973 +{
30974 +    t_FmPcdLock *p_Lock = NULL;
30975 +    uint32_t    intFlags;
30976 +
30977 +    intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
30978 +    if (!LIST_IsEmpty(&p_FmPcd->freeLocksLst))
30979 +    {
30980 +        p_Lock = FM_PCD_LOCK_OBJ(p_FmPcd->freeLocksLst.p_Next);
30981 +        LIST_DelAndInit(&p_Lock->node);
30982 +    }
30983 +    if (p_FmPcd->h_Spinlock)
30984 +       XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
30985 +
30986 +    return p_Lock;
30987 +}
30988 +
30989 +static void EnqueueLockToAcquiredLst(t_FmPcd *p_FmPcd, t_FmPcdLock *p_Lock)
30990 +{
30991 +    uint32_t   intFlags;
30992 +
30993 +    intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
30994 +    LIST_AddToTail(&p_Lock->node, &p_FmPcd->acquiredLocksLst);
30995 +    XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
30996 +}
30997 +
30998 +static t_Error FillFreeLocksLst(t_FmPcd *p_FmPcd)
30999 +{
31000 +    t_FmPcdLock *p_Lock;
31001 +    int         i;
31002 +
31003 +    for (i=0; i<10; i++)
31004 +    {
31005 +        p_Lock = (t_FmPcdLock *)XX_Malloc(sizeof(t_FmPcdLock));
31006 +        if (!p_Lock)
31007 +            RETURN_ERROR(MINOR, E_NO_MEMORY, ("FM-PCD lock obj!"));
31008 +        memset(p_Lock, 0, sizeof(t_FmPcdLock));
31009 +        INIT_LIST(&p_Lock->node);
31010 +        p_Lock->h_Spinlock = XX_InitSpinlock();
31011 +        if (!p_Lock->h_Spinlock)
31012 +        {
31013 +            XX_Free(p_Lock);
31014 +            RETURN_ERROR(MINOR, E_INVALID_STATE, ("FM-PCD spinlock obj!"));
31015 +        }
31016 +        EnqueueLockToFreeLst(p_FmPcd, p_Lock);
31017 +    }
31018 +
31019 +    return E_OK;
31020 +}
31021 +
31022 +static void ReleaseFreeLocksLst(t_FmPcd *p_FmPcd)
31023 +{
31024 +    t_FmPcdLock *p_Lock;
31025 +
31026 +    p_Lock = DequeueLockFromFreeLst(p_FmPcd);
31027 +    while (p_Lock)
31028 +    {
31029 +        XX_FreeSpinlock(p_Lock->h_Spinlock);
31030 +        XX_Free(p_Lock);
31031 +        p_Lock = DequeueLockFromFreeLst(p_FmPcd);
31032 +    }
31033 +}
31034 +
31035 +
31036 +
31037 +/*****************************************************************************/
31038 +/*              Inter-module API routines                                    */
31039 +/*****************************************************************************/
31040 +
31041 +void FmPcdSetClsPlanGrpId(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint8_t clsPlanGrpId)
31042 +{
31043 +    ASSERT_COND(p_FmPcd);
31044 +    p_FmPcd->netEnvs[netEnvId].clsPlanGrpId = clsPlanGrpId;
31045 +}
31046 +
31047 +t_Error PcdGetClsPlanGrpParams(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_GrpParams)
31048 +{
31049 +    uint8_t netEnvId = p_GrpParams->netEnvId;
31050 +    int     i, k, j;
31051 +
31052 +    ASSERT_COND(p_FmPcd);
31053 +    if (p_FmPcd->netEnvs[netEnvId].clsPlanGrpId != ILLEGAL_CLS_PLAN)
31054 +    {
31055 +        p_GrpParams->grpExists = TRUE;
31056 +        p_GrpParams->clsPlanGrpId = p_FmPcd->netEnvs[netEnvId].clsPlanGrpId;
31057 +        return E_OK;
31058 +    }
31059 +
31060 +    for (i=0; ((i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
31061 +              (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE)); i++)
31062 +    {
31063 +        for (k=0; ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
31064 +                   (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE)); k++)
31065 +        {
31066 +            /* if an option exists, add it to the opts list */
31067 +            if (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt)
31068 +            {
31069 +                /* check if this option already exists, add if it doesn't */
31070 +                for (j = 0;j<p_GrpParams->numOfOptions;j++)
31071 +                {
31072 +                    if (p_GrpParams->options[j] == p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt)
31073 +                        break;
31074 +                }
31075 +                p_GrpParams->optVectors[j] |= p_FmPcd->netEnvs[netEnvId].unitsVectors[i];
31076 +                if (j == p_GrpParams->numOfOptions)
31077 +                {
31078 +                    p_GrpParams->options[p_GrpParams->numOfOptions] = p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt;
31079 +                    p_GrpParams->numOfOptions++;
31080 +                }
31081 +            }
31082 +        }
31083 +    }
31084 +
31085 +    if (p_GrpParams->numOfOptions == 0)
31086 +    {
31087 +        if (p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId != ILLEGAL_CLS_PLAN)
31088 +        {
31089 +            p_GrpParams->grpExists = TRUE;
31090 +            p_GrpParams->clsPlanGrpId = p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId;
31091 +        }
31092 +    }
31093 +
31094 +    return E_OK;
31095 +
31096 +}
31097 +
31098 +t_Error PcdGetVectorForOpt(t_FmPcd *p_FmPcd, uint8_t netEnvId, protocolOpt_t opt, uint32_t *p_Vector)
31099 +{
31100 +    uint8_t     j,k;
31101 +
31102 +    *p_Vector = 0;
31103 +
31104 +    ASSERT_COND(p_FmPcd);
31105 +    for (j=0; ((j < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
31106 +              (p_FmPcd->netEnvs[netEnvId].units[j].hdrs[0].hdr != HEADER_TYPE_NONE)); j++)
31107 +    {
31108 +        for (k=0; ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
31109 +                  (p_FmPcd->netEnvs[netEnvId].units[j].hdrs[k].hdr != HEADER_TYPE_NONE)); k++)
31110 +        {
31111 +            if (p_FmPcd->netEnvs[netEnvId].units[j].hdrs[k].opt == opt)
31112 +                *p_Vector |= p_FmPcd->netEnvs[netEnvId].unitsVectors[j];
31113 +        }
31114 +    }
31115 +
31116 +    if (!*p_Vector)
31117 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Requested option was not defined for this Network Environment Characteristics module"));
31118 +    else
31119 +        return E_OK;
31120 +}
31121 +
31122 +t_Error PcdGetUnitsVector(t_FmPcd *p_FmPcd, t_NetEnvParams *p_Params)
31123 +{
31124 +    int                     i;
31125 +
31126 +    ASSERT_COND(p_FmPcd);
31127 +    ASSERT_COND(p_Params->netEnvId < FM_MAX_NUM_OF_PORTS);
31128 +
31129 +    p_Params->vector = 0;
31130 +    for (i=0; i<p_Params->numOfDistinctionUnits ;i++)
31131 +    {
31132 +        if (p_FmPcd->netEnvs[p_Params->netEnvId].units[p_Params->unitIds[i]].hdrs[0].hdr == HEADER_TYPE_NONE)
31133 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Requested unit was not defined for this Network Environment Characteristics module"));
31134 +        ASSERT_COND(p_FmPcd->netEnvs[p_Params->netEnvId].unitsVectors[p_Params->unitIds[i]]);
31135 +        p_Params->vector |= p_FmPcd->netEnvs[p_Params->netEnvId].unitsVectors[p_Params->unitIds[i]];
31136 +    }
31137 +
31138 +    return E_OK;
31139 +}
31140 +
31141 +bool PcdNetEnvIsUnitWithoutOpts(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint32_t unitVector)
31142 +{
31143 +    int     i=0, k;
31144 +
31145 +    ASSERT_COND(p_FmPcd);
31146 +    /* check whether a given unit may be used by non-clsPlan users. */
31147 +    /* first, recognize the unit by its vector */
31148 +    while (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE)
31149 +    {
31150 +        if (p_FmPcd->netEnvs[netEnvId].unitsVectors[i] == unitVector)
31151 +        {
31152 +            for (k=0;
31153 +                 ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
31154 +                  (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE));
31155 +                 k++)
31156 +                /* check that no option exists */
31157 +                if ((protocolOpt_t)p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt)
31158 +                    return FALSE;
31159 +            break;
31160 +        }
31161 +        i++;
31162 +    }
31163 +    /* assert that a unit was found to mach the vector */
31164 +    ASSERT_COND(p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE);
31165 +
31166 +    return TRUE;
31167 +}
31168 +bool  FmPcdNetEnvIsHdrExist(t_Handle h_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr)
31169 +{
31170 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
31171 +    int         i, k;
31172 +
31173 +    ASSERT_COND(p_FmPcd);
31174 +
31175 +    for (i=0; ((i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
31176 +              (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE)); i++)
31177 +    {
31178 +        for (k=0; ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
31179 +                  (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE)); k++)
31180 +            if (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr == hdr)
31181 +                return TRUE;
31182 +    }
31183 +    for (i=0; ((i < FM_PCD_MAX_NUM_OF_ALIAS_HDRS) &&
31184 +              (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr != HEADER_TYPE_NONE)); i++)
31185 +    {
31186 +        if (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr == hdr)
31187 +            return TRUE;
31188 +    }
31189 +
31190 +    return FALSE;
31191 +}
31192 +
31193 +uint8_t FmPcdNetEnvGetUnitId(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr, bool interchangeable, protocolOpt_t opt)
31194 +{
31195 +    uint8_t     i, k;
31196 +
31197 +    ASSERT_COND(p_FmPcd);
31198 +
31199 +    if (interchangeable)
31200 +    {
31201 +        for (i=0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
31202 +                 (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
31203 +        {
31204 +            for (k=0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
31205 +                     (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
31206 +            {
31207 +                if ((p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr == hdr) &&
31208 +                    (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt == opt))
31209 +
31210 +                return i;
31211 +            }
31212 +        }
31213 +    }
31214 +    else
31215 +    {
31216 +        for (i=0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
31217 +                 (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
31218 +            if ((p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr == hdr) &&
31219 +                (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].opt == opt) &&
31220 +                (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[1].hdr == HEADER_TYPE_NONE))
31221 +                    return i;
31222 +
31223 +        for (i=0; (i < FM_PCD_MAX_NUM_OF_ALIAS_HDRS) &&
31224 +                 (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr != HEADER_TYPE_NONE); i++)
31225 +            if ((p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr == hdr) &&
31226 +                (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].opt == opt))
31227 +                return p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].aliasHdr;
31228 +    }
31229 +
31230 +    return FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS;
31231 +}
31232 +
31233 +t_Error FmPcdUnregisterReassmPort(t_Handle h_FmPcd, t_Handle h_ReasmCommonPramTbl)
31234 +{
31235 +    t_FmPcd                         *p_FmPcd = (t_FmPcd*)h_FmPcd;
31236 +    t_FmPcdCcReassmTimeoutParams    ccReassmTimeoutParams = {0};
31237 +    uint8_t                         result;
31238 +    t_Error                         err = E_OK;
31239 +
31240 +    ASSERT_COND(p_FmPcd);
31241 +    ASSERT_COND(h_ReasmCommonPramTbl);
31242 +
31243 +    ccReassmTimeoutParams.iprcpt   = (uint32_t)(XX_VirtToPhys(h_ReasmCommonPramTbl) - p_FmPcd->physicalMuramBase);
31244 +    ccReassmTimeoutParams.activate = FALSE; /*Disable Timeout Task*/
31245 +
31246 +    if ((err = FmHcPcdCcTimeoutReassm(p_FmPcd->h_Hc, &ccReassmTimeoutParams, &result)) != E_OK)
31247 +        RETURN_ERROR(MAJOR, err, NO_MSG);
31248 +
31249 +    switch (result)
31250 +    {
31251 +        case (0):
31252 +            return E_OK;
31253 +        case (1):
31254 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, (""));
31255 +        case (2):
31256 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, (""));
31257 +        case (3):
31258 +            RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("Disable Timeout Task with invalid IPRCPT"));
31259 +        default:
31260 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
31261 +    }
31262 +
31263 +    return E_OK;
31264 +}
31265 +
31266 +e_NetHeaderType FmPcdGetAliasHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr)
31267 +{
31268 +    int         i;
31269 +
31270 +    ASSERT_COND(p_FmPcd);
31271 +    ASSERT_COND(netEnvId < FM_MAX_NUM_OF_PORTS);
31272 +
31273 +    for (i=0; (i < FM_PCD_MAX_NUM_OF_ALIAS_HDRS)
31274 +        && (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr != HEADER_TYPE_NONE); i++)
31275 +    {
31276 +        if (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr == hdr)
31277 +            return p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].aliasHdr;
31278 +    }
31279 +
31280 +    return HEADER_TYPE_NONE;
31281 +}
31282 +
31283 +void   FmPcdPortRegister(t_Handle h_FmPcd, t_Handle h_FmPort, uint8_t hardwarePortId)
31284 +{
31285 +    t_FmPcd         *p_FmPcd = (t_FmPcd*)h_FmPcd;
31286 +    uint16_t        swPortIndex = 0;
31287 +
31288 +    ASSERT_COND(h_FmPcd);
31289 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
31290 +    p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].h_FmPort = h_FmPort;
31291 +}
31292 +
31293 +uint32_t FmPcdGetLcv(t_Handle h_FmPcd, uint32_t netEnvId, uint8_t hdrNum)
31294 +{
31295 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
31296 +
31297 +    ASSERT_COND(h_FmPcd);
31298 +    return p_FmPcd->netEnvs[netEnvId].lcvs[hdrNum];
31299 +}
31300 +
31301 +uint32_t FmPcdGetMacsecLcv(t_Handle h_FmPcd, uint32_t netEnvId)
31302 +{
31303 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
31304 +
31305 +    ASSERT_COND(h_FmPcd);
31306 +    return p_FmPcd->netEnvs[netEnvId].macsecVector;
31307 +}
31308 +
31309 +uint8_t FmPcdGetNetEnvId(t_Handle h_NetEnv)
31310 +{
31311 +    return ((t_FmPcdNetEnv*)h_NetEnv)->netEnvId;
31312 +}
31313 +
31314 +void FmPcdIncNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId)
31315 +{
31316 +    uint32_t    intFlags;
31317 +
31318 +    ASSERT_COND(h_FmPcd);
31319 +
31320 +    intFlags = NetEnvLock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId]);
31321 +    ((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId].owners++;
31322 +    NetEnvUnlock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId], intFlags);
31323 +}
31324 +
31325 +void FmPcdDecNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId)
31326 +{
31327 +    uint32_t    intFlags;
31328 +
31329 +    ASSERT_COND(h_FmPcd);
31330 +    ASSERT_COND(((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId].owners);
31331 +
31332 +    intFlags = NetEnvLock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId]);
31333 +    ((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId].owners--;
31334 +    NetEnvUnlock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId], intFlags);
31335 +}
31336 +
31337 +uint32_t FmPcdLock(t_Handle h_FmPcd)
31338 +{
31339 +    ASSERT_COND(h_FmPcd);
31340 +    return XX_LockIntrSpinlock(((t_FmPcd*)h_FmPcd)->h_Spinlock);
31341 +}
31342 +
31343 +void FmPcdUnlock(t_Handle h_FmPcd, uint32_t intFlags)
31344 +{
31345 +    ASSERT_COND(h_FmPcd);
31346 +    XX_UnlockIntrSpinlock(((t_FmPcd*)h_FmPcd)->h_Spinlock, intFlags);
31347 +}
31348 +
31349 +t_FmPcdLock * FmPcdAcquireLock(t_Handle h_FmPcd)
31350 +{
31351 +    t_FmPcdLock *p_Lock;
31352 +    ASSERT_COND(h_FmPcd);
31353 +    p_Lock = DequeueLockFromFreeLst((t_FmPcd*)h_FmPcd);
31354 +    if (!p_Lock)
31355 +    {
31356 +        FillFreeLocksLst(h_FmPcd);
31357 +        p_Lock = DequeueLockFromFreeLst((t_FmPcd*)h_FmPcd);
31358 +    }
31359 +
31360 +    if (p_Lock)
31361 +        EnqueueLockToAcquiredLst((t_FmPcd*)h_FmPcd, p_Lock);
31362 +    return p_Lock;
31363 +}
31364 +
31365 +void FmPcdReleaseLock(t_Handle h_FmPcd, t_FmPcdLock *p_Lock)
31366 +{
31367 +    uint32_t intFlags;
31368 +    ASSERT_COND(h_FmPcd);
31369 +    intFlags = FmPcdLock(h_FmPcd);
31370 +    LIST_DelAndInit(&p_Lock->node);
31371 +    FmPcdUnlock(h_FmPcd, intFlags);
31372 +    EnqueueLockToFreeLst((t_FmPcd*)h_FmPcd, p_Lock);
31373 +}
31374 +
31375 +bool FmPcdLockTryLockAll(t_Handle h_FmPcd)
31376 +{
31377 +    uint32_t    intFlags;
31378 +    t_List      *p_Pos, *p_SavedPos=NULL;
31379 +
31380 +    ASSERT_COND(h_FmPcd);
31381 +    intFlags = FmPcdLock(h_FmPcd);
31382 +    LIST_FOR_EACH(p_Pos, &((t_FmPcd*)h_FmPcd)->acquiredLocksLst)
31383 +    {
31384 +        t_FmPcdLock *p_Lock = FM_PCD_LOCK_OBJ(p_Pos);
31385 +        if (!FmPcdLockTryLock(p_Lock))
31386 +        {
31387 +            p_SavedPos = p_Pos;
31388 +            break;
31389 +        }
31390 +    }
31391 +    if (p_SavedPos)
31392 +    {
31393 +        LIST_FOR_EACH(p_Pos, &((t_FmPcd*)h_FmPcd)->acquiredLocksLst)
31394 +        {
31395 +            t_FmPcdLock *p_Lock = FM_PCD_LOCK_OBJ(p_Pos);
31396 +            if (p_Pos == p_SavedPos)
31397 +                break;
31398 +            FmPcdLockUnlock(p_Lock);
31399 +        }
31400 +    }
31401 +    FmPcdUnlock(h_FmPcd, intFlags);
31402 +
31403 +    CORE_MemoryBarrier();
31404 +
31405 +    if (p_SavedPos)
31406 +        return FALSE;
31407 +
31408 +    return TRUE;
31409 +}
31410 +
31411 +void FmPcdLockUnlockAll(t_Handle h_FmPcd)
31412 +{
31413 +    uint32_t    intFlags;
31414 +    t_List      *p_Pos;
31415 +
31416 +    ASSERT_COND(h_FmPcd);
31417 +    intFlags = FmPcdLock(h_FmPcd);
31418 +    LIST_FOR_EACH(p_Pos, &((t_FmPcd*)h_FmPcd)->acquiredLocksLst)
31419 +    {
31420 +        t_FmPcdLock *p_Lock = FM_PCD_LOCK_OBJ(p_Pos);
31421 +        p_Lock->flag = FALSE;
31422 +    }
31423 +    FmPcdUnlock(h_FmPcd, intFlags);
31424 +
31425 +    CORE_MemoryBarrier();
31426 +}
31427 +
31428 +t_Error FmPcdHcSync(t_Handle h_FmPcd)
31429 +{
31430 +    ASSERT_COND(h_FmPcd);
31431 +    ASSERT_COND(((t_FmPcd*)h_FmPcd)->h_Hc);
31432 +
31433 +    return FmHcPcdSync(((t_FmPcd*)h_FmPcd)->h_Hc);
31434 +}
31435 +
31436 +t_Handle FmPcdGetHcHandle(t_Handle h_FmPcd)
31437 +{
31438 +    ASSERT_COND(h_FmPcd);
31439 +    return ((t_FmPcd*)h_FmPcd)->h_Hc;
31440 +}
31441 +
31442 +bool FmPcdIsAdvancedOffloadSupported(t_Handle h_FmPcd)
31443 +{
31444 +    ASSERT_COND(h_FmPcd);
31445 +    return ((t_FmPcd*)h_FmPcd)->advancedOffloadSupport;
31446 +}
31447 +/*********************** End of inter-module routines ************************/
31448 +
31449 +
31450 +/****************************************/
31451 +/*       API Init unit functions        */
31452 +/****************************************/
31453 +
31454 +t_Handle FM_PCD_Config(t_FmPcdParams *p_FmPcdParams)
31455 +{
31456 +    t_FmPcd             *p_FmPcd = NULL;
31457 +    t_FmPhysAddr        physicalMuramBase;
31458 +    uint8_t             i;
31459 +
31460 +    SANITY_CHECK_RETURN_VALUE(p_FmPcdParams, E_INVALID_HANDLE,NULL);
31461 +
31462 +    p_FmPcd = (t_FmPcd *) XX_Malloc(sizeof(t_FmPcd));
31463 +    if (!p_FmPcd)
31464 +    {
31465 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD"));
31466 +        return NULL;
31467 +    }
31468 +    memset(p_FmPcd, 0, sizeof(t_FmPcd));
31469 +
31470 +    p_FmPcd->p_FmPcdDriverParam = (t_FmPcdDriverParam *) XX_Malloc(sizeof(t_FmPcdDriverParam));
31471 +    if (!p_FmPcd->p_FmPcdDriverParam)
31472 +    {
31473 +        XX_Free(p_FmPcd);
31474 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Driver Param"));
31475 +        return NULL;
31476 +    }
31477 +    memset(p_FmPcd->p_FmPcdDriverParam, 0, sizeof(t_FmPcdDriverParam));
31478 +
31479 +    p_FmPcd->h_Fm = p_FmPcdParams->h_Fm;
31480 +    p_FmPcd->guestId = FmGetGuestId(p_FmPcd->h_Fm);
31481 +    p_FmPcd->h_FmMuram = FmGetMuramHandle(p_FmPcd->h_Fm);
31482 +    if (p_FmPcd->h_FmMuram)
31483 +    {
31484 +        FmGetPhysicalMuramBase(p_FmPcdParams->h_Fm, &physicalMuramBase);
31485 +        p_FmPcd->physicalMuramBase = (uint64_t)((uint64_t)(&physicalMuramBase)->low | ((uint64_t)(&physicalMuramBase)->high << 32));
31486 +    }
31487 +
31488 +    for (i = 0; i<FM_MAX_NUM_OF_PORTS; i++)
31489 +        p_FmPcd->netEnvs[i].clsPlanGrpId = ILLEGAL_CLS_PLAN;
31490 +
31491 +    if (p_FmPcdParams->useHostCommand)
31492 +    {
31493 +        t_FmHcParams    hcParams;
31494 +
31495 +        memset(&hcParams, 0, sizeof(hcParams));
31496 +        hcParams.h_Fm = p_FmPcd->h_Fm;
31497 +        hcParams.h_FmPcd = (t_Handle)p_FmPcd;
31498 +        memcpy((uint8_t*)&hcParams.params, (uint8_t*)&p_FmPcdParams->hc, sizeof(t_FmPcdHcParams));
31499 +        p_FmPcd->h_Hc = FmHcConfigAndInit(&hcParams);
31500 +        if (!p_FmPcd->h_Hc)
31501 +        {
31502 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD HC"));
31503 +            FM_PCD_Free(p_FmPcd);
31504 +            return NULL;
31505 +        }
31506 +    }
31507 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
31508 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("No Host Command defined for a guest partition."));
31509 +
31510 +    if (p_FmPcdParams->kgSupport)
31511 +    {
31512 +        p_FmPcd->p_FmPcdKg = (t_FmPcdKg *)KgConfig(p_FmPcd, p_FmPcdParams);
31513 +        if (!p_FmPcd->p_FmPcdKg)
31514 +        {
31515 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Keygen"));
31516 +            FM_PCD_Free(p_FmPcd);
31517 +            return NULL;
31518 +        }
31519 +    }
31520 +
31521 +    if (p_FmPcdParams->plcrSupport)
31522 +    {
31523 +        p_FmPcd->p_FmPcdPlcr = (t_FmPcdPlcr *)PlcrConfig(p_FmPcd, p_FmPcdParams);
31524 +        if (!p_FmPcd->p_FmPcdPlcr)
31525 +        {
31526 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Policer"));
31527 +            FM_PCD_Free(p_FmPcd);
31528 +            return NULL;
31529 +        }
31530 +    }
31531 +
31532 +    if (p_FmPcdParams->prsSupport)
31533 +    {
31534 +        p_FmPcd->p_FmPcdPrs = (t_FmPcdPrs *)PrsConfig(p_FmPcd, p_FmPcdParams);
31535 +        if (!p_FmPcd->p_FmPcdPrs)
31536 +        {
31537 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Parser"));
31538 +            FM_PCD_Free(p_FmPcd);
31539 +            return NULL;
31540 +        }
31541 +    }
31542 +
31543 +    p_FmPcd->h_Spinlock = XX_InitSpinlock();
31544 +    if (!p_FmPcd->h_Spinlock)
31545 +    {
31546 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD spinlock"));
31547 +        FM_PCD_Free(p_FmPcd);
31548 +        return NULL;
31549 +    }
31550 +    INIT_LIST(&p_FmPcd->freeLocksLst);
31551 +    INIT_LIST(&p_FmPcd->acquiredLocksLst);
31552 +
31553 +    p_FmPcd->numOfEnabledGuestPartitionsPcds = 0;
31554 +
31555 +    p_FmPcd->f_Exception                = p_FmPcdParams->f_Exception;
31556 +    p_FmPcd->f_FmPcdIndexedException    = p_FmPcdParams->f_ExceptionId;
31557 +    p_FmPcd->h_App                      = p_FmPcdParams->h_App;
31558 +
31559 +    p_FmPcd->p_CcShadow                 = NULL;
31560 +    p_FmPcd->ccShadowSize               = 0;
31561 +    p_FmPcd->ccShadowAlign              = 0;
31562 +
31563 +    p_FmPcd->h_ShadowSpinlock = XX_InitSpinlock();
31564 +    if (!p_FmPcd->h_ShadowSpinlock)
31565 +    {
31566 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD shadow spinlock"));
31567 +        FM_PCD_Free(p_FmPcd);
31568 +        return NULL;
31569 +    }
31570 +
31571 +    return p_FmPcd;
31572 +}
31573 +
31574 +t_Error FM_PCD_Init(t_Handle h_FmPcd)
31575 +{
31576 +    t_FmPcd         *p_FmPcd = (t_FmPcd*)h_FmPcd;
31577 +    t_Error         err = E_OK;
31578 +    t_FmPcdIpcMsg   msg;
31579 +
31580 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
31581 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
31582 +
31583 +    FM_GetRevision(p_FmPcd->h_Fm, &p_FmPcd->fmRevInfo);
31584 +
31585 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
31586 +    {
31587 +        memset(p_FmPcd->fmPcdIpcHandlerModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
31588 +        if (Sprint (p_FmPcd->fmPcdIpcHandlerModuleName, "FM_PCD_%d_%d", FmGetId(p_FmPcd->h_Fm), NCSW_MASTER_ID) != 10)
31589 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
31590 +        memset(p_FmPcd->fmPcdModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
31591 +        if (Sprint (p_FmPcd->fmPcdModuleName, "FM_PCD_%d_%d",FmGetId(p_FmPcd->h_Fm), p_FmPcd->guestId) != (p_FmPcd->guestId<10 ? 10:11))
31592 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
31593 +
31594 +        p_FmPcd->h_IpcSession = XX_IpcInitSession(p_FmPcd->fmPcdIpcHandlerModuleName, p_FmPcd->fmPcdModuleName);
31595 +        if (p_FmPcd->h_IpcSession)
31596 +        {
31597 +            t_FmPcdIpcReply         reply;
31598 +            uint32_t                replyLength;
31599 +            uint8_t                 isMasterAlive = 0;
31600 +
31601 +            memset(&msg, 0, sizeof(msg));
31602 +            memset(&reply, 0, sizeof(reply));
31603 +            msg.msgId = FM_PCD_MASTER_IS_ALIVE;
31604 +            msg.msgBody[0] = p_FmPcd->guestId;
31605 +            blockingFlag = TRUE;
31606 +
31607 +            do
31608 +            {
31609 +                replyLength = sizeof(uint32_t) + sizeof(isMasterAlive);
31610 +                if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
31611 +                                             (uint8_t*)&msg,
31612 +                                             sizeof(msg.msgId)+sizeof(p_FmPcd->guestId),
31613 +                                             (uint8_t*)&reply,
31614 +                                             &replyLength,
31615 +                                             IpcMsgCompletionCB,
31616 +                                             h_FmPcd)) != E_OK)
31617 +                    REPORT_ERROR(MAJOR, err, NO_MSG);
31618 +                while (blockingFlag) ;
31619 +                if (replyLength != (sizeof(uint32_t) + sizeof(isMasterAlive)))
31620 +                    REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
31621 +                isMasterAlive = *(uint8_t*)(reply.replyBody);
31622 +            } while (!isMasterAlive);
31623 +        }
31624 +    }
31625 +
31626 +    CHECK_INIT_PARAMETERS(p_FmPcd, CheckFmPcdParameters);
31627 +
31628 +    if (p_FmPcd->p_FmPcdKg)
31629 +    {
31630 +        err = KgInit(p_FmPcd);
31631 +        if (err)
31632 +            RETURN_ERROR(MAJOR, err, NO_MSG);
31633 +    }
31634 +
31635 +    if (p_FmPcd->p_FmPcdPlcr)
31636 +    {
31637 +        err = PlcrInit(p_FmPcd);
31638 +        if (err)
31639 +            RETURN_ERROR(MAJOR, err, NO_MSG);
31640 +    }
31641 +
31642 +    if (p_FmPcd->p_FmPcdPrs)
31643 +    {
31644 +        err = PrsInit(p_FmPcd);
31645 +        if (err)
31646 +            RETURN_ERROR(MAJOR, err, NO_MSG);
31647 +    }
31648 +
31649 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
31650 +    {
31651 +         /* register to inter-core messaging mechanism */
31652 +        memset(p_FmPcd->fmPcdModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
31653 +        if (Sprint (p_FmPcd->fmPcdModuleName, "FM_PCD_%d_%d",FmGetId(p_FmPcd->h_Fm),NCSW_MASTER_ID) != 10)
31654 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
31655 +        err = XX_IpcRegisterMsgHandler(p_FmPcd->fmPcdModuleName, IpcMsgHandlerCB, p_FmPcd, FM_PCD_MAX_REPLY_SIZE);
31656 +        if (err)
31657 +            RETURN_ERROR(MAJOR, err, NO_MSG);
31658 +    }
31659 +
31660 +    /* IPv6 Frame-Id used for fragmentation */
31661 +    p_FmPcd->ipv6FrameIdAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram, 4, 4));
31662 +    if (!p_FmPcd->ipv6FrameIdAddr)
31663 +    {
31664 +        FM_PCD_Free(p_FmPcd);
31665 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for IPv6 Frame-Id"));
31666 +    }
31667 +    IOMemSet32(UINT_TO_PTR(p_FmPcd->ipv6FrameIdAddr), 0,  4);
31668 +
31669 +    /* CAPWAP Frame-Id used for fragmentation */
31670 +    p_FmPcd->capwapFrameIdAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram, 2, 4));
31671 +    if (!p_FmPcd->capwapFrameIdAddr)
31672 +    {
31673 +        FM_PCD_Free(p_FmPcd);
31674 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CAPWAP Frame-Id"));
31675 +    }
31676 +    IOMemSet32(UINT_TO_PTR(p_FmPcd->capwapFrameIdAddr), 0,  2);
31677 +
31678 +    XX_Free(p_FmPcd->p_FmPcdDriverParam);
31679 +    p_FmPcd->p_FmPcdDriverParam = NULL;
31680 +
31681 +    FmRegisterPcd(p_FmPcd->h_Fm, p_FmPcd);
31682 +
31683 +    return E_OK;
31684 +}
31685 +
31686 +t_Error FM_PCD_Free(t_Handle h_FmPcd)
31687 +{
31688 +    t_FmPcd                             *p_FmPcd =(t_FmPcd *)h_FmPcd;
31689 +    t_Error                             err = E_OK;
31690 +
31691 +    if (p_FmPcd->ipv6FrameIdAddr)
31692 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, UINT_TO_PTR(p_FmPcd->ipv6FrameIdAddr));
31693 +
31694 +    if (p_FmPcd->capwapFrameIdAddr)
31695 +        FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, UINT_TO_PTR(p_FmPcd->capwapFrameIdAddr));
31696 +
31697 +    if (p_FmPcd->enabled)
31698 +        FM_PCD_Disable(p_FmPcd);
31699 +
31700 +    if (p_FmPcd->p_FmPcdDriverParam)
31701 +    {
31702 +        XX_Free(p_FmPcd->p_FmPcdDriverParam);
31703 +        p_FmPcd->p_FmPcdDriverParam = NULL;
31704 +    }
31705 +
31706 +    if (p_FmPcd->p_FmPcdKg)
31707 +    {
31708 +        if ((err = KgFree(p_FmPcd)) != E_OK)
31709 +            RETURN_ERROR(MINOR, err, NO_MSG);
31710 +        XX_Free(p_FmPcd->p_FmPcdKg);
31711 +        p_FmPcd->p_FmPcdKg = NULL;
31712 +    }
31713 +
31714 +    if (p_FmPcd->p_FmPcdPlcr)
31715 +    {
31716 +        PlcrFree(p_FmPcd);
31717 +        XX_Free(p_FmPcd->p_FmPcdPlcr);
31718 +        p_FmPcd->p_FmPcdPlcr = NULL;
31719 +    }
31720 +
31721 +    if (p_FmPcd->p_FmPcdPrs)
31722 +    {
31723 +        if (p_FmPcd->guestId == NCSW_MASTER_ID)
31724 +            PrsFree(p_FmPcd);
31725 +        XX_Free(p_FmPcd->p_FmPcdPrs);
31726 +        p_FmPcd->p_FmPcdPrs = NULL;
31727 +    }
31728 +
31729 +    if (p_FmPcd->h_Hc)
31730 +    {
31731 +        FmHcFree(p_FmPcd->h_Hc);
31732 +        p_FmPcd->h_Hc = NULL;
31733 +    }
31734 +
31735 +    XX_IpcUnregisterMsgHandler(p_FmPcd->fmPcdModuleName);
31736 +
31737 +    FmUnregisterPcd(p_FmPcd->h_Fm);
31738 +
31739 +    ReleaseFreeLocksLst(p_FmPcd);
31740 +
31741 +    if (p_FmPcd->h_Spinlock)
31742 +        XX_FreeSpinlock(p_FmPcd->h_Spinlock);
31743 +
31744 +    if (p_FmPcd->h_ShadowSpinlock)
31745 +        XX_FreeSpinlock(p_FmPcd->h_ShadowSpinlock);
31746 +
31747 +    XX_Free(p_FmPcd);
31748 +
31749 +    return E_OK;
31750 +}
31751 +
31752 +t_Error FM_PCD_ConfigException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable)
31753 +{
31754 +    t_FmPcd         *p_FmPcd = (t_FmPcd*)h_FmPcd;
31755 +    uint32_t        bitMask = 0;
31756 +
31757 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
31758 +
31759 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
31760 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ConfigException - guest mode!"));
31761 +
31762 +    GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception);
31763 +    if (bitMask)
31764 +    {
31765 +        if (enable)
31766 +            p_FmPcd->exceptions |= bitMask;
31767 +        else
31768 +            p_FmPcd->exceptions &= ~bitMask;
31769 +   }
31770 +    else
31771 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
31772 +
31773 +    return E_OK;
31774 +}
31775 +
31776 +t_Error FM_PCD_ConfigHcFramesDataMemory(t_Handle h_FmPcd, uint8_t memId)
31777 +{
31778 +    t_FmPcd         *p_FmPcd = (t_FmPcd*)h_FmPcd;
31779 +
31780 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
31781 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
31782 +
31783 +    return FmHcSetFramesDataMemory(p_FmPcd->h_Hc, memId);
31784 +}
31785 +
31786 +t_Error FM_PCD_Enable(t_Handle h_FmPcd)
31787 +{
31788 +    t_FmPcd             *p_FmPcd = (t_FmPcd*)h_FmPcd;
31789 +    t_Error             err = E_OK;
31790 +
31791 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
31792 +
31793 +    if (p_FmPcd->enabled)
31794 +        return E_OK;
31795 +
31796 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
31797 +        p_FmPcd->h_IpcSession)
31798 +    {
31799 +        uint8_t         enabled;
31800 +        t_FmPcdIpcMsg   msg;
31801 +        t_FmPcdIpcReply reply;
31802 +        uint32_t        replyLength;
31803 +
31804 +        memset(&reply, 0, sizeof(reply));
31805 +        memset(&msg, 0, sizeof(msg));
31806 +        msg.msgId = FM_PCD_MASTER_IS_ENABLED;
31807 +        replyLength = sizeof(uint32_t) + sizeof(enabled);
31808 +        if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
31809 +                                     (uint8_t*)&msg,
31810 +                                     sizeof(msg.msgId),
31811 +                                     (uint8_t*)&reply,
31812 +                                     &replyLength,
31813 +                                     NULL,
31814 +                                     NULL)) != E_OK)
31815 +            RETURN_ERROR(MAJOR, err, NO_MSG);
31816 +        if (replyLength != sizeof(uint32_t) + sizeof(enabled))
31817 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
31818 +        p_FmPcd->enabled = (bool)!!(*(uint8_t*)(reply.replyBody));
31819 +        if (!p_FmPcd->enabled)
31820 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-PCD master should be enabled first!"));
31821 +
31822 +        return E_OK;
31823 +    }
31824 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
31825 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
31826 +                     ("running in guest-mode without IPC!"));
31827 +
31828 +    if (p_FmPcd->p_FmPcdKg)
31829 +        KgEnable(p_FmPcd);
31830 +
31831 +    if (p_FmPcd->p_FmPcdPlcr)
31832 +        PlcrEnable(p_FmPcd);
31833 +
31834 +    if (p_FmPcd->p_FmPcdPrs)
31835 +        PrsEnable(p_FmPcd);
31836 +
31837 +    p_FmPcd->enabled = TRUE;
31838 +
31839 +    return E_OK;
31840 +}
31841 +
31842 +t_Error FM_PCD_Disable(t_Handle h_FmPcd)
31843 +{
31844 +    t_FmPcd             *p_FmPcd = (t_FmPcd*)h_FmPcd;
31845 +    t_Error             err = E_OK;
31846 +
31847 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
31848 +
31849 +    if (!p_FmPcd->enabled)
31850 +        return E_OK;
31851 +
31852 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
31853 +        p_FmPcd->h_IpcSession)
31854 +    {
31855 +        t_FmPcdIpcMsg       msg;
31856 +        t_FmPcdIpcReply     reply;
31857 +        uint32_t            replyLength;
31858 +
31859 +        memset(&reply, 0, sizeof(reply));
31860 +        memset(&msg, 0, sizeof(msg));
31861 +        msg.msgId = FM_PCD_GUEST_DISABLE;
31862 +        replyLength = sizeof(uint32_t);
31863 +        if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
31864 +                                     (uint8_t*)&msg,
31865 +                                     sizeof(msg.msgId),
31866 +                                     (uint8_t*)&reply,
31867 +                                     &replyLength,
31868 +                                     NULL,
31869 +                                     NULL)) != E_OK)
31870 +            RETURN_ERROR(MAJOR, err, NO_MSG);
31871 +        if (replyLength != sizeof(uint32_t))
31872 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
31873 +        if (reply.error == E_OK)
31874 +            p_FmPcd->enabled = FALSE;
31875 +
31876 +        return (t_Error)(reply.error);
31877 +    }
31878 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
31879 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
31880 +                     ("running in guest-mode without IPC!"));
31881 +
31882 +    if (p_FmPcd->numOfEnabledGuestPartitionsPcds != 0)
31883 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
31884 +                     ("Trying to disable a master partition PCD while"
31885 +                      "guest partitions are still enabled!"));
31886 +
31887 +    if (p_FmPcd->p_FmPcdKg)
31888 +         KgDisable(p_FmPcd);
31889 +
31890 +    if (p_FmPcd->p_FmPcdPlcr)
31891 +        PlcrDisable(p_FmPcd);
31892 +
31893 +    if (p_FmPcd->p_FmPcdPrs)
31894 +        PrsDisable(p_FmPcd);
31895 +
31896 +    p_FmPcd->enabled = FALSE;
31897 +
31898 +    return E_OK;
31899 +}
31900 +
31901 +t_Handle FM_PCD_NetEnvCharacteristicsSet(t_Handle h_FmPcd, t_FmPcdNetEnvParams  *p_NetEnvParams)
31902 +{
31903 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
31904 +    uint32_t                intFlags, specialUnits = 0;
31905 +    uint8_t                 bitId = 0;
31906 +    uint8_t                 i, j, k;
31907 +    uint8_t                 netEnvCurrId;
31908 +    uint8_t                 ipsecAhUnit = 0,ipsecEspUnit = 0;
31909 +    bool                    ipsecAhExists = FALSE, ipsecEspExists = FALSE, shim1Selected = FALSE;
31910 +    uint8_t                 hdrNum;
31911 +    t_FmPcdNetEnvParams     *p_ModifiedNetEnvParams;
31912 +
31913 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_STATE, NULL);
31914 +    SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, NULL);
31915 +    SANITY_CHECK_RETURN_VALUE(p_NetEnvParams, E_NULL_POINTER, NULL);
31916 +
31917 +    intFlags = FmPcdLock(p_FmPcd);
31918 +
31919 +    /* find a new netEnv */
31920 +    for (i = 0; i < FM_MAX_NUM_OF_PORTS; i++)
31921 +        if (!p_FmPcd->netEnvs[i].used)
31922 +            break;
31923 +
31924 +    if (i== FM_MAX_NUM_OF_PORTS)
31925 +    {
31926 +        REPORT_ERROR(MAJOR, E_FULL,("No more than %d netEnv's allowed.", FM_MAX_NUM_OF_PORTS));
31927 +        FmPcdUnlock(p_FmPcd, intFlags);
31928 +        return NULL;
31929 +    }
31930 +
31931 +    p_FmPcd->netEnvs[i].used = TRUE;
31932 +    FmPcdUnlock(p_FmPcd, intFlags);
31933 +
31934 +    /* As anyone doesn't have handle of this netEnv yet, no need
31935 +       to protect it with spinlocks */
31936 +
31937 +    p_ModifiedNetEnvParams = (t_FmPcdNetEnvParams *)XX_Malloc(sizeof(t_FmPcdNetEnvParams));
31938 +    if (!p_ModifiedNetEnvParams)
31939 +    {
31940 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FmPcdNetEnvParams"));
31941 +        return NULL;
31942 +    }
31943 +
31944 +    memcpy(p_ModifiedNetEnvParams, p_NetEnvParams, sizeof(t_FmPcdNetEnvParams));
31945 +    p_NetEnvParams = p_ModifiedNetEnvParams;
31946 +
31947 +    netEnvCurrId = (uint8_t)i;
31948 +
31949 +    /* clear from previous use */
31950 +    memset(&p_FmPcd->netEnvs[netEnvCurrId].units, 0, FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS * sizeof(t_FmPcdIntDistinctionUnit));
31951 +    memset(&p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs, 0, FM_PCD_MAX_NUM_OF_ALIAS_HDRS * sizeof(t_FmPcdNetEnvAliases));
31952 +    memcpy(&p_FmPcd->netEnvs[netEnvCurrId].units, p_NetEnvParams->units, p_NetEnvParams->numOfDistinctionUnits*sizeof(t_FmPcdIntDistinctionUnit));
31953 +
31954 +    p_FmPcd->netEnvs[netEnvCurrId].netEnvId = netEnvCurrId;
31955 +    p_FmPcd->netEnvs[netEnvCurrId].h_FmPcd = p_FmPcd;
31956 +
31957 +    p_FmPcd->netEnvs[netEnvCurrId].clsPlanGrpId = ILLEGAL_CLS_PLAN;
31958 +
31959 +    /* check that header with opt is not interchanged with the same header */
31960 +    for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
31961 +            && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
31962 +    {
31963 +        for (k = 0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
31964 +            && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
31965 +        {
31966 +            /* if an option exists, check that other headers are not the same header
31967 +            without option */
31968 +            if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt)
31969 +            {
31970 +                for (j = 0; (j < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
31971 +                        && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[j].hdr != HEADER_TYPE_NONE); j++)
31972 +                {
31973 +                    if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[j].hdr == p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr) &&
31974 +                        !p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[j].opt)
31975 +                    {
31976 +                        REPORT_ERROR(MINOR, E_FULL,
31977 +                                ("Illegal unit - header with opt may not be interchangeable with the same header without opt"));
31978 +                        XX_Free(p_ModifiedNetEnvParams);
31979 +                        return NULL;
31980 +                    }
31981 +                }
31982 +            }
31983 +        }
31984 +    }
31985 +
31986 +    /* Specific headers checking  */
31987 +    for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
31988 +        && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
31989 +    {
31990 +        for (k = 0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
31991 +            && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
31992 +        {
31993 +            /* Some headers pairs may not be defined on different units as the parser
31994 +            doesn't distinguish */
31995 +            /* IPSEC_AH and IPSEC_SPI can't be 2 units,  */
31996 +            /* check that header with opt is not interchanged with the same header */
31997 +            if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPSEC_AH)
31998 +            {
31999 +                if (ipsecEspExists && (ipsecEspUnit != i))
32000 +                {
32001 +                    REPORT_ERROR(MINOR, E_INVALID_STATE, ("HEADER_TYPE_IPSEC_AH and HEADER_TYPE_IPSEC_ESP may not be defined in separate units"));
32002 +                    XX_Free(p_ModifiedNetEnvParams);
32003 +                    return NULL;
32004 +                }
32005 +                else
32006 +                {
32007 +                    ipsecAhUnit = i;
32008 +                    ipsecAhExists = TRUE;
32009 +                }
32010 +            }
32011 +            if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPSEC_ESP)
32012 +            {
32013 +                if (ipsecAhExists && (ipsecAhUnit != i))
32014 +                {
32015 +                    REPORT_ERROR(MINOR, E_INVALID_STATE, ("HEADER_TYPE_IPSEC_AH and HEADER_TYPE_IPSEC_ESP may not be defined in separate units"));
32016 +                    XX_Free(p_ModifiedNetEnvParams);
32017 +                    return NULL;
32018 +                }
32019 +                else
32020 +                {
32021 +                    ipsecEspUnit = i;
32022 +                    ipsecEspExists = TRUE;
32023 +                }
32024 +            }
32025 +            /* ENCAP_ESP  */
32026 +            if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_UDP_ENCAP_ESP)
32027 +            {
32028 +                /* IPSec UDP encapsulation is currently set to use SHIM1 */
32029 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_UDP_ENCAP_ESP;
32030 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM1;
32031 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM1;
32032 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
32033 +            }
32034 +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
32035 +            /* UDP_LITE  */
32036 +            if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_UDP_LITE)
32037 +            {
32038 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_UDP_LITE;
32039 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_UDP;
32040 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_UDP;
32041 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
32042 +            }
32043 +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
32044 +
32045 +            /* IP FRAG  */
32046 +            if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPv4) &&
32047 +                (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt == IPV4_FRAG_1))
32048 +            {
32049 +                /* If IPv4+Frag, we need to set 2 units - SHIM 2 and IPv4. We first set SHIM2, and than check if
32050 +                 * IPv4 exists. If so we don't need to set an extra unit
32051 +                 * We consider as "having IPv4" any IPv4 without interchangable headers
32052 +                 * but including any options.  */
32053 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_IPv4;
32054 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].opt = IPV4_FRAG_1;
32055 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM2;
32056 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM2;
32057 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
32058 +
32059 +                /* check if IPv4 header exists by itself */
32060 +                if (FmPcdNetEnvGetUnitId(p_FmPcd, netEnvCurrId, HEADER_TYPE_IPv4, FALSE, 0) == FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
32061 +                {
32062 +                    p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits].hdrs[0].hdr = HEADER_TYPE_IPv4;
32063 +                    p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits++].hdrs[0].opt = 0;
32064 +                }
32065 +            }
32066 +            if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPv6) &&
32067 +                (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt == IPV6_FRAG_1))
32068 +            {
32069 +                /* If IPv6+Frag, we need to set 2 units - SHIM 2 and IPv6. We first set SHIM2, and than check if
32070 +                 * IPv4 exists. If so we don't need to set an extra unit
32071 +                 * We consider as "having IPv6" any IPv6 without interchangable headers
32072 +                 * but including any options.  */
32073 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_IPv6;
32074 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].opt = IPV6_FRAG_1;
32075 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM2;
32076 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM2;
32077 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
32078 +
32079 +                /* check if IPv6 header exists by itself */
32080 +                if (FmPcdNetEnvGetUnitId(p_FmPcd, netEnvCurrId, HEADER_TYPE_IPv6, FALSE, 0) == FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
32081 +                {
32082 +                    p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits].hdrs[0].hdr = HEADER_TYPE_IPv6;
32083 +                    p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits++].hdrs[0].opt = 0;
32084 +                }
32085 +            }
32086 +#if (DPAA_VERSION >= 11)
32087 +            /* CAPWAP FRAG  */
32088 +            if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_CAPWAP) &&
32089 +                (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt == CAPWAP_FRAG_1))
32090 +            {
32091 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_CAPWAP;
32092 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].opt = CAPWAP_FRAG_1;
32093 +                p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM2;
32094 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM2;
32095 +                p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
32096 +            }
32097 +#endif /* (DPAA_VERSION >= 11) */
32098 +        }
32099 +    }
32100 +
32101 +    /* if private header (shim), check that no other headers specified */
32102 +    for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
32103 +        && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
32104 +    {
32105 +        if (IS_PRIVATE_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
32106 +            if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[1].hdr != HEADER_TYPE_NONE)
32107 +            {
32108 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("SHIM header may not be interchanged with other headers"));
32109 +                XX_Free(p_ModifiedNetEnvParams);
32110 +                return NULL;
32111 +            }
32112 +    }
32113 +
32114 +    for (i = 0; i < p_NetEnvParams->numOfDistinctionUnits; i++)
32115 +    {
32116 +        if (IS_PRIVATE_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
32117 +            switch (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr)
32118 +            {
32119 +                case (HEADER_TYPE_USER_DEFINED_SHIM1):
32120 +                    if (shim1Selected)
32121 +                    {
32122 +                        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("SHIM header cannot be selected with UDP_IPSEC_ESP"));
32123 +                        XX_Free(p_ModifiedNetEnvParams);
32124 +                        return NULL;
32125 +                    }
32126 +                    shim1Selected = TRUE;
32127 +                    p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i] = 0x00000001;
32128 +                    break;
32129 +                case (HEADER_TYPE_USER_DEFINED_SHIM2):
32130 +                    p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i] = 0x00000002;
32131 +                    break;
32132 +                default:
32133 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Requested SHIM not supported"));
32134 +            }
32135 +        else
32136 +        {
32137 +            p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i] = (uint32_t)(0x80000000 >> bitId++);
32138 +
32139 +            if (IS_SPECIAL_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
32140 +                p_FmPcd->netEnvs[netEnvCurrId].macsecVector = p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i];
32141 +        }
32142 +    }
32143 +
32144 +    /* define a set of hardware parser LCV's according to the defined netenv */
32145 +
32146 +    /* set an array of LCV's for each header in the netEnv */
32147 +    for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
32148 +        && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
32149 +    {
32150 +        /* private headers have no LCV in the hard parser */
32151 +        if (!IS_PRIVATE_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
32152 +        {
32153 +            for (k = 0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
32154 +                    && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
32155 +            {
32156 +                hdrNum = GetPrsHdrNum(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr);
32157 +                if ((hdrNum == ILLEGAL_HDR_NUM) || (hdrNum == NO_HDR_NUM))
32158 +                {
32159 +                    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
32160 +                    XX_Free(p_ModifiedNetEnvParams);
32161 +                    return NULL;
32162 +                }
32163 +                p_FmPcd->netEnvs[netEnvCurrId].lcvs[hdrNum] |= p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i];
32164 +            }
32165 +        }
32166 +    }
32167 +    XX_Free(p_ModifiedNetEnvParams);
32168 +
32169 +    p_FmPcd->netEnvs[netEnvCurrId].h_Spinlock = XX_InitSpinlock();
32170 +    if (!p_FmPcd->netEnvs[netEnvCurrId].h_Spinlock)
32171 +    {
32172 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Pcd NetEnv spinlock"));
32173 +        return NULL;
32174 +    }
32175 +    return &p_FmPcd->netEnvs[netEnvCurrId];
32176 +}
32177 +
32178 +t_Error FM_PCD_NetEnvCharacteristicsDelete(t_Handle h_NetEnv)
32179 +{
32180 +    t_FmPcdNetEnv   *p_NetEnv = (t_FmPcdNetEnv*)h_NetEnv;
32181 +    t_FmPcd         *p_FmPcd = p_NetEnv->h_FmPcd;
32182 +    uint32_t        intFlags;
32183 +    uint8_t         netEnvId = p_NetEnv->netEnvId;
32184 +
32185 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_STATE);
32186 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
32187 +
32188 +    /* check that no port is bound to this netEnv */
32189 +    if (p_FmPcd->netEnvs[netEnvId].owners)
32190 +    {
32191 +        RETURN_ERROR(MINOR, E_INVALID_STATE,
32192 +                ("Trying to delete a netEnv that has ports/schemes/trees/clsPlanGrps bound to"));
32193 +    }
32194 +
32195 +    intFlags = FmPcdLock(p_FmPcd);
32196 +
32197 +    p_FmPcd->netEnvs[netEnvId].used = FALSE;
32198 +    p_FmPcd->netEnvs[netEnvId].clsPlanGrpId = ILLEGAL_CLS_PLAN;
32199 +
32200 +    memset(p_FmPcd->netEnvs[netEnvId].units, 0, sizeof(t_FmPcdIntDistinctionUnit)*FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
32201 +    memset(p_FmPcd->netEnvs[netEnvId].unitsVectors, 0, sizeof(uint32_t)*FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
32202 +    memset(p_FmPcd->netEnvs[netEnvId].lcvs, 0, sizeof(uint32_t)*FM_PCD_PRS_NUM_OF_HDRS);
32203 +
32204 +    if (p_FmPcd->netEnvs[netEnvId].h_Spinlock)
32205 +        XX_FreeSpinlock(p_FmPcd->netEnvs[netEnvId].h_Spinlock);
32206 +
32207 +    FmPcdUnlock(p_FmPcd, intFlags);
32208 +    return E_OK;
32209 +}
32210 +
32211 +void FM_PCD_HcTxConf(t_Handle h_FmPcd, t_DpaaFD *p_Fd)
32212 +{
32213 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
32214 +
32215 +    SANITY_CHECK_RETURN(h_FmPcd, E_INVALID_STATE);
32216 +
32217 +    FmHcTxConf(p_FmPcd->h_Hc, p_Fd);
32218 +}
32219 +
32220 +t_Error FM_PCD_SetAdvancedOffloadSupport(t_Handle h_FmPcd)
32221 +{
32222 +    t_FmPcd                     *p_FmPcd = (t_FmPcd*)h_FmPcd;
32223 +    t_FmCtrlCodeRevisionInfo    revInfo;
32224 +    t_Error                     err;
32225 +
32226 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
32227 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
32228 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->enabled, E_INVALID_STATE);
32229 +
32230 +    if ((err = FM_GetFmanCtrlCodeRevision(p_FmPcd->h_Fm, &revInfo)) != E_OK)
32231 +    {
32232 +        DBG(WARNING, ("FM in guest-mode without IPC, can't validate firmware revision."));
32233 +        revInfo.packageRev = IP_OFFLOAD_PACKAGE_NUMBER;
32234 +    }
32235 +    if (!IS_OFFLOAD_PACKAGE(revInfo.packageRev))
32236 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Fman ctrl code package"));
32237 +
32238 +    if (!p_FmPcd->h_Hc)
32239 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("HC must be initialized in this mode"));
32240 +
32241 +    p_FmPcd->advancedOffloadSupport = TRUE;
32242 +
32243 +    return E_OK;
32244 +}
32245 +
32246 +uint32_t FM_PCD_GetCounter(t_Handle h_FmPcd, e_FmPcdCounters counter)
32247 +{
32248 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
32249 +    uint32_t                outCounter = 0;
32250 +    t_Error                 err;
32251 +
32252 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, 0);
32253 +    SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, 0);
32254 +
32255 +    switch (counter)
32256 +    {
32257 +        case (e_FM_PCD_KG_COUNTERS_TOTAL):
32258 +            if (!p_FmPcd->p_FmPcdKg)
32259 +            {
32260 +                REPORT_ERROR(MAJOR, E_INVALID_STATE, ("KeyGen is not activated"));
32261 +                return 0;
32262 +            }
32263 +            if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
32264 +                !p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs &&
32265 +                !p_FmPcd->h_IpcSession)
32266 +            {
32267 +                REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
32268 +                             ("running in guest-mode without neither IPC nor mapped register!"));
32269 +                return 0;
32270 +            }
32271 +            break;
32272 +
32273 +        case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
32274 +        case (e_FM_PCD_PLCR_COUNTERS_RED):
32275 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
32276 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
32277 +        case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
32278 +        case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
32279 +            if (!p_FmPcd->p_FmPcdPlcr)
32280 +            {
32281 +                REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Policer is not activated"));
32282 +                return 0;
32283 +            }
32284 +            if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
32285 +                !p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs &&
32286 +                !p_FmPcd->h_IpcSession)
32287 +            {
32288 +                REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
32289 +                             ("running in \"guest-mode\" without neither IPC nor mapped register!"));
32290 +                return 0;
32291 +            }
32292 +
32293 +            /* check that counters are enabled */
32294 +            if (p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs &&
32295 +                !(GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr) & FM_PCD_PLCR_GCR_STEN))
32296 +            {
32297 +                REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter was not enabled"));
32298 +                return 0;
32299 +            }
32300 +            ASSERT_COND(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs ||
32301 +                        ((p_FmPcd->guestId != NCSW_MASTER_ID) && p_FmPcd->h_IpcSession));
32302 +            break;
32303 +
32304 +        case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
32305 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
32306 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
32307 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
32308 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
32309 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
32310 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
32311 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
32312 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
32313 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
32314 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
32315 +        case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
32316 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
32317 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
32318 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
32319 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
32320 +        case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
32321 +            if (!p_FmPcd->p_FmPcdPrs)
32322 +            {
32323 +                REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Parser is not activated"));
32324 +                return 0;
32325 +            }
32326 +            if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
32327 +                !p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs &&
32328 +                !p_FmPcd->h_IpcSession)
32329 +            {
32330 +                REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
32331 +                             ("running in guest-mode without neither IPC nor mapped register!"));
32332 +                return 0;
32333 +            }
32334 +            break;
32335 +        default:
32336 +            REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported type of counter"));
32337 +            return 0;
32338 +    }
32339 +
32340 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
32341 +        p_FmPcd->h_IpcSession)
32342 +    {
32343 +        t_FmPcdIpcMsg           msg;
32344 +        t_FmPcdIpcReply         reply;
32345 +        uint32_t                replyLength;
32346 +
32347 +        memset(&msg, 0, sizeof(msg));
32348 +        memset(&reply, 0, sizeof(reply));
32349 +        msg.msgId = FM_PCD_GET_COUNTER;
32350 +        memcpy(msg.msgBody, (uint8_t *)&counter, sizeof(uint32_t));
32351 +        replyLength = sizeof(uint32_t) + sizeof(uint32_t);
32352 +        if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
32353 +                                     (uint8_t*)&msg,
32354 +                                     sizeof(msg.msgId) +sizeof(uint32_t),
32355 +                                     (uint8_t*)&reply,
32356 +                                     &replyLength,
32357 +                                     NULL,
32358 +                                     NULL)) != E_OK)
32359 +            RETURN_ERROR(MAJOR, err, NO_MSG);
32360 +        if (replyLength != sizeof(uint32_t) + sizeof(uint32_t))
32361 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
32362 +
32363 +        memcpy((uint8_t*)&outCounter, reply.replyBody, sizeof(uint32_t));
32364 +        return outCounter;
32365 +    }
32366 +
32367 +    switch (counter)
32368 +    {
32369 +        /* Parser statistics */
32370 +        case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
32371 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pds);
32372 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
32373 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rrs);
32374 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
32375 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rrs);
32376 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
32377 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rrs);
32378 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
32379 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srrs);
32380 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
32381 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rres);
32382 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
32383 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rres);
32384 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
32385 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rres);
32386 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
32387 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srres);
32388 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
32389 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spcs);
32390 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
32391 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spscs);
32392 +        case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
32393 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_hxscs);
32394 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
32395 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrcs);
32396 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
32397 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrscs);
32398 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
32399 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwcs);
32400 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
32401 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwscs);
32402 +        case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
32403 +               return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_fcscs);
32404 +        case (e_FM_PCD_KG_COUNTERS_TOTAL):
32405 +               return GET_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_tpc);
32406 +
32407 +        /* Policer statistics */
32408 +        case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
32409 +                return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ypcnt);
32410 +        case (e_FM_PCD_PLCR_COUNTERS_RED):
32411 +                return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rpcnt);
32412 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
32413 +                return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rrpcnt);
32414 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
32415 +                return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rypcnt);
32416 +        case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
32417 +                return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_tpcnt);
32418 +        case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
32419 +                return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_flmcnt);
32420 +    }
32421 +    return 0;
32422 +}
32423 +
32424 +t_Error FM_PCD_SetException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable)
32425 +{
32426 +    t_FmPcd         *p_FmPcd = (t_FmPcd*)h_FmPcd;
32427 +    uint32_t        bitMask = 0, tmpReg;
32428 +
32429 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
32430 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
32431 +
32432 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
32433 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetException - guest mode!"));
32434 +
32435 +    GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception);
32436 +
32437 +    if (bitMask)
32438 +    {
32439 +        if (enable)
32440 +            p_FmPcd->exceptions |= bitMask;
32441 +        else
32442 +            p_FmPcd->exceptions &= ~bitMask;
32443 +
32444 +        switch (exception)
32445 +        {
32446 +            case (e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC):
32447 +            case (e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW):
32448 +                if (!p_FmPcd->p_FmPcdKg)
32449 +                    RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - keygen is not working"));
32450 +                break;
32451 +            case (e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC):
32452 +            case (e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR):
32453 +            case (e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE):
32454 +            case (e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE):
32455 +                if (!p_FmPcd->p_FmPcdPlcr)
32456 +                    RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - policer is not working"));
32457 +                break;
32458 +            case (e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC):
32459 +            case (e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC):
32460 +                if (!p_FmPcd->p_FmPcdPrs)
32461 +                    RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - parser is not working"));
32462 +                break;
32463 +        }
32464 +
32465 +        switch (exception)
32466 +        {
32467 +            case (e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC):
32468 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer);
32469 +                if (enable)
32470 +                    tmpReg |= FM_EX_KG_DOUBLE_ECC;
32471 +                else
32472 +                    tmpReg &= ~FM_EX_KG_DOUBLE_ECC;
32473 +                WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer, tmpReg);
32474 +                break;
32475 +            case (e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW):
32476 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer);
32477 +                if (enable)
32478 +                    tmpReg |= FM_EX_KG_KEYSIZE_OVERFLOW;
32479 +                else
32480 +                    tmpReg &= ~FM_EX_KG_KEYSIZE_OVERFLOW;
32481 +                WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer, tmpReg);
32482 +                break;
32483 +            case (e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC):
32484 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_perer);
32485 +                if (enable)
32486 +                    tmpReg |= FM_PCD_PRS_DOUBLE_ECC;
32487 +                else
32488 +                    tmpReg &= ~FM_PCD_PRS_DOUBLE_ECC;
32489 +                WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_perer, tmpReg);
32490 +                break;
32491 +            case (e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC):
32492 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pever);
32493 +                if (enable)
32494 +                    tmpReg |= FM_PCD_PRS_SINGLE_ECC;
32495 +                else
32496 +                    tmpReg &= ~FM_PCD_PRS_SINGLE_ECC;
32497 +                WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pever, tmpReg);
32498 +                break;
32499 +            case (e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC):
32500 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier);
32501 +                if (enable)
32502 +                    tmpReg |= FM_PCD_PLCR_DOUBLE_ECC;
32503 +                else
32504 +                    tmpReg &= ~FM_PCD_PLCR_DOUBLE_ECC;
32505 +                WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier, tmpReg);
32506 +                break;
32507 +            case (e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR):
32508 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier);
32509 +                if (enable)
32510 +                    tmpReg |= FM_PCD_PLCR_INIT_ENTRY_ERROR;
32511 +                else
32512 +                    tmpReg &= ~FM_PCD_PLCR_INIT_ENTRY_ERROR;
32513 +                WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier, tmpReg);
32514 +                break;
32515 +            case (e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE):
32516 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier);
32517 +                if (enable)
32518 +                    tmpReg |= FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE;
32519 +                else
32520 +                    tmpReg &= ~FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE;
32521 +                WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier, tmpReg);
32522 +                break;
32523 +            case (e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE):
32524 +                tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier);
32525 +                if (enable)
32526 +                    tmpReg |= FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE;
32527 +                else
32528 +                    tmpReg &= ~FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE;
32529 +                WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier, tmpReg);
32530 +                break;
32531 +        }
32532 +        /* for ECC exceptions driver automatically enables ECC mechanism, if disabled.
32533 +           Driver may disable them automatically, depending on driver's status */
32534 +        if (enable && ((exception == e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC) |
32535 +                       (exception == e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC) |
32536 +                       (exception == e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC) |
32537 +                       (exception == e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC)))
32538 +            FmEnableRamsEcc(p_FmPcd->h_Fm);
32539 +        if (!enable && ((exception == e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC) |
32540 +                       (exception == e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC) |
32541 +                       (exception == e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC) |
32542 +                       (exception == e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC)))
32543 +            FmDisableRamsEcc(p_FmPcd->h_Fm);
32544 +    }
32545 +
32546 +    return E_OK;
32547 +}
32548 +
32549 +t_Error FM_PCD_ForceIntr (t_Handle h_FmPcd, e_FmPcdExceptions exception)
32550 +{
32551 +    t_FmPcd            *p_FmPcd = (t_FmPcd*)h_FmPcd;
32552 +
32553 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
32554 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
32555 +
32556 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
32557 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ForceIntr - guest mode!"));
32558 +
32559 +    switch (exception)
32560 +    {
32561 +        case (e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC):
32562 +        case (e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW):
32563 +            if (!p_FmPcd->p_FmPcdKg)
32564 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - keygen is not working"));
32565 +            break;
32566 +        case (e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC):
32567 +        case (e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR):
32568 +        case (e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE):
32569 +        case (e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE):
32570 +            if (!p_FmPcd->p_FmPcdPlcr)
32571 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - policer is not working"));
32572 +            break;
32573 +        case (e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC):
32574 +        case (e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC):
32575 +           if (!p_FmPcd->p_FmPcdPrs)
32576 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt -parsrer is not working"));
32577 +            break;
32578 +        default:
32579 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid interrupt requested"));
32580 +    }
32581 +    switch (exception)
32582 +    {
32583 +        case e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC:
32584 +            if (!(p_FmPcd->exceptions & FM_PCD_EX_PRS_DOUBLE_ECC))
32585 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32586 +            break;
32587 +        case e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC:
32588 +            if (!(p_FmPcd->exceptions & FM_PCD_EX_PRS_SINGLE_ECC))
32589 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32590 +            break;
32591 +        case e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC:
32592 +            if (!(p_FmPcd->exceptions & FM_EX_KG_DOUBLE_ECC))
32593 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32594 +            WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_feer, FM_EX_KG_DOUBLE_ECC);
32595 +            break;
32596 +        case e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW:
32597 +            if (!(p_FmPcd->exceptions & FM_EX_KG_KEYSIZE_OVERFLOW))
32598 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32599 +            WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_feer, FM_EX_KG_KEYSIZE_OVERFLOW);
32600 +            break;
32601 +        case e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC:
32602 +            if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_DOUBLE_ECC))
32603 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32604 +            WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr, FM_PCD_PLCR_DOUBLE_ECC);
32605 +            break;
32606 +        case e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR:
32607 +            if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_INIT_ENTRY_ERROR))
32608 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32609 +            WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr, FM_PCD_PLCR_INIT_ENTRY_ERROR);
32610 +            break;
32611 +        case e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE:
32612 +            if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE))
32613 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32614 +            WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr, FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE);
32615 +            break;
32616 +        case e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE:
32617 +            if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE))
32618 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
32619 +            WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr, FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE);
32620 +            break;
32621 +    }
32622 +
32623 +    return E_OK;
32624 +}
32625 +
32626 +
32627 +t_Error FM_PCD_ModifyCounter(t_Handle h_FmPcd, e_FmPcdCounters counter, uint32_t value)
32628 +{
32629 +    t_FmPcd            *p_FmPcd = (t_FmPcd*)h_FmPcd;
32630 +
32631 +    SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
32632 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
32633 +
32634 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
32635 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ModifyCounter - guest mode!"));
32636 +
32637 +    switch (counter)
32638 +    {
32639 +        case (e_FM_PCD_KG_COUNTERS_TOTAL):
32640 +            if (!p_FmPcd->p_FmPcdKg)
32641 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Invalid counters - KeyGen is not working"));
32642 +            break;
32643 +        case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
32644 +        case (e_FM_PCD_PLCR_COUNTERS_RED):
32645 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
32646 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
32647 +        case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
32648 +        case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
32649 +            if (!p_FmPcd->p_FmPcdPlcr)
32650 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Invalid counters - Policer is not working"));
32651 +            if (!(GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr) & FM_PCD_PLCR_GCR_STEN))
32652 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Requested counter was not enabled"));
32653 +            break;
32654 +        case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
32655 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
32656 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
32657 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
32658 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
32659 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
32660 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
32661 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
32662 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
32663 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
32664 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
32665 +        case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
32666 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
32667 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
32668 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
32669 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
32670 +        case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
32671 +            if (!p_FmPcd->p_FmPcdPrs)
32672 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("Unsupported type of counter"));
32673 +            break;
32674 +        default:
32675 +            RETURN_ERROR(MINOR, E_INVALID_STATE, ("Unsupported type of counter"));
32676 +    }
32677 +    switch (counter)
32678 +    {
32679 +        case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
32680 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pds, value);
32681 +            break;
32682 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
32683 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rrs, value);
32684 +            break;
32685 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
32686 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rrs, value);
32687 +             break;
32688 +       case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
32689 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rrs, value);
32690 +            break;
32691 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
32692 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srrs, value);
32693 +            break;
32694 +        case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
32695 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rres, value);
32696 +            break;
32697 +        case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
32698 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rres, value);
32699 +            break;
32700 +        case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
32701 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rres, value);
32702 +            break;
32703 +        case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
32704 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srres, value);
32705 +            break;
32706 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
32707 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spcs, value);
32708 +            break;
32709 +        case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
32710 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spscs, value);
32711 +            break;
32712 +        case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
32713 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_hxscs, value);
32714 +            break;
32715 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
32716 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrcs, value);
32717 +            break;
32718 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
32719 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrscs, value);
32720 +            break;
32721 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
32722 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwcs, value);
32723 +            break;
32724 +        case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
32725 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwscs, value);
32726 +            break;
32727 +        case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
32728 +               WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_fcscs, value);
32729 +             break;
32730 +        case (e_FM_PCD_KG_COUNTERS_TOTAL):
32731 +            WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_tpc,value);
32732 +            break;
32733 +
32734 +        /*Policer counters*/
32735 +        case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
32736 +            WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ypcnt, value);
32737 +            break;
32738 +        case (e_FM_PCD_PLCR_COUNTERS_RED):
32739 +            WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rpcnt, value);
32740 +            break;
32741 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
32742 +             WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rrpcnt, value);
32743 +            break;
32744 +        case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
32745 +              WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rypcnt, value);
32746 +            break;
32747 +        case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
32748 +              WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_tpcnt, value);
32749 +            break;
32750 +        case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
32751 +              WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_flmcnt, value);
32752 +            break;
32753 +    }
32754 +
32755 +    return E_OK;
32756 +}
32757 +
32758 +t_Handle FM_PCD_GetHcPort(t_Handle h_FmPcd)
32759 +{
32760 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
32761 +    return FmHcGetPort(p_FmPcd->h_Hc);
32762 +}
32763 +
32764 --- /dev/null
32765 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.h
32766 @@ -0,0 +1,543 @@
32767 +/*
32768 + * Copyright 2008-2012 Freescale Semiconductor Inc.
32769 + *
32770 + * Redistribution and use in source and binary forms, with or without
32771 + * modification, are permitted provided that the following conditions are met:
32772 + *     * Redistributions of source code must retain the above copyright
32773 + *       notice, this list of conditions and the following disclaimer.
32774 + *     * Redistributions in binary form must reproduce the above copyright
32775 + *       notice, this list of conditions and the following disclaimer in the
32776 + *       documentation and/or other materials provided with the distribution.
32777 + *     * Neither the name of Freescale Semiconductor nor the
32778 + *       names of its contributors may be used to endorse or promote products
32779 + *       derived from this software without specific prior written permission.
32780 + *
32781 + *
32782 + * ALTERNATIVELY, this software may be distributed under the terms of the
32783 + * GNU General Public License ("GPL") as published by the Free Software
32784 + * Foundation, either version 2 of that License or (at your option) any
32785 + * later version.
32786 + *
32787 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
32788 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32789 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32790 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
32791 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32792 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
32793 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32794 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32795 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32796 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32797 + */
32798 +
32799 +
32800 +/******************************************************************************
32801 + @File          fm_pcd.h
32802 +
32803 + @Description   FM PCD ...
32804 +*//***************************************************************************/
32805 +#ifndef __FM_PCD_H
32806 +#define __FM_PCD_H
32807 +
32808 +#include "std_ext.h"
32809 +#include "error_ext.h"
32810 +#include "list_ext.h"
32811 +#include "fm_pcd_ext.h"
32812 +#include "fm_common.h"
32813 +#include "fsl_fman_prs.h"
32814 +#include "fsl_fman_kg.h"
32815 +
32816 +#define __ERR_MODULE__  MODULE_FM_PCD
32817 +
32818 +
32819 +/****************************/
32820 +/* Defaults                 */
32821 +/****************************/
32822 +#define DEFAULT_plcrAutoRefresh                 FALSE
32823 +#define DEFAULT_fmPcdKgErrorExceptions          (FM_EX_KG_DOUBLE_ECC | FM_EX_KG_KEYSIZE_OVERFLOW)
32824 +#define DEFAULT_fmPcdPlcrErrorExceptions        (FM_PCD_EX_PLCR_DOUBLE_ECC | FM_PCD_EX_PLCR_INIT_ENTRY_ERROR)
32825 +#define DEFAULT_fmPcdPlcrExceptions             0
32826 +#define DEFAULT_fmPcdPrsErrorExceptions         (FM_PCD_EX_PRS_DOUBLE_ECC)
32827 +
32828 +#define DEFAULT_fmPcdPrsExceptions              FM_PCD_EX_PRS_SINGLE_ECC
32829 +#define DEFAULT_numOfUsedProfilesPerWindow      16
32830 +#define DEFAULT_numOfSharedPlcrProfiles         4
32831 +
32832 +/****************************/
32833 +/* Network defines          */
32834 +/****************************/
32835 +#define UDP_HEADER_SIZE     8
32836 +
32837 +#define ESP_SPI_OFFSET      0
32838 +#define ESP_SPI_SIZE        4
32839 +#define ESP_SEQ_NUM_OFFSET  ESP_SPI_SIZE
32840 +#define ESP_SEQ_NUM_SIZE    4
32841 +
32842 +/****************************/
32843 +/* General defines          */
32844 +/****************************/
32845 +#define ILLEGAL_CLS_PLAN    0xff
32846 +#define ILLEGAL_NETENV      0xff
32847 +
32848 +#define FM_PCD_MAX_NUM_OF_ALIAS_HDRS    3
32849 +
32850 +/****************************/
32851 +/* Error defines           */
32852 +/****************************/
32853 +
32854 +#define FM_PCD_EX_PLCR_DOUBLE_ECC                   0x20000000
32855 +#define FM_PCD_EX_PLCR_INIT_ENTRY_ERROR             0x10000000
32856 +#define FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE      0x08000000
32857 +#define FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE       0x04000000
32858 +
32859 +#define GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception)               \
32860 +switch (exception){                                                 \
32861 +    case e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC:                          \
32862 +        bitMask = FM_EX_KG_DOUBLE_ECC; break;                   \
32863 +    case e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC:                        \
32864 +        bitMask = FM_PCD_EX_PLCR_DOUBLE_ECC; break;                 \
32865 +    case e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW:                    \
32866 +        bitMask = FM_EX_KG_KEYSIZE_OVERFLOW; break;             \
32867 +    case e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR:                  \
32868 +        bitMask = FM_PCD_EX_PLCR_INIT_ENTRY_ERROR; break;           \
32869 +    case e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE:           \
32870 +        bitMask = FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE; break;    \
32871 +    case e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE:            \
32872 +        bitMask = FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE; break;     \
32873 +    case e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC:                         \
32874 +        bitMask = FM_PCD_EX_PRS_DOUBLE_ECC; break;                  \
32875 +    case e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC:                         \
32876 +        bitMask = FM_PCD_EX_PRS_SINGLE_ECC; break;                  \
32877 +    default: bitMask = 0;break;}
32878 +
32879 +/***********************************************************************/
32880 +/*          Policer defines                                            */
32881 +/***********************************************************************/
32882 +#define FM_PCD_PLCR_GCR_STEN                  0x40000000
32883 +#define FM_PCD_PLCR_DOUBLE_ECC                0x80000000
32884 +#define FM_PCD_PLCR_INIT_ENTRY_ERROR          0x40000000
32885 +#define FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE   0x80000000
32886 +#define FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE    0x40000000
32887 +
32888 +/***********************************************************************/
32889 +/*          Memory map                                                 */
32890 +/***********************************************************************/
32891 +#if defined(__MWERKS__) && !defined(__GNUC__)
32892 +#pragma pack(push,1)
32893 +#endif /* defined(__MWERKS__) && ... */
32894 +
32895 +
32896 +typedef struct {
32897 +/* General Configuration and Status Registers */
32898 +    volatile uint32_t fmpl_gcr;         /* 0x000 FMPL_GCR  - FM Policer General Configuration */
32899 +    volatile uint32_t fmpl_gsr;         /* 0x004 FMPL_GSR  - FM Policer Global Status Register */
32900 +    volatile uint32_t fmpl_evr;         /* 0x008 FMPL_EVR  - FM Policer Event Register */
32901 +    volatile uint32_t fmpl_ier;         /* 0x00C FMPL_IER  - FM Policer Interrupt Enable Register */
32902 +    volatile uint32_t fmpl_ifr;         /* 0x010 FMPL_IFR  - FM Policer Interrupt Force Register */
32903 +    volatile uint32_t fmpl_eevr;        /* 0x014 FMPL_EEVR - FM Policer Error Event Register */
32904 +    volatile uint32_t fmpl_eier;        /* 0x018 FMPL_EIER - FM Policer Error Interrupt Enable Register */
32905 +    volatile uint32_t fmpl_eifr;        /* 0x01C FMPL_EIFR - FM Policer Error Interrupt Force Register */
32906 +/* Global Statistic Counters */
32907 +    volatile uint32_t fmpl_rpcnt;       /* 0x020 FMPL_RPC  - FM Policer RED Packets Counter */
32908 +    volatile uint32_t fmpl_ypcnt;       /* 0x024 FMPL_YPC  - FM Policer YELLOW Packets Counter */
32909 +    volatile uint32_t fmpl_rrpcnt;      /* 0x028 FMPL_RRPC - FM Policer Recolored RED Packet Counter */
32910 +    volatile uint32_t fmpl_rypcnt;      /* 0x02C FMPL_RYPC - FM Policer Recolored YELLOW Packet Counter */
32911 +    volatile uint32_t fmpl_tpcnt;       /* 0x030 FMPL_TPC  - FM Policer Total Packet Counter */
32912 +    volatile uint32_t fmpl_flmcnt;      /* 0x034 FMPL_FLMC - FM Policer Frame Length Mismatch Counter */
32913 +    volatile uint32_t fmpl_res0[21];    /* 0x038 - 0x08B Reserved */
32914 +/* Profile RAM Access Registers */
32915 +    volatile uint32_t fmpl_par;         /* 0x08C FMPL_PAR    - FM Policer Profile Action Register*/
32916 +    t_FmPcdPlcrProfileRegs profileRegs;
32917 +/* Error Capture Registers */
32918 +    volatile uint32_t fmpl_serc;        /* 0x100 FMPL_SERC - FM Policer Soft Error Capture */
32919 +    volatile uint32_t fmpl_upcr;        /* 0x104 FMPL_UPCR - FM Policer Uninitialized Profile Capture Register */
32920 +    volatile uint32_t fmpl_res2;        /* 0x108 Reserved */
32921 +/* Debug Registers */
32922 +    volatile uint32_t fmpl_res3[61];    /* 0x10C-0x200 Reserved Debug*/
32923 +/* Profile Selection Mapping Registers Per Port-ID (n=1-11, 16) */
32924 +    volatile uint32_t fmpl_dpmr;        /* 0x200 FMPL_DPMR - FM Policer Default Mapping Register */
32925 +    volatile uint32_t fmpl_pmr[63];     /*+default 0x204-0x2FF FMPL_PMR1 - FMPL_PMR63, - FM Policer Profile Mapping Registers.
32926 +                                           (for port-ID 1-11, only for supported Port-ID registers) */
32927 +} t_FmPcdPlcrRegs;
32928 +
32929 +#if defined(__MWERKS__) && !defined(__GNUC__)
32930 +#pragma pack(pop)
32931 +#endif /* defined(__MWERKS__) && ... */
32932 +
32933 +
32934 +/***********************************************************************/
32935 +/*  Driver's internal structures                                       */
32936 +/***********************************************************************/
32937 +
32938 +typedef struct {
32939 +    bool        known;
32940 +    uint8_t     id;
32941 +} t_FmPcdKgSchemesExtractsEntry;
32942 +
32943 +typedef struct {
32944 +    t_FmPcdKgSchemesExtractsEntry extractsArray[FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
32945 +} t_FmPcdKgSchemesExtracts;
32946 +
32947 +typedef struct {
32948 +    t_Handle        h_Manip;
32949 +    bool            keepRes;
32950 +    e_FmPcdEngine   nextEngine;
32951 +    uint8_t         parseCode;
32952 +} t_FmPcdInfoForManip;
32953 +
32954 +/**************************************************************************//**
32955 + @Description   A structure of parameters to communicate
32956 +                between the port and PCD regarding the KG scheme.
32957 +*//***************************************************************************/
32958 +typedef struct {
32959 +    uint8_t             netEnvId;    /* in */
32960 +    uint8_t             numOfDistinctionUnits; /* in */
32961 +    uint8_t             unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /* in */
32962 +    uint32_t            vector; /* out */
32963 +} t_NetEnvParams;
32964 +
32965 +typedef struct {
32966 +    bool            allocated;
32967 +    uint8_t         ownerId; /* guestId for KG in multi-partition only.
32968 +                                portId for PLCR in any environment */
32969 +} t_FmPcdAllocMng;
32970 +
32971 +typedef struct {
32972 +    volatile bool       lock;
32973 +    bool                used;
32974 +    uint8_t             owners;
32975 +    uint8_t             netEnvId;
32976 +    uint8_t             guestId;
32977 +    uint8_t             baseEntry;
32978 +    uint16_t            sizeOfGrp;
32979 +    protocolOpt_t       optArray[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
32980 +} t_FmPcdKgClsPlanGrp;
32981 +
32982 +typedef struct {
32983 +    t_Handle            h_FmPcd;
32984 +    uint8_t             schemeId;
32985 +    t_FmPcdLock         *p_Lock;
32986 +    bool                valid;
32987 +    uint8_t             netEnvId;
32988 +    uint8_t             owners;
32989 +    uint32_t            matchVector;
32990 +    uint32_t            ccUnits;
32991 +    bool                nextRelativePlcrProfile;
32992 +    uint16_t            relativeProfileId;
32993 +    uint16_t            numOfProfiles;
32994 +    t_FmPcdKgKeyOrder   orderedArray;
32995 +    e_FmPcdEngine       nextEngine;
32996 +    e_FmPcdDoneAction   doneAction;
32997 +    bool                requiredActionFlag;
32998 +    uint32_t            requiredAction;
32999 +    bool                extractedOrs;
33000 +    uint8_t             bitOffsetInPlcrProfile;
33001 +    bool                directPlcr;
33002 +#if (DPAA_VERSION >= 11)
33003 +    bool                vspe;
33004 +#endif
33005 +} t_FmPcdKgScheme;
33006 +
33007 +typedef union {
33008 +    struct fman_kg_scheme_regs schemeRegs;
33009 +    struct fman_kg_pe_regs portRegs;
33010 +    struct fman_kg_cp_regs clsPlanRegs;
33011 +} u_FmPcdKgIndirectAccessRegs;
33012 +
33013 +typedef struct {
33014 +    struct fman_kg_regs *p_FmPcdKgRegs;
33015 +    uint32_t            schemeExceptionsBitMask;
33016 +    uint8_t             numOfSchemes;
33017 +    t_Handle            h_HwSpinlock;
33018 +    uint8_t             schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
33019 +    t_FmPcdKgScheme     schemes[FM_PCD_KG_NUM_OF_SCHEMES];
33020 +    t_FmPcdKgClsPlanGrp clsPlanGrps[FM_MAX_NUM_OF_PORTS];
33021 +    uint8_t             emptyClsPlanGrpId;
33022 +    t_FmPcdAllocMng     schemesMng[FM_PCD_KG_NUM_OF_SCHEMES]; /* only for MASTER ! */
33023 +    t_FmPcdAllocMng     clsPlanBlocksMng[FM_PCD_MAX_NUM_OF_CLS_PLANS/CLS_PLAN_NUM_PER_GRP];
33024 +    u_FmPcdKgIndirectAccessRegs *p_IndirectAccessRegs;
33025 +} t_FmPcdKg;
33026 +
33027 +typedef struct {
33028 +    uint16_t            profilesBase;
33029 +    uint16_t            numOfProfiles;
33030 +    t_Handle            h_FmPort;
33031 +} t_FmPcdPlcrMapParam;
33032 +
33033 +typedef struct {
33034 +    uint16_t                            absoluteProfileId;
33035 +    t_Handle                            h_FmPcd;
33036 +    bool                                valid;
33037 +    t_FmPcdLock                         *p_Lock;
33038 +    t_FmPcdAllocMng                     profilesMng;
33039 +    bool                                requiredActionFlag;
33040 +    uint32_t                            requiredAction;
33041 +    e_FmPcdEngine                       nextEngineOnGreen;          /**< Green next engine type */
33042 +    u_FmPcdPlcrNextEngineParams         paramsOnGreen;              /**< Green next engine params */
33043 +
33044 +    e_FmPcdEngine                       nextEngineOnYellow;         /**< Yellow next engine type */
33045 +    u_FmPcdPlcrNextEngineParams         paramsOnYellow;             /**< Yellow next engine params */
33046 +
33047 +    e_FmPcdEngine                       nextEngineOnRed;            /**< Red next engine type */
33048 +    u_FmPcdPlcrNextEngineParams         paramsOnRed;                /**< Red next engine params */
33049 +} t_FmPcdPlcrProfile;
33050 +
33051 +typedef struct {
33052 +    t_FmPcdPlcrRegs                 *p_FmPcdPlcrRegs;
33053 +    uint16_t                        partPlcrProfilesBase;
33054 +    uint16_t                        partNumOfPlcrProfiles;
33055 +    t_FmPcdPlcrProfile              profiles[FM_PCD_PLCR_NUM_ENTRIES];
33056 +    uint16_t                        numOfSharedProfiles;
33057 +    uint16_t                        sharedProfilesIds[FM_PCD_PLCR_NUM_ENTRIES];
33058 +    t_FmPcdPlcrMapParam             portsMapping[FM_MAX_NUM_OF_PORTS];
33059 +    t_Handle                        h_HwSpinlock;
33060 +    t_Handle                        h_SwSpinlock;
33061 +} t_FmPcdPlcr;
33062 +
33063 +typedef struct {
33064 +    uint32_t                        *p_SwPrsCode;
33065 +    uint32_t                        *p_CurrSwPrs;
33066 +    uint8_t                         currLabel;
33067 +    struct fman_prs_regs            *p_FmPcdPrsRegs;
33068 +    t_FmPcdPrsLabelParams           labelsTable[FM_PCD_PRS_NUM_OF_LABELS];
33069 +    uint32_t                        fmPcdPrsPortIdStatistics;
33070 +} t_FmPcdPrs;
33071 +
33072 +typedef struct {
33073 +    struct {
33074 +        e_NetHeaderType             hdr;
33075 +        protocolOpt_t               opt; /* only one option !! */
33076 +    } hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
33077 +} t_FmPcdIntDistinctionUnit;
33078 +
33079 +typedef struct {
33080 +    e_NetHeaderType             hdr;
33081 +    protocolOpt_t               opt; /* only one option !! */
33082 +    e_NetHeaderType             aliasHdr;
33083 +} t_FmPcdNetEnvAliases;
33084 +
33085 +typedef struct {
33086 +    uint8_t                     netEnvId;
33087 +    t_Handle                    h_FmPcd;
33088 +    t_Handle                    h_Spinlock;
33089 +    bool                        used;
33090 +    uint8_t                     owners;
33091 +    uint8_t                     clsPlanGrpId;
33092 +    t_FmPcdIntDistinctionUnit   units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
33093 +    uint32_t                    unitsVectors[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
33094 +    uint32_t                    lcvs[FM_PCD_PRS_NUM_OF_HDRS];
33095 +    uint32_t                    macsecVector;
33096 +    t_FmPcdNetEnvAliases        aliasHdrs[FM_PCD_MAX_NUM_OF_ALIAS_HDRS];
33097 +} t_FmPcdNetEnv;
33098 +
33099 +typedef struct {
33100 +    struct fman_prs_cfg          dfltCfg;
33101 +    bool                        plcrAutoRefresh;
33102 +    uint16_t                    prsMaxParseCycleLimit;
33103 +} t_FmPcdDriverParam;
33104 +
33105 +typedef struct {
33106 +    t_Handle                    h_Fm;
33107 +    t_Handle                    h_FmMuram;
33108 +    t_FmRevisionInfo            fmRevInfo;
33109 +
33110 +    uint64_t                    physicalMuramBase;
33111 +
33112 +    t_Handle                    h_Spinlock;
33113 +    t_List                      freeLocksLst;
33114 +    t_List                      acquiredLocksLst;
33115 +
33116 +    t_Handle                    h_IpcSession; /* relevant for guest only */
33117 +    bool                        enabled;
33118 +    uint8_t                     guestId;            /**< Guest Partition Id */
33119 +    uint8_t                     numOfEnabledGuestPartitionsPcds;
33120 +    char                        fmPcdModuleName[MODULE_NAME_SIZE];
33121 +    char                        fmPcdIpcHandlerModuleName[MODULE_NAME_SIZE]; /* relevant for guest only - this is the master's name */
33122 +    t_FmPcdNetEnv               netEnvs[FM_MAX_NUM_OF_PORTS];
33123 +    t_FmPcdKg                   *p_FmPcdKg;
33124 +    t_FmPcdPlcr                 *p_FmPcdPlcr;
33125 +    t_FmPcdPrs                  *p_FmPcdPrs;
33126 +
33127 +    void                        *p_CcShadow;     /**< CC MURAM shadow */
33128 +    uint32_t                    ccShadowSize;
33129 +    uint32_t                    ccShadowAlign;
33130 +    volatile bool               shadowLock;
33131 +    t_Handle                    h_ShadowSpinlock;
33132 +
33133 +    t_Handle                    h_Hc;
33134 +
33135 +    uint32_t                    exceptions;
33136 +    t_FmPcdExceptionCallback    *f_Exception;
33137 +    t_FmPcdIdExceptionCallback  *f_FmPcdIndexedException;
33138 +    t_Handle                    h_App;
33139 +    uintptr_t                   ipv6FrameIdAddr;
33140 +    uintptr_t                   capwapFrameIdAddr;
33141 +    bool                        advancedOffloadSupport;
33142 +
33143 +    t_FmPcdDriverParam          *p_FmPcdDriverParam;
33144 +} t_FmPcd;
33145 +
33146 +#if (DPAA_VERSION >= 11)
33147 +typedef uint8_t t_FmPcdFrmReplicUpdateType;
33148 +#define FRM_REPLIC_UPDATE_COUNTER             0x01
33149 +#define FRM_REPLIC_UPDATE_INFO                0x02
33150 +#endif /* (DPAA_VERSION >= 11) */
33151 +/***********************************************************************/
33152 +/*  PCD internal routines                                              */
33153 +/***********************************************************************/
33154 +
33155 +t_Error     PcdGetVectorForOpt(t_FmPcd *p_FmPcd, uint8_t netEnvId, protocolOpt_t opt, uint32_t *p_Vector);
33156 +t_Error     PcdGetUnitsVector(t_FmPcd *p_FmPcd, t_NetEnvParams *p_Params);
33157 +bool        PcdNetEnvIsUnitWithoutOpts(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint32_t unitVector);
33158 +t_Error     PcdGetClsPlanGrpParams(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_GrpParams);
33159 +void        FmPcdSetClsPlanGrpId(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint8_t clsPlanGrpId);
33160 +e_NetHeaderType FmPcdGetAliasHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
33161 +uint8_t     FmPcdNetEnvGetUnitIdForSingleHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
33162 +uint8_t     FmPcdNetEnvGetUnitId(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr, bool interchangeable, protocolOpt_t opt);
33163 +
33164 +t_Error     FmPcdManipBuildIpReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, bool isIpv4, uint8_t groupId);
33165 +t_Error     FmPcdManipDeleteIpReassmSchemes(t_Handle h_Manip);
33166 +t_Error     FmPcdManipBuildCapwapReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, uint8_t groupId);
33167 +t_Error     FmPcdManipDeleteCapwapReassmSchemes(t_Handle h_Manip);
33168 +bool        FmPcdManipIpReassmIsIpv6Hdr(t_Handle h_Manip);
33169 +
33170 +t_Handle    KgConfig( t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);
33171 +t_Error     KgInit(t_FmPcd *p_FmPcd);
33172 +t_Error     KgFree(t_FmPcd *p_FmPcd);
33173 +void        KgSetClsPlan(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanSet *p_Set);
33174 +bool        KgIsSchemeAlwaysDirect(t_Handle h_FmPcd, uint8_t schemeId);
33175 +void        KgEnable(t_FmPcd *p_FmPcd);
33176 +void        KgDisable(t_FmPcd *p_FmPcd);
33177 +t_Error     KgAllocClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t *p_First);
33178 +void        KgFreeClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t base);
33179 +
33180 +/* only for MULTI partittion */
33181 +t_Error     FmPcdKgAllocSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);
33182 +t_Error     FmPcdKgFreeSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);
33183 +/* only for SINGLE partittion */
33184 +t_Error     KgBindPortToSchemes(t_Handle h_FmPcd , uint8_t hardwarePortId, uint32_t spReg);
33185 +
33186 +t_FmPcdLock *FmPcdAcquireLock(t_Handle h_FmPcd);
33187 +void        FmPcdReleaseLock(t_Handle h_FmPcd, t_FmPcdLock *p_Lock);
33188 +
33189 +t_Handle    PlcrConfig(t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);
33190 +t_Error     PlcrInit(t_FmPcd *p_FmPcd);
33191 +t_Error     PlcrFree(t_FmPcd *p_FmPcd);
33192 +void        PlcrEnable(t_FmPcd *p_FmPcd);
33193 +void        PlcrDisable(t_FmPcd *p_FmPcd);
33194 +uint16_t    PlcrAllocProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);
33195 +void        PlcrFreeProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);
33196 +t_Error     PlcrSetPortProfiles(t_FmPcd    *p_FmPcd,
33197 +                                uint8_t    hardwarePortId,
33198 +                                uint16_t   numOfProfiles,
33199 +                                uint16_t   base);
33200 +t_Error     PlcrClearPortProfiles(t_FmPcd *p_FmPcd, uint8_t hardwarePortId);
33201 +
33202 +t_Handle    PrsConfig(t_FmPcd *p_FmPcd,t_FmPcdParams *p_FmPcdParams);
33203 +t_Error     PrsInit(t_FmPcd *p_FmPcd);
33204 +void        PrsEnable(t_FmPcd *p_FmPcd);
33205 +void        PrsDisable(t_FmPcd *p_FmPcd);
33206 +void        PrsFree(t_FmPcd *p_FmPcd );
33207 +t_Error     PrsIncludePortInStatistics(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, bool include);
33208 +
33209 +t_Error     FmPcdCcGetGrpParams(t_Handle treeId, uint8_t grpId, uint32_t *p_GrpBits, uint8_t *p_GrpBase);
33210 +uint8_t     FmPcdCcGetOffset(t_Handle h_CcNode);
33211 +uint8_t     FmPcdCcGetParseCode(t_Handle h_CcNode);
33212 +uint16_t    FmPcdCcGetNumOfKeys(t_Handle h_CcNode);
33213 +t_Error     ValidateNextEngineParams(t_Handle h_FmPcd, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams, e_FmPcdCcStatsMode supportedStatsMode);
33214 +
33215 +void        FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);
33216 +t_Error     FmPcdManipCheckParamsForCcNextEngine(t_FmPcdCcNextEngineParams *p_InfoForManip, uint32_t *requiredAction);
33217 +void        FmPcdManipUpdateAdResultForCc(t_Handle                     h_Manip,
33218 +                                          t_FmPcdCcNextEngineParams    *p_CcNextEngineParams,
33219 +                                          t_Handle                     p_Ad,
33220 +                                          t_Handle                     *p_AdNewPtr);
33221 +void        FmPcdManipUpdateAdContLookupForCc(t_Handle h_Manip, t_Handle p_Ad, t_Handle *p_AdNew, uint32_t adTableOffset);
33222 +void        FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);
33223 +t_Error     FmPcdManipCheckParamsWithCcNodeParams(t_Handle h_Manip, t_Handle h_FmPcdCcNode);
33224 +#ifdef FM_CAPWAP_SUPPORT
33225 +t_Handle    FmPcdManipApplSpecificBuild(void);
33226 +bool        FmPcdManipIsCapwapApplSpecific(t_Handle h_Manip);
33227 +#endif /* FM_CAPWAP_SUPPORT */
33228 +#if (DPAA_VERSION >= 11)
33229 +void *      FrmReplicGroupGetSourceTableDescriptor(t_Handle h_ReplicGroup);
33230 +void        FrmReplicGroupUpdateOwner(t_Handle h_ReplicGroup, bool add);
33231 +void        FrmReplicGroupUpdateAd(t_Handle h_ReplicGroup, void *p_Ad, t_Handle *h_AdNew);
33232 +
33233 +void        FmPcdCcGetAdTablesThatPointOnReplicGroup(t_Handle   h_Node,
33234 +                                                     t_Handle   h_ReplicGroup,
33235 +                                                     t_List     *p_AdTables,
33236 +                                                     uint32_t   *p_NumOfAdTables);
33237 +#endif /* (DPAA_VERSION >= 11) */
33238 +
33239 +void EnqueueNodeInfoToRelevantLst(t_List *p_List, t_CcNodeInformation *p_CcInfo, t_Handle h_Spinlock);
33240 +void DequeueNodeInfoFromRelevantLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);
33241 +t_CcNodeInformation* FindNodeInfoInReleventLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);
33242 +t_List *FmPcdManipGetSpinlock(t_Handle h_Manip);
33243 +t_List *FmPcdManipGetNodeLstPointedOnThisManip(t_Handle h_Manip);
33244 +
33245 +typedef struct
33246 +{
33247 +    t_Handle    h_StatsAd;
33248 +    t_Handle    h_StatsCounters;
33249 +#if (DPAA_VERSION >= 11)
33250 +    t_Handle    h_StatsFLRs;
33251 +#endif /* (DPAA_VERSION >= 11) */
33252 +} t_FmPcdCcStatsParams;
33253 +
33254 +void NextStepAd(t_Handle                     h_Ad,
33255 +                t_FmPcdCcStatsParams         *p_FmPcdCcStatsParams,
33256 +                t_FmPcdCcNextEngineParams    *p_FmPcdCcNextEngineParams,
33257 +                t_FmPcd                      *p_FmPcd);
33258 +void ReleaseLst(t_List *p_List);
33259 +
33260 +static __inline__ t_Handle FmPcdGetMuramHandle(t_Handle h_FmPcd)
33261 +{
33262 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
33263 +    ASSERT_COND(p_FmPcd);
33264 +    return p_FmPcd->h_FmMuram;
33265 +}
33266 +
33267 +static __inline__ uint64_t FmPcdGetMuramPhysBase(t_Handle h_FmPcd)
33268 +{
33269 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
33270 +    ASSERT_COND(p_FmPcd);
33271 +    return p_FmPcd->physicalMuramBase;
33272 +}
33273 +
33274 +static __inline__ uint32_t FmPcdLockSpinlock(t_FmPcdLock *p_Lock)
33275 +{
33276 +    ASSERT_COND(p_Lock);
33277 +    return XX_LockIntrSpinlock(p_Lock->h_Spinlock);
33278 +}
33279 +
33280 +static __inline__ void FmPcdUnlockSpinlock(t_FmPcdLock *p_Lock, uint32_t flags)
33281 +{
33282 +    ASSERT_COND(p_Lock);
33283 +    XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, flags);
33284 +}
33285 +
33286 +static __inline__ bool FmPcdLockTryLock(t_FmPcdLock *p_Lock)
33287 +{
33288 +    uint32_t intFlags;
33289 +
33290 +    ASSERT_COND(p_Lock);
33291 +    intFlags = XX_LockIntrSpinlock(p_Lock->h_Spinlock);
33292 +    if (p_Lock->flag)
33293 +    {
33294 +        XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);
33295 +        return FALSE;
33296 +    }
33297 +    p_Lock->flag = TRUE;
33298 +    XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);
33299 +    return TRUE;
33300 +}
33301 +
33302 +static __inline__ void FmPcdLockUnlock(t_FmPcdLock *p_Lock)
33303 +{
33304 +    ASSERT_COND(p_Lock);
33305 +    p_Lock->flag = FALSE;
33306 +}
33307 +
33308 +
33309 +#endif /* __FM_PCD_H */
33310 --- /dev/null
33311 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd_ipc.h
33312 @@ -0,0 +1,280 @@
33313 +/*
33314 + * Copyright 2008-2012 Freescale Semiconductor Inc.
33315 + *
33316 + * Redistribution and use in source and binary forms, with or without
33317 + * modification, are permitted provided that the following conditions are met:
33318 + *     * Redistributions of source code must retain the above copyright
33319 + *       notice, this list of conditions and the following disclaimer.
33320 + *     * Redistributions in binary form must reproduce the above copyright
33321 + *       notice, this list of conditions and the following disclaimer in the
33322 + *       documentation and/or other materials provided with the distribution.
33323 + *     * Neither the name of Freescale Semiconductor nor the
33324 + *       names of its contributors may be used to endorse or promote products
33325 + *       derived from this software without specific prior written permission.
33326 + *
33327 + *
33328 + * ALTERNATIVELY, this software may be distributed under the terms of the
33329 + * GNU General Public License ("GPL") as published by the Free Software
33330 + * Foundation, either version 2 of that License or (at your option) any
33331 + * later version.
33332 + *
33333 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
33334 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33335 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33336 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
33337 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33338 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33339 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
33340 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33341 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33342 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33343 + */
33344 +
33345 +
33346 +/**************************************************************************//**
33347 + @File          fm_pcd_ipc.h
33348 +
33349 + @Description   FM PCD Inter-Partition prototypes, structures and definitions.
33350 +*//***************************************************************************/
33351 +#ifndef __FM_PCD_IPC_H
33352 +#define __FM_PCD_IPC_H
33353 +
33354 +#include "std_ext.h"
33355 +
33356 +
33357 +/**************************************************************************//**
33358 + @Group         FM_grp Frame Manager API
33359 +
33360 + @Description   FM API functions, definitions and enums
33361 +
33362 + @{
33363 +*//***************************************************************************/
33364 +
33365 +
33366 +#if defined(__MWERKS__) && !defined(__GNUC__)
33367 +#pragma pack(push,1)
33368 +#endif /* defined(__MWERKS__) && ... */
33369 +
33370 +/**************************************************************************//**
33371 + @Description   Structure for getting a sw parser address according to a label
33372 +                Fields commented 'IN' are passed by the port module to be used
33373 +                by the FM module.
33374 +                Fields commented 'OUT' will be filled by FM before returning to port.
33375 +*//***************************************************************************/
33376 +typedef _Packed struct t_FmPcdIpcSwPrsLable
33377 +{
33378 +    uint32_t    enumHdr;                        /**< IN. The existence of this header will invoke
33379 +                                                     the sw parser code. */
33380 +    uint8_t     indexPerHdr;                    /**< IN. Normally 0, if more than one sw parser
33381 +                                                     attachments for the same header, use this
33382 +
33383 +                                                   index to distinguish between them. */
33384 +} _PackedType t_FmPcdIpcSwPrsLable;
33385 +
33386 +/**************************************************************************//**
33387 + @Description   Structure for port-PCD communication.
33388 +                Fields commented 'IN' are passed by the port module to be used
33389 +                by the FM module.
33390 +                Fields commented 'OUT' will be filled by FM before returning to port.
33391 +                Some fields are optional (depending on configuration) and
33392 +                will be analized by the port and FM modules accordingly.
33393 +*//***************************************************************************/
33394 +
33395 +typedef  struct t_FmPcdIpcKgSchemesParams
33396 +{
33397 +    uint8_t     guestId;
33398 +    uint8_t     numOfSchemes;
33399 +    uint8_t     schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
33400 +} _PackedType t_FmPcdIpcKgSchemesParams;
33401 +
33402 +typedef  struct t_FmPcdIpcKgClsPlanParams
33403 +{
33404 +    uint8_t     guestId;
33405 +    uint16_t    numOfClsPlanEntries;
33406 +    uint8_t     clsPlanBase;
33407 +} _PackedType t_FmPcdIpcKgClsPlanParams;
33408 +
33409 +typedef _Packed struct t_FmPcdIpcPrsIncludePort
33410 +{
33411 +    uint8_t     hardwarePortId;
33412 +    bool        include;
33413 +} _PackedType t_FmPcdIpcPrsIncludePort;
33414 +
33415 +
33416 +#define FM_PCD_MAX_REPLY_SIZE           16
33417 +#define FM_PCD_MAX_MSG_SIZE             36
33418 +#define FM_PCD_MAX_REPLY_BODY_SIZE      36
33419 +
33420 +typedef _Packed struct {
33421 +    uint32_t    msgId;
33422 +    uint8_t     msgBody[FM_PCD_MAX_MSG_SIZE];
33423 +} _PackedType t_FmPcdIpcMsg;
33424 +
33425 +typedef _Packed struct t_FmPcdIpcReply {
33426 +    uint32_t    error;
33427 +    uint8_t     replyBody[FM_PCD_MAX_REPLY_BODY_SIZE];
33428 +} _PackedType t_FmPcdIpcReply;
33429 +
33430 +typedef _Packed struct t_FmIpcResourceAllocParams {
33431 +    uint8_t     guestId;
33432 +    uint16_t    base;
33433 +    uint16_t    num;
33434 +}_PackedType t_FmIpcResourceAllocParams;
33435 +
33436 +#if defined(__MWERKS__) && !defined(__GNUC__)
33437 +#pragma pack(pop)
33438 +#endif /* defined(__MWERKS__) && ... */
33439 +
33440 +
33441 +
33442 +/**************************************************************************//**
33443 + @Function      FM_PCD_ALLOC_KG_SCHEMES
33444 +
33445 + @Description   Used by FM PCD front-end in order to allocate KG resources
33446 +
33447 + @Param[in/out] t_FmPcdIpcKgAllocParams Pointer
33448 +*//***************************************************************************/
33449 +#define FM_PCD_ALLOC_KG_SCHEMES                 3
33450 +
33451 +/**************************************************************************//**
33452 + @Function      FM_PCD_FREE_KG_SCHEMES
33453 +
33454 + @Description   Used by FM PCD front-end in order to Free KG resources
33455 +
33456 + @Param[in/out] t_FmPcdIpcKgSchemesParams Pointer
33457 +*//***************************************************************************/
33458 +#define FM_PCD_FREE_KG_SCHEMES                  4
33459 +
33460 +/**************************************************************************//**
33461 + @Function      FM_PCD_ALLOC_PROFILES
33462 +
33463 + @Description   Used by FM PCD front-end in order to allocate Policer profiles
33464 +
33465 + @Param[in/out] t_FmIpcResourceAllocParams Pointer
33466 +*//***************************************************************************/
33467 +#define FM_PCD_ALLOC_PROFILES                   5
33468 +
33469 +/**************************************************************************//**
33470 + @Function      FM_PCD_FREE_PROFILES
33471 +
33472 + @Description   Used by FM PCD front-end in order to Free Policer profiles
33473 +
33474 + @Param[in/out] t_FmIpcResourceAllocParams Pointer
33475 +*//***************************************************************************/
33476 +#define FM_PCD_FREE_PROFILES                    6
33477 +
33478 +/**************************************************************************//**
33479 + @Function      FM_PCD_SET_PORT_PROFILES
33480 +
33481 + @Description   Used by FM PCD front-end in order to allocate Policer profiles
33482 +                for specific port
33483 +
33484 + @Param[in/out] t_FmIpcResourceAllocParams Pointer
33485 +*//***************************************************************************/
33486 +#define FM_PCD_SET_PORT_PROFILES                7
33487 +
33488 +/**************************************************************************//**
33489 + @Function      FM_PCD_CLEAR_PORT_PROFILES
33490 +
33491 + @Description   Used by FM PCD front-end in order to allocate Policer profiles
33492 +                for specific port
33493 +
33494 + @Param[in/out] t_FmIpcResourceAllocParams Pointer
33495 +*//***************************************************************************/
33496 +#define FM_PCD_CLEAR_PORT_PROFILES              8
33497 +
33498 +/**************************************************************************//**
33499 + @Function      FM_PCD_GET_PHYS_MURAM_BASE
33500 +
33501 + @Description   Used by FM PCD front-end in order to get MURAM base address
33502 +
33503 + @Param[in/out] t_FmPcdIcPhysAddr Pointer
33504 +*//***************************************************************************/
33505 +#define FM_PCD_GET_PHYS_MURAM_BASE              9
33506 +
33507 +/**************************************************************************//**
33508 + @Function      FM_PCD_GET_SW_PRS_OFFSET
33509 +
33510 + @Description   Used by FM front-end to get the SW parser offset of the start of
33511 +                code relevant to a given label.
33512 +
33513 + @Param[in/out] t_FmPcdIpcSwPrsLable Pointer
33514 +*//***************************************************************************/
33515 +#define FM_PCD_GET_SW_PRS_OFFSET                10
33516 +
33517 +/**************************************************************************//**
33518 + @Function      FM_PCD_MASTER_IS_ENABLED
33519 +
33520 + @Description   Used by FM front-end in order to verify
33521 +                PCD enablement.
33522 +
33523 + @Param[in]     bool Pointer
33524 +*//***************************************************************************/
33525 +#define FM_PCD_MASTER_IS_ENABLED                15
33526 +
33527 +/**************************************************************************//**
33528 + @Function      FM_PCD_GUEST_DISABLE
33529 +
33530 + @Description   Used by FM front-end to inform back-end when
33531 +                front-end PCD is disabled
33532 +
33533 + @Param[in]     None
33534 +*//***************************************************************************/
33535 +#define FM_PCD_GUEST_DISABLE                    16
33536 +
33537 +/**************************************************************************//**
33538 + @Function      FM_PCD_FREE_KG_CLSPLAN
33539 +
33540 + @Description   Used by FM PCD front-end in order to Free KG classification plan entries
33541 +
33542 + @Param[in/out] t_FmPcdIpcKgClsPlanParams Pointer
33543 +*//***************************************************************************/
33544 +#define FM_PCD_FREE_KG_CLSPLAN                  22
33545 +
33546 +/**************************************************************************//**
33547 + @Function      FM_PCD_ALLOC_KG_CLSPLAN
33548 +
33549 + @Description   Used by FM PCD front-end in order to allocate KG classification plan entries
33550 +
33551 + @Param[in/out] t_FmPcdIpcKgClsPlanParams Pointer
33552 +*//***************************************************************************/
33553 +#define FM_PCD_ALLOC_KG_CLSPLAN                 23
33554 +
33555 +/**************************************************************************//**
33556 + @Function      FM_PCD_MASTER_IS_ALIVE
33557 +
33558 + @Description   Used by FM front-end to check that back-end exists
33559 +
33560 + @Param[in]     None
33561 +*//***************************************************************************/
33562 +#define FM_PCD_MASTER_IS_ALIVE                  24
33563 +
33564 +/**************************************************************************//**
33565 + @Function      FM_PCD_GET_COUNTER
33566 +
33567 + @Description   Used by FM front-end to read PCD counters
33568 +
33569 + @Param[in/out] t_FmPcdIpcGetCounter Pointer
33570 +*//***************************************************************************/
33571 +#define FM_PCD_GET_COUNTER                      25
33572 +
33573 +/**************************************************************************//**
33574 + @Function      FM_PCD_PRS_INC_PORT_STATS
33575 +
33576 + @Description   Used by FM front-end to set/clear statistics for port
33577 +
33578 + @Param[in/out] t_FmPcdIpcPrsIncludePort Pointer
33579 +*//***************************************************************************/
33580 +#define FM_PCD_PRS_INC_PORT_STATS               26
33581 +
33582 +#if (DPAA_VERSION >= 11)
33583 +/* TODO - doc */
33584 +#define FM_PCD_ALLOC_SP                         27
33585 +#endif /* (DPAA_VERSION >= 11) */
33586 +
33587 +
33588 +/** @} */ /* end of FM_PCD_IPC_grp group */
33589 +/** @} */ /* end of FM_grp group */
33590 +
33591 +
33592 +#endif /* __FM_PCD_IPC_H */
33593 --- /dev/null
33594 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.c
33595 @@ -0,0 +1,1847 @@
33596 +/*
33597 + * Copyright 2008-2012 Freescale Semiconductor Inc.
33598 + *
33599 + * Redistribution and use in source and binary forms, with or without
33600 + * modification, are permitted provided that the following conditions are met:
33601 + *     * Redistributions of source code must retain the above copyright
33602 + *       notice, this list of conditions and the following disclaimer.
33603 + *     * Redistributions in binary form must reproduce the above copyright
33604 + *       notice, this list of conditions and the following disclaimer in the
33605 + *       documentation and/or other materials provided with the distribution.
33606 + *     * Neither the name of Freescale Semiconductor nor the
33607 + *       names of its contributors may be used to endorse or promote products
33608 + *       derived from this software without specific prior written permission.
33609 + *
33610 + *
33611 + * ALTERNATIVELY, this software may be distributed under the terms of the
33612 + * GNU General Public License ("GPL") as published by the Free Software
33613 + * Foundation, either version 2 of that License or (at your option) any
33614 + * later version.
33615 + *
33616 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
33617 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33618 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33619 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
33620 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33621 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33622 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
33623 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33624 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33625 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33626 + */
33627 +
33628 +
33629 +/******************************************************************************
33630 + @File          fm_plcr.c
33631 +
33632 + @Description   FM PCD POLICER...
33633 +*//***************************************************************************/
33634 +#include <linux/math64.h>
33635 +#include "std_ext.h"
33636 +#include "error_ext.h"
33637 +#include "string_ext.h"
33638 +#include "debug_ext.h"
33639 +#include "net_ext.h"
33640 +#include "fm_ext.h"
33641 +
33642 +#include "fm_common.h"
33643 +#include "fm_pcd.h"
33644 +#include "fm_hc.h"
33645 +#include "fm_pcd_ipc.h"
33646 +#include "fm_plcr.h"
33647 +
33648 +
33649 +/****************************************/
33650 +/*       static functions               */
33651 +/****************************************/
33652 +
33653 +static uint32_t PlcrProfileLock(t_Handle h_Profile)
33654 +{
33655 +    ASSERT_COND(h_Profile);
33656 +    return FmPcdLockSpinlock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock);
33657 +}
33658 +
33659 +static void PlcrProfileUnlock(t_Handle h_Profile, uint32_t intFlags)
33660 +{
33661 +    ASSERT_COND(h_Profile);
33662 +    FmPcdUnlockSpinlock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock, intFlags);
33663 +}
33664 +
33665 +static bool PlcrProfileFlagTryLock(t_Handle h_Profile)
33666 +{
33667 +    ASSERT_COND(h_Profile);
33668 +    return FmPcdLockTryLock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock);
33669 +}
33670 +
33671 +static void PlcrProfileFlagUnlock(t_Handle h_Profile)
33672 +{
33673 +    ASSERT_COND(h_Profile);
33674 +    FmPcdLockUnlock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock);
33675 +}
33676 +
33677 +static uint32_t PlcrHwLock(t_Handle h_FmPcdPlcr)
33678 +{
33679 +    ASSERT_COND(h_FmPcdPlcr);
33680 +    return XX_LockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_HwSpinlock);
33681 +}
33682 +
33683 +static void PlcrHwUnlock(t_Handle h_FmPcdPlcr, uint32_t intFlags)
33684 +{
33685 +    ASSERT_COND(h_FmPcdPlcr);
33686 +    XX_UnlockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_HwSpinlock, intFlags);
33687 +}
33688 +
33689 +static uint32_t PlcrSwLock(t_Handle h_FmPcdPlcr)
33690 +{
33691 +    ASSERT_COND(h_FmPcdPlcr);
33692 +    return XX_LockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_SwSpinlock);
33693 +}
33694 +
33695 +static void PlcrSwUnlock(t_Handle h_FmPcdPlcr, uint32_t intFlags)
33696 +{
33697 +    ASSERT_COND(h_FmPcdPlcr);
33698 +    XX_UnlockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_SwSpinlock, intFlags);
33699 +}
33700 +
33701 +static bool IsProfileShared(t_Handle h_FmPcd, uint16_t absoluteProfileId)
33702 +{
33703 +    t_FmPcd         *p_FmPcd = (t_FmPcd*)h_FmPcd;
33704 +    uint16_t        i;
33705 +
33706 +    SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, FALSE);
33707 +
33708 +    for (i=0;i<p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles;i++)
33709 +        if (p_FmPcd->p_FmPcdPlcr->sharedProfilesIds[i] == absoluteProfileId)
33710 +            return TRUE;
33711 +    return FALSE;
33712 +}
33713 +
33714 +static t_Error SetProfileNia(t_FmPcd *p_FmPcd, e_FmPcdEngine nextEngine, u_FmPcdPlcrNextEngineParams *p_NextEngineParams, uint32_t *nextAction)
33715 +{
33716 +    uint32_t    nia;
33717 +    uint16_t    absoluteProfileId;
33718 +    uint8_t     relativeSchemeId, physicalSchemeId;
33719 +
33720 +    nia = FM_PCD_PLCR_NIA_VALID;
33721 +
33722 +    switch (nextEngine)
33723 +    {
33724 +        case e_FM_PCD_DONE :
33725 +            switch (p_NextEngineParams->action)
33726 +            {
33727 +                case e_FM_PCD_DROP_FRAME :
33728 +                    nia |= GET_NIA_BMI_AC_DISCARD_FRAME(p_FmPcd);
33729 +                    break;
33730 +                case e_FM_PCD_ENQ_FRAME:
33731 +                    nia |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
33732 +                    break;
33733 +                default:
33734 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
33735 +            }
33736 +            break;
33737 +        case e_FM_PCD_KG:
33738 +            physicalSchemeId = FmPcdKgGetSchemeId(p_NextEngineParams->h_DirectScheme);
33739 +            relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId);
33740 +            if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
33741 +                RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
33742 +            if (!FmPcdKgIsSchemeValidSw(p_NextEngineParams->h_DirectScheme))
33743 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid direct scheme."));
33744 +            if (!KgIsSchemeAlwaysDirect(p_FmPcd, relativeSchemeId))
33745 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Policer Profile may point only to a scheme that is always direct."));
33746 +            nia |= NIA_ENG_KG | NIA_KG_DIRECT | physicalSchemeId;
33747 +            break;
33748 +        case e_FM_PCD_PLCR:
33749 +            absoluteProfileId = ((t_FmPcdPlcrProfile *)p_NextEngineParams->h_Profile)->absoluteProfileId;
33750 +            if (!IsProfileShared(p_FmPcd, absoluteProfileId))
33751 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next profile must be a shared profile"));
33752 +            if (!FmPcdPlcrIsProfileValid(p_FmPcd, absoluteProfileId))
33753 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid profile "));
33754 +            nia |= NIA_ENG_PLCR | NIA_PLCR_ABSOLUTE | absoluteProfileId;
33755 +            break;
33756 +        default:
33757 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
33758 +    }
33759 +
33760 +    *nextAction =  nia;
33761 +
33762 +    return E_OK;
33763 +}
33764 +
33765 +static uint32_t CalcFPP(uint32_t fpp)
33766 +{
33767 +    if (fpp > 15)
33768 +        return 15 - (0x1f - fpp);
33769 +    else
33770 +        return 16 + fpp;
33771 +}
33772 +
33773 +static void GetInfoRateReg(e_FmPcdPlcrRateMode  rateMode,
33774 +                           uint32_t             rate,
33775 +                           uint64_t             tsuInTenthNano,
33776 +                           uint32_t             fppShift,
33777 +                           uint64_t             *p_Integer,
33778 +                           uint64_t             *p_Fraction)
33779 +{
33780 +    uint64_t tmp, div;
33781 +
33782 +    if (rateMode == e_FM_PCD_PLCR_BYTE_MODE)
33783 +    {
33784 +        /* now we calculate the initial integer for the bigger rate */
33785 +        /* from Kbps to Bytes/TSU */
33786 +        tmp = (uint64_t)rate;
33787 +        tmp *= 1000; /* kb --> b */
33788 +        tmp *= tsuInTenthNano; /* bps --> bpTsu(in 10nano) */
33789 +
33790 +        div = 1000000000;   /* nano */
33791 +        div *= 10;          /* 10 nano */
33792 +        div *= 8;           /* bit to byte */
33793 +    }
33794 +    else
33795 +    {
33796 +        /* now we calculate the initial integer for the bigger rate */
33797 +        /* from Kbps to Bytes/TSU */
33798 +        tmp = (uint64_t)rate;
33799 +        tmp *= tsuInTenthNano; /* bps --> bpTsu(in 10nano) */
33800 +
33801 +        div = 1000000000;   /* nano */
33802 +        div *= 10;          /* 10 nano */
33803 +    }
33804 +    *p_Integer = div64_u64(tmp<<fppShift, div);
33805 +
33806 +    /* for calculating the fraction, we will recalculate cir and deduct the integer.
33807 +     * For precision, we will multiply by 2^16. we do not divid back, since we write
33808 +     * this value as fraction - see spec.
33809 +     */
33810 +    *p_Fraction = div64_u64(((tmp<<fppShift)<<16) - ((*p_Integer<<16)*div), div);
33811 +}
33812 +
33813 +/* .......... */
33814 +
33815 +static void CalcRates(uint32_t                              bitFor1Micro,
33816 +                      t_FmPcdPlcrNonPassthroughAlgParams    *p_NonPassthroughAlgParam,
33817 +                      uint32_t                              *cir,
33818 +                      uint32_t                              *cbs,
33819 +                      uint32_t                              *pir_eir,
33820 +                      uint32_t                              *pbs_ebs,
33821 +                      uint32_t                              *fpp)
33822 +{
33823 +    uint64_t    integer, fraction;
33824 +    uint32_t    temp, tsuInTenthNanos;
33825 +    uint8_t     fppShift=0;
33826 +
33827 +    /* we want the tsu to count 10 nano for better precision normally tsu is 3.9 nano, now we will get 39 */
33828 +    tsuInTenthNanos = (uint32_t)(1000*10/(1 << bitFor1Micro));
33829 +
33830 +    /* we choose the faster rate to calibrate fpp */
33831 +    /* The meaning of this step:
33832 +     * when fppShift is 0 it means all TS bits are treated as integer and TSU is the TS LSB count.
33833 +     * In this configuration we calculate the integer and fraction that represent the higher infoRate
33834 +     * When this is done, we can tell where we have "spare" unused bits and optimize the division of TS
33835 +     * into "integer" and "fraction" where the logic is - as many bits as possible for integer at
33836 +     * high rate, as many bits as possible for fraction at low rate.
33837 +     */
33838 +    if (p_NonPassthroughAlgParam->committedInfoRate > p_NonPassthroughAlgParam->peakOrExcessInfoRate)
33839 +        GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->committedInfoRate, tsuInTenthNanos, 0, &integer, &fraction);
33840 +    else
33841 +        GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->peakOrExcessInfoRate, tsuInTenthNanos, 0, &integer, &fraction);
33842 +
33843 +    /* we shift integer, as in cir/pir it is represented by the MSB 16 bits, and
33844 +     * the LSB bits are for the fraction */
33845 +    temp = (uint32_t)((integer<<16) & 0x00000000FFFFFFFF);
33846 +    /* temp is effected by the rate. For low rates it may be as low as 0, and then we'll
33847 +     * take max FP = 31.
33848 +     * For high rates it will never exceed the 32 bit reg (after the 16 shift), as it is
33849 +     * limited by the 10G physical port.
33850 +     */
33851 +    if (temp != 0)
33852 +    {
33853 +        /* In this case, the largest rate integer is non 0, if it does not occupy all (high) 16
33854 +         * bits of the PIR_EIR we can use this fact and enlarge it to occupy all 16 bits.
33855 +         * The logic is to have as many bits for integer in the higher rates, but if we have "0"s
33856 +         * in the integer part of the cir/pir register, than these bits are wasted. So we want
33857 +         * to use these bits for the fraction. in this way we will have for fraction - the number
33858 +         * of "0" bits and the rest - for integer.
33859 +         * In other words: For each bit we shift it in PIR_EIR, we move the FP in the TS
33860 +         * one bit to the left - preserving the relationship and achieving more bits
33861 +         * for integer in the TS.
33862 +         */
33863 +
33864 +        /* count zeroes left of the higher used bit (in order to shift the value such that
33865 +         * unused bits may be used for fraction).
33866 +         */
33867 +        while ((temp & 0x80000000) == 0)
33868 +        {
33869 +            temp = temp << 1;
33870 +            fppShift++;
33871 +        }
33872 +        if (fppShift > 15)
33873 +        {
33874 +            REPORT_ERROR(MAJOR, E_INVALID_SELECTION, ("timeStampPeriod to Information rate ratio is too small"));
33875 +            return;
33876 +        }
33877 +    }
33878 +    else
33879 +    {
33880 +        temp = (uint32_t)fraction; /* fraction will alyas be smaller than 2^16 */
33881 +        if (!temp)
33882 +            /* integer and fraction are 0, we set FP to its max val */
33883 +            fppShift = 31;
33884 +        else
33885 +        {
33886 +            /* integer was 0 but fraction is not. FP is 16 for the fraction,
33887 +             * + all left zeroes of the fraction. */
33888 +            fppShift=16;
33889 +            /* count zeroes left of the higher used bit (in order to shift the value such that
33890 +             * unused bits may be used for fraction).
33891 +             */
33892 +            while ((temp & 0x8000) == 0)
33893 +            {
33894 +                temp = temp << 1;
33895 +                fppShift++;
33896 +            }
33897 +        }
33898 +    }
33899 +
33900 +    /*
33901 +     * This means that the FM TS register will now be used so that 'fppShift' bits are for
33902 +     * fraction and the rest for integer */
33903 +    /* now we re-calculate cir and pir_eir with the calculated FP */
33904 +    GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->committedInfoRate, tsuInTenthNanos, fppShift, &integer, &fraction);
33905 +    *cir = (uint32_t)(integer << 16 | (fraction & 0xFFFF));
33906 +    GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->peakOrExcessInfoRate, tsuInTenthNanos, fppShift, &integer, &fraction);
33907 +    *pir_eir = (uint32_t)(integer << 16 | (fraction & 0xFFFF));
33908 +
33909 +    *cbs     =  p_NonPassthroughAlgParam->committedBurstSize;
33910 +    *pbs_ebs =  p_NonPassthroughAlgParam->peakOrExcessBurstSize;
33911 +
33912 +    /* convert FP as it should be written to reg.
33913 +     * 0-15 --> 16-31
33914 +     * 16-31 --> 0-15
33915 +     */
33916 +    *fpp = CalcFPP(fppShift);
33917 +}
33918 +
33919 +static void WritePar(t_FmPcd *p_FmPcd, uint32_t par)
33920 +{
33921 +    t_FmPcdPlcrRegs *p_FmPcdPlcrRegs    = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
33922 +
33923 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
33924 +    WRITE_UINT32(p_FmPcdPlcrRegs->fmpl_par, par);
33925 +
33926 +    while (GET_UINT32(p_FmPcdPlcrRegs->fmpl_par) & FM_PCD_PLCR_PAR_GO) ;
33927 +}
33928 +
33929 +static t_Error BuildProfileRegs(t_FmPcd                     *p_FmPcd,
33930 +                                t_FmPcdPlcrProfileParams    *p_ProfileParams,
33931 +                                t_FmPcdPlcrProfileRegs      *p_PlcrRegs)
33932 +{
33933 +    t_Error                 err = E_OK;
33934 +    uint32_t                pemode, gnia, ynia, rnia, bitFor1Micro;
33935 +
33936 +    ASSERT_COND(p_FmPcd);
33937 +
33938 +    bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
33939 +    if (bitFor1Micro == 0)
33940 +    RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
33941 +
33942 +/* Set G, Y, R Nia */
33943 +    err = SetProfileNia(p_FmPcd, p_ProfileParams->nextEngineOnGreen,  &(p_ProfileParams->paramsOnGreen), &gnia);
33944 +    if (err)
33945 +        RETURN_ERROR(MAJOR, err, NO_MSG);
33946 +    err = SetProfileNia(p_FmPcd, p_ProfileParams->nextEngineOnYellow, &(p_ProfileParams->paramsOnYellow), &ynia);
33947 +    if (err)
33948 +        RETURN_ERROR(MAJOR, err, NO_MSG);
33949 +    err = SetProfileNia(p_FmPcd, p_ProfileParams->nextEngineOnRed,    &(p_ProfileParams->paramsOnRed), &rnia);
33950 +   if (err)
33951 +        RETURN_ERROR(MAJOR, err, NO_MSG);
33952 +
33953 +/* Mode fmpl_pemode */
33954 +    pemode = FM_PCD_PLCR_PEMODE_PI;
33955 +
33956 +    switch (p_ProfileParams->algSelection)
33957 +    {
33958 +        case    e_FM_PCD_PLCR_PASS_THROUGH:
33959 +            p_PlcrRegs->fmpl_pecir         = 0;
33960 +            p_PlcrRegs->fmpl_pecbs         = 0;
33961 +            p_PlcrRegs->fmpl_pepepir_eir   = 0;
33962 +            p_PlcrRegs->fmpl_pepbs_ebs     = 0;
33963 +            p_PlcrRegs->fmpl_pelts         = 0;
33964 +            p_PlcrRegs->fmpl_pects         = 0;
33965 +            p_PlcrRegs->fmpl_pepts_ets     = 0;
33966 +            pemode &= ~FM_PCD_PLCR_PEMODE_ALG_MASK;
33967 +            switch (p_ProfileParams->colorMode)
33968 +            {
33969 +                case    e_FM_PCD_PLCR_COLOR_BLIND:
33970 +                    pemode |= FM_PCD_PLCR_PEMODE_CBLND;
33971 +                    switch (p_ProfileParams->color.dfltColor)
33972 +                    {
33973 +                        case e_FM_PCD_PLCR_GREEN:
33974 +                            pemode &= ~FM_PCD_PLCR_PEMODE_DEFC_MASK;
33975 +                            break;
33976 +                        case e_FM_PCD_PLCR_YELLOW:
33977 +                            pemode |= FM_PCD_PLCR_PEMODE_DEFC_Y;
33978 +                            break;
33979 +                        case e_FM_PCD_PLCR_RED:
33980 +                            pemode |= FM_PCD_PLCR_PEMODE_DEFC_R;
33981 +                            break;
33982 +                        case e_FM_PCD_PLCR_OVERRIDE:
33983 +                            pemode |= FM_PCD_PLCR_PEMODE_DEFC_OVERRIDE;
33984 +                            break;
33985 +                        default:
33986 +                            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
33987 +                    }
33988 +
33989 +                    break;
33990 +                case    e_FM_PCD_PLCR_COLOR_AWARE:
33991 +                    pemode &= ~FM_PCD_PLCR_PEMODE_CBLND;
33992 +                    break;
33993 +                default:
33994 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
33995 +            }
33996 +            break;
33997 +
33998 +        case    e_FM_PCD_PLCR_RFC_2698:
33999 +            /* Select algorithm MODE[ALG] = "01" */
34000 +            pemode |= FM_PCD_PLCR_PEMODE_ALG_RFC2698;
34001 +            if (p_ProfileParams->nonPassthroughAlgParams.committedInfoRate > p_ProfileParams->nonPassthroughAlgParams.peakOrExcessInfoRate)
34002 +                RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("in RFC2698 Peak rate must be equal or larger than committedInfoRate."));
34003 +            goto cont_rfc;
34004 +        case    e_FM_PCD_PLCR_RFC_4115:
34005 +            /* Select algorithm MODE[ALG] = "10" */
34006 +            pemode |= FM_PCD_PLCR_PEMODE_ALG_RFC4115;
34007 +cont_rfc:
34008 +            /* Select Color-Blind / Color-Aware operation (MODE[CBLND]) */
34009 +            switch (p_ProfileParams->colorMode)
34010 +            {
34011 +                case    e_FM_PCD_PLCR_COLOR_BLIND:
34012 +                    pemode |= FM_PCD_PLCR_PEMODE_CBLND;
34013 +                    break;
34014 +                case    e_FM_PCD_PLCR_COLOR_AWARE:
34015 +                    pemode &= ~FM_PCD_PLCR_PEMODE_CBLND;
34016 +                    /*In color aware more select override color interpretation (MODE[OVCLR]) */
34017 +                    switch (p_ProfileParams->color.override)
34018 +                    {
34019 +                        case e_FM_PCD_PLCR_GREEN:
34020 +                            pemode &= ~FM_PCD_PLCR_PEMODE_OVCLR_MASK;
34021 +                            break;
34022 +                        case e_FM_PCD_PLCR_YELLOW:
34023 +                            pemode |= FM_PCD_PLCR_PEMODE_OVCLR_Y;
34024 +                            break;
34025 +                        case e_FM_PCD_PLCR_RED:
34026 +                            pemode |= FM_PCD_PLCR_PEMODE_OVCLR_R;
34027 +                            break;
34028 +                        case e_FM_PCD_PLCR_OVERRIDE:
34029 +                            pemode |= FM_PCD_PLCR_PEMODE_OVCLR_G_NC;
34030 +                            break;
34031 +                        default:
34032 +                            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
34033 +                    }
34034 +                    break;
34035 +                default:
34036 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
34037 +            }
34038 +            /* Select Measurement Unit Mode to BYTE or PACKET (MODE[PKT]) */
34039 +            switch (p_ProfileParams->nonPassthroughAlgParams.rateMode)
34040 +            {
34041 +                case e_FM_PCD_PLCR_BYTE_MODE :
34042 +                    pemode &= ~FM_PCD_PLCR_PEMODE_PKT;
34043 +                        switch (p_ProfileParams->nonPassthroughAlgParams.byteModeParams.frameLengthSelection)
34044 +                        {
34045 +                            case e_FM_PCD_PLCR_L2_FRM_LEN:
34046 +                                pemode |= FM_PCD_PLCR_PEMODE_FLS_L2;
34047 +                                break;
34048 +                            case e_FM_PCD_PLCR_L3_FRM_LEN:
34049 +                                pemode |= FM_PCD_PLCR_PEMODE_FLS_L3;
34050 +                                break;
34051 +                            case e_FM_PCD_PLCR_L4_FRM_LEN:
34052 +                                pemode |= FM_PCD_PLCR_PEMODE_FLS_L4;
34053 +                                break;
34054 +                            case e_FM_PCD_PLCR_FULL_FRM_LEN:
34055 +                                pemode |= FM_PCD_PLCR_PEMODE_FLS_FULL;
34056 +                                break;
34057 +                            default:
34058 +                                RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
34059 +                        }
34060 +                        switch (p_ProfileParams->nonPassthroughAlgParams.byteModeParams.rollBackFrameSelection)
34061 +                        {
34062 +                            case e_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN:
34063 +                                pemode &= ~FM_PCD_PLCR_PEMODE_RBFLS;
34064 +                                break;
34065 +                            case e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN:
34066 +                                pemode |= FM_PCD_PLCR_PEMODE_RBFLS;
34067 +                                break;
34068 +                            default:
34069 +                                RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
34070 +                        }
34071 +                    break;
34072 +                case e_FM_PCD_PLCR_PACKET_MODE :
34073 +                    pemode |= FM_PCD_PLCR_PEMODE_PKT;
34074 +                    break;
34075 +                default:
34076 +                    RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
34077 +            }
34078 +            /* Select timeStamp floating point position (MODE[FPP]) to fit the actual traffic rates. For PACKET
34079 +               mode with low traffic rates move the fixed point to the left to increase fraction accuracy. For BYTE
34080 +               mode with high traffic rates move the fixed point to the right to increase integer accuracy. */
34081 +
34082 +            /* Configure Traffic Parameters*/
34083 +            {
34084 +                uint32_t cir=0, cbs=0, pir_eir=0, pbs_ebs=0, fpp=0;
34085 +
34086 +                CalcRates(bitFor1Micro, &p_ProfileParams->nonPassthroughAlgParams, &cir, &cbs, &pir_eir, &pbs_ebs, &fpp);
34087 +
34088 +                /*  Set Committed Information Rate (CIR) */
34089 +                p_PlcrRegs->fmpl_pecir = cir;
34090 +                /*  Set Committed Burst Size (CBS). */
34091 +                p_PlcrRegs->fmpl_pecbs =  cbs;
34092 +                /*  Set Peak Information Rate (PIR_EIR used as PIR) */
34093 +                p_PlcrRegs->fmpl_pepepir_eir = pir_eir;
34094 +                /*   Set Peak Burst Size (PBS_EBS used as PBS) */
34095 +                p_PlcrRegs->fmpl_pepbs_ebs = pbs_ebs;
34096 +
34097 +                /* Initialize the Metering Buckets to be full (write them with 0xFFFFFFFF. */
34098 +                /* Peak Rate Token Bucket Size (PTS_ETS used as PTS) */
34099 +                p_PlcrRegs->fmpl_pepts_ets = 0xFFFFFFFF;
34100 +                /* Committed Rate Token Bucket Size (CTS) */
34101 +                p_PlcrRegs->fmpl_pects = 0xFFFFFFFF;
34102 +
34103 +                /* Set the FPP based on calculation */
34104 +                pemode |= (fpp << FM_PCD_PLCR_PEMODE_FPP_SHIFT);
34105 +            }
34106 +            break;  /* FM_PCD_PLCR_PEMODE_ALG_RFC2698 , FM_PCD_PLCR_PEMODE_ALG_RFC4115 */
34107 +        default:
34108 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
34109 +    }
34110 +
34111 +    p_PlcrRegs->fmpl_pemode = pemode;
34112 +
34113 +    p_PlcrRegs->fmpl_pegnia = gnia;
34114 +    p_PlcrRegs->fmpl_peynia = ynia;
34115 +    p_PlcrRegs->fmpl_pernia = rnia;
34116 +
34117 +    /* Zero Counters */
34118 +    p_PlcrRegs->fmpl_pegpc     = 0;
34119 +    p_PlcrRegs->fmpl_peypc     = 0;
34120 +    p_PlcrRegs->fmpl_perpc     = 0;
34121 +    p_PlcrRegs->fmpl_perypc    = 0;
34122 +    p_PlcrRegs->fmpl_perrpc    = 0;
34123 +
34124 +    return E_OK;
34125 +}
34126 +
34127 +static t_Error AllocSharedProfiles(t_FmPcd *p_FmPcd, uint16_t numOfProfiles, uint16_t *profilesIds)
34128 +{
34129 +    uint32_t        profilesFound;
34130 +    uint16_t        i, k=0;
34131 +    uint32_t        intFlags;
34132 +
34133 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
34134 +
34135 +    if (!numOfProfiles)
34136 +        return E_OK;
34137 +
34138 +    if (numOfProfiles>FM_PCD_PLCR_NUM_ENTRIES)
34139 +        RETURN_ERROR(MINOR, E_INVALID_VALUE, ("numProfiles is too big."));
34140 +
34141 +    intFlags = PlcrSwLock(p_FmPcd->p_FmPcdPlcr);
34142 +    /* Find numOfProfiles free profiles (may be spread) */
34143 +    profilesFound = 0;
34144 +    for (i=0;i<FM_PCD_PLCR_NUM_ENTRIES; i++)
34145 +        if (!p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated)
34146 +        {
34147 +            profilesFound++;
34148 +            profilesIds[k] = i;
34149 +            k++;
34150 +            if (profilesFound == numOfProfiles)
34151 +                break;
34152 +        }
34153 +
34154 +    if (profilesFound != numOfProfiles)
34155 +    {
34156 +        PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
34157 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,NO_MSG);
34158 +    }
34159 +
34160 +    for (i = 0;i<k;i++)
34161 +    {
34162 +        p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.allocated = TRUE;
34163 +        p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.ownerId = 0;
34164 +    }
34165 +    PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
34166 +
34167 +    return E_OK;
34168 +}
34169 +
34170 +static void FreeSharedProfiles(t_FmPcd *p_FmPcd, uint16_t numOfProfiles, uint16_t *profilesIds)
34171 +{
34172 +    uint16_t        i;
34173 +
34174 +    SANITY_CHECK_RETURN(p_FmPcd, E_INVALID_HANDLE);
34175 +
34176 +    ASSERT_COND(numOfProfiles);
34177 +
34178 +    for (i=0; i < numOfProfiles; i++)
34179 +    {
34180 +        ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.allocated);
34181 +        p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.allocated = FALSE;
34182 +        p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.ownerId = p_FmPcd->guestId;
34183 +    }
34184 +}
34185 +
34186 +static void UpdateRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId, bool set)
34187 +{
34188 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34189 +
34190 +    /* this routine is protected by calling routine */
34191 +
34192 +    ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
34193 +
34194 +    if (set)
34195 +        p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredActionFlag = TRUE;
34196 +    else
34197 +    {
34198 +        p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredAction = 0;
34199 +        p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredActionFlag = FALSE;
34200 +    }
34201 +}
34202 +
34203 +/*********************************************/
34204 +/*............Policer Exception..............*/
34205 +/*********************************************/
34206 +static void EventsCB(t_Handle h_FmPcd)
34207 +{
34208 +    t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
34209 +    uint32_t event, mask, force;
34210 +
34211 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
34212 +    event = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_evr);
34213 +    mask = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier);
34214 +
34215 +    event &= mask;
34216 +
34217 +    /* clear the forced events */
34218 +    force = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr);
34219 +    if (force & event)
34220 +        WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr, force & ~event);
34221 +
34222 +
34223 +    WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_evr, event);
34224 +
34225 +    if (event & FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE)
34226 +        p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE);
34227 +    if (event & FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE)
34228 +        p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE);
34229 +}
34230 +
34231 +/* ..... */
34232 +
34233 +static void ErrorExceptionsCB(t_Handle h_FmPcd)
34234 +{
34235 +    t_FmPcd             *p_FmPcd = (t_FmPcd *)h_FmPcd;
34236 +    uint32_t            event, force, captureReg, mask;
34237 +
34238 +    ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
34239 +    event = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eevr);
34240 +    mask = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier);
34241 +
34242 +    event &= mask;
34243 +
34244 +    /* clear the forced events */
34245 +    force = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr);
34246 +    if (force & event)
34247 +        WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr, force & ~event);
34248 +
34249 +    WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eevr, event);
34250 +
34251 +    if (event & FM_PCD_PLCR_DOUBLE_ECC)
34252 +        p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC);
34253 +    if (event & FM_PCD_PLCR_INIT_ENTRY_ERROR)
34254 +    {
34255 +        captureReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_upcr);
34256 +        /*ASSERT_COND(captureReg & PLCR_ERR_UNINIT_CAP);
34257 +        p_UnInitCapt->profileNum = (uint8_t)(captureReg & PLCR_ERR_UNINIT_NUM_MASK);
34258 +        p_UnInitCapt->portId = (uint8_t)((captureReg & PLCR_ERR_UNINIT_PID_MASK) >>PLCR_ERR_UNINIT_PID_SHIFT) ;
34259 +        p_UnInitCapt->absolute = (bool)(captureReg & PLCR_ERR_UNINIT_ABSOLUTE_MASK);*/
34260 +        p_FmPcd->f_FmPcdIndexedException(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR,(uint16_t)(captureReg & PLCR_ERR_UNINIT_NUM_MASK));
34261 +        WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_upcr, PLCR_ERR_UNINIT_CAP);
34262 +    }
34263 +}
34264 +
34265 +
34266 +/*****************************************************************************/
34267 +/*              Inter-module API routines                                    */
34268 +/*****************************************************************************/
34269 +
34270 +t_Handle PlcrConfig(t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams)
34271 +{
34272 +    t_FmPcdPlcr *p_FmPcdPlcr;
34273 +    uint16_t    i=0;
34274 +
34275 +    UNUSED(p_FmPcd);
34276 +    UNUSED(p_FmPcdParams);
34277 +
34278 +    p_FmPcdPlcr = (t_FmPcdPlcr *) XX_Malloc(sizeof(t_FmPcdPlcr));
34279 +    if (!p_FmPcdPlcr)
34280 +    {
34281 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Policer structure allocation FAILED"));
34282 +        return NULL;
34283 +    }
34284 +    memset(p_FmPcdPlcr, 0, sizeof(t_FmPcdPlcr));
34285 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
34286 +    {
34287 +        p_FmPcdPlcr->p_FmPcdPlcrRegs  = (t_FmPcdPlcrRegs *)UINT_TO_PTR(FmGetPcdPlcrBaseAddr(p_FmPcdParams->h_Fm));
34288 +        p_FmPcd->p_FmPcdDriverParam->plcrAutoRefresh    = DEFAULT_plcrAutoRefresh;
34289 +        p_FmPcd->exceptions |= (DEFAULT_fmPcdPlcrExceptions | DEFAULT_fmPcdPlcrErrorExceptions);
34290 +    }
34291 +
34292 +    p_FmPcdPlcr->numOfSharedProfiles    = DEFAULT_numOfSharedPlcrProfiles;
34293 +
34294 +    p_FmPcdPlcr->partPlcrProfilesBase   = p_FmPcdParams->partPlcrProfilesBase;
34295 +    p_FmPcdPlcr->partNumOfPlcrProfiles  = p_FmPcdParams->partNumOfPlcrProfiles;
34296 +    /* for backward compatabilty. if no policer profile, will set automatically to the max */
34297 +    if ((p_FmPcd->guestId == NCSW_MASTER_ID) &&
34298 +        (p_FmPcdPlcr->partNumOfPlcrProfiles == 0))
34299 +        p_FmPcdPlcr->partNumOfPlcrProfiles = FM_PCD_PLCR_NUM_ENTRIES;
34300 +
34301 +    for (i=0; i<FM_PCD_PLCR_NUM_ENTRIES; i++)
34302 +        p_FmPcdPlcr->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
34303 +
34304 +    return p_FmPcdPlcr;
34305 +}
34306 +
34307 +t_Error PlcrInit(t_FmPcd *p_FmPcd)
34308 +{
34309 +    t_FmPcdDriverParam              *p_Param = p_FmPcd->p_FmPcdDriverParam;
34310 +    t_FmPcdPlcr                     *p_FmPcdPlcr = p_FmPcd->p_FmPcdPlcr;
34311 +    t_FmPcdPlcrRegs                 *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
34312 +    t_Error                         err = E_OK;
34313 +    uint32_t                        tmpReg32 = 0;
34314 +    uint16_t                        base;
34315 +
34316 +    if ((p_FmPcdPlcr->partPlcrProfilesBase + p_FmPcdPlcr->partNumOfPlcrProfiles) > FM_PCD_PLCR_NUM_ENTRIES)
34317 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("partPlcrProfilesBase+partNumOfPlcrProfiles out of range!!!"));
34318 +
34319 +    p_FmPcdPlcr->h_HwSpinlock = XX_InitSpinlock();
34320 +    if (!p_FmPcdPlcr->h_HwSpinlock)
34321 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM Policer HW spinlock"));
34322 +
34323 +    p_FmPcdPlcr->h_SwSpinlock = XX_InitSpinlock();
34324 +    if (!p_FmPcdPlcr->h_SwSpinlock)
34325 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM Policer SW spinlock"));
34326 +
34327 +    base = PlcrAllocProfilesForPartition(p_FmPcd,
34328 +                                         p_FmPcdPlcr->partPlcrProfilesBase,
34329 +                                         p_FmPcdPlcr->partNumOfPlcrProfiles,
34330 +                                         p_FmPcd->guestId);
34331 +    if (base == (uint16_t)ILLEGAL_BASE)
34332 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
34333 +
34334 +    if (p_FmPcdPlcr->numOfSharedProfiles)
34335 +    {
34336 +        err = AllocSharedProfiles(p_FmPcd,
34337 +                                  p_FmPcdPlcr->numOfSharedProfiles,
34338 +                                  p_FmPcdPlcr->sharedProfilesIds);
34339 +        if (err)
34340 +            RETURN_ERROR(MAJOR, err,NO_MSG);
34341 +    }
34342 +
34343 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
34344 +        return E_OK;
34345 +
34346 +    /**********************FMPL_GCR******************/
34347 +    tmpReg32 = 0;
34348 +    tmpReg32 |= FM_PCD_PLCR_GCR_STEN;
34349 +    if (p_Param->plcrAutoRefresh)
34350 +        tmpReg32 |= FM_PCD_PLCR_GCR_DAR;
34351 +    tmpReg32 |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
34352 +
34353 +    WRITE_UINT32(p_Regs->fmpl_gcr, tmpReg32);
34354 +    /**********************FMPL_GCR******************/
34355 +
34356 +    /**********************FMPL_EEVR******************/
34357 +    WRITE_UINT32(p_Regs->fmpl_eevr, (FM_PCD_PLCR_DOUBLE_ECC | FM_PCD_PLCR_INIT_ENTRY_ERROR));
34358 +    /**********************FMPL_EEVR******************/
34359 +    /**********************FMPL_EIER******************/
34360 +    tmpReg32 = 0;
34361 +    if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_DOUBLE_ECC)
34362 +    {
34363 +        FmEnableRamsEcc(p_FmPcd->h_Fm);
34364 +        tmpReg32 |= FM_PCD_PLCR_DOUBLE_ECC;
34365 +    }
34366 +    if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_INIT_ENTRY_ERROR)
34367 +        tmpReg32 |= FM_PCD_PLCR_INIT_ENTRY_ERROR;
34368 +    WRITE_UINT32(p_Regs->fmpl_eier, tmpReg32);
34369 +    /**********************FMPL_EIER******************/
34370 +
34371 +    /**********************FMPL_EVR******************/
34372 +    WRITE_UINT32(p_Regs->fmpl_evr, (FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE | FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE));
34373 +    /**********************FMPL_EVR******************/
34374 +    /**********************FMPL_IER******************/
34375 +    tmpReg32 = 0;
34376 +    if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE)
34377 +        tmpReg32 |= FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE;
34378 +    if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE)
34379 +        tmpReg32 |= FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE;
34380 +    WRITE_UINT32(p_Regs->fmpl_ier, tmpReg32);
34381 +    /**********************FMPL_IER******************/
34382 +
34383 +    /* register even if no interrupts enabled, to allow future enablement */
34384 +    FmRegisterIntr(p_FmPcd->h_Fm,
34385 +                   e_FM_MOD_PLCR,
34386 +                   0,
34387 +                   e_FM_INTR_TYPE_ERR,
34388 +                   ErrorExceptionsCB,
34389 +                   p_FmPcd);
34390 +    FmRegisterIntr(p_FmPcd->h_Fm,
34391 +                   e_FM_MOD_PLCR,
34392 +                   0,
34393 +                   e_FM_INTR_TYPE_NORMAL,
34394 +                   EventsCB,
34395 +                   p_FmPcd);
34396 +
34397 +    /* driver initializes one DFLT profile at the last entry*/
34398 +    /**********************FMPL_DPMR******************/
34399 +    tmpReg32 = 0;
34400 +    WRITE_UINT32(p_Regs->fmpl_dpmr, tmpReg32);
34401 +    p_FmPcd->p_FmPcdPlcr->profiles[0].profilesMng.allocated = TRUE;
34402 +
34403 +    return E_OK;
34404 +}
34405 +
34406 +t_Error PlcrFree(t_FmPcd *p_FmPcd)
34407 +{
34408 +    FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PLCR, 0, e_FM_INTR_TYPE_ERR);
34409 +    FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PLCR, 0, e_FM_INTR_TYPE_NORMAL);
34410 +
34411 +    if (p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles)
34412 +        FreeSharedProfiles(p_FmPcd,
34413 +                           p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles,
34414 +                           p_FmPcd->p_FmPcdPlcr->sharedProfilesIds);
34415 +
34416 +    if (p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles)
34417 +        PlcrFreeProfilesForPartition(p_FmPcd,
34418 +                                     p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase,
34419 +                                     p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles,
34420 +                                     p_FmPcd->guestId);
34421 +
34422 +    if (p_FmPcd->p_FmPcdPlcr->h_SwSpinlock)
34423 +        XX_FreeSpinlock(p_FmPcd->p_FmPcdPlcr->h_SwSpinlock);
34424 +
34425 +    if (p_FmPcd->p_FmPcdPlcr->h_HwSpinlock)
34426 +        XX_FreeSpinlock(p_FmPcd->p_FmPcdPlcr->h_HwSpinlock);
34427 +
34428 +    return E_OK;
34429 +}
34430 +
34431 +void PlcrEnable(t_FmPcd *p_FmPcd)
34432 +{
34433 +    t_FmPcdPlcrRegs             *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
34434 +
34435 +    WRITE_UINT32(p_Regs->fmpl_gcr, GET_UINT32(p_Regs->fmpl_gcr) | FM_PCD_PLCR_GCR_EN);
34436 +}
34437 +
34438 +void PlcrDisable(t_FmPcd *p_FmPcd)
34439 +{
34440 +    t_FmPcdPlcrRegs             *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
34441 +
34442 +    WRITE_UINT32(p_Regs->fmpl_gcr, GET_UINT32(p_Regs->fmpl_gcr) & ~FM_PCD_PLCR_GCR_EN);
34443 +}
34444 +
34445 +uint16_t PlcrAllocProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId)
34446 +{
34447 +    uint32_t    intFlags;
34448 +    uint16_t    profilesFound = 0;
34449 +    int         i = 0;
34450 +
34451 +    ASSERT_COND(p_FmPcd);
34452 +    ASSERT_COND(p_FmPcd->p_FmPcdPlcr);
34453 +
34454 +    if (!numOfProfiles)
34455 +        return 0;
34456 +
34457 +    if ((numOfProfiles > FM_PCD_PLCR_NUM_ENTRIES) ||
34458 +        (base + numOfProfiles > FM_PCD_PLCR_NUM_ENTRIES))
34459 +        return (uint16_t)ILLEGAL_BASE;
34460 +
34461 +    if (p_FmPcd->h_IpcSession)
34462 +    {
34463 +        t_FmIpcResourceAllocParams      ipcAllocParams;
34464 +        t_FmPcdIpcMsg                   msg;
34465 +        t_FmPcdIpcReply                 reply;
34466 +        t_Error                         err;
34467 +        uint32_t                        replyLength;
34468 +
34469 +        memset(&msg, 0, sizeof(msg));
34470 +        memset(&reply, 0, sizeof(reply));
34471 +        memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
34472 +        ipcAllocParams.guestId         = p_FmPcd->guestId;
34473 +        ipcAllocParams.num             = p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles;
34474 +        ipcAllocParams.base            = p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase;
34475 +        msg.msgId                      = FM_PCD_ALLOC_PROFILES;
34476 +        memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
34477 +        replyLength = sizeof(uint32_t) + sizeof(uint16_t);
34478 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
34479 +                                (uint8_t*)&msg,
34480 +                                sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
34481 +                                (uint8_t*)&reply,
34482 +                                &replyLength,
34483 +                                NULL,
34484 +                                NULL);
34485 +        if ((err != E_OK) ||
34486 +            (replyLength != (sizeof(uint32_t) + sizeof(uint16_t))))
34487 +        {
34488 +            REPORT_ERROR(MAJOR, err, NO_MSG);
34489 +            return (uint16_t)ILLEGAL_BASE;
34490 +        }
34491 +        else
34492 +            memcpy((uint8_t*)&p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase, reply.replyBody, sizeof(uint16_t));
34493 +        if (p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase == (uint16_t)ILLEGAL_BASE)
34494 +        {
34495 +            REPORT_ERROR(MAJOR, err, NO_MSG);
34496 +            return (uint16_t)ILLEGAL_BASE;
34497 +        }
34498 +    }
34499 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
34500 +    {
34501 +        DBG(WARNING, ("FM Guest mode, without IPC - can't validate Policer-profiles range!"));
34502 +        return (uint16_t)ILLEGAL_BASE;
34503 +    }
34504 +
34505 +    intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
34506 +    for (i=base; i<(base+numOfProfiles); i++)
34507 +        if (p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId == (uint8_t)ILLEGAL_BASE)
34508 +            profilesFound++;
34509 +        else
34510 +            break;
34511 +
34512 +    if (profilesFound == numOfProfiles)
34513 +        for (i=base; i<(base+numOfProfiles); i++)
34514 +            p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = guestId;
34515 +    else
34516 +    {
34517 +        XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
34518 +        return (uint16_t)ILLEGAL_BASE;
34519 +    }
34520 +    XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
34521 +
34522 +    return base;
34523 +}
34524 +
34525 +void PlcrFreeProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId)
34526 +{
34527 +    int     i = 0;
34528 +
34529 +    ASSERT_COND(p_FmPcd);
34530 +    ASSERT_COND(p_FmPcd->p_FmPcdPlcr);
34531 +
34532 +    if (p_FmPcd->h_IpcSession)
34533 +    {
34534 +        t_FmIpcResourceAllocParams      ipcAllocParams;
34535 +        t_FmPcdIpcMsg                   msg;
34536 +        t_Error                         err;
34537 +
34538 +        memset(&msg, 0, sizeof(msg));
34539 +        memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
34540 +        ipcAllocParams.guestId         = p_FmPcd->guestId;
34541 +        ipcAllocParams.num             = p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles;
34542 +        ipcAllocParams.base            = p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase;
34543 +        msg.msgId                      = FM_PCD_FREE_PROFILES;
34544 +        memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
34545 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
34546 +                                (uint8_t*)&msg,
34547 +                                sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
34548 +                                NULL,
34549 +                                NULL,
34550 +                                NULL,
34551 +                                NULL);
34552 +        if (err != E_OK)
34553 +            REPORT_ERROR(MAJOR, err, NO_MSG);
34554 +        return;
34555 +    }
34556 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
34557 +    {
34558 +        DBG(WARNING, ("FM Guest mode, without IPC - can't validate Policer-profiles range!"));
34559 +        return;
34560 +    }
34561 +
34562 +    for (i=base; i<(base+numOfProfiles); i++)
34563 +    {
34564 +        if (p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId == guestId)
34565 +           p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
34566 +        else
34567 +            DBG(WARNING, ("Request for freeing storage profile window which wasn't allocated to this partition"));
34568 +    }
34569 +}
34570 +
34571 +t_Error PlcrSetPortProfiles(t_FmPcd    *p_FmPcd,
34572 +                            uint8_t    hardwarePortId,
34573 +                            uint16_t   numOfProfiles,
34574 +                            uint16_t   base)
34575 +{
34576 +    t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
34577 +    uint32_t        log2Num, tmpReg32;
34578 +
34579 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
34580 +        !p_Regs &&
34581 +        p_FmPcd->h_IpcSession)
34582 +    {
34583 +        t_FmIpcResourceAllocParams      ipcAllocParams;
34584 +        t_FmPcdIpcMsg                   msg;
34585 +        t_Error                         err;
34586 +
34587 +        memset(&msg, 0, sizeof(msg));
34588 +        memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
34589 +        ipcAllocParams.guestId         = hardwarePortId;
34590 +        ipcAllocParams.num             = numOfProfiles;
34591 +        ipcAllocParams.base            = base;
34592 +        msg.msgId                              = FM_PCD_SET_PORT_PROFILES;
34593 +        memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
34594 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
34595 +                                (uint8_t*)&msg,
34596 +                                sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
34597 +                                NULL,
34598 +                                NULL,
34599 +                                NULL,
34600 +                                NULL);
34601 +        if (err != E_OK)
34602 +            RETURN_ERROR(MAJOR, err, NO_MSG);
34603 +        return E_OK;
34604 +    }
34605 +    else if (!p_Regs)
34606 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
34607 +                     ("Either IPC or 'baseAddress' is required!"));
34608 +
34609 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
34610 +
34611 +    if (GET_UINT32(p_Regs->fmpl_pmr[hardwarePortId-1]) & FM_PCD_PLCR_PMR_V)
34612 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
34613 +                     ("The requesting port has already an allocated profiles window."));
34614 +
34615 +    /**********************FMPL_PMRx******************/
34616 +    LOG2((uint64_t)numOfProfiles, log2Num);
34617 +    tmpReg32 = base;
34618 +    tmpReg32 |= log2Num << 16;
34619 +    tmpReg32 |= FM_PCD_PLCR_PMR_V;
34620 +    WRITE_UINT32(p_Regs->fmpl_pmr[hardwarePortId-1], tmpReg32);
34621 +
34622 +    return E_OK;
34623 +}
34624 +
34625 +t_Error PlcrClearPortProfiles(t_FmPcd *p_FmPcd, uint8_t hardwarePortId)
34626 +{
34627 +    t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
34628 +
34629 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
34630 +        !p_Regs &&
34631 +        p_FmPcd->h_IpcSession)
34632 +    {
34633 +        t_FmIpcResourceAllocParams      ipcAllocParams;
34634 +        t_FmPcdIpcMsg                   msg;
34635 +        t_Error                         err;
34636 +
34637 +        memset(&msg, 0, sizeof(msg));
34638 +        memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
34639 +        ipcAllocParams.guestId         = hardwarePortId;
34640 +        msg.msgId                              = FM_PCD_CLEAR_PORT_PROFILES;
34641 +        memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
34642 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
34643 +                                (uint8_t*)&msg,
34644 +                                sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
34645 +                                NULL,
34646 +                                NULL,
34647 +                                NULL,
34648 +                                NULL);
34649 +        if (err != E_OK)
34650 +            RETURN_ERROR(MAJOR, err, NO_MSG);
34651 +        return E_OK;
34652 +    }
34653 +    else if (!p_Regs)
34654 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
34655 +                     ("Either IPC or 'baseAddress' is required!"));
34656 +
34657 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
34658 +    WRITE_UINT32(p_Regs->fmpl_pmr[hardwarePortId-1], 0);
34659 +
34660 +    return E_OK;
34661 +}
34662 +
34663 +t_Error FmPcdPlcrAllocProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId, uint16_t numOfProfiles)
34664 +{
34665 +    t_FmPcd                     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34666 +    t_Error                     err = E_OK;
34667 +    uint32_t                    profilesFound;
34668 +    uint32_t                    intFlags;
34669 +    uint16_t                    i, first, swPortIndex = 0;
34670 +
34671 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
34672 +
34673 +    if (!numOfProfiles)
34674 +        return E_OK;
34675 +
34676 +    ASSERT_COND(hardwarePortId);
34677 +
34678 +    if (numOfProfiles>FM_PCD_PLCR_NUM_ENTRIES)
34679 +        RETURN_ERROR(MINOR, E_INVALID_VALUE, ("numProfiles is too big."));
34680 +
34681 +    if (!POWER_OF_2(numOfProfiles))
34682 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numProfiles must be a power of 2."));
34683 +
34684 +    first = 0;
34685 +    profilesFound = 0;
34686 +    intFlags = PlcrSwLock(p_FmPcd->p_FmPcdPlcr);
34687 +
34688 +    for (i=0; i<FM_PCD_PLCR_NUM_ENTRIES; )
34689 +    {
34690 +        if (!p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated)
34691 +        {
34692 +            profilesFound++;
34693 +            i++;
34694 +            if (profilesFound == numOfProfiles)
34695 +                break;
34696 +        }
34697 +        else
34698 +        {
34699 +            profilesFound = 0;
34700 +            /* advance i to the next aligned address */
34701 +            i = first = (uint16_t)(first + numOfProfiles);
34702 +        }
34703 +    }
34704 +
34705 +    if (profilesFound == numOfProfiles)
34706 +    {
34707 +        for (i=first; i<first + numOfProfiles; i++)
34708 +        {
34709 +            p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated = TRUE;
34710 +            p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = hardwarePortId;
34711 +        }
34712 +    }
34713 +    else
34714 +    {
34715 +        PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
34716 +        RETURN_ERROR(MINOR, E_FULL, ("No profiles."));
34717 +    }
34718 +    PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
34719 +
34720 +    err = PlcrSetPortProfiles(p_FmPcd, hardwarePortId, numOfProfiles, first);
34721 +    if (err)
34722 +    {
34723 +        RETURN_ERROR(MAJOR, err, NO_MSG);
34724 +    }
34725 +
34726 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
34727 +
34728 +    p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles = numOfProfiles;
34729 +    p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase = first;
34730 +
34731 +    return E_OK;
34732 +}
34733 +
34734 +t_Error FmPcdPlcrFreeProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId)
34735 +{
34736 +    t_FmPcd                     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34737 +    t_Error                     err = E_OK;
34738 +    uint32_t                    intFlags;
34739 +    uint16_t                    i, swPortIndex = 0;
34740 +
34741 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
34742 +
34743 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
34744 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
34745 +
34746 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
34747 +
34748 +    err = PlcrClearPortProfiles(p_FmPcd, hardwarePortId);
34749 +    if (err)
34750 +        RETURN_ERROR(MAJOR, err,NO_MSG);
34751 +
34752 +    intFlags = PlcrSwLock(p_FmPcd->p_FmPcdPlcr);
34753 +    for (i=p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase;
34754 +         i<(p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase +
34755 +            p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles);
34756 +         i++)
34757 +    {
34758 +        ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId == hardwarePortId);
34759 +        ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated);
34760 +
34761 +        p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated = FALSE;
34762 +        p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = p_FmPcd->guestId;
34763 +    }
34764 +    PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
34765 +
34766 +    p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles = 0;
34767 +    p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase = 0;
34768 +
34769 +    return E_OK;
34770 +}
34771 +
34772 +t_Error FmPcdPlcrCcGetSetParams(t_Handle h_FmPcd, uint16_t profileIndx ,uint32_t requiredAction)
34773 +{
34774 +    t_FmPcd         *p_FmPcd           = (t_FmPcd *)h_FmPcd;
34775 +    t_FmPcdPlcr     *p_FmPcdPlcr        = p_FmPcd->p_FmPcdPlcr;
34776 +    t_FmPcdPlcrRegs *p_FmPcdPlcrRegs    = p_FmPcdPlcr->p_FmPcdPlcrRegs;
34777 +    uint32_t        tmpReg32, intFlags;
34778 +    t_Error         err;
34779 +
34780 +    /* Calling function locked all PCD modules, so no need to lock here */
34781 +
34782 +    if (profileIndx >= FM_PCD_PLCR_NUM_ENTRIES)
34783 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,("Policer profile out of range"));
34784 +
34785 +    if (!FmPcdPlcrIsProfileValid(p_FmPcd, profileIndx))
34786 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,("Policer profile is not valid"));
34787 +
34788 +    /*intFlags = PlcrProfileLock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx]);*/
34789 +
34790 +    if (p_FmPcd->h_Hc)
34791 +    {
34792 +        err = FmHcPcdPlcrCcGetSetParams(p_FmPcd->h_Hc, profileIndx, requiredAction);
34793 +
34794 +        UpdateRequiredActionFlag(p_FmPcd, profileIndx, TRUE);
34795 +        FmPcdPlcrUpdateRequiredAction(p_FmPcd, profileIndx, requiredAction);
34796 +
34797 +        /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
34798 +        return err;
34799 +    }
34800 +
34801 +    /* lock the HW because once we read the registers we don't want them to be changed
34802 +     * by another access. (We can copy to a tmp location and release the lock!) */
34803 +
34804 +    intFlags = PlcrHwLock(p_FmPcdPlcr);
34805 +    WritePar(p_FmPcd, FmPcdPlcrBuildReadPlcrActionReg(profileIndx));
34806 +
34807 +    if (!p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].requiredActionFlag ||
34808 +       !(p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].requiredAction & requiredAction))
34809 +    {
34810 +        if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
34811 +        {
34812 +            if ((p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].nextEngineOnGreen!= e_FM_PCD_DONE) ||
34813 +               (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].nextEngineOnYellow!= e_FM_PCD_DONE) ||
34814 +               (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].nextEngineOnRed!= e_FM_PCD_DONE))
34815 +            {
34816 +                PlcrHwUnlock(p_FmPcdPlcr, intFlags);
34817 +                /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
34818 +                RETURN_ERROR (MAJOR, E_OK, ("In this case the next engine can be e_FM_PCD_DONE"));
34819 +            }
34820 +
34821 +            if (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].paramsOnGreen.action == e_FM_PCD_ENQ_FRAME)
34822 +            {
34823 +                tmpReg32 = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegnia);
34824 +                if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
34825 +                {
34826 +                    PlcrHwUnlock(p_FmPcdPlcr, intFlags);
34827 +                    /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
34828 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
34829 +                }
34830 +                tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
34831 +                WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegnia, tmpReg32);
34832 +                tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
34833 +                tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEGNIA;
34834 +                WritePar(p_FmPcd, tmpReg32);
34835 +            }
34836 +
34837 +            if (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].paramsOnYellow.action == e_FM_PCD_ENQ_FRAME)
34838 +            {
34839 +                tmpReg32 = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peynia);
34840 +                if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
34841 +                {
34842 +                    PlcrHwUnlock(p_FmPcdPlcr, intFlags);
34843 +                    /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
34844 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
34845 +                }
34846 +                tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
34847 +                WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peynia, tmpReg32);
34848 +                tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
34849 +                tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEYNIA;
34850 +                WritePar(p_FmPcd, tmpReg32);
34851 +                PlcrHwUnlock(p_FmPcdPlcr, intFlags);
34852 +            }
34853 +
34854 +            if (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].paramsOnRed.action == e_FM_PCD_ENQ_FRAME)
34855 +            {
34856 +                tmpReg32 = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pernia);
34857 +                if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
34858 +                {
34859 +                    PlcrHwUnlock(p_FmPcdPlcr, intFlags);
34860 +                    /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
34861 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
34862 +                }
34863 +                tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
34864 +                WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pernia, tmpReg32);
34865 +                tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
34866 +                tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PERNIA;
34867 +                WritePar(p_FmPcd, tmpReg32);
34868 +
34869 +            }
34870 +        }
34871 +    }
34872 +    PlcrHwUnlock(p_FmPcdPlcr, intFlags);
34873 +
34874 +    UpdateRequiredActionFlag(p_FmPcd, profileIndx, TRUE);
34875 +    FmPcdPlcrUpdateRequiredAction(p_FmPcd, profileIndx, requiredAction);
34876 +
34877 +    /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
34878 +
34879 +    return E_OK;
34880 +}
34881 +
34882 +uint32_t FmPcdPlcrGetRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId)
34883 +{
34884 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34885 +
34886 +   ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
34887 +
34888 +    return p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredActionFlag;
34889 +}
34890 +
34891 +uint32_t FmPcdPlcrGetRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId)
34892 +{
34893 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34894 +
34895 +   ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
34896 +
34897 +    return p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredAction;
34898 +}
34899 +
34900 +bool FmPcdPlcrIsProfileValid(t_Handle h_FmPcd, uint16_t absoluteProfileId)
34901 +{
34902 +    t_FmPcd         *p_FmPcd            = (t_FmPcd*)h_FmPcd;
34903 +    t_FmPcdPlcr     *p_FmPcdPlcr        = p_FmPcd->p_FmPcdPlcr;
34904 +
34905 +    ASSERT_COND(absoluteProfileId < FM_PCD_PLCR_NUM_ENTRIES);
34906 +
34907 +    return p_FmPcdPlcr->profiles[absoluteProfileId].valid;
34908 +}
34909 +
34910 +void  FmPcdPlcrValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId)
34911 +{
34912 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34913 +    uint32_t    intFlags;
34914 +
34915 +    ASSERT_COND(!p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
34916 +
34917 +    intFlags = PlcrProfileLock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId]);
34918 +    p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid = TRUE;
34919 +    PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId], intFlags);
34920 +}
34921 +
34922 +void  FmPcdPlcrInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId)
34923 +{
34924 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
34925 +    uint32_t    intFlags;
34926 +
34927 +    ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
34928 +
34929 +    intFlags = PlcrProfileLock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId]);
34930 +    p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid = FALSE;
34931 +    PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId], intFlags);
34932 +}
34933 +
34934 +uint16_t     FmPcdPlcrProfileGetAbsoluteId(t_Handle h_Profile)
34935 +{
34936 +        return ((t_FmPcdPlcrProfile*)h_Profile)->absoluteProfileId;
34937 +}
34938 +
34939 +t_Error FmPcdPlcrGetAbsoluteIdByProfileParams(t_Handle                      h_FmPcd,
34940 +                                              e_FmPcdProfileTypeSelection   profileType,
34941 +                                              t_Handle                      h_FmPort,
34942 +                                              uint16_t                      relativeProfile,
34943 +                                              uint16_t                      *p_AbsoluteId)
34944 +{
34945 +    t_FmPcd         *p_FmPcd            = (t_FmPcd*)h_FmPcd;
34946 +    t_FmPcdPlcr     *p_FmPcdPlcr        = p_FmPcd->p_FmPcdPlcr;
34947 +    uint8_t         i;
34948 +
34949 +    switch (profileType)
34950 +    {
34951 +        case e_FM_PCD_PLCR_PORT_PRIVATE:
34952 +            /* get port PCD id from port handle */
34953 +            for (i=0;i<FM_MAX_NUM_OF_PORTS;i++)
34954 +                if (p_FmPcd->p_FmPcdPlcr->portsMapping[i].h_FmPort == h_FmPort)
34955 +                    break;
34956 +            if (i ==  FM_MAX_NUM_OF_PORTS)
34957 +                RETURN_ERROR(MAJOR, E_INVALID_STATE , ("Invalid port handle."));
34958 +
34959 +            if (!p_FmPcd->p_FmPcdPlcr->portsMapping[i].numOfProfiles)
34960 +                RETURN_ERROR(MAJOR, E_INVALID_SELECTION , ("Port has no allocated profiles"));
34961 +            if (relativeProfile >= p_FmPcd->p_FmPcdPlcr->portsMapping[i].numOfProfiles)
34962 +                RETURN_ERROR(MAJOR, E_INVALID_SELECTION , ("Profile id is out of range"));
34963 +            *p_AbsoluteId = (uint16_t)(p_FmPcd->p_FmPcdPlcr->portsMapping[i].profilesBase + relativeProfile);
34964 +            break;
34965 +        case e_FM_PCD_PLCR_SHARED:
34966 +            if (relativeProfile >= p_FmPcdPlcr->numOfSharedProfiles)
34967 +                RETURN_ERROR(MAJOR, E_INVALID_SELECTION , ("Profile id is out of range"));
34968 +            *p_AbsoluteId = (uint16_t)(p_FmPcdPlcr->sharedProfilesIds[relativeProfile]);
34969 +            break;
34970 +        default:
34971 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Invalid policer profile type"));
34972 +    }
34973 +
34974 +    return E_OK;
34975 +}
34976 +
34977 +uint16_t FmPcdPlcrGetPortProfilesBase(t_Handle h_FmPcd, uint8_t hardwarePortId)
34978 +{
34979 +    t_FmPcd         *p_FmPcd = (t_FmPcd *)h_FmPcd;
34980 +    uint16_t        swPortIndex = 0;
34981 +
34982 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
34983 +
34984 +    return p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase;
34985 +}
34986 +
34987 +uint16_t FmPcdPlcrGetPortNumOfProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId)
34988 +{
34989 +    t_FmPcd         *p_FmPcd = (t_FmPcd *)h_FmPcd;
34990 +    uint16_t        swPortIndex = 0;
34991 +
34992 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
34993 +
34994 +    return p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles;
34995 +
34996 +}
34997 +uint32_t FmPcdPlcrBuildWritePlcrActionReg(uint16_t absoluteProfileId)
34998 +{
34999 +    return (uint32_t)(FM_PCD_PLCR_PAR_GO |
35000 +                      ((uint32_t)absoluteProfileId << FM_PCD_PLCR_PAR_PNUM_SHIFT));
35001 +}
35002 +
35003 +uint32_t FmPcdPlcrBuildWritePlcrActionRegs(uint16_t absoluteProfileId)
35004 +{
35005 +    return (uint32_t)(FM_PCD_PLCR_PAR_GO |
35006 +                      ((uint32_t)absoluteProfileId << FM_PCD_PLCR_PAR_PNUM_SHIFT) |
35007 +                      FM_PCD_PLCR_PAR_PWSEL_MASK);
35008 +}
35009 +
35010 +bool    FmPcdPlcrHwProfileIsValid(uint32_t profileModeReg)
35011 +{
35012 +
35013 +    if (profileModeReg & FM_PCD_PLCR_PEMODE_PI)
35014 +        return TRUE;
35015 +    else
35016 +        return FALSE;
35017 +}
35018 +
35019 +uint32_t FmPcdPlcrBuildReadPlcrActionReg(uint16_t absoluteProfileId)
35020 +{
35021 +    return (uint32_t)(FM_PCD_PLCR_PAR_GO |
35022 +                      FM_PCD_PLCR_PAR_R |
35023 +                      ((uint32_t)absoluteProfileId << FM_PCD_PLCR_PAR_PNUM_SHIFT) |
35024 +                      FM_PCD_PLCR_PAR_PWSEL_MASK);
35025 +}
35026 +
35027 +uint32_t FmPcdPlcrBuildCounterProfileReg(e_FmPcdPlcrProfileCounters counter)
35028 +{
35029 +    switch (counter)
35030 +    {
35031 +        case (e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER):
35032 +            return FM_PCD_PLCR_PAR_PWSEL_PEGPC;
35033 +        case (e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER):
35034 +            return FM_PCD_PLCR_PAR_PWSEL_PEYPC;
35035 +        case (e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER) :
35036 +            return FM_PCD_PLCR_PAR_PWSEL_PERPC;
35037 +        case (e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER) :
35038 +            return FM_PCD_PLCR_PAR_PWSEL_PERYPC;
35039 +        case (e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER) :
35040 +            return FM_PCD_PLCR_PAR_PWSEL_PERRPC;
35041 +       default:
35042 +            REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
35043 +            return 0;
35044 +    }
35045 +}
35046 +
35047 +uint32_t FmPcdPlcrBuildNiaProfileReg(bool green, bool yellow, bool red)
35048 +{
35049 +
35050 +    uint32_t tmpReg32 = 0;
35051 +
35052 +    if (green)
35053 +        tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEGNIA;
35054 +    if (yellow)
35055 +        tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEYNIA;
35056 +    if (red)
35057 +        tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PERNIA;
35058 +
35059 +    return tmpReg32;
35060 +}
35061 +
35062 +void FmPcdPlcrUpdateRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId, uint32_t requiredAction)
35063 +{
35064 +    t_FmPcd     *p_FmPcd = (t_FmPcd*)h_FmPcd;
35065 +
35066 +    /* this routine is protected by calling routine */
35067 +
35068 +    ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
35069 +
35070 +    p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredAction |= requiredAction;
35071 +}
35072 +
35073 +/*********************** End of inter-module routines ************************/
35074 +
35075 +
35076 +/**************************************************/
35077 +/*............Policer API.........................*/
35078 +/**************************************************/
35079 +
35080 +t_Error FM_PCD_ConfigPlcrAutoRefreshMode(t_Handle h_FmPcd, bool enable)
35081 +{
35082 +   t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
35083 +
35084 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35085 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
35086 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE);
35087 +
35088 +    if (!FmIsMaster(p_FmPcd->h_Fm))
35089 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ConfigPlcrAutoRefreshMode - guest mode!"));
35090 +
35091 +    p_FmPcd->p_FmPcdDriverParam->plcrAutoRefresh = enable;
35092 +
35093 +    return E_OK;
35094 +}
35095 +
35096 +t_Error FM_PCD_ConfigPlcrNumOfSharedProfiles(t_Handle h_FmPcd, uint16_t numOfSharedPlcrProfiles)
35097 +{
35098 +   t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
35099 +
35100 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35101 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
35102 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE);
35103 +
35104 +    p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles = numOfSharedPlcrProfiles;
35105 +
35106 +    return E_OK;
35107 +}
35108 +
35109 +t_Error FM_PCD_SetPlcrStatistics(t_Handle h_FmPcd, bool enable)
35110 +{
35111 +   t_FmPcd  *p_FmPcd = (t_FmPcd*)h_FmPcd;
35112 +   uint32_t tmpReg32;
35113 +
35114 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35115 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
35116 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE);
35117 +
35118 +    if (!FmIsMaster(p_FmPcd->h_Fm))
35119 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetPlcrStatistics - guest mode!"));
35120 +
35121 +    tmpReg32 =  GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr);
35122 +    if (enable)
35123 +        tmpReg32 |= FM_PCD_PLCR_GCR_STEN;
35124 +    else
35125 +        tmpReg32 &= ~FM_PCD_PLCR_GCR_STEN;
35126 +
35127 +    WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr, tmpReg32);
35128 +    return E_OK;
35129 +}
35130 +
35131 +t_Handle FM_PCD_PlcrProfileSet(t_Handle     h_FmPcd,
35132 +                               t_FmPcdPlcrProfileParams *p_ProfileParams)
35133 +{
35134 +    t_FmPcd                             *p_FmPcd;
35135 +    t_FmPcdPlcrRegs                     *p_FmPcdPlcrRegs;
35136 +    t_FmPcdPlcrProfileRegs              plcrProfileReg;
35137 +    uint32_t                            intFlags;
35138 +    uint16_t                            absoluteProfileId;
35139 +    t_Error                             err = E_OK;
35140 +    uint32_t                            tmpReg32;
35141 +    t_FmPcdPlcrProfile                  *p_Profile;
35142 +
35143 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
35144 +
35145 +    if (p_ProfileParams->modify)
35146 +    {
35147 +        p_Profile = (t_FmPcdPlcrProfile *)p_ProfileParams->id.h_Profile;
35148 +        p_FmPcd = p_Profile->h_FmPcd;
35149 +        absoluteProfileId = p_Profile->absoluteProfileId;
35150 +        if (absoluteProfileId >= FM_PCD_PLCR_NUM_ENTRIES)
35151 +        {
35152 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("profileId too Big "));
35153 +            return NULL;
35154 +        }
35155 +
35156 +        SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE, NULL);
35157 +
35158 +        /* Try lock profile using flag */
35159 +         if (!PlcrProfileFlagTryLock(p_Profile))
35160 +         {
35161 +             DBG(TRACE, ("Profile Try Lock - BUSY"));
35162 +             /* Signal to caller BUSY condition */
35163 +             p_ProfileParams->id.h_Profile = NULL;
35164 +             return NULL;
35165 +         }
35166 +   }
35167 +    else
35168 +    {
35169 +        p_FmPcd = (t_FmPcd*)h_FmPcd;
35170 +
35171 +        SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE, NULL);
35172 +
35173 +        /* SMP: needs to be protected only if another core now changes the windows */
35174 +        err = FmPcdPlcrGetAbsoluteIdByProfileParams(h_FmPcd,
35175 +                                                    p_ProfileParams->id.newParams.profileType,
35176 +                                                    p_ProfileParams->id.newParams.h_FmPort,
35177 +                                                    p_ProfileParams->id.newParams.relativeProfileId,
35178 +                                                    &absoluteProfileId);
35179 +        if (err)
35180 +        {
35181 +             REPORT_ERROR(MAJOR, err, NO_MSG);
35182 +             return NULL;
35183 +        }
35184 +
35185 +         if (absoluteProfileId >= FM_PCD_PLCR_NUM_ENTRIES)
35186 +         {
35187 +             REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("profileId too Big "));
35188 +             return NULL;
35189 +         }
35190 +
35191 +         if (FmPcdPlcrIsProfileValid(p_FmPcd, absoluteProfileId))
35192 +         {
35193 +             REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Policer Profile is already used"));
35194 +             return NULL;
35195 +         }
35196 +
35197 +         /* initialize profile struct */
35198 +         p_Profile = &p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId];
35199 +
35200 +         p_Profile->h_FmPcd = p_FmPcd;
35201 +         p_Profile->absoluteProfileId = absoluteProfileId;
35202 +
35203 +         p_Profile->p_Lock = FmPcdAcquireLock(p_FmPcd);
35204 +         if (!p_Profile->p_Lock)
35205 +             REPORT_ERROR(MAJOR, E_NOT_AVAILABLE, ("FM Policer Profile lock obj!"));
35206 +    }
35207 +
35208 +    SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, NULL);
35209 +
35210 +    p_Profile->nextEngineOnGreen = p_ProfileParams->nextEngineOnGreen;
35211 +    memcpy(&p_Profile->paramsOnGreen, &(p_ProfileParams->paramsOnGreen), sizeof(u_FmPcdPlcrNextEngineParams));
35212 +
35213 +    p_Profile->nextEngineOnYellow = p_ProfileParams->nextEngineOnYellow;
35214 +    memcpy(&p_Profile->paramsOnYellow, &(p_ProfileParams->paramsOnYellow), sizeof(u_FmPcdPlcrNextEngineParams));
35215 +
35216 +    p_Profile->nextEngineOnRed = p_ProfileParams->nextEngineOnRed;
35217 +    memcpy(&p_Profile->paramsOnRed, &(p_ProfileParams->paramsOnRed), sizeof(u_FmPcdPlcrNextEngineParams));
35218 +
35219 +    memset(&plcrProfileReg, 0, sizeof(t_FmPcdPlcrProfileRegs));
35220 +
35221 +    /* build the policer profile registers */
35222 +    err =  BuildProfileRegs(h_FmPcd, p_ProfileParams, &plcrProfileReg);
35223 +    if (err)
35224 +    {
35225 +        REPORT_ERROR(MAJOR, err, NO_MSG);
35226 +        if (p_ProfileParams->modify)
35227 +            /* unlock */
35228 +            PlcrProfileFlagUnlock(p_Profile);
35229 +        if (!p_ProfileParams->modify &&
35230 +                p_Profile->p_Lock)
35231 +            /* release allocated Profile lock */
35232 +            FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
35233 +        return NULL;
35234 +    }
35235 +
35236 +    if (p_FmPcd->h_Hc)
35237 +    {
35238 +         err = FmHcPcdPlcrSetProfile(p_FmPcd->h_Hc, (t_Handle)p_Profile, &plcrProfileReg);
35239 +         if (p_ProfileParams->modify)
35240 +             PlcrProfileFlagUnlock(p_Profile);
35241 +         if (err)
35242 +         {
35243 +             /* release the allocated scheme lock */
35244 +             if (!p_ProfileParams->modify &&
35245 +                     p_Profile->p_Lock)
35246 +                 FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
35247 +
35248 +             return NULL;
35249 +         }
35250 +         if (!p_ProfileParams->modify)
35251 +             FmPcdPlcrValidateProfileSw(p_FmPcd,absoluteProfileId);
35252 +         return (t_Handle)p_Profile;
35253 +    }
35254 +
35255 +    p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
35256 +    SANITY_CHECK_RETURN_VALUE(p_FmPcdPlcrRegs, E_INVALID_HANDLE, NULL);
35257 +
35258 +    intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
35259 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pemode , plcrProfileReg.fmpl_pemode);
35260 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegnia , plcrProfileReg.fmpl_pegnia);
35261 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peynia , plcrProfileReg.fmpl_peynia);
35262 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pernia , plcrProfileReg.fmpl_pernia);
35263 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pecir  , plcrProfileReg.fmpl_pecir);
35264 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pecbs  , plcrProfileReg.fmpl_pecbs);
35265 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pepepir_eir,plcrProfileReg.fmpl_pepepir_eir);
35266 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pepbs_ebs,plcrProfileReg.fmpl_pepbs_ebs);
35267 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pelts  , plcrProfileReg.fmpl_pelts);
35268 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pects  , plcrProfileReg.fmpl_pects);
35269 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pepts_ets,plcrProfileReg.fmpl_pepts_ets);
35270 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegpc  , plcrProfileReg.fmpl_pegpc);
35271 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peypc  , plcrProfileReg.fmpl_peypc);
35272 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perpc  , plcrProfileReg.fmpl_perpc);
35273 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perypc , plcrProfileReg.fmpl_perypc);
35274 +    WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perrpc , plcrProfileReg.fmpl_perrpc);
35275 +
35276 +    tmpReg32 = FmPcdPlcrBuildWritePlcrActionRegs(absoluteProfileId);
35277 +    WritePar(p_FmPcd, tmpReg32);
35278 +
35279 +    PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
35280 +
35281 +    if (!p_ProfileParams->modify)
35282 +        FmPcdPlcrValidateProfileSw(p_FmPcd,absoluteProfileId);
35283 +    else
35284 +        PlcrProfileFlagUnlock(p_Profile);
35285 +
35286 +    return (t_Handle)p_Profile;
35287 +}
35288 +
35289 +t_Error FM_PCD_PlcrProfileDelete(t_Handle h_Profile)
35290 +{
35291 +    t_FmPcdPlcrProfile  *p_Profile = (t_FmPcdPlcrProfile*)h_Profile;
35292 +    t_FmPcd             *p_FmPcd;
35293 +    uint16_t            profileIndx;
35294 +    uint32_t            tmpReg32, intFlags;
35295 +    t_Error             err;
35296 +
35297 +    SANITY_CHECK_RETURN_ERROR(p_Profile, E_INVALID_HANDLE);
35298 +    p_FmPcd = p_Profile->h_FmPcd;
35299 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35300 +
35301 +    profileIndx = p_Profile->absoluteProfileId;
35302 +
35303 +    UpdateRequiredActionFlag(p_FmPcd, profileIndx, FALSE);
35304 +
35305 +    FmPcdPlcrInvalidateProfileSw(p_FmPcd,profileIndx);
35306 +
35307 +    if (p_FmPcd->h_Hc)
35308 +    {
35309 +        err = FmHcPcdPlcrDeleteProfile(p_FmPcd->h_Hc, h_Profile);
35310 +        if (p_Profile->p_Lock)
35311 +            /* release allocated Profile lock */
35312 +            FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
35313 +
35314 +        return err;
35315 +    }
35316 +
35317 +    intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
35318 +    WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->profileRegs.fmpl_pemode, ~FM_PCD_PLCR_PEMODE_PI);
35319 +
35320 +    tmpReg32 = FmPcdPlcrBuildWritePlcrActionRegs(profileIndx);
35321 +    WritePar(p_FmPcd, tmpReg32);
35322 +    PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
35323 +
35324 +
35325 +    if (p_Profile->p_Lock)
35326 +        /* release allocated Profile lock */
35327 +        FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
35328 +
35329 +    /* we do not memset profile as all its fields are being re-initialized at "set",
35330 +     * plus its allocation information is still valid. */
35331 +    return E_OK;
35332 +}
35333 +
35334 +/***************************************************/
35335 +/*............Policer Profile Counter..............*/
35336 +/***************************************************/
35337 +uint32_t FM_PCD_PlcrProfileGetCounter(t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter)
35338 +{
35339 +    t_FmPcdPlcrProfile  *p_Profile = (t_FmPcdPlcrProfile*)h_Profile;
35340 +    t_FmPcd             *p_FmPcd;
35341 +    uint16_t            profileIndx;
35342 +    uint32_t            intFlags, counterVal = 0;
35343 +    t_FmPcdPlcrRegs     *p_FmPcdPlcrRegs;
35344 +
35345 +    SANITY_CHECK_RETURN_ERROR(p_Profile, E_INVALID_HANDLE);
35346 +    p_FmPcd = p_Profile->h_FmPcd;
35347 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35348 +
35349 +    if (p_FmPcd->h_Hc)
35350 +        return FmHcPcdPlcrGetProfileCounter(p_FmPcd->h_Hc, h_Profile, counter);
35351 +
35352 +    p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
35353 +    SANITY_CHECK_RETURN_VALUE(p_FmPcdPlcrRegs, E_INVALID_HANDLE, 0);
35354 +
35355 +    profileIndx = p_Profile->absoluteProfileId;
35356 +
35357 +    if (profileIndx >= FM_PCD_PLCR_NUM_ENTRIES)
35358 +    {
35359 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("profileId too Big "));
35360 +        return 0;
35361 +    }
35362 +    intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
35363 +    WritePar(p_FmPcd, FmPcdPlcrBuildReadPlcrActionReg(profileIndx));
35364 +
35365 +    switch (counter)
35366 +    {
35367 +        case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
35368 +            counterVal = (GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegpc));
35369 +            break;
35370 +        case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
35371 +            counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peypc);
35372 +            break;
35373 +        case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
35374 +            counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perpc);
35375 +            break;
35376 +        case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
35377 +            counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perypc);
35378 +            break;
35379 +        case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
35380 +            counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perrpc);
35381 +            break;
35382 +        default:
35383 +            REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
35384 +            break;
35385 +    }
35386 +    PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
35387 +
35388 +    return counterVal;
35389 +}
35390 +
35391 +t_Error FM_PCD_PlcrProfileSetCounter(t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value)
35392 +{
35393 +    t_FmPcdPlcrProfile  *p_Profile = (t_FmPcdPlcrProfile*)h_Profile;
35394 +    t_FmPcd             *p_FmPcd;
35395 +    uint16_t            profileIndx;
35396 +    uint32_t            tmpReg32, intFlags;
35397 +    t_FmPcdPlcrRegs     *p_FmPcdPlcrRegs;
35398 +
35399 +    SANITY_CHECK_RETURN_ERROR(p_Profile, E_INVALID_HANDLE);
35400 +
35401 +    p_FmPcd = p_Profile->h_FmPcd;
35402 +    profileIndx = p_Profile->absoluteProfileId;
35403 +
35404 +    if (p_FmPcd->h_Hc)
35405 +        return FmHcPcdPlcrSetProfileCounter(p_FmPcd->h_Hc, h_Profile, counter, value);
35406 +
35407 +    p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
35408 +    SANITY_CHECK_RETURN_ERROR(p_FmPcdPlcrRegs, E_INVALID_HANDLE);
35409 +
35410 +    intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
35411 +    switch (counter)
35412 +    {
35413 +        case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
35414 +             WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegpc, value);
35415 +             break;
35416 +        case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
35417 +             WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peypc, value);
35418 +             break;
35419 +        case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
35420 +             WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perpc, value);
35421 +             break;
35422 +        case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
35423 +             WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perypc ,value);
35424 +             break;
35425 +        case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
35426 +             WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perrpc ,value);
35427 +             break;
35428 +        default:
35429 +            PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
35430 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
35431 +    }
35432 +
35433 +    /*  Activate the atomic write action by writing FMPL_PAR with: GO=1, RW=1, PSI=0, PNUM =
35434 +     *  Profile Number, PWSEL=0xFFFF (select all words).
35435 +     */
35436 +    tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
35437 +    tmpReg32 |= FmPcdPlcrBuildCounterProfileReg(counter);
35438 +    WritePar(p_FmPcd, tmpReg32);
35439 +    PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
35440 +
35441 +    return E_OK;
35442 +}
35443 --- /dev/null
35444 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.h
35445 @@ -0,0 +1,165 @@
35446 +/*
35447 + * Copyright 2008-2012 Freescale Semiconductor Inc.
35448 + *
35449 + * Redistribution and use in source and binary forms, with or without
35450 + * modification, are permitted provided that the following conditions are met:
35451 + *     * Redistributions of source code must retain the above copyright
35452 + *       notice, this list of conditions and the following disclaimer.
35453 + *     * Redistributions in binary form must reproduce the above copyright
35454 + *       notice, this list of conditions and the following disclaimer in the
35455 + *       documentation and/or other materials provided with the distribution.
35456 + *     * Neither the name of Freescale Semiconductor nor the
35457 + *       names of its contributors may be used to endorse or promote products
35458 + *       derived from this software without specific prior written permission.
35459 + *
35460 + *
35461 + * ALTERNATIVELY, this software may be distributed under the terms of the
35462 + * GNU General Public License ("GPL") as published by the Free Software
35463 + * Foundation, either version 2 of that License or (at your option) any
35464 + * later version.
35465 + *
35466 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
35467 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
35468 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35469 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
35470 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
35471 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35472 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
35473 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35474 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35475 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35476 + */
35477 +
35478 +
35479 +/******************************************************************************
35480 + @File          fm_plcr.h
35481 +
35482 + @Description   FM Policer private header
35483 +*//***************************************************************************/
35484 +#ifndef __FM_PLCR_H
35485 +#define __FM_PLCR_H
35486 +
35487 +#include "std_ext.h"
35488 +
35489 +
35490 +/***********************************************************************/
35491 +/*          Policer defines                                            */
35492 +/***********************************************************************/
35493 +
35494 +#define FM_PCD_PLCR_PAR_GO                    0x80000000
35495 +#define FM_PCD_PLCR_PAR_PWSEL_MASK            0x0000FFFF
35496 +#define FM_PCD_PLCR_PAR_R                     0x40000000
35497 +
35498 +/* shifts */
35499 +#define FM_PCD_PLCR_PAR_PNUM_SHIFT            16
35500 +
35501 +/* masks */
35502 +#define FM_PCD_PLCR_PEMODE_PI                 0x80000000
35503 +#define FM_PCD_PLCR_PEMODE_CBLND              0x40000000
35504 +#define FM_PCD_PLCR_PEMODE_ALG_MASK           0x30000000
35505 +#define FM_PCD_PLCR_PEMODE_ALG_RFC2698        0x10000000
35506 +#define FM_PCD_PLCR_PEMODE_ALG_RFC4115        0x20000000
35507 +#define FM_PCD_PLCR_PEMODE_DEFC_MASK          0x0C000000
35508 +#define FM_PCD_PLCR_PEMODE_DEFC_Y             0x04000000
35509 +#define FM_PCD_PLCR_PEMODE_DEFC_R             0x08000000
35510 +#define FM_PCD_PLCR_PEMODE_DEFC_OVERRIDE      0x0C000000
35511 +#define FM_PCD_PLCR_PEMODE_OVCLR_MASK         0x03000000
35512 +#define FM_PCD_PLCR_PEMODE_OVCLR_Y            0x01000000
35513 +#define FM_PCD_PLCR_PEMODE_OVCLR_R            0x02000000
35514 +#define FM_PCD_PLCR_PEMODE_OVCLR_G_NC         0x03000000
35515 +#define FM_PCD_PLCR_PEMODE_PKT                0x00800000
35516 +#define FM_PCD_PLCR_PEMODE_FPP_MASK           0x001F0000
35517 +#define FM_PCD_PLCR_PEMODE_FPP_SHIFT          16
35518 +#define FM_PCD_PLCR_PEMODE_FLS_MASK           0x0000F000
35519 +#define FM_PCD_PLCR_PEMODE_FLS_L2             0x00003000
35520 +#define FM_PCD_PLCR_PEMODE_FLS_L3             0x0000B000
35521 +#define FM_PCD_PLCR_PEMODE_FLS_L4             0x0000E000
35522 +#define FM_PCD_PLCR_PEMODE_FLS_FULL           0x0000F000
35523 +#define FM_PCD_PLCR_PEMODE_RBFLS              0x00000800
35524 +#define FM_PCD_PLCR_PEMODE_TRA                0x00000004
35525 +#define FM_PCD_PLCR_PEMODE_TRB                0x00000002
35526 +#define FM_PCD_PLCR_PEMODE_TRC                0x00000001
35527 +#define FM_PCD_PLCR_DOUBLE_ECC                0x80000000
35528 +#define FM_PCD_PLCR_INIT_ENTRY_ERROR          0x40000000
35529 +#define FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE   0x80000000
35530 +#define FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE    0x40000000
35531 +
35532 +#define FM_PCD_PLCR_NIA_VALID                 0x80000000
35533 +
35534 +#define FM_PCD_PLCR_GCR_EN                    0x80000000
35535 +#define FM_PCD_PLCR_GCR_STEN                  0x40000000
35536 +#define FM_PCD_PLCR_GCR_DAR                   0x20000000
35537 +#define FM_PCD_PLCR_GCR_DEFNIA                0x00FFFFFF
35538 +#define FM_PCD_PLCR_NIA_ABS                   0x00000100
35539 +
35540 +#define FM_PCD_PLCR_GSR_BSY                   0x80000000
35541 +#define FM_PCD_PLCR_GSR_DQS                   0x60000000
35542 +#define FM_PCD_PLCR_GSR_RPB                   0x20000000
35543 +#define FM_PCD_PLCR_GSR_FQS                   0x0C000000
35544 +#define FM_PCD_PLCR_GSR_LPALG                 0x0000C000
35545 +#define FM_PCD_PLCR_GSR_LPCA                  0x00003000
35546 +#define FM_PCD_PLCR_GSR_LPNUM                 0x000000FF
35547 +
35548 +#define FM_PCD_PLCR_EVR_PSIC                  0x80000000
35549 +#define FM_PCD_PLCR_EVR_AAC                   0x40000000
35550 +
35551 +#define FM_PCD_PLCR_PAR_PSI                   0x20000000
35552 +#define FM_PCD_PLCR_PAR_PNUM                  0x00FF0000
35553 +/* PWSEL Selctive select options */
35554 +#define FM_PCD_PLCR_PAR_PWSEL_PEMODE          0x00008000    /* 0 */
35555 +#define FM_PCD_PLCR_PAR_PWSEL_PEGNIA          0x00004000    /* 1 */
35556 +#define FM_PCD_PLCR_PAR_PWSEL_PEYNIA          0x00002000    /* 2 */
35557 +#define FM_PCD_PLCR_PAR_PWSEL_PERNIA          0x00001000    /* 3 */
35558 +#define FM_PCD_PLCR_PAR_PWSEL_PECIR           0x00000800    /* 4 */
35559 +#define FM_PCD_PLCR_PAR_PWSEL_PECBS           0x00000400    /* 5 */
35560 +#define FM_PCD_PLCR_PAR_PWSEL_PEPIR_EIR       0x00000200    /* 6 */
35561 +#define FM_PCD_PLCR_PAR_PWSEL_PEPBS_EBS       0x00000100    /* 7 */
35562 +#define FM_PCD_PLCR_PAR_PWSEL_PELTS           0x00000080    /* 8 */
35563 +#define FM_PCD_PLCR_PAR_PWSEL_PECTS           0x00000040    /* 9 */
35564 +#define FM_PCD_PLCR_PAR_PWSEL_PEPTS_ETS       0x00000020    /* 10 */
35565 +#define FM_PCD_PLCR_PAR_PWSEL_PEGPC           0x00000010    /* 11 */
35566 +#define FM_PCD_PLCR_PAR_PWSEL_PEYPC           0x00000008    /* 12 */
35567 +#define FM_PCD_PLCR_PAR_PWSEL_PERPC           0x00000004    /* 13 */
35568 +#define FM_PCD_PLCR_PAR_PWSEL_PERYPC          0x00000002    /* 14 */
35569 +#define FM_PCD_PLCR_PAR_PWSEL_PERRPC          0x00000001    /* 15 */
35570 +
35571 +#define FM_PCD_PLCR_PAR_PMR_BRN_1TO1          0x0000   /* - Full bit replacement. {PBNUM[0:N-1]
35572 +                                                           1-> 2^N specific locations. */
35573 +#define FM_PCD_PLCR_PAR_PMR_BRN_2TO2          0x1      /* - {PBNUM[0:N-2],PNUM[N-1]}.
35574 +                                                           2-> 2^(N-1) base locations. */
35575 +#define FM_PCD_PLCR_PAR_PMR_BRN_4TO4          0x2      /* - {PBNUM[0:N-3],PNUM[N-2:N-1]}.
35576 +                                                           4-> 2^(N-2) base locations. */
35577 +#define FM_PCD_PLCR_PAR_PMR_BRN_8TO8          0x3      /* - {PBNUM[0:N-4],PNUM[N-3:N-1]}.
35578 +                                                           8->2^(N-3) base locations. */
35579 +#define FM_PCD_PLCR_PAR_PMR_BRN_16TO16        0x4      /* - {PBNUM[0:N-5],PNUM[N-4:N-1]}.
35580 +                                                           16-> 2^(N-4) base locations. */
35581 +#define FM_PCD_PLCR_PAR_PMR_BRN_32TO32        0x5      /* {PBNUM[0:N-6],PNUM[N-5:N-1]}.
35582 +                                                           32-> 2^(N-5) base locations. */
35583 +#define FM_PCD_PLCR_PAR_PMR_BRN_64TO64        0x6      /* {PBNUM[0:N-7],PNUM[N-6:N-1]}.
35584 +                                                           64-> 2^(N-6) base locations. */
35585 +#define FM_PCD_PLCR_PAR_PMR_BRN_128TO128      0x7      /* {PBNUM[0:N-8],PNUM[N-7:N-1]}.
35586 +                                                            128-> 2^(N-7) base locations. */
35587 +#define FM_PCD_PLCR_PAR_PMR_BRN_256TO256      0x8      /* - No bit replacement for N=8. {PNUM[N-8:N-1]}.
35588 +                                                            When N=8 this option maps all 256 profiles by the DISPATCH bus into one group. */
35589 +
35590 +#define FM_PCD_PLCR_PMR_V                     0x80000000
35591 +#define PLCR_ERR_ECC_CAP                      0x80000000
35592 +#define PLCR_ERR_ECC_TYPE_DOUBLE              0x40000000
35593 +#define PLCR_ERR_ECC_PNUM_MASK                0x00000FF0
35594 +#define PLCR_ERR_ECC_OFFSET_MASK              0x0000000F
35595 +
35596 +#define PLCR_ERR_UNINIT_CAP                   0x80000000
35597 +#define PLCR_ERR_UNINIT_NUM_MASK              0x000000FF
35598 +#define PLCR_ERR_UNINIT_PID_MASK              0x003f0000
35599 +#define PLCR_ERR_UNINIT_ABSOLUTE_MASK         0x00008000
35600 +
35601 +/* shifts */
35602 +#define PLCR_ERR_ECC_PNUM_SHIFT               4
35603 +#define PLCR_ERR_UNINIT_PID_SHIFT             16
35604 +
35605 +#define FM_PCD_PLCR_PMR_BRN_SHIFT             16
35606 +
35607 +#define PLCR_PORT_WINDOW_SIZE(hardwarePortId)
35608 +
35609 +
35610 +#endif /* __FM_PLCR_H */
35611 --- /dev/null
35612 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.c
35613 @@ -0,0 +1,423 @@
35614 +/*
35615 + * Copyright 2008-2012 Freescale Semiconductor Inc.
35616 + *
35617 + * Redistribution and use in source and binary forms, with or without
35618 + * modification, are permitted provided that the following conditions are met:
35619 + *     * Redistributions of source code must retain the above copyright
35620 + *       notice, this list of conditions and the following disclaimer.
35621 + *     * Redistributions in binary form must reproduce the above copyright
35622 + *       notice, this list of conditions and the following disclaimer in the
35623 + *       documentation and/or other materials provided with the distribution.
35624 + *     * Neither the name of Freescale Semiconductor nor the
35625 + *       names of its contributors may be used to endorse or promote products
35626 + *       derived from this software without specific prior written permission.
35627 + *
35628 + *
35629 + * ALTERNATIVELY, this software may be distributed under the terms of the
35630 + * GNU General Public License ("GPL") as published by the Free Software
35631 + * Foundation, either version 2 of that License or (at your option) any
35632 + * later version.
35633 + *
35634 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
35635 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
35636 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35637 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
35638 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
35639 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35640 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
35641 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35642 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35643 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35644 + */
35645 +
35646 +
35647 +/******************************************************************************
35648 + @File          fm_pcd.c
35649 +
35650 + @Description   FM PCD ...
35651 +*//***************************************************************************/
35652 +#include <linux/math64.h>
35653 +#include "std_ext.h"
35654 +#include "error_ext.h"
35655 +#include "string_ext.h"
35656 +#include "debug_ext.h"
35657 +#include "net_ext.h"
35658 +
35659 +#include "fm_common.h"
35660 +#include "fm_pcd.h"
35661 +#include "fm_pcd_ipc.h"
35662 +#include "fm_prs.h"
35663 +#include "fsl_fman_prs.h"
35664 +
35665 +
35666 +static void PcdPrsErrorException(t_Handle h_FmPcd)
35667 +{
35668 +    t_FmPcd                 *p_FmPcd = (t_FmPcd *)h_FmPcd;
35669 +    uint32_t                event, ev_mask;
35670 +    struct fman_prs_regs     *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35671 +
35672 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
35673 +    ev_mask = fman_prs_get_err_ev_mask(PrsRegs);
35674 +
35675 +    event = fman_prs_get_err_event(PrsRegs, ev_mask);
35676 +
35677 +    fman_prs_ack_err_event(PrsRegs, event);
35678 +
35679 +    DBG(TRACE, ("parser error - 0x%08x\n",event));
35680 +
35681 +    if(event & FM_PCD_PRS_DOUBLE_ECC)
35682 +        p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC);
35683 +}
35684 +
35685 +static void PcdPrsException(t_Handle h_FmPcd)
35686 +{
35687 +    t_FmPcd             *p_FmPcd = (t_FmPcd *)h_FmPcd;
35688 +    uint32_t            event, ev_mask;
35689 +    struct fman_prs_regs     *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35690 +
35691 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
35692 +    ev_mask = fman_prs_get_expt_ev_mask(PrsRegs);
35693 +    event = fman_prs_get_expt_event(PrsRegs, ev_mask);
35694 +
35695 +    ASSERT_COND(event & FM_PCD_PRS_SINGLE_ECC);
35696 +
35697 +    DBG(TRACE, ("parser event - 0x%08x\n",event));
35698 +
35699 +    fman_prs_ack_expt_event(PrsRegs, event);
35700 +
35701 +    p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC);
35702 +}
35703 +
35704 +t_Handle PrsConfig(t_FmPcd *p_FmPcd,t_FmPcdParams *p_FmPcdParams)
35705 +{
35706 +    t_FmPcdPrs  *p_FmPcdPrs;
35707 +    uintptr_t   baseAddr;
35708 +
35709 +    UNUSED(p_FmPcd);
35710 +    UNUSED(p_FmPcdParams);
35711 +
35712 +    p_FmPcdPrs = (t_FmPcdPrs *) XX_Malloc(sizeof(t_FmPcdPrs));
35713 +    if (!p_FmPcdPrs)
35714 +    {
35715 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Parser structure allocation FAILED"));
35716 +        return NULL;
35717 +    }
35718 +    memset(p_FmPcdPrs, 0, sizeof(t_FmPcdPrs));
35719 +    fman_prs_defconfig(&p_FmPcd->p_FmPcdDriverParam->dfltCfg);
35720 +
35721 +    if (p_FmPcd->guestId == NCSW_MASTER_ID)
35722 +    {
35723 +        baseAddr = FmGetPcdPrsBaseAddr(p_FmPcdParams->h_Fm);
35724 +        p_FmPcdPrs->p_SwPrsCode  = (uint32_t *)UINT_TO_PTR(baseAddr);
35725 +        p_FmPcdPrs->p_FmPcdPrsRegs  = (struct fman_prs_regs *)UINT_TO_PTR(baseAddr + PRS_REGS_OFFSET);
35726 +    }
35727 +
35728 +    p_FmPcdPrs->fmPcdPrsPortIdStatistics = p_FmPcd->p_FmPcdDriverParam->dfltCfg.port_id_stat;
35729 +    p_FmPcd->p_FmPcdDriverParam->prsMaxParseCycleLimit = p_FmPcd->p_FmPcdDriverParam->dfltCfg.max_prs_cyc_lim;
35730 +    p_FmPcd->exceptions |= p_FmPcd->p_FmPcdDriverParam->dfltCfg.prs_exceptions;
35731 +
35732 +    return p_FmPcdPrs;
35733 +}
35734 +
35735 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
35736 +    static uint8_t             swPrsPatch[] = SW_PRS_UDP_LITE_PATCH;
35737 +#else
35738 +    static uint8_t             swPrsPatch[] = SW_PRS_OFFLOAD_PATCH;
35739 +#endif /* FM_CAPWAP_SUPPORT */
35740 +
35741 +t_Error PrsInit(t_FmPcd *p_FmPcd)
35742 +{
35743 +    t_FmPcdDriverParam  *p_Param = p_FmPcd->p_FmPcdDriverParam;
35744 +    uint32_t            *p_TmpCode;
35745 +    uint32_t            *p_LoadTarget = (uint32_t *)PTR_MOVE(p_FmPcd->p_FmPcdPrs->p_SwPrsCode,
35746 +                                                             FM_PCD_SW_PRS_SIZE-FM_PCD_PRS_SW_PATCHES_SIZE);
35747 +    struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35748 +    uint32_t            i;
35749 +
35750 +    ASSERT_COND(sizeof(swPrsPatch) <= (FM_PCD_PRS_SW_PATCHES_SIZE-FM_PCD_PRS_SW_TAIL_SIZE));
35751 +
35752 +    /* nothing to do in guest-partition */
35753 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
35754 +        return E_OK;
35755 +
35756 +    p_TmpCode = (uint32_t *)XX_MallocSmart(ROUND_UP(sizeof(swPrsPatch),4), 0, sizeof(uint32_t));
35757 +    if (!p_TmpCode)
35758 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Tmp Sw-Parser code allocation FAILED"));
35759 +    memset((uint8_t *)p_TmpCode, 0, ROUND_UP(sizeof(swPrsPatch),4));
35760 +    memcpy((uint8_t *)p_TmpCode, (uint8_t *)swPrsPatch, sizeof(swPrsPatch));
35761 +
35762 +    fman_prs_init(PrsRegs, &p_Param->dfltCfg);
35763 +
35764 +    /* register even if no interrupts enabled, to allow future enablement */
35765 +    FmRegisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_ERR, PcdPrsErrorException, p_FmPcd);
35766 +
35767 +    /* register even if no interrupts enabled, to allow future enablement */
35768 +    FmRegisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_NORMAL, PcdPrsException, p_FmPcd);
35769 +
35770 +    if(p_FmPcd->exceptions & FM_PCD_EX_PRS_SINGLE_ECC)
35771 +        FmEnableRamsEcc(p_FmPcd->h_Fm);
35772 +
35773 +    if(p_FmPcd->exceptions & FM_PCD_EX_PRS_DOUBLE_ECC)
35774 +        FmEnableRamsEcc(p_FmPcd->h_Fm);
35775 +
35776 +    /* load sw parser Ip-Frag patch */
35777 +    for (i=0; i<DIV_CEIL(sizeof(swPrsPatch), 4); i++)
35778 +        WRITE_UINT32(p_LoadTarget[i], GET_UINT32(p_TmpCode[i]));
35779 +
35780 +    XX_FreeSmart(p_TmpCode);
35781 +
35782 +    return E_OK;
35783 +}
35784 +
35785 +void PrsFree(t_FmPcd *p_FmPcd)
35786 +{
35787 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
35788 +    FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_ERR);
35789 +    /* register even if no interrupts enabled, to allow future enablement */
35790 +    FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_NORMAL);
35791 +}
35792 +
35793 +void PrsEnable(t_FmPcd *p_FmPcd)
35794 +{
35795 +    struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35796 +
35797 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
35798 +    fman_prs_enable(PrsRegs);
35799 +}
35800 +
35801 +void PrsDisable(t_FmPcd *p_FmPcd)
35802 +{
35803 +    struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35804 +
35805 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
35806 +    fman_prs_disable(PrsRegs);
35807 +}
35808 +
35809 +int PrsIsEnabled(t_FmPcd *p_FmPcd)
35810 +{
35811 +    struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35812 +
35813 +    ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
35814 +    return fman_prs_is_enabled(PrsRegs);
35815 +}
35816 +
35817 +t_Error PrsIncludePortInStatistics(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, bool include)
35818 +{
35819 +    struct fman_prs_regs *PrsRegs;
35820 +    uint32_t    bitMask = 0;
35821 +    uint8_t     prsPortId;
35822 +
35823 +    SANITY_CHECK_RETURN_ERROR((hardwarePortId >=1 && hardwarePortId <= 16), E_INVALID_VALUE);
35824 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35825 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
35826 +
35827 +    PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35828 +
35829 +    GET_FM_PCD_PRS_PORT_ID(prsPortId, hardwarePortId);
35830 +    GET_FM_PCD_INDEX_FLAG(bitMask, prsPortId);
35831 +
35832 +    if (include)
35833 +        p_FmPcd->p_FmPcdPrs->fmPcdPrsPortIdStatistics |= bitMask;
35834 +    else
35835 +        p_FmPcd->p_FmPcdPrs->fmPcdPrsPortIdStatistics &= ~bitMask;
35836 +
35837 +    fman_prs_set_stst_port_msk(PrsRegs,
35838 +            p_FmPcd->p_FmPcdPrs->fmPcdPrsPortIdStatistics);
35839 +
35840 +    return E_OK;
35841 +}
35842 +
35843 +t_Error FmPcdPrsIncludePortInStatistics(t_Handle h_FmPcd, uint8_t hardwarePortId, bool include)
35844 +{
35845 +    t_FmPcd                     *p_FmPcd = (t_FmPcd *)h_FmPcd;
35846 +    t_Error                     err;
35847 +
35848 +    SANITY_CHECK_RETURN_ERROR((hardwarePortId >=1 && hardwarePortId <= 16), E_INVALID_VALUE);
35849 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35850 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
35851 +
35852 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
35853 +        p_FmPcd->h_IpcSession)
35854 +    {
35855 +        t_FmPcdIpcPrsIncludePort    prsIncludePortParams;
35856 +        t_FmPcdIpcMsg               msg;
35857 +
35858 +        prsIncludePortParams.hardwarePortId = hardwarePortId;
35859 +        prsIncludePortParams.include = include;
35860 +        memset(&msg, 0, sizeof(msg));
35861 +        msg.msgId = FM_PCD_PRS_INC_PORT_STATS;
35862 +        memcpy(msg.msgBody, &prsIncludePortParams, sizeof(prsIncludePortParams));
35863 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
35864 +                                (uint8_t*)&msg,
35865 +                                sizeof(msg.msgId) +sizeof(prsIncludePortParams),
35866 +                                NULL,
35867 +                                NULL,
35868 +                                NULL,
35869 +                                NULL);
35870 +        if (err != E_OK)
35871 +            RETURN_ERROR(MAJOR, err, NO_MSG);
35872 +        return E_OK;
35873 +    }
35874 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
35875 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
35876 +                     ("running in guest-mode without IPC!"));
35877 +
35878 +    return PrsIncludePortInStatistics(p_FmPcd, hardwarePortId, include);
35879 +}
35880 +
35881 +uint32_t FmPcdGetSwPrsOffset(t_Handle h_FmPcd, e_NetHeaderType hdr, uint8_t indexPerHdr)
35882 +{
35883 +    t_FmPcd                 *p_FmPcd = (t_FmPcd *)h_FmPcd;
35884 +    t_FmPcdPrsLabelParams   *p_Label;
35885 +    int                     i;
35886 +
35887 +    SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, 0);
35888 +    SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE, 0);
35889 +
35890 +    if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
35891 +        p_FmPcd->h_IpcSession)
35892 +    {
35893 +        t_Error                 err = E_OK;
35894 +        t_FmPcdIpcSwPrsLable    labelParams;
35895 +        t_FmPcdIpcMsg           msg;
35896 +        uint32_t                prsOffset = 0;
35897 +        t_FmPcdIpcReply         reply;
35898 +        uint32_t                replyLength;
35899 +
35900 +        memset(&reply, 0, sizeof(reply));
35901 +        memset(&msg, 0, sizeof(msg));
35902 +        labelParams.enumHdr = (uint32_t)hdr;
35903 +        labelParams.indexPerHdr = indexPerHdr;
35904 +        msg.msgId = FM_PCD_GET_SW_PRS_OFFSET;
35905 +        memcpy(msg.msgBody, &labelParams, sizeof(labelParams));
35906 +        replyLength = sizeof(uint32_t) + sizeof(uint32_t);
35907 +        err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
35908 +                                (uint8_t*)&msg,
35909 +                                sizeof(msg.msgId) +sizeof(labelParams),
35910 +                                (uint8_t*)&reply,
35911 +                                &replyLength,
35912 +                                NULL,
35913 +                                NULL);
35914 +        if (err != E_OK)
35915 +            RETURN_ERROR(MAJOR, err, NO_MSG);
35916 +        if (replyLength != sizeof(uint32_t) + sizeof(uint32_t))
35917 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
35918 +
35919 +        memcpy((uint8_t*)&prsOffset, reply.replyBody, sizeof(uint32_t));
35920 +        return prsOffset;
35921 +    }
35922 +    else if (p_FmPcd->guestId != NCSW_MASTER_ID)
35923 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
35924 +                     ("running in guest-mode without IPC!"));
35925 +
35926 +    ASSERT_COND(p_FmPcd->p_FmPcdPrs->currLabel < FM_PCD_PRS_NUM_OF_LABELS);
35927 +
35928 +    for (i=0; i<p_FmPcd->p_FmPcdPrs->currLabel; i++)
35929 +    {
35930 +        p_Label = &p_FmPcd->p_FmPcdPrs->labelsTable[i];
35931 +
35932 +        if ((hdr == p_Label->hdr) && (indexPerHdr == p_Label->indexPerHdr))
35933 +            return p_Label->instructionOffset;
35934 +    }
35935 +
35936 +    REPORT_ERROR(MAJOR, E_NOT_FOUND, ("Sw Parser attachment Not found"));
35937 +    return (uint32_t)ILLEGAL_BASE;
35938 +}
35939 +
35940 +void FM_PCD_SetPrsStatistics(t_Handle h_FmPcd, bool enable)
35941 +{
35942 +    t_FmPcd             *p_FmPcd = (t_FmPcd*)h_FmPcd;
35943 +    struct fman_prs_regs *PrsRegs;
35944 +
35945 +    SANITY_CHECK_RETURN(p_FmPcd, E_INVALID_HANDLE);
35946 +    SANITY_CHECK_RETURN(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
35947 +
35948 +    PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
35949 +
35950 +
35951 +    if(p_FmPcd->guestId != NCSW_MASTER_ID)
35952 +    {
35953 +        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetPrsStatistics - guest mode!"));
35954 +        return;
35955 +    }
35956 +
35957 +    fman_prs_set_stst(PrsRegs, enable);
35958 +}
35959 +
35960 +t_Error FM_PCD_PrsLoadSw(t_Handle h_FmPcd, t_FmPcdPrsSwParams *p_SwPrs)
35961 +{
35962 +    t_FmPcd                 *p_FmPcd = (t_FmPcd*)h_FmPcd;
35963 +    uint32_t                *p_LoadTarget;
35964 +    uint32_t                *p_TmpCode;
35965 +    int                     i;
35966 +
35967 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
35968 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
35969 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_STATE);
35970 +    SANITY_CHECK_RETURN_ERROR(p_SwPrs, E_INVALID_HANDLE);
35971 +    SANITY_CHECK_RETURN_ERROR(!p_FmPcd->enabled, E_INVALID_HANDLE);
35972 +
35973 +    if (p_FmPcd->guestId != NCSW_MASTER_ID)
35974 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM in guest-mode!"));
35975 +
35976 +    if (!p_SwPrs->override)
35977 +    {
35978 +        if(p_FmPcd->p_FmPcdPrs->p_CurrSwPrs > p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4)
35979 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("SW parser base must be larger than current loaded code"));
35980 +    }
35981 +    else
35982 +        p_FmPcd->p_FmPcdPrs->currLabel = 0;
35983 +
35984 +    if (p_SwPrs->size > FM_PCD_SW_PRS_SIZE - FM_PCD_PRS_SW_TAIL_SIZE - p_SwPrs->base*2)
35985 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_SwPrs->size may not be larger than MAX_SW_PRS_CODE_SIZE"));
35986 +
35987 +    if (p_FmPcd->p_FmPcdPrs->currLabel + p_SwPrs->numOfLabels > FM_PCD_PRS_NUM_OF_LABELS)
35988 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceeded number of labels allowed "));
35989 +
35990 +    p_TmpCode = (uint32_t *)XX_MallocSmart(ROUND_UP(p_SwPrs->size,4), 0, sizeof(uint32_t));
35991 +    if (!p_TmpCode)
35992 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Tmp Sw-Parser code allocation FAILED"));
35993 +    memset((uint8_t *)p_TmpCode, 0, ROUND_UP(p_SwPrs->size,4));
35994 +    memcpy((uint8_t *)p_TmpCode, p_SwPrs->p_Code, p_SwPrs->size);
35995 +
35996 +    /* save sw parser labels */
35997 +    memcpy(&p_FmPcd->p_FmPcdPrs->labelsTable[p_FmPcd->p_FmPcdPrs->currLabel],
35998 +           p_SwPrs->labelsTable,
35999 +           p_SwPrs->numOfLabels*sizeof(t_FmPcdPrsLabelParams));
36000 +    p_FmPcd->p_FmPcdPrs->currLabel += p_SwPrs->numOfLabels;
36001 +
36002 +    /* load sw parser code */
36003 +    p_LoadTarget = p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4;
36004 +
36005 +    for(i=0; i<DIV_CEIL(p_SwPrs->size, 4); i++)
36006 +        WRITE_UINT32(p_LoadTarget[i], GET_UINT32(p_TmpCode[i]));
36007 +
36008 +    p_FmPcd->p_FmPcdPrs->p_CurrSwPrs =
36009 +        p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4 + ROUND_UP(p_SwPrs->size,4);
36010 +
36011 +    /* copy data parameters */
36012 +    for (i=0;i<FM_PCD_PRS_NUM_OF_HDRS;i++)
36013 +        WRITE_UINT32(*(p_FmPcd->p_FmPcdPrs->p_SwPrsCode+PRS_SW_DATA/4+i), p_SwPrs->swPrsDataParams[i]);
36014 +
36015 +    /* Clear last 4 bytes */
36016 +    WRITE_UINT32(*(p_FmPcd->p_FmPcdPrs->p_SwPrsCode+(PRS_SW_DATA-FM_PCD_PRS_SW_TAIL_SIZE)/4), 0);
36017 +
36018 +    XX_FreeSmart(p_TmpCode);
36019 +
36020 +    return E_OK;
36021 +}
36022 +
36023 +t_Error FM_PCD_ConfigPrsMaxCycleLimit(t_Handle h_FmPcd,uint16_t value)
36024 +{
36025 +    t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
36026 +
36027 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
36028 +    SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
36029 +
36030 +    if(p_FmPcd->guestId != NCSW_MASTER_ID)
36031 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ConfigPrsMaxCycleLimit - guest mode!"));
36032 +
36033 +    p_FmPcd->p_FmPcdDriverParam->prsMaxParseCycleLimit = value;
36034 +
36035 +    return E_OK;
36036 +}
36037 --- /dev/null
36038 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.h
36039 @@ -0,0 +1,316 @@
36040 +/*
36041 + * Copyright 2008-2012 Freescale Semiconductor Inc.
36042 + *
36043 + * Redistribution and use in source and binary forms, with or without
36044 + * modification, are permitted provided that the following conditions are met:
36045 + *     * Redistributions of source code must retain the above copyright
36046 + *       notice, this list of conditions and the following disclaimer.
36047 + *     * Redistributions in binary form must reproduce the above copyright
36048 + *       notice, this list of conditions and the following disclaimer in the
36049 + *       documentation and/or other materials provided with the distribution.
36050 + *     * Neither the name of Freescale Semiconductor nor the
36051 + *       names of its contributors may be used to endorse or promote products
36052 + *       derived from this software without specific prior written permission.
36053 + *
36054 + *
36055 + * ALTERNATIVELY, this software may be distributed under the terms of the
36056 + * GNU General Public License ("GPL") as published by the Free Software
36057 + * Foundation, either version 2 of that License or (at your option) any
36058 + * later version.
36059 + *
36060 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
36061 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36062 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
36063 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
36064 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36065 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36066 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
36067 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36068 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
36069 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36070 + */
36071 +
36072 +
36073 +/******************************************************************************
36074 + @File          fm_prs.h
36075 +
36076 + @Description   FM Parser private header
36077 + *//***************************************************************************/
36078 +#ifndef __FM_PRS_H
36079 +#define __FM_PRS_H
36080 +
36081 +#include "std_ext.h"
36082 +
36083 +/***********************************************************************/
36084 +/*          SW parser IP_FRAG patch                                    */
36085 +/***********************************************************************/
36086 +
36087 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
36088 +#define SW_PRS_UDP_LITE_PATCH   \
36089 +{\
36090 +        0x31,0x52,0x00,0xDA,0xFC,0x00,0x00,0x00,0x00,0x00, \
36091 +        0x00,0x00,0x50,0x2C,0x40,0x00,0x31,0x92,0x50,0x2C, \
36092 +        0x00,0x88,0x18,0x2F,0x00,0x01,0x1B,0xFE,0x18,0x71, \
36093 +        0x02,0x1F,0x00,0x08,0x00,0x83,0x02,0x1F,0x00,0x20, \
36094 +        0x28,0x1B,0x00,0x05,0x29,0x1F,0x30,0xD0,0x60,0x4F, \
36095 +        0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F,0x00,0x52, \
36096 +        0x00,0x01,0x07,0x01,0x60,0x3B,0x00,0x00,0x30,0xD0, \
36097 +        0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
36098 +        0x40,0x4C,0x00,0x00,0x02,0x8F,0x00,0x00,0x30,0xF2, \
36099 +        0x00,0x06,0x18,0x5D,0x00,0x00,0x9F,0xFF,0x30,0xF2, \
36100 +        0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0,0x00,0x52, \
36101 +        0x00,0x08,0x28,0x1A,0x60,0x37,0x00,0x00,0x30,0xF2, \
36102 +        0x18,0x5D,0x06,0x00,0x29,0x1E,0x30,0xF2,0x2F,0x0E, \
36103 +        0x30,0x72,0x00,0x00,0x9B,0x8F,0x00,0x06,0x2F,0x0E, \
36104 +        0x32,0xF1,0x32,0xB0,0x00,0x4F,0x00,0x57,0x00,0x28, \
36105 +        0x00,0x00,0x97,0x9E,0x00,0x4E,0x30,0x72,0x00,0x06, \
36106 +        0x2F,0x0E,0x32,0xC1,0x32,0xF0,0x00,0x4A,0x00,0x80, \
36107 +        0x00,0x02,0x00,0x00,0x97,0x9E,0x40,0x7E,0x00,0x08, \
36108 +        0x08,0x16,0x00,0x54,0x00,0x01,0x1B,0xFE,0x00,0x00, \
36109 +        0x9F,0x9E,0x40,0xB3,0x00,0x00,0x02,0x1F,0x00,0x08, \
36110 +        0x28,0x1B,0x30,0x73,0x29,0x1F,0x30,0xD0,0x60,0x9F, \
36111 +        0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F,0x00,0x52, \
36112 +        0x00,0x01,0x07,0x01,0x60,0x8B,0x00,0x00,0x30,0xD0, \
36113 +        0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
36114 +        0x40,0x9C,0x00,0x00,0x02,0x8F,0x00,0x00,0x30,0xF2, \
36115 +        0x00,0x06,0x18,0xAD,0x00,0x00,0x9F,0xFF,0x30,0xF2, \
36116 +        0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0,0x00,0x52, \
36117 +        0x00,0x08,0x28,0x1A,0x60,0x87,0x00,0x00,0x30,0xF2, \
36118 +        0x18,0xAD,0x06,0x00,0x29,0x1E,0x30,0xF2,0x50,0xB3, \
36119 +        0xFF,0xFF,0x18,0xB8,0x08,0x16,0x00,0x54,0x00,0x01, \
36120 +        0x1B,0xFE,0x18,0xC5,0x32,0xF1,0x28,0x5D,0x32,0xF1, \
36121 +        0x00,0x55,0x00,0x08,0x28,0x5F,0x00,0x00,0x8F,0x9F, \
36122 +        0x29,0x33,0x08,0x16,0x00,0x49,0x00,0x01,0x1B,0xFF, \
36123 +        0x00,0x01,0x1B,0xFF    \
36124 +}
36125 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
36126 +
36127 +#if (DPAA_VERSION == 10)
36128 +/* Version: 106.1.9 */
36129 +#define SW_PRS_OFFLOAD_PATCH                           \
36130 +{                                                      \
36131 +    0x31,0x52,0x00,0xDA,0x0A,0x00,0x00,0x00,0x00,0x00, \
36132 +    0x00,0x00,0x43,0x0A,0x00,0x00,0x00,0x01,0x1B,0xFE, \
36133 +    0x00,0x00,0x99,0x00,0x53,0x13,0x00,0x00,0x00,0x00, \
36134 +    0x9F,0x98,0x53,0x13,0x00,0x00,0x1B,0x23,0x33,0xF1, \
36135 +    0x00,0xF9,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
36136 +    0x28,0x7F,0x00,0x03,0x00,0x02,0x00,0x00,0x00,0x01, \
36137 +    0x32,0xC1,0x32,0xF0,0x00,0x4A,0x00,0x80,0x1F,0xFF, \
36138 +    0x00,0x01,0x1B,0xFE,0x31,0x52,0x00,0xDA,0x06,0x00, \
36139 +    0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x2F,0x00,0x00, \
36140 +    0x00,0x01,0x1B,0xFE,0x31,0x52,0x00,0xDA,0x00,0x40, \
36141 +    0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x95,0x00,0x00, \
36142 +    0x00,0x00,0x9B,0x8F,0x2F,0x0F,0x32,0xC1,0x00,0x55, \
36143 +    0x00,0x28,0x28,0x43,0x30,0x7E,0x43,0x45,0x00,0x00, \
36144 +    0x30,0x7E,0x43,0x45,0x00,0x3C,0x1B,0x5D,0x32,0x11, \
36145 +    0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00,0x83,0x8F, \
36146 +    0x2F,0x0F,0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F, \
36147 +    0x00,0x55,0x00,0x01,0x00,0x81,0x32,0x11,0x00,0x00, \
36148 +    0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04,0x00,0x4D, \
36149 +    0x28,0x43,0x06,0x00,0x1B,0x3E,0x30,0x7E,0x53,0x79, \
36150 +    0x00,0x2B,0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x81, \
36151 +    0x00,0x00,0x87,0x8F,0x28,0x23,0x06,0x00,0x32,0x11, \
36152 +    0x32,0xC0,0x00,0x4F,0x00,0x55,0x00,0x01,0x00,0x81, \
36153 +    0x32,0x11,0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01, \
36154 +    0x01,0x04,0x00,0x4D,0x28,0x43,0x06,0x00,0x00,0x01, \
36155 +    0x1B,0xFE,0x00,0x00,0x9B,0x8E,0x53,0x90,0x00,0x00, \
36156 +    0x06,0x29,0x00,0x00,0x83,0x8F,0x28,0x23,0x06,0x00, \
36157 +    0x06,0x29,0x32,0xC1,0x00,0x55,0x00,0x28,0x00,0x00, \
36158 +    0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04,0x00,0x4D, \
36159 +    0x28,0x43,0x06,0x00,0x00,0x01,0x1B,0xFE,0x32,0xC1, \
36160 +    0x00,0x55,0x00,0x28,0x28,0x43,0x1B,0xCF,0x00,0x00, \
36161 +    0x9B,0x8F,0x2F,0x0F,0x32,0xC1,0x00,0x55,0x00,0x28, \
36162 +    0x28,0x43,0x30,0x7E,0x43,0xBF,0x00,0x2C,0x32,0x11, \
36163 +    0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00,0x87,0x8F, \
36164 +    0x28,0x23,0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F, \
36165 +    0x00,0x81,0x00,0x00,0x83,0x8F,0x2F,0x0F,0x06,0x00, \
36166 +    0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x55,0x00,0x01, \
36167 +    0x00,0x81,0x32,0x11,0x00,0x00,0x83,0x8E,0x00,0x50, \
36168 +    0x00,0x01,0x01,0x04,0x00,0x4D,0x28,0x43,0x06,0x00, \
36169 +    0x1B,0x9C,0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00, \
36170 +    0x00,0x00,0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02, \
36171 +    0x00,0x00,0x00,0x01,0x32,0xC1,0x32,0xF0,0x00,0x4A, \
36172 +    0x00,0x80,0x1F,0xFF,0x00,0x01,0x1B,0xFE,           \
36173 +}
36174 +
36175 +#else
36176 +#define SW_PRS_OFFLOAD_PATCH                           \
36177 +{                                                      \
36178 +    0x31,0x52,0x00,0xDA,0x0E,0x4F,0x00,0x00,0x00,0x00, \
36179 +    0x00,0x00,0x51,0x16,0x08,0x4B,0x31,0x53,0x00,0xFB, \
36180 +    0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x29,0x2B, \
36181 +    0x33,0xF1,0x00,0xFB,0x00,0xDF,0x00,0x00,0x00,0x00, \
36182 +    0x00,0x00,0x28,0x7F,0x31,0x52,0x00,0xDA,0x0A,0x00, \
36183 +    0x00,0x00,0x00,0x00,0x00,0x00,0x41,0x20,0x00,0x00, \
36184 +    0x00,0x01,0x1B,0xFE,0x00,0x00,0x99,0x00,0x51,0x29, \
36185 +    0x00,0x00,0x00,0x00,0x9F,0x98,0x51,0x29,0x00,0x00, \
36186 +    0x19,0x44,0x09,0x5F,0x00,0x20,0x00,0x00,0x09,0x4F, \
36187 +    0x00,0x20,0x00,0x00,0x34,0xB7,0x00,0xF9,0x00,0x00, \
36188 +    0x01,0x00,0x00,0x00,0x00,0x00,0x2B,0x97,0x31,0xB3, \
36189 +    0x29,0x8F,0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00, \
36190 +    0x00,0x00,0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02, \
36191 +    0x00,0x00,0x00,0x01,0x1B,0xFE,0x00,0x01,0x1B,0xFE, \
36192 +    0x31,0x52,0x00,0xDA,0xFC,0x00,0x00,0x00,0x00,0x00, \
36193 +    0x00,0x00,0x51,0x52,0x40,0x00,0x31,0x92,0x51,0x52, \
36194 +    0x00,0x88,0x19,0x55,0x08,0x05,0x00,0x00,0x19,0x99, \
36195 +    0x02,0x1F,0x00,0x08,0x00,0x83,0x02,0x1F,0x00,0x20, \
36196 +    0x28,0x1B,0x00,0x05,0x29,0x1F,0x30,0xD0,0x61,0x75, \
36197 +    0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F,0x00,0x52, \
36198 +    0x00,0x01,0x07,0x01,0x61,0x61,0x00,0x00,0x30,0xD0, \
36199 +    0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
36200 +    0x41,0x72,0x00,0x00,0x02,0x8F,0x00,0x00,0x30,0xF2, \
36201 +    0x00,0x06,0x19,0x83,0x00,0x00,0x9F,0xFF,0x30,0xF2, \
36202 +    0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0,0x00,0x52, \
36203 +    0x00,0x08,0x28,0x1A,0x61,0x5D,0x00,0x00,0x30,0xF2, \
36204 +    0x19,0x83,0x06,0x00,0x29,0x1E,0x30,0xF2,0x29,0x0E, \
36205 +    0x30,0x72,0x00,0x00,0x9B,0x8F,0x00,0x06,0x29,0x0E, \
36206 +    0x32,0xF1,0x32,0xB0,0x00,0x4F,0x00,0x57,0x00,0x28, \
36207 +    0x00,0x00,0x97,0x9E,0x00,0x4E,0x30,0x72,0x00,0x06, \
36208 +    0x29,0x0E,0x08,0x05,0x00,0x01,0x31,0x52,0x00,0xDA, \
36209 +    0x0E,0x4F,0x00,0x00,0x00,0x00,0x00,0x00,0x51,0xAF, \
36210 +    0x04,0x4B,0x31,0x53,0x00,0xFB,0xFF,0xF0,0x00,0x00, \
36211 +    0x00,0x00,0x00,0x00,0x29,0x2B,0x33,0xF1,0x00,0xFB, \
36212 +    0x00,0xDF,0x00,0x00,0x00,0x00,0x00,0x00,0x28,0x7F, \
36213 +    0x31,0x52,0x00,0xDA,0x06,0x00,0x00,0x00,0x00,0x00, \
36214 +    0x00,0x00,0x41,0xB9,0x00,0x00,0x00,0x01,0x1B,0xFE, \
36215 +    0x31,0x52,0x00,0xDA,0x00,0x40,0x00,0x00,0x00,0x00, \
36216 +    0x00,0x00,0x42,0x06,0x00,0x00,0x00,0x00,0x9B,0x8F, \
36217 +    0x28,0x01,0x32,0xC1,0x00,0x55,0x00,0x28,0x28,0x43, \
36218 +    0x30,0x00,0x41,0xEB,0x00,0x2C,0x32,0x11,0x32,0xC0, \
36219 +    0x00,0x4F,0x00,0x81,0x00,0x00,0x87,0x8F,0x28,0x23, \
36220 +    0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x81, \
36221 +    0x00,0x00,0x83,0x8F,0x28,0x01,0x06,0x00,0x32,0x11, \
36222 +    0x32,0xC0,0x00,0x4F,0x00,0x55,0x00,0x01,0x00,0x81, \
36223 +    0x32,0x11,0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01, \
36224 +    0x01,0x04,0x00,0x4D,0x28,0x43,0x06,0x00,0x19,0xC8, \
36225 +    0x09,0x5F,0x00,0x20,0x00,0x00,0x09,0x4F,0x00,0x20, \
36226 +    0x00,0x00,0x34,0xB7,0x00,0xF9,0x00,0x00,0x01,0x00, \
36227 +    0x00,0x00,0x00,0x00,0x2B,0x97,0x31,0xB3,0x29,0x8F, \
36228 +    0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00,0x00,0x00, \
36229 +    0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02,0x00,0x00, \
36230 +    0x00,0x01,0x1B,0xFE,0x30,0x50,0x52,0x0B,0x00,0x00, \
36231 +    0x00,0x01,0x1B,0xFE,0x32,0xF1,0x32,0xC0,0x00,0x4F, \
36232 +    0x00,0x81,0x00,0x02,0x00,0x00,0x97,0x9E,0x42,0x18, \
36233 +    0x00,0x08,0x08,0x16,0x00,0x54,0x00,0x01,0x1B,0xFE, \
36234 +    0x00,0x00,0x9F,0x9E,0x42,0x4D,0x00,0x00,0x02,0x1F, \
36235 +    0x00,0x08,0x28,0x1B,0x30,0x73,0x29,0x1F,0x30,0xD0, \
36236 +    0x62,0x39,0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F, \
36237 +    0x00,0x52,0x00,0x01,0x07,0x01,0x62,0x25,0x00,0x00, \
36238 +    0x30,0xD0,0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00, \
36239 +    0x00,0x00,0x42,0x36,0x00,0x00,0x02,0x8F,0x00,0x00, \
36240 +    0x30,0xF2,0x00,0x06,0x1A,0x47,0x00,0x00,0x9F,0xFF, \
36241 +    0x30,0xF2,0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0, \
36242 +    0x00,0x52,0x00,0x08,0x28,0x1A,0x62,0x21,0x00,0x00, \
36243 +    0x30,0xF2,0x1A,0x47,0x06,0x00,0x29,0x1E,0x30,0xF2, \
36244 +    0x52,0x4D,0xFF,0xFF,0x1A,0x52,0x08,0x16,0x00,0x54, \
36245 +    0x00,0x01,0x1B,0xFE,0x1A,0x5F,0x32,0xF1,0x28,0x5D, \
36246 +    0x32,0xF1,0x00,0x55,0x00,0x08,0x28,0x5F,0x00,0x00, \
36247 +    0x8F,0x9F,0x29,0x33,0x08,0x16,0x00,0x49,0x00,0x01, \
36248 +    0x1B,0xFF,0x00,0x01,0x1B,0xFF,0x31,0x52,0x00,0xDA, \
36249 +    0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x6D, \
36250 +    0x40,0x00,0x31,0x92,0x52,0x6D,0x00,0x88,0x1A,0x70, \
36251 +    0x08,0x05,0x00,0x00,0x1A,0xB4,0x02,0x1F,0x00,0x08, \
36252 +    0x00,0x83,0x02,0x1F,0x00,0x20,0x28,0x1B,0x00,0x05, \
36253 +    0x29,0x1F,0x30,0xD0,0x62,0x90,0x00,0x07,0x00,0x05, \
36254 +    0x00,0x00,0xC3,0x8F,0x00,0x52,0x00,0x01,0x07,0x01, \
36255 +    0x62,0x7C,0x00,0x00,0x30,0xD0,0x00,0xDA,0x00,0x01, \
36256 +    0x00,0x00,0x00,0x00,0x00,0x00,0x42,0x8D,0x00,0x00, \
36257 +    0x02,0x8F,0x00,0x00,0x30,0xF2,0x00,0x06,0x1A,0x9E, \
36258 +    0x00,0x00,0x9F,0xFF,0x30,0xF2,0x00,0x06,0x29,0x1E, \
36259 +    0x07,0x08,0x30,0xD0,0x00,0x52,0x00,0x08,0x28,0x1A, \
36260 +    0x62,0x78,0x00,0x00,0x30,0xF2,0x1A,0x9E,0x06,0x00, \
36261 +    0x29,0x1E,0x30,0xF2,0x29,0x0E,0x30,0x72,0x00,0x00, \
36262 +    0x9B,0x8F,0x00,0x06,0x29,0x0E,0x32,0xF1,0x32,0xB0, \
36263 +    0x00,0x4F,0x00,0x57,0x00,0x28,0x00,0x00,0x97,0x9E, \
36264 +    0x00,0x4E,0x30,0x72,0x00,0x06,0x29,0x0E,0x08,0x05, \
36265 +    0x00,0x01,0x31,0x52,0x00,0xDA,0x0E,0x4F,0x00,0x00, \
36266 +    0x00,0x00,0x00,0x00,0x52,0xCA,0x04,0x4B,0x31,0x53, \
36267 +    0x00,0xFB,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00, \
36268 +    0x29,0x2B,0x33,0xF1,0x00,0xFB,0x00,0xDF,0x00,0x00, \
36269 +    0x00,0x00,0x00,0x00,0x28,0x7F,0x31,0x52,0x00,0xDA, \
36270 +    0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x42,0xD4, \
36271 +    0x00,0x00,0x00,0x01,0x1B,0xFE,0x31,0x52,0x00,0xDA, \
36272 +    0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x37, \
36273 +    0x00,0x00,0x00,0x00,0x9B,0x8F,0x28,0x01,0x32,0xC1, \
36274 +    0x00,0x55,0x00,0x28,0x28,0x43,0x30,0x00,0x42,0xEA, \
36275 +    0x00,0x00,0x30,0x00,0x42,0xEA,0x00,0x3C,0x1B,0x02, \
36276 +    0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00, \
36277 +    0x83,0x8F,0x28,0x01,0x06,0x00,0x32,0x11,0x32,0xC0, \
36278 +    0x00,0x4F,0x00,0x55,0x00,0x01,0x00,0x81,0x32,0x11, \
36279 +    0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04, \
36280 +    0x00,0x4D,0x28,0x43,0x06,0x00,0x1A,0xE3,0x30,0x00, \
36281 +    0x43,0x20,0x00,0x2B,0x00,0x00,0x9B,0x8E,0x43,0x0E, \
36282 +    0x00,0x00,0x32,0xC1,0x00,0x55,0x00,0x28,0x28,0x43, \
36283 +    0x1B,0x1F,0x06,0x29,0x00,0x00,0x83,0x8F,0x28,0x23, \
36284 +    0x06,0x00,0x06,0x29,0x32,0xC1,0x00,0x55,0x00,0x28, \
36285 +    0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04, \
36286 +    0x00,0x4D,0x28,0x43,0x06,0x00,0x1B,0x37,0x32,0x11, \
36287 +    0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00,0x87,0x8F, \
36288 +    0x28,0x23,0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F, \
36289 +    0x00,0x55,0x00,0x01,0x00,0x81,0x32,0x11,0x00,0x00, \
36290 +    0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04,0x00,0x4D, \
36291 +    0x28,0x43,0x06,0x00,0x30,0x50,0x53,0x3C,0x00,0x00, \
36292 +    0x00,0x01,0x1B,0xFE,0x32,0xF1,0x32,0xC0,0x00,0x4F, \
36293 +    0x00,0x81,0x00,0x02,0x00,0x00,0x97,0x9E,0x43,0x49, \
36294 +    0x00,0x08,0x08,0x16,0x00,0x54,0x00,0x01,0x1B,0xFE, \
36295 +    0x00,0x00,0x9F,0x9E,0x43,0x7E,0x00,0x00,0x02,0x1F, \
36296 +    0x00,0x08,0x28,0x1B,0x30,0x73,0x29,0x1F,0x30,0xD0, \
36297 +    0x63,0x6A,0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F, \
36298 +    0x00,0x52,0x00,0x01,0x07,0x01,0x63,0x56,0x00,0x00, \
36299 +    0x30,0xD0,0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00, \
36300 +    0x00,0x00,0x43,0x67,0x00,0x00,0x02,0x8F,0x00,0x00, \
36301 +    0x30,0xF2,0x00,0x06,0x1B,0x78,0x00,0x00,0x9F,0xFF, \
36302 +    0x30,0xF2,0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0, \
36303 +    0x00,0x52,0x00,0x08,0x28,0x1A,0x63,0x52,0x00,0x00, \
36304 +    0x30,0xF2,0x1B,0x78,0x06,0x00,0x29,0x1E,0x30,0xF2, \
36305 +    0x53,0x7E,0xFF,0xFF,0x1B,0x83,0x08,0x16,0x00,0x54, \
36306 +    0x00,0x01,0x1B,0xFE,0x1B,0x90,0x32,0xF1,0x28,0x5D, \
36307 +    0x32,0xF1,0x00,0x55,0x00,0x08,0x28,0x5F,0x00,0x00, \
36308 +    0x8F,0x9F,0x29,0x33,0x08,0x16,0x00,0x49,0x00,0x01, \
36309 +    0x1B,0xFF,0x00,0x01,0x1B,0xFF,0x08,0x07,0x00,0x02, \
36310 +    0x00,0x00,0x8D,0x80,0x53,0x9C,0x00,0x01,0x30,0x71, \
36311 +    0x00,0x55,0x00,0x01,0x28,0x0F,0x00,0x00,0x8D,0x00, \
36312 +    0x53,0xA4,0x00,0x01,0x30,0x71,0x00,0x55,0x00,0x01, \
36313 +    0x28,0x0F,0x00,0x00,0x83,0x8E,0x53,0xB9,0x00,0x00, \
36314 +    0x00,0x00,0x86,0x08,0x30,0x71,0x00,0x7B,0x03,0xB9, \
36315 +    0x33,0xB4,0x00,0xDA,0xFF,0xFF,0x00,0x0F,0x00,0x00, \
36316 +    0x00,0x00,0x00,0x00,0x86,0x09,0x01,0x03,0x00,0x7D, \
36317 +    0x03,0xB9,0x1B,0xC8,0x33,0xD1,0x00,0xF9,0x00,0x10, \
36318 +    0x00,0x00,0x00,0x00,0x00,0x00,0x28,0x7B,0x09,0x5F, \
36319 +    0x00,0x1A,0x00,0x00,0x09,0x4F,0x00,0x1A,0x00,0x00, \
36320 +    0x00,0x01,0x1B,0xFF,0x00,0x00,0x8C,0x00,0x53,0xF0, \
36321 +    0x00,0x01,0x34,0xF5,0x00,0xFB,0xFF,0xFF,0x00,0x7F, \
36322 +    0x00,0x00,0x00,0x00,0x2A,0x9F,0x00,0x00,0x93,0x8F, \
36323 +    0x28,0x49,0x00,0x00,0x97,0x8F,0x28,0x4B,0x34,0x61, \
36324 +    0x28,0x4D,0x34,0x71,0x28,0x4F,0x34,0xB7,0x00,0xF9, \
36325 +    0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x2B,0x97, \
36326 +    0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00,0x00,0x00, \
36327 +    0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02,0x00,0x00, \
36328 +    0x00,0x01,0x1B,0xFF,0x00,0x01,0x1B,0xFF, \
36329 +}
36330 +#endif /* (DPAA_VERSION == 10) */
36331 +
36332 +/****************************/
36333 +/* Parser defines           */
36334 +/****************************/
36335 +#define FM_PCD_PRS_SW_TAIL_SIZE             4                   /**< Number of bytes that must be cleared at
36336 +                                                                             the end of the SW parser area */
36337 +
36338 +/* masks */
36339 +#define PRS_ERR_CAP                         0x80000000
36340 +#define PRS_ERR_TYPE_DOUBLE                 0x40000000
36341 +#define PRS_ERR_SINGLE_ECC_CNT_MASK         0x00FF0000
36342 +#define PRS_ERR_ADDR_MASK                   0x000001FF
36343 +
36344 +/* others */
36345 +#define PRS_MAX_CYCLE_LIMIT                 8191
36346 +#define PRS_SW_DATA                         0x00000800
36347 +#define PRS_REGS_OFFSET                     0x00000840
36348 +
36349 +#define GET_FM_PCD_PRS_PORT_ID(prsPortId,hardwarePortId) \
36350 +    prsPortId = (uint8_t)(hardwarePortId & 0x0f)
36351 +
36352 +#define GET_FM_PCD_INDEX_FLAG(bitMask, prsPortId)    \
36353 +    bitMask = 0x80000000>>prsPortId
36354 +
36355 +#endif /* __FM_PRS_H */
36356 --- /dev/null
36357 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.c
36358 @@ -0,0 +1,984 @@
36359 +/*
36360 + * Copyright 2008-2012 Freescale Semiconductor Inc.
36361 + *
36362 + * Redistribution and use in source and binary forms, with or without
36363 + * modification, are permitted provided that the following conditions are met:
36364 + *     * Redistributions of source code must retain the above copyright
36365 + *       notice, this list of conditions and the following disclaimer.
36366 + *     * Redistributions in binary form must reproduce the above copyright
36367 + *       notice, this list of conditions and the following disclaimer in the
36368 + *       documentation and/or other materials provided with the distribution.
36369 + *     * Neither the name of Freescale Semiconductor nor the
36370 + *       names of its contributors may be used to endorse or promote products
36371 + *       derived from this software without specific prior written permission.
36372 + *
36373 + *
36374 + * ALTERNATIVELY, this software may be distributed under the terms of the
36375 + * GNU General Public License ("GPL") as published by the Free Software
36376 + * Foundation, either version 2 of that License or (at your option) any
36377 + * later version.
36378 + *
36379 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
36380 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36381 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
36382 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
36383 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36384 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36385 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
36386 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36387 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
36388 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36389 + */
36390 +
36391 +
36392 +/******************************************************************************
36393 + @File          fm_replic.c
36394 +
36395 + @Description   FM frame replicator
36396 +*//***************************************************************************/
36397 +#include "std_ext.h"
36398 +#include "error_ext.h"
36399 +#include "string_ext.h"
36400 +#include "debug_ext.h"
36401 +#include "fm_pcd_ext.h"
36402 +#include "fm_muram_ext.h"
36403 +#include "fm_common.h"
36404 +#include "fm_hc.h"
36405 +#include "fm_replic.h"
36406 +#include "fm_cc.h"
36407 +#include "list_ext.h"
36408 +
36409 +
36410 +/****************************************/
36411 +/*       static functions               */
36412 +/****************************************/
36413 +static uint8_t  GetMemberPosition(t_FmPcdFrmReplicGroup *p_ReplicGroup,
36414 +                                  uint32_t              memberIndex,
36415 +                                  bool                  isAddOperation)
36416 +{
36417 +    uint8_t     memberPosition;
36418 +    uint32_t    lastMemberIndex;
36419 +
36420 +    ASSERT_COND(p_ReplicGroup);
36421 +
36422 +    /* the last member index is different between add and remove operation -
36423 +    in case of remove - this is exactly the last member index
36424 +    in case of add - this is the last member index + 1 - e.g.
36425 +    if we have 4 members, the index of the actual last member is 3(because the
36426 +    index starts from 0) therefore in order to add a new member as the last
36427 +    member we shall use memberIndex = 4 and not 3
36428 +    */
36429 +    if (isAddOperation)
36430 +        lastMemberIndex = p_ReplicGroup->numOfEntries;
36431 +    else
36432 +        lastMemberIndex = p_ReplicGroup->numOfEntries-1;
36433 +
36434 +    /* last */
36435 +    if (memberIndex == lastMemberIndex)
36436 +        memberPosition = FRM_REPLIC_LAST_MEMBER_INDEX;
36437 +    else
36438 +    {
36439 +        /* first */
36440 +        if (memberIndex == 0)
36441 +            memberPosition = FRM_REPLIC_FIRST_MEMBER_INDEX;
36442 +        else
36443 +        {
36444 +            /* middle */
36445 +            ASSERT_COND(memberIndex < lastMemberIndex);
36446 +            memberPosition = FRM_REPLIC_MIDDLE_MEMBER_INDEX;
36447 +        }
36448 +    }
36449 +    return memberPosition;
36450 +}
36451 +
36452 +static t_Error MemberCheckParams(t_Handle                  h_FmPcd,
36453 +                                 t_FmPcdCcNextEngineParams *p_MemberParams)
36454 +{
36455 +    t_Error         err;
36456 +
36457 +
36458 +    if ((p_MemberParams->nextEngine != e_FM_PCD_DONE) &&
36459 +        (p_MemberParams->nextEngine != e_FM_PCD_KG)   &&
36460 +        (p_MemberParams->nextEngine != e_FM_PCD_PLCR))
36461 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Next engine of a member should be MatchTable(cc) or Done or Policer"));
36462 +
36463 +    /* check the regular parameters of the next engine */
36464 +    err = ValidateNextEngineParams(h_FmPcd, p_MemberParams, e_FM_PCD_CC_STATS_MODE_NONE);
36465 +    if (err)
36466 +        RETURN_ERROR(MAJOR, err, ("member next engine parameters"));
36467 +
36468 +    return E_OK;
36469 +}
36470 +
36471 +static t_Error CheckParams(t_Handle                     h_FmPcd,
36472 +                           t_FmPcdFrmReplicGroupParams *p_ReplicGroupParam)
36473 +{
36474 +    int             i;
36475 +    t_Error         err;
36476 +
36477 +    /* check that max num of entries is at least 2 */
36478 +    if (!IN_RANGE(2, p_ReplicGroupParam->maxNumOfEntries, FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES))
36479 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, ("maxNumOfEntries in the frame replicator parameters should be 2-%d",FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES));
36480 +
36481 +    /* check that number of entries is greater than zero */
36482 +    if (!p_ReplicGroupParam->numOfEntries)
36483 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOFEntries in the frame replicator group should be greater than zero"));
36484 +
36485 +    /* check that max num of entries is equal or greater than number of entries */
36486 +    if (p_ReplicGroupParam->maxNumOfEntries < p_ReplicGroupParam->numOfEntries)
36487 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("maxNumOfEntries should be equal or greater than numOfEntries"));
36488 +
36489 +    for (i=0; i<p_ReplicGroupParam->numOfEntries; i++)
36490 +    {
36491 +        err = MemberCheckParams(h_FmPcd, &p_ReplicGroupParam->nextEngineParams[i]);
36492 +        if (err)
36493 +            RETURN_ERROR(MAJOR, err, ("member check parameters"));
36494 +    }
36495 +    return E_OK;
36496 +}
36497 +
36498 +static t_FmPcdFrmReplicMember *GetAvailableMember(t_FmPcdFrmReplicGroup *p_ReplicGroup)
36499 +{
36500 +    t_FmPcdFrmReplicMember  *p_ReplicMember = NULL;
36501 +    t_List                  *p_Next;
36502 +
36503 +    if (!LIST_IsEmpty(&p_ReplicGroup->availableMembersList))
36504 +    {
36505 +        p_Next = LIST_FIRST(&p_ReplicGroup->availableMembersList);
36506 +        p_ReplicMember = LIST_OBJECT(p_Next, t_FmPcdFrmReplicMember, node);
36507 +        ASSERT_COND(p_ReplicMember);
36508 +        LIST_DelAndInit(p_Next);
36509 +    }
36510 +    return p_ReplicMember;
36511 +}
36512 +
36513 +static void PutAvailableMember(t_FmPcdFrmReplicGroup    *p_ReplicGroup,
36514 +                               t_FmPcdFrmReplicMember   *p_ReplicMember)
36515 +{
36516 +    LIST_AddToTail(&p_ReplicMember->node, &p_ReplicGroup->availableMembersList);
36517 +}
36518 +
36519 +static void AddMemberToList(t_FmPcdFrmReplicGroup   *p_ReplicGroup,
36520 +                            t_FmPcdFrmReplicMember  *p_CurrentMember,
36521 +                            t_List                  *p_ListHead)
36522 +{
36523 +    LIST_Add(&p_CurrentMember->node, p_ListHead);
36524 +
36525 +    p_ReplicGroup->numOfEntries++;
36526 +}
36527 +
36528 +static void RemoveMemberFromList(t_FmPcdFrmReplicGroup  *p_ReplicGroup,
36529 +                                 t_FmPcdFrmReplicMember *p_CurrentMember)
36530 +{
36531 +    ASSERT_COND(p_ReplicGroup->numOfEntries);
36532 +    LIST_DelAndInit(&p_CurrentMember->node);
36533 +    p_ReplicGroup->numOfEntries--;
36534 +}
36535 +
36536 +static void LinkSourceToMember(t_FmPcdFrmReplicGroup    *p_ReplicGroup,
36537 +                               t_AdOfTypeContLookup     *p_SourceTd,
36538 +                               t_FmPcdFrmReplicMember   *p_ReplicMember)
36539 +{
36540 +    t_FmPcd             *p_FmPcd;
36541 +
36542 +    ASSERT_COND(p_SourceTd);
36543 +    ASSERT_COND(p_ReplicMember);
36544 +    ASSERT_COND(p_ReplicGroup);
36545 +    ASSERT_COND(p_ReplicGroup->h_FmPcd);
36546 +
36547 +    /* Link the first member in the group to the source TD */
36548 +    p_FmPcd = p_ReplicGroup->h_FmPcd;
36549 +
36550 +    WRITE_UINT32(p_SourceTd->matchTblPtr,
36551 +        (uint32_t)(XX_VirtToPhys(p_ReplicMember->p_MemberAd) -
36552 +                        p_FmPcd->physicalMuramBase));
36553 +}
36554 +
36555 +static void LinkMemberToMember(t_FmPcdFrmReplicGroup    *p_ReplicGroup,
36556 +                               t_FmPcdFrmReplicMember   *p_CurrentMember,
36557 +                               t_FmPcdFrmReplicMember   *p_NextMember)
36558 +{
36559 +    t_AdOfTypeResult    *p_CurrReplicAd = (t_AdOfTypeResult*)p_CurrentMember->p_MemberAd;
36560 +    t_AdOfTypeResult    *p_NextReplicAd = NULL;
36561 +    t_FmPcd             *p_FmPcd;
36562 +    uint32_t            offset = 0;
36563 +
36564 +    /* Check if the next member exists or it's NULL (- means that this is the last member) */
36565 +    if (p_NextMember)
36566 +    {
36567 +        p_NextReplicAd = (t_AdOfTypeResult*)p_NextMember->p_MemberAd;
36568 +        p_FmPcd = p_ReplicGroup->h_FmPcd;
36569 +        offset = (XX_VirtToPhys(p_NextReplicAd) - (p_FmPcd->physicalMuramBase));
36570 +        offset = ((offset>>NEXT_FRM_REPLIC_ADDR_SHIFT)<< NEXT_FRM_REPLIC_MEMBER_INDEX_SHIFT);
36571 +    }
36572 +
36573 +    /* link the current AD to point to the AD of the next member */
36574 +    WRITE_UINT32(p_CurrReplicAd->res, offset);
36575 +}
36576 +
36577 +static t_Error ModifyDescriptor(t_FmPcdFrmReplicGroup   *p_ReplicGroup,
36578 +                                void                    *p_OldDescriptor,
36579 +                                void                    *p_NewDescriptor)
36580 +{
36581 +    t_Handle            h_Hc;
36582 +    t_Error             err;
36583 +    t_FmPcd             *p_FmPcd;
36584 +
36585 +    ASSERT_COND(p_ReplicGroup);
36586 +    ASSERT_COND(p_ReplicGroup->h_FmPcd);
36587 +    ASSERT_COND(p_OldDescriptor);
36588 +    ASSERT_COND(p_NewDescriptor);
36589 +
36590 +    p_FmPcd = p_ReplicGroup->h_FmPcd;
36591 +    h_Hc = FmPcdGetHcHandle(p_FmPcd);
36592 +    if (!h_Hc)
36593 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("Host command"));
36594 +
36595 +    err = FmHcPcdCcDoDynamicChange(h_Hc,
36596 +                                   (uint32_t)(XX_VirtToPhys(p_OldDescriptor) - p_FmPcd->physicalMuramBase),
36597 +                                   (uint32_t)(XX_VirtToPhys(p_NewDescriptor) - p_FmPcd->physicalMuramBase));
36598 +    if (err)
36599 +        RETURN_ERROR(MAJOR, err, ("Dynamic change host command"));
36600 +
36601 +    return E_OK;
36602 +}
36603 +
36604 +static void FillReplicAdOfTypeResult(void *p_ReplicAd, bool last)
36605 +{
36606 +    t_AdOfTypeResult    *p_CurrReplicAd = (t_AdOfTypeResult*)p_ReplicAd;
36607 +    uint32_t            tmp;
36608 +
36609 +    tmp = GET_UINT32(p_CurrReplicAd->plcrProfile);
36610 +    if (last)
36611 +        /* clear the NL bit in case it's the last member in the group*/
36612 +        WRITE_UINT32(p_CurrReplicAd->plcrProfile,(tmp & ~FRM_REPLIC_NL_BIT));
36613 +    else
36614 +        /* set the NL bit in case it's not the last member in the group */
36615 +        WRITE_UINT32(p_CurrReplicAd->plcrProfile, (tmp |FRM_REPLIC_NL_BIT));
36616 +
36617 +    /* set FR bit in the action descriptor */
36618 +    tmp = GET_UINT32(p_CurrReplicAd->nia);
36619 +    WRITE_UINT32(p_CurrReplicAd->nia,
36620 +        (tmp | FRM_REPLIC_FR_BIT | FM_PCD_AD_RESULT_EXTENDED_MODE ));
36621 +}
36622 +
36623 +static void BuildSourceTd(void *p_Ad)
36624 +{
36625 +    t_AdOfTypeContLookup    *p_SourceTd;
36626 +
36627 +    ASSERT_COND(p_Ad);
36628 +
36629 +    p_SourceTd = (t_AdOfTypeContLookup *)p_Ad;
36630 +
36631 +    IOMemSet32((uint8_t*)p_SourceTd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
36632 +
36633 +    /* initialize the source table descriptor */
36634 +    WRITE_UINT32(p_SourceTd->ccAdBase,     FM_PCD_AD_CONT_LOOKUP_TYPE);
36635 +    WRITE_UINT32(p_SourceTd->pcAndOffsets, FRM_REPLIC_SOURCE_TD_OPCODE);
36636 +}
36637 +
36638 +static t_Error BuildShadowAndModifyDescriptor(t_FmPcdFrmReplicGroup   *p_ReplicGroup,
36639 +                                              t_FmPcdFrmReplicMember  *p_NextMember,
36640 +                                              t_FmPcdFrmReplicMember  *p_CurrentMember,
36641 +                                              bool                    sourceDescriptor,
36642 +                                              bool                    last)
36643 +{
36644 +    t_FmPcd                 *p_FmPcd;
36645 +    t_FmPcdFrmReplicMember  shadowMember;
36646 +    t_Error                 err;
36647 +
36648 +    ASSERT_COND(p_ReplicGroup);
36649 +    ASSERT_COND(p_ReplicGroup->h_FmPcd);
36650 +
36651 +    p_FmPcd = p_ReplicGroup->h_FmPcd;
36652 +    ASSERT_COND(p_FmPcd->p_CcShadow);
36653 +
36654 +    if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
36655 +        return ERROR_CODE(E_BUSY);
36656 +
36657 +    if (sourceDescriptor)
36658 +    {
36659 +        BuildSourceTd(p_FmPcd->p_CcShadow);
36660 +        LinkSourceToMember(p_ReplicGroup, p_FmPcd->p_CcShadow, p_NextMember);
36661 +
36662 +        /* Modify the source table descriptor according to the prepared shadow descriptor */
36663 +        err = ModifyDescriptor(p_ReplicGroup,
36664 +                               p_ReplicGroup->p_SourceTd,
36665 +                               p_FmPcd->p_CcShadow/* new prepared source td */);
36666 +
36667 +        RELEASE_LOCK(p_FmPcd->shadowLock);
36668 +        if (err)
36669 +            RETURN_ERROR(MAJOR, err, ("Modify source Descriptor in BuildShadowAndModifyDescriptor"));
36670 +
36671 +    }
36672 +    else
36673 +    {
36674 +        IO2IOCpy32(p_FmPcd->p_CcShadow,
36675 +                   p_CurrentMember->p_MemberAd,
36676 +                   FM_PCD_CC_AD_ENTRY_SIZE);
36677 +
36678 +        /* update the last bit in the shadow ad */
36679 +        FillReplicAdOfTypeResult(p_FmPcd->p_CcShadow, last);
36680 +
36681 +        shadowMember.p_MemberAd = p_FmPcd->p_CcShadow;
36682 +
36683 +        /* update the next FR member index */
36684 +        LinkMemberToMember(p_ReplicGroup, &shadowMember, p_NextMember);
36685 +
36686 +        /* Modify the next member according to the prepared shadow descriptor */
36687 +        err = ModifyDescriptor(p_ReplicGroup,
36688 +                               p_CurrentMember->p_MemberAd,
36689 +                               p_FmPcd->p_CcShadow);
36690 +
36691 +        RELEASE_LOCK(p_FmPcd->shadowLock);
36692 +        if (err)
36693 +            RETURN_ERROR(MAJOR, err, ("Modify Descriptor in BuildShadowAndModifyDescriptor"));
36694 +    }
36695 +
36696 +
36697 +    return E_OK;
36698 +}
36699 +
36700 +static t_FmPcdFrmReplicMember* GetMemberByIndex(t_FmPcdFrmReplicGroup   *p_ReplicGroup,
36701 +                                                uint16_t                memberIndex)
36702 +{
36703 +    int                     i=0;
36704 +    t_List                  *p_Pos;
36705 +    t_FmPcdFrmReplicMember  *p_Member = NULL;
36706 +
36707 +    LIST_FOR_EACH(p_Pos, &p_ReplicGroup->membersList)
36708 +    {
36709 +        if (i == memberIndex)
36710 +        {
36711 +            p_Member = LIST_OBJECT(p_Pos, t_FmPcdFrmReplicMember, node);
36712 +            return p_Member;
36713 +        }
36714 +        i++;
36715 +    }
36716 +    return p_Member;
36717 +}
36718 +
36719 +static t_Error AllocMember(t_FmPcdFrmReplicGroup *p_ReplicGroup)
36720 +{
36721 +    t_FmPcdFrmReplicMember  *p_CurrentMember;
36722 +    t_Handle                h_Muram;
36723 +
36724 +    ASSERT_COND(p_ReplicGroup);
36725 +
36726 +    h_Muram = FmPcdGetMuramHandle(p_ReplicGroup->h_FmPcd);
36727 +    ASSERT_COND(h_Muram);
36728 +
36729 +    /* Initialize an internal structure of a member to add to the available members list */
36730 +    p_CurrentMember = (t_FmPcdFrmReplicMember *)XX_Malloc(sizeof(t_FmPcdFrmReplicMember));
36731 +    if (!p_CurrentMember)
36732 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Frame replicator member"));
36733 +
36734 +    memset(p_CurrentMember, 0 ,sizeof(t_FmPcdFrmReplicMember));
36735 +
36736 +    /* Allocate the member AD */
36737 +    p_CurrentMember->p_MemberAd =
36738 +        (t_AdOfTypeResult*)FM_MURAM_AllocMem(h_Muram,
36739 +                                             FM_PCD_CC_AD_ENTRY_SIZE,
36740 +                                             FM_PCD_CC_AD_TABLE_ALIGN);
36741 +    if (!p_CurrentMember->p_MemberAd)
36742 +    {
36743 +        XX_Free(p_CurrentMember);
36744 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("member AD table"));
36745 +    }
36746 +    IOMemSet32((uint8_t*)p_CurrentMember->p_MemberAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
36747 +
36748 +    /* Add the new member to the available members list */
36749 +    LIST_AddToTail(&p_CurrentMember->node, &(p_ReplicGroup->availableMembersList));
36750 +
36751 +    return E_OK;
36752 +}
36753 +
36754 +static t_FmPcdFrmReplicMember* InitMember(t_FmPcdFrmReplicGroup     *p_ReplicGroup,
36755 +                                          t_FmPcdCcNextEngineParams *p_MemberParams,
36756 +                                          bool                      last)
36757 +{
36758 +    t_FmPcdFrmReplicMember  *p_CurrentMember = NULL;
36759 +
36760 +    ASSERT_COND(p_ReplicGroup);
36761 +
36762 +    /* Get an available member from the internal members list */
36763 +    p_CurrentMember = GetAvailableMember(p_ReplicGroup);
36764 +    if (!p_CurrentMember)
36765 +    {
36766 +        REPORT_ERROR(MAJOR, E_NOT_FOUND, ("Available member"));
36767 +        return NULL;
36768 +    }
36769 +    p_CurrentMember->h_Manip = NULL;
36770 +
36771 +    /* clear the Ad of the new member */
36772 +    IOMemSet32((uint8_t*)p_CurrentMember->p_MemberAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
36773 +
36774 +    INIT_LIST(&p_CurrentMember->node);
36775 +
36776 +    /* Initialize the Ad of the member */
36777 +    NextStepAd(p_CurrentMember->p_MemberAd,
36778 +               NULL,
36779 +               p_MemberParams,
36780 +               p_ReplicGroup->h_FmPcd);
36781 +
36782 +    /* save Manip handle (for free needs) */
36783 +    if (p_MemberParams->h_Manip)
36784 +        p_CurrentMember->h_Manip = p_MemberParams->h_Manip;
36785 +
36786 +    /* Initialize the relevant frame replicator fields in the AD */
36787 +    FillReplicAdOfTypeResult(p_CurrentMember->p_MemberAd, last);
36788 +
36789 +    return p_CurrentMember;
36790 +}
36791 +
36792 +static void FreeMember(t_FmPcdFrmReplicGroup    *p_ReplicGroup,
36793 +                       t_FmPcdFrmReplicMember   *p_Member)
36794 +{
36795 +    /* Note: Can't free the member AD just returns the member to the available
36796 +       member list - therefore only memset the AD */
36797 +
36798 +    /* zero the AD */
36799 +    IOMemSet32(p_Member->p_MemberAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
36800 +
36801 +
36802 +    /* return the member to the available members list */
36803 +    PutAvailableMember(p_ReplicGroup, p_Member);
36804 +}
36805 +
36806 +static t_Error RemoveMember(t_FmPcdFrmReplicGroup   *p_ReplicGroup,
36807 +                            uint16_t                memberIndex)
36808 +{
36809 +    t_FmPcd                 *p_FmPcd = NULL;
36810 +    t_FmPcdFrmReplicMember  *p_CurrentMember = NULL, *p_PreviousMember = NULL, *p_NextMember = NULL;
36811 +    t_Error                 err;
36812 +    uint8_t                 memberPosition;
36813 +
36814 +    p_FmPcd         = p_ReplicGroup->h_FmPcd;
36815 +    ASSERT_COND(p_FmPcd);
36816 +    UNUSED(p_FmPcd);
36817 +
36818 +    p_CurrentMember = GetMemberByIndex(p_ReplicGroup, memberIndex);
36819 +    ASSERT_COND(p_CurrentMember);
36820 +
36821 +    /* determine the member position in the group */
36822 +    memberPosition = GetMemberPosition(p_ReplicGroup,
36823 +                                       memberIndex,
36824 +                                       FALSE/*remove operation*/);
36825 +
36826 +    switch (memberPosition)
36827 +    {
36828 +        case FRM_REPLIC_FIRST_MEMBER_INDEX:
36829 +            p_NextMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex+1));
36830 +            ASSERT_COND(p_NextMember);
36831 +
36832 +            /* update the source td itself by using a host command */
36833 +            err = BuildShadowAndModifyDescriptor(p_ReplicGroup,
36834 +                                                 p_NextMember,
36835 +                                                 NULL,
36836 +                                                 TRUE/*sourceDescriptor*/,
36837 +                                                 FALSE/*last*/);
36838 +            break;
36839 +
36840 +        case FRM_REPLIC_MIDDLE_MEMBER_INDEX:
36841 +            p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
36842 +            ASSERT_COND(p_PreviousMember);
36843 +
36844 +            p_NextMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex+1));
36845 +            ASSERT_COND(p_NextMember);
36846 +
36847 +            err = BuildShadowAndModifyDescriptor(p_ReplicGroup,
36848 +                                                 p_NextMember,
36849 +                                                 p_PreviousMember,
36850 +                                                 FALSE/*sourceDescriptor*/,
36851 +                                                 FALSE/*last*/);
36852 +
36853 +            break;
36854 +
36855 +        case FRM_REPLIC_LAST_MEMBER_INDEX:
36856 +            p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
36857 +            ASSERT_COND(p_PreviousMember);
36858 +
36859 +            err = BuildShadowAndModifyDescriptor(p_ReplicGroup,
36860 +                                                 NULL,
36861 +                                                 p_PreviousMember,
36862 +                                                 FALSE/*sourceDescriptor*/,
36863 +                                                 TRUE/*last*/);
36864 +            break;
36865 +
36866 +        default:
36867 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("member position in remove member"));
36868 +    }
36869 +
36870 +    if (err)
36871 +        RETURN_ERROR(MAJOR, err, NO_MSG);
36872 +
36873 +    if (p_CurrentMember->h_Manip)
36874 +    {
36875 +        FmPcdManipUpdateOwner(p_CurrentMember->h_Manip, FALSE);
36876 +        p_CurrentMember->h_Manip = NULL;
36877 +    }
36878 +
36879 +    /* remove the member from the driver internal members list */
36880 +    RemoveMemberFromList(p_ReplicGroup, p_CurrentMember);
36881 +
36882 +    /* return the member to the available members list */
36883 +    FreeMember(p_ReplicGroup, p_CurrentMember);
36884 +
36885 +    return E_OK;
36886 +}
36887 +
36888 +static void DeleteGroup(t_FmPcdFrmReplicGroup *p_ReplicGroup)
36889 +{
36890 +    int                     i, j;
36891 +    t_Handle                h_Muram;
36892 +    t_FmPcdFrmReplicMember  *p_Member, *p_CurrentMember;
36893 +
36894 +    if (p_ReplicGroup)
36895 +    {
36896 +        ASSERT_COND(p_ReplicGroup->h_FmPcd);
36897 +        h_Muram = FmPcdGetMuramHandle(p_ReplicGroup->h_FmPcd);
36898 +        ASSERT_COND(h_Muram);
36899 +
36900 +        /* free the source table descriptor */
36901 +        if (p_ReplicGroup->p_SourceTd)
36902 +        {
36903 +            FM_MURAM_FreeMem(h_Muram, p_ReplicGroup->p_SourceTd);
36904 +            p_ReplicGroup->p_SourceTd = NULL;
36905 +        }
36906 +
36907 +        /* Remove all members from the members linked list (hw and sw) and
36908 +           return the members to the available members list */
36909 +        if (p_ReplicGroup->numOfEntries)
36910 +        {
36911 +            j = p_ReplicGroup->numOfEntries-1;
36912 +
36913 +            /* manually removal of the member because there are no owners of
36914 +               this group */
36915 +            for (i=j; i>=0; i--)
36916 +            {
36917 +                p_CurrentMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)i/*memberIndex*/);
36918 +                ASSERT_COND(p_CurrentMember);
36919 +
36920 +                if (p_CurrentMember->h_Manip)
36921 +                {
36922 +                    FmPcdManipUpdateOwner(p_CurrentMember->h_Manip, FALSE);
36923 +                    p_CurrentMember->h_Manip = NULL;
36924 +                }
36925 +
36926 +                /* remove the member from the internal driver members list */
36927 +                RemoveMemberFromList(p_ReplicGroup, p_CurrentMember);
36928 +
36929 +                /* return the member to the available members list */
36930 +                FreeMember(p_ReplicGroup, p_CurrentMember);
36931 +            }
36932 +        }
36933 +
36934 +        /* Free members AD */
36935 +        for (i=0; i<p_ReplicGroup->maxNumOfEntries; i++)
36936 +        {
36937 +            p_Member = GetAvailableMember(p_ReplicGroup);
36938 +            ASSERT_COND(p_Member);
36939 +            if (p_Member->p_MemberAd)
36940 +            {
36941 +                FM_MURAM_FreeMem(h_Muram, p_Member->p_MemberAd);
36942 +                p_Member->p_MemberAd = NULL;
36943 +            }
36944 +            XX_Free(p_Member);
36945 +        }
36946 +
36947 +        /* release the group lock */
36948 +        if (p_ReplicGroup->p_Lock)
36949 +            FmPcdReleaseLock(p_ReplicGroup->h_FmPcd, p_ReplicGroup->p_Lock);
36950 +
36951 +        /* free the replicator group */
36952 +        XX_Free(p_ReplicGroup);
36953 +    }
36954 +}
36955 +
36956 +
36957 +/*****************************************************************************/
36958 +/*              Inter-module API routines                                    */
36959 +/*****************************************************************************/
36960 +
36961 +/* NOTE: the inter-module routines are locked by cc in case of using them */
36962 +void * FrmReplicGroupGetSourceTableDescriptor(t_Handle h_ReplicGroup)
36963 +{
36964 +    t_FmPcdFrmReplicGroup   *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
36965 +    ASSERT_COND(p_ReplicGroup);
36966 +
36967 +    return (p_ReplicGroup->p_SourceTd);
36968 +}
36969 +
36970 +void FrmReplicGroupUpdateAd(t_Handle  h_ReplicGroup,
36971 +                            void      *p_Ad,
36972 +                            t_Handle  *h_AdNew)
36973 +{
36974 +    t_FmPcdFrmReplicGroup   *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
36975 +    t_AdOfTypeResult    *p_AdResult = (t_AdOfTypeResult*)p_Ad;
36976 +    t_FmPcd             *p_FmPcd;
36977 +
36978 +    ASSERT_COND(p_ReplicGroup);
36979 +    p_FmPcd = p_ReplicGroup->h_FmPcd;
36980 +
36981 +    /* build a bypass ad */
36982 +    WRITE_UINT32(p_AdResult->fqid, FM_PCD_AD_BYPASS_TYPE |
36983 +        (uint32_t)((XX_VirtToPhys(p_ReplicGroup->p_SourceTd)) - p_FmPcd->physicalMuramBase));
36984 +
36985 +    *h_AdNew = NULL;
36986 +}
36987 +
36988 +void  FrmReplicGroupUpdateOwner(t_Handle                   h_ReplicGroup,
36989 +                                bool                       add)
36990 +{
36991 +    t_FmPcdFrmReplicGroup   *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
36992 +    ASSERT_COND(p_ReplicGroup);
36993 +
36994 +    /* update the group owner counter */
36995 +    if (add)
36996 +        p_ReplicGroup->owners++;
36997 +    else
36998 +    {
36999 +        ASSERT_COND(p_ReplicGroup->owners);
37000 +        p_ReplicGroup->owners--;
37001 +    }
37002 +}
37003 +
37004 +t_Error FrmReplicGroupTryLock(t_Handle h_ReplicGroup)
37005 +{
37006 +    t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
37007 +
37008 +    ASSERT_COND(h_ReplicGroup);
37009 +
37010 +    if (FmPcdLockTryLock(p_ReplicGroup->p_Lock))
37011 +        return E_OK;
37012 +
37013 +    return ERROR_CODE(E_BUSY);
37014 +}
37015 +
37016 +void FrmReplicGroupUnlock(t_Handle h_ReplicGroup)
37017 +{
37018 +    t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
37019 +
37020 +    ASSERT_COND(h_ReplicGroup);
37021 +
37022 +    FmPcdLockUnlock(p_ReplicGroup->p_Lock);
37023 +}
37024 +/*********************** End of inter-module routines ************************/
37025 +
37026 +
37027 +/****************************************/
37028 +/*       API Init unit functions        */
37029 +/****************************************/
37030 +t_Handle FM_PCD_FrmReplicSetGroup(t_Handle                    h_FmPcd,
37031 +                                  t_FmPcdFrmReplicGroupParams *p_ReplicGroupParam)
37032 +{
37033 +    t_FmPcdFrmReplicGroup       *p_ReplicGroup;
37034 +    t_FmPcdFrmReplicMember      *p_CurrentMember, *p_NextMember = NULL;
37035 +    int                         i;
37036 +    t_Error                     err;
37037 +    bool                        last = FALSE;
37038 +    t_Handle                    h_Muram;
37039 +
37040 +    SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
37041 +    SANITY_CHECK_RETURN_VALUE(p_ReplicGroupParam, E_INVALID_HANDLE, NULL);
37042 +
37043 +    if (!FmPcdIsAdvancedOffloadSupported(h_FmPcd))
37044 +    {
37045 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Advanced-offload must be enabled"));
37046 +        return NULL;
37047 +    }
37048 +
37049 +    err = CheckParams(h_FmPcd, p_ReplicGroupParam);
37050 +    if (err)
37051 +    {
37052 +        REPORT_ERROR(MAJOR, err, (NO_MSG));
37053 +        return NULL;
37054 +    }
37055 +
37056 +    p_ReplicGroup = (t_FmPcdFrmReplicGroup*)XX_Malloc(sizeof(t_FmPcdFrmReplicGroup));
37057 +    if (!p_ReplicGroup)
37058 +    {
37059 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
37060 +        return NULL;
37061 +    }
37062 +    memset(p_ReplicGroup, 0, sizeof(t_FmPcdFrmReplicGroup));
37063 +
37064 +    /* initialize lists for internal driver use */
37065 +    INIT_LIST(&p_ReplicGroup->availableMembersList);
37066 +    INIT_LIST(&p_ReplicGroup->membersList);
37067 +
37068 +    p_ReplicGroup->h_FmPcd = h_FmPcd;
37069 +
37070 +    h_Muram = FmPcdGetMuramHandle(p_ReplicGroup->h_FmPcd);
37071 +    ASSERT_COND(h_Muram);
37072 +
37073 +    /* initialize the group lock */
37074 +    p_ReplicGroup->p_Lock = FmPcdAcquireLock(p_ReplicGroup->h_FmPcd);
37075 +    if (!p_ReplicGroup->p_Lock)
37076 +    {
37077 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Replic group lock"));
37078 +        DeleteGroup(p_ReplicGroup);
37079 +        return NULL;
37080 +    }
37081 +
37082 +    /* Allocate the frame replicator source table descriptor */
37083 +    p_ReplicGroup->p_SourceTd =
37084 +        (t_Handle)FM_MURAM_AllocMem(h_Muram,
37085 +                                    FM_PCD_CC_AD_ENTRY_SIZE,
37086 +                                    FM_PCD_CC_AD_TABLE_ALIGN);
37087 +    if (!p_ReplicGroup->p_SourceTd)
37088 +    {
37089 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("frame replicator source table descriptor"));
37090 +        DeleteGroup(p_ReplicGroup);
37091 +        return NULL;
37092 +    }
37093 +
37094 +    /* update the shadow size - required for the host commands */
37095 +    err = FmPcdUpdateCcShadow(p_ReplicGroup->h_FmPcd,
37096 +                              FM_PCD_CC_AD_ENTRY_SIZE,
37097 +                              FM_PCD_CC_AD_TABLE_ALIGN);
37098 +    if (err)
37099 +    {
37100 +        REPORT_ERROR(MAJOR, err, ("Update CC shadow"));
37101 +        DeleteGroup(p_ReplicGroup);
37102 +        return NULL;
37103 +    }
37104 +
37105 +    p_ReplicGroup->maxNumOfEntries  = p_ReplicGroupParam->maxNumOfEntries;
37106 +
37107 +    /* Allocate the maximal number of members ADs and Statistics AD for the group
37108 +       It prevents allocation of Muram in run-time */
37109 +    for (i=0; i<p_ReplicGroup->maxNumOfEntries; i++)
37110 +    {
37111 +        err = AllocMember(p_ReplicGroup);
37112 +        if (err)
37113 +        {
37114 +            REPORT_ERROR(MAJOR, err, ("allocate a new member"));
37115 +            DeleteGroup(p_ReplicGroup);
37116 +            return NULL;
37117 +        }
37118 +    }
37119 +
37120 +    /* Initialize the members linked lists:
37121 +      (hw - the one that is used by the FMan controller and
37122 +       sw - the one that is managed by the driver internally) */
37123 +    for (i=(p_ReplicGroupParam->numOfEntries-1); i>=0; i--)
37124 +    {
37125 +        /* check if this is the last member in the group */
37126 +        if (i == (p_ReplicGroupParam->numOfEntries-1))
37127 +            last = TRUE;
37128 +        else
37129 +            last = FALSE;
37130 +
37131 +        /* Initialize a new member */
37132 +        p_CurrentMember = InitMember(p_ReplicGroup,
37133 +                                     &(p_ReplicGroupParam->nextEngineParams[i]),
37134 +                                     last);
37135 +        if (!p_CurrentMember)
37136 +        {
37137 +            REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("No available member"));
37138 +            DeleteGroup(p_ReplicGroup);
37139 +            return NULL;
37140 +        }
37141 +
37142 +        /* Build the members group - link two consecutive members in the hw linked list */
37143 +        LinkMemberToMember(p_ReplicGroup, p_CurrentMember, p_NextMember);
37144 +
37145 +        /* update the driver internal members list to be compatible to the hw members linked list */
37146 +        AddMemberToList(p_ReplicGroup, p_CurrentMember, &p_ReplicGroup->membersList);
37147 +
37148 +        p_NextMember = p_CurrentMember;
37149 +    }
37150 +
37151 +    /* initialize the source table descriptor */
37152 +    BuildSourceTd(p_ReplicGroup->p_SourceTd);
37153 +
37154 +    /* link the source table descriptor to point to the first member in the group */
37155 +    LinkSourceToMember(p_ReplicGroup, p_ReplicGroup->p_SourceTd, p_NextMember);
37156 +
37157 +    return p_ReplicGroup;
37158 +}
37159 +
37160 +t_Error FM_PCD_FrmReplicDeleteGroup(t_Handle h_ReplicGroup)
37161 +{
37162 +    t_FmPcdFrmReplicGroup   *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
37163 +
37164 +    SANITY_CHECK_RETURN_ERROR(p_ReplicGroup, E_INVALID_HANDLE);
37165 +
37166 +    if (p_ReplicGroup->owners)
37167 +        RETURN_ERROR(MAJOR,
37168 +                     E_INVALID_STATE,
37169 +                     ("the group has owners and can't be deleted"));
37170 +
37171 +    DeleteGroup(p_ReplicGroup);
37172 +
37173 +    return E_OK;
37174 +}
37175 +
37176 +
37177 +/*****************************************************************************/
37178 +/*       API Run-time Frame replicator Control unit functions                */
37179 +/*****************************************************************************/
37180 +t_Error FM_PCD_FrmReplicAddMember(t_Handle                  h_ReplicGroup,
37181 +                                  uint16_t                  memberIndex,
37182 +                                  t_FmPcdCcNextEngineParams *p_MemberParams)
37183 +{
37184 +    t_FmPcdFrmReplicGroup       *p_ReplicGroup = (t_FmPcdFrmReplicGroup*) h_ReplicGroup;
37185 +    t_FmPcdFrmReplicMember      *p_NewMember, *p_CurrentMember = NULL, *p_PreviousMember = NULL;
37186 +    t_Error                     err;
37187 +    uint8_t                     memberPosition;
37188 +
37189 +    SANITY_CHECK_RETURN_ERROR(p_ReplicGroup, E_INVALID_HANDLE);
37190 +    SANITY_CHECK_RETURN_ERROR(p_MemberParams, E_INVALID_HANDLE);
37191 +
37192 +    /* group lock */
37193 +    err = FrmReplicGroupTryLock(p_ReplicGroup);
37194 +    if (GET_ERROR_TYPE(err) == E_BUSY)
37195 +        return ERROR_CODE(E_BUSY);
37196 +
37197 +    if (memberIndex > p_ReplicGroup->numOfEntries)
37198 +    {
37199 +        /* unlock */
37200 +        FrmReplicGroupUnlock(p_ReplicGroup);
37201 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
37202 +                     ("memberIndex is greater than the members in the list"));
37203 +    }
37204 +
37205 +    if (memberIndex >= p_ReplicGroup->maxNumOfEntries)
37206 +    {
37207 +        /* unlock */
37208 +        FrmReplicGroupUnlock(p_ReplicGroup);
37209 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("memberIndex is greater than the allowed number of members in the group"));
37210 +    }
37211 +
37212 +    if ((p_ReplicGroup->numOfEntries + 1) > FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES)
37213 +    {
37214 +        /* unlock */
37215 +        FrmReplicGroupUnlock(p_ReplicGroup);
37216 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
37217 +                     ("numOfEntries with new entry can not be larger than %d\n",
37218 +                      FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES));
37219 +    }
37220 +
37221 +    err = MemberCheckParams(p_ReplicGroup->h_FmPcd, p_MemberParams);
37222 +    if (err)
37223 +    {
37224 +        /* unlock */
37225 +        FrmReplicGroupUnlock(p_ReplicGroup);
37226 +        RETURN_ERROR(MAJOR, err, ("member check parameters in add operation"));
37227 +    }
37228 +    /* determine the member position in the group */
37229 +    memberPosition = GetMemberPosition(p_ReplicGroup,
37230 +                                       memberIndex,
37231 +                                       TRUE/* add operation */);
37232 +
37233 +    /* Initialize a new member */
37234 +    p_NewMember = InitMember(p_ReplicGroup,
37235 +                             p_MemberParams,
37236 +                             (memberPosition == FRM_REPLIC_LAST_MEMBER_INDEX ? TRUE : FALSE));
37237 +    if (!p_NewMember)
37238 +    {
37239 +        /* unlock */
37240 +        FrmReplicGroupUnlock(p_ReplicGroup);
37241 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("No available member"));
37242 +    }
37243 +
37244 +    switch (memberPosition)
37245 +    {
37246 +        case FRM_REPLIC_FIRST_MEMBER_INDEX:
37247 +            p_CurrentMember = GetMemberByIndex(p_ReplicGroup, memberIndex);
37248 +            ASSERT_COND(p_CurrentMember);
37249 +
37250 +            LinkMemberToMember(p_ReplicGroup, p_NewMember, p_CurrentMember);
37251 +
37252 +            /* update the internal group source TD */
37253 +            LinkSourceToMember(p_ReplicGroup,
37254 +                               p_ReplicGroup->p_SourceTd,
37255 +                               p_NewMember);
37256 +
37257 +            /* add member to the internal sw member list */
37258 +            AddMemberToList(p_ReplicGroup,
37259 +                            p_NewMember,
37260 +                            &p_ReplicGroup->membersList);
37261 +            break;
37262 +
37263 +        case FRM_REPLIC_MIDDLE_MEMBER_INDEX:
37264 +            p_CurrentMember = GetMemberByIndex(p_ReplicGroup, memberIndex);
37265 +            ASSERT_COND(p_CurrentMember);
37266 +
37267 +            p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
37268 +            ASSERT_COND(p_PreviousMember);
37269 +
37270 +            LinkMemberToMember(p_ReplicGroup, p_NewMember, p_CurrentMember);
37271 +            LinkMemberToMember(p_ReplicGroup, p_PreviousMember, p_NewMember);
37272 +
37273 +            AddMemberToList(p_ReplicGroup, p_NewMember, &p_PreviousMember->node);
37274 +            break;
37275 +
37276 +        case FRM_REPLIC_LAST_MEMBER_INDEX:
37277 +            p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
37278 +            ASSERT_COND(p_PreviousMember);
37279 +
37280 +            LinkMemberToMember(p_ReplicGroup, p_PreviousMember, p_NewMember);
37281 +            FillReplicAdOfTypeResult(p_PreviousMember->p_MemberAd, FALSE/*last*/);
37282 +
37283 +            /* add the new member to the internal sw member list */
37284 +            AddMemberToList(p_ReplicGroup, p_NewMember, &p_PreviousMember->node);
37285 +           break;
37286 +
37287 +        default:
37288 +            /* unlock */
37289 +            FrmReplicGroupUnlock(p_ReplicGroup);
37290 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("member position in add member"));
37291 +
37292 +    }
37293 +
37294 +    /* unlock */
37295 +    FrmReplicGroupUnlock(p_ReplicGroup);
37296 +
37297 +    return E_OK;
37298 +}
37299 +
37300 +t_Error FM_PCD_FrmReplicRemoveMember(t_Handle   h_ReplicGroup,
37301 +                                     uint16_t   memberIndex)
37302 +{
37303 +    t_FmPcdFrmReplicGroup   *p_ReplicGroup = (t_FmPcdFrmReplicGroup*) h_ReplicGroup;
37304 +    t_Error                 err;
37305 +
37306 +    SANITY_CHECK_RETURN_ERROR(p_ReplicGroup, E_INVALID_HANDLE);
37307 +
37308 +    /* lock */
37309 +    err = FrmReplicGroupTryLock(p_ReplicGroup);
37310 +    if (GET_ERROR_TYPE(err) == E_BUSY)
37311 +        return ERROR_CODE(E_BUSY);
37312 +
37313 +    if (memberIndex >= p_ReplicGroup->numOfEntries)
37314 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("member index to remove"));
37315 +
37316 +    /* Design decision: group must contain at least one member
37317 +       No possibility to remove the last member from the group */
37318 +    if (p_ReplicGroup->numOfEntries == 1)
37319 +        RETURN_ERROR(MAJOR, E_CONFLICT, ("Can't remove the last member. At least one member should be related to a group."));
37320 +
37321 +    err = RemoveMember(p_ReplicGroup, memberIndex);
37322 +
37323 +    /* unlock */
37324 +    FrmReplicGroupUnlock(p_ReplicGroup);
37325 +
37326 +    switch (GET_ERROR_TYPE(err))
37327 +    {
37328 +        case E_OK:
37329 +            return E_OK;
37330 +
37331 +        case E_BUSY:
37332 +            DBG(TRACE, ("E_BUSY error"));
37333 +            return ERROR_CODE(E_BUSY);
37334 +
37335 +        default:
37336 +            RETURN_ERROR(MAJOR, err, NO_MSG);
37337 +    }
37338 +}
37339 +
37340 +/*********************** End of API routines ************************/
37341 +
37342 +
37343 --- /dev/null
37344 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.h
37345 @@ -0,0 +1,101 @@
37346 +/*
37347 + * Copyright 2008-2012 Freescale Semiconductor Inc.
37348 + *
37349 + * Redistribution and use in source and binary forms, with or without
37350 + * modification, are permitted provided that the following conditions are met:
37351 + *     * Redistributions of source code must retain the above copyright
37352 + *       notice, this list of conditions and the following disclaimer.
37353 + *     * Redistributions in binary form must reproduce the above copyright
37354 + *       notice, this list of conditions and the following disclaimer in the
37355 + *       documentation and/or other materials provided with the distribution.
37356 + *     * Neither the name of Freescale Semiconductor nor the
37357 + *       names of its contributors may be used to endorse or promote products
37358 + *       derived from this software without specific prior written permission.
37359 + *
37360 + *
37361 + * ALTERNATIVELY, this software may be distributed under the terms of the
37362 + * GNU General Public License ("GPL") as published by the Free Software
37363 + * Foundation, either version 2 of that License or (at your option) any
37364 + * later version.
37365 + *
37366 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
37367 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
37368 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37369 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
37370 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37371 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37372 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37373 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37374 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
37375 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37376 + */
37377 +
37378 +
37379 +/******************************************************************************
37380 + @File          fm_replic.h
37381 +
37382 + @Description   FM frame replicator
37383 +*//***************************************************************************/
37384 +#ifndef __FM_REPLIC_H
37385 +#define __FM_REPLIC_H
37386 +
37387 +#include "std_ext.h"
37388 +#include "error_ext.h"
37389 +
37390 +
37391 +#define FRM_REPLIC_SOURCE_TD_OPCODE           0x75
37392 +#define NEXT_FRM_REPLIC_ADDR_SHIFT            4
37393 +#define NEXT_FRM_REPLIC_MEMBER_INDEX_SHIFT    16
37394 +#define FRM_REPLIC_FR_BIT                     0x08000000
37395 +#define FRM_REPLIC_NL_BIT                     0x10000000
37396 +#define FRM_REPLIC_INVALID_MEMBER_INDEX       0xffff
37397 +#define FRM_REPLIC_FIRST_MEMBER_INDEX         0
37398 +
37399 +#define FRM_REPLIC_MIDDLE_MEMBER_INDEX        1
37400 +#define FRM_REPLIC_LAST_MEMBER_INDEX          2
37401 +
37402 +#define SOURCE_TD_ITSELF_OPTION               0x01
37403 +#define SOURCE_TD_COPY_OPTION                 0x02
37404 +#define SOURCE_TD_ITSELF_AND_COPY_OPTION      SOURCE_TD_ITSELF_OPTION | SOURCE_TD_COPY_OPTION
37405 +#define SOURCE_TD_NONE                        0x04
37406 +
37407 +/*typedef enum e_SourceTdOption
37408 +{
37409 +    e_SOURCE_TD_NONE = 0,
37410 +    e_SOURCE_TD_ITSELF_OPTION = 1,
37411 +    e_SOURCE_TD_COPY_OPTION = 2,
37412 +    e_SOURCE_TD_ITSELF_AND_COPY_OPTION = e_SOURCE_TD_ITSELF_OPTION | e_SOURCE_TD_COPY_OPTION
37413 +} e_SourceTdOption;
37414 +*/
37415 +
37416 +typedef struct
37417 +{
37418 +    volatile uint32_t type;
37419 +    volatile uint32_t frGroupPointer;
37420 +    volatile uint32_t operationCode;
37421 +    volatile uint32_t reserved;
37422 +} t_FrmReplicGroupSourceAd;
37423 +
37424 +typedef struct t_FmPcdFrmReplicMember
37425 +{
37426 +    void                        *p_MemberAd;    /**< pointer to the member AD */
37427 +    void                        *p_StatisticsAd;/**< pointer to the statistics AD of the member */
37428 +    t_Handle                    h_Manip;        /**< manip handle - need for free routines */
37429 +    t_List                      node;
37430 +} t_FmPcdFrmReplicMember;
37431 +
37432 +typedef struct t_FmPcdFrmReplicGroup
37433 +{
37434 +    t_Handle                    h_FmPcd;
37435 +
37436 +    uint8_t                     maxNumOfEntries;/**< maximal number of members in the group */
37437 +    uint8_t                     numOfEntries;   /**< actual number of members in the group */
37438 +    uint16_t                    owners;         /**< how many keys share this frame replicator group */
37439 +    void                        *p_SourceTd;     /**< pointer to the frame replicator source table descriptor */
37440 +    t_List                      membersList;    /**< the members list - should reflect the order of the members as in the hw linked list*/
37441 +    t_List                      availableMembersList;/**< list of all the available members in the group */
37442 +    t_FmPcdLock                 *p_Lock;
37443 +} t_FmPcdFrmReplicGroup;
37444 +
37445 +
37446 +#endif /* __FM_REPLIC_H */
37447 --- /dev/null
37448 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_kg.c
37449 @@ -0,0 +1,888 @@
37450 +/*
37451 + * Copyright 2008-2012 Freescale Semiconductor Inc.
37452 + *
37453 + * Redistribution and use in source and binary forms, with or without
37454 + * modification, are permitted provided that the following conditions are met:
37455 + *     * Redistributions of source code must retain the above copyright
37456 + *      notice, this list of conditions and the following disclaimer.
37457 + *     * Redistributions in binary form must reproduce the above copyright
37458 + *      notice, this list of conditions and the following disclaimer in the
37459 + *      documentation and/or other materials provided with the distribution.
37460 + *     * Neither the name of Freescale Semiconductor nor the
37461 + *      names of its contributors may be used to endorse or promote products
37462 + *      derived from this software without specific prior written permission.
37463 + *
37464 + *
37465 + * ALTERNATIVELY, this software may be distributed under the terms of the
37466 + * GNU General Public License ("GPL") as published by the Free Software
37467 + * Foundation, either version 2 of that License or (at your option) any
37468 + * later version.
37469 + *
37470 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
37471 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
37472 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37473 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
37474 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37475 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37476 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37477 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37478 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
37479 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37480 + */
37481 +
37482 +#include "fsl_fman_kg.h"
37483 +
37484 +/****************************************/
37485 +/*       static functions               */
37486 +/****************************************/
37487 +
37488 +
37489 +static uint32_t build_ar_bind_scheme(uint8_t hwport_id, bool write)
37490 +{
37491 +       uint32_t rw;
37492 +
37493 +       rw = write ? (uint32_t)FM_KG_KGAR_WRITE : (uint32_t)FM_KG_KGAR_READ;
37494 +
37495 +       return (uint32_t)(FM_KG_KGAR_GO |
37496 +                       rw |
37497 +                       FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
37498 +                       hwport_id |
37499 +                       FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP);
37500 +}
37501 +
37502 +static void clear_pe_all_scheme(struct fman_kg_regs *regs, uint8_t hwport_id)
37503 +{
37504 +       uint32_t ar;
37505 +
37506 +       fman_kg_write_sp(regs, 0xffffffff, 0);
37507 +
37508 +       ar = build_ar_bind_scheme(hwport_id, TRUE);
37509 +       fman_kg_write_ar_wait(regs, ar);
37510 +}
37511 +
37512 +static uint32_t build_ar_bind_cls_plan(uint8_t hwport_id, bool write)
37513 +{
37514 +       uint32_t rw;
37515 +
37516 +       rw = write ? (uint32_t)FM_KG_KGAR_WRITE : (uint32_t)FM_KG_KGAR_READ;
37517 +
37518 +       return (uint32_t)(FM_KG_KGAR_GO |
37519 +                       rw |
37520 +                       FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
37521 +                       hwport_id |
37522 +                       FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP);
37523 +}
37524 +
37525 +static void clear_pe_all_cls_plan(struct fman_kg_regs *regs, uint8_t hwport_id)
37526 +{
37527 +       uint32_t ar;
37528 +
37529 +       fman_kg_write_cpp(regs, 0);
37530 +
37531 +       ar = build_ar_bind_cls_plan(hwport_id, TRUE);
37532 +       fman_kg_write_ar_wait(regs, ar);
37533 +}
37534 +
37535 +static uint8_t get_gen_ht_code(enum fman_kg_gen_extract_src src,
37536 +                               bool no_validation,
37537 +                               uint8_t *offset)
37538 +{
37539 +       int     code;
37540 +
37541 +       switch (src) {
37542 +       case E_FMAN_KG_GEN_EXTRACT_ETH:
37543 +               code = no_validation ? 0x73 : 0x3;
37544 +               break;
37545 +
37546 +       case E_FMAN_KG_GEN_EXTRACT_ETYPE:
37547 +               code = no_validation ? 0x77 : 0x7;
37548 +               break;
37549 +
37550 +       case E_FMAN_KG_GEN_EXTRACT_SNAP:
37551 +               code = no_validation ? 0x74 : 0x4;
37552 +               break;
37553 +
37554 +       case E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_1:
37555 +               code = no_validation ? 0x75 : 0x5;
37556 +               break;
37557 +
37558 +       case E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_N:
37559 +               code = no_validation ? 0x76 : 0x6;
37560 +               break;
37561 +
37562 +       case E_FMAN_KG_GEN_EXTRACT_PPPoE:
37563 +               code = no_validation ? 0x78 : 0x8;
37564 +               break;
37565 +
37566 +       case E_FMAN_KG_GEN_EXTRACT_MPLS_1:
37567 +               code = no_validation ? 0x79 : 0x9;
37568 +               break;
37569 +
37570 +       case E_FMAN_KG_GEN_EXTRACT_MPLS_2:
37571 +               code = no_validation ? FM_KG_SCH_GEN_HT_INVALID : 0x19;
37572 +               break;
37573 +
37574 +       case E_FMAN_KG_GEN_EXTRACT_MPLS_3:
37575 +               code = no_validation ? FM_KG_SCH_GEN_HT_INVALID : 0x29;
37576 +               break;
37577 +
37578 +       case E_FMAN_KG_GEN_EXTRACT_MPLS_N:
37579 +               code = no_validation ? 0x7a : 0xa;
37580 +               break;
37581 +
37582 +       case E_FMAN_KG_GEN_EXTRACT_IPv4_1:
37583 +               code = no_validation ? 0x7b : 0xb;
37584 +               break;
37585 +
37586 +       case E_FMAN_KG_GEN_EXTRACT_IPv6_1:
37587 +               code = no_validation ? 0x7b : 0x1b;
37588 +               break;
37589 +
37590 +       case E_FMAN_KG_GEN_EXTRACT_IPv4_2:
37591 +               code = no_validation ? 0x7c : 0xc;
37592 +               break;
37593 +
37594 +       case E_FMAN_KG_GEN_EXTRACT_IPv6_2:
37595 +               code = no_validation ? 0x7c : 0x1c;
37596 +               break;
37597 +
37598 +       case E_FMAN_KG_GEN_EXTRACT_MINENCAP:
37599 +               code = no_validation ? 0x7c : 0x2c;
37600 +               break;
37601 +
37602 +       case E_FMAN_KG_GEN_EXTRACT_IP_PID:
37603 +               code = no_validation ? 0x72 : 0x2;
37604 +               break;
37605 +
37606 +       case E_FMAN_KG_GEN_EXTRACT_GRE:
37607 +               code = no_validation ? 0x7d : 0xd;
37608 +               break;
37609 +
37610 +       case E_FMAN_KG_GEN_EXTRACT_TCP:
37611 +               code = no_validation ? 0x7e : 0xe;
37612 +               break;
37613 +
37614 +       case E_FMAN_KG_GEN_EXTRACT_UDP:
37615 +               code = no_validation ? 0x7e : 0x1e;
37616 +               break;
37617 +
37618 +       case E_FMAN_KG_GEN_EXTRACT_SCTP:
37619 +               code = no_validation ? 0x7e : 0x3e;
37620 +               break;
37621 +
37622 +       case E_FMAN_KG_GEN_EXTRACT_DCCP:
37623 +               code = no_validation ? 0x7e : 0x4e;
37624 +               break;
37625 +
37626 +       case E_FMAN_KG_GEN_EXTRACT_IPSEC_AH:
37627 +               code = no_validation ? 0x7e : 0x2e;
37628 +               break;
37629 +
37630 +       case E_FMAN_KG_GEN_EXTRACT_IPSEC_ESP:
37631 +               code = no_validation ? 0x7e : 0x6e;
37632 +               break;
37633 +
37634 +       case E_FMAN_KG_GEN_EXTRACT_SHIM_1:
37635 +               code = 0x70;
37636 +               break;
37637 +
37638 +       case E_FMAN_KG_GEN_EXTRACT_SHIM_2:
37639 +               code = 0x71;
37640 +               break;
37641 +
37642 +       case E_FMAN_KG_GEN_EXTRACT_FROM_DFLT:
37643 +               code = 0x10;
37644 +               break;
37645 +
37646 +       case E_FMAN_KG_GEN_EXTRACT_FROM_FRAME_START:
37647 +               code = 0x40;
37648 +               break;
37649 +
37650 +       case E_FMAN_KG_GEN_EXTRACT_FROM_PARSE_RESULT:
37651 +               code = 0x20;
37652 +               break;
37653 +
37654 +       case E_FMAN_KG_GEN_EXTRACT_FROM_END_OF_PARSE:
37655 +               code = 0x7f;
37656 +               break;
37657 +
37658 +       case E_FMAN_KG_GEN_EXTRACT_FROM_FQID:
37659 +               code = 0x20;
37660 +               *offset += 0x20;
37661 +               break;
37662 +
37663 +       default:
37664 +               code = FM_KG_SCH_GEN_HT_INVALID;
37665 +       }
37666 +
37667 +       return (uint8_t)code;
37668 +}
37669 +
37670 +static uint32_t build_ar_scheme(uint8_t scheme,
37671 +                               uint8_t hwport_id,
37672 +                               bool update_counter,
37673 +                               bool write)
37674 +{
37675 +       uint32_t rw;
37676 +
37677 +       rw = (uint32_t)(write ? FM_KG_KGAR_WRITE : FM_KG_KGAR_READ);
37678 +
37679 +       return (uint32_t)(FM_KG_KGAR_GO |
37680 +                       rw |
37681 +                       FM_KG_KGAR_SEL_SCHEME_ENTRY |
37682 +                       hwport_id |
37683 +                       ((uint32_t)scheme << FM_KG_KGAR_NUM_SHIFT) |
37684 +                       (update_counter ? FM_KG_KGAR_SCM_WSEL_UPDATE_CNT : 0));
37685 +}
37686 +
37687 +static uint32_t build_ar_cls_plan(uint8_t grp,
37688 +                                       uint8_t entries_mask,
37689 +                                       uint8_t hwport_id,
37690 +                                       bool write)
37691 +{
37692 +       uint32_t rw;
37693 +
37694 +       rw = (uint32_t)(write ? FM_KG_KGAR_WRITE : FM_KG_KGAR_READ);
37695 +
37696 +       return (uint32_t)(FM_KG_KGAR_GO |
37697 +                       rw |
37698 +                       FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
37699 +                       hwport_id |
37700 +                       ((uint32_t)grp << FM_KG_KGAR_NUM_SHIFT) |
37701 +                       ((uint32_t)entries_mask << FM_KG_KGAR_WSEL_SHIFT));
37702 +}
37703 +
37704 +int fman_kg_write_ar_wait(struct fman_kg_regs *regs, uint32_t fmkg_ar)
37705 +{
37706 +       iowrite32be(fmkg_ar, &regs->fmkg_ar);
37707 +       /* Wait for GO to be idle and read error */
37708 +       while ((fmkg_ar = ioread32be(&regs->fmkg_ar)) & FM_KG_KGAR_GO) ;
37709 +       if (fmkg_ar & FM_PCD_KG_KGAR_ERR)
37710 +               return -EINVAL;
37711 +       return 0;
37712 +}
37713 +
37714 +void fman_kg_write_sp(struct fman_kg_regs *regs, uint32_t sp, bool add)
37715 +{
37716 +
37717 +       struct fman_kg_pe_regs *kgpe_regs;
37718 +       uint32_t tmp;
37719 +
37720 +       kgpe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
37721 +       tmp = ioread32be(&kgpe_regs->fmkg_pe_sp);
37722 +
37723 +       if (add)
37724 +               tmp |= sp;
37725 +       else /* clear */
37726 +               tmp &= ~sp;
37727 +
37728 +       iowrite32be(tmp, &kgpe_regs->fmkg_pe_sp);
37729 +
37730 +}
37731 +
37732 +void fman_kg_write_cpp(struct fman_kg_regs *regs, uint32_t cpp)
37733 +{
37734 +       struct fman_kg_pe_regs *kgpe_regs;
37735 +
37736 +       kgpe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
37737 +
37738 +       iowrite32be(cpp, &kgpe_regs->fmkg_pe_cpp);
37739 +}
37740 +
37741 +void fman_kg_get_event(struct fman_kg_regs *regs,
37742 +                       uint32_t *event,
37743 +                       uint32_t *scheme_idx)
37744 +{
37745 +       uint32_t mask, force;
37746 +
37747 +       *event = ioread32be(&regs->fmkg_eer);
37748 +       mask = ioread32be(&regs->fmkg_eeer);
37749 +       *scheme_idx = ioread32be(&regs->fmkg_seer);
37750 +       *scheme_idx &= ioread32be(&regs->fmkg_seeer);
37751 +
37752 +       *event &= mask;
37753 +
37754 +       /* clear the forced events */
37755 +       force = ioread32be(&regs->fmkg_feer);
37756 +       if (force & *event)
37757 +               iowrite32be(force & ~*event ,&regs->fmkg_feer);
37758 +
37759 +       iowrite32be(*event, &regs->fmkg_eer);
37760 +       iowrite32be(*scheme_idx, &regs->fmkg_seer);
37761 +}
37762 +
37763 +
37764 +void fman_kg_init(struct fman_kg_regs *regs,
37765 +                       uint32_t exceptions,
37766 +                       uint32_t dflt_nia)
37767 +{
37768 +       uint32_t tmp;
37769 +       int i;
37770 +
37771 +       iowrite32be(FM_EX_KG_DOUBLE_ECC | FM_EX_KG_KEYSIZE_OVERFLOW,
37772 +                       &regs->fmkg_eer);
37773 +
37774 +       tmp = 0;
37775 +       if (exceptions & FM_EX_KG_DOUBLE_ECC)
37776 +               tmp |= FM_EX_KG_DOUBLE_ECC;
37777 +
37778 +       if (exceptions & FM_EX_KG_KEYSIZE_OVERFLOW)
37779 +               tmp |= FM_EX_KG_KEYSIZE_OVERFLOW;
37780 +
37781 +       iowrite32be(tmp, &regs->fmkg_eeer);
37782 +       iowrite32be(0, &regs->fmkg_fdor);
37783 +       iowrite32be(0, &regs->fmkg_gdv0r);
37784 +       iowrite32be(0, &regs->fmkg_gdv1r);
37785 +       iowrite32be(dflt_nia, &regs->fmkg_gcr);
37786 +
37787 +       /* Clear binding between ports to schemes and classification plans
37788 +        * so that all ports are not bound to any scheme/classification plan */
37789 +       for (i = 0; i < FMAN_MAX_NUM_OF_HW_PORTS; i++) {
37790 +               clear_pe_all_scheme(regs, (uint8_t)i);
37791 +               clear_pe_all_cls_plan(regs, (uint8_t)i);
37792 +       }
37793 +}
37794 +
37795 +void fman_kg_enable_scheme_interrupts(struct fman_kg_regs *regs)
37796 +{
37797 +       /* enable and enable all scheme interrupts */
37798 +       iowrite32be(0xFFFFFFFF, &regs->fmkg_seer);
37799 +       iowrite32be(0xFFFFFFFF, &regs->fmkg_seeer);
37800 +}
37801 +
37802 +void fman_kg_enable(struct fman_kg_regs *regs)
37803 +{
37804 +       iowrite32be(ioread32be(&regs->fmkg_gcr) | FM_KG_KGGCR_EN,
37805 +                       &regs->fmkg_gcr);
37806 +}
37807 +
37808 +void fman_kg_disable(struct fman_kg_regs *regs)
37809 +{
37810 +       iowrite32be(ioread32be(&regs->fmkg_gcr) & ~FM_KG_KGGCR_EN,
37811 +                       &regs->fmkg_gcr);
37812 +}
37813 +
37814 +void fman_kg_set_data_after_prs(struct fman_kg_regs *regs, uint8_t offset)
37815 +{
37816 +       iowrite32be(offset, &regs->fmkg_fdor);
37817 +}
37818 +
37819 +void fman_kg_set_dflt_val(struct fman_kg_regs *regs,
37820 +                               uint8_t def_id,
37821 +                               uint32_t val)
37822 +{
37823 +       if(def_id == 0)
37824 +               iowrite32be(val, &regs->fmkg_gdv0r);
37825 +       else
37826 +               iowrite32be(val, &regs->fmkg_gdv1r);
37827 +}
37828 +
37829 +
37830 +void fman_kg_set_exception(struct fman_kg_regs *regs,
37831 +                               uint32_t exception,
37832 +                               bool enable)
37833 +{
37834 +       uint32_t tmp;
37835 +
37836 +       tmp = ioread32be(&regs->fmkg_eeer);
37837 +
37838 +       if (enable) {
37839 +               tmp |= exception;
37840 +       } else {
37841 +               tmp &= ~exception;
37842 +       }
37843 +
37844 +       iowrite32be(tmp, &regs->fmkg_eeer);
37845 +}
37846 +
37847 +void fman_kg_get_exception(struct fman_kg_regs *regs,
37848 +                               uint32_t *events,
37849 +                               uint32_t *scheme_ids,
37850 +                               bool clear)
37851 +{
37852 +       uint32_t mask;
37853 +
37854 +       *events = ioread32be(&regs->fmkg_eer);
37855 +       mask = ioread32be(&regs->fmkg_eeer);
37856 +       *events &= mask;
37857 +
37858 +       *scheme_ids = 0;
37859 +
37860 +       if (*events & FM_EX_KG_KEYSIZE_OVERFLOW) {
37861 +               *scheme_ids = ioread32be(&regs->fmkg_seer);
37862 +               mask = ioread32be(&regs->fmkg_seeer);
37863 +               *scheme_ids &= mask;
37864 +       }
37865 +
37866 +       if (clear) {
37867 +               iowrite32be(*scheme_ids, &regs->fmkg_seer);
37868 +               iowrite32be(*events, &regs->fmkg_eer);
37869 +       }
37870 +}
37871 +
37872 +void fman_kg_get_capture(struct fman_kg_regs *regs,
37873 +                               struct fman_kg_ex_ecc_attr *ecc_attr,
37874 +                               bool clear)
37875 +{
37876 +       uint32_t tmp;
37877 +
37878 +       tmp = ioread32be(&regs->fmkg_serc);
37879 +
37880 +       if (tmp & KG_FMKG_SERC_CAP) {
37881 +               /* Captured data is valid */
37882 +               ecc_attr->valid = TRUE;
37883 +               ecc_attr->double_ecc =
37884 +                       (bool)((tmp & KG_FMKG_SERC_CET) ? TRUE : FALSE);
37885 +               ecc_attr->single_ecc_count =
37886 +                       (uint8_t)((tmp & KG_FMKG_SERC_CNT_MSK) >>
37887 +                                       KG_FMKG_SERC_CNT_SHIFT);
37888 +               ecc_attr->addr = (uint16_t)(tmp & KG_FMKG_SERC_ADDR_MSK);
37889 +
37890 +               if (clear)
37891 +                       iowrite32be(KG_FMKG_SERC_CAP, &regs->fmkg_serc);
37892 +       } else {
37893 +               /* No ECC error is captured */
37894 +               ecc_attr->valid = FALSE;
37895 +       }
37896 +}
37897 +
37898 +int fman_kg_build_scheme(struct fman_kg_scheme_params *params,
37899 +                               struct fman_kg_scheme_regs *scheme_regs)
37900 +{
37901 +       struct fman_kg_extract_params *extract_params;
37902 +       struct fman_kg_gen_extract_params *gen_params;
37903 +       uint32_t tmp_reg, i, select, mask, fqb;
37904 +       uint8_t offset, shift, ht;
37905 +
37906 +       /* Zero out all registers so no need to care about unused ones */
37907 +       memset(scheme_regs, 0, sizeof(struct fman_kg_scheme_regs));
37908 +
37909 +       /* Mode register */
37910 +       tmp_reg = fm_kg_build_nia(params->next_engine,
37911 +                       params->next_engine_action);
37912 +       if (tmp_reg == KG_NIA_INVALID) {
37913 +               return -EINVAL;
37914 +       }
37915 +
37916 +       if (params->next_engine == E_FMAN_PCD_PLCR) {
37917 +               tmp_reg |= FMAN_KG_SCH_MODE_NIA_PLCR;
37918 +       }
37919 +       else if (params->next_engine == E_FMAN_PCD_CC) {
37920 +               tmp_reg |= (uint32_t)params->cc_params.base_offset <<
37921 +                               FMAN_KG_SCH_MODE_CCOBASE_SHIFT;
37922 +       }
37923 +
37924 +       tmp_reg |= FMAN_KG_SCH_MODE_EN;
37925 +       scheme_regs->kgse_mode = tmp_reg;
37926 +
37927 +       /* Match vector */
37928 +       scheme_regs->kgse_mv = params->match_vector;
37929 +
37930 +       extract_params = &params->extract_params;
37931 +
37932 +       /* Scheme default values registers */
37933 +       scheme_regs->kgse_dv0 = extract_params->def_scheme_0;
37934 +       scheme_regs->kgse_dv1 = extract_params->def_scheme_1;
37935 +
37936 +       /* Extract Known Fields Command register */
37937 +       scheme_regs->kgse_ekfc = extract_params->known_fields;
37938 +
37939 +       /* Entry Extract Known Default Value register */
37940 +       tmp_reg = 0;
37941 +       tmp_reg |= extract_params->known_fields_def.mac_addr <<
37942 +                       FMAN_KG_SCH_DEF_MAC_ADDR_SHIFT;
37943 +       tmp_reg |= extract_params->known_fields_def.vlan_tci <<
37944 +                       FMAN_KG_SCH_DEF_VLAN_TCI_SHIFT;
37945 +       tmp_reg |= extract_params->known_fields_def.etype <<
37946 +                       FMAN_KG_SCH_DEF_ETYPE_SHIFT;
37947 +       tmp_reg |= extract_params->known_fields_def.ppp_sid <<
37948 +                       FMAN_KG_SCH_DEF_PPP_SID_SHIFT;
37949 +       tmp_reg |= extract_params->known_fields_def.ppp_pid <<
37950 +                       FMAN_KG_SCH_DEF_PPP_PID_SHIFT;
37951 +       tmp_reg |= extract_params->known_fields_def.mpls <<
37952 +                       FMAN_KG_SCH_DEF_MPLS_SHIFT;
37953 +       tmp_reg |= extract_params->known_fields_def.ip_addr <<
37954 +                       FMAN_KG_SCH_DEF_IP_ADDR_SHIFT;
37955 +       tmp_reg |= extract_params->known_fields_def.ptype <<
37956 +                       FMAN_KG_SCH_DEF_PTYPE_SHIFT;
37957 +       tmp_reg |= extract_params->known_fields_def.ip_tos_tc <<
37958 +                       FMAN_KG_SCH_DEF_IP_TOS_TC_SHIFT;
37959 +       tmp_reg |= extract_params->known_fields_def.ipv6_fl <<
37960 +                       FMAN_KG_SCH_DEF_IPv6_FL_SHIFT;
37961 +       tmp_reg |= extract_params->known_fields_def.ipsec_spi <<
37962 +                       FMAN_KG_SCH_DEF_IPSEC_SPI_SHIFT;
37963 +       tmp_reg |= extract_params->known_fields_def.l4_port <<
37964 +                       FMAN_KG_SCH_DEF_L4_PORT_SHIFT;
37965 +       tmp_reg |= extract_params->known_fields_def.tcp_flg <<
37966 +                       FMAN_KG_SCH_DEF_TCP_FLG_SHIFT;
37967 +
37968 +       scheme_regs->kgse_ekdv = tmp_reg;
37969 +
37970 +       /* Generic extract registers */
37971 +       if (extract_params->gen_extract_num > FM_KG_NUM_OF_GENERIC_REGS) {
37972 +               return -EINVAL;
37973 +       }
37974 +
37975 +       for (i = 0; i < extract_params->gen_extract_num; i++) {
37976 +               gen_params = extract_params->gen_extract + i;
37977 +
37978 +               tmp_reg = FMAN_KG_SCH_GEN_VALID;
37979 +               tmp_reg |= (uint32_t)gen_params->def_val <<
37980 +                               FMAN_KG_SCH_GEN_DEF_SHIFT;
37981 +
37982 +               if (gen_params->type == E_FMAN_KG_HASH_EXTRACT) {
37983 +                       if ((gen_params->extract > FMAN_KG_SCH_GEN_SIZE_MAX) ||
37984 +                                       (gen_params->extract == 0)) {
37985 +                               return -EINVAL;
37986 +                       }
37987 +               } else {
37988 +                       tmp_reg |= FMAN_KG_SCH_GEN_OR;
37989 +               }
37990 +
37991 +               tmp_reg |= (uint32_t)gen_params->extract <<
37992 +                               FMAN_KG_SCH_GEN_SIZE_SHIFT;
37993 +               tmp_reg |= (uint32_t)gen_params->mask <<
37994 +                               FMAN_KG_SCH_GEN_MASK_SHIFT;
37995 +
37996 +               offset = gen_params->offset;
37997 +               ht = get_gen_ht_code(gen_params->src,
37998 +                               gen_params->no_validation,
37999 +                               &offset);
38000 +               tmp_reg |= (uint32_t)ht << FMAN_KG_SCH_GEN_HT_SHIFT;
38001 +               tmp_reg |= offset;
38002 +
38003 +               scheme_regs->kgse_gec[i] = tmp_reg;
38004 +       }
38005 +
38006 +       /* Masks registers */
38007 +       if (extract_params->masks_num > FM_KG_EXTRACT_MASKS_NUM) {
38008 +               return -EINVAL;
38009 +       }
38010 +
38011 +       select = 0;
38012 +       mask = 0;
38013 +       fqb = 0;
38014 +       for (i = 0; i < extract_params->masks_num; i++) {
38015 +               /* MCSx fields */
38016 +               KG_GET_MASK_SEL_SHIFT(shift, i);
38017 +               if (extract_params->masks[i].is_known) {
38018 +                       /* Mask known field */
38019 +                       select |= extract_params->masks[i].field_or_gen_idx <<
38020 +                                       shift;
38021 +               } else {
38022 +                       /* Mask generic extract */
38023 +                       select |= (extract_params->masks[i].field_or_gen_idx +
38024 +                                       FM_KG_MASK_SEL_GEN_BASE) << shift;
38025 +               }
38026 +
38027 +               /* MOx fields - spread between se_bmch and se_fqb registers */
38028 +               KG_GET_MASK_OFFSET_SHIFT(shift, i);
38029 +               if (i < 2) {
38030 +                       select |= (uint32_t)extract_params->masks[i].offset <<
38031 +                                       shift;
38032 +               } else {
38033 +                       fqb |= (uint32_t)extract_params->masks[i].offset <<
38034 +                                       shift;
38035 +               }
38036 +
38037 +               /* BMx fields */
38038 +               KG_GET_MASK_SHIFT(shift, i);
38039 +               mask |= (uint32_t)extract_params->masks[i].mask << shift;
38040 +       }
38041 +
38042 +       /* Finish with rest of BMx fileds -
38043 +        * don't mask bits for unused masks by setting
38044 +        * corresponding BMx field = 0xFF */
38045 +       for (i = extract_params->masks_num; i < FM_KG_EXTRACT_MASKS_NUM; i++) {
38046 +               KG_GET_MASK_SHIFT(shift, i);
38047 +               mask |= 0xFF << shift;
38048 +       }
38049 +
38050 +       scheme_regs->kgse_bmch = select;
38051 +       scheme_regs->kgse_bmcl = mask;
38052 +
38053 +       /* Finish with FQB register initialization.
38054 +        * Check fqid is 24-bit value. */
38055 +       if (params->base_fqid & ~0x00FFFFFF) {
38056 +               return -EINVAL;
38057 +       }
38058 +
38059 +       fqb |= params->base_fqid;
38060 +       scheme_regs->kgse_fqb = fqb;
38061 +
38062 +       /* Hash Configuration register */
38063 +       tmp_reg = 0;
38064 +       if (params->hash_params.use_hash) {
38065 +               /* Check hash mask is 24-bit value */
38066 +               if (params->hash_params.mask & ~0x00FFFFFF) {
38067 +                       return -EINVAL;
38068 +               }
38069 +
38070 +               /* Hash function produces 64-bit value, 24 bits of that
38071 +                * are used to generate fq_id and policer profile.
38072 +                * Thus, maximal shift is 40 bits to allow 24 bits out of 64.
38073 +                */
38074 +               if (params->hash_params.shift_r > FMAN_KG_SCH_HASH_HSHIFT_MAX) {
38075 +                       return -EINVAL;
38076 +               }
38077 +
38078 +               tmp_reg |= params->hash_params.mask;
38079 +               tmp_reg |= (uint32_t)params->hash_params.shift_r <<
38080 +                               FMAN_KG_SCH_HASH_HSHIFT_SHIFT;
38081 +
38082 +               if (params->hash_params.sym) {
38083 +                       tmp_reg |= FMAN_KG_SCH_HASH_SYM;
38084 +               }
38085 +
38086 +       }
38087 +
38088 +       if (params->bypass_fqid_gen) {
38089 +               tmp_reg |= FMAN_KG_SCH_HASH_NO_FQID_GEN;
38090 +       }
38091 +
38092 +       scheme_regs->kgse_hc = tmp_reg;
38093 +
38094 +       /* Policer Profile register */
38095 +       if (params->policer_params.bypass_pp_gen) {
38096 +               tmp_reg = 0;
38097 +       } else {
38098 +               /* Lower 8 bits of 24-bits extracted from hash result
38099 +                * are used for policer profile generation.
38100 +                * That leaves maximum shift value = 23. */
38101 +               if (params->policer_params.shift > FMAN_KG_SCH_PP_SHIFT_MAX) {
38102 +                       return -EINVAL;
38103 +               }
38104 +
38105 +               tmp_reg = params->policer_params.base;
38106 +               tmp_reg |= ((uint32_t)params->policer_params.shift <<
38107 +                               FMAN_KG_SCH_PP_SH_SHIFT) &
38108 +                               FMAN_KG_SCH_PP_SH_MASK;
38109 +               tmp_reg |= ((uint32_t)params->policer_params.shift <<
38110 +                               FMAN_KG_SCH_PP_SL_SHIFT) &
38111 +                               FMAN_KG_SCH_PP_SL_MASK;
38112 +               tmp_reg |= (uint32_t)params->policer_params.mask <<
38113 +                               FMAN_KG_SCH_PP_MASK_SHIFT;
38114 +       }
38115 +
38116 +       scheme_regs->kgse_ppc = tmp_reg;
38117 +
38118 +       /* Coarse Classification Bit Select register */
38119 +       if (params->next_engine == E_FMAN_PCD_CC) {
38120 +               scheme_regs->kgse_ccbs = params->cc_params.qlcv_bits_sel;
38121 +       }
38122 +
38123 +       /* Packets Counter register */
38124 +       if (params->update_counter) {
38125 +               scheme_regs->kgse_spc = params->counter_value;
38126 +       }
38127 +
38128 +       return 0;
38129 +}
38130 +
38131 +int fman_kg_write_scheme(struct fman_kg_regs *regs,
38132 +                               uint8_t scheme_id,
38133 +                               uint8_t hwport_id,
38134 +                               struct fman_kg_scheme_regs *scheme_regs,
38135 +                               bool update_counter)
38136 +{
38137 +       struct fman_kg_scheme_regs *kgse_regs;
38138 +       uint32_t tmp_reg;
38139 +       int err, i;
38140 +
38141 +       /* Write indirect scheme registers */
38142 +       kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
38143 +
38144 +       iowrite32be(scheme_regs->kgse_mode, &kgse_regs->kgse_mode);
38145 +       iowrite32be(scheme_regs->kgse_ekfc, &kgse_regs->kgse_ekfc);
38146 +       iowrite32be(scheme_regs->kgse_ekdv, &kgse_regs->kgse_ekdv);
38147 +       iowrite32be(scheme_regs->kgse_bmch, &kgse_regs->kgse_bmch);
38148 +       iowrite32be(scheme_regs->kgse_bmcl, &kgse_regs->kgse_bmcl);
38149 +       iowrite32be(scheme_regs->kgse_fqb, &kgse_regs->kgse_fqb);
38150 +       iowrite32be(scheme_regs->kgse_hc, &kgse_regs->kgse_hc);
38151 +       iowrite32be(scheme_regs->kgse_ppc, &kgse_regs->kgse_ppc);
38152 +       iowrite32be(scheme_regs->kgse_spc, &kgse_regs->kgse_spc);
38153 +       iowrite32be(scheme_regs->kgse_dv0, &kgse_regs->kgse_dv0);
38154 +       iowrite32be(scheme_regs->kgse_dv1, &kgse_regs->kgse_dv1);
38155 +       iowrite32be(scheme_regs->kgse_ccbs, &kgse_regs->kgse_ccbs);
38156 +       iowrite32be(scheme_regs->kgse_mv, &kgse_regs->kgse_mv);
38157 +
38158 +       for (i = 0 ; i < FM_KG_NUM_OF_GENERIC_REGS ; i++)
38159 +               iowrite32be(scheme_regs->kgse_gec[i], &kgse_regs->kgse_gec[i]);
38160 +
38161 +       /* Write AR (Action register) */
38162 +       tmp_reg = build_ar_scheme(scheme_id, hwport_id, update_counter, TRUE);
38163 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38164 +       return err;
38165 +}
38166 +
38167 +int fman_kg_delete_scheme(struct fman_kg_regs *regs,
38168 +                               uint8_t scheme_id,
38169 +                               uint8_t hwport_id)
38170 +{
38171 +       struct fman_kg_scheme_regs *kgse_regs;
38172 +       uint32_t tmp_reg;
38173 +       int err, i;
38174 +
38175 +       kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
38176 +
38177 +       /* Clear all registers including enable bit in mode register */
38178 +       for (i = 0; i < (sizeof(struct fman_kg_scheme_regs)) / 4; ++i) {
38179 +               iowrite32be(0, ((uint32_t *)kgse_regs + i));
38180 +       }
38181 +
38182 +       /* Write AR (Action register) */
38183 +       tmp_reg = build_ar_scheme(scheme_id, hwport_id, FALSE, TRUE);
38184 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38185 +       return err;
38186 +}
38187 +
38188 +int fman_kg_get_scheme_counter(struct fman_kg_regs *regs,
38189 +                               uint8_t scheme_id,
38190 +                               uint8_t hwport_id,
38191 +                               uint32_t *counter)
38192 +{
38193 +       struct fman_kg_scheme_regs  *kgse_regs;
38194 +       uint32_t                    tmp_reg;
38195 +       int                         err;
38196 +
38197 +       kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
38198 +
38199 +       tmp_reg = build_ar_scheme(scheme_id, hwport_id, TRUE, FALSE);
38200 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38201 +
38202 +       if (err != 0)
38203 +               return err;
38204 +
38205 +       *counter = ioread32be(&kgse_regs->kgse_spc);
38206 +
38207 +       return 0;
38208 +}
38209 +
38210 +int fman_kg_set_scheme_counter(struct fman_kg_regs *regs,
38211 +                               uint8_t scheme_id,
38212 +                               uint8_t hwport_id,
38213 +                               uint32_t counter)
38214 +{
38215 +       struct fman_kg_scheme_regs *kgse_regs;
38216 +       uint32_t tmp_reg;
38217 +       int err;
38218 +
38219 +       kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
38220 +
38221 +       tmp_reg = build_ar_scheme(scheme_id, hwport_id, TRUE, FALSE);
38222 +
38223 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38224 +       if (err != 0)
38225 +               return err;
38226 +
38227 +       /* Keygen indirect access memory contains all scheme_id registers
38228 +        * by now. Change only counter value. */
38229 +       iowrite32be(counter, &kgse_regs->kgse_spc);
38230 +
38231 +       /* Write back scheme registers */
38232 +       tmp_reg = build_ar_scheme(scheme_id, hwport_id, TRUE, TRUE);
38233 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38234 +
38235 +       return err;
38236 +}
38237 +
38238 +uint32_t fman_kg_get_schemes_total_counter(struct fman_kg_regs *regs)
38239 +{
38240 +    return ioread32be(&regs->fmkg_tpc);
38241 +}
38242 +
38243 +int fman_kg_build_cls_plan(struct fman_kg_cls_plan_params *params,
38244 +                               struct fman_kg_cp_regs *cls_plan_regs)
38245 +{
38246 +       uint8_t entries_set, entry_bit;
38247 +       int i;
38248 +
38249 +       /* Zero out all group's register */
38250 +       memset(cls_plan_regs, 0, sizeof(struct fman_kg_cp_regs));
38251 +
38252 +       /* Go over all classification entries in params->entries_mask and
38253 +        * configure the corresponding cpe register */
38254 +       entries_set = params->entries_mask;
38255 +       for (i = 0; entries_set; i++) {
38256 +               entry_bit = (uint8_t)(0x80 >> i);
38257 +               if ((entry_bit & entries_set) == 0)
38258 +                       continue;
38259 +               entries_set ^= entry_bit;
38260 +               cls_plan_regs->kgcpe[i] = params->mask_vector[i];
38261 +       }
38262 +
38263 +       return 0;
38264 +}
38265 +
38266 +int fman_kg_write_cls_plan(struct fman_kg_regs *regs,
38267 +                               uint8_t grp_id,
38268 +                               uint8_t entries_mask,
38269 +                               uint8_t hwport_id,
38270 +                               struct fman_kg_cp_regs *cls_plan_regs)
38271 +{
38272 +       struct fman_kg_cp_regs *kgcpe_regs;
38273 +       uint32_t tmp_reg;
38274 +       int i, err;
38275 +
38276 +       /* Check group index is valid and the group isn't empty */
38277 +       if (grp_id >= FM_KG_CLS_PLAN_GRPS_NUM)
38278 +               return -EINVAL;
38279 +
38280 +       /* Write indirect classification plan registers */
38281 +       kgcpe_regs = (struct fman_kg_cp_regs *)&(regs->fmkg_indirect[0]);
38282 +
38283 +       for (i = 0; i < FM_KG_NUM_CLS_PLAN_ENTR; i++) {
38284 +               iowrite32be(cls_plan_regs->kgcpe[i], &kgcpe_regs->kgcpe[i]);
38285 +       }
38286 +
38287 +       tmp_reg = build_ar_cls_plan(grp_id, entries_mask, hwport_id, TRUE);
38288 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38289 +       return err;
38290 +}
38291 +
38292 +int fman_kg_write_bind_schemes(struct fman_kg_regs *regs,
38293 +                               uint8_t hwport_id,
38294 +                               uint32_t schemes)
38295 +{
38296 +       struct fman_kg_pe_regs *kg_pe_regs;
38297 +       uint32_t tmp_reg;
38298 +       int err;
38299 +
38300 +       kg_pe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
38301 +
38302 +       iowrite32be(schemes, &kg_pe_regs->fmkg_pe_sp);
38303 +
38304 +       tmp_reg = build_ar_bind_scheme(hwport_id, TRUE);
38305 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38306 +       return err;
38307 +}
38308 +
38309 +int fman_kg_build_bind_cls_plans(uint8_t grp_base,
38310 +                                       uint8_t grp_mask,
38311 +                                       uint32_t *bind_cls_plans)
38312 +{
38313 +       /* Check grp_base and grp_mask are 5-bits values */
38314 +       if ((grp_base & ~0x0000001F) || (grp_mask & ~0x0000001F))
38315 +               return -EINVAL;
38316 +
38317 +       *bind_cls_plans = (uint32_t) ((grp_mask << FMAN_KG_PE_CPP_MASK_SHIFT) | grp_base);
38318 +       return 0;
38319 +}
38320 +
38321 +
38322 +int fman_kg_write_bind_cls_plans(struct fman_kg_regs *regs,
38323 +                                       uint8_t hwport_id,
38324 +                                       uint32_t bind_cls_plans)
38325 +{
38326 +       struct fman_kg_pe_regs *kg_pe_regs;
38327 +       uint32_t tmp_reg;
38328 +       int err;
38329 +
38330 +       kg_pe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
38331 +
38332 +       iowrite32be(bind_cls_plans, &kg_pe_regs->fmkg_pe_cpp);
38333 +
38334 +       tmp_reg = build_ar_bind_cls_plan(hwport_id, TRUE);
38335 +       err = fman_kg_write_ar_wait(regs, tmp_reg);
38336 +       return err;
38337 +}
38338 --- /dev/null
38339 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_prs.c
38340 @@ -0,0 +1,129 @@
38341 +/*
38342 + * Copyright 2012 Freescale Semiconductor Inc.
38343 + *
38344 + * Redistribution and use in source and binary forms, with or without
38345 + * modification, are permitted provided that the following conditions are met:
38346 + *     * Redistributions of source code must retain the above copyright
38347 + *      notice, this list of conditions and the following disclaimer.
38348 + *     * Redistributions in binary form must reproduce the above copyright
38349 + *      notice, this list of conditions and the following disclaimer in the
38350 + *      documentation and/or other materials provided with the distribution.
38351 + *     * Neither the name of Freescale Semiconductor nor the
38352 + *      names of its contributors may be used to endorse or promote products
38353 + *      derived from this software without specific prior written permission.
38354 + *
38355 + *
38356 + * ALTERNATIVELY, this software may be distributed under the terms of the
38357 + * GNU General Public License ("GPL") as published by the Free Software
38358 + * Foundation, either version 2 of that License or (at your option) any
38359 + * later version.
38360 + *
38361 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
38362 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
38363 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
38364 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
38365 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38366 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38367 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38368 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38369 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
38370 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38371 + */
38372 +
38373 +#include "fsl_fman_prs.h"
38374 +
38375 +uint32_t fman_prs_get_err_event(struct fman_prs_regs *regs, uint32_t ev_mask)
38376 +{
38377 +       return ioread32be(&regs->fmpr_perr) & ev_mask;
38378 +}
38379 +
38380 +uint32_t fman_prs_get_err_ev_mask(struct fman_prs_regs *regs)
38381 +{
38382 +       return ioread32be(&regs->fmpr_perer);
38383 +}
38384 +
38385 +void fman_prs_ack_err_event(struct fman_prs_regs *regs, uint32_t event)
38386 +{
38387 +       iowrite32be(event, &regs->fmpr_perr);
38388 +}
38389 +
38390 +uint32_t fman_prs_get_expt_event(struct fman_prs_regs *regs, uint32_t ev_mask)
38391 +{
38392 +       return ioread32be(&regs->fmpr_pevr) & ev_mask;
38393 +}
38394 +
38395 +uint32_t fman_prs_get_expt_ev_mask(struct fman_prs_regs *regs)
38396 +{
38397 +       return ioread32be(&regs->fmpr_pever);
38398 +}
38399 +
38400 +void fman_prs_ack_expt_event(struct fman_prs_regs *regs, uint32_t event)
38401 +{
38402 +       iowrite32be(event, &regs->fmpr_pevr);
38403 +}
38404 +
38405 +void fman_prs_defconfig(struct fman_prs_cfg *cfg)
38406 +{
38407 +       cfg->port_id_stat = 0;
38408 +       cfg->max_prs_cyc_lim = DEFAULT_MAX_PRS_CYC_LIM;
38409 +       cfg->prs_exceptions = 0x03000000;
38410 +}
38411 +
38412 +int fman_prs_init(struct fman_prs_regs *regs, struct fman_prs_cfg *cfg)
38413 +{
38414 +       uint32_t tmp;
38415 +
38416 +       iowrite32be(cfg->max_prs_cyc_lim, &regs->fmpr_rpclim);
38417 +       iowrite32be((FM_PCD_PRS_SINGLE_ECC | FM_PCD_PRS_PORT_IDLE_STS),
38418 +                       &regs->fmpr_pevr);
38419 +
38420 +       if (cfg->prs_exceptions & FM_PCD_EX_PRS_SINGLE_ECC)
38421 +               iowrite32be(FM_PCD_PRS_SINGLE_ECC, &regs->fmpr_pever);
38422 +       else
38423 +               iowrite32be(0, &regs->fmpr_pever);
38424 +
38425 +       iowrite32be(FM_PCD_PRS_DOUBLE_ECC, &regs->fmpr_perr);
38426 +
38427 +       tmp = 0;
38428 +       if (cfg->prs_exceptions & FM_PCD_EX_PRS_DOUBLE_ECC)
38429 +               tmp |= FM_PCD_PRS_DOUBLE_ECC;
38430 +       iowrite32be(tmp, &regs->fmpr_perer);
38431 +
38432 +       iowrite32be(cfg->port_id_stat, &regs->fmpr_ppsc);
38433 +
38434 +       return 0;
38435 +}
38436 +
38437 +void fman_prs_enable(struct fman_prs_regs *regs)
38438 +{
38439 +       uint32_t tmp;
38440 +
38441 +       tmp = ioread32be(&regs->fmpr_rpimac) | FM_PCD_PRS_RPIMAC_EN;
38442 +       iowrite32be(tmp, &regs->fmpr_rpimac);
38443 +}
38444 +
38445 +void fman_prs_disable(struct fman_prs_regs *regs)
38446 +{
38447 +       uint32_t tmp;
38448 +
38449 +       tmp = ioread32be(&regs->fmpr_rpimac) & ~FM_PCD_PRS_RPIMAC_EN;
38450 +       iowrite32be(tmp, &regs->fmpr_rpimac);
38451 +}
38452 +
38453 +int fman_prs_is_enabled(struct fman_prs_regs *regs)
38454 +{
38455 +       return ioread32be(&regs->fmpr_rpimac) & FM_PCD_PRS_RPIMAC_EN;
38456 +}
38457 +
38458 +void fman_prs_set_stst_port_msk(struct fman_prs_regs *regs, uint32_t pid_msk)
38459 +{
38460 +       iowrite32be(pid_msk, &regs->fmpr_ppsc);
38461 +}
38462 +
38463 +void fman_prs_set_stst(struct fman_prs_regs *regs, bool enable)
38464 +{
38465 +       if (enable)
38466 +               iowrite32be(FM_PCD_PRS_PPSC_ALL_PORTS, &regs->fmpr_ppsc);
38467 +       else
38468 +               iowrite32be(0, &regs->fmpr_ppsc);
38469 +}
38470 --- /dev/null
38471 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/Makefile
38472 @@ -0,0 +1,15 @@
38473 +#
38474 +# Makefile for the Freescale Ethernet controllers
38475 +#
38476 +ccflags-y           += -DVERSION=\"\"
38477 +#
38478 +#Include netcomm SW specific definitions
38479 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
38480 +
38481 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
38482 +
38483 +ccflags-y += -I$(NCSW_FM_INC)
38484 +
38485 +obj-y          += fsl-ncsw-Pcd.o
38486 +
38487 +fsl-ncsw-Pcd-objs      :=   fm_port.o fm_port_im.o fman_port.o
38488 --- /dev/null
38489 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c
38490 @@ -0,0 +1,6436 @@
38491 +/*
38492 + * Copyright 2008-2012 Freescale Semiconductor Inc.
38493 + *
38494 + * Redistribution and use in source and binary forms, with or without
38495 + * modification, are permitted provided that the following conditions are met:
38496 + *     * Redistributions of source code must retain the above copyright
38497 + *       notice, this list of conditions and the following disclaimer.
38498 + *     * Redistributions in binary form must reproduce the above copyright
38499 + *       notice, this list of conditions and the following disclaimer in the
38500 + *       documentation and/or other materials provided with the distribution.
38501 + *     * Neither the name of Freescale Semiconductor nor the
38502 + *       names of its contributors may be used to endorse or promote products
38503 + *       derived from this software without specific prior written permission.
38504 + *
38505 + *
38506 + * ALTERNATIVELY, this software may be distributed under the terms of the
38507 + * GNU General Public License ("GPL") as published by the Free Software
38508 + * Foundation, either version 2 of that License or (at your option) any
38509 + * later version.
38510 + *
38511 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
38512 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
38513 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
38514 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
38515 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38516 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38517 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38518 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38519 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
38520 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38521 + */
38522 +
38523 +
38524 +/******************************************************************************
38525 + @File          fm_port.c
38526 +
38527 + @Description   FM driver routines implementation.
38528 + *//***************************************************************************/
38529 +#include "error_ext.h"
38530 +#include "std_ext.h"
38531 +#include "string_ext.h"
38532 +#include "sprint_ext.h"
38533 +#include "debug_ext.h"
38534 +#include "fm_muram_ext.h"
38535 +
38536 +#include "fman_common.h"
38537 +#include "fm_port.h"
38538 +#include "fm_port_dsar.h"
38539 +#include "common/general.h"
38540 +
38541 +/****************************************/
38542 +/*       static functions               */
38543 +/****************************************/
38544 +static t_Error FmPortConfigAutoResForDeepSleepSupport1(t_FmPort *p_FmPort);
38545 +
38546 +static t_Error CheckInitParameters(t_FmPort *p_FmPort)
38547 +{
38548 +    t_FmPortDriverParam *p_Params = p_FmPort->p_FmPortDriverParam;
38549 +    struct fman_port_cfg *p_DfltConfig = &p_Params->dfltCfg;
38550 +    t_Error ans = E_OK;
38551 +    uint32_t unusedMask;
38552 +
38553 +    if (p_FmPort->imEn)
38554 +    {
38555 +        if (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
38556 +            if (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
38557 +                    > 2)
38558 +                RETURN_ERROR(
38559 +                        MAJOR,
38560 +                        E_INVALID_VALUE,
38561 +                        ("fifoDeqPipelineDepth for IM 10G can't be larger than 2"));
38562 +
38563 +        if ((ans = FmPortImCheckInitParameters(p_FmPort)) != E_OK)
38564 +            return ERROR_CODE(ans);
38565 +    }
38566 +    else
38567 +    {
38568 +        /****************************************/
38569 +        /*   Rx only                            */
38570 +        /****************************************/
38571 +        if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
38572 +                || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
38573 +        {
38574 +            /* external buffer pools */
38575 +            if (!p_Params->extBufPools.numOfPoolsUsed)
38576 +                RETURN_ERROR(
38577 +                        MAJOR,
38578 +                        E_INVALID_VALUE,
38579 +                        ("extBufPools.numOfPoolsUsed=0. At least one buffer pool must be defined"));
38580 +
38581 +            if (FmSpCheckBufPoolsParams(&p_Params->extBufPools,
38582 +                                        p_Params->p_BackupBmPools,
38583 +                                        &p_Params->bufPoolDepletion) != E_OK)
38584 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
38585 +
38586 +            /* Check that part of IC that needs copying is small enough to enter start margin */
38587 +            if (p_Params->intContext.size
38588 +                    && (p_Params->intContext.size
38589 +                            + p_Params->intContext.extBufOffset
38590 +                            > p_Params->bufMargins.startMargins))
38591 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38592 +                             ("intContext.size is larger than start margins"));
38593 +
38594 +            if ((p_Params->liodnOffset != (uint16_t)DPAA_LIODN_DONT_OVERRIDE)
38595 +                    && (p_Params->liodnOffset & ~FM_LIODN_OFFSET_MASK))
38596 +                RETURN_ERROR(
38597 +                        MAJOR,
38598 +                        E_INVALID_VALUE,
38599 +                        ("liodnOffset is larger than %d", FM_LIODN_OFFSET_MASK+1));
38600 +
38601 +#ifdef FM_NO_BACKUP_POOLS
38602 +            if ((p_FmPort->fmRevInfo.majorRev != 4) && (p_FmPort->fmRevInfo.majorRev < 6))
38603 +            if (p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
38604 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("BackupBmPools"));
38605 +#endif /* FM_NO_BACKUP_POOLS */
38606 +        }
38607 +
38608 +        /****************************************/
38609 +        /*   Non Rx ports                       */
38610 +        /****************************************/
38611 +        else
38612 +        {
38613 +            if (p_Params->deqSubPortal >= FM_MAX_NUM_OF_SUB_PORTALS)
38614 +                RETURN_ERROR(
38615 +                        MAJOR,
38616 +                        E_INVALID_VALUE,
38617 +                        (" deqSubPortal has to be in the range of 0 - %d", FM_MAX_NUM_OF_SUB_PORTALS));
38618 +
38619 +            /* to protect HW internal-context from overwrite */
38620 +            if ((p_Params->intContext.size)
38621 +                    && (p_Params->intContext.intContextOffset
38622 +                            < MIN_TX_INT_OFFSET))
38623 +                RETURN_ERROR(
38624 +                        MAJOR,
38625 +                        E_INVALID_VALUE,
38626 +                        ("non-Rx intContext.intContextOffset can't be smaller than %d", MIN_TX_INT_OFFSET));
38627 +
38628 +            if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
38629 +                    || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
38630 +                    /* in O/H DEFAULT_notSupported indicates that it is not supported and should not be checked */
38631 +                    || (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
38632 +                            != DEFAULT_notSupported))
38633 +            {
38634 +                /* Check that not larger than 8 */
38635 +                if ((!p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth)
38636 +                        || (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
38637 +                                > MAX_FIFO_PIPELINE_DEPTH))
38638 +                    RETURN_ERROR(
38639 +                            MAJOR,
38640 +                            E_INVALID_VALUE,
38641 +                            ("fifoDeqPipelineDepth can't be larger than %d", MAX_FIFO_PIPELINE_DEPTH));
38642 +            }
38643 +        }
38644 +
38645 +        /****************************************/
38646 +        /*   Rx Or Offline Parsing              */
38647 +        /****************************************/
38648 +        if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
38649 +                || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
38650 +                || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
38651 +        {
38652 +            if (!p_Params->dfltFqid)
38653 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38654 +                             ("dfltFqid must be between 1 and 2^24-1"));
38655 +#if defined(FM_CAPWAP_SUPPORT) && defined(FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004)
38656 +            if (p_FmPort->p_FmPortDriverParam->bufferPrefixContent.manipExtraSpace % 16)
38657 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufferPrefixContent.manipExtraSpace has to be devidable by 16"));
38658 +#endif /* defined(FM_CAPWAP_SUPPORT) && ... */
38659 +        }
38660 +
38661 +        /****************************************/
38662 +        /*   All ports                          */
38663 +        /****************************************/
38664 +        /* common BMI registers values */
38665 +        /* Check that Queue Id is not larger than 2^24, and is not 0 */
38666 +        if ((p_Params->errFqid & ~0x00FFFFFF) || !p_Params->errFqid)
38667 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38668 +                         ("errFqid must be between 1 and 2^24-1"));
38669 +        if (p_Params->dfltFqid & ~0x00FFFFFF)
38670 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38671 +                         ("dfltFqid must be between 1 and 2^24-1"));
38672 +    }
38673 +
38674 +    /****************************************/
38675 +    /*   Rx only                            */
38676 +    /****************************************/
38677 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
38678 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
38679 +    {
38680 +        if (p_DfltConfig->rx_pri_elevation % BMI_FIFO_UNITS)
38681 +            RETURN_ERROR(
38682 +                    MAJOR,
38683 +                    E_INVALID_VALUE,
38684 +                    ("rxFifoPriElevationLevel has to be divisible by %d", BMI_FIFO_UNITS));
38685 +        if ((p_DfltConfig->rx_pri_elevation < BMI_FIFO_UNITS)
38686 +                || (p_DfltConfig->rx_pri_elevation > MAX_PORT_FIFO_SIZE))
38687 +            RETURN_ERROR(
38688 +                    MAJOR,
38689 +                    E_INVALID_VALUE,
38690 +                    ("rxFifoPriElevationLevel has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
38691 +        if (p_DfltConfig->rx_fifo_thr % BMI_FIFO_UNITS)
38692 +            RETURN_ERROR(
38693 +                    MAJOR,
38694 +                    E_INVALID_VALUE,
38695 +                    ("rxFifoThreshold has to be divisible by %d", BMI_FIFO_UNITS));
38696 +        if ((p_DfltConfig->rx_fifo_thr < BMI_FIFO_UNITS)
38697 +                || (p_DfltConfig->rx_fifo_thr > MAX_PORT_FIFO_SIZE))
38698 +            RETURN_ERROR(
38699 +                    MAJOR,
38700 +                    E_INVALID_VALUE,
38701 +                    ("rxFifoThreshold has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
38702 +
38703 +        /* Check that not larger than 16 */
38704 +        if (p_DfltConfig->rx_cut_end_bytes > FRAME_END_DATA_SIZE)
38705 +            RETURN_ERROR(
38706 +                    MAJOR,
38707 +                    E_INVALID_VALUE,
38708 +                    ("cutBytesFromEnd can't be larger than %d", FRAME_END_DATA_SIZE));
38709 +
38710 +        if (FmSpCheckBufMargins(&p_Params->bufMargins) != E_OK)
38711 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
38712 +
38713 +        /* extra FIFO size (allowed only to Rx ports) */
38714 +        if (p_Params->setSizeOfFifo
38715 +                && (p_FmPort->fifoBufs.extra % BMI_FIFO_UNITS))
38716 +            RETURN_ERROR(
38717 +                    MAJOR,
38718 +                    E_INVALID_VALUE,
38719 +                    ("fifoBufs.extra has to be divisible by %d", BMI_FIFO_UNITS));
38720 +
38721 +        if (p_Params->bufPoolDepletion.poolsGrpModeEnable
38722 +                && !p_Params->bufPoolDepletion.numOfPools)
38723 +            RETURN_ERROR(
38724 +                    MAJOR,
38725 +                    E_INVALID_VALUE,
38726 +                    ("bufPoolDepletion.numOfPools can not be 0 when poolsGrpModeEnable=TRUE"));
38727 +#ifdef FM_CSI_CFED_LIMIT
38728 +        if (p_FmPort->fmRevInfo.majorRev == 4)
38729 +        {
38730 +            /* Check that not larger than 16 */
38731 +            if (p_DfltConfig->rx_cut_end_bytes + p_DfltConfig->checksum_bytes_ignore > FRAME_END_DATA_SIZE)
38732 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("cheksumLastBytesIgnore + cutBytesFromEnd can't be larger than %d", FRAME_END_DATA_SIZE));
38733 +        }
38734 +#endif /* FM_CSI_CFED_LIMIT */
38735 +    }
38736 +
38737 +    /****************************************/
38738 +    /*   Non Rx ports                       */
38739 +    /****************************************/
38740 +    /* extra FIFO size (allowed only to Rx ports) */
38741 +    else
38742 +        if (p_FmPort->fifoBufs.extra)
38743 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38744 +                         (" No fifoBufs.extra for non Rx ports"));
38745 +
38746 +    /****************************************/
38747 +    /*   Tx only                            */
38748 +    /****************************************/
38749 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
38750 +            || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G))
38751 +    {
38752 +        if (p_DfltConfig->tx_fifo_min_level % BMI_FIFO_UNITS)
38753 +            RETURN_ERROR(
38754 +                    MAJOR,
38755 +                    E_INVALID_VALUE,
38756 +                    ("txFifoMinFillLevel has to be divisible by %d", BMI_FIFO_UNITS));
38757 +        if (p_DfltConfig->tx_fifo_min_level > (MAX_PORT_FIFO_SIZE - 256))
38758 +            RETURN_ERROR(
38759 +                    MAJOR,
38760 +                    E_INVALID_VALUE,
38761 +                    ("txFifoMinFillLevel has to be in the range of 0 - %d", (MAX_PORT_FIFO_SIZE - 256)));
38762 +        if (p_DfltConfig->tx_fifo_low_comf_level % BMI_FIFO_UNITS)
38763 +            RETURN_ERROR(
38764 +                    MAJOR,
38765 +                    E_INVALID_VALUE,
38766 +                    ("txFifoLowComfLevel has to be divisible by %d", BMI_FIFO_UNITS));
38767 +        if ((p_DfltConfig->tx_fifo_low_comf_level < BMI_FIFO_UNITS)
38768 +                || (p_DfltConfig->tx_fifo_low_comf_level > MAX_PORT_FIFO_SIZE))
38769 +            RETURN_ERROR(
38770 +                    MAJOR,
38771 +                    E_INVALID_VALUE,
38772 +                    ("txFifoLowComfLevel has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
38773 +
38774 +        if (p_FmPort->portType == e_FM_PORT_TYPE_TX)
38775 +            if (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
38776 +                    > 2)
38777 +                RETURN_ERROR(
38778 +                        MAJOR, E_INVALID_VALUE,
38779 +                        ("fifoDeqPipelineDepth for 1G can't be larger than 2"));
38780 +    }
38781 +
38782 +    /****************************************/
38783 +    /*   Non Tx Ports                       */
38784 +    /****************************************/
38785 +    /* If discard override was selected , no frames may be discarded. */
38786 +    else
38787 +        if (p_DfltConfig->discard_override && p_Params->errorsToDiscard)
38788 +            RETURN_ERROR(
38789 +                    MAJOR,
38790 +                    E_CONFLICT,
38791 +                    ("errorsToDiscard is not empty, but frmDiscardOverride selected (all discarded frames to be enqueued to error queue)."));
38792 +
38793 +    /****************************************/
38794 +    /*   Rx and Offline parsing             */
38795 +    /****************************************/
38796 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
38797 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
38798 +            || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
38799 +    {
38800 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
38801 +            unusedMask = BMI_STATUS_OP_MASK_UNUSED;
38802 +        else
38803 +            unusedMask = BMI_STATUS_RX_MASK_UNUSED;
38804 +
38805 +        /* Check that no common bits with BMI_STATUS_MASK_UNUSED */
38806 +        if (p_Params->errorsToDiscard & unusedMask)
38807 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
38808 +                         ("errorsToDiscard contains undefined bits"));
38809 +    }
38810 +
38811 +    /****************************************/
38812 +    /*   Offline Ports                      */
38813 +    /****************************************/
38814 +#ifdef FM_OP_OPEN_DMA_MIN_LIMIT
38815 +    if ((p_FmPort->fmRevInfo.majorRev >= 6)
38816 +            && (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
38817 +            && p_Params->setNumOfOpenDmas
38818 +            && (p_FmPort->openDmas.num < MIN_NUM_OF_OP_DMAS))
38819 +        RETURN_ERROR(
38820 +                MAJOR,
38821 +                E_INVALID_VALUE,
38822 +                ("For Offline port, openDmas.num can't be smaller than %d", MIN_NUM_OF_OP_DMAS));
38823 +#endif /* FM_OP_OPEN_DMA_MIN_LIMIT */
38824 +
38825 +    /****************************************/
38826 +    /*   Offline & HC Ports                 */
38827 +    /****************************************/
38828 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
38829 +            || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
38830 +    {
38831 +#ifndef FM_FRAME_END_PARAMS_FOR_OP
38832 +        if ((p_FmPort->fmRevInfo.majorRev < 6) &&
38833 +                (p_FmPort->p_FmPortDriverParam->cheksumLastBytesIgnore != DEFAULT_notSupported))
38834 +        /* this is an indication that user called config for this mode which is not supported in this integration */
38835 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("cheksumLastBytesIgnore is available for Rx & Tx ports only"));
38836 +#endif /* !FM_FRAME_END_PARAMS_FOR_OP */
38837 +
38838 +#ifndef FM_DEQ_PIPELINE_PARAMS_FOR_OP
38839 +        if ((!((p_FmPort->fmRevInfo.majorRev == 4) ||
38840 +                                (p_FmPort->fmRevInfo.majorRev >= 6))) &&
38841 +                (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth != DEFAULT_notSupported))
38842 +        /* this is an indication that user called config for this mode which is not supported in this integration */
38843 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("fifoDeqPipelineDepth is available for Tx ports only"));
38844 +#endif /* !FM_DEQ_PIPELINE_PARAMS_FOR_OP */
38845 +    }
38846 +
38847 +    /****************************************/
38848 +    /*   All ports                          */
38849 +    /****************************************/
38850 +    /* Check that not larger than 16 */
38851 +    if ((p_Params->cheksumLastBytesIgnore > FRAME_END_DATA_SIZE)
38852 +            && ((p_Params->cheksumLastBytesIgnore != DEFAULT_notSupported)))
38853 +        RETURN_ERROR(
38854 +                MAJOR,
38855 +                E_INVALID_VALUE,
38856 +                ("cheksumLastBytesIgnore can't be larger than %d", FRAME_END_DATA_SIZE));
38857 +
38858 +    if (FmSpCheckIntContextParams(&p_Params->intContext) != E_OK)
38859 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
38860 +
38861 +    /* common BMI registers values */
38862 +    if (p_Params->setNumOfTasks
38863 +            && ((!p_FmPort->tasks.num)
38864 +                    || (p_FmPort->tasks.num > MAX_NUM_OF_TASKS)))
38865 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38866 +                     ("tasks.num can't be larger than %d", MAX_NUM_OF_TASKS));
38867 +    if (p_Params->setNumOfTasks
38868 +            && (p_FmPort->tasks.extra > MAX_NUM_OF_EXTRA_TASKS))
38869 +        RETURN_ERROR(
38870 +                MAJOR,
38871 +                E_INVALID_VALUE,
38872 +                ("tasks.extra can't be larger than %d", MAX_NUM_OF_EXTRA_TASKS));
38873 +    if (p_Params->setNumOfOpenDmas
38874 +            && ((!p_FmPort->openDmas.num)
38875 +                    || (p_FmPort->openDmas.num > MAX_NUM_OF_DMAS)))
38876 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
38877 +                     ("openDmas.num can't be larger than %d", MAX_NUM_OF_DMAS));
38878 +    if (p_Params->setNumOfOpenDmas
38879 +            && (p_FmPort->openDmas.extra > MAX_NUM_OF_EXTRA_DMAS))
38880 +        RETURN_ERROR(
38881 +                MAJOR,
38882 +                E_INVALID_VALUE,
38883 +                ("openDmas.extra can't be larger than %d", MAX_NUM_OF_EXTRA_DMAS));
38884 +    if (p_Params->setSizeOfFifo
38885 +            && (!p_FmPort->fifoBufs.num
38886 +                    || (p_FmPort->fifoBufs.num > MAX_PORT_FIFO_SIZE)))
38887 +        RETURN_ERROR(
38888 +                MAJOR,
38889 +                E_INVALID_VALUE,
38890 +                ("fifoBufs.num has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
38891 +    if (p_Params->setSizeOfFifo && (p_FmPort->fifoBufs.num % BMI_FIFO_UNITS))
38892 +        RETURN_ERROR(
38893 +                MAJOR, E_INVALID_VALUE,
38894 +                ("fifoBufs.num has to be divisible by %d", BMI_FIFO_UNITS));
38895 +
38896 +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
38897 +    if (p_FmPort->fmRevInfo.majorRev == 4)
38898 +    if (p_FmPort->p_FmPortDriverParam->deqPrefetchOption != DEFAULT_notSupported)
38899 +    /* this is an indication that user called config for this mode which is not supported in this integration */
38900 +    RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("deqPrefetchOption"));
38901 +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
38902 +
38903 +    return E_OK;
38904 +}
38905 +
38906 +static t_Error VerifySizeOfFifo(t_FmPort *p_FmPort)
38907 +{
38908 +    uint32_t minFifoSizeRequired = 0, optFifoSizeForB2B = 0;
38909 +
38910 +    /*************************/
38911 +    /*    TX PORTS           */
38912 +    /*************************/
38913 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
38914 +            || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G))
38915 +    {
38916 +        minFifoSizeRequired =
38917 +                (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
38918 +                        + (3 * BMI_FIFO_UNITS));
38919 +        if (!p_FmPort->imEn)
38920 +            minFifoSizeRequired +=
38921 +                    p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
38922 +                            * BMI_FIFO_UNITS;
38923 +
38924 +        optFifoSizeForB2B = minFifoSizeRequired;
38925 +
38926 +        /* Add some margin for back-to-back capability to improve performance,
38927 +         allows the hardware to pipeline new frame dma while the previous
38928 +         frame not yet transmitted. */
38929 +        if (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
38930 +            optFifoSizeForB2B += 3 * BMI_FIFO_UNITS;
38931 +        else
38932 +            optFifoSizeForB2B += 2 * BMI_FIFO_UNITS;
38933 +    }
38934 +
38935 +    /*************************/
38936 +    /*    RX IM PORTS        */
38937 +    /*************************/
38938 +    else
38939 +        if (((p_FmPort->portType == e_FM_PORT_TYPE_RX)
38940 +                || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
38941 +                && p_FmPort->imEn)
38942 +        {
38943 +            optFifoSizeForB2B =
38944 +                    minFifoSizeRequired =
38945 +                            (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
38946 +                                    + (4 * BMI_FIFO_UNITS));
38947 +        }
38948 +
38949 +        /*************************/
38950 +        /*    RX non-IM PORTS    */
38951 +        /*************************/
38952 +        else
38953 +            if (((p_FmPort->portType == e_FM_PORT_TYPE_RX)
38954 +                    || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
38955 +                    && !p_FmPort->imEn)
38956 +            {
38957 +                if (p_FmPort->fmRevInfo.majorRev == 4)
38958 +                {
38959 +                    if (p_FmPort->rxPoolsParams.numOfPools == 1)
38960 +                        minFifoSizeRequired = 8 * BMI_FIFO_UNITS;
38961 +                    else
38962 +                        minFifoSizeRequired =
38963 +                                (uint32_t)(ROUND_UP(p_FmPort->rxPoolsParams.secondLargestBufSize, BMI_FIFO_UNITS)
38964 +                                        + (7 * BMI_FIFO_UNITS));
38965 +                }
38966 +                else
38967 +                {
38968 +#if (DPAA_VERSION >= 11)
38969 +                    minFifoSizeRequired =
38970 +                            (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
38971 +                                    + (5 * BMI_FIFO_UNITS));
38972 +                    /* 4 according to spec + 1 for FOF>0 */
38973 +#else
38974 +                    minFifoSizeRequired = (uint32_t)
38975 +                    (ROUND_UP(MIN(p_FmPort->maxFrameLength, p_FmPort->rxPoolsParams.largestBufSize), BMI_FIFO_UNITS)
38976 +                            + (7*BMI_FIFO_UNITS));
38977 +#endif /* (DPAA_VERSION >= 11) */
38978 +                }
38979 +
38980 +                optFifoSizeForB2B = minFifoSizeRequired;
38981 +
38982 +                /* Add some margin for back-to-back capability to improve performance,
38983 +                 allows the hardware to pipeline new frame dma while the previous
38984 +                 frame not yet transmitted. */
38985 +                if (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
38986 +                    optFifoSizeForB2B += 8 * BMI_FIFO_UNITS;
38987 +                else
38988 +                    optFifoSizeForB2B += 3 * BMI_FIFO_UNITS;
38989 +            }
38990 +
38991 +            /* For O/H ports, check fifo size and update if necessary */
38992 +            else
38993 +                if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
38994 +                        || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
38995 +                {
38996 +#if (DPAA_VERSION >= 11)
38997 +                    optFifoSizeForB2B =
38998 +                            minFifoSizeRequired =
38999 +                                    (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
39000 +                                            + ((p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
39001 +                                                    + 5) * BMI_FIFO_UNITS));
39002 +                    /* 4 according to spec + 1 for FOF>0 */
39003 +#else
39004 +                    optFifoSizeForB2B = minFifoSizeRequired = (uint32_t)((p_FmPort->tasks.num + 2) * BMI_FIFO_UNITS);
39005 +#endif /* (DPAA_VERSION >= 11) */
39006 +                }
39007 +
39008 +    ASSERT_COND(minFifoSizeRequired > 0);
39009 +    ASSERT_COND(optFifoSizeForB2B >= minFifoSizeRequired);
39010 +
39011 +    /* Verify the size  */
39012 +    if (p_FmPort->fifoBufs.num < minFifoSizeRequired)
39013 +        DBG(INFO,
39014 +           ("FIFO size is %d and should be enlarged to %d bytes",p_FmPort->fifoBufs.num, minFifoSizeRequired));
39015 +    else if (p_FmPort->fifoBufs.num < optFifoSizeForB2B)
39016 +        DBG(INFO,
39017 +           ("For back-to-back frames processing, FIFO size is %d and needs to enlarge to %d bytes", p_FmPort->fifoBufs.num, optFifoSizeForB2B));
39018 +
39019 +    return E_OK;
39020 +}
39021 +
39022 +static void FmPortDriverParamFree(t_FmPort *p_FmPort)
39023 +{
39024 +    if (p_FmPort->p_FmPortDriverParam)
39025 +    {
39026 +        XX_Free(p_FmPort->p_FmPortDriverParam);
39027 +        p_FmPort->p_FmPortDriverParam = NULL;
39028 +    }
39029 +}
39030 +
39031 +static t_Error SetExtBufferPools(t_FmPort *p_FmPort)
39032 +{
39033 +    t_FmExtPools *p_ExtBufPools = &p_FmPort->p_FmPortDriverParam->extBufPools;
39034 +    t_FmBufPoolDepletion *p_BufPoolDepletion =
39035 +            &p_FmPort->p_FmPortDriverParam->bufPoolDepletion;
39036 +    uint8_t orderedArray[FM_PORT_MAX_NUM_OF_EXT_POOLS];
39037 +    uint16_t sizesArray[BM_MAX_NUM_OF_POOLS];
39038 +    int i = 0, j = 0, err;
39039 +    struct fman_port_bpools bpools;
39040 +
39041 +    memset(&orderedArray, 0, sizeof(uint8_t) * FM_PORT_MAX_NUM_OF_EXT_POOLS);
39042 +    memset(&sizesArray, 0, sizeof(uint16_t) * BM_MAX_NUM_OF_POOLS);
39043 +    memcpy(&p_FmPort->extBufPools, p_ExtBufPools, sizeof(t_FmExtPools));
39044 +
39045 +    FmSpSetBufPoolsInAscOrderOfBufSizes(p_ExtBufPools, orderedArray,
39046 +                                        sizesArray);
39047 +
39048 +    /* Prepare flibs bpools structure */
39049 +    memset(&bpools, 0, sizeof(struct fman_port_bpools));
39050 +    bpools.count = p_ExtBufPools->numOfPoolsUsed;
39051 +    bpools.counters_enable = TRUE;
39052 +    for (i = 0; i < p_ExtBufPools->numOfPoolsUsed; i++)
39053 +    {
39054 +        bpools.bpool[i].bpid = orderedArray[i];
39055 +        bpools.bpool[i].size = sizesArray[orderedArray[i]];
39056 +        /* functionality available only for some derivatives (limited by config) */
39057 +        if (p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
39058 +            for (j = 0;
39059 +                    j
39060 +                            < p_FmPort->p_FmPortDriverParam->p_BackupBmPools->numOfBackupPools;
39061 +                    j++)
39062 +                if (orderedArray[i]
39063 +                        == p_FmPort->p_FmPortDriverParam->p_BackupBmPools->poolIds[j])
39064 +                {
39065 +                    bpools.bpool[i].is_backup = TRUE;
39066 +                    break;
39067 +                }
39068 +    }
39069 +
39070 +    /* save pools parameters for later use */
39071 +    p_FmPort->rxPoolsParams.numOfPools = p_ExtBufPools->numOfPoolsUsed;
39072 +    p_FmPort->rxPoolsParams.largestBufSize =
39073 +            sizesArray[orderedArray[p_ExtBufPools->numOfPoolsUsed - 1]];
39074 +    p_FmPort->rxPoolsParams.secondLargestBufSize =
39075 +            sizesArray[orderedArray[p_ExtBufPools->numOfPoolsUsed - 2]];
39076 +
39077 +    /* FMBM_RMPD reg. - pool depletion */
39078 +    if (p_BufPoolDepletion->poolsGrpModeEnable)
39079 +    {
39080 +        bpools.grp_bp_depleted_num = p_BufPoolDepletion->numOfPools;
39081 +        for (i = 0; i < BM_MAX_NUM_OF_POOLS; i++)
39082 +        {
39083 +            if (p_BufPoolDepletion->poolsToConsider[i])
39084 +            {
39085 +                for (j = 0; j < p_ExtBufPools->numOfPoolsUsed; j++)
39086 +                {
39087 +                    if (i == orderedArray[j])
39088 +                    {
39089 +                        bpools.bpool[j].grp_bp_depleted = TRUE;
39090 +                        break;
39091 +                    }
39092 +                }
39093 +            }
39094 +        }
39095 +    }
39096 +
39097 +    if (p_BufPoolDepletion->singlePoolModeEnable)
39098 +    {
39099 +        for (i = 0; i < BM_MAX_NUM_OF_POOLS; i++)
39100 +        {
39101 +            if (p_BufPoolDepletion->poolsToConsiderForSingleMode[i])
39102 +            {
39103 +                for (j = 0; j < p_ExtBufPools->numOfPoolsUsed; j++)
39104 +                {
39105 +                    if (i == orderedArray[j])
39106 +                    {
39107 +                        bpools.bpool[j].single_bp_depleted = TRUE;
39108 +                        break;
39109 +                    }
39110 +                }
39111 +            }
39112 +        }
39113 +    }
39114 +
39115 +#if (DPAA_VERSION >= 11)
39116 +    /* fill QbbPEV */
39117 +    if (p_BufPoolDepletion->poolsGrpModeEnable
39118 +            || p_BufPoolDepletion->singlePoolModeEnable)
39119 +    {
39120 +        for (i = 0; i < FM_MAX_NUM_OF_PFC_PRIORITIES; i++)
39121 +        {
39122 +            if (p_BufPoolDepletion->pfcPrioritiesEn[i] == TRUE)
39123 +            {
39124 +                bpools.bpool[i].pfc_priorities_en = TRUE;
39125 +            }
39126 +        }
39127 +    }
39128 +#endif /* (DPAA_VERSION >= 11) */
39129 +
39130 +    /* Issue flibs function */
39131 +    err = fman_port_set_bpools(&p_FmPort->port, &bpools);
39132 +    if (err != 0)
39133 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_bpools"));
39134 +
39135 +    if (p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
39136 +        XX_Free(p_FmPort->p_FmPortDriverParam->p_BackupBmPools);
39137 +
39138 +    return E_OK;
39139 +}
39140 +
39141 +static t_Error ClearPerfCnts(t_FmPort *p_FmPort)
39142 +{
39143 +    if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
39144 +        FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_QUEUE_UTIL, 0);
39145 +    FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL, 0);
39146 +    FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL, 0);
39147 +    FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL, 0);
39148 +    return E_OK;
39149 +}
39150 +
39151 +static t_Error InitLowLevelDriver(t_FmPort *p_FmPort)
39152 +{
39153 +    t_FmPortDriverParam *p_DriverParams = p_FmPort->p_FmPortDriverParam;
39154 +    struct fman_port_params portParams;
39155 +    uint32_t tmpVal;
39156 +    t_Error err;
39157 +
39158 +    /* Set up flibs parameters and issue init function */
39159 +
39160 +    memset(&portParams, 0, sizeof(struct fman_port_params));
39161 +    portParams.discard_mask = p_DriverParams->errorsToDiscard;
39162 +    portParams.dflt_fqid = p_DriverParams->dfltFqid;
39163 +    portParams.err_fqid = p_DriverParams->errFqid;
39164 +    portParams.deq_sp = p_DriverParams->deqSubPortal;
39165 +    portParams.dont_release_buf = p_DriverParams->dontReleaseBuf;
39166 +    switch (p_FmPort->portType)
39167 +    {
39168 +        case (e_FM_PORT_TYPE_RX_10G):
39169 +        case (e_FM_PORT_TYPE_RX):
39170 +            portParams.err_mask = (RX_ERRS_TO_ENQ & ~portParams.discard_mask);
39171 +            if (!p_FmPort->imEn)
39172 +            {
39173 +                if (p_DriverParams->forwardReuseIntContext)
39174 +                    p_DriverParams->dfltCfg.rx_fd_bits =
39175 +                            (uint8_t)(BMI_PORT_RFNE_FRWD_RPD >> 24);
39176 +            }
39177 +            break;
39178 +
39179 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
39180 +            portParams.err_mask = (OP_ERRS_TO_ENQ & ~portParams.discard_mask);
39181 +            break;
39182 +            break;
39183 +
39184 +        default:
39185 +            break;
39186 +    }
39187 +
39188 +    tmpVal =
39189 +            (uint32_t)(
39190 +                    (p_FmPort->internalBufferOffset % OFFSET_UNITS) ? (p_FmPort->internalBufferOffset
39191 +                            / OFFSET_UNITS + 1) :
39192 +                            (p_FmPort->internalBufferOffset / OFFSET_UNITS));
39193 +    p_FmPort->internalBufferOffset = (uint8_t)(tmpVal * OFFSET_UNITS);
39194 +    p_DriverParams->dfltCfg.int_buf_start_margin =
39195 +            p_FmPort->internalBufferOffset;
39196 +
39197 +    p_DriverParams->dfltCfg.ext_buf_start_margin =
39198 +            p_DriverParams->bufMargins.startMargins;
39199 +    p_DriverParams->dfltCfg.ext_buf_end_margin =
39200 +            p_DriverParams->bufMargins.endMargins;
39201 +
39202 +    p_DriverParams->dfltCfg.ic_ext_offset =
39203 +            p_DriverParams->intContext.extBufOffset;
39204 +    p_DriverParams->dfltCfg.ic_int_offset =
39205 +            p_DriverParams->intContext.intContextOffset;
39206 +    p_DriverParams->dfltCfg.ic_size = p_DriverParams->intContext.size;
39207 +
39208 +    p_DriverParams->dfltCfg.stats_counters_enable = TRUE;
39209 +    p_DriverParams->dfltCfg.perf_counters_enable = TRUE;
39210 +    p_DriverParams->dfltCfg.queue_counters_enable = TRUE;
39211 +
39212 +    p_DriverParams->dfltCfg.perf_cnt_params.task_val =
39213 +            (uint8_t)p_FmPort->tasks.num;
39214 +    if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING ||
39215 +    p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)p_DriverParams->dfltCfg.perf_cnt_params.queue_val = 0;
39216 +    else
39217 +    p_DriverParams->dfltCfg.perf_cnt_params.queue_val = 1;
39218 +    p_DriverParams->dfltCfg.perf_cnt_params.dma_val =
39219 +            (uint8_t)p_FmPort->openDmas.num;
39220 +    p_DriverParams->dfltCfg.perf_cnt_params.fifo_val = p_FmPort->fifoBufs.num;
39221 +
39222 +    if (0
39223 +            != fman_port_init(&p_FmPort->port, &p_DriverParams->dfltCfg,
39224 +                              &portParams))
39225 +        RETURN_ERROR(MAJOR, E_NO_DEVICE, ("fman_port_init"));
39226 +
39227 +    if (p_FmPort->imEn && ((err = FmPortImInit(p_FmPort)) != E_OK))
39228 +        RETURN_ERROR(MAJOR, err, NO_MSG);
39229 +    else
39230 +    {
39231 +        //  from QMIInit
39232 +        if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
39233 +                && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
39234 +        {
39235 +            if (p_DriverParams->deqPrefetchOption == e_FM_PORT_DEQ_NO_PREFETCH)
39236 +                FmSetPortPreFetchConfiguration(p_FmPort->h_Fm, p_FmPort->portId,
39237 +                                               FALSE);
39238 +            else
39239 +                FmSetPortPreFetchConfiguration(p_FmPort->h_Fm, p_FmPort->portId,
39240 +                                               TRUE);
39241 +        }
39242 +    }
39243 +    /* The code bellow is a trick so the FM will not release the buffer
39244 +     to BM nor will try to enqueue the frame to QM */
39245 +    if (((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
39246 +            || (p_FmPort->portType == e_FM_PORT_TYPE_TX)) && (!p_FmPort->imEn))
39247 +    {
39248 +        if (!p_DriverParams->dfltFqid && p_DriverParams->dontReleaseBuf)
39249 +        {
39250 +            /* override fmbm_tcfqid 0 with a false non-0 value. This will force FM to
39251 +             * act according to tfene. Otherwise, if fmbm_tcfqid is 0 the FM will release
39252 +             * buffers to BM regardless of fmbm_tfene
39253 +             */
39254 +            WRITE_UINT32(p_FmPort->port.bmi_regs->tx.fmbm_tcfqid, 0xFFFFFF);
39255 +            WRITE_UINT32(p_FmPort->port.bmi_regs->tx.fmbm_tfene,
39256 +                         NIA_ENG_BMI | NIA_BMI_AC_TX_RELEASE);
39257 +        }
39258 +    }
39259 +
39260 +    return E_OK;
39261 +}
39262 +
39263 +static bool CheckRxBmiCounter(t_FmPort *p_FmPort, e_FmPortCounters counter)
39264 +{
39265 +    UNUSED(p_FmPort);
39266 +
39267 +    switch (counter)
39268 +    {
39269 +        case (e_FM_PORT_COUNTERS_CYCLE):
39270 +        case (e_FM_PORT_COUNTERS_TASK_UTIL):
39271 +        case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
39272 +        case (e_FM_PORT_COUNTERS_DMA_UTIL):
39273 +        case (e_FM_PORT_COUNTERS_FIFO_UTIL):
39274 +        case (e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION):
39275 +        case (e_FM_PORT_COUNTERS_FRAME):
39276 +        case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
39277 +        case (e_FM_PORT_COUNTERS_RX_BAD_FRAME):
39278 +        case (e_FM_PORT_COUNTERS_RX_LARGE_FRAME):
39279 +        case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
39280 +        case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
39281 +        case (e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD):
39282 +        case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
39283 +        case (e_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER):
39284 +            return TRUE;
39285 +        default:
39286 +            return FALSE;
39287 +    }
39288 +}
39289 +
39290 +static bool CheckTxBmiCounter(t_FmPort *p_FmPort, e_FmPortCounters counter)
39291 +{
39292 +    UNUSED(p_FmPort);
39293 +
39294 +    switch (counter)
39295 +    {
39296 +        case (e_FM_PORT_COUNTERS_CYCLE):
39297 +        case (e_FM_PORT_COUNTERS_TASK_UTIL):
39298 +        case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
39299 +        case (e_FM_PORT_COUNTERS_DMA_UTIL):
39300 +        case (e_FM_PORT_COUNTERS_FIFO_UTIL):
39301 +        case (e_FM_PORT_COUNTERS_FRAME):
39302 +        case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
39303 +        case (e_FM_PORT_COUNTERS_LENGTH_ERR):
39304 +        case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
39305 +        case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
39306 +            return TRUE;
39307 +        default:
39308 +            return FALSE;
39309 +    }
39310 +}
39311 +
39312 +static bool CheckOhBmiCounter(t_FmPort *p_FmPort, e_FmPortCounters counter)
39313 +{
39314 +    switch (counter)
39315 +    {
39316 +        case (e_FM_PORT_COUNTERS_CYCLE):
39317 +        case (e_FM_PORT_COUNTERS_TASK_UTIL):
39318 +        case (e_FM_PORT_COUNTERS_DMA_UTIL):
39319 +        case (e_FM_PORT_COUNTERS_FIFO_UTIL):
39320 +        case (e_FM_PORT_COUNTERS_FRAME):
39321 +        case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
39322 +        case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
39323 +        case (e_FM_PORT_COUNTERS_WRED_DISCARD):
39324 +        case (e_FM_PORT_COUNTERS_LENGTH_ERR):
39325 +        case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
39326 +        case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
39327 +            return TRUE;
39328 +        case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
39329 +            if (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
39330 +                return FALSE;
39331 +            else
39332 +                return TRUE;
39333 +        default:
39334 +            return FALSE;
39335 +    }
39336 +}
39337 +
39338 +static t_Error BmiPortCheckAndGetCounterType(
39339 +        t_FmPort *p_FmPort, e_FmPortCounters counter,
39340 +        enum fman_port_stats_counters *p_StatsType,
39341 +        enum fman_port_perf_counters *p_PerfType, bool *p_IsStats)
39342 +{
39343 +    volatile uint32_t *p_Reg;
39344 +    bool isValid;
39345 +
39346 +    switch (p_FmPort->portType)
39347 +    {
39348 +        case (e_FM_PORT_TYPE_RX_10G):
39349 +        case (e_FM_PORT_TYPE_RX):
39350 +            p_Reg = &p_FmPort->port.bmi_regs->rx.fmbm_rstc;
39351 +            isValid = CheckRxBmiCounter(p_FmPort, counter);
39352 +            break;
39353 +        case (e_FM_PORT_TYPE_TX_10G):
39354 +        case (e_FM_PORT_TYPE_TX):
39355 +            p_Reg = &p_FmPort->port.bmi_regs->tx.fmbm_tstc;
39356 +            isValid = CheckTxBmiCounter(p_FmPort, counter);
39357 +            break;
39358 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
39359 +        case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
39360 +            p_Reg = &p_FmPort->port.bmi_regs->oh.fmbm_ostc;
39361 +            isValid = CheckOhBmiCounter(p_FmPort, counter);
39362 +            break;
39363 +        default:
39364 +            RETURN_ERROR(MINOR, E_INVALID_STATE, ("Unsupported port type"));
39365 +    }
39366 +
39367 +    if (!isValid)
39368 +        RETURN_ERROR(MINOR, E_INVALID_STATE,
39369 +                     ("Requested counter is not available for this port type"));
39370 +
39371 +    /* check that counters are enabled */
39372 +    switch (counter)
39373 +    {
39374 +        case (e_FM_PORT_COUNTERS_CYCLE):
39375 +        case (e_FM_PORT_COUNTERS_TASK_UTIL):
39376 +        case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
39377 +        case (e_FM_PORT_COUNTERS_DMA_UTIL):
39378 +        case (e_FM_PORT_COUNTERS_FIFO_UTIL):
39379 +        case (e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION):
39380 +            /* performance counters - may be read when disabled */
39381 +            *p_IsStats = FALSE;
39382 +            break;
39383 +        case (e_FM_PORT_COUNTERS_FRAME):
39384 +        case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
39385 +        case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
39386 +        case (e_FM_PORT_COUNTERS_RX_BAD_FRAME):
39387 +        case (e_FM_PORT_COUNTERS_RX_LARGE_FRAME):
39388 +        case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
39389 +        case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
39390 +        case (e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD):
39391 +        case (e_FM_PORT_COUNTERS_LENGTH_ERR):
39392 +        case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
39393 +        case (e_FM_PORT_COUNTERS_WRED_DISCARD):
39394 +            *p_IsStats = TRUE;
39395 +            if (!(GET_UINT32(*p_Reg) & BMI_COUNTERS_EN))
39396 +                RETURN_ERROR(MINOR, E_INVALID_STATE,
39397 +                             ("Requested counter was not enabled"));
39398 +            break;
39399 +        default:
39400 +            break;
39401 +    }
39402 +
39403 +    /* Set counter */
39404 +    switch (counter)
39405 +    {
39406 +        case (e_FM_PORT_COUNTERS_CYCLE):
39407 +            *p_PerfType = E_FMAN_PORT_PERF_CNT_CYCLE;
39408 +            break;
39409 +        case (e_FM_PORT_COUNTERS_TASK_UTIL):
39410 +            *p_PerfType = E_FMAN_PORT_PERF_CNT_TASK_UTIL;
39411 +            break;
39412 +        case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
39413 +            *p_PerfType = E_FMAN_PORT_PERF_CNT_QUEUE_UTIL;
39414 +            break;
39415 +        case (e_FM_PORT_COUNTERS_DMA_UTIL):
39416 +            *p_PerfType = E_FMAN_PORT_PERF_CNT_DMA_UTIL;
39417 +            break;
39418 +        case (e_FM_PORT_COUNTERS_FIFO_UTIL):
39419 +            *p_PerfType = E_FMAN_PORT_PERF_CNT_FIFO_UTIL;
39420 +            break;
39421 +        case (e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION):
39422 +            *p_PerfType = E_FMAN_PORT_PERF_CNT_RX_PAUSE;
39423 +            break;
39424 +        case (e_FM_PORT_COUNTERS_FRAME):
39425 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_FRAME;
39426 +            break;
39427 +        case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
39428 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_DISCARD;
39429 +            break;
39430 +        case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
39431 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_DEALLOC_BUF;
39432 +            break;
39433 +        case (e_FM_PORT_COUNTERS_RX_BAD_FRAME):
39434 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME;
39435 +            break;
39436 +        case (e_FM_PORT_COUNTERS_RX_LARGE_FRAME):
39437 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME;
39438 +            break;
39439 +        case (e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD):
39440 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF;
39441 +            break;
39442 +        case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
39443 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_FILTERED_FRAME;
39444 +            break;
39445 +        case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
39446 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_DMA_ERR;
39447 +            break;
39448 +        case (e_FM_PORT_COUNTERS_WRED_DISCARD):
39449 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_WRED_DISCARD;
39450 +            break;
39451 +        case (e_FM_PORT_COUNTERS_LENGTH_ERR):
39452 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_LEN_ERR;
39453 +            break;
39454 +        case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
39455 +            *p_StatsType = E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT;
39456 +            break;
39457 +        default:
39458 +            break;
39459 +    }
39460 +
39461 +    return E_OK;
39462 +}
39463 +
39464 +static t_Error AdditionalPrsParams(t_FmPort *p_FmPort,
39465 +                                   t_FmPcdPrsAdditionalHdrParams *p_HdrParams,
39466 +                                   uint32_t *p_SoftSeqAttachReg)
39467 +{
39468 +    uint8_t hdrNum, Ipv4HdrNum;
39469 +    u_FmPcdHdrPrsOpts *p_prsOpts;
39470 +    uint32_t tmpReg = *p_SoftSeqAttachReg, tmpPrsOffset;
39471 +
39472 +    if (IS_PRIVATE_HEADER(p_HdrParams->hdr)
39473 +            || IS_SPECIAL_HEADER(p_HdrParams->hdr))
39474 +        RETURN_ERROR(
39475 +                MAJOR, E_NOT_SUPPORTED,
39476 +                ("No additional parameters for private or special headers."));
39477 +
39478 +    if (p_HdrParams->errDisable)
39479 +        tmpReg |= PRS_HDR_ERROR_DIS;
39480 +
39481 +    /* Set parser options */
39482 +    if (p_HdrParams->usePrsOpts)
39483 +    {
39484 +        p_prsOpts = &p_HdrParams->prsOpts;
39485 +        switch (p_HdrParams->hdr)
39486 +        {
39487 +            case (HEADER_TYPE_MPLS):
39488 +                if (p_prsOpts->mplsPrsOptions.labelInterpretationEnable)
39489 +                    tmpReg |= PRS_HDR_MPLS_LBL_INTER_EN;
39490 +                hdrNum = GetPrsHdrNum(p_prsOpts->mplsPrsOptions.nextParse);
39491 +                if (hdrNum == ILLEGAL_HDR_NUM)
39492 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
39493 +                Ipv4HdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
39494 +                if (hdrNum < Ipv4HdrNum)
39495 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE,
39496 +                                 ("Header must be equal or higher than IPv4"));
39497 +                tmpReg |= ((uint32_t)hdrNum * PRS_HDR_ENTRY_SIZE)
39498 +                        << PRS_HDR_MPLS_NEXT_HDR_SHIFT;
39499 +                break;
39500 +            case (HEADER_TYPE_PPPoE):
39501 +                if (p_prsOpts->pppoePrsOptions.enableMTUCheck)
39502 +                    tmpReg |= PRS_HDR_PPPOE_MTU_CHECK_EN;
39503 +                break;
39504 +            case (HEADER_TYPE_IPv6):
39505 +                if (p_prsOpts->ipv6PrsOptions.routingHdrEnable)
39506 +                    tmpReg |= PRS_HDR_IPV6_ROUTE_HDR_EN;
39507 +                break;
39508 +            case (HEADER_TYPE_TCP):
39509 +                if (p_prsOpts->tcpPrsOptions.padIgnoreChecksum)
39510 +                    tmpReg |= PRS_HDR_TCP_PAD_REMOVAL;
39511 +                else
39512 +                    tmpReg &= ~PRS_HDR_TCP_PAD_REMOVAL;
39513 +                break;
39514 +            case (HEADER_TYPE_UDP):
39515 +                if (p_prsOpts->udpPrsOptions.padIgnoreChecksum)
39516 +                    tmpReg |= PRS_HDR_UDP_PAD_REMOVAL;
39517 +                else
39518 +                    tmpReg &= ~PRS_HDR_UDP_PAD_REMOVAL;
39519 +                break;
39520 +            default:
39521 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid header"));
39522 +        }
39523 +    }
39524 +
39525 +    /* set software parsing (address is divided in 2 since parser uses 2 byte access. */
39526 +    if (p_HdrParams->swPrsEnable)
39527 +    {
39528 +        tmpPrsOffset = FmPcdGetSwPrsOffset(p_FmPort->h_FmPcd, p_HdrParams->hdr,
39529 +                                           p_HdrParams->indexPerHdr);
39530 +        if (tmpPrsOffset == ILLEGAL_BASE)
39531 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
39532 +        tmpReg |= (PRS_HDR_SW_PRS_EN | tmpPrsOffset);
39533 +    }
39534 +    *p_SoftSeqAttachReg = tmpReg;
39535 +
39536 +    return E_OK;
39537 +}
39538 +
39539 +static uint32_t GetPortSchemeBindParams(
39540 +        t_Handle h_FmPort, t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind)
39541 +{
39542 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
39543 +    uint32_t walking1Mask = 0x80000000, tmp;
39544 +    uint8_t idx = 0;
39545 +
39546 +    p_SchemeBind->netEnvId = p_FmPort->netEnvId;
39547 +    p_SchemeBind->hardwarePortId = p_FmPort->hardwarePortId;
39548 +    p_SchemeBind->useClsPlan = p_FmPort->useClsPlan;
39549 +    p_SchemeBind->numOfSchemes = 0;
39550 +    tmp = p_FmPort->schemesPerPortVector;
39551 +    if (tmp)
39552 +    {
39553 +        while (tmp)
39554 +        {
39555 +            if (tmp & walking1Mask)
39556 +            {
39557 +                p_SchemeBind->schemesIds[p_SchemeBind->numOfSchemes] = idx;
39558 +                p_SchemeBind->numOfSchemes++;
39559 +                tmp &= ~walking1Mask;
39560 +            }
39561 +            walking1Mask >>= 1;
39562 +            idx++;
39563 +        }
39564 +    }
39565 +
39566 +    return tmp;
39567 +}
39568 +
39569 +static void FmPortCheckNApplyMacsec(t_Handle h_FmPort)
39570 +{
39571 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
39572 +    volatile uint32_t *p_BmiCfgReg = NULL;
39573 +    uint32_t macsecEn = BMI_PORT_CFG_EN_MACSEC;
39574 +    uint32_t lcv, walking1Mask = 0x80000000;
39575 +    uint8_t cnt = 0;
39576 +
39577 +    ASSERT_COND(p_FmPort);
39578 +    ASSERT_COND(p_FmPort->h_FmPcd);
39579 +    ASSERT_COND(!p_FmPort->p_FmPortDriverParam);
39580 +
39581 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
39582 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
39583 +        return;
39584 +
39585 +    p_BmiCfgReg = &p_FmPort->port.bmi_regs->rx.fmbm_rcfg;
39586 +    /* get LCV for MACSEC */
39587 +    if ((lcv = FmPcdGetMacsecLcv(p_FmPort->h_FmPcd, p_FmPort->netEnvId))
39588 +                    != 0)
39589 +    {
39590 +        while (!(lcv & walking1Mask))
39591 +        {
39592 +            cnt++;
39593 +            walking1Mask >>= 1;
39594 +        }
39595 +
39596 +        macsecEn |= (uint32_t)cnt << BMI_PORT_CFG_MS_SEL_SHIFT;
39597 +        WRITE_UINT32(*p_BmiCfgReg, GET_UINT32(*p_BmiCfgReg) | macsecEn);
39598 +    }
39599 +}
39600 +
39601 +static t_Error SetPcd(t_FmPort *p_FmPort, t_FmPortPcdParams *p_PcdParams)
39602 +{
39603 +    t_Error err = E_OK;
39604 +    uint32_t tmpReg;
39605 +    volatile uint32_t *p_BmiNia = NULL;
39606 +    volatile uint32_t *p_BmiPrsNia = NULL;
39607 +    volatile uint32_t *p_BmiPrsStartOffset = NULL;
39608 +    volatile uint32_t *p_BmiInitPrsResult = NULL;
39609 +    volatile uint32_t *p_BmiCcBase = NULL;
39610 +    uint16_t hdrNum, L3HdrNum, greHdrNum;
39611 +    int i;
39612 +    bool isEmptyClsPlanGrp;
39613 +    uint32_t tmpHxs[FM_PCD_PRS_NUM_OF_HDRS];
39614 +    uint16_t absoluteProfileId;
39615 +    uint8_t physicalSchemeId;
39616 +    uint32_t ccTreePhysOffset;
39617 +    t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
39618 +    uint32_t initialSwPrs = 0;
39619 +
39620 +    ASSERT_COND(p_FmPort);
39621 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
39622 +
39623 +    if (p_FmPort->imEn)
39624 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
39625 +                     ("available for non-independant mode ports only"));
39626 +
39627 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
39628 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
39629 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
39630 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
39631 +                     ("available for Rx and offline parsing ports only"));
39632 +
39633 +    p_FmPort->netEnvId = FmPcdGetNetEnvId(p_PcdParams->h_NetEnv);
39634 +
39635 +    p_FmPort->pcdEngines = 0;
39636 +
39637 +    /* initialize p_FmPort->pcdEngines field in port's structure */
39638 +    switch (p_PcdParams->pcdSupport)
39639 +    {
39640 +        case (e_FM_PORT_PCD_SUPPORT_NONE):
39641 +            RETURN_ERROR(
39642 +                    MAJOR,
39643 +                    E_INVALID_STATE,
39644 +                    ("No PCD configuration required if e_FM_PORT_PCD_SUPPORT_NONE selected"));
39645 +        case (e_FM_PORT_PCD_SUPPORT_PRS_ONLY):
39646 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39647 +            break;
39648 +        case (e_FM_PORT_PCD_SUPPORT_PLCR_ONLY):
39649 +            p_FmPort->pcdEngines |= FM_PCD_PLCR;
39650 +            break;
39651 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR):
39652 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39653 +            p_FmPort->pcdEngines |= FM_PCD_PLCR;
39654 +            break;
39655 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG):
39656 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39657 +            p_FmPort->pcdEngines |= FM_PCD_KG;
39658 +            break;
39659 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC):
39660 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39661 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39662 +            p_FmPort->pcdEngines |= FM_PCD_KG;
39663 +            break;
39664 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR):
39665 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39666 +            p_FmPort->pcdEngines |= FM_PCD_KG;
39667 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39668 +            p_FmPort->pcdEngines |= FM_PCD_PLCR;
39669 +            break;
39670 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC):
39671 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39672 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39673 +            break;
39674 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR):
39675 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39676 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39677 +            p_FmPort->pcdEngines |= FM_PCD_PLCR;
39678 +            break;
39679 +        case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR):
39680 +            p_FmPort->pcdEngines |= FM_PCD_PRS;
39681 +            p_FmPort->pcdEngines |= FM_PCD_KG;
39682 +            p_FmPort->pcdEngines |= FM_PCD_PLCR;
39683 +            break;
39684 +        case (e_FM_PORT_PCD_SUPPORT_CC_ONLY):
39685 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39686 +            break;
39687 +#ifdef FM_CAPWAP_SUPPORT
39688 +            case (e_FM_PORT_PCD_SUPPORT_CC_AND_KG):
39689 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39690 +            p_FmPort->pcdEngines |= FM_PCD_KG;
39691 +            break;
39692 +            case (e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR):
39693 +            p_FmPort->pcdEngines |= FM_PCD_CC;
39694 +            p_FmPort->pcdEngines |= FM_PCD_KG;
39695 +            p_FmPort->pcdEngines |= FM_PCD_PLCR;
39696 +            break;
39697 +#endif /* FM_CAPWAP_SUPPORT */
39698 +
39699 +        default:
39700 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid pcdSupport"));
39701 +    }
39702 +
39703 +    if ((p_FmPort->pcdEngines & FM_PCD_PRS)
39704 +            && (p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams
39705 +                    > FM_PCD_PRS_NUM_OF_HDRS))
39706 +        RETURN_ERROR(
39707 +                MAJOR,
39708 +                E_INVALID_VALUE,
39709 +                ("Port parser numOfHdrsWithAdditionalParams may not exceed %d", FM_PCD_PRS_NUM_OF_HDRS));
39710 +
39711 +    /* check that parameters exist for each and only each defined engine */
39712 +    if ((!!(p_FmPort->pcdEngines & FM_PCD_PRS) != !!p_PcdParams->p_PrsParams)
39713 +            || (!!(p_FmPort->pcdEngines & FM_PCD_KG)
39714 +                    != !!p_PcdParams->p_KgParams)
39715 +            || (!!(p_FmPort->pcdEngines & FM_PCD_CC)
39716 +                    != !!p_PcdParams->p_CcParams))
39717 +        RETURN_ERROR(
39718 +                MAJOR,
39719 +                E_INVALID_STATE,
39720 +                ("PCD initialization structure is not consistent with pcdSupport"));
39721 +
39722 +    /* get PCD registers pointers */
39723 +    switch (p_FmPort->portType)
39724 +    {
39725 +        case (e_FM_PORT_TYPE_RX_10G):
39726 +        case (e_FM_PORT_TYPE_RX):
39727 +            p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
39728 +            p_BmiPrsNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfpne;
39729 +            p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->rx.fmbm_rpso;
39730 +            p_BmiInitPrsResult = &p_FmPort->port.bmi_regs->rx.fmbm_rprai[0];
39731 +            p_BmiCcBase = &p_FmPort->port.bmi_regs->rx.fmbm_rccb;
39732 +            break;
39733 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
39734 +            p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
39735 +            p_BmiPrsNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofpne;
39736 +            p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->oh.fmbm_opso;
39737 +            p_BmiInitPrsResult = &p_FmPort->port.bmi_regs->oh.fmbm_oprai[0];
39738 +            p_BmiCcBase = &p_FmPort->port.bmi_regs->oh.fmbm_occb;
39739 +            break;
39740 +        default:
39741 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
39742 +    }
39743 +
39744 +    /* set PCD port parameter */
39745 +    if (p_FmPort->pcdEngines & FM_PCD_CC)
39746 +    {
39747 +        err = FmPcdCcBindTree(p_FmPort->h_FmPcd, p_PcdParams,
39748 +                              p_PcdParams->p_CcParams->h_CcTree,
39749 +                              &ccTreePhysOffset, p_FmPort);
39750 +        if (err)
39751 +            RETURN_ERROR(MAJOR, err, NO_MSG);
39752 +
39753 +        WRITE_UINT32(*p_BmiCcBase, ccTreePhysOffset);
39754 +        p_FmPort->ccTreeId = p_PcdParams->p_CcParams->h_CcTree;
39755 +    }
39756 +
39757 +    if (p_FmPort->pcdEngines & FM_PCD_KG)
39758 +    {
39759 +        if (p_PcdParams->p_KgParams->numOfSchemes == 0)
39760 +            RETURN_ERROR(
39761 +                    MAJOR,
39762 +                    E_INVALID_VALUE,
39763 +                    ("For ports using Keygen, at least one scheme must be bound. "));
39764 +
39765 +        err = FmPcdKgSetOrBindToClsPlanGrp(p_FmPort->h_FmPcd,
39766 +                                           p_FmPort->hardwarePortId,
39767 +                                           p_FmPort->netEnvId,
39768 +                                           p_FmPort->optArray,
39769 +                                           &p_FmPort->clsPlanGrpId,
39770 +                                           &isEmptyClsPlanGrp);
39771 +        if (err)
39772 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
39773 +                         ("FmPcdKgSetOrBindToClsPlanGrp failed. "));
39774 +
39775 +        p_FmPort->useClsPlan = !isEmptyClsPlanGrp;
39776 +
39777 +        schemeBind.netEnvId = p_FmPort->netEnvId;
39778 +        schemeBind.hardwarePortId = p_FmPort->hardwarePortId;
39779 +        schemeBind.numOfSchemes = p_PcdParams->p_KgParams->numOfSchemes;
39780 +        schemeBind.useClsPlan = p_FmPort->useClsPlan;
39781 +
39782 +        /* for each scheme */
39783 +        for (i = 0; i < p_PcdParams->p_KgParams->numOfSchemes; i++)
39784 +        {
39785 +            ASSERT_COND(p_PcdParams->p_KgParams->h_Schemes[i]);
39786 +            physicalSchemeId = FmPcdKgGetSchemeId(
39787 +                    p_PcdParams->p_KgParams->h_Schemes[i]);
39788 +            schemeBind.schemesIds[i] = physicalSchemeId;
39789 +            /* build vector */
39790 +            p_FmPort->schemesPerPortVector |= 1
39791 +                    << (31 - (uint32_t)physicalSchemeId);
39792 +#if (DPAA_VERSION >= 11)
39793 +            /*because of the state that VSPE is defined per port - all PCD path should be according to this requirement
39794 +             if !VSPE - in port, for relevant scheme VSPE can not be set*/
39795 +            if (!p_FmPort->vspe
39796 +                    && FmPcdKgGetVspe((p_PcdParams->p_KgParams->h_Schemes[i])))
39797 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,
39798 +                             ("VSPE is not at port level"));
39799 +#endif /* (DPAA_VERSION >= 11) */
39800 +        }
39801 +
39802 +        err = FmPcdKgBindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
39803 +        if (err)
39804 +            RETURN_ERROR(MAJOR, err, NO_MSG);
39805 +    }
39806 +
39807 +    /***************************/
39808 +    /* configure NIA after BMI */
39809 +    /***************************/
39810 +    /* rfne may contain FDCS bits, so first we read them. */
39811 +    p_FmPort->savedBmiNia = GET_UINT32(*p_BmiNia) & BMI_RFNE_FDCS_MASK;
39812 +
39813 +    /* If policer is used directly after BMI or PRS */
39814 +    if ((p_FmPort->pcdEngines & FM_PCD_PLCR)
39815 +            && ((p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_PLCR_ONLY)
39816 +                    || (p_PcdParams->pcdSupport
39817 +                            == e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR)))
39818 +    {
39819 +        if (!p_PcdParams->p_PlcrParams->h_Profile)
39820 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
39821 +                         ("Profile should be initialized"));
39822 +
39823 +        absoluteProfileId = (uint16_t)FmPcdPlcrProfileGetAbsoluteId(
39824 +                p_PcdParams->p_PlcrParams->h_Profile);
39825 +
39826 +        if (!FmPcdPlcrIsProfileValid(p_FmPort->h_FmPcd, absoluteProfileId))
39827 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
39828 +                         ("Private port profile not valid."));
39829 +
39830 +        tmpReg = (uint32_t)(absoluteProfileId | NIA_PLCR_ABSOLUTE);
39831 +
39832 +        if (p_FmPort->pcdEngines & FM_PCD_PRS) /* e_FM_PCD_SUPPORT_PRS_AND_PLCR */
39833 +            /* update BMI HPNIA */
39834 +            WRITE_UINT32(*p_BmiPrsNia, (uint32_t)(NIA_ENG_PLCR | tmpReg));
39835 +        else
39836 +            /* e_FM_PCD_SUPPORT_PLCR_ONLY */
39837 +            /* update BMI NIA */
39838 +            p_FmPort->savedBmiNia |= (uint32_t)(NIA_ENG_PLCR);
39839 +    }
39840 +
39841 +    /* if CC is used directly after BMI */
39842 +    if ((p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_CC_ONLY)
39843 +#ifdef FM_CAPWAP_SUPPORT
39844 +    || (p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_CC_AND_KG)
39845 +    || (p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR)
39846 +#endif /* FM_CAPWAP_SUPPORT */
39847 +    )
39848 +    {
39849 +        if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
39850 +            RETURN_ERROR(
39851 +                    MAJOR,
39852 +                    E_INVALID_OPERATION,
39853 +                    ("e_FM_PORT_PCD_SUPPORT_CC_xx available for offline parsing ports only"));
39854 +        p_FmPort->savedBmiNia |= (uint32_t)(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC);
39855 +        /* check that prs start offset == RIM[FOF] */
39856 +    }
39857 +
39858 +    if (p_FmPort->pcdEngines & FM_PCD_PRS)
39859 +    {
39860 +        ASSERT_COND(p_PcdParams->p_PrsParams);
39861 +#if (DPAA_VERSION >= 11)
39862 +        if (p_PcdParams->p_PrsParams->firstPrsHdr == HEADER_TYPE_CAPWAP)
39863 +            hdrNum = OFFLOAD_SW_PATCH_CAPWAP_LABEL;
39864 +        else
39865 +        {
39866 +#endif /* (DPAA_VERSION >= 11) */
39867 +            /* if PRS is used it is always first */
39868 +                hdrNum = GetPrsHdrNum(p_PcdParams->p_PrsParams->firstPrsHdr);
39869 +            if (hdrNum == ILLEGAL_HDR_NUM)
39870 +                RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unsupported header."));
39871 +#if (DPAA_VERSION >= 11)
39872 +        }
39873 +#endif /* (DPAA_VERSION >= 11) */
39874 +        p_FmPort->savedBmiNia |= (uint32_t)(NIA_ENG_PRS | (uint32_t)(hdrNum));
39875 +        /* set after parser NIA */
39876 +        tmpReg = 0;
39877 +        switch (p_PcdParams->pcdSupport)
39878 +        {
39879 +            case (e_FM_PORT_PCD_SUPPORT_PRS_ONLY):
39880 +                WRITE_UINT32(*p_BmiPrsNia,
39881 +                             GET_NIA_BMI_AC_ENQ_FRAME(p_FmPort->h_FmPcd));
39882 +                break;
39883 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC):
39884 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR):
39885 +                tmpReg = NIA_KG_CC_EN;
39886 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG):
39887 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR):
39888 +                if (p_PcdParams->p_KgParams->directScheme)
39889 +                {
39890 +                    physicalSchemeId = FmPcdKgGetSchemeId(
39891 +                            p_PcdParams->p_KgParams->h_DirectScheme);
39892 +                    /* check that this scheme was bound to this port */
39893 +                    for (i = 0; i < p_PcdParams->p_KgParams->numOfSchemes; i++)
39894 +                        if (p_PcdParams->p_KgParams->h_DirectScheme
39895 +                                == p_PcdParams->p_KgParams->h_Schemes[i])
39896 +                            break;
39897 +                    if (i == p_PcdParams->p_KgParams->numOfSchemes)
39898 +                        RETURN_ERROR(
39899 +                                MAJOR,
39900 +                                E_INVALID_VALUE,
39901 +                                ("Direct scheme is not one of the port selected schemes."));
39902 +                    tmpReg |= (uint32_t)(NIA_KG_DIRECT | physicalSchemeId);
39903 +                }
39904 +                WRITE_UINT32(*p_BmiPrsNia, NIA_ENG_KG | tmpReg);
39905 +                break;
39906 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC):
39907 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR):
39908 +                WRITE_UINT32(*p_BmiPrsNia,
39909 +                             (uint32_t)(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
39910 +                break;
39911 +            case (e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR):
39912 +                break;
39913 +            default:
39914 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid PCD support"));
39915 +        }
39916 +
39917 +        /* set start parsing offset */
39918 +        WRITE_UINT32(*p_BmiPrsStartOffset,
39919 +                     p_PcdParams->p_PrsParams->parsingOffset);
39920 +
39921 +        /************************************/
39922 +        /* Parser port parameters           */
39923 +        /************************************/
39924 +        /* stop before configuring */
39925 +        WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pcac, PRS_CAC_STOP);
39926 +        /* wait for parser to be in idle state */
39927 +        while (GET_UINT32(p_FmPort->p_FmPortPrsRegs->pcac) & PRS_CAC_ACTIVE)
39928 +            ;
39929 +
39930 +        /* set soft seq attachment register */
39931 +        memset(tmpHxs, 0, FM_PCD_PRS_NUM_OF_HDRS * sizeof(uint32_t));
39932 +
39933 +        /* set protocol options */
39934 +        for (i = 0; p_FmPort->optArray[i]; i++)
39935 +            switch (p_FmPort->optArray[i])
39936 +            {
39937 +                case (ETH_BROADCAST):
39938 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_ETH);
39939 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_ETH_BC_SHIFT;
39940 +                    break;
39941 +                case (ETH_MULTICAST):
39942 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_ETH);
39943 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_ETH_MC_SHIFT;
39944 +                    break;
39945 +                case (VLAN_STACKED):
39946 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_VLAN);
39947 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_VLAN_STACKED_SHIFT;
39948 +                    break;
39949 +                case (MPLS_STACKED):
39950 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_MPLS);
39951 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_MPLS_STACKED_SHIFT;
39952 +                    break;
39953 +                case (IPV4_BROADCAST_1):
39954 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
39955 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_1_BC_SHIFT;
39956 +                    break;
39957 +                case (IPV4_MULTICAST_1):
39958 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
39959 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_1_MC_SHIFT;
39960 +                    break;
39961 +                case (IPV4_UNICAST_2):
39962 +                                       hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
39963 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_2_UC_SHIFT;
39964 +                    break;
39965 +                case (IPV4_MULTICAST_BROADCAST_2):
39966 +                                       hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
39967 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_2_MC_BC_SHIFT;
39968 +                    break;
39969 +                case (IPV6_MULTICAST_1):
39970 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
39971 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV6_1_MC_SHIFT;
39972 +                    break;
39973 +                case (IPV6_UNICAST_2):
39974 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
39975 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV6_2_UC_SHIFT;
39976 +                    break;
39977 +                case (IPV6_MULTICAST_2):
39978 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
39979 +                    tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV6_2_MC_SHIFT;
39980 +                    break;
39981 +            }
39982 +
39983 +        if (FmPcdNetEnvIsHdrExist(p_FmPort->h_FmPcd, p_FmPort->netEnvId,
39984 +                                  HEADER_TYPE_UDP_ENCAP_ESP))
39985 +        {
39986 +            if (p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams == FM_PCD_PRS_NUM_OF_HDRS)
39987 +                RETURN_ERROR(
39988 +                         MINOR, E_INVALID_VALUE,
39989 +                         ("If HEADER_TYPE_UDP_ENCAP_ESP is used, numOfHdrsWithAdditionalParams may be up to FM_PCD_PRS_NUM_OF_HDRS - 1"));
39990 +
39991 +            p_PcdParams->p_PrsParams->additionalParams[p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams].hdr =
39992 +                    HEADER_TYPE_UDP;
39993 +            p_PcdParams->p_PrsParams->additionalParams[p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams].swPrsEnable =
39994 +                    TRUE;
39995 +            p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams++;
39996 +        }
39997 +
39998 +        /* set MPLS default next header - HW reset workaround  */
39999 +        hdrNum = GetPrsHdrNum(HEADER_TYPE_MPLS);
40000 +        tmpHxs[hdrNum] |= PRS_HDR_MPLS_LBL_INTER_EN;
40001 +        L3HdrNum = GetPrsHdrNum(HEADER_TYPE_USER_DEFINED_L3);
40002 +        tmpHxs[hdrNum] |= (uint32_t)L3HdrNum << PRS_HDR_MPLS_NEXT_HDR_SHIFT;
40003 +
40004 +        /* for GRE, disable errors */
40005 +        greHdrNum = GetPrsHdrNum(HEADER_TYPE_GRE);
40006 +        tmpHxs[greHdrNum] |= PRS_HDR_ERROR_DIS;
40007 +
40008 +        /* For UDP remove PAD from L4 checksum calculation */
40009 +        hdrNum = GetPrsHdrNum(HEADER_TYPE_UDP);
40010 +        tmpHxs[hdrNum] |= PRS_HDR_UDP_PAD_REMOVAL;
40011 +        /* For TCP remove PAD from L4 checksum calculation */
40012 +        hdrNum = GetPrsHdrNum(HEADER_TYPE_TCP);
40013 +        tmpHxs[hdrNum] |= PRS_HDR_TCP_PAD_REMOVAL;
40014 +
40015 +        /* config additional params for specific headers */
40016 +        for (i = 0; i < p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams;
40017 +                i++)
40018 +        {
40019 +            /* case for using sw parser as the initial NIA address, before
40020 +               * HW parsing
40021 +               */
40022 +            if ((p_PcdParams->p_PrsParams->additionalParams[i].hdr == HEADER_TYPE_NONE) &&
40023 +                    p_PcdParams->p_PrsParams->additionalParams[i].swPrsEnable)
40024 +            {
40025 +                initialSwPrs = FmPcdGetSwPrsOffset(p_FmPort->h_FmPcd, HEADER_TYPE_NONE,
40026 +                               p_PcdParams->p_PrsParams->additionalParams[i].indexPerHdr);
40027 +                if (initialSwPrs == ILLEGAL_BASE)
40028 +                    RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
40029 +
40030 +                /* clear parser first HXS */
40031 +                p_FmPort->savedBmiNia &= ~BMI_RFNE_HXS_MASK; /* 0x000000FF */
40032 +                /* rewrite with soft parser start */
40033 +                p_FmPort->savedBmiNia |= initialSwPrs;
40034 +                continue;
40035 +            }
40036 +
40037 +            hdrNum =
40038 +                GetPrsHdrNum(p_PcdParams->p_PrsParams->additionalParams[i].hdr);
40039 +            if (hdrNum == ILLEGAL_HDR_NUM)
40040 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
40041 +            if (hdrNum == NO_HDR_NUM)
40042 +                RETURN_ERROR(
40043 +                        MAJOR, E_INVALID_VALUE,
40044 +                        ("Private headers may not use additional parameters"));
40045 +
40046 +            err = AdditionalPrsParams(
40047 +                    p_FmPort, &p_PcdParams->p_PrsParams->additionalParams[i],
40048 +                    &tmpHxs[hdrNum]);
40049 +            if (err)
40050 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
40051 +        }
40052 +
40053 +        /* Check if ip-reassembly port - need to link sw-parser code */
40054 +        if (p_FmPort->h_IpReassemblyManip)
40055 +        {
40056 +           /* link to sw parser code for IP Frag - only if no other code is applied. */
40057 +            hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
40058 +            if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
40059 +                tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv4_IPR_LABEL);
40060 +            hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
40061 +            if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
40062 +                tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPR_LABEL);
40063 +        } else {
40064 +            if (FmPcdNetEnvIsHdrExist(p_FmPort->h_FmPcd, p_FmPort->netEnvId, HEADER_TYPE_UDP_LITE))
40065 +            {
40066 +                hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
40067 +                if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
40068 +                    tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPF_LABEL);
40069 +            } else if ((FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd)
40070 +                       && (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)))
40071 +                {
40072 +                    hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
40073 +                    if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
40074 +                        tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPF_LABEL);
40075 +                }
40076 +            }
40077 +
40078 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
40079 +        if (FmPcdNetEnvIsHdrExist(p_FmPort->h_FmPcd, p_FmPort->netEnvId,
40080 +                        HEADER_TYPE_UDP_LITE))
40081 +        {
40082 +            /* link to sw parser code for udp lite - only if no other code is applied. */
40083 +            hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
40084 +            if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
40085 +            tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | UDP_LITE_SW_PATCH_LABEL);
40086 +        }
40087 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
40088 +        for (i = 0; i < FM_PCD_PRS_NUM_OF_HDRS; i++)
40089 +        {
40090 +            /* For all header set LCV as taken from netEnv*/
40091 +            WRITE_UINT32(
40092 +                    p_FmPort->p_FmPortPrsRegs->hdrs[i].lcv,
40093 +                    FmPcdGetLcv(p_FmPort->h_FmPcd, p_FmPort->netEnvId, (uint8_t)i));
40094 +            /* set HXS register according to default+Additional params+protocol options */
40095 +            WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->hdrs[i].softSeqAttach,
40096 +                         tmpHxs[i]);
40097 +        }
40098 +
40099 +        /* set tpid. */
40100 +        tmpReg = PRS_TPID_DFLT;
40101 +        if (p_PcdParams->p_PrsParams->setVlanTpid1)
40102 +        {
40103 +            tmpReg &= PRS_TPID2_MASK;
40104 +            tmpReg |= (uint32_t)p_PcdParams->p_PrsParams->vlanTpid1
40105 +                    << PRS_PCTPID_SHIFT;
40106 +        }
40107 +        if (p_PcdParams->p_PrsParams->setVlanTpid2)
40108 +        {
40109 +            tmpReg &= PRS_TPID1_MASK;
40110 +            tmpReg |= (uint32_t)p_PcdParams->p_PrsParams->vlanTpid2;
40111 +        }WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pctpid, tmpReg);
40112 +
40113 +        /* enable parser */
40114 +        WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pcac, 0);
40115 +
40116 +        if (p_PcdParams->p_PrsParams->prsResultPrivateInfo)
40117 +            p_FmPort->privateInfo =
40118 +                    p_PcdParams->p_PrsParams->prsResultPrivateInfo;
40119 +
40120 +    } /* end parser */
40121 +    else {
40122 +        if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd)
40123 +            && (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
40124 +        {
40125 +            hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
40126 +            WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->hdrs[hdrNum].softSeqAttach,
40127 +                         (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPF_LABEL));
40128 +        }
40129 +
40130 +        WRITE_UINT32(*p_BmiPrsStartOffset, 0);
40131 +
40132 +        p_FmPort->privateInfo = 0;
40133 +    }
40134 +
40135 +    FmPortCheckNApplyMacsec(p_FmPort);
40136 +
40137 +    WRITE_UINT32(
40138 +            *p_BmiPrsStartOffset,
40139 +            GET_UINT32(*p_BmiPrsStartOffset) + p_FmPort->internalBufferOffset);
40140 +
40141 +    /* set initial parser result - used for all engines */
40142 +    for (i = 0; i < FM_PORT_PRS_RESULT_NUM_OF_WORDS; i++)
40143 +    {
40144 +        if (!i)
40145 +            WRITE_UINT32(
40146 +                    *(p_BmiInitPrsResult),
40147 +                    (uint32_t)(((uint32_t)p_FmPort->privateInfo << BMI_PR_PORTID_SHIFT) | BMI_PRS_RESULT_HIGH));
40148 +        else
40149 +        {
40150 +            if (i < FM_PORT_PRS_RESULT_NUM_OF_WORDS / 2)
40151 +                WRITE_UINT32(*(p_BmiInitPrsResult+i), BMI_PRS_RESULT_HIGH);
40152 +            else
40153 +                WRITE_UINT32(*(p_BmiInitPrsResult+i), BMI_PRS_RESULT_LOW);
40154 +        }
40155 +    }
40156 +
40157 +    return E_OK;
40158 +}
40159 +
40160 +static t_Error DeletePcd(t_FmPort *p_FmPort)
40161 +{
40162 +    t_Error err = E_OK;
40163 +    volatile uint32_t *p_BmiNia = NULL;
40164 +    volatile uint32_t *p_BmiPrsStartOffset = NULL;
40165 +
40166 +    ASSERT_COND(p_FmPort);
40167 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
40168 +
40169 +    if (p_FmPort->imEn)
40170 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
40171 +                     ("available for non-independant mode ports only"));
40172 +
40173 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
40174 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
40175 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
40176 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
40177 +                     ("available for Rx and offline parsing ports only"));
40178 +
40179 +    if (!p_FmPort->pcdEngines)
40180 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("called for non PCD port"));
40181 +
40182 +    /* get PCD registers pointers */
40183 +    switch (p_FmPort->portType)
40184 +    {
40185 +        case (e_FM_PORT_TYPE_RX_10G):
40186 +        case (e_FM_PORT_TYPE_RX):
40187 +            p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
40188 +            p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->rx.fmbm_rpso;
40189 +            break;
40190 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
40191 +            p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
40192 +            p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->oh.fmbm_opso;
40193 +            break;
40194 +        default:
40195 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
40196 +    }
40197 +
40198 +    if ((GET_UINT32(*p_BmiNia) & GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME())
40199 +            != GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME())
40200 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
40201 +                     ("port has to be detached previousely"));
40202 +
40203 +    WRITE_UINT32(*p_BmiPrsStartOffset, 0);
40204 +
40205 +    /* "cut" PCD out of the port's flow - go to BMI */
40206 +    /* WRITE_UINT32(*p_BmiNia, (p_FmPort->savedBmiNia & BMI_RFNE_FDCS_MASK) | (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)); */
40207 +
40208 +    if (p_FmPort->pcdEngines & FM_PCD_PRS)
40209 +    {
40210 +        /* stop parser */
40211 +        WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pcac, PRS_CAC_STOP);
40212 +        /* wait for parser to be in idle state */
40213 +        while (GET_UINT32(p_FmPort->p_FmPortPrsRegs->pcac) & PRS_CAC_ACTIVE)
40214 +            ;
40215 +    }
40216 +
40217 +    if (p_FmPort->pcdEngines & FM_PCD_KG)
40218 +    {
40219 +        t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
40220 +
40221 +        /* unbind all schemes */
40222 +        p_FmPort->schemesPerPortVector = GetPortSchemeBindParams(p_FmPort,
40223 +                                                                 &schemeBind);
40224 +
40225 +        err = FmPcdKgUnbindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
40226 +        if (err)
40227 +            RETURN_ERROR(MAJOR, err, NO_MSG);
40228 +
40229 +        err = FmPcdKgDeleteOrUnbindPortToClsPlanGrp(p_FmPort->h_FmPcd,
40230 +                                                    p_FmPort->hardwarePortId,
40231 +                                                    p_FmPort->clsPlanGrpId);
40232 +        if (err)
40233 +            RETURN_ERROR(MAJOR, err, NO_MSG);
40234 +        p_FmPort->useClsPlan = FALSE;
40235 +    }
40236 +
40237 +    if (p_FmPort->pcdEngines & FM_PCD_CC)
40238 +    {
40239 +        /* unbind - we need to get the treeId too */
40240 +        err = FmPcdCcUnbindTree(p_FmPort->h_FmPcd, p_FmPort->ccTreeId);
40241 +        if (err)
40242 +            RETURN_ERROR(MAJOR, err, NO_MSG);
40243 +    }
40244 +
40245 +    p_FmPort->pcdEngines = 0;
40246 +
40247 +    return E_OK;
40248 +}
40249 +
40250 +static t_Error AttachPCD(t_FmPort *p_FmPort)
40251 +{
40252 +    volatile uint32_t *p_BmiNia = NULL;
40253 +
40254 +    ASSERT_COND(p_FmPort);
40255 +
40256 +    /* get PCD registers pointers */
40257 +    if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40258 +        p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
40259 +    else
40260 +        p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
40261 +
40262 +    /* check that current NIA is BMI to BMI */
40263 +    if ((GET_UINT32(*p_BmiNia) & ~BMI_RFNE_FDCS_MASK)
40264 +            != GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME())
40265 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
40266 +                     ("may be called only for ports in BMI-to-BMI state."));
40267 +
40268 +    if (p_FmPort->requiredAction & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY)
40269 +        if (FmSetNumOfRiscsPerPort(p_FmPort->h_Fm, p_FmPort->hardwarePortId, 1,
40270 +                                   p_FmPort->orFmanCtrl) != E_OK)
40271 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
40272 +
40273 +    if (p_FmPort->requiredAction & UPDATE_NIA_CMNE)
40274 +    {
40275 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40276 +            WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ocmne,
40277 +                         p_FmPort->savedBmiCmne);
40278 +        else
40279 +            WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rcmne,
40280 +                         p_FmPort->savedBmiCmne);
40281 +    }
40282 +
40283 +    if (p_FmPort->requiredAction & UPDATE_NIA_PNEN)
40284 +        WRITE_UINT32(p_FmPort->p_FmPortQmiRegs->fmqm_pnen,
40285 +                     p_FmPort->savedQmiPnen);
40286 +
40287 +    if (p_FmPort->requiredAction & UPDATE_NIA_FENE)
40288 +    {
40289 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40290 +            WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofene,
40291 +                         p_FmPort->savedBmiFene);
40292 +        else
40293 +            WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfene,
40294 +                         p_FmPort->savedBmiFene);
40295 +    }
40296 +
40297 +    if (p_FmPort->requiredAction & UPDATE_NIA_FPNE)
40298 +    {
40299 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40300 +            WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofpne,
40301 +                         p_FmPort->savedBmiFpne);
40302 +        else
40303 +            WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfpne,
40304 +                         p_FmPort->savedBmiFpne);
40305 +    }
40306 +
40307 +    if (p_FmPort->requiredAction & UPDATE_OFP_DPTE)
40308 +    {
40309 +        ASSERT_COND(p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING);
40310 +
40311 +        WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofp,
40312 +                     p_FmPort->savedBmiOfp);
40313 +    }
40314 +
40315 +    WRITE_UINT32(*p_BmiNia, p_FmPort->savedBmiNia);
40316 +
40317 +    if (p_FmPort->requiredAction & UPDATE_NIA_PNDN)
40318 +    {
40319 +        p_FmPort->origNonRxQmiRegsPndn =
40320 +                GET_UINT32(p_FmPort->port.qmi_regs->fmqm_pndn);
40321 +        WRITE_UINT32(p_FmPort->port.qmi_regs->fmqm_pndn,
40322 +                     p_FmPort->savedNonRxQmiRegsPndn);
40323 +    }
40324 +
40325 +    return E_OK;
40326 +}
40327 +
40328 +static t_Error DetachPCD(t_FmPort *p_FmPort)
40329 +{
40330 +    volatile uint32_t *p_BmiNia = NULL;
40331 +
40332 +    ASSERT_COND(p_FmPort);
40333 +
40334 +    /* get PCD registers pointers */
40335 +    if (p_FmPort->requiredAction & UPDATE_NIA_PNDN)
40336 +        WRITE_UINT32(p_FmPort->port.qmi_regs->fmqm_pndn,
40337 +                     p_FmPort->origNonRxQmiRegsPndn);
40338 +
40339 +    if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40340 +        p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
40341 +    else
40342 +        p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
40343 +
40344 +    WRITE_UINT32(
40345 +            *p_BmiNia,
40346 +            (p_FmPort->savedBmiNia & BMI_RFNE_FDCS_MASK) | GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME());
40347 +
40348 +    if (FmPcdGetHcHandle(p_FmPort->h_FmPcd))
40349 +        FmPcdHcSync(p_FmPort->h_FmPcd);
40350 +
40351 +    if (p_FmPort->requiredAction & UPDATE_NIA_FENE)
40352 +    {
40353 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40354 +            WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofene,
40355 +                         NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR);
40356 +        else
40357 +            WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfene,
40358 +                         NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR);
40359 +    }
40360 +
40361 +    if (p_FmPort->requiredAction & UPDATE_NIA_PNEN)
40362 +        WRITE_UINT32(p_FmPort->port.qmi_regs->fmqm_pnen,
40363 +                     NIA_ENG_BMI | NIA_BMI_AC_RELEASE);
40364 +
40365 +    if (p_FmPort->requiredAction & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY)
40366 +        if (FmSetNumOfRiscsPerPort(p_FmPort->h_Fm, p_FmPort->hardwarePortId, 2,
40367 +                                   p_FmPort->orFmanCtrl) != E_OK)
40368 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
40369 +
40370 +    p_FmPort->requiredAction = 0;
40371 +
40372 +    return E_OK;
40373 +}
40374 +
40375 +/*****************************************************************************/
40376 +/*              Inter-module API routines                                    */
40377 +/*****************************************************************************/
40378 +void FmPortSetMacsecCmd(t_Handle h_FmPort, uint8_t dfltSci)
40379 +{
40380 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
40381 +    volatile uint32_t *p_BmiCfgReg = NULL;
40382 +    uint32_t tmpReg;
40383 +
40384 +    SANITY_CHECK_RETURN(p_FmPort, E_INVALID_HANDLE);
40385 +    SANITY_CHECK_RETURN(p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
40386 +
40387 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
40388 +            && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
40389 +    {
40390 +        REPORT_ERROR(MAJOR, E_INVALID_OPERATION, ("The routine is relevant for Tx ports only"));
40391 +        return;
40392 +    }
40393 +
40394 +    p_BmiCfgReg = &p_FmPort->port.bmi_regs->tx.fmbm_tfca;
40395 +    tmpReg = GET_UINT32(*p_BmiCfgReg) & ~BMI_CMD_ATTR_MACCMD_MASK;
40396 +    tmpReg |= BMI_CMD_ATTR_MACCMD_SECURED;
40397 +    tmpReg |= (((uint32_t)dfltSci << BMI_CMD_ATTR_MACCMD_SC_SHIFT)
40398 +            & BMI_CMD_ATTR_MACCMD_SC_MASK);
40399 +
40400 +    WRITE_UINT32(*p_BmiCfgReg, tmpReg);
40401 +}
40402 +
40403 +uint8_t FmPortGetNetEnvId(t_Handle h_FmPort)
40404 +{
40405 +    return ((t_FmPort*)h_FmPort)->netEnvId;
40406 +}
40407 +
40408 +uint8_t FmPortGetHardwarePortId(t_Handle h_FmPort)
40409 +{
40410 +    return ((t_FmPort*)h_FmPort)->hardwarePortId;
40411 +}
40412 +
40413 +uint32_t FmPortGetPcdEngines(t_Handle h_FmPort)
40414 +{
40415 +    return ((t_FmPort*)h_FmPort)->pcdEngines;
40416 +}
40417 +
40418 +#if (DPAA_VERSION >= 11)
40419 +t_Error FmPortSetGprFunc(t_Handle h_FmPort, e_FmPortGprFuncType gprFunc,
40420 +                         void **p_Value)
40421 +{
40422 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
40423 +    uint32_t muramPageOffset;
40424 +
40425 +    ASSERT_COND(p_FmPort);
40426 +    ASSERT_COND(p_Value);
40427 +
40428 +    if (p_FmPort->gprFunc != e_FM_PORT_GPR_EMPTY)
40429 +    {
40430 +        if (p_FmPort->gprFunc != gprFunc)
40431 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
40432 +                         ("gpr was assigned with different func"));
40433 +    }
40434 +    else
40435 +    {
40436 +        switch (gprFunc)
40437 +        {
40438 +            case (e_FM_PORT_GPR_MURAM_PAGE):
40439 +                p_FmPort->p_ParamsPage = FM_MURAM_AllocMem(p_FmPort->h_FmMuram,
40440 +                                                           256, 8);
40441 +                if (!p_FmPort->p_ParamsPage)
40442 +                    RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for page"));
40443 +
40444 +                IOMemSet32(p_FmPort->p_ParamsPage, 0, 256);
40445 +                muramPageOffset =
40446 +                        (uint32_t)(XX_VirtToPhys(p_FmPort->p_ParamsPage)
40447 +                                - p_FmPort->fmMuramPhysBaseAddr);
40448 +                switch (p_FmPort->portType)
40449 +                {
40450 +                    case (e_FM_PORT_TYPE_RX_10G):
40451 +                    case (e_FM_PORT_TYPE_RX):
40452 +                        WRITE_UINT32(
40453 +                                p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr,
40454 +                                muramPageOffset);
40455 +                        break;
40456 +                    case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
40457 +                        WRITE_UINT32(
40458 +                                p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ogpr,
40459 +                                muramPageOffset);
40460 +                        break;
40461 +                    default:
40462 +                        RETURN_ERROR(MAJOR, E_INVALID_STATE,
40463 +                                     ("Invalid port type"));
40464 +                }
40465 +                break;
40466 +            default:
40467 +                RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
40468 +        }
40469 +        p_FmPort->gprFunc = gprFunc;
40470 +    }
40471 +
40472 +    switch (p_FmPort->gprFunc)
40473 +    {
40474 +        case (e_FM_PORT_GPR_MURAM_PAGE):
40475 +            *p_Value = p_FmPort->p_ParamsPage;
40476 +            break;
40477 +        default:
40478 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
40479 +    }
40480 +
40481 +    return E_OK;
40482 +}
40483 +#endif /* (DPAA_VERSION >= 11) */
40484 +
40485 +t_Error FmPortGetSetCcParams(t_Handle h_FmPort,
40486 +                             t_FmPortGetSetCcParams *p_CcParams)
40487 +{
40488 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
40489 +    int tmpInt;
40490 +    volatile uint32_t *p_BmiPrsStartOffset = NULL;
40491 +
40492 +    /* this function called from Cc for pass and receive parameters port params between CC and PORT*/
40493 +
40494 +    if ((p_CcParams->getCcParams.type & OFFSET_OF_PR)
40495 +            && (p_FmPort->bufferOffsets.prsResultOffset != ILLEGAL_BASE))
40496 +    {
40497 +        p_CcParams->getCcParams.prOffset =
40498 +                (uint8_t)p_FmPort->bufferOffsets.prsResultOffset;
40499 +        p_CcParams->getCcParams.type &= ~OFFSET_OF_PR;
40500 +    }
40501 +    if (p_CcParams->getCcParams.type & HW_PORT_ID)
40502 +    {
40503 +        p_CcParams->getCcParams.hardwarePortId =
40504 +                (uint8_t)p_FmPort->hardwarePortId;
40505 +        p_CcParams->getCcParams.type &= ~HW_PORT_ID;
40506 +    }
40507 +    if ((p_CcParams->getCcParams.type & OFFSET_OF_DATA)
40508 +            && (p_FmPort->bufferOffsets.dataOffset != ILLEGAL_BASE))
40509 +    {
40510 +        p_CcParams->getCcParams.dataOffset =
40511 +                (uint16_t)p_FmPort->bufferOffsets.dataOffset;
40512 +        p_CcParams->getCcParams.type &= ~OFFSET_OF_DATA;
40513 +    }
40514 +    if (p_CcParams->getCcParams.type & NUM_OF_TASKS)
40515 +    {
40516 +        p_CcParams->getCcParams.numOfTasks = (uint8_t)p_FmPort->tasks.num;
40517 +        p_CcParams->getCcParams.type &= ~NUM_OF_TASKS;
40518 +    }
40519 +    if (p_CcParams->getCcParams.type & NUM_OF_EXTRA_TASKS)
40520 +    {
40521 +        p_CcParams->getCcParams.numOfExtraTasks =
40522 +                (uint8_t)p_FmPort->tasks.extra;
40523 +        p_CcParams->getCcParams.type &= ~NUM_OF_EXTRA_TASKS;
40524 +    }
40525 +    if (p_CcParams->getCcParams.type & FM_REV)
40526 +    {
40527 +        p_CcParams->getCcParams.revInfo.majorRev = p_FmPort->fmRevInfo.majorRev;
40528 +        p_CcParams->getCcParams.revInfo.minorRev = p_FmPort->fmRevInfo.minorRev;
40529 +        p_CcParams->getCcParams.type &= ~FM_REV;
40530 +    }
40531 +    if (p_CcParams->getCcParams.type & DISCARD_MASK)
40532 +    {
40533 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40534 +            p_CcParams->getCcParams.discardMask =
40535 +                    GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm);
40536 +        else
40537 +            p_CcParams->getCcParams.discardMask =
40538 +                    GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm);
40539 +        p_CcParams->getCcParams.type &= ~DISCARD_MASK;
40540 +    }
40541 +    if (p_CcParams->getCcParams.type & MANIP_EXTRA_SPACE)
40542 +    {
40543 +        p_CcParams->getCcParams.internalBufferOffset =
40544 +                p_FmPort->internalBufferOffset;
40545 +        p_CcParams->getCcParams.type &= ~MANIP_EXTRA_SPACE;
40546 +    }
40547 +    if (p_CcParams->getCcParams.type & GET_NIA_FPNE)
40548 +    {
40549 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40550 +            p_CcParams->getCcParams.nia =
40551 +                    GET_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofpne);
40552 +        else
40553 +            p_CcParams->getCcParams.nia =
40554 +                    GET_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfpne);
40555 +        p_CcParams->getCcParams.type &= ~GET_NIA_FPNE;
40556 +    }
40557 +    if (p_CcParams->getCcParams.type & GET_NIA_PNDN)
40558 +    {
40559 +        if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40560 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
40561 +        p_CcParams->getCcParams.nia =
40562 +                GET_UINT32(p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs.fmqm_pndn);
40563 +        p_CcParams->getCcParams.type &= ~GET_NIA_PNDN;
40564 +    }
40565 +
40566 +    if ((p_CcParams->setCcParams.type & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY)
40567 +            && !(p_FmPort->requiredAction & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY))
40568 +    {
40569 +        p_FmPort->requiredAction |= UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY;
40570 +        p_FmPort->orFmanCtrl = p_CcParams->setCcParams.orFmanCtrl;
40571 +    }
40572 +
40573 +    if ((p_CcParams->setCcParams.type & UPDATE_NIA_PNEN)
40574 +            && !(p_FmPort->requiredAction & UPDATE_NIA_PNEN))
40575 +    {
40576 +        p_FmPort->savedQmiPnen = p_CcParams->setCcParams.nia;
40577 +        p_FmPort->requiredAction |= UPDATE_NIA_PNEN;
40578 +    }
40579 +    else
40580 +        if (p_CcParams->setCcParams.type & UPDATE_NIA_PNEN)
40581 +        {
40582 +            if (p_FmPort->savedQmiPnen != p_CcParams->setCcParams.nia)
40583 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,
40584 +                             ("PNEN was defined previously different"));
40585 +        }
40586 +
40587 +    if ((p_CcParams->setCcParams.type & UPDATE_NIA_PNDN)
40588 +            && !(p_FmPort->requiredAction & UPDATE_NIA_PNDN))
40589 +    {
40590 +        p_FmPort->savedNonRxQmiRegsPndn = p_CcParams->setCcParams.nia;
40591 +        p_FmPort->requiredAction |= UPDATE_NIA_PNDN;
40592 +    }
40593 +    else
40594 +        if (p_CcParams->setCcParams.type & UPDATE_NIA_PNDN)
40595 +        {
40596 +            if (p_FmPort->savedNonRxQmiRegsPndn != p_CcParams->setCcParams.nia)
40597 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,
40598 +                             ("PNDN was defined previously different"));
40599 +        }
40600 +
40601 +    if ((p_CcParams->setCcParams.type & UPDATE_NIA_FENE)
40602 +            && (p_CcParams->setCcParams.overwrite
40603 +                    || !(p_FmPort->requiredAction & UPDATE_NIA_FENE)))
40604 +    {
40605 +        p_FmPort->savedBmiFene = p_CcParams->setCcParams.nia;
40606 +        p_FmPort->requiredAction |= UPDATE_NIA_FENE;
40607 +    }
40608 +    else
40609 +        if (p_CcParams->setCcParams.type & UPDATE_NIA_FENE)
40610 +        {
40611 +            if (p_FmPort->savedBmiFene != p_CcParams->setCcParams.nia)
40612 +                RETURN_ERROR( MAJOR, E_INVALID_STATE,
40613 +                             ("xFENE was defined previously different"));
40614 +        }
40615 +
40616 +    if ((p_CcParams->setCcParams.type & UPDATE_NIA_FPNE)
40617 +            && !(p_FmPort->requiredAction & UPDATE_NIA_FPNE))
40618 +    {
40619 +        p_FmPort->savedBmiFpne = p_CcParams->setCcParams.nia;
40620 +        p_FmPort->requiredAction |= UPDATE_NIA_FPNE;
40621 +    }
40622 +    else
40623 +        if (p_CcParams->setCcParams.type & UPDATE_NIA_FPNE)
40624 +        {
40625 +            if (p_FmPort->savedBmiFpne != p_CcParams->setCcParams.nia)
40626 +                RETURN_ERROR( MAJOR, E_INVALID_STATE,
40627 +                             ("xFPNE was defined previously different"));
40628 +        }
40629 +
40630 +    if ((p_CcParams->setCcParams.type & UPDATE_NIA_CMNE)
40631 +            && !(p_FmPort->requiredAction & UPDATE_NIA_CMNE))
40632 +    {
40633 +        p_FmPort->savedBmiCmne = p_CcParams->setCcParams.nia;
40634 +        p_FmPort->requiredAction |= UPDATE_NIA_CMNE;
40635 +    }
40636 +    else
40637 +        if (p_CcParams->setCcParams.type & UPDATE_NIA_CMNE)
40638 +        {
40639 +            if (p_FmPort->savedBmiCmne != p_CcParams->setCcParams.nia)
40640 +                RETURN_ERROR( MAJOR, E_INVALID_STATE,
40641 +                             ("xCMNE was defined previously different"));
40642 +        }
40643 +
40644 +    if ((p_CcParams->setCcParams.type & UPDATE_PSO)
40645 +            && !(p_FmPort->requiredAction & UPDATE_PSO))
40646 +    {
40647 +        /* get PCD registers pointers */
40648 +        switch (p_FmPort->portType)
40649 +        {
40650 +            case (e_FM_PORT_TYPE_RX_10G):
40651 +            case (e_FM_PORT_TYPE_RX):
40652 +                p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->rx.fmbm_rpso;
40653 +                break;
40654 +            case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
40655 +                p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->oh.fmbm_opso;
40656 +                break;
40657 +            default:
40658 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
40659 +        }
40660 +
40661 +        /* set start parsing offset */
40662 +        tmpInt = (int)GET_UINT32(*p_BmiPrsStartOffset)
40663 +                + p_CcParams->setCcParams.psoSize;
40664 +        if (tmpInt > 0)
40665 +            WRITE_UINT32(*p_BmiPrsStartOffset, (uint32_t)tmpInt);
40666 +
40667 +        p_FmPort->requiredAction |= UPDATE_PSO;
40668 +        p_FmPort->savedPrsStartOffset = p_CcParams->setCcParams.psoSize;
40669 +    }
40670 +    else
40671 +        if (p_CcParams->setCcParams.type & UPDATE_PSO)
40672 +        {
40673 +            if (p_FmPort->savedPrsStartOffset
40674 +                    != p_CcParams->setCcParams.psoSize)
40675 +                RETURN_ERROR(
40676 +                        MAJOR,
40677 +                        E_INVALID_STATE,
40678 +                        ("parser start offset was defoned previousley different"));
40679 +        }
40680 +
40681 +    if ((p_CcParams->setCcParams.type & UPDATE_OFP_DPTE)
40682 +            && !(p_FmPort->requiredAction & UPDATE_OFP_DPTE))
40683 +    {
40684 +        if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40685 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
40686 +        p_FmPort->savedBmiOfp = GET_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofp);
40687 +        p_FmPort->savedBmiOfp &= ~BMI_FIFO_PIPELINE_DEPTH_MASK;
40688 +        p_FmPort->savedBmiOfp |= p_CcParams->setCcParams.ofpDpde
40689 +                << BMI_FIFO_PIPELINE_DEPTH_SHIFT;
40690 +        p_FmPort->requiredAction |= UPDATE_OFP_DPTE;
40691 +    }
40692 +
40693 +    return E_OK;
40694 +}
40695 +/*********************** End of inter-module routines ************************/
40696 +
40697 +/****************************************/
40698 +/*       API Init unit functions        */
40699 +/****************************************/
40700 +
40701 +t_Handle FM_PORT_Config(t_FmPortParams *p_FmPortParams)
40702 +{
40703 +    t_FmPort *p_FmPort;
40704 +    uintptr_t baseAddr = p_FmPortParams->baseAddr;
40705 +    uint32_t tmpReg;
40706 +
40707 +    /* Allocate FM structure */
40708 +    p_FmPort = (t_FmPort *)XX_Malloc(sizeof(t_FmPort));
40709 +    if (!p_FmPort)
40710 +    {
40711 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Port driver structure"));
40712 +        return NULL;
40713 +    }
40714 +    memset(p_FmPort, 0, sizeof(t_FmPort));
40715 +
40716 +    /* Allocate the FM driver's parameters structure */
40717 +    p_FmPort->p_FmPortDriverParam = (t_FmPortDriverParam *)XX_Malloc(
40718 +            sizeof(t_FmPortDriverParam));
40719 +    if (!p_FmPort->p_FmPortDriverParam)
40720 +    {
40721 +        XX_Free(p_FmPort);
40722 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Port driver parameters"));
40723 +        return NULL;
40724 +    }
40725 +    memset(p_FmPort->p_FmPortDriverParam, 0, sizeof(t_FmPortDriverParam));
40726 +
40727 +    /* Initialize FM port parameters which will be kept by the driver */
40728 +    p_FmPort->portType = p_FmPortParams->portType;
40729 +    p_FmPort->portId = p_FmPortParams->portId;
40730 +    p_FmPort->pcdEngines = FM_PCD_NONE;
40731 +    p_FmPort->f_Exception = p_FmPortParams->f_Exception;
40732 +    p_FmPort->h_App = p_FmPortParams->h_App;
40733 +    p_FmPort->h_Fm = p_FmPortParams->h_Fm;
40734 +
40735 +    /* get FM revision */
40736 +    FM_GetRevision(p_FmPort->h_Fm, &p_FmPort->fmRevInfo);
40737 +
40738 +    /* calculate global portId number */
40739 +    p_FmPort->hardwarePortId = SwPortIdToHwPortId(p_FmPort->portType,
40740 +                                    p_FmPortParams->portId,
40741 +                                    p_FmPort->fmRevInfo.majorRev,
40742 +                                    p_FmPort->fmRevInfo.minorRev);
40743 +
40744 +    if (p_FmPort->fmRevInfo.majorRev >= 6)
40745 +    {
40746 +        if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
40747 +                && (p_FmPortParams->portId != FM_OH_PORT_ID))
40748 +            DBG(WARNING,
40749 +                    ("Port ID %d is recommended for HC port. Overwriting HW defaults to be suitable for HC.",
40750 +                            FM_OH_PORT_ID));
40751 +
40752 +        if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40753 +                && (p_FmPortParams->portId == FM_OH_PORT_ID))
40754 +            DBG(WARNING, ("Use non-zero portId for OP port due to insufficient resources on portId 0."));
40755 +    }
40756 +
40757 +    /* Set up FM port parameters for initialization phase only */
40758 +
40759 +    /* First, fill in flibs struct */
40760 +    fman_port_defconfig(&p_FmPort->p_FmPortDriverParam->dfltCfg,
40761 +                        (enum fman_port_type)p_FmPort->portType);
40762 +    /* Overwrite some integration specific parameters */
40763 +    p_FmPort->p_FmPortDriverParam->dfltCfg.rx_pri_elevation =
40764 +            DEFAULT_PORT_rxFifoPriElevationLevel;
40765 +    p_FmPort->p_FmPortDriverParam->dfltCfg.rx_fifo_thr =
40766 +            DEFAULT_PORT_rxFifoThreshold;
40767 +
40768 +#if defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || defined(FM_ERROR_VSP_NO_MATCH_SW006)
40769 +    p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006675 = TRUE;
40770 +#else
40771 +    p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006675 = FALSE;
40772 +#endif
40773 +    if ((p_FmPort->fmRevInfo.majorRev == 6)
40774 +            && (p_FmPort->fmRevInfo.minorRev == 0))
40775 +        p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006320 = TRUE;
40776 +    else
40777 +        p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006320 = FALSE;
40778 +
40779 +    /* Excessive Threshold register - exists for pre-FMv3 chips only */
40780 +    if (p_FmPort->fmRevInfo.majorRev < 6)
40781 +    {
40782 +#ifdef FM_NO_RESTRICT_ON_ACCESS_RSRC
40783 +        p_FmPort->p_FmPortDriverParam->dfltCfg.excessive_threshold_register =
40784 +                TRUE;
40785 +#endif
40786 +        p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_rebm_has_sgd = FALSE;
40787 +        p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_tfne_has_features = FALSE;
40788 +    }
40789 +    else
40790 +    {
40791 +        p_FmPort->p_FmPortDriverParam->dfltCfg.excessive_threshold_register =
40792 +                FALSE;
40793 +        p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_rebm_has_sgd = TRUE;
40794 +        p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_tfne_has_features = TRUE;
40795 +    }
40796 +    if (p_FmPort->fmRevInfo.majorRev == 4)
40797 +        p_FmPort->p_FmPortDriverParam->dfltCfg.qmi_deq_options_support = FALSE;
40798 +    else
40799 +        p_FmPort->p_FmPortDriverParam->dfltCfg.qmi_deq_options_support = TRUE;
40800 +
40801 +    /* Continue with other parameters */
40802 +    p_FmPort->p_FmPortDriverParam->baseAddr = baseAddr;
40803 +    /* set memory map pointers */
40804 +    p_FmPort->p_FmPortQmiRegs =
40805 +            (t_FmPortQmiRegs *)UINT_TO_PTR(baseAddr + QMI_PORT_REGS_OFFSET);
40806 +    p_FmPort->p_FmPortBmiRegs =
40807 +            (u_FmPortBmiRegs *)UINT_TO_PTR(baseAddr + BMI_PORT_REGS_OFFSET);
40808 +    p_FmPort->p_FmPortPrsRegs =
40809 +            (t_FmPortPrsRegs *)UINT_TO_PTR(baseAddr + PRS_PORT_REGS_OFFSET);
40810 +
40811 +    p_FmPort->p_FmPortDriverParam->bufferPrefixContent.privDataSize =
40812 +            DEFAULT_PORT_bufferPrefixContent_privDataSize;
40813 +    p_FmPort->p_FmPortDriverParam->bufferPrefixContent.passPrsResult =
40814 +            DEFAULT_PORT_bufferPrefixContent_passPrsResult;
40815 +    p_FmPort->p_FmPortDriverParam->bufferPrefixContent.passTimeStamp =
40816 +            DEFAULT_PORT_bufferPrefixContent_passTimeStamp;
40817 +    p_FmPort->p_FmPortDriverParam->bufferPrefixContent.passAllOtherPCDInfo =
40818 +            DEFAULT_PORT_bufferPrefixContent_passTimeStamp;
40819 +    p_FmPort->p_FmPortDriverParam->bufferPrefixContent.dataAlign =
40820 +            DEFAULT_PORT_bufferPrefixContent_dataAlign;
40821 +    /*    p_FmPort->p_FmPortDriverParam->dmaSwapData                      = (e_FmDmaSwapOption)DEFAULT_PORT_dmaSwapData;
40822 +     p_FmPort->p_FmPortDriverParam->dmaIntContextCacheAttr           = (e_FmDmaCacheOption)DEFAULT_PORT_dmaIntContextCacheAttr;
40823 +     p_FmPort->p_FmPortDriverParam->dmaHeaderCacheAttr               = (e_FmDmaCacheOption)DEFAULT_PORT_dmaHeaderCacheAttr;
40824 +     p_FmPort->p_FmPortDriverParam->dmaScatterGatherCacheAttr        = (e_FmDmaCacheOption)DEFAULT_PORT_dmaScatterGatherCacheAttr;
40825 +     p_FmPort->p_FmPortDriverParam->dmaWriteOptimize                 = DEFAULT_PORT_dmaWriteOptimize;
40826 +     */
40827 +    p_FmPort->p_FmPortDriverParam->liodnBase = p_FmPortParams->liodnBase;
40828 +    p_FmPort->p_FmPortDriverParam->cheksumLastBytesIgnore =
40829 +            DEFAULT_PORT_cheksumLastBytesIgnore;
40830 +
40831 +    p_FmPort->maxFrameLength = DEFAULT_PORT_maxFrameLength;
40832 +    /* resource distribution. */
40833 +       p_FmPort->fifoBufs.num = DEFAULT_PORT_numOfFifoBufs(p_FmPort->portType)
40834 +                       * BMI_FIFO_UNITS;
40835 +       p_FmPort->fifoBufs.extra = DEFAULT_PORT_extraNumOfFifoBufs
40836 +                       * BMI_FIFO_UNITS;
40837 +       p_FmPort->openDmas.num = DEFAULT_PORT_numOfOpenDmas(p_FmPort->portType);
40838 +       p_FmPort->openDmas.extra =
40839 +                       DEFAULT_PORT_extraNumOfOpenDmas(p_FmPort->portType);
40840 +       p_FmPort->tasks.num = DEFAULT_PORT_numOfTasks(p_FmPort->portType);
40841 +       p_FmPort->tasks.extra = DEFAULT_PORT_extraNumOfTasks(p_FmPort->portType);
40842 +
40843 +
40844 +#ifdef FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
40845 +    if ((p_FmPort->fmRevInfo.majorRev == 6)
40846 +            && (p_FmPort->fmRevInfo.minorRev == 0)
40847 +            && ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
40848 +                    || (p_FmPort->portType == e_FM_PORT_TYPE_TX)))
40849 +    {
40850 +        p_FmPort->openDmas.num = 16;
40851 +        p_FmPort->openDmas.extra = 0;
40852 +    }
40853 +#endif /* FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 */
40854 +
40855 +    /* Port type specific initialization: */
40856 +    switch (p_FmPort->portType)
40857 +    {
40858 +        case (e_FM_PORT_TYPE_RX):
40859 +        case (e_FM_PORT_TYPE_RX_10G):
40860 +            /* Initialize FM port parameters for initialization phase only */
40861 +            p_FmPort->p_FmPortDriverParam->cutBytesFromEnd =
40862 +                    DEFAULT_PORT_cutBytesFromEnd;
40863 +            p_FmPort->p_FmPortDriverParam->enBufPoolDepletion = FALSE;
40864 +            p_FmPort->p_FmPortDriverParam->frmDiscardOverride =
40865 +                    DEFAULT_PORT_frmDiscardOverride;
40866 +
40867 +                tmpReg =
40868 +                        GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfp);
40869 +                       p_FmPort->p_FmPortDriverParam->rxFifoPriElevationLevel =
40870 +                        (((tmpReg & BMI_RX_FIFO_PRI_ELEVATION_MASK)
40871 +                                >> BMI_RX_FIFO_PRI_ELEVATION_SHIFT) + 1)
40872 +                                * BMI_FIFO_UNITS;
40873 +                p_FmPort->p_FmPortDriverParam->rxFifoThreshold = (((tmpReg
40874 +                        & BMI_RX_FIFO_THRESHOLD_MASK)
40875 +                        >> BMI_RX_FIFO_THRESHOLD_SHIFT) + 1) * BMI_FIFO_UNITS;
40876 +
40877 +            p_FmPort->p_FmPortDriverParam->bufMargins.endMargins =
40878 +                    DEFAULT_PORT_BufMargins_endMargins;
40879 +            p_FmPort->p_FmPortDriverParam->errorsToDiscard =
40880 +                    DEFAULT_PORT_errorsToDiscard;
40881 +            p_FmPort->p_FmPortDriverParam->forwardReuseIntContext =
40882 +                    DEFAULT_PORT_forwardIntContextReuse;
40883 +#if (DPAA_VERSION >= 11)
40884 +            p_FmPort->p_FmPortDriverParam->noScatherGather =
40885 +                    DEFAULT_PORT_noScatherGather;
40886 +#endif /* (DPAA_VERSION >= 11) */
40887 +            break;
40888 +
40889 +        case (e_FM_PORT_TYPE_TX):
40890 +            p_FmPort->p_FmPortDriverParam->dontReleaseBuf = FALSE;
40891 +#ifdef FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127
40892 +            tmpReg = 0x00001013;
40893 +            WRITE_UINT32( p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfp,
40894 +                         tmpReg);
40895 +#endif /* FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127 */
40896 +        case (e_FM_PORT_TYPE_TX_10G):
40897 +                tmpReg =
40898 +                        GET_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfp);
40899 +                p_FmPort->p_FmPortDriverParam->txFifoMinFillLevel = ((tmpReg
40900 +                        & BMI_TX_FIFO_MIN_FILL_MASK)
40901 +                        >> BMI_TX_FIFO_MIN_FILL_SHIFT) * BMI_FIFO_UNITS;
40902 +                       p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
40903 +                        (uint8_t)(((tmpReg & BMI_FIFO_PIPELINE_DEPTH_MASK)
40904 +                                >> BMI_FIFO_PIPELINE_DEPTH_SHIFT) + 1);
40905 +                p_FmPort->p_FmPortDriverParam->txFifoLowComfLevel = (((tmpReg
40906 +                        & BMI_TX_LOW_COMF_MASK) >> BMI_TX_LOW_COMF_SHIFT) + 1)
40907 +                        * BMI_FIFO_UNITS;
40908 +
40909 +            p_FmPort->p_FmPortDriverParam->deqType = DEFAULT_PORT_deqType;
40910 +            p_FmPort->p_FmPortDriverParam->deqPrefetchOption =
40911 +                    DEFAULT_PORT_deqPrefetchOption;
40912 +            p_FmPort->p_FmPortDriverParam->deqHighPriority =
40913 +                    (bool)((p_FmPort->portType == e_FM_PORT_TYPE_TX) ? DEFAULT_PORT_deqHighPriority_1G :
40914 +                            DEFAULT_PORT_deqHighPriority_10G);
40915 +            p_FmPort->p_FmPortDriverParam->deqByteCnt =
40916 +                    (uint16_t)(
40917 +                            (p_FmPort->portType == e_FM_PORT_TYPE_TX) ? DEFAULT_PORT_deqByteCnt_1G :
40918 +                                    DEFAULT_PORT_deqByteCnt_10G);
40919 +            break;
40920 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
40921 +            p_FmPort->p_FmPortDriverParam->errorsToDiscard =
40922 +                    DEFAULT_PORT_errorsToDiscard;
40923 +#if (DPAA_VERSION >= 11)
40924 +            p_FmPort->p_FmPortDriverParam->noScatherGather =
40925 +                    DEFAULT_PORT_noScatherGather;
40926 +#endif /* (DPAA_VERSION >= 11) */
40927 +        case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
40928 +            p_FmPort->p_FmPortDriverParam->deqPrefetchOption =
40929 +                    DEFAULT_PORT_deqPrefetchOption_HC;
40930 +            p_FmPort->p_FmPortDriverParam->deqHighPriority =
40931 +                    DEFAULT_PORT_deqHighPriority_1G;
40932 +            p_FmPort->p_FmPortDriverParam->deqType = DEFAULT_PORT_deqType;
40933 +            p_FmPort->p_FmPortDriverParam->deqByteCnt =
40934 +                    DEFAULT_PORT_deqByteCnt_1G;
40935 +
40936 +                tmpReg =
40937 +                        GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofp);
40938 +                p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
40939 +                        (uint8_t)(((tmpReg & BMI_FIFO_PIPELINE_DEPTH_MASK)
40940 +                                >> BMI_FIFO_PIPELINE_DEPTH_SHIFT) + 1);
40941 +                if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
40942 +                        && (p_FmPortParams->portId != FM_OH_PORT_ID))
40943 +                {
40944 +                    /* Overwrite HC defaults */
40945 +                       p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
40946 +                                       DEFAULT_PORT_fifoDeqPipelineDepth_OH;
40947 +                }
40948 +
40949 +#ifndef FM_FRAME_END_PARAMS_FOR_OP
40950 +            if (p_FmPort->fmRevInfo.majorRev < 6)
40951 +            p_FmPort->p_FmPortDriverParam->cheksumLastBytesIgnore = DEFAULT_notSupported;
40952 +#endif /* !FM_FRAME_END_PARAMS_FOR_OP */
40953 +
40954 +#ifndef FM_DEQ_PIPELINE_PARAMS_FOR_OP
40955 +            if (!((p_FmPort->fmRevInfo.majorRev == 4) ||
40956 +                            (p_FmPort->fmRevInfo.majorRev >= 6)))
40957 +            p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth = DEFAULT_notSupported;
40958 +#endif /* !FM_DEQ_PIPELINE_PARAMS_FOR_OP */
40959 +            break;
40960 +
40961 +        default:
40962 +            XX_Free(p_FmPort->p_FmPortDriverParam);
40963 +            XX_Free(p_FmPort);
40964 +            REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
40965 +            return NULL;
40966 +    }
40967 +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
40968 +    if (p_FmPort->fmRevInfo.majorRev == 4)
40969 +    p_FmPort->p_FmPortDriverParam->deqPrefetchOption = (e_FmPortDeqPrefetchOption)DEFAULT_notSupported;
40970 +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
40971 +
40972 +    p_FmPort->imEn = p_FmPortParams->independentModeEnable;
40973 +
40974 +    if (p_FmPort->imEn)
40975 +    {
40976 +        if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
40977 +                || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G))
40978 +            p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
40979 +                    DEFAULT_PORT_fifoDeqPipelineDepth_IM;
40980 +        FmPortConfigIM(p_FmPort, p_FmPortParams);
40981 +    }
40982 +    else
40983 +    {
40984 +        switch (p_FmPort->portType)
40985 +        {
40986 +            case (e_FM_PORT_TYPE_RX):
40987 +            case (e_FM_PORT_TYPE_RX_10G):
40988 +                /* Initialize FM port parameters for initialization phase only */
40989 +                memcpy(&p_FmPort->p_FmPortDriverParam->extBufPools,
40990 +                       &p_FmPortParams->specificParams.rxParams.extBufPools,
40991 +                       sizeof(t_FmExtPools));
40992 +                p_FmPort->p_FmPortDriverParam->errFqid =
40993 +                        p_FmPortParams->specificParams.rxParams.errFqid;
40994 +                p_FmPort->p_FmPortDriverParam->dfltFqid =
40995 +                        p_FmPortParams->specificParams.rxParams.dfltFqid;
40996 +                p_FmPort->p_FmPortDriverParam->liodnOffset =
40997 +                        p_FmPortParams->specificParams.rxParams.liodnOffset;
40998 +                break;
40999 +            case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
41000 +            case (e_FM_PORT_TYPE_TX):
41001 +            case (e_FM_PORT_TYPE_TX_10G):
41002 +            case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
41003 +                p_FmPort->p_FmPortDriverParam->errFqid =
41004 +                        p_FmPortParams->specificParams.nonRxParams.errFqid;
41005 +                p_FmPort->p_FmPortDriverParam->deqSubPortal =
41006 +                        (uint8_t)(p_FmPortParams->specificParams.nonRxParams.qmChannel
41007 +                                & QMI_DEQ_CFG_SUBPORTAL_MASK);
41008 +                p_FmPort->p_FmPortDriverParam->dfltFqid =
41009 +                        p_FmPortParams->specificParams.nonRxParams.dfltFqid;
41010 +                break;
41011 +            default:
41012 +                XX_Free(p_FmPort->p_FmPortDriverParam);
41013 +                XX_Free(p_FmPort);
41014 +                REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
41015 +                return NULL;
41016 +        }
41017 +    }
41018 +
41019 +    memset(p_FmPort->name, 0, (sizeof(char)) * MODULE_NAME_SIZE);
41020 +    if (Sprint(
41021 +            p_FmPort->name,
41022 +            "FM-%d-port-%s-%d",
41023 +            FmGetId(p_FmPort->h_Fm),
41024 +            ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING
41025 +                    || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)) ? "OH" :
41026 +                    (p_FmPort->portType == e_FM_PORT_TYPE_RX ? "1g-RX" :
41027 +                            (p_FmPort->portType == e_FM_PORT_TYPE_TX ? "1g-TX" :
41028 +                                    (p_FmPort->portType
41029 +                                            == e_FM_PORT_TYPE_RX_10G ? "10g-RX" :
41030 +                                            "10g-TX")))),
41031 +            p_FmPort->portId) == 0)
41032 +    {
41033 +        XX_Free(p_FmPort->p_FmPortDriverParam);
41034 +        XX_Free(p_FmPort);
41035 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
41036 +        return NULL;
41037 +    }
41038 +
41039 +    p_FmPort->h_Spinlock = XX_InitSpinlock();
41040 +    if (!p_FmPort->h_Spinlock)
41041 +    {
41042 +        XX_Free(p_FmPort->p_FmPortDriverParam);
41043 +        XX_Free(p_FmPort);
41044 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
41045 +        return NULL;
41046 +    }
41047 +
41048 +    return p_FmPort;
41049 +}
41050 +
41051 +t_FmPort *rx_port = 0;
41052 +t_FmPort *tx_port = 0;
41053 +
41054 +/**************************************************************************//**
41055 + @Function      FM_PORT_Init
41056 +
41057 + @Description   Initializes the FM module
41058 +
41059 + @Param[in]     h_FmPort - FM module descriptor
41060 +
41061 + @Return        E_OK on success; Error code otherwise.
41062 + *//***************************************************************************/
41063 +t_Error FM_PORT_Init(t_Handle h_FmPort)
41064 +{
41065 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41066 +    t_FmPortDriverParam *p_DriverParams;
41067 +    t_Error errCode;
41068 +    t_FmInterModulePortInitParams fmParams;
41069 +    t_FmRevisionInfo revInfo;
41070 +
41071 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
41072 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41073 +
41074 +    errCode = FmSpBuildBufferStructure(
41075 +            &p_FmPort->p_FmPortDriverParam->intContext,
41076 +            &p_FmPort->p_FmPortDriverParam->bufferPrefixContent,
41077 +            &p_FmPort->p_FmPortDriverParam->bufMargins,
41078 +            &p_FmPort->bufferOffsets, &p_FmPort->internalBufferOffset);
41079 +    if (errCode != E_OK)
41080 +        RETURN_ERROR(MAJOR, errCode, NO_MSG);
41081 +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
41082 +    if ((p_FmPort->p_FmPortDriverParam->bcbWorkaround) &&
41083 +            (p_FmPort->portType == e_FM_PORT_TYPE_RX))
41084 +    {
41085 +        p_FmPort->p_FmPortDriverParam->errorsToDiscard |= FM_PORT_FRM_ERR_PHYSICAL;
41086 +        if (!p_FmPort->fifoBufs.num)
41087 +        p_FmPort->fifoBufs.num = DEFAULT_PORT_numOfFifoBufs(p_FmPort->portType)*BMI_FIFO_UNITS;
41088 +        p_FmPort->fifoBufs.num += 4*KILOBYTE;
41089 +    }
41090 +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
41091 +
41092 +    CHECK_INIT_PARAMETERS(p_FmPort, CheckInitParameters);
41093 +
41094 +    p_DriverParams = p_FmPort->p_FmPortDriverParam;
41095 +
41096 +    /* Set up flibs port structure */
41097 +    memset(&p_FmPort->port, 0, sizeof(struct fman_port));
41098 +    p_FmPort->port.type = (enum fman_port_type)p_FmPort->portType;
41099 +    FM_GetRevision(p_FmPort->h_Fm, &revInfo);
41100 +    p_FmPort->port.fm_rev_maj = revInfo.majorRev;
41101 +    p_FmPort->port.fm_rev_min = revInfo.minorRev;
41102 +    p_FmPort->port.bmi_regs =
41103 +            (union fman_port_bmi_regs *)UINT_TO_PTR(p_DriverParams->baseAddr + BMI_PORT_REGS_OFFSET);
41104 +    p_FmPort->port.qmi_regs =
41105 +            (struct fman_port_qmi_regs *)UINT_TO_PTR(p_DriverParams->baseAddr + QMI_PORT_REGS_OFFSET);
41106 +    p_FmPort->port.ext_pools_num = (uint8_t)((revInfo.majorRev == 4) ? 4 : 8);
41107 +    p_FmPort->port.im_en = p_FmPort->imEn;
41108 +    p_FmPort->p_FmPortPrsRegs =
41109 +            (t_FmPortPrsRegs *)UINT_TO_PTR(p_DriverParams->baseAddr + PRS_PORT_REGS_OFFSET);
41110 +
41111 +    if (((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41112 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX)) && !p_FmPort->imEn)
41113 +    {
41114 +        /* Call the external Buffer routine which also checks fifo
41115 +         size and updates it if necessary */
41116 +        /* define external buffer pools and pool depletion*/
41117 +        errCode = SetExtBufferPools(p_FmPort);
41118 +        if (errCode)
41119 +            RETURN_ERROR(MAJOR, errCode, NO_MSG);
41120 +        /* check if the largest external buffer pool is large enough */
41121 +        if (p_DriverParams->bufMargins.startMargins + MIN_EXT_BUF_SIZE
41122 +                + p_DriverParams->bufMargins.endMargins
41123 +                > p_FmPort->rxPoolsParams.largestBufSize)
41124 +            RETURN_ERROR(
41125 +                    MAJOR,
41126 +                    E_INVALID_VALUE,
41127 +                    ("bufMargins.startMargins (%d) + minimum buf size (64) + bufMargins.endMargins (%d) is larger than maximum external buffer size (%d)", p_DriverParams->bufMargins.startMargins, p_DriverParams->bufMargins.endMargins, p_FmPort->rxPoolsParams.largestBufSize));
41128 +    }
41129 +    if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
41130 +    {
41131 +        {
41132 +#ifdef FM_NO_OP_OBSERVED_POOLS
41133 +            t_FmRevisionInfo revInfo;
41134 +
41135 +            FM_GetRevision(p_FmPort->h_Fm, &revInfo);
41136 +            if ((revInfo.majorRev == 4) && (p_DriverParams->enBufPoolDepletion))
41137 +#endif /* FM_NO_OP_OBSERVED_POOLS */
41138 +            {
41139 +                /* define external buffer pools */
41140 +                errCode = SetExtBufferPools(p_FmPort);
41141 +                if (errCode)
41142 +                    RETURN_ERROR(MAJOR, errCode, NO_MSG);
41143 +            }
41144 +        }
41145 +    }
41146 +
41147 +    /************************************************************/
41148 +    /* Call FM module routine for communicating parameters      */
41149 +    /************************************************************/
41150 +    memset(&fmParams, 0, sizeof(fmParams));
41151 +    fmParams.hardwarePortId = p_FmPort->hardwarePortId;
41152 +    fmParams.portType = (e_FmPortType)p_FmPort->portType;
41153 +    fmParams.numOfTasks = (uint8_t)p_FmPort->tasks.num;
41154 +    fmParams.numOfExtraTasks = (uint8_t)p_FmPort->tasks.extra;
41155 +    fmParams.numOfOpenDmas = (uint8_t)p_FmPort->openDmas.num;
41156 +    fmParams.numOfExtraOpenDmas = (uint8_t)p_FmPort->openDmas.extra;
41157 +
41158 +    if (p_FmPort->fifoBufs.num)
41159 +    {
41160 +        errCode = VerifySizeOfFifo(p_FmPort);
41161 +        if (errCode != E_OK)
41162 +            RETURN_ERROR(MAJOR, errCode, NO_MSG);
41163 +    }
41164 +    fmParams.sizeOfFifo = p_FmPort->fifoBufs.num;
41165 +    fmParams.extraSizeOfFifo = p_FmPort->fifoBufs.extra;
41166 +    fmParams.independentMode = p_FmPort->imEn;
41167 +    fmParams.liodnOffset = p_DriverParams->liodnOffset;
41168 +    fmParams.liodnBase = p_DriverParams->liodnBase;
41169 +    fmParams.deqPipelineDepth =
41170 +            p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth;
41171 +    fmParams.maxFrameLength = p_FmPort->maxFrameLength;
41172 +#ifndef FM_DEQ_PIPELINE_PARAMS_FOR_OP
41173 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) ||
41174 +            (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
41175 +    {
41176 +        if (!((p_FmPort->fmRevInfo.majorRev == 4) ||
41177 +                        (p_FmPort->fmRevInfo.majorRev >= 6)))
41178 +        /* HC ports do not have fifoDeqPipelineDepth, but it is needed only
41179 +         * for deq threshold calculation.
41180 +         */
41181 +        fmParams.deqPipelineDepth = 2;
41182 +    }
41183 +#endif /* !FM_DEQ_PIPELINE_PARAMS_FOR_OP */
41184 +
41185 +    errCode = FmGetSetPortParams(p_FmPort->h_Fm, &fmParams);
41186 +    if (errCode)
41187 +        RETURN_ERROR(MAJOR, errCode, NO_MSG);
41188 +
41189 +    /* get params for use in init */
41190 +    p_FmPort->fmMuramPhysBaseAddr =
41191 +            (uint64_t)((uint64_t)(fmParams.fmMuramPhysBaseAddr.low)
41192 +                    | ((uint64_t)(fmParams.fmMuramPhysBaseAddr.high) << 32));
41193 +    p_FmPort->h_FmMuram = FmGetMuramHandle(p_FmPort->h_Fm);
41194 +
41195 +    errCode = InitLowLevelDriver(p_FmPort);
41196 +    if (errCode != E_OK)
41197 +        RETURN_ERROR(MAJOR, errCode, NO_MSG);
41198 +
41199 +    FmPortDriverParamFree(p_FmPort);
41200 +
41201 +#if (DPAA_VERSION >= 11)
41202 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41203 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX)
41204 +            || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
41205 +    {
41206 +        t_FmPcdCtrlParamsPage *p_ParamsPage;
41207 +
41208 +        FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
41209 +                         (void**)&p_ParamsPage);
41210 +        ASSERT_COND(p_ParamsPage);
41211 +
41212 +        WRITE_UINT32(p_ParamsPage->misc, FM_CTL_PARAMS_PAGE_ALWAYS_ON);
41213 +#ifdef FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
41214 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
41215 +        {
41216 +            WRITE_UINT32(
41217 +                    p_ParamsPage->misc,
41218 +                    (GET_UINT32(p_ParamsPage->misc) | FM_CTL_PARAMS_PAGE_OP_FIX_EN));
41219 +            WRITE_UINT32(
41220 +                    p_ParamsPage->discardMask,
41221 +                    GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm));
41222 +        }
41223 +#endif /* FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675 */
41224 +#ifdef FM_ERROR_VSP_NO_MATCH_SW006
41225 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
41226 +            WRITE_UINT32(
41227 +                    p_ParamsPage->errorsDiscardMask,
41228 +                    (GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm) | GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsem)));
41229 +        else
41230 +            WRITE_UINT32(
41231 +                    p_ParamsPage->errorsDiscardMask,
41232 +                    (GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm) | GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsem)));
41233 +#endif /* FM_ERROR_VSP_NO_MATCH_SW006 */
41234 +    }
41235 +#endif /* (DPAA_VERSION >= 11) */
41236 +
41237 +    if (p_FmPort->deepSleepVars.autoResMaxSizes)
41238 +        FmPortConfigAutoResForDeepSleepSupport1(p_FmPort);
41239 +    return E_OK;
41240 +}
41241 +
41242 +/**************************************************************************//**
41243 + @Function      FM_PORT_Free
41244 +
41245 + @Description   Frees all resources that were assigned to FM module.
41246 +
41247 + Calling this routine invalidates the descriptor.
41248 +
41249 + @Param[in]     h_FmPort - FM module descriptor
41250 +
41251 + @Return        E_OK on success; Error code otherwise.
41252 + *//***************************************************************************/
41253 +t_Error FM_PORT_Free(t_Handle h_FmPort)
41254 +{
41255 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41256 +    t_FmInterModulePortFreeParams fmParams;
41257 +
41258 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41259 +
41260 +    if (p_FmPort->pcdEngines)
41261 +        RETURN_ERROR(
41262 +                MAJOR,
41263 +                E_INVALID_STATE,
41264 +                ("Trying to free a port with PCD. FM_PORT_DeletePCD must be called first."));
41265 +
41266 +    if (p_FmPort->enabled)
41267 +    {
41268 +        if (FM_PORT_Disable(p_FmPort) != E_OK)
41269 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM_PORT_Disable FAILED"));
41270 +    }
41271 +
41272 +    if (p_FmPort->imEn)
41273 +        FmPortImFree(p_FmPort);
41274 +
41275 +    FmPortDriverParamFree(p_FmPort);
41276 +
41277 +    memset(&fmParams, 0, sizeof(fmParams));
41278 +    fmParams.hardwarePortId = p_FmPort->hardwarePortId;
41279 +    fmParams.portType = (e_FmPortType)p_FmPort->portType;
41280 +    fmParams.deqPipelineDepth =
41281 +            p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth;
41282 +
41283 +    FmFreePortParams(p_FmPort->h_Fm, &fmParams);
41284 +
41285 +#if (DPAA_VERSION >= 11)
41286 +    if (FmVSPFreeForPort(p_FmPort->h_Fm, p_FmPort->portType, p_FmPort->portId)
41287 +            != E_OK)
41288 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("VSP free of port FAILED"));
41289 +
41290 +    if (p_FmPort->p_ParamsPage)
41291 +        FM_MURAM_FreeMem(p_FmPort->h_FmMuram, p_FmPort->p_ParamsPage);
41292 +#endif /* (DPAA_VERSION >= 11) */
41293 +
41294 +    if (p_FmPort->h_Spinlock)
41295 +        XX_FreeSpinlock(p_FmPort->h_Spinlock);
41296 +
41297 +    XX_Free(p_FmPort);
41298 +
41299 +    return E_OK;
41300 +}
41301 +
41302 +/*************************************************/
41303 +/*       API Advanced Init unit functions        */
41304 +/*************************************************/
41305 +
41306 +t_Error FM_PORT_ConfigNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_OpenDmas)
41307 +{
41308 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41309 +
41310 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41311 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41312 +
41313 +    p_FmPort->p_FmPortDriverParam->setNumOfOpenDmas = TRUE;
41314 +    memcpy(&p_FmPort->openDmas, p_OpenDmas, sizeof(t_FmPortRsrc));
41315 +
41316 +    return E_OK;
41317 +}
41318 +
41319 +t_Error FM_PORT_ConfigNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks)
41320 +{
41321 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41322 +
41323 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41324 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41325 +
41326 +    memcpy(&p_FmPort->tasks, p_NumOfTasks, sizeof(t_FmPortRsrc));
41327 +    p_FmPort->p_FmPortDriverParam->setNumOfTasks = TRUE;
41328 +    return E_OK;
41329 +}
41330 +
41331 +t_Error FM_PORT_ConfigSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo)
41332 +{
41333 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41334 +
41335 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41336 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41337 +
41338 +    p_FmPort->p_FmPortDriverParam->setSizeOfFifo = TRUE;
41339 +    memcpy(&p_FmPort->fifoBufs, p_SizeOfFifo, sizeof(t_FmPortRsrc));
41340 +
41341 +    return E_OK;
41342 +}
41343 +
41344 +t_Error FM_PORT_ConfigDeqHighPriority(t_Handle h_FmPort, bool highPri)
41345 +{
41346 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41347 +
41348 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41349 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41350 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41351 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
41352 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("not available for Rx ports"));
41353 +
41354 +    p_FmPort->p_FmPortDriverParam->dfltCfg.deq_high_pri = highPri;
41355 +
41356 +    return E_OK;
41357 +}
41358 +
41359 +t_Error FM_PORT_ConfigDeqType(t_Handle h_FmPort, e_FmPortDeqType deqType)
41360 +{
41361 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41362 +
41363 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41364 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41365 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41366 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
41367 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41368 +                     ("not available for Rx ports"));
41369 +
41370 +    p_FmPort->p_FmPortDriverParam->dfltCfg.deq_type =
41371 +            (enum fman_port_deq_type)deqType;
41372 +
41373 +    return E_OK;
41374 +}
41375 +
41376 +t_Error FM_PORT_ConfigDeqPrefetchOption(
41377 +        t_Handle h_FmPort, e_FmPortDeqPrefetchOption deqPrefetchOption)
41378 +{
41379 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41380 +
41381 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41382 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41383 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41384 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
41385 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41386 +                     ("not available for Rx ports"));
41387 +    p_FmPort->p_FmPortDriverParam->dfltCfg.deq_prefetch_opt =
41388 +            (enum fman_port_deq_prefetch)deqPrefetchOption;
41389 +
41390 +    return E_OK;
41391 +}
41392 +
41393 +t_Error FM_PORT_ConfigBackupPools(t_Handle h_FmPort,
41394 +                                  t_FmBackupBmPools *p_BackupBmPools)
41395 +{
41396 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41397 +
41398 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41399 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41400 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41401 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
41402 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41403 +                     ("available for Rx ports only"));
41404 +
41405 +    p_FmPort->p_FmPortDriverParam->p_BackupBmPools =
41406 +            (t_FmBackupBmPools *)XX_Malloc(sizeof(t_FmBackupBmPools));
41407 +    if (!p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
41408 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_BackupBmPools allocation failed"));
41409 +    memcpy(p_FmPort->p_FmPortDriverParam->p_BackupBmPools, p_BackupBmPools,
41410 +           sizeof(t_FmBackupBmPools));
41411 +
41412 +    return E_OK;
41413 +}
41414 +
41415 +t_Error FM_PORT_ConfigDeqByteCnt(t_Handle h_FmPort, uint16_t deqByteCnt)
41416 +{
41417 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41418 +
41419 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41420 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41421 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41422 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
41423 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41424 +                     ("not available for Rx ports"));
41425 +
41426 +    p_FmPort->p_FmPortDriverParam->dfltCfg.deq_byte_cnt = deqByteCnt;
41427 +
41428 +    return E_OK;
41429 +}
41430 +
41431 +t_Error FM_PORT_ConfigBufferPrefixContent(
41432 +        t_Handle h_FmPort, t_FmBufferPrefixContent *p_FmBufferPrefixContent)
41433 +{
41434 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41435 +
41436 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41437 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41438 +
41439 +    memcpy(&p_FmPort->p_FmPortDriverParam->bufferPrefixContent,
41440 +           p_FmBufferPrefixContent, sizeof(t_FmBufferPrefixContent));
41441 +    /* if dataAlign was not initialized by user, we return to driver's default */
41442 +    if (!p_FmPort->p_FmPortDriverParam->bufferPrefixContent.dataAlign)
41443 +        p_FmPort->p_FmPortDriverParam->bufferPrefixContent.dataAlign =
41444 +                DEFAULT_PORT_bufferPrefixContent_dataAlign;
41445 +
41446 +    return E_OK;
41447 +}
41448 +
41449 +t_Error FM_PORT_ConfigCheksumLastBytesIgnore(t_Handle h_FmPort,
41450 +                                             uint8_t checksumLastBytesIgnore)
41451 +{
41452 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41453 +
41454 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41455 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41456 +
41457 +    p_FmPort->p_FmPortDriverParam->dfltCfg.checksum_bytes_ignore =
41458 +            checksumLastBytesIgnore;
41459 +
41460 +    return E_OK;
41461 +}
41462 +
41463 +t_Error FM_PORT_ConfigCutBytesFromEnd(t_Handle h_FmPort,
41464 +                                      uint8_t cutBytesFromEnd)
41465 +{
41466 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41467 +
41468 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41469 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41470 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41471 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
41472 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41473 +                     ("available for Rx ports only"));
41474 +
41475 +    p_FmPort->p_FmPortDriverParam->dfltCfg.rx_cut_end_bytes = cutBytesFromEnd;
41476 +
41477 +    return E_OK;
41478 +}
41479 +
41480 +t_Error FM_PORT_ConfigPoolDepletion(t_Handle h_FmPort,
41481 +                                    t_FmBufPoolDepletion *p_BufPoolDepletion)
41482 +{
41483 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41484 +
41485 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41486 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41487 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41488 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
41489 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41490 +                     ("available for Rx ports only"));
41491 +
41492 +    p_FmPort->p_FmPortDriverParam->enBufPoolDepletion = TRUE;
41493 +    memcpy(&p_FmPort->p_FmPortDriverParam->bufPoolDepletion, p_BufPoolDepletion,
41494 +           sizeof(t_FmBufPoolDepletion));
41495 +
41496 +    return E_OK;
41497 +}
41498 +
41499 +t_Error FM_PORT_ConfigObservedPoolDepletion(
41500 +        t_Handle h_FmPort,
41501 +        t_FmPortObservedBufPoolDepletion *p_FmPortObservedBufPoolDepletion)
41502 +{
41503 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41504 +
41505 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41506 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41507 +    if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
41508 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41509 +                     ("available for OP ports only"));
41510 +
41511 +    p_FmPort->p_FmPortDriverParam->enBufPoolDepletion = TRUE;
41512 +    memcpy(&p_FmPort->p_FmPortDriverParam->bufPoolDepletion,
41513 +           &p_FmPortObservedBufPoolDepletion->poolDepletionParams,
41514 +           sizeof(t_FmBufPoolDepletion));
41515 +    memcpy(&p_FmPort->p_FmPortDriverParam->extBufPools,
41516 +           &p_FmPortObservedBufPoolDepletion->poolsParams,
41517 +           sizeof(t_FmExtPools));
41518 +
41519 +    return E_OK;
41520 +}
41521 +
41522 +t_Error FM_PORT_ConfigExtBufPools(t_Handle h_FmPort, t_FmExtPools *p_FmExtPools)
41523 +{
41524 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41525 +
41526 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41527 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41528 +
41529 +    if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
41530 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41531 +                     ("available for OP ports only"));
41532 +
41533 +    memcpy(&p_FmPort->p_FmPortDriverParam->extBufPools, p_FmExtPools,
41534 +           sizeof(t_FmExtPools));
41535 +
41536 +    return E_OK;
41537 +}
41538 +
41539 +t_Error FM_PORT_ConfigDontReleaseTxBufToBM(t_Handle h_FmPort)
41540 +{
41541 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41542 +
41543 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41544 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41545 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
41546 +            && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
41547 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41548 +                     ("available for Tx ports only"));
41549 +
41550 +    p_FmPort->p_FmPortDriverParam->dontReleaseBuf = TRUE;
41551 +
41552 +    return E_OK;
41553 +}
41554 +
41555 +t_Error FM_PORT_ConfigDfltColor(t_Handle h_FmPort, e_FmPortColor color)
41556 +{
41557 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41558 +
41559 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41560 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41561 +    p_FmPort->p_FmPortDriverParam->dfltCfg.color = (enum fman_port_color)color;
41562 +
41563 +    return E_OK;
41564 +}
41565 +
41566 +t_Error FM_PORT_ConfigSyncReq(t_Handle h_FmPort, bool syncReq)
41567 +{
41568 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41569 +
41570 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41571 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41572 +
41573 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
41574 +            || (p_FmPort->portType == e_FM_PORT_TYPE_TX))
41575 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41576 +                     ("Not available for Tx ports"));
41577 +
41578 +    p_FmPort->p_FmPortDriverParam->dfltCfg.sync_req = syncReq;
41579 +
41580 +    return E_OK;
41581 +}
41582 +
41583 +t_Error FM_PORT_ConfigFrmDiscardOverride(t_Handle h_FmPort, bool override)
41584 +{
41585 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41586 +
41587 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41588 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41589 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
41590 +            || (p_FmPort->portType == e_FM_PORT_TYPE_TX))
41591 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41592 +                     ("Not available for Tx ports"));
41593 +
41594 +    p_FmPort->p_FmPortDriverParam->dfltCfg.discard_override = override;
41595 +
41596 +    return E_OK;
41597 +}
41598 +
41599 +t_Error FM_PORT_ConfigErrorsToDiscard(t_Handle h_FmPort,
41600 +                                      fmPortFrameErrSelect_t errs)
41601 +{
41602 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41603 +
41604 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41605 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41606 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41607 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
41608 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
41609 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
41610 +                     ("available for Rx and offline parsing ports only"));
41611 +
41612 +    p_FmPort->p_FmPortDriverParam->errorsToDiscard = errs;
41613 +
41614 +    return E_OK;
41615 +}
41616 +
41617 +t_Error FM_PORT_ConfigDmaSwapData(t_Handle h_FmPort, e_FmDmaSwapOption swapData)
41618 +{
41619 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41620 +
41621 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41622 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41623 +
41624 +    p_FmPort->p_FmPortDriverParam->dfltCfg.dma_swap_data =
41625 +            (enum fman_port_dma_swap)swapData;
41626 +
41627 +    return E_OK;
41628 +}
41629 +
41630 +t_Error FM_PORT_ConfigDmaIcCacheAttr(t_Handle h_FmPort,
41631 +                                     e_FmDmaCacheOption intContextCacheAttr)
41632 +{
41633 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41634 +
41635 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41636 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41637 +
41638 +    p_FmPort->p_FmPortDriverParam->dfltCfg.dma_ic_stash_on =
41639 +            (bool)(intContextCacheAttr == e_FM_DMA_STASH);
41640 +
41641 +    return E_OK;
41642 +}
41643 +
41644 +t_Error FM_PORT_ConfigDmaHdrAttr(t_Handle h_FmPort,
41645 +                                 e_FmDmaCacheOption headerCacheAttr)
41646 +{
41647 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41648 +
41649 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41650 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41651 +
41652 +    p_FmPort->p_FmPortDriverParam->dfltCfg.dma_header_stash_on =
41653 +            (bool)(headerCacheAttr == e_FM_DMA_STASH);
41654 +
41655 +    return E_OK;
41656 +}
41657 +
41658 +t_Error FM_PORT_ConfigDmaScatterGatherAttr(
41659 +        t_Handle h_FmPort, e_FmDmaCacheOption scatterGatherCacheAttr)
41660 +{
41661 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41662 +
41663 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41664 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41665 +
41666 +    p_FmPort->p_FmPortDriverParam->dfltCfg.dma_sg_stash_on =
41667 +            (bool)(scatterGatherCacheAttr == e_FM_DMA_STASH);
41668 +
41669 +    return E_OK;
41670 +}
41671 +
41672 +t_Error FM_PORT_ConfigDmaWriteOptimize(t_Handle h_FmPort, bool optimize)
41673 +{
41674 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41675 +
41676 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41677 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41678 +
41679 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
41680 +            || (p_FmPort->portType == e_FM_PORT_TYPE_TX))
41681 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41682 +                     ("Not available for Tx ports"));
41683 +
41684 +    p_FmPort->p_FmPortDriverParam->dfltCfg.dma_write_optimize = optimize;
41685 +
41686 +    return E_OK;
41687 +}
41688 +
41689 +#if (DPAA_VERSION >= 11)
41690 +t_Error FM_PORT_ConfigNoScatherGather(t_Handle h_FmPort, bool noScatherGather)
41691 +{
41692 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41693 +
41694 +    UNUSED(noScatherGather);
41695 +    UNUSED(p_FmPort);
41696 +
41697 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41698 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41699 +
41700 +    p_FmPort->p_FmPortDriverParam->noScatherGather = noScatherGather;
41701 +
41702 +    return E_OK;
41703 +}
41704 +#endif /* (DPAA_VERSION >= 11) */
41705 +
41706 +t_Error FM_PORT_ConfigForwardReuseIntContext(t_Handle h_FmPort,
41707 +                                             bool forwardReuse)
41708 +{
41709 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41710 +
41711 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41712 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41713 +
41714 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41715 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
41716 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41717 +                     ("available for Rx ports only"));
41718 +
41719 +    p_FmPort->p_FmPortDriverParam->forwardReuseIntContext = forwardReuse;
41720 +
41721 +    return E_OK;
41722 +}
41723 +
41724 +t_Error FM_PORT_ConfigMaxFrameLength(t_Handle h_FmPort, uint16_t length)
41725 +{
41726 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41727 +
41728 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41729 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41730 +
41731 +    p_FmPort->maxFrameLength = length;
41732 +
41733 +    return E_OK;
41734 +}
41735 +
41736 +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
41737 +t_Error FM_PORT_ConfigBCBWorkaround(t_Handle h_FmPort)
41738 +{
41739 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41740 +
41741 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41742 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41743 +
41744 +    p_FmPort->p_FmPortDriverParam->bcbWorkaround = TRUE;
41745 +
41746 +    return E_OK;
41747 +}
41748 +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
41749 +
41750 +/****************************************************/
41751 +/*       Hidden-DEBUG Only API                      */
41752 +/****************************************************/
41753 +
41754 +t_Error FM_PORT_ConfigTxFifoMinFillLevel(t_Handle h_FmPort,
41755 +                                         uint32_t minFillLevel)
41756 +{
41757 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41758 +
41759 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41760 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41761 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
41762 +            && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
41763 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41764 +                     ("available for Tx ports only"));
41765 +
41766 +    p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_min_level = minFillLevel;
41767 +
41768 +    return E_OK;
41769 +}
41770 +
41771 +t_Error FM_PORT_ConfigFifoDeqPipelineDepth(t_Handle h_FmPort,
41772 +                                           uint8_t deqPipelineDepth)
41773 +{
41774 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41775 +
41776 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41777 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41778 +
41779 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
41780 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
41781 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41782 +                     ("Not available for Rx ports"));
41783 +
41784 +    if (p_FmPort->imEn)
41785 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41786 +                     ("Not available for IM ports!"));
41787 +
41788 +    p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
41789 +            deqPipelineDepth;
41790 +
41791 +    return E_OK;
41792 +}
41793 +
41794 +t_Error FM_PORT_ConfigTxFifoLowComfLevel(t_Handle h_FmPort,
41795 +                                         uint32_t fifoLowComfLevel)
41796 +{
41797 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41798 +
41799 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41800 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41801 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
41802 +            && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
41803 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41804 +                     ("available for Tx ports only"));
41805 +
41806 +    p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_low_comf_level =
41807 +            fifoLowComfLevel;
41808 +
41809 +    return E_OK;
41810 +}
41811 +
41812 +t_Error FM_PORT_ConfigRxFifoThreshold(t_Handle h_FmPort, uint32_t fifoThreshold)
41813 +{
41814 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41815 +
41816 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41817 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41818 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41819 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
41820 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41821 +                     ("available for Rx ports only"));
41822 +
41823 +    p_FmPort->p_FmPortDriverParam->dfltCfg.rx_fifo_thr = fifoThreshold;
41824 +
41825 +    return E_OK;
41826 +}
41827 +
41828 +t_Error FM_PORT_ConfigRxFifoPriElevationLevel(t_Handle h_FmPort,
41829 +                                              uint32_t priElevationLevel)
41830 +{
41831 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41832 +
41833 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41834 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41835 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
41836 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
41837 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
41838 +                     ("available for Rx ports only"));
41839 +
41840 +    p_FmPort->p_FmPortDriverParam->dfltCfg.rx_pri_elevation = priElevationLevel;
41841 +
41842 +    return E_OK;
41843 +}
41844 +/****************************************************/
41845 +/*       API Run-time Control unit functions        */
41846 +/****************************************************/
41847 +
41848 +t_Error FM_PORT_SetNumOfOpenDmas(t_Handle h_FmPort,
41849 +                                 t_FmPortRsrc *p_NumOfOpenDmas)
41850 +{
41851 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41852 +    t_Error err;
41853 +
41854 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41855 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41856 +
41857 +    if ((!p_NumOfOpenDmas->num) || (p_NumOfOpenDmas->num > MAX_NUM_OF_DMAS))
41858 +        RETURN_ERROR( MAJOR, E_INVALID_VALUE,
41859 +                     ("openDmas-num can't be larger than %d", MAX_NUM_OF_DMAS));
41860 +    if (p_NumOfOpenDmas->extra > MAX_NUM_OF_EXTRA_DMAS)
41861 +        RETURN_ERROR(
41862 +                MAJOR,
41863 +                E_INVALID_VALUE,
41864 +                ("openDmas-extra can't be larger than %d", MAX_NUM_OF_EXTRA_DMAS));
41865 +    err = FmSetNumOfOpenDmas(p_FmPort->h_Fm, p_FmPort->hardwarePortId,
41866 +                             (uint8_t*)&p_NumOfOpenDmas->num,
41867 +                             (uint8_t*)&p_NumOfOpenDmas->extra, FALSE);
41868 +    if (err)
41869 +        RETURN_ERROR(MAJOR, err, NO_MSG);
41870 +
41871 +    memcpy(&p_FmPort->openDmas, p_NumOfOpenDmas, sizeof(t_FmPortRsrc));
41872 +
41873 +    return E_OK;
41874 +}
41875 +
41876 +t_Error FM_PORT_SetNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks)
41877 +{
41878 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41879 +    t_Error err;
41880 +
41881 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41882 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41883 +
41884 +    /* only driver uses host command port, so ASSERT rather than  RETURN_ERROR */
41885 +    ASSERT_COND(p_FmPort->portType != e_FM_PORT_TYPE_OH_HOST_COMMAND);
41886 +
41887 +    if ((!p_NumOfTasks->num) || (p_NumOfTasks->num > MAX_NUM_OF_TASKS))
41888 +        RETURN_ERROR(
41889 +                MAJOR, E_INVALID_VALUE,
41890 +                ("NumOfTasks-num can't be larger than %d", MAX_NUM_OF_TASKS));
41891 +    if (p_NumOfTasks->extra > MAX_NUM_OF_EXTRA_TASKS)
41892 +        RETURN_ERROR(
41893 +                MAJOR,
41894 +                E_INVALID_VALUE,
41895 +                ("NumOfTasks-extra can't be larger than %d", MAX_NUM_OF_EXTRA_TASKS));
41896 +
41897 +    err = FmSetNumOfTasks(p_FmPort->h_Fm, p_FmPort->hardwarePortId,
41898 +                          (uint8_t*)&p_NumOfTasks->num,
41899 +                          (uint8_t*)&p_NumOfTasks->extra, FALSE);
41900 +    if (err)
41901 +        RETURN_ERROR(MAJOR, err, NO_MSG);
41902 +
41903 +    /* update driver's struct */
41904 +    memcpy(&p_FmPort->tasks, p_NumOfTasks, sizeof(t_FmPortRsrc));
41905 +    return E_OK;
41906 +}
41907 +
41908 +t_Error FM_PORT_SetSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo)
41909 +{
41910 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41911 +    t_Error err;
41912 +
41913 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
41914 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
41915 +
41916 +    if (!p_SizeOfFifo->num || (p_SizeOfFifo->num > MAX_PORT_FIFO_SIZE))
41917 +        RETURN_ERROR(
41918 +                MAJOR,
41919 +                E_INVALID_VALUE,
41920 +                ("SizeOfFifo-num has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
41921 +    if (p_SizeOfFifo->num % BMI_FIFO_UNITS)
41922 +        RETURN_ERROR(
41923 +                MAJOR, E_INVALID_VALUE,
41924 +                ("SizeOfFifo-num has to be divisible by %d", BMI_FIFO_UNITS));
41925 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
41926 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
41927 +    {
41928 +        /* extra FIFO size (allowed only to Rx ports) */
41929 +        if (p_SizeOfFifo->extra % BMI_FIFO_UNITS)
41930 +            RETURN_ERROR(
41931 +                    MAJOR,
41932 +                    E_INVALID_VALUE,
41933 +                    ("SizeOfFifo-extra has to be divisible by %d", BMI_FIFO_UNITS));
41934 +    }
41935 +    else
41936 +        if (p_SizeOfFifo->extra)
41937 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
41938 +                         (" No SizeOfFifo-extra for non Rx ports"));
41939 +
41940 +    memcpy(&p_FmPort->fifoBufs, p_SizeOfFifo, sizeof(t_FmPortRsrc));
41941 +
41942 +    /* we do not change user's parameter */
41943 +    err = VerifySizeOfFifo(p_FmPort);
41944 +    if (err)
41945 +        RETURN_ERROR(MAJOR, err, NO_MSG);
41946 +
41947 +    err = FmSetSizeOfFifo(p_FmPort->h_Fm, p_FmPort->hardwarePortId,
41948 +                          &p_SizeOfFifo->num, &p_SizeOfFifo->extra, FALSE);
41949 +    if (err)
41950 +        RETURN_ERROR(MAJOR, err, NO_MSG);
41951 +
41952 +    return E_OK;
41953 +}
41954 +
41955 +uint32_t FM_PORT_GetBufferDataOffset(t_Handle h_FmPort)
41956 +{
41957 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41958 +
41959 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, 0);
41960 +    SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
41961 +                              0);
41962 +
41963 +    return p_FmPort->bufferOffsets.dataOffset;
41964 +}
41965 +
41966 +uint8_t * FM_PORT_GetBufferICInfo(t_Handle h_FmPort, char *p_Data)
41967 +{
41968 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41969 +
41970 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
41971 +    SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
41972 +                              NULL);
41973 +
41974 +    if (p_FmPort->bufferOffsets.pcdInfoOffset == ILLEGAL_BASE)
41975 +        return NULL;
41976 +
41977 +    return (uint8_t *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.pcdInfoOffset);
41978 +}
41979 +
41980 +t_FmPrsResult * FM_PORT_GetBufferPrsResult(t_Handle h_FmPort, char *p_Data)
41981 +{
41982 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41983 +
41984 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
41985 +    SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
41986 +                              NULL);
41987 +
41988 +    if (p_FmPort->bufferOffsets.prsResultOffset == ILLEGAL_BASE)
41989 +        return NULL;
41990 +
41991 +    return (t_FmPrsResult *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.prsResultOffset);
41992 +}
41993 +
41994 +uint64_t * FM_PORT_GetBufferTimeStamp(t_Handle h_FmPort, char *p_Data)
41995 +{
41996 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
41997 +
41998 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
41999 +    SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
42000 +                              NULL);
42001 +
42002 +    if (p_FmPort->bufferOffsets.timeStampOffset == ILLEGAL_BASE)
42003 +        return NULL;
42004 +
42005 +    return (uint64_t *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.timeStampOffset);
42006 +}
42007 +
42008 +uint8_t * FM_PORT_GetBufferHashResult(t_Handle h_FmPort, char *p_Data)
42009 +{
42010 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42011 +
42012 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
42013 +    SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
42014 +                              NULL);
42015 +
42016 +    if (p_FmPort->bufferOffsets.hashResultOffset == ILLEGAL_BASE)
42017 +        return NULL;
42018 +
42019 +    return (uint8_t *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.hashResultOffset);
42020 +}
42021 +
42022 +t_Error FM_PORT_Disable(t_Handle h_FmPort)
42023 +{
42024 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42025 +    int err;
42026 +
42027 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42028 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42029 +
42030 +    if (p_FmPort->imEn)
42031 +        FmPortImDisable(p_FmPort);
42032 +
42033 +    err = fman_port_disable(&p_FmPort->port);
42034 +    if (err == -EBUSY)
42035 +    {
42036 +        DBG(WARNING, ("%s: BMI or QMI is Busy. Port forced down",
42037 +               p_FmPort->name));
42038 +    }
42039 +    else
42040 +        if (err != 0)
42041 +        {
42042 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_disable"));
42043 +        }
42044 +
42045 +    p_FmPort->enabled = FALSE;
42046 +
42047 +    return E_OK;
42048 +}
42049 +
42050 +t_Error FM_PORT_Enable(t_Handle h_FmPort)
42051 +{
42052 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42053 +    int err;
42054 +
42055 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42056 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42057 +
42058 +    /* Used by FM_PORT_Free routine as indication
42059 +     if to disable port. Thus set it to TRUE prior
42060 +     to enabling itself. This way if part of enable
42061 +     process fails there will be still things
42062 +     to disable during Free. For example, if BMI
42063 +     enable succeeded but QMI failed, still  BMI
42064 +     needs to be disabled by Free. */
42065 +    p_FmPort->enabled = TRUE;
42066 +
42067 +    if (p_FmPort->imEn)
42068 +        FmPortImEnable(p_FmPort);
42069 +
42070 +    err = fman_port_enable(&p_FmPort->port);
42071 +    if (err != 0)
42072 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_enable"));
42073 +
42074 +    return E_OK;
42075 +}
42076 +
42077 +t_Error FM_PORT_SetRateLimit(t_Handle h_FmPort, t_FmPortRateLimit *p_RateLimit)
42078 +{
42079 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42080 +    uint8_t factor, countUnitBit;
42081 +    uint16_t baseGran;
42082 +    struct fman_port_rate_limiter params;
42083 +    int err;
42084 +
42085 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42086 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
42087 +
42088 +    switch (p_FmPort->portType)
42089 +    {
42090 +        case (e_FM_PORT_TYPE_TX_10G):
42091 +        case (e_FM_PORT_TYPE_TX):
42092 +            baseGran = BMI_RATE_LIMIT_GRAN_TX;
42093 +            break;
42094 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
42095 +            baseGran = BMI_RATE_LIMIT_GRAN_OP;
42096 +            break;
42097 +        default:
42098 +            RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
42099 +                         ("available for Tx and Offline parsing ports only"));
42100 +    }
42101 +
42102 +    countUnitBit = (uint8_t)FmGetTimeStampScale(p_FmPort->h_Fm); /* TimeStamp per nano seconds units */
42103 +    /* normally, we use 1 usec as the reference count */
42104 +    factor = 1;
42105 +    /* if ratelimit is too small for a 1usec factor, multiply the factor */
42106 +    while (p_RateLimit->rateLimit < baseGran / factor)
42107 +    {
42108 +        if (countUnitBit == 31)
42109 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Rate limit is too small"));
42110 +
42111 +        countUnitBit++;
42112 +        factor <<= 1;
42113 +    }
42114 +    /* if ratelimit is too large for a 1usec factor, it is also larger than max rate*/
42115 +    if (p_RateLimit->rateLimit
42116 +            > ((uint32_t)baseGran * (1 << 10) * (uint32_t)factor))
42117 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Rate limit is too large"));
42118 +
42119 +    if (!p_RateLimit->maxBurstSize
42120 +            || (p_RateLimit->maxBurstSize > BMI_RATE_LIMIT_MAX_BURST_SIZE))
42121 +        RETURN_ERROR(
42122 +                MAJOR,
42123 +                E_INVALID_VALUE,
42124 +                ("maxBurstSize must be between 1K and %dk", BMI_RATE_LIMIT_MAX_BURST_SIZE));
42125 +
42126 +    params.count_1micro_bit = (uint8_t)FmGetTimeStampScale(p_FmPort->h_Fm);
42127 +    params.high_burst_size_gran = FALSE;
42128 +    params.burst_size = p_RateLimit->maxBurstSize;
42129 +    params.rate = p_RateLimit->rateLimit;
42130 +    params.rate_factor = E_FMAN_PORT_RATE_DOWN_NONE;
42131 +
42132 +    if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
42133 +    {
42134 +#ifndef FM_NO_ADVANCED_RATE_LIMITER
42135 +
42136 +        if ((p_FmPort->fmRevInfo.majorRev == 4)
42137 +                || (p_FmPort->fmRevInfo.majorRev >= 6))
42138 +        {
42139 +            params.high_burst_size_gran = TRUE;
42140 +        }
42141 +        else
42142 +#endif /* ! FM_NO_ADVANCED_RATE_LIMITER */
42143 +        {
42144 +            if (p_RateLimit->rateLimitDivider
42145 +                    != e_FM_PORT_DUAL_RATE_LIMITER_NONE)
42146 +                RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
42147 +                             ("FM_PORT_ConfigDualRateLimitScaleDown"));
42148 +
42149 +            if (p_RateLimit->maxBurstSize % 1000)
42150 +            {
42151 +                p_RateLimit->maxBurstSize =
42152 +                        (uint16_t)((p_RateLimit->maxBurstSize / 1000) + 1);
42153 +                DBG(WARNING, ("rateLimit.maxBurstSize rounded up to %d", (p_RateLimit->maxBurstSize/1000+1)*1000));
42154 +            }
42155 +            else
42156 +                p_RateLimit->maxBurstSize = (uint16_t)(p_RateLimit->maxBurstSize
42157 +                        / 1000);
42158 +        }
42159 +        params.rate_factor =
42160 +                (enum fman_port_rate_limiter_scale_down)p_RateLimit->rateLimitDivider;
42161 +        params.burst_size = p_RateLimit->maxBurstSize;
42162 +    }
42163 +
42164 +    err = fman_port_set_rate_limiter(&p_FmPort->port, &params);
42165 +    if (err != 0)
42166 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_rate_limiter"));
42167 +
42168 +    return E_OK;
42169 +}
42170 +
42171 +t_Error FM_PORT_DeleteRateLimit(t_Handle h_FmPort)
42172 +{
42173 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42174 +    int err;
42175 +
42176 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42177 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
42178 +
42179 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
42180 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX)
42181 +            || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
42182 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
42183 +                     ("available for Tx and Offline parsing ports only"));
42184 +
42185 +    err = fman_port_delete_rate_limiter(&p_FmPort->port);
42186 +    if (err != 0)
42187 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_rate_limiter"));
42188 +    return E_OK;
42189 +}
42190 +
42191 +t_Error FM_PORT_SetPfcPrioritiesMappingToQmanWQ(t_Handle h_FmPort, uint8_t prio,
42192 +                                                uint8_t wq)
42193 +{
42194 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42195 +    uint32_t tmpReg;
42196 +    uint32_t wqTmpReg;
42197 +
42198 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42199 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42200 +
42201 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_TX)
42202 +            && (p_FmPort->portType != e_FM_PORT_TYPE_TX_10G))
42203 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
42204 +                     ("PFC mapping is available for Tx ports only"));
42205 +
42206 +    if (prio > 7)
42207 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
42208 +                     ("PFC priority (%d) is out of range (0-7)", prio));
42209 +    if (wq > 7)
42210 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
42211 +                     ("WQ (%d) is out of range (0-7)", wq));
42212 +
42213 +    tmpReg = GET_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tpfcm[0]);
42214 +    tmpReg &= ~(0xf << ((7 - prio) * 4));
42215 +    wqTmpReg = ((uint32_t)wq << ((7 - prio) * 4));
42216 +    tmpReg |= wqTmpReg;
42217 +
42218 +    WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tpfcm[0],
42219 +                 tmpReg);
42220 +
42221 +    return E_OK;
42222 +}
42223 +
42224 +t_Error FM_PORT_SetFrameQueueCounters(t_Handle h_FmPort, bool enable)
42225 +{
42226 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42227 +
42228 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42229 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42230 +
42231 +    fman_port_set_queue_cnt_mode(&p_FmPort->port, enable);
42232 +
42233 +    return E_OK;
42234 +}
42235 +
42236 +t_Error FM_PORT_SetPerformanceCounters(t_Handle h_FmPort, bool enable)
42237 +{
42238 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42239 +    int err;
42240 +
42241 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42242 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42243 +
42244 +    err = fman_port_set_perf_cnt_mode(&p_FmPort->port, enable);
42245 +    if (err != 0)
42246 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_perf_cnt_mode"));
42247 +    return E_OK;
42248 +}
42249 +
42250 +t_Error FM_PORT_SetPerformanceCountersParams(
42251 +        t_Handle h_FmPort, t_FmPortPerformanceCnt *p_FmPortPerformanceCnt)
42252 +{
42253 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42254 +    struct fman_port_perf_cnt_params params;
42255 +    int err;
42256 +
42257 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42258 +
42259 +    /* check parameters */
42260 +    if (!p_FmPortPerformanceCnt->taskCompVal
42261 +            || (p_FmPortPerformanceCnt->taskCompVal > p_FmPort->tasks.num))
42262 +        RETURN_ERROR(
42263 +                MAJOR,
42264 +                E_INVALID_VALUE,
42265 +                ("taskCompVal (%d) has to be in the range of 1 - %d (current value)!", p_FmPortPerformanceCnt->taskCompVal, p_FmPort->tasks.num));
42266 +    if (!p_FmPortPerformanceCnt->dmaCompVal
42267 +            || (p_FmPortPerformanceCnt->dmaCompVal > p_FmPort->openDmas.num))
42268 +        RETURN_ERROR(
42269 +                MAJOR,
42270 +                E_INVALID_VALUE,
42271 +                ("dmaCompVal (%d) has to be in the range of 1 - %d (current value)!", p_FmPortPerformanceCnt->dmaCompVal, p_FmPort->openDmas.num));
42272 +    if (!p_FmPortPerformanceCnt->fifoCompVal
42273 +            || (p_FmPortPerformanceCnt->fifoCompVal > p_FmPort->fifoBufs.num))
42274 +        RETURN_ERROR(
42275 +                MAJOR,
42276 +                E_INVALID_VALUE,
42277 +                ("fifoCompVal (%d) has to be in the range of 256 - %d (current value)!", p_FmPortPerformanceCnt->fifoCompVal, p_FmPort->fifoBufs.num));
42278 +    if (p_FmPortPerformanceCnt->fifoCompVal % BMI_FIFO_UNITS)
42279 +        RETURN_ERROR(
42280 +                MAJOR,
42281 +                E_INVALID_VALUE,
42282 +                ("fifoCompVal (%d) has to be divisible by %d", p_FmPortPerformanceCnt->fifoCompVal, BMI_FIFO_UNITS));
42283 +
42284 +    switch (p_FmPort->portType)
42285 +    {
42286 +        case (e_FM_PORT_TYPE_RX_10G):
42287 +        case (e_FM_PORT_TYPE_RX):
42288 +            if (!p_FmPortPerformanceCnt->queueCompVal
42289 +                    || (p_FmPortPerformanceCnt->queueCompVal
42290 +                            > MAX_PERFORMANCE_RX_QUEUE_COMP))
42291 +                RETURN_ERROR(
42292 +                        MAJOR,
42293 +                        E_INVALID_VALUE,
42294 +                        ("performanceCnt.queueCompVal for Rx has to be in the range of 1 - %d", MAX_PERFORMANCE_RX_QUEUE_COMP));
42295 +            break;
42296 +        case (e_FM_PORT_TYPE_TX_10G):
42297 +        case (e_FM_PORT_TYPE_TX):
42298 +            if (!p_FmPortPerformanceCnt->queueCompVal
42299 +                    || (p_FmPortPerformanceCnt->queueCompVal
42300 +                            > MAX_PERFORMANCE_TX_QUEUE_COMP))
42301 +                RETURN_ERROR(
42302 +                        MAJOR,
42303 +                        E_INVALID_VALUE,
42304 +                        ("performanceCnt.queueCompVal for Tx has to be in the range of 1 - %d", MAX_PERFORMANCE_TX_QUEUE_COMP));
42305 +            break;
42306 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
42307 +        case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
42308 +            if (p_FmPortPerformanceCnt->queueCompVal)
42309 +                RETURN_ERROR(
42310 +                        MAJOR,
42311 +                        E_INVALID_VALUE,
42312 +                        ("performanceCnt.queueCompVal is not relevant for H/O ports."));
42313 +            break;
42314 +        default:
42315 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
42316 +    }
42317 +
42318 +    params.task_val = p_FmPortPerformanceCnt->taskCompVal;
42319 +    params.queue_val = p_FmPortPerformanceCnt->queueCompVal;
42320 +    params.dma_val = p_FmPortPerformanceCnt->dmaCompVal;
42321 +    params.fifo_val = p_FmPortPerformanceCnt->fifoCompVal;
42322 +
42323 +    err = fman_port_set_perf_cnt_params(&p_FmPort->port, &params);
42324 +    if (err != 0)
42325 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_perf_cnt_params"));
42326 +
42327 +    return E_OK;
42328 +}
42329 +
42330 +t_Error FM_PORT_AnalyzePerformanceParams(t_Handle h_FmPort)
42331 +{
42332 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42333 +    t_FmPortPerformanceCnt currParams, savedParams;
42334 +    t_Error err;
42335 +    bool underTest, failed = FALSE;
42336 +
42337 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42338 +
42339 +    XX_Print("Analyzing Performance parameters for port (type %d, id%d)\n",
42340 +             p_FmPort->portType, p_FmPort->portId);
42341 +
42342 +    currParams.taskCompVal = (uint8_t)p_FmPort->tasks.num;
42343 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
42344 +            || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
42345 +        currParams.queueCompVal = 0;
42346 +    else
42347 +        currParams.queueCompVal = 1;
42348 +    currParams.dmaCompVal = (uint8_t)p_FmPort->openDmas.num;
42349 +    currParams.fifoCompVal = p_FmPort->fifoBufs.num;
42350 +
42351 +    FM_PORT_SetPerformanceCounters(p_FmPort, FALSE);
42352 +    ClearPerfCnts(p_FmPort);
42353 +    if ((err = FM_PORT_SetPerformanceCountersParams(p_FmPort, &currParams))
42354 +            != E_OK)
42355 +        RETURN_ERROR(MAJOR, err, NO_MSG);
42356 +    FM_PORT_SetPerformanceCounters(p_FmPort, TRUE);
42357 +    XX_UDelay(1000000);
42358 +    FM_PORT_SetPerformanceCounters(p_FmPort, FALSE);
42359 +    if (FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL))
42360 +    {
42361 +        XX_Print(
42362 +                "Max num of defined port tasks (%d) utilized - Please enlarge\n",
42363 +                p_FmPort->tasks.num);
42364 +        failed = TRUE;
42365 +    }
42366 +    if (FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL))
42367 +    {
42368 +        XX_Print(
42369 +                "Max num of defined port openDmas (%d) utilized - Please enlarge\n",
42370 +                p_FmPort->openDmas.num);
42371 +        failed = TRUE;
42372 +    }
42373 +    if (FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL))
42374 +    {
42375 +        XX_Print(
42376 +                "Max size of defined port fifo (%d) utilized - Please enlarge\n",
42377 +                p_FmPort->fifoBufs.num);
42378 +        failed = TRUE;
42379 +    }
42380 +    if (failed)
42381 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
42382 +
42383 +    memset(&savedParams, 0, sizeof(savedParams));
42384 +    while (TRUE)
42385 +    {
42386 +        underTest = FALSE;
42387 +        if ((currParams.taskCompVal != 1) && !savedParams.taskCompVal)
42388 +        {
42389 +            currParams.taskCompVal--;
42390 +            underTest = TRUE;
42391 +        }
42392 +        if ((currParams.dmaCompVal != 1) && !savedParams.dmaCompVal)
42393 +        {
42394 +            currParams.dmaCompVal--;
42395 +            underTest = TRUE;
42396 +        }
42397 +        if ((currParams.fifoCompVal != BMI_FIFO_UNITS)
42398 +                && !savedParams.fifoCompVal)
42399 +        {
42400 +            currParams.fifoCompVal -= BMI_FIFO_UNITS;
42401 +            underTest = TRUE;
42402 +        }
42403 +        if (!underTest)
42404 +            break;
42405 +
42406 +        ClearPerfCnts(p_FmPort);
42407 +        if ((err = FM_PORT_SetPerformanceCountersParams(p_FmPort, &currParams))
42408 +                != E_OK)
42409 +            RETURN_ERROR(MAJOR, err, NO_MSG);
42410 +        FM_PORT_SetPerformanceCounters(p_FmPort, TRUE);
42411 +        XX_UDelay(1000000);
42412 +        FM_PORT_SetPerformanceCounters(p_FmPort, FALSE);
42413 +
42414 +        if (!savedParams.taskCompVal
42415 +                && FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL))
42416 +            savedParams.taskCompVal = (uint8_t)(currParams.taskCompVal + 2);
42417 +        if (!savedParams.dmaCompVal
42418 +                && FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL))
42419 +            savedParams.dmaCompVal = (uint8_t)(currParams.dmaCompVal + 2);
42420 +        if (!savedParams.fifoCompVal
42421 +                && FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL))
42422 +            savedParams.fifoCompVal = currParams.fifoCompVal
42423 +                    + (2 * BMI_FIFO_UNITS);
42424 +    }
42425 +
42426 +    XX_Print("best vals: tasks %d, dmas %d, fifos %d\n",
42427 +             savedParams.taskCompVal, savedParams.dmaCompVal,
42428 +             savedParams.fifoCompVal);
42429 +    return E_OK;
42430 +}
42431 +
42432 +t_Error FM_PORT_SetStatisticsCounters(t_Handle h_FmPort, bool enable)
42433 +{
42434 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42435 +    int err;
42436 +
42437 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42438 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42439 +
42440 +    err = fman_port_set_stats_cnt_mode(&p_FmPort->port, enable);
42441 +    if (err != 0)
42442 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_stats_cnt_mode"));
42443 +    return E_OK;
42444 +}
42445 +
42446 +t_Error FM_PORT_SetErrorsRoute(t_Handle h_FmPort, fmPortFrameErrSelect_t errs)
42447 +{
42448 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42449 +    volatile uint32_t *p_ErrDiscard = NULL;
42450 +    int err;
42451 +
42452 +    UNUSED(p_ErrDiscard);
42453 +    err = fman_port_set_err_mask(&p_FmPort->port, (uint32_t)errs);
42454 +    if (err != 0)
42455 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_err_mask"));
42456 +
42457 +#ifdef FM_ERROR_VSP_NO_MATCH_SW006
42458 +    if (p_FmPort->fmRevInfo.majorRev >= 6)
42459 +    {
42460 +        t_FmPcdCtrlParamsPage *p_ParamsPage;
42461 +
42462 +        FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
42463 +                         (void**)&p_ParamsPage);
42464 +        ASSERT_COND(p_ParamsPage);
42465 +        switch (p_FmPort->portType)
42466 +        {
42467 +            case (e_FM_PORT_TYPE_RX_10G):
42468 +            case (e_FM_PORT_TYPE_RX):
42469 +                p_ErrDiscard =
42470 +                        &p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm;
42471 +                break;
42472 +            case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
42473 +                p_ErrDiscard =
42474 +                        &p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm;
42475 +                break;
42476 +            default:
42477 +                RETURN_ERROR(
42478 +                        MAJOR, E_INVALID_OPERATION,
42479 +                        ("available for Rx and offline parsing ports only"));
42480 +        }
42481 +        WRITE_UINT32(p_ParamsPage->errorsDiscardMask,
42482 +                     GET_UINT32(*p_ErrDiscard) | errs);
42483 +    }
42484 +#endif /* FM_ERROR_VSP_NO_MATCH_SW006 */
42485 +
42486 +    return E_OK;
42487 +}
42488 +
42489 +t_Error FM_PORT_SetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId,
42490 +                                   bool enable)
42491 +{
42492 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42493 +    int err;
42494 +
42495 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42496 +    SANITY_CHECK_RETURN_ERROR(poolId<BM_MAX_NUM_OF_POOLS, E_INVALID_HANDLE);
42497 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42498 +
42499 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
42500 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
42501 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
42502 +                     ("available for Rx ports only"));
42503 +
42504 +    err = fman_port_set_bpool_cnt_mode(&p_FmPort->port, poolId, enable);
42505 +    if (err != 0)
42506 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_bpool_cnt_mode"));
42507 +    return E_OK;
42508 +}
42509 +
42510 +t_Error FM_PORT_GetBmiCounters(t_Handle h_FmPort, t_FmPortBmiStats *p_BmiStats)
42511 +{
42512 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42513 +
42514 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
42515 +            || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)){
42516 +        p_BmiStats->cntCycle =
42517 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_CYCLE);
42518 +            /* fmbm_rccn */
42519 +        p_BmiStats->cntTaskUtil =
42520 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL);
42521 +            /* fmbm_rtuc */
42522 +        p_BmiStats->cntQueueUtil =
42523 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_QUEUE_UTIL);
42524 +            /* fmbm_rrquc */
42525 +        p_BmiStats->cntDmaUtil =
42526 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL);
42527 +            /* fmbm_rduc */
42528 +        p_BmiStats->cntFifoUtil =
42529 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL);
42530 +            /* fmbm_rfuc */
42531 +        p_BmiStats->cntRxPauseActivation =
42532 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION);
42533 +            /* fmbm_rpac */
42534 +        p_BmiStats->cntFrame =
42535 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FRAME);
42536 +            /* fmbm_rfrc */
42537 +        p_BmiStats->cntDiscardFrame =
42538 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DISCARD_FRAME);
42539 +            /* fmbm_rfdc */
42540 +        p_BmiStats->cntDeallocBuf =
42541 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DEALLOC_BUF);
42542 +            /* fmbm_rbdc */
42543 +        p_BmiStats->cntRxBadFrame =
42544 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_BAD_FRAME);
42545 +            /* fmbm_rfbc */
42546 +        p_BmiStats->cntRxLargeFrame =
42547 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_LARGE_FRAME);
42548 +            /* fmbm_rlfc */
42549 +        p_BmiStats->cntRxFilterFrame =
42550 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_FILTER_FRAME);
42551 +            /* fmbm_rffc */
42552 +        p_BmiStats->cntRxListDmaErr =
42553 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR);
42554 +            /* fmbm_rfldec */
42555 +        p_BmiStats->cntRxOutOfBuffersDiscard =
42556 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD);
42557 +            /* fmbm_rodc */
42558 +        p_BmiStats->cntWredDiscard = 0;
42559 +        p_BmiStats->cntLengthErr = 0;
42560 +        p_BmiStats->cntUnsupportedFormat = 0;
42561 +    }
42562 +    else if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
42563 +                || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)){
42564 +        p_BmiStats->cntCycle =
42565 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_CYCLE);
42566 +            /* fmbm_tccn */
42567 +        p_BmiStats->cntTaskUtil =
42568 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL);
42569 +            /* fmbm_ttuc */
42570 +        p_BmiStats->cntQueueUtil =
42571 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_QUEUE_UTIL);
42572 +            /* fmbm_ttcquc */
42573 +        p_BmiStats->cntDmaUtil =
42574 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL);
42575 +            /* fmbm_tduc */
42576 +        p_BmiStats->cntFifoUtil =
42577 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL);
42578 +            /* fmbm_tfuc */
42579 +        p_BmiStats->cntRxPauseActivation = 0;
42580 +        p_BmiStats->cntFrame =
42581 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FRAME);
42582 +            /* fmbm_tfrc */
42583 +        p_BmiStats->cntDiscardFrame =
42584 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DISCARD_FRAME);
42585 +            /* fmbm_tfdc */
42586 +        p_BmiStats->cntDeallocBuf =
42587 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DEALLOC_BUF);
42588 +            /* fmbm_tbdc */
42589 +        p_BmiStats->cntRxBadFrame = 0;
42590 +        p_BmiStats->cntRxLargeFrame = 0;
42591 +        p_BmiStats->cntRxFilterFrame = 0;
42592 +        p_BmiStats->cntRxListDmaErr = 0;
42593 +        p_BmiStats->cntRxOutOfBuffersDiscard = 0;
42594 +        p_BmiStats->cntWredDiscard = 0;
42595 +        p_BmiStats->cntLengthErr =
42596 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_LENGTH_ERR);
42597 +            /* fmbm_tfledc */
42598 +        p_BmiStats->cntUnsupportedFormat =
42599 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT);
42600 +            /* fmbm_tfufdc */
42601 +    }
42602 +    else if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) {
42603 +        p_BmiStats->cntCycle =
42604 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_CYCLE);
42605 +            /* fmbm_occn */
42606 +        p_BmiStats->cntTaskUtil =
42607 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL);
42608 +            /* fmbm_otuc */
42609 +        p_BmiStats->cntQueueUtil = 0;
42610 +        p_BmiStats->cntDmaUtil =
42611 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL);
42612 +            /* fmbm_oduc */
42613 +        p_BmiStats->cntFifoUtil =
42614 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL);
42615 +            /* fmbm_ofuc*/
42616 +        p_BmiStats->cntRxPauseActivation = 0;
42617 +        p_BmiStats->cntFrame =
42618 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FRAME);
42619 +            /* fmbm_ofrc */
42620 +        p_BmiStats->cntDiscardFrame =
42621 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DISCARD_FRAME);
42622 +            /* fmbm_ofdc */
42623 +        p_BmiStats->cntDeallocBuf =
42624 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DEALLOC_BUF);
42625 +            /* fmbm_obdc*/
42626 +        p_BmiStats->cntRxBadFrame = 0;
42627 +        p_BmiStats->cntRxLargeFrame = 0;
42628 +        p_BmiStats->cntRxFilterFrame =
42629 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_FILTER_FRAME);
42630 +            /* fmbm_offc */
42631 +        p_BmiStats->cntRxListDmaErr =
42632 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR);
42633 +            /* fmbm_ofldec */
42634 +        p_BmiStats->cntRxOutOfBuffersDiscard =
42635 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD);
42636 +            /* fmbm_rodc */
42637 +        p_BmiStats->cntWredDiscard =
42638 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_WRED_DISCARD);
42639 +            /* fmbm_ofwdc */
42640 +        p_BmiStats->cntLengthErr =
42641 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_LENGTH_ERR);
42642 +            /* fmbm_ofledc */
42643 +        p_BmiStats->cntUnsupportedFormat =
42644 +            FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT);
42645 +            /* fmbm_ofufdc */
42646 +    }
42647 +    return E_OK;
42648 +}
42649 +
42650 +uint32_t FM_PORT_GetCounter(t_Handle h_FmPort, e_FmPortCounters counter)
42651 +{
42652 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42653 +    bool bmiCounter = FALSE;
42654 +    enum fman_port_stats_counters statsType;
42655 +    enum fman_port_perf_counters perfType;
42656 +    enum fman_port_qmi_counters queueType;
42657 +    bool isStats;
42658 +    t_Error errCode;
42659 +
42660 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, 0);
42661 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42662 +
42663 +    switch (counter)
42664 +    {
42665 +        case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
42666 +        case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
42667 +        case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
42668 +            /* check that counter is available for the port type */
42669 +            if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
42670 +                    || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
42671 +            {
42672 +                REPORT_ERROR(MINOR, E_INVALID_STATE,
42673 +                        ("Requested counter is not available for Rx ports"));
42674 +                return 0;
42675 +            }
42676 +            bmiCounter = FALSE;
42677 +            break;
42678 +        case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
42679 +            bmiCounter = FALSE;
42680 +            break;
42681 +        default: /* BMI counters (or error - will be checked in BMI routine )*/
42682 +            bmiCounter = TRUE;
42683 +            break;
42684 +    }
42685 +
42686 +    if (bmiCounter)
42687 +    {
42688 +        errCode = BmiPortCheckAndGetCounterType(p_FmPort, counter, &statsType,
42689 +                                                &perfType, &isStats);
42690 +        if (errCode != E_OK)
42691 +        {
42692 +            REPORT_ERROR(MINOR, errCode, NO_MSG);
42693 +            return 0;
42694 +        }
42695 +        if (isStats)
42696 +            return fman_port_get_stats_counter(&p_FmPort->port, statsType);
42697 +        else
42698 +            return fman_port_get_perf_counter(&p_FmPort->port, perfType);
42699 +    }
42700 +    else /* QMI counter */
42701 +    {
42702 +        /* check that counters are enabled */
42703 +        if (!(GET_UINT32(p_FmPort->port.qmi_regs->fmqm_pnc)
42704 +                & QMI_PORT_CFG_EN_COUNTERS))
42705 +
42706 +        {
42707 +            REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter was not enabled"));
42708 +            return 0;
42709 +        }
42710 +
42711 +        /* Set counter */
42712 +        switch (counter)
42713 +        {
42714 +            case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
42715 +                queueType = E_FMAN_PORT_ENQ_TOTAL;
42716 +                break;
42717 +            case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
42718 +                queueType = E_FMAN_PORT_DEQ_TOTAL;
42719 +                break;
42720 +            case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
42721 +                queueType = E_FMAN_PORT_DEQ_FROM_DFLT;
42722 +                break;
42723 +            case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
42724 +                queueType = E_FMAN_PORT_DEQ_CONFIRM;
42725 +                break;
42726 +            default:
42727 +                REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter is not available"));
42728 +                return 0;
42729 +        }
42730 +
42731 +        return fman_port_get_qmi_counter(&p_FmPort->port, queueType);
42732 +    }
42733 +
42734 +    return 0;
42735 +}
42736 +
42737 +t_Error FM_PORT_ModifyCounter(t_Handle h_FmPort, e_FmPortCounters counter,
42738 +                              uint32_t value)
42739 +{
42740 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42741 +    bool bmiCounter = FALSE;
42742 +    enum fman_port_stats_counters statsType;
42743 +    enum fman_port_perf_counters perfType;
42744 +    enum fman_port_qmi_counters queueType;
42745 +    bool isStats;
42746 +    t_Error errCode;
42747 +
42748 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42749 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42750 +
42751 +    switch (counter)
42752 +    {
42753 +        case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
42754 +        case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
42755 +        case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
42756 +            /* check that counter is available for the port type */
42757 +            if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
42758 +                    || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
42759 +                RETURN_ERROR(
42760 +                        MINOR, E_INVALID_STATE,
42761 +                        ("Requested counter is not available for Rx ports"));
42762 +        case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
42763 +            bmiCounter = FALSE;
42764 +            break;
42765 +        default: /* BMI counters (or error - will be checked in BMI routine )*/
42766 +            bmiCounter = TRUE;
42767 +            break;
42768 +    }
42769 +
42770 +    if (bmiCounter)
42771 +    {
42772 +        errCode = BmiPortCheckAndGetCounterType(p_FmPort, counter, &statsType,
42773 +                                                &perfType, &isStats);
42774 +        if (errCode != E_OK)
42775 +        {
42776 +            RETURN_ERROR(MINOR, errCode, NO_MSG);
42777 +        }
42778 +        if (isStats)
42779 +            fman_port_set_stats_counter(&p_FmPort->port, statsType, value);
42780 +        else
42781 +            fman_port_set_perf_counter(&p_FmPort->port, perfType, value);
42782 +    }
42783 +    else /* QMI counter */
42784 +    {
42785 +        /* check that counters are enabled */
42786 +        if (!(GET_UINT32(p_FmPort->port.qmi_regs->fmqm_pnc)
42787 +                & QMI_PORT_CFG_EN_COUNTERS))
42788 +        {
42789 +            RETURN_ERROR(MINOR, E_INVALID_STATE,
42790 +                         ("Requested counter was not enabled"));
42791 +        }
42792 +
42793 +        /* Set counter */
42794 +        switch (counter)
42795 +        {
42796 +            case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
42797 +                queueType = E_FMAN_PORT_ENQ_TOTAL;
42798 +                break;
42799 +            case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
42800 +                queueType = E_FMAN_PORT_DEQ_TOTAL;
42801 +                break;
42802 +            case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
42803 +                queueType = E_FMAN_PORT_DEQ_FROM_DFLT;
42804 +                break;
42805 +            case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
42806 +                queueType = E_FMAN_PORT_DEQ_CONFIRM;
42807 +                break;
42808 +            default:
42809 +                RETURN_ERROR(MAJOR, E_INVALID_STATE,
42810 +                             ("Requested counter is not available"));
42811 +        }
42812 +
42813 +        fman_port_set_qmi_counter(&p_FmPort->port, queueType, value);
42814 +    }
42815 +
42816 +    return E_OK;
42817 +}
42818 +
42819 +uint32_t FM_PORT_GetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId)
42820 +{
42821 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42822 +
42823 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, 0);
42824 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42825 +
42826 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX)
42827 +            && (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
42828 +    {
42829 +        REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter is not available for non-Rx ports"));
42830 +        return 0;
42831 +    }
42832 +    return fman_port_get_bpool_counter(&p_FmPort->port, poolId);
42833 +}
42834 +
42835 +t_Error FM_PORT_ModifyAllocBufCounter(t_Handle h_FmPort, uint8_t poolId,
42836 +                                      uint32_t value)
42837 +{
42838 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPort;
42839 +
42840 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42841 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42842 +
42843 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX)
42844 +            && (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
42845 +        RETURN_ERROR( MINOR, E_INVALID_STATE,
42846 +                     ("Requested counter is not available for non-Rx ports"));
42847 +
42848 +    fman_port_set_bpool_counter(&p_FmPort->port, poolId, value);
42849 +    return E_OK;
42850 +}
42851 +bool FM_PORT_IsStalled(t_Handle h_FmPort)
42852 +{
42853 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42854 +    t_Error err;
42855 +    bool isStalled;
42856 +
42857 +    SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, FALSE);
42858 +    SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
42859 +                              FALSE);
42860 +
42861 +    err = FmIsPortStalled(p_FmPort->h_Fm, p_FmPort->hardwarePortId, &isStalled);
42862 +    if (err != E_OK)
42863 +    {
42864 +        REPORT_ERROR(MAJOR, err, NO_MSG);
42865 +        return TRUE;
42866 +    }
42867 +    return isStalled;
42868 +}
42869 +
42870 +t_Error FM_PORT_ReleaseStalled(t_Handle h_FmPort)
42871 +{
42872 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42873 +
42874 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42875 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42876 +
42877 +    return FmResumeStalledPort(p_FmPort->h_Fm, p_FmPort->hardwarePortId);
42878 +}
42879 +
42880 +t_Error FM_PORT_SetRxL4ChecksumVerify(t_Handle h_FmPort, bool l4Checksum)
42881 +{
42882 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42883 +    int err;
42884 +
42885 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42886 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
42887 +
42888 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
42889 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
42890 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
42891 +                     ("available for Rx ports only"));
42892 +
42893 +    if (l4Checksum)
42894 +        err = fman_port_modify_rx_fd_bits(
42895 +                &p_FmPort->port, (uint8_t)(BMI_PORT_RFNE_FRWD_DCL4C >> 24),
42896 +                TRUE);
42897 +    else
42898 +        err = fman_port_modify_rx_fd_bits(
42899 +                &p_FmPort->port, (uint8_t)(BMI_PORT_RFNE_FRWD_DCL4C >> 24),
42900 +                FALSE);
42901 +    if (err != 0)
42902 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_modify_rx_fd_bits"));
42903 +
42904 +    return E_OK;
42905 +}
42906 +
42907 +/*****************************************************************************/
42908 +/*       API Run-time PCD Control unit functions                             */
42909 +/*****************************************************************************/
42910 +
42911 +#if (DPAA_VERSION >= 11)
42912 +t_Error FM_PORT_VSPAlloc(t_Handle h_FmPort, t_FmPortVSPAllocParams *p_VSPParams)
42913 +{
42914 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
42915 +    t_Error err = E_OK;
42916 +    volatile uint32_t *p_BmiStorageProfileId = NULL, *p_BmiVspe = NULL;
42917 +    uint32_t tmpReg = 0, tmp = 0;
42918 +    uint16_t hwStoragePrflId;
42919 +
42920 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
42921 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->h_Fm, E_INVALID_HANDLE);
42922 +    /*for numOfProfiles = 0 don't call this function*/
42923 +    SANITY_CHECK_RETURN_ERROR(p_VSPParams->numOfProfiles, E_INVALID_VALUE);
42924 +    /*dfltRelativeId should be in the range of numOfProfiles*/
42925 +    SANITY_CHECK_RETURN_ERROR(
42926 +            p_VSPParams->dfltRelativeId < p_VSPParams->numOfProfiles,
42927 +            E_INVALID_VALUE);
42928 +    /*p_FmPort should be from Rx type or OP*/
42929 +    SANITY_CHECK_RETURN_ERROR(
42930 +            ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G) || (p_FmPort->portType == e_FM_PORT_TYPE_RX) || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)),
42931 +            E_INVALID_VALUE);
42932 +    /*port should be disabled*/
42933 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->enabled, E_INVALID_STATE);
42934 +    /*if its called for Rx port relevant Tx Port should be passed (initialized) too and it should be disabled*/
42935 +    SANITY_CHECK_RETURN_ERROR(
42936 +            ((p_VSPParams->h_FmTxPort && !((t_FmPort *)(p_VSPParams->h_FmTxPort))->enabled) || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)),
42937 +            E_INVALID_VALUE);
42938 +    /*should be called before SetPCD - this port should be without PCD*/
42939 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->pcdEngines, E_INVALID_STATE);
42940 +
42941 +    /*alloc window of VSPs for this port*/
42942 +    err = FmVSPAllocForPort(p_FmPort->h_Fm, p_FmPort->portType,
42943 +                            p_FmPort->portId, p_VSPParams->numOfProfiles);
42944 +    if (err != E_OK)
42945 +        RETURN_ERROR(MAJOR, err, NO_MSG);
42946 +
42947 +    /*get absolute VSP ID for dfltRelative*/
42948 +    err = FmVSPGetAbsoluteProfileId(p_FmPort->h_Fm, p_FmPort->portType,
42949 +                                    p_FmPort->portId,
42950 +                                    p_VSPParams->dfltRelativeId,
42951 +                                    &hwStoragePrflId);
42952 +    if (err != E_OK)
42953 +        RETURN_ERROR(MAJOR, err, NO_MSG);
42954 +
42955 +    /*fill relevant registers for p_FmPort and relative TxPort in the case p_FmPort from Rx type*/
42956 +    switch (p_FmPort->portType)
42957 +    {
42958 +        case (e_FM_PORT_TYPE_RX_10G):
42959 +        case (e_FM_PORT_TYPE_RX):
42960 +            p_BmiStorageProfileId =
42961 +                    &(((t_FmPort *)(p_VSPParams->h_FmTxPort))->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfqid);
42962 +            p_BmiVspe =
42963 +                    &(((t_FmPort *)(p_VSPParams->h_FmTxPort))->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfne);
42964 +
42965 +            tmpReg = GET_UINT32(*p_BmiStorageProfileId) & ~BMI_SP_ID_MASK;
42966 +            tmpReg |= (uint32_t)hwStoragePrflId << BMI_SP_ID_SHIFT;
42967 +            WRITE_UINT32(*p_BmiStorageProfileId, tmpReg);
42968 +
42969 +            tmpReg = GET_UINT32(*p_BmiVspe);
42970 +            WRITE_UINT32(*p_BmiVspe, tmpReg | BMI_SP_EN);
42971 +
42972 +            p_BmiStorageProfileId =
42973 +                    &p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfqid;
42974 +            p_BmiVspe = &p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rpp;
42975 +            hwStoragePrflId = p_VSPParams->dfltRelativeId;
42976 +            break;
42977 +
42978 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
42979 +            tmpReg = NIA_ENG_BMI | NIA_BMI_AC_FETCH_ALL_FRAME;
42980 +            WRITE_UINT32( p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs.fmqm_pndn,
42981 +                         tmpReg);
42982 +
42983 +            p_BmiStorageProfileId =
42984 +                    &p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofqid;
42985 +            p_BmiVspe = &p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_opp;
42986 +            tmp |= BMI_EBD_EN;
42987 +            break;
42988 +
42989 +        default:
42990 +            RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
42991 +                         ("available for Rx and offline parsing ports only"));
42992 +    }
42993 +
42994 +    p_FmPort->vspe = TRUE;
42995 +    p_FmPort->dfltRelativeId = p_VSPParams->dfltRelativeId;
42996 +
42997 +    tmpReg = GET_UINT32(*p_BmiStorageProfileId) & ~BMI_SP_ID_MASK;
42998 +    tmpReg |= (uint32_t)hwStoragePrflId << BMI_SP_ID_SHIFT;
42999 +    WRITE_UINT32(*p_BmiStorageProfileId, tmpReg);
43000 +
43001 +    tmpReg = GET_UINT32(*p_BmiVspe);
43002 +    WRITE_UINT32(*p_BmiVspe, tmpReg | BMI_SP_EN | tmp);
43003 +    return E_OK;
43004 +}
43005 +#endif /* (DPAA_VERSION >= 11) */
43006 +
43007 +t_Error FM_PORT_PcdPlcrAllocProfiles(t_Handle h_FmPort, uint16_t numOfProfiles)
43008 +{
43009 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43010 +    t_Error err = E_OK;
43011 +
43012 +    p_FmPort->h_FmPcd = FmGetPcdHandle(p_FmPort->h_Fm);
43013 +    ASSERT_COND(p_FmPort->h_FmPcd);
43014 +
43015 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43016 +    {
43017 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43018 +        return ERROR_CODE(E_BUSY);
43019 +    }
43020 +
43021 +    if (numOfProfiles)
43022 +    {
43023 +        err = FmPcdPlcrAllocProfiles(p_FmPort->h_FmPcd,
43024 +                                     p_FmPort->hardwarePortId, numOfProfiles);
43025 +        if (err)
43026 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43027 +    }
43028 +    /* set the port handle within the PCD policer, even if no profiles defined */
43029 +    FmPcdPortRegister(p_FmPort->h_FmPcd, h_FmPort, p_FmPort->hardwarePortId);
43030 +
43031 +    RELEASE_LOCK(p_FmPort->lock);
43032 +
43033 +    return E_OK;
43034 +}
43035 +
43036 +t_Error FM_PORT_PcdPlcrFreeProfiles(t_Handle h_FmPort)
43037 +{
43038 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43039 +    t_Error err = E_OK;
43040 +
43041 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43042 +    {
43043 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43044 +        return ERROR_CODE(E_BUSY);
43045 +    }
43046 +
43047 +    err = FmPcdPlcrFreeProfiles(p_FmPort->h_FmPcd, p_FmPort->hardwarePortId);
43048 +
43049 +    RELEASE_LOCK(p_FmPort->lock);
43050 +
43051 +    if (err)
43052 +        RETURN_ERROR(MAJOR, err, NO_MSG);
43053 +
43054 +    return E_OK;
43055 +}
43056 +
43057 +t_Error FM_PORT_PcdKgModifyInitialScheme(t_Handle h_FmPort,
43058 +                                         t_FmPcdKgSchemeSelect *p_FmPcdKgScheme)
43059 +{
43060 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43061 +    volatile uint32_t *p_BmiHpnia = NULL;
43062 +    uint32_t tmpReg;
43063 +    uint8_t relativeSchemeId;
43064 +    uint8_t physicalSchemeId;
43065 +
43066 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
43067 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43068 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_KG,
43069 +                              E_INVALID_STATE);
43070 +
43071 +    tmpReg = (uint32_t)((p_FmPort->pcdEngines & FM_PCD_CC) ? NIA_KG_CC_EN : 0);
43072 +    switch (p_FmPort->portType)
43073 +    {
43074 +        case (e_FM_PORT_TYPE_RX_10G):
43075 +        case (e_FM_PORT_TYPE_RX):
43076 +            p_BmiHpnia = &p_FmPort->port.bmi_regs->rx.fmbm_rfpne;
43077 +            break;
43078 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
43079 +            p_BmiHpnia = &p_FmPort->port.bmi_regs->oh.fmbm_ofpne;
43080 +            break;
43081 +        default:
43082 +            RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43083 +                         ("available for Rx and offline parsing ports only"));
43084 +    }
43085 +
43086 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43087 +    {
43088 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43089 +        return ERROR_CODE(E_BUSY);
43090 +    }
43091 +
43092 +    /* if we want to change to direct scheme, we need to check that this scheme is valid */
43093 +    if (p_FmPcdKgScheme->direct)
43094 +    {
43095 +        physicalSchemeId = FmPcdKgGetSchemeId(p_FmPcdKgScheme->h_DirectScheme);
43096 +        /* check that this scheme is bound to this port */
43097 +        if (!(p_FmPort->schemesPerPortVector
43098 +                & (uint32_t)(1 << (31 - (uint32_t)physicalSchemeId))))
43099 +        {
43100 +            RELEASE_LOCK(p_FmPort->lock);
43101 +            RETURN_ERROR(
43102 +                    MAJOR, E_INVALID_STATE,
43103 +                    ("called with a scheme that is not bound to this port"));
43104 +        }
43105 +
43106 +        relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPort->h_FmPcd,
43107 +                                                      physicalSchemeId);
43108 +        if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
43109 +        {
43110 +            RELEASE_LOCK(p_FmPort->lock);
43111 +            RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
43112 +                         ("called with invalid Scheme "));
43113 +        }
43114 +
43115 +        if (!FmPcdKgIsSchemeValidSw(p_FmPcdKgScheme->h_DirectScheme))
43116 +        {
43117 +            RELEASE_LOCK(p_FmPort->lock);
43118 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
43119 +                         ("called with uninitialized Scheme "));
43120 +        }
43121 +
43122 +        WRITE_UINT32(
43123 +                *p_BmiHpnia,
43124 +                NIA_ENG_KG | tmpReg | NIA_KG_DIRECT | (uint32_t)physicalSchemeId);
43125 +    }
43126 +    else
43127 +        /* change to indirect scheme */
43128 +        WRITE_UINT32(*p_BmiHpnia, NIA_ENG_KG | tmpReg);
43129 +    RELEASE_LOCK(p_FmPort->lock);
43130 +
43131 +    return E_OK;
43132 +}
43133 +
43134 +t_Error FM_PORT_PcdPlcrModifyInitialProfile(t_Handle h_FmPort,
43135 +                                            t_Handle h_Profile)
43136 +{
43137 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43138 +    volatile uint32_t *p_BmiNia;
43139 +    volatile uint32_t *p_BmiHpnia;
43140 +    uint32_t tmpReg;
43141 +    uint16_t absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
43142 +
43143 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
43144 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43145 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_PLCR,
43146 +                              E_INVALID_STATE);
43147 +
43148 +    /* check relevance of this routine  - only when policer is used
43149 +     directly after BMI or Parser */
43150 +    if ((p_FmPort->pcdEngines & FM_PCD_KG)
43151 +            || (p_FmPort->pcdEngines & FM_PCD_CC))
43152 +        RETURN_ERROR(
43153 +                MAJOR,
43154 +                E_INVALID_STATE,
43155 +                ("relevant only when PCD support mode is e_FM_PCD_SUPPORT_PLCR_ONLY or e_FM_PCD_SUPPORT_PRS_AND_PLCR"));
43156 +
43157 +    switch (p_FmPort->portType)
43158 +    {
43159 +        case (e_FM_PORT_TYPE_RX_10G):
43160 +        case (e_FM_PORT_TYPE_RX):
43161 +            p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
43162 +            p_BmiHpnia = &p_FmPort->port.bmi_regs->rx.fmbm_rfpne;
43163 +            tmpReg = GET_UINT32(*p_BmiNia) & BMI_RFNE_FDCS_MASK;
43164 +            break;
43165 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
43166 +            p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
43167 +            p_BmiHpnia = &p_FmPort->port.bmi_regs->oh.fmbm_ofpne;
43168 +            tmpReg = 0;
43169 +            break;
43170 +        default:
43171 +            RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43172 +                         ("available for Rx and offline parsing ports only"));
43173 +    }
43174 +
43175 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43176 +    {
43177 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43178 +        return ERROR_CODE(E_BUSY);
43179 +    }
43180 +
43181 +    if (!FmPcdPlcrIsProfileValid(p_FmPort->h_FmPcd, absoluteProfileId))
43182 +    {
43183 +        RELEASE_LOCK(p_FmPort->lock);
43184 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("Invalid profile"));
43185 +    }
43186 +
43187 +    tmpReg |= (uint32_t)(NIA_ENG_PLCR | NIA_PLCR_ABSOLUTE | absoluteProfileId);
43188 +
43189 +    if (p_FmPort->pcdEngines & FM_PCD_PRS) /* e_FM_PCD_SUPPORT_PRS_AND_PLCR */
43190 +    {
43191 +        /* update BMI HPNIA */
43192 +        WRITE_UINT32(*p_BmiHpnia, tmpReg);
43193 +    }
43194 +    else /* e_FM_PCD_SUPPORT_PLCR_ONLY */
43195 +    {
43196 +        /* rfne may contain FDCS bits, so first we read them. */
43197 +        tmpReg |= (GET_UINT32(*p_BmiNia) & BMI_RFNE_FDCS_MASK);
43198 +        /* update BMI NIA */
43199 +        WRITE_UINT32(*p_BmiNia, tmpReg);
43200 +    }RELEASE_LOCK(p_FmPort->lock);
43201 +
43202 +    return E_OK;
43203 +}
43204 +
43205 +t_Error FM_PORT_PcdCcModifyTree(t_Handle h_FmPort, t_Handle h_CcTree)
43206 +{
43207 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43208 +    t_Error err = E_OK;
43209 +    volatile uint32_t *p_BmiCcBase = NULL;
43210 +    volatile uint32_t *p_BmiNia = NULL;
43211 +    uint32_t ccTreePhysOffset;
43212 +
43213 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
43214 +    SANITY_CHECK_RETURN_ERROR(h_CcTree, E_INVALID_HANDLE);
43215 +
43216 +    if (p_FmPort->imEn)
43217 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
43218 +                     ("available for non-independent mode ports only"));
43219 +
43220 +    /* get PCD registers pointers */
43221 +    switch (p_FmPort->portType)
43222 +    {
43223 +        case (e_FM_PORT_TYPE_RX_10G):
43224 +        case (e_FM_PORT_TYPE_RX):
43225 +            p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
43226 +            break;
43227 +        case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
43228 +            p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
43229 +            break;
43230 +        default:
43231 +            RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43232 +                         ("available for Rx and offline parsing ports only"));
43233 +    }
43234 +
43235 +    /* check that current NIA is BMI to BMI */
43236 +    if ((GET_UINT32(*p_BmiNia) & ~BMI_RFNE_FDCS_MASK)
43237 +            != GET_NIA_BMI_AC_ENQ_FRAME(p_FmPort->h_FmPcd))
43238 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43239 +                     ("may be called only for ports in BMI-to-BMI state."));
43240 +
43241 +    if (p_FmPort->pcdEngines & FM_PCD_CC)
43242 +    {
43243 +        if (p_FmPort->h_IpReassemblyManip)
43244 +        {
43245 +            err = FmPcdCcTreeAddIPR(p_FmPort->h_FmPcd, h_CcTree, NULL,
43246 +                                    p_FmPort->h_IpReassemblyManip, FALSE);
43247 +            if (err != E_OK)
43248 +            {
43249 +                RETURN_ERROR(MAJOR, err, NO_MSG);
43250 +            }
43251 +        }
43252 +        else
43253 +            if (p_FmPort->h_CapwapReassemblyManip)
43254 +            {
43255 +                err = FmPcdCcTreeAddCPR(p_FmPort->h_FmPcd, h_CcTree, NULL,
43256 +                                        p_FmPort->h_CapwapReassemblyManip,
43257 +                                        FALSE);
43258 +                if (err != E_OK)
43259 +                {
43260 +                    RETURN_ERROR(MAJOR, err, NO_MSG);
43261 +                }
43262 +            }
43263 +        switch (p_FmPort->portType)
43264 +        {
43265 +            case (e_FM_PORT_TYPE_RX_10G):
43266 +            case (e_FM_PORT_TYPE_RX):
43267 +                p_BmiCcBase = &p_FmPort->port.bmi_regs->rx.fmbm_rccb;
43268 +                break;
43269 +            case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
43270 +                p_BmiCcBase = &p_FmPort->port.bmi_regs->oh.fmbm_occb;
43271 +                break;
43272 +            default:
43273 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
43274 +        }
43275 +
43276 +        if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43277 +        {
43278 +            DBG(TRACE, ("FM Port Try Lock - BUSY"));
43279 +            return ERROR_CODE(E_BUSY);
43280 +        }
43281 +        err = FmPcdCcBindTree(p_FmPort->h_FmPcd, NULL, h_CcTree,
43282 +                              &ccTreePhysOffset, h_FmPort);
43283 +        if (err)
43284 +        {
43285 +            RELEASE_LOCK(p_FmPort->lock);
43286 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43287 +        }WRITE_UINT32(*p_BmiCcBase, ccTreePhysOffset);
43288 +
43289 +        p_FmPort->ccTreeId = h_CcTree;
43290 +        RELEASE_LOCK(p_FmPort->lock);
43291 +    }
43292 +    else
43293 +        RETURN_ERROR( MAJOR, E_INVALID_STATE,
43294 +                     ("Coarse Classification not defined for this port."));
43295 +
43296 +    return E_OK;
43297 +}
43298 +
43299 +t_Error FM_PORT_AttachPCD(t_Handle h_FmPort)
43300 +{
43301 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43302 +    t_Error err = E_OK;
43303 +
43304 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
43305 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43306 +
43307 +    if (p_FmPort->imEn)
43308 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
43309 +                     ("available for non-independent mode ports only"));
43310 +
43311 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
43312 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
43313 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
43314 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43315 +                     ("available for Rx and offline parsing ports only"));
43316 +
43317 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43318 +    {
43319 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43320 +        return ERROR_CODE(E_BUSY);
43321 +    }
43322 +
43323 +    if (p_FmPort->h_ReassemblyTree)
43324 +        p_FmPort->pcdEngines |= FM_PCD_CC;
43325 +
43326 +    err = AttachPCD(h_FmPort);
43327 +    RELEASE_LOCK(p_FmPort->lock);
43328 +
43329 +    return err;
43330 +}
43331 +
43332 +t_Error FM_PORT_DetachPCD(t_Handle h_FmPort)
43333 +{
43334 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43335 +    t_Error err = E_OK;
43336 +
43337 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
43338 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43339 +
43340 +    if (p_FmPort->imEn)
43341 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
43342 +                     ("available for non-independent mode ports only"));
43343 +
43344 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
43345 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
43346 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
43347 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43348 +                     ("available for Rx and offline parsing ports only"));
43349 +
43350 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43351 +    {
43352 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43353 +        return ERROR_CODE(E_BUSY);
43354 +    }
43355 +
43356 +    err = DetachPCD(h_FmPort);
43357 +    if (err != E_OK)
43358 +    {
43359 +        RELEASE_LOCK(p_FmPort->lock);
43360 +        RETURN_ERROR(MAJOR, err, NO_MSG);
43361 +    }
43362 +
43363 +    if (p_FmPort->h_ReassemblyTree)
43364 +        p_FmPort->pcdEngines &= ~FM_PCD_CC;
43365 +    RELEASE_LOCK(p_FmPort->lock);
43366 +
43367 +    return E_OK;
43368 +}
43369 +
43370 +t_Error FM_PORT_SetPCD(t_Handle h_FmPort, t_FmPortPcdParams *p_PcdParam)
43371 +{
43372 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43373 +    t_Error err = E_OK;
43374 +    t_FmPortPcdParams modifiedPcdParams, *p_PcdParams;
43375 +    t_FmPcdCcTreeParams *p_FmPcdCcTreeParams;
43376 +    t_FmPortPcdCcParams fmPortPcdCcParams;
43377 +    t_FmPortGetSetCcParams fmPortGetSetCcParams;
43378 +
43379 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
43380 +    SANITY_CHECK_RETURN_ERROR(p_PcdParam, E_NULL_POINTER);
43381 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43382 +
43383 +    if (p_FmPort->imEn)
43384 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
43385 +                     ("available for non-independent mode ports only"));
43386 +
43387 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
43388 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
43389 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
43390 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43391 +                     ("available for Rx and offline parsing ports only"));
43392 +
43393 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43394 +    {
43395 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43396 +        return ERROR_CODE(E_BUSY);
43397 +    }
43398 +
43399 +    p_FmPort->h_FmPcd = FmGetPcdHandle(p_FmPort->h_Fm);
43400 +    ASSERT_COND(p_FmPort->h_FmPcd);
43401 +
43402 +    if (p_PcdParam->p_CcParams && !p_PcdParam->p_CcParams->h_CcTree)
43403 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE,
43404 +                     ("Tree handle must be given if CC is required"));
43405 +
43406 +    memcpy(&modifiedPcdParams, p_PcdParam, sizeof(t_FmPortPcdParams));
43407 +    p_PcdParams = &modifiedPcdParams;
43408 +    if ((p_PcdParams->h_IpReassemblyManip)
43409 +#if (DPAA_VERSION >= 11)
43410 +            || (p_PcdParams->h_CapwapReassemblyManip)
43411 +#endif /* (DPAA_VERSION >= 11) */
43412 +            )
43413 +    {
43414 +        if ((p_PcdParams->pcdSupport != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG)
43415 +                && (p_PcdParams->pcdSupport
43416 +                        != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC)
43417 +                && (p_PcdParams->pcdSupport
43418 +                        != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR)
43419 +                && (p_PcdParams->pcdSupport
43420 +                        != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR))
43421 +        {
43422 +            RELEASE_LOCK(p_FmPort->lock);
43423 +            RETURN_ERROR( MAJOR, E_INVALID_STATE,
43424 +                         ("pcdSupport must have KG for supporting Reassembly"));
43425 +        }
43426 +        p_FmPort->h_IpReassemblyManip = p_PcdParams->h_IpReassemblyManip;
43427 +#if (DPAA_VERSION >= 11)
43428 +        if ((p_PcdParams->h_IpReassemblyManip)
43429 +                && (p_PcdParams->h_CapwapReassemblyManip))
43430 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
43431 +                         ("Either IP-R or CAPWAP-R is allowed"));
43432 +        if ((p_PcdParams->h_CapwapReassemblyManip)
43433 +                && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
43434 +            RETURN_ERROR(MAJOR, E_INVALID_STATE,
43435 +                         ("CAPWAP-R is allowed only on offline-port"));
43436 +        if (p_PcdParams->h_CapwapReassemblyManip)
43437 +            p_FmPort->h_CapwapReassemblyManip =
43438 +                    p_PcdParams->h_CapwapReassemblyManip;
43439 +#endif /* (DPAA_VERSION >= 11) */
43440 +
43441 +        if (!p_PcdParams->p_CcParams)
43442 +        {
43443 +            if (!((p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_PRS_AND_KG)
43444 +                    || (p_PcdParams->pcdSupport
43445 +                            == e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR)))
43446 +            {
43447 +                RELEASE_LOCK(p_FmPort->lock);
43448 +                RETURN_ERROR(
43449 +                        MAJOR,
43450 +                        E_INVALID_STATE,
43451 +                        ("PCD initialization structure is not consistent with pcdSupport"));
43452 +            }
43453 +
43454 +            /* No user-tree, need to build internal tree */
43455 +            p_FmPcdCcTreeParams = (t_FmPcdCcTreeParams*)XX_Malloc(
43456 +                    sizeof(t_FmPcdCcTreeParams));
43457 +            if (!p_FmPcdCcTreeParams)
43458 +                RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_FmPcdCcTreeParams"));
43459 +            memset(p_FmPcdCcTreeParams, 0, sizeof(t_FmPcdCcTreeParams));
43460 +            p_FmPcdCcTreeParams->h_NetEnv = p_PcdParams->h_NetEnv;
43461 +            p_FmPort->h_ReassemblyTree = FM_PCD_CcRootBuild(
43462 +                    p_FmPort->h_FmPcd, p_FmPcdCcTreeParams);
43463 +
43464 +            if (!p_FmPort->h_ReassemblyTree)
43465 +            {
43466 +                RELEASE_LOCK(p_FmPort->lock);
43467 +                XX_Free(p_FmPcdCcTreeParams);
43468 +                RETURN_ERROR( MAJOR, E_INVALID_HANDLE,
43469 +                             ("FM_PCD_CcBuildTree for Reassembly failed"));
43470 +            }
43471 +            if (p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_PRS_AND_KG)
43472 +                p_PcdParams->pcdSupport =
43473 +                        e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC;
43474 +            else
43475 +                p_PcdParams->pcdSupport =
43476 +                        e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR;
43477 +
43478 +            memset(&fmPortPcdCcParams, 0, sizeof(t_FmPortPcdCcParams));
43479 +            fmPortPcdCcParams.h_CcTree = p_FmPort->h_ReassemblyTree;
43480 +            p_PcdParams->p_CcParams = &fmPortPcdCcParams;
43481 +            XX_Free(p_FmPcdCcTreeParams);
43482 +        }
43483 +
43484 +        if (p_FmPort->h_IpReassemblyManip)
43485 +            err = FmPcdCcTreeAddIPR(p_FmPort->h_FmPcd,
43486 +                                    p_PcdParams->p_CcParams->h_CcTree,
43487 +                                    p_PcdParams->h_NetEnv,
43488 +                                    p_FmPort->h_IpReassemblyManip, TRUE);
43489 +#if (DPAA_VERSION >= 11)
43490 +        else
43491 +            if (p_FmPort->h_CapwapReassemblyManip)
43492 +                err = FmPcdCcTreeAddCPR(p_FmPort->h_FmPcd,
43493 +                                        p_PcdParams->p_CcParams->h_CcTree,
43494 +                                        p_PcdParams->h_NetEnv,
43495 +                                        p_FmPort->h_CapwapReassemblyManip,
43496 +                                        TRUE);
43497 +#endif /* (DPAA_VERSION >= 11) */
43498 +
43499 +        if (err != E_OK)
43500 +        {
43501 +            if (p_FmPort->h_ReassemblyTree)
43502 +            {
43503 +                FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43504 +                p_FmPort->h_ReassemblyTree = NULL;
43505 +            }RELEASE_LOCK(p_FmPort->lock);
43506 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43507 +        }
43508 +    }
43509 +
43510 +    if (!FmPcdLockTryLockAll(p_FmPort->h_FmPcd))
43511 +    {
43512 +        if (p_FmPort->h_ReassemblyTree)
43513 +        {
43514 +            FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43515 +            p_FmPort->h_ReassemblyTree = NULL;
43516 +        }RELEASE_LOCK(p_FmPort->lock);
43517 +        DBG(TRACE, ("Try LockAll - BUSY"));
43518 +        return ERROR_CODE(E_BUSY);
43519 +    }
43520 +
43521 +    err = SetPcd(h_FmPort, p_PcdParams);
43522 +    if (err)
43523 +    {
43524 +        if (p_FmPort->h_ReassemblyTree)
43525 +        {
43526 +            FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43527 +            p_FmPort->h_ReassemblyTree = NULL;
43528 +        }
43529 +        FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
43530 +        RELEASE_LOCK(p_FmPort->lock);
43531 +        RETURN_ERROR(MAJOR, err, NO_MSG);
43532 +    }
43533 +
43534 +    if ((p_FmPort->pcdEngines & FM_PCD_PRS)
43535 +            && (p_PcdParams->p_PrsParams->includeInPrsStatistics))
43536 +    {
43537 +        err = FmPcdPrsIncludePortInStatistics(p_FmPort->h_FmPcd,
43538 +                                              p_FmPort->hardwarePortId, TRUE);
43539 +        if (err)
43540 +        {
43541 +            DeletePcd(p_FmPort);
43542 +            if (p_FmPort->h_ReassemblyTree)
43543 +            {
43544 +                FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43545 +                p_FmPort->h_ReassemblyTree = NULL;
43546 +            }
43547 +            FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
43548 +            RELEASE_LOCK(p_FmPort->lock);
43549 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43550 +        }
43551 +        p_FmPort->includeInPrsStatistics = TRUE;
43552 +    }
43553 +
43554 +    FmPcdIncNetEnvOwners(p_FmPort->h_FmPcd, p_FmPort->netEnvId);
43555 +
43556 +    if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd))
43557 +    {
43558 +        memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
43559 +
43560 +        if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
43561 +        {
43562 +#ifdef FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004
43563 +            if ((p_FmPort->fmRevInfo.majorRev < 6) &&
43564 +                    (p_FmPort->pcdEngines & FM_PCD_KG))
43565 +            {
43566 +                int i;
43567 +                for (i = 0; i<p_PcdParams->p_KgParams->numOfSchemes; i++)
43568 +                /* The following function must be locked */
43569 +                FmPcdKgCcGetSetParams(p_FmPort->h_FmPcd,
43570 +                        p_PcdParams->p_KgParams->h_Schemes[i],
43571 +                        UPDATE_KG_NIA_CC_WA,
43572 +                        0);
43573 +            }
43574 +#endif /* FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004 */
43575 +
43576 +#if (DPAA_VERSION >= 11)
43577 +            {
43578 +                t_FmPcdCtrlParamsPage *p_ParamsPage;
43579 +
43580 +                FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
43581 +                                 (void**)&p_ParamsPage);
43582 +                ASSERT_COND(p_ParamsPage);
43583 +                WRITE_UINT32(p_ParamsPage->postBmiFetchNia,
43584 +                             p_FmPort->savedBmiNia);
43585 +            }
43586 +#endif /* (DPAA_VERSION >= 11) */
43587 +
43588 +            /* Set post-bmi-fetch nia */
43589 +            p_FmPort->savedBmiNia &= BMI_RFNE_FDCS_MASK;
43590 +            p_FmPort->savedBmiNia |= (NIA_FM_CTL_AC_POST_BMI_FETCH
43591 +                    | NIA_ENG_FM_CTL);
43592 +
43593 +            /* Set pre-bmi-fetch nia */
43594 +            fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNDN;
43595 +#if (DPAA_VERSION >= 11)
43596 +            fmPortGetSetCcParams.setCcParams.nia =
43597 +                    (NIA_FM_CTL_AC_PRE_BMI_FETCH_FULL_FRAME | NIA_ENG_FM_CTL);
43598 +#else
43599 +            fmPortGetSetCcParams.setCcParams.nia = (NIA_FM_CTL_AC_PRE_BMI_FETCH_HEADER | NIA_ENG_FM_CTL);
43600 +#endif /* (DPAA_VERSION >= 11) */
43601 +            if ((err = FmPortGetSetCcParams(p_FmPort, &fmPortGetSetCcParams))
43602 +                    != E_OK)
43603 +            {
43604 +                DeletePcd(p_FmPort);
43605 +                if (p_FmPort->h_ReassemblyTree)
43606 +                {
43607 +                    FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43608 +                    p_FmPort->h_ReassemblyTree = NULL;
43609 +                }
43610 +                FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
43611 +                RELEASE_LOCK(p_FmPort->lock);
43612 +                RETURN_ERROR(MAJOR, err, NO_MSG);
43613 +            }
43614 +        }
43615 +
43616 +        FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
43617 +
43618 +        /* Set pop-to-next-step nia */
43619 +#if (DPAA_VERSION == 10)
43620 +        if (p_FmPort->fmRevInfo.majorRev < 6)
43621 +        {
43622 +            fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN;
43623 +            fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
43624 +        }
43625 +        else
43626 +        {
43627 +#endif /* (DPAA_VERSION == 10) */
43628 +        fmPortGetSetCcParams.getCcParams.type = GET_NIA_FPNE;
43629 +#if (DPAA_VERSION == 10)
43630 +    }
43631 +#endif /* (DPAA_VERSION == 10) */
43632 +        if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
43633 +                != E_OK)
43634 +        {
43635 +            DeletePcd(p_FmPort);
43636 +            if (p_FmPort->h_ReassemblyTree)
43637 +            {
43638 +                FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43639 +                p_FmPort->h_ReassemblyTree = NULL;
43640 +            }RELEASE_LOCK(p_FmPort->lock);
43641 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43642 +        }
43643 +
43644 +        /* Set post-bmi-prepare-to-enq nia */
43645 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_FENE;
43646 +        fmPortGetSetCcParams.setCcParams.nia = (NIA_FM_CTL_AC_POST_BMI_ENQ
43647 +                | NIA_ENG_FM_CTL);
43648 +        if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
43649 +                != E_OK)
43650 +        {
43651 +            DeletePcd(p_FmPort);
43652 +            if (p_FmPort->h_ReassemblyTree)
43653 +            {
43654 +                FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43655 +                p_FmPort->h_ReassemblyTree = NULL;
43656 +            }RELEASE_LOCK(p_FmPort->lock);
43657 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43658 +        }
43659 +
43660 +        if ((p_FmPort->h_IpReassemblyManip)
43661 +                || (p_FmPort->h_CapwapReassemblyManip))
43662 +        {
43663 +#if (DPAA_VERSION == 10)
43664 +            if (p_FmPort->fmRevInfo.majorRev < 6)
43665 +            {
43666 +                /* Overwrite post-bmi-prepare-to-enq nia */
43667 +                fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_FENE;
43668 +                fmPortGetSetCcParams.setCcParams.nia = (NIA_FM_CTL_AC_POST_BMI_ENQ_ORR | NIA_ENG_FM_CTL | NIA_ORDER_RESTOR);
43669 +                fmPortGetSetCcParams.setCcParams.overwrite = TRUE;
43670 +            }
43671 +            else
43672 +            {
43673 +#endif /* (DPAA_VERSION == 10) */
43674 +            /* Set the ORR bit (for order-restoration) */
43675 +            fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_FPNE;
43676 +            fmPortGetSetCcParams.setCcParams.nia =
43677 +                    fmPortGetSetCcParams.getCcParams.nia | NIA_ORDER_RESTOR;
43678 +#if (DPAA_VERSION == 10)
43679 +        }
43680 +#endif /* (DPAA_VERSION == 10) */
43681 +            if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
43682 +                    != E_OK)
43683 +            {
43684 +                DeletePcd(p_FmPort);
43685 +                if (p_FmPort->h_ReassemblyTree)
43686 +                {
43687 +                    FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43688 +                    p_FmPort->h_ReassemblyTree = NULL;
43689 +                }RELEASE_LOCK(p_FmPort->lock);
43690 +                RETURN_ERROR(MAJOR, err, NO_MSG);
43691 +            }
43692 +        }
43693 +    }
43694 +    else
43695 +        FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
43696 +
43697 +#if (DPAA_VERSION >= 11)
43698 +    {
43699 +        t_FmPcdCtrlParamsPage *p_ParamsPage;
43700 +
43701 +        memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
43702 +
43703 +        fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_CMNE;
43704 +        if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd))
43705 +            fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP
43706 +                    | NIA_ENG_FM_CTL;
43707 +        else
43708 +            fmPortGetSetCcParams.setCcParams.nia =
43709 +                    NIA_FM_CTL_AC_NO_IPACC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
43710 +        if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
43711 +                != E_OK)
43712 +        {
43713 +            DeletePcd(p_FmPort);
43714 +            if (p_FmPort->h_ReassemblyTree)
43715 +            {
43716 +                FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43717 +                p_FmPort->h_ReassemblyTree = NULL;
43718 +            }RELEASE_LOCK(p_FmPort->lock);
43719 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43720 +        }
43721 +
43722 +        FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
43723 +                         (void**)&p_ParamsPage);
43724 +        ASSERT_COND(p_ParamsPage);
43725 +
43726 +        if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd))
43727 +            WRITE_UINT32(
43728 +                    p_ParamsPage->misc,
43729 +                    GET_UINT32(p_ParamsPage->misc) | FM_CTL_PARAMS_PAGE_OFFLOAD_SUPPORT_EN);
43730 +
43731 +        if ((p_FmPort->h_IpReassemblyManip)
43732 +                || (p_FmPort->h_CapwapReassemblyManip))
43733 +        {
43734 +            if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
43735 +                WRITE_UINT32(
43736 +                        p_ParamsPage->discardMask,
43737 +                        GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm));
43738 +            else
43739 +                WRITE_UINT32(
43740 +                        p_ParamsPage->discardMask,
43741 +                        GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm));
43742 +        }
43743 +#ifdef FM_ERROR_VSP_NO_MATCH_SW006
43744 +        if (p_FmPort->vspe)
43745 +            WRITE_UINT32(
43746 +                    p_ParamsPage->misc,
43747 +                    GET_UINT32(p_ParamsPage->misc) | (p_FmPort->dfltRelativeId & FM_CTL_PARAMS_PAGE_ERROR_VSP_MASK));
43748 +#endif /* FM_ERROR_VSP_NO_MATCH_SW006 */
43749 +    }
43750 +#endif /* (DPAA_VERSION >= 11) */
43751 +
43752 +    err = AttachPCD(h_FmPort);
43753 +    if (err)
43754 +    {
43755 +        DeletePcd(p_FmPort);
43756 +        if (p_FmPort->h_ReassemblyTree)
43757 +        {
43758 +            FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43759 +            p_FmPort->h_ReassemblyTree = NULL;
43760 +        }RELEASE_LOCK(p_FmPort->lock);
43761 +        RETURN_ERROR(MAJOR, err, NO_MSG);
43762 +    }
43763 +
43764 +    RELEASE_LOCK(p_FmPort->lock);
43765 +
43766 +    return err;
43767 +}
43768 +
43769 +t_Error FM_PORT_DeletePCD(t_Handle h_FmPort)
43770 +{
43771 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43772 +    t_Error err = E_OK;
43773 +
43774 +    SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
43775 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43776 +
43777 +    if (p_FmPort->imEn)
43778 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
43779 +                     ("available for non-independant mode ports only"));
43780 +
43781 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
43782 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
43783 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
43784 +        RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
43785 +                     ("available for Rx and offline parsing ports only"));
43786 +
43787 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43788 +    {
43789 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43790 +        return ERROR_CODE(E_BUSY);
43791 +    }
43792 +
43793 +    err = DetachPCD(h_FmPort);
43794 +    if (err)
43795 +    {
43796 +        RELEASE_LOCK(p_FmPort->lock);
43797 +        RETURN_ERROR(MAJOR, err, NO_MSG);
43798 +    }
43799 +
43800 +    FmPcdDecNetEnvOwners(p_FmPort->h_FmPcd, p_FmPort->netEnvId);
43801 +
43802 +    /* we do it anyway, instead of checking if included */
43803 +    if ((p_FmPort->pcdEngines & FM_PCD_PRS) && p_FmPort->includeInPrsStatistics)
43804 +    {
43805 +        FmPcdPrsIncludePortInStatistics(p_FmPort->h_FmPcd,
43806 +                                        p_FmPort->hardwarePortId, FALSE);
43807 +        p_FmPort->includeInPrsStatistics = FALSE;
43808 +    }
43809 +
43810 +    if (!FmPcdLockTryLockAll(p_FmPort->h_FmPcd))
43811 +    {
43812 +        RELEASE_LOCK(p_FmPort->lock);
43813 +        DBG(TRACE, ("Try LockAll - BUSY"));
43814 +        return ERROR_CODE(E_BUSY);
43815 +    }
43816 +
43817 +    err = DeletePcd(h_FmPort);
43818 +    FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
43819 +    if (err)
43820 +    {
43821 +        RELEASE_LOCK(p_FmPort->lock);
43822 +        RETURN_ERROR(MAJOR, err, NO_MSG);
43823 +    }
43824 +
43825 +    if (p_FmPort->h_ReassemblyTree)
43826 +    {
43827 +        err = FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
43828 +        if (err)
43829 +        {
43830 +            RELEASE_LOCK(p_FmPort->lock);
43831 +            RETURN_ERROR(MAJOR, err, NO_MSG);
43832 +        }
43833 +        p_FmPort->h_ReassemblyTree = NULL;
43834 +    }RELEASE_LOCK(p_FmPort->lock);
43835 +
43836 +    return err;
43837 +}
43838 +
43839 +t_Error FM_PORT_PcdKgBindSchemes(t_Handle h_FmPort,
43840 +                                 t_FmPcdPortSchemesParams *p_PortScheme)
43841 +{
43842 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43843 +    t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
43844 +    t_Error err = E_OK;
43845 +    uint32_t tmpScmVec = 0;
43846 +    int i;
43847 +
43848 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
43849 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43850 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_KG,
43851 +                              E_INVALID_STATE);
43852 +
43853 +    schemeBind.netEnvId = p_FmPort->netEnvId;
43854 +    schemeBind.hardwarePortId = p_FmPort->hardwarePortId;
43855 +    schemeBind.numOfSchemes = p_PortScheme->numOfSchemes;
43856 +    schemeBind.useClsPlan = p_FmPort->useClsPlan;
43857 +    for (i = 0; i < schemeBind.numOfSchemes; i++)
43858 +    {
43859 +        schemeBind.schemesIds[i] = FmPcdKgGetSchemeId(
43860 +                p_PortScheme->h_Schemes[i]);
43861 +        /* build vector */
43862 +        tmpScmVec |= 1 << (31 - (uint32_t)schemeBind.schemesIds[i]);
43863 +    }
43864 +
43865 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43866 +    {
43867 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43868 +        return ERROR_CODE(E_BUSY);
43869 +    }
43870 +
43871 +    err = FmPcdKgBindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
43872 +    if (err == E_OK)
43873 +        p_FmPort->schemesPerPortVector |= tmpScmVec;
43874 +
43875 +#ifdef FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004
43876 +    if ((FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd)) &&
43877 +            (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
43878 +            (p_FmPort->fmRevInfo.majorRev < 6))
43879 +    {
43880 +        for (i=0; i<p_PortScheme->numOfSchemes; i++)
43881 +        FmPcdKgCcGetSetParams(p_FmPort->h_FmPcd, p_PortScheme->h_Schemes[i], UPDATE_KG_NIA_CC_WA, 0);
43882 +    }
43883 +#endif /* FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004 */
43884 +
43885 +    RELEASE_LOCK(p_FmPort->lock);
43886 +
43887 +    return err;
43888 +}
43889 +
43890 +t_Error FM_PORT_PcdKgUnbindSchemes(t_Handle h_FmPort,
43891 +                                   t_FmPcdPortSchemesParams *p_PortScheme)
43892 +{
43893 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43894 +    t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
43895 +    t_Error err = E_OK;
43896 +    uint32_t tmpScmVec = 0;
43897 +    int i;
43898 +
43899 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
43900 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
43901 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_KG,
43902 +                              E_INVALID_STATE);
43903 +
43904 +    schemeBind.netEnvId = p_FmPort->netEnvId;
43905 +    schemeBind.hardwarePortId = p_FmPort->hardwarePortId;
43906 +    schemeBind.numOfSchemes = p_PortScheme->numOfSchemes;
43907 +    for (i = 0; i < schemeBind.numOfSchemes; i++)
43908 +    {
43909 +        schemeBind.schemesIds[i] = FmPcdKgGetSchemeId(
43910 +                p_PortScheme->h_Schemes[i]);
43911 +        /* build vector */
43912 +        tmpScmVec |= 1 << (31 - (uint32_t)schemeBind.schemesIds[i]);
43913 +    }
43914 +
43915 +    if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
43916 +    {
43917 +        DBG(TRACE, ("FM Port Try Lock - BUSY"));
43918 +        return ERROR_CODE(E_BUSY);
43919 +    }
43920 +
43921 +    err = FmPcdKgUnbindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
43922 +    if (err == E_OK)
43923 +        p_FmPort->schemesPerPortVector &= ~tmpScmVec;
43924 +    RELEASE_LOCK(p_FmPort->lock);
43925 +
43926 +    return err;
43927 +}
43928 +
43929 +t_Error FM_PORT_AddCongestionGrps(t_Handle h_FmPort,
43930 +                                  t_FmPortCongestionGrps *p_CongestionGrps)
43931 +{
43932 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
43933 +    uint8_t priorityTmpArray[FM_PORT_NUM_OF_CONGESTION_GRPS];
43934 +    uint8_t mod, index;
43935 +    uint32_t i, grpsMap[FMAN_PORT_CG_MAP_NUM];
43936 +    int err;
43937 +#if (DPAA_VERSION >= 11)
43938 +    int j;
43939 +#endif /* (DPAA_VERSION >= 11) */
43940 +
43941 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
43942 +
43943 +    /* un-necessary check of the indexes; probably will be needed in the future when there
43944 +     will be more CGs available ....
43945 +     for (i=0; i<p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
43946 +     if (p_CongestionGrps->congestionGrpsToConsider[i] >= FM_PORT_NUM_OF_CONGESTION_GRPS)
43947 +     RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("CG id!"));
43948 +     */
43949 +
43950 +#ifdef FM_NO_OP_OBSERVED_CGS
43951 +    if ((p_FmPort->fmRevInfo.majorRev != 4) &&
43952 +            (p_FmPort->fmRevInfo.majorRev < 6))
43953 +    {
43954 +        if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) &&
43955 +                (p_FmPort->portType != e_FM_PORT_TYPE_RX))
43956 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Available for Rx ports only"));
43957 +    }
43958 +    else
43959 +#endif /* FM_NO_OP_OBSERVED_CGS */
43960 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
43961 +            && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
43962 +            && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
43963 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
43964 +                     ("Available for Rx & OP ports only"));
43965 +
43966 +    /* Prepare groups map array */
43967 +    memset(grpsMap, 0, FMAN_PORT_CG_MAP_NUM * sizeof(uint32_t));
43968 +    for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
43969 +    {
43970 +        index = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] / 32);
43971 +        mod = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] % 32);
43972 +        if (p_FmPort->fmRevInfo.majorRev != 4)
43973 +            grpsMap[7 - index] |= (uint32_t)(1 << mod);
43974 +        else
43975 +            grpsMap[0] |= (uint32_t)(1 << mod);
43976 +    }
43977 +
43978 +    memset(&priorityTmpArray, 0,
43979 +           FM_PORT_NUM_OF_CONGESTION_GRPS * sizeof(uint8_t));
43980 +
43981 +    for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
43982 +    {
43983 +#if (DPAA_VERSION >= 11)
43984 +        for (j = 0; j < FM_MAX_NUM_OF_PFC_PRIORITIES; j++)
43985 +            if (p_CongestionGrps->pfcPrioritiesEn[i][j])
43986 +                priorityTmpArray[p_CongestionGrps->congestionGrpsToConsider[i]] |=
43987 +                        (0x01 << (FM_MAX_NUM_OF_PFC_PRIORITIES - j - 1));
43988 +#endif /* (DPAA_VERSION >= 11) */
43989 +    }
43990 +
43991 +#if (DPAA_VERSION >= 11)
43992 +    for (i = 0; i < FM_PORT_NUM_OF_CONGESTION_GRPS; i++)
43993 +    {
43994 +        err = FmSetCongestionGroupPFCpriority(p_FmPort->h_Fm, i,
43995 +                                              priorityTmpArray[i]);
43996 +        if (err)
43997 +            return err;
43998 +    }
43999 +#endif /* (DPAA_VERSION >= 11) */
44000 +
44001 +    err = fman_port_add_congestion_grps(&p_FmPort->port, grpsMap);
44002 +    if (err != 0)
44003 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_add_congestion_grps"));
44004 +
44005 +    return E_OK;
44006 +}
44007 +
44008 +t_Error FM_PORT_RemoveCongestionGrps(t_Handle h_FmPort,
44009 +                                     t_FmPortCongestionGrps *p_CongestionGrps)
44010 +{
44011 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
44012 +    uint8_t mod, index;
44013 +    uint32_t i, grpsMap[FMAN_PORT_CG_MAP_NUM];
44014 +    int err;
44015 +
44016 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
44017 +
44018 +    {
44019 +#ifdef FM_NO_OP_OBSERVED_CGS
44020 +        t_FmRevisionInfo revInfo;
44021 +
44022 +        FM_GetRevision(p_FmPort->h_Fm, &revInfo);
44023 +        if (revInfo.majorRev != 4)
44024 +        {
44025 +            if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) &&
44026 +                    (p_FmPort->portType != e_FM_PORT_TYPE_RX))
44027 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Available for Rx ports only"));
44028 +        }
44029 +        else
44030 +#endif /* FM_NO_OP_OBSERVED_CGS */
44031 +        if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
44032 +                && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
44033 +                && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
44034 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
44035 +                         ("Available for Rx & OP ports only"));
44036 +    }
44037 +
44038 +    /* Prepare groups map array */
44039 +    memset(grpsMap, 0, FMAN_PORT_CG_MAP_NUM * sizeof(uint32_t));
44040 +    for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
44041 +    {
44042 +        index = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] / 32);
44043 +        mod = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] % 32);
44044 +        if (p_FmPort->fmRevInfo.majorRev != 4)
44045 +            grpsMap[7 - index] |= (uint32_t)(1 << mod);
44046 +        else
44047 +            grpsMap[0] |= (uint32_t)(1 << mod);
44048 +    }
44049 +
44050 +#if (DPAA_VERSION >= 11)
44051 +    for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
44052 +    {
44053 +        t_Error err = FmSetCongestionGroupPFCpriority(
44054 +                p_FmPort->h_Fm, p_CongestionGrps->congestionGrpsToConsider[i],
44055 +                0);
44056 +        if (err)
44057 +            return err;
44058 +    }
44059 +#endif /* (DPAA_VERSION >= 11) */
44060 +
44061 +    err = fman_port_remove_congestion_grps(&p_FmPort->port, grpsMap);
44062 +    if (err != 0)
44063 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
44064 +                     ("fman_port_remove_congestion_grps"));
44065 +    return E_OK;
44066 +}
44067 +
44068 +#if (DPAA_VERSION >= 11)
44069 +t_Error FM_PORT_GetIPv4OptionsCount(t_Handle h_FmPort,
44070 +                                    uint32_t *p_Ipv4OptionsCount)
44071 +{
44072 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
44073 +
44074 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
44075 +    SANITY_CHECK_RETURN_ERROR(
44076 +            (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING),
44077 +            E_INVALID_VALUE);
44078 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_ParamsPage, E_INVALID_STATE);
44079 +    SANITY_CHECK_RETURN_ERROR(p_Ipv4OptionsCount, E_NULL_POINTER);
44080 +
44081 +    *p_Ipv4OptionsCount = GET_UINT32(p_FmPort->p_ParamsPage->ipfOptionsCounter);
44082 +
44083 +    return E_OK;
44084 +}
44085 +#endif /* (DPAA_VERSION >= 11) */
44086 +
44087 +t_Error FM_PORT_ConfigDsarSupport(t_Handle h_FmPortRx,
44088 +                                  t_FmPortDsarTablesSizes *params)
44089 +{
44090 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
44091 +    p_FmPort->deepSleepVars.autoResMaxSizes = XX_Malloc(
44092 +            sizeof(struct t_FmPortDsarTablesSizes));
44093 +    memcpy(p_FmPort->deepSleepVars.autoResMaxSizes, params,
44094 +           sizeof(struct t_FmPortDsarTablesSizes));
44095 +    return E_OK;
44096 +}
44097 +
44098 +static t_Error FmPortConfigAutoResForDeepSleepSupport1(t_FmPort *p_FmPort)
44099 +{
44100 +    uint32_t *param_page;
44101 +    t_FmPortDsarTablesSizes *params = p_FmPort->deepSleepVars.autoResMaxSizes;
44102 +    t_ArCommonDesc *ArCommonDescPtr;
44103 +    uint32_t size = sizeof(t_ArCommonDesc);
44104 +    // ARP
44105 +    // should put here if (params->max_num_of_arp_entries)?
44106 +    size = ROUND_UP(size,4);
44107 +    size += sizeof(t_DsarArpDescriptor);
44108 +    size += sizeof(t_DsarArpBindingEntry) * params->maxNumOfArpEntries;
44109 +    size += sizeof(t_DsarArpStatistics);
44110 +    //ICMPV4
44111 +    size = ROUND_UP(size,4);
44112 +    size += sizeof(t_DsarIcmpV4Descriptor);
44113 +    size += sizeof(t_DsarIcmpV4BindingEntry) * params->maxNumOfEchoIpv4Entries;
44114 +    size += sizeof(t_DsarIcmpV4Statistics);
44115 +    //ICMPV6
44116 +    size = ROUND_UP(size,4);
44117 +    size += sizeof(t_DsarIcmpV6Descriptor);
44118 +    size += sizeof(t_DsarIcmpV6BindingEntry) * params->maxNumOfEchoIpv6Entries;
44119 +    size += sizeof(t_DsarIcmpV6Statistics);
44120 +    //ND
44121 +    size = ROUND_UP(size,4);
44122 +    size += sizeof(t_DsarNdDescriptor);
44123 +    size += sizeof(t_DsarIcmpV6BindingEntry) * params->maxNumOfNdpEntries;
44124 +    size += sizeof(t_DsarIcmpV6Statistics);
44125 +    //SNMP
44126 +    size = ROUND_UP(size,4);
44127 +    size += sizeof(t_DsarSnmpDescriptor);
44128 +    size += sizeof(t_DsarSnmpIpv4AddrTblEntry)
44129 +            * params->maxNumOfSnmpIPV4Entries;
44130 +    size += sizeof(t_DsarSnmpIpv6AddrTblEntry)
44131 +            * params->maxNumOfSnmpIPV6Entries;
44132 +    size += sizeof(t_OidsTblEntry) * params->maxNumOfSnmpOidEntries;
44133 +    size += params->maxNumOfSnmpOidChar;
44134 +    size += sizeof(t_DsarIcmpV6Statistics);
44135 +    //filters
44136 +    size = ROUND_UP(size,4);
44137 +    size += params->maxNumOfIpProtFiltering;
44138 +    size = ROUND_UP(size,4);
44139 +    size += params->maxNumOfUdpPortFiltering * sizeof(t_PortTblEntry);
44140 +    size = ROUND_UP(size,4);
44141 +    size += params->maxNumOfTcpPortFiltering * sizeof(t_PortTblEntry);
44142 +
44143 +    // add here for more protocols
44144 +
44145 +    // statistics
44146 +    size = ROUND_UP(size,4);
44147 +    size += sizeof(t_ArStatistics);
44148 +
44149 +    ArCommonDescPtr = FM_MURAM_AllocMem(p_FmPort->h_FmMuram, size, 0x10);
44150 +
44151 +    param_page =
44152 +            XX_PhysToVirt(
44153 +                    p_FmPort->fmMuramPhysBaseAddr
44154 +                            + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr));
44155 +    WRITE_UINT32(
44156 +            *param_page,
44157 +            (uint32_t)(XX_VirtToPhys(ArCommonDescPtr) - p_FmPort->fmMuramPhysBaseAddr));
44158 +    return E_OK;
44159 +}
44160 +
44161 +t_FmPortDsarTablesSizes* FM_PORT_GetDsarTablesMaxSizes(t_Handle h_FmPortRx)
44162 +{
44163 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
44164 +    return p_FmPort->deepSleepVars.autoResMaxSizes;
44165 +}
44166 +
44167 +struct arOffsets
44168 +{
44169 +    uint32_t arp;
44170 +    uint32_t nd;
44171 +    uint32_t icmpv4;
44172 +    uint32_t icmpv6;
44173 +    uint32_t snmp;
44174 +    uint32_t stats;
44175 +    uint32_t filtIp;
44176 +    uint32_t filtUdp;
44177 +    uint32_t filtTcp;
44178 +};
44179 +
44180 +static uint32_t AR_ComputeOffsets(struct arOffsets* of,
44181 +                                  struct t_FmPortDsarParams *params,
44182 +                                  t_FmPort *p_FmPort)
44183 +{
44184 +    uint32_t size = sizeof(t_ArCommonDesc);
44185 +    // ARP
44186 +    if (params->p_AutoResArpInfo)
44187 +    {
44188 +        size = ROUND_UP(size,4);
44189 +        of->arp = size;
44190 +        size += sizeof(t_DsarArpDescriptor);
44191 +        size += sizeof(t_DsarArpBindingEntry)
44192 +                * params->p_AutoResArpInfo->tableSize;
44193 +        size += sizeof(t_DsarArpStatistics);
44194 +    }
44195 +    // ICMPV4
44196 +    if (params->p_AutoResEchoIpv4Info)
44197 +    {
44198 +        size = ROUND_UP(size,4);
44199 +        of->icmpv4 = size;
44200 +        size += sizeof(t_DsarIcmpV4Descriptor);
44201 +        size += sizeof(t_DsarIcmpV4BindingEntry)
44202 +                * params->p_AutoResEchoIpv4Info->tableSize;
44203 +        size += sizeof(t_DsarIcmpV4Statistics);
44204 +    }
44205 +    // ICMPV6
44206 +    if (params->p_AutoResEchoIpv6Info)
44207 +    {
44208 +        size = ROUND_UP(size,4);
44209 +        of->icmpv6 = size;
44210 +        size += sizeof(t_DsarIcmpV6Descriptor);
44211 +        size += sizeof(t_DsarIcmpV6BindingEntry)
44212 +                * params->p_AutoResEchoIpv6Info->tableSize;
44213 +        size += sizeof(t_DsarIcmpV6Statistics);
44214 +    }
44215 +    // ND
44216 +    if (params->p_AutoResNdpInfo)
44217 +    {
44218 +        size = ROUND_UP(size,4);
44219 +        of->nd = size;
44220 +        size += sizeof(t_DsarNdDescriptor);
44221 +        size += sizeof(t_DsarIcmpV6BindingEntry)
44222 +                * (params->p_AutoResNdpInfo->tableSizeAssigned
44223 +                        + params->p_AutoResNdpInfo->tableSizeTmp);
44224 +        size += sizeof(t_DsarIcmpV6Statistics);
44225 +    }
44226 +    // SNMP
44227 +    if (params->p_AutoResSnmpInfo)
44228 +    {
44229 +        size = ROUND_UP(size,4);
44230 +        of->snmp = size;
44231 +        size += sizeof(t_DsarSnmpDescriptor);
44232 +        size += sizeof(t_DsarSnmpIpv4AddrTblEntry)
44233 +                * params->p_AutoResSnmpInfo->numOfIpv4Addresses;
44234 +        size += sizeof(t_DsarSnmpIpv6AddrTblEntry)
44235 +                * params->p_AutoResSnmpInfo->numOfIpv6Addresses;
44236 +        size += sizeof(t_OidsTblEntry) * params->p_AutoResSnmpInfo->oidsTblSize;
44237 +        size += p_FmPort->deepSleepVars.autoResMaxSizes->maxNumOfSnmpOidChar;
44238 +        size += sizeof(t_DsarIcmpV6Statistics);
44239 +    }
44240 +    //filters
44241 +    size = ROUND_UP(size,4);
44242 +    if (params->p_AutoResFilteringInfo)
44243 +    {
44244 +        of->filtIp = size;
44245 +        size += params->p_AutoResFilteringInfo->ipProtTableSize;
44246 +        size = ROUND_UP(size,4);
44247 +        of->filtUdp = size;
44248 +        size += params->p_AutoResFilteringInfo->udpPortsTableSize
44249 +                * sizeof(t_PortTblEntry);
44250 +        size = ROUND_UP(size,4);
44251 +        of->filtTcp = size;
44252 +        size += params->p_AutoResFilteringInfo->tcpPortsTableSize
44253 +                * sizeof(t_PortTblEntry);
44254 +    }
44255 +    // add here for more protocols
44256 +    // statistics
44257 +    size = ROUND_UP(size,4);
44258 +    of->stats = size;
44259 +    size += sizeof(t_ArStatistics);
44260 +    return size;
44261 +}
44262 +
44263 +uint32_t* ARDesc;
44264 +void PrsEnable(t_Handle p_FmPcd);
44265 +void PrsDisable(t_Handle p_FmPcd);
44266 +int PrsIsEnabled(t_Handle p_FmPcd);
44267 +t_Handle FM_PCD_GetHcPort(t_Handle h_FmPcd);
44268 +
44269 +static t_Error DsarCheckParams(t_FmPortDsarParams *params,
44270 +                               t_FmPortDsarTablesSizes *sizes)
44271 +{
44272 +    bool macInit = FALSE;
44273 +    uint8_t mac[6];
44274 +    int i = 0;
44275 +
44276 +    // check table sizes
44277 +    if (params->p_AutoResArpInfo
44278 +            && sizes->maxNumOfArpEntries < params->p_AutoResArpInfo->tableSize)
44279 +        RETURN_ERROR(
44280 +                MAJOR, E_INVALID_VALUE,
44281 +                ("DSAR: Arp table size exceeds the configured maximum size."));
44282 +    if (params->p_AutoResEchoIpv4Info
44283 +            && sizes->maxNumOfEchoIpv4Entries
44284 +                    < params->p_AutoResEchoIpv4Info->tableSize)
44285 +        RETURN_ERROR(
44286 +                MAJOR,
44287 +                E_INVALID_VALUE,
44288 +                ("DSAR: EchoIpv4 table size exceeds the configured maximum size."));
44289 +    if (params->p_AutoResNdpInfo
44290 +            && sizes->maxNumOfNdpEntries
44291 +                    < params->p_AutoResNdpInfo->tableSizeAssigned
44292 +                            + params->p_AutoResNdpInfo->tableSizeTmp)
44293 +        RETURN_ERROR(
44294 +                MAJOR, E_INVALID_VALUE,
44295 +                ("DSAR: NDP table size exceeds the configured maximum size."));
44296 +    if (params->p_AutoResEchoIpv6Info
44297 +            && sizes->maxNumOfEchoIpv6Entries
44298 +                    < params->p_AutoResEchoIpv6Info->tableSize)
44299 +        RETURN_ERROR(
44300 +                MAJOR,
44301 +                E_INVALID_VALUE,
44302 +                ("DSAR: EchoIpv6 table size exceeds the configured maximum size."));
44303 +    if (params->p_AutoResSnmpInfo
44304 +            && sizes->maxNumOfSnmpOidEntries
44305 +                    < params->p_AutoResSnmpInfo->oidsTblSize)
44306 +        RETURN_ERROR(
44307 +                MAJOR,
44308 +                E_INVALID_VALUE,
44309 +                ("DSAR: Snmp Oid table size exceeds the configured maximum size."));
44310 +    if (params->p_AutoResSnmpInfo
44311 +            && sizes->maxNumOfSnmpIPV4Entries
44312 +                    < params->p_AutoResSnmpInfo->numOfIpv4Addresses)
44313 +        RETURN_ERROR(
44314 +                MAJOR,
44315 +                E_INVALID_VALUE,
44316 +                ("DSAR: Snmp ipv4 table size exceeds the configured maximum size."));
44317 +    if (params->p_AutoResSnmpInfo
44318 +            && sizes->maxNumOfSnmpIPV6Entries
44319 +                    < params->p_AutoResSnmpInfo->numOfIpv6Addresses)
44320 +        RETURN_ERROR(
44321 +                MAJOR,
44322 +                E_INVALID_VALUE,
44323 +                ("DSAR: Snmp ipv6 table size exceeds the configured maximum size."));
44324 +    if (params->p_AutoResFilteringInfo)
44325 +    {
44326 +        if (sizes->maxNumOfIpProtFiltering
44327 +                < params->p_AutoResFilteringInfo->ipProtTableSize)
44328 +            RETURN_ERROR(
44329 +                    MAJOR,
44330 +                    E_INVALID_VALUE,
44331 +                    ("DSAR: ip filter table size exceeds the configured maximum size."));
44332 +        if (sizes->maxNumOfTcpPortFiltering
44333 +                < params->p_AutoResFilteringInfo->udpPortsTableSize)
44334 +            RETURN_ERROR(
44335 +                    MAJOR,
44336 +                    E_INVALID_VALUE,
44337 +                    ("DSAR: udp filter table size exceeds the configured maximum size."));
44338 +        if (sizes->maxNumOfUdpPortFiltering
44339 +                < params->p_AutoResFilteringInfo->tcpPortsTableSize)
44340 +            RETURN_ERROR(
44341 +                    MAJOR,
44342 +                    E_INVALID_VALUE,
44343 +                    ("DSAR: tcp filter table size exceeds the configured maximum size."));
44344 +    }
44345 +    /* check only 1 MAC address is configured (this is what ucode currently supports) */
44346 +    if (params->p_AutoResArpInfo && params->p_AutoResArpInfo->tableSize)
44347 +    {
44348 +        memcpy(mac, params->p_AutoResArpInfo->p_AutoResTable[0].mac, 6);
44349 +        i = 1;
44350 +        macInit = TRUE;
44351 +
44352 +        for (; i < params->p_AutoResArpInfo->tableSize; i++)
44353 +            if (memcmp(mac, params->p_AutoResArpInfo->p_AutoResTable[i].mac, 6))
44354 +                RETURN_ERROR(
44355 +                        MAJOR, E_INVALID_VALUE,
44356 +                        ("DSAR: Only 1 mac address is currently supported."));
44357 +    }
44358 +    if (params->p_AutoResEchoIpv4Info
44359 +            && params->p_AutoResEchoIpv4Info->tableSize)
44360 +    {
44361 +        i = 0;
44362 +        if (!macInit)
44363 +        {
44364 +            memcpy(mac, params->p_AutoResEchoIpv4Info->p_AutoResTable[0].mac,
44365 +                   6);
44366 +            i = 1;
44367 +            macInit = TRUE;
44368 +        }
44369 +        for (; i < params->p_AutoResEchoIpv4Info->tableSize; i++)
44370 +            if (memcmp(mac,
44371 +                       params->p_AutoResEchoIpv4Info->p_AutoResTable[i].mac, 6))
44372 +                RETURN_ERROR(
44373 +                        MAJOR, E_INVALID_VALUE,
44374 +                        ("DSAR: Only 1 mac address is currently supported."));
44375 +    }
44376 +    if (params->p_AutoResEchoIpv6Info
44377 +            && params->p_AutoResEchoIpv6Info->tableSize)
44378 +    {
44379 +        i = 0;
44380 +        if (!macInit)
44381 +        {
44382 +            memcpy(mac, params->p_AutoResEchoIpv6Info->p_AutoResTable[0].mac,
44383 +                   6);
44384 +            i = 1;
44385 +            macInit = TRUE;
44386 +        }
44387 +        for (; i < params->p_AutoResEchoIpv6Info->tableSize; i++)
44388 +            if (memcmp(mac,
44389 +                       params->p_AutoResEchoIpv6Info->p_AutoResTable[i].mac, 6))
44390 +                RETURN_ERROR(
44391 +                        MAJOR, E_INVALID_VALUE,
44392 +                        ("DSAR: Only 1 mac address is currently supported."));
44393 +    }
44394 +    if (params->p_AutoResNdpInfo && params->p_AutoResNdpInfo->tableSizeAssigned)
44395 +    {
44396 +        i = 0;
44397 +        if (!macInit)
44398 +        {
44399 +            memcpy(mac, params->p_AutoResNdpInfo->p_AutoResTableAssigned[0].mac,
44400 +                   6);
44401 +            i = 1;
44402 +            macInit = TRUE;
44403 +        }
44404 +        for (; i < params->p_AutoResNdpInfo->tableSizeAssigned; i++)
44405 +            if (memcmp(mac,
44406 +                       params->p_AutoResNdpInfo->p_AutoResTableAssigned[i].mac,
44407 +                       6))
44408 +                RETURN_ERROR(
44409 +                        MAJOR, E_INVALID_VALUE,
44410 +                        ("DSAR: Only 1 mac address is currently supported."));
44411 +    }
44412 +    if (params->p_AutoResNdpInfo && params->p_AutoResNdpInfo->tableSizeTmp)
44413 +    {
44414 +        i = 0;
44415 +        if (!macInit)
44416 +        {
44417 +            memcpy(mac, params->p_AutoResNdpInfo->p_AutoResTableTmp[0].mac, 6);
44418 +            i = 1;
44419 +        }
44420 +        for (; i < params->p_AutoResNdpInfo->tableSizeTmp; i++)
44421 +            if (memcmp(mac, params->p_AutoResNdpInfo->p_AutoResTableTmp[i].mac,
44422 +                       6))
44423 +                RETURN_ERROR(
44424 +                        MAJOR, E_INVALID_VALUE,
44425 +                        ("DSAR: Only 1 mac address is currently supported."));
44426 +    }
44427 +    return E_OK;
44428 +}
44429 +
44430 +static int GetBERLen(uint8_t* buf)
44431 +{
44432 +    if (*buf & 0x80)
44433 +    {
44434 +        if ((*buf & 0x7F) == 1)
44435 +            return buf[1];
44436 +        else
44437 +            return *(uint16_t*)&buf[1]; // assuming max len is 2
44438 +    }
44439 +    else
44440 +        return buf[0];
44441 +}
44442 +#define TOTAL_BER_LEN(len) (len < 128) ? len + 2 : len + 3
44443 +
44444 +#define SCFG_FMCLKDPSLPCR_ADDR 0xFFE0FC00C
44445 +#define SCFG_FMCLKDPSLPCR_DS_VAL 0x08402000
44446 +#define SCFG_FMCLKDPSLPCR_NORMAL_VAL 0x00402000
44447 +static int fm_soc_suspend(void)
44448 +{
44449 +       uint32_t *fmclk, tmp32;
44450 +       fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
44451 +       tmp32 = GET_UINT32(*fmclk);
44452 +       WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_DS_VAL);
44453 +       tmp32 = GET_UINT32(*fmclk);
44454 +       iounmap(fmclk);
44455 +       return 0;
44456 +}
44457 +
44458 +void fm_clk_down(void)
44459 +{
44460 +       uint32_t *fmclk, tmp32;
44461 +       fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
44462 +       tmp32 = GET_UINT32(*fmclk);
44463 +       WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_DS_VAL | 0x40000000);
44464 +       tmp32 = GET_UINT32(*fmclk);
44465 +       iounmap(fmclk);
44466 +}
44467 +
44468 +t_Error FM_PORT_EnterDsar(t_Handle h_FmPortRx, t_FmPortDsarParams *params)
44469 +{
44470 +    int i, j;
44471 +    t_Error err;
44472 +    uint32_t nia;
44473 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
44474 +    t_FmPort *p_FmPortTx = (t_FmPort *)params->h_FmPortTx;
44475 +    t_DsarArpDescriptor *ArpDescriptor;
44476 +    t_DsarIcmpV4Descriptor* ICMPV4Descriptor;
44477 +    t_DsarIcmpV6Descriptor* ICMPV6Descriptor;
44478 +    t_DsarNdDescriptor* NDDescriptor;
44479 +
44480 +    uint64_t fmMuramVirtBaseAddr = (uint64_t)PTR_TO_UINT(XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr));
44481 +    uint32_t *param_page = XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr));
44482 +    t_ArCommonDesc *ArCommonDescPtr = (t_ArCommonDesc*)(XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(*param_page)));
44483 +    struct arOffsets* of;
44484 +    uint8_t tmp = 0;
44485 +    t_FmGetSetParams fmGetSetParams;
44486 +    memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44487 +    fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
44488 +    fmGetSetParams.setParams.sleep = 1;
44489 +
44490 +    err = DsarCheckParams(params, p_FmPort->deepSleepVars.autoResMaxSizes);
44491 +    if (err != E_OK)
44492 +        return err;
44493 +
44494 +    p_FmPort->deepSleepVars.autoResOffsets = XX_Malloc(sizeof(struct arOffsets));
44495 +    of = (struct arOffsets *)p_FmPort->deepSleepVars.autoResOffsets;
44496 +    IOMemSet32(ArCommonDescPtr, 0, AR_ComputeOffsets(of, params, p_FmPort));
44497 +
44498 +    // common
44499 +    WRITE_UINT8(ArCommonDescPtr->arTxPort, p_FmPortTx->hardwarePortId);
44500 +    nia = GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne); // bmi nia
44501 +    if ((nia & 0x007C0000) == 0x00440000) // bmi nia is parser
44502 +        WRITE_UINT32(ArCommonDescPtr->activeHPNIA, GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne));
44503 +    else
44504 +        WRITE_UINT32(ArCommonDescPtr->activeHPNIA, nia);
44505 +    WRITE_UINT16(ArCommonDescPtr->snmpPort, 161);
44506 +
44507 +    // ARP
44508 +    if (params->p_AutoResArpInfo)
44509 +    {
44510 +        t_DsarArpBindingEntry* arp_bindings;
44511 +        ArpDescriptor = (t_DsarArpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->arp);
44512 +        WRITE_UINT32(ArCommonDescPtr->p_ArpDescriptor, PTR_TO_UINT(ArpDescriptor) - fmMuramVirtBaseAddr);
44513 +        arp_bindings = (t_DsarArpBindingEntry*)(PTR_TO_UINT(ArpDescriptor) + sizeof(t_DsarArpDescriptor));
44514 +       if (params->p_AutoResArpInfo->enableConflictDetection)
44515 +               WRITE_UINT16(ArpDescriptor->control, 1);
44516 +       else
44517 +        WRITE_UINT16(ArpDescriptor->control, 0);
44518 +        if (params->p_AutoResArpInfo->tableSize)
44519 +        {
44520 +            t_FmPortDsarArpEntry* arp_entry = params->p_AutoResArpInfo->p_AutoResTable;
44521 +            WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&arp_entry[0].mac[0]);
44522 +            WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&arp_entry[0].mac[2]);
44523 +            WRITE_UINT16(ArpDescriptor->numOfBindings, params->p_AutoResArpInfo->tableSize);
44524 +
44525 +            for (i = 0; i < params->p_AutoResArpInfo->tableSize; i++)
44526 +            {
44527 +                WRITE_UINT32(arp_bindings[i].ipv4Addr, arp_entry[i].ipAddress);
44528 +                if (arp_entry[i].isVlan)
44529 +                    WRITE_UINT16(arp_bindings[i].vlanId, arp_entry[i].vid & 0xFFF);
44530 +            }
44531 +            WRITE_UINT32(ArpDescriptor->p_Bindings, PTR_TO_UINT(arp_bindings) - fmMuramVirtBaseAddr);
44532 +        }
44533 +        WRITE_UINT32(ArpDescriptor->p_Statistics, PTR_TO_UINT(arp_bindings) +
44534 +            sizeof(t_DsarArpBindingEntry) * params->p_AutoResArpInfo->tableSize - fmMuramVirtBaseAddr);
44535 +    }
44536 +
44537 +    // ICMPV4
44538 +    if (params->p_AutoResEchoIpv4Info)
44539 +    {
44540 +        t_DsarIcmpV4BindingEntry* icmpv4_bindings;
44541 +        ICMPV4Descriptor = (t_DsarIcmpV4Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv4);
44542 +        WRITE_UINT32(ArCommonDescPtr->p_IcmpV4Descriptor, PTR_TO_UINT(ICMPV4Descriptor) - fmMuramVirtBaseAddr);
44543 +        icmpv4_bindings = (t_DsarIcmpV4BindingEntry*)(PTR_TO_UINT(ICMPV4Descriptor) + sizeof(t_DsarIcmpV4Descriptor));
44544 +        WRITE_UINT16(ICMPV4Descriptor->control, 0);
44545 +        if (params->p_AutoResEchoIpv4Info->tableSize)
44546 +        {
44547 +            t_FmPortDsarArpEntry* arp_entry = params->p_AutoResEchoIpv4Info->p_AutoResTable;
44548 +            WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&arp_entry[0].mac[0]);
44549 +            WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&arp_entry[0].mac[2]);
44550 +            WRITE_UINT16(ICMPV4Descriptor->numOfBindings, params->p_AutoResEchoIpv4Info->tableSize);
44551 +
44552 +            for (i = 0; i < params->p_AutoResEchoIpv4Info->tableSize; i++)
44553 +            {
44554 +                WRITE_UINT32(icmpv4_bindings[i].ipv4Addr, arp_entry[i].ipAddress);
44555 +                if (arp_entry[i].isVlan)
44556 +                    WRITE_UINT16(icmpv4_bindings[i].vlanId, arp_entry[i].vid & 0xFFF);
44557 +            }
44558 +            WRITE_UINT32(ICMPV4Descriptor->p_Bindings, PTR_TO_UINT(icmpv4_bindings) - fmMuramVirtBaseAddr);
44559 +        }
44560 +        WRITE_UINT32(ICMPV4Descriptor->p_Statistics, PTR_TO_UINT(icmpv4_bindings) +
44561 +            sizeof(t_DsarIcmpV4BindingEntry) * params->p_AutoResEchoIpv4Info->tableSize - fmMuramVirtBaseAddr);
44562 +    }
44563 +
44564 +    // ICMPV6
44565 +    if (params->p_AutoResEchoIpv6Info)
44566 +    {
44567 +        t_DsarIcmpV6BindingEntry* icmpv6_bindings;
44568 +        ICMPV6Descriptor = (t_DsarIcmpV6Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv6);
44569 +        WRITE_UINT32(ArCommonDescPtr->p_IcmpV6Descriptor, PTR_TO_UINT(ICMPV6Descriptor) - fmMuramVirtBaseAddr);
44570 +        icmpv6_bindings = (t_DsarIcmpV6BindingEntry*)(PTR_TO_UINT(ICMPV6Descriptor) + sizeof(t_DsarIcmpV6Descriptor));
44571 +        WRITE_UINT16(ICMPV6Descriptor->control, 0);
44572 +        if (params->p_AutoResEchoIpv6Info->tableSize)
44573 +        {
44574 +            t_FmPortDsarNdpEntry* ndp_entry = params->p_AutoResEchoIpv6Info->p_AutoResTable;
44575 +            WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&ndp_entry[0].mac[0]);
44576 +            WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&ndp_entry[0].mac[2]);
44577 +            WRITE_UINT16(ICMPV6Descriptor->numOfBindings, params->p_AutoResEchoIpv6Info->tableSize);
44578 +
44579 +            for (i = 0; i < params->p_AutoResEchoIpv6Info->tableSize; i++)
44580 +            {
44581 +                for (j = 0; j < 4; j++)
44582 +                    WRITE_UINT32(icmpv6_bindings[i].ipv6Addr[j], ndp_entry[i].ipAddress[j]);
44583 +                if (ndp_entry[i].isVlan)
44584 +                    WRITE_UINT16(*(uint16_t*)&icmpv6_bindings[i].ipv6Addr[4], ndp_entry[i].vid & 0xFFF); // writing vlan
44585 +            }
44586 +            WRITE_UINT32(ICMPV6Descriptor->p_Bindings, PTR_TO_UINT(icmpv6_bindings) - fmMuramVirtBaseAddr);
44587 +        }
44588 +        WRITE_UINT32(ICMPV6Descriptor->p_Statistics, PTR_TO_UINT(icmpv6_bindings) +
44589 +            sizeof(t_DsarIcmpV6BindingEntry) * params->p_AutoResEchoIpv6Info->tableSize - fmMuramVirtBaseAddr);
44590 +    }
44591 +
44592 +    // ND
44593 +    if (params->p_AutoResNdpInfo)
44594 +    {
44595 +        t_DsarIcmpV6BindingEntry* icmpv6_bindings;
44596 +        NDDescriptor = (t_DsarNdDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->nd);
44597 +        WRITE_UINT32(ArCommonDescPtr->p_NdDescriptor, PTR_TO_UINT(NDDescriptor) - fmMuramVirtBaseAddr);
44598 +        icmpv6_bindings = (t_DsarIcmpV6BindingEntry*)(PTR_TO_UINT(NDDescriptor) + sizeof(t_DsarNdDescriptor));
44599 +       if (params->p_AutoResNdpInfo->enableConflictDetection)
44600 +               WRITE_UINT16(NDDescriptor->control, 1);
44601 +       else
44602 +        WRITE_UINT16(NDDescriptor->control, 0);
44603 +        if (params->p_AutoResNdpInfo->tableSizeAssigned + params->p_AutoResNdpInfo->tableSizeTmp)
44604 +        {
44605 +            t_FmPortDsarNdpEntry* ndp_entry = params->p_AutoResNdpInfo->p_AutoResTableAssigned;
44606 +            WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&ndp_entry[0].mac[0]);
44607 +            WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&ndp_entry[0].mac[2]);
44608 +            WRITE_UINT16(NDDescriptor->numOfBindings, params->p_AutoResNdpInfo->tableSizeAssigned
44609 +                + params->p_AutoResNdpInfo->tableSizeTmp);
44610 +
44611 +            for (i = 0; i < params->p_AutoResNdpInfo->tableSizeAssigned; i++)
44612 +            {
44613 +                for (j = 0; j < 4; j++)
44614 +                    WRITE_UINT32(icmpv6_bindings[i].ipv6Addr[j], ndp_entry[i].ipAddress[j]);
44615 +                if (ndp_entry[i].isVlan)
44616 +                    WRITE_UINT16(*(uint16_t*)&icmpv6_bindings[i].ipv6Addr[4], ndp_entry[i].vid & 0xFFF); // writing vlan
44617 +            }
44618 +            ndp_entry = params->p_AutoResNdpInfo->p_AutoResTableTmp;
44619 +            for (i = 0; i < params->p_AutoResNdpInfo->tableSizeTmp; i++)
44620 +            {
44621 +                for (j = 0; j < 4; j++)
44622 +                    WRITE_UINT32(icmpv6_bindings[i + params->p_AutoResNdpInfo->tableSizeAssigned].ipv6Addr[j], ndp_entry[i].ipAddress[j]);
44623 +                if (ndp_entry[i].isVlan)
44624 +                    WRITE_UINT16(*(uint16_t*)&icmpv6_bindings[i + params->p_AutoResNdpInfo->tableSizeAssigned].ipv6Addr[4], ndp_entry[i].vid & 0xFFF); // writing vlan
44625 +            }
44626 +            WRITE_UINT32(NDDescriptor->p_Bindings, PTR_TO_UINT(icmpv6_bindings) - fmMuramVirtBaseAddr);
44627 +        }
44628 +        WRITE_UINT32(NDDescriptor->p_Statistics, PTR_TO_UINT(icmpv6_bindings) + sizeof(t_DsarIcmpV6BindingEntry)
44629 +            * (params->p_AutoResNdpInfo->tableSizeAssigned + params->p_AutoResNdpInfo->tableSizeTmp)
44630 +            - fmMuramVirtBaseAddr);
44631 +        WRITE_UINT32(NDDescriptor->solicitedAddr, 0xFFFFFFFF);
44632 +    }
44633 +
44634 +    // SNMP
44635 +    if (params->p_AutoResSnmpInfo)
44636 +    {
44637 +        t_FmPortDsarSnmpInfo *snmpSrc = params->p_AutoResSnmpInfo;
44638 +        t_DsarSnmpIpv4AddrTblEntry* snmpIpv4Addr;
44639 +        t_DsarSnmpIpv6AddrTblEntry* snmpIpv6Addr;
44640 +        t_OidsTblEntry* snmpOid;
44641 +        uint8_t *charPointer;
44642 +        int len;
44643 +        t_DsarSnmpDescriptor* SnmpDescriptor = (t_DsarSnmpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->snmp);
44644 +        WRITE_UINT32(ArCommonDescPtr->p_SnmpDescriptor, PTR_TO_UINT(SnmpDescriptor) - fmMuramVirtBaseAddr);
44645 +        WRITE_UINT16(SnmpDescriptor->control, snmpSrc->control);
44646 +        WRITE_UINT16(SnmpDescriptor->maxSnmpMsgLength, snmpSrc->maxSnmpMsgLength);
44647 +        snmpIpv4Addr = (t_DsarSnmpIpv4AddrTblEntry*)(PTR_TO_UINT(SnmpDescriptor) + sizeof(t_DsarSnmpDescriptor));
44648 +        if (snmpSrc->numOfIpv4Addresses)
44649 +        {
44650 +            t_FmPortDsarSnmpIpv4AddrTblEntry* snmpIpv4AddrSrc = snmpSrc->p_Ipv4AddrTbl;
44651 +            WRITE_UINT16(SnmpDescriptor->numOfIpv4Addresses, snmpSrc->numOfIpv4Addresses);
44652 +            for (i = 0; i < snmpSrc->numOfIpv4Addresses; i++)
44653 +            {
44654 +                WRITE_UINT32(snmpIpv4Addr[i].ipv4Addr, snmpIpv4AddrSrc[i].ipv4Addr);
44655 +                if (snmpIpv4AddrSrc[i].isVlan)
44656 +                    WRITE_UINT16(snmpIpv4Addr[i].vlanId, snmpIpv4AddrSrc[i].vid & 0xFFF);
44657 +            }
44658 +            WRITE_UINT32(SnmpDescriptor->p_Ipv4AddrTbl, PTR_TO_UINT(snmpIpv4Addr) - fmMuramVirtBaseAddr);
44659 +        }
44660 +        snmpIpv6Addr = (t_DsarSnmpIpv6AddrTblEntry*)(PTR_TO_UINT(snmpIpv4Addr)
44661 +                + sizeof(t_DsarSnmpIpv4AddrTblEntry) * snmpSrc->numOfIpv4Addresses);
44662 +        if (snmpSrc->numOfIpv6Addresses)
44663 +        {
44664 +            t_FmPortDsarSnmpIpv6AddrTblEntry* snmpIpv6AddrSrc = snmpSrc->p_Ipv6AddrTbl;
44665 +            WRITE_UINT16(SnmpDescriptor->numOfIpv6Addresses, snmpSrc->numOfIpv6Addresses);
44666 +            for (i = 0; i < snmpSrc->numOfIpv6Addresses; i++)
44667 +            {
44668 +                for (j = 0; j < 4; j++)
44669 +                    WRITE_UINT32(snmpIpv6Addr[i].ipv6Addr[j], snmpIpv6AddrSrc[i].ipv6Addr[j]);
44670 +                if (snmpIpv6AddrSrc[i].isVlan)
44671 +                    WRITE_UINT16(snmpIpv6Addr[i].vlanId, snmpIpv6AddrSrc[i].vid & 0xFFF);
44672 +            }
44673 +            WRITE_UINT32(SnmpDescriptor->p_Ipv6AddrTbl, PTR_TO_UINT(snmpIpv6Addr) - fmMuramVirtBaseAddr);
44674 +        }
44675 +        snmpOid = (t_OidsTblEntry*)(PTR_TO_UINT(snmpIpv6Addr)
44676 +                + sizeof(t_DsarSnmpIpv6AddrTblEntry) * snmpSrc->numOfIpv6Addresses);
44677 +        charPointer = (uint8_t*)(PTR_TO_UINT(snmpOid)
44678 +                + sizeof(t_OidsTblEntry) * snmpSrc->oidsTblSize);
44679 +        len = TOTAL_BER_LEN(GetBERLen(&snmpSrc->p_RdOnlyCommunityStr[1]));
44680 +        Mem2IOCpy32(charPointer, snmpSrc->p_RdOnlyCommunityStr, len);
44681 +        WRITE_UINT32(SnmpDescriptor->p_RdOnlyCommunityStr, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
44682 +        charPointer += len;
44683 +        len = TOTAL_BER_LEN(GetBERLen(&snmpSrc->p_RdWrCommunityStr[1]));
44684 +        Mem2IOCpy32(charPointer, snmpSrc->p_RdWrCommunityStr, len);
44685 +        WRITE_UINT32(SnmpDescriptor->p_RdWrCommunityStr, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
44686 +        charPointer += len;
44687 +        WRITE_UINT32(SnmpDescriptor->oidsTblSize, snmpSrc->oidsTblSize);
44688 +        WRITE_UINT32(SnmpDescriptor->p_OidsTbl, PTR_TO_UINT(snmpOid) - fmMuramVirtBaseAddr);
44689 +        for (i = 0; i < snmpSrc->oidsTblSize; i++)
44690 +        {
44691 +            WRITE_UINT16(snmpOid->oidSize, snmpSrc->p_OidsTbl[i].oidSize);
44692 +            WRITE_UINT16(snmpOid->resSize, snmpSrc->p_OidsTbl[i].resSize);
44693 +            Mem2IOCpy32(charPointer, snmpSrc->p_OidsTbl[i].oidVal, snmpSrc->p_OidsTbl[i].oidSize);
44694 +            WRITE_UINT32(snmpOid->p_Oid, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
44695 +            charPointer += snmpSrc->p_OidsTbl[i].oidSize;
44696 +            if (snmpSrc->p_OidsTbl[i].resSize <= 4)
44697 +                WRITE_UINT32(snmpOid->resValOrPtr, *snmpSrc->p_OidsTbl[i].resVal);
44698 +            else
44699 +            {
44700 +                Mem2IOCpy32(charPointer, snmpSrc->p_OidsTbl[i].resVal, snmpSrc->p_OidsTbl[i].resSize);
44701 +                WRITE_UINT32(snmpOid->resValOrPtr, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
44702 +                charPointer += snmpSrc->p_OidsTbl[i].resSize;
44703 +            }
44704 +            snmpOid++;
44705 +        }
44706 +        charPointer = UINT_TO_PTR(ROUND_UP(PTR_TO_UINT(charPointer),4));
44707 +        WRITE_UINT32(SnmpDescriptor->p_Statistics, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
44708 +    }
44709 +
44710 +    // filtering
44711 +    if (params->p_AutoResFilteringInfo)
44712 +    {
44713 +        if (params->p_AutoResFilteringInfo->ipProtPassOnHit)
44714 +            tmp |= IP_PROT_TBL_PASS_MASK;
44715 +        if (params->p_AutoResFilteringInfo->udpPortPassOnHit)
44716 +            tmp |= UDP_PORT_TBL_PASS_MASK;
44717 +        if (params->p_AutoResFilteringInfo->tcpPortPassOnHit)
44718 +            tmp |= TCP_PORT_TBL_PASS_MASK;
44719 +        WRITE_UINT8(ArCommonDescPtr->filterControl, tmp);
44720 +        WRITE_UINT16(ArCommonDescPtr->tcpControlPass, params->p_AutoResFilteringInfo->tcpFlagsMask);
44721 +
44722 +        // ip filtering
44723 +        if (params->p_AutoResFilteringInfo->ipProtTableSize)
44724 +        {
44725 +            uint8_t* ip_tbl = (uint8_t*)(PTR_TO_UINT(ArCommonDescPtr) + of->filtIp);
44726 +            WRITE_UINT8(ArCommonDescPtr->ipProtocolTblSize, params->p_AutoResFilteringInfo->ipProtTableSize);
44727 +            for (i = 0; i < params->p_AutoResFilteringInfo->ipProtTableSize; i++)
44728 +                WRITE_UINT8(ip_tbl[i], params->p_AutoResFilteringInfo->p_IpProtTablePtr[i]);
44729 +            WRITE_UINT32(ArCommonDescPtr->p_IpProtocolFiltTbl, PTR_TO_UINT(ip_tbl) - fmMuramVirtBaseAddr);
44730 +        }
44731 +
44732 +        // udp filtering
44733 +        if (params->p_AutoResFilteringInfo->udpPortsTableSize)
44734 +        {
44735 +            t_PortTblEntry* udp_tbl = (t_PortTblEntry*)(PTR_TO_UINT(ArCommonDescPtr) + of->filtUdp);
44736 +            WRITE_UINT8(ArCommonDescPtr->udpPortTblSize, params->p_AutoResFilteringInfo->udpPortsTableSize);
44737 +            for (i = 0; i < params->p_AutoResFilteringInfo->udpPortsTableSize; i++)
44738 +            {
44739 +                WRITE_UINT32(udp_tbl[i].Ports,
44740 +                    (params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].srcPort << 16) +
44741 +                    params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].dstPort);
44742 +                WRITE_UINT32(udp_tbl[i].PortsMask,
44743 +                    (params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].srcPortMask << 16) +
44744 +                    params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].dstPortMask);
44745 +            }
44746 +            WRITE_UINT32(ArCommonDescPtr->p_UdpPortFiltTbl, PTR_TO_UINT(udp_tbl) - fmMuramVirtBaseAddr);
44747 +        }
44748 +
44749 +        // tcp filtering
44750 +        if (params->p_AutoResFilteringInfo->tcpPortsTableSize)
44751 +        {
44752 +            t_PortTblEntry* tcp_tbl = (t_PortTblEntry*)(PTR_TO_UINT(ArCommonDescPtr) + of->filtTcp);
44753 +            WRITE_UINT8(ArCommonDescPtr->tcpPortTblSize, params->p_AutoResFilteringInfo->tcpPortsTableSize);
44754 +            for (i = 0; i < params->p_AutoResFilteringInfo->tcpPortsTableSize; i++)
44755 +            {
44756 +                WRITE_UINT32(tcp_tbl[i].Ports,
44757 +                    (params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].srcPort << 16) +
44758 +                    params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].dstPort);
44759 +                WRITE_UINT32(tcp_tbl[i].PortsMask,
44760 +                    (params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].srcPortMask << 16) +
44761 +                    params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].dstPortMask);
44762 +            }
44763 +            WRITE_UINT32(ArCommonDescPtr->p_TcpPortFiltTbl, PTR_TO_UINT(tcp_tbl) - fmMuramVirtBaseAddr);
44764 +        }
44765 +    }
44766 +    // common stats
44767 +    WRITE_UINT32(ArCommonDescPtr->p_ArStats, PTR_TO_UINT(ArCommonDescPtr) + of->stats - fmMuramVirtBaseAddr);
44768 +
44769 +    // get into Deep Sleep sequence:
44770 +
44771 +       // Ensures that FMan do not enter the idle state. This is done by programing
44772 +       // FMDPSLPCR[FM_STOP] to one.
44773 +       fm_soc_suspend();
44774 +
44775 +    ARDesc = UINT_TO_PTR(XX_VirtToPhys(ArCommonDescPtr));
44776 +    return E_OK;
44777 +
44778 +}
44779 +
44780 +void FM_ChangeClock(t_Handle h_Fm, int hardwarePortId);
44781 +t_Error FM_PORT_EnterDsarFinal(t_Handle h_DsarRxPort, t_Handle h_DsarTxPort)
44782 +{
44783 +       t_FmGetSetParams fmGetSetParams;
44784 +       t_FmPort *p_FmPort = (t_FmPort *)h_DsarRxPort;
44785 +       t_FmPort *p_FmPortTx = (t_FmPort *)h_DsarTxPort;
44786 +       t_Handle *h_FmPcd = FmGetPcd(p_FmPort->h_Fm);
44787 +       t_FmPort *p_FmPortHc = FM_PCD_GetHcPort(h_FmPcd);
44788 +       memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44789 +        fmGetSetParams.setParams.type = UPDATE_FM_CLD;
44790 +        FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44791 +
44792 +       /* Issue graceful stop to HC port */
44793 +       FM_PORT_Disable(p_FmPortHc);
44794 +
44795 +       // config tx port
44796 +    p_FmPort->deepSleepVars.fmbm_tcfg = GET_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg);
44797 +    WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg, GET_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg) | BMI_PORT_CFG_IM | BMI_PORT_CFG_EN);
44798 +    // ????
44799 +    p_FmPort->deepSleepVars.fmbm_tcmne = GET_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcmne);
44800 +    WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcmne, 0xE);
44801 +    // Stage 7:echo
44802 +    p_FmPort->deepSleepVars.fmbm_rfpne = GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne);
44803 +    WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne, 0x2E);
44804 +    if (!PrsIsEnabled(h_FmPcd))
44805 +    {
44806 +        p_FmPort->deepSleepVars.dsarEnabledParser = TRUE;
44807 +        PrsEnable(h_FmPcd);
44808 +    }
44809 +    else
44810 +        p_FmPort->deepSleepVars.dsarEnabledParser = FALSE;
44811 +
44812 +    p_FmPort->deepSleepVars.fmbm_rfne = GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne);
44813 +    WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne, 0x440000);
44814 +
44815 +    // save rcfg for restoring: accumulate mode is changed by ucode
44816 +    p_FmPort->deepSleepVars.fmbm_rcfg = GET_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rcfg);
44817 +    WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rcfg, p_FmPort->deepSleepVars.fmbm_rcfg | BMI_PORT_CFG_AM);
44818 +        memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44819 +        fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
44820 +        fmGetSetParams.setParams.sleep = 1;
44821 +        FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44822 +
44823 +// ***** issue external request sync command
44824 +        memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44825 +        fmGetSetParams.setParams.type = UPDATE_FPM_EXTC;
44826 +        FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44827 +       // get
44828 +       memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44829 +       fmGetSetParams.getParams.type = GET_FMFP_EXTC;
44830 +       FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44831 +       if (fmGetSetParams.getParams.fmfp_extc != 0)
44832 +       {
44833 +               // clear
44834 +               memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44835 +               fmGetSetParams.setParams.type = UPDATE_FPM_EXTC_CLEAR;
44836 +               FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44837 +}
44838 +
44839 +       memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44840 +       fmGetSetParams.getParams.type = GET_FMFP_EXTC | GET_FM_NPI;
44841 +       do
44842 +       {
44843 +               FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44844 +       } while (fmGetSetParams.getParams.fmfp_extc != 0 && fmGetSetParams.getParams.fm_npi == 0);
44845 +       if (fmGetSetParams.getParams.fm_npi != 0)
44846 +               XX_Print("FM: Sync did not finish\n");
44847 +
44848 +        // check that all stoped
44849 +       memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44850 +        fmGetSetParams.getParams.type = GET_FMQM_GS | GET_FM_NPI;
44851 +        FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44852 +       while (fmGetSetParams.getParams.fmqm_gs & 0xF0000000)
44853 +               FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44854 +       if (fmGetSetParams.getParams.fmqm_gs == 0 && fmGetSetParams.getParams.fm_npi == 0)
44855 +               XX_Print("FM: Sleeping\n");
44856 +//     FM_ChangeClock(p_FmPort->h_Fm, p_FmPort->hardwarePortId);
44857 +
44858 +    return E_OK;
44859 +}
44860 +
44861 +EXPORT_SYMBOL(FM_PORT_EnterDsarFinal);
44862 +
44863 +void FM_PORT_Dsar_DumpRegs()
44864 +{
44865 +    uint32_t* hh = XX_PhysToVirt(PTR_TO_UINT(ARDesc));
44866 +    DUMP_MEMORY(hh, 0x220);
44867 +}
44868 +
44869 +void FM_PORT_ExitDsar(t_Handle h_FmPortRx, t_Handle h_FmPortTx)
44870 +{
44871 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
44872 +    t_FmPort *p_FmPortTx = (t_FmPort *)h_FmPortTx;
44873 +    t_Handle *h_FmPcd = FmGetPcd(p_FmPort->h_Fm);
44874 +    t_FmPort *p_FmPortHc = FM_PCD_GetHcPort(h_FmPcd);
44875 +    t_FmGetSetParams fmGetSetParams;
44876 +    memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
44877 +    fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
44878 +    fmGetSetParams.setParams.sleep = 0;
44879 +    if (p_FmPort->deepSleepVars.autoResOffsets)
44880 +    {
44881 +        XX_Free(p_FmPort->deepSleepVars.autoResOffsets);
44882 +        p_FmPort->deepSleepVars.autoResOffsets = 0;
44883 +    }
44884 +
44885 +    if (p_FmPort->deepSleepVars.dsarEnabledParser)
44886 +        PrsDisable(FmGetPcd(p_FmPort->h_Fm));
44887 +    WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne, p_FmPort->deepSleepVars.fmbm_rfpne);
44888 +    WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne, p_FmPort->deepSleepVars.fmbm_rfne);
44889 +    WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rcfg, p_FmPort->deepSleepVars.fmbm_rcfg);
44890 +    FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
44891 +    WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcmne, p_FmPort->deepSleepVars.fmbm_tcmne);
44892 +    WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg, p_FmPort->deepSleepVars.fmbm_tcfg);
44893 +    FM_PORT_Enable(p_FmPortHc);
44894 +}
44895 +
44896 +bool FM_PORT_IsInDsar(t_Handle h_FmPort)
44897 +{
44898 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPort;
44899 +    return PTR_TO_UINT(p_FmPort->deepSleepVars.autoResOffsets);
44900 +}
44901 +
44902 +t_Error FM_PORT_GetDsarStats(t_Handle h_FmPortRx, t_FmPortDsarStats *stats)
44903 +{
44904 +    t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
44905 +    struct arOffsets *of = (struct arOffsets*)p_FmPort->deepSleepVars.autoResOffsets;
44906 +    uint8_t* fmMuramVirtBaseAddr = XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr);
44907 +    uint32_t *param_page = XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr));
44908 +    t_ArCommonDesc *ArCommonDescPtr = (t_ArCommonDesc*)(XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(*param_page)));
44909 +    t_DsarArpDescriptor *ArpDescriptor = (t_DsarArpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->arp);
44910 +    t_DsarArpStatistics* arp_stats = (t_DsarArpStatistics*)(PTR_TO_UINT(ArpDescriptor->p_Statistics) + fmMuramVirtBaseAddr);
44911 +    t_DsarIcmpV4Descriptor* ICMPV4Descriptor = (t_DsarIcmpV4Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv4);
44912 +    t_DsarIcmpV4Statistics* icmpv4_stats = (t_DsarIcmpV4Statistics*)(PTR_TO_UINT(ICMPV4Descriptor->p_Statistics) + fmMuramVirtBaseAddr);
44913 +    t_DsarNdDescriptor* NDDescriptor = (t_DsarNdDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->nd);
44914 +    t_NdStatistics* nd_stats = (t_NdStatistics*)(PTR_TO_UINT(NDDescriptor->p_Statistics) + fmMuramVirtBaseAddr);
44915 +    t_DsarIcmpV6Descriptor* ICMPV6Descriptor = (t_DsarIcmpV6Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv6);
44916 +    t_DsarIcmpV6Statistics* icmpv6_stats = (t_DsarIcmpV6Statistics*)(PTR_TO_UINT(ICMPV6Descriptor->p_Statistics) + fmMuramVirtBaseAddr);
44917 +    t_DsarSnmpDescriptor* SnmpDescriptor = (t_DsarSnmpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->snmp);
44918 +    t_DsarSnmpStatistics* snmp_stats = (t_DsarSnmpStatistics*)(PTR_TO_UINT(SnmpDescriptor->p_Statistics) + fmMuramVirtBaseAddr);
44919 +    stats->arpArCnt = arp_stats->arCnt;
44920 +    stats->echoIcmpv4ArCnt = icmpv4_stats->arCnt;
44921 +    stats->ndpArCnt = nd_stats->arCnt;
44922 +    stats->echoIcmpv6ArCnt = icmpv6_stats->arCnt;
44923 +    stats->snmpGetCnt = snmp_stats->snmpGetReqCnt;
44924 +    stats->snmpGetNextCnt = snmp_stats->snmpGetNextReqCnt;
44925 +    return E_OK;
44926 +}
44927 --- /dev/null
44928 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.h
44929 @@ -0,0 +1,999 @@
44930 +/*
44931 + * Copyright 2008-2012 Freescale Semiconductor Inc.
44932 + *
44933 + * Redistribution and use in source and binary forms, with or without
44934 + * modification, are permitted provided that the following conditions are met:
44935 + *     * Redistributions of source code must retain the above copyright
44936 + *       notice, this list of conditions and the following disclaimer.
44937 + *     * Redistributions in binary form must reproduce the above copyright
44938 + *       notice, this list of conditions and the following disclaimer in the
44939 + *       documentation and/or other materials provided with the distribution.
44940 + *     * Neither the name of Freescale Semiconductor nor the
44941 + *       names of its contributors may be used to endorse or promote products
44942 + *       derived from this software without specific prior written permission.
44943 + *
44944 + *
44945 + * ALTERNATIVELY, this software may be distributed under the terms of the
44946 + * GNU General Public License ("GPL") as published by the Free Software
44947 + * Foundation, either version 2 of that License or (at your option) any
44948 + * later version.
44949 + *
44950 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
44951 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
44952 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44953 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
44954 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
44955 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
44956 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
44957 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44958 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
44959 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44960 + */
44961 +
44962 +
44963 +/******************************************************************************
44964 + @File          fm_port.h
44965 +
44966 + @Description   FM Port internal structures and definitions.
44967 +*//***************************************************************************/
44968 +#ifndef __FM_PORT_H
44969 +#define __FM_PORT_H
44970 +
44971 +#include "error_ext.h"
44972 +#include "std_ext.h"
44973 +#include "fm_port_ext.h"
44974 +
44975 +#include "fm_common.h"
44976 +#include "fm_sp_common.h"
44977 +#include "fsl_fman_sp.h"
44978 +#include "fm_port_ext.h"
44979 +#include "fsl_fman_port.h"
44980 +
44981 +#define __ERR_MODULE__  MODULE_FM_PORT
44982 +
44983 +
44984 +#define MIN_EXT_BUF_SIZE                                64
44985 +#define DATA_ALIGNMENT                                  64
44986 +#define MAX_LIODN_OFFSET                                64
44987 +#define MAX_PORT_FIFO_SIZE                              MIN(BMI_MAX_FIFO_SIZE, 1024*BMI_FIFO_UNITS)
44988 +
44989 +/**************************************************************************//**
44990 + @Description       Memory Map defines
44991 +*//***************************************************************************/
44992 +#define BMI_PORT_REGS_OFFSET                            0
44993 +#define QMI_PORT_REGS_OFFSET                            0x400
44994 +#define PRS_PORT_REGS_OFFSET                            0x800
44995 +
44996 +/**************************************************************************//**
44997 + @Description       defaults
44998 +*//***************************************************************************/
44999 +#define DEFAULT_PORT_deqHighPriority_1G                 FALSE
45000 +#define DEFAULT_PORT_deqHighPriority_10G                TRUE
45001 +#define DEFAULT_PORT_deqType                            e_FM_PORT_DEQ_TYPE1
45002 +#define DEFAULT_PORT_deqPrefetchOption                  e_FM_PORT_DEQ_FULL_PREFETCH
45003 +#define DEFAULT_PORT_deqPrefetchOption_HC               e_FM_PORT_DEQ_NO_PREFETCH
45004 +#define DEFAULT_PORT_deqByteCnt_10G                     0x1400
45005 +#define DEFAULT_PORT_deqByteCnt_1G                      0x400
45006 +#define DEFAULT_PORT_bufferPrefixContent_privDataSize   DEFAULT_FM_SP_bufferPrefixContent_privDataSize
45007 +#define DEFAULT_PORT_bufferPrefixContent_passPrsResult  DEFAULT_FM_SP_bufferPrefixContent_passPrsResult
45008 +#define DEFAULT_PORT_bufferPrefixContent_passTimeStamp  DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp
45009 +#define DEFAULT_PORT_bufferPrefixContent_allOtherPCDInfo DEFAULT_FM_SP_bufferPrefixContent_allOtherPCDInfo
45010 +#define DEFAULT_PORT_bufferPrefixContent_dataAlign      DEFAULT_FM_SP_bufferPrefixContent_dataAlign
45011 +#define DEFAULT_PORT_cheksumLastBytesIgnore             0
45012 +#define DEFAULT_PORT_cutBytesFromEnd                    4
45013 +#define DEFAULT_PORT_fifoDeqPipelineDepth_IM            2
45014 +
45015 +#define DEFAULT_PORT_frmDiscardOverride                 FALSE
45016 +
45017 +#define DEFAULT_PORT_dmaSwapData                        (e_FmDmaSwapOption)DEFAULT_FMAN_SP_DMA_SWAP_DATA
45018 +#define DEFAULT_PORT_dmaIntContextCacheAttr             (e_FmDmaCacheOption)DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR
45019 +#define DEFAULT_PORT_dmaHeaderCacheAttr                 (e_FmDmaCacheOption)DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR
45020 +#define DEFAULT_PORT_dmaScatterGatherCacheAttr          (e_FmDmaCacheOption)DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR
45021 +#define DEFAULT_PORT_dmaWriteOptimize                   DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE
45022 +
45023 +#define DEFAULT_PORT_noScatherGather                    DEFAULT_FMAN_SP_NO_SCATTER_GATHER
45024 +#define DEFAULT_PORT_forwardIntContextReuse             FALSE
45025 +#define DEFAULT_PORT_BufMargins_startMargins            32
45026 +#define DEFAULT_PORT_BufMargins_endMargins              0
45027 +#define DEFAULT_PORT_syncReq                            TRUE
45028 +#define DEFAULT_PORT_syncReqForHc                       FALSE
45029 +#define DEFAULT_PORT_color                              e_FM_PORT_COLOR_GREEN
45030 +#define DEFAULT_PORT_errorsToDiscard                    FM_PORT_FRM_ERR_CLS_DISCARD
45031 +/* #define DEFAULT_PORT_dualRateLimitScaleDown             e_FM_PORT_DUAL_RATE_LIMITER_NONE */
45032 +/* #define DEFAULT_PORT_rateLimitBurstSizeHighGranularity  FALSE */
45033 +#define DEFAULT_PORT_exception                          IM_EV_BSY
45034 +#define DEFAULT_PORT_maxFrameLength                     9600
45035 +
45036 +#define DEFAULT_notSupported                            0xff
45037 +
45038 +#if (DPAA_VERSION < 11)
45039 +#define DEFAULT_PORT_rxFifoPriElevationLevel            MAX_PORT_FIFO_SIZE
45040 +#define DEFAULT_PORT_rxFifoThreshold                    (MAX_PORT_FIFO_SIZE*3/4)
45041 +
45042 +#define DEFAULT_PORT_txFifoMinFillLevel                 0
45043 +#define DEFAULT_PORT_txFifoLowComfLevel                 (5*KILOBYTE)
45044 +#define DEFAULT_PORT_fifoDeqPipelineDepth_1G            1
45045 +#define DEFAULT_PORT_fifoDeqPipelineDepth_10G           4
45046 +
45047 +#define DEFAULT_PORT_fifoDeqPipelineDepth_OH            2
45048 +
45049 +/* Host command port MUST NOT be changed to more than 1 !!! */
45050 +#define DEFAULT_PORT_numOfTasks(type)                       \
45051 +    (uint32_t)((((type) == e_FM_PORT_TYPE_RX_10G) ||        \
45052 +                ((type) == e_FM_PORT_TYPE_TX_10G)) ? 16 :   \
45053 +               ((((type) == e_FM_PORT_TYPE_RX) ||           \
45054 +                 ((type) == e_FM_PORT_TYPE_TX) ||           \
45055 +                 ((type) == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)) ? 3 : 1))
45056 +
45057 +#define DEFAULT_PORT_extraNumOfTasks(type)                  \
45058 +    (uint32_t)(((type) == e_FM_PORT_TYPE_RX_10G)  ? 8 :    \
45059 +               (((type) == e_FM_PORT_TYPE_RX) ? 2 : 0))
45060 +
45061 +#define DEFAULT_PORT_numOfOpenDmas(type)                    \
45062 +    (uint32_t)((((type) == e_FM_PORT_TYPE_TX_10G) ||        \
45063 +                ((type) == e_FM_PORT_TYPE_RX_10G)) ? 8 : 1 )
45064 +
45065 +#define DEFAULT_PORT_extraNumOfOpenDmas(type)               \
45066 +    (uint32_t)(((type) == e_FM_PORT_TYPE_RX_10G) ? 8 :    \
45067 +               (((type) == e_FM_PORT_TYPE_RX) ? 1 : 0))
45068 +
45069 +#define DEFAULT_PORT_numOfFifoBufs(type)                    \
45070 +    (uint32_t)((((type) == e_FM_PORT_TYPE_RX_10G) ||        \
45071 +                ((type) == e_FM_PORT_TYPE_TX_10G)) ? 48 :   \
45072 +                ((type) == e_FM_PORT_TYPE_RX) ? 45 :        \
45073 +                ((type) == e_FM_PORT_TYPE_TX) ? 44 : 8)
45074 +
45075 +#define DEFAULT_PORT_extraNumOfFifoBufs             0
45076 +
45077 +#else  /* (DPAA_VERSION < 11) */
45078 +/* Defaults are registers' reset values */
45079 +#define DEFAULT_PORT_rxFifoPriElevationLevel            MAX_PORT_FIFO_SIZE
45080 +#define DEFAULT_PORT_rxFifoThreshold                    MAX_PORT_FIFO_SIZE
45081 +
45082 +#define DEFAULT_PORT_txFifoMinFillLevel                 0
45083 +#define DEFAULT_PORT_txFifoLowComfLevel                 (5 * KILOBYTE)
45084 +#define DEFAULT_PORT_fifoDeqPipelineDepth_1G            2
45085 +#define DEFAULT_PORT_fifoDeqPipelineDepth_10G           4
45086 +
45087 +#define DEFAULT_PORT_fifoDeqPipelineDepth_OH            2
45088 +
45089 +#define DEFAULT_PORT_numOfTasks(type)                       \
45090 +    (uint32_t)((((type) == e_FM_PORT_TYPE_RX_10G) ||        \
45091 +                ((type) == e_FM_PORT_TYPE_TX_10G)) ? 14 :   \
45092 +               (((type) == e_FM_PORT_TYPE_RX) ||            \
45093 +                 ((type) == e_FM_PORT_TYPE_TX)) ? 4 :       \
45094 +                 ((type) == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) ? 6 : 1)
45095 +
45096 +#define DEFAULT_PORT_extraNumOfTasks(type)          0
45097 +
45098 +#define DEFAULT_PORT_numOfOpenDmas(type)                    \
45099 +    (uint32_t)(((type) == e_FM_PORT_TYPE_RX_10G) ? 8 :      \
45100 +               ((type) == e_FM_PORT_TYPE_TX_10G) ? 12 :     \
45101 +               ((type) == e_FM_PORT_TYPE_RX)     ? 2 :      \
45102 +               ((type) == e_FM_PORT_TYPE_TX)     ? 3 :      \
45103 +               ((type) == e_FM_PORT_TYPE_OH_HOST_COMMAND) ? 2 : 4)
45104 +
45105 +#define DEFAULT_PORT_extraNumOfOpenDmas(type)       0
45106 +
45107 +#define DEFAULT_PORT_numOfFifoBufs(type)                   \
45108 +    (uint32_t) (((type) == e_FM_PORT_TYPE_RX_10G) ? 96 : \
45109 +                ((type) == e_FM_PORT_TYPE_TX_10G) ? 64 : \
45110 +                ((type) == e_FM_PORT_TYPE_OH_HOST_COMMAND) ? 10 : 50)
45111 +
45112 +#define DEFAULT_PORT_extraNumOfFifoBufs             0
45113 +
45114 +#endif /* (DPAA_VERSION < 11) */
45115 +
45116 +#define DEFAULT_PORT_txBdRingLength                 16
45117 +#define DEFAULT_PORT_rxBdRingLength                 128
45118 +#define DEFAULT_PORT_ImfwExtStructsMemId            0
45119 +#define DEFAULT_PORT_ImfwExtStructsMemAttr          MEMORY_ATTR_CACHEABLE
45120 +
45121 +#define FM_PORT_CG_REG_NUM(_cgId) (((FM_PORT_NUM_OF_CONGESTION_GRPS/32)-1)-_cgId/32)
45122 +
45123 +/**************************************************************************//**
45124 + @Collection    PCD Engines
45125 +*//***************************************************************************/
45126 +typedef uint32_t fmPcdEngines_t; /**< options as defined below: */
45127 +
45128 +#define FM_PCD_NONE                                 0                   /**< No PCD Engine indicated */
45129 +#define FM_PCD_PRS                                  0x80000000          /**< Parser indicated */
45130 +#define FM_PCD_KG                                   0x40000000          /**< Keygen indicated */
45131 +#define FM_PCD_CC                                   0x20000000          /**< Coarse classification indicated */
45132 +#define FM_PCD_PLCR                                 0x10000000          /**< Policer indicated */
45133 +#define FM_PCD_MANIP                                0x08000000          /**< Manipulation indicated */
45134 +/* @} */
45135 +
45136 +#define FM_PORT_MAX_NUM_OF_EXT_POOLS_ALL_INTEGRATIONS       8
45137 +#define FM_PORT_MAX_NUM_OF_CONGESTION_GRPS_ALL_INTEGRATIONS 256
45138 +#define FM_PORT_CG_REG_NUM(_cgId) (((FM_PORT_NUM_OF_CONGESTION_GRPS/32)-1)-_cgId/32)
45139 +
45140 +#define FM_OH_PORT_ID                               0
45141 +
45142 +/***********************************************************************/
45143 +/*          SW parser OFFLOAD labels (offsets)                         */
45144 +/***********************************************************************/
45145 +#if (DPAA_VERSION == 10)
45146 +#define OFFLOAD_SW_PATCH_IPv4_IPR_LABEL         0x300
45147 +#define OFFLOAD_SW_PATCH_IPv6_IPR_LABEL         0x325
45148 +#define OFFLOAD_SW_PATCH_IPv6_IPF_LABEL         0x325
45149 +#else
45150 +#define OFFLOAD_SW_PATCH_IPv4_IPR_LABEL         0x100
45151 +/* Will be used for:
45152 + * 1. identify fragments
45153 + * 2. udp-lite
45154 + */
45155 +#define OFFLOAD_SW_PATCH_IPv6_IPR_LABEL         0x146
45156 +/* Will be used for:
45157 + * 1. will identify the fragmentable area
45158 + * 2. udp-lite
45159 + */
45160 +#define OFFLOAD_SW_PATCH_IPv6_IPF_LABEL         0x261
45161 +#define OFFLOAD_SW_PATCH_CAPWAP_LABEL           0x38d
45162 +#endif /* (DPAA_VERSION == 10) */
45163 +
45164 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
45165 +#define UDP_LITE_SW_PATCH_LABEL                 0x2E0
45166 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
45167 +
45168 +
45169 +/**************************************************************************//**
45170 + @Description       Memory Mapped Registers
45171 +*//***************************************************************************/
45172 +
45173 +#if defined(__MWERKS__) && !defined(__GNUC__)
45174 +#pragma pack(push,1)
45175 +#endif /* defined(__MWERKS__) && ... */
45176 +
45177 +typedef struct
45178 +{
45179 +    volatile uint32_t   fmbm_rcfg;      /**< Rx Configuration */
45180 +    volatile uint32_t   fmbm_rst;       /**< Rx Status */
45181 +    volatile uint32_t   fmbm_rda;       /**< Rx DMA attributes*/
45182 +    volatile uint32_t   fmbm_rfp;       /**< Rx FIFO Parameters*/
45183 +    volatile uint32_t   fmbm_rfed;      /**< Rx Frame End Data*/
45184 +    volatile uint32_t   fmbm_ricp;      /**< Rx Internal Context Parameters*/
45185 +    volatile uint32_t   fmbm_rim;       /**< Rx Internal Buffer Margins*/
45186 +    volatile uint32_t   fmbm_rebm;      /**< Rx External Buffer Margins*/
45187 +    volatile uint32_t   fmbm_rfne;      /**< Rx Frame Next Engine*/
45188 +    volatile uint32_t   fmbm_rfca;      /**< Rx Frame Command Attributes.*/
45189 +    volatile uint32_t   fmbm_rfpne;     /**< Rx Frame Parser Next Engine*/
45190 +    volatile uint32_t   fmbm_rpso;      /**< Rx Parse Start Offset*/
45191 +    volatile uint32_t   fmbm_rpp;       /**< Rx Policer Profile  */
45192 +    volatile uint32_t   fmbm_rccb;      /**< Rx Coarse Classification Base */
45193 +    volatile uint32_t   fmbm_reth;      /**< Rx Excessive Threshold */
45194 +    volatile uint32_t   reserved1[0x01];/**< (0x03C) */
45195 +    volatile uint32_t   fmbm_rprai[FM_PORT_PRS_RESULT_NUM_OF_WORDS];
45196 +                                        /**< Rx Parse Results Array Initialization*/
45197 +    volatile uint32_t   fmbm_rfqid;     /**< Rx Frame Queue ID*/
45198 +    volatile uint32_t   fmbm_refqid;    /**< Rx Error Frame Queue ID*/
45199 +    volatile uint32_t   fmbm_rfsdm;     /**< Rx Frame Status Discard Mask*/
45200 +    volatile uint32_t   fmbm_rfsem;     /**< Rx Frame Status Error Mask*/
45201 +    volatile uint32_t   fmbm_rfene;     /**< Rx Frame Enqueue Next Engine */
45202 +    volatile uint32_t   reserved2[0x02];/**< (0x074-0x078) */
45203 +    volatile uint32_t   fmbm_rcmne;     /**< Rx Frame Continuous Mode Next Engine */
45204 +    volatile uint32_t   reserved3[0x20];/**< (0x080 0x0FF)  */
45205 +    volatile uint32_t   fmbm_ebmpi[FM_PORT_MAX_NUM_OF_EXT_POOLS_ALL_INTEGRATIONS];
45206 +                                        /**< Buffer Manager pool Information-*/
45207 +    volatile uint32_t   fmbm_acnt[FM_PORT_MAX_NUM_OF_EXT_POOLS_ALL_INTEGRATIONS];
45208 +                                        /**< Allocate Counter-*/
45209 +    volatile uint32_t   reserved4[0x08];
45210 +                                        /**< 0x130/0x140 - 0x15F reserved -*/
45211 +    volatile uint32_t   fmbm_rcgm[FM_PORT_MAX_NUM_OF_CONGESTION_GRPS_ALL_INTEGRATIONS/32];
45212 +                                        /**< Congestion Group Map*/
45213 +    volatile uint32_t   fmbm_rmpd;      /**< BM Pool Depletion  */
45214 +    volatile uint32_t   reserved5[0x1F];/**< (0x184 0x1FF) */
45215 +    volatile uint32_t   fmbm_rstc;      /**< Rx Statistics Counters*/
45216 +    volatile uint32_t   fmbm_rfrc;      /**< Rx Frame Counter*/
45217 +    volatile uint32_t   fmbm_rfbc;      /**< Rx Bad Frames Counter*/
45218 +    volatile uint32_t   fmbm_rlfc;      /**< Rx Large Frames Counter*/
45219 +    volatile uint32_t   fmbm_rffc;      /**< Rx Filter Frames Counter*/
45220 +    volatile uint32_t   fmbm_rfcd;      /**< Rx Frame Discard Counter*/
45221 +    volatile uint32_t   fmbm_rfldec;    /**< Rx Frames List DMA Error Counter*/
45222 +    volatile uint32_t   fmbm_rodc;      /**< Rx Out of Buffers Discard Counter-*/
45223 +    volatile uint32_t   fmbm_rbdc;      /**< Rx Buffers Deallocate Counter-*/
45224 +    volatile uint32_t   fmbm_rpec;      /**< Rx RX Prepare to enqueue Counter-*/
45225 +    volatile uint32_t   reserved6[0x16];/**< (0x228 0x27F) */
45226 +    volatile uint32_t   fmbm_rpc;       /**< Rx Performance Counters*/
45227 +    volatile uint32_t   fmbm_rpcp;      /**< Rx Performance Count Parameters*/
45228 +    volatile uint32_t   fmbm_rccn;      /**< Rx Cycle Counter*/
45229 +    volatile uint32_t   fmbm_rtuc;      /**< Rx Tasks Utilization Counter*/
45230 +    volatile uint32_t   fmbm_rrquc;     /**< Rx Receive Queue Utilization Counter*/
45231 +    volatile uint32_t   fmbm_rduc;      /**< Rx DMA Utilization Counter*/
45232 +    volatile uint32_t   fmbm_rfuc;      /**< Rx FIFO Utilization Counter*/
45233 +    volatile uint32_t   fmbm_rpac;      /**< Rx Pause Activation Counter*/
45234 +    volatile uint32_t   reserved7[0x18];/**< (0x2A0-0x2FF) */
45235 +    volatile uint32_t   fmbm_rdcfg[0x3];/**< Rx Debug-*/
45236 +    volatile uint32_t   fmbm_rgpr;      /**< Rx General Purpose Register. */
45237 +    volatile uint32_t   reserved8[0x3a];/**< (0x310-0x3FF) */
45238 +} t_FmPortRxBmiRegs;
45239 +
45240 +typedef struct
45241 +{
45242 +    volatile uint32_t   fmbm_tcfg;      /**< Tx Configuration */
45243 +    volatile uint32_t   fmbm_tst;       /**< Tx Status */
45244 +    volatile uint32_t   fmbm_tda;       /**< Tx DMA attributes */
45245 +    volatile uint32_t   fmbm_tfp;       /**< Tx FIFO Parameters */
45246 +    volatile uint32_t   fmbm_tfed;      /**< Tx Frame End Data */
45247 +    volatile uint32_t   fmbm_ticp;      /**< Tx Internal Context Parameters */
45248 +    volatile uint32_t   fmbm_tfdne;     /**< Tx Frame Dequeue Next Engine. */
45249 +    volatile uint32_t   fmbm_tfca;      /**< Tx Frame Command attribute. */
45250 +    volatile uint32_t   fmbm_tcfqid;    /**< Tx Confirmation Frame Queue ID. */
45251 +    volatile uint32_t   fmbm_tfeqid;    /**< Tx Frame Error Queue ID */
45252 +    volatile uint32_t   fmbm_tfene;     /**< Tx Frame Enqueue Next Engine */
45253 +    volatile uint32_t   fmbm_trlmts;    /**< Tx Rate Limiter Scale */
45254 +    volatile uint32_t   fmbm_trlmt;     /**< Tx Rate Limiter */
45255 +    volatile uint32_t   fmbm_tccb;      /**< Tx Coarse Classification Base */
45256 +    volatile uint32_t   reserved0[0x0e];/**< (0x038-0x070) */
45257 +    volatile uint32_t   fmbm_tfne;      /**< Tx Frame Next Engine */
45258 +    volatile uint32_t   fmbm_tpfcm[0x02];/**< Tx Priority based Flow Control (PFC) Mapping */
45259 +    volatile uint32_t   fmbm_tcmne;     /**< Tx Frame Continuous Mode Next Engine */
45260 +    volatile uint32_t   reserved2[0x60];/**< (0x080-0x200) */
45261 +    volatile uint32_t   fmbm_tstc;      /**< Tx Statistics Counters */
45262 +    volatile uint32_t   fmbm_tfrc;      /**< Tx Frame Counter */
45263 +    volatile uint32_t   fmbm_tfdc;      /**< Tx Frames Discard Counter */
45264 +    volatile uint32_t   fmbm_tfledc;    /**< Tx Frame Length error discard counter */
45265 +    volatile uint32_t   fmbm_tfufdc;    /**< Tx Frame unsupported format discard Counter */
45266 +    volatile uint32_t   fmbm_tbdc;      /**< Tx Buffers Deallocate Counter */
45267 +    volatile uint32_t   reserved3[0x1A];/**< (0x218-0x280) */
45268 +    volatile uint32_t   fmbm_tpc;       /**< Tx Performance Counters*/
45269 +    volatile uint32_t   fmbm_tpcp;      /**< Tx Performance Count Parameters*/
45270 +    volatile uint32_t   fmbm_tccn;      /**< Tx Cycle Counter*/
45271 +    volatile uint32_t   fmbm_ttuc;      /**< Tx Tasks Utilization Counter*/
45272 +    volatile uint32_t   fmbm_ttcquc;    /**< Tx Transmit Confirm Queue Utilization Counter*/
45273 +    volatile uint32_t   fmbm_tduc;      /**< Tx DMA Utilization Counter*/
45274 +    volatile uint32_t   fmbm_tfuc;      /**< Tx FIFO Utilization Counter*/
45275 +    volatile uint32_t   reserved4[16];  /**< (0x29C-0x2FF) */
45276 +    volatile uint32_t   fmbm_tdcfg[0x3];/**< Tx Debug-*/
45277 +    volatile uint32_t   fmbm_tgpr;      /**< O/H General Purpose Register */
45278 +    volatile uint32_t   reserved5[0x3a];/**< (0x310-0x3FF) */
45279 +} t_FmPortTxBmiRegs;
45280 +
45281 +typedef struct
45282 +{
45283 +    volatile uint32_t   fmbm_ocfg;      /**< O/H Configuration  */
45284 +    volatile uint32_t   fmbm_ost;       /**< O/H Status */
45285 +    volatile uint32_t   fmbm_oda;       /**< O/H DMA attributes  */
45286 +    volatile uint32_t   fmbm_oicp;      /**< O/H Internal Context Parameters  */
45287 +    volatile uint32_t   fmbm_ofdne;     /**< O/H Frame Dequeue Next Engine  */
45288 +    volatile uint32_t   fmbm_ofne;      /**< O/H Frame Next Engine  */
45289 +    volatile uint32_t   fmbm_ofca;      /**< O/H Frame Command Attributes.  */
45290 +    volatile uint32_t   fmbm_ofpne;     /**< O/H Frame Parser Next Engine  */
45291 +    volatile uint32_t   fmbm_opso;      /**< O/H Parse Start Offset  */
45292 +    volatile uint32_t   fmbm_opp;       /**< O/H Policer Profile */
45293 +    volatile uint32_t   fmbm_occb;      /**< O/H Coarse Classification base */
45294 +    volatile uint32_t   fmbm_oim;       /**< O/H Internal margins*/
45295 +    volatile uint32_t   fmbm_ofp;       /**< O/H Fifo Parameters*/
45296 +    volatile uint32_t   fmbm_ofed;      /**< O/H Frame End Data*/
45297 +    volatile uint32_t   reserved0[2];   /**< (0x038 - 0x03F) */
45298 +    volatile uint32_t   fmbm_oprai[FM_PORT_PRS_RESULT_NUM_OF_WORDS];
45299 +                                        /**< O/H Parse Results Array Initialization  */
45300 +    volatile uint32_t   fmbm_ofqid;     /**< O/H Frame Queue ID  */
45301 +    volatile uint32_t   fmbm_oefqid;    /**< O/H Error Frame Queue ID  */
45302 +    volatile uint32_t   fmbm_ofsdm;     /**< O/H Frame Status Discard Mask  */
45303 +    volatile uint32_t   fmbm_ofsem;     /**< O/H Frame Status Error Mask  */
45304 +    volatile uint32_t   fmbm_ofene;     /**< O/H Frame Enqueue Next Engine  */
45305 +    volatile uint32_t   fmbm_orlmts;    /**< O/H Rate Limiter Scale  */
45306 +    volatile uint32_t   fmbm_orlmt;     /**< O/H Rate Limiter  */
45307 +    volatile uint32_t   fmbm_ocmne;     /**< O/H Continuous Mode Next Engine  */
45308 +    volatile uint32_t   reserved1[0x20];/**< (0x080 - 0x0FF) */
45309 +    volatile uint32_t   fmbm_oebmpi[2]; /**< Buffer Manager Observed Pool Information */
45310 +    volatile uint32_t   reserved2[0x16];/**< (0x108 - 0x15F) */
45311 +    volatile uint32_t   fmbm_ocgm;      /**< Observed Congestion Group Map */
45312 +    volatile uint32_t   reserved3[0x7]; /**< (0x164 - 0x17F) */
45313 +    volatile uint32_t   fmbm_ompd;      /**< Observed BMan Pool Depletion */
45314 +    volatile uint32_t   reserved4[0x1F];/**< (0x184 - 0x1FF) */
45315 +    volatile uint32_t   fmbm_ostc;      /**< O/H Statistics Counters  */
45316 +    volatile uint32_t   fmbm_ofrc;      /**< O/H Frame Counter  */
45317 +    volatile uint32_t   fmbm_ofdc;      /**< O/H Frames Discard Counter  */
45318 +    volatile uint32_t   fmbm_ofledc;    /**< O/H Frames Length Error Discard Counter  */
45319 +    volatile uint32_t   fmbm_ofufdc;    /**< O/H Frames Unsupported Format Discard Counter  */
45320 +    volatile uint32_t   fmbm_offc;      /**< O/H Filter Frames Counter  */
45321 +    volatile uint32_t   fmbm_ofwdc;     /**< - Rx Frames WRED Discard Counter  */
45322 +    volatile uint32_t   fmbm_ofldec;    /**< O/H Frames List DMA Error Counter */
45323 +    volatile uint32_t   fmbm_obdc;      /**< O/H Buffers Deallocate Counter */
45324 +    volatile uint32_t   fmbm_oodc;      /**< O/H Out of Buffers Discard Counter */
45325 +    volatile uint32_t   fmbm_opec;      /**< O/H Prepare to enqueue Counter */
45326 +    volatile uint32_t   reserved5[0x15];/**< ( - 0x27F) */
45327 +    volatile uint32_t   fmbm_opc;       /**< O/H Performance Counters  */
45328 +    volatile uint32_t   fmbm_opcp;      /**< O/H Performance Count Parameters  */
45329 +    volatile uint32_t   fmbm_occn;      /**< O/H Cycle Counter  */
45330 +    volatile uint32_t   fmbm_otuc;      /**< O/H Tasks Utilization Counter  */
45331 +    volatile uint32_t   fmbm_oduc;      /**< O/H DMA Utilization Counter */
45332 +    volatile uint32_t   fmbm_ofuc;      /**< O/H FIFO Utilization Counter */
45333 +    volatile uint32_t   reserved6[26];  /**< (0x298-0x2FF) */
45334 +    volatile uint32_t   fmbm_odcfg[0x3];/**< O/H Debug (only 1 in P1023) */
45335 +    volatile uint32_t   fmbm_ogpr;      /**< O/H General Purpose Register. */
45336 +    volatile uint32_t   reserved7[0x3a];/**< (0x310 0x3FF) */
45337 +} t_FmPortOhBmiRegs;
45338 +
45339 +typedef union
45340 +{
45341 +    t_FmPortRxBmiRegs rxPortBmiRegs;
45342 +    t_FmPortTxBmiRegs txPortBmiRegs;
45343 +    t_FmPortOhBmiRegs ohPortBmiRegs;
45344 +} u_FmPortBmiRegs;
45345 +
45346 +typedef struct
45347 +{
45348 +    volatile uint32_t   reserved1[2];   /**<   0xn024 - 0x02B */
45349 +    volatile uint32_t   fmqm_pndn;      /**<   PortID n Dequeue NIA Register */
45350 +    volatile uint32_t   fmqm_pndc;      /**<   PortID n Dequeue Config Register */
45351 +    volatile uint32_t   fmqm_pndtfc;    /**<   PortID n Dequeue Total Frame Counter */
45352 +    volatile uint32_t   fmqm_pndfdc;    /**<   PortID n Dequeue FQID from Default Counter */
45353 +    volatile uint32_t   fmqm_pndcc;     /**<   PortID n Dequeue Confirm Counter */
45354 +} t_FmPortNonRxQmiRegs;
45355 +
45356 +typedef struct
45357 +{
45358 +    volatile uint32_t   fmqm_pnc;       /**<   PortID n Configuration Register */
45359 +    volatile uint32_t   fmqm_pns;       /**<   PortID n Status Register */
45360 +    volatile uint32_t   fmqm_pnts;      /**<   PortID n Task Status Register */
45361 +    volatile uint32_t   reserved0[4];   /**<   0xn00C - 0xn01B */
45362 +    volatile uint32_t   fmqm_pnen;      /**<   PortID n Enqueue NIA Register */
45363 +    volatile uint32_t   fmqm_pnetfc;    /**<   PortID n Enqueue Total Frame Counter */
45364 +    t_FmPortNonRxQmiRegs nonRxQmiRegs;  /**<   Registers for Tx Hc & Op ports */
45365 +} t_FmPortQmiRegs;
45366 +
45367 +typedef struct
45368 +{
45369 +     struct
45370 +    {
45371 +        volatile uint32_t   softSeqAttach;  /**<   Soft Sequence Attachment */
45372 +        volatile uint32_t   lcv;            /**<   Line-up Enable Confirmation Mask */
45373 +    } hdrs[FM_PCD_PRS_NUM_OF_HDRS];
45374 +    volatile uint32_t   reserved0[0xde];
45375 +    volatile uint32_t   pcac;               /**<   Parse Internal Memory Configuration Access Control Register */
45376 +    volatile uint32_t   pctpid;             /**<   Parse Internal Memory Configured TPID Register */
45377 +} t_FmPortPrsRegs;
45378 +
45379 +/**************************************************************************//*
45380 + @Description   Basic buffer descriptor (BD) structure
45381 +*//***************************************************************************/
45382 +typedef _Packed struct
45383 +{
45384 +    volatile uint16_t       status;
45385 +    volatile uint16_t       length;
45386 +    volatile uint8_t        reserved0[0x6];
45387 +    volatile uint8_t        reserved1[0x1];
45388 +    volatile t_FmPhysAddr   buff;
45389 +} _PackedType t_FmImBd;
45390 +
45391 +typedef _Packed struct
45392 +{
45393 +    volatile uint16_t       gen;                /**< tbd */
45394 +    volatile uint8_t        reserved0[0x1];
45395 +    volatile t_FmPhysAddr   bdRingBase;         /**< tbd */
45396 +    volatile uint16_t       bdRingSize;         /**< tbd */
45397 +    volatile uint16_t       offsetIn;           /**< tbd */
45398 +    volatile uint16_t       offsetOut;          /**< tbd */
45399 +    volatile uint8_t        reserved1[0x12];    /**< 0x0e - 0x1f */
45400 +} _PackedType t_FmPortImQd;
45401 +
45402 +typedef _Packed struct
45403 +{
45404 +    volatile uint32_t   mode;               /**< Mode register */
45405 +    volatile uint32_t   rxQdPtr;            /**< tbd */
45406 +    volatile uint32_t   txQdPtr;            /**< tbd */
45407 +    volatile uint16_t   mrblr;              /**< tbd */
45408 +    volatile uint16_t   rxQdBsyCnt;         /**< tbd */
45409 +    volatile uint8_t    reserved0[0x10];    /**< 0x10 - 0x1f */
45410 +    t_FmPortImQd        rxQd;
45411 +    t_FmPortImQd        txQd;
45412 +    volatile uint8_t    reserved1[0xa0];    /**< 0x60 - 0xff */
45413 +} _PackedType t_FmPortImPram;
45414 +
45415 +#if defined(__MWERKS__) && !defined(__GNUC__)
45416 +#pragma pack(pop)
45417 +#endif /* defined(__MWERKS__) && ... */
45418 +
45419 +
45420 +/**************************************************************************//**
45421 + @Description       Registers bit fields
45422 +*//***************************************************************************/
45423 +
45424 +/**************************************************************************//**
45425 + @Description       BMI defines
45426 +*//***************************************************************************/
45427 +#if (DPAA_VERSION >= 11)
45428 +#define BMI_SP_ID_MASK                          0xff000000
45429 +#define BMI_SP_ID_SHIFT                         24
45430 +#define BMI_SP_EN                               0x01000000
45431 +#endif /* (DPAA_VERSION >= 11) */
45432 +
45433 +#define BMI_PORT_CFG_EN                         0x80000000
45434 +#define BMI_PORT_CFG_EN_MACSEC                  0x00800000
45435 +#define BMI_PORT_CFG_FDOVR                      0x02000000
45436 +#define BMI_PORT_CFG_IM                         0x01000000
45437 +#define BMI_PORT_CFG_AM                         0x00000040
45438 +#define BMI_PORT_STATUS_BSY                     0x80000000
45439 +#define BMI_COUNTERS_EN                         0x80000000
45440 +
45441 +#define BMI_PORT_RFNE_FRWD_DCL4C                0x10000000
45442 +#define BMI_PORT_RFNE_FRWD_RPD                  0x40000000
45443 +#define BMI_RFNE_FDCS_MASK                      0xFF000000
45444 +#define BMI_RFNE_HXS_MASK                       0x000000FF
45445 +
45446 +#define BMI_CMD_MR_LEAC                         0x00200000
45447 +#define BMI_CMD_MR_SLEAC                        0x00100000
45448 +#define BMI_CMD_MR_MA                           0x00080000
45449 +#define BMI_CMD_MR_DEAS                         0x00040000
45450 +#define BMI_CMD_RX_MR_DEF                       (BMI_CMD_MR_LEAC | \
45451 +                                                 BMI_CMD_MR_SLEAC | \
45452 +                                                 BMI_CMD_MR_MA | \
45453 +                                                 BMI_CMD_MR_DEAS)
45454 +#define BMI_CMD_ATTR_ORDER                      0x80000000
45455 +#define BMI_CMD_ATTR_SYNC                       0x02000000
45456 +#define BMI_CMD_ATTR_MODE_MISS_ALLIGN_ADDR_EN   0x00080000
45457 +#define BMI_CMD_ATTR_MACCMD_MASK                0x0000ff00
45458 +#define BMI_CMD_ATTR_MACCMD_OVERRIDE            0x00008000
45459 +#define BMI_CMD_ATTR_MACCMD_SECURED             0x00001000
45460 +#define BMI_CMD_ATTR_MACCMD_SC_MASK             0x00000f00
45461 +
45462 +#define BMI_EXT_BUF_POOL_ID_MASK                0x003F0000
45463 +#define BMI_STATUS_RX_MASK_UNUSED               (uint32_t)(~(FM_PORT_FRM_ERR_DMA                    | \
45464 +                                                             FM_PORT_FRM_ERR_PHYSICAL               | \
45465 +                                                             FM_PORT_FRM_ERR_SIZE                   | \
45466 +                                                             FM_PORT_FRM_ERR_CLS_DISCARD            | \
45467 +                                                             FM_PORT_FRM_ERR_EXTRACTION             | \
45468 +                                                             FM_PORT_FRM_ERR_NO_SCHEME              | \
45469 +                                                             FM_PORT_FRM_ERR_COLOR_RED              | \
45470 +                                                             FM_PORT_FRM_ERR_COLOR_YELLOW           | \
45471 +                                                             FM_PORT_FRM_ERR_ILL_PLCR               | \
45472 +                                                             FM_PORT_FRM_ERR_PLCR_FRAME_LEN         | \
45473 +                                                             FM_PORT_FRM_ERR_PRS_TIMEOUT            | \
45474 +                                                             FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT       | \
45475 +                                                             FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED   | \
45476 +                                                             FM_PORT_FRM_ERR_PRS_HDR_ERR            | \
45477 +                                                             FM_PORT_FRM_ERR_IPRE                   | \
45478 +                                                             FM_PORT_FRM_ERR_IPR_NCSP               | \
45479 +                                                             FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW))
45480 +
45481 +#define BMI_STATUS_OP_MASK_UNUSED               (uint32_t)(BMI_STATUS_RX_MASK_UNUSED &                \
45482 +                                                           ~(FM_PORT_FRM_ERR_LENGTH                 | \
45483 +                                                             FM_PORT_FRM_ERR_NON_FM                 | \
45484 +                                                             FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT))
45485 +
45486 +#define BMI_RATE_LIMIT_EN                       0x80000000
45487 +#define BMI_RATE_LIMIT_BURST_SIZE_GRAN          0x80000000
45488 +#define BMI_RATE_LIMIT_SCALE_BY_2               0x00000001
45489 +#define BMI_RATE_LIMIT_SCALE_BY_4               0x00000002
45490 +#define BMI_RATE_LIMIT_SCALE_BY_8               0x00000003
45491 +
45492 +#define BMI_RX_FIFO_THRESHOLD_BC                0x80000000
45493 +
45494 +#define BMI_PRS_RESULT_HIGH                     0x00000000
45495 +#define BMI_PRS_RESULT_LOW                      0xFFFFFFFF
45496 +
45497 +
45498 +#define RX_ERRS_TO_ENQ                          (FM_PORT_FRM_ERR_DMA                    | \
45499 +                                                 FM_PORT_FRM_ERR_PHYSICAL               | \
45500 +                                                 FM_PORT_FRM_ERR_SIZE                   | \
45501 +                                                 FM_PORT_FRM_ERR_EXTRACTION             | \
45502 +                                                 FM_PORT_FRM_ERR_NO_SCHEME              | \
45503 +                                                 FM_PORT_FRM_ERR_ILL_PLCR               | \
45504 +                                                 FM_PORT_FRM_ERR_PLCR_FRAME_LEN         | \
45505 +                                                 FM_PORT_FRM_ERR_PRS_TIMEOUT            | \
45506 +                                                 FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT       | \
45507 +                                                 FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED   | \
45508 +                                                 FM_PORT_FRM_ERR_PRS_HDR_ERR            | \
45509 +                                                 FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW       | \
45510 +                                                 FM_PORT_FRM_ERR_IPRE)
45511 +
45512 +#define OP_ERRS_TO_ENQ                          (RX_ERRS_TO_ENQ                         | \
45513 +                                                 FM_PORT_FRM_ERR_LENGTH                 | \
45514 +                                                 FM_PORT_FRM_ERR_NON_FM                 | \
45515 +                                                 FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT)
45516 +
45517 +
45518 +#define BMI_RX_FIFO_PRI_ELEVATION_MASK          0x03FF0000
45519 +#define BMI_RX_FIFO_THRESHOLD_MASK              0x000003FF
45520 +#define BMI_TX_FIFO_MIN_FILL_MASK               0x03FF0000
45521 +#define BMI_FIFO_PIPELINE_DEPTH_MASK            0x0000F000
45522 +#define BMI_TX_LOW_COMF_MASK                    0x000003FF
45523 +
45524 +/* shifts */
45525 +#define BMI_PORT_CFG_MS_SEL_SHIFT               16
45526 +#define BMI_DMA_ATTR_IC_CACHE_SHIFT             FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT
45527 +#define BMI_DMA_ATTR_HDR_CACHE_SHIFT            FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT
45528 +#define BMI_DMA_ATTR_SG_CACHE_SHIFT             FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT
45529 +
45530 +#define BMI_IM_FOF_SHIFT                        28
45531 +#define BMI_PR_PORTID_SHIFT                     24
45532 +
45533 +#define BMI_RX_FIFO_PRI_ELEVATION_SHIFT         16
45534 +#define BMI_RX_FIFO_THRESHOLD_SHIFT             0
45535 +
45536 +#define BMI_RX_FRAME_END_CS_IGNORE_SHIFT        24
45537 +#define BMI_RX_FRAME_END_CUT_SHIFT              16
45538 +
45539 +#define BMI_IC_SIZE_SHIFT                       FMAN_SP_IC_SIZE_SHIFT
45540 +
45541 +#define BMI_INT_BUF_MARG_SHIFT                  28
45542 +
45543 +#define BMI_EXT_BUF_MARG_END_SHIFT              FMAN_SP_EXT_BUF_MARG_END_SHIFT
45544 +
45545 +#define BMI_CMD_ATTR_COLOR_SHIFT                26
45546 +#define BMI_CMD_ATTR_COM_MODE_SHIFT             16
45547 +#define BMI_CMD_ATTR_MACCMD_SHIFT               8
45548 +#define BMI_CMD_ATTR_MACCMD_OVERRIDE_SHIFT      15
45549 +#define BMI_CMD_ATTR_MACCMD_SECURED_SHIFT       12
45550 +#define BMI_CMD_ATTR_MACCMD_SC_SHIFT            8
45551 +
45552 +#define BMI_POOL_DEP_NUM_OF_POOLS_VECTOR_SHIFT  24
45553 +
45554 +#define BMI_TX_FIFO_MIN_FILL_SHIFT              16
45555 +#define BMI_TX_LOW_COMF_SHIFT                   0
45556 +
45557 +#define BMI_PERFORMANCE_TASK_COMP_SHIFT         24
45558 +#define BMI_PERFORMANCE_PORT_COMP_SHIFT         16
45559 +#define BMI_PERFORMANCE_DMA_COMP_SHIFT          12
45560 +#define BMI_PERFORMANCE_FIFO_COMP_SHIFT         0
45561 +
45562 +#define BMI_MAX_BURST_SHIFT                     16
45563 +#define BMI_COUNT_RATE_UNIT_SHIFT               16
45564 +
45565 +/* sizes */
45566 +#define FRAME_END_DATA_SIZE                     16
45567 +#define FRAME_OFFSET_UNITS                      16
45568 +#define MIN_TX_INT_OFFSET                       16
45569 +#define MAX_FRAME_OFFSET                        64
45570 +#define MAX_FIFO_PIPELINE_DEPTH                 8
45571 +#define MAX_PERFORMANCE_TASK_COMP               64
45572 +#define MAX_PERFORMANCE_TX_QUEUE_COMP           8
45573 +#define MAX_PERFORMANCE_RX_QUEUE_COMP           64
45574 +#define MAX_PERFORMANCE_DMA_COMP                16
45575 +#define MAX_NUM_OF_TASKS                        64
45576 +#define MAX_NUM_OF_EXTRA_TASKS                  8
45577 +#define MAX_NUM_OF_DMAS                         16
45578 +#define MAX_NUM_OF_EXTRA_DMAS                   8
45579 +#define MAX_BURST_SIZE                          1024
45580 +#define MIN_NUM_OF_OP_DMAS                      2
45581 +
45582 +
45583 +/**************************************************************************//**
45584 + @Description       QMI defines
45585 +*//***************************************************************************/
45586 +/* masks */
45587 +#define QMI_PORT_CFG_EN                         0x80000000
45588 +#define QMI_PORT_CFG_EN_COUNTERS                0x10000000
45589 +#define QMI_PORT_STATUS_DEQ_TNUM_BSY            0x80000000
45590 +#define QMI_PORT_STATUS_DEQ_FD_BSY              0x20000000
45591 +
45592 +#define QMI_DEQ_CFG_PREFETCH_NO_TNUM            0x02000000
45593 +#define QMI_DEQ_CFG_PREFETCH_WAITING_TNUM       0
45594 +#define QMI_DEQ_CFG_PREFETCH_1_FRAME            0
45595 +#define QMI_DEQ_CFG_PREFETCH_3_FRAMES           0x01000000
45596 +
45597 +#define QMI_DEQ_CFG_PRI                         0x80000000
45598 +#define QMI_DEQ_CFG_TYPE1                       0x10000000
45599 +#define QMI_DEQ_CFG_TYPE2                       0x20000000
45600 +#define QMI_DEQ_CFG_TYPE3                       0x30000000
45601 +
45602 +#define QMI_DEQ_CFG_SUBPORTAL_MASK              0x1f
45603 +#define QMI_DEQ_CFG_SUBPORTAL_SHIFT             20
45604 +
45605 +/**************************************************************************//**
45606 + @Description       PARSER defines
45607 +*//***************************************************************************/
45608 +/* masks */
45609 +#define PRS_HDR_ERROR_DIS                       0x00000800
45610 +#define PRS_HDR_SW_PRS_EN                       0x00000400
45611 +#define PRS_CP_OFFSET_MASK                      0x0000000F
45612 +#define PRS_TPID1_MASK                          0xFFFF0000
45613 +#define PRS_TPID2_MASK                          0x0000FFFF
45614 +#define PRS_TPID_DFLT                           0x91009100
45615 +
45616 +#define PRS_HDR_MPLS_LBL_INTER_EN               0x00200000
45617 +#define PRS_HDR_IPV6_ROUTE_HDR_EN               0x00008000
45618 +#define PRS_HDR_PPPOE_MTU_CHECK_EN              0x80000000
45619 +#define PRS_HDR_UDP_PAD_REMOVAL                 0x80000000
45620 +#define PRS_HDR_TCP_PAD_REMOVAL                 0x80000000
45621 +#define PRS_CAC_STOP                            0x00000001
45622 +#define PRS_CAC_ACTIVE                          0x00000100
45623 +
45624 +/* shifts */
45625 +#define PRS_PCTPID_SHIFT                        16
45626 +#define PRS_HDR_MPLS_NEXT_HDR_SHIFT             22
45627 +#define PRS_HDR_ETH_BC_SHIFT                    28
45628 +#define PRS_HDR_ETH_MC_SHIFT                    24
45629 +#define PRS_HDR_VLAN_STACKED_SHIFT              16
45630 +#define PRS_HDR_MPLS_STACKED_SHIFT              16
45631 +#define PRS_HDR_IPV4_1_BC_SHIFT                 28
45632 +#define PRS_HDR_IPV4_1_MC_SHIFT                 24
45633 +#define PRS_HDR_IPV4_2_UC_SHIFT                 20
45634 +#define PRS_HDR_IPV4_2_MC_BC_SHIFT              16
45635 +#define PRS_HDR_IPV6_1_MC_SHIFT                 24
45636 +#define PRS_HDR_IPV6_2_UC_SHIFT                 20
45637 +#define PRS_HDR_IPV6_2_MC_SHIFT                 16
45638 +
45639 +#define PRS_HDR_ETH_BC_MASK                     0x0fffffff
45640 +#define PRS_HDR_ETH_MC_MASK                     0xf0ffffff
45641 +#define PRS_HDR_VLAN_STACKED_MASK               0xfff0ffff
45642 +#define PRS_HDR_MPLS_STACKED_MASK               0xfff0ffff
45643 +#define PRS_HDR_IPV4_1_BC_MASK                  0x0fffffff
45644 +#define PRS_HDR_IPV4_1_MC_MASK                  0xf0ffffff
45645 +#define PRS_HDR_IPV4_2_UC_MASK                  0xff0fffff
45646 +#define PRS_HDR_IPV4_2_MC_BC_MASK               0xfff0ffff
45647 +#define PRS_HDR_IPV6_1_MC_MASK                  0xf0ffffff
45648 +#define PRS_HDR_IPV6_2_UC_MASK                  0xff0fffff
45649 +#define PRS_HDR_IPV6_2_MC_MASK                  0xfff0ffff
45650 +
45651 +/* others */
45652 +#define PRS_HDR_ENTRY_SIZE                      8
45653 +#define DEFAULT_CLS_PLAN_VECTOR                 0xFFFFFFFF
45654 +
45655 +#define IPSEC_SW_PATCH_START                    0x20
45656 +#define SCTP_SW_PATCH_START                     0x4D
45657 +#define DCCP_SW_PATCH_START                     0x41
45658 +
45659 +/**************************************************************************//**
45660 + @Description       IM defines
45661 +*//***************************************************************************/
45662 +#define BD_R_E                                  0x80000000
45663 +#define BD_L                                    0x08000000
45664 +
45665 +#define BD_RX_CRE                               0x00080000
45666 +#define BD_RX_FTL                               0x00040000
45667 +#define BD_RX_FTS                               0x00020000
45668 +#define BD_RX_OV                                0x00010000
45669 +
45670 +#define BD_RX_ERRORS                            (BD_RX_CRE | BD_RX_FTL | BD_RX_FTS | BD_RX_OV)
45671 +
45672 +#define FM_IM_SIZEOF_BD                         sizeof(t_FmImBd)
45673 +
45674 +#define BD_STATUS_MASK                          0xffff0000
45675 +#define BD_LENGTH_MASK                          0x0000ffff
45676 +
45677 +#define BD_STATUS_AND_LENGTH_SET(bd, val)       WRITE_UINT32(*(volatile uint32_t*)(bd), (val))
45678 +
45679 +#define BD_STATUS_AND_LENGTH(bd)                GET_UINT32(*(volatile uint32_t*)(bd))
45680 +
45681 +#define BD_GET(id)                              &p_FmPort->im.p_BdRing[id]
45682 +
45683 +#define IM_ILEGAL_BD_ID                         0xffff
45684 +
45685 +/* others */
45686 +#define IM_PRAM_ALIGN                           0x100
45687 +
45688 +/* masks */
45689 +#define IM_MODE_GBL                             0x20000000
45690 +#define IM_MODE_BO_MASK                         0x18000000
45691 +#define IM_MODE_BO_SHIFT                        3
45692 +#define IM_MODE_GRC_STP                         0x00800000
45693 +
45694 +#define IM_MODE_SET_BO(val)                     (uint32_t)((val << (31-IM_MODE_BO_SHIFT)) & IM_MODE_BO_MASK)
45695 +
45696 +#define IM_RXQD_BSYINTM                         0x0008
45697 +#define IM_RXQD_RXFINTM                         0x0010
45698 +#define IM_RXQD_FPMEVT_SEL_MASK                 0x0003
45699 +
45700 +#define IM_EV_BSY                               0x40000000
45701 +#define IM_EV_RX                                0x80000000
45702 +
45703 +
45704 +/**************************************************************************//**
45705 + @Description       Additional defines
45706 +*//***************************************************************************/
45707 +
45708 +typedef struct {
45709 +    t_Handle                    h_FmMuram;
45710 +    t_FmPortImPram              *p_FmPortImPram;
45711 +    uint8_t                     fwExtStructsMemId;
45712 +    uint32_t                    fwExtStructsMemAttr;
45713 +    uint16_t                    bdRingSize;
45714 +    t_FmImBd                    *p_BdRing;
45715 +    t_Handle                    *p_BdShadow;
45716 +    uint16_t                    currBdId;
45717 +    uint16_t                    firstBdOfFrameId;
45718 +
45719 +    /* Rx port parameters */
45720 +    uint8_t                     dataMemId;          /**< Memory partition ID for data buffers */
45721 +    uint32_t                    dataMemAttributes;  /**< Memory attributes for data buffers */
45722 +    t_BufferPoolInfo            rxPool;
45723 +    uint16_t                    mrblr;
45724 +    uint16_t                    rxFrameAccumLength;
45725 +    t_FmPortImRxStoreCallback   *f_RxStore;
45726 +
45727 +    /* Tx port parameters */
45728 +    uint32_t                    txFirstBdStatus;
45729 +    t_FmPortImTxConfCallback    *f_TxConf;
45730 +} t_FmMacIm;
45731 +
45732 +
45733 +typedef struct {
45734 +    struct fman_port_cfg                dfltCfg;
45735 +    uint32_t                            dfltFqid;
45736 +    uint32_t                            confFqid;
45737 +    uint32_t                            errFqid;
45738 +    uintptr_t                           baseAddr;
45739 +    uint8_t                             deqSubPortal;
45740 +    bool                                deqHighPriority;
45741 +    e_FmPortDeqType                     deqType;
45742 +    e_FmPortDeqPrefetchOption           deqPrefetchOption;
45743 +    uint16_t                            deqByteCnt;
45744 +    uint8_t                             cheksumLastBytesIgnore;
45745 +    uint8_t                             cutBytesFromEnd;
45746 +    t_FmBufPoolDepletion                bufPoolDepletion;
45747 +    uint8_t                             pipelineDepth;
45748 +    uint16_t                            fifoLowComfLevel;
45749 +    bool                                frmDiscardOverride;
45750 +    bool                                enRateLimit;
45751 +    t_FmPortRateLimit                   rateLimit;
45752 +    e_FmPortDualRateLimiterScaleDown    rateLimitDivider;
45753 +    bool                                enBufPoolDepletion;
45754 +    uint16_t                            liodnOffset;
45755 +    uint16_t                            liodnBase;
45756 +    t_FmExtPools                        extBufPools;
45757 +    e_FmDmaSwapOption                   dmaSwapData;
45758 +    e_FmDmaCacheOption                  dmaIntContextCacheAttr;
45759 +    e_FmDmaCacheOption                  dmaHeaderCacheAttr;
45760 +    e_FmDmaCacheOption                  dmaScatterGatherCacheAttr;
45761 +    bool                                dmaReadOptimize;
45762 +    bool                                dmaWriteOptimize;
45763 +    uint32_t                            txFifoMinFillLevel;
45764 +    uint32_t                            txFifoLowComfLevel;
45765 +    uint32_t                            rxFifoPriElevationLevel;
45766 +    uint32_t                            rxFifoThreshold;
45767 +    t_FmSpBufMargins                    bufMargins;
45768 +    t_FmSpIntContextDataCopy            intContext;
45769 +    bool                                syncReq;
45770 +    e_FmPortColor                       color;
45771 +    fmPortFrameErrSelect_t              errorsToDiscard;
45772 +    fmPortFrameErrSelect_t              errorsToEnq;
45773 +    bool                                forwardReuseIntContext;
45774 +    t_FmBufferPrefixContent             bufferPrefixContent;
45775 +     t_FmBackupBmPools                   *p_BackupBmPools;
45776 +    bool                                dontReleaseBuf;
45777 +    bool                                setNumOfTasks;
45778 +    bool                                setNumOfOpenDmas;
45779 +    bool                                setSizeOfFifo;
45780 +#if (DPAA_VERSION >= 11)
45781 +    bool                                noScatherGather;
45782 +#endif /* (DPAA_VERSION >= 11) */
45783 +
45784 +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
45785 +    bool                                bcbWorkaround;
45786 +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
45787 +} t_FmPortDriverParam;
45788 +
45789 +
45790 +typedef struct t_FmPortRxPoolsParams
45791 +{
45792 +    uint8_t     numOfPools;
45793 +    uint16_t    secondLargestBufSize;
45794 +    uint16_t    largestBufSize;
45795 +} t_FmPortRxPoolsParams;
45796 +
45797 +typedef struct t_FmPortDsarVars {
45798 +    t_Handle                    *autoResOffsets;
45799 +    t_FmPortDsarTablesSizes     *autoResMaxSizes;
45800 +    uint32_t                    fmbm_tcfg;
45801 +    uint32_t                    fmbm_tcmne;
45802 +    uint32_t                    fmbm_rfne;
45803 +    uint32_t                    fmbm_rfpne;
45804 +    uint32_t                    fmbm_rcfg;
45805 +    bool                        dsarEnabledParser;
45806 +} t_FmPortDsarVars;
45807 +typedef struct {
45808 +    struct fman_port            port;
45809 +    t_Handle                    h_Fm;
45810 +    t_Handle                    h_FmPcd;
45811 +    t_Handle                    h_FmMuram;
45812 +    t_FmRevisionInfo            fmRevInfo;
45813 +    uint8_t                     portId;
45814 +    e_FmPortType                portType;
45815 +    int                         enabled;
45816 +    char                        name[MODULE_NAME_SIZE];
45817 +    uint8_t                     hardwarePortId;
45818 +    uint16_t                    fmClkFreq;
45819 +    t_FmPortQmiRegs             *p_FmPortQmiRegs;
45820 +    u_FmPortBmiRegs             *p_FmPortBmiRegs;
45821 +    t_FmPortPrsRegs             *p_FmPortPrsRegs;
45822 +    fmPcdEngines_t              pcdEngines;
45823 +    uint32_t                    savedBmiNia;
45824 +    uint8_t                     netEnvId;
45825 +    uint32_t                    optArray[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
45826 +    uint32_t                    lcvs[FM_PCD_PRS_NUM_OF_HDRS];
45827 +    uint8_t                     privateInfo;
45828 +    uint32_t                    schemesPerPortVector;
45829 +    bool                        useClsPlan;
45830 +    uint8_t                     clsPlanGrpId;
45831 +    t_Handle                    ccTreeId;
45832 +    t_Handle                    completeArg;
45833 +    void                        (*f_Complete)(t_Handle arg);
45834 +    t_FmSpBufferOffsets         bufferOffsets;
45835 +    /* Independent-Mode parameters support */
45836 +    bool                        imEn;
45837 +    t_FmMacIm                   im;
45838 +    volatile bool               lock;
45839 +    t_Handle                    h_Spinlock;
45840 +    t_FmPortExceptionCallback   *f_Exception;
45841 +    t_Handle                    h_App;
45842 +    uint8_t                     internalBufferOffset;
45843 +    uint8_t                     fmanCtrlEventId;
45844 +    uint32_t                    exceptions;
45845 +    bool                        polling;
45846 +    t_FmExtPools                extBufPools;
45847 +    uint32_t                    requiredAction;
45848 +    uint32_t                    savedQmiPnen;
45849 +    uint32_t                    savedBmiFene;
45850 +    uint32_t                    savedBmiFpne;
45851 +    uint32_t                    savedBmiCmne;
45852 +    uint32_t                    savedBmiOfp;
45853 +    uint32_t                    savedNonRxQmiRegsPndn;
45854 +    uint32_t                    origNonRxQmiRegsPndn;
45855 +    int                         savedPrsStartOffset;
45856 +    bool                        includeInPrsStatistics;
45857 +    uint16_t                    maxFrameLength;
45858 +    t_FmFmanCtrl                orFmanCtrl;
45859 +    t_FmPortRsrc                openDmas;
45860 +    t_FmPortRsrc                tasks;
45861 +    t_FmPortRsrc                fifoBufs;
45862 +    t_FmPortRxPoolsParams       rxPoolsParams;
45863 +//    bool                        explicitUserSizeOfFifo;
45864 +    t_Handle                    h_IpReassemblyManip;
45865 +    t_Handle                    h_CapwapReassemblyManip;
45866 +    t_Handle                    h_ReassemblyTree;
45867 +    uint64_t                    fmMuramPhysBaseAddr;
45868 +#if (DPAA_VERSION >= 11)
45869 +    bool                        vspe;
45870 +    uint8_t                     dfltRelativeId;
45871 +    e_FmPortGprFuncType         gprFunc;
45872 +    t_FmPcdCtrlParamsPage       *p_ParamsPage;
45873 +#endif /* (DPAA_VERSION >= 11) */
45874 +    t_FmPortDsarVars            deepSleepVars;
45875 +    t_FmPortDriverParam         *p_FmPortDriverParam;
45876 +} t_FmPort;
45877 +
45878 +
45879 +void FmPortConfigIM (t_FmPort *p_FmPort, t_FmPortParams *p_FmPortParams);
45880 +t_Error FmPortImCheckInitParameters(t_FmPort *p_FmPort);
45881 +
45882 +t_Error FmPortImInit(t_FmPort *p_FmPort);
45883 +void    FmPortImFree(t_FmPort *p_FmPort);
45884 +
45885 +t_Error FmPortImEnable  (t_FmPort *p_FmPort);
45886 +t_Error FmPortImDisable (t_FmPort *p_FmPort);
45887 +t_Error FmPortImRx      (t_FmPort *p_FmPort);
45888 +
45889 +void    FmPortSetMacsecLcv(t_Handle h_FmPort);
45890 +void    FmPortSetMacsecCmd(t_Handle h_FmPort, uint8_t dfltSci);
45891 +
45892 +
45893 +t_Error FM_PORT_SetNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfOpenDmas);
45894 +t_Error FM_PORT_SetNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks);
45895 +t_Error FM_PORT_SetSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo);
45896 +
45897 +static __inline__ uint8_t * BdBufferGet (t_PhysToVirt *f_PhysToVirt, t_FmImBd *p_Bd)
45898 +{
45899 +    uint64_t    physAddr = (uint64_t)((uint64_t)GET_UINT8(p_Bd->buff.high) << 32);
45900 +    physAddr |= GET_UINT32(p_Bd->buff.low);
45901 +
45902 +    return (uint8_t *)f_PhysToVirt((physAddress_t)(physAddr));
45903 +}
45904 +
45905 +static __inline__ void SET_ADDR(volatile t_FmPhysAddr *fmPhysAddr, uint64_t value)
45906 +{
45907 +    WRITE_UINT8(fmPhysAddr->high,(uint8_t)((value & 0x000000ff00000000LL) >> 32));
45908 +    WRITE_UINT32(fmPhysAddr->low,(uint32_t)value);
45909 +}
45910 +
45911 +static __inline__ void BdBufferSet(t_VirtToPhys *f_VirtToPhys, t_FmImBd *p_Bd, uint8_t *p_Buffer)
45912 +{
45913 +    uint64_t    physAddr = (uint64_t)(f_VirtToPhys(p_Buffer));
45914 +    SET_ADDR(&p_Bd->buff, physAddr);
45915 +}
45916 +
45917 +static __inline__ uint16_t GetNextBdId(t_FmPort *p_FmPort, uint16_t id)
45918 +{
45919 +    if (id < p_FmPort->im.bdRingSize-1)
45920 +        return (uint16_t)(id+1);
45921 +    else
45922 +        return 0;
45923 +}
45924 +
45925 +void FM_PORT_Dsar_DumpRegs(void);
45926 +
45927 +
45928 +#endif /* __FM_PORT_H */
45929 --- /dev/null
45930 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_dsar.h
45931 @@ -0,0 +1,494 @@
45932 +/*
45933 + * Copyright 2008-2012 Freescale Semiconductor Inc.
45934 + *
45935 + * Redistribution and use in source and binary forms, with or without
45936 + * modification, are permitted provided that the following conditions are met:
45937 + *     * Redistributions of source code must retain the above copyright
45938 + *       notice, this list of conditions and the following disclaimer.
45939 + *     * Redistributions in binary form must reproduce the above copyright
45940 + *       notice, this list of conditions and the following disclaimer in the
45941 + *       documentation and/or other materials provided with the distribution.
45942 + *     * Neither the name of Freescale Semiconductor nor the
45943 + *       names of its contributors may be used to endorse or promote products
45944 + *       derived from this software without specific prior written permission.
45945 + *
45946 + *
45947 + * ALTERNATIVELY, this software may be distributed under the terms of the
45948 + * GNU General Public License ("GPL") as published by the Free Software
45949 + * Foundation, either version 2 of that License or (at your option) any
45950 + * later version.
45951 + *
45952 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
45953 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
45954 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
45955 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
45956 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
45957 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45958 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
45959 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
45960 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
45961 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45962 + */
45963 +
45964 +/**************************************************************************//**
45965 + @File          fm_port_dsar.h
45966 +
45967 + @Description   Deep Sleep Auto Response project - common module header file.
45968 +
45969 +                Author - Eyal Harari
45970 +
45971 + @Cautions      See the FMan Controller spec and design document for more information.
45972 +*//***************************************************************************/
45973 +
45974 +#ifndef __FM_PORT_DSAR_H_
45975 +#define __FM_PORT_DSAR_H_
45976 +
45977 +#define DSAR_GETSER_MASK 0xFF0000FF
45978 +
45979 +#if defined(__MWERKS__) && !defined(__GNUC__)
45980 +#pragma pack(push,1)
45981 +#endif /* defined(__MWERKS__) && ... */
45982 +
45983 +/**************************************************************************//**
45984 + @Description   Deep Sleep Auto Response VLAN-IPv4 Binding Table (for ARP/ICMPv4)
45985 +                Refer to the FMan Controller spec for more details.
45986 +*//***************************************************************************/
45987 +typedef _Packed struct
45988 +{
45989 +        uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
45990 +        uint16_t vlanId;   /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
45991 +                                          /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
45992 +        uint16_t reserved;
45993 +} _PackedType t_DsarArpBindingEntry;
45994 +
45995 +/**************************************************************************//**
45996 + @Description   Deep Sleep Auto Response Address Resolution Protocol Statistics Descriptor
45997 +                Refer to the FMan Controller spec for more details.
45998 +                   0x00 INVAL_CNT Invalid ARP IPv4-Ethernet counter
45999 +                   0x04 ECHO_CNT Echo counter
46000 +                   0x08 CD_CNT Conflict Detection counter
46001 +                   0x0C AR_CNT Auto-Response counter
46002 +                   0x10 RATM_CNT Replies Addressed To Me counter
46003 +                   0x14 UKOP_CNT Unknown Operation counter
46004 +                   0x18 NMTP_CNT Not my TPA counter
46005 +                   0x1C NMVLAN_CNT Not My VLAN counter
46006 +*//***************************************************************************/
46007 +typedef _Packed struct
46008 +{
46009 +    uint32_t invalCnt; /**< Invalid ARP IPv4-Ethernet counter. */
46010 +    uint32_t echoCnt;  /**< Echo counter.                                              */
46011 +    uint32_t cdCnt;            /**< Conflict Detection counter.                */
46012 +    uint32_t arCnt;            /**< Auto-Response counter.                             */
46013 +    uint32_t ratmCnt;  /**< Replies Addressed To Me counter.   */
46014 +    uint32_t ukopCnt;  /**< Unknown Operation counter.                 */
46015 +    uint32_t nmtpCnt;  /**< Not my TPA counter.                                */
46016 +    uint32_t nmVlanCnt; /**< Not My VLAN counter                               */
46017 +} _PackedType t_DsarArpStatistics;
46018 +
46019 +
46020 +/**************************************************************************//**
46021 + @Description   Deep Sleep Auto Response Address Resolution Protocol Descriptor
46022 +                0x0 0-15 Control bits [0-15]. Bit 15  = CDEN.
46023 +                0x2 0-15 NumOfBindings Number of entries in the binding list.
46024 +                0x4 0-15 BindingsPointer Bindings Pointer. This points to an IPv4-MAC Addresses Bindings list.
46025 +                0x6 0-15
46026 +                0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ARP Descriptors statistics data structure.
46027 +                0xA 0-15
46028 +                0xC 0-15 Reserved Reserved. Must be cleared.
46029 +                0xE 015
46030 +
46031 +*//***************************************************************************/
46032 +typedef _Packed struct
46033 +{
46034 +    uint16_t control;                       /** Control bits [0-15]. Bit 15  = CDEN */
46035 +    uint16_t numOfBindings;                 /**< Number of VLAN-IPv4 */
46036 +    uint32_t p_Bindings;       /**< VLAN-IPv4 Bindings table pointer. */
46037 +    uint32_t p_Statistics;   /**< Statistics Data Structure pointer. */
46038 +    uint32_t reserved1;                     /**< Reserved. */
46039 +} _PackedType t_DsarArpDescriptor;
46040 +
46041 +
46042 +/**************************************************************************//**
46043 + @Description   Deep Sleep Auto Response VLAN-IPv4 Binding Table (for ARP/ICMPv4)
46044 +                Refer to the FMan Controller spec for more details.
46045 +*//***************************************************************************/
46046 +typedef _Packed struct
46047 +{
46048 +    uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
46049 +       uint16_t vlanId;   /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
46050 +                                          /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
46051 +       uint16_t reserved;
46052 +} _PackedType t_DsarIcmpV4BindingEntry;
46053 +
46054 +/**************************************************************************//**
46055 + @Description   Deep Sleep Auto Response ICMPv4 Statistics Descriptor
46056 +                Refer to the FMan Controller spec for more details.
46057 +                0x00 INVAL_CNT Invalid ICMPv4 header counter
46058 +                0x04 NMVLAN_CNT Not My VLAN counter
46059 +                0x08 NMIP_CNT Not My IP counter
46060 +                0x0C AR_CNT Auto-Response counter
46061 +                0x10 CSERR_CNT Checksum Error counter
46062 +                0x14 Reserved Reserved
46063 +                0x18 Reserved Reserved
46064 +                0x1C Reserved Reserved
46065 +
46066 +*//***************************************************************************/
46067 +typedef _Packed struct
46068 +{
46069 +    uint32_t invalCnt; /**< Invalid ICMPv4 Echo counter. */
46070 +    uint32_t nmVlanCnt;        /**< Not My VLAN counter          */
46071 +    uint32_t nmIpCnt;  /**< Not My IP counter                */
46072 +    uint32_t arCnt;            /**< Auto-Response counter        */
46073 +    uint32_t cserrCnt; /**< Checksum Error counter       */
46074 +    uint32_t reserved0;        /**< Reserved                     */
46075 +    uint32_t reserved1;        /**< Reserved                     */
46076 +    uint32_t reserved2; /**< Reserved                     */
46077 +} _PackedType t_DsarIcmpV4Statistics;
46078 +
46079 +
46080 +
46081 +/**************************************************************************//**
46082 + @Description   Deep Sleep Auto Response ICMPv4 Descriptor
46083 +                0x0 0-15 Control bits [0-15]
46084 +                0x2 0-15 NumOfBindings Number of entries in the binding list.
46085 +                0x4 0-15 BindingsPointer Bindings Pointer. This points to an VLAN-IPv4 Addresses Bindings list.
46086 +                0x6 0-15
46087 +                0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ICMPv4 statistics data structure.
46088 +                0xA 0-15
46089 +                0xC 0-15 Reserved Reserved. Must be cleared.
46090 +                0xE 015
46091 +
46092 +*//***************************************************************************/
46093 +typedef _Packed struct
46094 +{
46095 +    uint16_t control;                       /** Control bits [0-15].                */
46096 +    uint16_t numOfBindings;                 /**< Number of VLAN-IPv4                */
46097 +    uint32_t p_Bindings;       /**< VLAN-IPv4 Bindings table pointer.  */
46098 +    uint32_t p_Statistics;   /**< Statistics Data Structure pointer. */
46099 +    uint32_t reserved1;                     /**< Reserved.                          */
46100 +} _PackedType t_DsarIcmpV4Descriptor;
46101 +
46102 +/**************************************************************************//**
46103 + @Description   Deep Sleep Auto Response VLAN-IPv4 Binding Table (for ARP/ICMPv4)
46104 +                The 4 left-most bits (15:12) of the VlanId parameter are control flags.
46105 +                Flags[3:1] (VlanId[15:13]): Reserved, should be cleared.
46106 +                Flags[0] (VlanId[12]): Temporary address.
46107 +                \95 0 - Assigned IP address.
46108 +                \95 1- Temporary (tentative) IP address.
46109 +                Refer to the FMan Controller spec for more details.
46110 +*//***************************************************************************/
46111 +typedef _Packed struct
46112 +{
46113 +    uint32_t ipv6Addr[4];  /*!< 3 * 32 bit IPv4 Address.                                                    */
46114 +       uint16_t resFlags:4;   /*!< reserved flags. should be cleared                                           */
46115 +       uint16_t vlanId:12;    /*!< 12 bits VLAN ID.                                                            */
46116 +                                              /*!< This field should be 0x000 for an entry with no VLAN tag or a null VLAN ID. */
46117 +       uint16_t reserved;
46118 +} _PackedType t_DsarIcmpV6BindingEntry;
46119 +
46120 +/**************************************************************************//**
46121 + @Description   Deep Sleep Auto Response ICMPv4 Statistics Descriptor
46122 +                Refer to the FMan Controller spec for more details.
46123 +                0x00 INVAL_CNT Invalid ICMPv4 header counter
46124 +                0x04 NMVLAN_CNT Not My VLAN counter
46125 +                0x08 NMIP_CNT Not My IP counter
46126 +                0x0C AR_CNT Auto-Response counter
46127 +                0x10 CSERR_CNT Checksum Error counter
46128 +                0x14 MCAST_CNT Multicast counter
46129 +                0x18 Reserved Reserved
46130 +                0x1C Reserved Reserved
46131 +
46132 +*//***************************************************************************/
46133 +typedef _Packed struct
46134 +{
46135 +    uint32_t invalCnt; /**< Invalid ICMPv4 Echo counter. */
46136 +    uint32_t nmVlanCnt;        /**< Not My VLAN counter          */
46137 +    uint32_t nmIpCnt;  /**< Not My IP counter                */
46138 +    uint32_t arCnt;            /**< Auto-Response counter        */
46139 +    uint32_t reserved1;        /**< Reserved                     */
46140 +    uint32_t reserved2; /**< Reserved                     */
46141 +    uint32_t reserved3;        /**< Reserved                     */
46142 +    uint32_t reserved4; /**< Reserved                     */
46143 +} _PackedType t_DsarIcmpV6Statistics;
46144 +
46145 +/**************************************************************************//**
46146 + @Description   Deep Sleep Auto Response Neighbor Discovery Statistics Descriptor
46147 +                0x00 INVAL_CNT Invalid Neighbor Discovery message counter
46148 +                0x04 NMVLAN_CNT Not My VLAN counter
46149 +                0x08 NMIP_CNT Not My IP counter
46150 +                0x0C AR_CNT Auto-Response counter
46151 +                0x10 CSERR_CNT Checksum Error counter
46152 +                0x14 USADVERT_CNT Unsolicited Neighbor Advertisements counter
46153 +                0x18 NMMCAST_CNT Not My Multicast group counter
46154 +                0x1C NSLLA_CNT No Source Link-Layer Address counter. Indicates that there was a match on a Target
46155 +                     Address of a packet that its source IP address is a unicast address, but the ICMPv6
46156 +                     Source Link-layer Address option is omitted
46157 +*//***************************************************************************/
46158 +typedef _Packed struct
46159 +{
46160 +    uint32_t invalCnt;   /**< Invalid ICMPv4 Echo counter.                */
46161 +    uint32_t nmVlanCnt;          /**< Not My VLAN counter                         */
46162 +    uint32_t nmIpCnt;    /**< Not My IP counter                                   */
46163 +    uint32_t arCnt;              /**< Auto-Response counter                       */
46164 +    uint32_t reserved1;          /**< Reserved                                    */
46165 +    uint32_t usadvertCnt; /**< Unsolicited Neighbor Advertisements counter */
46166 +    uint32_t nmmcastCnt;  /**< Not My Multicast group counter              */
46167 +    uint32_t nsllaCnt;    /**< No Source Link-Layer Address counter        */
46168 +} _PackedType t_NdStatistics;
46169 +
46170 +/**************************************************************************//**
46171 + @Description   Deep Sleep Auto Response ICMPv6 Descriptor
46172 +                0x0 0-15 Control bits [0-15]
46173 +                0x2 0-15 NumOfBindings Number of entries in the binding list.
46174 +                0x4 0-15 BindingsPointer Bindings Pointer. This points to an VLAN-IPv4 Addresses Bindings list.
46175 +                0x6 0-15
46176 +                0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ICMPv4 statistics data structure.
46177 +                0xA 0-15
46178 +                0xC 0-15 Reserved Reserved. Must be cleared.
46179 +                0xE 015
46180 +
46181 +*//***************************************************************************/
46182 +typedef _Packed struct
46183 +{
46184 +    uint16_t control;                       /** Control bits [0-15].                */
46185 +    uint16_t numOfBindings;                 /**< Number of VLAN-IPv6                */
46186 +    uint32_t p_Bindings;       /**< VLAN-IPv4 Bindings table pointer.  */
46187 +    uint32_t p_Statistics;   /**< Statistics Data Structure pointer. */
46188 +       uint32_t reserved1;                     /**< Reserved.                          */
46189 +} _PackedType t_DsarIcmpV6Descriptor;
46190 +
46191 +
46192 +/**************************************************************************//**
46193 + @Description   Internet Control Message Protocol (ICMPv6) Echo message header
46194 +                The fields names are taken from RFC 4443.
46195 +*//***************************************************************************/
46196 +/* 0                   1                   2                   3     */
46197 +/* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1   */
46198 +/* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */
46199 +/* |     Type      |     Code      |          Checksum             | */
46200 +/* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */
46201 +/* |           Identifier          |        Sequence Number        | */
46202 +/* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */
46203 +/* |     Data ...                                                    */
46204 +/* +-+-+-+-+-                                                        */
46205 +typedef _Packed struct
46206 +{
46207 +       uint8_t  type;
46208 +       uint8_t  code;
46209 +       uint16_t checksum;
46210 +       uint16_t identifier;
46211 +       uint16_t sequenceNumber;
46212 +} _PackedType t_IcmpV6EchoHdr;
46213 +
46214 +/**************************************************************************//**
46215 + @Description   Internet Control Message Protocol (ICMPv6)
46216 +                Neighbor Solicitation/Advertisement header
46217 +                The fields names are taken from RFC 4861.
46218 +                The R/S/O fields are valid for Neighbor Advertisement only
46219 +*//***************************************************************************/
46220 +/* 0                   1                   2                   3
46221 + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
46222 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46223 + * |     Type      |     Code      |          Checksum             |
46224 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46225 + * |R|S|O|                     Reserved                            |
46226 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46227 + * |                                                               |
46228 + * +                                                               +
46229 + * |                                                               |
46230 + * +                       Target Address                          +
46231 + * |                                                               |
46232 + * +                                                               +
46233 + * |                                                               |
46234 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46235 + * |   Options ...
46236 + * +-+-+-+-+-+-+-+-+-+-+-+-
46237 + *
46238 + * Options Format:
46239 + * 0                   1                   2                   3
46240 + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
46241 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46242 + * |     Type      |    Length     |   Link-Layer Address ...      |
46243 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46244 + * |                  Link-Layer Address                           |
46245 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
46246 +*/
46247 +typedef _Packed struct
46248 +{
46249 +       uint8_t  type;
46250 +       uint8_t  code;
46251 +       uint16_t checksum;
46252 +       uint32_t router:1;
46253 +       uint32_t solicited:1;
46254 +       uint32_t override:1;
46255 +       uint32_t reserved:29;
46256 +       uint32_t targetAddr[4];
46257 +       uint8_t  optionType;
46258 +       uint8_t  optionLength;
46259 +       uint8_t  linkLayerAddr[6];
46260 +} _PackedType t_IcmpV6NdHdr;
46261 +
46262 +/**************************************************************************//**
46263 + @Description   Deep Sleep Auto Response ICMPv6 Descriptor
46264 +                0x0 0-15 Control bits [0-15]
46265 +                0x2 0-15 NumOfBindings Number of entries in the binding list.
46266 +                0x4 0-15 BindingsPointer Bindings Pointer. This points to an VLAN-IPv4 Addresses Bindings list.
46267 +                0x6 0-15
46268 +                0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ICMPv4 statistics data structure.
46269 +                0xA 0-15
46270 +                0xC 0-15 Reserved Reserved. Must be cleared.
46271 +                0xE 015
46272 +
46273 +*//***************************************************************************/
46274 +typedef _Packed struct
46275 +{
46276 +    uint16_t control;                       /** Control bits [0-15].                    */
46277 +    uint16_t numOfBindings;                 /**< Number of VLAN-IPv6                    */
46278 +    uint32_t p_Bindings;       /**< VLAN-IPv4 Bindings table pointer.      */
46279 +    uint32_t p_Statistics;   /**< Statistics Data Structure pointer.     */
46280 +       uint32_t solicitedAddr;                 /**< Solicited Node Multicast Group Address */
46281 +} _PackedType t_DsarNdDescriptor;
46282 +
46283 +/**************************************************************************//**
46284 +@Description    Deep Sleep Auto Response SNMP OIDs table entry
46285 +
46286 +*//***************************************************************************/
46287 +typedef struct {
46288 +    uint16_t oidSize;     /**< Size in octets of the OID. */
46289 +    uint16_t resSize;     /**< Size in octets of the value that is attached to the OID. */
46290 +    uint32_t p_Oid;       /**< Pointer to the OID. OID is encoded in BER but type and length are excluded. */
46291 +    uint32_t resValOrPtr; /**< Value (for up to 4 octets) or pointer to the Value. Encoded in BER. */
46292 +    uint32_t reserved;
46293 +} t_OidsTblEntry;
46294 +
46295 +/**************************************************************************//**
46296 + @Description   Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry
46297 +                Refer to the FMan Controller spec for more details.
46298 +*//***************************************************************************/
46299 +typedef struct
46300 +{
46301 +    uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
46302 +    uint16_t vlanId;   /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
46303 +                       /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
46304 +    uint16_t reserved;
46305 +} t_DsarSnmpIpv4AddrTblEntry;
46306 +
46307 +/**************************************************************************//**
46308 + @Description   Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry
46309 +                Refer to the FMan Controller spec for more details.
46310 +*//***************************************************************************/
46311 +#pragma pack(push,1)
46312 +typedef struct
46313 +{
46314 +    uint32_t ipv6Addr[4];  /*!< 4 * 32 bit IPv6 Address.                                                     */
46315 +    uint16_t vlanId;       /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
46316 +                           /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
46317 +    uint16_t reserved;
46318 +} t_DsarSnmpIpv6AddrTblEntry;
46319 +#pragma pack(pop)
46320 +
46321 +/**************************************************************************//**
46322 +@Description    Deep Sleep Auto Response SNMP statistics table
46323 +
46324 +*//***************************************************************************/
46325 +typedef struct {
46326 +    uint32_t snmpErrCnt;  /**< Counts SNMP errors (wrong version, BER encoding, format). */
46327 +    uint32_t snmpCommunityErrCnt; /**< Counts messages that were dropped due to insufficient permission. */
46328 +    uint32_t snmpTotalDiscardCnt; /**< Counts any message that was dropped. */
46329 +    uint32_t snmpGetReqCnt; /**< Counts the number of get-request messages */
46330 +    uint32_t snmpGetNextReqCnt; /**< Counts the number of get-next-request messages */
46331 +} t_DsarSnmpStatistics;
46332 +
46333 +/**************************************************************************//**
46334 + @Description   Deep Sleep Auto Response SNMP Descriptor
46335 +
46336 +*//***************************************************************************/
46337 +typedef struct
46338 +{
46339 +    uint16_t control;                          /**< Control bits [0-15]. */
46340 +    uint16_t maxSnmpMsgLength;                 /**< Maximal allowed SNMP message length. */
46341 +    uint16_t numOfIpv4Addresses;               /**< Number of entries in IPv4 addresses table. */
46342 +    uint16_t numOfIpv6Addresses;               /**< Number of entries in IPv6 addresses table. */
46343 +    uint32_t p_Ipv4AddrTbl; /**< Pointer to IPv4 addresses table. */
46344 +    uint32_t p_Ipv6AddrTbl; /**< Pointer to IPv6 addresses table. */
46345 +    uint32_t p_RdOnlyCommunityStr;             /**< Pointer to the Read Only Community String. */
46346 +    uint32_t p_RdWrCommunityStr;               /**< Pointer to the Read Write Community String. */
46347 +    uint32_t p_OidsTbl;                 /**< Pointer to OIDs table. */
46348 +    uint32_t oidsTblSize;                      /**< Number of entries in OIDs table. */
46349 +    uint32_t p_Statistics;                 /**< Pointer to SNMP statistics table. */
46350 +} t_DsarSnmpDescriptor;
46351 +
46352 +/**************************************************************************//**
46353 +@Description    Deep Sleep Auto Response (Common) Statistics
46354 +
46355 +*//***************************************************************************/
46356 +typedef _Packed struct {
46357 +       uint32_t dsarDiscarded;
46358 +       uint32_t dsarErrDiscarded;
46359 +       uint32_t dsarFragDiscarded;
46360 +       uint32_t dsarTunnelDiscarded;
46361 +       uint32_t dsarArpDiscarded;
46362 +       uint32_t dsarIpDiscarded;
46363 +       uint32_t dsarTcpDiscarded;
46364 +       uint32_t dsarUdpDiscarded;
46365 +       uint32_t dsarIcmpV6ChecksumErr; /* ICMPv6 Checksum Error counter */
46366 +       uint32_t dsarIcmpV6OtherType;   /* ICMPv6 'Other' type (not Echo or Neighbor Solicitaion/Advertisement counter */
46367 +       uint32_t dsarIcmpV4OtherType;   /* ICMPv4 'Other' type (not Echo) counter */
46368 +} _PackedType t_ArStatistics;
46369 +
46370 +
46371 +/**************************************************************************//**
46372 +@Description    Deep Sleep Auto Response TCP/UDP port filter table entry
46373 +
46374 +*//***************************************************************************/
46375 +typedef _Packed struct {
46376 +       uint32_t        Ports;
46377 +       uint32_t        PortsMask;
46378 +} _PackedType t_PortTblEntry;
46379 +
46380 +
46381 +
46382 +/**************************************************************************//**
46383 +@Description    Deep Sleep Auto Response Common Parameters Descriptor
46384 +
46385 +*//***************************************************************************/
46386 +typedef _Packed struct {
46387 +       uint8_t   arTxPort;            /* 0x00 0-7 Auto Response Transmit Port number            */
46388 +       uint8_t   controlBits;         /* 0x00 8-15 Auto Response control bits                   */
46389 +       uint16_t  res1;                /* 0x00 16-31 Reserved                                    */
46390 +       uint32_t  activeHPNIA;         /* 0x04 0-31 Active mode Hardware Parser NIA              */
46391 +       uint16_t  snmpPort;            /* 0x08 0-15 SNMP Port.                                   */
46392 +       uint8_t   macStationAddr[6];   /* 0x08 16-31 and 0x0C 0-31 MAC Station Address           */
46393 +       uint8_t   res2;                            /* 0x10 0-7 Reserved                                                                  */
46394 +       uint8_t   filterControl;       /* 0x10 8-15 Filtering Control Bits.                      */
46395 +       uint16_t   tcpControlPass;         /* 0x10 16-31 TCP control pass flags                                      */
46396 +       uint8_t   ipProtocolTblSize;   /* 0x14 0-7 IP Protocol Table Size.                       */
46397 +       uint8_t   udpPortTblSize;      /* 0x14 8-15 UDP Port Table Size.                         */
46398 +       uint8_t   tcpPortTblSize;      /* 0x14 16-23 TCP Port Table Size.                        */
46399 +       uint8_t   res3;                /* 0x14 24-31 Reserved                                    */
46400 +       uint32_t  p_IpProtocolFiltTbl; /* 0x18 0-31 Pointer to IP Protocol Filter Table          */
46401 +       uint32_t p_UdpPortFiltTbl; /* 0x1C 0-31 Pointer to UDP Port Filter Table          */
46402 +       uint32_t p_TcpPortFiltTbl; /* 0x20 0-31 Pointer to TCP Port Filter Table          */
46403 +       uint32_t res4;                 /* 0x24 Reserved                                          */
46404 +       uint32_t p_ArpDescriptor;     /* 0x28 0-31 ARP Descriptor Pointer.                      */
46405 +       uint32_t p_NdDescriptor;      /* 0x2C 0-31 Neighbor Discovery Descriptor.               */
46406 +       uint32_t p_IcmpV4Descriptor;  /* 0x30 0-31 ICMPv4 Descriptor pointer.                   */
46407 +       uint32_t p_IcmpV6Descriptor;  /* 0x34 0-31 ICMPv6 Descriptor pointer.                   */
46408 +       uint32_t p_SnmpDescriptor;    /* 0x38 0-31 SNMP Descriptor pointer.                     */
46409 +       uint32_t p_ArStats;     /* 0x3C 0-31 Pointer to Auto Response Statistics          */
46410 +} _PackedType t_ArCommonDesc;
46411 +
46412 +#if defined(__MWERKS__) && !defined(__GNUC__)
46413 +#pragma pack(pop)
46414 +#endif /* defined(__MWERKS__) && ... */
46415 +
46416 +/* t_ArCommonDesc.filterControl bits */
46417 +#define        IP_PROT_TBL_PASS_MASK   0x08
46418 +#define UDP_PORT_TBL_PASS_MASK 0x04
46419 +#define TCP_PORT_TBL_PASS_MASK 0x02
46420 +
46421 +/* Offset of TCF flags within TCP packet */
46422 +#define TCP_FLAGS_OFFSET 12
46423 +
46424 +
46425 +#endif /* __FM_PORT_DSAR_H_ */
46426 --- /dev/null
46427 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_im.c
46428 @@ -0,0 +1,753 @@
46429 +/*
46430 + * Copyright 2008-2012 Freescale Semiconductor Inc.
46431 + *
46432 + * Redistribution and use in source and binary forms, with or without
46433 + * modification, are permitted provided that the following conditions are met:
46434 + *     * Redistributions of source code must retain the above copyright
46435 + *       notice, this list of conditions and the following disclaimer.
46436 + *     * Redistributions in binary form must reproduce the above copyright
46437 + *       notice, this list of conditions and the following disclaimer in the
46438 + *       documentation and/or other materials provided with the distribution.
46439 + *     * Neither the name of Freescale Semiconductor nor the
46440 + *       names of its contributors may be used to endorse or promote products
46441 + *       derived from this software without specific prior written permission.
46442 + *
46443 + *
46444 + * ALTERNATIVELY, this software may be distributed under the terms of the
46445 + * GNU General Public License ("GPL") as published by the Free Software
46446 + * Foundation, either version 2 of that License or (at your option) any
46447 + * later version.
46448 + *
46449 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
46450 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
46451 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
46452 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
46453 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
46454 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
46455 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
46456 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46457 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
46458 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46459 + */
46460 +
46461 +
46462 +/******************************************************************************
46463 + @File          fm_port_im.c
46464 +
46465 + @Description   FM Port Independent-Mode ...
46466 +*//***************************************************************************/
46467 +#include "std_ext.h"
46468 +#include "string_ext.h"
46469 +#include "error_ext.h"
46470 +#include "memcpy_ext.h"
46471 +#include "fm_muram_ext.h"
46472 +
46473 +#include "fm_port.h"
46474 +
46475 +
46476 +#define TX_CONF_STATUS_UNSENT 0x1
46477 +
46478 +
46479 +typedef enum e_TxConfType
46480 +{
46481 +     e_TX_CONF_TYPE_CHECK      = 0  /**< check if all the buffers were touched by the muxator, no confirmation callback */
46482 +    ,e_TX_CONF_TYPE_CALLBACK   = 1  /**< confirm to user all the available sent buffers */
46483 +    ,e_TX_CONF_TYPE_FLUSH      = 3  /**< confirm all buffers plus the unsent one with an appropriate status */
46484 +} e_TxConfType;
46485 +
46486 +
46487 +static void ImException(t_Handle h_FmPort, uint32_t event)
46488 +{
46489 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
46490 +
46491 +    ASSERT_COND(((event & (IM_EV_RX | IM_EV_BSY)) && FmIsMaster(p_FmPort->h_Fm)) ||
46492 +                !FmIsMaster(p_FmPort->h_Fm));
46493 +
46494 +    if (event & IM_EV_RX)
46495 +        FmPortImRx(p_FmPort);
46496 +    if ((event & IM_EV_BSY) && p_FmPort->f_Exception)
46497 +        p_FmPort->f_Exception(p_FmPort->h_App, e_FM_PORT_EXCEPTION_IM_BUSY);
46498 +}
46499 +
46500 +
46501 +static t_Error TxConf(t_FmPort *p_FmPort, e_TxConfType confType)
46502 +{
46503 +    t_Error             retVal = E_BUSY;
46504 +    uint32_t            bdStatus;
46505 +    uint16_t            savedStartBdId, confBdId;
46506 +
46507 +    ASSERT_COND(p_FmPort);
46508 +
46509 +    /*
46510 +    if (confType==e_TX_CONF_TYPE_CHECK)
46511 +        return (WfqEntryIsQueueEmpty(p_FmPort->im.h_WfqEntry) ? E_OK : E_BUSY);
46512 +    */
46513 +
46514 +    confBdId = savedStartBdId = p_FmPort->im.currBdId;
46515 +    bdStatus = BD_STATUS_AND_LENGTH(BD_GET(confBdId));
46516 +
46517 +    /* If R bit is set, we don't enter, or we break.
46518 +       we run till we get to R, or complete the loop */
46519 +    while ((!(bdStatus & BD_R_E) || (confType == e_TX_CONF_TYPE_FLUSH)) && (retVal != E_OK))
46520 +    {
46521 +        if (confType & e_TX_CONF_TYPE_CALLBACK) /* if it is confirmation with user callbacks */
46522 +            BD_STATUS_AND_LENGTH_SET(BD_GET(confBdId), 0);
46523 +
46524 +        /* case 1: R bit is 0 and Length is set -> confirm! */
46525 +        if ((confType & e_TX_CONF_TYPE_CALLBACK) && (bdStatus & BD_LENGTH_MASK))
46526 +        {
46527 +            if (p_FmPort->im.f_TxConf)
46528 +            {
46529 +                if ((confType == e_TX_CONF_TYPE_FLUSH) && (bdStatus & BD_R_E))
46530 +                    p_FmPort->im.f_TxConf(p_FmPort->h_App,
46531 +                                          BdBufferGet(XX_PhysToVirt, BD_GET(confBdId)),
46532 +                                          TX_CONF_STATUS_UNSENT,
46533 +                                          p_FmPort->im.p_BdShadow[confBdId]);
46534 +                else
46535 +                    p_FmPort->im.f_TxConf(p_FmPort->h_App,
46536 +                                          BdBufferGet(XX_PhysToVirt, BD_GET(confBdId)),
46537 +                                          0,
46538 +                                          p_FmPort->im.p_BdShadow[confBdId]);
46539 +            }
46540 +        }
46541 +        /* case 2: R bit is 0 and Length is 0 -> not used yet, nop! */
46542 +
46543 +        confBdId = GetNextBdId(p_FmPort, confBdId);
46544 +        if (confBdId == savedStartBdId)
46545 +            retVal = E_OK;
46546 +        bdStatus = BD_STATUS_AND_LENGTH(BD_GET(confBdId));
46547 +    }
46548 +
46549 +    return retVal;
46550 +}
46551 +
46552 +t_Error FmPortImEnable(t_FmPort *p_FmPort)
46553 +{
46554 +    uint32_t    tmpReg = GET_UINT32(p_FmPort->im.p_FmPortImPram->mode);
46555 +    WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, (uint32_t)(tmpReg & ~IM_MODE_GRC_STP));
46556 +    return E_OK;
46557 +}
46558 +
46559 +t_Error FmPortImDisable(t_FmPort *p_FmPort)
46560 +{
46561 +    uint32_t    tmpReg = GET_UINT32(p_FmPort->im.p_FmPortImPram->mode);
46562 +    WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, (uint32_t)(tmpReg | IM_MODE_GRC_STP));
46563 +    return E_OK;
46564 +}
46565 +
46566 +t_Error FmPortImRx(t_FmPort *p_FmPort)
46567 +{
46568 +    t_Handle                h_CurrUserPriv, h_NewUserPriv;
46569 +    uint32_t                bdStatus;
46570 +    volatile uint8_t        buffPos;
46571 +    uint16_t                length;
46572 +    uint16_t                errors;
46573 +    uint8_t                 *p_CurData, *p_Data;
46574 +    uint32_t                flags;
46575 +
46576 +    ASSERT_COND(p_FmPort);
46577 +
46578 +    flags = XX_LockIntrSpinlock(p_FmPort->h_Spinlock);
46579 +    if (p_FmPort->lock)
46580 +    {
46581 +        XX_UnlockIntrSpinlock(p_FmPort->h_Spinlock, flags);
46582 +        return E_OK;
46583 +    }
46584 +    p_FmPort->lock = TRUE;
46585 +    XX_UnlockIntrSpinlock(p_FmPort->h_Spinlock, flags);
46586 +
46587 +    bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
46588 +
46589 +    while (!(bdStatus & BD_R_E)) /* while there is data in the Rx BD */
46590 +    {
46591 +        if ((p_Data = p_FmPort->im.rxPool.f_GetBuf(p_FmPort->im.rxPool.h_BufferPool, &h_NewUserPriv)) == NULL)
46592 +        {
46593 +            p_FmPort->lock = FALSE;
46594 +            RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Data buffer"));
46595 +        }
46596 +
46597 +        if (p_FmPort->im.firstBdOfFrameId == IM_ILEGAL_BD_ID)
46598 +            p_FmPort->im.firstBdOfFrameId = p_FmPort->im.currBdId;
46599 +
46600 +        p_CurData = BdBufferGet(p_FmPort->im.rxPool.f_PhysToVirt, BD_GET(p_FmPort->im.currBdId));
46601 +        h_CurrUserPriv = p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId];
46602 +        length = (uint16_t)((bdStatus & BD_L) ?
46603 +                            ((bdStatus & BD_LENGTH_MASK) - p_FmPort->im.rxFrameAccumLength):
46604 +                            (bdStatus & BD_LENGTH_MASK));
46605 +        p_FmPort->im.rxFrameAccumLength += length;
46606 +
46607 +        /* determine whether buffer is first, last, first and last (single  */
46608 +        /* buffer frame) or middle (not first and not last)                 */
46609 +        buffPos = (uint8_t)((p_FmPort->im.currBdId == p_FmPort->im.firstBdOfFrameId) ?
46610 +                            ((bdStatus & BD_L) ? SINGLE_BUF : FIRST_BUF) :
46611 +                            ((bdStatus & BD_L) ? LAST_BUF : MIDDLE_BUF));
46612 +
46613 +        if (bdStatus & BD_L)
46614 +        {
46615 +            p_FmPort->im.rxFrameAccumLength = 0;
46616 +            p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
46617 +        }
46618 +
46619 +        BdBufferSet(p_FmPort->im.rxPool.f_VirtToPhys, BD_GET(p_FmPort->im.currBdId), p_Data);
46620 +
46621 +        BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.currBdId), BD_R_E);
46622 +
46623 +        errors = (uint16_t)((bdStatus & BD_RX_ERRORS) >> 16);
46624 +        p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId] = h_NewUserPriv;
46625 +
46626 +        p_FmPort->im.currBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
46627 +        WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.offsetOut, (uint16_t)(p_FmPort->im.currBdId<<4));
46628 +        /* Pass the buffer if one of the conditions is true:
46629 +        - There are no errors
46630 +        - This is a part of a larger frame ( the application has already received some buffers ) */
46631 +        if ((buffPos != SINGLE_BUF) || !errors)
46632 +        {
46633 +            if (p_FmPort->im.f_RxStore(p_FmPort->h_App,
46634 +                                       p_CurData,
46635 +                                       length,
46636 +                                       errors,
46637 +                                       buffPos,
46638 +                                       h_CurrUserPriv) == e_RX_STORE_RESPONSE_PAUSE)
46639 +                break;
46640 +        }
46641 +        else if (p_FmPort->im.rxPool.f_PutBuf(p_FmPort->im.rxPool.h_BufferPool,
46642 +                                              p_CurData,
46643 +                                              h_CurrUserPriv))
46644 +        {
46645 +            p_FmPort->lock = FALSE;
46646 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Failed freeing data buffer"));
46647 +        }
46648 +
46649 +        bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
46650 +    }
46651 +    p_FmPort->lock = FALSE;
46652 +    return E_OK;
46653 +}
46654 +
46655 +void FmPortConfigIM (t_FmPort *p_FmPort, t_FmPortParams *p_FmPortParams)
46656 +{
46657 +    ASSERT_COND(p_FmPort);
46658 +
46659 +    SANITY_CHECK_RETURN(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
46660 +
46661 +    p_FmPort->im.h_FmMuram                      = p_FmPortParams->specificParams.imRxTxParams.h_FmMuram;
46662 +    p_FmPort->p_FmPortDriverParam->liodnOffset  = p_FmPortParams->specificParams.imRxTxParams.liodnOffset;
46663 +    p_FmPort->im.dataMemId                      = p_FmPortParams->specificParams.imRxTxParams.dataMemId;
46664 +    p_FmPort->im.dataMemAttributes              = p_FmPortParams->specificParams.imRxTxParams.dataMemAttributes;
46665 +
46666 +    p_FmPort->im.fwExtStructsMemId              = DEFAULT_PORT_ImfwExtStructsMemId;
46667 +    p_FmPort->im.fwExtStructsMemAttr            = DEFAULT_PORT_ImfwExtStructsMemAttr;
46668 +
46669 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
46670 +        (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
46671 +    {
46672 +        p_FmPort->im.rxPool.h_BufferPool    = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.h_BufferPool;
46673 +        p_FmPort->im.rxPool.f_GetBuf        = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_GetBuf;
46674 +        p_FmPort->im.rxPool.f_PutBuf        = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_PutBuf;
46675 +        p_FmPort->im.rxPool.bufferSize      = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.bufferSize;
46676 +        p_FmPort->im.rxPool.f_PhysToVirt    = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_PhysToVirt;
46677 +        if (!p_FmPort->im.rxPool.f_PhysToVirt)
46678 +            p_FmPort->im.rxPool.f_PhysToVirt = XX_PhysToVirt;
46679 +        p_FmPort->im.rxPool.f_VirtToPhys    = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_VirtToPhys;
46680 +        if (!p_FmPort->im.rxPool.f_VirtToPhys)
46681 +            p_FmPort->im.rxPool.f_VirtToPhys = XX_VirtToPhys;
46682 +        p_FmPort->im.f_RxStore              = p_FmPortParams->specificParams.imRxTxParams.f_RxStore;
46683 +
46684 +        p_FmPort->im.mrblr                  = 0x8000;
46685 +        while (p_FmPort->im.mrblr)
46686 +        {
46687 +            if (p_FmPort->im.rxPool.bufferSize & p_FmPort->im.mrblr)
46688 +                break;
46689 +            p_FmPort->im.mrblr >>= 1;
46690 +        }
46691 +        if (p_FmPort->im.mrblr != p_FmPort->im.rxPool.bufferSize)
46692 +            DBG(WARNING, ("Max-Rx-Buffer-Length set to %d", p_FmPort->im.mrblr));
46693 +        p_FmPort->im.bdRingSize             = DEFAULT_PORT_rxBdRingLength;
46694 +        p_FmPort->exceptions                = DEFAULT_PORT_exception;
46695 +        if (FmIsMaster(p_FmPort->h_Fm))
46696 +            p_FmPort->polling               = FALSE;
46697 +        else
46698 +            p_FmPort->polling               = TRUE;
46699 +        p_FmPort->fmanCtrlEventId           = (uint8_t)NO_IRQ;
46700 +    }
46701 +    else
46702 +    {
46703 +        p_FmPort->im.f_TxConf               = p_FmPortParams->specificParams.imRxTxParams.f_TxConf;
46704 +
46705 +        p_FmPort->im.bdRingSize             = DEFAULT_PORT_txBdRingLength;
46706 +    }
46707 +}
46708 +
46709 +t_Error FmPortImCheckInitParameters(t_FmPort *p_FmPort)
46710 +{
46711 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX) &&
46712 +        (p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) &&
46713 +        (p_FmPort->portType != e_FM_PORT_TYPE_TX) &&
46714 +        (p_FmPort->portType != e_FM_PORT_TYPE_TX_10G))
46715 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
46716 +
46717 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
46718 +        (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
46719 +    {
46720 +        if (!POWER_OF_2(p_FmPort->im.mrblr))
46721 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("max Rx buffer length must be power of 2!!!"));
46722 +        if (p_FmPort->im.mrblr < 256)
46723 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("max Rx buffer length must at least 256!!!"));
46724 +        if (p_FmPort->p_FmPortDriverParam->liodnOffset & ~FM_LIODN_OFFSET_MASK)
46725 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("liodnOffset is larger than %d", FM_LIODN_OFFSET_MASK+1));
46726 +    }
46727 +
46728 +    return E_OK;
46729 +}
46730 +
46731 +t_Error FmPortImInit(t_FmPort *p_FmPort)
46732 +{
46733 +    t_FmImBd    *p_Bd=NULL;
46734 +    t_Handle    h_BufContext;
46735 +    uint64_t    tmpPhysBase;
46736 +    uint16_t    log2Num;
46737 +    uint8_t     *p_Data/*, *p_Tmp*/;
46738 +    int         i;
46739 +    t_Error     err;
46740 +    uint16_t    tmpReg16;
46741 +    uint32_t    tmpReg32;
46742 +
46743 +    ASSERT_COND(p_FmPort);
46744 +
46745 +    p_FmPort->im.p_FmPortImPram =
46746 +        (t_FmPortImPram *)FM_MURAM_AllocMem(p_FmPort->im.h_FmMuram, sizeof(t_FmPortImPram), IM_PRAM_ALIGN);
46747 +    if (!p_FmPort->im.p_FmPortImPram)
46748 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Parameter-RAM!!!"));
46749 +    WRITE_BLOCK(p_FmPort->im.p_FmPortImPram, 0, sizeof(t_FmPortImPram));
46750 +
46751 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
46752 +        (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
46753 +    {
46754 +        p_FmPort->im.p_BdRing =
46755 +            (t_FmImBd *)XX_MallocSmart((uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize),
46756 +                                       p_FmPort->im.fwExtStructsMemId,
46757 +                                       4);
46758 +        if (!p_FmPort->im.p_BdRing)
46759 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Rx BD ring!!!"));
46760 +        IOMemSet32(p_FmPort->im.p_BdRing, 0, (uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
46761 +
46762 +        p_FmPort->im.p_BdShadow = (t_Handle *)XX_Malloc((uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
46763 +        if (!p_FmPort->im.p_BdShadow)
46764 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Rx BD shadow!!!"));
46765 +        memset(p_FmPort->im.p_BdShadow, 0, (uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
46766 +
46767 +        /* Initialize the Rx-BD ring */
46768 +        for (i=0; i<p_FmPort->im.bdRingSize; i++)
46769 +        {
46770 +            p_Bd = BD_GET(i);
46771 +            BD_STATUS_AND_LENGTH_SET (p_Bd, BD_R_E);
46772 +
46773 +            if ((p_Data = p_FmPort->im.rxPool.f_GetBuf(p_FmPort->im.rxPool.h_BufferPool, &h_BufContext)) == NULL)
46774 +                RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Data buffer"));
46775 +            BdBufferSet(p_FmPort->im.rxPool.f_VirtToPhys, p_Bd, p_Data);
46776 +            p_FmPort->im.p_BdShadow[i] = h_BufContext;
46777 +        }
46778 +
46779 +        if ((p_FmPort->im.dataMemAttributes & MEMORY_ATTR_CACHEABLE) ||
46780 +            (p_FmPort->im.fwExtStructsMemAttr & MEMORY_ATTR_CACHEABLE))
46781 +            WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_GBL | IM_MODE_SET_BO(2));
46782 +        else
46783 +            WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_SET_BO(2));
46784 +
46785 +        WRITE_UINT32(p_FmPort->im.p_FmPortImPram->rxQdPtr,
46786 +                     (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
46787 +                                p_FmPort->fmMuramPhysBaseAddr + 0x20));
46788 +
46789 +        LOG2((uint64_t)p_FmPort->im.mrblr, log2Num);
46790 +        WRITE_UINT16(p_FmPort->im.p_FmPortImPram->mrblr, log2Num);
46791 +
46792 +        /* Initialize Rx QD */
46793 +        tmpPhysBase = (uint64_t)(XX_VirtToPhys(p_FmPort->im.p_BdRing));
46794 +        SET_ADDR(&p_FmPort->im.p_FmPortImPram->rxQd.bdRingBase, tmpPhysBase);
46795 +        WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.bdRingSize, (uint16_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
46796 +
46797 +        /* Update the IM PRAM address in the BMI */
46798 +        WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfqid,
46799 +                     (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
46800 +                                p_FmPort->fmMuramPhysBaseAddr));
46801 +        if (!p_FmPort->polling || p_FmPort->exceptions)
46802 +        {
46803 +            /* Allocate, configure and register interrupts */
46804 +            err = FmAllocFmanCtrlEventReg(p_FmPort->h_Fm, &p_FmPort->fmanCtrlEventId);
46805 +            if (err)
46806 +                RETURN_ERROR(MAJOR, err, NO_MSG);
46807 +
46808 +            ASSERT_COND(!(p_FmPort->fmanCtrlEventId & ~IM_RXQD_FPMEVT_SEL_MASK));
46809 +            tmpReg16 = (uint16_t)(p_FmPort->fmanCtrlEventId & IM_RXQD_FPMEVT_SEL_MASK);
46810 +            tmpReg32 = 0;
46811 +
46812 +            if (p_FmPort->exceptions & IM_EV_BSY)
46813 +            {
46814 +                tmpReg16 |= IM_RXQD_BSYINTM;
46815 +                tmpReg32 |= IM_EV_BSY;
46816 +            }
46817 +            if (!p_FmPort->polling)
46818 +            {
46819 +                tmpReg16 |= IM_RXQD_RXFINTM;
46820 +                tmpReg32 |= IM_EV_RX;
46821 +            }
46822 +            WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, tmpReg16);
46823 +
46824 +            FmRegisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, ImException , (t_Handle)p_FmPort);
46825 +
46826 +            FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, tmpReg32);
46827 +        }
46828 +        else
46829 +            p_FmPort->fmanCtrlEventId = (uint8_t)NO_IRQ;
46830 +    }
46831 +    else
46832 +    {
46833 +        p_FmPort->im.p_BdRing = (t_FmImBd *)XX_MallocSmart((uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize), p_FmPort->im.fwExtStructsMemId, 4);
46834 +        if (!p_FmPort->im.p_BdRing)
46835 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Tx BD ring!!!"));
46836 +        IOMemSet32(p_FmPort->im.p_BdRing, 0, (uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
46837 +
46838 +        p_FmPort->im.p_BdShadow = (t_Handle *)XX_Malloc((uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
46839 +        if (!p_FmPort->im.p_BdShadow)
46840 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Rx BD shadow!!!"));
46841 +        memset(p_FmPort->im.p_BdShadow, 0, (uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
46842 +        p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
46843 +
46844 +        if ((p_FmPort->im.dataMemAttributes & MEMORY_ATTR_CACHEABLE) ||
46845 +            (p_FmPort->im.fwExtStructsMemAttr & MEMORY_ATTR_CACHEABLE))
46846 +            WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_GBL | IM_MODE_SET_BO(2));
46847 +        else
46848 +            WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_SET_BO(2));
46849 +
46850 +        WRITE_UINT32(p_FmPort->im.p_FmPortImPram->txQdPtr,
46851 +                     (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
46852 +                                p_FmPort->fmMuramPhysBaseAddr + 0x40));
46853 +
46854 +        /* Initialize Tx QD */
46855 +        tmpPhysBase = (uint64_t)(XX_VirtToPhys(p_FmPort->im.p_BdRing));
46856 +        SET_ADDR(&p_FmPort->im.p_FmPortImPram->txQd.bdRingBase, tmpPhysBase);
46857 +        WRITE_UINT16(p_FmPort->im.p_FmPortImPram->txQd.bdRingSize, (uint16_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
46858 +
46859 +        /* Update the IM PRAM address in the BMI */
46860 +        WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfqid,
46861 +                     (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
46862 +                                p_FmPort->fmMuramPhysBaseAddr));
46863 +    }
46864 +
46865 +
46866 +    return E_OK;
46867 +}
46868 +
46869 +void FmPortImFree(t_FmPort *p_FmPort)
46870 +{
46871 +    uint32_t    bdStatus;
46872 +    uint8_t     *p_CurData;
46873 +
46874 +    ASSERT_COND(p_FmPort);
46875 +    ASSERT_COND(p_FmPort->im.p_FmPortImPram);
46876 +
46877 +    if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
46878 +        (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
46879 +    {
46880 +        if (!p_FmPort->polling || p_FmPort->exceptions)
46881 +        {
46882 +            /* Deallocate and unregister interrupts */
46883 +            FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, 0);
46884 +
46885 +            FmFreeFmanCtrlEventReg(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
46886 +
46887 +            WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, 0);
46888 +
46889 +            FmUnregisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
46890 +        }
46891 +        /* Try first clean what has received */
46892 +        FmPortImRx(p_FmPort);
46893 +
46894 +        /* Now, get rid of the the empty buffer! */
46895 +        bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
46896 +
46897 +        while (bdStatus & BD_R_E) /* while there is data in the Rx BD */
46898 +        {
46899 +            p_CurData = BdBufferGet(p_FmPort->im.rxPool.f_PhysToVirt, BD_GET(p_FmPort->im.currBdId));
46900 +
46901 +            BdBufferSet(p_FmPort->im.rxPool.f_VirtToPhys, BD_GET(p_FmPort->im.currBdId), NULL);
46902 +            BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.currBdId), 0);
46903 +
46904 +            p_FmPort->im.rxPool.f_PutBuf(p_FmPort->im.rxPool.h_BufferPool,
46905 +                                         p_CurData,
46906 +                                         p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId]);
46907 +
46908 +            p_FmPort->im.currBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
46909 +            bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
46910 +        }
46911 +    }
46912 +    else
46913 +        TxConf(p_FmPort, e_TX_CONF_TYPE_FLUSH);
46914 +
46915 +    FM_MURAM_FreeMem(p_FmPort->im.h_FmMuram, p_FmPort->im.p_FmPortImPram);
46916 +
46917 +    if (p_FmPort->im.p_BdShadow)
46918 +        XX_Free(p_FmPort->im.p_BdShadow);
46919 +
46920 +    if (p_FmPort->im.p_BdRing)
46921 +        XX_FreeSmart(p_FmPort->im.p_BdRing);
46922 +}
46923 +
46924 +
46925 +t_Error FM_PORT_ConfigIMMaxRxBufLength(t_Handle h_FmPort, uint16_t newVal)
46926 +{
46927 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
46928 +
46929 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
46930 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
46931 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
46932 +
46933 +    p_FmPort->im.mrblr = newVal;
46934 +
46935 +    return E_OK;
46936 +}
46937 +
46938 +t_Error FM_PORT_ConfigIMRxBdRingLength(t_Handle h_FmPort, uint16_t newVal)
46939 +{
46940 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
46941 +
46942 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
46943 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
46944 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
46945 +
46946 +    p_FmPort->im.bdRingSize = newVal;
46947 +
46948 +    return E_OK;
46949 +}
46950 +
46951 +t_Error FM_PORT_ConfigIMTxBdRingLength(t_Handle h_FmPort, uint16_t newVal)
46952 +{
46953 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
46954 +
46955 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
46956 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
46957 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
46958 +
46959 +    p_FmPort->im.bdRingSize = newVal;
46960 +
46961 +    return E_OK;
46962 +}
46963 +
46964 +t_Error  FM_PORT_ConfigIMFmanCtrlExternalStructsMemory(t_Handle h_FmPort,
46965 +                                                       uint8_t  memId,
46966 +                                                       uint32_t memAttributes)
46967 +{
46968 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
46969 +
46970 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
46971 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
46972 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
46973 +
46974 +    p_FmPort->im.fwExtStructsMemId              = memId;
46975 +    p_FmPort->im.fwExtStructsMemAttr            = memAttributes;
46976 +
46977 +    return E_OK;
46978 +}
46979 +
46980 +t_Error FM_PORT_ConfigIMPolling(t_Handle h_FmPort)
46981 +{
46982 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
46983 +
46984 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
46985 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
46986 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
46987 +
46988 +    if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
46989 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("Available for Rx ports only"));
46990 +
46991 +    if (!FmIsMaster(p_FmPort->h_Fm))
46992 +        RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("Available on master-partition only;"
46993 +                                                  "in guest-partitions, IM is always in polling!"));
46994 +
46995 +    p_FmPort->polling = TRUE;
46996 +
46997 +    return E_OK;
46998 +}
46999 +
47000 +t_Error FM_PORT_SetIMExceptions(t_Handle h_FmPort, e_FmPortExceptions exception, bool enable)
47001 +{
47002 +    t_FmPort    *p_FmPort = (t_FmPort*)h_FmPort;
47003 +    t_Error     err;
47004 +    uint16_t    tmpReg16;
47005 +    uint32_t    tmpReg32;
47006 +
47007 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
47008 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
47009 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
47010 +
47011 +    if (exception == e_FM_PORT_EXCEPTION_IM_BUSY)
47012 +    {
47013 +        if (enable)
47014 +        {
47015 +            p_FmPort->exceptions |= IM_EV_BSY;
47016 +            if (p_FmPort->fmanCtrlEventId == (uint8_t)NO_IRQ)
47017 +            {
47018 +                /* Allocate, configure and register interrupts */
47019 +                err = FmAllocFmanCtrlEventReg(p_FmPort->h_Fm, &p_FmPort->fmanCtrlEventId);
47020 +                if (err)
47021 +                    RETURN_ERROR(MAJOR, err, NO_MSG);
47022 +                ASSERT_COND(!(p_FmPort->fmanCtrlEventId & ~IM_RXQD_FPMEVT_SEL_MASK));
47023 +
47024 +                FmRegisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, ImException, (t_Handle)p_FmPort);
47025 +                tmpReg16 = (uint16_t)((p_FmPort->fmanCtrlEventId & IM_RXQD_FPMEVT_SEL_MASK) | IM_RXQD_BSYINTM);
47026 +                tmpReg32 = IM_EV_BSY;
47027 +            }
47028 +            else
47029 +            {
47030 +                tmpReg16 = (uint16_t)(GET_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen) | IM_RXQD_BSYINTM);
47031 +                tmpReg32 = FmGetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId) | IM_EV_BSY;
47032 +            }
47033 +
47034 +            WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, tmpReg16);
47035 +            FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, tmpReg32);
47036 +        }
47037 +        else
47038 +        {
47039 +            p_FmPort->exceptions &= ~IM_EV_BSY;
47040 +            if (!p_FmPort->exceptions && p_FmPort->polling)
47041 +            {
47042 +                FmFreeFmanCtrlEventReg(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
47043 +                FmUnregisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
47044 +                FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, 0);
47045 +                WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, 0);
47046 +                p_FmPort->fmanCtrlEventId = (uint8_t)NO_IRQ;
47047 +            }
47048 +            else
47049 +            {
47050 +                tmpReg16 = (uint16_t)(GET_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen) & ~IM_RXQD_BSYINTM);
47051 +                WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, tmpReg16);
47052 +                tmpReg32 = FmGetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId) & ~IM_EV_BSY;
47053 +                FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, tmpReg32);
47054 +            }
47055 +        }
47056 +    }
47057 +    else
47058 +        RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("Invalid exception."));
47059 +
47060 +    return E_OK;
47061 +}
47062 +
47063 +t_Error  FM_PORT_ImTx( t_Handle               h_FmPort,
47064 +                       uint8_t                *p_Data,
47065 +                       uint16_t               length,
47066 +                       bool                   lastBuffer,
47067 +                       t_Handle               h_BufContext)
47068 +{
47069 +    t_FmPort            *p_FmPort = (t_FmPort*)h_FmPort;
47070 +    uint16_t            nextBdId;
47071 +    uint32_t            bdStatus, nextBdStatus;
47072 +    bool                firstBuffer;
47073 +
47074 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
47075 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
47076 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
47077 +
47078 +    bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
47079 +    nextBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
47080 +    nextBdStatus = BD_STATUS_AND_LENGTH(BD_GET(nextBdId));
47081 +
47082 +    if (!(bdStatus & BD_R_E) && !(nextBdStatus & BD_R_E))
47083 +    {
47084 +        /* Confirm the current BD - BD is available */
47085 +        if ((bdStatus & BD_LENGTH_MASK) && (p_FmPort->im.f_TxConf))
47086 +            p_FmPort->im.f_TxConf (p_FmPort->h_App,
47087 +                                   BdBufferGet(XX_PhysToVirt, BD_GET(p_FmPort->im.currBdId)),
47088 +                                   0,
47089 +                                   p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId]);
47090 +
47091 +        bdStatus = length;
47092 +
47093 +        /* if this is the first BD of a frame */
47094 +        if (p_FmPort->im.firstBdOfFrameId == IM_ILEGAL_BD_ID)
47095 +        {
47096 +            firstBuffer = TRUE;
47097 +            p_FmPort->im.txFirstBdStatus = (bdStatus | BD_R_E);
47098 +
47099 +            if (!lastBuffer)
47100 +                p_FmPort->im.firstBdOfFrameId = p_FmPort->im.currBdId;
47101 +        }
47102 +        else
47103 +            firstBuffer = FALSE;
47104 +
47105 +        BdBufferSet(XX_VirtToPhys, BD_GET(p_FmPort->im.currBdId), p_Data);
47106 +        p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId] = h_BufContext;
47107 +
47108 +        /* deal with last */
47109 +        if (lastBuffer)
47110 +        {
47111 +            /* if single buffer frame */
47112 +            if (firstBuffer)
47113 +                BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.currBdId), p_FmPort->im.txFirstBdStatus | BD_L);
47114 +            else
47115 +            {
47116 +                /* Set the last BD of the frame */
47117 +                BD_STATUS_AND_LENGTH_SET (BD_GET(p_FmPort->im.currBdId), (bdStatus | BD_R_E | BD_L));
47118 +                /* Set the first BD of the frame */
47119 +                BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.firstBdOfFrameId), p_FmPort->im.txFirstBdStatus);
47120 +                p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
47121 +            }
47122 +            WRITE_UINT16(p_FmPort->im.p_FmPortImPram->txQd.offsetIn, (uint16_t)(GetNextBdId(p_FmPort, p_FmPort->im.currBdId)<<4));
47123 +        }
47124 +        else if (!firstBuffer) /* mid frame buffer */
47125 +            BD_STATUS_AND_LENGTH_SET (BD_GET(p_FmPort->im.currBdId), bdStatus | BD_R_E);
47126 +
47127 +        p_FmPort->im.currBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
47128 +    }
47129 +    else
47130 +    {
47131 +        /* Discard current frame. Return error.   */
47132 +        if (p_FmPort->im.firstBdOfFrameId != IM_ILEGAL_BD_ID)
47133 +        {
47134 +            /* Error:    No free BD */
47135 +            /* Response: Discard current frame. Return error.   */
47136 +            uint16_t   cleanBdId = p_FmPort->im.firstBdOfFrameId;
47137 +
47138 +            ASSERT_COND(p_FmPort->im.firstBdOfFrameId != p_FmPort->im.currBdId);
47139 +
47140 +            /* Since firstInFrame is not NULL, one buffer at least has already been
47141 +               inserted into the BD ring. Using do-while covers the situation of a
47142 +               frame spanned throughout the whole Tx BD ring (p_CleanBd is incremented
47143 +               prior to testing whether or not it's equal to TxBd). */
47144 +            do
47145 +            {
47146 +                BD_STATUS_AND_LENGTH_SET(BD_GET(cleanBdId), 0);
47147 +                /* Advance BD pointer */
47148 +                cleanBdId = GetNextBdId(p_FmPort, cleanBdId);
47149 +            } while (cleanBdId != p_FmPort->im.currBdId);
47150 +
47151 +            p_FmPort->im.currBdId = cleanBdId;
47152 +            p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
47153 +        }
47154 +
47155 +        return ERROR_CODE(E_FULL);
47156 +    }
47157 +
47158 +    return E_OK;
47159 +}
47160 +
47161 +void FM_PORT_ImTxConf(t_Handle h_FmPort)
47162 +{
47163 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
47164 +
47165 +    SANITY_CHECK_RETURN(p_FmPort, E_INVALID_HANDLE);
47166 +    SANITY_CHECK_RETURN(p_FmPort->imEn, E_INVALID_STATE);
47167 +    SANITY_CHECK_RETURN(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
47168 +
47169 +    TxConf(p_FmPort, e_TX_CONF_TYPE_CALLBACK);
47170 +}
47171 +
47172 +t_Error  FM_PORT_ImRx(t_Handle h_FmPort)
47173 +{
47174 +    t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
47175 +
47176 +    SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
47177 +    SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
47178 +    SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
47179 +
47180 +    return FmPortImRx(p_FmPort);
47181 +}
47182 --- /dev/null
47183 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fman_port.c
47184 @@ -0,0 +1,1568 @@
47185 +/*
47186 + * Copyright 2008-2012 Freescale Semiconductor Inc.
47187 + *
47188 + * Redistribution and use in source and binary forms, with or without
47189 + * modification, are permitted provided that the following conditions are met:
47190 + *     * Redistributions of source code must retain the above copyright
47191 + *       notice, this list of conditions and the following disclaimer.
47192 + *     * Redistributions in binary form must reproduce the above copyright
47193 + *       notice, this list of conditions and the following disclaimer in the
47194 + *       documentation and/or other materials provided with the distribution.
47195 + *     * Neither the name of Freescale Semiconductor nor the
47196 + *       names of its contributors may be used to endorse or promote products
47197 + *       derived from this software without specific prior written permission.
47198 + *
47199 + *
47200 + * ALTERNATIVELY, this software may be distributed under the terms of the
47201 + * GNU General Public License ("GPL") as published by the Free Software
47202 + * Foundation, either version 2 of that License or (at your option) any
47203 + * later version.
47204 + *
47205 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
47206 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
47207 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
47208 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
47209 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
47210 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
47211 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
47212 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
47213 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
47214 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47215 + */
47216 +
47217 +
47218 +#include "common/general.h"
47219 +
47220 +#include "fman_common.h"
47221 +#include "fsl_fman_port.h"
47222 +
47223 +
47224 +/* problem Eyal: the following should not be here*/
47225 +#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME        0x00000028
47226 +
47227 +static uint32_t get_no_pcd_nia_bmi_ac_enc_frame(struct fman_port_cfg *cfg)
47228 +{
47229 +    if (cfg->errata_A006675)
47230 +        return NIA_ENG_FM_CTL |
47231 +            NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME;
47232 +    else
47233 +        return NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME;
47234 +}
47235 +
47236 +static int init_bmi_rx(struct fman_port *port,
47237 +        struct fman_port_cfg *cfg,
47238 +        struct fman_port_params *params)
47239 +{
47240 +    struct fman_port_rx_bmi_regs *regs = &port->bmi_regs->rx;
47241 +    uint32_t tmp;
47242 +
47243 +    /* Rx Configuration register */
47244 +    tmp = 0;
47245 +    if (port->im_en)
47246 +        tmp |= BMI_PORT_CFG_IM;
47247 +    else if (cfg->discard_override)
47248 +        tmp |= BMI_PORT_CFG_FDOVR;
47249 +    iowrite32be(tmp, &regs->fmbm_rcfg);
47250 +
47251 +    /* DMA attributes */
47252 +    tmp = (uint32_t)cfg->dma_swap_data << BMI_DMA_ATTR_SWP_SHIFT;
47253 +    if (cfg->dma_ic_stash_on)
47254 +        tmp |= BMI_DMA_ATTR_IC_STASH_ON;
47255 +    if (cfg->dma_header_stash_on)
47256 +        tmp |= BMI_DMA_ATTR_HDR_STASH_ON;
47257 +    if (cfg->dma_sg_stash_on)
47258 +        tmp |= BMI_DMA_ATTR_SG_STASH_ON;
47259 +    if (cfg->dma_write_optimize)
47260 +        tmp |= BMI_DMA_ATTR_WRITE_OPTIMIZE;
47261 +    iowrite32be(tmp, &regs->fmbm_rda);
47262 +
47263 +    /* Rx FIFO parameters */
47264 +    tmp = (cfg->rx_pri_elevation / FMAN_PORT_BMI_FIFO_UNITS - 1) <<
47265 +            BMI_RX_FIFO_PRI_ELEVATION_SHIFT;
47266 +    tmp |= cfg->rx_fifo_thr / FMAN_PORT_BMI_FIFO_UNITS - 1;
47267 +    iowrite32be(tmp, &regs->fmbm_rfp);
47268 +
47269 +    if (cfg->excessive_threshold_register)
47270 +        /* always allow access to the extra resources */
47271 +        iowrite32be(BMI_RX_FIFO_THRESHOLD_ETHE, &regs->fmbm_reth);
47272 +
47273 +    /* Frame end data */
47274 +    tmp = (uint32_t)cfg->checksum_bytes_ignore <<
47275 +            BMI_RX_FRAME_END_CS_IGNORE_SHIFT;
47276 +    tmp |= (uint32_t)cfg->rx_cut_end_bytes <<
47277 +            BMI_RX_FRAME_END_CUT_SHIFT;
47278 +    if (cfg->errata_A006320)
47279 +        tmp &= 0xffe0ffff;
47280 +    iowrite32be(tmp, &regs->fmbm_rfed);
47281 +
47282 +    /* Internal context parameters */
47283 +    tmp = ((uint32_t)cfg->ic_ext_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
47284 +            BMI_IC_TO_EXT_SHIFT;
47285 +    tmp |= ((uint32_t)cfg->ic_int_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
47286 +            BMI_IC_FROM_INT_SHIFT;
47287 +    tmp |= cfg->ic_size / FMAN_PORT_IC_OFFSET_UNITS;
47288 +    iowrite32be(tmp, &regs->fmbm_ricp);
47289 +
47290 +    /* Internal buffer offset */
47291 +    tmp = ((uint32_t)cfg->int_buf_start_margin / FMAN_PORT_IC_OFFSET_UNITS)
47292 +            << BMI_INT_BUF_MARG_SHIFT;
47293 +    iowrite32be(tmp, &regs->fmbm_rim);
47294 +
47295 +    /* External buffer margins */
47296 +    if (!port->im_en)
47297 +    {
47298 +        tmp = (uint32_t)cfg->ext_buf_start_margin <<
47299 +                BMI_EXT_BUF_MARG_START_SHIFT;
47300 +        tmp |= (uint32_t)cfg->ext_buf_end_margin;
47301 +        if (cfg->fmbm_rebm_has_sgd && cfg->no_scatter_gather)
47302 +            tmp |= BMI_SG_DISABLE;
47303 +        iowrite32be(tmp, &regs->fmbm_rebm);
47304 +    }
47305 +
47306 +    /* Frame attributes */
47307 +    tmp = BMI_CMD_RX_MR_DEF;
47308 +    if (!port->im_en)
47309 +    {
47310 +        tmp |= BMI_CMD_ATTR_ORDER;
47311 +        tmp |= (uint32_t)cfg->color << BMI_CMD_ATTR_COLOR_SHIFT;
47312 +        if (cfg->sync_req)
47313 +            tmp |= BMI_CMD_ATTR_SYNC;
47314 +    }
47315 +    iowrite32be(tmp, &regs->fmbm_rfca);
47316 +
47317 +    /* NIA */
47318 +    if (port->im_en)
47319 +        tmp = NIA_ENG_FM_CTL | NIA_FM_CTL_AC_IND_MODE_RX;
47320 +    else
47321 +    {
47322 +        tmp = (uint32_t)cfg->rx_fd_bits << BMI_NEXT_ENG_FD_BITS_SHIFT;
47323 +        tmp |= get_no_pcd_nia_bmi_ac_enc_frame(cfg);
47324 +    }
47325 +    iowrite32be(tmp, &regs->fmbm_rfne);
47326 +
47327 +    /* Enqueue NIA */
47328 +    iowrite32be(NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR, &regs->fmbm_rfene);
47329 +
47330 +    /* Default/error queues */
47331 +    if (!port->im_en)
47332 +    {
47333 +        iowrite32be((params->dflt_fqid & 0x00FFFFFF), &regs->fmbm_rfqid);
47334 +        iowrite32be((params->err_fqid & 0x00FFFFFF), &regs->fmbm_refqid);
47335 +    }
47336 +
47337 +    /* Discard/error masks */
47338 +    iowrite32be(params->discard_mask, &regs->fmbm_rfsdm);
47339 +    iowrite32be(params->err_mask, &regs->fmbm_rfsem);
47340 +
47341 +    /* Statistics counters */
47342 +    tmp = 0;
47343 +    if (cfg->stats_counters_enable)
47344 +        tmp = BMI_COUNTERS_EN;
47345 +    iowrite32be(tmp, &regs->fmbm_rstc);
47346 +
47347 +    /* Performance counters */
47348 +    fman_port_set_perf_cnt_params(port, &cfg->perf_cnt_params);
47349 +    tmp = 0;
47350 +    if (cfg->perf_counters_enable)
47351 +        tmp = BMI_COUNTERS_EN;
47352 +    iowrite32be(tmp, &regs->fmbm_rpc);
47353 +
47354 +    return 0;
47355 +}
47356 +
47357 +static int init_bmi_tx(struct fman_port *port,
47358 +        struct fman_port_cfg *cfg,
47359 +        struct fman_port_params *params)
47360 +{
47361 +    struct fman_port_tx_bmi_regs *regs = &port->bmi_regs->tx;
47362 +    uint32_t tmp;
47363 +
47364 +    /* Tx Configuration register */
47365 +    tmp = 0;
47366 +    if (port->im_en)
47367 +        tmp |= BMI_PORT_CFG_IM;
47368 +    iowrite32be(tmp, &regs->fmbm_tcfg);
47369 +
47370 +    /* DMA attributes */
47371 +    tmp = (uint32_t)cfg->dma_swap_data << BMI_DMA_ATTR_SWP_SHIFT;
47372 +    if (cfg->dma_ic_stash_on)
47373 +        tmp |= BMI_DMA_ATTR_IC_STASH_ON;
47374 +    if (cfg->dma_header_stash_on)
47375 +        tmp |= BMI_DMA_ATTR_HDR_STASH_ON;
47376 +    if (cfg->dma_sg_stash_on)
47377 +        tmp |= BMI_DMA_ATTR_SG_STASH_ON;
47378 +    iowrite32be(tmp, &regs->fmbm_tda);
47379 +
47380 +    /* Tx FIFO parameters */
47381 +    tmp = (cfg->tx_fifo_min_level / FMAN_PORT_BMI_FIFO_UNITS) <<
47382 +            BMI_TX_FIFO_MIN_FILL_SHIFT;
47383 +    tmp |= ((uint32_t)cfg->tx_fifo_deq_pipeline_depth - 1) <<
47384 +            BMI_FIFO_PIPELINE_DEPTH_SHIFT;
47385 +    tmp |= (uint32_t)(cfg->tx_fifo_low_comf_level /
47386 +            FMAN_PORT_BMI_FIFO_UNITS - 1);
47387 +    iowrite32be(tmp, &regs->fmbm_tfp);
47388 +
47389 +    /* Frame end data */
47390 +    tmp = (uint32_t)cfg->checksum_bytes_ignore <<
47391 +            BMI_FRAME_END_CS_IGNORE_SHIFT;
47392 +    iowrite32be(tmp, &regs->fmbm_tfed);
47393 +
47394 +    /* Internal context parameters */
47395 +    if (!port->im_en)
47396 +    {
47397 +        tmp = ((uint32_t)cfg->ic_ext_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
47398 +                BMI_IC_TO_EXT_SHIFT;
47399 +        tmp |= ((uint32_t)cfg->ic_int_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
47400 +                BMI_IC_FROM_INT_SHIFT;
47401 +        tmp |= cfg->ic_size / FMAN_PORT_IC_OFFSET_UNITS;
47402 +        iowrite32be(tmp, &regs->fmbm_ticp);
47403 +    }
47404 +    /* Frame attributes */
47405 +    tmp = BMI_CMD_TX_MR_DEF;
47406 +    if (port->im_en)
47407 +        tmp |= BMI_CMD_MR_DEAS;
47408 +    else
47409 +    {
47410 +        tmp |= BMI_CMD_ATTR_ORDER;
47411 +        tmp |= (uint32_t)cfg->color << BMI_CMD_ATTR_COLOR_SHIFT;
47412 +    }
47413 +    iowrite32be(tmp, &regs->fmbm_tfca);
47414 +
47415 +    /* Dequeue NIA + enqueue NIA */
47416 +    if (port->im_en)
47417 +    {
47418 +        iowrite32be(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_IND_MODE_TX, &regs->fmbm_tfdne);
47419 +        iowrite32be(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_IND_MODE_TX, &regs->fmbm_tfene);
47420 +    }
47421 +    else
47422 +    {
47423 +        iowrite32be(NIA_ENG_QMI_DEQ, &regs->fmbm_tfdne);
47424 +        iowrite32be(NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR, &regs->fmbm_tfene);
47425 +        if (cfg->fmbm_tfne_has_features)
47426 +            iowrite32be(!params->dflt_fqid ?
47427 +                BMI_EBD_EN | NIA_BMI_AC_FETCH_ALL_FRAME :
47428 +                NIA_BMI_AC_FETCH_ALL_FRAME, &regs->fmbm_tfne);
47429 +        if (!params->dflt_fqid && params->dont_release_buf)
47430 +        {
47431 +            iowrite32be(0x00FFFFFF, &regs->fmbm_tcfqid);
47432 +            iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_TX_RELEASE, &regs->fmbm_tfene);
47433 +            if (cfg->fmbm_tfne_has_features)
47434 +                iowrite32be(ioread32be(&regs->fmbm_tfne) & ~BMI_EBD_EN, &regs->fmbm_tfne);
47435 +        }
47436 +    }
47437 +
47438 +    /* Confirmation/error queues */
47439 +    if (!port->im_en)
47440 +    {
47441 +        if (params->dflt_fqid || !params->dont_release_buf)
47442 +            iowrite32be(params->dflt_fqid & 0x00FFFFFF, &regs->fmbm_tcfqid);
47443 +        iowrite32be((params->err_fqid & 0x00FFFFFF), &regs->fmbm_tefqid);
47444 +    }
47445 +    /* Statistics counters */
47446 +    tmp = 0;
47447 +    if (cfg->stats_counters_enable)
47448 +        tmp = BMI_COUNTERS_EN;
47449 +    iowrite32be(tmp, &regs->fmbm_tstc);
47450 +
47451 +    /* Performance counters */
47452 +    fman_port_set_perf_cnt_params(port, &cfg->perf_cnt_params);
47453 +    tmp = 0;
47454 +    if (cfg->perf_counters_enable)
47455 +        tmp = BMI_COUNTERS_EN;
47456 +    iowrite32be(tmp, &regs->fmbm_tpc);
47457 +
47458 +    return 0;
47459 +}
47460 +
47461 +static int init_bmi_oh(struct fman_port *port,
47462 +        struct fman_port_cfg *cfg,
47463 +        struct fman_port_params *params)
47464 +{
47465 +    struct fman_port_oh_bmi_regs *regs = &port->bmi_regs->oh;
47466 +    uint32_t tmp;
47467 +
47468 +    /* OP Configuration register */
47469 +    tmp = 0;
47470 +    if (cfg->discard_override)
47471 +        tmp |= BMI_PORT_CFG_FDOVR;
47472 +    iowrite32be(tmp, &regs->fmbm_ocfg);
47473 +
47474 +    /* DMA attributes */
47475 +    tmp = (uint32_t)cfg->dma_swap_data << BMI_DMA_ATTR_SWP_SHIFT;
47476 +    if (cfg->dma_ic_stash_on)
47477 +        tmp |= BMI_DMA_ATTR_IC_STASH_ON;
47478 +    if (cfg->dma_header_stash_on)
47479 +        tmp |= BMI_DMA_ATTR_HDR_STASH_ON;
47480 +    if (cfg->dma_sg_stash_on)
47481 +        tmp |= BMI_DMA_ATTR_SG_STASH_ON;
47482 +    if (cfg->dma_write_optimize)
47483 +        tmp |= BMI_DMA_ATTR_WRITE_OPTIMIZE;
47484 +    iowrite32be(tmp, &regs->fmbm_oda);
47485 +
47486 +    /* Tx FIFO parameters */
47487 +    tmp = ((uint32_t)cfg->tx_fifo_deq_pipeline_depth - 1) <<
47488 +            BMI_FIFO_PIPELINE_DEPTH_SHIFT;
47489 +    iowrite32be(tmp, &regs->fmbm_ofp);
47490 +
47491 +    /* Internal context parameters */
47492 +    tmp = ((uint32_t)cfg->ic_ext_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
47493 +            BMI_IC_TO_EXT_SHIFT;
47494 +    tmp |= ((uint32_t)cfg->ic_int_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
47495 +            BMI_IC_FROM_INT_SHIFT;
47496 +    tmp |= cfg->ic_size / FMAN_PORT_IC_OFFSET_UNITS;
47497 +    iowrite32be(tmp, &regs->fmbm_oicp);
47498 +
47499 +    /* Frame attributes */
47500 +    tmp = BMI_CMD_OP_MR_DEF;
47501 +    tmp |= (uint32_t)cfg->color << BMI_CMD_ATTR_COLOR_SHIFT;
47502 +    if (cfg->sync_req)
47503 +        tmp |= BMI_CMD_ATTR_SYNC;
47504 +    if (port->type == E_FMAN_PORT_TYPE_OP)
47505 +        tmp |= BMI_CMD_ATTR_ORDER;
47506 +    iowrite32be(tmp, &regs->fmbm_ofca);
47507 +
47508 +    /* Internal buffer offset */
47509 +    tmp = ((uint32_t)cfg->int_buf_start_margin / FMAN_PORT_IC_OFFSET_UNITS)
47510 +            << BMI_INT_BUF_MARG_SHIFT;
47511 +    iowrite32be(tmp, &regs->fmbm_oim);
47512 +
47513 +    /* Dequeue NIA */
47514 +    iowrite32be(NIA_ENG_QMI_DEQ, &regs->fmbm_ofdne);
47515 +
47516 +    /* NIA and Enqueue NIA */
47517 +    if (port->type == E_FMAN_PORT_TYPE_HC) {
47518 +        iowrite32be(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_HC,
47519 +                &regs->fmbm_ofne);
47520 +        iowrite32be(NIA_ENG_QMI_ENQ, &regs->fmbm_ofene);
47521 +    } else {
47522 +        iowrite32be(get_no_pcd_nia_bmi_ac_enc_frame(cfg),
47523 +                &regs->fmbm_ofne);
47524 +        iowrite32be(NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR,
47525 +                &regs->fmbm_ofene);
47526 +    }
47527 +
47528 +    /* Default/error queues */
47529 +    iowrite32be((params->dflt_fqid & 0x00FFFFFF), &regs->fmbm_ofqid);
47530 +    iowrite32be((params->err_fqid & 0x00FFFFFF), &regs->fmbm_oefqid);
47531 +
47532 +    /* Discard/error masks */
47533 +    if (port->type == E_FMAN_PORT_TYPE_OP) {
47534 +        iowrite32be(params->discard_mask, &regs->fmbm_ofsdm);
47535 +        iowrite32be(params->err_mask, &regs->fmbm_ofsem);
47536 +    }
47537 +
47538 +    /* Statistics counters */
47539 +    tmp = 0;
47540 +    if (cfg->stats_counters_enable)
47541 +        tmp = BMI_COUNTERS_EN;
47542 +    iowrite32be(tmp, &regs->fmbm_ostc);
47543 +
47544 +    /* Performance counters */
47545 +    fman_port_set_perf_cnt_params(port, &cfg->perf_cnt_params);
47546 +    tmp = 0;
47547 +    if (cfg->perf_counters_enable)
47548 +        tmp = BMI_COUNTERS_EN;
47549 +    iowrite32be(tmp, &regs->fmbm_opc);
47550 +
47551 +    return 0;
47552 +}
47553 +
47554 +static int init_qmi(struct fman_port *port,
47555 +        struct fman_port_cfg *cfg,
47556 +        struct fman_port_params *params)
47557 +{
47558 +    struct fman_port_qmi_regs *regs = port->qmi_regs;
47559 +    uint32_t tmp;
47560 +
47561 +    tmp = 0;
47562 +    if (cfg->queue_counters_enable)
47563 +        tmp |= QMI_PORT_CFG_EN_COUNTERS;
47564 +    iowrite32be(tmp, &regs->fmqm_pnc);
47565 +
47566 +    /* Rx port configuration */
47567 +    if ((port->type == E_FMAN_PORT_TYPE_RX) ||
47568 +            (port->type == E_FMAN_PORT_TYPE_RX_10G)) {
47569 +        /* Enqueue NIA */
47570 +        iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_RELEASE, &regs->fmqm_pnen);
47571 +        return 0;
47572 +    }
47573 +
47574 +    /* Continue with Tx and O/H port configuration */
47575 +    if ((port->type == E_FMAN_PORT_TYPE_TX) ||
47576 +            (port->type == E_FMAN_PORT_TYPE_TX_10G)) {
47577 +        /* Enqueue NIA */
47578 +        iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_TX_RELEASE,
47579 +                &regs->fmqm_pnen);
47580 +        /* Dequeue NIA */
47581 +        iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_TX, &regs->fmqm_pndn);
47582 +    } else {
47583 +        /* Enqueue NIA */
47584 +        iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_RELEASE, &regs->fmqm_pnen);
47585 +        /* Dequeue NIA */
47586 +        iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_FETCH, &regs->fmqm_pndn);
47587 +    }
47588 +
47589 +    /* Dequeue Configuration register */
47590 +    tmp = 0;
47591 +    if (cfg->deq_high_pri)
47592 +        tmp |= QMI_DEQ_CFG_PRI;
47593 +
47594 +    switch (cfg->deq_type) {
47595 +    case E_FMAN_PORT_DEQ_BY_PRI:
47596 +        tmp |= QMI_DEQ_CFG_TYPE1;
47597 +        break;
47598 +    case E_FMAN_PORT_DEQ_ACTIVE_FQ:
47599 +        tmp |= QMI_DEQ_CFG_TYPE2;
47600 +        break;
47601 +    case E_FMAN_PORT_DEQ_ACTIVE_FQ_NO_ICS:
47602 +        tmp |= QMI_DEQ_CFG_TYPE3;
47603 +        break;
47604 +    default:
47605 +        return -EINVAL;
47606 +    }
47607 +
47608 +    if (cfg->qmi_deq_options_support) {
47609 +        if ((port->type == E_FMAN_PORT_TYPE_HC) &&
47610 +            (cfg->deq_prefetch_opt != E_FMAN_PORT_DEQ_NO_PREFETCH))
47611 +            return -EINVAL;
47612 +
47613 +        switch (cfg->deq_prefetch_opt) {
47614 +        case E_FMAN_PORT_DEQ_NO_PREFETCH:
47615 +            break;
47616 +        case E_FMAN_PORT_DEQ_PART_PREFETCH:
47617 +            tmp |= QMI_DEQ_CFG_PREFETCH_PARTIAL;
47618 +            break;
47619 +        case E_FMAN_PORT_DEQ_FULL_PREFETCH:
47620 +            tmp |= QMI_DEQ_CFG_PREFETCH_FULL;
47621 +            break;
47622 +        default:
47623 +            return -EINVAL;
47624 +        }
47625 +    }
47626 +    tmp |= (uint32_t)(params->deq_sp & QMI_DEQ_CFG_SP_MASK) <<
47627 +            QMI_DEQ_CFG_SP_SHIFT;
47628 +    tmp |= cfg->deq_byte_cnt;
47629 +    iowrite32be(tmp, &regs->fmqm_pndc);
47630 +
47631 +    return 0;
47632 +}
47633 +
47634 +static void get_rx_stats_reg(struct fman_port *port,
47635 +        enum fman_port_stats_counters counter,
47636 +        uint32_t **stats_reg)
47637 +{
47638 +    struct fman_port_rx_bmi_regs *regs = &port->bmi_regs->rx;
47639 +
47640 +    switch (counter) {
47641 +    case E_FMAN_PORT_STATS_CNT_FRAME:
47642 +        *stats_reg = &regs->fmbm_rfrc;
47643 +        break;
47644 +    case E_FMAN_PORT_STATS_CNT_DISCARD:
47645 +        *stats_reg = &regs->fmbm_rfdc;
47646 +        break;
47647 +    case E_FMAN_PORT_STATS_CNT_DEALLOC_BUF:
47648 +        *stats_reg = &regs->fmbm_rbdc;
47649 +        break;
47650 +    case E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME:
47651 +        *stats_reg = &regs->fmbm_rfbc;
47652 +        break;
47653 +    case E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME:
47654 +        *stats_reg = &regs->fmbm_rlfc;
47655 +        break;
47656 +    case E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF:
47657 +        *stats_reg = &regs->fmbm_rodc;
47658 +        break;
47659 +    case E_FMAN_PORT_STATS_CNT_FILTERED_FRAME:
47660 +        *stats_reg = &regs->fmbm_rffc;
47661 +        break;
47662 +    case E_FMAN_PORT_STATS_CNT_DMA_ERR:
47663 +        *stats_reg = &regs->fmbm_rfldec;
47664 +        break;
47665 +    default:
47666 +        *stats_reg = NULL;
47667 +    }
47668 +}
47669 +
47670 +static void get_tx_stats_reg(struct fman_port *port,
47671 +        enum fman_port_stats_counters counter,
47672 +        uint32_t **stats_reg)
47673 +{
47674 +    struct fman_port_tx_bmi_regs *regs = &port->bmi_regs->tx;
47675 +
47676 +    switch (counter) {
47677 +    case E_FMAN_PORT_STATS_CNT_FRAME:
47678 +        *stats_reg = &regs->fmbm_tfrc;
47679 +        break;
47680 +    case E_FMAN_PORT_STATS_CNT_DISCARD:
47681 +        *stats_reg = &regs->fmbm_tfdc;
47682 +        break;
47683 +    case E_FMAN_PORT_STATS_CNT_DEALLOC_BUF:
47684 +        *stats_reg = &regs->fmbm_tbdc;
47685 +        break;
47686 +    case E_FMAN_PORT_STATS_CNT_LEN_ERR:
47687 +        *stats_reg = &regs->fmbm_tfledc;
47688 +        break;
47689 +    case E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT:
47690 +        *stats_reg = &regs->fmbm_tfufdc;
47691 +        break;
47692 +    default:
47693 +        *stats_reg = NULL;
47694 +    }
47695 +}
47696 +
47697 +static void get_oh_stats_reg(struct fman_port *port,
47698 +        enum fman_port_stats_counters counter,
47699 +        uint32_t **stats_reg)
47700 +{
47701 +    struct fman_port_oh_bmi_regs *regs = &port->bmi_regs->oh;
47702 +
47703 +    switch (counter) {
47704 +    case E_FMAN_PORT_STATS_CNT_FRAME:
47705 +        *stats_reg = &regs->fmbm_ofrc;
47706 +        break;
47707 +    case E_FMAN_PORT_STATS_CNT_DISCARD:
47708 +        *stats_reg = &regs->fmbm_ofdc;
47709 +        break;
47710 +    case E_FMAN_PORT_STATS_CNT_DEALLOC_BUF:
47711 +        *stats_reg = &regs->fmbm_obdc;
47712 +        break;
47713 +    case E_FMAN_PORT_STATS_CNT_FILTERED_FRAME:
47714 +        *stats_reg = &regs->fmbm_offc;
47715 +        break;
47716 +    case E_FMAN_PORT_STATS_CNT_DMA_ERR:
47717 +        *stats_reg = &regs->fmbm_ofldec;
47718 +        break;
47719 +    case E_FMAN_PORT_STATS_CNT_LEN_ERR:
47720 +        *stats_reg = &regs->fmbm_ofledc;
47721 +        break;
47722 +    case E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT:
47723 +        *stats_reg = &regs->fmbm_ofufdc;
47724 +        break;
47725 +    case E_FMAN_PORT_STATS_CNT_WRED_DISCARD:
47726 +        *stats_reg = &regs->fmbm_ofwdc;
47727 +        break;
47728 +    default:
47729 +        *stats_reg = NULL;
47730 +    }
47731 +}
47732 +
47733 +static void get_rx_perf_reg(struct fman_port *port,
47734 +        enum fman_port_perf_counters counter,
47735 +        uint32_t **perf_reg)
47736 +{
47737 +    struct fman_port_rx_bmi_regs *regs = &port->bmi_regs->rx;
47738 +
47739 +    switch (counter) {
47740 +    case E_FMAN_PORT_PERF_CNT_CYCLE:
47741 +        *perf_reg = &regs->fmbm_rccn;
47742 +        break;
47743 +    case E_FMAN_PORT_PERF_CNT_TASK_UTIL:
47744 +        *perf_reg = &regs->fmbm_rtuc;
47745 +        break;
47746 +    case E_FMAN_PORT_PERF_CNT_QUEUE_UTIL:
47747 +        *perf_reg = &regs->fmbm_rrquc;
47748 +        break;
47749 +    case E_FMAN_PORT_PERF_CNT_DMA_UTIL:
47750 +        *perf_reg = &regs->fmbm_rduc;
47751 +        break;
47752 +    case E_FMAN_PORT_PERF_CNT_FIFO_UTIL:
47753 +        *perf_reg = &regs->fmbm_rfuc;
47754 +        break;
47755 +    case E_FMAN_PORT_PERF_CNT_RX_PAUSE:
47756 +        *perf_reg = &regs->fmbm_rpac;
47757 +        break;
47758 +    default:
47759 +        *perf_reg = NULL;
47760 +    }
47761 +}
47762 +
47763 +static void get_tx_perf_reg(struct fman_port *port,
47764 +        enum fman_port_perf_counters counter,
47765 +        uint32_t **perf_reg)
47766 +{
47767 +    struct fman_port_tx_bmi_regs *regs = &port->bmi_regs->tx;
47768 +
47769 +    switch (counter) {
47770 +    case E_FMAN_PORT_PERF_CNT_CYCLE:
47771 +        *perf_reg = &regs->fmbm_tccn;
47772 +        break;
47773 +    case E_FMAN_PORT_PERF_CNT_TASK_UTIL:
47774 +        *perf_reg = &regs->fmbm_ttuc;
47775 +        break;
47776 +    case E_FMAN_PORT_PERF_CNT_QUEUE_UTIL:
47777 +        *perf_reg = &regs->fmbm_ttcquc;
47778 +        break;
47779 +    case E_FMAN_PORT_PERF_CNT_DMA_UTIL:
47780 +        *perf_reg = &regs->fmbm_tduc;
47781 +        break;
47782 +    case E_FMAN_PORT_PERF_CNT_FIFO_UTIL:
47783 +        *perf_reg = &regs->fmbm_tfuc;
47784 +        break;
47785 +    default:
47786 +        *perf_reg = NULL;
47787 +    }
47788 +}
47789 +
47790 +static void get_oh_perf_reg(struct fman_port *port,
47791 +        enum fman_port_perf_counters counter,
47792 +        uint32_t **perf_reg)
47793 +{
47794 +    struct fman_port_oh_bmi_regs *regs = &port->bmi_regs->oh;
47795 +
47796 +    switch (counter) {
47797 +    case E_FMAN_PORT_PERF_CNT_CYCLE:
47798 +        *perf_reg = &regs->fmbm_occn;
47799 +        break;
47800 +    case E_FMAN_PORT_PERF_CNT_TASK_UTIL:
47801 +        *perf_reg = &regs->fmbm_otuc;
47802 +        break;
47803 +    case E_FMAN_PORT_PERF_CNT_DMA_UTIL:
47804 +        *perf_reg = &regs->fmbm_oduc;
47805 +        break;
47806 +    case E_FMAN_PORT_PERF_CNT_FIFO_UTIL:
47807 +        *perf_reg = &regs->fmbm_ofuc;
47808 +        break;
47809 +    default:
47810 +        *perf_reg = NULL;
47811 +    }
47812 +}
47813 +
47814 +static void get_qmi_counter_reg(struct fman_port *port,
47815 +        enum fman_port_qmi_counters  counter,
47816 +        uint32_t **queue_reg)
47817 +{
47818 +    struct fman_port_qmi_regs *regs = port->qmi_regs;
47819 +
47820 +    switch (counter) {
47821 +    case E_FMAN_PORT_ENQ_TOTAL:
47822 +        *queue_reg = &regs->fmqm_pnetfc;
47823 +        break;
47824 +    case E_FMAN_PORT_DEQ_TOTAL:
47825 +        if ((port->type == E_FMAN_PORT_TYPE_RX) ||
47826 +                (port->type == E_FMAN_PORT_TYPE_RX_10G))
47827 +            /* Counter not available for Rx ports */
47828 +            *queue_reg = NULL;
47829 +        else
47830 +            *queue_reg = &regs->fmqm_pndtfc;
47831 +        break;
47832 +    case E_FMAN_PORT_DEQ_FROM_DFLT:
47833 +        if ((port->type == E_FMAN_PORT_TYPE_RX) ||
47834 +                (port->type == E_FMAN_PORT_TYPE_RX_10G))
47835 +            /* Counter not available for Rx ports */
47836 +            *queue_reg = NULL;
47837 +        else
47838 +            *queue_reg = &regs->fmqm_pndfdc;
47839 +        break;
47840 +    case E_FMAN_PORT_DEQ_CONFIRM:
47841 +        if ((port->type == E_FMAN_PORT_TYPE_RX) ||
47842 +                (port->type == E_FMAN_PORT_TYPE_RX_10G))
47843 +            /* Counter not available for Rx ports */
47844 +            *queue_reg = NULL;
47845 +        else
47846 +            *queue_reg = &regs->fmqm_pndcc;
47847 +        break;
47848 +    default:
47849 +        *queue_reg = NULL;
47850 +    }
47851 +}
47852 +
47853 +void fman_port_defconfig(struct fman_port_cfg *cfg, enum fman_port_type type)
47854 +{
47855 +    cfg->dma_swap_data = E_FMAN_PORT_DMA_NO_SWAP;
47856 +    cfg->dma_ic_stash_on = FALSE;
47857 +    cfg->dma_header_stash_on = FALSE;
47858 +    cfg->dma_sg_stash_on = FALSE;
47859 +    cfg->dma_write_optimize = TRUE;
47860 +    cfg->color = E_FMAN_PORT_COLOR_GREEN;
47861 +    cfg->discard_override = FALSE;
47862 +    cfg->checksum_bytes_ignore = 0;
47863 +    cfg->rx_cut_end_bytes = 4;
47864 +    cfg->rx_pri_elevation = ((0x3FF + 1) * FMAN_PORT_BMI_FIFO_UNITS);
47865 +    cfg->rx_fifo_thr = ((0x3FF + 1) * FMAN_PORT_BMI_FIFO_UNITS);
47866 +    cfg->rx_fd_bits = 0;
47867 +    cfg->ic_ext_offset = 0;
47868 +    cfg->ic_int_offset = 0;
47869 +    cfg->ic_size = 0;
47870 +    cfg->int_buf_start_margin = 0;
47871 +    cfg->ext_buf_start_margin = 0;
47872 +    cfg->ext_buf_end_margin = 0;
47873 +    cfg->tx_fifo_min_level  = 0;
47874 +    cfg->tx_fifo_low_comf_level = (5 * KILOBYTE);
47875 +    cfg->stats_counters_enable = TRUE;
47876 +    cfg->perf_counters_enable = TRUE;
47877 +    cfg->deq_type = E_FMAN_PORT_DEQ_BY_PRI;
47878 +
47879 +    if (type == E_FMAN_PORT_TYPE_HC) {
47880 +        cfg->sync_req = FALSE;
47881 +        cfg->deq_prefetch_opt = E_FMAN_PORT_DEQ_NO_PREFETCH;
47882 +    } else {
47883 +        cfg->sync_req = TRUE;
47884 +        cfg->deq_prefetch_opt = E_FMAN_PORT_DEQ_FULL_PREFETCH;
47885 +    }
47886 +
47887 +    if (type == E_FMAN_PORT_TYPE_TX_10G) {
47888 +        cfg->tx_fifo_deq_pipeline_depth = 4;
47889 +        cfg->deq_high_pri = TRUE;
47890 +        cfg->deq_byte_cnt = 0x1400;
47891 +    } else {
47892 +        if ((type == E_FMAN_PORT_TYPE_HC) ||
47893 +                (type == E_FMAN_PORT_TYPE_OP))
47894 +            cfg->tx_fifo_deq_pipeline_depth = 2;
47895 +        else
47896 +            cfg->tx_fifo_deq_pipeline_depth = 1;
47897 +
47898 +        cfg->deq_high_pri = FALSE;
47899 +        cfg->deq_byte_cnt = 0x400;
47900 +    }
47901 +    cfg->no_scatter_gather = DEFAULT_FMAN_SP_NO_SCATTER_GATHER;
47902 +}
47903 +
47904 +static uint8_t fman_port_find_bpool(struct fman_port *port, uint8_t bpid)
47905 +{
47906 +    uint32_t *bp_reg, tmp;
47907 +    uint8_t i, id;
47908 +
47909 +    /* Find the pool */
47910 +    bp_reg = port->bmi_regs->rx.fmbm_ebmpi;
47911 +    for (i = 0;
47912 +         (i < port->ext_pools_num && (i < FMAN_PORT_MAX_EXT_POOLS_NUM));
47913 +         i++) {
47914 +        tmp = ioread32be(&bp_reg[i]);
47915 +        id = (uint8_t)((tmp & BMI_EXT_BUF_POOL_ID_MASK) >>
47916 +                BMI_EXT_BUF_POOL_ID_SHIFT);
47917 +
47918 +        if (id == bpid)
47919 +            break;
47920 +    }
47921 +
47922 +    return i;
47923 +}
47924 +
47925 +int fman_port_init(struct fman_port *port,
47926 +        struct fman_port_cfg *cfg,
47927 +        struct fman_port_params *params)
47928 +{
47929 +    int err;
47930 +
47931 +    /* Init BMI registers */
47932 +    switch (port->type) {
47933 +    case E_FMAN_PORT_TYPE_RX:
47934 +    case E_FMAN_PORT_TYPE_RX_10G:
47935 +        err = init_bmi_rx(port, cfg, params);
47936 +        break;
47937 +    case E_FMAN_PORT_TYPE_TX:
47938 +    case E_FMAN_PORT_TYPE_TX_10G:
47939 +        err = init_bmi_tx(port, cfg, params);
47940 +        break;
47941 +    case E_FMAN_PORT_TYPE_OP:
47942 +    case E_FMAN_PORT_TYPE_HC:
47943 +        err = init_bmi_oh(port, cfg, params);
47944 +        break;
47945 +    default:
47946 +        return -EINVAL;
47947 +    }
47948 +
47949 +    if (err)
47950 +        return err;
47951 +
47952 +    /* Init QMI registers */
47953 +    if (!port->im_en)
47954 +    {
47955 +        err = init_qmi(port, cfg, params);
47956 +        return err;
47957 +    }
47958 +    return 0;
47959 +}
47960 +
47961 +int fman_port_enable(struct fman_port *port)
47962 +{
47963 +    uint32_t *bmi_cfg_reg, tmp;
47964 +    bool rx_port;
47965 +
47966 +    switch (port->type) {
47967 +    case E_FMAN_PORT_TYPE_RX:
47968 +    case E_FMAN_PORT_TYPE_RX_10G:
47969 +        bmi_cfg_reg = &port->bmi_regs->rx.fmbm_rcfg;
47970 +        rx_port = TRUE;
47971 +        break;
47972 +    case E_FMAN_PORT_TYPE_TX:
47973 +    case E_FMAN_PORT_TYPE_TX_10G:
47974 +        bmi_cfg_reg = &port->bmi_regs->tx.fmbm_tcfg;
47975 +        rx_port = FALSE;
47976 +        break;
47977 +    case E_FMAN_PORT_TYPE_OP:
47978 +    case E_FMAN_PORT_TYPE_HC:
47979 +        bmi_cfg_reg = &port->bmi_regs->oh.fmbm_ocfg;
47980 +        rx_port = FALSE;
47981 +        break;
47982 +    default:
47983 +        return -EINVAL;
47984 +    }
47985 +
47986 +    /* Enable QMI */
47987 +    if (!rx_port) {
47988 +        tmp = ioread32be(&port->qmi_regs->fmqm_pnc) | QMI_PORT_CFG_EN;
47989 +        iowrite32be(tmp, &port->qmi_regs->fmqm_pnc);
47990 +    }
47991 +
47992 +    /* Enable BMI */
47993 +    tmp = ioread32be(bmi_cfg_reg) | BMI_PORT_CFG_EN;
47994 +    iowrite32be(tmp, bmi_cfg_reg);
47995 +
47996 +    return 0;
47997 +}
47998 +
47999 +int fman_port_disable(const struct fman_port *port)
48000 +{
48001 +    uint32_t *bmi_cfg_reg, *bmi_status_reg, tmp;
48002 +    bool rx_port, failure = FALSE;
48003 +    int count;
48004 +
48005 +    switch (port->type) {
48006 +    case E_FMAN_PORT_TYPE_RX:
48007 +    case E_FMAN_PORT_TYPE_RX_10G:
48008 +        bmi_cfg_reg = &port->bmi_regs->rx.fmbm_rcfg;
48009 +        bmi_status_reg = &port->bmi_regs->rx.fmbm_rst;
48010 +        rx_port = TRUE;
48011 +        break;
48012 +    case E_FMAN_PORT_TYPE_TX:
48013 +    case E_FMAN_PORT_TYPE_TX_10G:
48014 +        bmi_cfg_reg = &port->bmi_regs->tx.fmbm_tcfg;
48015 +        bmi_status_reg = &port->bmi_regs->tx.fmbm_tst;
48016 +        rx_port = FALSE;
48017 +        break;
48018 +    case E_FMAN_PORT_TYPE_OP:
48019 +    case E_FMAN_PORT_TYPE_HC:
48020 +        bmi_cfg_reg = &port->bmi_regs->oh.fmbm_ocfg;
48021 +        bmi_status_reg = &port->bmi_regs->oh.fmbm_ost;
48022 +        rx_port = FALSE;
48023 +        break;
48024 +    default:
48025 +        return -EINVAL;
48026 +    }
48027 +
48028 +    /* Disable QMI */
48029 +    if (!rx_port) {
48030 +        tmp = ioread32be(&port->qmi_regs->fmqm_pnc) & ~QMI_PORT_CFG_EN;
48031 +        iowrite32be(tmp, &port->qmi_regs->fmqm_pnc);
48032 +
48033 +        /* Wait for QMI to finish FD handling */
48034 +        count = 100;
48035 +        do {
48036 +            udelay(10);
48037 +            tmp = ioread32be(&port->qmi_regs->fmqm_pns);
48038 +        } while ((tmp & QMI_PORT_STATUS_DEQ_FD_BSY) && --count);
48039 +
48040 +        if (count == 0)
48041 +        {
48042 +            /* Timeout */
48043 +            failure = TRUE;
48044 +        }
48045 +    }
48046 +
48047 +    /* Disable BMI */
48048 +    tmp = ioread32be(bmi_cfg_reg) & ~BMI_PORT_CFG_EN;
48049 +    iowrite32be(tmp, bmi_cfg_reg);
48050 +
48051 +    /* Wait for graceful stop end */
48052 +    count = 500;
48053 +    do {
48054 +        udelay(10);
48055 +        tmp = ioread32be(bmi_status_reg);
48056 +    } while ((tmp & BMI_PORT_STATUS_BSY) && --count);
48057 +
48058 +    if (count == 0)
48059 +    {
48060 +        /* Timeout */
48061 +        failure = TRUE;
48062 +    }
48063 +
48064 +    if (failure)
48065 +        return -EBUSY;
48066 +
48067 +    return 0;
48068 +}
48069 +
48070 +int fman_port_set_bpools(const struct fman_port *port,
48071 +        const struct fman_port_bpools *bp)
48072 +{
48073 +    uint32_t tmp, *bp_reg, *bp_depl_reg;
48074 +    uint8_t i, max_bp_num;
48075 +    bool grp_depl_used = FALSE, rx_port;
48076 +
48077 +    switch (port->type) {
48078 +    case E_FMAN_PORT_TYPE_RX:
48079 +    case E_FMAN_PORT_TYPE_RX_10G:
48080 +        max_bp_num = port->ext_pools_num;
48081 +        rx_port = TRUE;
48082 +        bp_reg = port->bmi_regs->rx.fmbm_ebmpi;
48083 +        bp_depl_reg = &port->bmi_regs->rx.fmbm_mpd;
48084 +        break;
48085 +    case E_FMAN_PORT_TYPE_OP:
48086 +        if (port->fm_rev_maj != 4)
48087 +            return -EINVAL;
48088 +        max_bp_num = FMAN_PORT_OBS_EXT_POOLS_NUM;
48089 +        rx_port = FALSE;
48090 +        bp_reg = port->bmi_regs->oh.fmbm_oebmpi;
48091 +        bp_depl_reg = &port->bmi_regs->oh.fmbm_ompd;
48092 +        break;
48093 +    default:
48094 +        return -EINVAL;
48095 +    }
48096 +
48097 +    if (rx_port) {
48098 +        /* Check buffers are provided in ascending order */
48099 +        for (i = 0;
48100 +             (i < (bp->count-1) && (i < FMAN_PORT_MAX_EXT_POOLS_NUM - 1));
48101 +             i++) {
48102 +            if (bp->bpool[i].size > bp->bpool[i+1].size)
48103 +                return -EINVAL;
48104 +        }
48105 +    }
48106 +
48107 +    /* Set up external buffers pools */
48108 +    for (i = 0; i < bp->count; i++) {
48109 +        tmp = BMI_EXT_BUF_POOL_VALID;
48110 +        tmp |= ((uint32_t)bp->bpool[i].bpid <<
48111 +            BMI_EXT_BUF_POOL_ID_SHIFT) & BMI_EXT_BUF_POOL_ID_MASK;
48112 +
48113 +        if (rx_port) {
48114 +            if (bp->counters_enable)
48115 +                tmp |= BMI_EXT_BUF_POOL_EN_COUNTER;
48116 +
48117 +            if (bp->bpool[i].is_backup)
48118 +                tmp |= BMI_EXT_BUF_POOL_BACKUP;
48119 +
48120 +            tmp |= (uint32_t)bp->bpool[i].size;
48121 +        }
48122 +
48123 +        iowrite32be(tmp, &bp_reg[i]);
48124 +    }
48125 +
48126 +    /* Clear unused pools */
48127 +    for (i = bp->count; i < max_bp_num; i++)
48128 +        iowrite32be(0, &bp_reg[i]);
48129 +
48130 +    /* Pools depletion */
48131 +    tmp = 0;
48132 +    for (i = 0; i < FMAN_PORT_MAX_EXT_POOLS_NUM; i++) {
48133 +        if (bp->bpool[i].grp_bp_depleted) {
48134 +            grp_depl_used = TRUE;
48135 +            tmp |= 0x80000000 >> i;
48136 +        }
48137 +
48138 +        if (bp->bpool[i].single_bp_depleted)
48139 +            tmp |= 0x80 >> i;
48140 +
48141 +        if (bp->bpool[i].pfc_priorities_en)
48142 +            tmp |= 0x0100 << i;
48143 +    }
48144 +
48145 +    if (grp_depl_used)
48146 +        tmp |= ((uint32_t)bp->grp_bp_depleted_num - 1) <<
48147 +            BMI_POOL_DEP_NUM_OF_POOLS_SHIFT;
48148 +
48149 +    iowrite32be(tmp, bp_depl_reg);
48150 +    return 0;
48151 +}
48152 +
48153 +int fman_port_set_rate_limiter(struct fman_port *port,
48154 +        struct fman_port_rate_limiter *rate_limiter)
48155 +{
48156 +    uint32_t *rate_limit_reg, *rate_limit_scale_reg;
48157 +    uint32_t granularity, tmp;
48158 +    uint8_t usec_bit, factor;
48159 +
48160 +    switch (port->type) {
48161 +    case E_FMAN_PORT_TYPE_TX:
48162 +    case E_FMAN_PORT_TYPE_TX_10G:
48163 +        rate_limit_reg = &port->bmi_regs->tx.fmbm_trlmt;
48164 +        rate_limit_scale_reg = &port->bmi_regs->tx.fmbm_trlmts;
48165 +        granularity = BMI_RATE_LIMIT_GRAN_TX;
48166 +        break;
48167 +    case E_FMAN_PORT_TYPE_OP:
48168 +        rate_limit_reg = &port->bmi_regs->oh.fmbm_orlmt;
48169 +        rate_limit_scale_reg = &port->bmi_regs->oh.fmbm_orlmts;
48170 +        granularity = BMI_RATE_LIMIT_GRAN_OP;
48171 +        break;
48172 +    default:
48173 +        return -EINVAL;
48174 +    }
48175 +
48176 +    /* Factor is per 1 usec count */
48177 +    factor = 1;
48178 +    usec_bit = rate_limiter->count_1micro_bit;
48179 +
48180 +    /* If rate limit is too small for an 1usec factor, adjust timestamp
48181 +     * scale and multiply the factor */
48182 +    while (rate_limiter->rate < (granularity / factor)) {
48183 +        if (usec_bit == 31)
48184 +            /* Can't configure rate limiter - rate is too small */
48185 +            return -EINVAL;
48186 +
48187 +        usec_bit++;
48188 +        factor <<= 1;
48189 +    }
48190 +
48191 +    /* Figure out register value. The "while" above quarantees that
48192 +     * (rate_limiter->rate * factor / granularity) >= 1 */
48193 +    tmp = (uint32_t)(rate_limiter->rate * factor / granularity - 1);
48194 +
48195 +    /* Check rate limit isn't too large */
48196 +    if (tmp >= BMI_RATE_LIMIT_MAX_RATE_IN_GRAN_UNITS)
48197 +        return -EINVAL;
48198 +
48199 +    /* Check burst size is in allowed range */
48200 +    if ((rate_limiter->burst_size == 0) ||
48201 +            (rate_limiter->burst_size >
48202 +                BMI_RATE_LIMIT_MAX_BURST_SIZE))
48203 +        return -EINVAL;
48204 +
48205 +    tmp |= (uint32_t)(rate_limiter->burst_size - 1) <<
48206 +            BMI_RATE_LIMIT_MAX_BURST_SHIFT;
48207 +
48208 +    if ((port->type == E_FMAN_PORT_TYPE_OP) &&
48209 +            (port->fm_rev_maj == 4)) {
48210 +        if (rate_limiter->high_burst_size_gran)
48211 +            tmp |= BMI_RATE_LIMIT_HIGH_BURST_SIZE_GRAN;
48212 +    }
48213 +
48214 +    iowrite32be(tmp, rate_limit_reg);
48215 +
48216 +    /* Set up rate limiter scale register */
48217 +    tmp = BMI_RATE_LIMIT_SCALE_EN;
48218 +    tmp |= (31 - (uint32_t)usec_bit) << BMI_RATE_LIMIT_SCALE_TSBS_SHIFT;
48219 +
48220 +    if ((port->type == E_FMAN_PORT_TYPE_OP) &&
48221 +            (port->fm_rev_maj == 4))
48222 +        tmp |= rate_limiter->rate_factor;
48223 +
48224 +    iowrite32be(tmp, rate_limit_scale_reg);
48225 +
48226 +    return 0;
48227 +}
48228 +
48229 +int fman_port_delete_rate_limiter(struct fman_port *port)
48230 +{
48231 +    uint32_t *rate_limit_scale_reg;
48232 +
48233 +    switch (port->type) {
48234 +    case E_FMAN_PORT_TYPE_TX:
48235 +    case E_FMAN_PORT_TYPE_TX_10G:
48236 +        rate_limit_scale_reg = &port->bmi_regs->tx.fmbm_trlmts;
48237 +        break;
48238 +    case E_FMAN_PORT_TYPE_OP:
48239 +        rate_limit_scale_reg = &port->bmi_regs->oh.fmbm_orlmts;
48240 +        break;
48241 +    default:
48242 +        return -EINVAL;
48243 +    }
48244 +
48245 +    iowrite32be(0, rate_limit_scale_reg);
48246 +    return 0;
48247 +}
48248 +
48249 +int fman_port_set_err_mask(struct fman_port *port, uint32_t err_mask)
48250 +{
48251 +    uint32_t *err_mask_reg;
48252 +
48253 +    /* Obtain register address */
48254 +    switch (port->type) {
48255 +    case E_FMAN_PORT_TYPE_RX:
48256 +    case E_FMAN_PORT_TYPE_RX_10G:
48257 +        err_mask_reg = &port->bmi_regs->rx.fmbm_rfsem;
48258 +        break;
48259 +    case E_FMAN_PORT_TYPE_OP:
48260 +        err_mask_reg = &port->bmi_regs->oh.fmbm_ofsem;
48261 +        break;
48262 +    default:
48263 +        return -EINVAL;
48264 +    }
48265 +
48266 +    iowrite32be(err_mask, err_mask_reg);
48267 +    return 0;
48268 +}
48269 +
48270 +int fman_port_set_discard_mask(struct fman_port *port, uint32_t discard_mask)
48271 +{
48272 +    uint32_t *discard_mask_reg;
48273 +
48274 +    /* Obtain register address */
48275 +    switch (port->type) {
48276 +    case E_FMAN_PORT_TYPE_RX:
48277 +    case E_FMAN_PORT_TYPE_RX_10G:
48278 +        discard_mask_reg = &port->bmi_regs->rx.fmbm_rfsdm;
48279 +        break;
48280 +    case E_FMAN_PORT_TYPE_OP:
48281 +        discard_mask_reg = &port->bmi_regs->oh.fmbm_ofsdm;
48282 +        break;
48283 +    default:
48284 +        return -EINVAL;
48285 +    }
48286 +
48287 +    iowrite32be(discard_mask, discard_mask_reg);
48288 +    return 0;
48289 +}
48290 +
48291 +int fman_port_modify_rx_fd_bits(struct fman_port *port,
48292 +        uint8_t rx_fd_bits,
48293 +        bool add)
48294 +{
48295 +    uint32_t    tmp;
48296 +
48297 +    switch (port->type) {
48298 +    case E_FMAN_PORT_TYPE_RX:
48299 +    case E_FMAN_PORT_TYPE_RX_10G:
48300 +        break;
48301 +    default:
48302 +        return -EINVAL;
48303 +    }
48304 +
48305 +    tmp = ioread32be(&port->bmi_regs->rx.fmbm_rfne);
48306 +
48307 +    if (add)
48308 +        tmp |= (uint32_t)rx_fd_bits << BMI_NEXT_ENG_FD_BITS_SHIFT;
48309 +    else
48310 +        tmp &= ~((uint32_t)rx_fd_bits << BMI_NEXT_ENG_FD_BITS_SHIFT);
48311 +
48312 +    iowrite32be(tmp, &port->bmi_regs->rx.fmbm_rfne);
48313 +    return 0;
48314 +}
48315 +
48316 +int fman_port_set_perf_cnt_params(struct fman_port *port,
48317 +        struct fman_port_perf_cnt_params *params)
48318 +{
48319 +    uint32_t *pcp_reg, tmp;
48320 +
48321 +    /* Obtain register address and check parameters are in range */
48322 +    switch (port->type) {
48323 +    case E_FMAN_PORT_TYPE_RX:
48324 +    case E_FMAN_PORT_TYPE_RX_10G:
48325 +        pcp_reg = &port->bmi_regs->rx.fmbm_rpcp;
48326 +        if ((params->queue_val == 0) ||
48327 +            (params->queue_val > MAX_PERFORMANCE_RX_QUEUE_COMP))
48328 +            return -EINVAL;
48329 +        break;
48330 +    case E_FMAN_PORT_TYPE_TX:
48331 +    case E_FMAN_PORT_TYPE_TX_10G:
48332 +        pcp_reg = &port->bmi_regs->tx.fmbm_tpcp;
48333 +        if ((params->queue_val == 0) ||
48334 +            (params->queue_val > MAX_PERFORMANCE_TX_QUEUE_COMP))
48335 +            return -EINVAL;
48336 +        break;
48337 +    case E_FMAN_PORT_TYPE_OP:
48338 +    case E_FMAN_PORT_TYPE_HC:
48339 +        pcp_reg = &port->bmi_regs->oh.fmbm_opcp;
48340 +        if (params->queue_val != 0)
48341 +            return -EINVAL;
48342 +        break;
48343 +    default:
48344 +        return -EINVAL;
48345 +    }
48346 +
48347 +    if ((params->task_val == 0) ||
48348 +            (params->task_val > MAX_PERFORMANCE_TASK_COMP))
48349 +        return -EINVAL;
48350 +    if ((params->dma_val == 0) ||
48351 +            (params->dma_val > MAX_PERFORMANCE_DMA_COMP))
48352 +        return -EINVAL;
48353 +    if ((params->fifo_val == 0) ||
48354 +            ((params->fifo_val / FMAN_PORT_BMI_FIFO_UNITS) >
48355 +                MAX_PERFORMANCE_FIFO_COMP))
48356 +        return -EINVAL;
48357 +    tmp = (uint32_t)(params->task_val - 1) <<
48358 +            BMI_PERFORMANCE_TASK_COMP_SHIFT;
48359 +    tmp |= (uint32_t)(params->dma_val - 1) <<
48360 +            BMI_PERFORMANCE_DMA_COMP_SHIFT;
48361 +    tmp |= (uint32_t)(params->fifo_val / FMAN_PORT_BMI_FIFO_UNITS - 1);
48362 +
48363 +    switch (port->type) {
48364 +    case E_FMAN_PORT_TYPE_RX:
48365 +    case E_FMAN_PORT_TYPE_RX_10G:
48366 +    case E_FMAN_PORT_TYPE_TX:
48367 +    case E_FMAN_PORT_TYPE_TX_10G:
48368 +        tmp |= (uint32_t)(params->queue_val - 1) <<
48369 +            BMI_PERFORMANCE_QUEUE_COMP_SHIFT;
48370 +        break;
48371 +    default:
48372 +        break;
48373 +    }
48374 +
48375 +
48376 +    iowrite32be(tmp, pcp_reg);
48377 +    return 0;
48378 +}
48379 +
48380 +int fman_port_set_stats_cnt_mode(struct fman_port *port, bool enable)
48381 +{
48382 +    uint32_t *stats_reg, tmp;
48383 +
48384 +    switch (port->type) {
48385 +    case E_FMAN_PORT_TYPE_RX:
48386 +    case E_FMAN_PORT_TYPE_RX_10G:
48387 +        stats_reg = &port->bmi_regs->rx.fmbm_rstc;
48388 +        break;
48389 +    case E_FMAN_PORT_TYPE_TX:
48390 +    case E_FMAN_PORT_TYPE_TX_10G:
48391 +        stats_reg = &port->bmi_regs->tx.fmbm_tstc;
48392 +        break;
48393 +    case E_FMAN_PORT_TYPE_OP:
48394 +    case E_FMAN_PORT_TYPE_HC:
48395 +        stats_reg = &port->bmi_regs->oh.fmbm_ostc;
48396 +        break;
48397 +    default:
48398 +        return -EINVAL;
48399 +    }
48400 +
48401 +    tmp = ioread32be(stats_reg);
48402 +
48403 +    if (enable)
48404 +        tmp |= BMI_COUNTERS_EN;
48405 +    else
48406 +        tmp &= ~BMI_COUNTERS_EN;
48407 +
48408 +    iowrite32be(tmp, stats_reg);
48409 +    return 0;
48410 +}
48411 +
48412 +int fman_port_set_perf_cnt_mode(struct fman_port *port, bool enable)
48413 +{
48414 +    uint32_t *stats_reg, tmp;
48415 +
48416 +    switch (port->type) {
48417 +    case E_FMAN_PORT_TYPE_RX:
48418 +    case E_FMAN_PORT_TYPE_RX_10G:
48419 +        stats_reg = &port->bmi_regs->rx.fmbm_rpc;
48420 +        break;
48421 +    case E_FMAN_PORT_TYPE_TX:
48422 +    case E_FMAN_PORT_TYPE_TX_10G:
48423 +        stats_reg = &port->bmi_regs->tx.fmbm_tpc;
48424 +        break;
48425 +    case E_FMAN_PORT_TYPE_OP:
48426 +    case E_FMAN_PORT_TYPE_HC:
48427 +        stats_reg = &port->bmi_regs->oh.fmbm_opc;
48428 +        break;
48429 +    default:
48430 +        return -EINVAL;
48431 +    }
48432 +
48433 +    tmp = ioread32be(stats_reg);
48434 +
48435 +    if (enable)
48436 +        tmp |= BMI_COUNTERS_EN;
48437 +    else
48438 +        tmp &= ~BMI_COUNTERS_EN;
48439 +
48440 +    iowrite32be(tmp, stats_reg);
48441 +    return 0;
48442 +}
48443 +
48444 +int fman_port_set_queue_cnt_mode(struct fman_port *port, bool enable)
48445 +{
48446 +    uint32_t tmp;
48447 +
48448 +    tmp = ioread32be(&port->qmi_regs->fmqm_pnc);
48449 +
48450 +    if (enable)
48451 +        tmp |= QMI_PORT_CFG_EN_COUNTERS;
48452 +    else
48453 +        tmp &= ~QMI_PORT_CFG_EN_COUNTERS;
48454 +
48455 +    iowrite32be(tmp, &port->qmi_regs->fmqm_pnc);
48456 +    return 0;
48457 +}
48458 +
48459 +int fman_port_set_bpool_cnt_mode(struct fman_port *port,
48460 +        uint8_t bpid,
48461 +        bool enable)
48462 +{
48463 +    uint8_t index;
48464 +    uint32_t tmp;
48465 +
48466 +    switch (port->type) {
48467 +    case E_FMAN_PORT_TYPE_RX:
48468 +    case E_FMAN_PORT_TYPE_RX_10G:
48469 +        break;
48470 +    default:
48471 +        return -EINVAL;
48472 +    }
48473 +
48474 +    /* Find the pool */
48475 +    index = fman_port_find_bpool(port, bpid);
48476 +    if (index == port->ext_pools_num || index == FMAN_PORT_MAX_EXT_POOLS_NUM)
48477 +        /* Not found */
48478 +        return -EINVAL;
48479 +
48480 +    tmp = ioread32be(&port->bmi_regs->rx.fmbm_ebmpi[index]);
48481 +
48482 +    if (enable)
48483 +        tmp |= BMI_EXT_BUF_POOL_EN_COUNTER;
48484 +    else
48485 +        tmp &= ~BMI_EXT_BUF_POOL_EN_COUNTER;
48486 +
48487 +    iowrite32be(tmp, &port->bmi_regs->rx.fmbm_ebmpi[index]);
48488 +    return 0;
48489 +}
48490 +
48491 +uint32_t fman_port_get_stats_counter(struct fman_port *port,
48492 +        enum fman_port_stats_counters  counter)
48493 +{
48494 +    uint32_t *stats_reg, ret_val;
48495 +
48496 +    switch (port->type) {
48497 +    case E_FMAN_PORT_TYPE_RX:
48498 +    case E_FMAN_PORT_TYPE_RX_10G:
48499 +        get_rx_stats_reg(port, counter, &stats_reg);
48500 +        break;
48501 +    case E_FMAN_PORT_TYPE_TX:
48502 +    case E_FMAN_PORT_TYPE_TX_10G:
48503 +        get_tx_stats_reg(port, counter, &stats_reg);
48504 +        break;
48505 +    case E_FMAN_PORT_TYPE_OP:
48506 +    case E_FMAN_PORT_TYPE_HC:
48507 +        get_oh_stats_reg(port, counter, &stats_reg);
48508 +        break;
48509 +    default:
48510 +        stats_reg = NULL;
48511 +    }
48512 +
48513 +    if (stats_reg == NULL)
48514 +        return 0;
48515 +
48516 +    ret_val = ioread32be(stats_reg);
48517 +    return ret_val;
48518 +}
48519 +
48520 +void fman_port_set_stats_counter(struct fman_port *port,
48521 +        enum fman_port_stats_counters counter,
48522 +        uint32_t value)
48523 +{
48524 +    uint32_t *stats_reg;
48525 +
48526 +    switch (port->type) {
48527 +    case E_FMAN_PORT_TYPE_RX:
48528 +    case E_FMAN_PORT_TYPE_RX_10G:
48529 +        get_rx_stats_reg(port, counter, &stats_reg);
48530 +        break;
48531 +    case E_FMAN_PORT_TYPE_TX:
48532 +    case E_FMAN_PORT_TYPE_TX_10G:
48533 +        get_tx_stats_reg(port, counter, &stats_reg);
48534 +        break;
48535 +    case E_FMAN_PORT_TYPE_OP:
48536 +    case E_FMAN_PORT_TYPE_HC:
48537 +        get_oh_stats_reg(port, counter, &stats_reg);
48538 +        break;
48539 +    default:
48540 +        stats_reg = NULL;
48541 +    }
48542 +
48543 +    if (stats_reg == NULL)
48544 +        return;
48545 +
48546 +    iowrite32be(value, stats_reg);
48547 +}
48548 +
48549 +uint32_t fman_port_get_perf_counter(struct fman_port *port,
48550 +        enum fman_port_perf_counters counter)
48551 +{
48552 +    uint32_t *perf_reg, ret_val;
48553 +
48554 +    switch (port->type) {
48555 +    case E_FMAN_PORT_TYPE_RX:
48556 +    case E_FMAN_PORT_TYPE_RX_10G:
48557 +        get_rx_perf_reg(port, counter, &perf_reg);
48558 +        break;
48559 +    case E_FMAN_PORT_TYPE_TX:
48560 +    case E_FMAN_PORT_TYPE_TX_10G:
48561 +        get_tx_perf_reg(port, counter, &perf_reg);
48562 +        break;
48563 +    case E_FMAN_PORT_TYPE_OP:
48564 +    case E_FMAN_PORT_TYPE_HC:
48565 +        get_oh_perf_reg(port, counter, &perf_reg);
48566 +        break;
48567 +    default:
48568 +        perf_reg = NULL;
48569 +    }
48570 +
48571 +    if (perf_reg == NULL)
48572 +        return 0;
48573 +
48574 +    ret_val = ioread32be(perf_reg);
48575 +    return ret_val;
48576 +}
48577 +
48578 +void fman_port_set_perf_counter(struct fman_port *port,
48579 +        enum fman_port_perf_counters counter,
48580 +        uint32_t value)
48581 +{
48582 +    uint32_t *perf_reg;
48583 +
48584 +    switch (port->type) {
48585 +    case E_FMAN_PORT_TYPE_RX:
48586 +    case E_FMAN_PORT_TYPE_RX_10G:
48587 +        get_rx_perf_reg(port, counter, &perf_reg);
48588 +        break;
48589 +    case E_FMAN_PORT_TYPE_TX:
48590 +    case E_FMAN_PORT_TYPE_TX_10G:
48591 +        get_tx_perf_reg(port, counter, &perf_reg);
48592 +        break;
48593 +    case E_FMAN_PORT_TYPE_OP:
48594 +    case E_FMAN_PORT_TYPE_HC:
48595 +        get_oh_perf_reg(port, counter, &perf_reg);
48596 +        break;
48597 +    default:
48598 +        perf_reg = NULL;
48599 +    }
48600 +
48601 +    if (perf_reg == NULL)
48602 +        return;
48603 +
48604 +    iowrite32be(value, perf_reg);
48605 +}
48606 +
48607 +uint32_t fman_port_get_qmi_counter(struct fman_port *port,
48608 +        enum fman_port_qmi_counters  counter)
48609 +{
48610 +    uint32_t *queue_reg, ret_val;
48611 +
48612 +    get_qmi_counter_reg(port, counter, &queue_reg);
48613 +
48614 +    if (queue_reg == NULL)
48615 +        return 0;
48616 +
48617 +    ret_val = ioread32be(queue_reg);
48618 +    return ret_val;
48619 +}
48620 +
48621 +void fman_port_set_qmi_counter(struct fman_port *port,
48622 +        enum fman_port_qmi_counters counter,
48623 +        uint32_t value)
48624 +{
48625 +    uint32_t *queue_reg;
48626 +
48627 +    get_qmi_counter_reg(port, counter, &queue_reg);
48628 +
48629 +    if (queue_reg == NULL)
48630 +        return;
48631 +
48632 +    iowrite32be(value, queue_reg);
48633 +}
48634 +
48635 +uint32_t fman_port_get_bpool_counter(struct fman_port *port, uint8_t bpid)
48636 +{
48637 +    uint8_t index;
48638 +    uint32_t ret_val;
48639 +
48640 +    switch (port->type) {
48641 +    case E_FMAN_PORT_TYPE_RX:
48642 +    case E_FMAN_PORT_TYPE_RX_10G:
48643 +        break;
48644 +    default:
48645 +        return 0;
48646 +    }
48647 +
48648 +    /* Find the pool */
48649 +    index = fman_port_find_bpool(port, bpid);
48650 +    if (index == port->ext_pools_num || index == FMAN_PORT_MAX_EXT_POOLS_NUM)
48651 +        /* Not found */
48652 +        return 0;
48653 +
48654 +    ret_val = ioread32be(&port->bmi_regs->rx.fmbm_acnt[index]);
48655 +    return ret_val;
48656 +}
48657 +
48658 +void fman_port_set_bpool_counter(struct fman_port *port,
48659 +        uint8_t bpid,
48660 +        uint32_t value)
48661 +{
48662 +    uint8_t index;
48663 +
48664 +    switch (port->type) {
48665 +    case E_FMAN_PORT_TYPE_RX:
48666 +    case E_FMAN_PORT_TYPE_RX_10G:
48667 +        break;
48668 +    default:
48669 +        return;
48670 +    }
48671 +
48672 +    /* Find the pool */
48673 +    index = fman_port_find_bpool(port, bpid);
48674 +    if (index == port->ext_pools_num || index == FMAN_PORT_MAX_EXT_POOLS_NUM)
48675 +        /* Not found */
48676 +        return;
48677 +
48678 +    iowrite32be(value, &port->bmi_regs->rx.fmbm_acnt[index]);
48679 +}
48680 +
48681 +int fman_port_add_congestion_grps(struct fman_port *port,
48682 +        uint32_t grps_map[FMAN_PORT_CG_MAP_NUM])
48683 +{
48684 +    int i;
48685 +    uint32_t tmp, *grp_map_reg;
48686 +    uint8_t max_grp_map_num;
48687 +
48688 +    switch (port->type) {
48689 +    case E_FMAN_PORT_TYPE_RX:
48690 +    case E_FMAN_PORT_TYPE_RX_10G:
48691 +        if (port->fm_rev_maj == 4)
48692 +            max_grp_map_num = 1;
48693 +        else
48694 +            max_grp_map_num = FMAN_PORT_CG_MAP_NUM;
48695 +        grp_map_reg = port->bmi_regs->rx.fmbm_rcgm;
48696 +        break;
48697 +    case E_FMAN_PORT_TYPE_OP:
48698 +        max_grp_map_num = 1;
48699 +        if (port->fm_rev_maj != 4)
48700 +            return -EINVAL;
48701 +        grp_map_reg = port->bmi_regs->oh.fmbm_ocgm;
48702 +        break;
48703 +    default:
48704 +        return -EINVAL;
48705 +    }
48706 +
48707 +    for (i = (max_grp_map_num - 1); i >= 0; i--) {
48708 +        if (grps_map[i] == 0)
48709 +            continue;
48710 +        tmp = ioread32be(&grp_map_reg[i]);
48711 +        tmp |= grps_map[i];
48712 +        iowrite32be(tmp, &grp_map_reg[i]);
48713 +    }
48714 +
48715 +    return 0;
48716 +}
48717 +
48718 +int fman_port_remove_congestion_grps(struct fman_port *port,
48719 +        uint32_t grps_map[FMAN_PORT_CG_MAP_NUM])
48720 +{
48721 +    int i;
48722 +    uint32_t tmp, *grp_map_reg;
48723 +    uint8_t max_grp_map_num;
48724 +
48725 +    switch (port->type) {
48726 +    case E_FMAN_PORT_TYPE_RX:
48727 +    case E_FMAN_PORT_TYPE_RX_10G:
48728 +        if (port->fm_rev_maj == 4)
48729 +            max_grp_map_num = 1;
48730 +        else
48731 +            max_grp_map_num = FMAN_PORT_CG_MAP_NUM;
48732 +        grp_map_reg = port->bmi_regs->rx.fmbm_rcgm;
48733 +        break;
48734 +    case E_FMAN_PORT_TYPE_OP:
48735 +        max_grp_map_num = 1;
48736 +        if (port->fm_rev_maj != 4)
48737 +            return -EINVAL;
48738 +        grp_map_reg = port->bmi_regs->oh.fmbm_ocgm;
48739 +        break;
48740 +    default:
48741 +        return -EINVAL;
48742 +    }
48743 +
48744 +    for (i = (max_grp_map_num - 1); i >= 0; i--) {
48745 +        if (grps_map[i] == 0)
48746 +            continue;
48747 +        tmp = ioread32be(&grp_map_reg[i]);
48748 +        tmp &= ~grps_map[i];
48749 +        iowrite32be(tmp, &grp_map_reg[i]);
48750 +    }
48751 +    return 0;
48752 +}
48753 --- /dev/null
48754 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/Makefile
48755 @@ -0,0 +1,15 @@
48756 +#
48757 +# Makefile for the Freescale Ethernet controllers
48758 +#
48759 +ccflags-y           += -DVERSION=\"\"
48760 +#
48761 +#Include netcomm SW specific definitions
48762 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
48763 +
48764 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
48765 +
48766 +ccflags-y += -I$(NCSW_FM_INC)
48767 +
48768 +obj-y          += fsl-ncsw-RTC.o
48769 +
48770 +fsl-ncsw-RTC-objs      :=   fm_rtc.o fman_rtc.o
48771 --- /dev/null
48772 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.c
48773 @@ -0,0 +1,692 @@
48774 +/*
48775 + * Copyright 2008-2012 Freescale Semiconductor Inc.
48776 + *
48777 + * Redistribution and use in source and binary forms, with or without
48778 + * modification, are permitted provided that the following conditions are met:
48779 + *     * Redistributions of source code must retain the above copyright
48780 + *       notice, this list of conditions and the following disclaimer.
48781 + *     * Redistributions in binary form must reproduce the above copyright
48782 + *       notice, this list of conditions and the following disclaimer in the
48783 + *       documentation and/or other materials provided with the distribution.
48784 + *     * Neither the name of Freescale Semiconductor nor the
48785 + *       names of its contributors may be used to endorse or promote products
48786 + *       derived from this software without specific prior written permission.
48787 + *
48788 + *
48789 + * ALTERNATIVELY, this software may be distributed under the terms of the
48790 + * GNU General Public License ("GPL") as published by the Free Software
48791 + * Foundation, either version 2 of that License or (at your option) any
48792 + * later version.
48793 + *
48794 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
48795 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
48796 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
48797 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
48798 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
48799 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
48800 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
48801 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
48802 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
48803 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48804 + */
48805 +
48806 +
48807 +/******************************************************************************
48808 + @File          fm_rtc.c
48809 +
48810 + @Description   FM RTC driver implementation.
48811 +
48812 + @Cautions      None
48813 +*//***************************************************************************/
48814 +#include <linux/math64.h>
48815 +#include "error_ext.h"
48816 +#include "debug_ext.h"
48817 +#include "string_ext.h"
48818 +#include "part_ext.h"
48819 +#include "xx_ext.h"
48820 +#include "ncsw_ext.h"
48821 +
48822 +#include "fm_rtc.h"
48823 +#include "fm_common.h"
48824 +
48825 +
48826 +
48827 +/*****************************************************************************/
48828 +static t_Error CheckInitParameters(t_FmRtc *p_Rtc)
48829 +{
48830 +    struct rtc_cfg  *p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
48831 +    int                 i;
48832 +
48833 +    if ((p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL) &&
48834 +        (p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_SYSTEM) &&
48835 +        (p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR))
48836 +        RETURN_ERROR(MAJOR, E_INVALID_CLOCK, ("Source clock undefined"));
48837 +
48838 +    if (p_Rtc->outputClockDivisor == 0)
48839 +    {
48840 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
48841 +                     ("Divisor for output clock (should be positive)"));
48842 +    }
48843 +
48844 +    for (i=0; i < FM_RTC_NUM_OF_ALARMS; i++)
48845 +    {
48846 +        if ((p_RtcDriverParam->alarm_polarity[i] != E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW) &&
48847 +            (p_RtcDriverParam->alarm_polarity[i] != E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH))
48848 +        {
48849 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm %d signal polarity", i));
48850 +        }
48851 +    }
48852 +    for (i=0; i < FM_RTC_NUM_OF_EXT_TRIGGERS; i++)
48853 +    {
48854 +        if ((p_RtcDriverParam->trigger_polarity[i] != E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE) &&
48855 +            (p_RtcDriverParam->trigger_polarity[i] != E_FMAN_RTC_TRIGGER_ON_RISING_EDGE))
48856 +        {
48857 +            RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Trigger %d signal polarity", i));
48858 +        }
48859 +    }
48860 +
48861 +    return E_OK;
48862 +}
48863 +
48864 +/*****************************************************************************/
48865 +static void RtcExceptions(t_Handle h_FmRtc)
48866 +{
48867 +    t_FmRtc             *p_Rtc = (t_FmRtc *)h_FmRtc;
48868 +    struct rtc_regs     *p_MemMap;
48869 +    register uint32_t   events;
48870 +
48871 +    ASSERT_COND(p_Rtc);
48872 +    p_MemMap = p_Rtc->p_MemMap;
48873 +
48874 +    events = fman_rtc_check_and_clear_event(p_MemMap);
48875 +    if (events & FMAN_RTC_TMR_TEVENT_ALM1)
48876 +    {
48877 +        if (p_Rtc->alarmParams[0].clearOnExpiration)
48878 +        {
48879 +            fman_rtc_set_timer_alarm_l(p_MemMap, 0, 0);
48880 +            fman_rtc_disable_interupt(p_MemMap, FMAN_RTC_TMR_TEVENT_ALM1);
48881 +        }
48882 +        ASSERT_COND(p_Rtc->alarmParams[0].f_AlarmCallback);
48883 +        p_Rtc->alarmParams[0].f_AlarmCallback(p_Rtc->h_App, 0);
48884 +    }
48885 +    if (events & FMAN_RTC_TMR_TEVENT_ALM2)
48886 +    {
48887 +        if (p_Rtc->alarmParams[1].clearOnExpiration)
48888 +        {
48889 +            fman_rtc_set_timer_alarm_l(p_MemMap, 1, 0);
48890 +            fman_rtc_disable_interupt(p_MemMap, FMAN_RTC_TMR_TEVENT_ALM2);
48891 +        }
48892 +        ASSERT_COND(p_Rtc->alarmParams[1].f_AlarmCallback);
48893 +        p_Rtc->alarmParams[1].f_AlarmCallback(p_Rtc->h_App, 1);
48894 +    }
48895 +    if (events & FMAN_RTC_TMR_TEVENT_PP1)
48896 +    {
48897 +        ASSERT_COND(p_Rtc->periodicPulseParams[0].f_PeriodicPulseCallback);
48898 +        p_Rtc->periodicPulseParams[0].f_PeriodicPulseCallback(p_Rtc->h_App, 0);
48899 +    }
48900 +    if (events & FMAN_RTC_TMR_TEVENT_PP2)
48901 +    {
48902 +        ASSERT_COND(p_Rtc->periodicPulseParams[1].f_PeriodicPulseCallback);
48903 +        p_Rtc->periodicPulseParams[1].f_PeriodicPulseCallback(p_Rtc->h_App, 1);
48904 +    }
48905 +    if (events & FMAN_RTC_TMR_TEVENT_ETS1)
48906 +    {
48907 +        ASSERT_COND(p_Rtc->externalTriggerParams[0].f_ExternalTriggerCallback);
48908 +        p_Rtc->externalTriggerParams[0].f_ExternalTriggerCallback(p_Rtc->h_App, 0);
48909 +    }
48910 +    if (events & FMAN_RTC_TMR_TEVENT_ETS2)
48911 +    {
48912 +        ASSERT_COND(p_Rtc->externalTriggerParams[1].f_ExternalTriggerCallback);
48913 +        p_Rtc->externalTriggerParams[1].f_ExternalTriggerCallback(p_Rtc->h_App, 1);
48914 +    }
48915 +}
48916 +
48917 +
48918 +/*****************************************************************************/
48919 +t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam)
48920 +{
48921 +    t_FmRtc *p_Rtc;
48922 +
48923 +    SANITY_CHECK_RETURN_VALUE(p_FmRtcParam, E_NULL_POINTER, NULL);
48924 +
48925 +    /* Allocate memory for the FM RTC driver parameters */
48926 +    p_Rtc = (t_FmRtc *)XX_Malloc(sizeof(t_FmRtc));
48927 +    if (!p_Rtc)
48928 +    {
48929 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM RTC driver structure"));
48930 +        return NULL;
48931 +    }
48932 +
48933 +    memset(p_Rtc, 0, sizeof(t_FmRtc));
48934 +
48935 +    /* Allocate memory for the FM RTC driver parameters */
48936 +    p_Rtc->p_RtcDriverParam = (struct rtc_cfg *)XX_Malloc(sizeof(struct rtc_cfg));
48937 +    if (!p_Rtc->p_RtcDriverParam)
48938 +    {
48939 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM RTC driver parameters"));
48940 +        XX_Free(p_Rtc);
48941 +        return NULL;
48942 +    }
48943 +
48944 +    memset(p_Rtc->p_RtcDriverParam, 0, sizeof(struct rtc_cfg));
48945 +
48946 +    /* Store RTC configuration parameters */
48947 +    p_Rtc->h_Fm = p_FmRtcParam->h_Fm;
48948 +
48949 +    /* Set default RTC configuration parameters */
48950 +    fman_rtc_defconfig(p_Rtc->p_RtcDriverParam);
48951 +
48952 +    p_Rtc->outputClockDivisor = DEFAULT_OUTPUT_CLOCK_DIVISOR;
48953 +    p_Rtc->p_RtcDriverParam->bypass = DEFAULT_BYPASS;
48954 +    p_Rtc->clockPeriodNanoSec = DEFAULT_CLOCK_PERIOD; /* 1 usec */
48955 +
48956 +
48957 +    /* Store RTC parameters in the RTC control structure */
48958 +    p_Rtc->p_MemMap = (struct rtc_regs *)UINT_TO_PTR(p_FmRtcParam->baseAddress);
48959 +    p_Rtc->h_App    = p_FmRtcParam->h_App;
48960 +
48961 +    return p_Rtc;
48962 +}
48963 +
48964 +/*****************************************************************************/
48965 +t_Error FM_RTC_Init(t_Handle h_FmRtc)
48966 +{
48967 +    t_FmRtc             *p_Rtc = (t_FmRtc *)h_FmRtc;
48968 +    struct rtc_cfg      *p_RtcDriverParam;
48969 +    struct rtc_regs     *p_MemMap;
48970 +    uint32_t            freqCompensation = 0;
48971 +    uint64_t            tmpDouble;
48972 +    bool                init_freq_comp = FALSE;
48973 +
48974 +    p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
48975 +    p_MemMap = p_Rtc->p_MemMap;
48976 +
48977 +    if (CheckInitParameters(p_Rtc)!=E_OK)
48978 +        RETURN_ERROR(MAJOR, E_CONFLICT,
48979 +                     ("Init Parameters are not Valid"));
48980 +
48981 +    /* TODO check that no timestamping MACs are working in this stage. */
48982 +
48983 +    /* find source clock frequency in Mhz */
48984 +    if (p_Rtc->p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_SYSTEM)
48985 +        p_Rtc->srcClkFreqMhz = p_Rtc->p_RtcDriverParam->ext_src_clk_freq;
48986 +    else
48987 +        p_Rtc->srcClkFreqMhz = (uint32_t)(FmGetMacClockFreq(p_Rtc->h_Fm));
48988 +
48989 +    /* if timer in Master mode Initialize TMR_CTRL */
48990 +    /* We want the counter (TMR_CNT) to count in nano-seconds */
48991 +    if (!p_RtcDriverParam->timer_slave_mode && p_Rtc->p_RtcDriverParam->bypass)
48992 +        p_Rtc->clockPeriodNanoSec = (1000 / p_Rtc->srcClkFreqMhz);
48993 +    else
48994 +    {
48995 +        /* Initialize TMR_ADD with the initial frequency compensation value:
48996 +           freqCompensation = (2^32 / frequency ratio) */
48997 +        /* frequency ratio = sorce clock/rtc clock =
48998 +         * (p_Rtc->srcClkFreqMhz*1000000))/ 1/(p_Rtc->clockPeriodNanoSec * 1000000000) */
48999 +        init_freq_comp = TRUE;
49000 +        freqCompensation = (uint32_t)DIV_CEIL(ACCUMULATOR_OVERFLOW * 1000,
49001 +                                              p_Rtc->clockPeriodNanoSec * p_Rtc->srcClkFreqMhz);
49002 +    }
49003 +
49004 +    /* check the legality of the relation between source and destination clocks */
49005 +    /* should be larger than 1.0001 */
49006 +    tmpDouble = 10000 * (uint64_t)p_Rtc->clockPeriodNanoSec * (uint64_t)p_Rtc->srcClkFreqMhz;
49007 +    if ((tmpDouble) <= 10001)
49008 +        RETURN_ERROR(MAJOR, E_CONFLICT,
49009 +              ("Invalid relation between source and destination clocks. Should be larger than 1.0001"));
49010 +
49011 +    fman_rtc_init(p_RtcDriverParam,
49012 +             p_MemMap,
49013 +             FM_RTC_NUM_OF_ALARMS,
49014 +             FM_RTC_NUM_OF_PERIODIC_PULSES,
49015 +             FM_RTC_NUM_OF_EXT_TRIGGERS,
49016 +             init_freq_comp,
49017 +             freqCompensation,
49018 +             p_Rtc->outputClockDivisor);
49019 +
49020 +    /* Register the FM RTC interrupt */
49021 +    FmRegisterIntr(p_Rtc->h_Fm, e_FM_MOD_TMR, 0, e_FM_INTR_TYPE_NORMAL, RtcExceptions , p_Rtc);
49022 +
49023 +    /* Free parameters structures */
49024 +    XX_Free(p_Rtc->p_RtcDriverParam);
49025 +    p_Rtc->p_RtcDriverParam = NULL;
49026 +
49027 +    return E_OK;
49028 +}
49029 +
49030 +/*****************************************************************************/
49031 +t_Error FM_RTC_Free(t_Handle h_FmRtc)
49032 +{
49033 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49034 +
49035 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49036 +
49037 +    if (p_Rtc->p_RtcDriverParam)
49038 +    {
49039 +        XX_Free(p_Rtc->p_RtcDriverParam);
49040 +    }
49041 +    else
49042 +    {
49043 +        FM_RTC_Disable(h_FmRtc);
49044 +    }
49045 +
49046 +    /* Unregister FM RTC interrupt */
49047 +    FmUnregisterIntr(p_Rtc->h_Fm, e_FM_MOD_TMR, 0, e_FM_INTR_TYPE_NORMAL);
49048 +    XX_Free(p_Rtc);
49049 +
49050 +    return E_OK;
49051 +}
49052 +
49053 +/*****************************************************************************/
49054 +t_Error FM_RTC_ConfigSourceClock(t_Handle         h_FmRtc,
49055 +                                    e_FmSrcClk    srcClk,
49056 +                                    uint32_t      freqInMhz)
49057 +{
49058 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49059 +
49060 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49061 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49062 +
49063 +    p_Rtc->p_RtcDriverParam->src_clk = (enum fman_src_clock)srcClk;
49064 +    if (srcClk != e_FM_RTC_SOURCE_CLOCK_SYSTEM)
49065 +        p_Rtc->p_RtcDriverParam->ext_src_clk_freq = freqInMhz;
49066 +
49067 +    return E_OK;
49068 +}
49069 +
49070 +/*****************************************************************************/
49071 +t_Error FM_RTC_ConfigPeriod(t_Handle h_FmRtc, uint32_t period)
49072 +{
49073 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49074 +
49075 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49076 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49077 +
49078 +    p_Rtc->clockPeriodNanoSec = period;
49079 +
49080 +    return E_OK;
49081 +}
49082 +
49083 +/*****************************************************************************/
49084 +t_Error FM_RTC_ConfigFrequencyBypass(t_Handle h_FmRtc, bool enabled)
49085 +{
49086 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49087 +
49088 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49089 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49090 +
49091 +    p_Rtc->p_RtcDriverParam->bypass = enabled;
49092 +
49093 +    return E_OK;
49094 +}
49095 +
49096 +/*****************************************************************************/
49097 +t_Error FM_RTC_ConfigInvertedInputClockPhase(t_Handle h_FmRtc, bool inverted)
49098 +{
49099 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49100 +
49101 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49102 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49103 +
49104 +    p_Rtc->p_RtcDriverParam->invert_input_clk_phase = inverted;
49105 +
49106 +    return E_OK;
49107 +}
49108 +
49109 +/*****************************************************************************/
49110 +t_Error FM_RTC_ConfigInvertedOutputClockPhase(t_Handle h_FmRtc, bool inverted)
49111 +{
49112 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49113 +
49114 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49115 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49116 +
49117 +    p_Rtc->p_RtcDriverParam->invert_output_clk_phase = inverted;
49118 +
49119 +    return E_OK;
49120 +}
49121 +
49122 +/*****************************************************************************/
49123 +t_Error FM_RTC_ConfigOutputClockDivisor(t_Handle h_FmRtc, uint16_t divisor)
49124 +{
49125 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49126 +
49127 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49128 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49129 +
49130 +    p_Rtc->outputClockDivisor = divisor;
49131 +
49132 +    return E_OK;
49133 +}
49134 +
49135 +/*****************************************************************************/
49136 +t_Error FM_RTC_ConfigPulseRealignment(t_Handle h_FmRtc, bool enable)
49137 +{
49138 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49139 +
49140 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49141 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49142 +
49143 +    p_Rtc->p_RtcDriverParam->pulse_realign = enable;
49144 +
49145 +    return E_OK;
49146 +}
49147 +
49148 +/*****************************************************************************/
49149 +t_Error FM_RTC_ConfigAlarmPolarity(t_Handle             h_FmRtc,
49150 +                                   uint8_t              alarmId,
49151 +                                   e_FmRtcAlarmPolarity alarmPolarity)
49152 +{
49153 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49154 +
49155 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49156 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49157 +
49158 +    if (alarmId >= FM_RTC_NUM_OF_ALARMS)
49159 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm ID"));
49160 +
49161 +    p_Rtc->p_RtcDriverParam->alarm_polarity[alarmId] =
49162 +        (enum fman_rtc_alarm_polarity)alarmPolarity;
49163 +
49164 +    return E_OK;
49165 +}
49166 +
49167 +/*****************************************************************************/
49168 +t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle               h_FmRtc,
49169 +                                             uint8_t                triggerId,
49170 +                                             e_FmRtcTriggerPolarity triggerPolarity)
49171 +{
49172 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49173 +
49174 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49175 +    SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49176 +
49177 +    if (triggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
49178 +    {
49179 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External trigger ID"));
49180 +    }
49181 +
49182 +    p_Rtc->p_RtcDriverParam->trigger_polarity[triggerId] =
49183 +        (enum fman_rtc_trigger_polarity)triggerPolarity;
49184 +
49185 +    return E_OK;
49186 +}
49187 +
49188 +/*****************************************************************************/
49189 +t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock)
49190 +{
49191 +    t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
49192 +
49193 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49194 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49195 +
49196 +    fman_rtc_enable(p_Rtc->p_MemMap, resetClock);
49197 +    return E_OK;
49198 +}
49199 +
49200 +/*****************************************************************************/
49201 +t_Error FM_RTC_Disable(t_Handle h_FmRtc)
49202 +{
49203 +    t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
49204 +
49205 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49206 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49207 +
49208 +    /* TODO A check must be added here, that no timestamping MAC's
49209 +     * are working in this stage. */
49210 +    fman_rtc_disable(p_Rtc->p_MemMap);
49211 +
49212 +    return E_OK;
49213 +}
49214 +
49215 +/*****************************************************************************/
49216 +t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset)
49217 +{
49218 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49219 +
49220 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49221 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49222 +
49223 +    fman_rtc_set_timer_offset(p_Rtc->p_MemMap, offset);
49224 +    return E_OK;
49225 +}
49226 +
49227 +/*****************************************************************************/
49228 +t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams)
49229 +{
49230 +    t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
49231 +    uint64_t        tmpAlarm;
49232 +    bool            enable = FALSE;
49233 +
49234 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49235 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49236 +
49237 +    if (p_FmRtcAlarmParams->alarmId >= FM_RTC_NUM_OF_ALARMS)
49238 +    {
49239 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm ID"));
49240 +    }
49241 +
49242 +    if (p_FmRtcAlarmParams->alarmTime < p_Rtc->clockPeriodNanoSec)
49243 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
49244 +                     ("Alarm time must be equal or larger than RTC period - %d nanoseconds",
49245 +                      p_Rtc->clockPeriodNanoSec));
49246 +    tmpAlarm = p_FmRtcAlarmParams->alarmTime;
49247 +    if (do_div(tmpAlarm, p_Rtc->clockPeriodNanoSec))
49248 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
49249 +                     ("Alarm time must be a multiple of RTC period - %d nanoseconds",
49250 +                      p_Rtc->clockPeriodNanoSec));
49251 +
49252 +    if (p_FmRtcAlarmParams->f_AlarmCallback)
49253 +    {
49254 +        p_Rtc->alarmParams[p_FmRtcAlarmParams->alarmId].f_AlarmCallback = p_FmRtcAlarmParams->f_AlarmCallback;
49255 +        p_Rtc->alarmParams[p_FmRtcAlarmParams->alarmId].clearOnExpiration = p_FmRtcAlarmParams->clearOnExpiration;
49256 +        enable = TRUE;
49257 +    }
49258 +
49259 +    fman_rtc_set_alarm(p_Rtc->p_MemMap, p_FmRtcAlarmParams->alarmId, (unsigned long)tmpAlarm, enable);
49260 +
49261 +    return E_OK;
49262 +}
49263 +
49264 +/*****************************************************************************/
49265 +t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_FmRtcPeriodicPulseParams)
49266 +{
49267 +    t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
49268 +    bool            enable = FALSE;
49269 +    uint64_t        tmpFiper;
49270 +
49271 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49272 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49273 +
49274 +    if (p_FmRtcPeriodicPulseParams->periodicPulseId >= FM_RTC_NUM_OF_PERIODIC_PULSES)
49275 +    {
49276 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse ID"));
49277 +    }
49278 +    if (fman_rtc_is_enabled(p_Rtc->p_MemMap))
49279 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Can't set Periodic pulse when RTC is enabled."));
49280 +    if (p_FmRtcPeriodicPulseParams->periodicPulsePeriod < p_Rtc->clockPeriodNanoSec)
49281 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
49282 +                     ("Periodic pulse must be equal or larger than RTC period - %d nanoseconds",
49283 +                      p_Rtc->clockPeriodNanoSec));
49284 +    tmpFiper = p_FmRtcPeriodicPulseParams->periodicPulsePeriod;
49285 +    if (do_div(tmpFiper, p_Rtc->clockPeriodNanoSec))
49286 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
49287 +                     ("Periodic pulse must be a multiple of RTC period - %d nanoseconds",
49288 +                      p_Rtc->clockPeriodNanoSec));
49289 +    if (tmpFiper & 0xffffffff00000000LL)
49290 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
49291 +                     ("Periodic pulse/RTC Period must be smaller than 4294967296",
49292 +                      p_Rtc->clockPeriodNanoSec));
49293 +
49294 +    if (p_FmRtcPeriodicPulseParams->f_PeriodicPulseCallback)
49295 +    {
49296 +        p_Rtc->periodicPulseParams[p_FmRtcPeriodicPulseParams->periodicPulseId].f_PeriodicPulseCallback =
49297 +                                                                p_FmRtcPeriodicPulseParams->f_PeriodicPulseCallback;
49298 +        enable = TRUE;
49299 +    }
49300 +    fman_rtc_set_periodic_pulse(p_Rtc->p_MemMap, p_FmRtcPeriodicPulseParams->periodicPulseId, (uint32_t)tmpFiper, enable);
49301 +    return E_OK;
49302 +}
49303 +
49304 +/*****************************************************************************/
49305 +t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId)
49306 +{
49307 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49308 +
49309 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49310 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49311 +
49312 +    if (periodicPulseId >= FM_RTC_NUM_OF_PERIODIC_PULSES)
49313 +    {
49314 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse ID"));
49315 +    }
49316 +
49317 +    p_Rtc->periodicPulseParams[periodicPulseId].f_PeriodicPulseCallback = NULL;
49318 +    fman_rtc_clear_periodic_pulse(p_Rtc->p_MemMap, periodicPulseId);
49319 +
49320 +    return E_OK;
49321 +}
49322 +
49323 +/*****************************************************************************/
49324 +t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams *p_FmRtcExternalTriggerParams)
49325 +{
49326 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49327 +    bool        enable = FALSE;
49328 +
49329 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49330 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49331 +
49332 +    if (p_FmRtcExternalTriggerParams->externalTriggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
49333 +    {
49334 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External Trigger ID"));
49335 +    }
49336 +
49337 +    if (p_FmRtcExternalTriggerParams->f_ExternalTriggerCallback)
49338 +    {
49339 +        p_Rtc->externalTriggerParams[p_FmRtcExternalTriggerParams->externalTriggerId].f_ExternalTriggerCallback = p_FmRtcExternalTriggerParams->f_ExternalTriggerCallback;
49340 +        enable = TRUE;
49341 +    }
49342 +
49343 +    fman_rtc_set_ext_trigger(p_Rtc->p_MemMap, p_FmRtcExternalTriggerParams->externalTriggerId, enable, p_FmRtcExternalTriggerParams->usePulseAsInput);
49344 +    return E_OK;
49345 +}
49346 +
49347 +/*****************************************************************************/
49348 +t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t externalTriggerId)
49349 +{
49350 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49351 +
49352 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49353 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49354 +
49355 +    if (externalTriggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
49356 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External Trigger ID"));
49357 +
49358 +    p_Rtc->externalTriggerParams[externalTriggerId].f_ExternalTriggerCallback = NULL;
49359 +
49360 +    fman_rtc_clear_external_trigger(p_Rtc->p_MemMap, externalTriggerId);
49361 +
49362 +    return E_OK;
49363 +}
49364 +
49365 +/*****************************************************************************/
49366 +t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle             h_FmRtc,
49367 +                                              uint8_t           triggerId,
49368 +                                              uint64_t          *p_TimeStamp)
49369 +{
49370 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49371 +
49372 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49373 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49374 +
49375 +    if (triggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
49376 +        RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External trigger ID"));
49377 +
49378 +    *p_TimeStamp = fman_rtc_get_trigger_stamp(p_Rtc->p_MemMap, triggerId)*p_Rtc->clockPeriodNanoSec;
49379 +
49380 +    return E_OK;
49381 +}
49382 +
49383 +/*****************************************************************************/
49384 +t_Error FM_RTC_GetCurrentTime(t_Handle h_FmRtc, uint64_t *p_Ts)
49385 +{
49386 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49387 +
49388 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49389 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49390 +
49391 +    *p_Ts = fman_rtc_get_timer(p_Rtc->p_MemMap)*p_Rtc->clockPeriodNanoSec;
49392 +
49393 +    return E_OK;
49394 +}
49395 +
49396 +/*****************************************************************************/
49397 +t_Error FM_RTC_SetCurrentTime(t_Handle h_FmRtc, uint64_t ts)
49398 +{
49399 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49400 +
49401 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49402 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49403 +
49404 +    do_div(ts, p_Rtc->clockPeriodNanoSec);
49405 +    fman_rtc_set_timer(p_Rtc->p_MemMap, (int64_t)ts);
49406 +
49407 +    return E_OK;
49408 +}
49409 +
49410 +/*****************************************************************************/
49411 +t_Error FM_RTC_GetFreqCompensation(t_Handle h_FmRtc, uint32_t *p_Compensation)
49412 +{
49413 +    t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
49414 +
49415 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49416 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49417 +
49418 +    *p_Compensation = fman_rtc_get_frequency_compensation(p_Rtc->p_MemMap);
49419 +
49420 +    return E_OK;
49421 +}
49422 +
49423 +/*****************************************************************************/
49424 +t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation)
49425 +{
49426 +    t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49427 +
49428 +    SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49429 +    SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49430 +
49431 +    /* set the new freqCompensation */
49432 +    fman_rtc_set_frequency_compensation(p_Rtc->p_MemMap, freqCompensation);
49433 +
49434 +    return E_OK;
49435 +}
49436 +
49437 +#ifdef CONFIG_PTP_1588_CLOCK_DPAA
49438 +/*****************************************************************************/
49439 +t_Error FM_RTC_EnableInterrupt(t_Handle h_FmRtc, uint32_t events)
49440 +{
49441 +       t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49442 +
49443 +       SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49444 +       SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49445 +
49446 +       /* enable interrupt */
49447 +       fman_rtc_enable_interupt(p_Rtc->p_MemMap, events);
49448 +
49449 +       return E_OK;
49450 +}
49451 +
49452 +/*****************************************************************************/
49453 +t_Error FM_RTC_DisableInterrupt(t_Handle h_FmRtc, uint32_t events)
49454 +{
49455 +       t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
49456 +
49457 +       SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
49458 +       SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
49459 +
49460 +       /* disable interrupt */
49461 +       fman_rtc_disable_interupt(p_Rtc->p_MemMap, events);
49462 +
49463 +       return E_OK;
49464 +}
49465 +#endif
49466 --- /dev/null
49467 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.h
49468 @@ -0,0 +1,96 @@
49469 +/*
49470 + * Copyright 2008-2012 Freescale Semiconductor Inc.
49471 + *
49472 + * Redistribution and use in source and binary forms, with or without
49473 + * modification, are permitted provided that the following conditions are met:
49474 + *     * Redistributions of source code must retain the above copyright
49475 + *       notice, this list of conditions and the following disclaimer.
49476 + *     * Redistributions in binary form must reproduce the above copyright
49477 + *       notice, this list of conditions and the following disclaimer in the
49478 + *       documentation and/or other materials provided with the distribution.
49479 + *     * Neither the name of Freescale Semiconductor nor the
49480 + *       names of its contributors may be used to endorse or promote products
49481 + *       derived from this software without specific prior written permission.
49482 + *
49483 + *
49484 + * ALTERNATIVELY, this software may be distributed under the terms of the
49485 + * GNU General Public License ("GPL") as published by the Free Software
49486 + * Foundation, either version 2 of that License or (at your option) any
49487 + * later version.
49488 + *
49489 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
49490 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
49491 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
49492 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
49493 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
49494 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
49495 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
49496 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49497 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
49498 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49499 + */
49500 +
49501 +
49502 +/******************************************************************************
49503 + @File          fm_rtc.h
49504 +
49505 + @Description   Memory map and internal definitions for FM RTC IEEE1588 Timer driver.
49506 +
49507 + @Cautions      None
49508 +*//***************************************************************************/
49509 +
49510 +#ifndef __FM_RTC_H__
49511 +#define __FM_RTC_H__
49512 +
49513 +#include "std_ext.h"
49514 +#include "fm_rtc_ext.h"
49515 +
49516 +
49517 +#define __ERR_MODULE__  MODULE_FM_RTC
49518 +
49519 +/* General definitions */
49520 +
49521 +#define ACCUMULATOR_OVERFLOW            ((uint64_t)(1LL << 32))
49522 +#define DEFAULT_OUTPUT_CLOCK_DIVISOR     0x00000002
49523 +#define DEFAULT_BYPASS                          FALSE
49524 +#define DEFAULT_CLOCK_PERIOD             1000
49525 +
49526 +
49527 +
49528 +typedef struct t_FmRtcAlarm
49529 +{
49530 +    t_FmRtcExceptionsCallback   *f_AlarmCallback;
49531 +    bool                        clearOnExpiration;
49532 +} t_FmRtcAlarm;
49533 +
49534 +typedef struct t_FmRtcPeriodicPulse
49535 +{
49536 +    t_FmRtcExceptionsCallback   *f_PeriodicPulseCallback;
49537 +} t_FmRtcPeriodicPulse;
49538 +
49539 +typedef struct t_FmRtcExternalTrigger
49540 +{
49541 +    t_FmRtcExceptionsCallback   *f_ExternalTriggerCallback;
49542 +} t_FmRtcExternalTrigger;
49543 +
49544 +
49545 +/**************************************************************************//**
49546 + @Description RTC FM driver control structure.
49547 +*//***************************************************************************/
49548 +typedef struct t_FmRtc
49549 +{
49550 +    t_Part                  *p_Part;            /**< Pointer to the integration device              */
49551 +    t_Handle                h_Fm;
49552 +    t_Handle                h_App;              /**< Application handle */
49553 +    struct rtc_regs                    *p_MemMap;
49554 +    uint32_t                clockPeriodNanoSec; /**< RTC clock period in nano-seconds (for FS mode) */
49555 +    uint32_t                srcClkFreqMhz;
49556 +    uint16_t                outputClockDivisor; /**< Output clock divisor (for FS mode) */
49557 +    t_FmRtcAlarm            alarmParams[FM_RTC_NUM_OF_ALARMS];
49558 +    t_FmRtcPeriodicPulse    periodicPulseParams[FM_RTC_NUM_OF_PERIODIC_PULSES];
49559 +    t_FmRtcExternalTrigger  externalTriggerParams[FM_RTC_NUM_OF_EXT_TRIGGERS];
49560 +    struct rtc_cfg                     *p_RtcDriverParam;  /**< RTC Driver parameters (for Init phase) */
49561 +} t_FmRtc;
49562 +
49563 +
49564 +#endif /* __FM_RTC_H__ */
49565 --- /dev/null
49566 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fman_rtc.c
49567 @@ -0,0 +1,334 @@
49568 +/*
49569 + * Copyright 2008-2013 Freescale Semiconductor Inc.
49570 + *
49571 + * Redistribution and use in source and binary forms, with or without
49572 + * modification, are permitted provided that the following conditions are met:
49573 + *     * Redistributions of source code must retain the above copyright
49574 + *       notice, this list of conditions and the following disclaimer.
49575 + *     * Redistributions in binary form must reproduce the above copyright
49576 + *       notice, this list of conditions and the following disclaimer in the
49577 + *       documentation and/or other materials provided with the distribution.
49578 + *     * Neither the name of Freescale Semiconductor nor the
49579 + *       names of its contributors may be used to endorse or promote products
49580 + *       derived from this software without specific prior written permission.
49581 + *
49582 + *
49583 + * ALTERNATIVELY, this software may be distributed under the terms of the
49584 + * GNU General Public License ("GPL") as published by the Free Software
49585 + * Foundation, either version 2 of that License or (at your option) any
49586 + * later version.
49587 + *
49588 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
49589 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
49590 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
49591 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
49592 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
49593 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
49594 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
49595 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49596 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
49597 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49598 + */
49599 +
49600 +#include "fsl_fman_rtc.h"
49601 +
49602 +void fman_rtc_defconfig(struct rtc_cfg *cfg)
49603 +{
49604 +       int i;
49605 +       cfg->src_clk = DEFAULT_SRC_CLOCK;
49606 +       cfg->invert_input_clk_phase = DEFAULT_INVERT_INPUT_CLK_PHASE;
49607 +       cfg->invert_output_clk_phase = DEFAULT_INVERT_OUTPUT_CLK_PHASE;
49608 +       cfg->pulse_realign = DEFAULT_PULSE_REALIGN;
49609 +       for (i = 0; i < FMAN_RTC_MAX_NUM_OF_ALARMS; i++)
49610 +               cfg->alarm_polarity[i] = DEFAULT_ALARM_POLARITY;
49611 +       for (i = 0; i < FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS; i++)
49612 +               cfg->trigger_polarity[i] = DEFAULT_TRIGGER_POLARITY;
49613 +}
49614 +
49615 +uint32_t fman_rtc_get_events(struct rtc_regs *regs)
49616 +{
49617 +       return ioread32be(&regs->tmr_tevent);
49618 +}
49619 +
49620 +uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask)
49621 +{
49622 +       return ioread32be(&regs->tmr_tevent) & ev_mask;
49623 +}
49624 +
49625 +uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs)
49626 +{
49627 +       return ioread32be(&regs->tmr_temask);
49628 +}
49629 +
49630 +void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask)
49631 +{
49632 +       iowrite32be(mask, &regs->tmr_temask);
49633 +}
49634 +
49635 +void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events)
49636 +{
49637 +       iowrite32be(events, &regs->tmr_tevent);
49638 +}
49639 +
49640 +uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs)
49641 +{
49642 +       uint32_t event;
49643 +
49644 +       event = ioread32be(&regs->tmr_tevent);
49645 +       event &= ioread32be(&regs->tmr_temask);
49646 +
49647 +       if (event)
49648 +               iowrite32be(event, &regs->tmr_tevent);
49649 +       return event;
49650 +}
49651 +
49652 +uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs)
49653 +{
49654 +       return ioread32be(&regs->tmr_add);
49655 +}
49656 +
49657 +void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val)
49658 +{
49659 +       iowrite32be(val, &regs->tmr_add);
49660 +}
49661 +
49662 +void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t events)
49663 +{
49664 +       fman_rtc_set_interrupt_mask(regs, fman_rtc_get_interrupt_mask(regs) | events);
49665 +}
49666 +
49667 +void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t events)
49668 +{
49669 +       fman_rtc_set_interrupt_mask(regs, fman_rtc_get_interrupt_mask(regs) & ~events);
49670 +}
49671 +
49672 +void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index, uint32_t val)
49673 +{
49674 +       iowrite32be(val, &regs->tmr_alarm[index].tmr_alarm_l);
49675 +}
49676 +
49677 +void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val)
49678 +{
49679 +       iowrite32be(val, &regs->tmr_fiper[index]);
49680 +}
49681 +
49682 +void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val)
49683 +{
49684 +       iowrite32be((uint32_t)val, &regs->tmr_alarm[index].tmr_alarm_l);
49685 +       iowrite32be((uint32_t)(val >> 32), &regs->tmr_alarm[index].tmr_alarm_h);
49686 +}
49687 +
49688 +void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val)
49689 +{
49690 +       iowrite32be((uint32_t)val, &regs->tmr_off_l);
49691 +       iowrite32be((uint32_t)(val >> 32), &regs->tmr_off_h);
49692 +}
49693 +
49694 +uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs, int id)
49695 +{
49696 +       uint64_t time;
49697 +       /* TMR_CNT_L must be read first to get an accurate value */
49698 +       time = (uint64_t)ioread32be(&regs->tmr_etts[id].tmr_etts_l);
49699 +       time |= ((uint64_t)ioread32be(&regs->tmr_etts[id].tmr_etts_h)
49700 +               << 32);
49701 +
49702 +       return time;
49703 +}
49704 +
49705 +uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs)
49706 +{
49707 +       return ioread32be(&regs->tmr_ctrl);
49708 +}
49709 +
49710 +void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val)
49711 +{
49712 +       iowrite32be(val, &regs->tmr_ctrl);
49713 +}
49714 +
49715 +void fman_rtc_timers_soft_reset(struct rtc_regs *regs)
49716 +{
49717 +       fman_rtc_set_timer_ctrl(regs, FMAN_RTC_TMR_CTRL_TMSR);
49718 +       udelay(10);
49719 +       fman_rtc_set_timer_ctrl(regs, 0);
49720 +}
49721 +
49722 +void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms,
49723 +               int num_fipers, int num_ext_triggers, bool init_freq_comp,
49724 +               uint32_t freq_compensation, uint32_t output_clock_divisor)
49725 +{
49726 +       uint32_t            tmr_ctrl;
49727 +       int                     i;
49728 +
49729 +       fman_rtc_timers_soft_reset(regs);
49730 +
49731 +       /* Set the source clock */
49732 +       switch (cfg->src_clk) {
49733 +       case E_FMAN_RTC_SOURCE_CLOCK_SYSTEM:
49734 +               tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK;
49735 +               break;
49736 +       case E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR:
49737 +               tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK;
49738 +               break;
49739 +       default:
49740 +               /* Use a clock from the External TMR reference clock.*/
49741 +               tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK;
49742 +               break;
49743 +       }
49744 +
49745 +       /* whatever period the user picked, the timestamp will advance in '1'
49746 +       * every time the period passed. */
49747 +       tmr_ctrl |= ((1 << FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT) &
49748 +                               FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK);
49749 +
49750 +       if (cfg->invert_input_clk_phase)
49751 +               tmr_ctrl |= FMAN_RTC_TMR_CTRL_CIPH;
49752 +       if (cfg->invert_output_clk_phase)
49753 +               tmr_ctrl |= FMAN_RTC_TMR_CTRL_COPH;
49754 +
49755 +       for (i = 0; i < num_alarms; i++) {
49756 +               if (cfg->alarm_polarity[i] ==
49757 +                       E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW)
49758 +                       tmr_ctrl |= (FMAN_RTC_TMR_CTRL_ALMP1 >> i);
49759 +       }
49760 +
49761 +       for (i = 0; i < num_ext_triggers; i++)
49762 +               if (cfg->trigger_polarity[i] ==
49763 +                       E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE)
49764 +                       tmr_ctrl |= (FMAN_RTC_TMR_CTRL_ETEP1 << i);
49765 +
49766 +       if (!cfg->timer_slave_mode && cfg->bypass)
49767 +               tmr_ctrl |= FMAN_RTC_TMR_CTRL_BYP;
49768 +
49769 +       fman_rtc_set_timer_ctrl(regs, tmr_ctrl);
49770 +       if (init_freq_comp)
49771 +               fman_rtc_set_frequency_compensation(regs, freq_compensation);
49772 +
49773 +       /* Clear TMR_ALARM registers */
49774 +       for (i = 0; i < num_alarms; i++)
49775 +               fman_rtc_set_timer_alarm(regs, i, 0xFFFFFFFFFFFFFFFFLL);
49776 +
49777 +       /* Clear TMR_TEVENT */
49778 +       fman_rtc_ack_event(regs, FMAN_RTC_TMR_TEVENT_ALL);
49779 +
49780 +       /* Initialize TMR_TEMASK */
49781 +       fman_rtc_set_interrupt_mask(regs, 0);
49782 +
49783 +       /* Clear TMR_FIPER registers */
49784 +       for (i = 0; i < num_fipers; i++)
49785 +               fman_rtc_set_timer_fiper(regs, i, 0xFFFFFFFF);
49786 +
49787 +       /* Initialize TMR_PRSC */
49788 +       iowrite32be(output_clock_divisor, &regs->tmr_prsc);
49789 +
49790 +       /* Clear TMR_OFF */
49791 +       fman_rtc_set_timer_offset(regs, 0);
49792 +}
49793 +
49794 +bool fman_rtc_is_enabled(struct rtc_regs *regs)
49795 +{
49796 +       return (bool)(fman_rtc_get_timer_ctrl(regs) & FMAN_RTC_TMR_CTRL_TE);
49797 +}
49798 +
49799 +void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock)
49800 +{
49801 +       uint32_t tmr_ctrl = fman_rtc_get_timer_ctrl(regs);
49802 +
49803 +       /* TODO check that no timestamping MACs are working in this stage. */
49804 +       if (reset_clock) {
49805 +               fman_rtc_set_timer_ctrl(regs, (tmr_ctrl | FMAN_RTC_TMR_CTRL_TMSR));
49806 +
49807 +               udelay(10);
49808 +               /* Clear TMR_OFF */
49809 +               fman_rtc_set_timer_offset(regs, 0);
49810 +       }
49811 +
49812 +       fman_rtc_set_timer_ctrl(regs, (tmr_ctrl | FMAN_RTC_TMR_CTRL_TE));
49813 +}
49814 +
49815 +void fman_rtc_disable(struct rtc_regs *regs)
49816 +{
49817 +       fman_rtc_set_timer_ctrl(regs, (fman_rtc_get_timer_ctrl(regs)
49818 +                                       & ~(FMAN_RTC_TMR_CTRL_TE)));
49819 +}
49820 +
49821 +void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id)
49822 +{
49823 +       uint32_t tmp_reg;
49824 +       if (id == 0)
49825 +               tmp_reg = FMAN_RTC_TMR_TEVENT_PP1;
49826 +       else
49827 +               tmp_reg = FMAN_RTC_TMR_TEVENT_PP2;
49828 +       fman_rtc_disable_interupt(regs, tmp_reg);
49829 +
49830 +       tmp_reg = fman_rtc_get_timer_ctrl(regs);
49831 +       if (tmp_reg & FMAN_RTC_TMR_CTRL_FS)
49832 +               fman_rtc_set_timer_ctrl(regs, tmp_reg & ~FMAN_RTC_TMR_CTRL_FS);
49833 +
49834 +       fman_rtc_set_timer_fiper(regs, id, 0xFFFFFFFF);
49835 +}
49836 +
49837 +void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id)
49838 +{
49839 +       uint32_t    tmpReg, tmp_ctrl;
49840 +
49841 +       if (id == 0)
49842 +               tmpReg = FMAN_RTC_TMR_TEVENT_ETS1;
49843 +       else
49844 +               tmpReg = FMAN_RTC_TMR_TEVENT_ETS2;
49845 +       fman_rtc_disable_interupt(regs, tmpReg);
49846 +
49847 +       if (id == 0)
49848 +               tmpReg = FMAN_RTC_TMR_CTRL_PP1L;
49849 +       else
49850 +               tmpReg = FMAN_RTC_TMR_CTRL_PP2L;
49851 +       tmp_ctrl = fman_rtc_get_timer_ctrl(regs);
49852 +       if (tmp_ctrl & tmpReg)
49853 +               fman_rtc_set_timer_ctrl(regs, tmp_ctrl & ~tmpReg);
49854 +}
49855 +
49856 +void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable)
49857 +{
49858 +       uint32_t    tmpReg;
49859 +       fman_rtc_set_timer_alarm(regs, id, val);
49860 +       if (enable) {
49861 +               if (id == 0)
49862 +                       tmpReg = FMAN_RTC_TMR_TEVENT_ALM1;
49863 +               else
49864 +                       tmpReg = FMAN_RTC_TMR_TEVENT_ALM2;
49865 +               fman_rtc_enable_interupt(regs, tmpReg);
49866 +       }
49867 +}
49868 +
49869 +void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val,
49870 +                                               bool enable)
49871 +{
49872 +       uint32_t    tmpReg;
49873 +       fman_rtc_set_timer_fiper(regs, id, val);
49874 +       if (enable) {
49875 +               if (id == 0)
49876 +                       tmpReg = FMAN_RTC_TMR_TEVENT_PP1;
49877 +               else
49878 +                       tmpReg = FMAN_RTC_TMR_TEVENT_PP2;
49879 +               fman_rtc_enable_interupt(regs, tmpReg);
49880 +       }
49881 +}
49882 +
49883 +void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable,
49884 +                                               bool use_pulse_as_input)
49885 +{
49886 +       uint32_t    tmpReg;
49887 +       if (enable) {
49888 +               if (id == 0)
49889 +                       tmpReg = FMAN_RTC_TMR_TEVENT_ETS1;
49890 +               else
49891 +                       tmpReg = FMAN_RTC_TMR_TEVENT_ETS2;
49892 +               fman_rtc_enable_interupt(regs, tmpReg);
49893 +       }
49894 +       if (use_pulse_as_input) {
49895 +               if (id == 0)
49896 +                       tmpReg = FMAN_RTC_TMR_CTRL_PP1L;
49897 +               else
49898 +                       tmpReg = FMAN_RTC_TMR_CTRL_PP2L;
49899 +               fman_rtc_set_timer_ctrl(regs, fman_rtc_get_timer_ctrl(regs) | tmpReg);
49900 +       }
49901 +}
49902 --- /dev/null
49903 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/Makefile
49904 @@ -0,0 +1,15 @@
49905 +#
49906 +# Makefile for the Freescale Ethernet controllers
49907 +#
49908 +ccflags-y           += -DVERSION=\"\"
49909 +#
49910 +#Include netcomm SW specific definitions
49911 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
49912 +
49913 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
49914 +
49915 +ccflags-y += -I$(NCSW_FM_INC)
49916 +
49917 +obj-y          += fsl-ncsw-sp.o
49918 +
49919 +fsl-ncsw-sp-objs       := fm_sp.o fman_sp.o
49920 --- /dev/null
49921 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.c
49922 @@ -0,0 +1,757 @@
49923 +/*
49924 + * Copyright 2008-2012 Freescale Semiconductor Inc.
49925 + *
49926 + * Redistribution and use in source and binary forms, with or without
49927 + * modification, are permitted provided that the following conditions are met:
49928 + *     * Redistributions of source code must retain the above copyright
49929 + *       notice, this list of conditions and the following disclaimer.
49930 + *     * Redistributions in binary form must reproduce the above copyright
49931 + *       notice, this list of conditions and the following disclaimer in the
49932 + *       documentation and/or other materials provided with the distribution.
49933 + *     * Neither the name of Freescale Semiconductor nor the
49934 + *       names of its contributors may be used to endorse or promote products
49935 + *       derived from this software without specific prior written permission.
49936 + *
49937 + *
49938 + * ALTERNATIVELY, this software may be distributed under the terms of the
49939 + * GNU General Public License ("GPL") as published by the Free Software
49940 + * Foundation, either version 2 of that License or (at your option) any
49941 + * later version.
49942 + *
49943 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
49944 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
49945 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
49946 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
49947 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
49948 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
49949 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
49950 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49951 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
49952 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49953 + */
49954 +
49955 +
49956 +/******************************************************************************
49957 + @File          fm_sp.c
49958 +
49959 + @Description   FM PCD Storage profile  ...
49960 +*//***************************************************************************/
49961 +
49962 +#include "std_ext.h"
49963 +#include "error_ext.h"
49964 +#include "string_ext.h"
49965 +#include "debug_ext.h"
49966 +#include "net_ext.h"
49967 +
49968 +#include "fm_vsp_ext.h"
49969 +#include "fm_sp.h"
49970 +#include "fm_common.h"
49971 +#include "fsl_fman_sp.h"
49972 +
49973 +
49974 +#if (DPAA_VERSION >= 11)
49975 +static t_Error CheckParamsGeneratedInternally(t_FmVspEntry *p_FmVspEntry)
49976 +{
49977 +    t_Error err = E_OK;
49978 +
49979 +    if ((err = FmSpCheckIntContextParams(&p_FmVspEntry->intContext))!= E_OK)
49980 +        RETURN_ERROR(MAJOR, err, NO_MSG);
49981 +    if ((err =  FmSpCheckBufMargins(&p_FmVspEntry->bufMargins)) != E_OK)
49982 +        RETURN_ERROR(MAJOR, err, NO_MSG);
49983 +    return err;
49984 +
49985 +}
49986 +
49987 +static t_Error CheckParams(t_FmVspEntry *p_FmVspEntry)
49988 +{
49989 +    t_Error err = E_OK;
49990 +
49991 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
49992 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
49993 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->h_Fm, E_INVALID_HANDLE);
49994 +
49995 +    if ((err = FmSpCheckBufPoolsParams(&p_FmVspEntry->p_FmVspEntryDriverParams->extBufPools,
49996 +                                        p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools,
49997 +                                        p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion)) != E_OK)
49998 +
49999 +        RETURN_ERROR(MAJOR, err, NO_MSG);
50000 +
50001 +    if (p_FmVspEntry->p_FmVspEntryDriverParams->liodnOffset & ~FM_LIODN_OFFSET_MASK)
50002 +         RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("liodnOffset is larger than %d", FM_LIODN_OFFSET_MASK+1));
50003 +
50004 +    err = FmVSPCheckRelativeProfile(p_FmVspEntry->h_Fm,
50005 +                                    p_FmVspEntry->portType,
50006 +                                    p_FmVspEntry->portId,
50007 +                                    p_FmVspEntry->relativeProfileId);
50008 +
50009 +    return err;
50010 +}
50011 +#endif /* (DPAA_VERSION >= 11) */
50012 +
50013 +
50014 +/*****************************************************************************/
50015 +/*              Inter-module API routines                                    */
50016 +/*****************************************************************************/
50017 +void FmSpSetBufPoolsInAscOrderOfBufSizes(t_FmExtPools   *p_FmExtPools,
50018 +                                         uint8_t        *orderedArray,
50019 +                                         uint16_t       *sizesArray)
50020 +{
50021 +    uint16_t                    bufSize = 0;
50022 +    int                         i=0, j=0, k=0;
50023 +
50024 +    /* First we copy the external buffers pools information to an ordered local array */
50025 +    for (i=0;i<p_FmExtPools->numOfPoolsUsed;i++)
50026 +    {
50027 +        /* get pool size */
50028 +        bufSize = p_FmExtPools->extBufPool[i].size;
50029 +
50030 +        /* keep sizes in an array according to poolId for direct access */
50031 +        sizesArray[p_FmExtPools->extBufPool[i].id] =  bufSize;
50032 +
50033 +        /* save poolId in an ordered array according to size */
50034 +        for (j=0;j<=i;j++)
50035 +        {
50036 +            /* this is the next free place in the array */
50037 +            if (j==i)
50038 +                orderedArray[i] = p_FmExtPools->extBufPool[i].id;
50039 +            else
50040 +            {
50041 +                /* find the right place for this poolId */
50042 +                if (bufSize < sizesArray[orderedArray[j]])
50043 +                {
50044 +                    /* move the poolIds one place ahead to make room for this poolId */
50045 +                    for (k=i;k>j;k--)
50046 +                       orderedArray[k] = orderedArray[k-1];
50047 +
50048 +                    /* now k==j, this is the place for the new size */
50049 +                    orderedArray[k] = p_FmExtPools->extBufPool[i].id;
50050 +                    break;
50051 +                }
50052 +            }
50053 +        }
50054 +    }
50055 +}
50056 +
50057 +t_Error FmSpCheckBufPoolsParams(t_FmExtPools            *p_FmExtPools,
50058 +                                t_FmBackupBmPools       *p_FmBackupBmPools,
50059 +                                t_FmBufPoolDepletion    *p_FmBufPoolDepletion)
50060 +{
50061 +
50062 +    int         i = 0, j = 0;
50063 +    bool        found;
50064 +    uint8_t     count = 0;
50065 +
50066 +    if (p_FmExtPools)
50067 +    {
50068 +        if (p_FmExtPools->numOfPoolsUsed > FM_PORT_MAX_NUM_OF_EXT_POOLS)
50069 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfPoolsUsed can't be larger than %d", FM_PORT_MAX_NUM_OF_EXT_POOLS));
50070 +
50071 +        for (i=0;i<p_FmExtPools->numOfPoolsUsed;i++)
50072 +        {
50073 +            if (p_FmExtPools->extBufPool[i].id >= BM_MAX_NUM_OF_POOLS)
50074 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("extBufPools.extBufPool[%d].id can't be larger than %d", i, BM_MAX_NUM_OF_POOLS));
50075 +            if (!p_FmExtPools->extBufPool[i].size)
50076 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("extBufPools.extBufPool[%d].size is 0", i));
50077 +        }
50078 +    }
50079 +    if (!p_FmExtPools && (p_FmBackupBmPools || p_FmBufPoolDepletion))
50080 +          RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("backupBmPools ot bufPoolDepletion can not be defined without external pools"));
50081 +
50082 +    /* backup BM pools indication is valid only for some chip derivatives
50083 +       (limited by the config routine) */
50084 +    if (p_FmBackupBmPools)
50085 +    {
50086 +        if (p_FmBackupBmPools->numOfBackupPools >= p_FmExtPools->numOfPoolsUsed)
50087 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_BackupBmPools must be smaller than extBufPools.numOfPoolsUsed"));
50088 +        found = FALSE;
50089 +        for (i = 0;i<p_FmBackupBmPools->numOfBackupPools;i++)
50090 +        {
50091 +
50092 +            for (j=0;j<p_FmExtPools->numOfPoolsUsed;j++)
50093 +            {
50094 +                if (p_FmBackupBmPools->poolIds[i] == p_FmExtPools->extBufPool[j].id)
50095 +                {
50096 +                    found = TRUE;
50097 +                    break;
50098 +                }
50099 +            }
50100 +            if (!found)
50101 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("All p_BackupBmPools.poolIds must be included in extBufPools.extBufPool[n].id"));
50102 +            else
50103 +                found = FALSE;
50104 +        }
50105 +    }
50106 +
50107 +    /* up to extBufPools.numOfPoolsUsed pools may be defined */
50108 +    if (p_FmBufPoolDepletion && p_FmBufPoolDepletion->poolsGrpModeEnable)
50109 +    {
50110 +        if ((p_FmBufPoolDepletion->numOfPools > p_FmExtPools->numOfPoolsUsed))
50111 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufPoolDepletion.numOfPools can't be larger than %d and can't be larger than numOfPoolsUsed", FM_PORT_MAX_NUM_OF_EXT_POOLS));
50112 +
50113 +        if (!p_FmBufPoolDepletion->numOfPools)
50114 +          RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufPoolDepletion.numOfPoolsToConsider can not be 0 when poolsGrpModeEnable=TRUE"));
50115 +
50116 +        found = FALSE;
50117 +        count = 0;
50118 +        /* for each pool that is in poolsToConsider, check if it is defined
50119 +           in extBufPool */
50120 +        for (i=0;i<BM_MAX_NUM_OF_POOLS;i++)
50121 +        {
50122 +            if (p_FmBufPoolDepletion->poolsToConsider[i])
50123 +            {
50124 +                for (j=0;j<p_FmExtPools->numOfPoolsUsed;j++)
50125 +                 {
50126 +                    if (i == p_FmExtPools->extBufPool[j].id)
50127 +                    {
50128 +                        found = TRUE;
50129 +                        count++;
50130 +                        break;
50131 +                    }
50132 +                 }
50133 +                if (!found)
50134 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Pools selected for depletion are not used."));
50135 +                else
50136 +                    found = FALSE;
50137 +            }
50138 +        }
50139 +        /* check that the number of pools that we have checked is equal to the number announced by the user */
50140 +        if (count != p_FmBufPoolDepletion->numOfPools)
50141 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufPoolDepletion.numOfPools is larger than the number of pools defined."));
50142 +    }
50143 +
50144 +    if (p_FmBufPoolDepletion && p_FmBufPoolDepletion->singlePoolModeEnable)
50145 +    {
50146 +        /* calculate vector for number of pools depletion */
50147 +        found = FALSE;
50148 +        count = 0;
50149 +        for (i=0;i<BM_MAX_NUM_OF_POOLS;i++)
50150 +        {
50151 +            if (p_FmBufPoolDepletion->poolsToConsiderForSingleMode[i])
50152 +            {
50153 +                for (j=0;j<p_FmExtPools->numOfPoolsUsed;j++)
50154 +                {
50155 +                    if (i == p_FmExtPools->extBufPool[j].id)
50156 +                    {
50157 +                        found = TRUE;
50158 +                        count++;
50159 +                        break;
50160 +                    }
50161 +                }
50162 +                if (!found)
50163 +                    RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Pools selected for depletion are not used."));
50164 +                else
50165 +                    found = FALSE;
50166 +            }
50167 +        }
50168 +        if (!count)
50169 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("No pools defined for single buffer mode pool depletion."));
50170 +    }
50171 +
50172 +    return E_OK;
50173 +}
50174 +
50175 +t_Error FmSpCheckIntContextParams(t_FmSpIntContextDataCopy *p_FmSpIntContextDataCopy)
50176 +{
50177 +    /* Check that divisible by 16 and not larger than 240 */
50178 +    if (p_FmSpIntContextDataCopy->intContextOffset >MAX_INT_OFFSET)
50179 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.intContextOffset can't be larger than %d", MAX_INT_OFFSET));
50180 +    if (p_FmSpIntContextDataCopy->intContextOffset % OFFSET_UNITS)
50181 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.intContextOffset has to be divisible by %d", OFFSET_UNITS));
50182 +
50183 +    /* check that ic size+ic internal offset, does not exceed ic block size */
50184 +    if (p_FmSpIntContextDataCopy->size + p_FmSpIntContextDataCopy->intContextOffset > MAX_IC_SIZE)
50185 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.size + intContext.intContextOffset has to be smaller than %d", MAX_IC_SIZE));
50186 +    /* Check that divisible by 16 and not larger than 256 */
50187 +    if (p_FmSpIntContextDataCopy->size % OFFSET_UNITS)
50188 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.size  has to be divisible by %d", OFFSET_UNITS));
50189 +
50190 +    /* Check that divisible by 16 and not larger than 4K */
50191 +    if (p_FmSpIntContextDataCopy->extBufOffset > MAX_EXT_OFFSET)
50192 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.extBufOffset can't be larger than %d", MAX_EXT_OFFSET));
50193 +    if (p_FmSpIntContextDataCopy->extBufOffset % OFFSET_UNITS)
50194 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.extBufOffset  has to be divisible by %d", OFFSET_UNITS));
50195 +
50196 +    return E_OK;
50197 +}
50198 +
50199 +t_Error FmSpCheckBufMargins(t_FmSpBufMargins *p_FmSpBufMargins)
50200 +{
50201 +    /* Check the margin definition */
50202 +    if (p_FmSpBufMargins->startMargins > MAX_EXT_BUFFER_OFFSET)
50203 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufMargins.startMargins can't be larger than %d", MAX_EXT_BUFFER_OFFSET));
50204 +    if (p_FmSpBufMargins->endMargins > MAX_EXT_BUFFER_OFFSET)
50205 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufMargins.endMargins can't be larger than %d", MAX_EXT_BUFFER_OFFSET));
50206 +
50207 +    return E_OK;
50208 +}
50209 +
50210 +t_Error FmSpBuildBufferStructure(t_FmSpIntContextDataCopy   *p_FmSpIntContextDataCopy,
50211 +                                 t_FmBufferPrefixContent     *p_BufferPrefixContent,
50212 +                                 t_FmSpBufMargins            *p_FmSpBufMargins,
50213 +                                 t_FmSpBufferOffsets         *p_FmSpBufferOffsets,
50214 +                                 uint8_t                     *internalBufferOffset)
50215 +{
50216 +    uint32_t                        tmp;
50217 +
50218 +    SANITY_CHECK_RETURN_ERROR(p_FmSpIntContextDataCopy,  E_INVALID_VALUE);
50219 +    ASSERT_COND(p_FmSpIntContextDataCopy);
50220 +    ASSERT_COND(p_BufferPrefixContent);
50221 +    ASSERT_COND(p_FmSpBufMargins);
50222 +    ASSERT_COND(p_FmSpBufferOffsets);
50223 +
50224 +    /* Align start of internal context data to 16 byte */
50225 +    p_FmSpIntContextDataCopy->extBufOffset =
50226 +        (uint16_t)((p_BufferPrefixContent->privDataSize & (OFFSET_UNITS-1)) ?
50227 +            ((p_BufferPrefixContent->privDataSize + OFFSET_UNITS) & ~(uint16_t)(OFFSET_UNITS-1)) :
50228 +             p_BufferPrefixContent->privDataSize);
50229 +
50230 +    /* Translate margin and intContext params to FM parameters */
50231 +    /* Initialize with illegal value. Later we'll set legal values. */
50232 +    p_FmSpBufferOffsets->prsResultOffset = (uint32_t)ILLEGAL_BASE;
50233 +    p_FmSpBufferOffsets->timeStampOffset = (uint32_t)ILLEGAL_BASE;
50234 +    p_FmSpBufferOffsets->hashResultOffset= (uint32_t)ILLEGAL_BASE;
50235 +    p_FmSpBufferOffsets->pcdInfoOffset   = (uint32_t)ILLEGAL_BASE;
50236 +
50237 +    /* Internally the driver supports 4 options
50238 +       1. prsResult/timestamp/hashResult selection (in fact 8 options, but for simplicity we'll
50239 +          relate to it as 1).
50240 +       2. All IC context (from AD) not including debug.*/
50241 +
50242 +    /* This 'if' covers option 2. We copy from beginning of context. */
50243 +    if (p_BufferPrefixContent->passAllOtherPCDInfo)
50244 +    {
50245 +        p_FmSpIntContextDataCopy->size = 128; /* must be aligned to 16 */
50246 +        /* Start copying data after 16 bytes (FD) from the beginning of the internal context */
50247 +        p_FmSpIntContextDataCopy->intContextOffset = 16;
50248 +
50249 +        if (p_BufferPrefixContent->passAllOtherPCDInfo)
50250 +            p_FmSpBufferOffsets->pcdInfoOffset = p_FmSpIntContextDataCopy->extBufOffset;
50251 +        if (p_BufferPrefixContent->passPrsResult)
50252 +            p_FmSpBufferOffsets->prsResultOffset =
50253 +                (uint32_t)(p_FmSpIntContextDataCopy->extBufOffset + 16);
50254 +        if (p_BufferPrefixContent->passTimeStamp)
50255 +            p_FmSpBufferOffsets->timeStampOffset =
50256 +                (uint32_t)(p_FmSpIntContextDataCopy->extBufOffset + 48);
50257 +        if (p_BufferPrefixContent->passHashResult)
50258 +            p_FmSpBufferOffsets->hashResultOffset =
50259 +                (uint32_t)(p_FmSpIntContextDataCopy->extBufOffset + 56);
50260 +    }
50261 +    else
50262 +    {
50263 +        /* This case covers the options under 1 */
50264 +        /* Copy size must be in 16-byte granularity. */
50265 +        p_FmSpIntContextDataCopy->size =
50266 +            (uint16_t)((p_BufferPrefixContent->passPrsResult ? 32 : 0) +
50267 +                      ((p_BufferPrefixContent->passTimeStamp ||
50268 +                      p_BufferPrefixContent->passHashResult) ? 16 : 0));
50269 +
50270 +        /* Align start of internal context data to 16 byte */
50271 +        p_FmSpIntContextDataCopy->intContextOffset =
50272 +            (uint8_t)(p_BufferPrefixContent->passPrsResult ? 32 :
50273 +                      ((p_BufferPrefixContent->passTimeStamp  ||
50274 +                       p_BufferPrefixContent->passHashResult) ? 64 : 0));
50275 +
50276 +        if (p_BufferPrefixContent->passPrsResult)
50277 +            p_FmSpBufferOffsets->prsResultOffset = p_FmSpIntContextDataCopy->extBufOffset;
50278 +        if (p_BufferPrefixContent->passTimeStamp)
50279 +            p_FmSpBufferOffsets->timeStampOffset =  p_BufferPrefixContent->passPrsResult ?
50280 +                                        (p_FmSpIntContextDataCopy->extBufOffset + sizeof(t_FmPrsResult)) :
50281 +                                        p_FmSpIntContextDataCopy->extBufOffset;
50282 +        if (p_BufferPrefixContent->passHashResult)
50283 +            /* If PR is not requested, whether TS is requested or not, IC will be copied from TS */
50284 +            p_FmSpBufferOffsets->hashResultOffset = p_BufferPrefixContent->passPrsResult ?
50285 +                                          (p_FmSpIntContextDataCopy->extBufOffset + sizeof(t_FmPrsResult) + 8) :
50286 +                                          p_FmSpIntContextDataCopy->extBufOffset + 8;
50287 +    }
50288 +
50289 +    if (p_FmSpIntContextDataCopy->size)
50290 +        p_FmSpBufMargins->startMargins =
50291 +            (uint16_t)(p_FmSpIntContextDataCopy->extBufOffset +
50292 +                       p_FmSpIntContextDataCopy->size);
50293 +    else
50294 +        /* No Internal Context passing, STartMargin is immediately after privateInfo */
50295 +        p_FmSpBufMargins->startMargins = p_BufferPrefixContent->privDataSize;
50296 +
50297 +    /* save extra space for manip in both external and internal buffers */
50298 +    if (p_BufferPrefixContent->manipExtraSpace)
50299 +    {
50300 +        uint8_t extraSpace;
50301 +#ifdef FM_CAPWAP_SUPPORT
50302 +        if ((p_BufferPrefixContent->manipExtraSpace + CAPWAP_FRAG_EXTRA_SPACE) >= 256)
50303 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE,
50304 +                         ("p_BufferPrefixContent->manipExtraSpace should be less than %d",
50305 +                          256-CAPWAP_FRAG_EXTRA_SPACE));
50306 +        extraSpace = (uint8_t)(p_BufferPrefixContent->manipExtraSpace + CAPWAP_FRAG_EXTRA_SPACE);
50307 +#else
50308 +        extraSpace = p_BufferPrefixContent->manipExtraSpace;
50309 +#endif /* FM_CAPWAP_SUPPORT */
50310 +        p_FmSpBufferOffsets->manipOffset = p_FmSpBufMargins->startMargins;
50311 +        p_FmSpBufMargins->startMargins += extraSpace;
50312 +        *internalBufferOffset = extraSpace;
50313 +    }
50314 +
50315 +    /* align data start */
50316 +    tmp = (uint32_t)(p_FmSpBufMargins->startMargins % p_BufferPrefixContent->dataAlign);
50317 +    if (tmp)
50318 +        p_FmSpBufMargins->startMargins += (p_BufferPrefixContent->dataAlign-tmp);
50319 +    p_FmSpBufferOffsets->dataOffset = p_FmSpBufMargins->startMargins;
50320 +
50321 +    return E_OK;
50322 +}
50323 +/*********************** End of inter-module routines ************************/
50324 +
50325 +
50326 +#if (DPAA_VERSION >= 11)
50327 +/*****************************************************************************/
50328 +/*              API routines                                                 */
50329 +/*****************************************************************************/
50330 +t_Handle FM_VSP_Config(t_FmVspParams *p_FmVspParams)
50331 +{
50332 +    t_FmVspEntry          *p_FmVspEntry = NULL;
50333 +    struct fm_storage_profile_params   fm_vsp_params;
50334 +
50335 +    p_FmVspEntry = (t_FmVspEntry *)XX_Malloc(sizeof(t_FmVspEntry));
50336 +    if (!p_FmVspEntry)
50337 +    {
50338 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_StorageProfile allocation failed"));
50339 +        return NULL;
50340 +    }
50341 +    memset(p_FmVspEntry, 0, sizeof(t_FmVspEntry));
50342 +
50343 +    p_FmVspEntry->p_FmVspEntryDriverParams = (t_FmVspEntryDriverParams *)XX_Malloc(sizeof(t_FmVspEntryDriverParams));
50344 +    if (!p_FmVspEntry->p_FmVspEntryDriverParams)
50345 +    {
50346 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_StorageProfile allocation failed"));
50347 +        XX_Free(p_FmVspEntry);
50348 +        return NULL;
50349 +    }
50350 +    memset(p_FmVspEntry->p_FmVspEntryDriverParams, 0, sizeof(t_FmVspEntryDriverParams));
50351 +    fman_vsp_defconfig(&fm_vsp_params);
50352 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaHeaderCacheAttr = fm_vsp_params.header_cache_attr;
50353 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaIntContextCacheAttr = fm_vsp_params.int_context_cache_attr;
50354 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaScatterGatherCacheAttr = fm_vsp_params.scatter_gather_cache_attr;
50355 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaSwapData = fm_vsp_params.dma_swap_data;
50356 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaWriteOptimize = fm_vsp_params.dma_write_optimize;
50357 +    p_FmVspEntry->p_FmVspEntryDriverParams->noScatherGather = fm_vsp_params.no_scather_gather;
50358 +    p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.privDataSize = DEFAULT_FM_SP_bufferPrefixContent_privDataSize;
50359 +    p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.passPrsResult= DEFAULT_FM_SP_bufferPrefixContent_passPrsResult;
50360 +    p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.passTimeStamp= DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp;
50361 +    p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.passAllOtherPCDInfo
50362 +                                                                    = DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp;
50363 +    p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.dataAlign    = DEFAULT_FM_SP_bufferPrefixContent_dataAlign;
50364 +    p_FmVspEntry->p_FmVspEntryDriverParams->liodnOffset                      = p_FmVspParams->liodnOffset;
50365 +
50366 +    memcpy(&p_FmVspEntry->p_FmVspEntryDriverParams->extBufPools, &p_FmVspParams->extBufPools, sizeof(t_FmExtPools));
50367 +    p_FmVspEntry->h_Fm                                                       = p_FmVspParams->h_Fm;
50368 +    p_FmVspEntry->portType                                                   = p_FmVspParams->portParams.portType;
50369 +    p_FmVspEntry->portId                                                     = p_FmVspParams->portParams.portId;
50370 +
50371 +    p_FmVspEntry->relativeProfileId                                          = p_FmVspParams->relativeProfileId;
50372 +
50373 +   return p_FmVspEntry;
50374 +}
50375 +
50376 +t_Error FM_VSP_Init(t_Handle h_FmVsp)
50377 +{
50378 +
50379 +    t_FmVspEntry                *p_FmVspEntry = (t_FmVspEntry *)h_FmVsp;
50380 +    struct fm_storage_profile_params   fm_vsp_params;
50381 +    uint8_t                     orderedArray[FM_PORT_MAX_NUM_OF_EXT_POOLS];
50382 +    uint16_t                    sizesArray[BM_MAX_NUM_OF_POOLS];
50383 +    t_Error                     err;
50384 +    uint16_t                    absoluteProfileId = 0;
50385 +    int                         i = 0;
50386 +
50387 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50388 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams,E_INVALID_HANDLE);
50389 +
50390 +    CHECK_INIT_PARAMETERS(p_FmVspEntry, CheckParams);
50391 +
50392 +    memset(&orderedArray, 0, sizeof(uint8_t) * FM_PORT_MAX_NUM_OF_EXT_POOLS);
50393 +    memset(&sizesArray, 0, sizeof(uint16_t) * BM_MAX_NUM_OF_POOLS);
50394 +
50395 +    err = FmSpBuildBufferStructure(&p_FmVspEntry->intContext,
50396 +                                   &p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent,
50397 +                                   &p_FmVspEntry->bufMargins,
50398 +                                   &p_FmVspEntry->bufferOffsets,
50399 +                                   &p_FmVspEntry->internalBufferOffset);
50400 +    if (err != E_OK)
50401 +        RETURN_ERROR(MAJOR, err, NO_MSG);
50402 +
50403 +
50404 +    err = CheckParamsGeneratedInternally(p_FmVspEntry);
50405 +    if (err != E_OK)
50406 +        RETURN_ERROR(MAJOR, err, NO_MSG);
50407 +
50408 +
50409 +     p_FmVspEntry->p_FmSpRegsBase =
50410 +        (struct fm_pcd_storage_profile_regs *)FmGetVSPBaseAddr(p_FmVspEntry->h_Fm);
50411 +    if (!p_FmVspEntry->p_FmSpRegsBase)
50412 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("impossible to initialize SpRegsBase"));
50413 +
50414 +    /* order external buffer pools in ascending order of buffer pools sizes */
50415 +    FmSpSetBufPoolsInAscOrderOfBufSizes(&(p_FmVspEntry->p_FmVspEntryDriverParams)->extBufPools,
50416 +                                        orderedArray,
50417 +                                        sizesArray);
50418 +
50419 +    p_FmVspEntry->extBufPools.numOfPoolsUsed =
50420 +        p_FmVspEntry->p_FmVspEntryDriverParams->extBufPools.numOfPoolsUsed;
50421 +    for (i = 0; i < p_FmVspEntry->extBufPools.numOfPoolsUsed; i++)
50422 +    {
50423 +       p_FmVspEntry->extBufPools.extBufPool[i].id = orderedArray[i];
50424 +       p_FmVspEntry->extBufPools.extBufPool[i].size = sizesArray[orderedArray[i]];
50425 +    }
50426 +
50427 +    /* on user responsibility to fill it according requirement */
50428 +    memset(&fm_vsp_params, 0, sizeof(struct fm_storage_profile_params));
50429 +    fm_vsp_params.dma_swap_data              = p_FmVspEntry->p_FmVspEntryDriverParams->dmaSwapData;
50430 +    fm_vsp_params.int_context_cache_attr     = p_FmVspEntry->p_FmVspEntryDriverParams->dmaIntContextCacheAttr;
50431 +    fm_vsp_params.header_cache_attr          = p_FmVspEntry->p_FmVspEntryDriverParams->dmaHeaderCacheAttr;
50432 +    fm_vsp_params.scatter_gather_cache_attr  = p_FmVspEntry->p_FmVspEntryDriverParams->dmaScatterGatherCacheAttr;
50433 +    fm_vsp_params.dma_write_optimize         = p_FmVspEntry->p_FmVspEntryDriverParams->dmaWriteOptimize;
50434 +    fm_vsp_params.liodn_offset               = p_FmVspEntry->p_FmVspEntryDriverParams->liodnOffset;
50435 +    fm_vsp_params.no_scather_gather          = p_FmVspEntry->p_FmVspEntryDriverParams->noScatherGather;
50436 +
50437 +    if (p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion)
50438 +    {
50439 +        fm_vsp_params.buf_pool_depletion.buf_pool_depletion_enabled = TRUE;
50440 +        fm_vsp_params.buf_pool_depletion.pools_grp_mode_enable = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->poolsGrpModeEnable;
50441 +        fm_vsp_params.buf_pool_depletion.num_pools = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->numOfPools;
50442 +        fm_vsp_params.buf_pool_depletion.pools_to_consider = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->poolsToConsider;
50443 +        fm_vsp_params.buf_pool_depletion.single_pool_mode_enable = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->singlePoolModeEnable;
50444 +        fm_vsp_params.buf_pool_depletion.pools_to_consider_for_single_mode = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->poolsToConsiderForSingleMode;
50445 +        fm_vsp_params.buf_pool_depletion.has_pfc_priorities = TRUE;
50446 +        fm_vsp_params.buf_pool_depletion.pfc_priorities_en = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->pfcPrioritiesEn;
50447 +    }
50448 +    else
50449 +        fm_vsp_params.buf_pool_depletion.buf_pool_depletion_enabled = FALSE;
50450 +
50451 +    if (p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools)
50452 +    {
50453 +        fm_vsp_params.backup_pools.num_backup_pools = p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools->numOfBackupPools;
50454 +        fm_vsp_params.backup_pools.pool_ids = p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools->poolIds;
50455 +    }
50456 +    else
50457 +        fm_vsp_params.backup_pools.num_backup_pools = 0;
50458 +
50459 +    fm_vsp_params.fm_ext_pools.num_pools_used = p_FmVspEntry->extBufPools.numOfPoolsUsed;
50460 +    fm_vsp_params.fm_ext_pools.ext_buf_pool = (struct fman_ext_pool_params*)&p_FmVspEntry->extBufPools.extBufPool;
50461 +    fm_vsp_params.buf_margins = (struct fman_sp_buf_margins*)&p_FmVspEntry->bufMargins;
50462 +    fm_vsp_params.int_context = (struct fman_sp_int_context_data_copy*)&p_FmVspEntry->intContext;
50463 +
50464 +    /* no check on err - it was checked earlier */
50465 +    FmVSPGetAbsoluteProfileId(p_FmVspEntry->h_Fm,
50466 +                              p_FmVspEntry->portType,
50467 +                              p_FmVspEntry->portId,
50468 +                              p_FmVspEntry->relativeProfileId,
50469 +                              &absoluteProfileId);
50470 +
50471 +    ASSERT_COND(p_FmVspEntry->p_FmSpRegsBase);
50472 +    ASSERT_COND(fm_vsp_params.int_context);
50473 +    ASSERT_COND(fm_vsp_params.buf_margins);
50474 +    ASSERT_COND((absoluteProfileId <= FM_VSP_MAX_NUM_OF_ENTRIES));
50475 +
50476 +    /* Set all registers related to VSP */
50477 +    fman_vsp_init(p_FmVspEntry->p_FmSpRegsBase, absoluteProfileId, &fm_vsp_params,FM_PORT_MAX_NUM_OF_EXT_POOLS, BM_MAX_NUM_OF_POOLS, FM_MAX_NUM_OF_PFC_PRIORITIES);
50478 +
50479 +    p_FmVspEntry->absoluteSpId = absoluteProfileId;
50480 +
50481 +    if (p_FmVspEntry->p_FmVspEntryDriverParams)
50482 +        XX_Free(p_FmVspEntry->p_FmVspEntryDriverParams);
50483 +    p_FmVspEntry->p_FmVspEntryDriverParams = NULL;
50484 +
50485 +    return E_OK;
50486 +}
50487 +
50488 +t_Error FM_VSP_Free(t_Handle h_FmVsp)
50489 +{
50490 +    t_FmVspEntry   *p_FmVspEntry = (t_FmVspEntry *)h_FmVsp;
50491 +    SANITY_CHECK_RETURN_ERROR(h_FmVsp, E_INVALID_HANDLE);
50492 +    XX_Free(p_FmVspEntry);
50493 +    return E_OK;
50494 +}
50495 +
50496 +t_Error FM_VSP_ConfigBufferPrefixContent(t_Handle h_FmVsp, t_FmBufferPrefixContent *p_FmBufferPrefixContent)
50497 +{
50498 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50499 +
50500 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50501 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50502 +
50503 +    memcpy(&p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent, p_FmBufferPrefixContent, sizeof(t_FmBufferPrefixContent));
50504 +    /* if dataAlign was not initialized by user, we return to driver's default */
50505 +    if (!p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.dataAlign)
50506 +        p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.dataAlign = DEFAULT_FM_SP_bufferPrefixContent_dataAlign;
50507 +
50508 +    return E_OK;
50509 +}
50510 +
50511 +t_Error FM_VSP_ConfigDmaSwapData(t_Handle h_FmVsp, e_FmDmaSwapOption swapData)
50512 +{
50513 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50514 +
50515 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50516 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50517 +
50518 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaSwapData = swapData;
50519 +
50520 +    return E_OK;
50521 +}
50522 +
50523 +t_Error FM_VSP_ConfigDmaIcCacheAttr(t_Handle h_FmVsp, e_FmDmaCacheOption intContextCacheAttr)
50524 +{
50525 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50526 +
50527 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50528 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50529 +
50530 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaIntContextCacheAttr = intContextCacheAttr;
50531 +
50532 +    return E_OK;
50533 +}
50534 +
50535 +t_Error FM_VSP_ConfigDmaHdrAttr(t_Handle h_FmVsp, e_FmDmaCacheOption headerCacheAttr)
50536 +{
50537 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50538 +
50539 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50540 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50541 +
50542 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaHeaderCacheAttr = headerCacheAttr;
50543 +
50544 +    return E_OK;
50545 +}
50546 +
50547 +t_Error FM_VSP_ConfigDmaScatterGatherAttr(t_Handle h_FmVsp, e_FmDmaCacheOption scatterGatherCacheAttr)
50548 +{
50549 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50550 +
50551 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50552 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50553 +
50554 +     p_FmVspEntry->p_FmVspEntryDriverParams->dmaScatterGatherCacheAttr = scatterGatherCacheAttr;
50555 +
50556 +    return E_OK;
50557 +}
50558 +
50559 +t_Error FM_VSP_ConfigDmaWriteOptimize(t_Handle h_FmVsp, bool optimize)
50560 +{
50561 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50562 +
50563 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50564 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50565 +
50566 +
50567 +    p_FmVspEntry->p_FmVspEntryDriverParams->dmaWriteOptimize = optimize;
50568 +
50569 +    return E_OK;
50570 +}
50571 +
50572 +t_Error FM_VSP_ConfigNoScatherGather(t_Handle h_FmVsp, bool noScatherGather)
50573 +{
50574 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50575 +
50576 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
50577 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50578 +
50579 +
50580 +    p_FmVspEntry->p_FmVspEntryDriverParams->noScatherGather = noScatherGather;
50581 +
50582 +    return E_OK;
50583 +}
50584 +
50585 +t_Error FM_VSP_ConfigPoolDepletion(t_Handle h_FmVsp, t_FmBufPoolDepletion *p_BufPoolDepletion)
50586 +{
50587 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50588 +
50589 +    SANITY_CHECK_RETURN_ERROR(h_FmVsp, E_INVALID_HANDLE);
50590 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50591 +    SANITY_CHECK_RETURN_ERROR(p_BufPoolDepletion, E_INVALID_HANDLE);
50592 +
50593 +    p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion = (t_FmBufPoolDepletion *)XX_Malloc(sizeof(t_FmBufPoolDepletion));
50594 +    if (!p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion)
50595 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_BufPoolDepletion allocation failed"));
50596 +    memcpy(p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion, p_BufPoolDepletion, sizeof(t_FmBufPoolDepletion));
50597 +
50598 +    return E_OK;
50599 +}
50600 +
50601 +t_Error FM_VSP_ConfigBackupPools(t_Handle h_FmVsp, t_FmBackupBmPools *p_BackupBmPools)
50602 +{
50603 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50604 +
50605 +    SANITY_CHECK_RETURN_ERROR(h_FmVsp, E_INVALID_HANDLE);
50606 +    SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
50607 +    SANITY_CHECK_RETURN_ERROR(p_BackupBmPools, E_INVALID_HANDLE);
50608 +
50609 +    p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools = (t_FmBackupBmPools *)XX_Malloc(sizeof(t_FmBackupBmPools));
50610 +    if (!p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools)
50611 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_BackupBmPools allocation failed"));
50612 +    memcpy(p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools, p_BackupBmPools, sizeof(t_FmBackupBmPools));
50613 +
50614 +    return E_OK;
50615 +}
50616 +
50617 +uint32_t FM_VSP_GetBufferDataOffset(t_Handle h_FmVsp)
50618 +{
50619 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50620 +
50621 +    SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, 0);
50622 +    SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, 0);
50623 +
50624 +    return p_FmVspEntry->bufferOffsets.dataOffset;
50625 +}
50626 +
50627 +uint8_t * FM_VSP_GetBufferICInfo(t_Handle h_FmVsp, char *p_Data)
50628 +{
50629 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50630 +
50631 +    SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
50632 +    SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
50633 +
50634 +    if (p_FmVspEntry->bufferOffsets.pcdInfoOffset == ILLEGAL_BASE)
50635 +        return NULL;
50636 +
50637 +    return (uint8_t *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.pcdInfoOffset);
50638 +}
50639 +
50640 +t_FmPrsResult * FM_VSP_GetBufferPrsResult(t_Handle h_FmVsp, char *p_Data)
50641 +{
50642 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50643 +
50644 +    SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
50645 +    SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
50646 +
50647 +    if (p_FmVspEntry->bufferOffsets.prsResultOffset == ILLEGAL_BASE)
50648 +        return NULL;
50649 +
50650 +    return (t_FmPrsResult *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.prsResultOffset);
50651 +}
50652 +
50653 +uint64_t * FM_VSP_GetBufferTimeStamp(t_Handle h_FmVsp, char *p_Data)
50654 +{
50655 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50656 +
50657 +    SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
50658 +    SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
50659 +
50660 +    if (p_FmVspEntry->bufferOffsets.timeStampOffset == ILLEGAL_BASE)
50661 +        return NULL;
50662 +
50663 +    return (uint64_t *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.timeStampOffset);
50664 +}
50665 +
50666 +uint8_t * FM_VSP_GetBufferHashResult(t_Handle h_FmVsp, char *p_Data)
50667 +{
50668 +    t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
50669 +
50670 +    SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
50671 +    SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
50672 +
50673 +    if (p_FmVspEntry->bufferOffsets.hashResultOffset == ILLEGAL_BASE)
50674 +        return NULL;
50675 +
50676 +    return (uint8_t *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.hashResultOffset);
50677 +}
50678 +
50679 +#endif /* (DPAA_VERSION >= 11) */
50680 --- /dev/null
50681 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.h
50682 @@ -0,0 +1,85 @@
50683 +/*
50684 + * Copyright 2008-2012 Freescale Semiconductor Inc.
50685 + *
50686 + * Redistribution and use in source and binary forms, with or without
50687 + * modification, are permitted provided that the following conditions are met:
50688 + *     * Redistributions of source code must retain the above copyright
50689 + *       notice, this list of conditions and the following disclaimer.
50690 + *     * Redistributions in binary form must reproduce the above copyright
50691 + *       notice, this list of conditions and the following disclaimer in the
50692 + *       documentation and/or other materials provided with the distribution.
50693 + *     * Neither the name of Freescale Semiconductor nor the
50694 + *       names of its contributors may be used to endorse or promote products
50695 + *       derived from this software without specific prior written permission.
50696 + *
50697 + *
50698 + * ALTERNATIVELY, this software may be distributed under the terms of the
50699 + * GNU General Public License ("GPL") as published by the Free Software
50700 + * Foundation, either version 2 of that License or (at your option) any
50701 + * later version.
50702 + *
50703 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
50704 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
50705 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
50706 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
50707 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
50708 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
50709 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
50710 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
50711 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
50712 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50713 + */
50714 +
50715 +
50716 +/******************************************************************************
50717 + @File          fm_sp.h
50718 +
50719 + @Description   FM SP  ...
50720 +*//***************************************************************************/
50721 +#ifndef __FM_SP_H
50722 +#define __FM_SP_H
50723 +
50724 +#include "std_ext.h"
50725 +#include "error_ext.h"
50726 +#include "list_ext.h"
50727 +
50728 +#include "fm_sp_common.h"
50729 +#include "fm_common.h"
50730 +
50731 +
50732 +#define __ERR_MODULE__  MODULE_FM_SP
50733 +
50734 +typedef struct {
50735 +    t_FmBufferPrefixContent             bufferPrefixContent;
50736 +    e_FmDmaSwapOption                   dmaSwapData;
50737 +    e_FmDmaCacheOption                  dmaIntContextCacheAttr;
50738 +    e_FmDmaCacheOption                  dmaHeaderCacheAttr;
50739 +    e_FmDmaCacheOption                  dmaScatterGatherCacheAttr;
50740 +    bool                                dmaWriteOptimize;
50741 +    uint16_t                            liodnOffset;
50742 +    bool                                noScatherGather;
50743 +    t_FmBufPoolDepletion                *p_BufPoolDepletion;
50744 +    t_FmBackupBmPools                   *p_BackupBmPools;
50745 +    t_FmExtPools                        extBufPools;
50746 +} t_FmVspEntryDriverParams;
50747 +
50748 +typedef struct {
50749 +    bool                        valid;
50750 +    volatile bool               lock;
50751 +    uint8_t                     pointedOwners;
50752 +    uint16_t                    absoluteSpId;
50753 +    uint8_t                     internalBufferOffset;
50754 +    t_FmSpBufMargins            bufMargins;
50755 +    t_FmSpIntContextDataCopy    intContext;
50756 +    t_FmSpBufferOffsets         bufferOffsets;
50757 +    t_Handle                    h_Fm;
50758 +    e_FmPortType                portType;           /**< Port type */
50759 +    uint8_t                     portId;             /**< Port Id - relative to type */
50760 +    uint8_t                     relativeProfileId;
50761 +    struct fm_pcd_storage_profile_regs *p_FmSpRegsBase;
50762 +    t_FmExtPools                extBufPools;
50763 +    t_FmVspEntryDriverParams    *p_FmVspEntryDriverParams;
50764 +} t_FmVspEntry;
50765 +
50766 +
50767 +#endif /* __FM_SP_H */
50768 --- /dev/null
50769 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fman_sp.c
50770 @@ -0,0 +1,197 @@
50771 +/*
50772 + * Copyright 2013 Freescale Semiconductor Inc.
50773 + *
50774 + * Redistribution and use in source and binary forms, with or without
50775 + * modification, are permitted provided that the following conditions are met:
50776 + *     * Redistributions of source code must retain the above copyright
50777 + *       notice, this list of conditions and the following disclaimer.
50778 + *     * Redistributions in binary form must reproduce the above copyright
50779 + *       notice, this list of conditions and the following disclaimer in the
50780 + *       documentation and/or other materials provided with the distribution.
50781 + *     * Neither the name of Freescale Semiconductor nor the
50782 + *       names of its contributors may be used to endorse or promote products
50783 + *       derived from this software without specific prior written permission.
50784 + *
50785 + *
50786 + * ALTERNATIVELY, this software may be distributed under the terms of the
50787 + * GNU General Public License ("GPL") as published by the Free Software
50788 + * Foundation, either version 2 of that License or (at your option) any
50789 + * later version.
50790 + *
50791 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
50792 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
50793 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
50794 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
50795 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
50796 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
50797 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
50798 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
50799 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
50800 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50801 + */
50802 +
50803 +#include "fsl_fman_sp.h"
50804 +
50805 +
50806 +uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs   *regs,
50807 +                    uint16_t                      index)
50808 +{
50809 +    struct fm_pcd_storage_profile_regs *sp_regs;
50810 +    sp_regs = &regs[index];
50811 +    return ioread32be(&sp_regs->fm_sp_acnt);
50812 +}
50813 +
50814 +void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,
50815 +            uint16_t index,    uint32_t value)
50816 +{
50817 +    struct fm_pcd_storage_profile_regs *sp_regs;
50818 +    sp_regs = &regs[index];
50819 +    iowrite32be(value, &sp_regs->fm_sp_acnt);
50820 +}
50821 +
50822 +void fman_vsp_defconfig(struct fm_storage_profile_params *cfg)
50823 +{
50824 +    cfg->dma_swap_data =
50825 +            DEFAULT_FMAN_SP_DMA_SWAP_DATA;
50826 +    cfg->int_context_cache_attr =
50827 +            DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR;
50828 +    cfg->header_cache_attr =
50829 +            DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR;
50830 +    cfg->scatter_gather_cache_attr =
50831 +            DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR;
50832 +    cfg->dma_write_optimize =
50833 +            DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE;
50834 +    cfg->no_scather_gather =
50835 +            DEFAULT_FMAN_SP_NO_SCATTER_GATHER;
50836 +}
50837 +
50838 +static inline uint32_t calc_vec_dep(int max_pools, bool *pools,
50839 +        struct fman_ext_pools *ext_buf_pools, uint32_t mask)
50840 +{
50841 +    int i, j;
50842 +    uint32_t vector = 0;
50843 +    for (i = 0; i < max_pools; i++)
50844 +        if (pools[i])
50845 +            for (j = 0; j < ext_buf_pools->num_pools_used; j++)
50846 +                if (i == ext_buf_pools->ext_buf_pool[j].id) {
50847 +                    vector |= mask >> j;
50848 +                    break;
50849 +                }
50850 +    return vector;
50851 +}
50852 +
50853 +void fman_vsp_init(struct fm_pcd_storage_profile_regs   *regs,
50854 +    uint16_t index, struct fm_storage_profile_params *fm_vsp_params,
50855 +    int port_max_num_of_ext_pools, int bm_max_num_of_pools,
50856 +    int max_num_of_pfc_priorities)
50857 +{
50858 +    int i = 0, j = 0;
50859 +    struct fm_pcd_storage_profile_regs *sp_regs;
50860 +    uint32_t tmp_reg, vector;
50861 +    struct fman_ext_pools *ext_buf_pools = &fm_vsp_params->fm_ext_pools;
50862 +    struct fman_buf_pool_depletion *buf_pool_depletion =
50863 +                    &fm_vsp_params->buf_pool_depletion;
50864 +    struct fman_backup_bm_pools *backup_pools =
50865 +                    &fm_vsp_params->backup_pools;
50866 +    struct fman_sp_int_context_data_copy *int_context_data_copy =
50867 +                        fm_vsp_params->int_context;
50868 +    struct fman_sp_buf_margins *external_buffer_margins =
50869 +                        fm_vsp_params->buf_margins;
50870 +    bool no_scather_gather = fm_vsp_params->no_scather_gather;
50871 +    uint16_t liodn_offset = fm_vsp_params->liodn_offset;
50872 +
50873 +    sp_regs = &regs[index];
50874 +
50875 +    /* fill external buffers manager pool information register*/
50876 +    for (i = 0; i < ext_buf_pools->num_pools_used; i++) {
50877 +        tmp_reg = FMAN_SP_EXT_BUF_POOL_VALID |
50878 +            FMAN_SP_EXT_BUF_POOL_EN_COUNTER;
50879 +        tmp_reg |= ((uint32_t)ext_buf_pools->ext_buf_pool[i].id <<
50880 +            FMAN_SP_EXT_BUF_POOL_ID_SHIFT);
50881 +        tmp_reg |= ext_buf_pools->ext_buf_pool[i].size;
50882 +        /* functionality available only for some deriviatives
50883 +             (limited by config) */
50884 +        for (j = 0; j < backup_pools->num_backup_pools; j++)
50885 +            if (ext_buf_pools->ext_buf_pool[i].id ==
50886 +                backup_pools->pool_ids[j]) {
50887 +                tmp_reg |= FMAN_SP_EXT_BUF_POOL_BACKUP;
50888 +                break;
50889 +            }
50890 +        iowrite32be(tmp_reg, &sp_regs->fm_sp_ebmpi[i]);
50891 +    }
50892 +
50893 +    /* clear unused pools */
50894 +    for (i = ext_buf_pools->num_pools_used;
50895 +        i < port_max_num_of_ext_pools; i++)
50896 +        iowrite32be(0, &sp_regs->fm_sp_ebmpi[i]);
50897 +
50898 +    /* fill pool depletion register*/
50899 +    tmp_reg = 0;
50900 +    if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->pools_grp_mode_enable) {
50901 +        /* calculate vector for number of pools depletion */
50902 +        vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->
50903 +                pools_to_consider, ext_buf_pools, 0x80000000);
50904 +
50905 +        /* configure num of pools and vector for number of pools mode */
50906 +        tmp_reg |= (((uint32_t)buf_pool_depletion->num_pools - 1) <<
50907 +            FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT);
50908 +        tmp_reg |= vector;
50909 +    }
50910 +
50911 +    if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->single_pool_mode_enable) {
50912 +        /* calculate vector for number of pools depletion */
50913 +        vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->
50914 +                pools_to_consider_for_single_mode,
50915 +                ext_buf_pools, 0x00000080);
50916 +
50917 +        /* configure num of pools and vector for number of pools mode */
50918 +        tmp_reg |= vector;
50919 +    }
50920 +
50921 +    /* fill QbbPEV */
50922 +    if (buf_pool_depletion->buf_pool_depletion_enabled) {
50923 +        vector = 0;
50924 +        for (i = 0; i < max_num_of_pfc_priorities; i++)
50925 +            if (buf_pool_depletion->pfc_priorities_en[i] == TRUE)
50926 +                vector |= 0x00000100 << i;
50927 +        tmp_reg |= vector;
50928 +    }
50929 +    iowrite32be(tmp_reg, &sp_regs->fm_sp_mpd);
50930 +
50931 +    /* fill dma attributes register */
50932 +    tmp_reg = 0;
50933 +    tmp_reg |= (uint32_t)fm_vsp_params->dma_swap_data <<
50934 +        FMAN_SP_DMA_ATTR_SWP_SHIFT;
50935 +    tmp_reg |= (uint32_t)fm_vsp_params->int_context_cache_attr <<
50936 +        FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT;
50937 +    tmp_reg |= (uint32_t)fm_vsp_params->header_cache_attr <<
50938 +        FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT;
50939 +    tmp_reg |= (uint32_t)fm_vsp_params->scatter_gather_cache_attr <<
50940 +        FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT;
50941 +    if (fm_vsp_params->dma_write_optimize)
50942 +        tmp_reg |= FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE;
50943 +    iowrite32be(tmp_reg, &sp_regs->fm_sp_da);
50944 +
50945 +    /* IC parameters - fill internal context parameters register */
50946 +    tmp_reg = 0;
50947 +    tmp_reg |= (((uint32_t)int_context_data_copy->ext_buf_offset/
50948 +        OFFSET_UNITS) << FMAN_SP_IC_TO_EXT_SHIFT);
50949 +    tmp_reg |= (((uint32_t)int_context_data_copy->int_context_offset/
50950 +        OFFSET_UNITS) << FMAN_SP_IC_FROM_INT_SHIFT);
50951 +    tmp_reg |= (((uint32_t)int_context_data_copy->size/OFFSET_UNITS) <<
50952 +        FMAN_SP_IC_SIZE_SHIFT);
50953 +    iowrite32be(tmp_reg, &sp_regs->fm_sp_icp);
50954 +
50955 +    /* buffer margins - fill external buffer margins register */
50956 +    tmp_reg = 0;
50957 +    tmp_reg |= (((uint32_t)external_buffer_margins->start_margins) <<
50958 +        FMAN_SP_EXT_BUF_MARG_START_SHIFT);
50959 +    tmp_reg |= (((uint32_t)external_buffer_margins->end_margins) <<
50960 +        FMAN_SP_EXT_BUF_MARG_END_SHIFT);
50961 +    if (no_scather_gather)
50962 +        tmp_reg |= FMAN_SP_SG_DISABLE;
50963 +    iowrite32be(tmp_reg, &sp_regs->fm_sp_ebm);
50964 +
50965 +    /* buffer margins - fill spliodn register */
50966 +    iowrite32be(liodn_offset, &sp_regs->fm_sp_spliodn);
50967 +}
50968 --- /dev/null
50969 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c
50970 @@ -0,0 +1,5216 @@
50971 +/*
50972 + * Copyright 2008-2012 Freescale Semiconductor Inc.
50973 + *
50974 + * Redistribution and use in source and binary forms, with or without
50975 + * modification, are permitted provided that the following conditions are met:
50976 + *     * Redistributions of source code must retain the above copyright
50977 + *       notice, this list of conditions and the following disclaimer.
50978 + *     * Redistributions in binary form must reproduce the above copyright
50979 + *       notice, this list of conditions and the following disclaimer in the
50980 + *       documentation and/or other materials provided with the distribution.
50981 + *     * Neither the name of Freescale Semiconductor nor the
50982 + *       names of its contributors may be used to endorse or promote products
50983 + *       derived from this software without specific prior written permission.
50984 + *
50985 + *
50986 + * ALTERNATIVELY, this software may be distributed under the terms of the
50987 + * GNU General Public License ("GPL") as published by the Free Software
50988 + * Foundation, either version 2 of that License or (at your option) any
50989 + * later version.
50990 + *
50991 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
50992 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
50993 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
50994 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
50995 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
50996 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
50997 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
50998 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
50999 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
51000 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51001 + */
51002 +
51003 +
51004 +/******************************************************************************
51005 + @File          fm.c
51006 +
51007 + @Description   FM driver routines implementation.
51008 +*//***************************************************************************/
51009 +#include "std_ext.h"
51010 +#include "error_ext.h"
51011 +#include "xx_ext.h"
51012 +#include "string_ext.h"
51013 +#include "sprint_ext.h"
51014 +#include "debug_ext.h"
51015 +#include "fm_muram_ext.h"
51016 +#include <linux/math64.h>
51017 +
51018 +#include "fm_common.h"
51019 +#include "fm_ipc.h"
51020 +#include "fm.h"
51021 +#ifndef CONFIG_FMAN_ARM
51022 +#include <linux/fsl/svr.h>
51023 +#endif
51024 +#include "fsl_fman.h"
51025 +
51026 +
51027 +/****************************************/
51028 +/*       static functions               */
51029 +/****************************************/
51030 +
51031 +static volatile bool blockingFlag = FALSE;
51032 +static void IpcMsgCompletionCB(t_Handle   h_Fm,
51033 +                               uint8_t    *p_Msg,
51034 +                               uint8_t    *p_Reply,
51035 +                               uint32_t   replyLength,
51036 +                               t_Error    status)
51037 +{
51038 +    UNUSED(h_Fm);UNUSED(p_Msg);UNUSED(p_Reply);UNUSED(replyLength);UNUSED(status);
51039 +    blockingFlag = FALSE;
51040 +}
51041 +
51042 +static void FreeInitResources(t_Fm *p_Fm)
51043 +{
51044 +    if (p_Fm->camBaseAddr)
51045 +       FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->camBaseAddr));
51046 +    if (p_Fm->fifoBaseAddr)
51047 +       FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->fifoBaseAddr));
51048 +    if (p_Fm->resAddr)
51049 +       FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->resAddr));
51050 +}
51051 +
51052 +static bool IsFmanCtrlCodeLoaded(t_Fm *p_Fm)
51053 +{
51054 +    t_FMIramRegs    *p_Iram;
51055 +
51056 +    ASSERT_COND(p_Fm);
51057 +    p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
51058 +
51059 +    return (bool)!!(GET_UINT32(p_Iram->iready) & IRAM_READY);
51060 +}
51061 +
51062 +static t_Error CheckFmParameters(t_Fm *p_Fm)
51063 +{
51064 +    if (IsFmanCtrlCodeLoaded(p_Fm) && !p_Fm->resetOnInit)
51065 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Old FMan CTRL code is loaded; FM must be reset!"));
51066 +#if (DPAA_VERSION < 11)
51067 +    if (!p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats ||
51068 +        (p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats > DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS))
51069 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
51070 +                     ("axiDbgNumOfBeats has to be in the range 1 - %d", DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS));
51071 +#endif /* (DPAA_VERSION < 11) */
51072 +    if (p_Fm->p_FmDriverParam->dma_cam_num_of_entries % DMA_CAM_UNITS)
51073 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_cam_num_of_entries has to be divisble by %d", DMA_CAM_UNITS));
51074 +//    if (!p_Fm->p_FmDriverParam->dma_cam_num_of_entries || (p_Fm->p_FmDriverParam->dma_cam_num_of_entries > DMA_MODE_MAX_CAM_NUM_OF_ENTRIES))
51075 +//        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_cam_num_of_entries has to be in the range 1 - %d", DMA_MODE_MAX_CAM_NUM_OF_ENTRIES));
51076 +    if (p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer > DMA_THRESH_MAX_COMMQ)
51077 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_comm_qtsh_asrt_emer can not be larger than %d", DMA_THRESH_MAX_COMMQ));
51078 +    if (p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer > DMA_THRESH_MAX_COMMQ)
51079 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_comm_qtsh_clr_emer can not be larger than %d", DMA_THRESH_MAX_COMMQ));
51080 +    if (p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer >= p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer)
51081 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_comm_qtsh_clr_emer must be smaller than dma_comm_qtsh_asrt_emer"));
51082 +#if (DPAA_VERSION < 11)
51083 +    if (p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer > DMA_THRESH_MAX_BUF)
51084 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_read_buf_tsh_asrt_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
51085 +    if (p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer > DMA_THRESH_MAX_BUF)
51086 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_read_buf_tsh_clr_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
51087 +    if (p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer >= p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer)
51088 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_read_buf_tsh_clr_emer must be smaller than dma_read_buf_tsh_asrt_emer"));
51089 +    if (p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer > DMA_THRESH_MAX_BUF)
51090 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_write_buf_tsh_asrt_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
51091 +    if (p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer > DMA_THRESH_MAX_BUF)
51092 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_write_buf_tsh_clr_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
51093 +    if (p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer >= p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer)
51094 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_write_buf_tsh_clr_emer must be smaller than dma_write_buf_tsh_asrt_emer"));
51095 +#else /* (DPAA_VERSION >= 11) */
51096 +    if ((p_Fm->p_FmDriverParam->dma_dbg_cnt_mode == E_FMAN_DMA_DBG_CNT_INT_READ_EM)||
51097 +            (p_Fm->p_FmDriverParam->dma_dbg_cnt_mode == E_FMAN_DMA_DBG_CNT_INT_WRITE_EM) ||
51098 +            (p_Fm->p_FmDriverParam->dma_dbg_cnt_mode == E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT))
51099 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_dbg_cnt_mode value not supported by this integration."));
51100 +    if ((p_Fm->p_FmDriverParam->dma_emergency_bus_select == FM_DMA_MURAM_READ_EMERGENCY)||
51101 +            (p_Fm->p_FmDriverParam->dma_emergency_bus_select == FM_DMA_MURAM_WRITE_EMERGENCY))
51102 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("emergencyBusSelect value not supported by this integration."));
51103 +    if (p_Fm->p_FmDriverParam->dma_stop_on_bus_error)
51104 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_stop_on_bus_error not supported by this integration."));
51105 +#ifdef FM_AID_MODE_NO_TNUM_SW005
51106 +    if (p_Fm->p_FmDriverParam->dma_aid_mode != E_FMAN_DMA_AID_OUT_PORT_ID)
51107 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_aid_mode not supported by this integration."));
51108 +#endif /* FM_AID_MODE_NO_TNUM_SW005 */
51109 +    if (p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats)
51110 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_axi_dbg_num_of_beats not supported by this integration."));
51111 +#endif /* (DPAA_VERSION < 11) */
51112 +
51113 +    if (!p_Fm->p_FmStateStruct->fmClkFreq)
51114 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fmClkFreq must be set."));
51115 +    if (USEC_TO_CLK(p_Fm->p_FmDriverParam->dma_watchdog, p_Fm->p_FmStateStruct->fmClkFreq) > DMA_MAX_WATCHDOG)
51116 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
51117 +                     ("dma_watchdog depends on FM clock. dma_watchdog(in microseconds) * clk (in Mhz), may not exceed 0x08x", DMA_MAX_WATCHDOG));
51118 +
51119 +#if (DPAA_VERSION >= 11)
51120 +    if ((p_Fm->partVSPBase + p_Fm->partNumOfVSPs) > FM_VSP_MAX_NUM_OF_ENTRIES)
51121 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("partVSPBase+partNumOfVSPs out of range!!!"));
51122 +#endif /* (DPAA_VERSION >= 11) */
51123 +
51124 +    if (p_Fm->p_FmStateStruct->totalFifoSize % BMI_FIFO_UNITS)
51125 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("totalFifoSize number has to be divisible by %d", BMI_FIFO_UNITS));
51126 +    if (!p_Fm->p_FmStateStruct->totalFifoSize ||
51127 +        (p_Fm->p_FmStateStruct->totalFifoSize > BMI_MAX_FIFO_SIZE))
51128 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
51129 +                     ("totalFifoSize (currently defined as %d) has to be in the range of 256 to %d",
51130 +                      p_Fm->p_FmStateStruct->totalFifoSize,
51131 +                      BMI_MAX_FIFO_SIZE));
51132 +    if (!p_Fm->p_FmStateStruct->totalNumOfTasks ||
51133 +        (p_Fm->p_FmStateStruct->totalNumOfTasks > BMI_MAX_NUM_OF_TASKS))
51134 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("totalNumOfTasks number has to be in the range 1 - %d", BMI_MAX_NUM_OF_TASKS));
51135 +
51136 +#ifdef FM_HAS_TOTAL_DMAS
51137 +    if (!p_Fm->p_FmStateStruct->maxNumOfOpenDmas ||
51138 +        (p_Fm->p_FmStateStruct->maxNumOfOpenDmas > BMI_MAX_NUM_OF_DMAS))
51139 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("maxNumOfOpenDmas number has to be in the range 1 - %d", BMI_MAX_NUM_OF_DMAS));
51140 +#endif /* FM_HAS_TOTAL_DMAS */
51141 +
51142 +    if (p_Fm->p_FmDriverParam->disp_limit_tsh > FPM_MAX_DISP_LIMIT)
51143 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("disp_limit_tsh can't be greater than %d", FPM_MAX_DISP_LIMIT));
51144 +
51145 +    if (!p_Fm->f_Exception)
51146 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
51147 +    if (!p_Fm->f_BusError)
51148 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
51149 +
51150 +#ifdef FM_NO_WATCHDOG
51151 +    if ((p_Fm->p_FmStateStruct->revInfo.majorRev == 2) &&
51152 +        (p_Fm->p_FmDriverParam->dma_watchdog))
51153 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("watchdog!"));
51154 +#endif /* FM_NO_WATCHDOG */
51155 +
51156 +#ifdef FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008
51157 +    if ((p_Fm->p_FmStateStruct->revInfo.majorRev < 6) &&
51158 +        (p_Fm->p_FmDriverParam->halt_on_unrecov_ecc_err))
51159 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("HaltOnEccError!"));
51160 +#endif /* FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008 */
51161 +
51162 +#ifdef FM_NO_TNUM_AGING
51163 +    if ((p_Fm->p_FmStateStruct->revInfo.majorRev != 4) &&
51164 +        (p_Fm->p_FmStateStruct->revInfo.majorRev < 6))
51165 +        if (p_Fm->p_FmDriverParam->tnum_aging_period)
51166 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Tnum aging!"));
51167 +#endif /* FM_NO_TNUM_AGING */
51168 +
51169 +    /* check that user did not set revision-dependent exceptions */
51170 +#ifdef FM_NO_DISPATCH_RAM_ECC
51171 +    if ((p_Fm->p_FmStateStruct->revInfo.majorRev != 4) &&
51172 +        (p_Fm->p_FmStateStruct->revInfo.majorRev < 6))
51173 +        if (p_Fm->userSetExceptions & FM_EX_BMI_DISPATCH_RAM_ECC)
51174 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("exception e_FM_EX_BMI_DISPATCH_RAM_ECC!"));
51175 +#endif /* FM_NO_DISPATCH_RAM_ECC */
51176 +
51177 +#ifdef FM_QMI_NO_ECC_EXCEPTIONS
51178 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev == 4)
51179 +        if (p_Fm->userSetExceptions & (FM_EX_QMI_SINGLE_ECC | FM_EX_QMI_DOUBLE_ECC))
51180 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("exception e_FM_EX_QMI_SINGLE_ECC/e_FM_EX_QMI_DOUBLE_ECC!"));
51181 +#endif /* FM_QMI_NO_ECC_EXCEPTIONS */
51182 +
51183 +#ifdef FM_QMI_NO_SINGLE_ECC_EXCEPTION
51184 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
51185 +        if (p_Fm->userSetExceptions & FM_EX_QMI_SINGLE_ECC)
51186 +            RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("exception e_FM_EX_QMI_SINGLE_ECC!"));
51187 +#endif /* FM_QMI_NO_SINGLE_ECC_EXCEPTION */
51188 +
51189 +    return E_OK;
51190 +}
51191 +
51192 +
51193 +static void SendIpcIsr(t_Fm *p_Fm, uint32_t macEvent, uint32_t pendingReg)
51194 +{
51195 +    ASSERT_COND(p_Fm->guestId == NCSW_MASTER_ID);
51196 +
51197 +    if (p_Fm->intrMng[macEvent].guestId == NCSW_MASTER_ID)
51198 +        p_Fm->intrMng[macEvent].f_Isr(p_Fm->intrMng[macEvent].h_SrcHandle);
51199 +
51200 +    /* If the MAC is running on guest-partition and we have IPC session with it,
51201 +       we inform him about the event through IPC; otherwise, we ignore the event. */
51202 +    else if (p_Fm->h_IpcSessions[p_Fm->intrMng[macEvent].guestId])
51203 +    {
51204 +        t_Error     err;
51205 +        t_FmIpcIsr  fmIpcIsr;
51206 +        t_FmIpcMsg  msg;
51207 +
51208 +        memset(&msg, 0, sizeof(msg));
51209 +        msg.msgId = FM_GUEST_ISR;
51210 +        fmIpcIsr.pendingReg = pendingReg;
51211 +        fmIpcIsr.boolErr = FALSE;
51212 +        memcpy(msg.msgBody, &fmIpcIsr, sizeof(fmIpcIsr));
51213 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[p_Fm->intrMng[macEvent].guestId],
51214 +                                (uint8_t*)&msg,
51215 +                                sizeof(msg.msgId) + sizeof(fmIpcIsr),
51216 +                                NULL,
51217 +                                NULL,
51218 +                                NULL,
51219 +                                NULL);
51220 +        if (err != E_OK)
51221 +            REPORT_ERROR(MINOR, err, NO_MSG);
51222 +    }
51223 +    else
51224 +        DBG(TRACE, ("FM Guest mode, without IPC - can't call ISR!"));
51225 +}
51226 +
51227 +static void BmiErrEvent(t_Fm *p_Fm)
51228 +{
51229 +    uint32_t    event;
51230 +    struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
51231 +
51232 +
51233 +    event = fman_get_bmi_err_event(bmi_rg);
51234 +
51235 +    if (event & BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC)
51236 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_STORAGE_PROFILE_ECC);
51237 +    if (event & BMI_ERR_INTR_EN_LIST_RAM_ECC)
51238 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_LIST_RAM_ECC);
51239 +    if (event & BMI_ERR_INTR_EN_STATISTICS_RAM_ECC)
51240 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_STATISTICS_RAM_ECC);
51241 +    if (event & BMI_ERR_INTR_EN_DISPATCH_RAM_ECC)
51242 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_DISPATCH_RAM_ECC);
51243 +}
51244 +
51245 +static void    QmiErrEvent(t_Fm *p_Fm)
51246 +{
51247 +    uint32_t    event;
51248 +    struct fman_qmi_regs *qmi_rg = p_Fm->p_FmQmiRegs;
51249 +
51250 +    event = fman_get_qmi_err_event(qmi_rg);
51251 +
51252 +    if (event & QMI_ERR_INTR_EN_DOUBLE_ECC)
51253 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_QMI_DOUBLE_ECC);
51254 +    if (event & QMI_ERR_INTR_EN_DEQ_FROM_DEF)
51255 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID);
51256 +}
51257 +
51258 +static void    DmaErrEvent(t_Fm *p_Fm)
51259 +{
51260 +    uint32_t            status, com_id;
51261 +    uint8_t             tnum;
51262 +    uint8_t             hardwarePortId;
51263 +    uint8_t             relativePortId;
51264 +    uint16_t            liodn;
51265 +    struct fman_dma_regs *dma_rg = p_Fm->p_FmDmaRegs;
51266 +
51267 +    status = fman_get_dma_err_event(dma_rg);
51268 +
51269 +    if (status & DMA_STATUS_BUS_ERR)
51270 +    {
51271 +        com_id = fman_get_dma_com_id(dma_rg);
51272 +        hardwarePortId = (uint8_t)(((com_id & DMA_TRANSFER_PORTID_MASK) >> DMA_TRANSFER_PORTID_SHIFT));
51273 +        ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
51274 +        HW_PORT_ID_TO_SW_PORT_ID(relativePortId, hardwarePortId);
51275 +        tnum = (uint8_t)((com_id & DMA_TRANSFER_TNUM_MASK) >> DMA_TRANSFER_TNUM_SHIFT);
51276 +        liodn = (uint16_t)(com_id & DMA_TRANSFER_LIODN_MASK);
51277 +        ASSERT_COND(p_Fm->p_FmStateStruct->portsTypes[hardwarePortId] != e_FM_PORT_TYPE_DUMMY);
51278 +        p_Fm->f_BusError(p_Fm->h_App,
51279 +                         p_Fm->p_FmStateStruct->portsTypes[hardwarePortId],
51280 +                         relativePortId,
51281 +                         fman_get_dma_addr(dma_rg),
51282 +                         tnum,
51283 +                         liodn);
51284 +    }
51285 +        if (status & DMA_STATUS_FM_SPDAT_ECC)
51286 +            p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_SINGLE_PORT_ECC);
51287 +        if (status & DMA_STATUS_READ_ECC)
51288 +            p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_READ_ECC);
51289 +        if (status & DMA_STATUS_SYSTEM_WRITE_ECC)
51290 +            p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_SYSTEM_WRITE_ECC);
51291 +        if (status & DMA_STATUS_FM_WRITE_ECC)
51292 +            p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_FM_WRITE_ECC);
51293 +    }
51294 +
51295 +static void    FpmErrEvent(t_Fm *p_Fm)
51296 +{
51297 +    uint32_t    event;
51298 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
51299 +
51300 +    event = fman_get_fpm_err_event(fpm_rg);
51301 +
51302 +    if ((event  & FPM_EV_MASK_DOUBLE_ECC) && (event & FPM_EV_MASK_DOUBLE_ECC_EN))
51303 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_FPM_DOUBLE_ECC);
51304 +    if ((event  & FPM_EV_MASK_STALL) && (event & FPM_EV_MASK_STALL_EN))
51305 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_FPM_STALL_ON_TASKS);
51306 +    if ((event  & FPM_EV_MASK_SINGLE_ECC) && (event & FPM_EV_MASK_SINGLE_ECC_EN))
51307 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_FPM_SINGLE_ECC);
51308 +}
51309 +
51310 +static void    MuramErrIntr(t_Fm *p_Fm)
51311 +{
51312 +    uint32_t    event;
51313 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
51314 +
51315 +    event = fman_get_muram_err_event(fpm_rg);
51316 +
51317 +    if (event & FPM_RAM_MURAM_ECC)
51318 +        p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_MURAM_ECC);
51319 +}
51320 +
51321 +static void IramErrIntr(t_Fm *p_Fm)
51322 +{
51323 +    uint32_t    event;
51324 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
51325 +
51326 +    event = fman_get_iram_err_event(fpm_rg);
51327 +
51328 +    if (event & FPM_RAM_IRAM_ECC)
51329 +        p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_IRAM_ECC);
51330 +}
51331 +
51332 +static void QmiEvent(t_Fm *p_Fm)
51333 +{
51334 +    uint32_t    event;
51335 +    struct fman_qmi_regs *qmi_rg = p_Fm->p_FmQmiRegs;
51336 +
51337 +    event = fman_get_qmi_event(qmi_rg);
51338 +
51339 +    if (event & QMI_INTR_EN_SINGLE_ECC)
51340 +        p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_QMI_SINGLE_ECC);
51341 +}
51342 +
51343 +static void UnimplementedIsr(t_Handle h_Arg)
51344 +{
51345 +    UNUSED(h_Arg);
51346 +
51347 +    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unimplemented ISR!"));
51348 +}
51349 +
51350 +static void UnimplementedFmanCtrlIsr(t_Handle h_Arg, uint32_t event)
51351 +{
51352 +    UNUSED(h_Arg); UNUSED(event);
51353 +
51354 +    REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unimplemented FmCtl ISR!"));
51355 +}
51356 +
51357 +static void EnableTimeStamp(t_Fm *p_Fm)
51358 +{
51359 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
51360 +
51361 +    ASSERT_COND(p_Fm->p_FmStateStruct);
51362 +    ASSERT_COND(p_Fm->p_FmStateStruct->count1MicroBit);
51363 +
51364 +    fman_enable_time_stamp(fpm_rg, p_Fm->p_FmStateStruct->count1MicroBit, p_Fm->p_FmStateStruct->fmClkFreq);
51365 +
51366 +    p_Fm->p_FmStateStruct->enabledTimeStamp = TRUE;
51367 +}
51368 +
51369 +static t_Error ClearIRam(t_Fm *p_Fm)
51370 +{
51371 +    t_FMIramRegs    *p_Iram;
51372 +    int             i;
51373 +    int             iram_size;
51374 +
51375 +    ASSERT_COND(p_Fm);
51376 +    p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
51377 +    iram_size = FM_IRAM_SIZE(p_Fm->p_FmStateStruct->revInfo.majorRev,p_Fm->p_FmStateStruct->revInfo.minorRev);
51378 +
51379 +    /* Enable the auto-increment */
51380 +    WRITE_UINT32(p_Iram->iadd, IRAM_IADD_AIE);
51381 +    while (GET_UINT32(p_Iram->iadd) != IRAM_IADD_AIE) ;
51382 +
51383 +    for (i=0; i < (iram_size/4); i++)
51384 +        WRITE_UINT32(p_Iram->idata, 0xffffffff);
51385 +
51386 +    WRITE_UINT32(p_Iram->iadd, iram_size - 4);
51387 +    CORE_MemoryBarrier();
51388 +    while (GET_UINT32(p_Iram->idata) != 0xffffffff) ;
51389 +
51390 +    return E_OK;
51391 +}
51392 +
51393 +static t_Error LoadFmanCtrlCode(t_Fm *p_Fm)
51394 +{
51395 +    t_FMIramRegs    *p_Iram;
51396 +    int             i;
51397 +    uint32_t        tmp;
51398 +    uint8_t         compTo16;
51399 +
51400 +    ASSERT_COND(p_Fm);
51401 +    p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
51402 +
51403 +    /* Enable the auto-increment */
51404 +    WRITE_UINT32(p_Iram->iadd, IRAM_IADD_AIE);
51405 +    while (GET_UINT32(p_Iram->iadd) != IRAM_IADD_AIE) ;
51406 +
51407 +    for (i=0; i < (p_Fm->firmware.size / 4); i++)
51408 +        WRITE_UINT32(p_Iram->idata, p_Fm->firmware.p_Code[i]);
51409 +
51410 +    compTo16 = (uint8_t)(p_Fm->firmware.size % 16);
51411 +    if (compTo16)
51412 +        for (i=0; i < ((16-compTo16) / 4); i++)
51413 +            WRITE_UINT32(p_Iram->idata, 0xffffffff);
51414 +
51415 +    WRITE_UINT32(p_Iram->iadd,p_Fm->firmware.size-4);
51416 +    while (GET_UINT32(p_Iram->iadd) != (p_Fm->firmware.size-4)) ;
51417 +
51418 +    /* verify that writing has completed */
51419 +    while (GET_UINT32(p_Iram->idata) != p_Fm->firmware.p_Code[(p_Fm->firmware.size / 4)-1]) ;
51420 +
51421 +    if (p_Fm->fwVerify)
51422 +    {
51423 +        WRITE_UINT32(p_Iram->iadd, IRAM_IADD_AIE);
51424 +        while (GET_UINT32(p_Iram->iadd) != IRAM_IADD_AIE) ;
51425 +        for (i=0; i < (p_Fm->firmware.size / 4); i++)
51426 +        {
51427 +            tmp = GET_UINT32(p_Iram->idata);
51428 +            if (tmp != p_Fm->firmware.p_Code[i])
51429 +                RETURN_ERROR(MAJOR, E_WRITE_FAILED,
51430 +                             ("UCode write error : write 0x%x, read 0x%x",
51431 +                              p_Fm->firmware.p_Code[i],tmp));
51432 +        }
51433 +        WRITE_UINT32(p_Iram->iadd, 0x0);
51434 +    }
51435 +
51436 +    /* Enable patch from IRAM */
51437 +    WRITE_UINT32(p_Iram->iready, IRAM_READY);
51438 +    XX_UDelay(1000);
51439 +
51440 +    DBG(INFO, ("FMan-Controller code (ver %d.%d.%d) loaded to IRAM.",
51441 +               ((uint16_t *)p_Fm->firmware.p_Code)[2],
51442 +               ((uint8_t *)p_Fm->firmware.p_Code)[6],
51443 +               ((uint8_t *)p_Fm->firmware.p_Code)[7]));
51444 +
51445 +    return E_OK;
51446 +}
51447 +
51448 +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
51449 +static t_Error FwNotResetErratumBugzilla6173WA(t_Fm *p_Fm)
51450 +{
51451 +    t_FMIramRegs    *p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
51452 +    uint32_t        tmpReg;
51453 +    uint32_t        savedSpliodn[63];
51454 +
51455 +    /* write to IRAM first location the debug instruction */
51456 +    WRITE_UINT32(p_Iram->iadd, 0);
51457 +    while (GET_UINT32(p_Iram->iadd) != 0) ;
51458 +    WRITE_UINT32(p_Iram->idata, FM_FW_DEBUG_INSTRUCTION);
51459 +
51460 +    WRITE_UINT32(p_Iram->iadd, 0);
51461 +    while (GET_UINT32(p_Iram->iadd) != 0) ;
51462 +    while (GET_UINT32(p_Iram->idata) != FM_FW_DEBUG_INSTRUCTION) ;
51463 +
51464 +    /* Enable patch from IRAM */
51465 +    WRITE_UINT32(p_Iram->iready, IRAM_READY);
51466 +    CORE_MemoryBarrier();
51467 +    XX_UDelay(100);
51468 +    IO2MemCpy32((uint8_t *)savedSpliodn,
51469 +                (uint8_t *)p_Fm->p_FmBmiRegs->fmbm_spliodn,
51470 +                63*sizeof(uint32_t));
51471 +
51472 +    /* reset FMAN */
51473 +    WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rstc, FPM_RSTC_FM_RESET);
51474 +    CORE_MemoryBarrier();
51475 +    XX_UDelay(100);
51476 +
51477 +    /* verify breakpoint debug status register */
51478 +    tmpReg = GET_UINT32(*(uint32_t *)UINT_TO_PTR(p_Fm->baseAddr + FM_DEBUG_STATUS_REGISTER_OFFSET));
51479 +    if (!tmpReg)
51480 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Invalid debug status register value is '0'"));
51481 +
51482 +    /*************************************/
51483 +    /* Load FMan-Controller code to IRAM */
51484 +    /*************************************/
51485 +    ClearIRam(p_Fm);
51486 +    if (p_Fm->firmware.p_Code &&
51487 +        (LoadFmanCtrlCode(p_Fm) != E_OK))
51488 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
51489 +    XX_UDelay(100);
51490 +
51491 +    /* reset FMAN again to start the microcode */
51492 +    WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rstc, FPM_RSTC_FM_RESET);
51493 +    CORE_MemoryBarrier();
51494 +    XX_UDelay(100);
51495 +    Mem2IOCpy32((uint8_t *)p_Fm->p_FmBmiRegs->fmbm_spliodn,
51496 +                (uint8_t *)savedSpliodn,
51497 +                63*sizeof(uint32_t));
51498 +
51499 +    if (fman_is_qmi_halt_not_busy_state(p_Fm->p_FmQmiRegs))
51500 +    {
51501 +        fman_resume(p_Fm->p_FmFpmRegs);
51502 +        CORE_MemoryBarrier();
51503 +        XX_UDelay(100);
51504 +    }
51505 +
51506 +    return E_OK;
51507 +}
51508 +#endif /* FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
51509 +
51510 +static void GuestErrorIsr(t_Fm *p_Fm, uint32_t pending)
51511 +{
51512 +#define FM_G_CALL_1G_MAC_ERR_ISR(_id)   \
51513 +do {                                    \
51514 +    p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].h_SrcHandle);\
51515 +} while (0)
51516 +#define FM_G_CALL_10G_MAC_ERR_ISR(_id)  \
51517 +do {                                    \
51518 +    p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].h_SrcHandle);\
51519 +} while (0)
51520 +
51521 +    /* error interrupts */
51522 +    if (pending & ERR_INTR_EN_1G_MAC0)
51523 +        FM_G_CALL_1G_MAC_ERR_ISR(0);
51524 +    if (pending & ERR_INTR_EN_1G_MAC1)
51525 +        FM_G_CALL_1G_MAC_ERR_ISR(1);
51526 +    if (pending & ERR_INTR_EN_1G_MAC2)
51527 +        FM_G_CALL_1G_MAC_ERR_ISR(2);
51528 +    if (pending & ERR_INTR_EN_1G_MAC3)
51529 +        FM_G_CALL_1G_MAC_ERR_ISR(3);
51530 +    if (pending & ERR_INTR_EN_1G_MAC4)
51531 +        FM_G_CALL_1G_MAC_ERR_ISR(4);
51532 +    if (pending & ERR_INTR_EN_1G_MAC5)
51533 +        FM_G_CALL_1G_MAC_ERR_ISR(5);
51534 +    if (pending & ERR_INTR_EN_1G_MAC6)
51535 +        FM_G_CALL_1G_MAC_ERR_ISR(6);
51536 +    if (pending & ERR_INTR_EN_1G_MAC7)
51537 +        FM_G_CALL_1G_MAC_ERR_ISR(7);
51538 +    if (pending & ERR_INTR_EN_10G_MAC0)
51539 +        FM_G_CALL_10G_MAC_ERR_ISR(0);
51540 +    if (pending & ERR_INTR_EN_10G_MAC1)
51541 +        FM_G_CALL_10G_MAC_ERR_ISR(1);
51542 +}
51543 +
51544 +static void GuestEventIsr(t_Fm *p_Fm, uint32_t pending)
51545 +{
51546 +#define FM_G_CALL_1G_MAC_ISR(_id)   \
51547 +do {                                    \
51548 +    p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].h_SrcHandle);\
51549 +} while (0)
51550 +#define FM_G_CALL_10G_MAC_ISR(_id)   \
51551 +do {                                    \
51552 +    p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].h_SrcHandle);\
51553 +} while (0)
51554 +
51555 +    if (pending & INTR_EN_1G_MAC0)
51556 +        FM_G_CALL_1G_MAC_ISR(0);
51557 +    if (pending & INTR_EN_1G_MAC1)
51558 +        FM_G_CALL_1G_MAC_ISR(1);
51559 +    if (pending & INTR_EN_1G_MAC2)
51560 +        FM_G_CALL_1G_MAC_ISR(2);
51561 +    if (pending & INTR_EN_1G_MAC3)
51562 +        FM_G_CALL_1G_MAC_ISR(3);
51563 +    if (pending & INTR_EN_1G_MAC4)
51564 +        FM_G_CALL_1G_MAC_ISR(4);
51565 +    if (pending & INTR_EN_1G_MAC5)
51566 +        FM_G_CALL_1G_MAC_ISR(5);
51567 +    if (pending & INTR_EN_1G_MAC6)
51568 +        FM_G_CALL_1G_MAC_ISR(6);
51569 +    if (pending & INTR_EN_1G_MAC7)
51570 +        FM_G_CALL_1G_MAC_ISR(7);
51571 +    if (pending & INTR_EN_10G_MAC0)
51572 +        FM_G_CALL_10G_MAC_ISR(0);
51573 +    if (pending & INTR_EN_10G_MAC1)
51574 +        FM_G_CALL_10G_MAC_ISR(1);
51575 +    if (pending & INTR_EN_TMR)
51576 +        p_Fm->intrMng[e_FM_EV_TMR].f_Isr(p_Fm->intrMng[e_FM_EV_TMR].h_SrcHandle);
51577 +}
51578 +
51579 +#if (DPAA_VERSION >= 11)
51580 +static t_Error SetVSPWindow(t_Handle  h_Fm,
51581 +                            uint8_t   hardwarePortId,
51582 +                            uint8_t   baseStorageProfile,
51583 +                            uint8_t   log2NumOfProfiles)
51584 +{
51585 +    t_Fm                    *p_Fm = (t_Fm *)h_Fm;
51586 +
51587 +    ASSERT_COND(h_Fm);
51588 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
51589 +
51590 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
51591 +        !p_Fm->p_FmBmiRegs &&
51592 +        p_Fm->h_IpcSessions[0])
51593 +    {
51594 +        t_FmIpcVspSetPortWindow fmIpcVspSetPortWindow;
51595 +        t_FmIpcMsg              msg;
51596 +        t_Error                 err = E_OK;
51597 +
51598 +        memset(&msg, 0, sizeof(msg));
51599 +        memset(&fmIpcVspSetPortWindow, 0, sizeof(t_FmIpcVspSetPortWindow));
51600 +        fmIpcVspSetPortWindow.hardwarePortId      = hardwarePortId;
51601 +        fmIpcVspSetPortWindow.baseStorageProfile  = baseStorageProfile;
51602 +        fmIpcVspSetPortWindow.log2NumOfProfiles   = log2NumOfProfiles;
51603 +        msg.msgId                                 = FM_VSP_SET_PORT_WINDOW;
51604 +        memcpy(msg.msgBody, &fmIpcVspSetPortWindow, sizeof(t_FmIpcVspSetPortWindow));
51605 +
51606 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
51607 +                                (uint8_t*)&msg,
51608 +                                sizeof(msg.msgId),
51609 +                                NULL,
51610 +                                NULL,
51611 +                                NULL,
51612 +                                NULL);
51613 +        if (err != E_OK)
51614 +            RETURN_ERROR(MINOR, err, NO_MSG);
51615 +        return E_OK;
51616 +    }
51617 +    else if (!p_Fm->p_FmBmiRegs)
51618 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
51619 +                     ("Either IPC or 'baseAddress' is required!"));
51620 +
51621 +    fman_set_vsp_window(p_Fm->p_FmBmiRegs,
51622 +                        hardwarePortId,
51623 +                        baseStorageProfile,
51624 +                        log2NumOfProfiles);
51625 +
51626 +    return E_OK;
51627 +}
51628 +
51629 +static uint8_t AllocVSPsForPartition(t_Handle  h_Fm, uint8_t base, uint8_t numOfProfiles, uint8_t guestId)
51630 +{
51631 +    t_Fm        *p_Fm = (t_Fm *)h_Fm;
51632 +    uint8_t     profilesFound = 0;
51633 +    int         i = 0;
51634 +    uint32_t    intFlags;
51635 +
51636 +    if (!numOfProfiles)
51637 +        return E_OK;
51638 +
51639 +    if ((numOfProfiles > FM_VSP_MAX_NUM_OF_ENTRIES) ||
51640 +        (base + numOfProfiles > FM_VSP_MAX_NUM_OF_ENTRIES))
51641 +        return (uint8_t)ILLEGAL_BASE;
51642 +
51643 +    if (p_Fm->h_IpcSessions[0])
51644 +    {
51645 +        t_FmIpcResourceAllocParams  ipcAllocParams;
51646 +        t_FmIpcMsg                  msg;
51647 +        t_FmIpcReply                reply;
51648 +        t_Error                     err;
51649 +        uint32_t                    replyLength;
51650 +
51651 +        memset(&msg, 0, sizeof(msg));
51652 +        memset(&reply, 0, sizeof(reply));
51653 +        memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
51654 +        ipcAllocParams.guestId         = p_Fm->guestId;
51655 +        ipcAllocParams.num             = p_Fm->partNumOfVSPs;
51656 +        ipcAllocParams.base            = p_Fm->partVSPBase;
51657 +        msg.msgId                              = FM_VSP_ALLOC;
51658 +        memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
51659 +        replyLength = sizeof(uint32_t) + sizeof(uint8_t);
51660 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
51661 +                                (uint8_t*)&msg,
51662 +                                sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
51663 +                                (uint8_t*)&reply,
51664 +                                &replyLength,
51665 +                                NULL,
51666 +                                NULL);
51667 +        if ((err != E_OK) ||
51668 +            (replyLength != (sizeof(uint32_t) + sizeof(uint8_t))))
51669 +            RETURN_ERROR(MAJOR, err, NO_MSG);
51670 +        else
51671 +            memcpy((uint8_t*)&p_Fm->partVSPBase, reply.replyBody, sizeof(uint8_t));
51672 +        if (p_Fm->partVSPBase == (uint8_t)(ILLEGAL_BASE))
51673 +            RETURN_ERROR(MAJOR, err, NO_MSG);
51674 +    }
51675 +    if (p_Fm->guestId != NCSW_MASTER_ID)
51676 +    {
51677 +        DBG(WARNING, ("FM Guest mode, without IPC - can't validate VSP range!"));
51678 +        return (uint8_t)ILLEGAL_BASE;
51679 +    }
51680 +
51681 +    intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
51682 +    for (i = base; i < base + numOfProfiles; i++)
51683 +        if (p_Fm->p_FmSp->profiles[i].profilesMng.ownerId == (uint8_t)ILLEGAL_BASE)
51684 +            profilesFound++;
51685 +        else
51686 +            break;
51687 +
51688 +    if (profilesFound == numOfProfiles)
51689 +        for (i = base; i<base + numOfProfiles; i++)
51690 +            p_Fm->p_FmSp->profiles[i].profilesMng.ownerId = guestId;
51691 +    else
51692 +    {
51693 +        XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
51694 +        return (uint8_t)ILLEGAL_BASE;
51695 +    }
51696 +    XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
51697 +
51698 +    return base;
51699 +}
51700 +
51701 +static void FreeVSPsForPartition(t_Handle  h_Fm, uint8_t base, uint8_t numOfProfiles, uint8_t guestId)
51702 +{
51703 +    t_Fm    *p_Fm = (t_Fm *)h_Fm;
51704 +    int     i = 0;
51705 +
51706 +    ASSERT_COND(p_Fm);
51707 +
51708 +    if (p_Fm->h_IpcSessions[0])
51709 +    {
51710 +        t_FmIpcResourceAllocParams  ipcAllocParams;
51711 +        t_FmIpcMsg                  msg;
51712 +        t_FmIpcReply                reply;
51713 +        uint32_t                    replyLength;
51714 +        t_Error                     err;
51715 +
51716 +        memset(&msg, 0, sizeof(msg));
51717 +        memset(&reply, 0, sizeof(reply));
51718 +        memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
51719 +        ipcAllocParams.guestId         = p_Fm->guestId;
51720 +        ipcAllocParams.num             = p_Fm->partNumOfVSPs;
51721 +        ipcAllocParams.base            = p_Fm->partVSPBase;
51722 +        msg.msgId                              = FM_VSP_FREE;
51723 +        memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
51724 +        replyLength = sizeof(uint32_t) + sizeof(uint8_t);
51725 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
51726 +                                (uint8_t*)&msg,
51727 +                                sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
51728 +                                (uint8_t*)&reply,
51729 +                                &replyLength,
51730 +                                NULL,
51731 +                                NULL);
51732 +        if (err != E_OK)
51733 +            REPORT_ERROR(MAJOR, err, NO_MSG);
51734 +        return;
51735 +    }
51736 +    if (p_Fm->guestId != NCSW_MASTER_ID)
51737 +    {
51738 +        DBG(WARNING, ("FM Guest mode, without IPC - can't validate VSP range!"));
51739 +        return;
51740 +    }
51741 +
51742 +    ASSERT_COND(p_Fm->p_FmSp);
51743 +
51744 +    for (i=base; i<numOfProfiles; i++)
51745 +    {
51746 +        if (p_Fm->p_FmSp->profiles[i].profilesMng.ownerId == guestId)
51747 +           p_Fm->p_FmSp->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
51748 +        else
51749 +            DBG(WARNING, ("Request for freeing storage profile window which wasn't allocated to this partition"));
51750 +    }
51751 +}
51752 +#endif /* (DPAA_VERSION >= 11) */
51753 +
51754 +static t_Error FmGuestHandleIpcMsgCB(t_Handle  h_Fm,
51755 +                                     uint8_t   *p_Msg,
51756 +                                     uint32_t  msgLength,
51757 +                                     uint8_t   *p_Reply,
51758 +                                     uint32_t  *p_ReplyLength)
51759 +{
51760 +    t_Fm            *p_Fm       = (t_Fm*)h_Fm;
51761 +    t_FmIpcMsg      *p_IpcMsg   = (t_FmIpcMsg*)p_Msg;
51762 +
51763 +    UNUSED(p_Reply);
51764 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
51765 +    SANITY_CHECK_RETURN_ERROR((msgLength > sizeof(uint32_t)), E_INVALID_VALUE);
51766 +
51767 +#ifdef DISABLE_SANITY_CHECKS
51768 +    UNUSED(msgLength);
51769 +#endif /* DISABLE_SANITY_CHECKS */
51770 +
51771 +    ASSERT_COND(p_Msg);
51772 +
51773 +    *p_ReplyLength = 0;
51774 +
51775 +    switch (p_IpcMsg->msgId)
51776 +    {
51777 +        case (FM_GUEST_ISR):
51778 +        {
51779 +            t_FmIpcIsr ipcIsr;
51780 +
51781 +            memcpy((uint8_t*)&ipcIsr, p_IpcMsg->msgBody, sizeof(t_FmIpcIsr));
51782 +            if (ipcIsr.boolErr)
51783 +                GuestErrorIsr(p_Fm, ipcIsr.pendingReg);
51784 +            else
51785 +                GuestEventIsr(p_Fm, ipcIsr.pendingReg);
51786 +            break;
51787 +        }
51788 +        default:
51789 +            *p_ReplyLength = 0;
51790 +            RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("command not found!!!"));
51791 +    }
51792 +    return E_OK;
51793 +}
51794 +
51795 +static t_Error FmHandleIpcMsgCB(t_Handle  h_Fm,
51796 +                                uint8_t   *p_Msg,
51797 +                                uint32_t  msgLength,
51798 +                                uint8_t   *p_Reply,
51799 +                                uint32_t  *p_ReplyLength)
51800 +{
51801 +    t_Error         err;
51802 +    t_Fm            *p_Fm       = (t_Fm*)h_Fm;
51803 +    t_FmIpcMsg      *p_IpcMsg   = (t_FmIpcMsg*)p_Msg;
51804 +    t_FmIpcReply    *p_IpcReply = (t_FmIpcReply*)p_Reply;
51805 +
51806 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
51807 +    SANITY_CHECK_RETURN_ERROR((msgLength >= sizeof(uint32_t)), E_INVALID_VALUE);
51808 +
51809 +#ifdef DISABLE_SANITY_CHECKS
51810 +    UNUSED(msgLength);
51811 +#endif /* DISABLE_SANITY_CHECKS */
51812 +
51813 +    ASSERT_COND(p_IpcMsg);
51814 +
51815 +    memset(p_IpcReply, 0, (sizeof(uint8_t) * FM_IPC_MAX_REPLY_SIZE));
51816 +    *p_ReplyLength = 0;
51817 +
51818 +    switch (p_IpcMsg->msgId)
51819 +    {
51820 +        case (FM_GET_SET_PORT_PARAMS):
51821 +        {
51822 +            t_FmIpcPortInInitParams         ipcInitParams;
51823 +            t_FmInterModulePortInitParams   initParams;
51824 +            t_FmIpcPortOutInitParams        ipcOutInitParams;
51825 +
51826 +            memcpy((uint8_t*)&ipcInitParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortInInitParams));
51827 +            initParams.hardwarePortId = ipcInitParams.hardwarePortId;
51828 +            initParams.portType = (e_FmPortType)ipcInitParams.enumPortType;
51829 +            initParams.independentMode = (bool)(ipcInitParams.boolIndependentMode);
51830 +            initParams.liodnOffset = ipcInitParams.liodnOffset;
51831 +            initParams.numOfTasks = ipcInitParams.numOfTasks;
51832 +            initParams.numOfExtraTasks = ipcInitParams.numOfExtraTasks;
51833 +            initParams.numOfOpenDmas = ipcInitParams.numOfOpenDmas;
51834 +            initParams.numOfExtraOpenDmas = ipcInitParams.numOfExtraOpenDmas;
51835 +            initParams.sizeOfFifo = ipcInitParams.sizeOfFifo;
51836 +            initParams.extraSizeOfFifo = ipcInitParams.extraSizeOfFifo;
51837 +            initParams.deqPipelineDepth = ipcInitParams.deqPipelineDepth;
51838 +            initParams.maxFrameLength = ipcInitParams.maxFrameLength;
51839 +            initParams.liodnBase = ipcInitParams.liodnBase;
51840 +
51841 +            p_IpcReply->error = (uint32_t)FmGetSetPortParams(h_Fm, &initParams);
51842 +
51843 +            ipcOutInitParams.ipcPhysAddr.high = initParams.fmMuramPhysBaseAddr.high;
51844 +            ipcOutInitParams.ipcPhysAddr.low = initParams.fmMuramPhysBaseAddr.low;
51845 +            ipcOutInitParams.sizeOfFifo = initParams.sizeOfFifo;
51846 +            ipcOutInitParams.extraSizeOfFifo = initParams.extraSizeOfFifo;
51847 +            ipcOutInitParams.numOfTasks = initParams.numOfTasks;
51848 +            ipcOutInitParams.numOfExtraTasks = initParams.numOfExtraTasks;
51849 +            ipcOutInitParams.numOfOpenDmas = initParams.numOfOpenDmas;
51850 +            ipcOutInitParams.numOfExtraOpenDmas = initParams.numOfExtraOpenDmas;
51851 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcOutInitParams, sizeof(ipcOutInitParams));
51852 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcPortOutInitParams);
51853 +            break;
51854 +        }
51855 +        case (FM_SET_SIZE_OF_FIFO):
51856 +        {
51857 +            t_FmIpcPortRsrcParams   ipcPortRsrcParams;
51858 +
51859 +            memcpy((uint8_t*)&ipcPortRsrcParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortRsrcParams));
51860 +            p_IpcReply->error = (uint32_t)FmSetSizeOfFifo(h_Fm,
51861 +                                                          ipcPortRsrcParams.hardwarePortId,
51862 +                                                          &ipcPortRsrcParams.val,
51863 +                                                          &ipcPortRsrcParams.extra,
51864 +                                                          (bool)ipcPortRsrcParams.boolInitialConfig);
51865 +            *p_ReplyLength = sizeof(uint32_t);
51866 +            break;
51867 +        }
51868 +        case (FM_SET_NUM_OF_TASKS):
51869 +        {
51870 +            t_FmIpcPortRsrcParams   ipcPortRsrcParams;
51871 +
51872 +            memcpy((uint8_t*)&ipcPortRsrcParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortRsrcParams));
51873 +            p_IpcReply->error = (uint32_t)FmSetNumOfTasks(h_Fm, ipcPortRsrcParams.hardwarePortId,
51874 +                                                          (uint8_t*)&ipcPortRsrcParams.val,
51875 +                                                          (uint8_t*)&ipcPortRsrcParams.extra,
51876 +                                                          (bool)ipcPortRsrcParams.boolInitialConfig);
51877 +            *p_ReplyLength = sizeof(uint32_t);
51878 +            break;
51879 +        }
51880 +        case (FM_SET_NUM_OF_OPEN_DMAS):
51881 +        {
51882 +            t_FmIpcPortRsrcParams   ipcPortRsrcParams;
51883 +
51884 +            memcpy((uint8_t*)&ipcPortRsrcParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortRsrcParams));
51885 +            p_IpcReply->error = (uint32_t)FmSetNumOfOpenDmas(h_Fm, ipcPortRsrcParams.hardwarePortId,
51886 +                                                               (uint8_t*)&ipcPortRsrcParams.val,
51887 +                                                               (uint8_t*)&ipcPortRsrcParams.extra,
51888 +                                                               (bool)ipcPortRsrcParams.boolInitialConfig);
51889 +            *p_ReplyLength = sizeof(uint32_t);
51890 +            break;
51891 +        }
51892 +        case (FM_RESUME_STALLED_PORT):
51893 +            *p_ReplyLength = sizeof(uint32_t);
51894 +            p_IpcReply->error = (uint32_t)FmResumeStalledPort(h_Fm, p_IpcMsg->msgBody[0]);
51895 +            break;
51896 +        case (FM_MASTER_IS_ALIVE):
51897 +        {
51898 +            uint8_t guestId = p_IpcMsg->msgBody[0];
51899 +            /* build the FM master partition IPC address */
51900 +            memset(p_Fm->fmIpcHandlerModuleName[guestId], 0, (sizeof(char)) * MODULE_NAME_SIZE);
51901 +            if (Sprint (p_Fm->fmIpcHandlerModuleName[guestId], "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, guestId) != (guestId<10 ? 6:7))
51902 +                RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
51903 +            p_Fm->h_IpcSessions[guestId] = XX_IpcInitSession(p_Fm->fmIpcHandlerModuleName[guestId], p_Fm->fmModuleName);
51904 +            if (p_Fm->h_IpcSessions[guestId] == NULL)
51905 +                RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("FM Master IPC session for guest %d", guestId));
51906 +            *(uint8_t*)(p_IpcReply->replyBody) = 1;
51907 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
51908 +            break;
51909 +        }
51910 +        case (FM_IS_PORT_STALLED):
51911 +        {
51912 +            bool tmp;
51913 +
51914 +            p_IpcReply->error = (uint32_t)FmIsPortStalled(h_Fm, p_IpcMsg->msgBody[0], &tmp);
51915 +            *(uint8_t*)(p_IpcReply->replyBody) = (uint8_t)tmp;
51916 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
51917 +            break;
51918 +        }
51919 +        case (FM_RESET_MAC):
51920 +        {
51921 +            t_FmIpcMacParams    ipcMacParams;
51922 +
51923 +            memcpy((uint8_t*)&ipcMacParams, p_IpcMsg->msgBody, sizeof(t_FmIpcMacParams));
51924 +            p_IpcReply->error = (uint32_t)FmResetMac(p_Fm,
51925 +                                                     (e_FmMacType)(ipcMacParams.enumType),
51926 +                                                     ipcMacParams.id);
51927 +            *p_ReplyLength = sizeof(uint32_t);
51928 +            break;
51929 +        }
51930 +        case (FM_SET_MAC_MAX_FRAME):
51931 +        {
51932 +            t_FmIpcMacMaxFrameParams    ipcMacMaxFrameParams;
51933 +
51934 +            memcpy((uint8_t*)&ipcMacMaxFrameParams, p_IpcMsg->msgBody, sizeof(t_FmIpcMacMaxFrameParams));
51935 +            err = FmSetMacMaxFrame(p_Fm,
51936 +                                  (e_FmMacType)(ipcMacMaxFrameParams.macParams.enumType),
51937 +                                  ipcMacMaxFrameParams.macParams.id,
51938 +                                  ipcMacMaxFrameParams.maxFrameLength);
51939 +            if (err != E_OK)
51940 +                REPORT_ERROR(MINOR, err, NO_MSG);
51941 +            break;
51942 +        }
51943 +#if (DPAA_VERSION >= 11)
51944 +        case (FM_VSP_ALLOC) :
51945 +        {
51946 +            t_FmIpcResourceAllocParams  ipcAllocParams;
51947 +            uint8_t                     vspBase;
51948 +            memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
51949 +            vspBase =  AllocVSPsForPartition(h_Fm, (uint8_t)ipcAllocParams.base, (uint8_t)ipcAllocParams.num, ipcAllocParams.guestId);
51950 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&vspBase, sizeof(uint8_t));
51951 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
51952 +            break;
51953 +        }
51954 +        case (FM_VSP_FREE) :
51955 +        {
51956 +            t_FmIpcResourceAllocParams   ipcAllocParams;
51957 +            memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
51958 +            FreeVSPsForPartition(h_Fm, (uint8_t)ipcAllocParams.base, (uint8_t)ipcAllocParams.num, ipcAllocParams.guestId);
51959 +            break;
51960 +        }
51961 +        case (FM_VSP_SET_PORT_WINDOW) :
51962 +        {
51963 +            t_FmIpcVspSetPortWindow   ipcVspSetPortWindow;
51964 +            memcpy(&ipcVspSetPortWindow, p_IpcMsg->msgBody, sizeof(t_FmIpcVspSetPortWindow));
51965 +            err = SetVSPWindow(h_Fm,
51966 +                                            ipcVspSetPortWindow.hardwarePortId,
51967 +                                            ipcVspSetPortWindow.baseStorageProfile,
51968 +                                            ipcVspSetPortWindow.log2NumOfProfiles);
51969 +            return err;
51970 +        }
51971 +        case (FM_SET_CONG_GRP_PFC_PRIO) :
51972 +        {
51973 +            t_FmIpcSetCongestionGroupPfcPriority    fmIpcSetCongestionGroupPfcPriority;
51974 +            memcpy(&fmIpcSetCongestionGroupPfcPriority, p_IpcMsg->msgBody, sizeof(t_FmIpcSetCongestionGroupPfcPriority));
51975 +            err = FmSetCongestionGroupPFCpriority(h_Fm,
51976 +                                                  fmIpcSetCongestionGroupPfcPriority.congestionGroupId,
51977 +                                                  fmIpcSetCongestionGroupPfcPriority.priorityBitMap);
51978 +            return err;
51979 +        }
51980 +#endif /* (DPAA_VERSION >= 11) */
51981 +
51982 +        case (FM_FREE_PORT):
51983 +        {
51984 +            t_FmInterModulePortFreeParams   portParams;
51985 +            t_FmIpcPortFreeParams           ipcPortParams;
51986 +
51987 +            memcpy((uint8_t*)&ipcPortParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortFreeParams));
51988 +            portParams.hardwarePortId = ipcPortParams.hardwarePortId;
51989 +            portParams.portType = (e_FmPortType)(ipcPortParams.enumPortType);
51990 +            portParams.deqPipelineDepth = ipcPortParams.deqPipelineDepth;
51991 +            FmFreePortParams(h_Fm, &portParams);
51992 +            break;
51993 +        }
51994 +        case (FM_REGISTER_INTR):
51995 +        {
51996 +            t_FmIpcRegisterIntr ipcRegIntr;
51997 +
51998 +            memcpy((uint8_t*)&ipcRegIntr, p_IpcMsg->msgBody, sizeof(ipcRegIntr));
51999 +            p_Fm->intrMng[ipcRegIntr.event].guestId = ipcRegIntr.guestId;
52000 +            break;
52001 +        }
52002 +        case (FM_GET_PARAMS):
52003 +        {
52004 +             t_FmIpcParams  ipcParams;
52005 +
52006 +            /* Get clock frequency */
52007 +            ipcParams.fmClkFreq = p_Fm->p_FmStateStruct->fmClkFreq;
52008 +            ipcParams.fmMacClkFreq = p_Fm->p_FmStateStruct->fmMacClkFreq;
52009 +
52010 +            fman_get_revision(p_Fm->p_FmFpmRegs,&ipcParams.majorRev,&ipcParams.minorRev);
52011 +
52012 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcParams, sizeof(t_FmIpcParams));
52013 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcParams);
52014 +             break;
52015 +        }
52016 +        case (FM_GET_FMAN_CTRL_CODE_REV):
52017 +        {
52018 +            t_FmCtrlCodeRevisionInfo        fmanCtrlRevInfo;
52019 +            t_FmIpcFmanCtrlCodeRevisionInfo ipcRevInfo;
52020 +
52021 +            p_IpcReply->error = (uint32_t)FM_GetFmanCtrlCodeRevision(h_Fm, &fmanCtrlRevInfo);
52022 +            ipcRevInfo.packageRev = fmanCtrlRevInfo.packageRev;
52023 +            ipcRevInfo.majorRev = fmanCtrlRevInfo.majorRev;
52024 +            ipcRevInfo.minorRev = fmanCtrlRevInfo.minorRev;
52025 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcRevInfo, sizeof(t_FmIpcFmanCtrlCodeRevisionInfo));
52026 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcFmanCtrlCodeRevisionInfo);
52027 +            break;
52028 +        }
52029 +
52030 +        case (FM_DMA_STAT):
52031 +        {
52032 +            t_FmDmaStatus       dmaStatus;
52033 +            t_FmIpcDmaStatus    ipcDmaStatus;
52034 +
52035 +            FM_GetDmaStatus(h_Fm, &dmaStatus);
52036 +            ipcDmaStatus.boolCmqNotEmpty = (uint8_t)dmaStatus.cmqNotEmpty;
52037 +            ipcDmaStatus.boolBusError = (uint8_t)dmaStatus.busError;
52038 +            ipcDmaStatus.boolReadBufEccError = (uint8_t)dmaStatus.readBufEccError;
52039 +            ipcDmaStatus.boolWriteBufEccSysError = (uint8_t)dmaStatus.writeBufEccSysError;
52040 +            ipcDmaStatus.boolWriteBufEccFmError = (uint8_t)dmaStatus.writeBufEccFmError;
52041 +            ipcDmaStatus.boolSinglePortEccError = (uint8_t)dmaStatus.singlePortEccError;
52042 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcDmaStatus, sizeof(t_FmIpcDmaStatus));
52043 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcDmaStatus);
52044 +            break;
52045 +        }
52046 +        case (FM_ALLOC_FMAN_CTRL_EVENT_REG):
52047 +            p_IpcReply->error = (uint32_t)FmAllocFmanCtrlEventReg(h_Fm, (uint8_t*)p_IpcReply->replyBody);
52048 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
52049 +            break;
52050 +        case (FM_FREE_FMAN_CTRL_EVENT_REG):
52051 +            FmFreeFmanCtrlEventReg(h_Fm, p_IpcMsg->msgBody[0]);
52052 +            break;
52053 +        case (FM_GET_TIMESTAMP_SCALE):
52054 +        {
52055 +            uint32_t    timeStamp = FmGetTimeStampScale(h_Fm);
52056 +
52057 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&timeStamp, sizeof(uint32_t));
52058 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
52059 +            break;
52060 +        }
52061 +        case (FM_GET_COUNTER):
52062 +        {
52063 +            e_FmCounters    inCounter;
52064 +            uint32_t        outCounter;
52065 +
52066 +            memcpy((uint8_t*)&inCounter, p_IpcMsg->msgBody, sizeof(uint32_t));
52067 +            outCounter = FM_GetCounter(h_Fm, inCounter);
52068 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&outCounter, sizeof(uint32_t));
52069 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
52070 +            break;
52071 +        }
52072 +        case (FM_SET_FMAN_CTRL_EVENTS_ENABLE):
52073 +        {
52074 +            t_FmIpcFmanEvents ipcFmanEvents;
52075 +
52076 +            memcpy((uint8_t*)&ipcFmanEvents, p_IpcMsg->msgBody, sizeof(t_FmIpcFmanEvents));
52077 +            FmSetFmanCtrlIntr(h_Fm,
52078 +                              ipcFmanEvents.eventRegId,
52079 +                              ipcFmanEvents.enableEvents);
52080 +            break;
52081 +        }
52082 +        case (FM_GET_FMAN_CTRL_EVENTS_ENABLE):
52083 +        {
52084 +            uint32_t    tmp = FmGetFmanCtrlIntr(h_Fm, p_IpcMsg->msgBody[0]);
52085 +
52086 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&tmp, sizeof(uint32_t));
52087 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
52088 +            break;
52089 +        }
52090 +        case (FM_GET_PHYS_MURAM_BASE):
52091 +        {
52092 +            t_FmPhysAddr        physAddr;
52093 +            t_FmIpcPhysAddr     ipcPhysAddr;
52094 +
52095 +            FmGetPhysicalMuramBase(h_Fm, &physAddr);
52096 +            ipcPhysAddr.high    = physAddr.high;
52097 +            ipcPhysAddr.low     = physAddr.low;
52098 +            memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcPhysAddr, sizeof(t_FmIpcPhysAddr));
52099 +            *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcPhysAddr);
52100 +            break;
52101 +        }
52102 +        case (FM_ENABLE_RAM_ECC):
52103 +        {
52104 +            if (((err = FM_EnableRamsEcc(h_Fm)) != E_OK) ||
52105 +                ((err = FM_SetException(h_Fm, e_FM_EX_IRAM_ECC, TRUE)) != E_OK) ||
52106 +                ((err = FM_SetException(h_Fm, e_FM_EX_MURAM_ECC, TRUE)) != E_OK))
52107 +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
52108 +                UNUSED(err);
52109 +#else
52110 +                REPORT_ERROR(MINOR, err, NO_MSG);
52111 +#endif /* (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0)) */
52112 +            break;
52113 +        }
52114 +        case (FM_DISABLE_RAM_ECC):
52115 +        {
52116 +
52117 +            if (((err = FM_SetException(h_Fm, e_FM_EX_IRAM_ECC, FALSE)) != E_OK) ||
52118 +                ((err = FM_SetException(h_Fm, e_FM_EX_MURAM_ECC, FALSE)) != E_OK) ||
52119 +                ((err = FM_DisableRamsEcc(h_Fm)) != E_OK))
52120 +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
52121 +                UNUSED(err);
52122 +#else
52123 +                REPORT_ERROR(MINOR, err, NO_MSG);
52124 +#endif /* (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0)) */
52125 +            break;
52126 +        }
52127 +        case (FM_SET_NUM_OF_FMAN_CTRL):
52128 +        {
52129 +            t_FmIpcPortNumOfFmanCtrls   ipcPortNumOfFmanCtrls;
52130 +
52131 +            memcpy((uint8_t*)&ipcPortNumOfFmanCtrls, p_IpcMsg->msgBody, sizeof(t_FmIpcPortNumOfFmanCtrls));
52132 +            err = FmSetNumOfRiscsPerPort(h_Fm,
52133 +                                         ipcPortNumOfFmanCtrls.hardwarePortId,
52134 +                                         ipcPortNumOfFmanCtrls.numOfFmanCtrls,
52135 +                                         ipcPortNumOfFmanCtrls.orFmanCtrl);
52136 +            if (err != E_OK)
52137 +                REPORT_ERROR(MINOR, err, NO_MSG);
52138 +            break;
52139 +        }
52140 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
52141 +        case (FM_10G_TX_ECC_WA):
52142 +            p_IpcReply->error = (uint32_t)Fm10GTxEccWorkaround(h_Fm, p_IpcMsg->msgBody[0]);
52143 +            *p_ReplyLength = sizeof(uint32_t);
52144 +            break;
52145 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
52146 +        default:
52147 +            *p_ReplyLength = 0;
52148 +            RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("command not found!!!"));
52149 +    }
52150 +    return E_OK;
52151 +}
52152 +
52153 +
52154 +/****************************************/
52155 +/*       Inter-Module functions         */
52156 +/****************************************/
52157 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
52158 +t_Error Fm10GTxEccWorkaround(t_Handle h_Fm, uint8_t macId)
52159 +{
52160 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
52161 +    t_Error         err = E_OK;
52162 +    t_FmIpcMsg      msg;
52163 +    t_FmIpcReply    reply;
52164 +    uint32_t        replyLength;
52165 +    uint8_t         rxHardwarePortId, txHardwarePortId;
52166 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
52167 +
52168 +    if (p_Fm->guestId != NCSW_MASTER_ID)
52169 +    {
52170 +        memset(&msg, 0, sizeof(msg));
52171 +        memset(&reply, 0, sizeof(reply));
52172 +        msg.msgId = FM_10G_TX_ECC_WA;
52173 +        msg.msgBody[0] = macId;
52174 +        replyLength = sizeof(uint32_t);
52175 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52176 +                                     (uint8_t*)&msg,
52177 +                                     sizeof(msg.msgId)+sizeof(macId),
52178 +                                     (uint8_t*)&reply,
52179 +                                     &replyLength,
52180 +                                     NULL,
52181 +                                     NULL)) != E_OK)
52182 +            RETURN_ERROR(MINOR, err, NO_MSG);
52183 +        if (replyLength != sizeof(uint32_t))
52184 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
52185 +        return (t_Error)(reply.error);
52186 +    }
52187 +
52188 +    SANITY_CHECK_RETURN_ERROR((macId == 0), E_NOT_SUPPORTED);
52189 +    SANITY_CHECK_RETURN_ERROR(IsFmanCtrlCodeLoaded(p_Fm), E_INVALID_STATE);
52190 +
52191 +    rxHardwarePortId = SwPortIdToHwPortId(e_FM_PORT_TYPE_RX_10G,
52192 +                                    macId,
52193 +                                    p_Fm->p_FmStateStruct->revInfo.majorRev,
52194 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
52195 +    txHardwarePortId = SwPortIdToHwPortId(e_FM_PORT_TYPE_TX_10G,
52196 +                                    macId,
52197 +                                    p_Fm->p_FmStateStruct->revInfo.majorRev,
52198 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
52199 +    if ((p_Fm->p_FmStateStruct->portsTypes[rxHardwarePortId] != e_FM_PORT_TYPE_DUMMY) ||
52200 +        (p_Fm->p_FmStateStruct->portsTypes[txHardwarePortId] != e_FM_PORT_TYPE_DUMMY))
52201 +        RETURN_ERROR(MAJOR, E_INVALID_STATE,
52202 +                     ("MAC should be initialized prior to Rx and Tx ports!"));
52203 +
52204 +    return fman_set_erratum_10gmac_a004_wa(fpm_rg);
52205 +}
52206 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
52207 +
52208 +uint16_t FmGetTnumAgingPeriod(t_Handle h_Fm)
52209 +{
52210 +    t_Fm *p_Fm = (t_Fm *)h_Fm;
52211 +
52212 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
52213 +    SANITY_CHECK_RETURN_VALUE(!p_Fm->p_FmDriverParam, E_INVALID_STATE, 0);
52214 +
52215 +    return p_Fm->tnumAgingPeriod;
52216 +}
52217 +
52218 +t_Error FmSetPortPreFetchConfiguration(t_Handle h_Fm,
52219 +                                       uint8_t  portNum,
52220 +                                       bool     preFetchConfigured)
52221 +{
52222 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
52223 +
52224 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52225 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
52226 +
52227 +    p_Fm->portsPreFetchConfigured[portNum] = TRUE;
52228 +    p_Fm->portsPreFetchValue[portNum] = preFetchConfigured;
52229 +
52230 +    return E_OK;
52231 +}
52232 +
52233 +t_Error FmGetPortPreFetchConfiguration(t_Handle h_Fm,
52234 +                                       uint8_t  portNum,
52235 +                                       bool     *p_PortConfigured,
52236 +                                       bool     *p_PreFetchConfigured)
52237 +{
52238 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
52239 +
52240 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52241 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
52242 +
52243 +    /* If the prefetch wasn't configured yet (not enable or disabled)
52244 +       we return the value TRUE as it was already configured */
52245 +    if (!p_Fm->portsPreFetchConfigured[portNum])
52246 +    {
52247 +        *p_PortConfigured = FALSE;
52248 +        *p_PreFetchConfigured = FALSE;
52249 +    }
52250 +    else
52251 +    {
52252 +        *p_PortConfigured = TRUE;
52253 +        *p_PreFetchConfigured = (p_Fm->portsPreFetchConfigured[portNum]);
52254 +    }
52255 +
52256 +    return E_OK;
52257 +}
52258 +
52259 +t_Error FmSetCongestionGroupPFCpriority(t_Handle    h_Fm,
52260 +                                        uint32_t    congestionGroupId,
52261 +                                        uint8_t     priorityBitMap)
52262 +{
52263 +    t_Fm    *p_Fm  = (t_Fm *)h_Fm;
52264 +    uint32_t regNum;
52265 +
52266 +    ASSERT_COND(h_Fm);
52267 +
52268 +    if (congestionGroupId > FM_PORT_NUM_OF_CONGESTION_GRPS)
52269 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
52270 +                     ("Congestion group ID bigger than %d",
52271 +                      FM_PORT_NUM_OF_CONGESTION_GRPS));
52272 +
52273 +    if (p_Fm->guestId == NCSW_MASTER_ID)
52274 +    {
52275 +        ASSERT_COND(p_Fm->baseAddr);
52276 +        regNum = (FM_PORT_NUM_OF_CONGESTION_GRPS - 1 - congestionGroupId) / 4;
52277 +        fman_set_congestion_group_pfc_priority((uint32_t *)((p_Fm->baseAddr+FM_MM_CGP)),
52278 +                                               congestionGroupId,
52279 +                                               priorityBitMap,
52280 +                                               regNum);
52281 +    }
52282 +    else if (p_Fm->h_IpcSessions[0])
52283 +    {
52284 +        t_Error                              err;
52285 +        t_FmIpcMsg                           msg;
52286 +        t_FmIpcSetCongestionGroupPfcPriority fmIpcSetCongestionGroupPfcPriority;
52287 +
52288 +        memset(&msg, 0, sizeof(msg));
52289 +        memset(&fmIpcSetCongestionGroupPfcPriority, 0, sizeof(t_FmIpcSetCongestionGroupPfcPriority));
52290 +        fmIpcSetCongestionGroupPfcPriority.congestionGroupId = congestionGroupId;
52291 +        fmIpcSetCongestionGroupPfcPriority.priorityBitMap    = priorityBitMap;
52292 +
52293 +        msg.msgId = FM_SET_CONG_GRP_PFC_PRIO;
52294 +        memcpy(msg.msgBody, &fmIpcSetCongestionGroupPfcPriority, sizeof(t_FmIpcSetCongestionGroupPfcPriority));
52295 +
52296 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52297 +                                (uint8_t*)&msg,
52298 +                                sizeof(msg.msgId),
52299 +                                NULL,
52300 +                                NULL,
52301 +                                NULL,
52302 +                                NULL);
52303 +        if (err != E_OK)
52304 +            RETURN_ERROR(MINOR, err, NO_MSG);
52305 +    }
52306 +    else
52307 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("guest without IPC!"));
52308 +
52309 +    return E_OK;
52310 +}
52311 +
52312 +uintptr_t FmGetPcdPrsBaseAddr(t_Handle h_Fm)
52313 +{
52314 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52315 +
52316 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
52317 +
52318 +    if (!p_Fm->baseAddr)
52319 +    {
52320 +        REPORT_ERROR(MAJOR, E_INVALID_STATE,
52321 +                     ("No base-addr; probably Guest with IPC!"));
52322 +        return 0;
52323 +    }
52324 +
52325 +    return (p_Fm->baseAddr + FM_MM_PRS);
52326 +}
52327 +
52328 +uintptr_t FmGetPcdKgBaseAddr(t_Handle h_Fm)
52329 +{
52330 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52331 +
52332 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
52333 +
52334 +    if (!p_Fm->baseAddr)
52335 +    {
52336 +        REPORT_ERROR(MAJOR, E_INVALID_STATE,
52337 +                     ("No base-addr; probably Guest with IPC!"));
52338 +        return 0;
52339 +    }
52340 +
52341 +    return (p_Fm->baseAddr + FM_MM_KG);
52342 +}
52343 +
52344 +uintptr_t FmGetPcdPlcrBaseAddr(t_Handle h_Fm)
52345 +{
52346 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52347 +
52348 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
52349 +
52350 +    if (!p_Fm->baseAddr)
52351 +    {
52352 +        REPORT_ERROR(MAJOR, E_INVALID_STATE,
52353 +                     ("No base-addr; probably Guest with IPC!"));
52354 +        return 0;
52355 +    }
52356 +
52357 +    return (p_Fm->baseAddr + FM_MM_PLCR);
52358 +}
52359 +
52360 +#if (DPAA_VERSION >= 11)
52361 +uintptr_t FmGetVSPBaseAddr(t_Handle h_Fm)
52362 +{
52363 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52364 +
52365 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
52366 +
52367 +    return p_Fm->vspBaseAddr;
52368 +}
52369 +#endif /* (DPAA_VERSION >= 11) */
52370 +
52371 +t_Handle FmGetMuramHandle(t_Handle h_Fm)
52372 +{
52373 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52374 +
52375 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, NULL);
52376 +
52377 +    return (p_Fm->h_FmMuram);
52378 +}
52379 +
52380 +void FmGetPhysicalMuramBase(t_Handle h_Fm, t_FmPhysAddr *p_FmPhysAddr)
52381 +{
52382 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
52383 +
52384 +    if (p_Fm->fmMuramPhysBaseAddr)
52385 +    {
52386 +        /* General FM driver initialization */
52387 +        p_FmPhysAddr->low = (uint32_t)p_Fm->fmMuramPhysBaseAddr;
52388 +        p_FmPhysAddr->high = (uint8_t)((p_Fm->fmMuramPhysBaseAddr & 0x000000ff00000000LL) >> 32);
52389 +        return;
52390 +    }
52391 +
52392 +    ASSERT_COND(p_Fm->guestId != NCSW_MASTER_ID);
52393 +
52394 +    if (p_Fm->h_IpcSessions[0])
52395 +    {
52396 +        t_Error         err;
52397 +        t_FmIpcMsg      msg;
52398 +        t_FmIpcReply    reply;
52399 +        uint32_t        replyLength;
52400 +        t_FmIpcPhysAddr ipcPhysAddr;
52401 +
52402 +        memset(&msg, 0, sizeof(msg));
52403 +        memset(&reply, 0, sizeof(reply));
52404 +        msg.msgId = FM_GET_PHYS_MURAM_BASE;
52405 +        replyLength = sizeof(uint32_t) + sizeof(t_FmPhysAddr);
52406 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52407 +                                (uint8_t*)&msg,
52408 +                                sizeof(msg.msgId),
52409 +                                (uint8_t*)&reply,
52410 +                                &replyLength,
52411 +                                NULL,
52412 +                                NULL);
52413 +        if (err != E_OK)
52414 +        {
52415 +            REPORT_ERROR(MINOR, err, NO_MSG);
52416 +            return;
52417 +        }
52418 +        if (replyLength != (sizeof(uint32_t) + sizeof(t_FmPhysAddr)))
52419 +        {
52420 +            REPORT_ERROR(MINOR, E_INVALID_VALUE,("IPC reply length mismatch"));
52421 +            return;
52422 +        }
52423 +        memcpy((uint8_t*)&ipcPhysAddr, reply.replyBody, sizeof(t_FmIpcPhysAddr));
52424 +        p_FmPhysAddr->high = ipcPhysAddr.high;
52425 +        p_FmPhysAddr->low  = ipcPhysAddr.low;
52426 +    }
52427 +    else
52428 +        REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
52429 +                     ("running in guest-mode without neither IPC nor mapped register!"));
52430 +}
52431 +
52432 +#if (DPAA_VERSION >= 11)
52433 +t_Error FmVSPAllocForPort (t_Handle        h_Fm,
52434 +                           e_FmPortType    portType,
52435 +                           uint8_t         portId,
52436 +                           uint8_t         numOfVSPs)
52437 +{
52438 +    t_Fm           *p_Fm = (t_Fm *)h_Fm;
52439 +    t_Error        err = E_OK;
52440 +    uint32_t       profilesFound, intFlags;
52441 +    uint8_t        first, i;
52442 +    uint8_t        log2Num;
52443 +    uint8_t        swPortIndex=0, hardwarePortId;
52444 +
52445 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52446 +
52447 +     if (!numOfVSPs)
52448 +        return E_OK;
52449 +
52450 +    if (numOfVSPs > FM_VSP_MAX_NUM_OF_ENTRIES)
52451 +        RETURN_ERROR(MINOR, E_INVALID_VALUE, ("numProfiles can not be bigger than %d.",FM_VSP_MAX_NUM_OF_ENTRIES));
52452 +
52453 +    if (!POWER_OF_2(numOfVSPs))
52454 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numProfiles must be a power of 2."));
52455 +
52456 +    LOG2((uint64_t)numOfVSPs, log2Num);
52457 +
52458 +    if ((log2Num == 0) || (p_Fm->partVSPBase == 0))
52459 +        first = 0;
52460 +    else
52461 +        first = 1<<log2Num;
52462 +
52463 +    if (first > (p_Fm->partVSPBase + p_Fm->partNumOfVSPs))
52464 +         RETURN_ERROR(MINOR, E_INVALID_VALUE, ("can not allocate storage profile port window"));
52465 +
52466 +    if (first < p_Fm->partVSPBase)
52467 +        while (first < p_Fm->partVSPBase)
52468 +            first = first + numOfVSPs;
52469 +
52470 +    if ((first + numOfVSPs) > (p_Fm->partVSPBase + p_Fm->partNumOfVSPs))
52471 +        RETURN_ERROR(MINOR, E_INVALID_VALUE, ("can not allocate storage profile port window"));
52472 +
52473 +    intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
52474 +    profilesFound = 0;
52475 +    for (i=first; i < p_Fm->partVSPBase + p_Fm->partNumOfVSPs; )
52476 +    {
52477 +        if (!p_Fm->p_FmSp->profiles[i].profilesMng.allocated)
52478 +        {
52479 +            profilesFound++;
52480 +            i++;
52481 +            if (profilesFound == numOfVSPs)
52482 +                break;
52483 +        }
52484 +        else
52485 +        {
52486 +            profilesFound = 0;
52487 +            /* advance i to the next aligned address */
52488 +            first = i = (uint8_t)(first + numOfVSPs);
52489 +        }
52490 +    }
52491 +    if (profilesFound == numOfVSPs)
52492 +        for (i = first; i<first + numOfVSPs; i++)
52493 +            p_Fm->p_FmSp->profiles[i].profilesMng.allocated = TRUE;
52494 +    else
52495 +    {
52496 +        XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
52497 +        RETURN_ERROR(MINOR, E_FULL, ("No profiles."));
52498 +    }
52499 +
52500 +    hardwarePortId = SwPortIdToHwPortId(portType,
52501 +                                    portId,
52502 +                                    p_Fm->p_FmStateStruct->revInfo.majorRev,
52503 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
52504 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
52505 +
52506 +    p_Fm->p_FmSp->portsMapping[swPortIndex].numOfProfiles = numOfVSPs;
52507 +    p_Fm->p_FmSp->portsMapping[swPortIndex].profilesBase = first;
52508 +
52509 +    if ((err = SetVSPWindow(h_Fm,hardwarePortId, first,log2Num)) != E_OK)
52510 +        for (i = first; i < first + numOfVSPs; i++)
52511 +            p_Fm->p_FmSp->profiles[i].profilesMng.allocated = FALSE;
52512 +
52513 +    XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
52514 +
52515 +    return err;
52516 +}
52517 +
52518 +t_Error FmVSPFreeForPort(t_Handle        h_Fm,
52519 +                         e_FmPortType    portType,
52520 +                         uint8_t         portId)
52521 +{
52522 +    t_Fm            *p_Fm = (t_Fm *)h_Fm;
52523 +    uint8_t         swPortIndex=0, hardwarePortId, first, numOfVSPs, i;
52524 +    uint32_t        intFlags;
52525 +
52526 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52527 +
52528 +    hardwarePortId = SwPortIdToHwPortId(portType,
52529 +                                    portId,
52530 +                                    p_Fm->p_FmStateStruct->revInfo.majorRev,
52531 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
52532 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
52533 +
52534 +    numOfVSPs = (uint8_t)p_Fm->p_FmSp->portsMapping[swPortIndex].numOfProfiles;
52535 +    first = (uint8_t)p_Fm->p_FmSp->portsMapping[swPortIndex].profilesBase;
52536 +
52537 +    intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
52538 +    for (i = first; i < first + numOfVSPs; i++)
52539 +           p_Fm->p_FmSp->profiles[i].profilesMng.allocated = FALSE;
52540 +    XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
52541 +
52542 +    p_Fm->p_FmSp->portsMapping[swPortIndex].numOfProfiles = 0;
52543 +    p_Fm->p_FmSp->portsMapping[swPortIndex].profilesBase = 0;
52544 +
52545 +    return E_OK;
52546 +}
52547 +#endif /* (DPAA_VERSION >= 11) */
52548 +
52549 +t_Error FmAllocFmanCtrlEventReg(t_Handle h_Fm, uint8_t *p_EventId)
52550 +{
52551 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
52552 +    uint8_t         i;
52553 +
52554 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52555 +
52556 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
52557 +        p_Fm->h_IpcSessions[0])
52558 +    {
52559 +        t_Error         err;
52560 +        t_FmIpcMsg      msg;
52561 +        t_FmIpcReply    reply;
52562 +        uint32_t        replyLength;
52563 +
52564 +        memset(&msg, 0, sizeof(msg));
52565 +        memset(&reply, 0, sizeof(reply));
52566 +        msg.msgId = FM_ALLOC_FMAN_CTRL_EVENT_REG;
52567 +        replyLength = sizeof(uint32_t) + sizeof(uint8_t);
52568 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52569 +                                     (uint8_t*)&msg,
52570 +                                     sizeof(msg.msgId),
52571 +                                     (uint8_t*)&reply,
52572 +                                     &replyLength,
52573 +                                     NULL,
52574 +                                     NULL)) != E_OK)
52575 +            RETURN_ERROR(MAJOR, err, NO_MSG);
52576 +
52577 +        if (replyLength != (sizeof(uint32_t) + sizeof(uint8_t)))
52578 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
52579 +
52580 +        *p_EventId = *(uint8_t*)(reply.replyBody);
52581 +
52582 +        return (t_Error)(reply.error);
52583 +    }
52584 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
52585 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
52586 +                     ("running in guest-mode without IPC!"));
52587 +
52588 +    for (i=0;i<FM_NUM_OF_FMAN_CTRL_EVENT_REGS;i++)
52589 +        if (!p_Fm->usedEventRegs[i])
52590 +        {
52591 +            p_Fm->usedEventRegs[i] = TRUE;
52592 +            *p_EventId = i;
52593 +            break;
52594 +        }
52595 +
52596 +    if (i==FM_NUM_OF_FMAN_CTRL_EVENT_REGS)
52597 +        RETURN_ERROR(MAJOR, E_BUSY, ("No resource - FMan controller event register."));
52598 +
52599 +    return E_OK;
52600 +}
52601 +
52602 +void FmFreeFmanCtrlEventReg(t_Handle h_Fm, uint8_t eventId)
52603 +{
52604 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52605 +
52606 +    SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
52607 +
52608 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
52609 +        p_Fm->h_IpcSessions[0])
52610 +    {
52611 +        t_Error     err;
52612 +        t_FmIpcMsg  msg;
52613 +
52614 +        memset(&msg, 0, sizeof(msg));
52615 +        msg.msgId = FM_FREE_FMAN_CTRL_EVENT_REG;
52616 +        msg.msgBody[0] = eventId;
52617 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52618 +                                (uint8_t*)&msg,
52619 +                                sizeof(msg.msgId)+sizeof(eventId),
52620 +                                NULL,
52621 +                                NULL,
52622 +                                NULL,
52623 +                                NULL);
52624 +        if (err != E_OK)
52625 +            REPORT_ERROR(MINOR, err, NO_MSG);
52626 +        return;
52627 +    }
52628 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
52629 +    {
52630 +        REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
52631 +                     ("running in guest-mode without IPC!"));
52632 +        return;
52633 +    }
52634 +
52635 +    ((t_Fm*)h_Fm)->usedEventRegs[eventId] = FALSE;
52636 +}
52637 +
52638 +void FmSetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, uint32_t enableEvents)
52639 +{
52640 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
52641 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
52642 +
52643 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
52644 +        !p_Fm->p_FmFpmRegs &&
52645 +        p_Fm->h_IpcSessions[0])
52646 +    {
52647 +        t_FmIpcFmanEvents   fmanCtrl;
52648 +        t_Error             err;
52649 +        t_FmIpcMsg          msg;
52650 +
52651 +        fmanCtrl.eventRegId = eventRegId;
52652 +        fmanCtrl.enableEvents = enableEvents;
52653 +        memset(&msg, 0, sizeof(msg));
52654 +        msg.msgId = FM_SET_FMAN_CTRL_EVENTS_ENABLE;
52655 +        memcpy(msg.msgBody, &fmanCtrl, sizeof(fmanCtrl));
52656 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52657 +                                (uint8_t*)&msg,
52658 +                                sizeof(msg.msgId)+sizeof(fmanCtrl),
52659 +                                NULL,
52660 +                                NULL,
52661 +                                NULL,
52662 +                                NULL);
52663 +        if (err != E_OK)
52664 +            REPORT_ERROR(MINOR, err, NO_MSG);
52665 +        return;
52666 +    }
52667 +    else if (!p_Fm->p_FmFpmRegs)
52668 +    {
52669 +        REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
52670 +                     ("Either IPC or 'baseAddress' is required!"));
52671 +        return;
52672 +    }
52673 +
52674 +    ASSERT_COND(eventRegId < FM_NUM_OF_FMAN_CTRL_EVENT_REGS);
52675 +    fman_set_ctrl_intr(fpm_rg, eventRegId, enableEvents);
52676 +}
52677 +
52678 +uint32_t FmGetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId)
52679 +{
52680 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
52681 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
52682 +
52683 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
52684 +        !p_Fm->p_FmFpmRegs &&
52685 +        p_Fm->h_IpcSessions[0])
52686 +    {
52687 +        t_Error         err;
52688 +        t_FmIpcMsg      msg;
52689 +        t_FmIpcReply    reply;
52690 +        uint32_t        replyLength, ctrlIntr;
52691 +
52692 +        memset(&msg, 0, sizeof(msg));
52693 +        memset(&reply, 0, sizeof(reply));
52694 +        msg.msgId = FM_GET_FMAN_CTRL_EVENTS_ENABLE;
52695 +        msg.msgBody[0] = eventRegId;
52696 +        replyLength = sizeof(uint32_t) + sizeof(uint32_t);
52697 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52698 +                                (uint8_t*)&msg,
52699 +                                sizeof(msg.msgId)+sizeof(eventRegId),
52700 +                                (uint8_t*)&reply,
52701 +                                &replyLength,
52702 +                                NULL,
52703 +                                NULL);
52704 +        if (err != E_OK)
52705 +        {
52706 +            REPORT_ERROR(MINOR, err, NO_MSG);
52707 +            return 0;
52708 +        }
52709 +        if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
52710 +        {
52711 +            REPORT_ERROR(MINOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
52712 +            return 0;
52713 +        }
52714 +        memcpy((uint8_t*)&ctrlIntr, reply.replyBody, sizeof(uint32_t));
52715 +        return ctrlIntr;
52716 +    }
52717 +    else if (!p_Fm->p_FmFpmRegs)
52718 +    {
52719 +        REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
52720 +                     ("Either IPC or 'baseAddress' is required!"));
52721 +        return 0;
52722 +    }
52723 +
52724 +    return fman_get_ctrl_intr(fpm_rg, eventRegId);
52725 +}
52726 +
52727 +void FmRegisterIntr(t_Handle                h_Fm,
52728 +                    e_FmEventModules        module,
52729 +                    uint8_t                 modId,
52730 +                    e_FmIntrType            intrType,
52731 +                    void                    (*f_Isr) (t_Handle h_Arg),
52732 +                    t_Handle                h_Arg)
52733 +{
52734 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
52735 +    int                 event = 0;
52736 +
52737 +    ASSERT_COND(h_Fm);
52738 +
52739 +    GET_FM_MODULE_EVENT(module, modId, intrType, event);
52740 +    ASSERT_COND(event < e_FM_EV_DUMMY_LAST);
52741 +
52742 +    /* register in local FM structure */
52743 +    p_Fm->intrMng[event].f_Isr = f_Isr;
52744 +    p_Fm->intrMng[event].h_SrcHandle = h_Arg;
52745 +
52746 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
52747 +        p_Fm->h_IpcSessions[0])
52748 +    {
52749 +        t_FmIpcRegisterIntr fmIpcRegisterIntr;
52750 +        t_Error             err;
52751 +        t_FmIpcMsg          msg;
52752 +
52753 +        /* register in Master FM structure */
52754 +        fmIpcRegisterIntr.event = (uint32_t)event;
52755 +        fmIpcRegisterIntr.guestId = p_Fm->guestId;
52756 +        memset(&msg, 0, sizeof(msg));
52757 +        msg.msgId = FM_REGISTER_INTR;
52758 +        memcpy(msg.msgBody, &fmIpcRegisterIntr, sizeof(fmIpcRegisterIntr));
52759 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52760 +                                (uint8_t*)&msg,
52761 +                                sizeof(msg.msgId) + sizeof(fmIpcRegisterIntr),
52762 +                                NULL,
52763 +                                NULL,
52764 +                                NULL,
52765 +                                NULL);
52766 +        if (err != E_OK)
52767 +            REPORT_ERROR(MINOR, err, NO_MSG);
52768 +    }
52769 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
52770 +        REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
52771 +                     ("running in guest-mode without IPC!"));
52772 +}
52773 +
52774 +void FmUnregisterIntr(t_Handle                  h_Fm,
52775 +                        e_FmEventModules        module,
52776 +                        uint8_t                 modId,
52777 +                        e_FmIntrType            intrType)
52778 +{
52779 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
52780 +    int         event = 0;
52781 +
52782 +    ASSERT_COND(h_Fm);
52783 +
52784 +    GET_FM_MODULE_EVENT(module, modId,intrType, event);
52785 +    ASSERT_COND(event < e_FM_EV_DUMMY_LAST);
52786 +
52787 +    p_Fm->intrMng[event].f_Isr = UnimplementedIsr;
52788 +    p_Fm->intrMng[event].h_SrcHandle = NULL;
52789 +}
52790 +
52791 +void  FmRegisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Arg, uint32_t event), t_Handle    h_Arg)
52792 +{
52793 +    t_Fm       *p_Fm = (t_Fm*)h_Fm;
52794 +
52795 +    ASSERT_COND(eventRegId<FM_NUM_OF_FMAN_CTRL_EVENT_REGS);
52796 +
52797 +    if (p_Fm->guestId != NCSW_MASTER_ID)
52798 +    {
52799 +        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM in guest-mode"));
52800 +        return;
52801 +    }
52802 +
52803 +    p_Fm->fmanCtrlIntr[eventRegId].f_Isr = f_Isr;
52804 +    p_Fm->fmanCtrlIntr[eventRegId].h_SrcHandle = h_Arg;
52805 +}
52806 +
52807 +void  FmUnregisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId)
52808 +{
52809 +    t_Fm       *p_Fm = (t_Fm*)h_Fm;
52810 +
52811 +    ASSERT_COND(eventRegId<FM_NUM_OF_FMAN_CTRL_EVENT_REGS);
52812 +
52813 +    if (p_Fm->guestId != NCSW_MASTER_ID)
52814 +    {
52815 +        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM in guest-mode"));
52816 +        return;
52817 +    }
52818 +
52819 +    p_Fm->fmanCtrlIntr[eventRegId].f_Isr = UnimplementedFmanCtrlIsr;
52820 +    p_Fm->fmanCtrlIntr[eventRegId].h_SrcHandle = NULL;
52821 +}
52822 +
52823 +void  FmRegisterPcd(t_Handle h_Fm, t_Handle h_FmPcd)
52824 +{
52825 +    t_Fm       *p_Fm = (t_Fm*)h_Fm;
52826 +
52827 +    if (p_Fm->h_Pcd)
52828 +        REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("PCD already set"));
52829 +
52830 +    p_Fm->h_Pcd = h_FmPcd;
52831 +}
52832 +
52833 +void  FmUnregisterPcd(t_Handle h_Fm)
52834 +{
52835 +    t_Fm       *p_Fm = (t_Fm*)h_Fm;
52836 +
52837 +    if (!p_Fm->h_Pcd)
52838 +        REPORT_ERROR(MAJOR, E_NOT_FOUND, ("PCD handle!"));
52839 +
52840 +    p_Fm->h_Pcd = NULL;
52841 +}
52842 +
52843 +t_Handle FmGetPcdHandle(t_Handle h_Fm)
52844 +{
52845 +    t_Fm       *p_Fm = (t_Fm*)h_Fm;
52846 +
52847 +    return p_Fm->h_Pcd;
52848 +}
52849 +
52850 +uint8_t FmGetId(t_Handle h_Fm)
52851 +{
52852 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
52853 +
52854 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0xff);
52855 +
52856 +    return p_Fm->p_FmStateStruct->fmId;
52857 +}
52858 +
52859 +t_Error FmReset(t_Handle h_Fm)
52860 +{
52861 +       t_Fm *p_Fm = (t_Fm*)h_Fm;
52862 +
52863 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52864 +
52865 +    WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rstc, FPM_RSTC_FM_RESET);
52866 +    CORE_MemoryBarrier();
52867 +    XX_UDelay(100);
52868 +
52869 +    return E_OK;
52870 +}
52871 +
52872 +t_Error FmSetNumOfRiscsPerPort(t_Handle     h_Fm,
52873 +                               uint8_t      hardwarePortId,
52874 +                               uint8_t      numOfFmanCtrls,
52875 +                               t_FmFmanCtrl orFmanCtrl)
52876 +{
52877 +
52878 +    t_Fm                        *p_Fm = (t_Fm*)h_Fm;
52879 +    struct fman_fpm_regs *fpm_rg;
52880 +
52881 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
52882 +    SANITY_CHECK_RETURN_ERROR(((numOfFmanCtrls > 0) && (numOfFmanCtrls < 3)) , E_INVALID_HANDLE);
52883 +
52884 +    fpm_rg = p_Fm->p_FmFpmRegs;
52885 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
52886 +        !p_Fm->p_FmFpmRegs &&
52887 +        p_Fm->h_IpcSessions[0])
52888 +    {
52889 +        t_Error                     err;
52890 +        t_FmIpcPortNumOfFmanCtrls   params;
52891 +        t_FmIpcMsg                  msg;
52892 +
52893 +        memset(&msg, 0, sizeof(msg));
52894 +        params.hardwarePortId = hardwarePortId;
52895 +        params.numOfFmanCtrls = numOfFmanCtrls;
52896 +        params.orFmanCtrl = orFmanCtrl;
52897 +        msg.msgId = FM_SET_NUM_OF_FMAN_CTRL;
52898 +        memcpy(msg.msgBody, &params, sizeof(params));
52899 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52900 +                                (uint8_t*)&msg,
52901 +                                sizeof(msg.msgId) +sizeof(params),
52902 +                                NULL,
52903 +                                NULL,
52904 +                                NULL,
52905 +                                NULL);
52906 +        if (err != E_OK)
52907 +            RETURN_ERROR(MINOR, err, NO_MSG);
52908 +        return E_OK;
52909 +    }
52910 +    else if (!p_Fm->p_FmFpmRegs)
52911 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
52912 +                     ("Either IPC or 'baseAddress' is required!"));
52913 +
52914 +    fman_set_num_of_riscs_per_port(fpm_rg, hardwarePortId, numOfFmanCtrls, orFmanCtrl);
52915 +
52916 +    return E_OK;
52917 +}
52918 +
52919 +t_Error FmGetSetPortParams(t_Handle h_Fm, t_FmInterModulePortInitParams *p_PortParams)
52920 +{
52921 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
52922 +    t_Error                 err;
52923 +    uint32_t                intFlags;
52924 +    uint8_t                 hardwarePortId = p_PortParams->hardwarePortId, macId;
52925 +    struct fman_rg          fman_rg;
52926 +
52927 +    fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
52928 +    fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
52929 +    fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
52930 +    fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
52931 +
52932 +    if (p_Fm->guestId != NCSW_MASTER_ID)
52933 +    {
52934 +        t_FmIpcPortInInitParams     portInParams;
52935 +        t_FmIpcPortOutInitParams    portOutParams;
52936 +        t_FmIpcMsg                  msg;
52937 +        t_FmIpcReply                reply;
52938 +        uint32_t                    replyLength;
52939 +
52940 +        portInParams.hardwarePortId     = p_PortParams->hardwarePortId;
52941 +        portInParams.enumPortType       = (uint32_t)p_PortParams->portType;
52942 +        portInParams.boolIndependentMode= (uint8_t)p_PortParams->independentMode;
52943 +        portInParams.liodnOffset        = p_PortParams->liodnOffset;
52944 +        portInParams.numOfTasks         = p_PortParams->numOfTasks;
52945 +        portInParams.numOfExtraTasks    = p_PortParams->numOfExtraTasks;
52946 +        portInParams.numOfOpenDmas      = p_PortParams->numOfOpenDmas;
52947 +        portInParams.numOfExtraOpenDmas = p_PortParams->numOfExtraOpenDmas;
52948 +        portInParams.sizeOfFifo         = p_PortParams->sizeOfFifo;
52949 +        portInParams.extraSizeOfFifo    = p_PortParams->extraSizeOfFifo;
52950 +        portInParams.deqPipelineDepth   = p_PortParams->deqPipelineDepth;
52951 +        portInParams.maxFrameLength     = p_PortParams->maxFrameLength;
52952 +        portInParams.liodnBase          = p_PortParams->liodnBase;
52953 +
52954 +        memset(&msg, 0, sizeof(msg));
52955 +        memset(&reply, 0, sizeof(reply));
52956 +        msg.msgId = FM_GET_SET_PORT_PARAMS;
52957 +        memcpy(msg.msgBody, &portInParams, sizeof(portInParams));
52958 +        replyLength = (sizeof(uint32_t) + sizeof(t_FmIpcPortOutInitParams));
52959 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
52960 +                                     (uint8_t*)&msg,
52961 +                                     sizeof(msg.msgId) +sizeof(portInParams),
52962 +                                     (uint8_t*)&reply,
52963 +                                     &replyLength,
52964 +                                     NULL,
52965 +                                     NULL)) != E_OK)
52966 +            RETURN_ERROR(MINOR, err, NO_MSG);
52967 +        if (replyLength != (sizeof(uint32_t) + sizeof(t_FmIpcPortOutInitParams)))
52968 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
52969 +        memcpy((uint8_t*)&portOutParams, reply.replyBody, sizeof(t_FmIpcPortOutInitParams));
52970 +
52971 +        p_PortParams->fmMuramPhysBaseAddr.high = portOutParams.ipcPhysAddr.high;
52972 +        p_PortParams->fmMuramPhysBaseAddr.low  = portOutParams.ipcPhysAddr.low;
52973 +        p_PortParams->numOfTasks = portOutParams.numOfTasks;
52974 +        p_PortParams->numOfExtraTasks = portOutParams.numOfExtraTasks;
52975 +        p_PortParams->numOfOpenDmas = portOutParams.numOfOpenDmas;
52976 +        p_PortParams->numOfExtraOpenDmas = portOutParams.numOfExtraOpenDmas;
52977 +        p_PortParams->sizeOfFifo = portOutParams.sizeOfFifo;
52978 +        p_PortParams->extraSizeOfFifo = portOutParams.extraSizeOfFifo;
52979 +
52980 +        return (t_Error)(reply.error);
52981 +    }
52982 +
52983 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
52984 +
52985 +    intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
52986 +    if (p_PortParams->independentMode)
52987 +    {
52988 +        /* set port parameters */
52989 +        p_Fm->independentMode = p_PortParams->independentMode;
52990 +        /* disable dispatch limit */
52991 +        fman_qmi_disable_dispatch_limit(fman_rg.fpm_rg);
52992 +    }
52993 +
52994 +    if (p_PortParams->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
52995 +    {
52996 +        if (p_Fm->hcPortInitialized)
52997 +        {
52998 +            XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
52999 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Only one host command port is allowed."));
53000 +        }
53001 +        else
53002 +            p_Fm->hcPortInitialized = TRUE;
53003 +    }
53004 +    p_Fm->p_FmStateStruct->portsTypes[hardwarePortId] = p_PortParams->portType;
53005 +
53006 +    err = FmSetNumOfTasks(p_Fm, hardwarePortId, &p_PortParams->numOfTasks, &p_PortParams->numOfExtraTasks, TRUE);
53007 +    if (err)
53008 +    {
53009 +        XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
53010 +        RETURN_ERROR(MAJOR, err, NO_MSG);
53011 +    }
53012 +
53013 +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
53014 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev != 4)
53015 +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
53016 +    if ((p_PortParams->portType != e_FM_PORT_TYPE_RX) &&
53017 +       (p_PortParams->portType != e_FM_PORT_TYPE_RX_10G))
53018 +    /* for transmit & O/H ports */
53019 +    {
53020 +        uint8_t     enqTh;
53021 +        uint8_t     deqTh;
53022 +
53023 +        /* update qmi ENQ/DEQ threshold */
53024 +        p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums += p_PortParams->deqPipelineDepth;
53025 +        enqTh = fman_get_qmi_enq_th(fman_rg.qmi_rg);
53026 +        /* if enqTh is too big, we reduce it to the max value that is still OK */
53027 +        if (enqTh >= (QMI_MAX_NUM_OF_TNUMS - p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums))
53028 +        {
53029 +            enqTh = (uint8_t)(QMI_MAX_NUM_OF_TNUMS - p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums - 1);
53030 +            fman_set_qmi_enq_th(fman_rg.qmi_rg, enqTh);
53031 +        }
53032 +
53033 +        deqTh = fman_get_qmi_deq_th(fman_rg.qmi_rg);
53034 +        /* if deqTh is too small, we enlarge it to the min value that is still OK.
53035 +         deqTh may not be larger than 63 (QMI_MAX_NUM_OF_TNUMS-1). */
53036 +        if ((deqTh <= p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums)  && (deqTh < QMI_MAX_NUM_OF_TNUMS-1))
53037 +        {
53038 +            deqTh = (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums + 1);
53039 +            fman_set_qmi_deq_th(fman_rg.qmi_rg, deqTh);
53040 +        }
53041 +    }
53042 +
53043 +#ifdef FM_LOW_END_RESTRICTION
53044 +    if ((hardwarePortId==0x1) || (hardwarePortId==0x29))
53045 +    {
53046 +        if (p_Fm->p_FmStateStruct->lowEndRestriction)
53047 +        {
53048 +            XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
53049 +            RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("OP #0 cannot work with Tx Port #1."));
53050 +        }
53051 +        else
53052 +            p_Fm->p_FmStateStruct->lowEndRestriction = TRUE;
53053 +    }
53054 +#endif /* FM_LOW_END_RESTRICTION */
53055 +
53056 +    err = FmSetSizeOfFifo(p_Fm,
53057 +                          hardwarePortId,
53058 +                          &p_PortParams->sizeOfFifo,
53059 +                          &p_PortParams->extraSizeOfFifo,
53060 +                          TRUE);
53061 +    if (err)
53062 +    {
53063 +        XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
53064 +        RETURN_ERROR(MAJOR, err, NO_MSG);
53065 +    }
53066 +
53067 +    err = FmSetNumOfOpenDmas(p_Fm,
53068 +                             hardwarePortId,
53069 +                             &p_PortParams->numOfOpenDmas,
53070 +                             &p_PortParams->numOfExtraOpenDmas,
53071 +                             TRUE);
53072 +    if (err)
53073 +    {
53074 +        XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
53075 +        RETURN_ERROR(MAJOR, err, NO_MSG);
53076 +    }
53077 +
53078 +    fman_set_liodn_per_port(&fman_rg,
53079 +                            hardwarePortId,
53080 +                            p_PortParams->liodnBase,
53081 +                            p_PortParams->liodnOffset);
53082 +
53083 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev < 6)
53084 +        fman_set_order_restoration_per_port(fman_rg.fpm_rg,
53085 +                                            hardwarePortId,
53086 +                                            p_PortParams->independentMode,
53087 +                                            !!((p_PortParams->portType==e_FM_PORT_TYPE_RX) || (p_PortParams->portType==e_FM_PORT_TYPE_RX_10G)));
53088 +
53089 +    HW_PORT_ID_TO_SW_PORT_ID(macId, hardwarePortId);
53090 +
53091 +#if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS)
53092 +    if ((p_PortParams->portType == e_FM_PORT_TYPE_TX_10G) ||
53093 +        (p_PortParams->portType == e_FM_PORT_TYPE_RX_10G))
53094 +    {
53095 +        ASSERT_COND(macId < FM_MAX_NUM_OF_10G_MACS);
53096 +        if (p_PortParams->maxFrameLength >= p_Fm->p_FmStateStruct->macMaxFrameLengths10G[macId])
53097 +            p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId] = p_PortParams->maxFrameLength;
53098 +        else
53099 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, ("Port maxFrameLength is smaller than MAC current MTU"));
53100 +    }
53101 +    else
53102 +#endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */
53103 +    if ((p_PortParams->portType == e_FM_PORT_TYPE_TX) ||
53104 +        (p_PortParams->portType == e_FM_PORT_TYPE_RX))
53105 +    {
53106 +        ASSERT_COND(macId < FM_MAX_NUM_OF_1G_MACS);
53107 +        if (p_PortParams->maxFrameLength >= p_Fm->p_FmStateStruct->macMaxFrameLengths1G[macId])
53108 +            p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId] = p_PortParams->maxFrameLength;
53109 +        else
53110 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, ("Port maxFrameLength is smaller than MAC current MTU"));
53111 +    }
53112 +
53113 +    FmGetPhysicalMuramBase(p_Fm, &p_PortParams->fmMuramPhysBaseAddr);
53114 +    XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
53115 +
53116 +    return E_OK;
53117 +}
53118 +
53119 +void FmFreePortParams(t_Handle h_Fm,t_FmInterModulePortFreeParams *p_PortParams)
53120 +{
53121 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
53122 +    uint32_t                intFlags;
53123 +    uint8_t                 hardwarePortId = p_PortParams->hardwarePortId;
53124 +    uint8_t                 numOfTasks, numOfDmas, macId;
53125 +    uint16_t                sizeOfFifo;
53126 +    t_Error                 err;
53127 +    t_FmIpcPortFreeParams   portParams;
53128 +    t_FmIpcMsg              msg;
53129 +    struct fman_qmi_regs *qmi_rg = p_Fm->p_FmQmiRegs;
53130 +    struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
53131 +
53132 +    if (p_Fm->guestId != NCSW_MASTER_ID)
53133 +    {
53134 +        portParams.hardwarePortId = p_PortParams->hardwarePortId;
53135 +        portParams.enumPortType = (uint32_t)p_PortParams->portType;
53136 +        portParams.deqPipelineDepth = p_PortParams->deqPipelineDepth;
53137 +        memset(&msg, 0, sizeof(msg));
53138 +        msg.msgId = FM_FREE_PORT;
53139 +        memcpy(msg.msgBody, &portParams, sizeof(portParams));
53140 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53141 +                                (uint8_t*)&msg,
53142 +                                sizeof(msg.msgId)+sizeof(portParams),
53143 +                                NULL,
53144 +                                NULL,
53145 +                                NULL,
53146 +                                NULL);
53147 +        if (err != E_OK)
53148 +            REPORT_ERROR(MINOR, err, NO_MSG);
53149 +        return;
53150 +    }
53151 +
53152 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
53153 +
53154 +    intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
53155 +
53156 +    if (p_PortParams->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
53157 +    {
53158 +        ASSERT_COND(p_Fm->hcPortInitialized);
53159 +        p_Fm->hcPortInitialized = FALSE;
53160 +    }
53161 +
53162 +    p_Fm->p_FmStateStruct->portsTypes[hardwarePortId] = e_FM_PORT_TYPE_DUMMY;
53163 +
53164 +    /* free numOfTasks */
53165 +    numOfTasks = fman_get_num_of_tasks(bmi_rg, hardwarePortId);
53166 +    ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfTasks >= numOfTasks);
53167 +    p_Fm->p_FmStateStruct->accumulatedNumOfTasks -= numOfTasks;
53168 +
53169 +    /* free numOfOpenDmas */
53170 +    numOfDmas = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
53171 +    ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas >= numOfDmas);
53172 +    p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas -= numOfDmas;
53173 +
53174 +#ifdef FM_HAS_TOTAL_DMAS
53175 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev < 6)
53176 +    {
53177 +        /* update total num of DMA's with committed number of open DMAS, and max uncommitted pool. */
53178 +        fman_set_num_of_open_dmas(bmi_rg,
53179 +                                  hardwarePortId,
53180 +                                  1,
53181 +                                  0,
53182 +                         (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize));
53183 +    }
53184 +#endif /* FM_HAS_TOTAL_DMAS */
53185 +
53186 +    /* free sizeOfFifo */
53187 +    sizeOfFifo = fman_get_size_of_fifo(bmi_rg, hardwarePortId);
53188 +    ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedFifoSize >= (sizeOfFifo * BMI_FIFO_UNITS));
53189 +    p_Fm->p_FmStateStruct->accumulatedFifoSize -= (sizeOfFifo * BMI_FIFO_UNITS);
53190 +
53191 +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
53192 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev != 4)
53193 +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
53194 +    if ((p_PortParams->portType != e_FM_PORT_TYPE_RX) &&
53195 +        (p_PortParams->portType != e_FM_PORT_TYPE_RX_10G))
53196 +    /* for transmit & O/H ports */
53197 +    {
53198 +        uint8_t     enqTh;
53199 +        uint8_t     deqTh;
53200 +
53201 +        /* update qmi ENQ/DEQ threshold */
53202 +        p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums -= p_PortParams->deqPipelineDepth;
53203 +
53204 +        /* p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums is now smaller,
53205 +           so we can enlarge enqTh */
53206 +        enqTh = (uint8_t)(QMI_MAX_NUM_OF_TNUMS - p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums - 1);
53207 +
53208 +         /* p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums is now smaller,
53209 +            so we can reduce deqTh */
53210 +        deqTh = (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums + 1);
53211 +
53212 +        fman_set_qmi_enq_th(qmi_rg, enqTh);
53213 +        fman_set_qmi_deq_th(qmi_rg, deqTh);
53214 +    }
53215 +
53216 +    HW_PORT_ID_TO_SW_PORT_ID(macId, hardwarePortId);
53217 +
53218 +#if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS)
53219 +    if ((p_PortParams->portType == e_FM_PORT_TYPE_TX_10G) ||
53220 +        (p_PortParams->portType == e_FM_PORT_TYPE_RX_10G))
53221 +    {
53222 +        ASSERT_COND(macId < FM_MAX_NUM_OF_10G_MACS);
53223 +        p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId] = 0;
53224 +    }
53225 +    else
53226 +#endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */
53227 +    if ((p_PortParams->portType == e_FM_PORT_TYPE_TX) ||
53228 +        (p_PortParams->portType == e_FM_PORT_TYPE_RX))
53229 +    {
53230 +        ASSERT_COND(macId < FM_MAX_NUM_OF_1G_MACS);
53231 +        p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId] = 0;
53232 +    }
53233 +
53234 +#ifdef FM_LOW_END_RESTRICTION
53235 +    if ((hardwarePortId==0x1) || (hardwarePortId==0x29))
53236 +        p_Fm->p_FmStateStruct->lowEndRestriction = FALSE;
53237 +#endif /* FM_LOW_END_RESTRICTION */
53238 +    XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
53239 +}
53240 +
53241 +t_Error FmIsPortStalled(t_Handle h_Fm, uint8_t hardwarePortId, bool *p_IsStalled)
53242 +{
53243 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
53244 +    t_Error         err;
53245 +    t_FmIpcMsg      msg;
53246 +    t_FmIpcReply    reply;
53247 +    uint32_t        replyLength;
53248 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
53249 +
53250 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53251 +        !p_Fm->baseAddr &&
53252 +        p_Fm->h_IpcSessions[0])
53253 +    {
53254 +        memset(&msg, 0, sizeof(msg));
53255 +        memset(&reply, 0, sizeof(reply));
53256 +        msg.msgId = FM_IS_PORT_STALLED;
53257 +        msg.msgBody[0] = hardwarePortId;
53258 +        replyLength = sizeof(uint32_t) + sizeof(uint8_t);
53259 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53260 +                                (uint8_t*)&msg,
53261 +                                sizeof(msg.msgId)+sizeof(hardwarePortId),
53262 +                                (uint8_t*)&reply,
53263 +                                &replyLength,
53264 +                                NULL,
53265 +                                NULL);
53266 +        if (err != E_OK)
53267 +            RETURN_ERROR(MINOR, err, NO_MSG);
53268 +        if (replyLength != (sizeof(uint32_t) + sizeof(uint8_t)))
53269 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53270 +
53271 +        *p_IsStalled = (bool)!!(*(uint8_t*)(reply.replyBody));
53272 +
53273 +        return (t_Error)(reply.error);
53274 +    }
53275 +    else if (!p_Fm->baseAddr)
53276 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
53277 +                     ("Either IPC or 'baseAddress' is required!"));
53278 +
53279 +    *p_IsStalled = fman_is_port_stalled(fpm_rg, hardwarePortId);
53280 +
53281 +    return E_OK;
53282 +}
53283 +
53284 +t_Error FmResumeStalledPort(t_Handle h_Fm, uint8_t hardwarePortId)
53285 +{
53286 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
53287 +    t_Error         err;
53288 +    bool            isStalled;
53289 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
53290 +
53291 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53292 +        !p_Fm->baseAddr &&
53293 +        p_Fm->h_IpcSessions[0])
53294 +    {
53295 +        t_FmIpcMsg      msg;
53296 +        t_FmIpcReply    reply;
53297 +        uint32_t        replyLength;
53298 +
53299 +        memset(&msg, 0, sizeof(msg));
53300 +        memset(&reply, 0, sizeof(reply));
53301 +        msg.msgId = FM_RESUME_STALLED_PORT;
53302 +        msg.msgBody[0] = hardwarePortId;
53303 +        replyLength = sizeof(uint32_t);
53304 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53305 +                                (uint8_t*)&msg,
53306 +                                sizeof(msg.msgId) + sizeof(hardwarePortId),
53307 +                                (uint8_t*)&reply,
53308 +                                &replyLength,
53309 +                                NULL,
53310 +                                NULL);
53311 +        if (err != E_OK)
53312 +            RETURN_ERROR(MINOR, err, NO_MSG);
53313 +        if (replyLength != sizeof(uint32_t))
53314 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53315 +        return (t_Error)(reply.error);
53316 +    }
53317 +    else if (!p_Fm->baseAddr)
53318 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
53319 +                     ("Either IPC or 'baseAddress' is required!"));
53320 +
53321 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
53322 +        RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Not available for this FM revision!"));
53323 +
53324 +    /* Get port status */
53325 +    err = FmIsPortStalled(h_Fm, hardwarePortId, &isStalled);
53326 +    if (err)
53327 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Can't get port status"));
53328 +    if (!isStalled)
53329 +        return E_OK;
53330 +
53331 +    fman_resume_stalled_port(fpm_rg, hardwarePortId);
53332 +
53333 +    return E_OK;
53334 +}
53335 +
53336 +t_Error FmResetMac(t_Handle h_Fm, e_FmMacType type, uint8_t macId)
53337 +{
53338 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
53339 +    t_Error             err;
53340 +    struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
53341 +
53342 +#if (DPAA_VERSION >= 11)
53343 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
53344 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
53345 +                     ("FMan MAC reset!"));
53346 +#endif /*(DPAA_VERSION >= 11)*/
53347 +
53348 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53349 +        !p_Fm->baseAddr &&
53350 +        p_Fm->h_IpcSessions[0])
53351 +    {
53352 +        t_FmIpcMacParams    macParams;
53353 +        t_FmIpcMsg          msg;
53354 +        t_FmIpcReply        reply;
53355 +        uint32_t            replyLength;
53356 +
53357 +        memset(&msg, 0, sizeof(msg));
53358 +        memset(&reply, 0, sizeof(reply));
53359 +        macParams.id = macId;
53360 +        macParams.enumType = (uint32_t)type;
53361 +        msg.msgId = FM_RESET_MAC;
53362 +        memcpy(msg.msgBody,  &macParams, sizeof(macParams));
53363 +        replyLength = sizeof(uint32_t);
53364 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53365 +                                (uint8_t*)&msg,
53366 +                                sizeof(msg.msgId)+sizeof(macParams),
53367 +                                (uint8_t*)&reply,
53368 +                                &replyLength,
53369 +                                NULL,
53370 +                                NULL);
53371 +        if (err != E_OK)
53372 +            RETURN_ERROR(MINOR, err, NO_MSG);
53373 +        if (replyLength != sizeof(uint32_t))
53374 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53375 +        return (t_Error)(reply.error);
53376 +    }
53377 +    else if (!p_Fm->baseAddr)
53378 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
53379 +                     ("Either IPC or 'baseAddress' is required!"));
53380 +
53381 +    err = (t_Error)fman_reset_mac(fpm_rg, macId, !!(type == e_FM_MAC_10G));
53382 +
53383 +    if (err == -EBUSY)
53384 +        return ERROR_CODE(E_TIMEOUT);
53385 +    else if (err)
53386 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal MAC ID"));
53387 +
53388 +    return E_OK;
53389 +}
53390 +
53391 +t_Error FmSetMacMaxFrame(t_Handle h_Fm, e_FmMacType type, uint8_t macId, uint16_t mtu)
53392 +{
53393 +    t_Fm                        *p_Fm = (t_Fm*)h_Fm;
53394 +
53395 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53396 +        p_Fm->h_IpcSessions[0])
53397 +    {
53398 +        t_FmIpcMacMaxFrameParams    macMaxFrameLengthParams;
53399 +        t_Error                     err;
53400 +        t_FmIpcMsg                  msg;
53401 +
53402 +        memset(&msg, 0, sizeof(msg));
53403 +        macMaxFrameLengthParams.macParams.id = macId;
53404 +        macMaxFrameLengthParams.macParams.enumType = (uint32_t)type;
53405 +        macMaxFrameLengthParams.maxFrameLength = (uint16_t)mtu;
53406 +        msg.msgId = FM_SET_MAC_MAX_FRAME;
53407 +        memcpy(msg.msgBody,  &macMaxFrameLengthParams, sizeof(macMaxFrameLengthParams));
53408 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53409 +                                (uint8_t*)&msg,
53410 +                                sizeof(msg.msgId)+sizeof(macMaxFrameLengthParams),
53411 +                                NULL,
53412 +                                NULL,
53413 +                                NULL,
53414 +                                NULL);
53415 +        if (err != E_OK)
53416 +            RETURN_ERROR(MINOR, err, NO_MSG);
53417 +        return E_OK;
53418 +    }
53419 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
53420 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
53421 +                     ("running in guest-mode without IPC!"));
53422 +
53423 +    /* if port is already initialized, check that MaxFrameLength is smaller
53424 +     * or equal to the port's max */
53425 +#if (defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS))
53426 +    if (type == e_FM_MAC_10G)
53427 +    {
53428 +        if ((!p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId])
53429 +           || (p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId] &&
53430 +              (mtu <= p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId])))
53431 +               p_Fm->p_FmStateStruct->macMaxFrameLengths10G[macId] = mtu;
53432 +        else
53433 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, ("MAC maxFrameLength is larger than Port maxFrameLength"));
53434 +
53435 +    }
53436 +    else
53437 +#else
53438 +    UNUSED(type);
53439 +#endif /* (defined(FM_MAX_NUM_OF_10G_MACS) && ... */
53440 +    if ((!p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId])
53441 +       || (p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId] &&
53442 +          (mtu <= p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId])))
53443 +        p_Fm->p_FmStateStruct->macMaxFrameLengths1G[macId] = mtu;
53444 +    else
53445 +        RETURN_ERROR(MINOR, E_INVALID_VALUE, ("MAC maxFrameLength is larger than Port maxFrameLength"));
53446 +
53447 +    return E_OK;
53448 +}
53449 +
53450 +uint16_t FmGetClockFreq(t_Handle h_Fm)
53451 +{
53452 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
53453 +
53454 +    /* for multicore environment: this depends on the
53455 +     * fact that fmClkFreq was properly initialized at "init". */
53456 +    return p_Fm->p_FmStateStruct->fmClkFreq;
53457 +}
53458 +
53459 +uint16_t FmGetMacClockFreq(t_Handle h_Fm)
53460 +{
53461 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
53462 +
53463 +    return p_Fm->p_FmStateStruct->fmMacClkFreq;
53464 +}
53465 +
53466 +uint32_t FmGetTimeStampScale(t_Handle h_Fm)
53467 +{
53468 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
53469 +
53470 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53471 +        !p_Fm->baseAddr &&
53472 +        p_Fm->h_IpcSessions[0])
53473 +    {
53474 +        t_Error             err;
53475 +        t_FmIpcMsg          msg;
53476 +        t_FmIpcReply        reply;
53477 +        uint32_t            replyLength, timeStamp;
53478 +
53479 +        memset(&msg, 0, sizeof(msg));
53480 +        memset(&reply, 0, sizeof(reply));
53481 +        msg.msgId = FM_GET_TIMESTAMP_SCALE;
53482 +        replyLength = sizeof(uint32_t) + sizeof(uint32_t);
53483 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53484 +                                     (uint8_t*)&msg,
53485 +                                     sizeof(msg.msgId),
53486 +                                     (uint8_t*)&reply,
53487 +                                     &replyLength,
53488 +                                     NULL,
53489 +                                     NULL)) != E_OK)
53490 +        {
53491 +            REPORT_ERROR(MAJOR, err, NO_MSG);
53492 +            return 0;
53493 +        }
53494 +        if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
53495 +        {
53496 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53497 +            return 0;
53498 +        }
53499 +
53500 +        memcpy((uint8_t*)&timeStamp, reply.replyBody, sizeof(uint32_t));
53501 +        return timeStamp;
53502 +    }
53503 +    else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53504 +             p_Fm->baseAddr)
53505 +    {
53506 +        if (!(GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_tsc1) & FPM_TS_CTL_EN))
53507 +        {
53508 +            REPORT_ERROR(MAJOR, E_INVALID_STATE, ("timestamp is not enabled!"));
53509 +            return 0;
53510 +        }
53511 +    }
53512 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
53513 +        DBG(WARNING, ("No IPC - can't validate FM if timestamp enabled."));
53514 +
53515 +    return p_Fm->p_FmStateStruct->count1MicroBit;
53516 +}
53517 +
53518 +t_Error FmEnableRamsEcc(t_Handle h_Fm)
53519 +{
53520 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
53521 +
53522 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
53523 +
53524 +    p_Fm->p_FmStateStruct->ramsEccOwners++;
53525 +    p_Fm->p_FmStateStruct->internalCall = TRUE;
53526 +
53527 +    return FM_EnableRamsEcc(p_Fm);
53528 +}
53529 +
53530 +t_Error FmDisableRamsEcc(t_Handle h_Fm)
53531 +{
53532 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
53533 +
53534 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
53535 +
53536 +    ASSERT_COND(p_Fm->p_FmStateStruct->ramsEccOwners);
53537 +    p_Fm->p_FmStateStruct->ramsEccOwners--;
53538 +
53539 +    if (p_Fm->p_FmStateStruct->ramsEccOwners==0)
53540 +    {
53541 +        p_Fm->p_FmStateStruct->internalCall = TRUE;
53542 +        return FM_DisableRamsEcc(p_Fm);
53543 +    }
53544 +
53545 +    return E_OK;
53546 +}
53547 +
53548 +uint8_t FmGetGuestId(t_Handle h_Fm)
53549 +{
53550 +    t_Fm     *p_Fm = (t_Fm*)h_Fm;
53551 +
53552 +    return p_Fm->guestId;
53553 +}
53554 +
53555 +bool FmIsMaster(t_Handle h_Fm)
53556 +{
53557 +    t_Fm     *p_Fm = (t_Fm*)h_Fm;
53558 +
53559 +    return (p_Fm->guestId == NCSW_MASTER_ID);
53560 +}
53561 +
53562 +t_Error FmSetSizeOfFifo(t_Handle    h_Fm,
53563 +                        uint8_t     hardwarePortId,
53564 +                        uint32_t    *p_SizeOfFifo,
53565 +                        uint32_t    *p_ExtraSizeOfFifo,
53566 +                        bool        initialConfig)
53567 +{
53568 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
53569 +    t_FmIpcPortRsrcParams   rsrcParams;
53570 +    t_Error                 err;
53571 +    struct fman_bmi_regs    *bmi_rg = p_Fm->p_FmBmiRegs;
53572 +    uint32_t                sizeOfFifo = *p_SizeOfFifo, extraSizeOfFifo = *p_ExtraSizeOfFifo;
53573 +    uint16_t                currentVal = 0, currentExtraVal = 0;
53574 +
53575 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53576 +        !p_Fm->baseAddr &&
53577 +        p_Fm->h_IpcSessions[0])
53578 +    {
53579 +        t_FmIpcMsg          msg;
53580 +        t_FmIpcReply        reply;
53581 +        uint32_t            replyLength;
53582 +
53583 +        rsrcParams.hardwarePortId = hardwarePortId;
53584 +        rsrcParams.val = sizeOfFifo;
53585 +        rsrcParams.extra = extraSizeOfFifo;
53586 +        rsrcParams.boolInitialConfig = (uint8_t)initialConfig;
53587 +
53588 +        memset(&msg, 0, sizeof(msg));
53589 +        memset(&reply, 0, sizeof(reply));
53590 +        msg.msgId = FM_SET_SIZE_OF_FIFO;
53591 +        memcpy(msg.msgBody, &rsrcParams, sizeof(rsrcParams));
53592 +        replyLength = sizeof(uint32_t);
53593 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53594 +                                     (uint8_t*)&msg,
53595 +                                     sizeof(msg.msgId) + sizeof(rsrcParams),
53596 +                                     (uint8_t*)&reply,
53597 +                                     &replyLength,
53598 +                                     NULL,
53599 +                                     NULL)) != E_OK)
53600 +            RETURN_ERROR(MINOR, err, NO_MSG);
53601 +        if (replyLength != sizeof(uint32_t))
53602 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53603 +        return (t_Error)(reply.error);
53604 +    }
53605 +    else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53606 +             p_Fm->baseAddr)
53607 +    {
53608 +        DBG(WARNING, ("No IPC - can't validate FM total-fifo size."));
53609 +        fman_set_size_of_fifo(bmi_rg, hardwarePortId, sizeOfFifo, extraSizeOfFifo);
53610 +    }
53611 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
53612 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
53613 +                     ("running in guest-mode without neither IPC nor mapped register!"));
53614 +
53615 +    if (!initialConfig)
53616 +    {
53617 +        /* !initialConfig - runtime change of existing value.
53618 +         * - read the current FIFO and extra FIFO size */
53619 +        currentExtraVal = fman_get_size_of_extra_fifo(bmi_rg, hardwarePortId);
53620 +        currentVal = fman_get_size_of_fifo(bmi_rg, hardwarePortId);
53621 +    }
53622 +
53623 +    if (extraSizeOfFifo > currentExtraVal)
53624 +    {
53625 +        if (extraSizeOfFifo && !p_Fm->p_FmStateStruct->extraFifoPoolSize)
53626 +            /* if this is the first time a port requires extraFifoPoolSize, the total extraFifoPoolSize
53627 +             * must be initialized to 1 buffer per port
53628 +             */
53629 +            p_Fm->p_FmStateStruct->extraFifoPoolSize = FM_MAX_NUM_OF_RX_PORTS*BMI_FIFO_UNITS;
53630 +
53631 +        p_Fm->p_FmStateStruct->extraFifoPoolSize = MAX(p_Fm->p_FmStateStruct->extraFifoPoolSize, extraSizeOfFifo);
53632 +    }
53633 +
53634 +    /* check that there are enough uncommitted fifo size */
53635 +    if ((p_Fm->p_FmStateStruct->accumulatedFifoSize - currentVal + sizeOfFifo) >
53636 +        (p_Fm->p_FmStateStruct->totalFifoSize - p_Fm->p_FmStateStruct->extraFifoPoolSize)){
53637 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE,
53638 +            ("Port request fifo size + accumulated size > total FIFO size:"));
53639 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE,
53640 +            ("port 0x%x requested %d bytes, extra size = %d, accumulated size = %d total size = %d",
53641 +                hardwarePortId, sizeOfFifo, p_Fm->p_FmStateStruct->extraFifoPoolSize,
53642 +                p_Fm->p_FmStateStruct->accumulatedFifoSize,
53643 +                p_Fm->p_FmStateStruct->totalFifoSize));
53644 +    }
53645 +    else
53646 +    {
53647 +        /* update accumulated */
53648 +        ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedFifoSize >= currentVal);
53649 +        p_Fm->p_FmStateStruct->accumulatedFifoSize -= currentVal;
53650 +        p_Fm->p_FmStateStruct->accumulatedFifoSize += sizeOfFifo;
53651 +        fman_set_size_of_fifo(bmi_rg, hardwarePortId, sizeOfFifo, extraSizeOfFifo);
53652 +    }
53653 +
53654 +    return E_OK;
53655 +}
53656 +
53657 +t_Error FmSetNumOfTasks(t_Handle    h_Fm,
53658 +                        uint8_t     hardwarePortId,
53659 +                        uint8_t     *p_NumOfTasks,
53660 +                        uint8_t     *p_NumOfExtraTasks,
53661 +                        bool        initialConfig)
53662 +{
53663 +    t_Fm                    *p_Fm = (t_Fm *)h_Fm;
53664 +    t_Error                 err;
53665 +    struct fman_bmi_regs    *bmi_rg = p_Fm->p_FmBmiRegs;
53666 +    uint8_t                 currentVal = 0, currentExtraVal = 0, numOfTasks = *p_NumOfTasks, numOfExtraTasks = *p_NumOfExtraTasks;
53667 +
53668 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
53669 +
53670 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53671 +        !p_Fm->baseAddr &&
53672 +        p_Fm->h_IpcSessions[0])
53673 +    {
53674 +        t_FmIpcPortRsrcParams   rsrcParams;
53675 +        t_FmIpcMsg              msg;
53676 +        t_FmIpcReply            reply;
53677 +        uint32_t                replyLength;
53678 +
53679 +        rsrcParams.hardwarePortId = hardwarePortId;
53680 +        rsrcParams.val = numOfTasks;
53681 +        rsrcParams.extra = numOfExtraTasks;
53682 +        rsrcParams.boolInitialConfig = (uint8_t)initialConfig;
53683 +
53684 +        memset(&msg, 0, sizeof(msg));
53685 +        memset(&reply, 0, sizeof(reply));
53686 +        msg.msgId = FM_SET_NUM_OF_TASKS;
53687 +        memcpy(msg.msgBody, &rsrcParams, sizeof(rsrcParams));
53688 +        replyLength = sizeof(uint32_t);
53689 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53690 +                                     (uint8_t*)&msg,
53691 +                                     sizeof(msg.msgId) + sizeof(rsrcParams),
53692 +                                     (uint8_t*)&reply,
53693 +                                     &replyLength,
53694 +                                     NULL,
53695 +                                     NULL)) != E_OK)
53696 +            RETURN_ERROR(MINOR, err, NO_MSG);
53697 +        if (replyLength != sizeof(uint32_t))
53698 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53699 +        return (t_Error)(reply.error);
53700 +    }
53701 +    else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53702 +             p_Fm->baseAddr)
53703 +    {
53704 +        DBG(WARNING, ("No IPC - can't validate FM total-num-of-tasks."));
53705 +        fman_set_num_of_tasks(bmi_rg, hardwarePortId, numOfTasks, numOfExtraTasks);
53706 +    }
53707 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
53708 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
53709 +                     ("running in guest-mode without neither IPC nor mapped register!"));
53710 +
53711 +    if (!initialConfig)
53712 +    {
53713 +        /* !initialConfig - runtime change of existing value.
53714 +         * - read the current number of tasks */
53715 +        currentVal = fman_get_num_of_tasks(bmi_rg, hardwarePortId);
53716 +        currentExtraVal = fman_get_num_extra_tasks(bmi_rg, hardwarePortId);
53717 +    }
53718 +
53719 +    if (numOfExtraTasks > currentExtraVal)
53720 +         p_Fm->p_FmStateStruct->extraTasksPoolSize =
53721 +             (uint8_t)MAX(p_Fm->p_FmStateStruct->extraTasksPoolSize, numOfExtraTasks);
53722 +
53723 +    /* check that there are enough uncommitted tasks */
53724 +    if ((p_Fm->p_FmStateStruct->accumulatedNumOfTasks - currentVal + numOfTasks) >
53725 +       (p_Fm->p_FmStateStruct->totalNumOfTasks - p_Fm->p_FmStateStruct->extraTasksPoolSize))
53726 +        RETURN_ERROR(MAJOR, E_NOT_AVAILABLE,
53727 +                     ("Requested numOfTasks and extra tasks pool for fm%d exceed total numOfTasks.",
53728 +                      p_Fm->p_FmStateStruct->fmId));
53729 +    else
53730 +    {
53731 +        ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfTasks >= currentVal);
53732 +        /* update accumulated */
53733 +        p_Fm->p_FmStateStruct->accumulatedNumOfTasks -= currentVal;
53734 +        p_Fm->p_FmStateStruct->accumulatedNumOfTasks += numOfTasks;
53735 +        fman_set_num_of_tasks(bmi_rg, hardwarePortId, numOfTasks, numOfExtraTasks);
53736 +    }
53737 +
53738 +    return E_OK;
53739 +}
53740 +
53741 +t_Error FmSetNumOfOpenDmas(t_Handle h_Fm,
53742 +                           uint8_t hardwarePortId,
53743 +                           uint8_t *p_NumOfOpenDmas,
53744 +                           uint8_t *p_NumOfExtraOpenDmas,
53745 +                           bool    initialConfig)
53746 +
53747 +{
53748 +    t_Fm                    *p_Fm = (t_Fm *)h_Fm;
53749 +    t_Error                 err;
53750 +    struct fman_bmi_regs    *bmi_rg = p_Fm->p_FmBmiRegs;
53751 +    uint8_t                 numOfOpenDmas = *p_NumOfOpenDmas, numOfExtraOpenDmas = *p_NumOfExtraOpenDmas;
53752 +    uint8_t                 totalNumDmas = 0, currentVal = 0, currentExtraVal = 0;
53753 +
53754 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
53755 +
53756 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53757 +        !p_Fm->baseAddr &&
53758 +        p_Fm->h_IpcSessions[0])
53759 +    {
53760 +        t_FmIpcPortRsrcParams   rsrcParams;
53761 +        t_FmIpcMsg              msg;
53762 +        t_FmIpcReply            reply;
53763 +        uint32_t                replyLength;
53764 +
53765 +        rsrcParams.hardwarePortId = hardwarePortId;
53766 +        rsrcParams.val = numOfOpenDmas;
53767 +        rsrcParams.extra = numOfExtraOpenDmas;
53768 +        rsrcParams.boolInitialConfig = (uint8_t)initialConfig;
53769 +
53770 +        memset(&msg, 0, sizeof(msg));
53771 +        memset(&reply, 0, sizeof(reply));
53772 +        msg.msgId = FM_SET_NUM_OF_OPEN_DMAS;
53773 +        memcpy(msg.msgBody, &rsrcParams, sizeof(rsrcParams));
53774 +        replyLength = sizeof(uint32_t);
53775 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
53776 +                                     (uint8_t*)&msg,
53777 +                                     sizeof(msg.msgId) + sizeof(rsrcParams),
53778 +                                     (uint8_t*)&reply,
53779 +                                     &replyLength,
53780 +                                     NULL,
53781 +                                     NULL)) != E_OK)
53782 +            RETURN_ERROR(MINOR, err, NO_MSG);
53783 +        if (replyLength != sizeof(uint32_t))
53784 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
53785 +        return (t_Error)(reply.error);
53786 +    }
53787 +#ifdef FM_HAS_TOTAL_DMAS
53788 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
53789 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("running in guest-mode without IPC!"));
53790 +#else
53791 +    else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
53792 +             p_Fm->baseAddr &&
53793 +             (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6))
53794 +    {
53795 +        /*DBG(WARNING, ("No IPC - can't validate FM total-num-of-dmas."));*/
53796 +
53797 +        if (!numOfOpenDmas)
53798 +        {
53799 +             /* first config without explic it value: Do Nothing - reset value shouldn't be
53800 +                changed, read register for port save */
53801 +                *p_NumOfOpenDmas = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
53802 +                *p_NumOfExtraOpenDmas = fman_get_num_extra_dmas(bmi_rg, hardwarePortId);
53803 +        }
53804 +        else
53805 +            /* whether it is the first time with explicit value, or runtime "set" - write register */
53806 +            fman_set_num_of_open_dmas(bmi_rg,
53807 +                                   hardwarePortId,
53808 +                                   numOfOpenDmas,
53809 +                                   numOfExtraOpenDmas,
53810 +                                   p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize);
53811 +    }
53812 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
53813 +        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
53814 +                     ("running in guest-mode without neither IPC nor mapped register!"));
53815 +#endif /* FM_HAS_TOTAL_DMAS */
53816 +
53817 +    if (!initialConfig)
53818 +    {
53819 +        /* !initialConfig - runtime change of existing value.
53820 +         * - read the current number of open Dma's */
53821 +        currentExtraVal = fman_get_num_extra_dmas(bmi_rg, hardwarePortId);
53822 +        currentVal = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
53823 +    }
53824 +
53825 +#ifdef FM_NO_GUARANTEED_RESET_VALUES
53826 +    /* it's illegal to be in a state where this is not the first set and no value is specified */
53827 +    ASSERT_COND(initialConfig || numOfOpenDmas);
53828 +    if (!numOfOpenDmas)
53829 +    {
53830 +        /* !numOfOpenDmas - first configuration according to values in regs.
53831 +         * - read the current number of open Dma's */
53832 +        currentExtraVal = fman_get_num_extra_dmas(bmi_rg, hardwarePortId);
53833 +        currentVal = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
53834 +        /* This is the first configuration and user did not specify value (!numOfOpenDmas),
53835 +         * reset values will be used and we just save these values for resource management */
53836 +        p_Fm->p_FmStateStruct->extraOpenDmasPoolSize =
53837 +                    (uint8_t)MAX(p_Fm->p_FmStateStruct->extraOpenDmasPoolSize, currentExtraVal);
53838 +        p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas += currentVal;
53839 +        *p_NumOfOpenDmas = currentVal;
53840 +        *p_NumOfExtraOpenDmas = currentExtraVal;
53841 +        return E_OK;
53842 +    }
53843 +#endif /* FM_NO_GUARANTEED_RESET_VALUES */
53844 +
53845 +        if (numOfExtraOpenDmas > currentExtraVal)
53846 +             p_Fm->p_FmStateStruct->extraOpenDmasPoolSize =
53847 +                 (uint8_t)MAX(p_Fm->p_FmStateStruct->extraOpenDmasPoolSize, numOfExtraOpenDmas);
53848 +
53849 +#ifdef FM_HAS_TOTAL_DMAS
53850 +        if ((p_Fm->p_FmStateStruct->revInfo.majorRev < 6) &&
53851 +            (p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas - currentVal + numOfOpenDmas >
53852 +                p_Fm->p_FmStateStruct->maxNumOfOpenDmas))
53853 +                RETURN_ERROR(MAJOR, E_NOT_AVAILABLE,
53854 +                             ("Requested numOfOpenDmas for fm%d exceeds total numOfOpenDmas.",
53855 +                             p_Fm->p_FmStateStruct->fmId));
53856 +#else
53857 +        if ((p_Fm->p_FmStateStruct->revInfo.majorRev >= 6) &&
53858 +#ifdef FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
53859 +            !((p_Fm->p_FmStateStruct->revInfo.majorRev == 6) &&
53860 +              (p_Fm->p_FmStateStruct->revInfo.minorRev == 0)) &&
53861 +#endif /* FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 */
53862 +            (p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas - currentVal + numOfOpenDmas > DMA_THRESH_MAX_COMMQ + 1))
53863 +            RETURN_ERROR(MAJOR, E_NOT_AVAILABLE,
53864 +                         ("Requested numOfOpenDmas for fm%d exceeds DMA Command queue (%d)",
53865 +                          p_Fm->p_FmStateStruct->fmId, DMA_THRESH_MAX_COMMQ+1));
53866 +#endif /* FM_HAS_TOTAL_DMAS */
53867 +        else
53868 +        {
53869 +            ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas >= currentVal);
53870 +            /* update acummulated */
53871 +            p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas -= currentVal;
53872 +            p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas += numOfOpenDmas;
53873 +
53874 +#ifdef FM_HAS_TOTAL_DMAS
53875 +            if (p_Fm->p_FmStateStruct->revInfo.majorRev < 6)
53876 +            totalNumDmas = (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize);
53877 +#endif /* FM_HAS_TOTAL_DMAS */
53878 +            fman_set_num_of_open_dmas(bmi_rg,
53879 +                               hardwarePortId,
53880 +                               numOfOpenDmas,
53881 +                               numOfExtraOpenDmas,
53882 +                               totalNumDmas);
53883 +        }
53884 +
53885 +    return E_OK;
53886 +}
53887 +
53888 +#if (DPAA_VERSION >= 11)
53889 +t_Error FmVSPCheckRelativeProfile(t_Handle        h_Fm,
53890 +                                  e_FmPortType    portType,
53891 +                                  uint8_t         portId,
53892 +                                  uint16_t        relativeProfile)
53893 +{
53894 +    t_Fm         *p_Fm;
53895 +    t_FmSp      *p_FmPcdSp;
53896 +    uint8_t     swPortIndex=0, hardwarePortId;
53897 +
53898 +    ASSERT_COND(h_Fm);
53899 +    p_Fm = (t_Fm*)h_Fm;
53900 +
53901 +    hardwarePortId = SwPortIdToHwPortId(portType,
53902 +                                    portId,
53903 +                                    p_Fm->p_FmStateStruct->revInfo.majorRev,
53904 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
53905 +    ASSERT_COND(hardwarePortId);
53906 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
53907 +
53908 +    p_FmPcdSp = p_Fm->p_FmSp;
53909 +    ASSERT_COND(p_FmPcdSp);
53910 +
53911 +    if (!p_FmPcdSp->portsMapping[swPortIndex].numOfProfiles)
53912 +        RETURN_ERROR(MAJOR, E_INVALID_STATE , ("Port has no allocated profiles"));
53913 +    if (relativeProfile >= p_FmPcdSp->portsMapping[swPortIndex].numOfProfiles)
53914 +        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE , ("Profile id is out of range"));
53915 +
53916 +    return E_OK;
53917 +}
53918 +
53919 +t_Error FmVSPGetAbsoluteProfileId(t_Handle        h_Fm,
53920 +                                  e_FmPortType    portType,
53921 +                                  uint8_t         portId,
53922 +                                  uint16_t        relativeProfile,
53923 +                                  uint16_t        *p_AbsoluteId)
53924 +{
53925 +    t_Fm         *p_Fm;
53926 +    t_FmSp      *p_FmPcdSp;
53927 +    uint8_t     swPortIndex=0, hardwarePortId;
53928 +    t_Error     err;
53929 +
53930 +    ASSERT_COND(h_Fm);
53931 +    p_Fm = (t_Fm*)h_Fm;
53932 +
53933 +    err = FmVSPCheckRelativeProfile(h_Fm, portType, portId, relativeProfile);
53934 +    if (err != E_OK)
53935 +        return err;
53936 +
53937 +    hardwarePortId = SwPortIdToHwPortId(portType,
53938 +                                    portId,
53939 +                                    p_Fm->p_FmStateStruct->revInfo.majorRev,
53940 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
53941 +    ASSERT_COND(hardwarePortId);
53942 +    HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
53943 +
53944 +    p_FmPcdSp = p_Fm->p_FmSp;
53945 +    ASSERT_COND(p_FmPcdSp);
53946 +
53947 +    *p_AbsoluteId = (uint16_t)(p_FmPcdSp->portsMapping[swPortIndex].profilesBase + relativeProfile);
53948 +
53949 +    return E_OK;
53950 +}
53951 +#endif /* (DPAA_VERSION >= 11) */
53952 +
53953 +static t_Error InitFmDma(t_Fm *p_Fm)
53954 +{
53955 +    t_Error err;
53956 +
53957 +    err = (t_Error)fman_dma_init(p_Fm->p_FmDmaRegs, p_Fm->p_FmDriverParam);
53958 +    if (err != E_OK)
53959 +        return err;
53960 +
53961 +    /* Allocate MURAM for CAM */
53962 +    p_Fm->camBaseAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram,
53963 +                                                      (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*DMA_CAM_SIZEOF_ENTRY),
53964 +                                                      DMA_CAM_ALIGN));
53965 +    if (!p_Fm->camBaseAddr)
53966 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for DMA CAM failed"));
53967 +
53968 +    WRITE_BLOCK(UINT_TO_PTR(p_Fm->camBaseAddr),
53969 +                0,
53970 +                (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*DMA_CAM_SIZEOF_ENTRY));
53971 +
53972 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev == 2)
53973 +    {
53974 +        FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->camBaseAddr));
53975 +
53976 +        p_Fm->camBaseAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram,
53977 +                                                          (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*72 + 128),
53978 +                                                          64));
53979 +        if (!p_Fm->camBaseAddr)
53980 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for DMA CAM failed"));
53981 +
53982 +        WRITE_BLOCK(UINT_TO_PTR(p_Fm->camBaseAddr),
53983 +                   0,
53984 +               (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*72 + 128));
53985 +
53986 +        switch(p_Fm->p_FmDriverParam->dma_cam_num_of_entries)
53987 +        {
53988 +            case (8):
53989 +                WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xff000000);
53990 +                break;
53991 +            case (16):
53992 +                WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xffff0000);
53993 +                break;
53994 +            case (24):
53995 +                WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xffffff00);
53996 +                break;
53997 +            case (32):
53998 +                WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xffffffff);
53999 +                break;
54000 +            default:
54001 +                RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("wrong dma_cam_num_of_entries"));
54002 +        }
54003 +    }
54004 +
54005 +    p_Fm->p_FmDriverParam->cam_base_addr =
54006 +                 (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->camBaseAddr)) - p_Fm->fmMuramPhysBaseAddr);
54007 +
54008 +    return E_OK;
54009 +}
54010 +
54011 +static t_Error InitFmFpm(t_Fm *p_Fm)
54012 +{
54013 +    return (t_Error)fman_fpm_init(p_Fm->p_FmFpmRegs, p_Fm->p_FmDriverParam);
54014 +}
54015 +
54016 +static t_Error InitFmBmi(t_Fm *p_Fm)
54017 +{
54018 +    return (t_Error)fman_bmi_init(p_Fm->p_FmBmiRegs, p_Fm->p_FmDriverParam);
54019 +}
54020 +
54021 +static t_Error InitFmQmi(t_Fm *p_Fm)
54022 +{
54023 +    return (t_Error)fman_qmi_init(p_Fm->p_FmQmiRegs, p_Fm->p_FmDriverParam);
54024 +}
54025 +
54026 +static t_Error InitGuestMode(t_Fm *p_Fm)
54027 +{
54028 +    t_Error                 err = E_OK;
54029 +    int                     i;
54030 +    t_FmIpcMsg              msg;
54031 +    t_FmIpcReply            reply;
54032 +    uint32_t                replyLength;
54033 +
54034 +    ASSERT_COND(p_Fm);
54035 +    ASSERT_COND(p_Fm->guestId != NCSW_MASTER_ID);
54036 +
54037 +    /* build the FM guest partition IPC address */
54038 +    if (Sprint (p_Fm->fmModuleName, "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, p_Fm->guestId) != (p_Fm->guestId<10 ? 6:7))
54039 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
54040 +
54041 +    /* build the FM master partition IPC address */
54042 +    memset(p_Fm->fmIpcHandlerModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
54043 +    if (Sprint (p_Fm->fmIpcHandlerModuleName[0], "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, NCSW_MASTER_ID) != 6)
54044 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
54045 +
54046 +    for (i=0;i<e_FM_EV_DUMMY_LAST;i++)
54047 +        p_Fm->intrMng[i].f_Isr = UnimplementedIsr;
54048 +
54049 +    p_Fm->h_IpcSessions[0] = XX_IpcInitSession(p_Fm->fmIpcHandlerModuleName[0], p_Fm->fmModuleName);
54050 +    if (p_Fm->h_IpcSessions[0])
54051 +    {
54052 +        uint8_t                 isMasterAlive;
54053 +        t_FmIpcParams           ipcParams;
54054 +
54055 +        err = XX_IpcRegisterMsgHandler(p_Fm->fmModuleName, FmGuestHandleIpcMsgCB, p_Fm, FM_IPC_MAX_REPLY_SIZE);
54056 +        if (err)
54057 +            RETURN_ERROR(MAJOR, err, NO_MSG);
54058 +
54059 +        memset(&msg, 0, sizeof(msg));
54060 +        memset(&reply, 0, sizeof(reply));
54061 +        msg.msgId = FM_MASTER_IS_ALIVE;
54062 +        msg.msgBody[0] = p_Fm->guestId;
54063 +        replyLength = sizeof(uint32_t) + sizeof(uint8_t);
54064 +        do
54065 +        {
54066 +            blockingFlag = TRUE;
54067 +            if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
54068 +                                         (uint8_t*)&msg,
54069 +                                         sizeof(msg.msgId)+sizeof(p_Fm->guestId),
54070 +                                         (uint8_t*)&reply,
54071 +                                         &replyLength,
54072 +                                         IpcMsgCompletionCB,
54073 +                                         p_Fm)) != E_OK)
54074 +                REPORT_ERROR(MINOR, err, NO_MSG);
54075 +            while (blockingFlag) ;
54076 +            if (replyLength != (sizeof(uint32_t) + sizeof(uint8_t)))
54077 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
54078 +            isMasterAlive = *(uint8_t*)(reply.replyBody);
54079 +        } while (!isMasterAlive);
54080 +
54081 +        /* read FM parameters and save */
54082 +        memset(&msg, 0, sizeof(msg));
54083 +        memset(&reply, 0, sizeof(reply));
54084 +        msg.msgId = FM_GET_PARAMS;
54085 +        replyLength = sizeof(uint32_t) + sizeof(t_FmIpcParams);
54086 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
54087 +                                     (uint8_t*)&msg,
54088 +                                     sizeof(msg.msgId),
54089 +                                     (uint8_t*)&reply,
54090 +                                     &replyLength,
54091 +                                     NULL,
54092 +                                     NULL)) != E_OK)
54093 +            RETURN_ERROR(MAJOR, err, NO_MSG);
54094 +        if (replyLength != (sizeof(uint32_t) + sizeof(t_FmIpcParams)))
54095 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
54096 +        memcpy((uint8_t*)&ipcParams, reply.replyBody, sizeof(t_FmIpcParams));
54097 +
54098 +        p_Fm->p_FmStateStruct->fmClkFreq = ipcParams.fmClkFreq;
54099 +        p_Fm->p_FmStateStruct->fmMacClkFreq = ipcParams.fmMacClkFreq;
54100 +        p_Fm->p_FmStateStruct->revInfo.majorRev = ipcParams.majorRev;
54101 +        p_Fm->p_FmStateStruct->revInfo.minorRev = ipcParams.minorRev;
54102 +    }
54103 +    else
54104 +    {
54105 +        DBG(WARNING, ("FM Guest mode - without IPC"));
54106 +        if (!p_Fm->p_FmStateStruct->fmClkFreq)
54107 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("No fmClkFreq configured for guest without IPC"));
54108 +        if (p_Fm->baseAddr)
54109 +        {
54110 +            fman_get_revision(p_Fm->p_FmFpmRegs,
54111 +                              &p_Fm->p_FmStateStruct->revInfo.majorRev,
54112 +                              &p_Fm->p_FmStateStruct->revInfo.minorRev);
54113 +
54114 +        }
54115 +    }
54116 +
54117 +#if (DPAA_VERSION >= 11)
54118 +    p_Fm->partVSPBase = AllocVSPsForPartition(p_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
54119 +    if (p_Fm->partVSPBase == (uint8_t)(ILLEGAL_BASE))
54120 +        DBG(WARNING, ("partition VSPs allocation is FAILED"));
54121 +#endif /* (DPAA_VERSION >= 11) */
54122 +
54123 +    /* General FM driver initialization */
54124 +    if (p_Fm->baseAddr)
54125 +        p_Fm->fmMuramPhysBaseAddr =
54126 +            (uint64_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->baseAddr + FM_MM_MURAM)));
54127 +
54128 +    XX_Free(p_Fm->p_FmDriverParam);
54129 +    p_Fm->p_FmDriverParam = NULL;
54130 +
54131 +    if ((p_Fm->guestId == NCSW_MASTER_ID) ||
54132 +        (p_Fm->h_IpcSessions[0]))
54133 +    {
54134 +        FM_DisableRamsEcc(p_Fm);
54135 +        FmMuramClear(p_Fm->h_FmMuram);
54136 +        FM_EnableRamsEcc(p_Fm);
54137 +    }
54138 +
54139 +    return E_OK;
54140 +}
54141 +
54142 +static __inline__ enum fman_exceptions FmanExceptionTrans(e_FmExceptions exception)
54143 +{
54144 +    switch (exception) {
54145 +            case  e_FM_EX_DMA_BUS_ERROR:
54146 +                return E_FMAN_EX_DMA_BUS_ERROR;
54147 +            case  e_FM_EX_DMA_READ_ECC:
54148 +                return E_FMAN_EX_DMA_READ_ECC;
54149 +            case  e_FM_EX_DMA_SYSTEM_WRITE_ECC:
54150 +                return E_FMAN_EX_DMA_SYSTEM_WRITE_ECC;
54151 +            case  e_FM_EX_DMA_FM_WRITE_ECC:
54152 +                return E_FMAN_EX_DMA_FM_WRITE_ECC;
54153 +            case  e_FM_EX_FPM_STALL_ON_TASKS:
54154 +                return E_FMAN_EX_FPM_STALL_ON_TASKS;
54155 +            case  e_FM_EX_FPM_SINGLE_ECC:
54156 +                return E_FMAN_EX_FPM_SINGLE_ECC;
54157 +            case  e_FM_EX_FPM_DOUBLE_ECC:
54158 +                return E_FMAN_EX_FPM_DOUBLE_ECC;
54159 +            case  e_FM_EX_QMI_SINGLE_ECC:
54160 +                return E_FMAN_EX_QMI_SINGLE_ECC;
54161 +            case  e_FM_EX_QMI_DOUBLE_ECC:
54162 +                return E_FMAN_EX_QMI_DOUBLE_ECC;
54163 +            case  e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:
54164 +                return E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID;
54165 +            case  e_FM_EX_BMI_LIST_RAM_ECC:
54166 +                return E_FMAN_EX_BMI_LIST_RAM_ECC;
54167 +            case  e_FM_EX_BMI_STORAGE_PROFILE_ECC:
54168 +                return E_FMAN_EX_BMI_STORAGE_PROFILE_ECC;
54169 +            case  e_FM_EX_BMI_STATISTICS_RAM_ECC:
54170 +                return E_FMAN_EX_BMI_STATISTICS_RAM_ECC;
54171 +            case  e_FM_EX_BMI_DISPATCH_RAM_ECC:
54172 +                return E_FMAN_EX_BMI_DISPATCH_RAM_ECC;
54173 +            case  e_FM_EX_IRAM_ECC:
54174 +                return E_FMAN_EX_IRAM_ECC;
54175 +            case  e_FM_EX_MURAM_ECC:
54176 +                return E_FMAN_EX_MURAM_ECC;
54177 +            default:
54178 +                return E_FMAN_EX_DMA_BUS_ERROR;
54179 +        }
54180 +}
54181 +
54182 +uint8_t SwPortIdToHwPortId(e_FmPortType type, uint8_t relativePortId, uint8_t majorRev, uint8_t minorRev)
54183 +{
54184 +       switch (type)
54185 +       {
54186 +               case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
54187 +               case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
54188 +                       CHECK_PORT_ID_OH_PORTS(relativePortId);
54189 +                       return (uint8_t)(BASE_OH_PORTID + (relativePortId));
54190 +               case (e_FM_PORT_TYPE_RX):
54191 +                       CHECK_PORT_ID_1G_RX_PORTS(relativePortId);
54192 +                       return (uint8_t)(BASE_1G_RX_PORTID + (relativePortId));
54193 +               case (e_FM_PORT_TYPE_RX_10G):
54194 +                       /* The 10G port in T1024 (FMan Version 6.4) is the first port.
54195 +                        * This is the reason why the 1G port offset is used.
54196 +                        */
54197 +                       if (majorRev == 6 && minorRev == 4)
54198 +                       {
54199 +                               CHECK_PORT_ID_1G_RX_PORTS(relativePortId);
54200 +                               return (uint8_t)(BASE_1G_RX_PORTID + (relativePortId));
54201 +                       }
54202 +                       else
54203 +                       {
54204 +                               CHECK_PORT_ID_10G_RX_PORTS(relativePortId);
54205 +                               return (uint8_t)(BASE_10G_RX_PORTID + (relativePortId));
54206 +                       }
54207 +               case (e_FM_PORT_TYPE_TX):
54208 +                       CHECK_PORT_ID_1G_TX_PORTS(relativePortId);
54209 +                       return (uint8_t)(BASE_1G_TX_PORTID + (relativePortId));
54210 +               case (e_FM_PORT_TYPE_TX_10G):
54211 +                       /* The 10G port in T1024 (FMan Version 6.4) is the first port.
54212 +                        * This is the reason why the 1G port offset is used.
54213 +                        */
54214 +                       if (majorRev == 6 && minorRev == 4)
54215 +                       {
54216 +                               CHECK_PORT_ID_1G_TX_PORTS(relativePortId);
54217 +                               return (uint8_t)(BASE_1G_TX_PORTID + (relativePortId));
54218 +                       }
54219 +                       else
54220 +                       {
54221 +                               CHECK_PORT_ID_10G_TX_PORTS(relativePortId);
54222 +                               return (uint8_t)(BASE_10G_TX_PORTID + (relativePortId));
54223 +                       }
54224 +               default:
54225 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal port type"));
54226 +                       return 0;
54227 +       }
54228 +}
54229 +
54230 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
54231 +t_Error FmDumpPortRegs (t_Handle h_Fm, uint8_t hardwarePortId)
54232 +{
54233 +    t_Fm            *p_Fm = (t_Fm *)h_Fm;
54234 +
54235 +    DECLARE_DUMP;
54236 +
54237 +    ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
54238 +
54239 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54240 +    SANITY_CHECK_RETURN_ERROR(((p_Fm->guestId == NCSW_MASTER_ID) ||
54241 +                               p_Fm->baseAddr), E_INVALID_OPERATION);
54242 +
54243 +    DUMP_TITLE(&p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId-1], ("fmbm_pp for port %u", (hardwarePortId)));
54244 +    DUMP_MEMORY(&p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId-1], sizeof(uint32_t));
54245 +
54246 +    DUMP_TITLE(&p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId-1], ("fmbm_pfs for port %u", (hardwarePortId )));
54247 +    DUMP_MEMORY(&p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId-1], sizeof(uint32_t));
54248 +
54249 +    DUMP_TITLE(&p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId-1], ("fmbm_spliodn for port %u", (hardwarePortId)));
54250 +    DUMP_MEMORY(&p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId-1], sizeof(uint32_t));
54251 +
54252 +    DUMP_TITLE(&p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId], ("fmfp_ps for port %u", (hardwarePortId)));
54253 +    DUMP_MEMORY(&p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId], sizeof(uint32_t));
54254 +
54255 +    DUMP_TITLE(&p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId/2], ("fmdmplr for port %u", (hardwarePortId)));
54256 +    DUMP_MEMORY(&p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId/2], sizeof(uint32_t));
54257 +
54258 +    return E_OK;
54259 +}
54260 +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
54261 +
54262 +
54263 +/*****************************************************************************/
54264 +/*                      API Init unit functions                              */
54265 +/*****************************************************************************/
54266 +t_Handle FM_Config(t_FmParams *p_FmParam)
54267 +{
54268 +    t_Fm                *p_Fm;
54269 +    uint8_t             i;
54270 +    uintptr_t           baseAddr;
54271 +
54272 +    SANITY_CHECK_RETURN_VALUE(p_FmParam, E_NULL_POINTER, NULL);
54273 +    SANITY_CHECK_RETURN_VALUE(((p_FmParam->firmware.p_Code && p_FmParam->firmware.size) ||
54274 +                               (!p_FmParam->firmware.p_Code && !p_FmParam->firmware.size)),
54275 +                              E_INVALID_VALUE, NULL);
54276 +
54277 +    baseAddr = p_FmParam->baseAddr;
54278 +
54279 +    /* Allocate FM structure */
54280 +    p_Fm = (t_Fm *) XX_Malloc(sizeof(t_Fm));
54281 +    if (!p_Fm)
54282 +    {
54283 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM driver structure"));
54284 +        return NULL;
54285 +    }
54286 +    memset(p_Fm, 0, sizeof(t_Fm));
54287 +
54288 +    p_Fm->p_FmStateStruct = (t_FmStateStruct *) XX_Malloc(sizeof(t_FmStateStruct));
54289 +    if (!p_Fm->p_FmStateStruct)
54290 +    {
54291 +        XX_Free(p_Fm);
54292 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Status structure"));
54293 +        return NULL;
54294 +    }
54295 +    memset(p_Fm->p_FmStateStruct, 0, sizeof(t_FmStateStruct));
54296 +
54297 +    /* Initialize FM parameters which will be kept by the driver */
54298 +    p_Fm->p_FmStateStruct->fmId = p_FmParam->fmId;
54299 +    p_Fm->guestId               = p_FmParam->guestId;
54300 +
54301 +    for (i=0; i<FM_MAX_NUM_OF_HW_PORT_IDS; i++)
54302 +        p_Fm->p_FmStateStruct->portsTypes[i] = e_FM_PORT_TYPE_DUMMY;
54303 +
54304 +    /* Allocate the FM driver's parameters structure */
54305 +    p_Fm->p_FmDriverParam = (struct fman_cfg *)XX_Malloc(sizeof(struct fman_cfg));
54306 +    if (!p_Fm->p_FmDriverParam)
54307 +    {
54308 +        XX_Free(p_Fm->p_FmStateStruct);
54309 +        XX_Free(p_Fm);
54310 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM driver parameters"));
54311 +        return NULL;
54312 +    }
54313 +    memset(p_Fm->p_FmDriverParam, 0, sizeof(struct fman_cfg));
54314 +
54315 +#if (DPAA_VERSION >= 11)
54316 +    p_Fm->p_FmSp = (t_FmSp *)XX_Malloc(sizeof(t_FmSp));
54317 +    if (!p_Fm->p_FmSp)
54318 +    {
54319 +        XX_Free(p_Fm->p_FmDriverParam);
54320 +        XX_Free(p_Fm->p_FmStateStruct);
54321 +        XX_Free(p_Fm);
54322 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("allocation for internal data structure failed"));
54323 +        return NULL;
54324 +    }
54325 +    memset(p_Fm->p_FmSp, 0, sizeof(t_FmSp));
54326 +
54327 +    for (i=0; i<FM_VSP_MAX_NUM_OF_ENTRIES; i++)
54328 +        p_Fm->p_FmSp->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
54329 +#endif /* (DPAA_VERSION >= 11) */
54330 +
54331 +    /* Initialize FM parameters which will be kept by the driver */
54332 +    p_Fm->p_FmStateStruct->fmId                 = p_FmParam->fmId;
54333 +    p_Fm->h_FmMuram                             = p_FmParam->h_FmMuram;
54334 +    p_Fm->h_App                                 = p_FmParam->h_App;
54335 +    p_Fm->p_FmStateStruct->fmClkFreq            = p_FmParam->fmClkFreq;
54336 +    p_Fm->p_FmStateStruct->fmMacClkFreq         = p_FmParam->fmClkFreq / ((!p_FmParam->fmMacClkRatio)? 2: p_FmParam->fmMacClkRatio);
54337 +    p_Fm->f_Exception                           = p_FmParam->f_Exception;
54338 +    p_Fm->f_BusError                            = p_FmParam->f_BusError;
54339 +    p_Fm->p_FmFpmRegs = (struct fman_fpm_regs *)UINT_TO_PTR(baseAddr + FM_MM_FPM);
54340 +    p_Fm->p_FmBmiRegs = (struct fman_bmi_regs *)UINT_TO_PTR(baseAddr + FM_MM_BMI);
54341 +    p_Fm->p_FmQmiRegs = (struct fman_qmi_regs *)UINT_TO_PTR(baseAddr + FM_MM_QMI);
54342 +    p_Fm->p_FmDmaRegs = (struct fman_dma_regs *)UINT_TO_PTR(baseAddr + FM_MM_DMA);
54343 +    p_Fm->p_FmRegs       = (struct fman_regs *)UINT_TO_PTR(baseAddr + FM_MM_BMI);
54344 +    p_Fm->baseAddr                              = baseAddr;
54345 +    p_Fm->p_FmStateStruct->irq                  = p_FmParam->irq;
54346 +    p_Fm->p_FmStateStruct->errIrq               = p_FmParam->errIrq;
54347 +    p_Fm->hcPortInitialized                     = FALSE;
54348 +    p_Fm->independentMode                       = FALSE;
54349 +
54350 +    p_Fm->h_Spinlock = XX_InitSpinlock();
54351 +    if (!p_Fm->h_Spinlock)
54352 +    {
54353 +        XX_Free(p_Fm->p_FmDriverParam);
54354 +        XX_Free(p_Fm->p_FmStateStruct);
54355 +        XX_Free(p_Fm);
54356 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("can't allocate spinlock!"));
54357 +        return NULL;
54358 +    }
54359 +
54360 +#if (DPAA_VERSION >= 11)
54361 +    p_Fm->partVSPBase   = p_FmParam->partVSPBase;
54362 +    p_Fm->partNumOfVSPs = p_FmParam->partNumOfVSPs;
54363 +    p_Fm->vspBaseAddr = p_FmParam->vspBaseAddr;
54364 +#endif /* (DPAA_VERSION >= 11) */
54365 +
54366 +    fman_defconfig(p_Fm->p_FmDriverParam,
54367 +                  !!(p_Fm->guestId == NCSW_MASTER_ID));
54368 +/* overide macros dependent parameters */
54369 +#ifdef FM_PEDANTIC_DMA
54370 +    p_Fm->p_FmDriverParam->pedantic_dma = TRUE;
54371 +    p_Fm->p_FmDriverParam->dma_aid_override = TRUE;
54372 +#endif /* FM_PEDANTIC_DMA */
54373 +#ifndef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
54374 +    p_Fm->p_FmDriverParam->qmi_deq_option_support = TRUE;
54375 +#endif /* !FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
54376 +
54377 +    p_Fm->p_FmStateStruct->ramsEccEnable        = FALSE;
54378 +    p_Fm->p_FmStateStruct->extraFifoPoolSize    = 0;
54379 +    p_Fm->p_FmStateStruct->exceptions           = DEFAULT_exceptions;
54380 +    p_Fm->resetOnInit                          = DEFAULT_resetOnInit;
54381 +    p_Fm->f_ResetOnInitOverride                = DEFAULT_resetOnInitOverrideCallback;
54382 +    p_Fm->fwVerify                             = DEFAULT_VerifyUcode;
54383 +    p_Fm->firmware.size                        = p_FmParam->firmware.size;
54384 +    if (p_Fm->firmware.size)
54385 +    {
54386 +        p_Fm->firmware.p_Code = (uint32_t *)XX_Malloc(p_Fm->firmware.size);
54387 +        if (!p_Fm->firmware.p_Code)
54388 +        {
54389 +            XX_FreeSpinlock(p_Fm->h_Spinlock);
54390 +            XX_Free(p_Fm->p_FmStateStruct);
54391 +            XX_Free(p_Fm->p_FmDriverParam);
54392 +            XX_Free(p_Fm);
54393 +            REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM firmware code"));
54394 +            return NULL;
54395 +        }
54396 +        memcpy(p_Fm->firmware.p_Code, p_FmParam->firmware.p_Code ,p_Fm->firmware.size);
54397 +    }
54398 +
54399 +    if (p_Fm->guestId != NCSW_MASTER_ID)
54400 +        return p_Fm;
54401 +
54402 +    /* read revision */
54403 +    /* Chip dependent, will be configured in Init */
54404 +    fman_get_revision(p_Fm->p_FmFpmRegs,
54405 +                      &p_Fm->p_FmStateStruct->revInfo.majorRev,
54406 +                      &p_Fm->p_FmStateStruct->revInfo.minorRev);
54407 +
54408 +#ifdef FM_AID_MODE_NO_TNUM_SW005
54409 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
54410 +        p_Fm->p_FmDriverParam->dma_aid_mode = e_FM_DMA_AID_OUT_PORT_ID;
54411 +#endif /* FM_AID_MODE_NO_TNUM_SW005 */
54412 +#ifndef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
54413 +   if (p_Fm->p_FmStateStruct->revInfo.majorRev != 4)
54414 +        p_Fm->p_FmDriverParam->qmi_def_tnums_thresh = QMI_DEF_TNUMS_THRESH;
54415 +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
54416 +
54417 +        p_Fm->p_FmStateStruct->totalFifoSize        = 0;
54418 +        p_Fm->p_FmStateStruct->totalNumOfTasks      =
54419 +            DEFAULT_totalNumOfTasks(p_Fm->p_FmStateStruct->revInfo.majorRev,
54420 +                                    p_Fm->p_FmStateStruct->revInfo.minorRev);
54421 +
54422 +#ifdef FM_HAS_TOTAL_DMAS
54423 +        p_Fm->p_FmStateStruct->maxNumOfOpenDmas     = BMI_MAX_NUM_OF_DMAS;
54424 +#endif /* FM_HAS_TOTAL_DMAS */
54425 +#if (DPAA_VERSION < 11)
54426 +        p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer        = DEFAULT_dmaCommQLow;
54427 +        p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer       = DEFAULT_dmaCommQHigh;
54428 +        p_Fm->p_FmDriverParam->dma_cam_num_of_entries        = DEFAULT_dmaCamNumOfEntries;
54429 +        p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer      = DEFAULT_dmaReadIntBufLow;
54430 +        p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer     = DEFAULT_dmaReadIntBufHigh;
54431 +        p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer     = DEFAULT_dmaWriteIntBufLow;
54432 +        p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer    = DEFAULT_dmaWriteIntBufHigh;
54433 +        p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats       = DEFAULT_axiDbgNumOfBeats;
54434 +#endif /* (DPAA_VERSION < 11) */
54435 +#ifdef FM_NO_TNUM_AGING
54436 +    p_Fm->p_FmDriverParam->tnum_aging_period = 0;
54437 +#endif
54438 +    p_Fm->tnumAgingPeriod = p_Fm->p_FmDriverParam->tnum_aging_period;
54439 +
54440 +   return p_Fm;
54441 +}
54442 +
54443 +/**************************************************************************//**
54444 + @Function      FM_Init
54445 +
54446 + @Description   Initializes the FM module
54447 +
54448 + @Param[in]     h_Fm - FM module descriptor
54449 +
54450 + @Return        E_OK on success; Error code otherwise.
54451 +*//***************************************************************************/
54452 +t_Error FM_Init(t_Handle h_Fm)
54453 +{
54454 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
54455 +    struct fman_cfg         *p_FmDriverParam = NULL;
54456 +    t_Error                 err = E_OK;
54457 +    int                     i;
54458 +    t_FmRevisionInfo        revInfo;
54459 +    struct fman_rg          fman_rg;
54460 +
54461 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54462 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54463 +
54464 +    fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
54465 +    fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
54466 +    fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
54467 +    fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
54468 +
54469 +    p_Fm->p_FmStateStruct->count1MicroBit = FM_TIMESTAMP_1_USEC_BIT;
54470 +    p_Fm->p_FmDriverParam->num_of_fman_ctrl_evnt_regs = FM_NUM_OF_FMAN_CTRL_EVENT_REGS;
54471 +
54472 +    if (p_Fm->guestId != NCSW_MASTER_ID)
54473 +        return InitGuestMode(p_Fm);
54474 +
54475 +    /* if user didn't configured totalFifoSize - (totalFifoSize=0) we configure default
54476 +    * according to chip. otherwise, we use user's configuration.
54477 +    */
54478 +    if (p_Fm->p_FmStateStruct->totalFifoSize == 0)
54479 +        p_Fm->p_FmStateStruct->totalFifoSize = DEFAULT_totalFifoSize(p_Fm->p_FmStateStruct->revInfo.majorRev,
54480 +                                                                     p_Fm->p_FmStateStruct->revInfo.minorRev);
54481 +
54482 +    CHECK_INIT_PARAMETERS(p_Fm, CheckFmParameters);
54483 +
54484 +    p_FmDriverParam = p_Fm->p_FmDriverParam;
54485 +
54486 +    FM_GetRevision(p_Fm, &revInfo);
54487 +
54488 +    /* clear revision-dependent non existing exception */
54489 +#ifdef FM_NO_DISPATCH_RAM_ECC
54490 +    if ((revInfo.majorRev != 4) &&
54491 +        (revInfo.majorRev < 6))
54492 +        p_Fm->p_FmStateStruct->exceptions &= ~FM_EX_BMI_DISPATCH_RAM_ECC;
54493 +#endif /* FM_NO_DISPATCH_RAM_ECC */
54494 +
54495 +#ifdef FM_QMI_NO_ECC_EXCEPTIONS
54496 +    if (revInfo.majorRev == 4)
54497 +        p_Fm->p_FmStateStruct->exceptions &= ~(FM_EX_QMI_SINGLE_ECC | FM_EX_QMI_DOUBLE_ECC);
54498 +#endif /* FM_QMI_NO_ECC_EXCEPTIONS */
54499 +
54500 +#ifdef FM_QMI_NO_SINGLE_ECC_EXCEPTION
54501 +    if (revInfo.majorRev >= 6)
54502 +       p_Fm->p_FmStateStruct->exceptions &= ~FM_EX_QMI_SINGLE_ECC;
54503 +#endif /* FM_QMI_NO_SINGLE_ECC_EXCEPTION */
54504 +
54505 +    FmMuramClear(p_Fm->h_FmMuram);
54506 +
54507 +    /* clear CPG */
54508 +    IOMemSet32(UINT_TO_PTR(p_Fm->baseAddr + FM_MM_CGP), 0, FM_PORT_NUM_OF_CONGESTION_GRPS);
54509 +
54510 +    /* add to the default exceptions the user's definitions */
54511 +    p_Fm->p_FmStateStruct->exceptions |= p_Fm->userSetExceptions;
54512 +
54513 +    /* Reset the FM if required */
54514 +    if (p_Fm->resetOnInit)
54515 +    {
54516 +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
54517 +        if ((err = FwNotResetErratumBugzilla6173WA(p_Fm)) != E_OK)
54518 +            RETURN_ERROR(MAJOR, err, NO_MSG);
54519 +#else  /* not FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
54520 +
54521 +        if (p_Fm->f_ResetOnInitOverride)
54522 +        {
54523 +               /* Perform user specific FMan reset */
54524 +               p_Fm->f_ResetOnInitOverride(h_Fm);
54525 +        }
54526 +        else
54527 +        {
54528 +               /* Perform FMan reset */
54529 +               FmReset(h_Fm);
54530 +        }
54531 +
54532 +        if (fman_is_qmi_halt_not_busy_state(p_Fm->p_FmQmiRegs))
54533 +        {
54534 +            fman_resume(p_Fm->p_FmFpmRegs);
54535 +            XX_UDelay(100);
54536 +        }
54537 +#endif /* not FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
54538 +    }
54539 +
54540 +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
54541 +    if (!p_Fm->resetOnInit) /* Skip operations done in errata workaround */
54542 +    {
54543 +#endif /* FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
54544 +    /* Load FMan-Controller code to IRAM */
54545 +
54546 +    ClearIRam(p_Fm);
54547 +
54548 +    if (p_Fm->firmware.p_Code && (LoadFmanCtrlCode(p_Fm) != E_OK))
54549 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
54550 +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
54551 +    }
54552 +#endif /* FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
54553 +
54554 +#ifdef FM_CAPWAP_SUPPORT
54555 +    /* save first 256 byte in MURAM */
54556 +    p_Fm->resAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram, 256, 0));
54557 +    if (!p_Fm->resAddr)
54558 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for reserved Area failed"));
54559 +
54560 +    WRITE_BLOCK(UINT_TO_PTR(p_Fm->resAddr), 0, 256);
54561 +#endif /* FM_CAPWAP_SUPPORT */
54562 +
54563 +#if (DPAA_VERSION >= 11)
54564 +    p_Fm->partVSPBase = AllocVSPsForPartition(h_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
54565 +    if (p_Fm->partVSPBase == (uint8_t)(ILLEGAL_BASE))
54566 +        DBG(WARNING, ("partition VSPs allocation is FAILED"));
54567 +#endif /* (DPAA_VERSION >= 11) */
54568 +
54569 +    /* General FM driver initialization */
54570 +    p_Fm->fmMuramPhysBaseAddr =
54571 +        (uint64_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->baseAddr + FM_MM_MURAM)));
54572 +
54573 +    for (i=0;i<e_FM_EV_DUMMY_LAST;i++)
54574 +        p_Fm->intrMng[i].f_Isr = UnimplementedIsr;
54575 +    for (i=0;i<FM_NUM_OF_FMAN_CTRL_EVENT_REGS;i++)
54576 +        p_Fm->fmanCtrlIntr[i].f_Isr = UnimplementedFmanCtrlIsr;
54577 +
54578 +    p_FmDriverParam->exceptions = p_Fm->p_FmStateStruct->exceptions;
54579 +
54580 +    /**********************/
54581 +    /* Init DMA Registers */
54582 +    /**********************/
54583 +    err = InitFmDma(p_Fm);
54584 +    if (err != E_OK)
54585 +    {
54586 +        FreeInitResources(p_Fm);
54587 +        RETURN_ERROR(MAJOR, err, NO_MSG);
54588 +    }
54589 +
54590 +    /**********************/
54591 +    /* Init FPM Registers */
54592 +    /**********************/
54593 +    err = InitFmFpm(p_Fm);
54594 +    if (err != E_OK)
54595 +    {
54596 +        FreeInitResources(p_Fm);
54597 +        RETURN_ERROR(MAJOR, err, NO_MSG);
54598 +    }
54599 +
54600 +    /* define common resources */
54601 +    /* allocate MURAM for FIFO according to total size */
54602 +    p_Fm->fifoBaseAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram,
54603 +                                                       p_Fm->p_FmStateStruct->totalFifoSize,
54604 +                                                       BMI_FIFO_ALIGN));
54605 +    if (!p_Fm->fifoBaseAddr)
54606 +    {
54607 +        FreeInitResources(p_Fm);
54608 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for BMI FIFO failed"));
54609 +    }
54610 +
54611 +    p_FmDriverParam->fifo_base_addr = (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->fifoBaseAddr)) - p_Fm->fmMuramPhysBaseAddr);
54612 +    p_FmDriverParam->total_fifo_size = p_Fm->p_FmStateStruct->totalFifoSize;
54613 +    p_FmDriverParam->total_num_of_tasks = p_Fm->p_FmStateStruct->totalNumOfTasks;
54614 +    p_FmDriverParam->clk_freq = p_Fm->p_FmStateStruct->fmClkFreq;
54615 +
54616 +    /**********************/
54617 +    /* Init BMI Registers */
54618 +    /**********************/
54619 +    err = InitFmBmi(p_Fm);
54620 +    if (err != E_OK)
54621 +    {
54622 +        FreeInitResources(p_Fm);
54623 +        RETURN_ERROR(MAJOR, err, NO_MSG);
54624 +    }
54625 +
54626 +    /**********************/
54627 +    /* Init QMI Registers */
54628 +    /**********************/
54629 +    err = InitFmQmi(p_Fm);
54630 +    if (err != E_OK)
54631 +    {
54632 +        FreeInitResources(p_Fm);
54633 +        RETURN_ERROR(MAJOR, err, NO_MSG);
54634 +    }
54635 +
54636 +    /* build the FM master partition IPC address */
54637 +    if (Sprint (p_Fm->fmModuleName, "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, NCSW_MASTER_ID) != 6)
54638 +    {
54639 +        FreeInitResources(p_Fm);
54640 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
54641 +    }
54642 +
54643 +    err = XX_IpcRegisterMsgHandler(p_Fm->fmModuleName, FmHandleIpcMsgCB, p_Fm, FM_IPC_MAX_REPLY_SIZE);
54644 +    if (err)
54645 +    {
54646 +        FreeInitResources(p_Fm);
54647 +        RETURN_ERROR(MAJOR, err, NO_MSG);
54648 +    }
54649 +
54650 +    /* Register the FM interrupts handlers */
54651 +    if (p_Fm->p_FmStateStruct->irq != NO_IRQ)
54652 +    {
54653 +        XX_SetIntr(p_Fm->p_FmStateStruct->irq, FM_EventIsr, p_Fm);
54654 +        XX_EnableIntr(p_Fm->p_FmStateStruct->irq);
54655 +    }
54656 +
54657 +    if (p_Fm->p_FmStateStruct->errIrq != NO_IRQ)
54658 +    {
54659 +        XX_SetIntr(p_Fm->p_FmStateStruct->errIrq, (void (*) (t_Handle))FM_ErrorIsr, p_Fm);
54660 +        XX_EnableIntr(p_Fm->p_FmStateStruct->errIrq);
54661 +    }
54662 +
54663 +    err = (t_Error)fman_enable(&fman_rg , p_FmDriverParam);
54664 +    if (err != E_OK)
54665 +        return err; /* FIXME */
54666 +
54667 +    EnableTimeStamp(p_Fm);
54668 +
54669 +    if (p_Fm->firmware.p_Code)
54670 +    {
54671 +        XX_Free(p_Fm->firmware.p_Code);
54672 +        p_Fm->firmware.p_Code = NULL;
54673 +    }
54674 +
54675 +    XX_Free(p_Fm->p_FmDriverParam);
54676 +    p_Fm->p_FmDriverParam = NULL;
54677 +
54678 +    return E_OK;
54679 +}
54680 +
54681 +/**************************************************************************//**
54682 + @Function      FM_Free
54683 +
54684 + @Description   Frees all resources that were assigned to FM module.
54685 +
54686 +                Calling this routine invalidates the descriptor.
54687 +
54688 + @Param[in]     h_Fm - FM module descriptor
54689 +
54690 + @Return        E_OK on success; Error code otherwise.
54691 +*//***************************************************************************/
54692 +t_Error FM_Free(t_Handle h_Fm)
54693 +{
54694 +    t_Fm    *p_Fm = (t_Fm*)h_Fm;
54695 +    struct fman_rg          fman_rg;
54696 +
54697 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54698 +
54699 +    fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
54700 +    fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
54701 +    fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
54702 +    fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
54703 +
54704 +    if (p_Fm->guestId != NCSW_MASTER_ID)
54705 +    {
54706 +#if (DPAA_VERSION >= 11)
54707 +        FreeVSPsForPartition(h_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
54708 +
54709 +        if (p_Fm->p_FmSp)
54710 +        {
54711 +            XX_Free(p_Fm->p_FmSp);
54712 +            p_Fm->p_FmSp = NULL;
54713 +        }
54714 +#endif /* (DPAA_VERSION >= 11) */
54715 +
54716 +        if (p_Fm->fmModuleName[0] != 0)
54717 +            XX_IpcUnregisterMsgHandler(p_Fm->fmModuleName);
54718 +
54719 +        if (!p_Fm->recoveryMode)
54720 +            XX_Free(p_Fm->p_FmStateStruct);
54721 +
54722 +        XX_Free(p_Fm);
54723 +
54724 +        return E_OK;
54725 +    }
54726 +
54727 +    fman_free_resources(&fman_rg);
54728 +
54729 +    if ((p_Fm->guestId == NCSW_MASTER_ID) && (p_Fm->fmModuleName[0] != 0))
54730 +        XX_IpcUnregisterMsgHandler(p_Fm->fmModuleName);
54731 +
54732 +    if (p_Fm->p_FmStateStruct)
54733 +    {
54734 +        if (p_Fm->p_FmStateStruct->irq != NO_IRQ)
54735 +        {
54736 +            XX_DisableIntr(p_Fm->p_FmStateStruct->irq);
54737 +            XX_FreeIntr(p_Fm->p_FmStateStruct->irq);
54738 +        }
54739 +        if (p_Fm->p_FmStateStruct->errIrq != NO_IRQ)
54740 +        {
54741 +            XX_DisableIntr(p_Fm->p_FmStateStruct->errIrq);
54742 +            XX_FreeIntr(p_Fm->p_FmStateStruct->errIrq);
54743 +        }
54744 +    }
54745 +
54746 +#if (DPAA_VERSION >= 11)
54747 +    FreeVSPsForPartition(h_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
54748 +
54749 +    if (p_Fm->p_FmSp)
54750 +    {
54751 +        XX_Free(p_Fm->p_FmSp);
54752 +        p_Fm->p_FmSp = NULL;
54753 +    }
54754 +#endif /* (DPAA_VERSION >= 11) */
54755 +
54756 +    if (p_Fm->h_Spinlock)
54757 +        XX_FreeSpinlock(p_Fm->h_Spinlock);
54758 +
54759 +    if (p_Fm->p_FmDriverParam)
54760 +    {
54761 +        if (p_Fm->firmware.p_Code)
54762 +            XX_Free(p_Fm->firmware.p_Code);
54763 +        XX_Free(p_Fm->p_FmDriverParam);
54764 +        p_Fm->p_FmDriverParam = NULL;
54765 +    }
54766 +
54767 +    FreeInitResources(p_Fm);
54768 +
54769 +    if (!p_Fm->recoveryMode && p_Fm->p_FmStateStruct)
54770 +        XX_Free(p_Fm->p_FmStateStruct);
54771 +
54772 +    XX_Free(p_Fm);
54773 +
54774 +    return E_OK;
54775 +}
54776 +
54777 +/*************************************************/
54778 +/*       API Advanced Init unit functions        */
54779 +/*************************************************/
54780 +
54781 +t_Error FM_ConfigResetOnInit(t_Handle h_Fm, bool enable)
54782 +{
54783 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54784 +
54785 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54786 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54787 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54788 +
54789 +    p_Fm->resetOnInit = enable;
54790 +
54791 +    return E_OK;
54792 +}
54793 +
54794 +t_Error FM_ConfigResetOnInitOverrideCallback(t_Handle h_Fm, t_FmResetOnInitOverrideCallback *f_ResetOnInitOverride)
54795 +{
54796 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54797 +
54798 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54799 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54800 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54801 +
54802 +    p_Fm->f_ResetOnInitOverride = f_ResetOnInitOverride;
54803 +
54804 +    return E_OK;
54805 +}
54806 +
54807 +t_Error FM_ConfigTotalFifoSize(t_Handle h_Fm, uint32_t totalFifoSize)
54808 +{
54809 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54810 +
54811 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54812 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54813 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54814 +
54815 +    p_Fm->p_FmStateStruct->totalFifoSize = totalFifoSize;
54816 +
54817 +    return E_OK;
54818 +}
54819 +
54820 +t_Error FM_ConfigDmaCacheOverride(t_Handle h_Fm, e_FmDmaCacheOverride cacheOverride)
54821 +{
54822 +    t_Fm                            *p_Fm = (t_Fm*)h_Fm;
54823 +    enum fman_dma_cache_override    fsl_cache_override;
54824 +
54825 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54826 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54827 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54828 +
54829 +    FMAN_CACHE_OVERRIDE_TRANS(fsl_cache_override, cacheOverride)
54830 +    p_Fm->p_FmDriverParam->dma_cache_override = fsl_cache_override;
54831 +
54832 +    return E_OK;
54833 +}
54834 +
54835 +t_Error FM_ConfigDmaAidOverride(t_Handle h_Fm, bool aidOverride)
54836 +{
54837 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54838 +
54839 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54840 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54841 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54842 +
54843 +    p_Fm->p_FmDriverParam->dma_aid_override = aidOverride;
54844 +
54845 +    return E_OK;
54846 +}
54847 +
54848 +t_Error FM_ConfigDmaAidMode(t_Handle h_Fm, e_FmDmaAidMode aidMode)
54849 +{
54850 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
54851 +    enum fman_dma_aid_mode  fsl_aid_mode;
54852 +
54853 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54854 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54855 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54856 +
54857 +    FMAN_AID_MODE_TRANS(fsl_aid_mode, aidMode);
54858 +    p_Fm->p_FmDriverParam->dma_aid_mode = fsl_aid_mode;
54859 +
54860 +    return E_OK;
54861 +}
54862 +
54863 +t_Error FM_ConfigDmaAxiDbgNumOfBeats(t_Handle h_Fm, uint8_t axiDbgNumOfBeats)
54864 +{
54865 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54866 +
54867 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54868 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54869 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54870 +
54871 +#if (DPAA_VERSION >= 11)
54872 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
54873 +#else
54874 +    p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats = axiDbgNumOfBeats;
54875 +
54876 +    return E_OK;
54877 +#endif /* (DPAA_VERSION >= 11) */
54878 +}
54879 +
54880 +t_Error FM_ConfigDmaCamNumOfEntries(t_Handle h_Fm, uint8_t numOfEntries)
54881 +{
54882 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54883 +
54884 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54885 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54886 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54887 +
54888 +    p_Fm->p_FmDriverParam->dma_cam_num_of_entries = numOfEntries;
54889 +
54890 +    return E_OK;
54891 +}
54892 +
54893 +t_Error FM_ConfigDmaDbgCounter(t_Handle h_Fm, e_FmDmaDbgCntMode fmDmaDbgCntMode)
54894 +{
54895 +    t_Fm                        *p_Fm = (t_Fm*)h_Fm;
54896 +    enum fman_dma_dbg_cnt_mode  fsl_dma_dbg_cnt;
54897 +
54898 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54899 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54900 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54901 +
54902 +    FMAN_DMA_DBG_CNT_TRANS(fsl_dma_dbg_cnt, fmDmaDbgCntMode);
54903 +    p_Fm->p_FmDriverParam->dma_dbg_cnt_mode = fsl_dma_dbg_cnt;
54904 +
54905 +    return E_OK;
54906 +}
54907 +
54908 +t_Error FM_ConfigDmaStopOnBusErr(t_Handle h_Fm, bool stop)
54909 +{
54910 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54911 +
54912 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54913 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54914 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54915 +
54916 +    p_Fm->p_FmDriverParam->dma_stop_on_bus_error = stop;
54917 +
54918 +    return E_OK;
54919 +}
54920 +
54921 +t_Error FM_ConfigDmaEmergency(t_Handle h_Fm, t_FmDmaEmergency *p_Emergency)
54922 +{
54923 +    t_Fm                            *p_Fm = (t_Fm*)h_Fm;
54924 +    enum fman_dma_emergency_level   fsl_dma_emer;
54925 +
54926 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54927 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54928 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54929 +
54930 +    FMAN_DMA_EMER_TRANS(fsl_dma_emer, p_Emergency->emergencyLevel);
54931 +    p_Fm->p_FmDriverParam->dma_en_emergency = TRUE;
54932 +    p_Fm->p_FmDriverParam->dma_emergency_bus_select = (uint32_t)p_Emergency->emergencyBusSelect;
54933 +    p_Fm->p_FmDriverParam->dma_emergency_level = fsl_dma_emer;
54934 +
54935 +    return E_OK;
54936 +}
54937 +
54938 +t_Error FM_ConfigDmaEmergencySmoother(t_Handle h_Fm, uint32_t emergencyCnt)
54939 +{
54940 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54941 +
54942 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54943 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54944 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54945 +
54946 +    p_Fm->p_FmDriverParam->dma_en_emergency_smoother = TRUE;
54947 +    p_Fm->p_FmDriverParam->dma_emergency_switch_counter = emergencyCnt;
54948 +
54949 +    return E_OK;
54950 +}
54951 +
54952 +t_Error FM_ConfigDmaErr(t_Handle h_Fm, e_FmDmaErr dmaErr)
54953 +{
54954 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
54955 +    enum fman_dma_err   fsl_dma_err;
54956 +
54957 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54958 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54959 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54960 +
54961 +    FMAN_DMA_ERR_TRANS(fsl_dma_err, dmaErr);
54962 +    p_Fm->p_FmDriverParam->dma_err = fsl_dma_err;
54963 +
54964 +    return E_OK;
54965 +}
54966 +
54967 +t_Error FM_ConfigCatastrophicErr(t_Handle h_Fm, e_FmCatastrophicErr catastrophicErr)
54968 +{
54969 +    t_Fm                        *p_Fm = (t_Fm*)h_Fm;
54970 +    enum fman_catastrophic_err  fsl_catastrophic_err;
54971 +
54972 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54973 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54974 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54975 +
54976 +    FMAN_CATASTROPHIC_ERR_TRANS(fsl_catastrophic_err, catastrophicErr);
54977 +    p_Fm->p_FmDriverParam->catastrophic_err = fsl_catastrophic_err;
54978 +
54979 +    return E_OK;
54980 +}
54981 +
54982 +t_Error FM_ConfigEnableMuramTestMode(t_Handle h_Fm)
54983 +{
54984 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
54985 +
54986 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
54987 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
54988 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
54989 +
54990 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
54991 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
54992 +
54993 +    p_Fm->p_FmDriverParam->en_muram_test_mode = TRUE;
54994 +
54995 +    return E_OK;
54996 +}
54997 +
54998 +t_Error FM_ConfigEnableIramTestMode(t_Handle h_Fm)
54999 +{
55000 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55001 +
55002 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE );
55003 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55004 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55005 +
55006 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
55007 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
55008 +
55009 +    p_Fm->p_FmDriverParam->en_iram_test_mode = TRUE;
55010 +
55011 +    return E_OK;
55012 +}
55013 +
55014 +t_Error FM_ConfigHaltOnExternalActivation(t_Handle h_Fm, bool enable)
55015 +{
55016 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55017 +
55018 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55019 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55020 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55021 +
55022 +    p_Fm->p_FmDriverParam->halt_on_external_activ = enable;
55023 +
55024 +    return E_OK;
55025 +}
55026 +
55027 +t_Error FM_ConfigHaltOnUnrecoverableEccError(t_Handle h_Fm, bool enable)
55028 +{
55029 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55030 +
55031 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55032 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55033 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55034 +
55035 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
55036 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
55037 +
55038 +    p_Fm->p_FmDriverParam->halt_on_unrecov_ecc_err = enable;
55039 +
55040 +    return E_OK;
55041 +}
55042 +
55043 +t_Error FM_ConfigException(t_Handle h_Fm, e_FmExceptions exception, bool enable)
55044 +{
55045 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
55046 +    uint32_t            bitMask = 0;
55047 +
55048 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55049 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55050 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55051 +
55052 +    GET_EXCEPTION_FLAG(bitMask, exception);
55053 +    if (bitMask)
55054 +    {
55055 +        if (enable)
55056 +            p_Fm->userSetExceptions |= bitMask;
55057 +        else
55058 +            p_Fm->p_FmStateStruct->exceptions &= ~bitMask;
55059 +    }
55060 +    else
55061 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
55062 +
55063 +    return E_OK;
55064 +}
55065 +
55066 +t_Error FM_ConfigExternalEccRamsEnable(t_Handle h_Fm, bool enable)
55067 +{
55068 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
55069 +
55070 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55071 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55072 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55073 +
55074 +    p_Fm->p_FmDriverParam->external_ecc_rams_enable = enable;
55075 +
55076 +    return E_OK;
55077 +}
55078 +
55079 +t_Error FM_ConfigTnumAgingPeriod(t_Handle h_Fm, uint16_t tnumAgingPeriod)
55080 +{
55081 +    t_Fm             *p_Fm = (t_Fm*)h_Fm;
55082 +
55083 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55084 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55085 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55086 +
55087 +    p_Fm->p_FmDriverParam->tnum_aging_period = tnumAgingPeriod;
55088 +    p_Fm->tnumAgingPeriod = p_Fm->p_FmDriverParam->tnum_aging_period;
55089 +
55090 +    return E_OK;
55091 +}
55092 +
55093 +/****************************************************/
55094 +/*       Hidden-DEBUG Only API                      */
55095 +/****************************************************/
55096 +
55097 +t_Error FM_ConfigThresholds(t_Handle h_Fm, t_FmThresholds *p_FmThresholds)
55098 +{
55099 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55100 +
55101 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55102 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55103 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55104 +
55105 +    p_Fm->p_FmDriverParam->disp_limit_tsh  = p_FmThresholds->dispLimit;
55106 +    p_Fm->p_FmDriverParam->prs_disp_tsh    = p_FmThresholds->prsDispTh;
55107 +    p_Fm->p_FmDriverParam->plcr_disp_tsh   = p_FmThresholds->plcrDispTh;
55108 +    p_Fm->p_FmDriverParam->kg_disp_tsh     = p_FmThresholds->kgDispTh;
55109 +    p_Fm->p_FmDriverParam->bmi_disp_tsh    = p_FmThresholds->bmiDispTh;
55110 +    p_Fm->p_FmDriverParam->qmi_enq_disp_tsh = p_FmThresholds->qmiEnqDispTh;
55111 +    p_Fm->p_FmDriverParam->qmi_deq_disp_tsh = p_FmThresholds->qmiDeqDispTh;
55112 +    p_Fm->p_FmDriverParam->fm_ctl1_disp_tsh = p_FmThresholds->fmCtl1DispTh;
55113 +    p_Fm->p_FmDriverParam->fm_ctl2_disp_tsh = p_FmThresholds->fmCtl2DispTh;
55114 +
55115 +    return E_OK;
55116 +}
55117 +
55118 +t_Error FM_ConfigDmaSosEmergencyThreshold(t_Handle h_Fm, uint32_t dmaSosEmergency)
55119 +{
55120 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55121 +
55122 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55123 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55124 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55125 +
55126 +    p_Fm->p_FmDriverParam->dma_sos_emergency = dmaSosEmergency;
55127 +
55128 +    return E_OK;
55129 +}
55130 +
55131 +t_Error FM_ConfigDmaWriteBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds)
55132 +
55133 +{
55134 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55135 +
55136 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55137 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55138 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55139 +
55140 +#if (DPAA_VERSION >= 11)
55141 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
55142 +#else
55143 +    p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer = p_FmDmaThresholds->assertEmergency;
55144 +    p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer  = p_FmDmaThresholds->clearEmergency;
55145 +
55146 +    return E_OK;
55147 +#endif
55148 +}
55149 +
55150 +t_Error FM_ConfigDmaCommQThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds)
55151 +{
55152 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55153 +
55154 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55155 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55156 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55157 +
55158 +    p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer    = p_FmDmaThresholds->assertEmergency;
55159 +    p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer     = p_FmDmaThresholds->clearEmergency;
55160 +
55161 +    return E_OK;
55162 +}
55163 +
55164 +t_Error FM_ConfigDmaReadBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds)
55165 +{
55166 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55167 +
55168 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55169 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55170 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55171 +
55172 +#if (DPAA_VERSION >= 11)
55173 +    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
55174 +#else
55175 +    p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer   = p_FmDmaThresholds->clearEmergency;
55176 +    p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer  = p_FmDmaThresholds->assertEmergency;
55177 +
55178 +    return E_OK;
55179 +#endif
55180 +}
55181 +
55182 +t_Error FM_ConfigDmaWatchdog(t_Handle h_Fm, uint32_t watchdogValue)
55183 +{
55184 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
55185 +
55186 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55187 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55188 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55189 +
55190 +    p_Fm->p_FmDriverParam->dma_watchdog = watchdogValue;
55191 +
55192 +    return E_OK;
55193 +}
55194 +
55195 +t_Error FM_ConfigEnableCounters(t_Handle h_Fm)
55196 +{
55197 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
55198 +
55199 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55200 +    SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55201 +UNUSED(p_Fm);
55202 +
55203 +    return E_OK;
55204 +}
55205 +
55206 +t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_Params)
55207 +{
55208 +       t_Fm* p_Fm = (t_Fm*)h_Fm;
55209 +       if (p_Params->setParams.type & UPDATE_FM_CLD)
55210 +       {
55211 +               WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_cld, GET_UINT32(
55212 +                               p_Fm->p_FmFpmRegs->fm_cld) | 0x00000800);
55213 +       }
55214 +       if (p_Params->setParams.type & CLEAR_IRAM_READY)
55215 +       {
55216 +           t_FMIramRegs *p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
55217 +               WRITE_UINT32(p_Iram->iready,GET_UINT32(p_Iram->iready) & ~IRAM_READY);
55218 +       }
55219 +       if (p_Params->setParams.type & UPDATE_FPM_EXTC)
55220 +               WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_extc,0x80000000);
55221 +       if (p_Params->setParams.type & UPDATE_FPM_EXTC_CLEAR)
55222 +               WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_extc,0x00800000);
55223 +       if (p_Params->setParams.type & UPDATE_FPM_BRKC_SLP)
55224 +       {
55225 +               if (p_Params->setParams.sleep)
55226 +                       WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc, GET_UINT32(
55227 +                               p_Fm->p_FmFpmRegs->fmfp_brkc) | FPM_BRKC_SLP);
55228 +               else
55229 +                       WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc, GET_UINT32(
55230 +                               p_Fm->p_FmFpmRegs->fmfp_brkc) & ~FPM_BRKC_SLP);
55231 +       }
55232 +       if (p_Params->getParams.type & GET_FM_CLD)
55233 +               p_Params->getParams.fm_cld = GET_UINT32(p_Fm->p_FmFpmRegs->fm_cld);
55234 +       if (p_Params->getParams.type & GET_FMQM_GS)
55235 +               p_Params->getParams.fmqm_gs = GET_UINT32(p_Fm->p_FmQmiRegs->fmqm_gs);
55236 +       if (p_Params->getParams.type & GET_FM_NPI)
55237 +               p_Params->getParams.fm_npi = GET_UINT32(p_Fm->p_FmFpmRegs->fm_npi);
55238 +       if (p_Params->getParams.type & GET_FMFP_EXTC)
55239 +               p_Params->getParams.fmfp_extc = GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_extc);
55240 +       return E_OK;
55241 +}
55242 +
55243 +
55244 +/****************************************************/
55245 +/*       API Run-time Control uint functions        */
55246 +/****************************************************/
55247 +void FM_EventIsr(t_Handle h_Fm)
55248 +{
55249 +#define FM_M_CALL_1G_MAC_ISR(_id)    \
55250 +    {                                \
55251 +        if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].guestId)    \
55252 +            SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id), pending);                 \
55253 +        else                                                                                        \
55254 +            p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].h_SrcHandle);\
55255 +    }
55256 +#define FM_M_CALL_10G_MAC_ISR(_id)   \
55257 +    {                                \
55258 +        if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].guestId)    \
55259 +            SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id), pending);                 \
55260 +        else                                                                                         \
55261 +            p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].h_SrcHandle);\
55262 +    }
55263 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
55264 +    uint32_t                pending, event;
55265 +    struct fman_fpm_regs *fpm_rg;
55266 +
55267 +    SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
55268 +    SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55269 +    SANITY_CHECK_RETURN((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55270 +
55271 +    fpm_rg = p_Fm->p_FmFpmRegs;
55272 +
55273 +    /* normal interrupts */
55274 +    pending = fman_get_normal_pending(fpm_rg);
55275 +    if (!pending)
55276 +        return;
55277 +    if (pending & INTR_EN_WAKEUP) // this is a wake up from sleep interrupt
55278 +    {
55279 +        t_FmGetSetParams fmGetSetParams;
55280 +        memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
55281 +        fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
55282 +        fmGetSetParams.setParams.sleep = 0;
55283 +        FmGetSetParams(h_Fm, &fmGetSetParams);
55284 +    }
55285 +    if (pending & INTR_EN_QMI)
55286 +        QmiEvent(p_Fm);
55287 +    if (pending & INTR_EN_PRS)
55288 +        p_Fm->intrMng[e_FM_EV_PRS].f_Isr(p_Fm->intrMng[e_FM_EV_PRS].h_SrcHandle);
55289 +    if (pending & INTR_EN_PLCR)
55290 +        p_Fm->intrMng[e_FM_EV_PLCR].f_Isr(p_Fm->intrMng[e_FM_EV_PLCR].h_SrcHandle);
55291 +    if (pending & INTR_EN_TMR)
55292 +            p_Fm->intrMng[e_FM_EV_TMR].f_Isr(p_Fm->intrMng[e_FM_EV_TMR].h_SrcHandle);
55293 +
55294 +    /* MAC events may belong to different partitions */
55295 +    if (pending & INTR_EN_1G_MAC0)
55296 +        FM_M_CALL_1G_MAC_ISR(0);
55297 +    if (pending & INTR_EN_1G_MAC1)
55298 +        FM_M_CALL_1G_MAC_ISR(1);
55299 +    if (pending & INTR_EN_1G_MAC2)
55300 +        FM_M_CALL_1G_MAC_ISR(2);
55301 +    if (pending & INTR_EN_1G_MAC3)
55302 +        FM_M_CALL_1G_MAC_ISR(3);
55303 +    if (pending & INTR_EN_1G_MAC4)
55304 +        FM_M_CALL_1G_MAC_ISR(4);
55305 +    if (pending & INTR_EN_1G_MAC5)
55306 +        FM_M_CALL_1G_MAC_ISR(5);
55307 +    if (pending & INTR_EN_1G_MAC6)
55308 +        FM_M_CALL_1G_MAC_ISR(6);
55309 +    if (pending & INTR_EN_1G_MAC7)
55310 +        FM_M_CALL_1G_MAC_ISR(7);
55311 +    if (pending & INTR_EN_10G_MAC0)
55312 +        FM_M_CALL_10G_MAC_ISR(0);
55313 +    if (pending & INTR_EN_10G_MAC1)
55314 +        FM_M_CALL_10G_MAC_ISR(1);
55315 +
55316 +    /* IM port events may belong to different partitions */
55317 +    if (pending & INTR_EN_REV0)
55318 +    {
55319 +        event = fman_get_controller_event(fpm_rg, 0);
55320 +        if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_0].guestId)
55321 +            /*TODO IPC ISR For Fman Ctrl */
55322 +            ASSERT_COND(0);
55323 +            /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_0, pending); */
55324 +        else
55325 +            p_Fm->fmanCtrlIntr[0].f_Isr(p_Fm->fmanCtrlIntr[0].h_SrcHandle, event);
55326 +
55327 +    }
55328 +    if (pending & INTR_EN_REV1)
55329 +    {
55330 +        event = fman_get_controller_event(fpm_rg, 1);
55331 +        if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_1].guestId)
55332 +            /*TODO IPC ISR For Fman Ctrl */
55333 +            ASSERT_COND(0);
55334 +            /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_1, pending); */
55335 +        else
55336 +            p_Fm->fmanCtrlIntr[1].f_Isr(p_Fm->fmanCtrlIntr[1].h_SrcHandle, event);
55337 +    }
55338 +    if (pending & INTR_EN_REV2)
55339 +    {
55340 +        event = fman_get_controller_event(fpm_rg, 2);
55341 +        if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_2].guestId)
55342 +            /*TODO IPC ISR For Fman Ctrl */
55343 +            ASSERT_COND(0);
55344 +            /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_2, pending); */
55345 +        else
55346 +           p_Fm->fmanCtrlIntr[2].f_Isr(p_Fm->fmanCtrlIntr[2].h_SrcHandle, event);
55347 +    }
55348 +    if (pending & INTR_EN_REV3)
55349 +    {
55350 +        event = fman_get_controller_event(fpm_rg, 3);
55351 +        if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_3].guestId)
55352 +            /*TODO IPC ISR For Fman Ctrl */
55353 +            ASSERT_COND(0);
55354 +            /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_2, pendin3); */
55355 +        else
55356 +            p_Fm->fmanCtrlIntr[3].f_Isr(p_Fm->fmanCtrlIntr[3].h_SrcHandle, event);
55357 +    }
55358 +#ifdef FM_MACSEC_SUPPORT
55359 +    if (pending & INTR_EN_MACSEC_MAC0)
55360 +    {
55361 +       if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_MACSEC_MAC0].guestId)
55362 +            SendIpcIsr(p_Fm, e_FM_EV_MACSEC_MAC0, pending);
55363 +        else
55364 +            p_Fm->intrMng[e_FM_EV_MACSEC_MAC0].f_Isr(p_Fm->intrMng[e_FM_EV_MACSEC_MAC0].h_SrcHandle);
55365 +    }
55366 +#endif /* FM_MACSEC_SUPPORT */
55367 +}
55368 +
55369 +t_Error FM_ErrorIsr(t_Handle h_Fm)
55370 +{
55371 +#define FM_M_CALL_1G_MAC_ERR_ISR(_id)   \
55372 +    {                                   \
55373 +       if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].guestId) \
55374 +            SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id), pending);             \
55375 +       else                                                                                         \
55376 +            p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].h_SrcHandle);\
55377 +    }
55378 +#define FM_M_CALL_10G_MAC_ERR_ISR(_id)   \
55379 +    {                                    \
55380 +       if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].guestId) \
55381 +            SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id), pending);             \
55382 +       else                                                                                          \
55383 +            p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].h_SrcHandle);\
55384 +    }
55385 +    t_Fm                    *p_Fm = (t_Fm*)h_Fm;
55386 +    uint32_t                pending;
55387 +    struct fman_fpm_regs *fpm_rg;
55388 +
55389 +    SANITY_CHECK_RETURN_ERROR(h_Fm, E_INVALID_HANDLE);
55390 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55391 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55392 +
55393 +    fpm_rg = p_Fm->p_FmFpmRegs;
55394 +
55395 +    /* error interrupts */
55396 +    pending = fman_get_fpm_error_interrupts(fpm_rg);
55397 +    if (!pending)
55398 +        return ERROR_CODE(E_EMPTY);
55399 +
55400 +    if (pending & ERR_INTR_EN_BMI)
55401 +        BmiErrEvent(p_Fm);
55402 +    if (pending & ERR_INTR_EN_QMI)
55403 +        QmiErrEvent(p_Fm);
55404 +    if (pending & ERR_INTR_EN_FPM)
55405 +        FpmErrEvent(p_Fm);
55406 +    if (pending & ERR_INTR_EN_DMA)
55407 +        DmaErrEvent(p_Fm);
55408 +    if (pending & ERR_INTR_EN_IRAM)
55409 +        IramErrIntr(p_Fm);
55410 +    if (pending & ERR_INTR_EN_MURAM)
55411 +        MuramErrIntr(p_Fm);
55412 +    if (pending & ERR_INTR_EN_PRS)
55413 +        p_Fm->intrMng[e_FM_EV_ERR_PRS].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_PRS].h_SrcHandle);
55414 +    if (pending & ERR_INTR_EN_PLCR)
55415 +        p_Fm->intrMng[e_FM_EV_ERR_PLCR].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_PLCR].h_SrcHandle);
55416 +    if (pending & ERR_INTR_EN_KG)
55417 +        p_Fm->intrMng[e_FM_EV_ERR_KG].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_KG].h_SrcHandle);
55418 +
55419 +    /* MAC events may belong to different partitions */
55420 +    if (pending & ERR_INTR_EN_1G_MAC0)
55421 +        FM_M_CALL_1G_MAC_ERR_ISR(0);
55422 +    if (pending & ERR_INTR_EN_1G_MAC1)
55423 +        FM_M_CALL_1G_MAC_ERR_ISR(1);
55424 +    if (pending & ERR_INTR_EN_1G_MAC2)
55425 +        FM_M_CALL_1G_MAC_ERR_ISR(2);
55426 +    if (pending & ERR_INTR_EN_1G_MAC3)
55427 +        FM_M_CALL_1G_MAC_ERR_ISR(3);
55428 +    if (pending & ERR_INTR_EN_1G_MAC4)
55429 +        FM_M_CALL_1G_MAC_ERR_ISR(4);
55430 +    if (pending & ERR_INTR_EN_1G_MAC5)
55431 +        FM_M_CALL_1G_MAC_ERR_ISR(5);
55432 +    if (pending & ERR_INTR_EN_1G_MAC6)
55433 +        FM_M_CALL_1G_MAC_ERR_ISR(6);
55434 +    if (pending & ERR_INTR_EN_1G_MAC7)
55435 +        FM_M_CALL_1G_MAC_ERR_ISR(7);
55436 +    if (pending & ERR_INTR_EN_10G_MAC0)
55437 +        FM_M_CALL_10G_MAC_ERR_ISR(0);
55438 +    if (pending & ERR_INTR_EN_10G_MAC1)
55439 +        FM_M_CALL_10G_MAC_ERR_ISR(1);
55440 +
55441 +#ifdef FM_MACSEC_SUPPORT
55442 +    if (pending & ERR_INTR_EN_MACSEC_MAC0)
55443 +    {
55444 +       if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_ERR_MACSEC_MAC0].guestId)
55445 +            SendIpcIsr(p_Fm, e_FM_EV_ERR_MACSEC_MAC0, pending);
55446 +        else
55447 +            p_Fm->intrMng[e_FM_EV_ERR_MACSEC_MAC0].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_MACSEC_MAC0].h_SrcHandle);
55448 +    }
55449 +#endif /* FM_MACSEC_SUPPORT */
55450 +
55451 +    return E_OK;
55452 +}
55453 +
55454 +t_Error FM_SetPortsBandwidth(t_Handle h_Fm, t_FmPortsBandwidthParams *p_PortsBandwidth)
55455 +{
55456 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
55457 +    int         i;
55458 +    uint8_t     sum;
55459 +    uint8_t     hardwarePortId;
55460 +    uint8_t     weights[64];
55461 +    uint8_t     weight, maxPercent = 0;
55462 +    struct fman_bmi_regs *bmi_rg;
55463 +
55464 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55465 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55466 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55467 +
55468 +    bmi_rg = p_Fm->p_FmBmiRegs;
55469 +
55470 +    memset(weights, 0, (sizeof(uint8_t) * 64));
55471 +
55472 +    /* check that all ports add up to 100% */
55473 +    sum = 0;
55474 +    for (i=0; i < p_PortsBandwidth->numOfPorts; i++)
55475 +        sum +=p_PortsBandwidth->portsBandwidths[i].bandwidth;
55476 +    if (sum != 100)
55477 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Sum of ports bandwidth differ from 100%"));
55478 +
55479 +    /* find highest percent */
55480 +    for (i=0; i < p_PortsBandwidth->numOfPorts; i++)
55481 +    {
55482 +        if (p_PortsBandwidth->portsBandwidths[i].bandwidth > maxPercent)
55483 +            maxPercent = p_PortsBandwidth->portsBandwidths[i].bandwidth;
55484 +    }
55485 +
55486 +    ASSERT_COND(maxPercent > 0); /* guaranteed by sum = 100 */
55487 +
55488 +    /* calculate weight for each port */
55489 +    for (i=0; i < p_PortsBandwidth->numOfPorts; i++)
55490 +    {
55491 +        weight = (uint8_t)((p_PortsBandwidth->portsBandwidths[i].bandwidth * PORT_MAX_WEIGHT ) / maxPercent);
55492 +        /* we want even division between 1-to-PORT_MAX_WEIGHT. so if exact division
55493 +           is not reached, we round up so that:
55494 +           0 until maxPercent/PORT_MAX_WEIGHT get "1"
55495 +           maxPercent/PORT_MAX_WEIGHT+1 until (maxPercent/PORT_MAX_WEIGHT)*2 get "2"
55496 +           ...
55497 +           maxPercent - maxPercent/PORT_MAX_WEIGHT until maxPercent get "PORT_MAX_WEIGHT: */
55498 +        if ((uint8_t)((p_PortsBandwidth->portsBandwidths[i].bandwidth * PORT_MAX_WEIGHT ) % maxPercent))
55499 +            weight++;
55500 +
55501 +        /* find the location of this port within the register */
55502 +        hardwarePortId =
55503 +            SwPortIdToHwPortId(p_PortsBandwidth->portsBandwidths[i].type,
55504 +                               p_PortsBandwidth->portsBandwidths[i].relativePortId,
55505 +                               p_Fm->p_FmStateStruct->revInfo.majorRev,
55506 +                               p_Fm->p_FmStateStruct->revInfo.minorRev);
55507 +
55508 +        ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
55509 +        weights[hardwarePortId] = weight;
55510 +    }
55511 +
55512 +    fman_set_ports_bandwidth(bmi_rg, weights);
55513 +
55514 +    return E_OK;
55515 +}
55516 +
55517 +t_Error FM_EnableRamsEcc(t_Handle h_Fm)
55518 +{
55519 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
55520 +    struct fman_fpm_regs *fpm_rg;
55521 +
55522 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55523 +
55524 +    fpm_rg = p_Fm->p_FmFpmRegs;
55525 +
55526 +    if (p_Fm->guestId != NCSW_MASTER_ID)
55527 +    {
55528 +        t_FmIpcMsg      msg;
55529 +        t_Error         err;
55530 +
55531 +        memset(&msg, 0, sizeof(msg));
55532 +        msg.msgId = FM_ENABLE_RAM_ECC;
55533 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
55534 +                                (uint8_t*)&msg,
55535 +                                sizeof(msg.msgId),
55536 +                                NULL,
55537 +                                NULL,
55538 +                                NULL,
55539 +                                NULL);
55540 +        if (err != E_OK)
55541 +            RETURN_ERROR(MINOR, err, NO_MSG);
55542 +        return E_OK;
55543 +    }
55544 +
55545 +    if (!p_Fm->p_FmStateStruct->internalCall)
55546 +        p_Fm->p_FmStateStruct->explicitEnable = TRUE;
55547 +    p_Fm->p_FmStateStruct->internalCall = FALSE;
55548 +
55549 +    if (p_Fm->p_FmStateStruct->ramsEccEnable)
55550 +        return E_OK;
55551 +    else
55552 +    {
55553 +        fman_enable_rams_ecc(fpm_rg);
55554 +        p_Fm->p_FmStateStruct->ramsEccEnable = TRUE;
55555 +    }
55556 +
55557 +    return E_OK;
55558 +}
55559 +
55560 +t_Error FM_DisableRamsEcc(t_Handle h_Fm)
55561 +{
55562 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
55563 +    bool        explicitDisable = FALSE;
55564 +    struct fman_fpm_regs *fpm_rg;
55565 +
55566 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55567 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
55568 +
55569 +    fpm_rg = p_Fm->p_FmFpmRegs;
55570 +
55571 +    if (p_Fm->guestId != NCSW_MASTER_ID)
55572 +    {
55573 +        t_Error             err;
55574 +        t_FmIpcMsg          msg;
55575 +
55576 +        memset(&msg, 0, sizeof(msg));
55577 +        msg.msgId = FM_DISABLE_RAM_ECC;
55578 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
55579 +                                     (uint8_t*)&msg,
55580 +                                     sizeof(msg.msgId),
55581 +                                     NULL,
55582 +                                     NULL,
55583 +                                     NULL,
55584 +                                     NULL)) != E_OK)
55585 +            RETURN_ERROR(MINOR, err, NO_MSG);
55586 +        return E_OK;
55587 +    }
55588 +
55589 +    if (!p_Fm->p_FmStateStruct->internalCall)
55590 +        explicitDisable = TRUE;
55591 +    p_Fm->p_FmStateStruct->internalCall = FALSE;
55592 +
55593 +    /* if rams are already disabled, or if rams were explicitly enabled and are
55594 +       currently called indirectly (not explicitly), ignore this call. */
55595 +    if (!p_Fm->p_FmStateStruct->ramsEccEnable ||
55596 +        (p_Fm->p_FmStateStruct->explicitEnable && !explicitDisable))
55597 +        return E_OK;
55598 +    else
55599 +    {
55600 +        if (p_Fm->p_FmStateStruct->explicitEnable)
55601 +            /* This is the case were both explicit are TRUE.
55602 +               Turn off this flag for cases were following ramsEnable
55603 +               routines are called */
55604 +            p_Fm->p_FmStateStruct->explicitEnable = FALSE;
55605 +
55606 +        fman_enable_rams_ecc(fpm_rg);
55607 +        p_Fm->p_FmStateStruct->ramsEccEnable = FALSE;
55608 +    }
55609 +
55610 +    return E_OK;
55611 +}
55612 +
55613 +t_Error FM_SetException(t_Handle h_Fm, e_FmExceptions exception, bool enable)
55614 +{
55615 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
55616 +    uint32_t            bitMask = 0;
55617 +    enum fman_exceptions fslException;
55618 +    struct fman_rg       fman_rg;
55619 +
55620 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55621 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55622 +
55623 +    fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
55624 +    fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
55625 +    fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
55626 +    fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
55627 +
55628 +    GET_EXCEPTION_FLAG(bitMask, exception);
55629 +    if (bitMask)
55630 +    {
55631 +        if (enable)
55632 +            p_Fm->p_FmStateStruct->exceptions |= bitMask;
55633 +        else
55634 +            p_Fm->p_FmStateStruct->exceptions &= ~bitMask;
55635 +
55636 +        fslException = FmanExceptionTrans(exception);
55637 +
55638 +        return (t_Error)fman_set_exception(&fman_rg,
55639 +                                  fslException,
55640 +                                  enable);
55641 +    }
55642 +    else
55643 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
55644 +
55645 +    return E_OK;
55646 +}
55647 +
55648 +t_Error FM_GetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo)
55649 +{
55650 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55651 +
55652 +    p_FmRevisionInfo->majorRev = p_Fm->p_FmStateStruct->revInfo.majorRev;
55653 +    p_FmRevisionInfo->minorRev = p_Fm->p_FmStateStruct->revInfo.minorRev;
55654 +
55655 +    return E_OK;
55656 +}
55657 +
55658 +t_Error FM_GetFmanCtrlCodeRevision(t_Handle h_Fm, t_FmCtrlCodeRevisionInfo *p_RevisionInfo)
55659 +{
55660 +    t_Fm                            *p_Fm = (t_Fm*)h_Fm;
55661 +    t_FMIramRegs                    *p_Iram;
55662 +    uint32_t                        revInfo;
55663 +
55664 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55665 +    SANITY_CHECK_RETURN_ERROR(p_RevisionInfo, E_NULL_POINTER);
55666 +
55667 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
55668 +        p_Fm->h_IpcSessions[0])
55669 +    {
55670 +        t_Error                         err;
55671 +        t_FmIpcMsg                      msg;
55672 +        t_FmIpcReply                    reply;
55673 +        uint32_t                        replyLength;
55674 +        t_FmIpcFmanCtrlCodeRevisionInfo ipcRevInfo;
55675 +
55676 +        memset(&msg, 0, sizeof(msg));
55677 +        memset(&reply, 0, sizeof(reply));
55678 +        msg.msgId = FM_GET_FMAN_CTRL_CODE_REV;
55679 +        replyLength = sizeof(uint32_t) + sizeof(t_FmCtrlCodeRevisionInfo);
55680 +        if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
55681 +                                     (uint8_t*)&msg,
55682 +                                     sizeof(msg.msgId),
55683 +                                     (uint8_t*)&reply,
55684 +                                     &replyLength,
55685 +                                     NULL,
55686 +                                     NULL)) != E_OK)
55687 +            RETURN_ERROR(MINOR, err, NO_MSG);
55688 +        if (replyLength != (sizeof(uint32_t) + sizeof(t_FmCtrlCodeRevisionInfo)))
55689 +            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
55690 +        memcpy((uint8_t*)&ipcRevInfo, reply.replyBody, sizeof(t_FmCtrlCodeRevisionInfo));
55691 +        p_RevisionInfo->packageRev = ipcRevInfo.packageRev;
55692 +        p_RevisionInfo->majorRev = ipcRevInfo.majorRev;
55693 +        p_RevisionInfo->minorRev = ipcRevInfo.minorRev;
55694 +        return (t_Error)(reply.error);
55695 +    }
55696 +    else if (p_Fm->guestId != NCSW_MASTER_ID)
55697 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
55698 +                     ("running in guest-mode without IPC!"));
55699 +
55700 +    p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
55701 +    WRITE_UINT32(p_Iram->iadd, 0x4);
55702 +    while (GET_UINT32(p_Iram->iadd) != 0x4) ;
55703 +    revInfo = GET_UINT32(p_Iram->idata);
55704 +    p_RevisionInfo->packageRev = (uint16_t)((revInfo & 0xFFFF0000) >> 16);
55705 +    p_RevisionInfo->majorRev = (uint8_t)((revInfo & 0x0000FF00) >> 8);
55706 +    p_RevisionInfo->minorRev = (uint8_t)(revInfo & 0x000000FF);
55707 +
55708 +    return E_OK;
55709 +}
55710 +
55711 +uint32_t FM_GetCounter(t_Handle h_Fm, e_FmCounters counter)
55712 +{
55713 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
55714 +    t_Error     err;
55715 +    uint32_t    counterValue;
55716 +    struct fman_rg       fman_rg;
55717 +    enum fman_counters fsl_counter;
55718 +
55719 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
55720 +    SANITY_CHECK_RETURN_VALUE(!p_Fm->p_FmDriverParam, E_INVALID_STATE, 0);
55721 +
55722 +    fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
55723 +    fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
55724 +    fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
55725 +    fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
55726 +
55727 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
55728 +        !p_Fm->baseAddr &&
55729 +        p_Fm->h_IpcSessions[0])
55730 +    {
55731 +        t_FmIpcMsg          msg;
55732 +        t_FmIpcReply        reply;
55733 +        uint32_t            replyLength, outCounter;
55734 +
55735 +        memset(&msg, 0, sizeof(msg));
55736 +        memset(&reply, 0, sizeof(reply));
55737 +        msg.msgId = FM_GET_COUNTER;
55738 +        memcpy(msg.msgBody, (uint8_t *)&counter, sizeof(uint32_t));
55739 +        replyLength = sizeof(uint32_t) + sizeof(uint32_t);
55740 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
55741 +                                     (uint8_t*)&msg,
55742 +                                     sizeof(msg.msgId) +sizeof(counterValue),
55743 +                                     (uint8_t*)&reply,
55744 +                                     &replyLength,
55745 +                                     NULL,
55746 +                                     NULL);
55747 +        if (err != E_OK)
55748 +        {
55749 +            REPORT_ERROR(MAJOR, err, NO_MSG);
55750 +            return 0;
55751 +        }
55752 +        if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
55753 +        {
55754 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
55755 +            return 0;
55756 +        }
55757 +
55758 +        memcpy((uint8_t*)&outCounter, reply.replyBody, sizeof(uint32_t));
55759 +        return outCounter;
55760 +    }
55761 +    else if (!p_Fm->baseAddr)
55762 +    {
55763 +        REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Either IPC or 'baseAddress' is required!"));
55764 +        return 0;
55765 +    }
55766 +
55767 +    /* When applicable (when there is an 'enable counters' bit,
55768 +    check that counters are enabled */
55769 +    switch (counter)
55770 +    {
55771 +        case (e_FM_COUNTERS_DEQ_1):
55772 +        case (e_FM_COUNTERS_DEQ_2):
55773 +        case (e_FM_COUNTERS_DEQ_3):
55774 +            if ((p_Fm->p_FmStateStruct->revInfo.majorRev == 4) ||
55775 +                (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6))
55776 +            {
55777 +                REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Requested counter not supported"));
55778 +                return 0;
55779 +            }
55780 +        case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
55781 +        case (e_FM_COUNTERS_DEQ_TOTAL_FRAME):
55782 +        case (e_FM_COUNTERS_DEQ_0):
55783 +        case (e_FM_COUNTERS_DEQ_FROM_DEFAULT):
55784 +        case (e_FM_COUNTERS_DEQ_FROM_CONTEXT):
55785 +        case (e_FM_COUNTERS_DEQ_FROM_FD):
55786 +        case (e_FM_COUNTERS_DEQ_CONFIRM):
55787 +            if (!(GET_UINT32(p_Fm->p_FmQmiRegs->fmqm_gc) & QMI_CFG_EN_COUNTERS))
55788 +            {
55789 +                REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Requested counter was not enabled"));
55790 +                return 0;
55791 +            }
55792 +            break;
55793 +        default:
55794 +            break;
55795 +    }
55796 +
55797 +    FMAN_COUNTERS_TRANS(fsl_counter, counter);
55798 +    return fman_get_counter(&fman_rg, fsl_counter);
55799 +}
55800 +
55801 +t_Error FM_ModifyCounter(t_Handle h_Fm, e_FmCounters counter, uint32_t val)
55802 +{
55803 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55804 +    struct fman_rg          fman_rg;
55805 +    enum fman_counters fsl_counter;
55806 +
55807 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55808 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55809 +
55810 +   fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
55811 +   fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
55812 +   fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
55813 +   fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
55814 +
55815 +   FMAN_COUNTERS_TRANS(fsl_counter, counter);
55816 +   return  (t_Error)fman_modify_counter(&fman_rg, fsl_counter, val);
55817 +}
55818 +
55819 +void FM_SetDmaEmergency(t_Handle h_Fm, e_FmDmaMuramPort muramPort, bool enable)
55820 +{
55821 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55822 +    struct fman_dma_regs *dma_rg;
55823 +
55824 +    SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
55825 +    SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55826 +
55827 +    dma_rg = p_Fm->p_FmDmaRegs;
55828 +
55829 +    fman_set_dma_emergency(dma_rg, !!(muramPort==e_FM_DMA_MURAM_PORT_WRITE), enable);
55830 +}
55831 +
55832 +void FM_SetDmaExtBusPri(t_Handle h_Fm, e_FmDmaExtBusPri pri)
55833 +{
55834 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
55835 +    struct fman_dma_regs *dma_rg;
55836 +
55837 +    SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
55838 +    SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55839 +
55840 +    dma_rg = p_Fm->p_FmDmaRegs;
55841 +
55842 +    fman_set_dma_ext_bus_pri(dma_rg, pri);
55843 +}
55844 +
55845 +void FM_GetDmaStatus(t_Handle h_Fm, t_FmDmaStatus *p_FmDmaStatus)
55846 +{
55847 +    t_Fm                *p_Fm = (t_Fm*)h_Fm;
55848 +    uint32_t             dmaStatus;
55849 +    struct fman_dma_regs *dma_rg;
55850 +
55851 +    SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
55852 +    SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55853 +
55854 +    dma_rg = p_Fm->p_FmDmaRegs;
55855 +
55856 +    if ((p_Fm->guestId != NCSW_MASTER_ID) &&
55857 +        !p_Fm->baseAddr &&
55858 +        p_Fm->h_IpcSessions[0])
55859 +    {
55860 +        t_FmIpcDmaStatus    ipcDmaStatus;
55861 +        t_FmIpcMsg          msg;
55862 +        t_FmIpcReply        reply;
55863 +        t_Error             err;
55864 +        uint32_t            replyLength;
55865 +
55866 +        memset(&msg, 0, sizeof(msg));
55867 +        memset(&reply, 0, sizeof(reply));
55868 +        msg.msgId = FM_DMA_STAT;
55869 +        replyLength = sizeof(uint32_t) + sizeof(t_FmIpcDmaStatus);
55870 +        err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
55871 +                                (uint8_t*)&msg,
55872 +                                sizeof(msg.msgId),
55873 +                                (uint8_t*)&reply,
55874 +                                &replyLength,
55875 +                                NULL,
55876 +                                NULL);
55877 +        if (err != E_OK)
55878 +        {
55879 +            REPORT_ERROR(MINOR, err, NO_MSG);
55880 +            return;
55881 +        }
55882 +        if (replyLength != (sizeof(uint32_t) + sizeof(t_FmIpcDmaStatus)))
55883 +        {
55884 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
55885 +            return;
55886 +        }
55887 +        memcpy((uint8_t*)&ipcDmaStatus, reply.replyBody, sizeof(t_FmIpcDmaStatus));
55888 +
55889 +        p_FmDmaStatus->cmqNotEmpty = (bool)ipcDmaStatus.boolCmqNotEmpty;            /**< Command queue is not empty */
55890 +        p_FmDmaStatus->busError = (bool)ipcDmaStatus.boolBusError;                  /**< Bus error occurred */
55891 +        p_FmDmaStatus->readBufEccError = (bool)ipcDmaStatus.boolReadBufEccError;        /**< Double ECC error on buffer Read */
55892 +        p_FmDmaStatus->writeBufEccSysError =(bool)ipcDmaStatus.boolWriteBufEccSysError;    /**< Double ECC error on buffer write from system side */
55893 +        p_FmDmaStatus->writeBufEccFmError = (bool)ipcDmaStatus.boolWriteBufEccFmError;     /**< Double ECC error on buffer write from FM side */
55894 +        p_FmDmaStatus->singlePortEccError = (bool)ipcDmaStatus.boolSinglePortEccError;     /**< Double ECC error on buffer write from FM side */
55895 +        return;
55896 +    }
55897 +    else if (!p_Fm->baseAddr)
55898 +    {
55899 +        REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
55900 +                     ("Either IPC or 'baseAddress' is required!"));
55901 +        return;
55902 +    }
55903 +
55904 +    dmaStatus = fman_get_dma_status(dma_rg);
55905 +
55906 +    p_FmDmaStatus->cmqNotEmpty = (bool)(dmaStatus & DMA_STATUS_CMD_QUEUE_NOT_EMPTY);
55907 +    p_FmDmaStatus->busError = (bool)(dmaStatus & DMA_STATUS_BUS_ERR);
55908 +    if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
55909 +        p_FmDmaStatus->singlePortEccError = (bool)(dmaStatus & DMA_STATUS_FM_SPDAT_ECC);
55910 +    else
55911 +    {
55912 +        p_FmDmaStatus->readBufEccError = (bool)(dmaStatus & DMA_STATUS_READ_ECC);
55913 +        p_FmDmaStatus->writeBufEccSysError = (bool)(dmaStatus & DMA_STATUS_SYSTEM_WRITE_ECC);
55914 +        p_FmDmaStatus->writeBufEccFmError = (bool)(dmaStatus & DMA_STATUS_FM_WRITE_ECC);
55915 +    }
55916 +}
55917 +
55918 +void FM_Resume(t_Handle h_Fm)
55919 +{
55920 +    t_Fm            *p_Fm = (t_Fm*)h_Fm;
55921 +    struct fman_fpm_regs *fpm_rg;
55922 +
55923 +    SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
55924 +    SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55925 +    SANITY_CHECK_RETURN((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
55926 +
55927 +    fpm_rg = p_Fm->p_FmFpmRegs;
55928 +
55929 +    fman_resume(fpm_rg);
55930 +}
55931 +
55932 +t_Error FM_GetSpecialOperationCoding(t_Handle               h_Fm,
55933 +                                     fmSpecialOperations_t  spOper,
55934 +                                     uint8_t                *p_SpOperCoding)
55935 +{
55936 +    t_Fm                        *p_Fm = (t_Fm*)h_Fm;
55937 +    t_FmCtrlCodeRevisionInfo    revInfo;
55938 +    t_Error                     err;
55939 +
55940 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
55941 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
55942 +    SANITY_CHECK_RETURN_ERROR(p_SpOperCoding, E_NULL_POINTER);
55943 +
55944 +    if (!spOper)
55945 +    {
55946 +        *p_SpOperCoding = 0;
55947 +        return E_OK;
55948 +    }
55949 +
55950 +    if ((err = FM_GetFmanCtrlCodeRevision(p_Fm, &revInfo)) != E_OK)
55951 +    {
55952 +        DBG(WARNING, ("FM in guest-mode without IPC, can't validate firmware revision."));
55953 +        revInfo.packageRev = IP_OFFLOAD_PACKAGE_NUMBER;
55954 +    }
55955 +    else if (!IS_OFFLOAD_PACKAGE(revInfo.packageRev))
55956 +        RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Fman ctrl code package"));
55957 +
55958 +    switch (spOper)
55959 +    {
55960 +        case (FM_SP_OP_CAPWAP_DTLS_DEC):
55961 +                *p_SpOperCoding = 9;
55962 +                break;
55963 +        case (FM_SP_OP_CAPWAP_DTLS_ENC):
55964 +                *p_SpOperCoding = 10;
55965 +                break;
55966 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_IPSEC_MANIP):
55967 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_IPSEC_MANIP|FM_SP_OP_RPD):
55968 +                *p_SpOperCoding = 5;
55969 +                break;
55970 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_MANIP):
55971 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_MANIP|FM_SP_OP_RPD):
55972 +                *p_SpOperCoding = 6;
55973 +                break;
55974 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_RPD):
55975 +                *p_SpOperCoding = 3;
55976 +                break;
55977 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN):
55978 +                *p_SpOperCoding = 1;
55979 +                break;
55980 +        case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_IPSEC_NO_ETH_HDR):
55981 +                *p_SpOperCoding = 12;
55982 +                break;
55983 +        case (FM_SP_OP_IPSEC|FM_SP_OP_RPD):
55984 +                *p_SpOperCoding = 4;
55985 +                break;
55986 +        case (FM_SP_OP_IPSEC):
55987 +                *p_SpOperCoding = 2;
55988 +                break;
55989 +        case (FM_SP_OP_DCL4C):
55990 +                *p_SpOperCoding = 7;
55991 +                break;
55992 +        case (FM_SP_OP_CLEAR_RPD):
55993 +                *p_SpOperCoding = 8;
55994 +                break;
55995 +        default:
55996 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
55997 +    }
55998 +
55999 +    return E_OK;
56000 +}
56001 +
56002 +t_Error FM_CtrlMonStart(t_Handle h_Fm)
56003 +{
56004 +    t_Fm            *p_Fm = (t_Fm *)h_Fm;
56005 +    t_FmTrbRegs     *p_MonRegs;
56006 +    uint8_t         i;
56007 +
56008 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
56009 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
56010 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
56011 +
56012 +    WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc,
56013 +                 GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc) | FPM_BRKC_RDBG);
56014 +
56015 +    for (i = 0; i < FM_NUM_OF_CTRL; i++)
56016 +    {
56017 +        p_MonRegs = (t_FmTrbRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_TRB(i));
56018 +
56019 +        /* Reset control registers */
56020 +        WRITE_UINT32(p_MonRegs->tcrh, TRB_TCRH_RESET);
56021 +        WRITE_UINT32(p_MonRegs->tcrl, TRB_TCRL_RESET);
56022 +
56023 +        /* Configure: counter #1 counts all stalls in risc - ldsched stall
56024 +                      counter #2 counts all stalls in risc - other stall*/
56025 +        WRITE_UINT32(p_MonRegs->tcrl, TRB_TCRL_RESET | TRB_TCRL_UTIL);
56026 +
56027 +        /* Enable monitoring */
56028 +        WRITE_UINT32(p_MonRegs->tcrh, TRB_TCRH_ENABLE_COUNTERS);
56029 +    }
56030 +
56031 +    return E_OK;
56032 +}
56033 +
56034 +t_Error FM_CtrlMonStop(t_Handle h_Fm)
56035 +{
56036 +    t_Fm            *p_Fm = (t_Fm *)h_Fm;
56037 +    t_FmTrbRegs     *p_MonRegs;
56038 +    uint8_t         i;
56039 +
56040 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
56041 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
56042 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
56043 +
56044 +    for (i = 0; i < FM_NUM_OF_CTRL; i++)
56045 +    {
56046 +        p_MonRegs = (t_FmTrbRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_TRB(i));
56047 +        WRITE_UINT32(p_MonRegs->tcrh, TRB_TCRH_DISABLE_COUNTERS);
56048 +    }
56049 +
56050 +    WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc,
56051 +                 GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc) & ~FPM_BRKC_RDBG);
56052 +
56053 +    return E_OK;
56054 +}
56055 +
56056 +t_Error FM_CtrlMonGetCounters(t_Handle h_Fm, uint8_t fmCtrlIndex, t_FmCtrlMon *p_Mon)
56057 +{
56058 +    t_Fm            *p_Fm = (t_Fm *)h_Fm;
56059 +    t_FmTrbRegs     *p_MonRegs;
56060 +    uint64_t        clkCnt, utilValue, effValue;
56061 +
56062 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
56063 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
56064 +    SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
56065 +    SANITY_CHECK_RETURN_ERROR(p_Mon, E_NULL_POINTER);
56066 +
56067 +    if (fmCtrlIndex >= FM_NUM_OF_CTRL)
56068 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("FM Controller index"));
56069 +
56070 +    p_MonRegs = (t_FmTrbRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_TRB(fmCtrlIndex));
56071 +
56072 +    clkCnt = (uint64_t)
56073 +            ((uint64_t)GET_UINT32(p_MonRegs->tpcch) << 32 | GET_UINT32(p_MonRegs->tpccl));
56074 +
56075 +    utilValue = (uint64_t)
56076 +            ((uint64_t)GET_UINT32(p_MonRegs->tpc1h) << 32 | GET_UINT32(p_MonRegs->tpc1l));
56077 +
56078 +    effValue = (uint64_t)
56079 +            ((uint64_t)GET_UINT32(p_MonRegs->tpc2h) << 32 | GET_UINT32(p_MonRegs->tpc2l));
56080 +
56081 +    p_Mon->percentCnt[0] = (uint8_t)div64_u64((clkCnt - utilValue) * 100, clkCnt);
56082 +    if (clkCnt != utilValue)
56083 +        p_Mon->percentCnt[1] = (uint8_t)div64_u64(((clkCnt - utilValue) - effValue) * 100, clkCnt - utilValue);
56084 +    else
56085 +        p_Mon->percentCnt[1] = 0;
56086 +
56087 +    return E_OK;
56088 +}
56089 +
56090 +t_Handle FM_GetMuramHandle(t_Handle h_Fm)
56091 +{
56092 +    t_Fm        *p_Fm = (t_Fm*)h_Fm;
56093 +
56094 +    SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, NULL);
56095 +
56096 +    return (p_Fm->h_FmMuram);
56097 +}
56098 +
56099 +/****************************************************/
56100 +/*       Hidden-DEBUG Only API                      */
56101 +/****************************************************/
56102 +t_Error FM_ForceIntr (t_Handle h_Fm, e_FmExceptions exception)
56103 +{
56104 +    t_Fm *p_Fm = (t_Fm*)h_Fm;
56105 +    enum fman_exceptions fslException;
56106 +    struct fman_rg fman_rg;
56107 +
56108 +    SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
56109 +    SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
56110 +
56111 +    fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
56112 +    fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
56113 +    fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
56114 +    fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
56115 +
56116 +    switch (exception)
56117 +    {
56118 +        case e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:
56119 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID))
56120 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56121 +            break;
56122 +        case e_FM_EX_QMI_SINGLE_ECC:
56123 +            if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
56124 +                 RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("e_FM_EX_QMI_SINGLE_ECC not supported on this integration."));
56125 +
56126 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_QMI_SINGLE_ECC))
56127 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56128 +            break;
56129 +        case e_FM_EX_QMI_DOUBLE_ECC:
56130 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_QMI_DOUBLE_ECC))
56131 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56132 +            break;
56133 +        case e_FM_EX_BMI_LIST_RAM_ECC:
56134 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_LIST_RAM_ECC))
56135 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56136 +            break;
56137 +        case e_FM_EX_BMI_STORAGE_PROFILE_ECC:
56138 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_STORAGE_PROFILE_ECC))
56139 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56140 +            break;
56141 +        case e_FM_EX_BMI_STATISTICS_RAM_ECC:
56142 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_STATISTICS_RAM_ECC))
56143 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56144 +            break;
56145 +        case e_FM_EX_BMI_DISPATCH_RAM_ECC:
56146 +            if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_DISPATCH_RAM_ECC))
56147 +                RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
56148 +            break;
56149 +        default:
56150 +            RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception may not be forced"));
56151 +    }
56152 +
56153 +    fslException = FmanExceptionTrans(exception);
56154 +    fman_force_intr (&fman_rg, fslException);
56155 +
56156 +    return E_OK;
56157 +}
56158 +
56159 +t_Handle FmGetPcd(t_Handle h_Fm)
56160 +{
56161 +       return ((t_Fm*)h_Fm)->h_Pcd;
56162 +}
56163 +#if (DPAA_VERSION >= 11)
56164 +extern void *g_MemacRegs;
56165 +void fm_clk_down(void);
56166 +uint32_t fman_memac_get_event(void *regs, uint32_t ev_mask);
56167 +void FM_ChangeClock(t_Handle h_Fm, int hardwarePortId)
56168 +{
56169 +       int macId;
56170 +       uint32_t    event, rcr;
56171 +       t_Fm *p_Fm = (t_Fm*)h_Fm;
56172 +       rcr = GET_UINT32(p_Fm->p_FmFpmRegs->fm_rcr);
56173 +       rcr |= 0x04000000;
56174 +       WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rcr, rcr);
56175 +
56176 +       HW_PORT_ID_TO_SW_PORT_ID(macId, hardwarePortId);
56177 +       do
56178 +       {
56179 +               event = fman_memac_get_event(g_MemacRegs, 0xFFFFFFFF);
56180 +       } while ((event & 0x00000020) == 0);
56181 +       fm_clk_down();
56182 +       rcr = GET_UINT32(p_Fm->p_FmFpmRegs->fm_rcr);
56183 +       rcr &= ~0x04000000;
56184 +       WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rcr, rcr);
56185 +}
56186 +#endif
56187 --- /dev/null
56188 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.h
56189 @@ -0,0 +1,648 @@
56190 +/*
56191 + * Copyright 2008-2012 Freescale Semiconductor Inc.
56192 + *
56193 + * Redistribution and use in source and binary forms, with or without
56194 + * modification, are permitted provided that the following conditions are met:
56195 + *     * Redistributions of source code must retain the above copyright
56196 + *       notice, this list of conditions and the following disclaimer.
56197 + *     * Redistributions in binary form must reproduce the above copyright
56198 + *       notice, this list of conditions and the following disclaimer in the
56199 + *       documentation and/or other materials provided with the distribution.
56200 + *     * Neither the name of Freescale Semiconductor nor the
56201 + *       names of its contributors may be used to endorse or promote products
56202 + *       derived from this software without specific prior written permission.
56203 + *
56204 + *
56205 + * ALTERNATIVELY, this software may be distributed under the terms of the
56206 + * GNU General Public License ("GPL") as published by the Free Software
56207 + * Foundation, either version 2 of that License or (at your option) any
56208 + * later version.
56209 + *
56210 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
56211 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
56212 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
56213 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
56214 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
56215 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
56216 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
56217 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
56218 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
56219 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56220 + */
56221 +
56222 +
56223 +/******************************************************************************
56224 + @File          fm.h
56225 +
56226 + @Description   FM internal structures and definitions.
56227 +*//***************************************************************************/
56228 +#ifndef __FM_H
56229 +#define __FM_H
56230 +
56231 +#include "error_ext.h"
56232 +#include "std_ext.h"
56233 +#include "fm_ext.h"
56234 +#include "fm_ipc.h"
56235 +
56236 +#include "fsl_fman.h"
56237 +
56238 +#define __ERR_MODULE__  MODULE_FM
56239 +
56240 +#define FM_MAX_NUM_OF_HW_PORT_IDS           64
56241 +#define FM_MAX_NUM_OF_GUESTS                100
56242 +
56243 +/**************************************************************************//**
56244 + @Description       Exceptions
56245 +*//***************************************************************************/
56246 +#define FM_EX_DMA_BUS_ERROR                 0x80000000      /**< DMA bus error. */
56247 +#define FM_EX_DMA_READ_ECC                  0x40000000
56248 +#define FM_EX_DMA_SYSTEM_WRITE_ECC          0x20000000
56249 +#define FM_EX_DMA_FM_WRITE_ECC              0x10000000
56250 +#define FM_EX_FPM_STALL_ON_TASKS            0x08000000      /**< Stall of tasks on FPM */
56251 +#define FM_EX_FPM_SINGLE_ECC                0x04000000      /**< Single ECC on FPM */
56252 +#define FM_EX_FPM_DOUBLE_ECC                0x02000000
56253 +#define FM_EX_QMI_SINGLE_ECC                0x01000000      /**< Single ECC on FPM */
56254 +#define FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID   0x00800000      /**< Dequeu from default queue id */
56255 +#define FM_EX_QMI_DOUBLE_ECC                0x00400000
56256 +#define FM_EX_BMI_LIST_RAM_ECC              0x00200000
56257 +#define FM_EX_BMI_STORAGE_PROFILE_ECC       0x00100000
56258 +#define FM_EX_BMI_STATISTICS_RAM_ECC        0x00080000
56259 +#define FM_EX_IRAM_ECC                      0x00040000
56260 +#define FM_EX_MURAM_ECC                     0x00020000
56261 +#define FM_EX_BMI_DISPATCH_RAM_ECC          0x00010000
56262 +#define FM_EX_DMA_SINGLE_PORT_ECC           0x00008000
56263 +
56264 +#define DMA_EMSR_EMSTR_MASK                 0x0000FFFF
56265 +
56266 +#define DMA_THRESH_COMMQ_MASK               0xFF000000
56267 +#define DMA_THRESH_READ_INT_BUF_MASK        0x007F0000
56268 +#define DMA_THRESH_WRITE_INT_BUF_MASK       0x0000007F
56269 +
56270 +#define GET_EXCEPTION_FLAG(bitMask, exception)              \
56271 +switch (exception){                                         \
56272 +    case e_FM_EX_DMA_BUS_ERROR:                             \
56273 +        bitMask = FM_EX_DMA_BUS_ERROR; break;               \
56274 +    case e_FM_EX_DMA_SINGLE_PORT_ECC:                       \
56275 +        bitMask = FM_EX_DMA_SINGLE_PORT_ECC; break;         \
56276 +    case e_FM_EX_DMA_READ_ECC:                              \
56277 +        bitMask = FM_EX_DMA_READ_ECC; break;                \
56278 +    case e_FM_EX_DMA_SYSTEM_WRITE_ECC:                      \
56279 +        bitMask = FM_EX_DMA_SYSTEM_WRITE_ECC; break;        \
56280 +    case e_FM_EX_DMA_FM_WRITE_ECC:                          \
56281 +        bitMask = FM_EX_DMA_FM_WRITE_ECC; break;            \
56282 +    case e_FM_EX_FPM_STALL_ON_TASKS:                        \
56283 +        bitMask = FM_EX_FPM_STALL_ON_TASKS; break;          \
56284 +    case e_FM_EX_FPM_SINGLE_ECC:                            \
56285 +        bitMask = FM_EX_FPM_SINGLE_ECC; break;              \
56286 +    case e_FM_EX_FPM_DOUBLE_ECC:                            \
56287 +        bitMask = FM_EX_FPM_DOUBLE_ECC; break;              \
56288 +    case e_FM_EX_QMI_SINGLE_ECC:                            \
56289 +        bitMask = FM_EX_QMI_SINGLE_ECC; break;              \
56290 +    case e_FM_EX_QMI_DOUBLE_ECC:                            \
56291 +        bitMask = FM_EX_QMI_DOUBLE_ECC; break;              \
56292 +    case e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:               \
56293 +        bitMask = FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID; break; \
56294 +    case e_FM_EX_BMI_LIST_RAM_ECC:                          \
56295 +        bitMask = FM_EX_BMI_LIST_RAM_ECC; break;            \
56296 +    case e_FM_EX_BMI_STORAGE_PROFILE_ECC:                   \
56297 +        bitMask = FM_EX_BMI_STORAGE_PROFILE_ECC; break;     \
56298 +    case e_FM_EX_BMI_STATISTICS_RAM_ECC:                    \
56299 +        bitMask = FM_EX_BMI_STATISTICS_RAM_ECC; break;      \
56300 +    case e_FM_EX_BMI_DISPATCH_RAM_ECC:                      \
56301 +        bitMask = FM_EX_BMI_DISPATCH_RAM_ECC; break;        \
56302 +    case e_FM_EX_IRAM_ECC:                                  \
56303 +        bitMask = FM_EX_IRAM_ECC; break;                    \
56304 +    case e_FM_EX_MURAM_ECC:                                 \
56305 +        bitMask = FM_EX_MURAM_ECC; break;                   \
56306 +    default: bitMask = 0;break;                             \
56307 +}
56308 +
56309 +#define GET_FM_MODULE_EVENT(_mod, _id, _intrType, _event)                                           \
56310 +    switch (_mod) {                                                                                 \
56311 +        case e_FM_MOD_PRS:                                                                          \
56312 +            if (_id) _event = e_FM_EV_DUMMY_LAST;                                                   \
56313 +            else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PRS : e_FM_EV_PRS;        \
56314 +            break;                                                                                  \
56315 +        case e_FM_MOD_KG:                                                                           \
56316 +            if (_id) _event = e_FM_EV_DUMMY_LAST;                                                   \
56317 +            else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_KG : e_FM_EV_DUMMY_LAST;  \
56318 +            break;                                                                                  \
56319 +        case e_FM_MOD_PLCR:                                                                         \
56320 +            if (_id) _event = e_FM_EV_DUMMY_LAST;                                                   \
56321 +            else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PLCR : e_FM_EV_PLCR;      \
56322 +            break;                                                                                  \
56323 +        case e_FM_MOD_TMR:                                                                          \
56324 +            if (_id) _event = e_FM_EV_DUMMY_LAST;                                                   \
56325 +            else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST : e_FM_EV_TMR;     \
56326 +            break;                                                                                  \
56327 +        case e_FM_MOD_10G_MAC:                                                                      \
56328 +            if (_id >= FM_MAX_NUM_OF_10G_MACS) _event = e_FM_EV_DUMMY_LAST;                         \
56329 +            else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? (e_FM_EV_ERR_10G_MAC0 + _id) : (e_FM_EV_10G_MAC0 + _id); \
56330 +            break;                                                                                  \
56331 +        case e_FM_MOD_1G_MAC:                                                                       \
56332 +            if (_id >= FM_MAX_NUM_OF_1G_MACS) _event = e_FM_EV_DUMMY_LAST;                          \
56333 +            else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? (e_FM_EV_ERR_1G_MAC0 + _id) : (e_FM_EV_1G_MAC0 + _id); \
56334 +            break;                                                                                  \
56335 +        case e_FM_MOD_MACSEC:                                                                       \
56336 +            switch (_id){                                                                           \
56337 +                 case (0): _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_MACSEC_MAC0:e_FM_EV_MACSEC_MAC0; \
56338 +                 break;                                                                             \
56339 +                 }                                                                                  \
56340 +            break;                                                                                  \
56341 +        case e_FM_MOD_FMAN_CTRL:                                                                    \
56342 +            if (_intrType == e_FM_INTR_TYPE_ERR) _event = e_FM_EV_DUMMY_LAST;                       \
56343 +            else _event = (e_FM_EV_FMAN_CTRL_0 + _id);                                              \
56344 +            break;                                                                                  \
56345 +        default: _event = e_FM_EV_DUMMY_LAST;                                                       \
56346 +        break;                                                                                      \
56347 +    }
56348 +
56349 +#define FMAN_CACHE_OVERRIDE_TRANS(fsl_cache_override, _cache_override) \
56350 +    switch (_cache_override){ \
56351 +        case  e_FM_DMA_NO_CACHE_OR:                    \
56352 +            fsl_cache_override =  E_FMAN_DMA_NO_CACHE_OR; break;    \
56353 +        case  e_FM_DMA_NO_STASH_DATA:                    \
56354 +            fsl_cache_override =  E_FMAN_DMA_NO_STASH_DATA; break;        \
56355 +        case  e_FM_DMA_MAY_STASH_DATA:                    \
56356 +            fsl_cache_override =  E_FMAN_DMA_MAY_STASH_DATA; break;    \
56357 +        case  e_FM_DMA_STASH_DATA:                        \
56358 +            fsl_cache_override =  E_FMAN_DMA_STASH_DATA; break;        \
56359 +        default: \
56360 +            fsl_cache_override =  E_FMAN_DMA_NO_CACHE_OR; break;    \
56361 +    }
56362 +
56363 +#define FMAN_AID_MODE_TRANS(fsl_aid_mode, _aid_mode) \
56364 +    switch (_aid_mode){ \
56365 +        case  e_FM_DMA_AID_OUT_PORT_ID:                    \
56366 +            fsl_aid_mode =  E_FMAN_DMA_AID_OUT_PORT_ID; break;    \
56367 +        case  e_FM_DMA_AID_OUT_TNUM:                    \
56368 +            fsl_aid_mode =  E_FMAN_DMA_AID_OUT_TNUM; break;        \
56369 +        default: \
56370 +            fsl_aid_mode =  E_FMAN_DMA_AID_OUT_PORT_ID; break;    \
56371 +    }
56372 +
56373 +#define FMAN_DMA_DBG_CNT_TRANS(fsl_dma_dbg_cnt, _dma_dbg_cnt) \
56374 +    switch (_dma_dbg_cnt){ \
56375 +        case  e_FM_DMA_DBG_NO_CNT:                    \
56376 +            fsl_dma_dbg_cnt =  E_FMAN_DMA_DBG_NO_CNT; break;    \
56377 +        case  e_FM_DMA_DBG_CNT_DONE:                    \
56378 +            fsl_dma_dbg_cnt =  E_FMAN_DMA_DBG_CNT_DONE; break;        \
56379 +        case  e_FM_DMA_DBG_CNT_COMM_Q_EM:                    \
56380 +            fsl_dma_dbg_cnt =  E_FMAN_DMA_DBG_CNT_COMM_Q_EM; break;    \
56381 +        case  e_FM_DMA_DBG_CNT_INT_READ_EM:                        \
56382 +            fsl_dma_dbg_cnt =  E_FMAN_DMA_DBG_CNT_INT_READ_EM; break;        \
56383 +        case  e_FM_DMA_DBG_CNT_INT_WRITE_EM:                        \
56384 +            fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_INT_WRITE_EM ; break;        \
56385 +        case  e_FM_DMA_DBG_CNT_FPM_WAIT:                        \
56386 +            fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_FPM_WAIT ; break;        \
56387 +        case  e_FM_DMA_DBG_CNT_SIGLE_BIT_ECC:                        \
56388 +            fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_SIGLE_BIT_ECC ; break;        \
56389 +        case  e_FM_DMA_DBG_CNT_RAW_WAR_PROT:                        \
56390 +            fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT ; break;        \
56391 +        default: \
56392 +            fsl_dma_dbg_cnt =  E_FMAN_DMA_DBG_NO_CNT; break;    \
56393 +    }
56394 +
56395 +#define FMAN_DMA_EMER_TRANS(fsl_dma_emer, _dma_emer) \
56396 +    switch (_dma_emer){ \
56397 +        case  e_FM_DMA_EM_EBS:                    \
56398 +            fsl_dma_emer =  E_FMAN_DMA_EM_EBS; break;    \
56399 +        case  e_FM_DMA_EM_SOS:                    \
56400 +            fsl_dma_emer =  E_FMAN_DMA_EM_SOS; break;        \
56401 +        default: \
56402 +            fsl_dma_emer =  E_FMAN_DMA_EM_EBS; break;    \
56403 +    }
56404 +
56405 +#define FMAN_DMA_ERR_TRANS(fsl_dma_err, _dma_err) \
56406 +    switch (_dma_err){ \
56407 +        case  e_FM_DMA_ERR_CATASTROPHIC:                    \
56408 +            fsl_dma_err =  E_FMAN_DMA_ERR_CATASTROPHIC; break;    \
56409 +        case  e_FM_DMA_ERR_REPORT:                    \
56410 +            fsl_dma_err =  E_FMAN_DMA_ERR_REPORT; break;        \
56411 +        default: \
56412 +            fsl_dma_err =  E_FMAN_DMA_ERR_CATASTROPHIC; break;    \
56413 +    }
56414 +
56415 +#define FMAN_CATASTROPHIC_ERR_TRANS(fsl_catastrophic_err, _catastrophic_err) \
56416 +    switch (_catastrophic_err){ \
56417 +        case  e_FM_CATASTROPHIC_ERR_STALL_PORT:                    \
56418 +            fsl_catastrophic_err =  E_FMAN_CATAST_ERR_STALL_PORT; break;    \
56419 +        case  e_FM_CATASTROPHIC_ERR_STALL_TASK:                    \
56420 +            fsl_catastrophic_err =  E_FMAN_CATAST_ERR_STALL_TASK; break;        \
56421 +        default: \
56422 +            fsl_catastrophic_err =  E_FMAN_CATAST_ERR_STALL_PORT; break;    \
56423 +    }
56424 +
56425 +#define FMAN_COUNTERS_TRANS(fsl_counters, _counters) \
56426 +    switch (_counters){ \
56427 +        case  e_FM_COUNTERS_ENQ_TOTAL_FRAME:                    \
56428 +            fsl_counters =  E_FMAN_COUNTERS_ENQ_TOTAL_FRAME; break;    \
56429 +        case  e_FM_COUNTERS_DEQ_TOTAL_FRAME:                    \
56430 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_TOTAL_FRAME; break;        \
56431 +        case  e_FM_COUNTERS_DEQ_0:                    \
56432 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_0; break;    \
56433 +        case  e_FM_COUNTERS_DEQ_1:                    \
56434 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_1; break;        \
56435 +        case  e_FM_COUNTERS_DEQ_2:                    \
56436 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_2; break;    \
56437 +        case  e_FM_COUNTERS_DEQ_3:                    \
56438 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_3; break;        \
56439 +        case  e_FM_COUNTERS_DEQ_FROM_DEFAULT:                    \
56440 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_FROM_DEFAULT; break;    \
56441 +        case  e_FM_COUNTERS_DEQ_FROM_CONTEXT:                    \
56442 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_FROM_CONTEXT; break;        \
56443 +        case  e_FM_COUNTERS_DEQ_FROM_FD:                    \
56444 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_FROM_FD; break;    \
56445 +        case  e_FM_COUNTERS_DEQ_CONFIRM:                    \
56446 +            fsl_counters =  E_FMAN_COUNTERS_DEQ_CONFIRM; break;        \
56447 +        default: \
56448 +            fsl_counters =  E_FMAN_COUNTERS_ENQ_TOTAL_FRAME; break;    \
56449 +    }
56450 +
56451 +/**************************************************************************//**
56452 + @Description       defaults
56453 +*//***************************************************************************/
56454 +#define DEFAULT_exceptions                 (FM_EX_DMA_BUS_ERROR            |\
56455 +                                            FM_EX_DMA_READ_ECC              |\
56456 +                                            FM_EX_DMA_SYSTEM_WRITE_ECC      |\
56457 +                                            FM_EX_DMA_FM_WRITE_ECC          |\
56458 +                                            FM_EX_FPM_STALL_ON_TASKS        |\
56459 +                                            FM_EX_FPM_SINGLE_ECC            |\
56460 +                                            FM_EX_FPM_DOUBLE_ECC            |\
56461 +                                            FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID|\
56462 +                                            FM_EX_BMI_LIST_RAM_ECC          |\
56463 +                                            FM_EX_BMI_STORAGE_PROFILE_ECC   |\
56464 +                                            FM_EX_BMI_STATISTICS_RAM_ECC    |\
56465 +                                            FM_EX_IRAM_ECC                  |\
56466 +                                            FM_EX_MURAM_ECC                 |\
56467 +                                            FM_EX_BMI_DISPATCH_RAM_ECC      |\
56468 +                                            FM_EX_QMI_DOUBLE_ECC            |\
56469 +                                            FM_EX_QMI_SINGLE_ECC)
56470 +
56471 +#define DEFAULT_eccEnable                   FALSE
56472 +#ifdef FM_PEDANTIC_DMA
56473 +#define DEFAULT_aidOverride                 TRUE
56474 +#else
56475 +#define DEFAULT_aidOverride                 FALSE
56476 +#endif /* FM_PEDANTIC_DMA */
56477 +#define DEFAULT_aidMode                     e_FM_DMA_AID_OUT_TNUM
56478 +#define DEFAULT_dmaStopOnBusError           FALSE
56479 +#define DEFAULT_stopAtBusError              FALSE
56480 +#define DEFAULT_axiDbgNumOfBeats            1
56481 +#define DEFAULT_dmaReadIntBufLow            ((DMA_THRESH_MAX_BUF+1)/2)
56482 +#define DEFAULT_dmaReadIntBufHigh           ((DMA_THRESH_MAX_BUF+1)*3/4)
56483 +#define DEFAULT_dmaWriteIntBufLow           ((DMA_THRESH_MAX_BUF+1)/2)
56484 +#define DEFAULT_dmaWriteIntBufHigh          ((DMA_THRESH_MAX_BUF+1)*3/4)
56485 +#define DEFAULT_catastrophicErr             e_FM_CATASTROPHIC_ERR_STALL_PORT
56486 +#define DEFAULT_dmaErr                      e_FM_DMA_ERR_CATASTROPHIC
56487 +#define DEFAULT_resetOnInit                 FALSE
56488 +#define DEFAULT_resetOnInitOverrideCallback NULL
56489 +#define DEFAULT_haltOnExternalActivation    FALSE   /* do not change! if changed, must be disabled for rev1 ! */
56490 +#define DEFAULT_haltOnUnrecoverableEccError FALSE   /* do not change! if changed, must be disabled for rev1 ! */
56491 +#define DEFAULT_externalEccRamsEnable       FALSE
56492 +#define DEFAULT_VerifyUcode                 FALSE
56493 +
56494 +#if (DPAA_VERSION < 11)
56495 +#define DEFAULT_totalFifoSize(major, minor)     \
56496 +    (((major == 2) || (major == 5)) ?           \
56497 +     (100*KILOBYTE) : ((major == 4) ?           \
56498 +     (49*KILOBYTE) : (122*KILOBYTE)))
56499 +#define DEFAULT_totalNumOfTasks(major, minor)   \
56500 +            BMI_MAX_NUM_OF_TASKS
56501 +
56502 +#define DEFAULT_dmaCommQLow                 ((DMA_THRESH_MAX_COMMQ+1)/2)
56503 +#define DEFAULT_dmaCommQHigh                ((DMA_THRESH_MAX_COMMQ+1)*3/4)
56504 +#define DEFAULT_cacheOverride               e_FM_DMA_NO_CACHE_OR
56505 +#define DEFAULT_dmaCamNumOfEntries          32
56506 +#define DEFAULT_dmaDbgCntMode               e_FM_DMA_DBG_NO_CNT
56507 +#define DEFAULT_dmaEnEmergency              FALSE
56508 +#define DEFAULT_dmaSosEmergency             0
56509 +#define DEFAULT_dmaWatchdog                 0 /* disabled */
56510 +#define DEFAULT_dmaEnEmergencySmoother      FALSE
56511 +#define DEFAULT_dmaEmergencySwitchCounter   0
56512 +
56513 +#define DEFAULT_dispLimit                   0
56514 +#define DEFAULT_prsDispTh                   16
56515 +#define DEFAULT_plcrDispTh                  16
56516 +#define DEFAULT_kgDispTh                    16
56517 +#define DEFAULT_bmiDispTh                   16
56518 +#define DEFAULT_qmiEnqDispTh                16
56519 +#define DEFAULT_qmiDeqDispTh                16
56520 +#define DEFAULT_fmCtl1DispTh                16
56521 +#define DEFAULT_fmCtl2DispTh                16
56522 +
56523 +#else  /* (DPAA_VERSION < 11) */
56524 +/* Defaults are registers' reset values */
56525 +#define DEFAULT_totalFifoSize(major, minor)                    \
56526 +       (((major == 6) && ((minor == 1) || (minor == 4))) ?     \
56527 +       (156*KILOBYTE) : (295*KILOBYTE))
56528 +
56529 +/* According to the default value of FMBM_CFG2[TNTSKS] */
56530 +#define DEFAULT_totalNumOfTasks(major, minor)   \
56531 +      (((major == 6) && ((minor == 1) || (minor == 4))) ? 59 : 124)
56532 +
56533 +#define DEFAULT_dmaCommQLow                 0x2A
56534 +#define DEFAULT_dmaCommQHigh                0x3F
56535 +#define DEFAULT_cacheOverride               e_FM_DMA_NO_CACHE_OR
56536 +#define DEFAULT_dmaCamNumOfEntries          64
56537 +#define DEFAULT_dmaDbgCntMode               e_FM_DMA_DBG_NO_CNT
56538 +#define DEFAULT_dmaEnEmergency              FALSE
56539 +#define DEFAULT_dmaSosEmergency             0
56540 +#define DEFAULT_dmaWatchdog                 0 /* disabled */
56541 +#define DEFAULT_dmaEnEmergencySmoother      FALSE
56542 +#define DEFAULT_dmaEmergencySwitchCounter   0
56543 +
56544 +#define DEFAULT_dispLimit                   0
56545 +#define DEFAULT_prsDispTh                   16
56546 +#define DEFAULT_plcrDispTh                  16
56547 +#define DEFAULT_kgDispTh                    16
56548 +#define DEFAULT_bmiDispTh                   16
56549 +#define DEFAULT_qmiEnqDispTh                16
56550 +#define DEFAULT_qmiDeqDispTh                16
56551 +#define DEFAULT_fmCtl1DispTh                16
56552 +#define DEFAULT_fmCtl2DispTh                16
56553 +#endif /* (DPAA_VERSION < 11) */
56554 +
56555 +#define FM_TIMESTAMP_1_USEC_BIT             8
56556 +
56557 +/**************************************************************************//**
56558 + @Collection   Defines used for enabling/disabling FM interrupts
56559 + @{
56560 +*//***************************************************************************/
56561 +#define ERR_INTR_EN_DMA         0x00010000
56562 +#define ERR_INTR_EN_FPM         0x80000000
56563 +#define ERR_INTR_EN_BMI         0x00800000
56564 +#define ERR_INTR_EN_QMI         0x00400000
56565 +#define ERR_INTR_EN_PRS         0x00200000
56566 +#define ERR_INTR_EN_KG          0x00100000
56567 +#define ERR_INTR_EN_PLCR        0x00080000
56568 +#define ERR_INTR_EN_MURAM       0x00040000
56569 +#define ERR_INTR_EN_IRAM        0x00020000
56570 +#define ERR_INTR_EN_10G_MAC0    0x00008000
56571 +#define ERR_INTR_EN_10G_MAC1    0x00000040
56572 +#define ERR_INTR_EN_1G_MAC0     0x00004000
56573 +#define ERR_INTR_EN_1G_MAC1     0x00002000
56574 +#define ERR_INTR_EN_1G_MAC2     0x00001000
56575 +#define ERR_INTR_EN_1G_MAC3     0x00000800
56576 +#define ERR_INTR_EN_1G_MAC4     0x00000400
56577 +#define ERR_INTR_EN_1G_MAC5     0x00000200
56578 +#define ERR_INTR_EN_1G_MAC6     0x00000100
56579 +#define ERR_INTR_EN_1G_MAC7     0x00000080
56580 +#define ERR_INTR_EN_MACSEC_MAC0 0x00000001
56581 +
56582 +#define INTR_EN_QMI             0x40000000
56583 +#define INTR_EN_PRS             0x20000000
56584 +#define INTR_EN_WAKEUP          0x10000000
56585 +#define INTR_EN_PLCR            0x08000000
56586 +#define INTR_EN_1G_MAC0         0x00080000
56587 +#define INTR_EN_1G_MAC1         0x00040000
56588 +#define INTR_EN_1G_MAC2         0x00020000
56589 +#define INTR_EN_1G_MAC3         0x00010000
56590 +#define INTR_EN_1G_MAC4         0x00000040
56591 +#define INTR_EN_1G_MAC5         0x00000020
56592 +#define INTR_EN_1G_MAC6         0x00000008
56593 +#define INTR_EN_1G_MAC7         0x00000002
56594 +#define INTR_EN_10G_MAC0        0x00200000
56595 +#define INTR_EN_10G_MAC1        0x00100000
56596 +#define INTR_EN_REV0            0x00008000
56597 +#define INTR_EN_REV1            0x00004000
56598 +#define INTR_EN_REV2            0x00002000
56599 +#define INTR_EN_REV3            0x00001000
56600 +#define INTR_EN_BRK             0x00000080
56601 +#define INTR_EN_TMR             0x01000000
56602 +#define INTR_EN_MACSEC_MAC0     0x00000001
56603 +/* @} */
56604 +
56605 +/**************************************************************************//**
56606 + @Description       Memory Mapped Registers
56607 +*//***************************************************************************/
56608 +
56609 +#if defined(__MWERKS__) && !defined(__GNUC__)
56610 +#pragma pack(push,1)
56611 +#endif /* defined(__MWERKS__) && ... */
56612 +
56613 +typedef struct
56614 +{
56615 +    volatile uint32_t   iadd;           /**< FM IRAM instruction address register */
56616 +    volatile uint32_t   idata;          /**< FM IRAM instruction data register */
56617 +    volatile uint32_t   itcfg;          /**< FM IRAM timing config register */
56618 +    volatile uint32_t   iready;         /**< FM IRAM ready register */
56619 +    volatile uint32_t   res[0x1FFFC];
56620 +} t_FMIramRegs;
56621 +
56622 +/* Trace buffer registers -
56623 +   each FM Controller has its own trace buffer residing at FM_MM_TRB(fmCtrlIndex) offset */
56624 +typedef struct t_FmTrbRegs
56625 +{
56626 +    volatile uint32_t   tcrh;
56627 +    volatile uint32_t   tcrl;
56628 +    volatile uint32_t   tesr;
56629 +    volatile uint32_t   tecr0h;
56630 +    volatile uint32_t   tecr0l;
56631 +    volatile uint32_t   terf0h;
56632 +    volatile uint32_t   terf0l;
56633 +    volatile uint32_t   tecr1h;
56634 +    volatile uint32_t   tecr1l;
56635 +    volatile uint32_t   terf1h;
56636 +    volatile uint32_t   terf1l;
56637 +    volatile uint32_t   tpcch;
56638 +    volatile uint32_t   tpccl;
56639 +    volatile uint32_t   tpc1h;
56640 +    volatile uint32_t   tpc1l;
56641 +    volatile uint32_t   tpc2h;
56642 +    volatile uint32_t   tpc2l;
56643 +    volatile uint32_t   twdimr;
56644 +    volatile uint32_t   twicvr;
56645 +    volatile uint32_t   tar;
56646 +    volatile uint32_t   tdr;
56647 +    volatile uint32_t   tsnum1;
56648 +    volatile uint32_t   tsnum2;
56649 +    volatile uint32_t   tsnum3;
56650 +    volatile uint32_t   tsnum4;
56651 +} t_FmTrbRegs;
56652 +
56653 +#if defined(__MWERKS__) && !defined(__GNUC__)
56654 +#pragma pack(pop)
56655 +#endif /* defined(__MWERKS__) && ... */
56656 +
56657 +/**************************************************************************//**
56658 + @Description       General defines
56659 +*//***************************************************************************/
56660 +#define FM_DEBUG_STATUS_REGISTER_OFFSET     0x000d1084UL
56661 +#define FM_FW_DEBUG_INSTRUCTION             0x6ffff805UL
56662 +
56663 +/**************************************************************************//**
56664 + @Description       FPM defines
56665 +*//***************************************************************************/
56666 +/* masks */
56667 +#define FPM_BRKC_RDBG                   0x00000200
56668 +#define FPM_BRKC_SLP                    0x00000800
56669 +/**************************************************************************//**
56670 + @Description       BMI defines
56671 +*//***************************************************************************/
56672 +/* masks */
56673 +#define BMI_INIT_START                      0x80000000
56674 +#define BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC 0x80000000
56675 +#define BMI_ERR_INTR_EN_LIST_RAM_ECC        0x40000000
56676 +#define BMI_ERR_INTR_EN_STATISTICS_RAM_ECC  0x20000000
56677 +#define BMI_ERR_INTR_EN_DISPATCH_RAM_ECC    0x10000000
56678 +/**************************************************************************//**
56679 + @Description       QMI defines
56680 +*//***************************************************************************/
56681 +/* masks */
56682 +#define QMI_ERR_INTR_EN_DOUBLE_ECC      0x80000000
56683 +#define QMI_ERR_INTR_EN_DEQ_FROM_DEF    0x40000000
56684 +#define QMI_INTR_EN_SINGLE_ECC          0x80000000
56685 +
56686 +/**************************************************************************//**
56687 + @Description       IRAM defines
56688 +*//***************************************************************************/
56689 +/* masks */
56690 +#define IRAM_IADD_AIE                   0x80000000
56691 +#define IRAM_READY                      0x80000000
56692 +
56693 +/**************************************************************************//**
56694 + @Description       TRB defines
56695 +*//***************************************************************************/
56696 +/* masks */
56697 +#define TRB_TCRH_RESET              0x04000000
56698 +#define TRB_TCRH_ENABLE_COUNTERS    0x84008000
56699 +#define TRB_TCRH_DISABLE_COUNTERS   0x8400C000
56700 +#define TRB_TCRL_RESET              0x20000000
56701 +#define TRB_TCRL_UTIL               0x00000460
56702 +typedef struct {
56703 +    void        (*f_Isr) (t_Handle h_Arg, uint32_t event);
56704 +    t_Handle    h_SrcHandle;
56705 +} t_FmanCtrlIntrSrc;
56706 +
56707 +
56708 +typedef void (t_FmanCtrlIsr)( t_Handle h_Fm, uint32_t event);
56709 +
56710 +typedef struct
56711 +{
56712 +/***************************/
56713 +/* Master/Guest parameters */
56714 +/***************************/
56715 +    uint8_t                     fmId;
56716 +    e_FmPortType                portsTypes[FM_MAX_NUM_OF_HW_PORT_IDS];
56717 +    uint16_t                    fmClkFreq;
56718 +    uint16_t                    fmMacClkFreq;
56719 +    t_FmRevisionInfo            revInfo;
56720 +/**************************/
56721 +/* Master Only parameters */
56722 +/**************************/
56723 +    bool                        enabledTimeStamp;
56724 +    uint8_t                     count1MicroBit;
56725 +    uint8_t                     totalNumOfTasks;
56726 +    uint32_t                    totalFifoSize;
56727 +    uint8_t                     maxNumOfOpenDmas;
56728 +    uint8_t                     accumulatedNumOfTasks;
56729 +    uint32_t                    accumulatedFifoSize;
56730 +    uint8_t                     accumulatedNumOfOpenDmas;
56731 +    uint8_t                     accumulatedNumOfDeqTnums;
56732 +#ifdef FM_LOW_END_RESTRICTION
56733 +    bool                        lowEndRestriction;
56734 +#endif /* FM_LOW_END_RESTRICTION */
56735 +    uint32_t                    exceptions;
56736 +    int                         irq;
56737 +    int                         errIrq;
56738 +    bool                        ramsEccEnable;
56739 +    bool                        explicitEnable;
56740 +    bool                        internalCall;
56741 +    uint8_t                     ramsEccOwners;
56742 +    uint32_t                    extraFifoPoolSize;
56743 +    uint8_t                     extraTasksPoolSize;
56744 +    uint8_t                     extraOpenDmasPoolSize;
56745 +#if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS)
56746 +    uint16_t                    portMaxFrameLengths10G[FM_MAX_NUM_OF_10G_MACS];
56747 +    uint16_t                    macMaxFrameLengths10G[FM_MAX_NUM_OF_10G_MACS];
56748 +#endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */
56749 +    uint16_t                    portMaxFrameLengths1G[FM_MAX_NUM_OF_1G_MACS];
56750 +    uint16_t                    macMaxFrameLengths1G[FM_MAX_NUM_OF_1G_MACS];
56751 +} t_FmStateStruct;
56752 +
56753 +#if (DPAA_VERSION >= 11)
56754 +typedef struct t_FmMapParam {
56755 +    uint16_t        profilesBase;
56756 +    uint16_t        numOfProfiles;
56757 +    t_Handle        h_FmPort;
56758 +} t_FmMapParam;
56759 +
56760 +typedef struct t_FmAllocMng {
56761 +    bool            allocated;
56762 +    uint8_t         ownerId; /* guestId for KG in multi-partition only,
56763 +                                portId for PLCR in any environment */
56764 +} t_FmAllocMng;
56765 +
56766 +typedef struct t_FmPcdSpEntry {
56767 +    bool            valid;
56768 +    t_FmAllocMng    profilesMng;
56769 +} t_FmPcdSpEntry;
56770 +
56771 +typedef struct t_FmSp {
56772 +    void            *p_FmPcdStoragePrflRegs;
56773 +    t_FmPcdSpEntry  profiles[FM_VSP_MAX_NUM_OF_ENTRIES];
56774 +    t_FmMapParam    portsMapping[FM_MAX_NUM_OF_PORTS];
56775 +} t_FmSp;
56776 +#endif /* (DPAA_VERSION >= 11) */
56777 +
56778 +typedef struct t_Fm
56779 +{
56780 +/***************************/
56781 +/* Master/Guest parameters */
56782 +/***************************/
56783 +/* locals for recovery */
56784 +    uintptr_t                   baseAddr;
56785 +
56786 +/* un-needed for recovery */
56787 +    t_Handle                    h_Pcd;
56788 +    char                        fmModuleName[MODULE_NAME_SIZE];
56789 +    char                        fmIpcHandlerModuleName[FM_MAX_NUM_OF_GUESTS][MODULE_NAME_SIZE];
56790 +    t_Handle                    h_IpcSessions[FM_MAX_NUM_OF_GUESTS];
56791 +    t_FmIntrSrc                 intrMng[e_FM_EV_DUMMY_LAST];    /* FM exceptions user callback */
56792 +    uint8_t                     guestId;
56793 +/**************************/
56794 +/* Master Only parameters */
56795 +/**************************/
56796 +/* locals for recovery */
56797 +    struct fman_fpm_regs *p_FmFpmRegs;
56798 +    struct fman_bmi_regs *p_FmBmiRegs;
56799 +    struct fman_qmi_regs *p_FmQmiRegs;
56800 +    struct fman_dma_regs *p_FmDmaRegs;
56801 +    struct fman_regs            *p_FmRegs;
56802 +    t_FmExceptionsCallback      *f_Exception;
56803 +    t_FmBusErrorCallback        *f_BusError;
56804 +    t_Handle                    h_App;                          /* Application handle */
56805 +    t_Handle                    h_Spinlock;
56806 +    bool                        recoveryMode;
56807 +    t_FmStateStruct             *p_FmStateStruct;
56808 +    uint16_t                    tnumAgingPeriod;
56809 +#if (DPAA_VERSION >= 11)
56810 +    t_FmSp                      *p_FmSp;
56811 +    uint8_t                     partNumOfVSPs;
56812 +    uint8_t                     partVSPBase;
56813 +    uintptr_t                   vspBaseAddr;
56814 +#endif /* (DPAA_VERSION >= 11) */
56815 +    bool                        portsPreFetchConfigured[FM_MAX_NUM_OF_HW_PORT_IDS]; /* Prefetch configration per Tx-port */
56816 +    bool                        portsPreFetchValue[FM_MAX_NUM_OF_HW_PORT_IDS];      /* Prefetch configration per Tx-port */
56817 +
56818 +/* un-needed for recovery */
56819 +    struct fman_cfg             *p_FmDriverParam;
56820 +    t_Handle                    h_FmMuram;
56821 +    uint64_t                    fmMuramPhysBaseAddr;
56822 +    bool                        independentMode;
56823 +    bool                        hcPortInitialized;
56824 +    uintptr_t                   camBaseAddr;                    /* save for freeing */
56825 +    uintptr_t                   resAddr;
56826 +    uintptr_t                   fifoBaseAddr;                   /* save for freeing */
56827 +    t_FmanCtrlIntrSrc           fmanCtrlIntr[FM_NUM_OF_FMAN_CTRL_EVENT_REGS];    /* FM exceptions user callback */
56828 +    bool                        usedEventRegs[FM_NUM_OF_FMAN_CTRL_EVENT_REGS];
56829 +    t_FmFirmwareParams          firmware;
56830 +    bool                        fwVerify;
56831 +    bool                        resetOnInit;
56832 +    t_FmResetOnInitOverrideCallback     *f_ResetOnInitOverride;
56833 +    uint32_t                    userSetExceptions;
56834 +} t_Fm;
56835 +
56836 +
56837 +#endif /* __FM_H */
56838 --- /dev/null
56839 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_ipc.h
56840 @@ -0,0 +1,465 @@
56841 +/*
56842 + * Copyright 2008-2012 Freescale Semiconductor Inc.
56843 + *
56844 + * Redistribution and use in source and binary forms, with or without
56845 + * modification, are permitted provided that the following conditions are met:
56846 + *     * Redistributions of source code must retain the above copyright
56847 + *       notice, this list of conditions and the following disclaimer.
56848 + *     * Redistributions in binary form must reproduce the above copyright
56849 + *       notice, this list of conditions and the following disclaimer in the
56850 + *       documentation and/or other materials provided with the distribution.
56851 + *     * Neither the name of Freescale Semiconductor nor the
56852 + *       names of its contributors may be used to endorse or promote products
56853 + *       derived from this software without specific prior written permission.
56854 + *
56855 + *
56856 + * ALTERNATIVELY, this software may be distributed under the terms of the
56857 + * GNU General Public License ("GPL") as published by the Free Software
56858 + * Foundation, either version 2 of that License or (at your option) any
56859 + * later version.
56860 + *
56861 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
56862 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
56863 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
56864 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
56865 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
56866 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
56867 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
56868 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
56869 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
56870 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56871 + */
56872 +
56873 +
56874 +/**************************************************************************//**
56875 + @File          fm_ipc.h
56876 +
56877 + @Description   FM Inter-Partition prototypes, structures and definitions.
56878 +*//***************************************************************************/
56879 +#ifndef __FM_IPC_H
56880 +#define __FM_IPC_H
56881 +
56882 +#include "error_ext.h"
56883 +#include "std_ext.h"
56884 +
56885 +
56886 +/**************************************************************************//**
56887 + @Group         FM_grp Frame Manager API
56888 +
56889 + @Description   FM API functions, definitions and enums
56890 +
56891 + @{
56892 +*//***************************************************************************/
56893 +
56894 +/**************************************************************************//**
56895 + @Group         FM_IPC_grp FM Inter-Partition messaging Unit
56896 +
56897 + @Description   FM Inter-Partition messaging unit API definitions and enums.
56898 +
56899 + @{
56900 +*//***************************************************************************/
56901 +
56902 +#if defined(__MWERKS__) && !defined(__GNUC__)
56903 +#pragma pack(push,1)
56904 +#endif /* defined(__MWERKS__) && ... */
56905 +
56906 +/**************************************************************************//**
56907 + @Description   enum for defining MAC types
56908 +*//***************************************************************************/
56909 +
56910 +/**************************************************************************//**
56911 + @Description   A structure of parameters for specifying a MAC.
56912 +*//***************************************************************************/
56913 +typedef _Packed struct
56914 +{
56915 +    uint8_t         id;
56916 +    uint32_t        enumType;
56917 +} _PackedType t_FmIpcMacParams;
56918 +
56919 +/**************************************************************************//**
56920 + @Description   A structure of parameters for specifying a MAC.
56921 +*//***************************************************************************/
56922 +typedef _Packed struct
56923 +{
56924 +    t_FmIpcMacParams    macParams;
56925 +    uint16_t            maxFrameLength;
56926 +} _PackedType t_FmIpcMacMaxFrameParams;
56927 +
56928 +/**************************************************************************//**
56929 + @Description   FM physical Address
56930 +*//***************************************************************************/
56931 +typedef _Packed struct t_FmIpcPhysAddr
56932 +{
56933 +    volatile uint8_t    high;
56934 +    volatile uint32_t   low;
56935 +} _PackedType t_FmIpcPhysAddr;
56936 +
56937 +
56938 +typedef _Packed struct t_FmIpcPortOutInitParams {
56939 +    uint8_t             numOfTasks;         /**< OUT */
56940 +    uint8_t             numOfExtraTasks;    /**< OUT */
56941 +    uint8_t             numOfOpenDmas;      /**< OUT */
56942 +    uint8_t             numOfExtraOpenDmas; /**< OUT */
56943 +    uint32_t            sizeOfFifo;         /**< OUT */
56944 +    uint32_t            extraSizeOfFifo;    /**< OUT */
56945 +    t_FmIpcPhysAddr     ipcPhysAddr;        /**< OUT */
56946 +} _PackedType t_FmIpcPortOutInitParams;
56947 +
56948 +/**************************************************************************//**
56949 + @Description   Structure for IPC communication during FM_PORT_Init.
56950 +*//***************************************************************************/
56951 +typedef _Packed struct t_FmIpcPortInInitParams {
56952 +    uint8_t             hardwarePortId;     /**< IN. port Id */
56953 +    uint32_t            enumPortType;       /**< IN. Port type */
56954 +    uint8_t             boolIndependentMode;/**< IN. TRUE if FM Port operates in independent mode */
56955 +    uint16_t            liodnOffset;        /**< IN. Port's requested resource */
56956 +    uint8_t             numOfTasks;         /**< IN. Port's requested resource */
56957 +    uint8_t             numOfExtraTasks;    /**< IN. Port's requested resource */
56958 +    uint8_t             numOfOpenDmas;      /**< IN. Port's requested resource */
56959 +    uint8_t             numOfExtraOpenDmas; /**< IN. Port's requested resource */
56960 +    uint32_t            sizeOfFifo;         /**< IN. Port's requested resource */
56961 +    uint32_t            extraSizeOfFifo;    /**< IN. Port's requested resource */
56962 +    uint8_t             deqPipelineDepth;   /**< IN. Port's requested resource */
56963 +    uint16_t            maxFrameLength;     /**< IN. Port's max frame length. */
56964 +    uint16_t            liodnBase;          /**< IN. Irrelevant for P4080 rev 1.
56965 +                                                 LIODN base for this port, to be
56966 +                                                 used together with LIODN offset. */
56967 +} _PackedType t_FmIpcPortInInitParams;
56968 +
56969 +
56970 +/**************************************************************************//**
56971 + @Description   Structure for IPC communication between port and FM
56972 +                regarding tasks and open DMA resources management.
56973 +*//***************************************************************************/
56974 +typedef _Packed struct t_FmIpcPortRsrcParams {
56975 +    uint8_t             hardwarePortId;     /**< IN. port Id */
56976 +    uint32_t            val;                /**< IN. Port's requested resource */
56977 +    uint32_t            extra;              /**< IN. Port's requested resource */
56978 +    uint8_t             boolInitialConfig;
56979 +} _PackedType t_FmIpcPortRsrcParams;
56980 +
56981 +
56982 +/**************************************************************************//**
56983 + @Description   Structure for IPC communication between port and FM
56984 +                regarding tasks and open DMA resources management.
56985 +*//***************************************************************************/
56986 +typedef _Packed struct t_FmIpcPortFifoParams {
56987 +    t_FmIpcPortRsrcParams   rsrcParams;
56988 +    uint32_t                enumPortType;
56989 +    uint8_t                 boolIndependentMode;
56990 +    uint8_t                 deqPipelineDepth;
56991 +    uint8_t                 numOfPools;
56992 +    uint16_t                secondLargestBufSize;
56993 +    uint16_t                largestBufSize;
56994 +    uint8_t                 boolInitialConfig;
56995 +} _PackedType t_FmIpcPortFifoParams;
56996 +
56997 +/**************************************************************************//**
56998 + @Description   Structure for port-FM communication during FM_PORT_Free.
56999 +*//***************************************************************************/
57000 +typedef _Packed struct t_FmIpcPortFreeParams {
57001 +    uint8_t             hardwarePortId;         /**< IN. port Id */
57002 +    uint32_t            enumPortType;           /**< IN. Port type */
57003 +    uint8_t             deqPipelineDepth;       /**< IN. Port's requested resource */
57004 +} _PackedType t_FmIpcPortFreeParams;
57005 +
57006 +/**************************************************************************//**
57007 + @Description   Structure for defining DMA status
57008 +*//***************************************************************************/
57009 +typedef _Packed struct t_FmIpcDmaStatus {
57010 +    uint8_t    boolCmqNotEmpty;            /**< Command queue is not empty */
57011 +    uint8_t    boolBusError;               /**< Bus error occurred */
57012 +    uint8_t    boolReadBufEccError;        /**< Double ECC error on buffer Read */
57013 +    uint8_t    boolWriteBufEccSysError;    /**< Double ECC error on buffer write from system side */
57014 +    uint8_t    boolWriteBufEccFmError;     /**< Double ECC error on buffer write from FM side */
57015 +    uint8_t    boolSinglePortEccError;     /**< Single port ECC error from FM side */
57016 +} _PackedType t_FmIpcDmaStatus;
57017 +
57018 +typedef _Packed struct t_FmIpcRegisterIntr
57019 +{
57020 +    uint8_t         guestId;        /* IN */
57021 +    uint32_t        event;          /* IN */
57022 +} _PackedType t_FmIpcRegisterIntr;
57023 +
57024 +typedef _Packed struct t_FmIpcIsr
57025 +{
57026 +    uint8_t         boolErr;        /* IN */
57027 +    uint32_t        pendingReg;     /* IN */
57028 +} _PackedType t_FmIpcIsr;
57029 +
57030 +/**************************************************************************//**
57031 + @Description   structure for returning FM parameters
57032 +*//***************************************************************************/
57033 +typedef _Packed struct t_FmIpcParams {
57034 +    uint16_t        fmClkFreq;              /**< OUT: FM Clock frequency */
57035 +    uint16_t        fmMacClkFreq;           /**< OUT: FM MAC clock frequence */
57036 +    uint8_t         majorRev;               /**< OUT: FM Major revision */
57037 +    uint8_t         minorRev;               /**< OUT: FM Minor revision */
57038 +} _PackedType t_FmIpcParams;
57039 +
57040 +
57041 +/**************************************************************************//**
57042 + @Description   structure for returning Fman Ctrl Code revision information
57043 +*//***************************************************************************/
57044 +typedef _Packed struct t_FmIpcFmanCtrlCodeRevisionInfo {
57045 +    uint16_t        packageRev;             /**< OUT: Package revision */
57046 +    uint8_t         majorRev;               /**< OUT: Major revision */
57047 +    uint8_t         minorRev;               /**< OUT: Minor revision */
57048 +} _PackedType t_FmIpcFmanCtrlCodeRevisionInfo;
57049 +
57050 +/**************************************************************************//**
57051 + @Description   Structure for defining Fm number of Fman controlers
57052 +*//***************************************************************************/
57053 +typedef _Packed struct t_FmIpcPortNumOfFmanCtrls {
57054 +    uint8_t             hardwarePortId;         /**< IN. port Id */
57055 +    uint8_t             numOfFmanCtrls;         /**< IN. Port type */
57056 +    t_FmFmanCtrl        orFmanCtrl;             /**< IN. fman controller for order restoration*/
57057 +} t_FmIpcPortNumOfFmanCtrls;
57058 +
57059 +/**************************************************************************//**
57060 + @Description   structure for setting Fman contriller events
57061 +*//***************************************************************************/
57062 +typedef _Packed struct t_FmIpcFmanEvents {
57063 +    uint8_t     eventRegId;               /**< IN: Fman controller event register id */
57064 +    uint32_t    enableEvents;             /**< IN/OUT: required enabled events mask */
57065 +} _PackedType t_FmIpcFmanEvents;
57066 +
57067 +typedef _Packed struct t_FmIpcResourceAllocParams {
57068 +    uint8_t     guestId;
57069 +    uint16_t    base;
57070 +    uint16_t    num;
57071 +}_PackedType t_FmIpcResourceAllocParams;
57072 +
57073 +typedef _Packed struct t_FmIpcVspSetPortWindow {
57074 +    uint8_t     hardwarePortId;
57075 +    uint8_t     baseStorageProfile;
57076 +    uint8_t     log2NumOfProfiles;
57077 +}_PackedType t_FmIpcVspSetPortWindow;
57078 +
57079 +typedef _Packed struct t_FmIpcSetCongestionGroupPfcPriority {
57080 +    uint32_t     congestionGroupId;
57081 +    uint8_t      priorityBitMap;
57082 +}_PackedType t_FmIpcSetCongestionGroupPfcPriority;
57083 +
57084 +#define FM_IPC_MAX_REPLY_BODY_SIZE  20
57085 +#define FM_IPC_MAX_REPLY_SIZE       (FM_IPC_MAX_REPLY_BODY_SIZE + sizeof(uint32_t))
57086 +#define FM_IPC_MAX_MSG_SIZE         30
57087 +
57088 +typedef _Packed struct t_FmIpcMsg
57089 +{
57090 +    uint32_t    msgId;
57091 +    uint8_t     msgBody[FM_IPC_MAX_MSG_SIZE];
57092 +} _PackedType t_FmIpcMsg;
57093 +
57094 +typedef _Packed struct t_FmIpcReply
57095 +{
57096 +    uint32_t    error;
57097 +    uint8_t     replyBody[FM_IPC_MAX_REPLY_BODY_SIZE];
57098 +} _PackedType t_FmIpcReply;
57099 +
57100 +#if defined(__MWERKS__) && !defined(__GNUC__)
57101 +#pragma pack(pop)
57102 +#endif /* defined(__MWERKS__) && ... */
57103 +
57104 +
57105 +/***************************************************************************/
57106 +/************************ FRONT-END-TO-BACK-END*****************************/
57107 +/***************************************************************************/
57108 +
57109 +/**************************************************************************//**
57110 + @Function      FM_GET_TIMESTAMP_SCALE
57111 +
57112 + @Description   Used by FM front-end.
57113 +
57114 + @Param[out]    uint32_t Pointer
57115 +*//***************************************************************************/
57116 +#define FM_GET_TIMESTAMP_SCALE      1
57117 +
57118 +/**************************************************************************//**
57119 + @Function      FM_GET_COUNTER
57120 +
57121 + @Description   Used by FM front-end.
57122 +
57123 + @Param[in/out] t_FmIpcGetCounter Pointer
57124 +*//***************************************************************************/
57125 +#define FM_GET_COUNTER              2
57126 +
57127 +/**************************************************************************//**
57128 + @Function      FM_GET_SET_PORT_PARAMS
57129 +
57130 + @Description   Used by FM front-end for the PORT module in order to set and get
57131 +                parameters in/from master FM module on FM PORT initialization time.
57132 +
57133 + @Param[in/out] t_FmIcPortInitParams Pointer
57134 +*//***************************************************************************/
57135 +#define FM_GET_SET_PORT_PARAMS      4
57136 +
57137 +/**************************************************************************//**
57138 + @Function      FM_FREE_PORT
57139 +
57140 + @Description   Used by FM front-end for the PORT module when a port is freed
57141 +                to free all FM PORT resources.
57142 +
57143 + @Param[in]     uint8_t Pointer
57144 +*//***************************************************************************/
57145 +#define FM_FREE_PORT                5
57146 +
57147 +/**************************************************************************//**
57148 + @Function      FM_RESET_MAC
57149 +
57150 + @Description   Used by front-end for the MAC module to reset the MAC registers
57151 +
57152 + @Param[in]     t_FmIpcMacParams Pointer .
57153 +*//***************************************************************************/
57154 +#define FM_RESET_MAC                6
57155 +
57156 +/**************************************************************************//**
57157 + @Function      FM_RESUME_STALLED_PORT
57158 +
57159 + @Description   Used by FM front-end for the PORT module in order to
57160 +                release a stalled FM Port.
57161 +
57162 + @Param[in]     uint8_t Pointer
57163 +*//***************************************************************************/
57164 +#define FM_RESUME_STALLED_PORT      7
57165 +
57166 +/**************************************************************************//**
57167 + @Function      FM_IS_PORT_STALLED
57168 +
57169 + @Description   Used by FM front-end for the PORT module in order to check whether
57170 +                an FM port is stalled.
57171 +
57172 + @Param[in/out] t_FmIcPortIsStalled Pointer
57173 +*//***************************************************************************/
57174 +#define FM_IS_PORT_STALLED          8
57175 +
57176 +/**************************************************************************//**
57177 + @Function      FM_GET_PARAMS
57178 +
57179 + @Description   Used by FM front-end for the PORT module in order to dump
57180 +                return FM parameters.
57181 +
57182 + @Param[in]     uint8_t Pointer
57183 +*//***************************************************************************/
57184 +#define FM_GET_PARAMS                  10
57185 +
57186 +/**************************************************************************//**
57187 + @Function      FM_REGISTER_INTR
57188 +
57189 + @Description   Used by FM front-end to register an interrupt handler to
57190 +                be called upon interrupt for guest.
57191 +
57192 + @Param[out]    t_FmIpcRegisterIntr Pointer
57193 +*//***************************************************************************/
57194 +#define FM_REGISTER_INTR            11
57195 +
57196 +/**************************************************************************//**
57197 + @Function      FM_DMA_STAT
57198 +
57199 + @Description   Used by FM front-end to read the FM DMA status.
57200 +
57201 + @Param[out]    t_FmIpcDmaStatus Pointer
57202 +*//***************************************************************************/
57203 +#define FM_DMA_STAT                 13
57204 +
57205 +/**************************************************************************//**
57206 + @Function      FM_ALLOC_FMAN_CTRL_EVENT_REG
57207 +
57208 + @Description   Used by FM front-end to allocate event register.
57209 +
57210 + @Param[out]    Event register id Pointer
57211 +*//***************************************************************************/
57212 +#define FM_ALLOC_FMAN_CTRL_EVENT_REG 14
57213 +
57214 +/**************************************************************************//**
57215 + @Function      FM_FREE_FMAN_CTRL_EVENT_REG
57216 +
57217 + @Description   Used by FM front-end to free locate event register.
57218 +
57219 + @Param[in]    uint8_t Pointer - Event register id
57220 +*//***************************************************************************/
57221 +#define FM_FREE_FMAN_CTRL_EVENT_REG 15
57222 +
57223 +/**************************************************************************//**
57224 + @Function      FM_SET_FMAN_CTRL_EVENTS_ENABLE
57225 +
57226 + @Description   Used by FM front-end to enable events in the FPM
57227 +                Fman controller event register.
57228 +
57229 + @Param[in]    t_FmIpcFmanEvents Pointer
57230 +*//***************************************************************************/
57231 +#define FM_SET_FMAN_CTRL_EVENTS_ENABLE 16
57232 +
57233 +/**************************************************************************//**
57234 + @Function      FM_SET_FMAN_CTRL_EVENTS_ENABLE
57235 +
57236 + @Description   Used by FM front-end to enable events in the FPM
57237 +                Fman controller event register.
57238 +
57239 + @Param[in/out] t_FmIpcFmanEvents Pointer
57240 +*//***************************************************************************/
57241 +#define FM_GET_FMAN_CTRL_EVENTS_ENABLE 17
57242 +
57243 +/**************************************************************************//**
57244 + @Function      FM_SET_MAC_MAX_FRAME
57245 +
57246 + @Description   Used by FM front-end to set MAC's MTU/RTU's in
57247 +                back-end.
57248 +
57249 + @Param[in/out] t_FmIpcMacMaxFrameParams Pointer
57250 +*//***************************************************************************/
57251 +#define FM_SET_MAC_MAX_FRAME 18
57252 +
57253 +/**************************************************************************//**
57254 + @Function      FM_GET_PHYS_MURAM_BASE
57255 +
57256 + @Description   Used by FM front-end in order to get MURAM base address
57257 +
57258 + @Param[in/out] t_FmIpcPhysAddr Pointer
57259 +*//***************************************************************************/
57260 +#define FM_GET_PHYS_MURAM_BASE  19
57261 +
57262 +/**************************************************************************//**
57263 + @Function      FM_MASTER_IS_ALIVE
57264 +
57265 + @Description   Used by FM front-end in order to verify Master is up
57266 +
57267 + @Param[in/out] bool
57268 +*//***************************************************************************/
57269 +#define FM_MASTER_IS_ALIVE          20
57270 +
57271 +#define FM_ENABLE_RAM_ECC           21
57272 +#define FM_DISABLE_RAM_ECC          22
57273 +#define FM_SET_NUM_OF_FMAN_CTRL     23
57274 +#define FM_SET_SIZE_OF_FIFO         24
57275 +#define FM_SET_NUM_OF_TASKS         25
57276 +#define FM_SET_NUM_OF_OPEN_DMAS     26
57277 +#define FM_VSP_ALLOC                27
57278 +#define FM_VSP_FREE                 28
57279 +#define FM_VSP_SET_PORT_WINDOW      29
57280 +#define FM_GET_FMAN_CTRL_CODE_REV   30
57281 +#define FM_SET_CONG_GRP_PFC_PRIO    31
57282 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
57283 +#define FM_10G_TX_ECC_WA            100
57284 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
57285 +
57286 +/***************************************************************************/
57287 +/************************ BACK-END-TO-FRONT-END*****************************/
57288 +/***************************************************************************/
57289 +
57290 +/**************************************************************************//**
57291 + @Function      FM_GUEST_ISR
57292 +
57293 + @Description   Used by FM back-end to report an interrupt to the front-end.
57294 +
57295 + @Param[out]    t_FmIpcIsr Pointer
57296 +*//***************************************************************************/
57297 +#define FM_GUEST_ISR                1
57298 +
57299 +
57300 +
57301 +/** @} */ /* end of FM_IPC_grp group */
57302 +/** @} */ /* end of FM_grp group */
57303 +
57304 +
57305 +#endif /* __FM_IPC_H */
57306 --- /dev/null
57307 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_muram.c
57308 @@ -0,0 +1,174 @@
57309 +/*
57310 + * Copyright 2008-2012 Freescale Semiconductor Inc.
57311 + *
57312 + * Redistribution and use in source and binary forms, with or without
57313 + * modification, are permitted provided that the following conditions are met:
57314 + *     * Redistributions of source code must retain the above copyright
57315 + *       notice, this list of conditions and the following disclaimer.
57316 + *     * Redistributions in binary form must reproduce the above copyright
57317 + *       notice, this list of conditions and the following disclaimer in the
57318 + *       documentation and/or other materials provided with the distribution.
57319 + *     * Neither the name of Freescale Semiconductor nor the
57320 + *       names of its contributors may be used to endorse or promote products
57321 + *       derived from this software without specific prior written permission.
57322 + *
57323 + *
57324 + * ALTERNATIVELY, this software may be distributed under the terms of the
57325 + * GNU General Public License ("GPL") as published by the Free Software
57326 + * Foundation, either version 2 of that License or (at your option) any
57327 + * later version.
57328 + *
57329 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
57330 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
57331 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
57332 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
57333 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
57334 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
57335 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
57336 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
57337 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
57338 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57339 + */
57340 +
57341 +
57342 +/******************************************************************************
57343 + @File          FM_muram.c
57344 +
57345 + @Description   FM MURAM ...
57346 +*//***************************************************************************/
57347 +#include "error_ext.h"
57348 +#include "std_ext.h"
57349 +#include "mm_ext.h"
57350 +#include "string_ext.h"
57351 +#include "sprint_ext.h"
57352 +#include "fm_muram_ext.h"
57353 +#include "fm_common.h"
57354 +
57355 +#define __ERR_MODULE__  MODULE_FM_MURAM
57356 +
57357 +
57358 +typedef struct
57359 +{
57360 +    t_Handle    h_Mem;
57361 +    uintptr_t   baseAddr;
57362 +    uint32_t    size;
57363 +} t_FmMuram;
57364 +
57365 +
57366 +void FmMuramClear(t_Handle h_FmMuram)
57367 +{
57368 +    t_FmMuram   *p_FmMuram = ( t_FmMuram *)h_FmMuram;
57369 +
57370 +    SANITY_CHECK_RETURN(h_FmMuram, E_INVALID_HANDLE);
57371 +    IOMemSet32(UINT_TO_PTR(p_FmMuram->baseAddr), 0, p_FmMuram->size);
57372 +}
57373 +
57374 +
57375 +t_Handle FM_MURAM_ConfigAndInit(uintptr_t baseAddress, uint32_t size)
57376 +{
57377 +    t_Handle    h_Mem;
57378 +    t_FmMuram   *p_FmMuram;
57379 +
57380 +    if (!baseAddress)
57381 +    {
57382 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("baseAddress 0 is not supported"));
57383 +        return NULL;
57384 +    }
57385 +
57386 +    if (baseAddress%4)
57387 +    {
57388 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("baseAddress not 4 bytes aligned!"));
57389 +        return NULL;
57390 +    }
57391 +
57392 +    /* Allocate FM MURAM structure */
57393 +    p_FmMuram = (t_FmMuram *) XX_Malloc(sizeof(t_FmMuram));
57394 +    if (!p_FmMuram)
57395 +    {
57396 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MURAM driver structure"));
57397 +        return NULL;
57398 +    }
57399 +    memset(p_FmMuram, 0, sizeof(t_FmMuram));
57400 +
57401 +
57402 +    if ((MM_Init(&h_Mem, baseAddress, size) != E_OK) || (!h_Mem))
57403 +    {
57404 +        XX_Free(p_FmMuram);
57405 +        REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-MURAM partition!!!"));
57406 +        return NULL;
57407 +    }
57408 +
57409 +    /* Initialize FM MURAM parameters which will be kept by the driver */
57410 +    p_FmMuram->baseAddr = baseAddress;
57411 +    p_FmMuram->size = size;
57412 +    p_FmMuram->h_Mem = h_Mem;
57413 +
57414 +    return p_FmMuram;
57415 +}
57416 +
57417 +t_Error FM_MURAM_Free(t_Handle h_FmMuram)
57418 +{
57419 +    t_FmMuram   *p_FmMuram = ( t_FmMuram *)h_FmMuram;
57420 +
57421 +    if (p_FmMuram->h_Mem)
57422 +        MM_Free(p_FmMuram->h_Mem);
57423 +
57424 +    XX_Free(h_FmMuram);
57425 +
57426 +    return E_OK;
57427 +}
57428 +
57429 +void  * FM_MURAM_AllocMem(t_Handle h_FmMuram, uint32_t size, uint32_t align)
57430 +{
57431 +    t_FmMuram   *p_FmMuram = ( t_FmMuram *)h_FmMuram;
57432 +    uintptr_t   addr;
57433 +
57434 +    SANITY_CHECK_RETURN_VALUE(h_FmMuram, E_INVALID_HANDLE, NULL);
57435 +    SANITY_CHECK_RETURN_VALUE(p_FmMuram->h_Mem, E_INVALID_HANDLE, NULL);
57436 +
57437 +    addr = (uintptr_t)MM_Get(p_FmMuram->h_Mem, size, align ,"FM MURAM");
57438 +
57439 +    if (addr == ILLEGAL_BASE)
57440 +        return NULL;
57441 +
57442 +    return UINT_TO_PTR(addr);
57443 +}
57444 +
57445 +void  * FM_MURAM_AllocMemForce(t_Handle h_FmMuram, uint64_t base, uint32_t size)
57446 +{
57447 +    t_FmMuram   *p_FmMuram = ( t_FmMuram *)h_FmMuram;
57448 +    uintptr_t   addr;
57449 +
57450 +    SANITY_CHECK_RETURN_VALUE(h_FmMuram, E_INVALID_HANDLE, NULL);
57451 +    SANITY_CHECK_RETURN_VALUE(p_FmMuram->h_Mem, E_INVALID_HANDLE, NULL);
57452 +
57453 +    addr = (uintptr_t)MM_GetForce(p_FmMuram->h_Mem, base, size, "FM MURAM");
57454 +
57455 +    if (addr == ILLEGAL_BASE)
57456 +        return NULL;
57457 +
57458 +    return UINT_TO_PTR(addr);
57459 +}
57460 +
57461 +t_Error FM_MURAM_FreeMem(t_Handle h_FmMuram, void *ptr)
57462 +{
57463 +    t_FmMuram   *p_FmMuram = ( t_FmMuram *)h_FmMuram;
57464 +
57465 +    SANITY_CHECK_RETURN_ERROR(h_FmMuram, E_INVALID_HANDLE);
57466 +    SANITY_CHECK_RETURN_ERROR(p_FmMuram->h_Mem, E_INVALID_HANDLE);
57467 +
57468 +    if (MM_Put(p_FmMuram->h_Mem, PTR_TO_UINT(ptr)) == 0)
57469 +        RETURN_ERROR(MINOR, E_INVALID_ADDRESS, ("memory pointer!!!"));
57470 +
57471 +    return E_OK;
57472 +}
57473 +
57474 +uint64_t FM_MURAM_GetFreeMemSize(t_Handle h_FmMuram)
57475 +{
57476 +    t_FmMuram   *p_FmMuram = ( t_FmMuram *)h_FmMuram;
57477 +
57478 +    SANITY_CHECK_RETURN_VALUE(h_FmMuram, E_INVALID_HANDLE, 0);
57479 +    SANITY_CHECK_RETURN_VALUE(p_FmMuram->h_Mem, E_INVALID_HANDLE, 0);
57480 +
57481 +    return MM_GetFreeMemSize(p_FmMuram->h_Mem);
57482 +}
57483 --- /dev/null
57484 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fman.c
57485 @@ -0,0 +1,1398 @@
57486 +/*
57487 + * Copyright 2008-2012 Freescale Semiconductor Inc.
57488 + *
57489 + * Redistribution and use in source and binary forms, with or without
57490 + * modification, are permitted provided that the following conditions are met:
57491 + *     * Redistributions of source code must retain the above copyright
57492 + *       notice, this list of conditions and the following disclaimer.
57493 + *     * Redistributions in binary form must reproduce the above copyright
57494 + *       notice, this list of conditions and the following disclaimer in the
57495 + *       documentation and/or other materials provided with the distribution.
57496 + *     * Neither the name of Freescale Semiconductor nor the
57497 + *       names of its contributors may be used to endorse or promote products
57498 + *       derived from this software without specific prior written permission.
57499 + *
57500 + *
57501 + * ALTERNATIVELY, this software may be distributed under the terms of the
57502 + * GNU General Public License ("GPL") as published by the Free Software
57503 + * Foundation, either version 2 of that License or (at your option) any
57504 + * later version.
57505 + *
57506 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
57507 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
57508 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
57509 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
57510 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
57511 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
57512 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
57513 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
57514 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
57515 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57516 + */
57517 +
57518 +
57519 +#include <linux/math64.h>
57520 +#include "fsl_fman.h"
57521 +#include "dpaa_integration_ext.h"
57522 +
57523 +uint32_t fman_get_bmi_err_event(struct fman_bmi_regs *bmi_rg)
57524 +{
57525 +       uint32_t        event, mask, force;
57526 +
57527 +       event = ioread32be(&bmi_rg->fmbm_ievr);
57528 +       mask = ioread32be(&bmi_rg->fmbm_ier);
57529 +       event &= mask;
57530 +       /* clear the forced events */
57531 +       force = ioread32be(&bmi_rg->fmbm_ifr);
57532 +       if (force & event)
57533 +               iowrite32be(force & ~event, &bmi_rg->fmbm_ifr);
57534 +       /* clear the acknowledged events */
57535 +       iowrite32be(event, &bmi_rg->fmbm_ievr);
57536 +       return event;
57537 +}
57538 +
57539 +uint32_t fman_get_qmi_err_event(struct fman_qmi_regs *qmi_rg)
57540 +{
57541 +       uint32_t        event, mask, force;
57542 +
57543 +       event = ioread32be(&qmi_rg->fmqm_eie);
57544 +       mask = ioread32be(&qmi_rg->fmqm_eien);
57545 +       event &= mask;
57546 +
57547 +       /* clear the forced events */
57548 +       force = ioread32be(&qmi_rg->fmqm_eif);
57549 +       if (force & event)
57550 +               iowrite32be(force & ~event, &qmi_rg->fmqm_eif);
57551 +       /* clear the acknowledged events */
57552 +       iowrite32be(event, &qmi_rg->fmqm_eie);
57553 +       return event;
57554 +}
57555 +
57556 +uint32_t fman_get_dma_com_id(struct fman_dma_regs *dma_rg)
57557 +{
57558 +       return ioread32be(&dma_rg->fmdmtcid);
57559 +}
57560 +
57561 +uint64_t fman_get_dma_addr(struct fman_dma_regs *dma_rg)
57562 +{
57563 +       uint64_t addr;
57564 +
57565 +       addr = (uint64_t)ioread32be(&dma_rg->fmdmtal);
57566 +       addr |= ((uint64_t)(ioread32be(&dma_rg->fmdmtah)) << 32);
57567 +
57568 +       return addr;
57569 +}
57570 +
57571 +uint32_t fman_get_dma_err_event(struct fman_dma_regs *dma_rg)
57572 +{
57573 +       uint32_t status, mask;
57574 +
57575 +       status = ioread32be(&dma_rg->fmdmsr);
57576 +       mask = ioread32be(&dma_rg->fmdmmr);
57577 +
57578 +       /* clear DMA_STATUS_BUS_ERR if mask has no DMA_MODE_BER */
57579 +       if ((mask & DMA_MODE_BER) != DMA_MODE_BER)
57580 +               status &= ~DMA_STATUS_BUS_ERR;
57581 +
57582 +       /* clear relevant bits if mask has no DMA_MODE_ECC */
57583 +       if ((mask & DMA_MODE_ECC) != DMA_MODE_ECC)
57584 +               status &= ~(DMA_STATUS_FM_SPDAT_ECC |
57585 +                       DMA_STATUS_READ_ECC |
57586 +                               DMA_STATUS_SYSTEM_WRITE_ECC |
57587 +                               DMA_STATUS_FM_WRITE_ECC);
57588 +
57589 +       /* clear set events */
57590 +       iowrite32be(status, &dma_rg->fmdmsr);
57591 +
57592 +       return status;
57593 +}
57594 +
57595 +uint32_t fman_get_fpm_err_event(struct fman_fpm_regs *fpm_rg)
57596 +{
57597 +       uint32_t        event;
57598 +
57599 +       event = ioread32be(&fpm_rg->fmfp_ee);
57600 +       /* clear the all occurred events */
57601 +       iowrite32be(event, &fpm_rg->fmfp_ee);
57602 +       return event;
57603 +}
57604 +
57605 +uint32_t fman_get_muram_err_event(struct fman_fpm_regs *fpm_rg)
57606 +{
57607 +       uint32_t        event, mask;
57608 +
57609 +       event = ioread32be(&fpm_rg->fm_rcr);
57610 +       mask = ioread32be(&fpm_rg->fm_rie);
57611 +
57612 +       /* clear MURAM event bit (do not clear IRAM event) */
57613 +       iowrite32be(event & ~FPM_RAM_IRAM_ECC, &fpm_rg->fm_rcr);
57614 +
57615 +       if ((mask & FPM_MURAM_ECC_ERR_EX_EN))
57616 +               return event;
57617 +       else
57618 +               return 0;
57619 +}
57620 +
57621 +uint32_t fman_get_iram_err_event(struct fman_fpm_regs *fpm_rg)
57622 +{
57623 +       uint32_t    event, mask;
57624 +
57625 +       event = ioread32be(&fpm_rg->fm_rcr) ;
57626 +       mask = ioread32be(&fpm_rg->fm_rie);
57627 +       /* clear IRAM event bit (do not clear MURAM event) */
57628 +       iowrite32be(event & ~FPM_RAM_MURAM_ECC,
57629 +                       &fpm_rg->fm_rcr);
57630 +
57631 +       if ((mask & FPM_IRAM_ECC_ERR_EX_EN))
57632 +               return event;
57633 +       else
57634 +               return 0;
57635 +}
57636 +
57637 +uint32_t fman_get_qmi_event(struct fman_qmi_regs *qmi_rg)
57638 +{
57639 +       uint32_t        event, mask, force;
57640 +
57641 +       event = ioread32be(&qmi_rg->fmqm_ie);
57642 +       mask = ioread32be(&qmi_rg->fmqm_ien);
57643 +       event &= mask;
57644 +       /* clear the forced events */
57645 +       force = ioread32be(&qmi_rg->fmqm_if);
57646 +       if (force & event)
57647 +               iowrite32be(force & ~event, &qmi_rg->fmqm_if);
57648 +       /* clear the acknowledged events */
57649 +       iowrite32be(event, &qmi_rg->fmqm_ie);
57650 +       return event;
57651 +}
57652 +
57653 +void fman_enable_time_stamp(struct fman_fpm_regs *fpm_rg,
57654 +                               uint8_t count1ubit,
57655 +                               uint16_t fm_clk_freq)
57656 +{
57657 +       uint32_t tmp;
57658 +       uint64_t frac;
57659 +       uint32_t intgr;
57660 +       uint32_t ts_freq = (uint32_t)(1 << count1ubit); /* in Mhz */
57661 +
57662 +       /* configure timestamp so that bit 8 will count 1 microsecond
57663 +        * Find effective count rate at TIMESTAMP least significant bits:
57664 +        * Effective_Count_Rate = 1MHz x 2^8 = 256MHz
57665 +        * Find frequency ratio between effective count rate and the clock:
57666 +        * Effective_Count_Rate / CLK e.g. for 600 MHz clock:
57667 +        * 256/600 = 0.4266666... */
57668 +
57669 +       intgr = ts_freq / fm_clk_freq;
57670 +       /* we multiply by 2^16 to keep the fraction of the division
57671 +        * we do not div back, since we write this value as a fraction
57672 +        * see spec */
57673 +
57674 +       frac = ((uint64_t)ts_freq << 16) - ((uint64_t)intgr << 16) * fm_clk_freq;
57675 +       /* we check remainder of the division in order to round up if not int */
57676 +       if (do_div(frac, fm_clk_freq))
57677 +               frac++;
57678 +
57679 +       tmp = (intgr << FPM_TS_INT_SHIFT) | (uint16_t)frac;
57680 +       iowrite32be(tmp, &fpm_rg->fmfp_tsc2);
57681 +
57682 +       /* enable timestamp with original clock */
57683 +       iowrite32be(FPM_TS_CTL_EN, &fpm_rg->fmfp_tsc1);
57684 +}
57685 +
57686 +uint32_t fman_get_fpm_error_interrupts(struct fman_fpm_regs *fpm_rg)
57687 +{
57688 +       return ioread32be(&fpm_rg->fm_epi);
57689 +}
57690 +
57691 +
57692 +int fman_set_erratum_10gmac_a004_wa(struct fman_fpm_regs *fpm_rg)
57693 +{
57694 +       int timeout = 100;
57695 +
57696 +       iowrite32be(0x40000000, &fpm_rg->fmfp_extc);
57697 +
57698 +       while ((ioread32be(&fpm_rg->fmfp_extc) & 0x40000000) && --timeout)
57699 +               udelay(10);
57700 +
57701 +       if (!timeout)
57702 +               return -EBUSY;
57703 +       return 0;
57704 +}
57705 +
57706 +void fman_set_ctrl_intr(struct fman_fpm_regs *fpm_rg,
57707 +                       uint8_t event_reg_id,
57708 +                       uint32_t enable_events)
57709 +{
57710 +       iowrite32be(enable_events, &fpm_rg->fmfp_cee[event_reg_id]);
57711 +}
57712 +
57713 +uint32_t fman_get_ctrl_intr(struct fman_fpm_regs *fpm_rg, uint8_t event_reg_id)
57714 +{
57715 +       return ioread32be(&fpm_rg->fmfp_cee[event_reg_id]);
57716 +}
57717 +
57718 +void fman_set_num_of_riscs_per_port(struct fman_fpm_regs *fpm_rg,
57719 +                                       uint8_t port_id,
57720 +                                       uint8_t num_fman_ctrls,
57721 +                                       uint32_t or_fman_ctrl)
57722 +{
57723 +       uint32_t tmp = 0;
57724 +
57725 +       tmp = (uint32_t)(port_id << FPM_PORT_FM_CTL_PORTID_SHIFT);
57726 +       /*TODO - maybe to put CTL# according to another criteria*/
57727 +       if (num_fman_ctrls == 2)
57728 +               tmp = FPM_PRT_FM_CTL2 | FPM_PRT_FM_CTL1;
57729 +       /* order restoration */
57730 +       tmp |= (or_fman_ctrl << FPM_PRC_ORA_FM_CTL_SEL_SHIFT) | or_fman_ctrl;
57731 +
57732 +       iowrite32be(tmp, &fpm_rg->fmfp_prc);
57733 +}
57734 +
57735 +void fman_set_order_restoration_per_port(struct fman_fpm_regs *fpm_rg,
57736 +                                       uint8_t port_id,
57737 +                                       bool independent_mode,
57738 +                                       bool is_rx_port)
57739 +{
57740 +       uint32_t tmp = 0;
57741 +
57742 +       tmp = (uint32_t)(port_id << FPM_PORT_FM_CTL_PORTID_SHIFT);
57743 +       if (independent_mode) {
57744 +               if (is_rx_port)
57745 +                       tmp |= (FPM_PRT_FM_CTL1 <<
57746 +                               FPM_PRC_ORA_FM_CTL_SEL_SHIFT) | FPM_PRT_FM_CTL1;
57747 +               else
57748 +                       tmp |= (FPM_PRT_FM_CTL2 <<
57749 +                               FPM_PRC_ORA_FM_CTL_SEL_SHIFT) | FPM_PRT_FM_CTL2;
57750 +       } else {
57751 +               tmp |= (FPM_PRT_FM_CTL2|FPM_PRT_FM_CTL1);
57752 +
57753 +               /* order restoration */
57754 +               if (port_id % 2)
57755 +                       tmp |= (FPM_PRT_FM_CTL1 <<
57756 +                                       FPM_PRC_ORA_FM_CTL_SEL_SHIFT);
57757 +               else
57758 +                       tmp |= (FPM_PRT_FM_CTL2 <<
57759 +                                       FPM_PRC_ORA_FM_CTL_SEL_SHIFT);
57760 +       }
57761 +       iowrite32be(tmp, &fpm_rg->fmfp_prc);
57762 +}
57763 +
57764 +uint8_t fman_get_qmi_deq_th(struct fman_qmi_regs *qmi_rg)
57765 +{
57766 +       return (uint8_t)ioread32be(&qmi_rg->fmqm_gc);
57767 +}
57768 +
57769 +uint8_t fman_get_qmi_enq_th(struct fman_qmi_regs *qmi_rg)
57770 +{
57771 +       return (uint8_t)(ioread32be(&qmi_rg->fmqm_gc) >> 8);
57772 +}
57773 +
57774 +void fman_set_qmi_enq_th(struct fman_qmi_regs *qmi_rg, uint8_t val)
57775 +{
57776 +       uint32_t tmp_reg;
57777 +
57778 +       tmp_reg = ioread32be(&qmi_rg->fmqm_gc);
57779 +       tmp_reg &= ~QMI_CFG_ENQ_MASK;
57780 +       tmp_reg |= ((uint32_t)val << 8);
57781 +       iowrite32be(tmp_reg, &qmi_rg->fmqm_gc);
57782 +}
57783 +
57784 +void fman_set_qmi_deq_th(struct fman_qmi_regs *qmi_rg, uint8_t val)
57785 +{
57786 +       uint32_t tmp_reg;
57787 +
57788 +       tmp_reg = ioread32be(&qmi_rg->fmqm_gc);
57789 +       tmp_reg &= ~QMI_CFG_DEQ_MASK;
57790 +       tmp_reg |= (uint32_t)val;
57791 +       iowrite32be(tmp_reg, &qmi_rg->fmqm_gc);
57792 +}
57793 +
57794 +void fman_qmi_disable_dispatch_limit(struct fman_fpm_regs *fpm_rg)
57795 +{
57796 +       iowrite32be(0, &fpm_rg->fmfp_mxd);
57797 +}
57798 +
57799 +void fman_set_liodn_per_port(struct fman_rg *fman_rg, uint8_t port_id,
57800 +                               uint16_t liodn_base,
57801 +                               uint16_t liodn_ofst)
57802 +{
57803 +       uint32_t tmp;
57804 +
57805 +       if ((port_id > 63) || (port_id < 1))
57806 +               return;
57807 +
57808 +       /* set LIODN base for this port */
57809 +       tmp = ioread32be(&fman_rg->dma_rg->fmdmplr[port_id / 2]);
57810 +       if (port_id % 2) {
57811 +               tmp &= ~FM_LIODN_BASE_MASK;
57812 +               tmp |= (uint32_t)liodn_base;
57813 +       } else {
57814 +               tmp &= ~(FM_LIODN_BASE_MASK << DMA_LIODN_SHIFT);
57815 +               tmp |= (uint32_t)liodn_base << DMA_LIODN_SHIFT;
57816 +       }
57817 +       iowrite32be(tmp, &fman_rg->dma_rg->fmdmplr[port_id / 2]);
57818 +       iowrite32be((uint32_t)liodn_ofst,
57819 +                       &fman_rg->bmi_rg->fmbm_spliodn[port_id - 1]);
57820 +}
57821 +
57822 +bool fman_is_port_stalled(struct fman_fpm_regs *fpm_rg, uint8_t port_id)
57823 +{
57824 +       return (bool)!!(ioread32be(&fpm_rg->fmfp_ps[port_id]) & FPM_PS_STALLED);
57825 +}
57826 +
57827 +void fman_resume_stalled_port(struct fman_fpm_regs *fpm_rg, uint8_t port_id)
57828 +{
57829 +       uint32_t        tmp;
57830 +
57831 +       tmp = (uint32_t)((port_id << FPM_PORT_FM_CTL_PORTID_SHIFT) |
57832 +                               FPM_PRC_REALSE_STALLED);
57833 +       iowrite32be(tmp, &fpm_rg->fmfp_prc);
57834 +}
57835 +
57836 +int fman_reset_mac(struct fman_fpm_regs *fpm_rg, uint8_t mac_id, bool is_10g)
57837 +{
57838 +       uint32_t msk, timeout = 100;
57839 +
57840 +       /* Get the relevant bit mask */
57841 +       if (is_10g) {
57842 +               switch (mac_id) {
57843 +               case(0):
57844 +                       msk = FPM_RSTC_10G0_RESET;
57845 +                       break;
57846 +        case(1):
57847 +            msk = FPM_RSTC_10G1_RESET;
57848 +            break;
57849 +               default:
57850 +                       return -EINVAL;
57851 +               }
57852 +       } else {
57853 +               switch (mac_id) {
57854 +               case(0):
57855 +                       msk = FPM_RSTC_1G0_RESET;
57856 +                       break;
57857 +               case(1):
57858 +                       msk = FPM_RSTC_1G1_RESET;
57859 +                       break;
57860 +               case(2):
57861 +                       msk = FPM_RSTC_1G2_RESET;
57862 +                       break;
57863 +               case(3):
57864 +                       msk = FPM_RSTC_1G3_RESET;
57865 +                       break;
57866 +               case(4):
57867 +                       msk = FPM_RSTC_1G4_RESET;
57868 +                       break;
57869 +        case (5):
57870 +            msk = FPM_RSTC_1G5_RESET;
57871 +            break;
57872 +        case (6):
57873 +            msk = FPM_RSTC_1G6_RESET;
57874 +            break;
57875 +        case (7):
57876 +            msk = FPM_RSTC_1G7_RESET;
57877 +            break;
57878 +               default:
57879 +                       return -EINVAL;
57880 +               }
57881 +       }
57882 +       /* reset */
57883 +       iowrite32be(msk, &fpm_rg->fm_rstc);
57884 +       while ((ioread32be(&fpm_rg->fm_rstc) & msk) && --timeout)
57885 +               udelay(10);
57886 +
57887 +       if (!timeout)
57888 +               return -EBUSY;
57889 +       return 0;
57890 +}
57891 +
57892 +uint16_t fman_get_size_of_fifo(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
57893 +{
57894 +       uint32_t tmp_reg;
57895 +
57896 +    if ((port_id > 63) || (port_id < 1))
57897 +            return 0;
57898 +
57899 +       tmp_reg = ioread32be(&bmi_rg->fmbm_pfs[port_id - 1]);
57900 +       return (uint16_t)((tmp_reg & BMI_FIFO_SIZE_MASK) + 1);
57901 +}
57902 +
57903 +uint32_t fman_get_total_fifo_size(struct fman_bmi_regs *bmi_rg)
57904 +{
57905 +       uint32_t reg, res;
57906 +
57907 +       reg = ioread32be(&bmi_rg->fmbm_cfg1);
57908 +       res = (reg >> BMI_CFG1_FIFO_SIZE_SHIFT) & 0x3ff;
57909 +       return res * FMAN_BMI_FIFO_UNITS;
57910 +}
57911 +
57912 +uint16_t fman_get_size_of_extra_fifo(struct fman_bmi_regs *bmi_rg,
57913 +                                       uint8_t port_id)
57914 +{
57915 +       uint32_t tmp_reg;
57916 +
57917 +    if ((port_id > 63) || (port_id < 1))
57918 +            return 0;
57919 +
57920 +       tmp_reg = ioread32be(&bmi_rg->fmbm_pfs[port_id-1]);
57921 +       return (uint16_t)((tmp_reg & BMI_EXTRA_FIFO_SIZE_MASK) >>
57922 +                               BMI_EXTRA_FIFO_SIZE_SHIFT);
57923 +}
57924 +
57925 +void fman_set_size_of_fifo(struct fman_bmi_regs *bmi_rg,
57926 +                               uint8_t port_id,
57927 +                               uint32_t sz_fifo,
57928 +                               uint32_t extra_sz_fifo)
57929 +{
57930 +       uint32_t tmp;
57931 +
57932 +       if ((port_id > 63) || (port_id < 1))
57933 +               return;
57934 +
57935 +       /* calculate reg */
57936 +       tmp = (uint32_t)((sz_fifo / FMAN_BMI_FIFO_UNITS - 1) |
57937 +               ((extra_sz_fifo / FMAN_BMI_FIFO_UNITS) <<
57938 +                               BMI_EXTRA_FIFO_SIZE_SHIFT));
57939 +       iowrite32be(tmp, &bmi_rg->fmbm_pfs[port_id - 1]);
57940 +}
57941 +
57942 +uint8_t fman_get_num_of_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
57943 +{
57944 +       uint32_t tmp;
57945 +
57946 +    if ((port_id > 63) || (port_id < 1))
57947 +        return 0;
57948 +
57949 +       tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
57950 +       return (uint8_t)(((tmp & BMI_NUM_OF_TASKS_MASK) >>
57951 +                               BMI_NUM_OF_TASKS_SHIFT) + 1);
57952 +}
57953 +
57954 +uint8_t fman_get_num_extra_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
57955 +{
57956 +       uint32_t tmp;
57957 +
57958 +    if ((port_id > 63) || (port_id < 1))
57959 +        return 0;
57960 +
57961 +       tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
57962 +       return (uint8_t)((tmp & BMI_NUM_OF_EXTRA_TASKS_MASK) >>
57963 +                               BMI_EXTRA_NUM_OF_TASKS_SHIFT);
57964 +}
57965 +
57966 +void fman_set_num_of_tasks(struct fman_bmi_regs *bmi_rg,
57967 +                               uint8_t port_id,
57968 +                               uint8_t num_tasks,
57969 +                               uint8_t num_extra_tasks)
57970 +{
57971 +       uint32_t tmp;
57972 +
57973 +       if ((port_id > 63) || (port_id < 1))
57974 +           return;
57975 +
57976 +       /* calculate reg */
57977 +       tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]) &
57978 +                       ~(BMI_NUM_OF_TASKS_MASK | BMI_NUM_OF_EXTRA_TASKS_MASK);
57979 +       tmp |= (uint32_t)(((num_tasks - 1) << BMI_NUM_OF_TASKS_SHIFT) |
57980 +                       (num_extra_tasks << BMI_EXTRA_NUM_OF_TASKS_SHIFT));
57981 +       iowrite32be(tmp, &bmi_rg->fmbm_pp[port_id - 1]);
57982 +}
57983 +
57984 +uint8_t fman_get_num_of_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
57985 +{
57986 +       uint32_t tmp;
57987 +
57988 +    if ((port_id > 63) || (port_id < 1))
57989 +            return 0;
57990 +
57991 +       tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
57992 +       return (uint8_t)(((tmp & BMI_NUM_OF_DMAS_MASK) >>
57993 +                       BMI_NUM_OF_DMAS_SHIFT) + 1);
57994 +}
57995 +
57996 +uint8_t fman_get_num_extra_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
57997 +{
57998 +       uint32_t tmp;
57999 +
58000 +       if ((port_id > 63) || (port_id < 1))
58001 +               return 0;
58002 +
58003 +       tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
58004 +       return (uint8_t)((tmp & BMI_NUM_OF_EXTRA_DMAS_MASK) >>
58005 +                       BMI_EXTRA_NUM_OF_DMAS_SHIFT);
58006 +}
58007 +
58008 +void fman_set_num_of_open_dmas(struct fman_bmi_regs *bmi_rg,
58009 +                               uint8_t port_id,
58010 +                               uint8_t num_open_dmas,
58011 +                               uint8_t num_extra_open_dmas,
58012 +                               uint8_t total_num_dmas)
58013 +{
58014 +       uint32_t tmp = 0;
58015 +
58016 +       if ((port_id > 63) || (port_id < 1))
58017 +           return;
58018 +
58019 +       /* calculate reg */
58020 +       tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]) &
58021 +                       ~(BMI_NUM_OF_DMAS_MASK | BMI_NUM_OF_EXTRA_DMAS_MASK);
58022 +       tmp |= (uint32_t)(((num_open_dmas-1) << BMI_NUM_OF_DMAS_SHIFT) |
58023 +                       (num_extra_open_dmas << BMI_EXTRA_NUM_OF_DMAS_SHIFT));
58024 +       iowrite32be(tmp, &bmi_rg->fmbm_pp[port_id - 1]);
58025 +
58026 +       /* update total num of DMA's with committed number of open DMAS,
58027 +        * and max uncommitted pool. */
58028 +    if (total_num_dmas)
58029 +    {
58030 +        tmp = ioread32be(&bmi_rg->fmbm_cfg2) & ~BMI_CFG2_DMAS_MASK;
58031 +        tmp |= (uint32_t)(total_num_dmas - 1) << BMI_CFG2_DMAS_SHIFT;
58032 +        iowrite32be(tmp, &bmi_rg->fmbm_cfg2);
58033 +    }
58034 +}
58035 +
58036 +void fman_set_vsp_window(struct fman_bmi_regs *bmi_rg,
58037 +                                    uint8_t port_id,
58038 +                                        uint8_t base_storage_profile,
58039 +                                        uint8_t log2_num_of_profiles)
58040 +{
58041 +       uint32_t tmp = 0;
58042 +       if ((port_id > 63) || (port_id < 1))
58043 +           return;
58044 +
58045 +    tmp = ioread32be(&bmi_rg->fmbm_spliodn[port_id-1]);
58046 +    tmp |= (uint32_t)((uint32_t)base_storage_profile & 0x3f) << 16;
58047 +    tmp |= (uint32_t)log2_num_of_profiles << 28;
58048 +    iowrite32be(tmp, &bmi_rg->fmbm_spliodn[port_id-1]);
58049 +}
58050 +
58051 +void fman_set_congestion_group_pfc_priority(uint32_t *cpg_rg,
58052 +                                            uint32_t congestion_group_id,
58053 +                                            uint8_t priority_bit_map,
58054 +                                            uint32_t reg_num)
58055 +{
58056 +       uint32_t offset, tmp = 0;
58057 +
58058 +    offset  = (congestion_group_id%4)*8;
58059 +
58060 +    tmp = ioread32be(&cpg_rg[reg_num]);
58061 +    tmp &= ~(0xFF<<offset);
58062 +    tmp |= (uint32_t)priority_bit_map << offset;
58063 +
58064 +    iowrite32be(tmp,&cpg_rg[reg_num]);
58065 +}
58066 +
58067 +/*****************************************************************************/
58068 +/*                      API Init unit functions                              */
58069 +/*****************************************************************************/
58070 +void fman_defconfig(struct fman_cfg *cfg, bool is_master)
58071 +{
58072 +    memset(cfg, 0, sizeof(struct fman_cfg));
58073 +
58074 +    cfg->catastrophic_err               = DEFAULT_CATASTROPHIC_ERR;
58075 +    cfg->dma_err                        = DEFAULT_DMA_ERR;
58076 +    cfg->halt_on_external_activ         = DEFAULT_HALT_ON_EXTERNAL_ACTIVATION;
58077 +    cfg->halt_on_unrecov_ecc_err        = DEFAULT_HALT_ON_UNRECOVERABLE_ECC_ERROR;
58078 +    cfg->en_iram_test_mode              = FALSE;
58079 +    cfg->en_muram_test_mode             = FALSE;
58080 +    cfg->external_ecc_rams_enable       = DEFAULT_EXTERNAL_ECC_RAMS_ENABLE;
58081 +
58082 +       if (!is_master)
58083 +           return;
58084 +
58085 +    cfg->dma_aid_override               = DEFAULT_AID_OVERRIDE;
58086 +    cfg->dma_aid_mode                   = DEFAULT_AID_MODE;
58087 +    cfg->dma_comm_qtsh_clr_emer         = DEFAULT_DMA_COMM_Q_LOW;
58088 +    cfg->dma_comm_qtsh_asrt_emer        = DEFAULT_DMA_COMM_Q_HIGH;
58089 +    cfg->dma_cache_override             = DEFAULT_CACHE_OVERRIDE;
58090 +    cfg->dma_cam_num_of_entries         = DEFAULT_DMA_CAM_NUM_OF_ENTRIES;
58091 +    cfg->dma_dbg_cnt_mode               = DEFAULT_DMA_DBG_CNT_MODE;
58092 +    cfg->dma_en_emergency               = DEFAULT_DMA_EN_EMERGENCY;
58093 +    cfg->dma_sos_emergency              = DEFAULT_DMA_SOS_EMERGENCY;
58094 +    cfg->dma_watchdog                   = DEFAULT_DMA_WATCHDOG;
58095 +    cfg->dma_en_emergency_smoother      = DEFAULT_DMA_EN_EMERGENCY_SMOOTHER;
58096 +    cfg->dma_emergency_switch_counter   = DEFAULT_DMA_EMERGENCY_SWITCH_COUNTER;
58097 +    cfg->disp_limit_tsh                 = DEFAULT_DISP_LIMIT;
58098 +    cfg->prs_disp_tsh                   = DEFAULT_PRS_DISP_TH;
58099 +    cfg->plcr_disp_tsh                  = DEFAULT_PLCR_DISP_TH;
58100 +    cfg->kg_disp_tsh                    = DEFAULT_KG_DISP_TH;
58101 +    cfg->bmi_disp_tsh                   = DEFAULT_BMI_DISP_TH;
58102 +    cfg->qmi_enq_disp_tsh               = DEFAULT_QMI_ENQ_DISP_TH;
58103 +    cfg->qmi_deq_disp_tsh               = DEFAULT_QMI_DEQ_DISP_TH;
58104 +    cfg->fm_ctl1_disp_tsh               = DEFAULT_FM_CTL1_DISP_TH;
58105 +    cfg->fm_ctl2_disp_tsh               = DEFAULT_FM_CTL2_DISP_TH;
58106 +
58107 +       cfg->pedantic_dma                   = FALSE;
58108 +       cfg->tnum_aging_period              = DEFAULT_TNUM_AGING_PERIOD;
58109 +       cfg->dma_stop_on_bus_error          = FALSE;
58110 +       cfg->qmi_deq_option_support         = FALSE;
58111 +}
58112 +
58113 +void fman_regconfig(struct fman_rg *fman_rg, struct fman_cfg *cfg)
58114 +{
58115 +       uint32_t tmp_reg;
58116 +
58117 +    /* read the values from the registers as they are initialized by the HW with
58118 +     * the required values.
58119 +     */
58120 +    tmp_reg = ioread32be(&fman_rg->bmi_rg->fmbm_cfg1);
58121 +    cfg->total_fifo_size =
58122 +        (((tmp_reg & BMI_TOTAL_FIFO_SIZE_MASK) >> BMI_CFG1_FIFO_SIZE_SHIFT) + 1) * FMAN_BMI_FIFO_UNITS;
58123 +
58124 +    tmp_reg = ioread32be(&fman_rg->bmi_rg->fmbm_cfg2);
58125 +    cfg->total_num_of_tasks =
58126 +        (uint8_t)(((tmp_reg & BMI_TOTAL_NUM_OF_TASKS_MASK) >> BMI_CFG2_TASKS_SHIFT) + 1);
58127 +
58128 +    tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmtr);
58129 +    cfg->dma_comm_qtsh_asrt_emer = (uint8_t)(tmp_reg >> DMA_THRESH_COMMQ_SHIFT);
58130 +
58131 +    tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmhy);
58132 +    cfg->dma_comm_qtsh_clr_emer  = (uint8_t)(tmp_reg >> DMA_THRESH_COMMQ_SHIFT);
58133 +
58134 +    tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmmr);
58135 +    cfg->dma_cache_override      = (enum fman_dma_cache_override)((tmp_reg & DMA_MODE_CACHE_OR_MASK) >> DMA_MODE_CACHE_OR_SHIFT);
58136 +    cfg->dma_cam_num_of_entries  = (uint8_t)((((tmp_reg & DMA_MODE_CEN_MASK) >> DMA_MODE_CEN_SHIFT) +1)*DMA_CAM_UNITS);
58137 +    cfg->dma_aid_override        = (bool)((tmp_reg & DMA_MODE_AID_OR)? TRUE:FALSE);
58138 +    cfg->dma_dbg_cnt_mode        = (enum fman_dma_dbg_cnt_mode)((tmp_reg & DMA_MODE_DBG_MASK) >> DMA_MODE_DBG_SHIFT);
58139 +    cfg->dma_en_emergency        = (bool)((tmp_reg & DMA_MODE_EB)? TRUE : FALSE);
58140 +
58141 +    tmp_reg = ioread32be(&fman_rg->fpm_rg->fmfp_mxd);
58142 +    cfg->disp_limit_tsh          = (uint8_t)((tmp_reg & FPM_DISP_LIMIT_MASK) >> FPM_DISP_LIMIT_SHIFT);
58143 +
58144 +    tmp_reg = ioread32be(&fman_rg->fpm_rg->fmfp_dist1);
58145 +    cfg->prs_disp_tsh            = (uint8_t)((tmp_reg & FPM_THR1_PRS_MASK ) >> FPM_THR1_PRS_SHIFT);
58146 +    cfg->plcr_disp_tsh           = (uint8_t)((tmp_reg & FPM_THR1_KG_MASK ) >> FPM_THR1_KG_SHIFT);
58147 +    cfg->kg_disp_tsh             = (uint8_t)((tmp_reg & FPM_THR1_PLCR_MASK ) >> FPM_THR1_PLCR_SHIFT);
58148 +    cfg->bmi_disp_tsh            = (uint8_t)((tmp_reg & FPM_THR1_BMI_MASK ) >> FPM_THR1_BMI_SHIFT);
58149 +
58150 +    tmp_reg = ioread32be(&fman_rg->fpm_rg->fmfp_dist2);
58151 +    cfg->qmi_enq_disp_tsh        = (uint8_t)((tmp_reg & FPM_THR2_QMI_ENQ_MASK ) >> FPM_THR2_QMI_ENQ_SHIFT);
58152 +    cfg->qmi_deq_disp_tsh        = (uint8_t)((tmp_reg & FPM_THR2_QMI_DEQ_MASK ) >> FPM_THR2_QMI_DEQ_SHIFT);
58153 +    cfg->fm_ctl1_disp_tsh        = (uint8_t)((tmp_reg & FPM_THR2_FM_CTL1_MASK ) >> FPM_THR2_FM_CTL1_SHIFT);
58154 +    cfg->fm_ctl2_disp_tsh        = (uint8_t)((tmp_reg & FPM_THR2_FM_CTL2_MASK ) >> FPM_THR2_FM_CTL2_SHIFT);
58155 +
58156 +    tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmsetr);
58157 +    cfg->dma_sos_emergency       = tmp_reg;
58158 +
58159 +    tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmwcr);
58160 +    cfg->dma_watchdog            = tmp_reg/cfg->clk_freq;
58161 +
58162 +    tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmemsr);
58163 +    cfg->dma_en_emergency_smoother = (bool)((tmp_reg & DMA_EMSR_EMSTR_MASK)? TRUE : FALSE);
58164 +    cfg->dma_emergency_switch_counter = (tmp_reg & DMA_EMSR_EMSTR_MASK);
58165 +}
58166 +
58167 +void fman_reset(struct fman_fpm_regs *fpm_rg)
58168 +{
58169 +       iowrite32be(FPM_RSTC_FM_RESET, &fpm_rg->fm_rstc);
58170 +}
58171 +
58172 +/**************************************************************************//**
58173 + @Function      FM_Init
58174 +
58175 + @Description   Initializes the FM module
58176 +
58177 + @Param[in]     h_Fm - FM module descriptor
58178 +
58179 + @Return        E_OK on success; Error code otherwise.
58180 +*//***************************************************************************/
58181 +int fman_dma_init(struct fman_dma_regs *dma_rg, struct fman_cfg *cfg)
58182 +{
58183 +       uint32_t    tmp_reg;
58184 +
58185 +       /**********************/
58186 +       /* Init DMA Registers */
58187 +       /**********************/
58188 +       /* clear status reg events */
58189 +       /* oren - check!!!  */
58190 +       tmp_reg = (DMA_STATUS_BUS_ERR | DMA_STATUS_READ_ECC |
58191 +                       DMA_STATUS_SYSTEM_WRITE_ECC | DMA_STATUS_FM_WRITE_ECC);
58192 +       iowrite32be(ioread32be(&dma_rg->fmdmsr) | tmp_reg,
58193 +                       &dma_rg->fmdmsr);
58194 +
58195 +       /* configure mode register */
58196 +       tmp_reg = 0;
58197 +       tmp_reg |= cfg->dma_cache_override << DMA_MODE_CACHE_OR_SHIFT;
58198 +       if (cfg->dma_aid_override)
58199 +               tmp_reg |= DMA_MODE_AID_OR;
58200 +       if (cfg->exceptions & FMAN_EX_DMA_BUS_ERROR)
58201 +               tmp_reg |= DMA_MODE_BER;
58202 +       if ((cfg->exceptions & FMAN_EX_DMA_SYSTEM_WRITE_ECC) |
58203 +               (cfg->exceptions & FMAN_EX_DMA_READ_ECC) |
58204 +               (cfg->exceptions & FMAN_EX_DMA_FM_WRITE_ECC))
58205 +               tmp_reg |= DMA_MODE_ECC;
58206 +       if (cfg->dma_stop_on_bus_error)
58207 +               tmp_reg |= DMA_MODE_SBER;
58208 +       if(cfg->dma_axi_dbg_num_of_beats)
58209 +           tmp_reg |= (uint32_t)(DMA_MODE_AXI_DBG_MASK &
58210 +                          ((cfg->dma_axi_dbg_num_of_beats - 1) << DMA_MODE_AXI_DBG_SHIFT));
58211 +
58212 +       if (cfg->dma_en_emergency) {
58213 +               tmp_reg |= cfg->dma_emergency_bus_select;
58214 +               tmp_reg |= cfg->dma_emergency_level << DMA_MODE_EMER_LVL_SHIFT;
58215 +       if (cfg->dma_en_emergency_smoother)
58216 +               iowrite32be(cfg->dma_emergency_switch_counter,
58217 +                               &dma_rg->fmdmemsr);
58218 +       }
58219 +       tmp_reg |= ((cfg->dma_cam_num_of_entries / DMA_CAM_UNITS) - 1) <<
58220 +                       DMA_MODE_CEN_SHIFT;
58221 +       tmp_reg |= DMA_MODE_SECURE_PROT;
58222 +       tmp_reg |= cfg->dma_dbg_cnt_mode << DMA_MODE_DBG_SHIFT;
58223 +       tmp_reg |= cfg->dma_aid_mode << DMA_MODE_AID_MODE_SHIFT;
58224 +
58225 +       if (cfg->pedantic_dma)
58226 +               tmp_reg |= DMA_MODE_EMER_READ;
58227 +
58228 +       iowrite32be(tmp_reg, &dma_rg->fmdmmr);
58229 +
58230 +       /* configure thresholds register */
58231 +       tmp_reg = ((uint32_t)cfg->dma_comm_qtsh_asrt_emer <<
58232 +                       DMA_THRESH_COMMQ_SHIFT) |
58233 +                       ((uint32_t)cfg->dma_read_buf_tsh_asrt_emer <<
58234 +                       DMA_THRESH_READ_INT_BUF_SHIFT) |
58235 +                       ((uint32_t)cfg->dma_write_buf_tsh_asrt_emer);
58236 +
58237 +       iowrite32be(tmp_reg, &dma_rg->fmdmtr);
58238 +
58239 +       /* configure hysteresis register */
58240 +       tmp_reg = ((uint32_t)cfg->dma_comm_qtsh_clr_emer <<
58241 +               DMA_THRESH_COMMQ_SHIFT) |
58242 +               ((uint32_t)cfg->dma_read_buf_tsh_clr_emer <<
58243 +               DMA_THRESH_READ_INT_BUF_SHIFT) |
58244 +               ((uint32_t)cfg->dma_write_buf_tsh_clr_emer);
58245 +
58246 +       iowrite32be(tmp_reg, &dma_rg->fmdmhy);
58247 +
58248 +       /* configure emergency threshold */
58249 +       iowrite32be(cfg->dma_sos_emergency, &dma_rg->fmdmsetr);
58250 +
58251 +       /* configure Watchdog */
58252 +       iowrite32be((cfg->dma_watchdog * cfg->clk_freq),
58253 +                       &dma_rg->fmdmwcr);
58254 +
58255 +       iowrite32be(cfg->cam_base_addr, &dma_rg->fmdmebcr);
58256 +
58257 +       return 0;
58258 +}
58259 +
58260 +int fman_fpm_init(struct fman_fpm_regs *fpm_rg, struct fman_cfg *cfg)
58261 +{
58262 +       uint32_t tmp_reg;
58263 +       int i;
58264 +
58265 +       /**********************/
58266 +       /* Init FPM Registers */
58267 +       /**********************/
58268 +       tmp_reg = (uint32_t)(cfg->disp_limit_tsh << FPM_DISP_LIMIT_SHIFT);
58269 +       iowrite32be(tmp_reg, &fpm_rg->fmfp_mxd);
58270 +
58271 +       tmp_reg = (((uint32_t)cfg->prs_disp_tsh << FPM_THR1_PRS_SHIFT) |
58272 +               ((uint32_t)cfg->kg_disp_tsh << FPM_THR1_KG_SHIFT) |
58273 +               ((uint32_t)cfg->plcr_disp_tsh << FPM_THR1_PLCR_SHIFT) |
58274 +               ((uint32_t)cfg->bmi_disp_tsh << FPM_THR1_BMI_SHIFT));
58275 +       iowrite32be(tmp_reg, &fpm_rg->fmfp_dist1);
58276 +
58277 +       tmp_reg = (((uint32_t)cfg->qmi_enq_disp_tsh << FPM_THR2_QMI_ENQ_SHIFT) |
58278 +               ((uint32_t)cfg->qmi_deq_disp_tsh << FPM_THR2_QMI_DEQ_SHIFT) |
58279 +               ((uint32_t)cfg->fm_ctl1_disp_tsh << FPM_THR2_FM_CTL1_SHIFT) |
58280 +               ((uint32_t)cfg->fm_ctl2_disp_tsh << FPM_THR2_FM_CTL2_SHIFT));
58281 +       iowrite32be(tmp_reg, &fpm_rg->fmfp_dist2);
58282 +
58283 +       /* define exceptions and error behavior */
58284 +       tmp_reg = 0;
58285 +       /* Clear events */
58286 +       tmp_reg |= (FPM_EV_MASK_STALL | FPM_EV_MASK_DOUBLE_ECC |
58287 +               FPM_EV_MASK_SINGLE_ECC);
58288 +       /* enable interrupts */
58289 +       if (cfg->exceptions & FMAN_EX_FPM_STALL_ON_TASKS)
58290 +               tmp_reg |= FPM_EV_MASK_STALL_EN;
58291 +       if (cfg->exceptions & FMAN_EX_FPM_SINGLE_ECC)
58292 +               tmp_reg |= FPM_EV_MASK_SINGLE_ECC_EN;
58293 +       if (cfg->exceptions & FMAN_EX_FPM_DOUBLE_ECC)
58294 +               tmp_reg |= FPM_EV_MASK_DOUBLE_ECC_EN;
58295 +       tmp_reg |= (cfg->catastrophic_err  << FPM_EV_MASK_CAT_ERR_SHIFT);
58296 +       tmp_reg |= (cfg->dma_err << FPM_EV_MASK_DMA_ERR_SHIFT);
58297 +       if (!cfg->halt_on_external_activ)
58298 +               tmp_reg |= FPM_EV_MASK_EXTERNAL_HALT;
58299 +       if (!cfg->halt_on_unrecov_ecc_err)
58300 +               tmp_reg |= FPM_EV_MASK_ECC_ERR_HALT;
58301 +       iowrite32be(tmp_reg, &fpm_rg->fmfp_ee);
58302 +
58303 +       /* clear all fmCtls event registers */
58304 +       for (i = 0; i < cfg->num_of_fman_ctrl_evnt_regs; i++)
58305 +               iowrite32be(0xFFFFFFFF, &fpm_rg->fmfp_cev[i]);
58306 +
58307 +       /* RAM ECC -  enable and clear events*/
58308 +       /* first we need to clear all parser memory,
58309 +        * as it is uninitialized and may cause ECC errors */
58310 +       /* event bits */
58311 +       tmp_reg = (FPM_RAM_MURAM_ECC | FPM_RAM_IRAM_ECC);
58312 +       /* Rams enable not effected by RCR bit, but by a COP configuration */
58313 +       if (cfg->external_ecc_rams_enable)
58314 +               tmp_reg |= FPM_RAM_RAMS_ECC_EN_SRC_SEL;
58315 +
58316 +       /* enable test mode */
58317 +       if (cfg->en_muram_test_mode)
58318 +               tmp_reg |= FPM_RAM_MURAM_TEST_ECC;
58319 +       if (cfg->en_iram_test_mode)
58320 +               tmp_reg |= FPM_RAM_IRAM_TEST_ECC;
58321 +       iowrite32be(tmp_reg, &fpm_rg->fm_rcr);
58322 +
58323 +       tmp_reg = 0;
58324 +       if (cfg->exceptions & FMAN_EX_IRAM_ECC) {
58325 +               tmp_reg |= FPM_IRAM_ECC_ERR_EX_EN;
58326 +               fman_enable_rams_ecc(fpm_rg);
58327 +       }
58328 +       if (cfg->exceptions & FMAN_EX_NURAM_ECC) {
58329 +               tmp_reg |= FPM_MURAM_ECC_ERR_EX_EN;
58330 +               fman_enable_rams_ecc(fpm_rg);
58331 +       }
58332 +       iowrite32be(tmp_reg, &fpm_rg->fm_rie);
58333 +
58334 +       return 0;
58335 +}
58336 +
58337 +int fman_bmi_init(struct fman_bmi_regs *bmi_rg, struct fman_cfg *cfg)
58338 +{
58339 +       uint32_t tmp_reg;
58340 +
58341 +       /**********************/
58342 +       /* Init BMI Registers */
58343 +       /**********************/
58344 +
58345 +       /* define common resources */
58346 +       tmp_reg = cfg->fifo_base_addr;
58347 +       tmp_reg = tmp_reg / BMI_FIFO_ALIGN;
58348 +
58349 +       tmp_reg |= ((cfg->total_fifo_size / FMAN_BMI_FIFO_UNITS - 1) <<
58350 +                       BMI_CFG1_FIFO_SIZE_SHIFT);
58351 +       iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg1);
58352 +
58353 +       tmp_reg = ((uint32_t)(cfg->total_num_of_tasks - 1) <<
58354 +                       BMI_CFG2_TASKS_SHIFT);
58355 +       /* num of DMA's will be dynamically updated when each port is set */
58356 +       iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg2);
58357 +
58358 +       /* define unmaskable exceptions, enable and clear events */
58359 +       tmp_reg = 0;
58360 +       iowrite32be(BMI_ERR_INTR_EN_LIST_RAM_ECC |
58361 +                       BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC |
58362 +                       BMI_ERR_INTR_EN_STATISTICS_RAM_ECC |
58363 +                       BMI_ERR_INTR_EN_DISPATCH_RAM_ECC,
58364 +                       &bmi_rg->fmbm_ievr);
58365 +
58366 +       if (cfg->exceptions & FMAN_EX_BMI_LIST_RAM_ECC)
58367 +               tmp_reg |= BMI_ERR_INTR_EN_LIST_RAM_ECC;
58368 +       if (cfg->exceptions & FMAN_EX_BMI_PIPELINE_ECC)
58369 +               tmp_reg |= BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC;
58370 +       if (cfg->exceptions & FMAN_EX_BMI_STATISTICS_RAM_ECC)
58371 +               tmp_reg |= BMI_ERR_INTR_EN_STATISTICS_RAM_ECC;
58372 +       if (cfg->exceptions & FMAN_EX_BMI_DISPATCH_RAM_ECC)
58373 +               tmp_reg |= BMI_ERR_INTR_EN_DISPATCH_RAM_ECC;
58374 +       iowrite32be(tmp_reg, &bmi_rg->fmbm_ier);
58375 +
58376 +       return 0;
58377 +}
58378 +
58379 +int fman_qmi_init(struct fman_qmi_regs *qmi_rg, struct fman_cfg *cfg)
58380 +{
58381 +       uint32_t tmp_reg;
58382 +       uint16_t period_in_fm_clocks;
58383 +       uint8_t remainder;
58384 +       /**********************/
58385 +       /* Init QMI Registers */
58386 +       /**********************/
58387 +       /* Clear error interrupt events */
58388 +
58389 +       iowrite32be(QMI_ERR_INTR_EN_DOUBLE_ECC | QMI_ERR_INTR_EN_DEQ_FROM_DEF,
58390 +                       &qmi_rg->fmqm_eie);
58391 +       tmp_reg = 0;
58392 +       if (cfg->exceptions & FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID)
58393 +               tmp_reg |= QMI_ERR_INTR_EN_DEQ_FROM_DEF;
58394 +       if (cfg->exceptions & FMAN_EX_QMI_DOUBLE_ECC)
58395 +               tmp_reg |= QMI_ERR_INTR_EN_DOUBLE_ECC;
58396 +       /* enable events */
58397 +       iowrite32be(tmp_reg, &qmi_rg->fmqm_eien);
58398 +
58399 +       if (cfg->tnum_aging_period) {
58400 +               /* tnum_aging_period is in units of usec, p_FmClockFreq in Mhz */
58401 +               period_in_fm_clocks = (uint16_t)
58402 +                               (cfg->tnum_aging_period * cfg->clk_freq);
58403 +               /* period_in_fm_clocks must be a 64 multiply */
58404 +               remainder = (uint8_t)(period_in_fm_clocks % 64);
58405 +               if (remainder)
58406 +                       tmp_reg = (uint32_t)((period_in_fm_clocks / 64) + 1);
58407 +               else{
58408 +                       tmp_reg = (uint32_t)(period_in_fm_clocks / 64);
58409 +                       if (!tmp_reg)
58410 +                               tmp_reg = 1;
58411 +               }
58412 +               tmp_reg <<= QMI_TAPC_TAP;
58413 +               iowrite32be(tmp_reg, &qmi_rg->fmqm_tapc);
58414 +       }
58415 +       tmp_reg = 0;
58416 +       /* Clear interrupt events */
58417 +       iowrite32be(QMI_INTR_EN_SINGLE_ECC, &qmi_rg->fmqm_ie);
58418 +       if (cfg->exceptions & FMAN_EX_QMI_SINGLE_ECC)
58419 +               tmp_reg |= QMI_INTR_EN_SINGLE_ECC;
58420 +       /* enable events */
58421 +       iowrite32be(tmp_reg, &qmi_rg->fmqm_ien);
58422 +
58423 +       return 0;
58424 +}
58425 +
58426 +int fman_enable(struct fman_rg *fman_rg, struct fman_cfg *cfg)
58427 +{
58428 +       uint32_t cfg_reg = 0;
58429 +
58430 +       /**********************/
58431 +       /* Enable all modules */
58432 +       /**********************/
58433 +       /* clear & enable global counters  - calculate reg and save for later,
58434 +       because it's the same reg for QMI enable */
58435 +       cfg_reg = QMI_CFG_EN_COUNTERS;
58436 +       if (cfg->qmi_deq_option_support)
58437 +               cfg_reg |= (uint32_t)(((cfg->qmi_def_tnums_thresh) << 8) |
58438 +                               (uint32_t)cfg->qmi_def_tnums_thresh);
58439 +
58440 +       iowrite32be(BMI_INIT_START, &fman_rg->bmi_rg->fmbm_init);
58441 +       iowrite32be(cfg_reg | QMI_CFG_ENQ_EN | QMI_CFG_DEQ_EN,
58442 +                       &fman_rg->qmi_rg->fmqm_gc);
58443 +
58444 +       return 0;
58445 +}
58446 +
58447 +void fman_free_resources(struct fman_rg *fman_rg)
58448 +{
58449 +       /* disable BMI and QMI */
58450 +       iowrite32be(0, &fman_rg->bmi_rg->fmbm_init);
58451 +       iowrite32be(0, &fman_rg->qmi_rg->fmqm_gc);
58452 +
58453 +       /* release BMI resources */
58454 +       iowrite32be(0, &fman_rg->bmi_rg->fmbm_cfg2);
58455 +       iowrite32be(0, &fman_rg->bmi_rg->fmbm_cfg1);
58456 +
58457 +       /* disable ECC */
58458 +       iowrite32be(0, &fman_rg->fpm_rg->fm_rcr);
58459 +}
58460 +
58461 +/****************************************************/
58462 +/*       API Run-time Control uint functions        */
58463 +/****************************************************/
58464 +uint32_t fman_get_normal_pending(struct fman_fpm_regs *fpm_rg)
58465 +{
58466 +       return ioread32be(&fpm_rg->fm_npi);
58467 +}
58468 +
58469 +uint32_t fman_get_controller_event(struct fman_fpm_regs *fpm_rg, uint8_t reg_id)
58470 +{
58471 +       uint32_t event;
58472 +
58473 +       event = ioread32be(&fpm_rg->fmfp_fcev[reg_id]) &
58474 +                       ioread32be(&fpm_rg->fmfp_cee[reg_id]);
58475 +       iowrite32be(event, &fpm_rg->fmfp_cev[reg_id]);
58476 +
58477 +       return event;
58478 +}
58479 +
58480 +uint32_t fman_get_error_pending(struct fman_fpm_regs *fpm_rg)
58481 +{
58482 +       return ioread32be(&fpm_rg->fm_epi);
58483 +}
58484 +
58485 +void fman_set_ports_bandwidth(struct fman_bmi_regs *bmi_rg, uint8_t *weights)
58486 +{
58487 +       int i;
58488 +       uint8_t shift;
58489 +       uint32_t tmp = 0;
58490 +
58491 +       for (i = 0; i < 64; i++) {
58492 +               if (weights[i] > 1) { /* no need to write 1 since it is 0 */
58493 +                       /* Add this port to tmp_reg */
58494 +                       /* (each 8 ports result in one register)*/
58495 +                       shift = (uint8_t)(32 - 4 * ((i % 8) + 1));
58496 +                       tmp |= ((weights[i] - 1) << shift);
58497 +               }
58498 +               if (i % 8 == 7) { /* last in this set */
58499 +                       iowrite32be(tmp, &bmi_rg->fmbm_arb[i / 8]);
58500 +                       tmp = 0;
58501 +               }
58502 +       }
58503 +}
58504 +
58505 +void fman_enable_rams_ecc(struct fman_fpm_regs *fpm_rg)
58506 +{
58507 +       uint32_t tmp;
58508 +
58509 +       tmp = ioread32be(&fpm_rg->fm_rcr);
58510 +       if (tmp & FPM_RAM_RAMS_ECC_EN_SRC_SEL)
58511 +               iowrite32be(tmp | FPM_RAM_IRAM_ECC_EN,
58512 +                               &fpm_rg->fm_rcr);
58513 +       else
58514 +               iowrite32be(tmp | FPM_RAM_RAMS_ECC_EN |
58515 +                               FPM_RAM_IRAM_ECC_EN,
58516 +                               &fpm_rg->fm_rcr);
58517 +}
58518 +
58519 +void fman_disable_rams_ecc(struct fman_fpm_regs *fpm_rg)
58520 +{
58521 +       uint32_t tmp;
58522 +
58523 +       tmp = ioread32be(&fpm_rg->fm_rcr);
58524 +       if (tmp & FPM_RAM_RAMS_ECC_EN_SRC_SEL)
58525 +               iowrite32be(tmp & ~FPM_RAM_IRAM_ECC_EN,
58526 +                               &fpm_rg->fm_rcr);
58527 +       else
58528 +               iowrite32be(tmp & ~(FPM_RAM_RAMS_ECC_EN | FPM_RAM_IRAM_ECC_EN),
58529 +                               &fpm_rg->fm_rcr);
58530 +}
58531 +
58532 +int fman_set_exception(struct fman_rg *fman_rg,
58533 +                       enum fman_exceptions exception,
58534 +                       bool enable)
58535 +{
58536 +       uint32_t tmp;
58537 +
58538 +       switch (exception) {
58539 +       case(E_FMAN_EX_DMA_BUS_ERROR):
58540 +               tmp = ioread32be(&fman_rg->dma_rg->fmdmmr);
58541 +               if (enable)
58542 +                       tmp |= DMA_MODE_BER;
58543 +               else
58544 +                       tmp &= ~DMA_MODE_BER;
58545 +               /* disable bus error */
58546 +               iowrite32be(tmp, &fman_rg->dma_rg->fmdmmr);
58547 +               break;
58548 +       case(E_FMAN_EX_DMA_READ_ECC):
58549 +       case(E_FMAN_EX_DMA_SYSTEM_WRITE_ECC):
58550 +       case(E_FMAN_EX_DMA_FM_WRITE_ECC):
58551 +               tmp = ioread32be(&fman_rg->dma_rg->fmdmmr);
58552 +               if (enable)
58553 +                       tmp |= DMA_MODE_ECC;
58554 +               else
58555 +                       tmp &= ~DMA_MODE_ECC;
58556 +               iowrite32be(tmp, &fman_rg->dma_rg->fmdmmr);
58557 +               break;
58558 +       case(E_FMAN_EX_FPM_STALL_ON_TASKS):
58559 +               tmp = ioread32be(&fman_rg->fpm_rg->fmfp_ee);
58560 +               if (enable)
58561 +                       tmp |= FPM_EV_MASK_STALL_EN;
58562 +               else
58563 +                       tmp &= ~FPM_EV_MASK_STALL_EN;
58564 +               iowrite32be(tmp, &fman_rg->fpm_rg->fmfp_ee);
58565 +               break;
58566 +       case(E_FMAN_EX_FPM_SINGLE_ECC):
58567 +               tmp = ioread32be(&fman_rg->fpm_rg->fmfp_ee);
58568 +               if (enable)
58569 +                       tmp |= FPM_EV_MASK_SINGLE_ECC_EN;
58570 +               else
58571 +                       tmp &= ~FPM_EV_MASK_SINGLE_ECC_EN;
58572 +               iowrite32be(tmp, &fman_rg->fpm_rg->fmfp_ee);
58573 +               break;
58574 +       case(E_FMAN_EX_FPM_DOUBLE_ECC):
58575 +               tmp = ioread32be(&fman_rg->fpm_rg->fmfp_ee);
58576 +               if (enable)
58577 +                       tmp |= FPM_EV_MASK_DOUBLE_ECC_EN;
58578 +               else
58579 +                       tmp &= ~FPM_EV_MASK_DOUBLE_ECC_EN;
58580 +               iowrite32be(tmp, &fman_rg->fpm_rg->fmfp_ee);
58581 +               break;
58582 +       case(E_FMAN_EX_QMI_SINGLE_ECC):
58583 +               tmp = ioread32be(&fman_rg->qmi_rg->fmqm_ien);
58584 +               if (enable)
58585 +                       tmp |= QMI_INTR_EN_SINGLE_ECC;
58586 +               else
58587 +                       tmp &= ~QMI_INTR_EN_SINGLE_ECC;
58588 +               iowrite32be(tmp, &fman_rg->qmi_rg->fmqm_ien);
58589 +               break;
58590 +       case(E_FMAN_EX_QMI_DOUBLE_ECC):
58591 +               tmp = ioread32be(&fman_rg->qmi_rg->fmqm_eien);
58592 +               if (enable)
58593 +                       tmp |= QMI_ERR_INTR_EN_DOUBLE_ECC;
58594 +               else
58595 +                       tmp &= ~QMI_ERR_INTR_EN_DOUBLE_ECC;
58596 +               iowrite32be(tmp, &fman_rg->qmi_rg->fmqm_eien);
58597 +               break;
58598 +       case(E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID):
58599 +               tmp = ioread32be(&fman_rg->qmi_rg->fmqm_eien);
58600 +               if (enable)
58601 +                       tmp |= QMI_ERR_INTR_EN_DEQ_FROM_DEF;
58602 +               else
58603 +                       tmp &= ~QMI_ERR_INTR_EN_DEQ_FROM_DEF;
58604 +               iowrite32be(tmp, &fman_rg->qmi_rg->fmqm_eien);
58605 +               break;
58606 +       case(E_FMAN_EX_BMI_LIST_RAM_ECC):
58607 +               tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
58608 +               if (enable)
58609 +                       tmp |= BMI_ERR_INTR_EN_LIST_RAM_ECC;
58610 +               else
58611 +                       tmp &= ~BMI_ERR_INTR_EN_LIST_RAM_ECC;
58612 +               iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
58613 +               break;
58614 +       case(E_FMAN_EX_BMI_STORAGE_PROFILE_ECC):
58615 +               tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
58616 +               if (enable)
58617 +                       tmp |= BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC;
58618 +               else
58619 +                       tmp &= ~BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC;
58620 +               iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
58621 +               break;
58622 +       case(E_FMAN_EX_BMI_STATISTICS_RAM_ECC):
58623 +               tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
58624 +               if (enable)
58625 +                       tmp |= BMI_ERR_INTR_EN_STATISTICS_RAM_ECC;
58626 +               else
58627 +                       tmp &= ~BMI_ERR_INTR_EN_STATISTICS_RAM_ECC;
58628 +               iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
58629 +               break;
58630 +       case(E_FMAN_EX_BMI_DISPATCH_RAM_ECC):
58631 +               tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
58632 +               if (enable)
58633 +                       tmp |= BMI_ERR_INTR_EN_DISPATCH_RAM_ECC;
58634 +               else
58635 +                       tmp &= ~BMI_ERR_INTR_EN_DISPATCH_RAM_ECC;
58636 +               iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
58637 +               break;
58638 +       case(E_FMAN_EX_IRAM_ECC):
58639 +               tmp = ioread32be(&fman_rg->fpm_rg->fm_rie);
58640 +               if (enable) {
58641 +                       /* enable ECC if not enabled */
58642 +                       fman_enable_rams_ecc(fman_rg->fpm_rg);
58643 +                       /* enable ECC interrupts */
58644 +                       tmp |= FPM_IRAM_ECC_ERR_EX_EN;
58645 +               } else {
58646 +                       /* ECC mechanism may be disabled,
58647 +                        * depending on driver status  */
58648 +                       fman_disable_rams_ecc(fman_rg->fpm_rg);
58649 +                       tmp &= ~FPM_IRAM_ECC_ERR_EX_EN;
58650 +               }
58651 +               iowrite32be(tmp, &fman_rg->fpm_rg->fm_rie);
58652 +               break;
58653 +       case(E_FMAN_EX_MURAM_ECC):
58654 +               tmp = ioread32be(&fman_rg->fpm_rg->fm_rie);
58655 +               if (enable) {
58656 +                       /* enable ECC if not enabled */
58657 +                       fman_enable_rams_ecc(fman_rg->fpm_rg);
58658 +                       /* enable ECC interrupts */
58659 +                       tmp |= FPM_MURAM_ECC_ERR_EX_EN;
58660 +               } else {
58661 +                       /* ECC mechanism may be disabled,
58662 +                        * depending on driver status  */
58663 +                       fman_disable_rams_ecc(fman_rg->fpm_rg);
58664 +                       tmp &= ~FPM_MURAM_ECC_ERR_EX_EN;
58665 +               }
58666 +               iowrite32be(tmp, &fman_rg->fpm_rg->fm_rie);
58667 +               break;
58668 +       default:
58669 +               return -EINVAL;
58670 +       }
58671 +       return 0;
58672 +}
58673 +
58674 +void fman_get_revision(struct fman_fpm_regs *fpm_rg,
58675 +                       uint8_t *major,
58676 +                       uint8_t *minor)
58677 +{
58678 +       uint32_t tmp;
58679 +
58680 +       tmp = ioread32be(&fpm_rg->fm_ip_rev_1);
58681 +       *major = (uint8_t)((tmp & FPM_REV1_MAJOR_MASK) >> FPM_REV1_MAJOR_SHIFT);
58682 +       *minor = (uint8_t)((tmp & FPM_REV1_MINOR_MASK) >> FPM_REV1_MINOR_SHIFT);
58683 +
58684 +}
58685 +
58686 +uint32_t fman_get_counter(struct fman_rg *fman_rg,
58687 +                               enum fman_counters reg_name)
58688 +{
58689 +       uint32_t ret_val;
58690 +
58691 +       switch (reg_name) {
58692 +       case(E_FMAN_COUNTERS_ENQ_TOTAL_FRAME):
58693 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_etfc);
58694 +               break;
58695 +       case(E_FMAN_COUNTERS_DEQ_TOTAL_FRAME):
58696 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dtfc);
58697 +               break;
58698 +       case(E_FMAN_COUNTERS_DEQ_0):
58699 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc0);
58700 +               break;
58701 +       case(E_FMAN_COUNTERS_DEQ_1):
58702 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc1);
58703 +               break;
58704 +       case(E_FMAN_COUNTERS_DEQ_2):
58705 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc2);
58706 +               break;
58707 +       case(E_FMAN_COUNTERS_DEQ_3):
58708 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc3);
58709 +               break;
58710 +       case(E_FMAN_COUNTERS_DEQ_FROM_DEFAULT):
58711 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dfdc);
58712 +               break;
58713 +       case(E_FMAN_COUNTERS_DEQ_FROM_CONTEXT):
58714 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dfcc);
58715 +               break;
58716 +       case(E_FMAN_COUNTERS_DEQ_FROM_FD):
58717 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dffc);
58718 +               break;
58719 +       case(E_FMAN_COUNTERS_DEQ_CONFIRM):
58720 +               ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dcc);
58721 +               break;
58722 +       default:
58723 +               ret_val = 0;
58724 +       }
58725 +       return ret_val;
58726 +}
58727 +
58728 +int fman_modify_counter(struct fman_rg *fman_rg,
58729 +                       enum fman_counters reg_name,
58730 +                       uint32_t val)
58731 +{
58732 +       /* When applicable (when there is an 'enable counters' bit,
58733 +        * check that counters are enabled */
58734 +       switch (reg_name) {
58735 +       case(E_FMAN_COUNTERS_ENQ_TOTAL_FRAME):
58736 +       case(E_FMAN_COUNTERS_DEQ_TOTAL_FRAME):
58737 +       case(E_FMAN_COUNTERS_DEQ_0):
58738 +       case(E_FMAN_COUNTERS_DEQ_1):
58739 +       case(E_FMAN_COUNTERS_DEQ_2):
58740 +       case(E_FMAN_COUNTERS_DEQ_3):
58741 +       case(E_FMAN_COUNTERS_DEQ_FROM_DEFAULT):
58742 +       case(E_FMAN_COUNTERS_DEQ_FROM_CONTEXT):
58743 +       case(E_FMAN_COUNTERS_DEQ_FROM_FD):
58744 +       case(E_FMAN_COUNTERS_DEQ_CONFIRM):
58745 +               if (!(ioread32be(&fman_rg->qmi_rg->fmqm_gc) &
58746 +                               QMI_CFG_EN_COUNTERS))
58747 +                       return -EINVAL;
58748 +               break;
58749 +       default:
58750 +               break;
58751 +       }
58752 +       /* Set counter */
58753 +       switch (reg_name) {
58754 +       case(E_FMAN_COUNTERS_ENQ_TOTAL_FRAME):
58755 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_etfc);
58756 +               break;
58757 +       case(E_FMAN_COUNTERS_DEQ_TOTAL_FRAME):
58758 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dtfc);
58759 +               break;
58760 +       case(E_FMAN_COUNTERS_DEQ_0):
58761 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc0);
58762 +               break;
58763 +       case(E_FMAN_COUNTERS_DEQ_1):
58764 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc1);
58765 +               break;
58766 +       case(E_FMAN_COUNTERS_DEQ_2):
58767 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc2);
58768 +               break;
58769 +       case(E_FMAN_COUNTERS_DEQ_3):
58770 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc3);
58771 +               break;
58772 +       case(E_FMAN_COUNTERS_DEQ_FROM_DEFAULT):
58773 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dfdc);
58774 +               break;
58775 +       case(E_FMAN_COUNTERS_DEQ_FROM_CONTEXT):
58776 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dfcc);
58777 +               break;
58778 +       case(E_FMAN_COUNTERS_DEQ_FROM_FD):
58779 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dffc);
58780 +               break;
58781 +       case(E_FMAN_COUNTERS_DEQ_CONFIRM):
58782 +               iowrite32be(val, &fman_rg->qmi_rg->fmqm_dcc);
58783 +               break;
58784 +       case(E_FMAN_COUNTERS_SEMAPHOR_ENTRY_FULL_REJECT):
58785 +               iowrite32be(val, &fman_rg->dma_rg->fmdmsefrc);
58786 +               break;
58787 +       case(E_FMAN_COUNTERS_SEMAPHOR_QUEUE_FULL_REJECT):
58788 +               iowrite32be(val, &fman_rg->dma_rg->fmdmsqfrc);
58789 +               break;
58790 +       case(E_FMAN_COUNTERS_SEMAPHOR_SYNC_REJECT):
58791 +               iowrite32be(val, &fman_rg->dma_rg->fmdmssrc);
58792 +               break;
58793 +       default:
58794 +               break;
58795 +       }
58796 +       return 0;
58797 +}
58798 +
58799 +void fman_set_dma_emergency(struct fman_dma_regs *dma_rg,
58800 +                               bool is_write,
58801 +                               bool enable)
58802 +{
58803 +       uint32_t msk;
58804 +
58805 +       msk = (uint32_t)(is_write ? DMA_MODE_EMER_WRITE : DMA_MODE_EMER_READ);
58806 +
58807 +       if (enable)
58808 +               iowrite32be(ioread32be(&dma_rg->fmdmmr) | msk,
58809 +                               &dma_rg->fmdmmr);
58810 +       else /* disable */
58811 +               iowrite32be(ioread32be(&dma_rg->fmdmmr) & ~msk,
58812 +                               &dma_rg->fmdmmr);
58813 +}
58814 +
58815 +void fman_set_dma_ext_bus_pri(struct fman_dma_regs *dma_rg, uint32_t pri)
58816 +{
58817 +       uint32_t tmp;
58818 +
58819 +       tmp = ioread32be(&dma_rg->fmdmmr) |
58820 +                       (pri << DMA_MODE_BUS_PRI_SHIFT);
58821 +
58822 +       iowrite32be(tmp, &dma_rg->fmdmmr);
58823 +}
58824 +
58825 +uint32_t fman_get_dma_status(struct fman_dma_regs *dma_rg)
58826 +{
58827 +       return ioread32be(&dma_rg->fmdmsr);
58828 +}
58829 +
58830 +void fman_force_intr(struct fman_rg *fman_rg,
58831 +               enum fman_exceptions exception)
58832 +{
58833 +       switch (exception) {
58834 +       case E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:
58835 +               iowrite32be(QMI_ERR_INTR_EN_DEQ_FROM_DEF,
58836 +                               &fman_rg->qmi_rg->fmqm_eif);
58837 +               break;
58838 +       case E_FMAN_EX_QMI_SINGLE_ECC:
58839 +               iowrite32be(QMI_INTR_EN_SINGLE_ECC,
58840 +                               &fman_rg->qmi_rg->fmqm_if);
58841 +               break;
58842 +       case E_FMAN_EX_QMI_DOUBLE_ECC:
58843 +               iowrite32be(QMI_ERR_INTR_EN_DOUBLE_ECC,
58844 +                               &fman_rg->qmi_rg->fmqm_eif);
58845 +               break;
58846 +       case E_FMAN_EX_BMI_LIST_RAM_ECC:
58847 +               iowrite32be(BMI_ERR_INTR_EN_LIST_RAM_ECC,
58848 +                               &fman_rg->bmi_rg->fmbm_ifr);
58849 +               break;
58850 +       case E_FMAN_EX_BMI_STORAGE_PROFILE_ECC:
58851 +               iowrite32be(BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC,
58852 +                               &fman_rg->bmi_rg->fmbm_ifr);
58853 +               break;
58854 +       case E_FMAN_EX_BMI_STATISTICS_RAM_ECC:
58855 +               iowrite32be(BMI_ERR_INTR_EN_STATISTICS_RAM_ECC,
58856 +                               &fman_rg->bmi_rg->fmbm_ifr);
58857 +               break;
58858 +       case E_FMAN_EX_BMI_DISPATCH_RAM_ECC:
58859 +               iowrite32be(BMI_ERR_INTR_EN_DISPATCH_RAM_ECC,
58860 +                               &fman_rg->bmi_rg->fmbm_ifr);
58861 +               break;
58862 +       default:
58863 +               break;
58864 +       }
58865 +}
58866 +
58867 +bool fman_is_qmi_halt_not_busy_state(struct fman_qmi_regs *qmi_rg)
58868 +{
58869 +       return (bool)!!(ioread32be(&qmi_rg->fmqm_gs) & QMI_GS_HALT_NOT_BUSY);
58870 +}
58871 +void fman_resume(struct fman_fpm_regs *fpm_rg)
58872 +{
58873 +       uint32_t tmp;
58874 +
58875 +       tmp = ioread32be(&fpm_rg->fmfp_ee);
58876 +       /* clear tmp_reg event bits in order not to clear standing events */
58877 +       tmp &= ~(FPM_EV_MASK_DOUBLE_ECC |
58878 +                       FPM_EV_MASK_STALL |
58879 +                       FPM_EV_MASK_SINGLE_ECC);
58880 +       tmp |= FPM_EV_MASK_RELEASE_FM;
58881 +
58882 +       iowrite32be(tmp, &fpm_rg->fmfp_ee);
58883 +}
58884 --- /dev/null
58885 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_common.h
58886 @@ -0,0 +1,1214 @@
58887 +/*
58888 + * Copyright 2008-2012 Freescale Semiconductor Inc.
58889 + *
58890 + * Redistribution and use in source and binary forms, with or without
58891 + * modification, are permitted provided that the following conditions are met:
58892 + *     * Redistributions of source code must retain the above copyright
58893 + *       notice, this list of conditions and the following disclaimer.
58894 + *     * Redistributions in binary form must reproduce the above copyright
58895 + *       notice, this list of conditions and the following disclaimer in the
58896 + *       documentation and/or other materials provided with the distribution.
58897 + *     * Neither the name of Freescale Semiconductor nor the
58898 + *       names of its contributors may be used to endorse or promote products
58899 + *       derived from this software without specific prior written permission.
58900 + *
58901 + *
58902 + * ALTERNATIVELY, this software may be distributed under the terms of the
58903 + * GNU General Public License ("GPL") as published by the Free Software
58904 + * Foundation, either version 2 of that License or (at your option) any
58905 + * later version.
58906 + *
58907 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
58908 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
58909 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
58910 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
58911 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
58912 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
58913 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
58914 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58915 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
58916 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58917 + */
58918 +
58919 +
58920 +/******************************************************************************
58921 + @File          fm_common.h
58922 +
58923 + @Description   FM internal structures and definitions.
58924 +*//***************************************************************************/
58925 +#ifndef __FM_COMMON_H
58926 +#define __FM_COMMON_H
58927 +
58928 +#include "error_ext.h"
58929 +#include "std_ext.h"
58930 +#include "fm_pcd_ext.h"
58931 +#include "fm_ext.h"
58932 +#include "fm_port_ext.h"
58933 +
58934 +
58935 +#define e_FM_PORT_TYPE_OH_HOST_COMMAND      e_FM_PORT_TYPE_DUMMY
58936 +
58937 +#define CLS_PLAN_NUM_PER_GRP                        8
58938 +
58939 +#define IP_OFFLOAD_PACKAGE_NUMBER                   106
58940 +#define CAPWAP_OFFLOAD_PACKAGE_NUMBER               108
58941 +#define IS_OFFLOAD_PACKAGE(num) ((num == IP_OFFLOAD_PACKAGE_NUMBER) || (num == CAPWAP_OFFLOAD_PACKAGE_NUMBER))
58942 +
58943 +
58944 +
58945 +/**************************************************************************//**
58946 + @Description       Modules registers offsets
58947 +*//***************************************************************************/
58948 +#define FM_MM_MURAM             0x00000000
58949 +#define FM_MM_BMI               0x00080000
58950 +#define FM_MM_QMI               0x00080400
58951 +#define FM_MM_PRS               0x000c7000
58952 +#define FM_MM_KG                0x000C1000
58953 +#define FM_MM_DMA               0x000C2000
58954 +#define FM_MM_FPM               0x000C3000
58955 +#define FM_MM_PLCR              0x000C0000
58956 +#define FM_MM_IMEM              0x000C4000
58957 +#define FM_MM_CGP               0x000DB000
58958 +#define FM_MM_TRB(i)            (0x000D0200 + 0x400 * (i))
58959 +#if (DPAA_VERSION >= 11)
58960 +#define FM_MM_SP                0x000dc000
58961 +#endif /* (DPAA_VERSION >= 11) */
58962 +
58963 +
58964 +/**************************************************************************//**
58965 + @Description   Enum for inter-module interrupts registration
58966 +*//***************************************************************************/
58967 +typedef enum e_FmEventModules{
58968 +    e_FM_MOD_PRS,                   /**< Parser event */
58969 +    e_FM_MOD_KG,                    /**< Keygen event */
58970 +    e_FM_MOD_PLCR,                  /**< Policer event */
58971 +    e_FM_MOD_10G_MAC,               /**< 10G MAC event */
58972 +    e_FM_MOD_1G_MAC,                /**< 1G MAC event */
58973 +    e_FM_MOD_TMR,                   /**< Timer event */
58974 +    e_FM_MOD_FMAN_CTRL,             /**< FMAN Controller  Timer event */
58975 +    e_FM_MOD_MACSEC,
58976 +    e_FM_MOD_DUMMY_LAST
58977 +} e_FmEventModules;
58978 +
58979 +/**************************************************************************//**
58980 + @Description   Enum for interrupts types
58981 +*//***************************************************************************/
58982 +typedef enum e_FmIntrType {
58983 +    e_FM_INTR_TYPE_ERR,
58984 +    e_FM_INTR_TYPE_NORMAL
58985 +} e_FmIntrType;
58986 +
58987 +/**************************************************************************//**
58988 + @Description   Enum for inter-module interrupts registration
58989 +*//***************************************************************************/
58990 +typedef enum e_FmInterModuleEvent
58991 +{
58992 +    e_FM_EV_PRS = 0,                /**< Parser event */
58993 +    e_FM_EV_ERR_PRS,                /**< Parser error event */
58994 +    e_FM_EV_KG,                     /**< Keygen event */
58995 +    e_FM_EV_ERR_KG,                 /**< Keygen error event */
58996 +    e_FM_EV_PLCR,                   /**< Policer event */
58997 +    e_FM_EV_ERR_PLCR,               /**< Policer error event */
58998 +    e_FM_EV_ERR_10G_MAC0,           /**< 10G MAC 0 error event */
58999 +    e_FM_EV_ERR_10G_MAC1,           /**< 10G MAC 1 error event */
59000 +    e_FM_EV_ERR_1G_MAC0,            /**< 1G MAC 0 error event */
59001 +    e_FM_EV_ERR_1G_MAC1,            /**< 1G MAC 1 error event */
59002 +    e_FM_EV_ERR_1G_MAC2,            /**< 1G MAC 2 error event */
59003 +    e_FM_EV_ERR_1G_MAC3,            /**< 1G MAC 3 error event */
59004 +    e_FM_EV_ERR_1G_MAC4,            /**< 1G MAC 4 error event */
59005 +    e_FM_EV_ERR_1G_MAC5,            /**< 1G MAC 5 error event */
59006 +    e_FM_EV_ERR_1G_MAC6,            /**< 1G MAC 6 error event */
59007 +    e_FM_EV_ERR_1G_MAC7,            /**< 1G MAC 7 error event */
59008 +    e_FM_EV_ERR_MACSEC_MAC0,
59009 +    e_FM_EV_TMR,                    /**< Timer event */
59010 +    e_FM_EV_10G_MAC0,               /**< 10G MAC 0 event (Magic packet detection)*/
59011 +    e_FM_EV_10G_MAC1,               /**< 10G MAC 1 event (Magic packet detection)*/
59012 +    e_FM_EV_1G_MAC0,                /**< 1G MAC 0 event (Magic packet detection)*/
59013 +    e_FM_EV_1G_MAC1,                /**< 1G MAC 1 event (Magic packet detection)*/
59014 +    e_FM_EV_1G_MAC2,                /**< 1G MAC 2 (Magic packet detection)*/
59015 +    e_FM_EV_1G_MAC3,                /**< 1G MAC 3 (Magic packet detection)*/
59016 +    e_FM_EV_1G_MAC4,                /**< 1G MAC 4 (Magic packet detection)*/
59017 +    e_FM_EV_1G_MAC5,                /**< 1G MAC 5 (Magic packet detection)*/
59018 +    e_FM_EV_1G_MAC6,                /**< 1G MAC 6 (Magic packet detection)*/
59019 +    e_FM_EV_1G_MAC7,                /**< 1G MAC 7 (Magic packet detection)*/
59020 +    e_FM_EV_MACSEC_MAC0,            /**< MACSEC MAC 0 event */
59021 +    e_FM_EV_FMAN_CTRL_0,            /**< Fman controller event 0 */
59022 +    e_FM_EV_FMAN_CTRL_1,            /**< Fman controller event 1 */
59023 +    e_FM_EV_FMAN_CTRL_2,            /**< Fman controller event 2 */
59024 +    e_FM_EV_FMAN_CTRL_3,            /**< Fman controller event 3 */
59025 +    e_FM_EV_DUMMY_LAST
59026 +} e_FmInterModuleEvent;
59027 +
59028 +
59029 +#if defined(__MWERKS__) && !defined(__GNUC__)
59030 +#pragma pack(push,1)
59031 +#endif /* defined(__MWERKS__) && ... */
59032 +
59033 +/**************************************************************************//**
59034 + @Description   PCD KG scheme registers
59035 +*//***************************************************************************/
59036 +typedef _Packed struct t_FmPcdPlcrProfileRegs {
59037 +    volatile uint32_t fmpl_pemode;      /* 0x090 FMPL_PEMODE - FM Policer Profile Entry Mode*/
59038 +    volatile uint32_t fmpl_pegnia;      /* 0x094 FMPL_PEGNIA - FM Policer Profile Entry GREEN Next Invoked Action*/
59039 +    volatile uint32_t fmpl_peynia;      /* 0x098 FMPL_PEYNIA - FM Policer Profile Entry YELLOW Next Invoked Action*/
59040 +    volatile uint32_t fmpl_pernia;      /* 0x09C FMPL_PERNIA - FM Policer Profile Entry RED Next Invoked Action*/
59041 +    volatile uint32_t fmpl_pecir;       /* 0x0A0 FMPL_PECIR  - FM Policer Profile Entry Committed Information Rate*/
59042 +    volatile uint32_t fmpl_pecbs;       /* 0x0A4 FMPL_PECBS  - FM Policer Profile Entry Committed Burst Size*/
59043 +    volatile uint32_t fmpl_pepepir_eir; /* 0x0A8 FMPL_PEPIR_EIR - FM Policer Profile Entry Peak/Excess Information Rate*/
59044 +    volatile uint32_t fmpl_pepbs_ebs;   /* 0x0AC FMPL_PEPBS_EBS - FM Policer Profile Entry Peak/Excess Information Rate*/
59045 +    volatile uint32_t fmpl_pelts;       /* 0x0B0 FMPL_PELTS  - FM Policer Profile Entry Last TimeStamp*/
59046 +    volatile uint32_t fmpl_pects;       /* 0x0B4 FMPL_PECTS  - FM Policer Profile Entry Committed Token Status*/
59047 +    volatile uint32_t fmpl_pepts_ets;   /* 0x0B8 FMPL_PEPTS_ETS - FM Policer Profile Entry Peak/Excess Token Status*/
59048 +    volatile uint32_t fmpl_pegpc;       /* 0x0BC FMPL_PEGPC  - FM Policer Profile Entry GREEN Packet Counter*/
59049 +    volatile uint32_t fmpl_peypc;       /* 0x0C0 FMPL_PEYPC  - FM Policer Profile Entry YELLOW Packet Counter*/
59050 +    volatile uint32_t fmpl_perpc;       /* 0x0C4 FMPL_PERPC  - FM Policer Profile Entry RED Packet Counter */
59051 +    volatile uint32_t fmpl_perypc;      /* 0x0C8 FMPL_PERYPC - FM Policer Profile Entry Recolored YELLOW Packet Counter*/
59052 +    volatile uint32_t fmpl_perrpc;      /* 0x0CC FMPL_PERRPC - FM Policer Profile Entry Recolored RED Packet Counter*/
59053 +    volatile uint32_t fmpl_res1[12];    /* 0x0D0-0x0FF Reserved */
59054 +} _PackedType t_FmPcdPlcrProfileRegs;
59055 +
59056 +
59057 +typedef _Packed struct t_FmPcdCcCapwapReassmTimeoutParams {
59058 +    volatile uint32_t                       portIdAndCapwapReassmTbl;
59059 +    volatile uint32_t                       fqidForTimeOutFrames;
59060 +    volatile uint32_t                       timeoutRequestTime;
59061 +}_PackedType t_FmPcdCcCapwapReassmTimeoutParams;
59062 +
59063 +/**************************************************************************//**
59064 + @Description   PCD CTRL Parameters Page
59065 +*//***************************************************************************/
59066 +typedef _Packed struct t_FmPcdCtrlParamsPage {
59067 +    volatile uint8_t  reserved0[16];
59068 +    volatile uint32_t iprIpv4Nia;
59069 +    volatile uint32_t iprIpv6Nia;
59070 +    volatile uint8_t  reserved1[24];
59071 +    volatile uint32_t ipfOptionsCounter;
59072 +    volatile uint8_t  reserved2[12];
59073 +    volatile uint32_t misc;
59074 +    volatile uint32_t errorsDiscardMask;
59075 +    volatile uint32_t discardMask;
59076 +    volatile uint8_t  reserved3[4];
59077 +    volatile uint32_t postBmiFetchNia;
59078 +    volatile uint8_t  reserved4[172];
59079 +} _PackedType t_FmPcdCtrlParamsPage;
59080 +
59081 +
59082 +
59083 +#if defined(__MWERKS__) && !defined(__GNUC__)
59084 +#pragma pack(pop)
59085 +#endif /* defined(__MWERKS__) && ... */
59086 +
59087 +
59088 +/*for UNDER_CONSTRUCTION_FM_RMU_USE_SEC its defined in fm_ext.h*/
59089 +typedef uint32_t t_FmFmanCtrl;
59090 +
59091 +#define FPM_PORT_FM_CTL1                0x00000001
59092 +#define FPM_PORT_FM_CTL2                0x00000002
59093 +
59094 +
59095 +
59096 +typedef struct t_FmPcdCcFragScratchPoolCmdParams {
59097 +    uint32_t    numOfBuffers;
59098 +    uint8_t     bufferPoolId;
59099 +} t_FmPcdCcFragScratchPoolCmdParams;
59100 +
59101 +typedef struct t_FmPcdCcReassmTimeoutParams {
59102 +    bool        activate;
59103 +    uint8_t     tsbs;
59104 +    uint32_t    iprcpt;
59105 +} t_FmPcdCcReassmTimeoutParams;
59106 +
59107 +typedef struct {
59108 +    uint8_t             baseEntry;
59109 +    uint16_t            numOfClsPlanEntries;
59110 +    uint32_t            vectors[FM_PCD_MAX_NUM_OF_CLS_PLANS];
59111 +} t_FmPcdKgInterModuleClsPlanSet;
59112 +
59113 +/**************************************************************************//**
59114 + @Description   Structure for binding a port to keygen schemes.
59115 +*//***************************************************************************/
59116 +typedef struct t_FmPcdKgInterModuleBindPortToSchemes {
59117 +    uint8_t     hardwarePortId;
59118 +    uint8_t     netEnvId;
59119 +    bool        useClsPlan;                 /**< TRUE if this port uses the clsPlan mechanism */
59120 +    uint8_t     numOfSchemes;
59121 +    uint8_t     schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
59122 +} t_FmPcdKgInterModuleBindPortToSchemes;
59123 +
59124 +typedef struct {
59125 +    uint32_t nextCcNodeInfo;
59126 +    t_List   node;
59127 +} t_CcNodeInfo;
59128 +
59129 +typedef struct
59130 +{
59131 +    t_Handle    h_CcNode;
59132 +    uint16_t    index;
59133 +    t_List      node;
59134 +}t_CcNodeInformation;
59135 +#define CC_NODE_F_OBJECT(ptr)  LIST_OBJECT(ptr, t_CcNodeInformation, node)
59136 +
59137 +typedef enum e_ModifyState
59138 +{
59139 +    e_MODIFY_STATE_ADD = 0,
59140 +    e_MODIFY_STATE_REMOVE,
59141 +    e_MODIFY_STATE_CHANGE
59142 +} e_ModifyState;
59143 +
59144 +typedef struct
59145 +{
59146 +    t_Handle h_Manip;
59147 +    t_List   node;
59148 +}t_ManipInfo;
59149 +#define CC_NEXT_NODE_F_OBJECT(ptr)  LIST_OBJECT(ptr, t_CcNodeInfo, node)
59150 +
59151 +typedef struct {
59152 +    uint32_t            type;
59153 +    uint8_t             prOffset;
59154 +    uint16_t            dataOffset;
59155 +    uint8_t             internalBufferOffset;
59156 +    uint8_t             numOfTasks;
59157 +    uint8_t             numOfExtraTasks;
59158 +    uint8_t             hardwarePortId;
59159 +    t_FmRevisionInfo    revInfo;
59160 +    uint32_t            nia;
59161 +    uint32_t            discardMask;
59162 +} t_GetCcParams;
59163 +
59164 +typedef struct {
59165 +    uint32_t        type;
59166 +    int             psoSize;
59167 +    uint32_t        nia;
59168 +    t_FmFmanCtrl    orFmanCtrl;
59169 +    bool            overwrite;
59170 +    uint8_t         ofpDpde;
59171 +} t_SetCcParams;
59172 +
59173 +typedef struct {
59174 +    t_GetCcParams getCcParams;
59175 +    t_SetCcParams setCcParams;
59176 +} t_FmPortGetSetCcParams;
59177 +
59178 +typedef struct {
59179 +    uint32_t    type;
59180 +    bool        sleep;
59181 +} t_FmSetParams;
59182 +
59183 +typedef struct {
59184 +    uint32_t    type;
59185 +    uint32_t    fmqm_gs;
59186 +    uint32_t    fm_npi;
59187 +    uint32_t    fm_cld;
59188 +    uint32_t    fmfp_extc;
59189 +} t_FmGetParams;
59190 +
59191 +typedef struct {
59192 +    t_FmSetParams setParams;
59193 +    t_FmGetParams getParams;
59194 +} t_FmGetSetParams;
59195 +
59196 +t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_Params);
59197 +
59198 +static __inline__ bool TRY_LOCK(t_Handle h_Spinlock, volatile bool *p_Flag)
59199 +{
59200 +    uint32_t intFlags;
59201 +    if (h_Spinlock)
59202 +        intFlags = XX_LockIntrSpinlock(h_Spinlock);
59203 +    else
59204 +        intFlags = XX_DisableAllIntr();
59205 +
59206 +    if (*p_Flag)
59207 +    {
59208 +        if (h_Spinlock)
59209 +            XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
59210 +        else
59211 +            XX_RestoreAllIntr(intFlags);
59212 +        return FALSE;
59213 +    }
59214 +    *p_Flag = TRUE;
59215 +
59216 +    if (h_Spinlock)
59217 +        XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
59218 +    else
59219 +        XX_RestoreAllIntr(intFlags);
59220 +
59221 +    return TRUE;
59222 +}
59223 +
59224 +#define RELEASE_LOCK(_flag) _flag = FALSE;
59225 +
59226 +/**************************************************************************//**
59227 + @Collection   Defines used for manipulation CC and BMI
59228 + @{
59229 +*//***************************************************************************/
59230 +#define INTERNAL_CONTEXT_OFFSET                 0x80000000
59231 +#define OFFSET_OF_PR                            0x40000000
59232 +#define MANIP_EXTRA_SPACE                       0x20000000
59233 +#define NUM_OF_TASKS                            0x10000000
59234 +#define OFFSET_OF_DATA                          0x08000000
59235 +#define HW_PORT_ID                              0x04000000
59236 +#define FM_REV                                  0x02000000
59237 +#define GET_NIA_FPNE                            0x01000000
59238 +#define GET_NIA_PNDN                            0x00800000
59239 +#define NUM_OF_EXTRA_TASKS                      0x00400000
59240 +#define DISCARD_MASK                            0x00200000
59241 +
59242 +#define UPDATE_NIA_PNEN                         0x80000000
59243 +#define UPDATE_PSO                              0x40000000
59244 +#define UPDATE_NIA_PNDN                         0x20000000
59245 +#define UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY      0x10000000
59246 +#define UPDATE_OFP_DPTE                         0x08000000
59247 +#define UPDATE_NIA_FENE                         0x04000000
59248 +#define UPDATE_NIA_CMNE                         0x02000000
59249 +#define UPDATE_NIA_FPNE                         0x01000000
59250 +/* @} */
59251 +
59252 +/**************************************************************************//**
59253 + @Collection   Defines used for manipulation CC and CC
59254 + @{
59255 +*//***************************************************************************/
59256 +#define UPDATE_NIA_ENQ_WITHOUT_DMA              0x80000000
59257 +#define UPDATE_CC_WITH_TREE                     0x40000000
59258 +#define UPDATE_CC_WITH_DELETE_TREE              0x20000000
59259 +#define UPDATE_KG_NIA_CC_WA                     0x10000000
59260 +#define UPDATE_KG_OPT_MODE                      0x08000000
59261 +#define UPDATE_KG_NIA                           0x04000000
59262 +#define UPDATE_CC_SHADOW_CLEAR                    0x02000000
59263 +/* @} */
59264 +
59265 +#define UPDATE_FPM_BRKC_SLP                     0x80000000
59266 +#define UPDATE_FPM_EXTC                                0x40000000
59267 +#define UPDATE_FPM_EXTC_CLEAR                  0x20000000
59268 +#define GET_FMQM_GS                            0x10000000
59269 +#define GET_FM_NPI                             0x08000000
59270 +#define GET_FMFP_EXTC                          0x04000000
59271 +#define CLEAR_IRAM_READY                       0x02000000
59272 +#define UPDATE_FM_CLD                          0x01000000
59273 +#define GET_FM_CLD                             0x00800000
59274 +#define FM_MAX_NUM_OF_PORTS     (FM_MAX_NUM_OF_OH_PORTS +     \
59275 +                                 FM_MAX_NUM_OF_1G_RX_PORTS +  \
59276 +                                 FM_MAX_NUM_OF_10G_RX_PORTS + \
59277 +                                 FM_MAX_NUM_OF_1G_TX_PORTS +  \
59278 +                                 FM_MAX_NUM_OF_10G_TX_PORTS)
59279 +
59280 +#define MODULE_NAME_SIZE        30
59281 +#define DUMMY_PORT_ID           0
59282 +
59283 +#define FM_LIODN_OFFSET_MASK    0x3FF
59284 +
59285 +/**************************************************************************//**
59286 +  @Description       NIA Description
59287 +*//***************************************************************************/
59288 +#define NIA_ENG_MASK                0x007C0000
59289 +#define NIA_AC_MASK                 0x0003ffff
59290 +
59291 +#define NIA_ORDER_RESTOR            0x00800000
59292 +#define NIA_ENG_FM_CTL              0x00000000
59293 +#define NIA_ENG_PRS                 0x00440000
59294 +#define NIA_ENG_KG                  0x00480000
59295 +#define NIA_ENG_PLCR                0x004C0000
59296 +#define NIA_ENG_BMI                 0x00500000
59297 +#define NIA_ENG_QMI_ENQ             0x00540000
59298 +#define NIA_ENG_QMI_DEQ             0x00580000
59299 +
59300 +#define NIA_FM_CTL_AC_CC                        0x00000006
59301 +#define NIA_FM_CTL_AC_HC                        0x0000000C
59302 +#define NIA_FM_CTL_AC_IND_MODE_TX               0x00000008
59303 +#define NIA_FM_CTL_AC_IND_MODE_RX               0x0000000A
59304 +#define NIA_FM_CTL_AC_POP_TO_N_STEP             0x0000000e
59305 +#define NIA_FM_CTL_AC_PRE_BMI_FETCH_HEADER      0x00000010
59306 +#define NIA_FM_CTL_AC_PRE_BMI_FETCH_FULL_FRAME  0x00000018
59307 +#define NIA_FM_CTL_AC_POST_BMI_FETCH            0x00000012
59308 +#define NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME         0x0000001A
59309 +#define NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME     0x0000001E
59310 +#define NIA_FM_CTL_AC_POST_BMI_ENQ_ORR          0x00000014
59311 +#define NIA_FM_CTL_AC_POST_BMI_ENQ              0x00000022
59312 +#define NIA_FM_CTL_AC_PRE_CC                    0x00000020
59313 +#define NIA_FM_CTL_AC_POST_TX                   0x00000024
59314 +/* V3 only */
59315 +#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME        0x00000028
59316 +#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_DISCARD_FRAME    0x0000002A
59317 +#define NIA_FM_CTL_AC_NO_IPACC_POP_TO_N_STEP            0x0000002C
59318 +
59319 +#define NIA_BMI_AC_ENQ_FRAME        0x00000002
59320 +#define NIA_BMI_AC_TX_RELEASE       0x000002C0
59321 +#define NIA_BMI_AC_RELEASE          0x000000C0
59322 +#define NIA_BMI_AC_DISCARD          0x000000C1
59323 +#define NIA_BMI_AC_TX               0x00000274
59324 +#define NIA_BMI_AC_FETCH            0x00000208
59325 +#define NIA_BMI_AC_MASK             0x000003FF
59326 +
59327 +#define NIA_KG_DIRECT               0x00000100
59328 +#define NIA_KG_CC_EN                0x00000200
59329 +#define NIA_PLCR_ABSOLUTE           0x00008000
59330 +
59331 +#define NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA    0x00000202
59332 +
59333 +#if defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || defined(FM_ERROR_VSP_NO_MATCH_SW006)
59334 +#define GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd)   \
59335 +    (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
59336 +                (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME) : \
59337 +                (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME))
59338 +#define GET_NIA_BMI_AC_DISCARD_FRAME(h_FmPcd)   \
59339 +    (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
59340 +                (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME) : \
59341 +                (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_DISCARD_FRAME))
59342 +#define GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME()   \
59343 +        (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME)
59344 +#else
59345 +#define GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd)   \
59346 +    (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
59347 +                (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME) : \
59348 +                (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME))
59349 +#define GET_NIA_BMI_AC_DISCARD_FRAME(h_FmPcd)   \
59350 +    (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
59351 +                (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME) : \
59352 +                (NIA_ENG_BMI | NIA_BMI_AC_DISCARD))
59353 +#define GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME()   \
59354 +            (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)
59355 +#endif /* defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || ... */
59356 +
59357 +/**************************************************************************//**
59358 +  @Description        CTRL Parameters Page defines
59359 +*//***************************************************************************/
59360 +#define FM_CTL_PARAMS_PAGE_OP_FIX_EN            0x80000000
59361 +#define FM_CTL_PARAMS_PAGE_OFFLOAD_SUPPORT_EN   0x40000000
59362 +#define FM_CTL_PARAMS_PAGE_ALWAYS_ON            0x00000100
59363 +
59364 +#define FM_CTL_PARAMS_PAGE_ERROR_VSP_MASK       0x0000003f
59365 +
59366 +/**************************************************************************//**
59367 + @Description       Port Id defines
59368 +*//***************************************************************************/
59369 +#if (DPAA_VERSION == 10)
59370 +#define BASE_OH_PORTID              1
59371 +#else
59372 +#define BASE_OH_PORTID              2
59373 +#endif /* (DPAA_VERSION == 10) */
59374 +#define BASE_1G_RX_PORTID           8
59375 +#define BASE_10G_RX_PORTID          0x10
59376 +#define BASE_1G_TX_PORTID           0x28
59377 +#define BASE_10G_TX_PORTID          0x30
59378 +
59379 +#define FM_PCD_PORT_OH_BASE_INDX        0
59380 +#define FM_PCD_PORT_1G_RX_BASE_INDX     (FM_PCD_PORT_OH_BASE_INDX+FM_MAX_NUM_OF_OH_PORTS)
59381 +#define FM_PCD_PORT_10G_RX_BASE_INDX    (FM_PCD_PORT_1G_RX_BASE_INDX+FM_MAX_NUM_OF_1G_RX_PORTS)
59382 +#define FM_PCD_PORT_1G_TX_BASE_INDX     (FM_PCD_PORT_10G_RX_BASE_INDX+FM_MAX_NUM_OF_10G_RX_PORTS)
59383 +#define FM_PCD_PORT_10G_TX_BASE_INDX    (FM_PCD_PORT_1G_TX_BASE_INDX+FM_MAX_NUM_OF_1G_TX_PORTS)
59384 +
59385 +#if (FM_MAX_NUM_OF_OH_PORTS > 0)
59386 +#define CHECK_PORT_ID_OH_PORTS(_relativePortId)                     \
59387 +    if ((_relativePortId) >= FM_MAX_NUM_OF_OH_PORTS)                \
59388 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal OH_PORT port id"))
59389 +#else
59390 +#define CHECK_PORT_ID_OH_PORTS(_relativePortId)                     \
59391 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal OH_PORT port id"))
59392 +#endif
59393 +#if (FM_MAX_NUM_OF_1G_RX_PORTS > 0)
59394 +#define CHECK_PORT_ID_1G_RX_PORTS(_relativePortId)                  \
59395 +    if ((_relativePortId) >= FM_MAX_NUM_OF_1G_RX_PORTS)             \
59396 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_RX_PORT port id"))
59397 +#else
59398 +#define CHECK_PORT_ID_1G_RX_PORTS(_relativePortId)                  \
59399 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_RX_PORT port id"))
59400 +#endif
59401 +#if (FM_MAX_NUM_OF_10G_RX_PORTS > 0)
59402 +#define CHECK_PORT_ID_10G_RX_PORTS(_relativePortId)                 \
59403 +    if ((_relativePortId) >= FM_MAX_NUM_OF_10G_RX_PORTS)            \
59404 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_RX_PORT port id"))
59405 +#else
59406 +#define CHECK_PORT_ID_10G_RX_PORTS(_relativePortId)                 \
59407 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_RX_PORT port id"))
59408 +#endif
59409 +#if (FM_MAX_NUM_OF_1G_TX_PORTS > 0)
59410 +#define CHECK_PORT_ID_1G_TX_PORTS(_relativePortId)                  \
59411 +    if ((_relativePortId) >= FM_MAX_NUM_OF_1G_TX_PORTS)             \
59412 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_TX_PORT port id"))
59413 +#else
59414 +#define CHECK_PORT_ID_1G_TX_PORTS(_relativePortId)                  \
59415 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_TX_PORT port id"))
59416 +#endif
59417 +#if (FM_MAX_NUM_OF_10G_TX_PORTS > 0)
59418 +#define CHECK_PORT_ID_10G_TX_PORTS(_relativePortId)                 \
59419 +    if ((_relativePortId) >= FM_MAX_NUM_OF_10G_TX_PORTS)            \
59420 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_TX_PORT port id"))
59421 +#else
59422 +#define CHECK_PORT_ID_10G_TX_PORTS(_relativePortId)                 \
59423 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_TX_PORT port id"))
59424 +#endif
59425 +
59426 +uint8_t SwPortIdToHwPortId(e_FmPortType type, uint8_t relativePortId, uint8_t majorRev, uint8_t minorRev);
59427 +
59428 +#define HW_PORT_ID_TO_SW_PORT_ID(_relativePortId, hardwarePortId)                   \
59429 +{   if (((hardwarePortId) >= BASE_OH_PORTID) &&                                     \
59430 +        ((hardwarePortId) < BASE_OH_PORTID+FM_MAX_NUM_OF_OH_PORTS))                 \
59431 +        _relativePortId = (uint8_t)((hardwarePortId)-BASE_OH_PORTID);               \
59432 +    else if (((hardwarePortId) >= BASE_10G_TX_PORTID) &&                            \
59433 +             ((hardwarePortId) < BASE_10G_TX_PORTID+FM_MAX_NUM_OF_10G_TX_PORTS))    \
59434 +        _relativePortId = (uint8_t)((hardwarePortId)-BASE_10G_TX_PORTID);           \
59435 +    else if (((hardwarePortId) >= BASE_1G_TX_PORTID) &&                             \
59436 +             ((hardwarePortId) < BASE_1G_TX_PORTID+FM_MAX_NUM_OF_1G_TX_PORTS))      \
59437 +        _relativePortId = (uint8_t)((hardwarePortId)-BASE_1G_TX_PORTID);            \
59438 +    else if (((hardwarePortId) >= BASE_10G_RX_PORTID) &&                            \
59439 +             ((hardwarePortId) < BASE_10G_RX_PORTID+FM_MAX_NUM_OF_10G_RX_PORTS))    \
59440 +        _relativePortId = (uint8_t)((hardwarePortId)-BASE_10G_RX_PORTID);           \
59441 +    else if (((hardwarePortId) >= BASE_1G_RX_PORTID) &&                             \
59442 +             ((hardwarePortId) < BASE_1G_RX_PORTID+FM_MAX_NUM_OF_1G_RX_PORTS))      \
59443 +        _relativePortId = (uint8_t)((hardwarePortId)-BASE_1G_RX_PORTID);            \
59444 +    else {                                                                          \
59445 +        _relativePortId = (uint8_t)DUMMY_PORT_ID;                                   \
59446 +        ASSERT_COND(TRUE);                                                          \
59447 +    }                                                                               \
59448 +}
59449 +
59450 +#define HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId)                                             \
59451 +do {                                                                                                        \
59452 +    if (((hardwarePortId) >= BASE_OH_PORTID) && ((hardwarePortId) < BASE_OH_PORTID+FM_MAX_NUM_OF_OH_PORTS)) \
59453 +        swPortIndex = (uint8_t)((hardwarePortId)-BASE_OH_PORTID+FM_PCD_PORT_OH_BASE_INDX);                  \
59454 +    else if (((hardwarePortId) >= BASE_1G_RX_PORTID) &&                                                     \
59455 +             ((hardwarePortId) < BASE_1G_RX_PORTID+FM_MAX_NUM_OF_1G_RX_PORTS))                              \
59456 +        swPortIndex = (uint8_t)((hardwarePortId)-BASE_1G_RX_PORTID+FM_PCD_PORT_1G_RX_BASE_INDX);            \
59457 +    else if (((hardwarePortId) >= BASE_10G_RX_PORTID) &&                                                    \
59458 +             ((hardwarePortId) < BASE_10G_RX_PORTID+FM_MAX_NUM_OF_10G_RX_PORTS))                            \
59459 +        swPortIndex = (uint8_t)((hardwarePortId)-BASE_10G_RX_PORTID+FM_PCD_PORT_10G_RX_BASE_INDX);          \
59460 +    else if (((hardwarePortId) >= BASE_1G_TX_PORTID) &&                                                     \
59461 +             ((hardwarePortId) < BASE_1G_TX_PORTID+FM_MAX_NUM_OF_1G_TX_PORTS))                              \
59462 +        swPortIndex = (uint8_t)((hardwarePortId)-BASE_1G_TX_PORTID+FM_PCD_PORT_1G_TX_BASE_INDX);            \
59463 +    else if (((hardwarePortId) >= BASE_10G_TX_PORTID) &&                                                    \
59464 +             ((hardwarePortId) < BASE_10G_TX_PORTID+FM_MAX_NUM_OF_10G_TX_PORTS))                            \
59465 +        swPortIndex = (uint8_t)((hardwarePortId)-BASE_10G_TX_PORTID+FM_PCD_PORT_10G_TX_BASE_INDX);          \
59466 +    else ASSERT_COND(FALSE);                                                                                \
59467 +} while (0)
59468 +
59469 +#define SW_PORT_INDX_TO_HW_PORT_ID(hardwarePortId, swPortIndex)                                                 \
59470 +do {                                                                                                            \
59471 +    if (((swPortIndex) >= FM_PCD_PORT_OH_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_1G_RX_BASE_INDX))           \
59472 +        hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_OH_BASE_INDX+BASE_OH_PORTID);                      \
59473 +    else if (((swPortIndex) >= FM_PCD_PORT_1G_RX_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_10G_RX_BASE_INDX))  \
59474 +        hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_1G_RX_BASE_INDX+BASE_1G_RX_PORTID);                \
59475 +    else if (((swPortIndex) >= FM_PCD_PORT_10G_RX_BASE_INDX) && ((swPortIndex) < FM_MAX_NUM_OF_PORTS))          \
59476 +        hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_10G_RX_BASE_INDX+BASE_10G_RX_PORTID);              \
59477 +    else if (((swPortIndex) >= FM_PCD_PORT_1G_TX_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_10G_TX_BASE_INDX))  \
59478 +        hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_1G_TX_BASE_INDX+BASE_1G_TX_PORTID);                \
59479 +    else if (((swPortIndex) >= FM_PCD_PORT_10G_TX_BASE_INDX) && ((swPortIndex) < FM_MAX_NUM_OF_PORTS))          \
59480 +        hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_10G_TX_BASE_INDX+BASE_10G_TX_PORTID);              \
59481 +    else ASSERT_COND(FALSE);                                                                                    \
59482 +} while (0)
59483 +
59484 +#define BMI_MAX_FIFO_SIZE                   (FM_MURAM_SIZE)
59485 +#define BMI_FIFO_UNITS                      0x100
59486 +
59487 +typedef struct {
59488 +    void        (*f_Isr) (t_Handle h_Arg);
59489 +    t_Handle    h_SrcHandle;
59490 +    uint8_t     guestId;
59491 +} t_FmIntrSrc;
59492 +
59493 +#define ILLEGAL_HDR_NUM                     0xFF
59494 +#define NO_HDR_NUM                          FM_PCD_PRS_NUM_OF_HDRS
59495 +
59496 +#define IS_PRIVATE_HEADER(hdr)              (((hdr) == HEADER_TYPE_USER_DEFINED_SHIM1) ||   \
59497 +                                             ((hdr) == HEADER_TYPE_USER_DEFINED_SHIM2))
59498 +#define IS_SPECIAL_HEADER(hdr)              ((hdr) == HEADER_TYPE_MACSEC)
59499 +
59500 +static __inline__ uint8_t GetPrsHdrNum(e_NetHeaderType hdr)
59501 +{
59502 +        switch (hdr)
59503 +        {   case (HEADER_TYPE_ETH):              return 0;
59504 +            case (HEADER_TYPE_LLC_SNAP):         return 1;
59505 +            case (HEADER_TYPE_VLAN):             return 2;
59506 +            case (HEADER_TYPE_PPPoE):            return 3;
59507 +            case (HEADER_TYPE_PPP):              return 3;
59508 +            case (HEADER_TYPE_MPLS):             return 4;
59509 +            case (HEADER_TYPE_IPv4):             return 5;
59510 +            case (HEADER_TYPE_IPv6):             return 6;
59511 +            case (HEADER_TYPE_GRE):              return 7;
59512 +            case (HEADER_TYPE_MINENCAP):         return 8;
59513 +            case (HEADER_TYPE_USER_DEFINED_L3):  return 9;
59514 +            case (HEADER_TYPE_TCP):              return 10;
59515 +            case (HEADER_TYPE_UDP):              return 11;
59516 +            case (HEADER_TYPE_IPSEC_AH):
59517 +            case (HEADER_TYPE_IPSEC_ESP):        return 12;
59518 +            case (HEADER_TYPE_SCTP):             return 13;
59519 +            case (HEADER_TYPE_DCCP):             return 14;
59520 +            case (HEADER_TYPE_USER_DEFINED_L4):  return 15;
59521 +            case (HEADER_TYPE_USER_DEFINED_SHIM1):
59522 +            case (HEADER_TYPE_USER_DEFINED_SHIM2):
59523 +            case (HEADER_TYPE_MACSEC):           return NO_HDR_NUM;
59524 +            default:
59525 +                return ILLEGAL_HDR_NUM;
59526 +        }
59527 +}
59528 +
59529 +#define FM_PCD_MAX_NUM_OF_OPTIONS(clsPlanEntries)   ((clsPlanEntries==256)? 8:((clsPlanEntries==128)? 7: ((clsPlanEntries==64)? 6: ((clsPlanEntries==32)? 5:0))))
59530 +
59531 +
59532 +/**************************************************************************//**
59533 + @Description   A structure for initializing a keygen classification plan group
59534 +*//***************************************************************************/
59535 +typedef struct t_FmPcdKgInterModuleClsPlanGrpParams {
59536 +    uint8_t         netEnvId;   /* IN */
59537 +    bool            grpExists;  /* OUT (unused in FmPcdKgBuildClsPlanGrp)*/
59538 +    uint8_t         clsPlanGrpId;  /* OUT */
59539 +    bool            emptyClsPlanGrp; /* OUT */
59540 +    uint8_t         numOfOptions;   /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/
59541 +    protocolOpt_t   options[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
59542 +                                    /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/
59543 +    uint32_t        optVectors[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
59544 +                               /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/
59545 +} t_FmPcdKgInterModuleClsPlanGrpParams;
59546 +
59547 +typedef struct t_FmPcdLock {
59548 +    t_Handle        h_Spinlock;
59549 +    volatile bool   flag;
59550 +    t_List          node;
59551 +} t_FmPcdLock;
59552 +#define FM_PCD_LOCK_OBJ(ptr)  LIST_OBJECT(ptr, t_FmPcdLock, node)
59553 +
59554 +
59555 +typedef t_Error (t_FmPortGetSetCcParamsCallback) (t_Handle                  h_FmPort,
59556 +                                                  t_FmPortGetSetCcParams    *p_FmPortGetSetCcParams);
59557 +
59558 +
59559 +/***********************************************************************/
59560 +/*          Common API for FM-PCD module                               */
59561 +/***********************************************************************/
59562 +t_Handle    FmPcdGetHcHandle(t_Handle h_FmPcd);
59563 +uint32_t    FmPcdGetSwPrsOffset(t_Handle h_FmPcd, e_NetHeaderType hdr, uint8_t  indexPerHdr);
59564 +uint32_t    FmPcdGetLcv(t_Handle h_FmPcd, uint32_t netEnvId, uint8_t hdrNum);
59565 +uint32_t    FmPcdGetMacsecLcv(t_Handle h_FmPcd, uint32_t netEnvId);
59566 +void        FmPcdIncNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId);
59567 +void        FmPcdDecNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId);
59568 +uint8_t     FmPcdGetNetEnvId(t_Handle h_NetEnv);
59569 +void        FmPcdPortRegister(t_Handle h_FmPcd, t_Handle h_FmPort, uint8_t hardwarePortId);
59570 +uint32_t    FmPcdLock(t_Handle h_FmPcd);
59571 +void        FmPcdUnlock(t_Handle h_FmPcd, uint32_t  intFlags);
59572 +bool        FmPcdNetEnvIsHdrExist(t_Handle h_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
59573 +t_Error     FmPcdFragHcScratchPoolInit(t_Handle h_FmPcd, uint8_t scratchBpid);
59574 +t_Error     FmPcdRegisterReassmPort(t_Handle h_FmPcd, t_Handle h_IpReasmCommonPramTbl);
59575 +t_Error     FmPcdUnregisterReassmPort(t_Handle h_FmPcd, t_Handle h_IpReasmCommonPramTbl);
59576 +bool        FmPcdIsAdvancedOffloadSupported(t_Handle h_FmPcd);
59577 +bool        FmPcdLockTryLockAll(t_Handle h_FmPcd);
59578 +void        FmPcdLockUnlockAll(t_Handle h_FmPcd);
59579 +t_Error     FmPcdHcSync(t_Handle h_FmPcd);
59580 +t_Handle    FmGetPcd(t_Handle h_Fm);
59581 +/***********************************************************************/
59582 +/*          Common API for FM-PCD KG module                            */
59583 +/***********************************************************************/
59584 +uint8_t     FmPcdKgGetClsPlanGrpBase(t_Handle h_FmPcd, uint8_t clsPlanGrp);
59585 +uint16_t    FmPcdKgGetClsPlanGrpSize(t_Handle h_FmPcd, uint8_t clsPlanGrp);
59586 +t_Error     FmPcdKgBuildClsPlanGrp(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_Grp, t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet);
59587 +
59588 +uint8_t     FmPcdKgGetSchemeId(t_Handle h_Scheme);
59589 +#if (DPAA_VERSION >= 11)
59590 +bool        FmPcdKgGetVspe(t_Handle h_Scheme);
59591 +#endif /* (DPAA_VERSION >= 11) */
59592 +uint8_t     FmPcdKgGetRelativeSchemeId(t_Handle h_FmPcd, uint8_t schemeId);
59593 +void        FmPcdKgDestroyClsPlanGrp(t_Handle h_FmPcd, uint8_t grpId);
59594 +t_Error     FmPcdKgCheckInvalidateSchemeSw(t_Handle h_Scheme);
59595 +t_Error     FmPcdKgBuildBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_BindPortToSchemes, uint32_t *p_SpReg, bool add);
59596 +bool        FmPcdKgHwSchemeIsValid(uint32_t schemeModeReg);
59597 +uint32_t    FmPcdKgBuildWriteSchemeActionReg(uint8_t schemeId, bool updateCounter);
59598 +uint32_t    FmPcdKgBuildReadSchemeActionReg(uint8_t schemeId);
59599 +uint32_t    FmPcdKgBuildWriteClsPlanBlockActionReg(uint8_t grpId);
59600 +uint32_t    FmPcdKgBuildWritePortSchemeBindActionReg(uint8_t hardwarePortId);
59601 +uint32_t    FmPcdKgBuildReadPortSchemeBindActionReg(uint8_t hardwarePortId);
59602 +uint32_t    FmPcdKgBuildWritePortClsPlanBindActionReg(uint8_t hardwarePortId);
59603 +bool        FmPcdKgIsSchemeValidSw(t_Handle h_Scheme);
59604 +
59605 +t_Error     FmPcdKgBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes  *p_SchemeBind);
59606 +t_Error     FmPcdKgUnbindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind);
59607 +uint32_t    FmPcdKgGetRequiredAction(t_Handle h_FmPcd, uint8_t schemeId);
59608 +uint32_t    FmPcdKgGetRequiredActionFlag(t_Handle h_FmPcd, uint8_t schemeId);
59609 +e_FmPcdDoneAction FmPcdKgGetDoneAction(t_Handle h_FmPcd, uint8_t schemeId);
59610 +e_FmPcdEngine FmPcdKgGetNextEngine(t_Handle h_FmPcd, uint8_t schemeId);
59611 +void        FmPcdKgUpdateRequiredAction(t_Handle h_Scheme, uint32_t requiredAction);
59612 +bool        FmPcdKgIsDirectPlcr(t_Handle h_FmPcd, uint8_t schemeId);
59613 +bool        FmPcdKgIsDistrOnPlcrProfile(t_Handle h_FmPcd, uint8_t schemeId);
59614 +uint16_t    FmPcdKgGetRelativeProfileId(t_Handle h_FmPcd, uint8_t schemeId);
59615 +t_Handle    FmPcdKgGetSchemeHandle(t_Handle h_FmPcd, uint8_t relativeSchemeId);
59616 +bool        FmPcdKgIsSchemeHasOwners(t_Handle h_Scheme);
59617 +t_Error     FmPcdKgCcGetSetParams(t_Handle h_FmPcd, t_Handle  h_Scheme, uint32_t requiredAction, uint32_t value);
59618 +t_Error     FmPcdKgSetOrBindToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t netEnvId, protocolOpt_t *p_OptArray, uint8_t *p_ClsPlanGrpId, bool *p_IsEmptyClsPlanGrp);
59619 +t_Error     FmPcdKgDeleteOrUnbindPortToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId);
59620 +
59621 +/***********************************************************************/
59622 +/*          Common API for FM-PCD parser module                        */
59623 +/***********************************************************************/
59624 +t_Error     FmPcdPrsIncludePortInStatistics(t_Handle p_FmPcd, uint8_t hardwarePortId,  bool include);
59625 +
59626 +/***********************************************************************/
59627 +/*          Common API for FM-PCD policer module                       */
59628 +/***********************************************************************/
59629 +t_Error     FmPcdPlcrAllocProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId, uint16_t numOfProfiles);
59630 +t_Error     FmPcdPlcrFreeProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId);
59631 +bool        FmPcdPlcrIsProfileValid(t_Handle h_FmPcd, uint16_t absoluteProfileId);
59632 +uint16_t    FmPcdPlcrGetPortProfilesBase(t_Handle h_FmPcd, uint8_t hardwarePortId);
59633 +uint16_t    FmPcdPlcrGetPortNumOfProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId);
59634 +uint32_t    FmPcdPlcrBuildWritePlcrActionRegs(uint16_t absoluteProfileId);
59635 +uint32_t    FmPcdPlcrBuildCounterProfileReg(e_FmPcdPlcrProfileCounters counter);
59636 +uint32_t    FmPcdPlcrBuildWritePlcrActionReg(uint16_t absoluteProfileId);
59637 +uint32_t    FmPcdPlcrBuildReadPlcrActionReg(uint16_t absoluteProfileId);
59638 +uint16_t    FmPcdPlcrProfileGetAbsoluteId(t_Handle h_Profile);
59639 +t_Error     FmPcdPlcrGetAbsoluteIdByProfileParams(t_Handle                      h_FmPcd,
59640 +                                          e_FmPcdProfileTypeSelection   profileType,
59641 +                                          t_Handle                      h_FmPort,
59642 +                                          uint16_t                      relativeProfile,
59643 +                                          uint16_t                      *p_AbsoluteId);
59644 +void        FmPcdPlcrInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
59645 +void        FmPcdPlcrValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
59646 +bool        FmPcdPlcrHwProfileIsValid(uint32_t profileModeReg);
59647 +uint32_t    FmPcdPlcrGetRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId);
59648 +uint32_t    FmPcdPlcrGetRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId);
59649 +uint32_t    FmPcdPlcrBuildNiaProfileReg(bool green, bool yellow, bool red);
59650 +void        FmPcdPlcrUpdateRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId, uint32_t requiredAction);
59651 +t_Error     FmPcdPlcrCcGetSetParams(t_Handle h_FmPcd, uint16_t profileIndx,uint32_t requiredAction);
59652 +
59653 +/***********************************************************************/
59654 +/*          Common API for FM-PCD CC module                            */
59655 +/***********************************************************************/
59656 +uint8_t     FmPcdCcGetParseCode(t_Handle h_CcNode);
59657 +uint8_t     FmPcdCcGetOffset(t_Handle h_CcNode);
59658 +t_Error     FmPcdCcRemoveKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex);
59659 +t_Error     FmPcdCcAddKey(t_Handle h_FmPcd, t_Handle h_CcNode, uint16_t keyIndex, uint8_t keySize, t_FmPcdCcKeyParams *p_FmPCdCcKeyParams);
59660 +t_Error     FmPcdCcModifyKey(t_Handle h_FmPcd, t_Handle h_CcNode, uint16_t keyIndex, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask);
59661 +t_Error     FmPcdCcModifyKeyAndNextEngine(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex, uint8_t keySize, t_FmPcdCcKeyParams *p_FmPcdCcKeyParams);
59662 +t_Error     FmPcdCcModifyMissNextEngineParamNode(t_Handle h_FmPcd,t_Handle h_FmPcdCcNode, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
59663 +t_Error     FmPcdCcModifyNextEngineParamTree(t_Handle h_FmPcd, t_Handle h_FmPcdCcTree, uint8_t grpId, uint8_t index, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
59664 +uint32_t    FmPcdCcGetNodeAddrOffsetFromNodeInfo(t_Handle h_FmPcd, t_Handle h_Pointer);
59665 +t_Handle    FmPcdCcTreeGetSavedManipParams(t_Handle h_FmTree);
59666 +void        FmPcdCcTreeSetSavedManipParams(t_Handle h_FmTree, t_Handle h_SavedManipParams);
59667 +t_Error     FmPcdCcTreeAddIPR(t_Handle h_FmPcd, t_Handle h_FmTree, t_Handle h_NetEnv, t_Handle h_ReassemblyManip, bool schemes);
59668 +t_Error     FmPcdCcTreeAddCPR(t_Handle h_FmPcd, t_Handle h_FmTree, t_Handle h_NetEnv, t_Handle h_ReassemblyManip, bool schemes);
59669 +t_Error     FmPcdCcBindTree(t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_CcTree,  uint32_t  *p_Offset,t_Handle h_FmPort);
59670 +t_Error     FmPcdCcUnbindTree(t_Handle h_FmPcd, t_Handle h_CcTree);
59671 +
59672 +/***********************************************************************/
59673 +/*          Common API for FM-PCD Manip module                            */
59674 +/***********************************************************************/
59675 +t_Error     FmPcdManipUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_FmPort, t_Handle h_Manip, t_Handle h_Ad, bool validate, int level, t_Handle h_FmTree, bool modify);
59676 +
59677 +/***********************************************************************/
59678 +/*          Common API for FM-Port module                            */
59679 +/***********************************************************************/
59680 +#if (DPAA_VERSION >= 11)
59681 +typedef enum e_FmPortGprFuncType
59682 +{
59683 +    e_FM_PORT_GPR_EMPTY = 0,
59684 +    e_FM_PORT_GPR_MURAM_PAGE
59685 +} e_FmPortGprFuncType;
59686 +
59687 +t_Error     FmPortSetGprFunc(t_Handle h_FmPort, e_FmPortGprFuncType gprFunc, void **p_Value);
59688 +#endif /* DPAA_VERSION >= 11) */
59689 +t_Error     FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_FmGetSetParams);
59690 +t_Error     FmPortGetSetCcParams(t_Handle h_FmPort, t_FmPortGetSetCcParams *p_FmPortGetSetCcParams);
59691 +uint8_t     FmPortGetNetEnvId(t_Handle h_FmPort);
59692 +uint8_t     FmPortGetHardwarePortId(t_Handle h_FmPort);
59693 +uint32_t    FmPortGetPcdEngines(t_Handle h_FmPort);
59694 +void        FmPortPcdKgSwUnbindClsPlanGrp (t_Handle h_FmPort);
59695 +
59696 +
59697 +#if (DPAA_VERSION >= 11)
59698 +t_Error     FmPcdFrmReplicUpdate(t_Handle h_FmPcd, t_Handle h_FmPort, t_Handle h_FrmReplic);
59699 +#endif /* (DPAA_VERSION >= 11) */
59700 +
59701 +/**************************************************************************//**
59702 + @Function      FmRegisterIntr
59703 +
59704 + @Description   Used to register an inter-module event handler to be processed by FM
59705 +
59706 + @Param[in]     h_Fm            A handle to an FM Module.
59707 + @Param[in]     mod             The module that causes the event
59708 + @Param[in]     modId           Module id - if more than 1 instansiation of this
59709 +                                mode exists,0 otherwise.
59710 + @Param[in]     intrType        Interrupt type (error/normal) selection.
59711 + @Param[in]     f_Isr           The interrupt service routine.
59712 + @Param[in]     h_Arg           Argument to be passed to f_Isr.
59713 +
59714 + @Return        None.
59715 +*//***************************************************************************/
59716 +void FmRegisterIntr(t_Handle               h_Fm,
59717 +                    e_FmEventModules       mod,
59718 +                    uint8_t                modId,
59719 +                    e_FmIntrType           intrType,
59720 +                    void                   (*f_Isr) (t_Handle h_Arg),
59721 +                    t_Handle               h_Arg);
59722 +
59723 +/**************************************************************************//**
59724 + @Function      FmUnregisterIntr
59725 +
59726 + @Description   Used to un-register an inter-module event handler that was processed by FM
59727 +
59728 + @Param[in]     h_Fm            A handle to an FM Module.
59729 + @Param[in]     mod             The module that causes the event
59730 + @Param[in]     modId           Module id - if more than 1 instansiation of this
59731 +                                mode exists,0 otherwise.
59732 + @Param[in]     intrType        Interrupt type (error/normal) selection.
59733 +
59734 + @Return        None.
59735 +*//***************************************************************************/
59736 +void FmUnregisterIntr(t_Handle          h_Fm,
59737 +                      e_FmEventModules  mod,
59738 +                      uint8_t           modId,
59739 +                      e_FmIntrType      intrType);
59740 +
59741 +/**************************************************************************//**
59742 + @Function      FmRegisterFmCtlIntr
59743 +
59744 + @Description   Used to register to one of the fmCtl events in the FM module
59745 +
59746 + @Param[in]     h_Fm            A handle to an FM Module.
59747 + @Param[in]     eventRegId      FmCtl event id (0-7).
59748 + @Param[in]     f_Isr           The interrupt service routine.
59749 +
59750 + @Return        E_OK on success; Error code otherwise.
59751 +
59752 + @Cautions      Allowed only following FM_Init().
59753 +*//***************************************************************************/
59754 +void  FmRegisterFmCtlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Fm, uint32_t event));
59755 +
59756 +
59757 +/**************************************************************************//**
59758 + @Description   enum for defining MAC types
59759 +*//***************************************************************************/
59760 +typedef enum e_FmMacType {
59761 +    e_FM_MAC_10G = 0,               /**< 10G MAC */
59762 +    e_FM_MAC_1G                     /**< 1G MAC */
59763 +} e_FmMacType;
59764 +
59765 +/**************************************************************************//**
59766 + @Description   Structure for port-FM communication during FM_PORT_Init.
59767 +                Fields commented 'IN' are passed by the port module to be used
59768 +                by the FM module.
59769 +                Fields commented 'OUT' will be filled by FM before returning to port.
59770 +                Some fields are optional (depending on configuration) and
59771 +                will be analized by the port and FM modules accordingly.
59772 +*//***************************************************************************/
59773 +typedef struct t_FmInterModulePortInitParams {
59774 +    uint8_t             hardwarePortId;     /**< IN. port Id */
59775 +    e_FmPortType        portType;           /**< IN. Port type */
59776 +    bool                independentMode;    /**< IN. TRUE if FM Port operates in independent mode */
59777 +    uint16_t            liodnOffset;        /**< IN. Port's requested resource */
59778 +    uint8_t             numOfTasks;         /**< IN. Port's requested resource */
59779 +    uint8_t             numOfExtraTasks;    /**< IN. Port's requested resource */
59780 +    uint8_t             numOfOpenDmas;      /**< IN. Port's requested resource */
59781 +    uint8_t             numOfExtraOpenDmas; /**< IN. Port's requested resource */
59782 +    uint32_t            sizeOfFifo;         /**< IN. Port's requested resource */
59783 +    uint32_t            extraSizeOfFifo;    /**< IN. Port's requested resource */
59784 +    uint8_t             deqPipelineDepth;   /**< IN. Port's requested resource */
59785 +    uint16_t            maxFrameLength;     /**< IN. Port's max frame length. */
59786 +    uint16_t            liodnBase;          /**< IN. Irrelevant for P4080 rev 1.
59787 +                                                 LIODN base for this port, to be
59788 +                                                 used together with LIODN offset. */
59789 +    t_FmPhysAddr        fmMuramPhysBaseAddr;/**< OUT. FM-MURAM physical address*/
59790 +} t_FmInterModulePortInitParams;
59791 +
59792 +/**************************************************************************//**
59793 + @Description   Structure for port-FM communication during FM_PORT_Free.
59794 +*//***************************************************************************/
59795 +typedef struct t_FmInterModulePortFreeParams {
59796 +    uint8_t             hardwarePortId;     /**< IN. port Id */
59797 +    e_FmPortType        portType;           /**< IN. Port type */
59798 +    uint8_t             deqPipelineDepth;   /**< IN. Port's requested resource */
59799 +} t_FmInterModulePortFreeParams;
59800 +
59801 +/**************************************************************************//**
59802 + @Function      FmGetPcdPrsBaseAddr
59803 +
59804 + @Description   Get the base address of the Parser from the FM module
59805 +
59806 + @Param[in]     h_Fm            A handle to an FM Module.
59807 +
59808 + @Return        Base address.
59809 +*//***************************************************************************/
59810 +uintptr_t FmGetPcdPrsBaseAddr(t_Handle h_Fm);
59811 +
59812 +/**************************************************************************//**
59813 + @Function      FmGetPcdKgBaseAddr
59814 +
59815 + @Description   Get the base address of the Keygen from the FM module
59816 +
59817 + @Param[in]     h_Fm            A handle to an FM Module.
59818 +
59819 + @Return        Base address.
59820 +*//***************************************************************************/
59821 +uintptr_t FmGetPcdKgBaseAddr(t_Handle h_Fm);
59822 +
59823 +/**************************************************************************//**
59824 + @Function      FmGetPcdPlcrBaseAddr
59825 +
59826 + @Description   Get the base address of the Policer from the FM module
59827 +
59828 + @Param[in]     h_Fm            A handle to an FM Module.
59829 +
59830 + @Return        Base address.
59831 +*//***************************************************************************/
59832 +uintptr_t FmGetPcdPlcrBaseAddr(t_Handle h_Fm);
59833 +
59834 +/**************************************************************************//**
59835 + @Function      FmGetMuramHandle
59836 +
59837 + @Description   Get the handle of the MURAM from the FM module
59838 +
59839 + @Param[in]     h_Fm            A handle to an FM Module.
59840 +
59841 + @Return        MURAM module handle.
59842 +*//***************************************************************************/
59843 +t_Handle FmGetMuramHandle(t_Handle h_Fm);
59844 +
59845 +/**************************************************************************//**
59846 + @Function      FmGetPhysicalMuramBase
59847 +
59848 + @Description   Get the physical base address of the MURAM from the FM module
59849 +
59850 + @Param[in]     h_Fm            A handle to an FM Module.
59851 + @Param[in]     fmPhysAddr      Physical MURAM base
59852 +
59853 + @Return        Physical base address.
59854 +*//***************************************************************************/
59855 +void FmGetPhysicalMuramBase(t_Handle h_Fm, t_FmPhysAddr *fmPhysAddr);
59856 +
59857 +/**************************************************************************//**
59858 + @Function      FmGetTimeStampScale
59859 +
59860 + @Description   Used internally by other modules in order to get the timeStamp
59861 +                period as requested by the application.
59862 +
59863 +                This function returns bit number that is incremented every 1 usec.
59864 +                To calculate timestamp period in nsec, use
59865 +                1000 / (1 << FmGetTimeStampScale()).
59866 +
59867 + @Param[in]     h_Fm                    A handle to an FM Module.
59868 +
59869 + @Return        Bit that counts 1 usec.
59870 +
59871 + @Cautions      Allowed only following FM_Init().
59872 +*//***************************************************************************/
59873 +uint32_t FmGetTimeStampScale(t_Handle h_Fm);
59874 +
59875 +/**************************************************************************//**
59876 + @Function      FmResumeStalledPort
59877 +
59878 + @Description   Used internally by FM port to release a stalled port.
59879 +
59880 + @Param[in]     h_Fm                            A handle to an FM Module.
59881 + @Param[in]     hardwarePortId                    HW port id.
59882 +
59883 + @Return        E_OK on success; Error code otherwise.
59884 +
59885 + @Cautions      Allowed only following FM_Init().
59886 +*//***************************************************************************/
59887 +t_Error FmResumeStalledPort(t_Handle h_Fm, uint8_t hardwarePortId);
59888 +
59889 +/**************************************************************************//**
59890 + @Function      FmIsPortStalled
59891 +
59892 + @Description   Used internally by FM port to read the port's status.
59893 +
59894 + @Param[in]     h_Fm                            A handle to an FM Module.
59895 + @Param[in]     hardwarePortId                  HW port id.
59896 + @Param[in]     p_IsStalled                     A pointer to the boolean port stalled state
59897 +
59898 + @Return        E_OK on success; Error code otherwise.
59899 +
59900 + @Cautions      Allowed only following FM_Init().
59901 +*//***************************************************************************/
59902 +t_Error FmIsPortStalled(t_Handle h_Fm, uint8_t hardwarePortId, bool *p_IsStalled);
59903 +
59904 +/**************************************************************************//**
59905 + @Function      FmResetMac
59906 +
59907 + @Description   Used by MAC driver to reset the MAC registers
59908 +
59909 + @Param[in]     h_Fm            A handle to an FM Module.
59910 + @Param[in]     type            MAC type.
59911 + @Param[in]     macId           MAC id - according to type.
59912 +
59913 + @Return        E_OK on success; Error code otherwise.
59914 +
59915 + @Cautions      Allowed only following FM_Init().
59916 +*//***************************************************************************/
59917 +t_Error FmResetMac(t_Handle h_Fm, e_FmMacType type, uint8_t macId);
59918 +
59919 +/**************************************************************************//**
59920 + @Function      FmGetClockFreq
59921 +
59922 + @Description   Used by MAC driver to get the FM clock frequency
59923 +
59924 + @Param[in]     h_Fm            A handle to an FM Module.
59925 +
59926 + @Return        clock-freq on success; 0 otherwise.
59927 +
59928 + @Cautions      Allowed only following FM_Init().
59929 +*//***************************************************************************/
59930 +uint16_t FmGetClockFreq(t_Handle h_Fm);
59931 +
59932 +/**************************************************************************//**
59933 + @Function      FmGetMacClockFreq
59934 +
59935 + @Description   Used by MAC driver to get the MAC clock frequency
59936 +
59937 + @Param[in]     h_Fm            A handle to an FM Module.
59938 +
59939 + @Return        clock-freq on success; 0 otherwise.
59940 +
59941 + @Cautions      Allowed only following FM_Init().
59942 +*//***************************************************************************/
59943 +uint16_t FmGetMacClockFreq(t_Handle h_Fm);
59944 +
59945 +/**************************************************************************//**
59946 + @Function      FmGetId
59947 +
59948 + @Description   Used by PCD driver to read rhe FM id
59949 +
59950 + @Param[in]     h_Fm            A handle to an FM Module.
59951 +
59952 + @Return        E_OK on success; Error code otherwise.
59953 +
59954 + @Cautions      Allowed only following FM_Init().
59955 +*//***************************************************************************/
59956 +uint8_t FmGetId(t_Handle h_Fm);
59957 +
59958 +/**************************************************************************//**
59959 + @Function      FmReset
59960 +
59961 + @Description   Used to reset the FM
59962 +
59963 + @Param[in]     h_Fm            A handle to an FM Module.
59964 +
59965 + @Return        E_OK on success; Error code otherwise.
59966 +*//***************************************************************************/
59967 +t_Error FmReset(t_Handle h_Fm);
59968 +
59969 +/**************************************************************************//**
59970 + @Function      FmGetSetPortParams
59971 +
59972 + @Description   Used by FM-PORT driver to pass and receive parameters between
59973 +                PORT and FM modules.
59974 +
59975 + @Param[in]     h_Fm            A handle to an FM Module.
59976 + @Param[in,out] p_PortParams    A structure of FM Port parameters.
59977 +
59978 + @Return        E_OK on success; Error code otherwise.
59979 +
59980 + @Cautions      Allowed only following FM_Init().
59981 +*//***************************************************************************/
59982 +t_Error FmGetSetPortParams(t_Handle h_Fm,t_FmInterModulePortInitParams *p_PortParams);
59983 +
59984 +/**************************************************************************//**
59985 + @Function      FmFreePortParams
59986 +
59987 + @Description   Used by FM-PORT driver to free port's resources within the FM.
59988 +
59989 + @Param[in]     h_Fm            A handle to an FM Module.
59990 + @Param[in,out] p_PortParams    A structure of FM Port parameters.
59991 +
59992 + @Return        None.
59993 +
59994 + @Cautions      Allowed only following FM_Init().
59995 +*//***************************************************************************/
59996 +void FmFreePortParams(t_Handle h_Fm,t_FmInterModulePortFreeParams *p_PortParams);
59997 +
59998 +/**************************************************************************//**
59999 + @Function      FmSetNumOfRiscsPerPort
60000 +
60001 + @Description   Used by FM-PORT driver to pass parameter between
60002 +                PORT and FM modules for working with number of RISC..
60003 +
60004 + @Param[in]     h_Fm            A handle to an FM Module.
60005 + @Param[in]     hardwarePortId    hardware port Id.
60006 + @Param[in]     numOfFmanCtrls    number of Fman Controllers.
60007 + @Param[in]     orFmanCtrl        Fman Controller for order restoration.
60008 +
60009 + @Return        None.
60010 +
60011 + @Cautions      Allowed only following FM_Init().
60012 +*//***************************************************************************/
60013 +t_Error FmSetNumOfRiscsPerPort(t_Handle h_Fm, uint8_t hardwarePortId, uint8_t numOfFmanCtrls, t_FmFmanCtrl orFmanCtrl);
60014 +
60015 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
60016 +/**************************************************************************//*
60017 + @Function      FmDumpPortRegs
60018 +
60019 + @Description   Dumps FM port registers which are part of FM common registers
60020 +
60021 + @Param[in]     h_Fm            A handle to an FM Module.
60022 + @Param[in]     hardwarePortId    HW port id.
60023 +
60024 + @Return        E_OK on success; Error code otherwise.
60025 +
60026 + @Cautions      Allowed only FM_Init().
60027 +*//***************************************************************************/
60028 +t_Error FmDumpPortRegs(t_Handle h_Fm,uint8_t hardwarePortId);
60029 +#endif /* (defined(DEBUG_ERRORS) && ... */
60030 +
60031 +void        FmRegisterPcd(t_Handle h_Fm, t_Handle h_FmPcd);
60032 +void        FmUnregisterPcd(t_Handle h_Fm);
60033 +t_Handle    FmGetPcdHandle(t_Handle h_Fm);
60034 +t_Error     FmEnableRamsEcc(t_Handle h_Fm);
60035 +t_Error     FmDisableRamsEcc(t_Handle h_Fm);
60036 +void        FmGetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo);
60037 +t_Error     FmAllocFmanCtrlEventReg(t_Handle h_Fm, uint8_t *p_EventId);
60038 +void        FmFreeFmanCtrlEventReg(t_Handle h_Fm, uint8_t eventId);
60039 +void        FmSetFmanCtrlIntr(t_Handle h_Fm, uint8_t   eventRegId, uint32_t enableEvents);
60040 +uint32_t    FmGetFmanCtrlIntr(t_Handle h_Fm, uint8_t   eventRegId);
60041 +void        FmRegisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Fm, uint32_t event), t_Handle    h_Arg);
60042 +void        FmUnregisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId);
60043 +t_Error     FmSetMacMaxFrame(t_Handle h_Fm, e_FmMacType type, uint8_t macId, uint16_t mtu);
60044 +bool        FmIsMaster(t_Handle h_Fm);
60045 +uint8_t     FmGetGuestId(t_Handle h_Fm);
60046 +uint16_t    FmGetTnumAgingPeriod(t_Handle h_Fm);
60047 +t_Error     FmSetPortPreFetchConfiguration(t_Handle h_Fm, uint8_t portNum, bool preFetchConfigured);
60048 +t_Error     FmGetPortPreFetchConfiguration(t_Handle h_Fm, uint8_t portNum, bool *p_PortConfigured, bool *p_PreFetchConfigured);
60049 +
60050 +
60051 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
60052 +t_Error     Fm10GTxEccWorkaround(t_Handle h_Fm, uint8_t macId);
60053 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
60054 +
60055 +void        FmMuramClear(t_Handle h_FmMuram);
60056 +t_Error     FmSetNumOfOpenDmas(t_Handle h_Fm,
60057 +                               uint8_t  hardwarePortId,
60058 +                               uint8_t  *p_NumOfOpenDmas,
60059 +                               uint8_t  *p_NumOfExtraOpenDmas,
60060 +                               bool     initialConfig);
60061 +t_Error     FmSetNumOfTasks(t_Handle    h_Fm,
60062 +                            uint8_t     hardwarePortId,
60063 +                            uint8_t     *p_NumOfTasks,
60064 +                            uint8_t     *p_NumOfExtraTasks,
60065 +                            bool        initialConfig);
60066 +t_Error     FmSetSizeOfFifo(t_Handle    h_Fm,
60067 +                            uint8_t     hardwarePortId,
60068 +                            uint32_t    *p_SizeOfFifo,
60069 +                            uint32_t    *p_ExtraSizeOfFifo,
60070 +                            bool        initialConfig);
60071 +
60072 +t_Error     FmSetCongestionGroupPFCpriority(t_Handle    h_Fm,
60073 +                                            uint32_t    congestionGroupId,
60074 +                                            uint8_t     priorityBitMap);
60075 +
60076 +#if (DPAA_VERSION >= 11)
60077 +t_Error     FmVSPAllocForPort(t_Handle         h_Fm,
60078 +                              e_FmPortType     portType,
60079 +                              uint8_t          portId,
60080 +                              uint8_t          numOfStorageProfiles);
60081 +
60082 +t_Error     FmVSPFreeForPort(t_Handle        h_Fm,
60083 +                             e_FmPortType    portType,
60084 +                             uint8_t         portId);
60085 +
60086 +t_Error     FmVSPGetAbsoluteProfileId(t_Handle      h_Fm,
60087 +                                      e_FmPortType  portType,
60088 +                                      uint8_t       portId,
60089 +                                      uint16_t      relativeProfile,
60090 +                                      uint16_t      *p_AbsoluteId);
60091 +t_Error FmVSPCheckRelativeProfile(t_Handle        h_Fm,
60092 +                                  e_FmPortType    portType,
60093 +                                  uint8_t         portId,
60094 +                                  uint16_t        relativeProfile);
60095 +
60096 +uintptr_t   FmGetVSPBaseAddr(t_Handle h_Fm);
60097 +#endif /* (DPAA_VERSION >= 11) */
60098 +
60099 +
60100 +#endif /* __FM_COMMON_H */
60101 --- /dev/null
60102 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_hc.h
60103 @@ -0,0 +1,93 @@
60104 +/*
60105 + * Copyright 2008-2012 Freescale Semiconductor Inc.
60106 + *
60107 + * Redistribution and use in source and binary forms, with or without
60108 + * modification, are permitted provided that the following conditions are met:
60109 + *     * Redistributions of source code must retain the above copyright
60110 + *       notice, this list of conditions and the following disclaimer.
60111 + *     * Redistributions in binary form must reproduce the above copyright
60112 + *       notice, this list of conditions and the following disclaimer in the
60113 + *       documentation and/or other materials provided with the distribution.
60114 + *     * Neither the name of Freescale Semiconductor nor the
60115 + *       names of its contributors may be used to endorse or promote products
60116 + *       derived from this software without specific prior written permission.
60117 + *
60118 + *
60119 + * ALTERNATIVELY, this software may be distributed under the terms of the
60120 + * GNU General Public License ("GPL") as published by the Free Software
60121 + * Foundation, either version 2 of that License or (at your option) any
60122 + * later version.
60123 + *
60124 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
60125 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60126 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60127 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
60128 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
60129 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60130 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
60131 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60132 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
60133 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60134 + */
60135 +
60136 +
60137 +#ifndef __FM_HC_H
60138 +#define __FM_HC_H
60139 +
60140 +#include "std_ext.h"
60141 +#include "error_ext.h"
60142 +#include "fsl_fman_kg.h"
60143 +
60144 +#define __ERR_MODULE__  MODULE_FM_PCD
60145 +
60146 +
60147 +typedef struct t_FmHcParams {
60148 +    t_Handle        h_Fm;
60149 +    t_Handle        h_FmPcd;
60150 +    t_FmPcdHcParams params;
60151 +} t_FmHcParams;
60152 +
60153 +
60154 +t_Handle    FmHcConfigAndInit(t_FmHcParams *p_FmHcParams);
60155 +void        FmHcFree(t_Handle h_FmHc);
60156 +t_Error     FmHcSetFramesDataMemory(t_Handle h_FmHc,
60157 +                                    uint8_t  memId);
60158 +t_Error     FmHcDumpRegs(t_Handle h_FmHc);
60159 +
60160 +void        FmHcTxConf(t_Handle h_FmHc, t_DpaaFD *p_Fd);
60161 +
60162 +t_Error     FmHcPcdKgSetScheme(t_Handle                   h_FmHc,
60163 +                               t_Handle                   h_Scheme,
60164 +                               struct fman_kg_scheme_regs *p_SchemeRegs,
60165 +                               bool                       updateCounter);
60166 +t_Error     FmHcPcdKgDeleteScheme(t_Handle h_FmHc, t_Handle h_Scheme);
60167 +t_Error     FmHcPcdCcCapwapTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcCapwapReassmTimeoutParams *p_CcCapwapReassmTimeoutParams );
60168 +t_Error     FmHcPcdCcIpFragScratchPollCmd(t_Handle h_FmHc, bool fill, t_FmPcdCcFragScratchPoolCmdParams *p_FmPcdCcFragScratchPoolCmdParams);
60169 +t_Error     FmHcPcdCcTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcReassmTimeoutParams *p_CcReassmTimeoutParams, uint8_t *p_Result);
60170 +t_Error     FmHcPcdKgSetClsPlan(t_Handle h_FmHc, t_FmPcdKgInterModuleClsPlanSet *p_Set);
60171 +t_Error     FmHcPcdKgDeleteClsPlan(t_Handle h_FmHc, uint8_t clsPlanGrpId);
60172 +
60173 +t_Error     FmHcPcdKgSetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t value);
60174 +uint32_t    FmHcPcdKgGetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme);
60175 +
60176 +t_Error     FmHcPcdCcDoDynamicChange(t_Handle h_FmHc, uint32_t oldAdAddrOffset, uint32_t newAdAddrOffset);
60177 +
60178 +t_Error     FmHcPcdPlcrSetProfile(t_Handle h_FmHc, t_Handle h_Profile, t_FmPcdPlcrProfileRegs *p_PlcrRegs);
60179 +t_Error     FmHcPcdPlcrDeleteProfile(t_Handle h_FmHc, t_Handle h_Profile);
60180 +
60181 +t_Error     FmHcPcdPlcrSetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value);
60182 +uint32_t    FmHcPcdPlcrGetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter);
60183 +
60184 +t_Error     FmHcKgWriteSp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t spReg, bool add);
60185 +t_Error     FmHcKgWriteCpp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t cppReg);
60186 +
60187 +t_Error     FmHcPcdKgCcGetSetParams(t_Handle h_FmHc, t_Handle  h_Scheme, uint32_t requiredAction, uint32_t value);
60188 +t_Error     FmHcPcdPlcrCcGetSetParams(t_Handle h_FmHc,uint16_t absoluteProfileId, uint32_t requiredAction);
60189 +
60190 +t_Error     FmHcPcdSync(t_Handle h_FmHc);
60191 +t_Handle    FmHcGetPort(t_Handle h_FmHc);
60192 +
60193 +
60194 +
60195 +
60196 +#endif /* __FM_HC_H */
60197 --- /dev/null
60198 +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_sp_common.h
60199 @@ -0,0 +1,117 @@
60200 +/*
60201 + * Copyright 2008-2012 Freescale Semiconductor Inc.
60202 + *
60203 + * Redistribution and use in source and binary forms, with or without
60204 + * modification, are permitted provided that the following conditions are met:
60205 + *     * Redistributions of source code must retain the above copyright
60206 + *       notice, this list of conditions and the following disclaimer.
60207 + *     * Redistributions in binary form must reproduce the above copyright
60208 + *       notice, this list of conditions and the following disclaimer in the
60209 + *       documentation and/or other materials provided with the distribution.
60210 + *     * Neither the name of Freescale Semiconductor nor the
60211 + *       names of its contributors may be used to endorse or promote products
60212 + *       derived from this software without specific prior written permission.
60213 + *
60214 + *
60215 + * ALTERNATIVELY, this software may be distributed under the terms of the
60216 + * GNU General Public License ("GPL") as published by the Free Software
60217 + * Foundation, either version 2 of that License or (at your option) any
60218 + * later version.
60219 + *
60220 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
60221 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60222 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60223 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
60224 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
60225 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60226 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
60227 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60228 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
60229 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60230 + */
60231 +
60232 +
60233 +/******************************************************************************
60234 + @File          fm_sp_common.h
60235 +
60236 + @Description   FM SP  ...
60237 +*//***************************************************************************/
60238 +#ifndef __FM_SP_COMMON_H
60239 +#define __FM_SP_COMMON_H
60240 +
60241 +#include "std_ext.h"
60242 +#include "error_ext.h"
60243 +#include "list_ext.h"
60244 +
60245 +#include "fm_ext.h"
60246 +#include "fm_pcd_ext.h"
60247 +#include "fsl_fman.h"
60248 +
60249 +/**************************************************************************//**
60250 + @Description       defaults
60251 +*//***************************************************************************/
60252 +#define DEFAULT_FM_SP_bufferPrefixContent_privDataSize      0
60253 +#define DEFAULT_FM_SP_bufferPrefixContent_passPrsResult     FALSE
60254 +#define DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp     FALSE
60255 +#define DEFAULT_FM_SP_bufferPrefixContent_allOtherPCDInfo   FALSE
60256 +#define DEFAULT_FM_SP_bufferPrefixContent_dataAlign         64
60257 +
60258 +/**************************************************************************//**
60259 + @Description   structure for defining internal context copying
60260 +*//***************************************************************************/
60261 +typedef struct
60262 +{
60263 +    uint16_t    extBufOffset;       /**< Offset in External buffer to which internal
60264 +                                         context is copied to (Rx) or taken from (Tx, Op). */
60265 +    uint8_t     intContextOffset;   /**< Offset within internal context to copy from
60266 +                                         (Rx) or to copy to (Tx, Op). */
60267 +    uint16_t    size;               /**< Internal offset size to be copied */
60268 +} t_FmSpIntContextDataCopy;
60269 +
60270 +/**************************************************************************//**
60271 + @Description   struct for defining external buffer margins
60272 +*//***************************************************************************/
60273 +typedef struct {
60274 +    uint16_t    startMargins;           /**< Number of bytes to be left at the beginning
60275 +                                             of the external buffer (must be divisible by 16) */
60276 +    uint16_t    endMargins;             /**< number of bytes to be left at the end
60277 +                                             of the external buffer(must be divisible by 16) */
60278 +} t_FmSpBufMargins;
60279 +
60280 +typedef struct {
60281 +    uint32_t      dataOffset;
60282 +    uint32_t      prsResultOffset;
60283 +    uint32_t      timeStampOffset;
60284 +    uint32_t      hashResultOffset;
60285 +    uint32_t      pcdInfoOffset;
60286 +    uint32_t      manipOffset;
60287 +} t_FmSpBufferOffsets;
60288 +
60289 +
60290 +t_Error        FmSpBuildBufferStructure(t_FmSpIntContextDataCopy      *p_FmPortIntContextDataCopy,
60291 +                                        t_FmBufferPrefixContent       *p_BufferPrefixContent,
60292 +                                        t_FmSpBufMargins              *p_FmPortBufMargins,
60293 +                                        t_FmSpBufferOffsets           *p_FmPortBufferOffsets,
60294 +                                        uint8_t                       *internalBufferOffset);
60295 +
60296 +t_Error     FmSpCheckIntContextParams(t_FmSpIntContextDataCopy *p_FmSpIntContextDataCopy);
60297 +t_Error     FmSpCheckBufPoolsParams(t_FmExtPools *p_FmExtPools,
60298 +                                    t_FmBackupBmPools *p_FmBackupBmPools,
60299 +                                    t_FmBufPoolDepletion *p_FmBufPoolDepletion);
60300 +t_Error     FmSpCheckBufMargins(t_FmSpBufMargins *p_FmSpBufMargins);
60301 +void        FmSpSetBufPoolsInAscOrderOfBufSizes(t_FmExtPools *p_FmExtPools, uint8_t *orderedArray, uint16_t *sizesArray);
60302 +
60303 +t_Error     FmPcdSpAllocProfiles(t_Handle h_FmPcd,
60304 +                                 uint8_t  hardwarePortId,
60305 +                                 uint16_t numOfStorageProfiles,
60306 +                                 uint16_t *base,
60307 +                                 uint8_t  *log2Num);
60308 +t_Error     FmPcdSpGetAbsoluteProfileId(t_Handle                        h_FmPcd,
60309 +                                        t_Handle                        h_FmPort,
60310 +                                        uint16_t                        relativeProfile,
60311 +                                        uint16_t                        *p_AbsoluteId);
60312 +void SpInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
60313 +void SpValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
60314 +
60315 +
60316 +#endif /* __FM_SP_COMMON_H */
60317 --- /dev/null
60318 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/Makefile
60319 @@ -0,0 +1,12 @@
60320 +#
60321 +# Makefile for the Freescale Ethernet controllers
60322 +#
60323 +ccflags-y           += -DVERSION=\"\"
60324 +#
60325 +#Include netcomm SW specific definitions
60326 +
60327 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
60328 +
60329 +obj-y          += fsl-ncsw-etc.o
60330 +
60331 +fsl-ncsw-etc-objs      := mm.o memcpy.o sprint.o list.o error.o
60332 --- /dev/null
60333 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/error.c
60334 @@ -0,0 +1,95 @@
60335 +/*
60336 + * Copyright 2008-2012 Freescale Semiconductor Inc.
60337 + *
60338 + * Redistribution and use in source and binary forms, with or without
60339 + * modification, are permitted provided that the following conditions are met:
60340 + *     * Redistributions of source code must retain the above copyright
60341 + *       notice, this list of conditions and the following disclaimer.
60342 + *     * Redistributions in binary form must reproduce the above copyright
60343 + *       notice, this list of conditions and the following disclaimer in the
60344 + *       documentation and/or other materials provided with the distribution.
60345 + *     * Neither the name of Freescale Semiconductor nor the
60346 + *       names of its contributors may be used to endorse or promote products
60347 + *       derived from this software without specific prior written permission.
60348 + *
60349 + *
60350 + * ALTERNATIVELY, this software may be distributed under the terms of the
60351 + * GNU General Public License ("GPL") as published by the Free Software
60352 + * Foundation, either version 2 of that License or (at your option) any
60353 + * later version.
60354 + *
60355 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
60356 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60357 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60358 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
60359 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
60360 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60361 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
60362 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60363 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
60364 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60365 + */
60366 +
60367 +
60368 +/*
60369 +
60370 + @File          error.c
60371 +
60372 + @Description   General errors and events reporting utilities.
60373 +*//***************************************************************************/
60374 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
60375 +#include "error_ext.h"
60376 +
60377 +
60378 +const char *dbgLevelStrings[] =
60379 +{
60380 +     "CRITICAL"
60381 +    ,"MAJOR"
60382 +    ,"MINOR"
60383 +    ,"WARNING"
60384 +    ,"INFO"
60385 +    ,"TRACE"
60386 +};
60387 +
60388 +
60389 +char * ErrTypeStrings (e_ErrorType err)
60390 +{
60391 +    switch (err)
60392 +    {
60393 +        case (E_OK):                    return "OK";
60394 +        case (E_WRITE_FAILED):          return "Write Access Failed";
60395 +        case (E_NO_DEVICE):             return "No Device";
60396 +        case (E_NOT_AVAILABLE):         return "Resource Is Unavailable";
60397 +        case (E_NO_MEMORY):             return "Memory Allocation Failed";
60398 +        case (E_INVALID_ADDRESS):       return "Invalid Address";
60399 +        case (E_BUSY):                  return "Resource Is Busy";
60400 +        case (E_ALREADY_EXISTS):        return "Resource Already Exists";
60401 +        case (E_INVALID_OPERATION):     return "Invalid Operation";
60402 +        case (E_INVALID_VALUE):         return "Invalid Value";
60403 +        case (E_NOT_IN_RANGE):          return "Value Out Of Range";
60404 +        case (E_NOT_SUPPORTED):         return "Unsupported Operation";
60405 +        case (E_INVALID_STATE):         return "Invalid State";
60406 +        case (E_INVALID_HANDLE):        return "Invalid Handle";
60407 +        case (E_INVALID_ID):            return "Invalid ID";
60408 +        case (E_NULL_POINTER):          return "Unexpected NULL Pointer";
60409 +        case (E_INVALID_SELECTION):     return "Invalid Selection";
60410 +        case (E_INVALID_COMM_MODE):     return "Invalid Communication Mode";
60411 +        case (E_INVALID_MEMORY_TYPE):   return "Invalid Memory Type";
60412 +        case (E_INVALID_CLOCK):         return "Invalid Clock";
60413 +        case (E_CONFLICT):              return "Conflict In Settings";
60414 +        case (E_NOT_ALIGNED):           return "Incorrect Alignment";
60415 +        case (E_NOT_FOUND):             return "Resource Not Found";
60416 +        case (E_FULL):                  return "Resource Is Full";
60417 +        case (E_EMPTY):                 return "Resource Is Empty";
60418 +        case (E_ALREADY_FREE):          return "Resource Already Free";
60419 +        case (E_READ_FAILED):           return "Read Access Failed";
60420 +        case (E_INVALID_FRAME):         return "Invalid Frame";
60421 +        case (E_SEND_FAILED):           return "Send Operation Failed";
60422 +        case (E_RECEIVE_FAILED):        return "Receive Operation Failed";
60423 +        case (E_TIMEOUT):               return "Operation Timed Out";
60424 +        default:
60425 +            break;
60426 +    }
60427 +    return NULL;
60428 +}
60429 +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
60430 --- /dev/null
60431 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/list.c
60432 @@ -0,0 +1,71 @@
60433 +/*
60434 + * Copyright 2008-2012 Freescale Semiconductor Inc.
60435 + *
60436 + * Redistribution and use in source and binary forms, with or without
60437 + * modification, are permitted provided that the following conditions are met:
60438 + *     * Redistributions of source code must retain the above copyright
60439 + *       notice, this list of conditions and the following disclaimer.
60440 + *     * Redistributions in binary form must reproduce the above copyright
60441 + *       notice, this list of conditions and the following disclaimer in the
60442 + *       documentation and/or other materials provided with the distribution.
60443 + *     * Neither the name of Freescale Semiconductor nor the
60444 + *       names of its contributors may be used to endorse or promote products
60445 + *       derived from this software without specific prior written permission.
60446 + *
60447 + *
60448 + * ALTERNATIVELY, this software may be distributed under the terms of the
60449 + * GNU General Public License ("GPL") as published by the Free Software
60450 + * Foundation, either version 2 of that License or (at your option) any
60451 + * later version.
60452 + *
60453 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
60454 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60455 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60456 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
60457 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
60458 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60459 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
60460 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60461 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
60462 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60463 + */
60464 +
60465 +
60466 +/**************************************************************************//**
60467 +
60468 + @File          list.c
60469 +
60470 + @Description   Implementation of list.
60471 +*//***************************************************************************/
60472 +#include "std_ext.h"
60473 +#include "list_ext.h"
60474 +
60475 +
60476 +void LIST_Append(t_List *p_NewList, t_List *p_Head)
60477 +{
60478 +    t_List *p_First = LIST_FIRST(p_NewList);
60479 +
60480 +    if (p_First != p_NewList)
60481 +    {
60482 +        t_List *p_Last  = LIST_LAST(p_NewList);
60483 +        t_List *p_Cur   = LIST_NEXT(p_Head);
60484 +
60485 +        LIST_PREV(p_First) = p_Head;
60486 +        LIST_FIRST(p_Head) = p_First;
60487 +        LIST_NEXT(p_Last)  = p_Cur;
60488 +        LIST_LAST(p_Cur)   = p_Last;
60489 +    }
60490 +}
60491 +
60492 +
60493 +int LIST_NumOfObjs(t_List *p_List)
60494 +{
60495 +    t_List *p_Tmp;
60496 +    int    numOfObjs = 0;
60497 +
60498 +    if (!LIST_IsEmpty(p_List))
60499 +        LIST_FOR_EACH(p_Tmp, p_List)
60500 +            numOfObjs++;
60501 +
60502 +    return numOfObjs;
60503 +}
60504 --- /dev/null
60505 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/memcpy.c
60506 @@ -0,0 +1,620 @@
60507 +/*
60508 + * Copyright 2008-2012 Freescale Semiconductor Inc.
60509 + *
60510 + * Redistribution and use in source and binary forms, with or without
60511 + * modification, are permitted provided that the following conditions are met:
60512 + *     * Redistributions of source code must retain the above copyright
60513 + *       notice, this list of conditions and the following disclaimer.
60514 + *     * Redistributions in binary form must reproduce the above copyright
60515 + *       notice, this list of conditions and the following disclaimer in the
60516 + *       documentation and/or other materials provided with the distribution.
60517 + *     * Neither the name of Freescale Semiconductor nor the
60518 + *       names of its contributors may be used to endorse or promote products
60519 + *       derived from this software without specific prior written permission.
60520 + *
60521 + *
60522 + * ALTERNATIVELY, this software may be distributed under the terms of the
60523 + * GNU General Public License ("GPL") as published by the Free Software
60524 + * Foundation, either version 2 of that License or (at your option) any
60525 + * later version.
60526 + *
60527 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
60528 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60529 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60530 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
60531 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
60532 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60533 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
60534 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60535 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
60536 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60537 + */
60538 +
60539 +
60540 +
60541 +#include "std_ext.h"
60542 +#include "xx_ext.h"
60543 +#include "memcpy_ext.h"
60544 +
60545 +void * MemCpy8(void* pDst, void* pSrc, uint32_t size)
60546 +{
60547 +    int i;
60548 +
60549 +    for(i = 0; i < size; ++i)
60550 +        *(((uint8_t*)(pDst)) + i) = *(((uint8_t*)(pSrc)) + i);
60551 +
60552 +    return pDst;
60553 +}
60554 +
60555 +void * MemSet8(void* pDst, int c, uint32_t size)
60556 +{
60557 +    int i;
60558 +
60559 +    for(i = 0; i < size; ++i)
60560 +        *(((uint8_t*)(pDst)) + i) = (uint8_t)(c);
60561 +
60562 +    return pDst;
60563 +}
60564 +
60565 +void * MemCpy32(void* pDst,void* pSrc, uint32_t size)
60566 +{
60567 +    uint32_t leftAlign;
60568 +    uint32_t rightAlign;
60569 +    uint32_t lastWord;
60570 +    uint32_t currWord;
60571 +    uint32_t *p_Src32;
60572 +    uint32_t *p_Dst32;
60573 +    uint8_t  *p_Src8;
60574 +    uint8_t  *p_Dst8;
60575 +
60576 +    p_Src8 = (uint8_t*)(pSrc);
60577 +    p_Dst8 = (uint8_t*)(pDst);
60578 +    /* first copy byte by byte till the source first alignment
60579 +     * this step is necessary to ensure we do not even try to access
60580 +     * data which is before the source buffer, hence it is not ours.
60581 +     */
60582 +    while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
60583 +    {
60584 +        *p_Dst8++ = *p_Src8++;
60585 +        size--;
60586 +    }
60587 +
60588 +    /* align destination (possibly disaligning source)*/
60589 +    while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
60590 +    {
60591 +        *p_Dst8++ = *p_Src8++;
60592 +        size--;
60593 +    }
60594 +
60595 +    /* dest is aligned and source is not necessarily aligned */
60596 +    leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
60597 +    rightAlign = 32 - leftAlign;
60598 +
60599 +
60600 +    if (leftAlign == 0)
60601 +    {
60602 +        /* source is also aligned */
60603 +        p_Src32 = (uint32_t*)(p_Src8);
60604 +        p_Dst32 = (uint32_t*)(p_Dst8);
60605 +        while (size >> 2) /* size >= 4 */
60606 +        {
60607 +            *p_Dst32++ = *p_Src32++;
60608 +            size -= 4;
60609 +        }
60610 +        p_Src8 = (uint8_t*)(p_Src32);
60611 +        p_Dst8 = (uint8_t*)(p_Dst32);
60612 +    }
60613 +    else
60614 +    {
60615 +        /* source is not aligned (destination is aligned)*/
60616 +        p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
60617 +        p_Dst32 = (uint32_t*)(p_Dst8);
60618 +        lastWord = *p_Src32++;
60619 +        while(size >> 3) /* size >= 8 */
60620 +        {
60621 +            currWord = *p_Src32;
60622 +            *p_Dst32 = (lastWord << leftAlign) | (currWord >> rightAlign);
60623 +            lastWord = currWord;
60624 +            p_Src32++;
60625 +            p_Dst32++;
60626 +            size -= 4;
60627 +        }
60628 +        p_Dst8 = (uint8_t*)(p_Dst32);
60629 +        p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
60630 +    }
60631 +
60632 +    /* complete the left overs */
60633 +    while (size--)
60634 +        *p_Dst8++ = *p_Src8++;
60635 +
60636 +    return pDst;
60637 +}
60638 +
60639 +void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size)
60640 +{
60641 +    uint32_t leftAlign;
60642 +    uint32_t rightAlign;
60643 +    uint32_t lastWord;
60644 +    uint32_t currWord;
60645 +    uint32_t *p_Src32;
60646 +    uint32_t *p_Dst32;
60647 +    uint8_t  *p_Src8;
60648 +    uint8_t  *p_Dst8;
60649 +
60650 +    p_Src8 = (uint8_t*)(pSrc);
60651 +    p_Dst8 = (uint8_t*)(pDst);
60652 +    /* first copy byte by byte till the source first alignment
60653 +     * this step is necessary to ensure we do not even try to access
60654 +     * data which is before the source buffer, hence it is not ours.
60655 +     */
60656 +    while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
60657 +    {
60658 +        WRITE_UINT8(*p_Dst8, GET_UINT8(*p_Src8));
60659 +        p_Dst8++;p_Src8++;
60660 +        size--;
60661 +    }
60662 +
60663 +    /* align destination (possibly disaligning source)*/
60664 +    while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
60665 +    {
60666 +        WRITE_UINT8(*p_Dst8, GET_UINT8(*p_Src8));
60667 +        p_Dst8++;p_Src8++;
60668 +        size--;
60669 +    }
60670 +
60671 +    /* dest is aligned and source is not necessarily aligned */
60672 +    leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
60673 +    rightAlign = 32 - leftAlign;
60674 +
60675 +    if (leftAlign == 0)
60676 +    {
60677 +        /* source is also aligned */
60678 +        p_Src32 = (uint32_t*)(p_Src8);
60679 +        p_Dst32 = (uint32_t*)(p_Dst8);
60680 +        while (size >> 2) /* size >= 4 */
60681 +        {
60682 +            WRITE_UINT32(*p_Dst32, GET_UINT32(*p_Src32));
60683 +            p_Dst32++;p_Src32++;
60684 +            size -= 4;
60685 +        }
60686 +        p_Src8 = (uint8_t*)(p_Src32);
60687 +        p_Dst8 = (uint8_t*)(p_Dst32);
60688 +    }
60689 +    else
60690 +    {
60691 +        /* source is not aligned (destination is aligned)*/
60692 +        p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
60693 +        p_Dst32 = (uint32_t*)(p_Dst8);
60694 +        lastWord = GET_UINT32(*p_Src32);
60695 +        p_Src32++;
60696 +        while(size >> 3) /* size >= 8 */
60697 +        {
60698 +            currWord = GET_UINT32(*p_Src32);
60699 +            WRITE_UINT32(*p_Dst32, (lastWord << leftAlign) | (currWord >> rightAlign));
60700 +            lastWord = currWord;
60701 +            p_Src32++;p_Dst32++;
60702 +            size -= 4;
60703 +        }
60704 +        p_Dst8 = (uint8_t*)(p_Dst32);
60705 +        p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
60706 +    }
60707 +
60708 +    /* complete the left overs */
60709 +    while (size--)
60710 +    {
60711 +        WRITE_UINT8(*p_Dst8, GET_UINT8(*p_Src8));
60712 +        p_Dst8++;p_Src8++;
60713 +    }
60714 +
60715 +    return pDst;
60716 +}
60717 +
60718 +void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size)
60719 +{
60720 +    uint32_t leftAlign;
60721 +    uint32_t rightAlign;
60722 +    uint32_t lastWord;
60723 +    uint32_t currWord;
60724 +    uint32_t *p_Src32;
60725 +    uint32_t *p_Dst32;
60726 +    uint8_t  *p_Src8;
60727 +    uint8_t  *p_Dst8;
60728 +
60729 +    p_Src8 = (uint8_t*)(pSrc);
60730 +    p_Dst8 = (uint8_t*)(pDst);
60731 +    /* first copy byte by byte till the source first alignment
60732 +     * this step is necessary to ensure we do not even try to access
60733 +     * data which is before the source buffer, hence it is not ours.
60734 +     */
60735 +    while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
60736 +    {
60737 +        WRITE_UINT8(*p_Dst8, *p_Src8);
60738 +        p_Dst8++;p_Src8++;
60739 +        size--;
60740 +    }
60741 +
60742 +    /* align destination (possibly disaligning source)*/
60743 +    while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
60744 +    {
60745 +        WRITE_UINT8(*p_Dst8, *p_Src8);
60746 +        p_Dst8++;p_Src8++;
60747 +        size--;
60748 +    }
60749 +
60750 +    /* dest is aligned and source is not necessarily aligned */
60751 +    leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
60752 +    rightAlign = 32 - leftAlign;
60753 +
60754 +    if (leftAlign == 0)
60755 +    {
60756 +        /* source is also aligned */
60757 +        p_Src32 = (uint32_t*)(p_Src8);
60758 +        p_Dst32 = (uint32_t*)(p_Dst8);
60759 +        while (size >> 2) /* size >= 4 */
60760 +        {
60761 +            WRITE_UINT32(*p_Dst32, *p_Src32);
60762 +            p_Dst32++;p_Src32++;
60763 +            size -= 4;
60764 +        }
60765 +        p_Src8 = (uint8_t*)(p_Src32);
60766 +        p_Dst8 = (uint8_t*)(p_Dst32);
60767 +    }
60768 +    else
60769 +    {
60770 +        /* source is not aligned (destination is aligned)*/
60771 +        p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
60772 +        p_Dst32 = (uint32_t*)(p_Dst8);
60773 +        lastWord = *p_Src32++;
60774 +        while(size >> 3) /* size >= 8 */
60775 +        {
60776 +            currWord = *p_Src32;
60777 +            WRITE_UINT32(*p_Dst32, (lastWord << leftAlign) | (currWord >> rightAlign));
60778 +            lastWord = currWord;
60779 +            p_Src32++;p_Dst32++;
60780 +            size -= 4;
60781 +        }
60782 +        p_Dst8 = (uint8_t*)(p_Dst32);
60783 +        p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
60784 +    }
60785 +
60786 +    /* complete the left overs */
60787 +    while (size--)
60788 +    {
60789 +        WRITE_UINT8(*p_Dst8, *p_Src8);
60790 +        p_Dst8++;p_Src8++;
60791 +    }
60792 +
60793 +    return pDst;
60794 +}
60795 +
60796 +void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size)
60797 +{
60798 +    uint32_t leftAlign;
60799 +    uint32_t rightAlign;
60800 +    uint32_t lastWord;
60801 +    uint32_t currWord;
60802 +    uint32_t *p_Src32;
60803 +    uint32_t *p_Dst32;
60804 +    uint8_t  *p_Src8;
60805 +    uint8_t  *p_Dst8;
60806 +
60807 +    p_Src8 = (uint8_t*)(pSrc);
60808 +    p_Dst8 = (uint8_t*)(pDst);
60809 +    /* first copy byte by byte till the source first alignment
60810 +     * this step is necessary to ensure we do not even try to access
60811 +     * data which is before the source buffer, hence it is not ours.
60812 +     */
60813 +    while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
60814 +    {
60815 +        *p_Dst8 = GET_UINT8(*p_Src8);
60816 +        p_Dst8++;p_Src8++;
60817 +        size--;
60818 +    }
60819 +
60820 +    /* align destination (possibly disaligning source)*/
60821 +    while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
60822 +    {
60823 +        *p_Dst8 = GET_UINT8(*p_Src8);
60824 +        p_Dst8++;p_Src8++;
60825 +        size--;
60826 +    }
60827 +
60828 +    /* dest is aligned and source is not necessarily aligned */
60829 +    leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
60830 +    rightAlign = 32 - leftAlign;
60831 +
60832 +    if (leftAlign == 0)
60833 +    {
60834 +        /* source is also aligned */
60835 +        p_Src32 = (uint32_t*)(p_Src8);
60836 +        p_Dst32 = (uint32_t*)(p_Dst8);
60837 +        while (size >> 2) /* size >= 4 */
60838 +        {
60839 +            *p_Dst32 = GET_UINT32(*p_Src32);
60840 +            p_Dst32++;p_Src32++;
60841 +            size -= 4;
60842 +        }
60843 +        p_Src8 = (uint8_t*)(p_Src32);
60844 +        p_Dst8 = (uint8_t*)(p_Dst32);
60845 +    }
60846 +    else
60847 +    {
60848 +        /* source is not aligned (destination is aligned)*/
60849 +        p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
60850 +        p_Dst32 = (uint32_t*)(p_Dst8);
60851 +        lastWord = GET_UINT32(*p_Src32);
60852 +        p_Src32++;
60853 +        while(size >> 3) /* size >= 8 */
60854 +        {
60855 +            currWord = GET_UINT32(*p_Src32);
60856 +            *p_Dst32 = (lastWord << leftAlign) | (currWord >> rightAlign);
60857 +            lastWord = currWord;
60858 +            p_Src32++;p_Dst32++;
60859 +            size -= 4;
60860 +        }
60861 +        p_Dst8 = (uint8_t*)(p_Dst32);
60862 +        p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
60863 +    }
60864 +
60865 +    /* complete the left overs */
60866 +    while (size--)
60867 +    {
60868 +        *p_Dst8 = GET_UINT8(*p_Src8);
60869 +        p_Dst8++;p_Src8++;
60870 +    }
60871 +
60872 +    return pDst;
60873 +}
60874 +
60875 +void * MemCpy64(void* pDst,void* pSrc, uint32_t size)
60876 +{
60877 +    uint32_t leftAlign;
60878 +    uint32_t rightAlign;
60879 +    uint64_t lastWord;
60880 +    uint64_t currWord;
60881 +    uint64_t *pSrc64;
60882 +    uint64_t *pDst64;
60883 +    uint8_t  *p_Src8;
60884 +    uint8_t  *p_Dst8;
60885 +
60886 +    p_Src8 = (uint8_t*)(pSrc);
60887 +    p_Dst8 = (uint8_t*)(pDst);
60888 +    /* first copy byte by byte till the source first alignment
60889 +     * this step is necessarily to ensure we do not even try to access
60890 +     * data which is before the source buffer, hence it is not ours.
60891 +     */
60892 +    while((PTR_TO_UINT(p_Src8) & 7) && size) /* (pSrc mod 8) > 0 and size > 0 */
60893 +    {
60894 +        *p_Dst8++ = *p_Src8++;
60895 +        size--;
60896 +    }
60897 +
60898 +    /* align destination (possibly disaligning source)*/
60899 +    while((PTR_TO_UINT(p_Dst8) & 7) && size) /* (pDst mod 8) > 0 and size > 0 */
60900 +    {
60901 +        *p_Dst8++ = *p_Src8++;
60902 +        size--;
60903 +    }
60904 +
60905 +    /* dest is aligned and source is not necessarily aligned */
60906 +    leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 7) << 3); /* leftAlign = (pSrc mod 8)*8 */
60907 +    rightAlign = 64 - leftAlign;
60908 +
60909 +
60910 +    if (leftAlign == 0)
60911 +    {
60912 +        /* source is also aligned */
60913 +        pSrc64 = (uint64_t*)(p_Src8);
60914 +        pDst64 = (uint64_t*)(p_Dst8);
60915 +        while (size >> 3) /* size >= 8 */
60916 +        {
60917 +            *pDst64++ = *pSrc64++;
60918 +            size -= 8;
60919 +        }
60920 +        p_Src8 = (uint8_t*)(pSrc64);
60921 +        p_Dst8 = (uint8_t*)(pDst64);
60922 +    }
60923 +    else
60924 +    {
60925 +        /* source is not aligned (destination is aligned)*/
60926 +        pSrc64 = (uint64_t*)(p_Src8 - (leftAlign >> 3));
60927 +        pDst64 = (uint64_t*)(p_Dst8);
60928 +        lastWord = *pSrc64++;
60929 +        while(size >> 4) /* size >= 16 */
60930 +        {
60931 +            currWord = *pSrc64;
60932 +            *pDst64 = (lastWord << leftAlign) | (currWord >> rightAlign);
60933 +            lastWord = currWord;
60934 +            pSrc64++;
60935 +            pDst64++;
60936 +            size -= 8;
60937 +        }
60938 +        p_Dst8 = (uint8_t*)(pDst64);
60939 +        p_Src8 = (uint8_t*)(pSrc64) - 8 + (leftAlign >> 3);
60940 +    }
60941 +
60942 +    /* complete the left overs */
60943 +    while (size--)
60944 +        *p_Dst8++ = *p_Src8++;
60945 +
60946 +    return pDst;
60947 +}
60948 +
60949 +void * MemSet32(void* pDst, uint8_t val, uint32_t size)
60950 +{
60951 +    uint32_t val32;
60952 +    uint32_t *p_Dst32;
60953 +    uint8_t  *p_Dst8;
60954 +
60955 +    p_Dst8 = (uint8_t*)(pDst);
60956 +
60957 +    /* generate four 8-bit val's in 32-bit container */
60958 +    val32  = (uint32_t) val;
60959 +    val32 |= (val32 <<  8);
60960 +    val32 |= (val32 << 16);
60961 +
60962 +    /* align destination to 32 */
60963 +    while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
60964 +    {
60965 +        *p_Dst8++ = val;
60966 +        size--;
60967 +    }
60968 +
60969 +    /* 32-bit chunks */
60970 +    p_Dst32 = (uint32_t*)(p_Dst8);
60971 +    while (size >> 2) /* size >= 4 */
60972 +    {
60973 +        *p_Dst32++ = val32;
60974 +        size -= 4;
60975 +    }
60976 +
60977 +    /* complete the leftovers */
60978 +    p_Dst8 = (uint8_t*)(p_Dst32);
60979 +    while (size--)
60980 +        *p_Dst8++ = val;
60981 +
60982 +    return pDst;
60983 +}
60984 +
60985 +void * IOMemSet32(void* pDst, uint8_t val, uint32_t size)
60986 +{
60987 +    uint32_t val32;
60988 +    uint32_t *p_Dst32;
60989 +    uint8_t  *p_Dst8;
60990 +
60991 +    p_Dst8 = (uint8_t*)(pDst);
60992 +
60993 +    /* generate four 8-bit val's in 32-bit container */
60994 +    val32  = (uint32_t) val;
60995 +    val32 |= (val32 <<  8);
60996 +    val32 |= (val32 << 16);
60997 +
60998 +    /* align destination to 32 */
60999 +    while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
61000 +    {
61001 +        WRITE_UINT8(*p_Dst8, val);
61002 +        p_Dst8++;
61003 +        size--;
61004 +    }
61005 +
61006 +    /* 32-bit chunks */
61007 +    p_Dst32 = (uint32_t*)(p_Dst8);
61008 +    while (size >> 2) /* size >= 4 */
61009 +    {
61010 +        WRITE_UINT32(*p_Dst32, val32);
61011 +        p_Dst32++;
61012 +        size -= 4;
61013 +    }
61014 +
61015 +    /* complete the leftovers */
61016 +    p_Dst8 = (uint8_t*)(p_Dst32);
61017 +    while (size--)
61018 +    {
61019 +        WRITE_UINT8(*p_Dst8, val);
61020 +        p_Dst8++;
61021 +    }
61022 +
61023 +    return pDst;
61024 +}
61025 +
61026 +void * MemSet64(void* pDst, uint8_t val, uint32_t size)
61027 +{
61028 +    uint64_t val64;
61029 +    uint64_t *pDst64;
61030 +    uint8_t  *p_Dst8;
61031 +
61032 +    p_Dst8 = (uint8_t*)(pDst);
61033 +
61034 +    /* generate four 8-bit val's in 32-bit container */
61035 +    val64  = (uint64_t) val;
61036 +    val64 |= (val64 <<  8);
61037 +    val64 |= (val64 << 16);
61038 +    val64 |= (val64 << 24);
61039 +    val64 |= (val64 << 32);
61040 +
61041 +    /* align destination to 64 */
61042 +    while((PTR_TO_UINT(p_Dst8) & 7) && size) /* (pDst mod 8) > 0 and size > 0 */
61043 +    {
61044 +        *p_Dst8++ = val;
61045 +        size--;
61046 +    }
61047 +
61048 +    /* 64-bit chunks */
61049 +    pDst64 = (uint64_t*)(p_Dst8);
61050 +    while (size >> 4) /* size >= 8 */
61051 +    {
61052 +        *pDst64++ = val64;
61053 +        size -= 8;
61054 +    }
61055 +
61056 +    /* complete the leftovers */
61057 +    p_Dst8 = (uint8_t*)(pDst64);
61058 +    while (size--)
61059 +        *p_Dst8++ = val;
61060 +
61061 +    return pDst;
61062 +}
61063 +
61064 +void MemDisp(uint8_t *p, int size)
61065 +{
61066 +    uint32_t    space = (uint32_t)(PTR_TO_UINT(p) & 0x3);
61067 +    uint8_t     *p_Limit;
61068 +
61069 +    if (space)
61070 +    {
61071 +        p_Limit = (p - space + 4);
61072 +
61073 +        XX_Print("0x%08X: ", (p - space));
61074 +
61075 +        while (space--)
61076 +        {
61077 +            XX_Print("--");
61078 +        }
61079 +        while (size  && (p < p_Limit))
61080 +        {
61081 +            XX_Print("%02x", *(uint8_t*)p);
61082 +            size--;
61083 +            p++;
61084 +        }
61085 +
61086 +        XX_Print(" ");
61087 +        p_Limit += 12;
61088 +
61089 +        while ((size > 3) && (p < p_Limit))
61090 +        {
61091 +            XX_Print("%08x ", *(uint32_t*)p);
61092 +            size -= 4;
61093 +            p += 4;
61094 +        }
61095 +        XX_Print("\r\n");
61096 +    }
61097 +
61098 +    while (size > 15)
61099 +    {
61100 +        XX_Print("0x%08X: %08x %08x %08x %08x\r\n",
61101 +                 p, *(uint32_t *)p, *(uint32_t *)(p + 4),
61102 +                 *(uint32_t *)(p + 8), *(uint32_t *)(p + 12));
61103 +        size -= 16;
61104 +        p += 16;
61105 +    }
61106 +
61107 +    if (size)
61108 +    {
61109 +        XX_Print("0x%08X: ", p);
61110 +
61111 +        while (size > 3)
61112 +        {
61113 +            XX_Print("%08x ", *(uint32_t *)p);
61114 +            size -= 4;
61115 +            p += 4;
61116 +        }
61117 +        while (size)
61118 +        {
61119 +            XX_Print("%02x", *(uint8_t *)p);
61120 +            size--;
61121 +            p++;
61122 +        }
61123 +
61124 +        XX_Print("\r\n");
61125 +    }
61126 +}
61127 --- /dev/null
61128 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/mm.c
61129 @@ -0,0 +1,1155 @@
61130 +/*
61131 + * Copyright 2008-2012 Freescale Semiconductor Inc.
61132 + *
61133 + * Redistribution and use in source and binary forms, with or without
61134 + * modification, are permitted provided that the following conditions are met:
61135 + *     * Redistributions of source code must retain the above copyright
61136 + *       notice, this list of conditions and the following disclaimer.
61137 + *     * Redistributions in binary form must reproduce the above copyright
61138 + *       notice, this list of conditions and the following disclaimer in the
61139 + *       documentation and/or other materials provided with the distribution.
61140 + *     * Neither the name of Freescale Semiconductor nor the
61141 + *       names of its contributors may be used to endorse or promote products
61142 + *       derived from this software without specific prior written permission.
61143 + *
61144 + *
61145 + * ALTERNATIVELY, this software may be distributed under the terms of the
61146 + * GNU General Public License ("GPL") as published by the Free Software
61147 + * Foundation, either version 2 of that License or (at your option) any
61148 + * later version.
61149 + *
61150 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
61151 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
61152 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61153 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
61154 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
61155 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
61156 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
61157 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61158 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
61159 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61160 + */
61161 +
61162 +
61163 +#include "string_ext.h"
61164 +#include "error_ext.h"
61165 +#include "std_ext.h"
61166 +#include "part_ext.h"
61167 +#include "xx_ext.h"
61168 +
61169 +#include "mm.h"
61170 +
61171 +
61172 +
61173 +
61174 +/**********************************************************************
61175 + *                     MM internal routines set                       *
61176 + **********************************************************************/
61177 +
61178 +/****************************************************************
61179 + *  Routine:   CreateBusyBlock
61180 + *
61181 + *  Description:
61182 + *      Initializes a new busy block of "size" bytes and started
61183 + *      rom "base" address. Each busy block has a name that
61184 + *      specified the purpose of the memory allocation.
61185 + *
61186 + *  Arguments:
61187 + *      base      - base address of the busy block
61188 + *      size      - size of the busy block
61189 + *      name      - name that specified the busy block
61190 + *
61191 + *  Return value:
61192 + *      A pointer to new created structure returned on success;
61193 + *      Otherwise, NULL.
61194 + ****************************************************************/
61195 +static t_BusyBlock * CreateBusyBlock(uint64_t base, uint64_t size, char *name)
61196 +{
61197 +    t_BusyBlock *p_BusyBlock;
61198 +    uint32_t    n;
61199 +
61200 +    p_BusyBlock = (t_BusyBlock *)XX_Malloc(sizeof(t_BusyBlock));
61201 +    if ( !p_BusyBlock )
61202 +    {
61203 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61204 +        return NULL;
61205 +    }
61206 +
61207 +    p_BusyBlock->base = base;
61208 +    p_BusyBlock->end = base + size;
61209 +
61210 +    n = strlen(name);
61211 +    if (n >= MM_MAX_NAME_LEN)
61212 +        n = MM_MAX_NAME_LEN - 1;
61213 +    strncpy(p_BusyBlock->name, name, MM_MAX_NAME_LEN-1);
61214 +    p_BusyBlock->name[n] = '\0';
61215 +    p_BusyBlock->p_Next = 0;
61216 +
61217 +    return p_BusyBlock;
61218 +}
61219 +
61220 +/****************************************************************
61221 + *  Routine:   CreateNewBlock
61222 + *
61223 + *  Description:
61224 + *      Initializes a new memory block of "size" bytes and started
61225 + *      from "base" address.
61226 + *
61227 + *  Arguments:
61228 + *      base    - base address of the memory block
61229 + *      size    - size of the memory block
61230 + *
61231 + *  Return value:
61232 + *      A pointer to new created structure returned on success;
61233 + *      Otherwise, NULL.
61234 + ****************************************************************/
61235 +static t_MemBlock * CreateNewBlock(uint64_t base, uint64_t size)
61236 +{
61237 +    t_MemBlock *p_MemBlock;
61238 +
61239 +    p_MemBlock = (t_MemBlock *)XX_Malloc(sizeof(t_MemBlock));
61240 +    if ( !p_MemBlock )
61241 +    {
61242 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61243 +        return NULL;
61244 +    }
61245 +
61246 +    p_MemBlock->base = base;
61247 +    p_MemBlock->end = base+size;
61248 +    p_MemBlock->p_Next = 0;
61249 +
61250 +    return p_MemBlock;
61251 +}
61252 +
61253 +/****************************************************************
61254 + *  Routine:   CreateFreeBlock
61255 + *
61256 + *  Description:
61257 + *      Initializes a new free block of of "size" bytes and
61258 + *      started from "base" address.
61259 + *
61260 + *  Arguments:
61261 + *      base      - base address of the free block
61262 + *      size      - size of the free block
61263 + *
61264 + *  Return value:
61265 + *      A pointer to new created structure returned on success;
61266 + *      Otherwise, NULL.
61267 + ****************************************************************/
61268 +static t_FreeBlock * CreateFreeBlock(uint64_t base, uint64_t size)
61269 +{
61270 +    t_FreeBlock *p_FreeBlock;
61271 +
61272 +    p_FreeBlock = (t_FreeBlock *)XX_Malloc(sizeof(t_FreeBlock));
61273 +    if ( !p_FreeBlock )
61274 +    {
61275 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61276 +        return NULL;
61277 +    }
61278 +
61279 +    p_FreeBlock->base = base;
61280 +    p_FreeBlock->end = base + size;
61281 +    p_FreeBlock->p_Next = 0;
61282 +
61283 +    return p_FreeBlock;
61284 +}
61285 +
61286 +/****************************************************************
61287 + *  Routine:    AddFree
61288 + *
61289 + *  Description:
61290 + *      Adds a new free block to the free lists. It updates each
61291 + *      free list to include a new free block.
61292 + *      Note, that all free block in each free list are ordered
61293 + *      by their base address.
61294 + *
61295 + *  Arguments:
61296 + *      p_MM  - pointer to the MM object
61297 + *      base  - base address of a given free block
61298 + *      end   - end address of a given free block
61299 + *
61300 + *  Return value:
61301 + *
61302 + *
61303 + ****************************************************************/
61304 +static t_Error AddFree(t_MM *p_MM, uint64_t base, uint64_t end)
61305 +{
61306 +    t_FreeBlock *p_PrevB, *p_CurrB, *p_NewB;
61307 +    uint64_t    alignment;
61308 +    uint64_t    alignBase;
61309 +    int         i;
61310 +
61311 +    /* Updates free lists to include  a just released block */
61312 +    for (i=0; i <= MM_MAX_ALIGNMENT; i++)
61313 +    {
61314 +        p_PrevB = p_NewB = 0;
61315 +        p_CurrB = p_MM->freeBlocks[i];
61316 +
61317 +        alignment = (uint64_t)(0x1 << i);
61318 +        alignBase = MAKE_ALIGNED(base, alignment);
61319 +
61320 +        /* Goes to the next free list if there is no block to free */
61321 +        if (alignBase >= end)
61322 +            continue;
61323 +
61324 +        /* Looks for a free block that should be updated */
61325 +        while ( p_CurrB )
61326 +        {
61327 +            if ( alignBase <= p_CurrB->end )
61328 +            {
61329 +                if ( end > p_CurrB->end )
61330 +                {
61331 +                    t_FreeBlock *p_NextB;
61332 +                    while ( p_CurrB->p_Next && end > p_CurrB->p_Next->end )
61333 +                    {
61334 +                        p_NextB = p_CurrB->p_Next;
61335 +                        p_CurrB->p_Next = p_CurrB->p_Next->p_Next;
61336 +                        XX_Free(p_NextB);
61337 +                    }
61338 +
61339 +                    p_NextB = p_CurrB->p_Next;
61340 +                    if ( !p_NextB || (p_NextB && end < p_NextB->base) )
61341 +                    {
61342 +                        p_CurrB->end = end;
61343 +                    }
61344 +                    else
61345 +                    {
61346 +                        p_CurrB->end = p_NextB->end;
61347 +                        p_CurrB->p_Next = p_NextB->p_Next;
61348 +                        XX_Free(p_NextB);
61349 +                    }
61350 +                }
61351 +                else if ( (end < p_CurrB->base) && ((end-alignBase) >= alignment) )
61352 +                {
61353 +                    if ((p_NewB = CreateFreeBlock(alignBase, end-alignBase)) == NULL)
61354 +                        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61355 +
61356 +                    p_NewB->p_Next = p_CurrB;
61357 +                    if (p_PrevB)
61358 +                        p_PrevB->p_Next = p_NewB;
61359 +                    else
61360 +                        p_MM->freeBlocks[i] = p_NewB;
61361 +                    break;
61362 +                }
61363 +
61364 +                if ((alignBase < p_CurrB->base) && (end >= p_CurrB->base))
61365 +                {
61366 +                    p_CurrB->base = alignBase;
61367 +                }
61368 +
61369 +                /* if size of the free block is less then alignment
61370 +                 * deletes that free block from the free list. */
61371 +                if ( (p_CurrB->end - p_CurrB->base) < alignment)
61372 +                {
61373 +                    if ( p_PrevB )
61374 +                        p_PrevB->p_Next = p_CurrB->p_Next;
61375 +                    else
61376 +                        p_MM->freeBlocks[i] = p_CurrB->p_Next;
61377 +                    XX_Free(p_CurrB);
61378 +                    p_CurrB = NULL;
61379 +                }
61380 +                break;
61381 +            }
61382 +            else
61383 +            {
61384 +                p_PrevB = p_CurrB;
61385 +                p_CurrB = p_CurrB->p_Next;
61386 +            }
61387 +        }
61388 +
61389 +        /* If no free block found to be updated, insert a new free block
61390 +         * to the end of the free list.
61391 +         */
61392 +        if ( !p_CurrB && ((((uint64_t)(end-base)) & ((uint64_t)(alignment-1))) == 0) )
61393 +        {
61394 +            if ((p_NewB = CreateFreeBlock(alignBase, end-base)) == NULL)
61395 +                RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61396 +
61397 +            if (p_PrevB)
61398 +                p_PrevB->p_Next = p_NewB;
61399 +            else
61400 +                p_MM->freeBlocks[i] = p_NewB;
61401 +        }
61402 +
61403 +        /* Update boundaries of the new free block */
61404 +        if ((alignment == 1) && !p_NewB)
61405 +        {
61406 +            if ( p_CurrB && base > p_CurrB->base )
61407 +                base = p_CurrB->base;
61408 +            if ( p_CurrB && end < p_CurrB->end )
61409 +                end = p_CurrB->end;
61410 +        }
61411 +    }
61412 +
61413 +    return (E_OK);
61414 +}
61415 +
61416 +/****************************************************************
61417 + *  Routine:      CutFree
61418 + *
61419 + *  Description:
61420 + *      Cuts a free block from holdBase to holdEnd from the free lists.
61421 + *      That is, it updates all free lists of the MM object do
61422 + *      not include a block of memory from holdBase to holdEnd.
61423 + *      For each free lists it seek for a free block that holds
61424 + *      either holdBase or holdEnd. If such block is found it updates it.
61425 + *
61426 + *  Arguments:
61427 + *      p_MM            - pointer to the MM object
61428 + *      holdBase        - base address of the allocated block
61429 + *      holdEnd         - end address of the allocated block
61430 + *
61431 + *  Return value:
61432 + *      E_OK is returned on success,
61433 + *      otherwise returns an error code.
61434 + *
61435 + ****************************************************************/
61436 +static t_Error CutFree(t_MM *p_MM, uint64_t holdBase, uint64_t holdEnd)
61437 +{
61438 +    t_FreeBlock *p_PrevB, *p_CurrB, *p_NewB;
61439 +    uint64_t    alignBase, base, end;
61440 +    uint64_t    alignment;
61441 +    int         i;
61442 +
61443 +    for (i=0; i <= MM_MAX_ALIGNMENT; i++)
61444 +    {
61445 +        p_PrevB = p_NewB = 0;
61446 +        p_CurrB = p_MM->freeBlocks[i];
61447 +
61448 +        alignment = (uint64_t)(0x1 << i);
61449 +        alignBase = MAKE_ALIGNED(holdEnd, alignment);
61450 +
61451 +        while ( p_CurrB )
61452 +        {
61453 +            base = p_CurrB->base;
61454 +            end = p_CurrB->end;
61455 +
61456 +            if ( (holdBase <= base) && (holdEnd <= end) && (holdEnd > base) )
61457 +            {
61458 +                if ( alignBase >= end ||
61459 +                     (alignBase < end && ((end-alignBase) < alignment)) )
61460 +                {
61461 +                    if (p_PrevB)
61462 +                        p_PrevB->p_Next = p_CurrB->p_Next;
61463 +                    else
61464 +                        p_MM->freeBlocks[i] = p_CurrB->p_Next;
61465 +                    XX_Free(p_CurrB);
61466 +                }
61467 +                else
61468 +                {
61469 +                    p_CurrB->base = alignBase;
61470 +                }
61471 +                break;
61472 +            }
61473 +            else if ( (holdBase > base) && (holdEnd <= end) )
61474 +            {
61475 +                if ( (holdBase-base) >= alignment )
61476 +                {
61477 +                    if ( (alignBase < end) && ((end-alignBase) >= alignment) )
61478 +                    {
61479 +                        if ((p_NewB = CreateFreeBlock(alignBase, end-alignBase)) == NULL)
61480 +                            RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61481 +                        p_NewB->p_Next = p_CurrB->p_Next;
61482 +                        p_CurrB->p_Next = p_NewB;
61483 +                    }
61484 +                    p_CurrB->end = holdBase;
61485 +                }
61486 +                else if ( (alignBase < end) && ((end-alignBase) >= alignment) )
61487 +                {
61488 +                    p_CurrB->base = alignBase;
61489 +                }
61490 +                else
61491 +                {
61492 +                    if (p_PrevB)
61493 +                        p_PrevB->p_Next = p_CurrB->p_Next;
61494 +                    else
61495 +                        p_MM->freeBlocks[i] = p_CurrB->p_Next;
61496 +                    XX_Free(p_CurrB);
61497 +                }
61498 +                break;
61499 +            }
61500 +            else
61501 +            {
61502 +                p_PrevB = p_CurrB;
61503 +                p_CurrB = p_CurrB->p_Next;
61504 +            }
61505 +        }
61506 +    }
61507 +
61508 +    return (E_OK);
61509 +}
61510 +
61511 +/****************************************************************
61512 + *  Routine:     AddBusy
61513 + *
61514 + *  Description:
61515 + *      Adds a new busy block to the list of busy blocks. Note,
61516 + *      that all busy blocks are ordered by their base address in
61517 + *      the busy list.
61518 + *
61519 + *  Arguments:
61520 + *      MM              - handler to the MM object
61521 + *      p_NewBusyB      - pointer to the a busy block
61522 + *
61523 + *  Return value:
61524 + *      None.
61525 + *
61526 + ****************************************************************/
61527 +static void AddBusy(t_MM *p_MM, t_BusyBlock *p_NewBusyB)
61528 +{
61529 +    t_BusyBlock *p_CurrBusyB, *p_PrevBusyB;
61530 +
61531 +    /* finds a place of a new busy block in the list of busy blocks */
61532 +    p_PrevBusyB = 0;
61533 +    p_CurrBusyB = p_MM->busyBlocks;
61534 +
61535 +    while ( p_CurrBusyB && p_NewBusyB->base > p_CurrBusyB->base )
61536 +    {
61537 +        p_PrevBusyB = p_CurrBusyB;
61538 +        p_CurrBusyB = p_CurrBusyB->p_Next;
61539 +    }
61540 +
61541 +    /* insert the new busy block into the list of busy blocks */
61542 +    if ( p_CurrBusyB )
61543 +        p_NewBusyB->p_Next = p_CurrBusyB;
61544 +    if ( p_PrevBusyB )
61545 +        p_PrevBusyB->p_Next = p_NewBusyB;
61546 +    else
61547 +        p_MM->busyBlocks = p_NewBusyB;
61548 +}
61549 +
61550 +/****************************************************************
61551 + *  Routine:    CutBusy
61552 + *
61553 + *  Description:
61554 + *      Cuts a block from base to end from the list of busy blocks.
61555 + *      This is done by updating the list of busy blocks do not
61556 + *      include a given block, that block is going to be free. If a
61557 + *      given block is a part of some other busy block, so that
61558 + *      busy block is updated. If there are number of busy blocks
61559 + *      included in the given block, so all that blocks are removed
61560 + *      from the busy list and the end blocks are updated.
61561 + *      If the given block devides some block into two parts, a new
61562 + *      busy block is added to the busy list.
61563 + *
61564 + *  Arguments:
61565 + *      p_MM  - pointer to the MM object
61566 + *      base  - base address of a given busy block
61567 + *      end   - end address of a given busy block
61568 + *
61569 + *  Return value:
61570 + *      E_OK on success, E_NOMEMORY otherwise.
61571 + *
61572 + ****************************************************************/
61573 +static t_Error CutBusy(t_MM *p_MM, uint64_t base, uint64_t end)
61574 +{
61575 +    t_BusyBlock  *p_CurrB, *p_PrevB, *p_NewB;
61576 +
61577 +    p_CurrB = p_MM->busyBlocks;
61578 +    p_PrevB = p_NewB = 0;
61579 +
61580 +    while ( p_CurrB )
61581 +    {
61582 +        if ( base < p_CurrB->end )
61583 +        {
61584 +            if ( end > p_CurrB->end )
61585 +            {
61586 +                t_BusyBlock *p_NextB;
61587 +                while ( p_CurrB->p_Next && end >= p_CurrB->p_Next->end )
61588 +                {
61589 +                    p_NextB = p_CurrB->p_Next;
61590 +                    p_CurrB->p_Next = p_CurrB->p_Next->p_Next;
61591 +                    XX_Free(p_NextB);
61592 +                }
61593 +
61594 +                p_NextB = p_CurrB->p_Next;
61595 +                if ( p_NextB && end > p_NextB->base )
61596 +                {
61597 +                    p_NextB->base = end;
61598 +                }
61599 +            }
61600 +
61601 +            if ( base <= p_CurrB->base )
61602 +            {
61603 +                if ( end < p_CurrB->end && end > p_CurrB->base )
61604 +                {
61605 +                    p_CurrB->base = end;
61606 +                }
61607 +                else if ( end >= p_CurrB->end )
61608 +                {
61609 +                    if ( p_PrevB )
61610 +                        p_PrevB->p_Next = p_CurrB->p_Next;
61611 +                    else
61612 +                        p_MM->busyBlocks = p_CurrB->p_Next;
61613 +                    XX_Free(p_CurrB);
61614 +                }
61615 +            }
61616 +            else
61617 +            {
61618 +                if ( end < p_CurrB->end && end > p_CurrB->base )
61619 +                {
61620 +                    if ((p_NewB = CreateBusyBlock(end,
61621 +                                                  p_CurrB->end-end,
61622 +                                                  p_CurrB->name)) == NULL)
61623 +                        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61624 +                    p_NewB->p_Next = p_CurrB->p_Next;
61625 +                    p_CurrB->p_Next = p_NewB;
61626 +                }
61627 +                p_CurrB->end = base;
61628 +            }
61629 +            break;
61630 +        }
61631 +        else
61632 +        {
61633 +            p_PrevB = p_CurrB;
61634 +            p_CurrB = p_CurrB->p_Next;
61635 +        }
61636 +    }
61637 +
61638 +    return (E_OK);
61639 +}
61640 +
61641 +/****************************************************************
61642 + *  Routine:     MmGetGreaterAlignment
61643 + *
61644 + *  Description:
61645 + *      Allocates a block of memory according to the given size
61646 + *      and the alignment. That routine is called from the MM_Get
61647 + *      routine if the required alignment is greater then MM_MAX_ALIGNMENT.
61648 + *      In that case, it goes over free blocks of 64 byte align list
61649 + *      and checks if it has the required size of bytes of the required
61650 + *      alignment. If no blocks found returns ILLEGAL_BASE.
61651 + *      After the block is found and data is allocated, it calls
61652 + *      the internal CutFree routine to update all free lists
61653 + *      do not include a just allocated block. Of course, each
61654 + *      free list contains a free blocks with the same alignment.
61655 + *      It is also creates a busy block that holds
61656 + *      information about an allocated block.
61657 + *
61658 + *  Arguments:
61659 + *      MM              - handle to the MM object
61660 + *      size            - size of the MM
61661 + *      alignment       - index as a power of two defines
61662 + *                        a required alignment that is greater then 64.
61663 + *      name            - the name that specifies an allocated block.
61664 + *
61665 + *  Return value:
61666 + *      base address of an allocated block.
61667 + *      ILLEGAL_BASE if can't allocate a block
61668 + *
61669 + ****************************************************************/
61670 +static uint64_t MmGetGreaterAlignment(t_MM *p_MM, uint64_t size, uint64_t alignment, char* name)
61671 +{
61672 +    t_FreeBlock *p_FreeB;
61673 +    t_BusyBlock *p_NewBusyB;
61674 +    uint64_t    holdBase, holdEnd, alignBase = 0;
61675 +
61676 +    /* goes over free blocks of the 64 byte alignment list
61677 +       and look for a block of the suitable size and
61678 +       base address according to the alignment. */
61679 +    p_FreeB = p_MM->freeBlocks[MM_MAX_ALIGNMENT];
61680 +
61681 +    while ( p_FreeB )
61682 +    {
61683 +        alignBase = MAKE_ALIGNED(p_FreeB->base, alignment);
61684 +
61685 +        /* the block is found if the aligned base inside the block
61686 +         * and has the anough size. */
61687 +        if ( alignBase >= p_FreeB->base &&
61688 +             alignBase < p_FreeB->end &&
61689 +             size <= (p_FreeB->end - alignBase) )
61690 +            break;
61691 +        else
61692 +            p_FreeB = p_FreeB->p_Next;
61693 +    }
61694 +
61695 +    /* If such block isn't found */
61696 +    if ( !p_FreeB )
61697 +        return (uint64_t)(ILLEGAL_BASE);
61698 +
61699 +    holdBase = alignBase;
61700 +    holdEnd = alignBase + size;
61701 +
61702 +    /* init a new busy block */
61703 +    if ((p_NewBusyB = CreateBusyBlock(holdBase, size, name)) == NULL)
61704 +        return (uint64_t)(ILLEGAL_BASE);
61705 +
61706 +    /* calls Update routine to update a lists of free blocks */
61707 +    if ( CutFree ( p_MM, holdBase, holdEnd ) != E_OK )
61708 +    {
61709 +        XX_Free(p_NewBusyB);
61710 +        return (uint64_t)(ILLEGAL_BASE);
61711 +    }
61712 +
61713 +    /* insert the new busy block into the list of busy blocks */
61714 +    AddBusy ( p_MM, p_NewBusyB );
61715 +
61716 +    return (holdBase);
61717 +}
61718 +
61719 +
61720 +/**********************************************************************
61721 + *                     MM API routines set                            *
61722 + **********************************************************************/
61723 +
61724 +/*****************************************************************************/
61725 +t_Error MM_Init(t_Handle *h_MM, uint64_t base, uint64_t size)
61726 +{
61727 +    t_MM        *p_MM;
61728 +    uint64_t    newBase, newSize;
61729 +    int         i;
61730 +
61731 +    if (!size)
61732 +    {
61733 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Size (should be positive)"));
61734 +    }
61735 +
61736 +    /* Initializes a new MM object */
61737 +    p_MM = (t_MM *)XX_Malloc(sizeof(t_MM));
61738 +    if (!p_MM)
61739 +    {
61740 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61741 +    }
61742 +
61743 +    p_MM->h_Spinlock = XX_InitSpinlock();
61744 +    if (!p_MM->h_Spinlock)
61745 +    {
61746 +        XX_Free(p_MM);
61747 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MM spinlock!"));
61748 +    }
61749 +
61750 +    /* Initializes counter of free memory to total size */
61751 +    p_MM->freeMemSize = size;
61752 +
61753 +    /* A busy list is empty */
61754 +    p_MM->busyBlocks = 0;
61755 +
61756 +    /* Initializes a new memory block */
61757 +    if ((p_MM->memBlocks = CreateNewBlock(base, size)) == NULL)
61758 +    {
61759 +        MM_Free(p_MM);
61760 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61761 +    }
61762 +
61763 +    /* Initializes a new free block for each free list*/
61764 +    for (i=0; i <= MM_MAX_ALIGNMENT; i++)
61765 +    {
61766 +        newBase = MAKE_ALIGNED( base, (0x1 << i) );
61767 +        newSize = size - (newBase - base);
61768 +
61769 +        if ((p_MM->freeBlocks[i] = CreateFreeBlock(newBase, newSize)) == NULL)
61770 +        {
61771 +            MM_Free(p_MM);
61772 +            RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
61773 +        }
61774 +    }
61775 +
61776 +    *h_MM = p_MM;
61777 +
61778 +    return (E_OK);
61779 +}
61780 +
61781 +/*****************************************************************************/
61782 +void MM_Free(t_Handle h_MM)
61783 +{
61784 +    t_MM        *p_MM = (t_MM *)h_MM;
61785 +    t_MemBlock  *p_MemBlock;
61786 +    t_BusyBlock *p_BusyBlock;
61787 +    t_FreeBlock *p_FreeBlock;
61788 +    void        *p_Block;
61789 +    int         i;
61790 +
61791 +    ASSERT_COND(p_MM);
61792 +
61793 +    /* release memory allocated for busy blocks */
61794 +    p_BusyBlock = p_MM->busyBlocks;
61795 +    while ( p_BusyBlock )
61796 +    {
61797 +        p_Block = p_BusyBlock;
61798 +        p_BusyBlock = p_BusyBlock->p_Next;
61799 +        XX_Free(p_Block);
61800 +    }
61801 +
61802 +    /* release memory allocated for free blocks */
61803 +    for (i=0; i <= MM_MAX_ALIGNMENT; i++)
61804 +    {
61805 +        p_FreeBlock = p_MM->freeBlocks[i];
61806 +        while ( p_FreeBlock )
61807 +        {
61808 +            p_Block = p_FreeBlock;
61809 +            p_FreeBlock = p_FreeBlock->p_Next;
61810 +            XX_Free(p_Block);
61811 +        }
61812 +    }
61813 +
61814 +    /* release memory allocated for memory blocks */
61815 +    p_MemBlock = p_MM->memBlocks;
61816 +    while ( p_MemBlock )
61817 +    {
61818 +        p_Block = p_MemBlock;
61819 +        p_MemBlock = p_MemBlock->p_Next;
61820 +        XX_Free(p_Block);
61821 +    }
61822 +
61823 +    if (p_MM->h_Spinlock)
61824 +        XX_FreeSpinlock(p_MM->h_Spinlock);
61825 +
61826 +    /* release memory allocated for MM object itself */
61827 +    XX_Free(p_MM);
61828 +}
61829 +
61830 +/*****************************************************************************/
61831 +uint64_t MM_Get(t_Handle h_MM, uint64_t size, uint64_t alignment, char* name)
61832 +{
61833 +    t_MM        *p_MM = (t_MM *)h_MM;
61834 +    t_FreeBlock *p_FreeB;
61835 +    t_BusyBlock *p_NewBusyB;
61836 +    uint64_t    holdBase, holdEnd, j, i = 0;
61837 +    uint32_t    intFlags;
61838 +
61839 +    SANITY_CHECK_RETURN_VALUE(p_MM, E_INVALID_HANDLE, (uint64_t)ILLEGAL_BASE);
61840 +
61841 +    /* checks that alignment value is greater then zero */
61842 +    if (alignment == 0)
61843 +    {
61844 +        alignment = 1;
61845 +    }
61846 +
61847 +    j = alignment;
61848 +
61849 +    /* checks if alignment is a power of two, if it correct and if the
61850 +       required size is multiple of the given alignment. */
61851 +    while ((j & 0x1) == 0)
61852 +    {
61853 +        i++;
61854 +        j = j >> 1;
61855 +    }
61856 +
61857 +    /* if the given alignment isn't power of two, returns an error */
61858 +    if (j != 1)
61859 +    {
61860 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("alignment (should be power of 2)"));
61861 +        return (uint64_t)ILLEGAL_BASE;
61862 +    }
61863 +
61864 +    if (i > MM_MAX_ALIGNMENT)
61865 +    {
61866 +        return (MmGetGreaterAlignment(p_MM, size, alignment, name));
61867 +    }
61868 +
61869 +    intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
61870 +    /* look for a block of the size greater or equal to the required size. */
61871 +    p_FreeB = p_MM->freeBlocks[i];
61872 +    while ( p_FreeB && (p_FreeB->end - p_FreeB->base) < size )
61873 +        p_FreeB = p_FreeB->p_Next;
61874 +
61875 +    /* If such block is found */
61876 +    if ( !p_FreeB )
61877 +    {
61878 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61879 +        return (uint64_t)(ILLEGAL_BASE);
61880 +    }
61881 +
61882 +    holdBase = p_FreeB->base;
61883 +    holdEnd = holdBase + size;
61884 +
61885 +    /* init a new busy block */
61886 +    if ((p_NewBusyB = CreateBusyBlock(holdBase, size, name)) == NULL)
61887 +    {
61888 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61889 +        return (uint64_t)(ILLEGAL_BASE);
61890 +    }
61891 +
61892 +    /* calls Update routine to update a lists of free blocks */
61893 +    if ( CutFree ( p_MM, holdBase, holdEnd ) != E_OK )
61894 +    {
61895 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61896 +        XX_Free(p_NewBusyB);
61897 +        return (uint64_t)(ILLEGAL_BASE);
61898 +    }
61899 +
61900 +    /* Decreasing the allocated memory size from free memory size */
61901 +    p_MM->freeMemSize -= size;
61902 +
61903 +    /* insert the new busy block into the list of busy blocks */
61904 +    AddBusy ( p_MM, p_NewBusyB );
61905 +    XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61906 +
61907 +    return (holdBase);
61908 +}
61909 +
61910 +/*****************************************************************************/
61911 +uint64_t MM_GetForce(t_Handle h_MM, uint64_t base, uint64_t size, char* name)
61912 +{
61913 +    t_MM        *p_MM = (t_MM *)h_MM;
61914 +    t_FreeBlock *p_FreeB;
61915 +    t_BusyBlock *p_NewBusyB;
61916 +    uint32_t    intFlags;
61917 +    bool        blockIsFree = FALSE;
61918 +
61919 +    ASSERT_COND(p_MM);
61920 +
61921 +    intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
61922 +    p_FreeB = p_MM->freeBlocks[0]; /* The biggest free blocks are in the
61923 +                                      free list with alignment 1 */
61924 +
61925 +    while ( p_FreeB )
61926 +    {
61927 +        if ( base >= p_FreeB->base && (base+size) <= p_FreeB->end )
61928 +        {
61929 +            blockIsFree = TRUE;
61930 +            break;
61931 +        }
61932 +        else
61933 +            p_FreeB = p_FreeB->p_Next;
61934 +    }
61935 +
61936 +    if ( !blockIsFree )
61937 +    {
61938 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61939 +        return (uint64_t)(ILLEGAL_BASE);
61940 +    }
61941 +
61942 +    /* init a new busy block */
61943 +    if ((p_NewBusyB = CreateBusyBlock(base, size, name)) == NULL)
61944 +    {
61945 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61946 +        return (uint64_t)(ILLEGAL_BASE);
61947 +    }
61948 +
61949 +    /* calls Update routine to update a lists of free blocks */
61950 +    if ( CutFree ( p_MM, base, base+size ) != E_OK )
61951 +    {
61952 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61953 +        XX_Free(p_NewBusyB);
61954 +        return (uint64_t)(ILLEGAL_BASE);
61955 +    }
61956 +
61957 +    /* Decreasing the allocated memory size from free memory size */
61958 +    p_MM->freeMemSize -= size;
61959 +
61960 +    /* insert the new busy block into the list of busy blocks */
61961 +    AddBusy ( p_MM, p_NewBusyB );
61962 +    XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
61963 +
61964 +    return (base);
61965 +}
61966 +
61967 +/*****************************************************************************/
61968 +uint64_t MM_GetForceMin(t_Handle h_MM, uint64_t size, uint64_t alignment, uint64_t min, char* name)
61969 +{
61970 +    t_MM        *p_MM = (t_MM *)h_MM;
61971 +    t_FreeBlock *p_FreeB;
61972 +    t_BusyBlock *p_NewBusyB;
61973 +    uint64_t    holdBase, holdEnd, j = alignment, i=0;
61974 +    uint32_t    intFlags;
61975 +
61976 +    ASSERT_COND(p_MM);
61977 +
61978 +    /* checks if alignment is a power of two, if it correct and if the
61979 +       required size is multiple of the given alignment. */
61980 +    while ((j & 0x1) == 0)
61981 +    {
61982 +        i++;
61983 +        j = j >> 1;
61984 +    }
61985 +
61986 +    if ( (j != 1) || (i > MM_MAX_ALIGNMENT) )
61987 +    {
61988 +        return (uint64_t)(ILLEGAL_BASE);
61989 +    }
61990 +
61991 +    intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
61992 +    p_FreeB = p_MM->freeBlocks[i];
61993 +
61994 +    /* look for the first block that contains the minimum
61995 +       base address. If the whole required size may be fit
61996 +       into it, use that block, otherwise look for the next
61997 +       block of size greater or equal to the required size. */
61998 +    while ( p_FreeB && (min >= p_FreeB->end))
61999 +            p_FreeB = p_FreeB->p_Next;
62000 +
62001 +    /* If such block is found */
62002 +    if ( !p_FreeB )
62003 +    {
62004 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62005 +        return (uint64_t)(ILLEGAL_BASE);
62006 +    }
62007 +
62008 +    /* if this block is large enough, use this block */
62009 +    holdBase = ( min <= p_FreeB->base ) ? p_FreeB->base : min;
62010 +    if ((holdBase + size) <= p_FreeB->end )
62011 +    {
62012 +        holdEnd = holdBase + size;
62013 +    }
62014 +    else
62015 +    {
62016 +        p_FreeB = p_FreeB->p_Next;
62017 +        while ( p_FreeB && ((p_FreeB->end - p_FreeB->base) < size) )
62018 +            p_FreeB = p_FreeB->p_Next;
62019 +
62020 +        /* If such block is found */
62021 +        if ( !p_FreeB )
62022 +        {
62023 +            XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62024 +            return (uint64_t)(ILLEGAL_BASE);
62025 +        }
62026 +
62027 +        holdBase = p_FreeB->base;
62028 +        holdEnd = holdBase + size;
62029 +    }
62030 +
62031 +    /* init a new busy block */
62032 +    if ((p_NewBusyB = CreateBusyBlock(holdBase, size, name)) == NULL)
62033 +    {
62034 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62035 +        return (uint64_t)(ILLEGAL_BASE);
62036 +    }
62037 +
62038 +    /* calls Update routine to update a lists of free blocks */
62039 +    if ( CutFree( p_MM, holdBase, holdEnd ) != E_OK )
62040 +    {
62041 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62042 +        XX_Free(p_NewBusyB);
62043 +        return (uint64_t)(ILLEGAL_BASE);
62044 +    }
62045 +
62046 +    /* Decreasing the allocated memory size from free memory size */
62047 +    p_MM->freeMemSize -= size;
62048 +
62049 +    /* insert the new busy block into the list of busy blocks */
62050 +    AddBusy( p_MM, p_NewBusyB );
62051 +    XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62052 +
62053 +    return (holdBase);
62054 +}
62055 +
62056 +/*****************************************************************************/
62057 +uint64_t MM_Put(t_Handle h_MM, uint64_t base)
62058 +{
62059 +    t_MM        *p_MM = (t_MM *)h_MM;
62060 +    t_BusyBlock *p_BusyB, *p_PrevBusyB;
62061 +    uint64_t    size;
62062 +    uint32_t    intFlags;
62063 +
62064 +    ASSERT_COND(p_MM);
62065 +
62066 +    /* Look for a busy block that have the given base value.
62067 +     * That block will be returned back to the memory.
62068 +     */
62069 +    p_PrevBusyB = 0;
62070 +
62071 +    intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
62072 +    p_BusyB = p_MM->busyBlocks;
62073 +    while ( p_BusyB && base != p_BusyB->base )
62074 +    {
62075 +        p_PrevBusyB = p_BusyB;
62076 +        p_BusyB = p_BusyB->p_Next;
62077 +    }
62078 +
62079 +    if ( !p_BusyB )
62080 +    {
62081 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62082 +        return (uint64_t)(0);
62083 +    }
62084 +
62085 +    if ( AddFree( p_MM, p_BusyB->base, p_BusyB->end ) != E_OK )
62086 +    {
62087 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62088 +        return (uint64_t)(0);
62089 +    }
62090 +
62091 +    /* removes a busy block form the list of busy blocks */
62092 +    if ( p_PrevBusyB )
62093 +        p_PrevBusyB->p_Next = p_BusyB->p_Next;
62094 +    else
62095 +        p_MM->busyBlocks = p_BusyB->p_Next;
62096 +
62097 +    size = p_BusyB->end - p_BusyB->base;
62098 +
62099 +    /* Adding the deallocated memory size to free memory size */
62100 +    p_MM->freeMemSize += size;
62101 +
62102 +    XX_Free(p_BusyB);
62103 +    XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62104 +
62105 +    return (size);
62106 +}
62107 +
62108 +/*****************************************************************************/
62109 +uint64_t MM_PutForce(t_Handle h_MM, uint64_t base, uint64_t size)
62110 +{
62111 +    t_MM        *p_MM = (t_MM *)h_MM;
62112 +    uint64_t    end = base + size;
62113 +    uint32_t    intFlags;
62114 +
62115 +    ASSERT_COND(p_MM);
62116 +
62117 +    intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
62118 +
62119 +    if ( CutBusy( p_MM, base, end ) != E_OK )
62120 +    {
62121 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62122 +        return (uint64_t)(0);
62123 +    }
62124 +
62125 +    if ( AddFree ( p_MM, base, end ) != E_OK )
62126 +    {
62127 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62128 +        return (uint64_t)(0);
62129 +    }
62130 +
62131 +    /* Adding the deallocated memory size to free memory size */
62132 +    p_MM->freeMemSize += size;
62133 +
62134 +    XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62135 +
62136 +    return (size);
62137 +}
62138 +
62139 +/*****************************************************************************/
62140 +t_Error MM_Add(t_Handle h_MM, uint64_t base, uint64_t size)
62141 +{
62142 +    t_MM        *p_MM = (t_MM *)h_MM;
62143 +    t_MemBlock  *p_MemB, *p_NewMemB;
62144 +    t_Error     errCode;
62145 +    uint32_t    intFlags;
62146 +
62147 +    ASSERT_COND(p_MM);
62148 +
62149 +    /* find a last block in the list of memory blocks to insert a new
62150 +     * memory block
62151 +     */
62152 +    intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
62153 +
62154 +    p_MemB = p_MM->memBlocks;
62155 +    while ( p_MemB->p_Next )
62156 +    {
62157 +        if ( base >= p_MemB->base && base < p_MemB->end )
62158 +        {
62159 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62160 +            RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
62161 +        }
62162 +        p_MemB = p_MemB->p_Next;
62163 +    }
62164 +    /* check for a last memory block */
62165 +    if ( base >= p_MemB->base && base < p_MemB->end )
62166 +    {
62167 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62168 +        RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
62169 +    }
62170 +
62171 +    /* create a new memory block */
62172 +    if ((p_NewMemB = CreateNewBlock(base, size)) == NULL)
62173 +    {
62174 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62175 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
62176 +    }
62177 +
62178 +    /* append a new memory block to the end of the list of memory blocks */
62179 +    p_MemB->p_Next = p_NewMemB;
62180 +
62181 +    /* add a new free block to the free lists */
62182 +    errCode = AddFree(p_MM, base, base+size);
62183 +    if (errCode)
62184 +    {
62185 +        XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62186 +        p_MemB->p_Next = 0;
62187 +        XX_Free(p_NewMemB);
62188 +        return ((t_Error)errCode);
62189 +    }
62190 +
62191 +    /* Adding the new block size to free memory size */
62192 +    p_MM->freeMemSize += size;
62193 +
62194 +    XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
62195 +
62196 +    return (E_OK);
62197 +}
62198 +
62199 +/*****************************************************************************/
62200 +uint64_t MM_GetMemBlock(t_Handle h_MM, int index)
62201 +{
62202 +    t_MM       *p_MM = (t_MM*)h_MM;
62203 +    t_MemBlock *p_MemBlock;
62204 +    int         i;
62205 +
62206 +    ASSERT_COND(p_MM);
62207 +
62208 +    p_MemBlock = p_MM->memBlocks;
62209 +    for (i=0; i < index; i++)
62210 +        p_MemBlock = p_MemBlock->p_Next;
62211 +
62212 +    if ( p_MemBlock )
62213 +        return (p_MemBlock->base);
62214 +    else
62215 +        return (uint64_t)ILLEGAL_BASE;
62216 +}
62217 +
62218 +/*****************************************************************************/
62219 +uint64_t MM_GetBase(t_Handle h_MM)
62220 +{
62221 +    t_MM       *p_MM = (t_MM*)h_MM;
62222 +    t_MemBlock *p_MemBlock;
62223 +
62224 +    ASSERT_COND(p_MM);
62225 +
62226 +    p_MemBlock = p_MM->memBlocks;
62227 +    return  p_MemBlock->base;
62228 +}
62229 +
62230 +/*****************************************************************************/
62231 +bool MM_InRange(t_Handle h_MM, uint64_t addr)
62232 +{
62233 +    t_MM       *p_MM = (t_MM*)h_MM;
62234 +    t_MemBlock *p_MemBlock;
62235 +
62236 +    ASSERT_COND(p_MM);
62237 +
62238 +    p_MemBlock = p_MM->memBlocks;
62239 +
62240 +    if ((addr >= p_MemBlock->base) && (addr < p_MemBlock->end))
62241 +        return TRUE;
62242 +    else
62243 +        return FALSE;
62244 +}
62245 +
62246 +/*****************************************************************************/
62247 +uint64_t MM_GetFreeMemSize(t_Handle h_MM)
62248 +{
62249 +    t_MM       *p_MM = (t_MM*)h_MM;
62250 +
62251 +    ASSERT_COND(p_MM);
62252 +
62253 +    return p_MM->freeMemSize;
62254 +}
62255 +
62256 +/*****************************************************************************/
62257 +void MM_Dump(t_Handle h_MM)
62258 +{
62259 +    t_MM        *p_MM = (t_MM *)h_MM;
62260 +    t_FreeBlock *p_FreeB;
62261 +    t_BusyBlock *p_BusyB;
62262 +    int          i;
62263 +
62264 +    p_BusyB = p_MM->busyBlocks;
62265 +    XX_Print("List of busy blocks:\n");
62266 +    while (p_BusyB)
62267 +    {
62268 +        XX_Print("\t0x%p: (%s: b=0x%llx, e=0x%llx)\n", p_BusyB, p_BusyB->name, p_BusyB->base, p_BusyB->end );
62269 +        p_BusyB = p_BusyB->p_Next;
62270 +    }
62271 +
62272 +    XX_Print("\nLists of free blocks according to alignment:\n");
62273 +    for (i=0; i <= MM_MAX_ALIGNMENT; i++)
62274 +    {
62275 +        XX_Print("%d alignment:\n", (0x1 << i));
62276 +        p_FreeB = p_MM->freeBlocks[i];
62277 +        while (p_FreeB)
62278 +        {
62279 +            XX_Print("\t0x%p: (b=0x%llx, e=0x%llx)\n", p_FreeB, p_FreeB->base, p_FreeB->end);
62280 +            p_FreeB = p_FreeB->p_Next;
62281 +        }
62282 +        XX_Print("\n");
62283 +    }
62284 +}
62285 --- /dev/null
62286 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/mm.h
62287 @@ -0,0 +1,105 @@
62288 +/*
62289 + * Copyright 2008-2012 Freescale Semiconductor Inc.
62290 + *
62291 + * Redistribution and use in source and binary forms, with or without
62292 + * modification, are permitted provided that the following conditions are met:
62293 + *     * Redistributions of source code must retain the above copyright
62294 + *       notice, this list of conditions and the following disclaimer.
62295 + *     * Redistributions in binary form must reproduce the above copyright
62296 + *       notice, this list of conditions and the following disclaimer in the
62297 + *       documentation and/or other materials provided with the distribution.
62298 + *     * Neither the name of Freescale Semiconductor nor the
62299 + *       names of its contributors may be used to endorse or promote products
62300 + *       derived from this software without specific prior written permission.
62301 + *
62302 + *
62303 + * ALTERNATIVELY, this software may be distributed under the terms of the
62304 + * GNU General Public License ("GPL") as published by the Free Software
62305 + * Foundation, either version 2 of that License or (at your option) any
62306 + * later version.
62307 + *
62308 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
62309 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
62310 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
62311 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
62312 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62313 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
62314 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62315 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62316 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
62317 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62318 + */
62319 +
62320 +
62321 +/****************************************************************
62322 + *
62323 + * File:  mm.h
62324 + *
62325 + *
62326 + * Description:
62327 + *  MM (Memory Management) object definitions.
62328 + *  It also includes definitions of the Free Block, Busy Block
62329 + *  and Memory Block structures used by the MM object.
62330 + *
62331 + ****************************************************************/
62332 +
62333 +#ifndef __MM_H
62334 +#define __MM_H
62335 +
62336 +
62337 +#include "mm_ext.h"
62338 +
62339 +#define __ERR_MODULE__  MODULE_MM
62340 +
62341 +
62342 +#define MAKE_ALIGNED(addr, align)    \
62343 +    (((uint64_t)(addr) + ((align) - 1)) & (~(((uint64_t)align) - 1)))
62344 +
62345 +
62346 +/* t_MemBlock data structure defines parameters of the Memory Block */
62347 +typedef struct t_MemBlock
62348 +{
62349 +    struct t_MemBlock *p_Next;      /* Pointer to the next memory block */
62350 +
62351 +    uint64_t  base;                 /* Base address of the memory block */
62352 +    uint64_t  end;                  /* End address of the memory block */
62353 +} t_MemBlock;
62354 +
62355 +
62356 +/* t_FreeBlock data structure defines parameters of the Free Block */
62357 +typedef struct t_FreeBlock
62358 +{
62359 +    struct t_FreeBlock *p_Next;     /* Pointer to the next free block */
62360 +
62361 +    uint64_t  base;                 /* Base address of the block */
62362 +    uint64_t  end;                  /* End address of the block */
62363 +} t_FreeBlock;
62364 +
62365 +
62366 +/* t_BusyBlock data structure defines parameters of the Busy Block  */
62367 +typedef struct t_BusyBlock
62368 +{
62369 +    struct t_BusyBlock *p_Next;         /* Pointer to the next free block */
62370 +
62371 +    uint64_t    base;                   /* Base address of the block */
62372 +    uint64_t    end;                    /* End address of the block */
62373 +    char        name[MM_MAX_NAME_LEN];  /* That block of memory was allocated for
62374 +                                           something specified by the Name */
62375 +} t_BusyBlock;
62376 +
62377 +
62378 +/* t_MM data structure defines parameters of the MM object */
62379 +typedef struct t_MM
62380 +{
62381 +    t_Handle        h_Spinlock;
62382 +
62383 +    t_MemBlock      *memBlocks;     /* List of memory blocks (Memory list) */
62384 +    t_BusyBlock     *busyBlocks;    /* List of busy blocks (Busy list) */
62385 +    t_FreeBlock     *freeBlocks[MM_MAX_ALIGNMENT + 1];
62386 +                                    /* Alignment lists of free blocks (Free lists) */
62387 +
62388 +    uint64_t        freeMemSize;    /* Total size of free memory (in bytes) */
62389 +} t_MM;
62390 +
62391 +
62392 +#endif /* __MM_H */
62393 --- /dev/null
62394 +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/sprint.c
62395 @@ -0,0 +1,81 @@
62396 +/*
62397 + * Copyright 2008-2012 Freescale Semiconductor Inc.
62398 + *
62399 + * Redistribution and use in source and binary forms, with or without
62400 + * modification, are permitted provided that the following conditions are met:
62401 + *     * Redistributions of source code must retain the above copyright
62402 + *       notice, this list of conditions and the following disclaimer.
62403 + *     * Redistributions in binary form must reproduce the above copyright
62404 + *       notice, this list of conditions and the following disclaimer in the
62405 + *       documentation and/or other materials provided with the distribution.
62406 + *     * Neither the name of Freescale Semiconductor nor the
62407 + *       names of its contributors may be used to endorse or promote products
62408 + *       derived from this software without specific prior written permission.
62409 + *
62410 + *
62411 + * ALTERNATIVELY, this software may be distributed under the terms of the
62412 + * GNU General Public License ("GPL") as published by the Free Software
62413 + * Foundation, either version 2 of that License or (at your option) any
62414 + * later version.
62415 + *
62416 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
62417 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
62418 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
62419 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
62420 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62421 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
62422 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62423 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62424 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
62425 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62426 + */
62427 +
62428 +
62429 +/*------------------------------------------------------*/
62430 +/* File: sprint.c                                       */
62431 +/*                                                      */
62432 +/* Description:                                         */
62433 +/*    Debug routines (externals)                        */
62434 +/*------------------------------------------------------*/
62435 +#include "string_ext.h"
62436 +#include "stdlib_ext.h"
62437 +#include "stdarg_ext.h"
62438 +#include "sprint_ext.h"
62439 +#include "std_ext.h"
62440 +#include "xx_ext.h"
62441 +
62442 +
62443 +int Sprint(char * buf, const char *fmt, ...)
62444 +{
62445 +    va_list args;
62446 +    int i;
62447 +
62448 +    va_start(args, fmt);
62449 +    i=vsprintf(buf,fmt,args);
62450 +    va_end(args);
62451 +    return i;
62452 +}
62453 +
62454 +int Snprint(char * buf, uint32_t size, const char *fmt, ...)
62455 +{
62456 +    va_list args;
62457 +    int i;
62458 +
62459 +    va_start(args, fmt);
62460 +    i=vsnprintf(buf,size,fmt,args);
62461 +    va_end(args);
62462 +    return i;
62463 +}
62464 +
62465 +#ifndef NCSW_VXWORKS
62466 +int Sscan(const char * buf, const char * fmt, ...)
62467 +{
62468 +    va_list args;
62469 +    int i;
62470 +
62471 +    va_start(args,fmt);
62472 +    i = vsscanf(buf,fmt,args);
62473 +    va_end(args);
62474 +    return i;
62475 +}
62476 +#endif /* NCSW_VXWORKS */
62477 --- /dev/null
62478 +++ b/drivers/net/ethernet/freescale/sdk_fman/fmanv3h_dflags.h
62479 @@ -0,0 +1,57 @@
62480 +/*
62481 + * Copyright 2012 Freescale Semiconductor Inc.
62482 + *
62483 + * Redistribution and use in source and binary forms, with or without
62484 + * modification, are permitted provided that the following conditions are met:
62485 + *     * Redistributions of source code must retain the above copyright
62486 + *       notice, this list of conditions and the following disclaimer.
62487 + *     * Redistributions in binary form must reproduce the above copyright
62488 + *       notice, this list of conditions and the following disclaimer in the
62489 + *       documentation and/or other materials provided with the distribution.
62490 + *     * Neither the name of Freescale Semiconductor nor the
62491 + *       names of its contributors may be used to endorse or promote products
62492 + *       derived from this software without specific prior written permission.
62493 + *
62494 + *
62495 + * ALTERNATIVELY, this software may be distributed under the terms of the
62496 + * GNU General Public License ("GPL") as published by the Free Software
62497 + * Foundation, either version 2 of that License or (at your option) any
62498 + * later version.
62499 + *
62500 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
62501 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
62502 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
62503 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
62504 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62505 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
62506 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62507 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62508 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
62509 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62510 + */
62511 +
62512 +#ifndef __dflags_h
62513 +#define __dflags_h
62514 +
62515 +
62516 +#define NCSW_LINUX
62517 +
62518 +#define T4240
62519 +#define NCSW_PPC_CORE
62520 +
62521 +#define DEBUG_ERRORS        1
62522 +
62523 +#if defined(DEBUG)
62524 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_INFO
62525 +
62526 +#define DEBUG_XX_MALLOC
62527 +#define DEBUG_MEM_LEAKS
62528 +
62529 +#else
62530 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_WARNING
62531 +#endif /* (DEBUG) */
62532 +
62533 +#define REPORT_EVENTS       1
62534 +#define EVENT_GLOBAL_LEVEL  REPORT_LEVEL_MINOR
62535 +
62536 +#endif /* __dflags_h */
62537 --- /dev/null
62538 +++ b/drivers/net/ethernet/freescale/sdk_fman/fmanv3l_dflags.h
62539 @@ -0,0 +1,56 @@
62540 +/*
62541 + * Copyright 2012 Freescale Semiconductor Inc.
62542 + *
62543 + * Redistribution and use in source and binary forms, with or without
62544 + * modification, are permitted provided that the following conditions are met:
62545 + *     * Redistributions of source code must retain the above copyright
62546 + *       notice, this list of conditions and the following disclaimer.
62547 + *     * Redistributions in binary form must reproduce the above copyright
62548 + *       notice, this list of conditions and the following disclaimer in the
62549 + *       documentation and/or other materials provided with the distribution.
62550 + *     * Neither the name of Freescale Semiconductor nor the
62551 + *       names of its contributors may be used to endorse or promote products
62552 + *       derived from this software without specific prior written permission.
62553 + *
62554 + *
62555 + * ALTERNATIVELY, this software may be distributed under the terms of the
62556 + * GNU General Public License ("GPL") as published by the Free Software
62557 + * Foundation, either version 2 of that License or (at your option) any
62558 + * later version.
62559 + *
62560 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
62561 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
62562 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
62563 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
62564 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62565 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
62566 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62567 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62568 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
62569 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62570 + */
62571 +
62572 +#ifndef __dflags_h
62573 +#define __dflags_h
62574 +
62575 +
62576 +#define NCSW_LINUX
62577 +
62578 +#define NCSW_PPC_CORE
62579 +
62580 +#define DEBUG_ERRORS        1
62581 +
62582 +#if defined(DEBUG)
62583 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_INFO
62584 +
62585 +#define DEBUG_XX_MALLOC
62586 +#define DEBUG_MEM_LEAKS
62587 +
62588 +#else
62589 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_WARNING
62590 +#endif /* (DEBUG) */
62591 +
62592 +#define REPORT_EVENTS       1
62593 +#define EVENT_GLOBAL_LEVEL  REPORT_LEVEL_MINOR
62594 +
62595 +#endif /* __dflags_h */
62596 --- /dev/null
62597 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/crc_mac_addr_ext.h
62598 @@ -0,0 +1,364 @@
62599 +/*
62600 + * Copyright 2008-2012 Freescale Semiconductor Inc.
62601 + *
62602 + * Redistribution and use in source and binary forms, with or without
62603 + * modification, are permitted provided that the following conditions are met:
62604 + *     * Redistributions of source code must retain the above copyright
62605 + *       notice, this list of conditions and the following disclaimer.
62606 + *     * Redistributions in binary form must reproduce the above copyright
62607 + *       notice, this list of conditions and the following disclaimer in the
62608 + *       documentation and/or other materials provided with the distribution.
62609 + *     * Neither the name of Freescale Semiconductor nor the
62610 + *       names of its contributors may be used to endorse or promote products
62611 + *       derived from this software without specific prior written permission.
62612 + *
62613 + *
62614 + * ALTERNATIVELY, this software may be distributed under the terms of the
62615 + * GNU General Public License ("GPL") as published by the Free Software
62616 + * Foundation, either version 2 of that License or (at your option) any
62617 + * later version.
62618 + *
62619 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
62620 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
62621 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
62622 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
62623 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62624 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
62625 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62626 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62627 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
62628 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62629 + */
62630 +
62631 +
62632 +/*------------------------------------------------------*/
62633 +/*                                                      */
62634 +/* File: crc_mac_addr_ext.h                             */
62635 +/*                                                      */
62636 +/* Description:                                         */
62637 +/*    Define a macro that calculate the crc value of    */
62638 +/*    an Ethernet MAC address (48 bitd address          */
62639 +/*------------------------------------------------------*/
62640 +
62641 +#ifndef __crc_mac_addr_ext_h
62642 +#define __crc_mac_addr_ext_h
62643 +
62644 +#include "std_ext.h"
62645 +
62646 +
62647 +static uint32_t crc_table[256] =
62648 +{
62649 +    0x00000000,
62650 +    0x77073096,
62651 +    0xee0e612c,
62652 +    0x990951ba,
62653 +    0x076dc419,
62654 +    0x706af48f,
62655 +    0xe963a535,
62656 +    0x9e6495a3,
62657 +    0x0edb8832,
62658 +    0x79dcb8a4,
62659 +    0xe0d5e91e,
62660 +    0x97d2d988,
62661 +    0x09b64c2b,
62662 +    0x7eb17cbd,
62663 +    0xe7b82d07,
62664 +    0x90bf1d91,
62665 +    0x1db71064,
62666 +    0x6ab020f2,
62667 +    0xf3b97148,
62668 +    0x84be41de,
62669 +    0x1adad47d,
62670 +    0x6ddde4eb,
62671 +    0xf4d4b551,
62672 +    0x83d385c7,
62673 +    0x136c9856,
62674 +    0x646ba8c0,
62675 +    0xfd62f97a,
62676 +    0x8a65c9ec,
62677 +    0x14015c4f,
62678 +    0x63066cd9,
62679 +    0xfa0f3d63,
62680 +    0x8d080df5,
62681 +    0x3b6e20c8,
62682 +    0x4c69105e,
62683 +    0xd56041e4,
62684 +    0xa2677172,
62685 +    0x3c03e4d1,
62686 +    0x4b04d447,
62687 +    0xd20d85fd,
62688 +    0xa50ab56b,
62689 +    0x35b5a8fa,
62690 +    0x42b2986c,
62691 +    0xdbbbc9d6,
62692 +    0xacbcf940,
62693 +    0x32d86ce3,
62694 +    0x45df5c75,
62695 +    0xdcd60dcf,
62696 +    0xabd13d59,
62697 +    0x26d930ac,
62698 +    0x51de003a,
62699 +    0xc8d75180,
62700 +    0xbfd06116,
62701 +    0x21b4f4b5,
62702 +    0x56b3c423,
62703 +    0xcfba9599,
62704 +    0xb8bda50f,
62705 +    0x2802b89e,
62706 +    0x5f058808,
62707 +    0xc60cd9b2,
62708 +    0xb10be924,
62709 +    0x2f6f7c87,
62710 +    0x58684c11,
62711 +    0xc1611dab,
62712 +    0xb6662d3d,
62713 +    0x76dc4190,
62714 +    0x01db7106,
62715 +    0x98d220bc,
62716 +    0xefd5102a,
62717 +    0x71b18589,
62718 +    0x06b6b51f,
62719 +    0x9fbfe4a5,
62720 +    0xe8b8d433,
62721 +    0x7807c9a2,
62722 +    0x0f00f934,
62723 +    0x9609a88e,
62724 +    0xe10e9818,
62725 +    0x7f6a0dbb,
62726 +    0x086d3d2d,
62727 +    0x91646c97,
62728 +    0xe6635c01,
62729 +    0x6b6b51f4,
62730 +    0x1c6c6162,
62731 +    0x856530d8,
62732 +    0xf262004e,
62733 +    0x6c0695ed,
62734 +    0x1b01a57b,
62735 +    0x8208f4c1,
62736 +    0xf50fc457,
62737 +    0x65b0d9c6,
62738 +    0x12b7e950,
62739 +    0x8bbeb8ea,
62740 +    0xfcb9887c,
62741 +    0x62dd1ddf,
62742 +    0x15da2d49,
62743 +    0x8cd37cf3,
62744 +    0xfbd44c65,
62745 +    0x4db26158,
62746 +    0x3ab551ce,
62747 +    0xa3bc0074,
62748 +    0xd4bb30e2,
62749 +    0x4adfa541,
62750 +    0x3dd895d7,
62751 +    0xa4d1c46d,
62752 +    0xd3d6f4fb,
62753 +    0x4369e96a,
62754 +    0x346ed9fc,
62755 +    0xad678846,
62756 +    0xda60b8d0,
62757 +    0x44042d73,
62758 +    0x33031de5,
62759 +    0xaa0a4c5f,
62760 +    0xdd0d7cc9,
62761 +    0x5005713c,
62762 +    0x270241aa,
62763 +    0xbe0b1010,
62764 +    0xc90c2086,
62765 +    0x5768b525,
62766 +    0x206f85b3,
62767 +    0xb966d409,
62768 +    0xce61e49f,
62769 +    0x5edef90e,
62770 +    0x29d9c998,
62771 +    0xb0d09822,
62772 +    0xc7d7a8b4,
62773 +    0x59b33d17,
62774 +    0x2eb40d81,
62775 +    0xb7bd5c3b,
62776 +    0xc0ba6cad,
62777 +    0xedb88320,
62778 +    0x9abfb3b6,
62779 +    0x03b6e20c,
62780 +    0x74b1d29a,
62781 +    0xead54739,
62782 +    0x9dd277af,
62783 +    0x04db2615,
62784 +    0x73dc1683,
62785 +    0xe3630b12,
62786 +    0x94643b84,
62787 +    0x0d6d6a3e,
62788 +    0x7a6a5aa8,
62789 +    0xe40ecf0b,
62790 +    0x9309ff9d,
62791 +    0x0a00ae27,
62792 +    0x7d079eb1,
62793 +    0xf00f9344,
62794 +    0x8708a3d2,
62795 +    0x1e01f268,
62796 +    0x6906c2fe,
62797 +    0xf762575d,
62798 +    0x806567cb,
62799 +    0x196c3671,
62800 +    0x6e6b06e7,
62801 +    0xfed41b76,
62802 +    0x89d32be0,
62803 +    0x10da7a5a,
62804 +    0x67dd4acc,
62805 +    0xf9b9df6f,
62806 +    0x8ebeeff9,
62807 +    0x17b7be43,
62808 +    0x60b08ed5,
62809 +    0xd6d6a3e8,
62810 +    0xa1d1937e,
62811 +    0x38d8c2c4,
62812 +    0x4fdff252,
62813 +    0xd1bb67f1,
62814 +    0xa6bc5767,
62815 +    0x3fb506dd,
62816 +    0x48b2364b,
62817 +    0xd80d2bda,
62818 +    0xaf0a1b4c,
62819 +    0x36034af6,
62820 +    0x41047a60,
62821 +    0xdf60efc3,
62822 +    0xa867df55,
62823 +    0x316e8eef,
62824 +    0x4669be79,
62825 +    0xcb61b38c,
62826 +    0xbc66831a,
62827 +    0x256fd2a0,
62828 +    0x5268e236,
62829 +    0xcc0c7795,
62830 +    0xbb0b4703,
62831 +    0x220216b9,
62832 +    0x5505262f,
62833 +    0xc5ba3bbe,
62834 +    0xb2bd0b28,
62835 +    0x2bb45a92,
62836 +    0x5cb36a04,
62837 +    0xc2d7ffa7,
62838 +    0xb5d0cf31,
62839 +    0x2cd99e8b,
62840 +    0x5bdeae1d,
62841 +    0x9b64c2b0,
62842 +    0xec63f226,
62843 +    0x756aa39c,
62844 +    0x026d930a,
62845 +    0x9c0906a9,
62846 +    0xeb0e363f,
62847 +    0x72076785,
62848 +    0x05005713,
62849 +    0x95bf4a82,
62850 +    0xe2b87a14,
62851 +    0x7bb12bae,
62852 +    0x0cb61b38,
62853 +    0x92d28e9b,
62854 +    0xe5d5be0d,
62855 +    0x7cdcefb7,
62856 +    0x0bdbdf21,
62857 +    0x86d3d2d4,
62858 +    0xf1d4e242,
62859 +    0x68ddb3f8,
62860 +    0x1fda836e,
62861 +    0x81be16cd,
62862 +    0xf6b9265b,
62863 +    0x6fb077e1,
62864 +    0x18b74777,
62865 +    0x88085ae6,
62866 +    0xff0f6a70,
62867 +    0x66063bca,
62868 +    0x11010b5c,
62869 +    0x8f659eff,
62870 +    0xf862ae69,
62871 +    0x616bffd3,
62872 +    0x166ccf45,
62873 +    0xa00ae278,
62874 +    0xd70dd2ee,
62875 +    0x4e048354,
62876 +    0x3903b3c2,
62877 +    0xa7672661,
62878 +    0xd06016f7,
62879 +    0x4969474d,
62880 +    0x3e6e77db,
62881 +    0xaed16a4a,
62882 +    0xd9d65adc,
62883 +    0x40df0b66,
62884 +    0x37d83bf0,
62885 +    0xa9bcae53,
62886 +    0xdebb9ec5,
62887 +    0x47b2cf7f,
62888 +    0x30b5ffe9,
62889 +    0xbdbdf21c,
62890 +    0xcabac28a,
62891 +    0x53b39330,
62892 +    0x24b4a3a6,
62893 +    0xbad03605,
62894 +    0xcdd70693,
62895 +    0x54de5729,
62896 +    0x23d967bf,
62897 +    0xb3667a2e,
62898 +    0xc4614ab8,
62899 +    0x5d681b02,
62900 +    0x2a6f2b94,
62901 +    0xb40bbe37,
62902 +    0xc30c8ea1,
62903 +    0x5a05df1b,
62904 +    0x2d02ef8d
62905 +};
62906 +
62907 +
62908 +#define GET_MAC_ADDR_CRC(addr, crc)             \
62909 +{                                               \
62910 +    uint32_t    i;                              \
62911 +    uint8_t     data;                           \
62912 +                                                \
62913 +    /* CRC calculation */                       \
62914 +    crc = 0xffffffff;                           \
62915 +    for (i=0; i < 6; i++)                       \
62916 +    {                                           \
62917 +        data = (uint8_t)(addr >> ((5-i)*8));    \
62918 +        crc = crc^data;                         \
62919 +        crc = crc_table[crc&0xff] ^ (crc>>8);   \
62920 +    }                                           \
62921 +}                                               \
62922 +
62923 +/*    Define a macro for getting the mirrored value of      */
62924 +/*    a byte size number. (0x11010011 --> 0x11001011)       */
62925 +/*    Sometimes the mirrored value of the CRC is required   */
62926 +static __inline__ uint8_t GetMirror(uint8_t n)
62927 +{
62928 +    uint8_t mirror[16] =
62929 +        {
62930 +            0x00,
62931 +            0x08,
62932 +            0x04,
62933 +            0x0c,
62934 +            0x02,
62935 +            0x0a,
62936 +            0x06,
62937 +            0x0e,
62938 +            0x01,
62939 +            0x09,
62940 +            0x05,
62941 +            0x0d,
62942 +            0x03,
62943 +            0x0b,
62944 +            0x07,
62945 +            0x0f
62946 +        };
62947 +    return ((uint8_t)(((mirror[n & 0x0f] << 4) | (mirror[n >> 4]))));
62948 +}
62949 +
62950 +static __inline__ uint32_t GetMirror32(uint32_t n)
62951 +{
62952 +    return (((uint32_t)GetMirror((uint8_t)(n))<<24) |
62953 +            ((uint32_t)GetMirror((uint8_t)(n>>8))<<16) |
62954 +            ((uint32_t)GetMirror((uint8_t)(n>>16))<<8) |
62955 +            ((uint32_t)GetMirror((uint8_t)(n>>24))));
62956 +}
62957 +
62958 +#define MIRROR      GetMirror
62959 +#define MIRROR_32   GetMirror32
62960 +
62961 +
62962 +#endif /* __crc_mac_addr_ext_h */
62963 --- /dev/null
62964 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/dpaa_ext.h
62965 @@ -0,0 +1,210 @@
62966 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
62967 + * All rights reserved.
62968 + *
62969 + * Redistribution and use in source and binary forms, with or without
62970 + * modification, are permitted provided that the following conditions are met:
62971 + *     * Redistributions of source code must retain the above copyright
62972 + *       notice, this list of conditions and the following disclaimer.
62973 + *     * Redistributions in binary form must reproduce the above copyright
62974 + *       notice, this list of conditions and the following disclaimer in the
62975 + *       documentation and/or other materials provided with the distribution.
62976 + *     * Neither the name of Freescale Semiconductor nor the
62977 + *       names of its contributors may be used to endorse or promote products
62978 + *       derived from this software without specific prior written permission.
62979 + *
62980 + *
62981 + * ALTERNATIVELY, this software may be distributed under the terms of the
62982 + * GNU General Public License ("GPL") as published by the Free Software
62983 + * Foundation, either version 2 of that License or (at your option) any
62984 + * later version.
62985 + *
62986 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
62987 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
62988 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
62989 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
62990 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62991 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
62992 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62993 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62994 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
62995 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62996 + */
62997 +
62998 +
62999 +/**************************************************************************//**
63000 + @File          dpaa_ext.h
63001 +
63002 + @Description   DPAA Application Programming Interface.
63003 +*//***************************************************************************/
63004 +#ifndef __DPAA_EXT_H
63005 +#define __DPAA_EXT_H
63006 +
63007 +#include "std_ext.h"
63008 +#include "error_ext.h"
63009 +
63010 +
63011 +/**************************************************************************//**
63012 + @Group         DPAA_grp Data Path Acceleration Architecture API
63013 +
63014 + @Description   DPAA API functions, definitions and enums.
63015 +
63016 + @{
63017 +*//***************************************************************************/
63018 +
63019 +#if defined(__MWERKS__) && !defined(__GNUC__)
63020 +#pragma pack(push,1)
63021 +#endif /* defined(__MWERKS__) && ... */
63022 +
63023 +/**************************************************************************//**
63024 + @Description   Frame descriptor
63025 +*//***************************************************************************/
63026 +typedef _Packed struct t_DpaaFD {
63027 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
63028 +    volatile uint8_t liodn;
63029 +    volatile uint8_t bpid;
63030 +    volatile uint8_t elion;
63031 +    volatile uint8_t addrh;
63032 +    volatile uint32_t addrl;
63033 +#else
63034 +    volatile uint32_t addrl;
63035 +    volatile uint8_t addrh;
63036 +    volatile uint8_t elion;
63037 +    volatile uint8_t bpid;
63038 +    volatile uint8_t liodn;
63039 + #endif
63040 +    volatile uint32_t    length;            /**< Frame length */
63041 +    volatile uint32_t    status;            /**< FD status */
63042 +} _PackedType t_DpaaFD;
63043 +
63044 +/**************************************************************************//**
63045 + @Description   enum for defining frame format
63046 +*//***************************************************************************/
63047 +typedef enum e_DpaaFDFormatType {
63048 +    e_DPAA_FD_FORMAT_TYPE_SHORT_SBSF  = 0x0,   /**< Simple frame Single buffer; Offset and
63049 +                                                    small length (9b OFFSET, 20b LENGTH) */
63050 +    e_DPAA_FD_FORMAT_TYPE_LONG_SBSF   = 0x2,   /**< Simple frame, single buffer; big length
63051 +                                                    (29b LENGTH ,No OFFSET) */
63052 +    e_DPAA_FD_FORMAT_TYPE_SHORT_MBSF  = 0x4,   /**< Simple frame, Scatter Gather table; Offset
63053 +                                                    and small length (9b OFFSET, 20b LENGTH) */
63054 +    e_DPAA_FD_FORMAT_TYPE_LONG_MBSF   = 0x6,   /**< Simple frame, Scatter Gather table;
63055 +                                                    big length (29b LENGTH ,No OFFSET) */
63056 +    e_DPAA_FD_FORMAT_TYPE_COMPOUND    = 0x1,   /**< Compound Frame (29b CONGESTION-WEIGHT
63057 +                                                    No LENGTH or OFFSET) */
63058 +    e_DPAA_FD_FORMAT_TYPE_DUMMY
63059 +} e_DpaaFDFormatType;
63060 +
63061 +/**************************************************************************//**
63062 + @Collection   Frame descriptor macros
63063 +*//***************************************************************************/
63064 +#define DPAA_FD_DD_MASK       0xc0000000           /**< FD DD field mask */
63065 +#define DPAA_FD_PID_MASK      0x3f000000           /**< FD PID field mask */
63066 +#define DPAA_FD_ELIODN_MASK   0x0000f000           /**< FD ELIODN field mask */
63067 +#define DPAA_FD_BPID_MASK     0x00ff0000           /**< FD BPID field mask */
63068 +#define DPAA_FD_ADDRH_MASK    0x000000ff           /**< FD ADDRH field mask */
63069 +#define DPAA_FD_ADDRL_MASK    0xffffffff           /**< FD ADDRL field mask */
63070 +#define DPAA_FD_FORMAT_MASK   0xe0000000           /**< FD FORMAT field mask */
63071 +#define DPAA_FD_OFFSET_MASK   0x1ff00000           /**< FD OFFSET field mask */
63072 +#define DPAA_FD_LENGTH_MASK   0x000fffff           /**< FD LENGTH field mask */
63073 +
63074 +#define DPAA_FD_GET_ADDRH(fd)         ((t_DpaaFD *)fd)->addrh                       /**< Macro to get FD ADDRH field */
63075 +#define DPAA_FD_GET_ADDRL(fd)         ((t_DpaaFD *)fd)->addrl                                           /**< Macro to get FD ADDRL field */
63076 +#define DPAA_FD_GET_PHYS_ADDR(fd)     ((physAddress_t)(((uint64_t)DPAA_FD_GET_ADDRH(fd) << 32) | (uint64_t)DPAA_FD_GET_ADDRL(fd))) /**< Macro to get FD ADDR field */
63077 +#define DPAA_FD_GET_FORMAT(fd)        ((((t_DpaaFD *)fd)->length & DPAA_FD_FORMAT_MASK) >> (31-2))      /**< Macro to get FD FORMAT field */
63078 +#define DPAA_FD_GET_OFFSET(fd)        ((((t_DpaaFD *)fd)->length & DPAA_FD_OFFSET_MASK) >> (31-11))     /**< Macro to get FD OFFSET field */
63079 +#define DPAA_FD_GET_LENGTH(fd)        (((t_DpaaFD *)fd)->length & DPAA_FD_LENGTH_MASK)                  /**< Macro to get FD LENGTH field */
63080 +#define DPAA_FD_GET_STATUS(fd)        ((t_DpaaFD *)fd)->status                                          /**< Macro to get FD STATUS field */
63081 +#define DPAA_FD_GET_ADDR(fd)          XX_PhysToVirt(DPAA_FD_GET_PHYS_ADDR(fd))                          /**< Macro to get FD ADDR (virtual) */
63082 +
63083 +#define DPAA_FD_SET_ADDRH(fd,val)     ((t_DpaaFD *)fd)->addrh = (val)            /**< Macro to set FD ADDRH field */
63084 +#define DPAA_FD_SET_ADDRL(fd,val)     ((t_DpaaFD *)fd)->addrl = (val)                                   /**< Macro to set FD ADDRL field */
63085 +#define DPAA_FD_SET_ADDR(fd,val)                            \
63086 +do {                                                        \
63087 +    uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val));     \
63088 +    DPAA_FD_SET_ADDRH(fd, ((uint32_t)(physAddr >> 32)));    \
63089 +    DPAA_FD_SET_ADDRL(fd, (uint32_t)physAddr);              \
63090 +} while (0)                                                                                             /**< Macro to set FD ADDR field */
63091 +#define DPAA_FD_SET_FORMAT(fd,val)    (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_FORMAT_MASK) | (((val)  << (31-2))& DPAA_FD_FORMAT_MASK)))  /**< Macro to set FD FORMAT field */
63092 +#define DPAA_FD_SET_OFFSET(fd,val)    (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_OFFSET_MASK) | (((val) << (31-11))& DPAA_FD_OFFSET_MASK) )) /**< Macro to set FD OFFSET field */
63093 +#define DPAA_FD_SET_LENGTH(fd,val)    (((t_DpaaFD *)fd)->length = (((t_DpaaFD *)fd)->length & ~DPAA_FD_LENGTH_MASK) | ((val) & DPAA_FD_LENGTH_MASK))                /**< Macro to set FD LENGTH field */
63094 +#define DPAA_FD_SET_STATUS(fd,val)    ((t_DpaaFD *)fd)->status = (val)                                  /**< Macro to set FD STATUS field */
63095 +/* @} */
63096 +
63097 +/**************************************************************************//**
63098 + @Description   Frame Scatter/Gather Table Entry
63099 +*//***************************************************************************/
63100 +typedef _Packed struct t_DpaaSGTE {
63101 +    volatile uint32_t    addrh;        /**< Buffer Address high */
63102 +    volatile uint32_t    addrl;        /**< Buffer Address low */
63103 +    volatile uint32_t    length;       /**< Buffer length */
63104 +    volatile uint32_t    offset;       /**< SGTE offset */
63105 +} _PackedType t_DpaaSGTE;
63106 +
63107 +#define DPAA_NUM_OF_SG_TABLE_ENTRY 16
63108 +
63109 +/**************************************************************************//**
63110 + @Description   Frame Scatter/Gather Table
63111 +*//***************************************************************************/
63112 +typedef _Packed struct t_DpaaSGT {
63113 +    t_DpaaSGTE    tableEntry[DPAA_NUM_OF_SG_TABLE_ENTRY];
63114 +                                    /**< Structure that holds information about
63115 +                                         a single S/G entry. */
63116 +} _PackedType t_DpaaSGT;
63117 +
63118 +/**************************************************************************//**
63119 + @Description   Compound Frame Table
63120 +*//***************************************************************************/
63121 +typedef _Packed struct t_DpaaCompTbl {
63122 +    t_DpaaSGTE    outputBuffInfo;   /**< Structure that holds information about
63123 +                                         the compound-frame output buffer;
63124 +                                         NOTE: this may point to a S/G table */
63125 +    t_DpaaSGTE    inputBuffInfo;    /**< Structure that holds information about
63126 +                                         the compound-frame input buffer;
63127 +                                         NOTE: this may point to a S/G table */
63128 +} _PackedType t_DpaaCompTbl;
63129 +
63130 +/**************************************************************************//**
63131 + @Collection   Frame Scatter/Gather Table Entry macros
63132 +*//***************************************************************************/
63133 +#define DPAA_SGTE_ADDRH_MASK    0x000000ff           /**< SGTE ADDRH field mask */
63134 +#define DPAA_SGTE_ADDRL_MASK    0xffffffff           /**< SGTE ADDRL field mask */
63135 +#define DPAA_SGTE_E_MASK        0x80000000           /**< SGTE Extension field mask */
63136 +#define DPAA_SGTE_F_MASK        0x40000000           /**< SGTE Final field mask */
63137 +#define DPAA_SGTE_LENGTH_MASK   0x3fffffff           /**< SGTE LENGTH field mask */
63138 +#define DPAA_SGTE_BPID_MASK     0x00ff0000           /**< SGTE BPID field mask */
63139 +#define DPAA_SGTE_OFFSET_MASK   0x00001fff           /**< SGTE OFFSET field mask */
63140 +
63141 +#define DPAA_SGTE_GET_ADDRH(sgte)         (((t_DpaaSGTE *)sgte)->addrh & DPAA_SGTE_ADDRH_MASK)              /**< Macro to get SGTE ADDRH field */
63142 +#define DPAA_SGTE_GET_ADDRL(sgte)         ((t_DpaaSGTE *)sgte)->addrl                                       /**< Macro to get SGTE ADDRL field */
63143 +#define DPAA_SGTE_GET_PHYS_ADDR(sgte)     ((physAddress_t)(((uint64_t)DPAA_SGTE_GET_ADDRH(sgte) << 32) | (uint64_t)DPAA_SGTE_GET_ADDRL(sgte))) /**< Macro to get FD ADDR field */
63144 +#define DPAA_SGTE_GET_EXTENSION(sgte)     ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_E_MASK) >> (31-0))     /**< Macro to get SGTE EXTENSION field */
63145 +#define DPAA_SGTE_GET_FINAL(sgte)         ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_F_MASK) >> (31-1))     /**< Macro to get SGTE FINAL field */
63146 +#define DPAA_SGTE_GET_LENGTH(sgte)        (((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_LENGTH_MASK)            /**< Macro to get SGTE LENGTH field */
63147 +#define DPAA_SGTE_GET_BPID(sgte)          ((((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_BPID_MASK) >> (31-15)) /**< Macro to get SGTE BPID field */
63148 +#define DPAA_SGTE_GET_OFFSET(sgte)        (((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_OFFSET_MASK)            /**< Macro to get SGTE OFFSET field */
63149 +#define DPAA_SGTE_GET_ADDR(sgte)          XX_PhysToVirt(DPAA_SGTE_GET_PHYS_ADDR(sgte))
63150 +
63151 +#define DPAA_SGTE_SET_ADDRH(sgte,val)     (((t_DpaaSGTE *)sgte)->addrh = ((((t_DpaaSGTE *)sgte)->addrh & ~DPAA_SGTE_ADDRH_MASK) | ((val) & DPAA_SGTE_ADDRH_MASK))) /**< Macro to set SGTE ADDRH field */
63152 +#define DPAA_SGTE_SET_ADDRL(sgte,val)     ((t_DpaaSGTE *)sgte)->addrl = (val)                                 /**< Macro to set SGTE ADDRL field */
63153 +#define DPAA_SGTE_SET_ADDR(sgte,val)                            \
63154 +do {                                                            \
63155 +    uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val));         \
63156 +    DPAA_SGTE_SET_ADDRH(sgte, ((uint32_t)(physAddr >> 32)));    \
63157 +    DPAA_SGTE_SET_ADDRL(sgte, (uint32_t)physAddr);              \
63158 +} while (0)                                                                                                 /**< Macro to set SGTE ADDR field */
63159 +#define DPAA_SGTE_SET_EXTENSION(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_E_MASK) | (((val)  << (31-0))& DPAA_SGTE_E_MASK)))            /**< Macro to set SGTE EXTENSION field */
63160 +#define DPAA_SGTE_SET_FINAL(sgte,val)     (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_F_MASK) | (((val)  << (31-1))& DPAA_SGTE_F_MASK)))            /**< Macro to set SGTE FINAL field */
63161 +#define DPAA_SGTE_SET_LENGTH(sgte,val)    (((t_DpaaSGTE *)sgte)->length = (((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_LENGTH_MASK) | ((val) & DPAA_SGTE_LENGTH_MASK))                /**< Macro to set SGTE LENGTH field */
63162 +#define DPAA_SGTE_SET_BPID(sgte,val)      (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_BPID_MASK) | (((val)  << (31-15))& DPAA_SGTE_BPID_MASK)))     /**< Macro to set SGTE BPID field */
63163 +#define DPAA_SGTE_SET_OFFSET(sgte,val)    (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_OFFSET_MASK) | (((val) << (31-31))& DPAA_SGTE_OFFSET_MASK) )) /**< Macro to set SGTE OFFSET field */
63164 +/* @} */
63165 +
63166 +#if defined(__MWERKS__) && !defined(__GNUC__)
63167 +#pragma pack(pop)
63168 +#endif /* defined(__MWERKS__) && ... */
63169 +
63170 +#define DPAA_LIODN_DONT_OVERRIDE    (-1)
63171 +
63172 +/** @} */ /* end of DPAA_grp group */
63173 +
63174 +
63175 +#endif /* __DPAA_EXT_H */
63176 --- /dev/null
63177 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_ext.h
63178 @@ -0,0 +1,1731 @@
63179 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
63180 + * All rights reserved.
63181 + *
63182 + * Redistribution and use in source and binary forms, with or without
63183 + * modification, are permitted provided that the following conditions are met:
63184 + *     * Redistributions of source code must retain the above copyright
63185 + *       notice, this list of conditions and the following disclaimer.
63186 + *     * Redistributions in binary form must reproduce the above copyright
63187 + *       notice, this list of conditions and the following disclaimer in the
63188 + *       documentation and/or other materials provided with the distribution.
63189 + *     * Neither the name of Freescale Semiconductor nor the
63190 + *       names of its contributors may be used to endorse or promote products
63191 + *       derived from this software without specific prior written permission.
63192 + *
63193 + *
63194 + * ALTERNATIVELY, this software may be distributed under the terms of the
63195 + * GNU General Public License ("GPL") as published by the Free Software
63196 + * Foundation, either version 2 of that License or (at your option) any
63197 + * later version.
63198 + *
63199 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
63200 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
63201 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
63202 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
63203 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63204 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
63205 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
63206 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63207 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
63208 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63209 + */
63210 +
63211 +
63212 +/**************************************************************************//**
63213 + @File          fm_ext.h
63214 +
63215 + @Description   FM Application Programming Interface.
63216 +*//***************************************************************************/
63217 +#ifndef __FM_EXT
63218 +#define __FM_EXT
63219 +
63220 +#include "error_ext.h"
63221 +#include "std_ext.h"
63222 +#include "dpaa_ext.h"
63223 +#include "fsl_fman_sp.h"
63224 +
63225 +/**************************************************************************//**
63226 + @Group         FM_grp Frame Manager API
63227 +
63228 + @Description   FM API functions, definitions and enums.
63229 +
63230 + @{
63231 +*//***************************************************************************/
63232 +
63233 +/**************************************************************************//**
63234 + @Group         FM_lib_grp FM library
63235 +
63236 + @Description   FM API functions, definitions and enums.
63237 +
63238 +                The FM module is the main driver module and is a mandatory module
63239 +                for FM driver users. This module must be initialized first prior
63240 +                to any other drivers modules.
63241 +                The FM is a "singleton" module. It is responsible of the common
63242 +                HW modules: FPM, DMA, common QMI and common BMI initializations and
63243 +                run-time control routines. This module must be initialized always
63244 +                when working with any of the FM modules.
63245 +                NOTE - We assume that the FM library will be initialized only by core No. 0!
63246 +
63247 + @{
63248 +*//***************************************************************************/
63249 +
63250 +/**************************************************************************//**
63251 + @Description   Enum for defining port types
63252 +*//***************************************************************************/
63253 +typedef enum e_FmPortType {
63254 +    e_FM_PORT_TYPE_OH_OFFLINE_PARSING = 0,  /**< Offline parsing port */
63255 +    e_FM_PORT_TYPE_RX,                      /**< 1G Rx port */
63256 +    e_FM_PORT_TYPE_RX_10G,                  /**< 10G Rx port */
63257 +    e_FM_PORT_TYPE_TX,                      /**< 1G Tx port */
63258 +    e_FM_PORT_TYPE_TX_10G,                  /**< 10G Tx port */
63259 +    e_FM_PORT_TYPE_DUMMY
63260 +} e_FmPortType;
63261 +
63262 +/**************************************************************************//**
63263 + @Collection    General FM defines
63264 +*//***************************************************************************/
63265 +#define FM_MAX_NUM_OF_PARTITIONS    64      /**< Maximum number of partitions */
63266 +#define FM_PHYS_ADDRESS_SIZE        6       /**< FM Physical address size */
63267 +/* @} */
63268 +
63269 +
63270 +#if defined(__MWERKS__) && !defined(__GNUC__)
63271 +#pragma pack(push,1)
63272 +#endif /* defined(__MWERKS__) && ... */
63273 +
63274 +/**************************************************************************//**
63275 + @Description   FM physical Address
63276 +*//***************************************************************************/
63277 +typedef _Packed struct t_FmPhysAddr {
63278 +    volatile uint8_t    high;         /**< High part of the physical address */
63279 +    volatile uint32_t   low;          /**< Low part of the physical address */
63280 +} _PackedType t_FmPhysAddr;
63281 +
63282 +/**************************************************************************//**
63283 + @Description   Parse results memory layout
63284 +*//***************************************************************************/
63285 +typedef _Packed struct t_FmPrsResult {
63286 +    volatile uint8_t     lpid;               /**< Logical port id */
63287 +    volatile uint8_t     shimr;              /**< Shim header result  */
63288 +    volatile uint16_t    l2r;                /**< Layer 2 result */
63289 +    volatile uint16_t    l3r;                /**< Layer 3 result */
63290 +    volatile uint8_t     l4r;                /**< Layer 4 result */
63291 +    volatile uint8_t     cplan;              /**< Classification plan id */
63292 +    volatile uint16_t    nxthdr;             /**< Next Header  */
63293 +    volatile uint16_t    cksum;              /**< Running-sum */
63294 +    volatile uint16_t    flags_frag_off;     /**< Flags & fragment-offset field of the last IP-header */
63295 +    volatile uint8_t     route_type;         /**< Routing type field of a IPv6 routing extension header */
63296 +    volatile uint8_t     rhp_ip_valid;       /**< Routing Extension Header Present; last bit is IP valid */
63297 +    volatile uint8_t     shim_off[2];        /**< Shim offset */
63298 +    volatile uint8_t     ip_pid_off;         /**< IP PID (last IP-proto) offset */
63299 +    volatile uint8_t     eth_off;            /**< ETH offset */
63300 +    volatile uint8_t     llc_snap_off;       /**< LLC_SNAP offset */
63301 +    volatile uint8_t     vlan_off[2];        /**< VLAN offset */
63302 +    volatile uint8_t     etype_off;          /**< ETYPE offset */
63303 +    volatile uint8_t     pppoe_off;          /**< PPP offset */
63304 +    volatile uint8_t     mpls_off[2];        /**< MPLS offset */
63305 +    volatile uint8_t     ip_off[2];          /**< IP offset */
63306 +    volatile uint8_t     gre_off;            /**< GRE offset */
63307 +    volatile uint8_t     l4_off;             /**< Layer 4 offset */
63308 +    volatile uint8_t     nxthdr_off;         /**< Parser end point */
63309 +} _PackedType t_FmPrsResult;
63310 +
63311 +/**************************************************************************//**
63312 + @Collection   FM Parser results
63313 +*//***************************************************************************/
63314 +#define FM_PR_L2_VLAN_STACK         0x00000100  /**< Parse Result: VLAN stack */
63315 +#define FM_PR_L2_ETHERNET           0x00008000  /**< Parse Result: Ethernet*/
63316 +#define FM_PR_L2_VLAN               0x00004000  /**< Parse Result: VLAN */
63317 +#define FM_PR_L2_LLC_SNAP           0x00002000  /**< Parse Result: LLC_SNAP */
63318 +#define FM_PR_L2_MPLS               0x00001000  /**< Parse Result: MPLS */
63319 +#define FM_PR_L2_PPPoE              0x00000800  /**< Parse Result: PPPoE */
63320 +/* @} */
63321 +
63322 +/**************************************************************************//**
63323 + @Collection   FM Frame descriptor macros
63324 +*//***************************************************************************/
63325 +#define FM_FD_CMD_FCO                   0x80000000  /**< Frame queue Context Override */
63326 +#define FM_FD_CMD_RPD                   0x40000000  /**< Read Prepended Data */
63327 +#define FM_FD_CMD_UPD                   0x20000000  /**< Update Prepended Data */
63328 +#define FM_FD_CMD_DTC                   0x10000000  /**< Do L4 Checksum */
63329 +#define FM_FD_CMD_DCL4C                 0x10000000  /**< Didn't calculate L4 Checksum */
63330 +#define FM_FD_CMD_CFQ                   0x00ffffff  /**< Confirmation Frame Queue */
63331 +
63332 +#define FM_FD_ERR_UNSUPPORTED_FORMAT    0x04000000  /**< Not for Rx-Port! Unsupported Format */
63333 +#define FM_FD_ERR_LENGTH                0x02000000  /**< Not for Rx-Port! Length Error */
63334 +#define FM_FD_ERR_DMA                   0x01000000  /**< DMA Data error */
63335 +
63336 +#define FM_FD_IPR                       0x00000001  /**< IPR frame (not error) */
63337 +
63338 +#define FM_FD_ERR_IPR_NCSP              (0x00100000 | FM_FD_IPR)    /**< IPR non-consistent-sp */
63339 +#define FM_FD_ERR_IPR                   (0x00200000 | FM_FD_IPR)    /**< IPR error */
63340 +#define FM_FD_ERR_IPR_TO                (0x00300000 | FM_FD_IPR)    /**< IPR timeout */
63341 +
63342 +#ifdef FM_CAPWAP_SUPPORT
63343 +#define FM_FD_ERR_CRE                   0x00200000
63344 +#define FM_FD_ERR_CHE                   0x00100000
63345 +#endif /* FM_CAPWAP_SUPPORT */
63346 +
63347 +#define FM_FD_ERR_PHYSICAL              0x00080000  /**< Rx FIFO overflow, FCS error, code error, running disparity
63348 +                                                         error (SGMII and TBI modes), FIFO parity error. PHY
63349 +                                                         Sequence error, PHY error control character detected. */
63350 +#define FM_FD_ERR_SIZE                  0x00040000  /**< Frame too long OR Frame size exceeds max_length_frame  */
63351 +#define FM_FD_ERR_CLS_DISCARD           0x00020000  /**< classification discard */
63352 +#define FM_FD_ERR_EXTRACTION            0x00008000  /**< Extract Out of Frame */
63353 +#define FM_FD_ERR_NO_SCHEME             0x00004000  /**< No Scheme Selected */
63354 +#define FM_FD_ERR_KEYSIZE_OVERFLOW      0x00002000  /**< Keysize Overflow */
63355 +#define FM_FD_ERR_COLOR_RED             0x00000800  /**< Frame color is red */
63356 +#define FM_FD_ERR_COLOR_YELLOW          0x00000400  /**< Frame color is yellow */
63357 +#define FM_FD_ERR_ILL_PLCR              0x00000200  /**< Illegal Policer Profile selected */
63358 +#define FM_FD_ERR_PLCR_FRAME_LEN        0x00000100  /**< Policer frame length error */
63359 +#define FM_FD_ERR_PRS_TIMEOUT           0x00000080  /**< Parser Time out Exceed */
63360 +#define FM_FD_ERR_PRS_ILL_INSTRUCT      0x00000040  /**< Invalid Soft Parser instruction */
63361 +#define FM_FD_ERR_PRS_HDR_ERR           0x00000020  /**< Header error was identified during parsing */
63362 +#define FM_FD_ERR_BLOCK_LIMIT_EXCEEDED  0x00000008  /**< Frame parsed beyind 256 first bytes */
63363 +
63364 +#define FM_FD_TX_STATUS_ERR_MASK        (FM_FD_ERR_UNSUPPORTED_FORMAT   | \
63365 +                                         FM_FD_ERR_LENGTH               | \
63366 +                                         FM_FD_ERR_DMA) /**< TX Error FD bits */
63367 +
63368 +#define FM_FD_RX_STATUS_ERR_MASK        (FM_FD_ERR_UNSUPPORTED_FORMAT   | \
63369 +                                         FM_FD_ERR_LENGTH               | \
63370 +                                         FM_FD_ERR_DMA                  | \
63371 +                                         FM_FD_ERR_IPR                  | \
63372 +                                         FM_FD_ERR_IPR_TO               | \
63373 +                                         FM_FD_ERR_IPR_NCSP             | \
63374 +                                         FM_FD_ERR_PHYSICAL             | \
63375 +                                         FM_FD_ERR_SIZE                 | \
63376 +                                         FM_FD_ERR_CLS_DISCARD          | \
63377 +                                         FM_FD_ERR_COLOR_RED            | \
63378 +                                         FM_FD_ERR_COLOR_YELLOW         | \
63379 +                                         FM_FD_ERR_ILL_PLCR             | \
63380 +                                         FM_FD_ERR_PLCR_FRAME_LEN       | \
63381 +                                         FM_FD_ERR_EXTRACTION           | \
63382 +                                         FM_FD_ERR_NO_SCHEME            | \
63383 +                                         FM_FD_ERR_KEYSIZE_OVERFLOW     | \
63384 +                                         FM_FD_ERR_PRS_TIMEOUT          | \
63385 +                                         FM_FD_ERR_PRS_ILL_INSTRUCT     | \
63386 +                                         FM_FD_ERR_PRS_HDR_ERR          | \
63387 +                                         FM_FD_ERR_BLOCK_LIMIT_EXCEEDED) /**< RX Error FD bits */
63388 +
63389 +#define FM_FD_RX_STATUS_ERR_NON_FM      0x00400000  /**< non Frame-Manager error */
63390 +/* @} */
63391 +
63392 +/**************************************************************************//**
63393 + @Description   Context A
63394 +*//***************************************************************************/
63395 +typedef _Packed struct t_FmContextA {
63396 +    volatile uint32_t    command;   /**< ContextA Command */
63397 +    volatile uint8_t     res0[4];   /**< ContextA Reserved bits */
63398 +} _PackedType t_FmContextA;
63399 +
63400 +/**************************************************************************//**
63401 + @Description   Context B
63402 +*//***************************************************************************/
63403 +typedef uint32_t t_FmContextB;
63404 +
63405 +/**************************************************************************//**
63406 + @Collection   Special Operation options
63407 +*//***************************************************************************/
63408 +typedef uint32_t fmSpecialOperations_t;                 /**< typedef for defining Special Operation options */
63409 +
63410 +#define  FM_SP_OP_IPSEC                     0x80000000  /**< activate features that related to IPSec (e.g fix Eth-type) */
63411 +#define  FM_SP_OP_IPSEC_UPDATE_UDP_LEN      0x40000000  /**< update the UDP-Len after Encryption */
63412 +#define  FM_SP_OP_IPSEC_MANIP               0x20000000  /**< handle the IPSec-manip options */
63413 +#define  FM_SP_OP_RPD                       0x10000000  /**< Set the RPD bit */
63414 +#define  FM_SP_OP_DCL4C                     0x08000000  /**< Set the DCL4C bit */
63415 +#define  FM_SP_OP_CHECK_SEC_ERRORS          0x04000000  /**< Check SEC errors */
63416 +#define  FM_SP_OP_CLEAR_RPD                 0x02000000  /**< Clear the RPD bit */
63417 +#define  FM_SP_OP_CAPWAP_DTLS_ENC           0x01000000  /**< activate features that related to CAPWAP-DTLS post Encryption */
63418 +#define  FM_SP_OP_CAPWAP_DTLS_DEC           0x00800000  /**< activate features that related to CAPWAP-DTLS post Decryption */
63419 +#define  FM_SP_OP_IPSEC_NO_ETH_HDR          0x00400000  /**< activate features that related to IPSec without Eth hdr */
63420 +/* @} */
63421 +
63422 +/**************************************************************************//**
63423 + @Collection   Context A macros
63424 +*//***************************************************************************/
63425 +#define FM_CONTEXTA_OVERRIDE_MASK       0x80000000
63426 +#define FM_CONTEXTA_ICMD_MASK           0x40000000
63427 +#define FM_CONTEXTA_A1_VALID_MASK       0x20000000
63428 +#define FM_CONTEXTA_MACCMD_MASK         0x00ff0000
63429 +#define FM_CONTEXTA_MACCMD_VALID_MASK   0x00800000
63430 +#define FM_CONTEXTA_MACCMD_SECURED_MASK 0x00100000
63431 +#define FM_CONTEXTA_MACCMD_SC_MASK      0x000f0000
63432 +#define FM_CONTEXTA_A1_MASK             0x0000ffff
63433 +
63434 +#define FM_CONTEXTA_GET_OVERRIDE(contextA)                 ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_OVERRIDE_MASK) >> (31-0))
63435 +#define FM_CONTEXTA_GET_ICMD(contextA)                     ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_ICMD_MASK) >> (31-1))
63436 +#define FM_CONTEXTA_GET_A1_VALID(contextA)                 ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_A1_VALID_MASK) >> (31-2))
63437 +#define FM_CONTEXTA_GET_A1(contextA)                       ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_A1_MASK) >> (31-31))
63438 +#define FM_CONTEXTA_GET_MACCMD(contextA)                   ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_MASK) >> (31-15))
63439 +#define FM_CONTEXTA_GET_MACCMD_VALID(contextA)             ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_VALID_MASK) >> (31-8))
63440 +#define FM_CONTEXTA_GET_MACCMD_SECURED(contextA)           ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_SECURED_MASK) >> (31-11))
63441 +#define FM_CONTEXTA_GET_MACCMD_SECURE_CHANNEL(contextA)    ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_SC_MASK) >> (31-15))
63442 +
63443 +#define FM_CONTEXTA_SET_OVERRIDE(contextA,val)              (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_OVERRIDE_MASK) | (((uint32_t)(val) << (31-0)) & FM_CONTEXTA_OVERRIDE_MASK) ))
63444 +#define FM_CONTEXTA_SET_ICMD(contextA,val)                  (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_ICMD_MASK) | (((val) << (31-1)) & FM_CONTEXTA_ICMD_MASK) ))
63445 +#define FM_CONTEXTA_SET_A1_VALID(contextA,val)              (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_A1_VALID_MASK) | (((val) << (31-2)) & FM_CONTEXTA_A1_VALID_MASK) ))
63446 +#define FM_CONTEXTA_SET_A1(contextA,val)                    (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_A1_MASK) | (((val) << (31-31)) & FM_CONTEXTA_A1_MASK) ))
63447 +#define FM_CONTEXTA_SET_MACCMD(contextA,val)                (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_MASK) | (((val) << (31-15)) & FM_CONTEXTA_MACCMD_MASK) ))
63448 +#define FM_CONTEXTA_SET_MACCMD_VALID(contextA,val)          (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_VALID_MASK) | (((val) << (31-8)) & FM_CONTEXTA_MACCMD_VALID_MASK) ))
63449 +#define FM_CONTEXTA_SET_MACCMD_SECURED(contextA,val)        (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_SECURED_MASK) | (((val) << (31-11)) & FM_CONTEXTA_MACCMD_SECURED_MASK) ))
63450 +#define FM_CONTEXTA_SET_MACCMD_SECURE_CHANNEL(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_SC_MASK) | (((val) << (31-15)) & FM_CONTEXTA_MACCMD_SC_MASK) ))
63451 +/* @} */
63452 +
63453 +/**************************************************************************//**
63454 + @Collection   Context B macros
63455 +*//***************************************************************************/
63456 +#define FM_CONTEXTB_FQID_MASK               0x00ffffff
63457 +
63458 +#define FM_CONTEXTB_GET_FQID(contextB)      (*((t_FmContextB *)contextB) & FM_CONTEXTB_FQID_MASK)
63459 +#define FM_CONTEXTB_SET_FQID(contextB,val)  (*((t_FmContextB *)contextB) = ((*((t_FmContextB *)contextB) & ~FM_CONTEXTB_FQID_MASK) | ((val) & FM_CONTEXTB_FQID_MASK)))
63460 +/* @} */
63461 +
63462 +#if defined(__MWERKS__) && !defined(__GNUC__)
63463 +#pragma pack(pop)
63464 +#endif /* defined(__MWERKS__) && ... */
63465 +
63466 +
63467 +/**************************************************************************//**
63468 + @Description   FM Exceptions
63469 +*//***************************************************************************/
63470 +typedef enum e_FmExceptions {
63471 +    e_FM_EX_DMA_BUS_ERROR = 0,          /**< DMA bus error. */
63472 +    e_FM_EX_DMA_READ_ECC,               /**< Read Buffer ECC error (Valid for FM rev < 6)*/
63473 +    e_FM_EX_DMA_SYSTEM_WRITE_ECC,       /**< Write Buffer ECC error on system side (Valid for FM rev < 6)*/
63474 +    e_FM_EX_DMA_FM_WRITE_ECC,           /**< Write Buffer ECC error on FM side (Valid for FM rev < 6)*/
63475 +    e_FM_EX_DMA_SINGLE_PORT_ECC,        /**< Single Port ECC error on FM side (Valid for FM rev > 6)*/
63476 +    e_FM_EX_FPM_STALL_ON_TASKS,         /**< Stall of tasks on FPM */
63477 +    e_FM_EX_FPM_SINGLE_ECC,             /**< Single ECC on FPM. */
63478 +    e_FM_EX_FPM_DOUBLE_ECC,             /**< Double ECC error on FPM ram access */
63479 +    e_FM_EX_QMI_SINGLE_ECC,             /**< Single ECC on QMI. */
63480 +    e_FM_EX_QMI_DOUBLE_ECC,             /**< Double bit ECC occurred on QMI */
63481 +    e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< Dequeue from unknown port id */
63482 +    e_FM_EX_BMI_LIST_RAM_ECC,           /**< Linked List RAM ECC error */
63483 +    e_FM_EX_BMI_STORAGE_PROFILE_ECC,    /**< Storage Profile ECC Error */
63484 +    e_FM_EX_BMI_STATISTICS_RAM_ECC,     /**< Statistics Count RAM ECC Error Enable */
63485 +    e_FM_EX_BMI_DISPATCH_RAM_ECC,       /**< Dispatch RAM ECC Error Enable */
63486 +    e_FM_EX_IRAM_ECC,                   /**< Double bit ECC occurred on IRAM*/
63487 +    e_FM_EX_MURAM_ECC                   /**< Double bit ECC occurred on MURAM*/
63488 +} e_FmExceptions;
63489 +
63490 +/**************************************************************************//**
63491 + @Description   Enum for defining port DMA swap mode
63492 +*//***************************************************************************/
63493 +typedef enum e_FmDmaSwapOption {
63494 +    e_FM_DMA_NO_SWP = FMAN_DMA_NO_SWP,          /**< No swap, transfer data as is.*/
63495 +    e_FM_DMA_SWP_PPC_LE = FMAN_DMA_SWP_PPC_LE,  /**< The transferred data should be swapped
63496 +                                                in PowerPc Little Endian mode. */
63497 +    e_FM_DMA_SWP_BE = FMAN_DMA_SWP_BE           /**< The transferred data should be swapped
63498 +                                                in Big Endian mode */
63499 +} e_FmDmaSwapOption;
63500 +
63501 +/**************************************************************************//**
63502 + @Description   Enum for defining port DMA cache attributes
63503 +*//***************************************************************************/
63504 +typedef enum e_FmDmaCacheOption {
63505 +    e_FM_DMA_NO_STASH = FMAN_DMA_NO_STASH,      /**< Cacheable, no Allocate (No Stashing) */
63506 +    e_FM_DMA_STASH = FMAN_DMA_STASH             /**< Cacheable and Allocate (Stashing on) */
63507 +} e_FmDmaCacheOption;
63508 +
63509 +
63510 +/**************************************************************************//**
63511 + @Group         FM_init_grp FM Initialization Unit
63512 +
63513 + @Description   FM Initialization Unit
63514 +
63515 +                Initialization Flow
63516 +                Initialization of the FM Module will be carried out by the application
63517 +                according to the following sequence:
63518 +                -  Calling the configuration routine with basic parameters.
63519 +                -  Calling the advance initialization routines to change driver's defaults.
63520 +                -  Calling the initialization routine.
63521 +
63522 + @{
63523 +*//***************************************************************************/
63524 +
63525 +/**************************************************************************//**
63526 + @Function      t_FmExceptionsCallback
63527 +
63528 + @Description   Exceptions user callback routine, will be called upon an
63529 +                exception passing the exception identification.
63530 +
63531 + @Param[in]     h_App      - User's application descriptor.
63532 + @Param[in]     exception  - The exception.
63533 +*//***************************************************************************/
63534 +typedef void (t_FmExceptionsCallback)(t_Handle          h_App,
63535 +                                      e_FmExceptions    exception);
63536 +
63537 +
63538 +/**************************************************************************//**
63539 + @Function      t_FmBusErrorCallback
63540 +
63541 + @Description   Bus error user callback routine, will be called upon a
63542 +                bus error, passing parameters describing the errors and the owner.
63543 +
63544 + @Param[in]     h_App       - User's application descriptor.
63545 + @Param[in]     portType    - Port type (e_FmPortType)
63546 + @Param[in]     portId      - Port id - relative to type.
63547 + @Param[in]     addr        - Address that caused the error
63548 + @Param[in]     tnum        - Owner of error
63549 + @Param[in]     liodn       - Logical IO device number
63550 +*//***************************************************************************/
63551 +typedef void (t_FmBusErrorCallback) (t_Handle        h_App,
63552 +                                     e_FmPortType    portType,
63553 +                                     uint8_t         portId,
63554 +                                     uint64_t        addr,
63555 +                                     uint8_t         tnum,
63556 +                                     uint16_t        liodn);
63557 +
63558 +/**************************************************************************//**
63559 + @Description   A structure for defining buffer prefix area content.
63560 +*//***************************************************************************/
63561 +typedef struct t_FmBufferPrefixContent {
63562 +    uint16_t    privDataSize;       /**< Number of bytes to be left at the beginning
63563 +                                         of the external buffer; Note that the private-area will
63564 +                                         start from the base of the buffer address. */
63565 +    bool        passPrsResult;      /**< TRUE to pass the parse result to/from the FM;
63566 +                                         User may use FM_PORT_GetBufferPrsResult() in order to
63567 +                                         get the parser-result from a buffer. */
63568 +    bool        passTimeStamp;      /**< TRUE to pass the timeStamp to/from the FM
63569 +                                         User may use FM_PORT_GetBufferTimeStamp() in order to
63570 +                                         get the parser-result from a buffer. */
63571 +    bool        passHashResult;     /**< TRUE to pass the KG hash result to/from the FM
63572 +                                         User may use FM_PORT_GetBufferHashResult() in order to
63573 +                                         get the parser-result from a buffer. */
63574 +    bool        passAllOtherPCDInfo;/**< Add all other Internal-Context information:
63575 +                                         AD, hash-result, key, etc. */
63576 +    uint16_t    dataAlign;          /**< 0 to use driver's default alignment [DEFAULT_FM_SP_bufferPrefixContent_dataAlign],
63577 +                                         other value for selecting a data alignment (must be a power of 2);
63578 +                                         if write optimization is used, must be >= 16. */
63579 +    uint8_t     manipExtraSpace;    /**< Maximum extra size needed (insertion-size minus removal-size);
63580 +                                         Note that this field impacts the size of the buffer-prefix
63581 +                                         (i.e. it pushes the data offset);
63582 +                                         This field is irrelevant if DPAA_VERSION==10 */
63583 +} t_FmBufferPrefixContent;
63584 +
63585 +/**************************************************************************//**
63586 + @Description   A structure of information about each of the external
63587 +                buffer pools used by a port or storage-profile.
63588 +*//***************************************************************************/
63589 +typedef struct t_FmExtPoolParams {
63590 +    uint8_t                 id;     /**< External buffer pool id */
63591 +    uint16_t                size;   /**< External buffer pool buffer size */
63592 +} t_FmExtPoolParams;
63593 +
63594 +/**************************************************************************//**
63595 + @Description   A structure for informing the driver about the external
63596 +                buffer pools allocated in the BM and used by a port or a
63597 +                storage-profile.
63598 +*//***************************************************************************/
63599 +typedef struct t_FmExtPools {
63600 +    uint8_t                 numOfPoolsUsed;     /**< Number of pools use by this port */
63601 +    t_FmExtPoolParams       extBufPool[FM_PORT_MAX_NUM_OF_EXT_POOLS];
63602 +                                                /**< Parameters for each port */
63603 +} t_FmExtPools;
63604 +
63605 +/**************************************************************************//**
63606 + @Description   A structure for defining backup BM Pools.
63607 +*//***************************************************************************/
63608 +typedef struct t_FmBackupBmPools {
63609 +    uint8_t     numOfBackupPools;       /**< Number of BM backup pools -
63610 +                                             must be smaller than the total number of
63611 +                                             pools defined for the specified port.*/
63612 +    uint8_t     poolIds[FM_PORT_MAX_NUM_OF_EXT_POOLS];
63613 +                                        /**< numOfBackupPools pool id's, specifying which
63614 +                                             pools should be used only as backup. Pool
63615 +                                             id's specified here must be a subset of the
63616 +                                             pools used by the specified port.*/
63617 +} t_FmBackupBmPools;
63618 +
63619 +/**************************************************************************//**
63620 + @Description   A structure for defining BM pool depletion criteria
63621 +*//***************************************************************************/
63622 +typedef struct t_FmBufPoolDepletion {
63623 +    bool        poolsGrpModeEnable;                 /**< select mode in which pause frames will be sent after
63624 +                                                         a number of pools (all together!) are depleted */
63625 +    uint8_t     numOfPools;                         /**< the number of depleted pools that will invoke
63626 +                                                         pause frames transmission. */
63627 +    bool        poolsToConsider[BM_MAX_NUM_OF_POOLS];
63628 +                                                    /**< For each pool, TRUE if it should be considered for
63629 +                                                         depletion (Note - this pool must be used by this port!). */
63630 +    bool        singlePoolModeEnable;               /**< select mode in which pause frames will be sent after
63631 +                                                         a single-pool is depleted; */
63632 +    bool        poolsToConsiderForSingleMode[BM_MAX_NUM_OF_POOLS];
63633 +                                                    /**< For each pool, TRUE if it should be considered for
63634 +                                                         depletion (Note - this pool must be used by this port!) */
63635 +#if (DPAA_VERSION >= 11)
63636 +    bool        pfcPrioritiesEn[FM_MAX_NUM_OF_PFC_PRIORITIES];
63637 +                                                    /**< This field is used by the MAC as the Priority Enable Vector in the PFC frame which is transmitted */
63638 +#endif /* (DPAA_VERSION >= 11) */
63639 +} t_FmBufPoolDepletion;
63640 +
63641 +/**************************************************************************//**
63642 + @Description   A Structure for defining Ucode patch for loading.
63643 +*//***************************************************************************/
63644 +typedef struct t_FmFirmwareParams {
63645 +    uint32_t                size;                   /**< Size of uCode */
63646 +    uint32_t                *p_Code;                /**< A pointer to the uCode */
63647 +} t_FmFirmwareParams;
63648 +
63649 +/**************************************************************************//**
63650 + @Description   A Structure for defining FM initialization parameters
63651 +*//***************************************************************************/
63652 +typedef struct t_FmParams {
63653 +    uint8_t                 fmId;                   /**< Index of the FM */
63654 +    uint8_t                 guestId;                /**< FM Partition Id */
63655 +    uintptr_t               baseAddr;               /**< A pointer to base of memory mapped FM registers (virtual);
63656 +                                                         this field is optional when the FM runs in "guest-mode"
63657 +                                                         (i.e. guestId != NCSW_MASTER_ID); in that case, the driver will
63658 +                                                         use the memory-map instead of calling the IPC where possible;
63659 +                                                         NOTE that this should include ALL common registers of the FM including
63660 +                                                         the PCD registers area (i.e. until the VSP pages - 880KB). */
63661 +    t_Handle                h_FmMuram;              /**< A handle of an initialized MURAM object,
63662 +                                                         to be used by the FM. */
63663 +    uint16_t                fmClkFreq;              /**< In Mhz;
63664 +                                                         Relevant when FM not runs in "guest-mode". */
63665 +    uint16_t                fmMacClkRatio;          /**< FM MAC Clock ratio, for backward comparability:
63666 +                                                                     when fmMacClkRatio = 0, ratio is 2:1
63667 +                                                                     when fmMacClkRatio = 1, ratio is 1:1  */
63668 +    t_FmExceptionsCallback  *f_Exception;           /**< An application callback routine to handle exceptions;
63669 +                                                         Relevant when FM not runs in "guest-mode". */
63670 +    t_FmBusErrorCallback    *f_BusError;            /**< An application callback routine to handle exceptions;
63671 +                                                         Relevant when FM not runs in "guest-mode". */
63672 +    t_Handle                h_App;                  /**< A handle to an application layer object; This handle will
63673 +                                                         be passed by the driver upon calling the above callbacks;
63674 +                                                         Relevant when FM not runs in "guest-mode". */
63675 +    int                     irq;                    /**< FM interrupt source for normal events;
63676 +                                                         Relevant when FM not runs in "guest-mode". */
63677 +    int                     errIrq;                 /**< FM interrupt source for errors;
63678 +                                                         Relevant when FM not runs in "guest-mode". */
63679 +    t_FmFirmwareParams      firmware;               /**< The firmware parameters structure;
63680 +                                                         Relevant when FM not runs in "guest-mode". */
63681 +
63682 +#if (DPAA_VERSION >= 11)
63683 +    uintptr_t               vspBaseAddr;            /**< A pointer to base of memory mapped FM VSP registers (virtual);
63684 +                                                         i.e. up to 24KB, depending on the specific chip. */
63685 +    uint8_t                 partVSPBase;            /**< The first Virtual-Storage-Profile-id dedicated to this partition.
63686 +                                                         NOTE: this parameter relevant only when working with multiple partitions. */
63687 +    uint8_t                 partNumOfVSPs;          /**< Number of VSPs dedicated to this partition.
63688 +                                                         NOTE: this parameter relevant only when working with multiple partitions. */
63689 +#endif /* (DPAA_VERSION >= 11) */
63690 +} t_FmParams;
63691 +
63692 +
63693 +/**************************************************************************//**
63694 + @Function      FM_Config
63695 +
63696 + @Description   Creates the FM module and returns its handle (descriptor).
63697 +                This descriptor must be passed as first parameter to all other
63698 +                FM function calls.
63699 +
63700 +                No actual initialization or configuration of FM hardware is
63701 +                done by this routine. All FM parameters get default values that
63702 +                may be changed by calling one or more of the advance config routines.
63703 +
63704 + @Param[in]     p_FmParams  - A pointer to a data structure of mandatory FM parameters
63705 +
63706 + @Return        A handle to the FM object, or NULL for Failure.
63707 +*//***************************************************************************/
63708 +t_Handle FM_Config(t_FmParams *p_FmParams);
63709 +
63710 +/**************************************************************************//**
63711 + @Function      FM_Init
63712 +
63713 + @Description   Initializes the FM module by defining the software structure
63714 +                and configuring the hardware registers.
63715 +
63716 + @Param[in]     h_Fm - FM module descriptor
63717 +
63718 + @Return        E_OK on success; Error code otherwise.
63719 +*//***************************************************************************/
63720 +t_Error FM_Init(t_Handle h_Fm);
63721 +
63722 +/**************************************************************************//**
63723 + @Function      FM_Free
63724 +
63725 + @Description   Frees all resources that were assigned to FM module.
63726 +
63727 +                Calling this routine invalidates the descriptor.
63728 +
63729 + @Param[in]     h_Fm - FM module descriptor
63730 +
63731 + @Return        E_OK on success; Error code otherwise.
63732 +*//***************************************************************************/
63733 +t_Error FM_Free(t_Handle h_Fm);
63734 +
63735 +
63736 +/**************************************************************************//**
63737 + @Group         FM_advanced_init_grp    FM Advanced Configuration Unit
63738 +
63739 + @Description   Advanced configuration routines are optional routines that may
63740 +                be called in order to change the default driver settings.
63741 +
63742 +                Note: Advanced configuration routines are not available for guest partition.
63743 + @{
63744 +*//***************************************************************************/
63745 +
63746 +/**************************************************************************//**
63747 + @Description   Enum for selecting DMA debug mode
63748 +*//***************************************************************************/
63749 +typedef enum e_FmDmaDbgCntMode {
63750 +    e_FM_DMA_DBG_NO_CNT             = 0,    /**< No counting */
63751 +    e_FM_DMA_DBG_CNT_DONE,                  /**< Count DONE commands */
63752 +    e_FM_DMA_DBG_CNT_COMM_Q_EM,             /**< count command queue emergency signals */
63753 +    e_FM_DMA_DBG_CNT_INT_READ_EM,           /**< Count Internal Read buffer emergency signal */
63754 +    e_FM_DMA_DBG_CNT_INT_WRITE_EM,          /**< Count Internal Write buffer emergency signal */
63755 +    e_FM_DMA_DBG_CNT_FPM_WAIT,              /**< Count FPM WAIT signal */
63756 +    e_FM_DMA_DBG_CNT_SIGLE_BIT_ECC,         /**< Single bit ECC errors. */
63757 +    e_FM_DMA_DBG_CNT_RAW_WAR_PROT           /**< Number of times there was a need for RAW & WAR protection. */
63758 +} e_FmDmaDbgCntMode;
63759 +
63760 +/**************************************************************************//**
63761 + @Description   Enum for selecting DMA Cache Override
63762 +*//***************************************************************************/
63763 +typedef enum e_FmDmaCacheOverride {
63764 +    e_FM_DMA_NO_CACHE_OR = 0,               /**< No override of the Cache field */
63765 +    e_FM_DMA_NO_STASH_DATA,                 /**< Data should not be stashed in system level cache */
63766 +    e_FM_DMA_MAY_STASH_DATA,                /**< Data may be stashed in system level cache */
63767 +    e_FM_DMA_STASH_DATA                     /**< Data should be stashed in system level cache */
63768 +} e_FmDmaCacheOverride;
63769 +
63770 +/**************************************************************************//**
63771 + @Description   Enum for selecting DMA External Bus Priority
63772 +*//***************************************************************************/
63773 +typedef enum e_FmDmaExtBusPri {
63774 +    e_FM_DMA_EXT_BUS_NORMAL = 0,            /**< Normal priority */
63775 +    e_FM_DMA_EXT_BUS_EBS,                   /**< AXI extended bus service priority */
63776 +    e_FM_DMA_EXT_BUS_SOS,                   /**< AXI sos priority */
63777 +    e_FM_DMA_EXT_BUS_EBS_AND_SOS            /**< AXI ebs + sos priority */
63778 +} e_FmDmaExtBusPri;
63779 +
63780 +/**************************************************************************//**
63781 + @Description   Enum for choosing the field that will be output on AID
63782 +*//***************************************************************************/
63783 +typedef enum e_FmDmaAidMode {
63784 +    e_FM_DMA_AID_OUT_PORT_ID = 0,           /**< 4 LSB of PORT_ID */
63785 +    e_FM_DMA_AID_OUT_TNUM                   /**< 4 LSB of TNUM */
63786 +} e_FmDmaAidMode;
63787 +
63788 +/**************************************************************************//**
63789 + @Description   Enum for selecting FPM Catastrophic error behavior
63790 +*//***************************************************************************/
63791 +typedef enum e_FmCatastrophicErr {
63792 +    e_FM_CATASTROPHIC_ERR_STALL_PORT = 0,   /**< Port_ID is stalled (only reset can release it) */
63793 +    e_FM_CATASTROPHIC_ERR_STALL_TASK        /**< Only erroneous task is stalled */
63794 +} e_FmCatastrophicErr;
63795 +
63796 +/**************************************************************************//**
63797 + @Description   Enum for selecting FPM DMA Error behavior
63798 +*//***************************************************************************/
63799 +typedef enum e_FmDmaErr {
63800 +    e_FM_DMA_ERR_CATASTROPHIC = 0,          /**< Dma error is treated as a catastrophic
63801 +                                                 error (e_FmCatastrophicErr)*/
63802 +    e_FM_DMA_ERR_REPORT                     /**< Dma error is just reported */
63803 +} e_FmDmaErr;
63804 +
63805 +/**************************************************************************//**
63806 + @Description   Enum for selecting DMA Emergency level by BMI emergency signal
63807 +*//***************************************************************************/
63808 +typedef enum e_FmDmaEmergencyLevel {
63809 +    e_FM_DMA_EM_EBS = 0,                    /**< EBS emergency */
63810 +    e_FM_DMA_EM_SOS                         /**< SOS emergency */
63811 +} e_FmDmaEmergencyLevel;
63812 +
63813 +/**************************************************************************//**
63814 + @Collection   Enum for selecting DMA Emergency options
63815 +*//***************************************************************************/
63816 +typedef uint32_t fmEmergencyBus_t;          /**< DMA emergency options */
63817 +
63818 +#define  FM_DMA_MURAM_READ_EMERGENCY        0x00800000    /**< Enable emergency for MURAM1 */
63819 +#define  FM_DMA_MURAM_WRITE_EMERGENCY       0x00400000    /**< Enable emergency for MURAM2 */
63820 +#define  FM_DMA_EXT_BUS_EMERGENCY           0x00100000    /**< Enable emergency for external bus */
63821 +/* @} */
63822 +
63823 +/**************************************************************************//**
63824 + @Description   A structure for defining DMA emergency level
63825 +*//***************************************************************************/
63826 +typedef struct t_FmDmaEmergency {
63827 +    fmEmergencyBus_t        emergencyBusSelect;             /**< An OR of the busses where emergency
63828 +                                                                 should be enabled */
63829 +    e_FmDmaEmergencyLevel   emergencyLevel;                 /**< EBS/SOS */
63830 +} t_FmDmaEmergency;
63831 +
63832 +/**************************************************************************//*
63833 + @Description   structure for defining FM threshold
63834 +*//***************************************************************************/
63835 +typedef struct t_FmThresholds {
63836 +    uint8_t                 dispLimit;                      /**< The number of times a frames may
63837 +                                                                 be passed in the FM before assumed to
63838 +                                                                 be looping. */
63839 +    uint8_t                 prsDispTh;                      /**< This is the number pf packets that may be
63840 +                                                                 queued in the parser dispatch queue*/
63841 +    uint8_t                 plcrDispTh;                     /**< This is the number pf packets that may be
63842 +                                                                 queued in the policer dispatch queue*/
63843 +    uint8_t                 kgDispTh;                       /**< This is the number pf packets that may be
63844 +                                                                 queued in the keygen dispatch queue*/
63845 +    uint8_t                 bmiDispTh;                      /**< This is the number pf packets that may be
63846 +                                                                 queued in the BMI dispatch queue*/
63847 +    uint8_t                 qmiEnqDispTh;                   /**< This is the number pf packets that may be
63848 +                                                                 queued in the QMI enqueue dispatch queue*/
63849 +    uint8_t                 qmiDeqDispTh;                   /**< This is the number pf packets that may be
63850 +                                                                 queued in the QMI dequeue dispatch queue*/
63851 +    uint8_t                 fmCtl1DispTh;                   /**< This is the number pf packets that may be
63852 +                                                                 queued in fmCtl1 dispatch queue*/
63853 +    uint8_t                 fmCtl2DispTh;                   /**< This is the number pf packets that may be
63854 +                                                                 queued in fmCtl2 dispatch queue*/
63855 +} t_FmThresholds;
63856 +
63857 +/**************************************************************************//*
63858 + @Description   structure for defining DMA thresholds
63859 +*//***************************************************************************/
63860 +typedef struct t_FmDmaThresholds {
63861 +    uint8_t                     assertEmergency;            /**< When this value is reached,
63862 +                                                                 assert emergency (Threshold)*/
63863 +    uint8_t                     clearEmergency;             /**< After emergency is asserted, it is held
63864 +                                                                 until this value is reached (Hystheresis) */
63865 +} t_FmDmaThresholds;
63866 +
63867 +/**************************************************************************//**
63868 + @Function      t_FmResetOnInitOverrideCallback
63869 +
63870 + @Description   FMan specific reset on init user callback routine,
63871 +                will be used to override the standard FMan reset on init procedure
63872 +
63873 + @Param[in]     h_Fm  - FMan handler
63874 +*//***************************************************************************/
63875 +typedef void (t_FmResetOnInitOverrideCallback)(t_Handle h_Fm);
63876 +
63877 +/**************************************************************************//**
63878 + @Function      FM_ConfigResetOnInit
63879 +
63880 + @Description   Define whether to reset the FM before initialization.
63881 +                Change the default configuration [DEFAULT_resetOnInit].
63882 +
63883 + @Param[in]     h_Fm                A handle to an FM Module.
63884 + @Param[in]     enable              When TRUE, FM will be reset before any initialization.
63885 +
63886 + @Return        E_OK on success; Error code otherwise.
63887 +
63888 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63889 +                This routine should NOT be called from guest-partition
63890 +                (i.e. guestId != NCSW_MASTER_ID)
63891 +*//***************************************************************************/
63892 +t_Error FM_ConfigResetOnInit(t_Handle h_Fm, bool enable);
63893 +
63894 +/**************************************************************************//**
63895 + @Function      FM_ConfigResetOnInitOverrideCallback
63896 +
63897 + @Description   Define a special reset of FM before initialization.
63898 +                Change the default configuration [DEFAULT_resetOnInitOverrideCallback].
63899 +
63900 + @Param[in]     h_Fm                   A handle to an FM Module.
63901 + @Param[in]     f_ResetOnInitOverride   FM specific reset on init user callback routine.
63902 +
63903 + @Return        E_OK on success; Error code otherwise.
63904 +
63905 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63906 +                This routine should NOT be called from guest-partition
63907 +                (i.e. guestId != NCSW_MASTER_ID)
63908 +*//***************************************************************************/
63909 +t_Error FM_ConfigResetOnInitOverrideCallback(t_Handle h_Fm, t_FmResetOnInitOverrideCallback *f_ResetOnInitOverride);
63910 +
63911 +/**************************************************************************//**
63912 + @Function      FM_ConfigTotalFifoSize
63913 +
63914 + @Description   Define Total FIFO size for the whole FM.
63915 +                Calling this routine changes the total Fifo size in the internal driver
63916 +                data base from its default configuration [DEFAULT_totalFifoSize]
63917 +
63918 + @Param[in]     h_Fm                A handle to an FM Module.
63919 + @Param[in]     totalFifoSize       The selected new value.
63920 +
63921 + @Return        E_OK on success; Error code otherwise.
63922 +
63923 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63924 +                This routine should NOT be called from guest-partition
63925 +                (i.e. guestId != NCSW_MASTER_ID)
63926 +*//***************************************************************************/
63927 +t_Error FM_ConfigTotalFifoSize(t_Handle h_Fm, uint32_t totalFifoSize);
63928 +
63929 + /**************************************************************************//**
63930 + @Function      FM_ConfigDmaCacheOverride
63931 +
63932 + @Description   Define cache override mode.
63933 +                Calling this routine changes the cache override mode
63934 +                in the internal driver data base from its default configuration [DEFAULT_cacheOverride]
63935 +
63936 + @Param[in]     h_Fm            A handle to an FM Module.
63937 + @Param[in]     cacheOverride   The selected new value.
63938 +
63939 + @Return        E_OK on success; Error code otherwise.
63940 +
63941 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63942 +                This routine should NOT be called from guest-partition
63943 +                (i.e. guestId != NCSW_MASTER_ID)
63944 +*//***************************************************************************/
63945 +t_Error FM_ConfigDmaCacheOverride(t_Handle h_Fm, e_FmDmaCacheOverride cacheOverride);
63946 +
63947 +/**************************************************************************//**
63948 + @Function      FM_ConfigDmaAidOverride
63949 +
63950 + @Description   Define DMA AID override mode.
63951 +                Calling this routine changes the AID override mode
63952 +                in the internal driver data base from its default configuration  [DEFAULT_aidOverride]
63953 +
63954 + @Param[in]     h_Fm            A handle to an FM Module.
63955 + @Param[in]     aidOverride     The selected new value.
63956 +
63957 + @Return        E_OK on success; Error code otherwise.
63958 +
63959 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63960 +                This routine should NOT be called from guest-partition
63961 +                (i.e. guestId != NCSW_MASTER_ID)
63962 +*//***************************************************************************/
63963 +t_Error FM_ConfigDmaAidOverride(t_Handle h_Fm, bool aidOverride);
63964 +
63965 +/**************************************************************************//**
63966 + @Function      FM_ConfigDmaAidMode
63967 +
63968 + @Description   Define DMA AID  mode.
63969 +                Calling this routine changes the AID  mode in the internal
63970 +                driver data base from its default configuration [DEFAULT_aidMode]
63971 +
63972 + @Param[in]     h_Fm            A handle to an FM Module.
63973 + @Param[in]     aidMode         The selected new value.
63974 +
63975 + @Return        E_OK on success; Error code otherwise.
63976 +
63977 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63978 +                This routine should NOT be called from guest-partition
63979 +                (i.e. guestId != NCSW_MASTER_ID)
63980 +*//***************************************************************************/
63981 +t_Error FM_ConfigDmaAidMode(t_Handle h_Fm, e_FmDmaAidMode aidMode);
63982 +
63983 +/**************************************************************************//**
63984 + @Function      FM_ConfigDmaAxiDbgNumOfBeats
63985 +
63986 + @Description   Define DMA AXI number of beats.
63987 +                Calling this routine changes the AXI number of beats in the internal
63988 +                driver data base from its default configuration [DEFAULT_axiDbgNumOfBeats]
63989 +
63990 + @Param[in]     h_Fm                A handle to an FM Module.
63991 + @Param[in]     axiDbgNumOfBeats    The selected new value.
63992 +
63993 + @Return        E_OK on success; Error code otherwise.
63994 +
63995 + @Cautions      Allowed only following FM_Config() and before FM_Init().
63996 +                This routine should NOT be called from guest-partition
63997 +                (i.e. guestId != NCSW_MASTER_ID)
63998 +*//***************************************************************************/
63999 +t_Error FM_ConfigDmaAxiDbgNumOfBeats(t_Handle h_Fm, uint8_t axiDbgNumOfBeats);
64000 +
64001 +/**************************************************************************//**
64002 + @Function      FM_ConfigDmaCamNumOfEntries
64003 +
64004 + @Description   Define number of CAM entries.
64005 +                Calling this routine changes the number of CAM entries in the internal
64006 +                driver data base from its default configuration [DEFAULT_dmaCamNumOfEntries].
64007 +
64008 + @Param[in]     h_Fm            A handle to an FM Module.
64009 + @Param[in]     numOfEntries    The selected new value.
64010 +
64011 + @Return        E_OK on success; Error code otherwise.
64012 +
64013 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64014 +                This routine should NOT be called from guest-partition
64015 +                (i.e. guestId != NCSW_MASTER_ID)
64016 +*//***************************************************************************/
64017 +t_Error FM_ConfigDmaCamNumOfEntries(t_Handle h_Fm, uint8_t numOfEntries);
64018 +
64019 +/**************************************************************************//**
64020 + @Function      FM_ConfigEnableCounters
64021 +
64022 + @Description   Obsolete, always return E_OK.
64023 +
64024 + @Param[in]     h_Fm    A handle to an FM Module.
64025 +
64026 + @Return        E_OK on success; Error code otherwise.
64027 +*//***************************************************************************/
64028 +t_Error FM_ConfigEnableCounters(t_Handle h_Fm);
64029 +
64030 +/**************************************************************************//**
64031 + @Function      FM_ConfigDmaDbgCounter
64032 +
64033 + @Description   Define DMA debug counter.
64034 +                Calling this routine changes the number of the DMA debug counter in the internal
64035 +                driver data base from its default configuration [DEFAULT_dmaDbgCntMode].
64036 +
64037 + @Param[in]     h_Fm                A handle to an FM Module.
64038 + @Param[in]     fmDmaDbgCntMode     An enum selecting the debug counter mode.
64039 +
64040 + @Return        E_OK on success; Error code otherwise.
64041 +
64042 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64043 +                This routine should NOT be called from guest-partition
64044 +                (i.e. guestId != NCSW_MASTER_ID)
64045 +*//***************************************************************************/
64046 +t_Error FM_ConfigDmaDbgCounter(t_Handle h_Fm, e_FmDmaDbgCntMode fmDmaDbgCntMode);
64047 +
64048 +/**************************************************************************//**
64049 + @Function      FM_ConfigDmaStopOnBusErr
64050 +
64051 + @Description   Define bus error behavior.
64052 +                Calling this routine changes the bus error behavior definition
64053 +                in the internal driver data base from its default
64054 +                configuration [DEFAULT_dmaStopOnBusError].
64055 +
64056 + @Param[in]     h_Fm    A handle to an FM Module.
64057 + @Param[in]     stop    TRUE to stop on bus error, FALSE to continue.
64058 +
64059 + @Return        E_OK on success; Error code otherwise.
64060 +
64061 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64062 +                Only if bus error is enabled.
64063 +                This routine should NOT be called from guest-partition
64064 +                (i.e. guestId != NCSW_MASTER_ID)
64065 +*//***************************************************************************/
64066 +t_Error FM_ConfigDmaStopOnBusErr(t_Handle h_Fm, bool stop);
64067 +
64068 +/**************************************************************************//**
64069 + @Function      FM_ConfigDmaEmergency
64070 +
64071 + @Description   Define DMA emergency.
64072 +                Calling this routine changes the DMA emergency definition
64073 +                in the internal driver data base from its default
64074 +                configuration where's it's disabled.
64075 +
64076 + @Param[in]     h_Fm        A handle to an FM Module.
64077 + @Param[in]     p_Emergency An OR mask of all required options.
64078 +
64079 + @Return        E_OK on success; Error code otherwise.
64080 +
64081 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64082 +                This routine should NOT be called from guest-partition
64083 +                (i.e. guestId != NCSW_MASTER_ID)
64084 +*//***************************************************************************/
64085 +t_Error FM_ConfigDmaEmergency(t_Handle h_Fm, t_FmDmaEmergency *p_Emergency);
64086 +
64087 +/**************************************************************************//**
64088 + @Function      FM_ConfigDmaErr
64089 +
64090 + @Description   DMA error treatment.
64091 +                Calling this routine changes the DMA error treatment
64092 +                in the internal driver data base from its default
64093 +                configuration [DEFAULT_dmaErr].
64094 +
64095 + @Param[in]     h_Fm    A handle to an FM Module.
64096 + @Param[in]     dmaErr  The selected new choice.
64097 +
64098 + @Return        E_OK on success; Error code otherwise.
64099 +
64100 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64101 +                This routine should NOT be called from guest-partition
64102 +                (i.e. guestId != NCSW_MASTER_ID)
64103 +*//***************************************************************************/
64104 +t_Error FM_ConfigDmaErr(t_Handle h_Fm, e_FmDmaErr dmaErr);
64105 +
64106 +/**************************************************************************//**
64107 + @Function      FM_ConfigCatastrophicErr
64108 +
64109 + @Description   Define FM behavior on catastrophic error.
64110 +                Calling this routine changes the FM behavior on catastrophic
64111 +                error in the internal driver data base from its default
64112 +                [DEFAULT_catastrophicErr].
64113 +
64114 + @Param[in]     h_Fm                A handle to an FM Module.
64115 + @Param[in]     catastrophicErr     The selected new choice.
64116 +
64117 + @Return        E_OK on success; Error code otherwise.
64118 +
64119 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64120 +                This routine should NOT be called from guest-partition
64121 +                (i.e. guestId != NCSW_MASTER_ID)
64122 +*//***************************************************************************/
64123 +t_Error FM_ConfigCatastrophicErr(t_Handle h_Fm, e_FmCatastrophicErr catastrophicErr);
64124 +
64125 +/**************************************************************************//**
64126 + @Function      FM_ConfigEnableMuramTestMode
64127 +
64128 + @Description   Enable MURAM test mode.
64129 +                Calling this routine changes the internal driver data base
64130 +                from its default selection of test mode where it's disabled.
64131 +                This routine is only avaiable on old FM revisions (FMan v2).
64132 +
64133 + @Param[in]     h_Fm    A handle to an FM Module.
64134 +
64135 + @Return        E_OK on success; Error code otherwise.
64136 +
64137 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64138 +                This routine should NOT be called from guest-partition
64139 +                (i.e. guestId != NCSW_MASTER_ID)
64140 +*//***************************************************************************/
64141 +t_Error FM_ConfigEnableMuramTestMode(t_Handle h_Fm);
64142 +
64143 +/**************************************************************************//**
64144 + @Function      FM_ConfigEnableIramTestMode
64145 +
64146 + @Description   Enable IRAM test mode.
64147 +                Calling this routine changes the internal driver data base
64148 +                from its default selection of test mode where it's disabled.
64149 +                This routine is only avaiable on old FM revisions (FMan v2).
64150 +
64151 + @Param[in]     h_Fm    A handle to an FM Module.
64152 +
64153 + @Return        E_OK on success; Error code otherwise.
64154 +
64155 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64156 +                This routine should NOT be called from guest-partition
64157 +                (i.e. guestId != NCSW_MASTER_ID)
64158 +*//***************************************************************************/
64159 +t_Error FM_ConfigEnableIramTestMode(t_Handle h_Fm);
64160 +
64161 +/**************************************************************************//**
64162 + @Function      FM_ConfigHaltOnExternalActivation
64163 +
64164 + @Description   Define FM behavior on external halt activation.
64165 +                Calling this routine changes the FM behavior on external halt
64166 +                activation in the internal driver data base from its default
64167 +                [DEFAULT_haltOnExternalActivation].
64168 +
64169 + @Param[in]     h_Fm            A handle to an FM Module.
64170 + @Param[in]     enable          TRUE to enable halt on external halt
64171 +                                activation.
64172 +
64173 + @Return        E_OK on success; Error code otherwise.
64174 +
64175 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64176 +                This routine should NOT be called from guest-partition
64177 +                (i.e. guestId != NCSW_MASTER_ID)
64178 +*//***************************************************************************/
64179 +t_Error FM_ConfigHaltOnExternalActivation(t_Handle h_Fm, bool enable);
64180 +
64181 +/**************************************************************************//**
64182 + @Function      FM_ConfigHaltOnUnrecoverableEccError
64183 +
64184 + @Description   Define FM behavior on external halt activation.
64185 +                Calling this routine changes the FM behavior on unrecoverable
64186 +                ECC error in the internal driver data base from its default
64187 +                [DEFAULT_haltOnUnrecoverableEccError].
64188 +                This routine is only avaiable on old FM revisions (FMan v2).
64189 +
64190 + @Param[in]     h_Fm            A handle to an FM Module.
64191 + @Param[in]     enable          TRUE to enable halt on unrecoverable Ecc error
64192 +
64193 + @Return        E_OK on success; Error code otherwise.
64194 +
64195 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64196 +                This routine should NOT be called from guest-partition
64197 +                (i.e. guestId != NCSW_MASTER_ID)
64198 +*//***************************************************************************/
64199 +t_Error FM_ConfigHaltOnUnrecoverableEccError(t_Handle h_Fm, bool enable);
64200 +
64201 +/**************************************************************************//**
64202 + @Function      FM_ConfigException
64203 +
64204 + @Description   Define FM exceptions.
64205 +                Calling this routine changes the exceptions defaults in the
64206 +                internal driver data base where all exceptions are enabled.
64207 +
64208 + @Param[in]     h_Fm            A handle to an FM Module.
64209 + @Param[in]     exception       The exception to be selected.
64210 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
64211 +
64212 + @Return        E_OK on success; Error code otherwise.
64213 +
64214 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64215 +                This routine should NOT be called from guest-partition
64216 +                (i.e. guestId != NCSW_MASTER_ID)
64217 +*//***************************************************************************/
64218 +t_Error FM_ConfigException(t_Handle h_Fm, e_FmExceptions exception, bool enable);
64219 +
64220 +/**************************************************************************//**
64221 + @Function      FM_ConfigExternalEccRamsEnable
64222 +
64223 + @Description   Select external ECC enabling.
64224 +                Calling this routine changes the ECC enabling control in the internal
64225 +                driver data base from its default [DEFAULT_externalEccRamsEnable].
64226 +                When this option is enabled Rams ECC enabling is not effected
64227 +                by FM_EnableRamsEcc/FM_DisableRamsEcc, but by a JTAG.
64228 +
64229 + @Param[in]     h_Fm            A handle to an FM Module.
64230 + @Param[in]     enable          TRUE to enable this option.
64231 +
64232 + @Return        E_OK on success; Error code otherwise.
64233 +
64234 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64235 +                This routine should NOT be called from guest-partition
64236 +                (i.e. guestId != NCSW_MASTER_ID)
64237 +*//***************************************************************************/
64238 +t_Error FM_ConfigExternalEccRamsEnable(t_Handle h_Fm, bool enable);
64239 +
64240 +/**************************************************************************//**
64241 + @Function      FM_ConfigTnumAgingPeriod
64242 +
64243 + @Description   Define Tnum aging period.
64244 +                Calling this routine changes the Tnum aging of dequeue TNUMs
64245 +                in the QMI in the internal driver data base from its default
64246 +                [DEFAULT_tnumAgingPeriod].
64247 +
64248 + @Param[in]     h_Fm                A handle to an FM Module.
64249 + @Param[in]     tnumAgingPeriod     Tnum Aging Period in microseconds.
64250 +                                    Note that period is recalculated in units of
64251 +                                    64 FM clocks. Driver will pick the closest
64252 +                                    possible period.
64253 +
64254 + @Return        E_OK on success; Error code otherwise.
64255 +
64256 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64257 +                This routine should NOT be called from guest-partition
64258 +                (i.e. guestId != NCSW_MASTER_ID)
64259 +                NOTE that if some MAC is configured for PFC, '0' value is NOT
64260 +                allowed.
64261 +*//***************************************************************************/
64262 +t_Error FM_ConfigTnumAgingPeriod(t_Handle h_Fm, uint16_t tnumAgingPeriod);
64263 +
64264 +/**************************************************************************//*
64265 + @Function      FM_ConfigDmaEmergencySmoother
64266 +
64267 + @Description   Define DMA emergency smoother.
64268 +                Calling this routine changes the definition of the minimum
64269 +                amount of DATA beats transferred on the AXI READ and WRITE
64270 +                ports before lowering the emergency level.
64271 +                By default smoother is disabled.
64272 +
64273 + @Param[in]     h_Fm            A handle to an FM Module.
64274 + @Param[in]     emergencyCnt    emergency switching counter.
64275 +
64276 + @Return        E_OK on success; Error code otherwise.
64277 +
64278 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64279 +                This routine should NOT be called from guest-partition
64280 +                (i.e. guestId != NCSW_MASTER_ID)
64281 +*//***************************************************************************/
64282 +t_Error FM_ConfigDmaEmergencySmoother(t_Handle h_Fm, uint32_t emergencyCnt);
64283 +
64284 +/**************************************************************************//*
64285 + @Function      FM_ConfigThresholds
64286 +
64287 + @Description   Calling this routine changes the internal driver data base
64288 +                from its default FM threshold configuration:
64289 +                    dispLimit:    [DEFAULT_dispLimit]
64290 +                    prsDispTh:    [DEFAULT_prsDispTh]
64291 +                    plcrDispTh:   [DEFAULT_plcrDispTh]
64292 +                    kgDispTh:     [DEFAULT_kgDispTh]
64293 +                    bmiDispTh:    [DEFAULT_bmiDispTh]
64294 +                    qmiEnqDispTh: [DEFAULT_qmiEnqDispTh]
64295 +                    qmiDeqDispTh: [DEFAULT_qmiDeqDispTh]
64296 +                    fmCtl1DispTh: [DEFAULT_fmCtl1DispTh]
64297 +                    fmCtl2DispTh: [DEFAULT_fmCtl2DispTh]
64298 +
64299 +
64300 + @Param[in]     h_Fm            A handle to an FM Module.
64301 + @Param[in]     p_FmThresholds  A structure of threshold parameters.
64302 +
64303 + @Return        E_OK on success; Error code otherwise.
64304 +
64305 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64306 +                This routine should NOT be called from guest-partition
64307 +                (i.e. guestId != NCSW_MASTER_ID)
64308 +*//***************************************************************************/
64309 +t_Error FM_ConfigThresholds(t_Handle h_Fm, t_FmThresholds *p_FmThresholds);
64310 +
64311 +/**************************************************************************//*
64312 + @Function      FM_ConfigDmaSosEmergencyThreshold
64313 +
64314 + @Description   Calling this routine changes the internal driver data base
64315 +                from its default dma SOS emergency configuration [DEFAULT_dmaSosEmergency]
64316 +
64317 + @Param[in]     h_Fm                A handle to an FM Module.
64318 + @Param[in]     dmaSosEmergency     The selected new value.
64319 +
64320 + @Return        E_OK on success; Error code otherwise.
64321 +
64322 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64323 +                This routine should NOT be called from guest-partition
64324 +                (i.e. guestId != NCSW_MASTER_ID)
64325 +*//***************************************************************************/
64326 +t_Error FM_ConfigDmaSosEmergencyThreshold(t_Handle h_Fm, uint32_t dmaSosEmergency);
64327 +
64328 +/**************************************************************************//*
64329 + @Function      FM_ConfigDmaWriteBufThresholds
64330 +
64331 + @Description   Calling this routine changes the internal driver data base
64332 +                from its default configuration of DMA write buffer threshold
64333 +                assertEmergency: [DEFAULT_dmaWriteIntBufLow]
64334 +                clearEmergency:  [DEFAULT_dmaWriteIntBufHigh]
64335 +                This routine is only avaiable on old FM revisions (FMan v2).
64336 +
64337 + @Param[in]     h_Fm                A handle to an FM Module.
64338 + @Param[in]     p_FmDmaThresholds   A structure of thresholds to define emergency behavior -
64339 +                                    When 'assertEmergency' value is reached, emergency is asserted,
64340 +                                    then it is held until 'clearEmergency' value is reached.
64341 +
64342 + @Return        E_OK on success; Error code otherwise.
64343 +
64344 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64345 +                This routine should NOT be called from guest-partition
64346 +                (i.e. guestId != NCSW_MASTER_ID)
64347 +*//***************************************************************************/
64348 +t_Error FM_ConfigDmaWriteBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds);
64349 +
64350 + /**************************************************************************//*
64351 + @Function      FM_ConfigDmaCommQThresholds
64352 +
64353 + @Description   Calling this routine changes the internal driver data base
64354 +                from its default configuration of DMA command queue threshold
64355 +                assertEmergency: [DEFAULT_dmaCommQLow]
64356 +                clearEmergency:  [DEFAULT_dmaCommQHigh]
64357 +
64358 + @Param[in]     h_Fm                A handle to an FM Module.
64359 + @Param[in]     p_FmDmaThresholds   A structure of thresholds to define emergency behavior -
64360 +                                    When 'assertEmergency' value is reached, emergency is asserted,
64361 +                                    then it is held until 'clearEmergency' value is reached..
64362 +
64363 + @Return        E_OK on success; Error code otherwise.
64364 +
64365 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64366 +                This routine should NOT be called from guest-partition
64367 +                (i.e. guestId != NCSW_MASTER_ID)
64368 +*//***************************************************************************/
64369 +t_Error FM_ConfigDmaCommQThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds);
64370 +
64371 +/**************************************************************************//*
64372 + @Function      FM_ConfigDmaReadBufThresholds
64373 +
64374 + @Description   Calling this routine changes the internal driver data base
64375 +                from its default configuration of DMA read buffer threshold
64376 +                assertEmergency: [DEFAULT_dmaReadIntBufLow]
64377 +                clearEmergency:  [DEFAULT_dmaReadIntBufHigh]
64378 +                This routine is only avaiable on old FM revisions (FMan v2).
64379 +
64380 + @Param[in]     h_Fm                A handle to an FM Module.
64381 + @Param[in]     p_FmDmaThresholds   A structure of thresholds to define emergency behavior -
64382 +                                    When 'assertEmergency' value is reached, emergency is asserted,
64383 +                                    then it is held until 'clearEmergency' value is reached..
64384 +
64385 + @Return        E_OK on success; Error code otherwise.
64386 +
64387 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64388 +                This routine should NOT be called from guest-partition
64389 +                (i.e. guestId != NCSW_MASTER_ID)
64390 +*//***************************************************************************/
64391 +t_Error FM_ConfigDmaReadBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds);
64392 +
64393 +/**************************************************************************//*
64394 + @Function      FM_ConfigDmaWatchdog
64395 +
64396 + @Description   Calling this routine changes the internal driver data base
64397 +                from its default watchdog configuration, which is disabled
64398 +                [DEFAULT_dmaWatchdog].
64399 +
64400 + @Param[in]     h_Fm            A handle to an FM Module.
64401 + @Param[in]     watchDogValue   The selected new value - in microseconds.
64402 +
64403 + @Return        E_OK on success; Error code otherwise.
64404 +
64405 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64406 +                This routine should NOT be called from guest-partition
64407 +                (i.e. guestId != NCSW_MASTER_ID)
64408 +*//***************************************************************************/
64409 +t_Error FM_ConfigDmaWatchdog(t_Handle h_Fm, uint32_t watchDogValue);
64410 +
64411 +/** @} */ /* end of FM_advanced_init_grp group */
64412 +/** @} */ /* end of FM_init_grp group */
64413 +
64414 +
64415 +/**************************************************************************//**
64416 + @Group         FM_runtime_control_grp FM Runtime Control Unit
64417 +
64418 + @Description   FM Runtime control unit API functions, definitions and enums.
64419 +                The FM driver provides a set of control routines.
64420 +                These routines may only be called after the module was fully
64421 +                initialized (both configuration and initialization routines were
64422 +                called). They are typically used to get information from hardware
64423 +                (status, counters/statistics, revision etc.), to modify a current
64424 +                state or to force/enable a required action. Run-time control may
64425 +                be called whenever necessary and as many times as needed.
64426 + @{
64427 +*//***************************************************************************/
64428 +
64429 +/**************************************************************************//**
64430 + @Collection   General FM defines.
64431 +*//***************************************************************************/
64432 +#define FM_MAX_NUM_OF_VALID_PORTS   (FM_MAX_NUM_OF_OH_PORTS +       \
64433 +                                     FM_MAX_NUM_OF_1G_RX_PORTS +    \
64434 +                                     FM_MAX_NUM_OF_10G_RX_PORTS +   \
64435 +                                     FM_MAX_NUM_OF_1G_TX_PORTS +    \
64436 +                                     FM_MAX_NUM_OF_10G_TX_PORTS)      /**< Number of available FM ports */
64437 +/* @} */
64438 +
64439 +/**************************************************************************//*
64440 + @Description   A Structure for Port bandwidth requirement. Port is identified
64441 +                by type and relative id.
64442 +*//***************************************************************************/
64443 +typedef struct t_FmPortBandwidth {
64444 +    e_FmPortType        type;           /**< FM port type */
64445 +    uint8_t             relativePortId; /**< Type relative port id */
64446 +    uint8_t             bandwidth;      /**< bandwidth - (in term of percents) */
64447 +} t_FmPortBandwidth;
64448 +
64449 +/**************************************************************************//*
64450 + @Description   A Structure containing an array of Port bandwidth requirements.
64451 +                The user should state the ports requiring bandwidth in terms of
64452 +                percentage - i.e. all port's bandwidths in the array must add
64453 +                up to 100.
64454 +*//***************************************************************************/
64455 +typedef struct t_FmPortsBandwidthParams {
64456 +    uint8_t             numOfPorts;         /**< The number of relevant ports, which is the
64457 +                                                 number of valid entries in the array below */
64458 +    t_FmPortBandwidth   portsBandwidths[FM_MAX_NUM_OF_VALID_PORTS];
64459 +                                            /**< for each port, it's bandwidth (all port's
64460 +                                                 bandwidths must add up to 100.*/
64461 +} t_FmPortsBandwidthParams;
64462 +
64463 +/**************************************************************************//**
64464 + @Description   DMA Emergency control on MURAM
64465 +*//***************************************************************************/
64466 +typedef enum e_FmDmaMuramPort {
64467 +    e_FM_DMA_MURAM_PORT_WRITE,              /**< MURAM write port */
64468 +    e_FM_DMA_MURAM_PORT_READ                /**< MURAM read port */
64469 +} e_FmDmaMuramPort;
64470 +
64471 +/**************************************************************************//**
64472 + @Description   Enum for defining FM counters
64473 +*//***************************************************************************/
64474 +typedef enum e_FmCounters {
64475 +    e_FM_COUNTERS_ENQ_TOTAL_FRAME = 0,              /**< QMI total enqueued frames counter */
64476 +    e_FM_COUNTERS_DEQ_TOTAL_FRAME,                  /**< QMI total dequeued frames counter */
64477 +    e_FM_COUNTERS_DEQ_0,                            /**< QMI 0 frames from QMan counter */
64478 +    e_FM_COUNTERS_DEQ_1,                            /**< QMI 1 frames from QMan counter */
64479 +    e_FM_COUNTERS_DEQ_2,                            /**< QMI 2 frames from QMan counter */
64480 +    e_FM_COUNTERS_DEQ_3,                            /**< QMI 3 frames from QMan counter */
64481 +    e_FM_COUNTERS_DEQ_FROM_DEFAULT,                 /**< QMI dequeue from default queue counter */
64482 +    e_FM_COUNTERS_DEQ_FROM_CONTEXT,                 /**< QMI dequeue from FQ context counter */
64483 +    e_FM_COUNTERS_DEQ_FROM_FD,                      /**< QMI dequeue from FD command field counter */
64484 +    e_FM_COUNTERS_DEQ_CONFIRM                       /**< QMI dequeue confirm counter */
64485 +} e_FmCounters;
64486 +
64487 +/**************************************************************************//**
64488 + @Description   A Structure for returning FM revision information
64489 +*//***************************************************************************/
64490 +typedef struct t_FmRevisionInfo {
64491 +    uint8_t         majorRev;               /**< Major revision */
64492 +    uint8_t         minorRev;               /**< Minor revision */
64493 +} t_FmRevisionInfo;
64494 +
64495 +/**************************************************************************//**
64496 + @Description   A Structure for returning FM ctrl code revision information
64497 +*//***************************************************************************/
64498 +typedef struct t_FmCtrlCodeRevisionInfo {
64499 +    uint16_t        packageRev;             /**< Package revision */
64500 +    uint8_t         majorRev;               /**< Major revision */
64501 +    uint8_t         minorRev;               /**< Minor revision */
64502 +} t_FmCtrlCodeRevisionInfo;
64503 +
64504 +/**************************************************************************//**
64505 + @Description   A Structure for defining DMA status
64506 +*//***************************************************************************/
64507 +typedef struct t_FmDmaStatus {
64508 +    bool    cmqNotEmpty;            /**< Command queue is not empty */
64509 +    bool    busError;               /**< Bus error occurred */
64510 +    bool    readBufEccError;        /**< Double ECC error on buffer Read (Valid for FM rev < 6)*/
64511 +    bool    writeBufEccSysError;    /**< Double ECC error on buffer write from system side (Valid for FM rev < 6)*/
64512 +    bool    writeBufEccFmError;     /**< Double ECC error on buffer write from FM side (Valid for FM rev < 6) */
64513 +    bool    singlePortEccError;     /**< Single Port ECC error from FM side (Valid for FM rev >= 6)*/
64514 +} t_FmDmaStatus;
64515 +
64516 +/**************************************************************************//**
64517 + @Description   A Structure for obtaining FM controller monitor values
64518 +*//***************************************************************************/
64519 +typedef struct t_FmCtrlMon {
64520 +    uint8_t percentCnt[2];          /**< Percentage value */
64521 +} t_FmCtrlMon;
64522 +
64523 +
64524 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
64525 +/**************************************************************************//**
64526 + @Function      FM_DumpRegs
64527 +
64528 + @Description   Dumps all FM registers
64529 +
64530 + @Param[in]     h_Fm      A handle to an FM Module.
64531 +
64532 + @Return        E_OK on success;
64533 +
64534 + @Cautions      Allowed only following FM_Init().
64535 +*//***************************************************************************/
64536 +t_Error FM_DumpRegs(t_Handle h_Fm);
64537 +#endif /* (defined(DEBUG_ERRORS) && ... */
64538 +
64539 +/**************************************************************************//**
64540 + @Function      FM_SetException
64541 +
64542 + @Description   Calling this routine enables/disables the specified exception.
64543 +
64544 + @Param[in]     h_Fm            A handle to an FM Module.
64545 + @Param[in]     exception       The exception to be selected.
64546 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
64547 +
64548 + @Return        E_OK on success; Error code otherwise.
64549 +
64550 + @Cautions      Allowed only following FM_Init().
64551 +                This routine should NOT be called from guest-partition
64552 +                (i.e. guestId != NCSW_MASTER_ID)
64553 +*//***************************************************************************/
64554 +t_Error FM_SetException(t_Handle h_Fm, e_FmExceptions exception, bool enable);
64555 +
64556 +/**************************************************************************//**
64557 + @Function      FM_EnableRamsEcc
64558 +
64559 + @Description   Enables ECC mechanism for all the different FM RAM's; E.g. IRAM,
64560 +                MURAM, Parser, Keygen, Policer, etc.
64561 +                Note:
64562 +                If FM_ConfigExternalEccRamsEnable was called to enable external
64563 +                setting of ECC, this routine effects IRAM ECC only.
64564 +                This routine is also called by the driver if an ECC exception is
64565 +                enabled.
64566 +
64567 + @Param[in]     h_Fm            A handle to an FM Module.
64568 +
64569 + @Return        E_OK on success; Error code otherwise.
64570 +
64571 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64572 +                This routine should NOT be called from guest-partition
64573 +                (i.e. guestId != NCSW_MASTER_ID)
64574 +*//***************************************************************************/
64575 +t_Error FM_EnableRamsEcc(t_Handle h_Fm);
64576 +
64577 +/**************************************************************************//**
64578 + @Function      FM_DisableRamsEcc
64579 +
64580 + @Description   Disables ECC mechanism for all the different FM RAM's; E.g. IRAM,
64581 +                MURAM, Parser, Keygen, Policer, etc.
64582 +                Note:
64583 +                If FM_ConfigExternalEccRamsEnable was called to enable external
64584 +                setting of ECC, this routine effects IRAM ECC only.
64585 +                In opposed to FM_EnableRamsEcc, this routine must be called
64586 +                explicitly to disable all Rams ECC.
64587 +
64588 + @Param[in]     h_Fm            A handle to an FM Module.
64589 +
64590 + @Return        E_OK on success; Error code otherwise.
64591 +
64592 + @Cautions      Allowed only following FM_Config() and before FM_Init().
64593 +                This routine should NOT be called from guest-partition
64594 +                (i.e. guestId != NCSW_MASTER_ID)
64595 +*//***************************************************************************/
64596 +t_Error FM_DisableRamsEcc(t_Handle h_Fm);
64597 +
64598 +/**************************************************************************//**
64599 + @Function      FM_GetRevision
64600 +
64601 + @Description   Returns the FM revision
64602 +
64603 + @Param[in]     h_Fm                A handle to an FM Module.
64604 + @Param[out]    p_FmRevisionInfo    A structure of revision information parameters.
64605 +
64606 + @Return        E_OK on success; Error code otherwise.
64607 +
64608 + @Cautions      Allowed only following FM_Init().
64609 +*//***************************************************************************/
64610 +t_Error  FM_GetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo);
64611 +
64612 +/**************************************************************************//**
64613 + @Function      FM_GetFmanCtrlCodeRevision
64614 +
64615 + @Description   Returns the Fman controller code revision
64616 +
64617 + @Param[in]     h_Fm                A handle to an FM Module.
64618 + @Param[out]    p_RevisionInfo      A structure of revision information parameters.
64619 +
64620 + @Return        E_OK on success; Error code otherwise.
64621 +
64622 + @Cautions      Allowed only following FM_Init().
64623 +*//***************************************************************************/
64624 +t_Error FM_GetFmanCtrlCodeRevision(t_Handle h_Fm, t_FmCtrlCodeRevisionInfo *p_RevisionInfo);
64625 +
64626 +/**************************************************************************//**
64627 + @Function      FM_GetCounter
64628 +
64629 + @Description   Reads one of the FM counters.
64630 +
64631 + @Param[in]     h_Fm        A handle to an FM Module.
64632 + @Param[in]     counter     The requested counter.
64633 +
64634 + @Return        Counter's current value.
64635 +
64636 + @Cautions      Allowed only following FM_Init().
64637 +                Note that it is user's responsibility to call this routine only
64638 +                for enabled counters, and there will be no indication if a
64639 +                disabled counter is accessed.
64640 +*//***************************************************************************/
64641 +uint32_t  FM_GetCounter(t_Handle h_Fm, e_FmCounters counter);
64642 +
64643 +/**************************************************************************//**
64644 + @Function      FM_ModifyCounter
64645 +
64646 + @Description   Sets a value to an enabled counter. Use "0" to reset the counter.
64647 +
64648 + @Param[in]     h_Fm        A handle to an FM Module.
64649 + @Param[in]     counter     The requested counter.
64650 + @Param[in]     val         The requested value to be written into the counter.
64651 +
64652 + @Return        E_OK on success; Error code otherwise.
64653 +
64654 + @Cautions      Allowed only following FM_Init().
64655 +                This routine should NOT be called from guest-partition
64656 +                (i.e. guestId != NCSW_MASTER_ID)
64657 +*//***************************************************************************/
64658 +t_Error  FM_ModifyCounter(t_Handle h_Fm, e_FmCounters counter, uint32_t val);
64659 +
64660 +/**************************************************************************//**
64661 + @Function      FM_Resume
64662 +
64663 + @Description   Release FM after halt FM command or after unrecoverable ECC error.
64664 +
64665 + @Param[in]     h_Fm        A handle to an FM Module.
64666 +
64667 + @Return        E_OK on success; Error code otherwise.
64668 +
64669 + @Cautions      Allowed only following FM_Init().
64670 +                This routine should NOT be called from guest-partition
64671 +                (i.e. guestId != NCSW_MASTER_ID)
64672 +*//***************************************************************************/
64673 +void FM_Resume(t_Handle h_Fm);
64674 +
64675 +/**************************************************************************//**
64676 + @Function      FM_SetDmaEmergency
64677 +
64678 + @Description   Manual emergency set
64679 +
64680 + @Param[in]     h_Fm        A handle to an FM Module.
64681 + @Param[in]     muramPort   MURAM direction select.
64682 + @Param[in]     enable      TRUE to manually enable emergency, FALSE to disable.
64683 +
64684 + @Return        None.
64685 +
64686 + @Cautions      Allowed only following FM_Init().
64687 +                This routine should NOT be called from guest-partition
64688 +                (i.e. guestId != NCSW_MASTER_ID)
64689 +*//***************************************************************************/
64690 +void FM_SetDmaEmergency(t_Handle h_Fm, e_FmDmaMuramPort muramPort, bool enable);
64691 +
64692 +/**************************************************************************//**
64693 + @Function      FM_SetDmaExtBusPri
64694 +
64695 + @Description   Set the DMA external bus priority
64696 +
64697 + @Param[in]     h_Fm    A handle to an FM Module.
64698 + @Param[in]     pri     External bus priority select
64699 +
64700 + @Return        None.
64701 +
64702 + @Cautions      Allowed only following FM_Init().
64703 +                This routine should NOT be called from guest-partition
64704 +                (i.e. guestId != NCSW_MASTER_ID)
64705 +*//***************************************************************************/
64706 +void FM_SetDmaExtBusPri(t_Handle h_Fm, e_FmDmaExtBusPri pri);
64707 +
64708 +/**************************************************************************//**
64709 + @Function      FM_GetDmaStatus
64710 +
64711 + @Description   Reads the DMA current status
64712 +
64713 + @Param[in]     h_Fm            A handle to an FM Module.
64714 + @Param[out]    p_FmDmaStatus   A structure of DMA status parameters.
64715 +
64716 + @Cautions      Allowed only following FM_Init().
64717 +*//***************************************************************************/
64718 +void FM_GetDmaStatus(t_Handle h_Fm, t_FmDmaStatus *p_FmDmaStatus);
64719 +
64720 +/**************************************************************************//**
64721 + @Function      FM_ErrorIsr
64722 +
64723 + @Description   FM interrupt-service-routine for errors.
64724 +
64725 + @Param[in]     h_Fm            A handle to an FM Module.
64726 +
64727 + @Return        E_OK on success; E_EMPTY if no errors found in register, other
64728 +                error code otherwise.
64729 +
64730 + @Cautions      Allowed only following FM_Init().
64731 +                This routine should NOT be called from guest-partition
64732 +                (i.e. guestId != NCSW_MASTER_ID)
64733 +*//***************************************************************************/
64734 +t_Error FM_ErrorIsr(t_Handle h_Fm);
64735 +
64736 +/**************************************************************************//**
64737 + @Function      FM_EventIsr
64738 +
64739 + @Description   FM interrupt-service-routine for normal events.
64740 +
64741 + @Param[in]     h_Fm            A handle to an FM Module.
64742 +
64743 + @Cautions      Allowed only following FM_Init().
64744 +                This routine should NOT be called from guest-partition
64745 +                (i.e. guestId != NCSW_MASTER_ID)
64746 +*//***************************************************************************/
64747 +void FM_EventIsr(t_Handle h_Fm);
64748 +
64749 +/**************************************************************************//**
64750 + @Function      FM_GetSpecialOperationCoding
64751 +
64752 + @Description   Return a specific coding according to the input mask.
64753 +
64754 + @Param[in]     h_Fm            A handle to an FM Module.
64755 + @Param[in]     spOper          special operation mask.
64756 + @Param[out]    p_SpOperCoding  special operation code.
64757 +
64758 + @Return        E_OK on success; Error code otherwise.
64759 +
64760 + @Cautions      Allowed only following FM_Init().
64761 +*//***************************************************************************/
64762 +t_Error FM_GetSpecialOperationCoding(t_Handle               h_Fm,
64763 +                                     fmSpecialOperations_t  spOper,
64764 +                                     uint8_t                *p_SpOperCoding);
64765 +
64766 +/**************************************************************************//**
64767 + @Function      FM_CtrlMonStart
64768 +
64769 + @Description   Start monitoring utilization of all available FM controllers.
64770 +
64771 +                In order to obtain FM controllers utilization the following sequence
64772 +                should be used:
64773 +                -# FM_CtrlMonStart()
64774 +                -# FM_CtrlMonStop()
64775 +                -# FM_CtrlMonGetCounters() - issued for each FM controller
64776 +
64777 + @Param[in]     h_Fm            A handle to an FM Module.
64778 +
64779 + @Return        E_OK on success; Error code otherwise.
64780 +
64781 + @Cautions      Allowed only following FM_Init().
64782 +                This routine should NOT be called from guest-partition
64783 +                (i.e. guestId != NCSW_MASTER_ID).
64784 +*//***************************************************************************/
64785 +t_Error FM_CtrlMonStart(t_Handle h_Fm);
64786 +
64787 +/**************************************************************************//**
64788 + @Function      FM_CtrlMonStop
64789 +
64790 + @Description   Stop monitoring utilization of all available FM controllers.
64791 +
64792 +                In order to obtain FM controllers utilization the following sequence
64793 +                should be used:
64794 +                -# FM_CtrlMonStart()
64795 +                -# FM_CtrlMonStop()
64796 +                -# FM_CtrlMonGetCounters() - issued for each FM controller
64797 +
64798 + @Param[in]     h_Fm            A handle to an FM Module.
64799 +
64800 + @Return        E_OK on success; Error code otherwise.
64801 +
64802 + @Cautions      Allowed only following FM_Init().
64803 +                This routine should NOT be called from guest-partition
64804 +                (i.e. guestId != NCSW_MASTER_ID).
64805 +*//***************************************************************************/
64806 +t_Error FM_CtrlMonStop(t_Handle h_Fm);
64807 +
64808 +/**************************************************************************//**
64809 + @Function      FM_CtrlMonGetCounters
64810 +
64811 + @Description   Obtain FM controller utilization parameters.
64812 +
64813 +                In order to obtain FM controllers utilization the following sequence
64814 +                should be used:
64815 +                -# FM_CtrlMonStart()
64816 +                -# FM_CtrlMonStop()
64817 +                -# FM_CtrlMonGetCounters() - issued for each FM controller
64818 +
64819 + @Param[in]     h_Fm            A handle to an FM Module.
64820 + @Param[in]     fmCtrlIndex     FM Controller index for that utilization results
64821 +                                are requested.
64822 + @Param[in]     p_Mon           Pointer to utilization results structure.
64823 +
64824 + @Return        E_OK on success; Error code otherwise.
64825 +
64826 + @Cautions      Allowed only following FM_Init().
64827 +                This routine should NOT be called from guest-partition
64828 +                (i.e. guestId != NCSW_MASTER_ID).
64829 +*//***************************************************************************/
64830 +t_Error FM_CtrlMonGetCounters(t_Handle h_Fm, uint8_t fmCtrlIndex, t_FmCtrlMon *p_Mon);
64831 +
64832 +
64833 +/**************************************************************************//*
64834 + @Function      FM_ForceIntr
64835 +
64836 + @Description   Causes an interrupt event on the requested source.
64837 +
64838 + @Param[in]     h_Fm            A handle to an FM Module.
64839 + @Param[in]     exception       An exception to be forced.
64840 +
64841 + @Return        E_OK on success; Error code if the exception is not enabled,
64842 +                or is not able to create interrupt.
64843 +
64844 + @Cautions      Allowed only following FM_Init().
64845 +                This routine should NOT be called from guest-partition
64846 +                (i.e. guestId != NCSW_MASTER_ID)
64847 +*//***************************************************************************/
64848 +t_Error FM_ForceIntr (t_Handle h_Fm, e_FmExceptions exception);
64849 +
64850 +/**************************************************************************//*
64851 + @Function      FM_SetPortsBandwidth
64852 +
64853 + @Description   Sets relative weights between ports when accessing common resources.
64854 +
64855 + @Param[in]     h_Fm                A handle to an FM Module.
64856 + @Param[in]     p_PortsBandwidth    A structure of ports bandwidths in percentage, i.e.
64857 +                                    total must equal 100.
64858 +
64859 + @Return        E_OK on success; Error code otherwise.
64860 +
64861 + @Cautions      Allowed only following FM_Init().
64862 +                This routine should NOT be called from guest-partition
64863 +                (i.e. guestId != NCSW_MASTER_ID)
64864 +*//***************************************************************************/
64865 +t_Error FM_SetPortsBandwidth(t_Handle h_Fm, t_FmPortsBandwidthParams *p_PortsBandwidth);
64866 +
64867 +/**************************************************************************//*
64868 + @Function      FM_GetMuramHandle
64869 +
64870 + @Description   Gets the corresponding MURAM handle
64871 +
64872 + @Param[in]     h_Fm                A handle to an FM Module.
64873 +
64874 + @Return        MURAM handle; NULL otherwise.
64875 +
64876 + @Cautions      Allowed only following FM_Init().
64877 +                This routine should NOT be called from guest-partition
64878 +                (i.e. guestId != NCSW_MASTER_ID)
64879 +*//***************************************************************************/
64880 +t_Handle FM_GetMuramHandle(t_Handle h_Fm);
64881 +
64882 +/** @} */ /* end of FM_runtime_control_grp group */
64883 +/** @} */ /* end of FM_lib_grp group */
64884 +/** @} */ /* end of FM_grp group */
64885 +
64886 +
64887 +#ifdef NCSW_BACKWARD_COMPATIBLE_API
64888 +typedef t_FmFirmwareParams          t_FmPcdFirmwareParams;
64889 +typedef t_FmBufferPrefixContent     t_FmPortBufferPrefixContent;
64890 +typedef t_FmExtPoolParams           t_FmPortExtPoolParams;
64891 +typedef t_FmExtPools                t_FmPortExtPools;
64892 +typedef t_FmBackupBmPools           t_FmPortBackupBmPools;
64893 +typedef t_FmBufPoolDepletion        t_FmPortBufPoolDepletion;
64894 +typedef e_FmDmaSwapOption           e_FmPortDmaSwapOption;
64895 +typedef e_FmDmaCacheOption          e_FmPortDmaCacheOption;
64896 +
64897 +#define FM_CONTEXTA_GET_OVVERIDE    FM_CONTEXTA_GET_OVERRIDE
64898 +#define FM_CONTEXTA_SET_OVVERIDE    FM_CONTEXTA_SET_OVERRIDE
64899 +
64900 +#define e_FM_EX_BMI_PIPELINE_ECC    e_FM_EX_BMI_STORAGE_PROFILE_ECC
64901 +#define e_FM_PORT_DMA_NO_SWP        e_FM_DMA_NO_SWP
64902 +#define e_FM_PORT_DMA_SWP_PPC_LE    e_FM_DMA_SWP_PPC_LE
64903 +#define e_FM_PORT_DMA_SWP_BE        e_FM_DMA_SWP_BE
64904 +#define e_FM_PORT_DMA_NO_STASH      e_FM_DMA_NO_STASH
64905 +#define e_FM_PORT_DMA_STASH         e_FM_DMA_STASH
64906 +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
64907 +
64908 +
64909 +#endif /* __FM_EXT */
64910 --- /dev/null
64911 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_mac_ext.h
64912 @@ -0,0 +1,859 @@
64913 +/*
64914 + * Copyright 2008-2012 Freescale Semiconductor Inc.
64915 + *
64916 + * Redistribution and use in source and binary forms, with or without
64917 + * modification, are permitted provided that the following conditions are met:
64918 + *     * Redistributions of source code must retain the above copyright
64919 + *       notice, this list of conditions and the following disclaimer.
64920 + *     * Redistributions in binary form must reproduce the above copyright
64921 + *       notice, this list of conditions and the following disclaimer in the
64922 + *       documentation and/or other materials provided with the distribution.
64923 + *     * Neither the name of Freescale Semiconductor nor the
64924 + *       names of its contributors may be used to endorse or promote products
64925 + *       derived from this software without specific prior written permission.
64926 + *
64927 + *
64928 + * ALTERNATIVELY, this software may be distributed under the terms of the
64929 + * GNU General Public License ("GPL") as published by the Free Software
64930 + * Foundation, either version 2 of that License or (at your option) any
64931 + * later version.
64932 + *
64933 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
64934 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
64935 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
64936 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
64937 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64938 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
64939 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
64940 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
64941 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
64942 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64943 + */
64944 +
64945 +
64946 +/**************************************************************************//**
64947 + @File          fm_mac_ext.h
64948 +
64949 + @Description   FM MAC ...
64950 +*//***************************************************************************/
64951 +#ifndef __FM_MAC_EXT_H
64952 +#define __FM_MAC_EXT_H
64953 +
64954 +#include "std_ext.h"
64955 +#include "enet_ext.h"
64956 +
64957 +
64958 +/**************************************************************************//**
64959 +
64960 + @Group         FM_grp Frame Manager API
64961 +
64962 + @Description   FM API functions, definitions and enums
64963 +
64964 + @{
64965 +*//***************************************************************************/
64966 +
64967 +/**************************************************************************//**
64968 + @Group         FM_mac_grp FM MAC
64969 +
64970 + @Description   FM MAC API functions, definitions and enums
64971 +
64972 + @{
64973 +*//***************************************************************************/
64974 +
64975 +#define FM_MAC_NO_PFC   0xff
64976 +
64977 +
64978 +/**************************************************************************//**
64979 + @Description   FM MAC Exceptions
64980 +*//***************************************************************************/
64981 +typedef enum e_FmMacExceptions {
64982 +    e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO = 0                     /**< 10GEC MDIO scan event interrupt */
64983 +   ,e_FM_MAC_EX_10G_MDIO_CMD_CMPL                               /**< 10GEC MDIO command completion interrupt */
64984 +   ,e_FM_MAC_EX_10G_REM_FAULT                                   /**< 10GEC, mEMAC Remote fault interrupt */
64985 +   ,e_FM_MAC_EX_10G_LOC_FAULT                                   /**< 10GEC, mEMAC Local fault interrupt */
64986 +   ,e_FM_MAC_EX_10G_1TX_ECC_ER                                  /**< 10GEC, mEMAC Transmit frame ECC error interrupt */
64987 +   ,e_FM_MAC_EX_10G_TX_FIFO_UNFL                                /**< 10GEC, mEMAC Transmit FIFO underflow interrupt */
64988 +   ,e_FM_MAC_EX_10G_TX_FIFO_OVFL                                /**< 10GEC, mEMAC Transmit FIFO overflow interrupt */
64989 +   ,e_FM_MAC_EX_10G_TX_ER                                       /**< 10GEC Transmit frame error interrupt */
64990 +   ,e_FM_MAC_EX_10G_RX_FIFO_OVFL                                /**< 10GEC, mEMAC Receive FIFO overflow interrupt */
64991 +   ,e_FM_MAC_EX_10G_RX_ECC_ER                                   /**< 10GEC, mEMAC Receive frame ECC error interrupt */
64992 +   ,e_FM_MAC_EX_10G_RX_JAB_FRM                                  /**< 10GEC Receive jabber frame interrupt */
64993 +   ,e_FM_MAC_EX_10G_RX_OVRSZ_FRM                                /**< 10GEC Receive oversized frame interrupt */
64994 +   ,e_FM_MAC_EX_10G_RX_RUNT_FRM                                 /**< 10GEC Receive runt frame interrupt */
64995 +   ,e_FM_MAC_EX_10G_RX_FRAG_FRM                                 /**< 10GEC Receive fragment frame interrupt */
64996 +   ,e_FM_MAC_EX_10G_RX_LEN_ER                                   /**< 10GEC Receive payload length error interrupt */
64997 +   ,e_FM_MAC_EX_10G_RX_CRC_ER                                   /**< 10GEC Receive CRC error interrupt */
64998 +   ,e_FM_MAC_EX_10G_RX_ALIGN_ER                                 /**< 10GEC Receive alignment error interrupt */
64999 +   ,e_FM_MAC_EX_1G_BAB_RX                                       /**< dTSEC Babbling receive error */
65000 +   ,e_FM_MAC_EX_1G_RX_CTL                                       /**< dTSEC Receive control (pause frame) interrupt */
65001 +   ,e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET                      /**< dTSEC Graceful transmit stop complete */
65002 +   ,e_FM_MAC_EX_1G_BAB_TX                                       /**< dTSEC Babbling transmit error */
65003 +   ,e_FM_MAC_EX_1G_TX_CTL                                       /**< dTSEC Transmit control (pause frame) interrupt */
65004 +   ,e_FM_MAC_EX_1G_TX_ERR                                       /**< dTSEC Transmit error */
65005 +   ,e_FM_MAC_EX_1G_LATE_COL                                     /**< dTSEC Late collision */
65006 +   ,e_FM_MAC_EX_1G_COL_RET_LMT                                  /**< dTSEC Collision retry limit */
65007 +   ,e_FM_MAC_EX_1G_TX_FIFO_UNDRN                                /**< dTSEC Transmit FIFO underrun */
65008 +   ,e_FM_MAC_EX_1G_MAG_PCKT                                     /**< dTSEC Magic Packet detection */
65009 +   ,e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET                           /**< dTSEC MII management read completion */
65010 +   ,e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET                           /**< dTSEC MII management write completion */
65011 +   ,e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET                      /**< dTSEC Graceful receive stop complete */
65012 +   ,e_FM_MAC_EX_1G_TX_DATA_ERR                                  /**< dTSEC Internal data error on transmit */
65013 +   ,e_FM_MAC_EX_1G_RX_DATA_ERR                                  /**< dTSEC Internal data error on receive */
65014 +   ,e_FM_MAC_EX_1G_1588_TS_RX_ERR                               /**< dTSEC Time-Stamp Receive Error */
65015 +   ,e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL                              /**< dTSEC MIB counter overflow */
65016 +   ,e_FM_MAC_EX_TS_FIFO_ECC_ERR                                 /**< mEMAC Time-stamp FIFO ECC error interrupt;
65017 +                                                                     not supported on T4240/B4860 rev1 chips */
65018 +   ,e_FM_MAC_EX_MAGIC_PACKET_INDICATION = e_FM_MAC_EX_1G_MAG_PCKT
65019 +                                                                /**< mEMAC Magic Packet Indication Interrupt */
65020 +} e_FmMacExceptions;
65021 +
65022 +/**************************************************************************//**
65023 + @Description   TM MAC statistics level
65024 +*//***************************************************************************/
65025 +typedef enum e_FmMacStatisticsLevel {
65026 +    e_FM_MAC_NONE_STATISTICS = 0,       /**< No statistics */
65027 +    e_FM_MAC_PARTIAL_STATISTICS,        /**< Only error counters are available; Optimized for performance */
65028 +    e_FM_MAC_FULL_STATISTICS            /**< All counters available; Not optimized for performance */
65029 +} e_FmMacStatisticsLevel;
65030 +
65031 +
65032 +#if (DPAA_VERSION >= 11)
65033 +/**************************************************************************//**
65034 + @Description   Priority Flow Control Parameters
65035 +*//***************************************************************************/
65036 +typedef struct t_FmMacPfcParams {
65037 +    bool        pfcEnable;                                      /**< Enable/Disable PFC */
65038 +
65039 +    uint16_t    pauseQuanta[FM_MAX_NUM_OF_PFC_PRIORITIES];      /**< Pause Quanta per priority to be sent in a pause frame. Each quanta represents a 512 bit-times*/
65040 +
65041 +    uint16_t    pauseThresholdQuanta[FM_MAX_NUM_OF_PFC_PRIORITIES];/**< Pause threshold per priority, when timer passes this threshold time a PFC frames is sent again if the port is still congested or BM pool in depletion*/
65042 +
65043 +
65044 +} t_FmMacPfcParams;
65045 +#endif /* (DPAA_VERSION >= 11) */
65046 +
65047 +/**************************************************************************//**
65048 + @Function      t_FmMacExceptionCallback
65049 +
65050 + @Description   Fm Mac Exception Callback from FM MAC to the user
65051 +
65052 + @Param[in]     h_App             - Handle to the upper layer handler
65053 +
65054 + @Param[in]     exceptions        - The exception that occurred
65055 +
65056 + @Return        void.
65057 +*//***************************************************************************/
65058 +typedef void (t_FmMacExceptionCallback)(t_Handle h_App, e_FmMacExceptions exceptions);
65059 +
65060 +
65061 +/**************************************************************************//**
65062 + @Description   TM MAC statistics rfc3635
65063 +*//***************************************************************************/
65064 +typedef struct t_FmMacStatistics {
65065 +/* RMON */
65066 +    uint64_t  eStatPkts64;             /**< r-10G tr-DT 64 byte frame counter */
65067 +    uint64_t  eStatPkts65to127;        /**< r-10G 65 to 127 byte frame counter */
65068 +    uint64_t  eStatPkts128to255;       /**< r-10G 128 to 255 byte frame counter */
65069 +    uint64_t  eStatPkts256to511;       /**< r-10G 256 to 511 byte frame counter */
65070 +    uint64_t  eStatPkts512to1023;      /**< r-10G 512 to 1023 byte frame counter */
65071 +    uint64_t  eStatPkts1024to1518;     /**< r-10G 1024 to 1518 byte frame counter */
65072 +    uint64_t  eStatPkts1519to1522;     /**< r-10G 1519 to 1522 byte good frame count */
65073 +/* */
65074 +    uint64_t  eStatFragments;          /**< Total number of packets that were less than 64 octets long with a wrong CRC.*/
65075 +    uint64_t  eStatJabbers;            /**< Total number of packets longer than valid maximum length octets */
65076 +    uint64_t  eStatsDropEvents;        /**< number of dropped packets due to internal errors of the MAC Client (during receive). */
65077 +    uint64_t  eStatCRCAlignErrors;     /**< Incremented when frames of correct length but with CRC error are received.*/
65078 +    uint64_t  eStatUndersizePkts;      /**< Incremented for frames under 64 bytes with a valid FCS and otherwise well formed;
65079 +                                            This count does not include range length errors */
65080 +    uint64_t  eStatOversizePkts;       /**< Incremented for frames which exceed 1518 (non VLAN) or 1522 (VLAN) and contains
65081 +                                            a valid FCS and otherwise well formed */
65082 +/* Pause */
65083 +    uint64_t  teStatPause;             /**< Pause MAC Control received */
65084 +    uint64_t  reStatPause;             /**< Pause MAC Control sent */
65085 +/* MIB II */
65086 +    uint64_t  ifInOctets;              /**< Total number of byte received. */
65087 +    uint64_t  ifInPkts;                /**< Total number of packets received.*/
65088 +    uint64_t  ifInUcastPkts;           /**< Total number of unicast frame received;
65089 +                                            NOTE: this counter is not supported on dTSEC MAC */
65090 +    uint64_t  ifInMcastPkts;           /**< Total number of multicast frame received*/
65091 +    uint64_t  ifInBcastPkts;           /**< Total number of broadcast frame received */
65092 +    uint64_t  ifInDiscards;            /**< Frames received, but discarded due to problems within the MAC RX. */
65093 +    uint64_t  ifInErrors;              /**< Number of frames received with error:
65094 +                                               - FIFO Overflow Error
65095 +                                               - CRC Error
65096 +                                               - Frame Too Long Error
65097 +                                               - Alignment Error
65098 +                                               - The dedicated Error Code (0xfe, not a code error) was received */
65099 +    uint64_t  ifOutOctets;             /**< Total number of byte sent. */
65100 +    uint64_t  ifOutPkts;               /**< Total number of packets sent .*/
65101 +    uint64_t  ifOutUcastPkts;          /**< Total number of unicast frame sent;
65102 +                                            NOTE: this counter is not supported on dTSEC MAC */
65103 +    uint64_t  ifOutMcastPkts;          /**< Total number of multicast frame sent */
65104 +    uint64_t  ifOutBcastPkts;          /**< Total number of multicast frame sent */
65105 +    uint64_t  ifOutDiscards;           /**< Frames received, but discarded due to problems within the MAC TX N/A!.*/
65106 +    uint64_t  ifOutErrors;             /**< Number of frames transmitted with error:
65107 +                                               - FIFO Overflow Error
65108 +                                               - FIFO Underflow Error
65109 +                                               - Other */
65110 +} t_FmMacStatistics;
65111 +
65112 +
65113 +/**************************************************************************//**
65114 + @Group         FM_mac_init_grp FM MAC Initialization Unit
65115 +
65116 + @Description   FM MAC Initialization Unit
65117 +
65118 + @{
65119 +*//***************************************************************************/
65120 +
65121 +/**************************************************************************//**
65122 + @Description   FM MAC config input
65123 +*//***************************************************************************/
65124 +typedef struct t_FmMacParams {
65125 +    uintptr_t                   baseAddr;           /**< Base of memory mapped FM MAC registers */
65126 +    t_EnetAddr                  addr;               /**< MAC address of device; First octet is sent first */
65127 +    uint8_t                     macId;              /**< MAC ID;
65128 +                                                         numbering of dTSEC and 1G-mEMAC:
65129 +                                                            0 - FM_MAX_NUM_OF_1G_MACS;
65130 +                                                         numbering of 10G-MAC (TGEC) and 10G-mEMAC:
65131 +                                                            0 - FM_MAX_NUM_OF_10G_MACS */
65132 +    e_EnetMode                  enetMode;           /**< Ethernet operation mode (MAC-PHY interface and speed);
65133 +                                                         Note that the speed should indicate the maximum rate that
65134 +                                                         this MAC should support rather than the actual speed;
65135 +                                                         i.e. user should use the FM_MAC_AdjustLink() routine to
65136 +                                                         provide accurate speed;
65137 +                                                         In case of mEMAC RGMII mode, the MAC is configured to RGMII
65138 +                                                         automatic mode, where actual speed/duplex mode information
65139 +                                                         is provided by PHY automatically in-band; FM_MAC_AdjustLink()
65140 +                                                         function should be used to switch to manual RGMII speed/duplex mode
65141 +                                                         configuration if RGMII PHY doesn't support in-band status signaling;
65142 +                                                         In addition, in mEMAC, in case where user is using the higher MACs
65143 +                                                         (i.e. the MACs that should support 10G), user should pass here
65144 +                                                         speed=10000 even if the interface is not allowing that (e.g. SGMII). */
65145 +    t_Handle                    h_Fm;               /**< A handle to the FM object this port related to */
65146 +    int                         mdioIrq;            /**< MDIO exceptions interrupt source - not valid for all
65147 +                                                         MACs; MUST be set to 'NO_IRQ' for MACs that don't have
65148 +                                                         mdio-irq, or for polling */
65149 +    t_FmMacExceptionCallback    *f_Event;           /**< MDIO Events Callback Routine         */
65150 +    t_FmMacExceptionCallback    *f_Exception;       /**< Exception Callback Routine         */
65151 +    t_Handle                    h_App;              /**< A handle to an application layer object; This handle will
65152 +                                                         be passed by the driver upon calling the above callbacks */
65153 +} t_FmMacParams;
65154 +
65155 +
65156 +/**************************************************************************//**
65157 + @Function      FM_MAC_Config
65158 +
65159 + @Description   Creates descriptor for the FM MAC module.
65160 +
65161 +                The routine returns a handle (descriptor) to the FM MAC object.
65162 +                This descriptor must be passed as first parameter to all other
65163 +                FM MAC function calls.
65164 +
65165 +                No actual initialization or configuration of FM MAC hardware is
65166 +                done by this routine.
65167 +
65168 + @Param[in]     p_FmMacParam   - Pointer to data structure of parameters
65169 +
65170 + @Retval        Handle to FM MAC object, or NULL for Failure.
65171 +*//***************************************************************************/
65172 +t_Handle FM_MAC_Config(t_FmMacParams *p_FmMacParam);
65173 +
65174 +/**************************************************************************//**
65175 + @Function      FM_MAC_Init
65176 +
65177 + @Description   Initializes the FM MAC module
65178 +
65179 + @Param[in]     h_FmMac - FM module descriptor
65180 +
65181 + @Return        E_OK on success; Error code otherwise.
65182 +*//***************************************************************************/
65183 +t_Error  FM_MAC_Init(t_Handle h_FmMac);
65184 +
65185 +/**************************************************************************//**
65186 + @Function      FM_Free
65187 +
65188 + @Description   Frees all resources that were assigned to FM MAC module.
65189 +
65190 +                Calling this routine invalidates the descriptor.
65191 +
65192 + @Param[in]     h_FmMac - FM module descriptor
65193 +
65194 + @Return        E_OK on success; Error code otherwise.
65195 +*//***************************************************************************/
65196 +t_Error  FM_MAC_Free(t_Handle h_FmMac);
65197 +
65198 +
65199 +/**************************************************************************//**
65200 + @Group         FM_mac_advanced_init_grp    FM MAC Advanced Configuration Unit
65201 +
65202 + @Description   Configuration functions used to change default values.
65203 +
65204 + @{
65205 +*//***************************************************************************/
65206 +
65207 +/**************************************************************************//**
65208 + @Function      FM_MAC_ConfigResetOnInit
65209 +
65210 + @Description   Tell the driver whether to reset the FM MAC before initialization or
65211 +                not. It changes the default configuration [DEFAULT_resetOnInit].
65212 +
65213 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65214 + @Param[in]     enable     When TRUE, FM will be reset before any initialization.
65215 +
65216 + @Return        E_OK on success; Error code otherwise.
65217 +
65218 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65219 +*//***************************************************************************/
65220 +t_Error FM_MAC_ConfigResetOnInit(t_Handle h_FmMac, bool enable);
65221 +
65222 +/**************************************************************************//**
65223 + @Function      FM_MAC_ConfigLoopback
65224 +
65225 + @Description   Enable/Disable internal loopback mode
65226 +
65227 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65228 + @Param[in]     enable     TRUE to enable or FALSE to disable.
65229 +
65230 + @Return        E_OK on success; Error code otherwise.
65231 +
65232 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65233 +*//***************************************************************************/
65234 +t_Error FM_MAC_ConfigLoopback(t_Handle h_FmMac, bool enable);
65235 +
65236 +/**************************************************************************//**
65237 + @Function      FM_MAC_ConfigMaxFrameLength
65238 +
65239 + @Description   Setup maximum Rx Frame Length (in 1G MAC, effects also Tx)
65240 +
65241 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65242 + @Param[in]     newVal     MAX Frame length
65243 +
65244 + @Return        E_OK on success; Error code otherwise.
65245 +
65246 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65247 +*//***************************************************************************/
65248 +t_Error FM_MAC_ConfigMaxFrameLength(t_Handle h_FmMac, uint16_t newVal);
65249 +
65250 +/**************************************************************************//**
65251 + @Function      FM_MAC_ConfigWan
65252 +
65253 + @Description   ENABLE WAN mode in 10G-MAC
65254 +
65255 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65256 + @Param[in]     enable     TRUE to enable or FALSE to disable.
65257 +
65258 + @Return        E_OK on success; Error code otherwise.
65259 +
65260 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65261 +*//***************************************************************************/
65262 +t_Error FM_MAC_ConfigWan(t_Handle h_FmMac, bool enable);
65263 +
65264 +/**************************************************************************//**
65265 + @Function      FM_MAC_ConfigPadAndCrc
65266 +
65267 + @Description   Config PAD and CRC mode
65268 +
65269 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65270 + @Param[in]     enable     TRUE to enable or FALSE to disable.
65271 +
65272 + @Return        E_OK on success; Error code otherwise.
65273 +
65274 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65275 +                Not supported on 10G-MAC (i.e. CRC & PAD are added automatically
65276 +                by HW); on mEMAC, this routine supports only PAD (i.e. CRC is
65277 +                added automatically by HW).
65278 +*//***************************************************************************/
65279 +t_Error FM_MAC_ConfigPadAndCrc(t_Handle h_FmMac, bool enable);
65280 +
65281 +/**************************************************************************//**
65282 + @Function      FM_MAC_ConfigHalfDuplex
65283 +
65284 + @Description   Config Half Duplex Mode
65285 +
65286 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65287 + @Param[in]     enable     TRUE to enable or FALSE to disable.
65288 +
65289 + @Return        E_OK on success; Error code otherwise.
65290 +
65291 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65292 +*//***************************************************************************/
65293 +t_Error FM_MAC_ConfigHalfDuplex(t_Handle h_FmMac, bool enable);
65294 +
65295 +/**************************************************************************//**
65296 + @Function      FM_MAC_ConfigTbiPhyAddr
65297 +
65298 + @Description   Configures the address of internal TBI PHY.
65299 +
65300 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65301 + @Param[in]     newVal     TBI PHY address (1-31).
65302 +
65303 + @Return        E_OK on success; Error code otherwise.
65304 +
65305 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65306 +*//***************************************************************************/
65307 +t_Error FM_MAC_ConfigTbiPhyAddr(t_Handle h_FmMac, uint8_t newVal);
65308 +
65309 +/**************************************************************************//**
65310 + @Function      FM_MAC_ConfigLengthCheck
65311 +
65312 + @Description   Configure the frame length checking.
65313 +
65314 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65315 + @Param[in]     enable     TRUE to enable or FALSE to disable.
65316 +
65317 + @Return        E_OK on success; Error code otherwise.
65318 +
65319 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65320 +*//***************************************************************************/
65321 +t_Error FM_MAC_ConfigLengthCheck(t_Handle h_FmMac, bool enable);
65322 +
65323 +/**************************************************************************//**
65324 + @Function      FM_MAC_ConfigException
65325 +
65326 + @Description   Change Exception selection from default
65327 +
65328 + @Param[in]     h_FmMac         A handle to a FM MAC Module.
65329 + @Param[in]     ex              Type of the desired exceptions
65330 + @Param[in]     enable          TRUE to enable the specified exception, FALSE to disable it.
65331 +
65332 + @Return        E_OK on success; Error code otherwise.
65333 +
65334 + @Cautions      Allowed only following FM_MAC_Config() and before FM_MAC_Init().
65335 +*//***************************************************************************/
65336 +t_Error FM_MAC_ConfigException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable);
65337 +
65338 +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
65339 +t_Error FM_MAC_ConfigSkipFman11Workaround (t_Handle h_FmMac);
65340 +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
65341 +/** @} */ /* end of FM_mac_advanced_init_grp group */
65342 +/** @} */ /* end of FM_mac_init_grp group */
65343 +
65344 +
65345 +/**************************************************************************//**
65346 + @Group         FM_mac_runtime_control_grp FM MAC Runtime Control Unit
65347 +
65348 + @Description   FM MAC Runtime control unit API functions, definitions and enums.
65349 +
65350 + @{
65351 +*//***************************************************************************/
65352 +
65353 +/**************************************************************************//**
65354 + @Function      FM_MAC_Enable
65355 +
65356 + @Description   Enable the MAC
65357 +
65358 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65359 + @Param[in]     mode       Mode of operation (RX, TX, Both)
65360 +
65361 + @Return        E_OK on success; Error code otherwise.
65362 +
65363 + @Cautions      Allowed only following FM_MAC_Init().
65364 +*//***************************************************************************/
65365 +t_Error FM_MAC_Enable(t_Handle h_FmMac,  e_CommMode mode);
65366 +
65367 +/**************************************************************************//**
65368 + @Function      FM_MAC_Disable
65369 +
65370 + @Description   DISABLE the MAC
65371 +
65372 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65373 + @Param[in]     mode       Define what part to Disable (RX,  TX or BOTH)
65374 +
65375 + @Return        E_OK on success; Error code otherwise.
65376 +
65377 + @Cautions      Allowed only following FM_MAC_Init().
65378 +*//***************************************************************************/
65379 +t_Error FM_MAC_Disable(t_Handle h_FmMac, e_CommMode mode);
65380 +
65381 +/**************************************************************************//**
65382 + @Function      FM_MAC_Resume
65383 +
65384 + @Description   Re-init the MAC after suspend
65385 +
65386 + @Param[in]     h_FmMac    A handle to a FM MAC Module.
65387 +
65388 + @Return        E_OK on success; Error code otherwise.
65389 +
65390 + @Cautions      Allowed only following FM_MAC_Init().
65391 +*//***************************************************************************/
65392 +t_Error FM_MAC_Resume(t_Handle h_FmMac);
65393 +
65394 +/**************************************************************************//**
65395 + @Function      FM_MAC_Enable1588TimeStamp
65396 +
65397 + @Description   Enables the TSU operation.
65398 +
65399 + @Param[in]     h_Fm   - Handle to the PTP as returned from the FM_MAC_PtpConfig.
65400 +
65401 + @Return        E_OK on success; Error code otherwise.
65402 +
65403 + @Cautions      Allowed only following FM_MAC_Init().
65404 +*//***************************************************************************/
65405 +t_Error FM_MAC_Enable1588TimeStamp(t_Handle h_Fm);
65406 +
65407 +/**************************************************************************//**
65408 + @Function      FM_MAC_Disable1588TimeStamp
65409 +
65410 + @Description   Disables the TSU operation.
65411 +
65412 + @Param[in]     h_Fm   - Handle to the PTP as returned from the FM_MAC_PtpConfig.
65413 +
65414 + @Return        E_OK on success; Error code otherwise.
65415 +
65416 + @Cautions      Allowed only following FM_MAC_Init().
65417 +*//***************************************************************************/
65418 +t_Error FM_MAC_Disable1588TimeStamp(t_Handle h_Fm);
65419 +
65420 +/**************************************************************************//**
65421 + @Function      FM_MAC_SetTxAutoPauseFrames
65422 +
65423 + @Description   Enable/Disable transmission of Pause-Frames.
65424 +                The routine changes the default configuration [DEFAULT_TX_PAUSE_TIME].
65425 +
65426 + @Param[in]     h_FmMac       -  A handle to a FM MAC Module.
65427 + @Param[in]     pauseTime     -  Pause quanta value used with transmitted pause frames.
65428 +                                 Each quanta represents a 512 bit-times; Note that '0'
65429 +                                 as an input here will be used as disabling the
65430 +                                 transmission of the pause-frames.
65431 +
65432 + @Return        E_OK on success; Error code otherwise.
65433 +
65434 + @Cautions      Allowed only following FM_MAC_Init().
65435 +*//***************************************************************************/
65436 +t_Error FM_MAC_SetTxAutoPauseFrames(t_Handle h_FmMac,
65437 +                                    uint16_t pauseTime);
65438 +
65439 + /**************************************************************************//**
65440 + @Function      FM_MAC_SetTxPauseFrames
65441 +
65442 + @Description   Enable/Disable transmission of Pause-Frames.
65443 +                The routine changes the default configuration:
65444 +                pause-time - [DEFAULT_TX_PAUSE_TIME]
65445 +                threshold-time - [0]
65446 +
65447 + @Param[in]     h_FmMac       -  A handle to a FM MAC Module.
65448 + @Param[in]     priority      -  the PFC class of service; use 'FM_MAC_NO_PFC'
65449 +                                 to indicate legacy pause support (i.e. no PFC).
65450 + @Param[in]     pauseTime     -  Pause quanta value used with transmitted pause frames.
65451 +                                 Each quanta represents a 512 bit-times;
65452 +                                 Note that '0' as an input here will be used as disabling the
65453 +                                 transmission of the pause-frames.
65454 + @Param[in]     threshTime    -  Pause Threshold equanta value used by the MAC to retransmit pause frame.
65455 +                                 if the situation causing a pause frame to be sent didn't finish when the timer
65456 +                                 reached the threshold quanta, the MAC will retransmit the pause frame.
65457 +                                 Each quanta represents a 512 bit-times.
65458 +
65459 + @Return        E_OK on success; Error code otherwise.
65460 +
65461 + @Cautions      Allowed only following FM_MAC_Init().
65462 +                In order for PFC to work properly the user must configure
65463 +                TNUM-aging in the tx-port it is recommended that pre-fetch and
65464 +                rate limit in the tx port should be disabled;
65465 +                PFC is supported only on new mEMAC; i.e. in MACs that don't have
65466 +                PFC support (10G-MAC and dTSEC), user should use 'FM_MAC_NO_PFC'
65467 +                in the 'priority' field.
65468 +*//***************************************************************************/
65469 +t_Error FM_MAC_SetTxPauseFrames(t_Handle h_FmMac,
65470 +                                uint8_t  priority,
65471 +                                uint16_t pauseTime,
65472 +                                uint16_t threshTime);
65473 +
65474 +/**************************************************************************//**
65475 + @Function      FM_MAC_SetRxIgnorePauseFrames
65476 +
65477 + @Description   Enable/Disable ignoring of Pause-Frames.
65478 +
65479 + @Param[in]     h_FmMac    - A handle to a FM MAC Module.
65480 + @Param[in]     en         - boolean indicates whether to ignore the incoming pause
65481 +                             frames or not.
65482 +
65483 + @Return        E_OK on success; Error code otherwise.
65484 +
65485 + @Cautions      Allowed only following FM_MAC_Init().
65486 +*//***************************************************************************/
65487 +t_Error FM_MAC_SetRxIgnorePauseFrames(t_Handle h_FmMac, bool en);
65488 +
65489 +/**************************************************************************//**
65490 + @Function      FM_MAC_SetWakeOnLan
65491 +
65492 + @Description   Enable/Disable Wake On Lan support
65493 +
65494 + @Param[in]     h_FmMac    - A handle to a FM MAC Module.
65495 + @Param[in]     en         - boolean indicates whether to enable Wake On Lan
65496 +                             support or not.
65497 +
65498 + @Return        E_OK on success; Error code otherwise.
65499 +
65500 + @Cautions      Allowed only following FM_MAC_Init().
65501 +*//***************************************************************************/
65502 +t_Error FM_MAC_SetWakeOnLan(t_Handle h_FmMac, bool en);
65503 +
65504 +/**************************************************************************//**
65505 + @Function      FM_MAC_ResetCounters
65506 +
65507 + @Description   reset all statistics counters
65508 +
65509 + @Param[in]     h_FmMac    - A handle to a FM MAC Module.
65510 +
65511 + @Return        E_OK on success; Error code otherwise.
65512 +
65513 + @Cautions      Allowed only following FM_MAC_Init().
65514 +*//***************************************************************************/
65515 +t_Error FM_MAC_ResetCounters(t_Handle h_FmMac);
65516 +
65517 +/**************************************************************************//**
65518 + @Function      FM_MAC_SetException
65519 +
65520 + @Description   Enable/Disable a specific Exception
65521 +
65522 + @Param[in]     h_FmMac        - A handle to a FM MAC Module.
65523 + @Param[in]     ex             - Type of the desired exceptions
65524 + @Param[in]     enable         - TRUE to enable the specified exception, FALSE to disable it.
65525 +
65526 +
65527 + @Return        E_OK on success; Error code otherwise.
65528 +
65529 + @Cautions      Allowed only following FM_MAC_Init().
65530 +*//***************************************************************************/
65531 +t_Error FM_MAC_SetException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable);
65532 +
65533 +/**************************************************************************//**
65534 + @Function      FM_MAC_SetStatistics
65535 +
65536 + @Description   Define Statistics level.
65537 +                Where applicable, the routine also enables the MIB counters
65538 +                overflow interrupt in order to keep counters accurate
65539 +                and account for overflows.
65540 +                This routine is relevant only for dTSEC.
65541 +
65542 + @Param[in]     h_FmMac         - A handle to a FM MAC Module.
65543 + @Param[in]     statisticsLevel - Full statistics level provides all standard counters but may
65544 +                                  reduce performance. Partial statistics provides only special
65545 +                                  event counters (errors etc.). If selected, regular counters (such as
65546 +                                  byte/packet) will be invalid and will return -1.
65547 +
65548 + @Return        E_OK on success; Error code otherwise.
65549 +
65550 + @Cautions      Allowed only following FM_MAC_Init().
65551 +*//***************************************************************************/
65552 +t_Error FM_MAC_SetStatistics(t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel);
65553 +
65554 +/**************************************************************************//**
65555 + @Function      FM_MAC_GetStatistics
65556 +
65557 + @Description   get all statistics counters
65558 +
65559 + @Param[in]     h_FmMac       -  A handle to a FM MAC Module.
65560 + @Param[in]     p_Statistics  -  Structure with statistics
65561 +
65562 + @Return        E_OK on success; Error code otherwise.
65563 +
65564 + @Cautions      Allowed only following FM_Init().
65565 +*//***************************************************************************/
65566 +t_Error FM_MAC_GetStatistics(t_Handle h_FmMac, t_FmMacStatistics *p_Statistics);
65567 +
65568 +/**************************************************************************//**
65569 + @Function      FM_MAC_ModifyMacAddr
65570 +
65571 + @Description   Replace the main MAC Address
65572 +
65573 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65574 + @Param[in]     p_EnetAddr  -   Ethernet Mac address
65575 +
65576 + @Return        E_OK on success; Error code otherwise.
65577 +
65578 + @Cautions      Allowed only after FM_MAC_Init().
65579 +*//***************************************************************************/
65580 +t_Error FM_MAC_ModifyMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
65581 +
65582 +/**************************************************************************//**
65583 + @Function      FM_MAC_AddHashMacAddr
65584 +
65585 + @Description   Add an Address to the hash table. This is for filter purpose only.
65586 +
65587 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65588 + @Param[in]     p_EnetAddr  -   Ethernet Mac address
65589 +
65590 + @Return        E_OK on success; Error code otherwise.
65591 +
65592 + @Cautions      Allowed only following FM_MAC_Init(). It is a filter only address.
65593 + @Cautions      Some address need to be filterd out in upper FM blocks.
65594 +*//***************************************************************************/
65595 +t_Error FM_MAC_AddHashMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
65596 +
65597 +/**************************************************************************//**
65598 + @Function      FM_MAC_RemoveHashMacAddr
65599 +
65600 + @Description   Delete an Address to the hash table. This is for filter purpose only.
65601 +
65602 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65603 + @Param[in]     p_EnetAddr  -   Ethernet Mac address
65604 +
65605 + @Return        E_OK on success; Error code otherwise.
65606 +
65607 + @Cautions      Allowed only following FM_MAC_Init().
65608 +*//***************************************************************************/
65609 +t_Error FM_MAC_RemoveHashMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
65610 +
65611 +/**************************************************************************//**
65612 + @Function      FM_MAC_AddExactMatchMacAddr
65613 +
65614 + @Description   Add a unicast or multicast mac address for exact-match filtering
65615 +                (8 on dTSEC, 2 for 10G-MAC)
65616 +
65617 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65618 + @Param[in]     p_EnetAddr  -   MAC Address to ADD
65619 +
65620 + @Return        E_OK on success; Error code otherwise.
65621 +
65622 + @Cautions      Allowed only after FM_MAC_Init().
65623 +*//***************************************************************************/
65624 +t_Error FM_MAC_AddExactMatchMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
65625 +
65626 +/**************************************************************************//**
65627 + @Function      FM_MAC_RemovelExactMatchMacAddr
65628 +
65629 + @Description   Remove a uni cast or multi cast mac address.
65630 +
65631 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65632 + @Param[in]     p_EnetAddr  -   MAC Address to remove
65633 +
65634 + @Return        E_OK on success; Error code otherwise..
65635 +
65636 + @Cautions      Allowed only after FM_MAC_Init().
65637 +*//***************************************************************************/
65638 +t_Error FM_MAC_RemovelExactMatchMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
65639 +
65640 +/**************************************************************************//**
65641 + @Function      FM_MAC_SetPromiscuous
65642 +
65643 + @Description   Enable/Disable MAC Promiscuous mode for ALL mac addresses.
65644 +
65645 + @Param[in]     h_FmMac    - A handle to a FM MAC Module.
65646 + @Param[in]     enable     - TRUE to enable or FALSE to disable.
65647 +
65648 + @Return        E_OK on success; Error code otherwise.
65649 +
65650 + @Cautions      Allowed only after FM_MAC_Init().
65651 +*//***************************************************************************/
65652 +t_Error FM_MAC_SetPromiscuous(t_Handle h_FmMac, bool enable);
65653 +
65654 +/**************************************************************************//**
65655 + @Function      FM_MAC_AdjustLink
65656 +
65657 + @Description   Adjusts the Ethernet link with new speed/duplex setup.
65658 +                This routine is relevant for dTSEC and mEMAC.
65659 +                In case of mEMAC, this routine is also used for manual
65660 +                re-configuration of RGMII speed and duplex mode for
65661 +                RGMII PHYs not supporting in-band status information
65662 +                to MAC.
65663 +
65664 + @Param[in]     h_FmMac     - A handle to a FM Module.
65665 + @Param[in]     speed       - Ethernet speed.
65666 + @Param[in]     fullDuplex  - TRUE for full-duplex mode;
65667 +                              FALSE for half-duplex mode.
65668 +
65669 + @Return        E_OK on success; Error code otherwise.
65670 +*//***************************************************************************/
65671 +t_Error FM_MAC_AdjustLink(t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex);
65672 +
65673 +/**************************************************************************//**
65674 + @Function      FM_MAC_RestartAutoneg
65675 +
65676 + @Description   Restarts the auto-negotiation process.
65677 +                When auto-negotiation process is invoked under traffic the
65678 +                auto-negotiation process between the internal SGMII PHY and the
65679 +                external PHY does not always complete successfully. Calling this
65680 +                function will restart the auto-negotiation process that will end
65681 +                successfully. It is recommended to call this function after issuing
65682 +                auto-negotiation restart command to the Eth Phy.
65683 +                This routine is relevant only for dTSEC.
65684 +
65685 + @Param[in]     h_FmMac     - A handle to a FM Module.
65686 +
65687 + @Return        E_OK on success; Error code otherwise.
65688 +*//***************************************************************************/
65689 +t_Error FM_MAC_RestartAutoneg(t_Handle h_FmMac);
65690 +
65691 +/**************************************************************************//**
65692 + @Function      FM_MAC_GetId
65693 +
65694 + @Description   Return the MAC ID
65695 +
65696 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65697 + @Param[out]    p_MacId     -   MAC ID of device
65698 +
65699 + @Return        E_OK on success; Error code otherwise.
65700 +
65701 + @Cautions      Allowed only after FM_MAC_Init().
65702 +*//***************************************************************************/
65703 +t_Error FM_MAC_GetId(t_Handle h_FmMac, uint32_t *p_MacId);
65704 +
65705 +/**************************************************************************//**
65706 + @Function      FM_MAC_GetVesrion
65707 +
65708 + @Description   Return Mac HW chip version
65709 +
65710 + @Param[in]     h_FmMac      -   A handle to a FM Module.
65711 + @Param[out]    p_MacVresion -   Mac version as defined by the chip
65712 +
65713 + @Return        E_OK on success; Error code otherwise.
65714 +
65715 + @Cautions      Allowed only after FM_MAC_Init().
65716 +*//***************************************************************************/
65717 +t_Error FM_MAC_GetVesrion(t_Handle h_FmMac, uint32_t *p_MacVresion);
65718 +
65719 +/**************************************************************************//**
65720 + @Function      FM_MAC_MII_WritePhyReg
65721 +
65722 + @Description   Write data into Phy Register
65723 +
65724 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65725 + @Param[in]     phyAddr     -   Phy Address on the MII bus
65726 + @Param[in]     reg         -   Register Number.
65727 + @Param[in]     data        -   Data to write.
65728 +
65729 + @Return        E_OK on success; Error code otherwise.
65730 +
65731 + @Cautions      Allowed only after FM_MAC_Init().
65732 +*//***************************************************************************/
65733 +t_Error FM_MAC_MII_WritePhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data);
65734 +
65735 +/**************************************************************************//**
65736 + @Function      FM_MAC_MII_ReadPhyReg
65737 +
65738 + @Description   Read data from Phy Register
65739 +
65740 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65741 + @Param[in]     phyAddr     -   Phy Address on the MII bus
65742 + @Param[in]     reg         -   Register Number.
65743 + @Param[out]    p_Data      -   Data from PHY.
65744 +
65745 + @Return        E_OK on success; Error code otherwise.
65746 +
65747 + @Cautions      Allowed only after FM_MAC_Init().
65748 +*//***************************************************************************/
65749 +t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
65750 +
65751 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
65752 +/**************************************************************************//**
65753 + @Function      FM_MAC_DumpRegs
65754 +
65755 + @Description   Dump internal registers
65756 +
65757 + @Param[in]     h_FmMac     -   A handle to a FM Module.
65758 +
65759 + @Return        E_OK on success; Error code otherwise.
65760 +
65761 + @Cautions      Allowed only after FM_MAC_Init().
65762 +*//***************************************************************************/
65763 +t_Error FM_MAC_DumpRegs(t_Handle h_FmMac);
65764 +#endif /* (defined(DEBUG_ERRORS) && ... */
65765 +
65766 +/** @} */ /* end of FM_mac_runtime_control_grp group */
65767 +/** @} */ /* end of FM_mac_grp group */
65768 +/** @} */ /* end of FM_grp group */
65769 +
65770 +
65771 +#endif /* __FM_MAC_EXT_H */
65772 --- /dev/null
65773 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_macsec_ext.h
65774 @@ -0,0 +1,1271 @@
65775 +/*
65776 + * Copyright 2008-2015 Freescale Semiconductor Inc.
65777 + *
65778 + * Redistribution and use in source and binary forms, with or without
65779 + * modification, are permitted provided that the following conditions are met:
65780 + *     * Redistributions of source code must retain the above copyright
65781 + *       notice, this list of conditions and the following disclaimer.
65782 + *     * Redistributions in binary form must reproduce the above copyright
65783 + *       notice, this list of conditions and the following disclaimer in the
65784 + *       documentation and/or other materials provided with the distribution.
65785 + *     * Neither the name of Freescale Semiconductor nor the
65786 + *       names of its contributors may be used to endorse or promote products
65787 + *       derived from this software without specific prior written permission.
65788 + *
65789 + *
65790 + * ALTERNATIVELY, this software may be distributed under the terms of the
65791 + * GNU General Public License ("GPL") as published by the Free Software
65792 + * Foundation, either version 2 of that License or (at your option) any
65793 + * later version.
65794 + *
65795 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
65796 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
65797 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
65798 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
65799 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
65800 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
65801 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
65802 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65803 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
65804 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65805 + */
65806 +
65807 +/**************************************************************************//**
65808 + @File          fm_macsec_ext.h
65809 +
65810 + @Description   FM MACSEC ...
65811 +*//***************************************************************************/
65812 +#ifndef __FM_MACSEC_EXT_H
65813 +#define __FM_MACSEC_EXT_H
65814 +
65815 +#include "std_ext.h"
65816 +
65817 +
65818 +/**************************************************************************//**
65819 + @Group         FM_grp Frame Manager API
65820 +
65821 + @Description   FM API functions, definitions and enums
65822 +
65823 + @{
65824 +*//***************************************************************************/
65825 +
65826 +/**************************************************************************//**
65827 + @Group         FM_MACSEC_grp FM MACSEC
65828 +
65829 + @Description   FM MACSEC API functions, definitions and enums
65830 +
65831 + @{
65832 +*//***************************************************************************/
65833 +
65834 +/**************************************************************************//**
65835 + @Description   MACSEC Exceptions
65836 +*//***************************************************************************/
65837 +typedef enum e_FmMacsecExceptions {
65838 +    e_FM_MACSEC_EX_SINGLE_BIT_ECC,          /**< Single bit ECC error */
65839 +    e_FM_MACSEC_EX_MULTI_BIT_ECC            /**< Multi bit ECC error */
65840 +} e_FmMacsecExceptions;
65841 +
65842 +
65843 +/**************************************************************************//**
65844 + @Group         FM_MACSEC_init_grp FM-MACSEC Initialization Unit
65845 +
65846 + @Description   FM MACSEC Initialization Unit
65847 +
65848 + @{
65849 +*//***************************************************************************/
65850 +
65851 +/**************************************************************************//**
65852 + @Function      t_FmMacsecExceptionsCallback
65853 +
65854 + @Description   Exceptions user callback routine, will be called upon an
65855 +                exception passing the exception identification.
65856 +
65857 + @Param[in]     h_App       A handle to an application layer object; This handle
65858 +                            will be passed by the driver upon calling this callback.
65859 + @Param[in]     exception   The exception.
65860 +*//***************************************************************************/
65861 +typedef void (t_FmMacsecExceptionsCallback) ( t_Handle                  h_App,
65862 +                                              e_FmMacsecExceptions      exception);
65863 +
65864 +
65865 +/**************************************************************************//**
65866 + @Description   FM MACSEC config input
65867 +*//***************************************************************************/
65868 +typedef struct t_FmMacsecParams {
65869 +    t_Handle                                h_Fm;               /**< A handle to the FM object related to */
65870 +    bool                                    guestMode;          /**< Partition-id */
65871 +    union {
65872 +        struct {
65873 +            uint8_t                         fmMacId;            /**< FM MAC id */
65874 +        } guestParams;
65875 +
65876 +        struct {
65877 +            uintptr_t                       baseAddr;           /**< Base of memory mapped FM MACSEC registers */
65878 +            t_Handle                        h_FmMac;            /**< A handle to the FM MAC object  related to */
65879 +            t_FmMacsecExceptionsCallback    *f_Exception;       /**< Exception Callback Routine         */
65880 +            t_Handle                        h_App;              /**< A handle to an application layer object; This handle will
65881 +                                                                     be passed by the driver upon calling the above callbacks */
65882 +        } nonGuestParams;
65883 +    };
65884 +} t_FmMacsecParams;
65885 +
65886 +/**************************************************************************//**
65887 + @Function      FM_MACSEC_Config
65888 +
65889 + @Description   Creates descriptor for the FM MACSEC module;
65890 +
65891 +                The routine returns a handle (descriptor) to the FM MACSEC object;
65892 +                This descriptor must be passed as first parameter to all other
65893 +                FM MACSEC function calls;
65894 +
65895 +                No actual initialization or configuration of FM MACSEC hardware is
65896 +                done by this routine.
65897 +
65898 + @Param[in]     p_FmMacsecParam     Pointer to data structure of parameters.
65899 +
65900 + @Retval        Handle to FM MACSEC object, or NULL for Failure.
65901 +*//***************************************************************************/
65902 +t_Handle FM_MACSEC_Config(t_FmMacsecParams *p_FmMacsecParam);
65903 +
65904 +/**************************************************************************//**
65905 + @Function      FM_MACSEC_Init
65906 +
65907 + @Description   Initializes the FM MACSEC module.
65908 +
65909 + @Param[in]     h_FmMacsec      FM MACSEC module descriptor.
65910 +
65911 + @Return        E_OK on success; Error code otherwise.
65912 +*//***************************************************************************/
65913 +t_Error FM_MACSEC_Init(t_Handle h_FmMacsec);
65914 +
65915 +/**************************************************************************//**
65916 + @Function      FM_MACSEC_Free
65917 +
65918 + @Description   Frees all resources that were assigned to FM MACSEC module;
65919 +
65920 +                Calling this routine invalidates the descriptor.
65921 +
65922 + @Param[in]     h_FmMacsec      FM MACSEC module descriptor.
65923 +
65924 + @Return        E_OK on success; Error code otherwise.
65925 +*//***************************************************************************/
65926 +t_Error FM_MACSEC_Free(t_Handle h_FmMacsec);
65927 +
65928 +
65929 +/**************************************************************************//**
65930 + @Group         FM_MACSEC_advanced_init_grp    FM-MACSEC Advanced Configuration Unit
65931 +
65932 + @Description   Configuration functions used to change default values.
65933 +
65934 + @{
65935 +*//***************************************************************************/
65936 +
65937 +/**************************************************************************//**
65938 + @Description   enum for unknown sci frame treatment
65939 +*//***************************************************************************/
65940 +typedef enum e_FmMacsecUnknownSciFrameTreatment {
65941 +    e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH = 0,                                               /**< Controlled port - Strict mode */
65942 +    e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED,             /**< If C bit clear deliver on controlled port, else discard
65943 +                                                                                                                 Controlled port - Check or Disable mode */
65944 +    e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED,                        /**< Controlled port - Strict mode */
65945 +    e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_OR_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED   /**< If C bit set deliver on uncontrolled port and discard on controlled port,
65946 +                                                                                                                 else discard on uncontrolled port and deliver on controlled port
65947 +                                                                                                                 Controlled port - Check or Disable mode */
65948 +} e_FmMacsecUnknownSciFrameTreatment;
65949 +
65950 +/**************************************************************************//**
65951 + @Description   enum for untag frame treatment
65952 +*//***************************************************************************/
65953 +typedef enum e_FmMacsecUntagFrameTreatment {
65954 +    e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED = 0,                    /**< Controlled port - Strict mode */
65955 +    e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_BOTH,                                                   /**< Controlled port - Strict mode */
65956 +    e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_CONTROLLED_UNMODIFIED              /**< Controlled port - Strict mode */
65957 +} e_FmMacsecUntagFrameTreatment;
65958 +
65959 +/**************************************************************************//**
65960 + @Function      FM_MACSEC_ConfigUnknownSciFrameTreatment
65961 +
65962 + @Description   Change the treatment for received frames with unknown sci from its default
65963 +                configuration [DEFAULT_unknownSciFrameTreatment].
65964 +
65965 + @Param[in]     h_FmMacsec      FM MACSEC module descriptor.
65966 + @Param[in]     treatMode       The selected mode.
65967 +
65968 + @Return        E_OK on success; Error code otherwise.
65969 +
65970 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
65971 +*//***************************************************************************/
65972 +t_Error FM_MACSEC_ConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode);
65973 +
65974 +/**************************************************************************//**
65975 + @Function      FM_MACSEC_ConfigInvalidTagsFrameTreatment
65976 +
65977 + @Description   Change the treatment for received frames with invalid tags or
65978 +                a zero value PN or an invalid ICV from its default configuration
65979 +                [DEFAULT_invalidTagsFrameTreatment].
65980 +
65981 + @Param[in]     h_FmMacsec              FM MACSEC module descriptor.
65982 + @Param[in]     deliverUncontrolled     If True deliver on the uncontrolled port, else discard;
65983 +                                        In both cases discard on the controlled port;
65984 +                                        this provide Strict, Check or Disable mode.
65985 +
65986 + @Return        E_OK on success; Error code otherwise.
65987 +
65988 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
65989 +*//***************************************************************************/
65990 +t_Error FM_MACSEC_ConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled);
65991 +
65992 +/**************************************************************************//**
65993 + @Function      FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment
65994 +
65995 + @Description   Change the treatment for received frames with the Encryption bit
65996 +                set and the Changed Text bit clear from its default configuration
65997 +                [DEFAULT_encryptWithNoChangedTextFrameTreatment].
65998 +
65999 + @Param[in]     h_FmMacsec              FM MACSEC module descriptor.
66000 + @Param[in]     discardUncontrolled     If True discard on the uncontrolled port, else deliver;
66001 +                                        In both cases discard on the controlled port;
66002 +                                        this provide Strict, Check or Disable mode.
66003 +
66004 + @Return        E_OK on success; Error code otherwise.
66005 +
66006 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66007 +*//***************************************************************************/
66008 +t_Error FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled);
66009 +
66010 +/**************************************************************************//**
66011 + @Function      FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment
66012 +
66013 + @Description   Change the treatment for received frames with the Encryption bit
66014 +                clear and the Changed Text bit set from its default configuration
66015 +                [DEFAULT_changedTextWithNoEncryptFrameTreatment].
66016 +
66017 + @Param[in]     h_FmMacsec              FM MACSEC module descriptor.
66018 + @Param[in]     deliverUncontrolled     If True deliver on the uncontrolled port, else discard;
66019 +                                        In both cases discard on the controlled port;
66020 +                                        this provide Strict, Check or Disable mode.
66021 +
66022 + @Return        E_OK on success; Error code otherwise.
66023 +
66024 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66025 +*//***************************************************************************/
66026 +t_Error FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled);
66027 +
66028 +/**************************************************************************//**
66029 + @Function      FM_MACSEC_ConfigUntagFrameTreatment
66030 +
66031 + @Description   Change the treatment for received frames without the MAC security tag (SecTAG)
66032 +                from its default configuration [DEFAULT_untagFrameTreatment].
66033 +
66034 + @Param[in]     h_FmMacsec     FM MACSEC module descriptor.
66035 + @Param[in]     treatMode      The selected mode.
66036 +
66037 + @Return        E_OK on success; Error code otherwise.
66038 +
66039 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66040 +*//***************************************************************************/
66041 +t_Error FM_MACSEC_ConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode);
66042 +
66043 +/**************************************************************************//**
66044 + @Function      FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment
66045 +
66046 + @Description   Change the treatment for received frames with only SCB bit set
66047 +                from its default configuration [DEFAULT_onlyScbIsSetFrameTreatment].
66048 +
66049 + @Param[in]     h_FmMacsec              FM MACSEC module descriptor.
66050 + @Param[in]     deliverUncontrolled     If True deliver on the uncontrolled port, else discard;
66051 +                                        In both cases discard on the controlled port;
66052 +                                        this provide Strict, Check or Disable mode.
66053 +
66054 + @Return        E_OK on success; Error code otherwise.
66055 +
66056 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66057 +*//***************************************************************************/
66058 +t_Error FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled);
66059 +
66060 +/**************************************************************************//**
66061 + @Function      FM_MACSEC_ConfigPnExhaustionThreshold
66062 +
66063 + @Description   It's provide the ability to configure a PN exhaustion threshold;
66064 +                When the NextPn crosses this value an interrupt event
66065 +                is asserted to warn that the active SA should re-key.
66066 +
66067 + @Param[in]     h_FmMacsec     FM MACSEC module descriptor.
66068 + @Param[in]     pnExhThr       If the threshold is reached, an interrupt event
66069 +                               is asserted to re-key.
66070 +
66071 + @Return        E_OK on success; Error code otherwise.
66072 +
66073 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66074 +*//***************************************************************************/
66075 +t_Error FM_MACSEC_ConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr);
66076 +
66077 +/**************************************************************************//**
66078 + @Function      FM_MACSEC_ConfigKeysUnreadable
66079 +
66080 + @Description   Turn on privacy mode; All the keys and their hash values can't be read any more;
66081 +                Can not be cleared unless hard reset.
66082 +
66083 + @Param[in]     h_FmMacsec         FM MACSEC module descriptor.
66084 +
66085 + @Return        E_OK on success; Error code otherwise.
66086 +
66087 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66088 +*//***************************************************************************/
66089 +t_Error FM_MACSEC_ConfigKeysUnreadable(t_Handle h_FmMacsec);
66090 +
66091 +/**************************************************************************//**
66092 + @Function      FM_MACSEC_ConfigSectagWithoutSCI
66093 +
66094 + @Description   Promise that all generated Sectag will be without SCI included.
66095 +
66096 + @Param[in]     h_FmMacsec         FM MACSEC module descriptor.
66097 +
66098 + @Return        E_OK on success; Error code otherwise.
66099 +
66100 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66101 +*//***************************************************************************/
66102 +t_Error FM_MACSEC_ConfigSectagWithoutSCI(t_Handle h_FmMacsec);
66103 +
66104 +/**************************************************************************//**
66105 + @Function      FM_MACSEC_ConfigException
66106 +
66107 + @Description   Calling this routine changes the internal driver data base
66108 +                from its default selection of exceptions enablement;
66109 +                By default all exceptions are enabled.
66110 +
66111 + @Param[in]     h_FmMacsec      FM MACSEC module descriptor.
66112 + @Param[in]     exception       The exception to be selected.
66113 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
66114 +
66115 + @Return        E_OK on success; Error code otherwise.
66116 +
66117 + @Cautions      Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
66118 +*//***************************************************************************/
66119 +t_Error FM_MACSEC_ConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
66120 +
66121 +/** @} */ /* end of FM_MACSEC_advanced_init_grp group */
66122 +/** @} */ /* end of FM_MACSEC_init_grp group */
66123 +
66124 +
66125 +/**************************************************************************//**
66126 + @Group         FM_MACSEC_runtime_control_grp FM-MACSEC Runtime Control Data Unit
66127 +
66128 + @Description   FM MACSEC runtime control data unit API functions, definitions and enums.
66129 +
66130 + @{
66131 +*//***************************************************************************/
66132 +
66133 +/**************************************************************************//**
66134 + @Function      FM_MACSEC_GetRevision
66135 +
66136 + @Description   Return MACSEC HW chip revision
66137 +
66138 + @Param[in]     h_FmMacsec         FM MACSEC module descriptor.
66139 + @Param[out]    p_MacsecRevision   MACSEC revision as defined by the chip.
66140 +
66141 + @Return        E_OK on success; Error code otherwise.
66142 +
66143 + @Cautions      Allowed only after FM_MACSEC_Init().
66144 +*//***************************************************************************/
66145 +t_Error FM_MACSEC_GetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision);
66146 +
66147 +/**************************************************************************//**
66148 + @Function      FM_MACSEC_Enable
66149 +
66150 + @Description   This routine should be called after MACSEC is initialized for enabling all
66151 +                MACSEC engines according to their existing configuration.
66152 +
66153 + @Param[in]     h_FmMacsec         FM MACSEC module descriptor.
66154 +
66155 + @Return        E_OK on success; Error code otherwise.
66156 +
66157 + @Cautions      Allowed only following FM_MACSEC_Init() and when MACSEC is disabled.
66158 +*//***************************************************************************/
66159 +t_Error FM_MACSEC_Enable(t_Handle h_FmMacsec);
66160 +
66161 +/**************************************************************************//**
66162 + @Function      FM_MACSEC_Disable
66163 +
66164 + @Description   This routine may be called when MACSEC is enabled in order to
66165 +                disable all MACSEC engines; The MACSEC is working in bypass mode.
66166 +
66167 + @Param[in]     h_FmMacsec         FM MACSEC module descriptor.
66168 +
66169 + @Return        E_OK on success; Error code otherwise.
66170 +
66171 + @Cautions      Allowed only following FM_MACSEC_Init() and when MACSEC is enabled.
66172 +*//***************************************************************************/
66173 +t_Error FM_MACSEC_Disable(t_Handle h_FmMacsec);
66174 +
66175 +/**************************************************************************//**
66176 + @Function      FM_MACSEC_SetException
66177 +
66178 + @Description   Calling this routine enables/disables the specified exception.
66179 +
66180 + @Param[in]     h_FmMacsec      FM MACSEC module descriptor.
66181 + @Param[in]     exception       The exception to be selected.
66182 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
66183 +
66184 + @Return        E_OK on success; Error code otherwise.
66185 +
66186 + @Cautions      Allowed only following FM_MACSEC_Init().
66187 +*//***************************************************************************/
66188 +t_Error FM_MACSEC_SetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
66189 +
66190 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
66191 +/**************************************************************************//**
66192 + @Function      FM_MACSEC_DumpRegs
66193 +
66194 + @Description   Dump internal registers.
66195 +
66196 + @Param[in]     h_FmMacsec  - FM MACSEC module descriptor.
66197 +
66198 + @Return        E_OK on success; Error code otherwise.
66199 +
66200 + @Cautions      Allowed only after FM_MACSEC_Init().
66201 +*//***************************************************************************/
66202 +t_Error FM_MACSEC_DumpRegs(t_Handle h_FmMacsec);
66203 +#endif /* (defined(DEBUG_ERRORS) && ... */
66204 +
66205 +#ifdef VERIFICATION_SUPPORT
66206 +/********************* VERIFICATION ONLY ********************************/
66207 +/**************************************************************************//**
66208 + @Function      FM_MACSEC_BackdoorSet
66209 +
66210 + @Description   Set register of the MACSEC memory map
66211 +
66212 + @Param[in]     h_FmMacsec          FM MACSEC module descriptor.
66213 + @Param[out]    offset              Register offset.
66214 + @Param[out]    value               Value to write.
66215 +
66216 +
66217 + @Return        None
66218 +
66219 + @Cautions      Allowed only following FM_MACSEC_Init().
66220 +*//***************************************************************************/
66221 +t_Error FM_MACSEC_BackdoorSet(t_Handle h_FmMacsec, uint32_t offset, uint32_t value);
66222 +
66223 +/**************************************************************************//**
66224 + @Function      FM_MACSEC_BackdoorGet
66225 +
66226 + @Description   Read from register of the MACSEC memory map.
66227 +
66228 + @Param[in]     h_FmMacsec          FM MACSEC module descriptor.
66229 + @Param[out]    offset              Register offset.
66230 +
66231 + @Return        Value read
66232 +
66233 + @Cautions      Allowed only following FM_MACSEC_Init().
66234 +*//***************************************************************************/
66235 +uint32_t FM_MACSEC_BackdoorGet(t_Handle h_FmMacsec, uint32_t offset);
66236 +#endif /* VERIFICATION_SUPPORT */
66237 +
66238 +/** @} */ /* end of FM_MACSEC_runtime_control_grp group */
66239 +
66240 +
66241 +/**************************************************************************//**
66242 + @Group         FM_MACSEC_SECY_grp FM-MACSEC SecY
66243 +
66244 + @Description   FM-MACSEC SecY API functions, definitions and enums
66245 +
66246 + @{
66247 +*//***************************************************************************/
66248 +
66249 +typedef uint8_t     macsecSAKey_t[32];
66250 +typedef uint64_t    macsecSCI_t;
66251 +typedef uint8_t     macsecAN_t;
66252 +
66253 +/**************************************************************************//**
66254 +@Description   MACSEC SECY Cipher Suite
66255 +*//***************************************************************************/
66256 +typedef enum e_FmMacsecSecYCipherSuite {
66257 +    e_FM_MACSEC_SECY_GCM_AES_128 = 0,       /**< GCM-AES-128 */
66258 +#if (DPAA_VERSION >= 11)
66259 +    e_FM_MACSEC_SECY_GCM_AES_256            /**< GCM-AES-256 */
66260 +#endif /* (DPAA_VERSION >= 11) */
66261 +} e_FmMacsecSecYCipherSuite;
66262 +
66263 +/**************************************************************************//**
66264 + @Description   MACSEC SECY Exceptions
66265 +*//***************************************************************************/
66266 +typedef enum e_FmMacsecSecYExceptions {
66267 +    e_FM_MACSEC_SECY_EX_FRAME_DISCARDED     /**< Frame  Discarded */
66268 +} e_FmMacsecSecYExceptions;
66269 +
66270 +/**************************************************************************//**
66271 + @Description   MACSEC SECY Events
66272 +*//***************************************************************************/
66273 +typedef enum e_FmMacsecSecYEvents {
66274 +    e_FM_MACSEC_SECY_EV_NEXT_PN             /**< Next Packet Number exhaustion threshold reached */
66275 +} e_FmMacsecSecYEvents;
66276 +
66277 +/**************************************************************************//**
66278 + @Collection   MACSEC SECY Frame Discarded Descriptor error
66279 +*//***************************************************************************/
66280 +typedef uint8_t    macsecTxScFrameDiscardedErrSelect_t; /**< typedef for defining Frame Discarded Descriptor errors */
66281 +
66282 +#define FM_MACSEC_SECY_TX_SC_FRM_DISCAR_ERR_NEXT_PN_ZERO              0x8000  /**< NextPn == 0 */
66283 +#define FM_MACSEC_SECY_TX_SC_FRM_DISCAR_ERR_SC_DISBALE                0x4000  /**< SC is disable */
66284 +/* @} */
66285 +
66286 +/**************************************************************************//**
66287 + @Function      t_FmMacsecSecYExceptionsCallback
66288 +
66289 + @Description   Exceptions user callback routine, will be called upon an
66290 +                exception passing the exception identification.
66291 +
66292 + @Param[in]     h_App       A handle to an application layer object; This handle
66293 +                            will be passed by the driver upon calling this callback.
66294 + @Param[in]     exception   The exception.
66295 +*//***************************************************************************/
66296 +typedef void (t_FmMacsecSecYExceptionsCallback) ( t_Handle                  h_App,
66297 +                                                  e_FmMacsecSecYExceptions  exception);
66298 +
66299 +/**************************************************************************//**
66300 + @Function      t_FmMacsecSecYEventsCallback
66301 +
66302 + @Description   Events user callback routine, will be called upon an
66303 +                event passing the event identification.
66304 +
66305 + @Param[in]     h_App       A handle to an application layer object; This handle
66306 +                            will be passed by the driver upon calling this callback.
66307 + @Param[in]     event       The event.
66308 +*//***************************************************************************/
66309 +typedef void (t_FmMacsecSecYEventsCallback) ( t_Handle                  h_App,
66310 +                                              e_FmMacsecSecYEvents      event);
66311 +
66312 +/**************************************************************************//**
66313 + @Description   RFC2863 MIB
66314 +*//***************************************************************************/
66315 +typedef struct t_MIBStatistics {
66316 +    uint64_t  ifInOctets;              /**< Total number of byte received */
66317 +    uint64_t  ifInPkts;                /**< Total number of packets received */
66318 +    uint64_t  ifInMcastPkts;           /**< Total number of multicast frame received */
66319 +    uint64_t  ifInBcastPkts;           /**< Total number of broadcast frame received */
66320 +    uint64_t  ifInDiscards;            /**< Frames received, but discarded due to problems within the MAC RX :
66321 +                                               - InPktsNoTag,
66322 +                                               - InPktsLate,
66323 +                                               - InPktsOverrun */
66324 +    uint64_t  ifInErrors;              /**< Number of frames received with error:
66325 +                                               - InPktsBadTag,
66326 +                                               - InPktsNoSCI,
66327 +                                               - InPktsNotUsingSA
66328 +                                               - InPktsNotValid */
66329 +    uint64_t  ifOutOctets;             /**< Total number of byte sent */
66330 +    uint64_t  ifOutPkts;               /**< Total number of packets sent */
66331 +    uint64_t  ifOutMcastPkts;          /**< Total number of multicast frame sent */
66332 +    uint64_t  ifOutBcastPkts;          /**< Total number of multicast frame sent */
66333 +    uint64_t  ifOutDiscards;           /**< Frames received, but discarded due to problems within the MAC TX N/A! */
66334 +    uint64_t  ifOutErrors;             /**< Number of frames transmitted with error:
66335 +                                               - FIFO Overflow Error
66336 +                                               - FIFO Underflow Error
66337 +                                               - Other */
66338 +} t_MIBStatistics;
66339 +
66340 +/**************************************************************************//**
66341 + @Description   MACSEC SecY Rx SA Statistics
66342 +*//***************************************************************************/
66343 +typedef struct t_FmMacsecSecYRxSaStatistics {
66344 +    uint32_t            inPktsOK;               /**< The number of frames with resolved SCI, have passed all
66345 +                                                     frame validation frame validation with the validateFrame not set to disable */
66346 +    uint32_t            inPktsInvalid;          /**< The number of frames with resolved SCI, that have failed frame
66347 +                                                     validation with the validateFrame set to check */
66348 +    uint32_t            inPktsNotValid;         /**< The number of frames with resolved SCI, discarded on the controlled port,
66349 +                                                     that have failed frame validation with the validateFrame set to strict or the c bit is set */
66350 +    uint32_t            inPktsNotUsingSA;       /**< The number of frames received with resolved SCI and discarded on disabled or
66351 +                                                     not provisioned SA with validateFrame in the strict mode or the C bit is set */
66352 +    uint32_t            inPktsUnusedSA;         /**< The number of frames received with resolved SCI on disabled or not provisioned SA
66353 +                                                     with validateFrame not in the strict mode and the C bit is cleared */
66354 +} t_FmMacsecSecYRxSaStatistics;
66355 +
66356 +/**************************************************************************//**
66357 + @Description   MACSEC SecY Tx SA Statistics
66358 +*//***************************************************************************/
66359 +typedef struct t_FmMacsecSecYTxSaStatistics {
66360 +    uint64_t            outPktsProtected;       /**< The number of frames, that the user of the controlled port requested to
66361 +                                                     be transmitted, which were integrity protected */
66362 +    uint64_t            outPktsEncrypted;       /**< The number of frames, that the user of the controlled port requested to
66363 +                                                     be transmitted, which were confidentiality protected */
66364 +} t_FmMacsecSecYTxSaStatistics;
66365 +
66366 +/**************************************************************************//**
66367 + @Description   MACSEC SecY Rx SC Statistics
66368 +*//***************************************************************************/
66369 +typedef struct t_FmMacsecSecYRxScStatistics {
66370 +    uint64_t            inPktsUnchecked;        /**< The number of frames with resolved SCI, delivered to the user of a controlled port,
66371 +                                                     that are not validated with the validateFrame set to disable */
66372 +    uint64_t            inPktsDelayed;          /**< The number of frames with resolved SCI, delivered to the user of a controlled port,
66373 +                                                     that have their PN smaller than the lowest_PN with the validateFrame set to
66374 +                                                     disable or replayProtect disabled */
66375 +    uint64_t            inPktsLate;             /**< The number of frames with resolved SCI, discarded on the controlled port,
66376 +                                                     that have their PN smaller than the lowest_PN with the validateFrame set to
66377 +                                                     Check or Strict and replayProtect enabled */
66378 +    uint64_t            inPktsOK;               /**< The number of frames with resolved SCI, have passed all
66379 +                                                     frame validation frame validation with the validateFrame not set to disable */
66380 +    uint64_t            inPktsInvalid;          /**< The number of frames with resolved SCI, that have failed frame
66381 +                                                     validation with the validateFrame set to check */
66382 +    uint64_t            inPktsNotValid;         /**< The number of frames with resolved SCI, discarded on the controlled port,
66383 +                                                     that have failed frame validation with the validateFrame set to strict or the c bit is set */
66384 +    uint64_t            inPktsNotUsingSA;       /**< The number of frames received with resolved SCI and discarded on disabled or
66385 +                                                     not provisioned SA with validateFrame in the strict mode or the C bit is set */
66386 +    uint64_t            inPktsUnusedSA;         /**< The number of frames received with resolved SCI on disabled or not provisioned SA
66387 +                                                     with validateFrame not in the strict mode and the C bit is cleared */
66388 +} t_FmMacsecSecYRxScStatistics;
66389 +
66390 +/**************************************************************************//**
66391 + @Description   MACSEC SecY Tx SC Statistics
66392 +*//***************************************************************************/
66393 +typedef struct t_FmMacsecSecYTxScStatistics {
66394 +    uint64_t            outPktsProtected;       /**< The number of frames, that the user of the controlled port requested to
66395 +                                                     be transmitted, which were integrity protected */
66396 +    uint64_t            outPktsEncrypted;       /**< The number of frames, that the user of the controlled port requested to
66397 +                                                     be transmitted, which were confidentiality protected */
66398 +} t_FmMacsecSecYTxScStatistics;
66399 +
66400 +/**************************************************************************//**
66401 + @Description   MACSEC SecY Statistics
66402 +*//***************************************************************************/
66403 +typedef struct t_FmMacsecSecYStatistics {
66404 +    t_MIBStatistics     mibCtrlStatistics;      /**< Controlled port MIB statistics */
66405 +    t_MIBStatistics     mibNonCtrlStatistics;   /**< Uncontrolled port MIB statistics */
66406 +/* Frame verification statistics */
66407 +    uint64_t            inPktsUntagged;         /**< The number of received packets without the MAC security tag
66408 +                                                     (SecTAG) with validateFrames which is not in the strict mode */
66409 +    uint64_t            inPktsNoTag;            /**< The number of received packets discarded without the
66410 +                                                     MAC security tag (SecTAG) with validateFrames which is in the strict mode */
66411 +    uint64_t            inPktsBadTag;           /**< The number of received packets discarded with an invalid
66412 +                                                     SecTAG or a zero value PN or an invalid ICV */
66413 +    uint64_t            inPktsUnknownSCI;       /**< The number of received packets with unknown SCI with the
66414 +                                                     condition : validateFrames is not in the strict mode and the
66415 +                                                     C bit in the SecTAG is not set */
66416 +    uint64_t            inPktsNoSCI;            /**< The number of received packets discarded with unknown SCI
66417 +                                                     information with the condition : validateFrames is in the strict mode
66418 +                                                     or the C bit in the SecTAG is set */
66419 +    uint64_t            inPktsOverrun;          /**< The number of packets discarded because the number of
66420 +                                                     received packets exceeded the cryptographic performance capabilities */
66421 +/* Frame validation statistics */
66422 +    uint64_t            inOctetsValidated;      /**< The number of octets of plaintext recovered from received frames with
66423 +                                                     resolved SCI that were integrity protected but not encrypted */
66424 +    uint64_t            inOctetsDecrypted;      /**< The number of octets of plaintext recovered from received frames with
66425 +                                                     resolved SCI that were integrity protected and encrypted */
66426 +/* Frame generation statistics */
66427 +    uint64_t            outPktsUntagged;        /**< The number of frames, that the user of the controlled port requested to
66428 +                                                     be transmitted, with protectFrame false */
66429 +    uint64_t            outPktsTooLong;         /**< The number of frames, that the user of the controlled port requested to
66430 +                                                     be transmitted, discarded due to length being larger than Maximum Frame Length (MACSEC_MFL) */
66431 +/* Frame protection statistics */
66432 +    uint64_t            outOctetsProtected;     /**< The number of octets of User Data in transmitted frames that were
66433 +                                                     integrity protected but not encrypted */
66434 +    uint64_t            outOctetsEncrypted;     /**< The number of octets of User Data in transmitted frames that were
66435 +                                                     both integrity protected and encrypted */
66436 +} t_FmMacsecSecYStatistics;
66437 +
66438 +
66439 +/**************************************************************************//**
66440 + @Description   MACSEC SecY SC Params
66441 +*//***************************************************************************/
66442 +typedef struct t_FmMacsecSecYSCParams {
66443 +    macsecSCI_t                 sci;            /**< The secure channel identification of the SC */
66444 +    e_FmMacsecSecYCipherSuite   cipherSuite;    /**< Cipher suite to be used for the SC */
66445 +} t_FmMacsecSecYSCParams;
66446 +
66447 +/**************************************************************************//**
66448 + @Group         FM_MACSEC_SECY_init_grp FM-MACSEC SecY Initialization Unit
66449 +
66450 + @Description   FM-MACSEC SecY Initialization Unit
66451 +
66452 + @{
66453 +*//***************************************************************************/
66454 +
66455 +/**************************************************************************//**
66456 + @Description   enum for validate frames
66457 +*//***************************************************************************/
66458 +typedef enum e_FmMacsecValidFrameBehavior {
66459 +    e_FM_MACSEC_VALID_FRAME_BEHAVIOR_DISABLE = 0,   /**< disable the validation function */
66460 +    e_FM_MACSEC_VALID_FRAME_BEHAVIOR_CHECK,         /**< enable the validation function but only for checking
66461 +                                                         without filtering out invalid frames */
66462 +    e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT         /**< enable the validation function and also strictly filter
66463 +                                                         out those invalid frames */
66464 +} e_FmMacsecValidFrameBehavior;
66465 +
66466 +/**************************************************************************//**
66467 + @Description   enum for sci insertion
66468 +*//***************************************************************************/
66469 +typedef enum e_FmMacsecSciInsertionMode {
66470 +    e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG = 0, /**< explicit sci in the sectag */
66471 +    e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA,     /**< mac sa is overwritten with the sci*/
66472 +    e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP          /**< implicit point-to-point sci (pre-shared) */
66473 +} e_FmMacsecSciInsertionMode;
66474 +
66475 +/**************************************************************************//**
66476 + @Description   FM MACSEC SecY config input
66477 +*//***************************************************************************/
66478 +typedef struct t_FmMacsecSecYParams {
66479 +    t_Handle                                    h_FmMacsec;             /**< A handle to the FM MACSEC object */
66480 +    t_FmMacsecSecYSCParams                      txScParams;             /**< Tx SC Params */
66481 +    uint32_t                                    numReceiveChannels;     /**< Number of receive channels dedicated to this SecY */
66482 +    t_FmMacsecSecYExceptionsCallback            *f_Exception;           /**< Callback routine to be called by the driver upon SecY exception */
66483 +    t_FmMacsecSecYEventsCallback                *f_Event;               /**< Callback routine to be called by the driver upon SecY event */
66484 +    t_Handle                                    h_App;                  /**< A handle to an application layer object; This handle will
66485 +                                                                             be passed by the driver upon calling the above callbacks */
66486 +} t_FmMacsecSecYParams;
66487 +
66488 +/**************************************************************************//**
66489 + @Function      FM_MACSEC_SECY_Config
66490 +
66491 + @Description   Creates descriptor for the FM MACSEC SECY module;
66492 +
66493 +                The routine returns a handle (descriptor) to the FM MACSEC SECY object;
66494 +                This descriptor must be passed as first parameter to all other
66495 +                FM MACSEC SECY function calls;
66496 +                No actual initialization or configuration of FM MACSEC SecY hardware is
66497 +                done by this routine.
66498 +
66499 + @Param[in]     p_FmMacsecSecYParam     Pointer to data structure of parameters.
66500 +
66501 + @Return        Handle to FM MACSEC SECY object, or NULL for Failure.
66502 +*//***************************************************************************/
66503 +t_Handle FM_MACSEC_SECY_Config(t_FmMacsecSecYParams *p_FmMacsecSecYParam);
66504 +
66505 +/**************************************************************************//**
66506 + @Function      FM_MACSEC_SECY_Init
66507 +
66508 + @Description   Initializes the FM MACSEC SECY module.
66509 +
66510 + @Param[in]     h_FmMacsecSecY  FM MACSEC SECY module descriptor.
66511 +
66512 + @Return        E_OK on success; Error code otherwise.
66513 +*//***************************************************************************/
66514 +t_Error FM_MACSEC_SECY_Init(t_Handle h_FmMacsecSecY);
66515 +
66516 +/**************************************************************************//**
66517 + @Function      FM_MACSEC_SECY_Free
66518 +
66519 + @Description   Frees all resources that were assigned to FM MACSEC SECY module.
66520 +
66521 +                Calling this routine invalidates the descriptor.
66522 +
66523 + @Param[in]     h_FmMacsecSecY  FM MACSEC SECY module descriptor.
66524 +
66525 + @Return        E_OK on success; Error code otherwise.
66526 +*//***************************************************************************/
66527 +t_Error FM_MACSEC_SECY_Free(t_Handle h_FmMacsecSecY);
66528 +
66529 +/**************************************************************************//**
66530 + @Group         FM_MACSEC_SECY_advanced_init_grp  FM-MACSEC SecY Advanced Configuration Unit
66531 +
66532 + @Description   Configuration functions used to change default values.
66533 +
66534 + @{
66535 +*//***************************************************************************/
66536 +
66537 +/**************************************************************************//**
66538 + @Function      FM_MACSEC_SECY_ConfigSciInsertionMode
66539 +
66540 + @Description   Calling this routine changes the SCI-insertion-mode in the
66541 +                internal driver data base from its default configuration
66542 +                [DEFAULT_sciInsertionMode]
66543 +
66544 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66545 + @Param[in]     sciInsertionMode    Sci insertion mode
66546 +
66547 + @Return        E_OK on success; Error code otherwise.
66548 +
66549 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
66550 +
66551 +*//***************************************************************************/
66552 +t_Error FM_MACSEC_SECY_ConfigSciInsertionMode(t_Handle h_FmMacsecSecY, e_FmMacsecSciInsertionMode sciInsertionMode);
66553 +
66554 +/**************************************************************************//**
66555 + @Function      FM_MACSEC_SECY_ConfigProtectFrames
66556 +
66557 + @Description   Calling this routine changes the protect-frame mode in the
66558 +                internal driver data base from its default configuration
66559 +                [DEFAULT_protectFrames]
66560 +
66561 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66562 + @Param[in]     protectFrames       If FALSE, frames are transmitted without modification
66563 +
66564 + @Return        E_OK on success; Error code otherwise.
66565 +
66566 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
66567 +
66568 +*//***************************************************************************/
66569 +t_Error FM_MACSEC_SECY_ConfigProtectFrames(t_Handle h_FmMacsecSecY, bool protectFrames);
66570 +
66571 +/**************************************************************************//**
66572 + @Function      FM_MACSEC_SECY_ConfigReplayWindow
66573 +
66574 + @Description   Calling this routine changes the replay-window settings in the
66575 +                internal driver data base from its default configuration
66576 +                [DEFAULT_replayEnable], [DEFAULT_replayWindow]
66577 +
66578 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66579 + @Param[in]     replayProtect;      Replay protection function mode
66580 + @Param[in]     replayWindow;       The size of the replay window
66581 +
66582 + @Return        E_OK on success; Error code otherwise.
66583 +
66584 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
66585 +
66586 +*//***************************************************************************/
66587 +t_Error FM_MACSEC_SECY_ConfigReplayWindow(t_Handle h_FmMacsecSecY, bool replayProtect, uint32_t replayWindow);
66588 +
66589 +/**************************************************************************//**
66590 + @Function      FM_MACSEC_SECY_ConfigValidationMode
66591 +
66592 + @Description   Calling this routine changes the frame-validation-behavior mode
66593 +                in the internal driver data base from its default configuration
66594 +                [DEFAULT_validateFrames]
66595 +
66596 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66597 + @Param[in]     validateFrames      Validation function mode
66598 +
66599 + @Return        E_OK on success; Error code otherwise.
66600 +
66601 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
66602 +
66603 +*//***************************************************************************/
66604 +t_Error FM_MACSEC_SECY_ConfigValidationMode(t_Handle h_FmMacsecSecY, e_FmMacsecValidFrameBehavior validateFrames);
66605 +
66606 +/**************************************************************************//**
66607 + @Function      FM_MACSEC_SECY_ConfigConfidentiality
66608 +
66609 + @Description   Calling this routine changes the confidentiality settings in the
66610 +                internal driver data base from its default configuration
66611 +                [DEFAULT_confidentialityEnable], [DEFAULT_confidentialityOffset]
66612 +
66613 + @Param[in]     h_FmMacsecSecY          FM MACSEC SECY module descriptor.
66614 + @Param[in]     confidentialityEnable   TRUE  - confidentiality protection and integrity protection
66615 +                                        FALSE - no confidentiality protection, only integrity protection
66616 + @Param[in]     confidentialityOffset   The number of initial octets of each MSDU without confidentiality protection
66617 +                                        common values are 0, 30, and 50
66618 +
66619 + @Return        E_OK on success; Error code otherwise.
66620 +
66621 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
66622 +
66623 +*//***************************************************************************/
66624 +t_Error FM_MACSEC_SECY_ConfigConfidentiality(t_Handle h_FmMacsecSecY, bool confidentialityEnable, uint16_t confidentialityOffset);
66625 +
66626 +/**************************************************************************//**
66627 + @Function      FM_MACSEC_SECY_ConfigPointToPoint
66628 +
66629 + @Description   configure this SecY to work in point-to-point mode, means that
66630 +                it will have only one rx sc;
66631 +
66632 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66633 +
66634 + @Return        E_OK on success; Error code otherwise.
66635 +
66636 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
66637 +                Can be called only once in a system; only the first secY that will call this
66638 +                routine will be able to operate in Point-To-Point mode.
66639 +*//***************************************************************************/
66640 +t_Error FM_MACSEC_SECY_ConfigPointToPoint(t_Handle h_FmMacsecSecY);
66641 +
66642 +/**************************************************************************//**
66643 + @Function      FM_MACSEC_SECY_ConfigException
66644 +
66645 + @Description   Calling this routine changes the internal driver data base
66646 +                from its default selection of exceptions enablement;
66647 +                By default all exceptions are enabled.
66648 +
66649 + @Param[in]     h_FmMacsecSecY  FM MACSEC SECY module descriptor.
66650 + @Param[in]     exception       The exception to be selected.
66651 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
66652 +
66653 + @Return        E_OK on success; Error code otherwise.
66654 +
66655 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init().
66656 +*//***************************************************************************/
66657 +t_Error FM_MACSEC_SECY_ConfigException(t_Handle h_FmMacsecSecY, e_FmMacsecSecYExceptions exception, bool enable);
66658 +
66659 +/**************************************************************************//**
66660 + @Function      FM_MACSEC_SECY_ConfigEvent
66661 +
66662 + @Description   Calling this routine changes the internal driver data base
66663 +                from its default selection of events enablement;
66664 +                By default all events are enabled.
66665 +
66666 + @Param[in]     h_FmMacsecSecY  FM MACSEC SECY module descriptor.
66667 + @Param[in]     event           The event to be selected.
66668 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
66669 +
66670 + @Return        E_OK on success; Error code otherwise.
66671 +
66672 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init().
66673 +*//***************************************************************************/
66674 +t_Error FM_MACSEC_SECY_ConfigEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable);
66675 +
66676 +/** @} */ /* end of FM_MACSEC_SECY_advanced_init_grp group */
66677 +/** @} */ /* end of FM_MACSEC_SECY_init_grp group */
66678 +
66679 +
66680 +/**************************************************************************//**
66681 + @Group         FM_MACSEC_SECY_runtime_control_grp FM-MACSEC SecY Runtime Control Unit
66682 +
66683 + @Description   FM MACSEC SECY Runtime control unit API functions, definitions and enums.
66684 +
66685 + @{
66686 +*//***************************************************************************/
66687 +
66688 +/**************************************************************************//**
66689 + @Function      FM_MACSEC_SECY_CreateRxSc
66690 +
66691 + @Description   Create a receive secure channel.
66692 +
66693 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66694 + @Param[in]     scParams            secure channel params.
66695 +
66696 + @Return        E_OK on success; Error code otherwise.
66697 +
66698 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66699 +*//***************************************************************************/
66700 +t_Handle FM_MACSEC_SECY_CreateRxSc(t_Handle h_FmMacsecSecY, t_FmMacsecSecYSCParams *p_ScParams);
66701 +
66702 +/**************************************************************************//**
66703 + @Function      FM_MACSEC_SECY_DeleteRxSc
66704 +
66705 + @Description   Deleting an initialized secure channel.
66706 +
66707 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66708 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66709 +
66710 + @Return        E_OK on success; Error code otherwise.
66711 +
66712 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSc().
66713 +*//***************************************************************************/
66714 +t_Error FM_MACSEC_SECY_DeleteRxSc(t_Handle h_FmMacsecSecY, t_Handle h_Sc);
66715 +
66716 +/**************************************************************************//**
66717 + @Function      FM_MACSEC_SECY_CreateRxSa
66718 +
66719 + @Description   Create a receive secure association for the secure channel;
66720 +                the SA cannot be used to receive frames until FM_MACSEC_SECY_RxSaEnableReceive is called.
66721 +
66722 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66723 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66724 + @Param[in]     an                  association number represent the SA.
66725 + @Param[in]     lowestPn            the lowest acceptable PN value for a received frame.
66726 + @Param[in]     key                 the desired key for this SA.
66727 +
66728 + @Return        E_OK on success; Error code otherwise.
66729 +
66730 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSc().
66731 +*//***************************************************************************/
66732 +t_Error FM_MACSEC_SECY_CreateRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key);
66733 +
66734 +/**************************************************************************//**
66735 + @Function      FM_MACSEC_SECY_DeleteRxSa
66736 +
66737 + @Description   Deleting an initialized secure association.
66738 +
66739 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66740 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66741 + @Param[in]     an                  association number represent the SA.
66742 +
66743 + @Return        E_OK on success; Error code otherwise.
66744 +
66745 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66746 +*//***************************************************************************/
66747 +t_Error FM_MACSEC_SECY_DeleteRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an);
66748 +
66749 +/**************************************************************************//**
66750 + @Function      FM_MACSEC_SECY_RxSaEnableReceive
66751 +
66752 + @Description   Enabling the SA to receive frames.
66753 +
66754 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66755 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66756 + @Param[in]     an                  association number represent the SA.
66757 +
66758 + @Return        E_OK on success; Error code otherwise.
66759 +
66760 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSa().
66761 +*//***************************************************************************/
66762 +t_Error FM_MACSEC_SECY_RxSaEnableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an);
66763 +
66764 +/**************************************************************************//**
66765 + @Function      FM_MACSEC_SECY_RxSaDisableReceive
66766 +
66767 + @Description   Disabling the SA from receive frames.
66768 +
66769 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66770 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66771 + @Param[in]     an                  association number represent the SA.
66772 +
66773 + @Return        E_OK on success; Error code otherwise.
66774 +
66775 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSa().
66776 +*//***************************************************************************/
66777 +t_Error FM_MACSEC_SECY_RxSaDisableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an);
66778 +
66779 +/**************************************************************************//**
66780 + @Function      FM_MACSEC_SECY_RxSaUpdateNextPn
66781 +
66782 + @Description   Update the next packet number expected on RX;
66783 +                The value of nextPN shall be set to the greater of its existing value and the
66784 +                supplied of updtNextPN (802.1AE-2006 10.7.15).
66785 +
66786 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66787 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66788 + @Param[in]     an                  association number represent the SA.
66789 + @Param[in]     updtNextPN          the next PN value for a received frame.
66790 +
66791 + @Return        E_OK on success; Error code otherwise.
66792 +
66793 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSa().
66794 +*//***************************************************************************/
66795 +t_Error FM_MACSEC_SECY_RxSaUpdateNextPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtNextPN);
66796 +
66797 +/**************************************************************************//**
66798 + @Function      FM_MACSEC_SECY_RxSaUpdateLowestPn
66799 +
66800 + @Description   Update the lowest packet number expected on RX;
66801 +                The value of lowestPN shall be set to the greater of its existing value and the
66802 +                supplied of updtLowestPN (802.1AE-2006 10.7.15).
66803 +
66804 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66805 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66806 + @Param[in]     an                  association number represent the SA.
66807 + @Param[in]     updtLowestPN        the lowest PN acceptable value for a received frame.
66808 +
66809 + @Return        E_OK on success; Error code otherwise.
66810 +
66811 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSa().
66812 +*//***************************************************************************/
66813 +t_Error FM_MACSEC_SECY_RxSaUpdateLowestPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtLowestPN);
66814 +
66815 +/**************************************************************************//**
66816 + @Function      FM_MACSEC_SECY_RxSaModifyKey
66817 +
66818 + @Description   Modify the current key of the SA with a new one.
66819 +
66820 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66821 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
66822 + @Param[in]     an                  association number represent the SA.
66823 + @Param[in]     key                 new key to replace the current key.
66824 +
66825 + @Return        E_OK on success; Error code otherwise.
66826 +
66827 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSa().
66828 +*//***************************************************************************/
66829 +t_Error FM_MACSEC_SECY_RxSaModifyKey(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, macsecSAKey_t key);
66830 +
66831 +/**************************************************************************//**
66832 + @Function      FM_MACSEC_SECY_CreateTxSa
66833 +
66834 + @Description   Create a transmit secure association for the secure channel;
66835 +                the SA cannot be used to transmit frames until FM_MACSEC_SECY_TxSaSetActivate is called;
66836 +                Only one SA can be active at a time.
66837 +
66838 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66839 + @Param[in]     an                  association number represent the SA.
66840 + @Param[in]     key                 the desired key for this SA.
66841 +
66842 + @Return        E_OK on success; Error code otherwise.
66843 +
66844 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66845 +*//***************************************************************************/
66846 +t_Error FM_MACSEC_SECY_CreateTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an, macsecSAKey_t key);
66847 +
66848 +/**************************************************************************//**
66849 + @Function      FM_MACSEC_SECY_DeleteTxSa
66850 +
66851 + @Description   Deleting an initialized secure association.
66852 +
66853 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66854 + @Param[in]     an                  association number represent the SA.
66855 +
66856 + @Return        E_OK on success; Error code otherwise.
66857 +
66858 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66859 +*//***************************************************************************/
66860 +t_Error FM_MACSEC_SECY_DeleteTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an);
66861 +
66862 +/**************************************************************************//**
66863 + @Function      FM_MACSEC_SECY_TxSaModifyKey
66864 +
66865 + @Description   Modify the key of the inactive SA with a new one.
66866 +
66867 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66868 + @Param[in]     nextActiveAn        association number represent the next SA to be activated.
66869 + @Param[in]     key                 new key to replace the current key.
66870 +
66871 + @Return        E_OK on success; Error code otherwise.
66872 +
66873 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66874 +*//***************************************************************************/
66875 +t_Error FM_MACSEC_SECY_TxSaModifyKey(t_Handle h_FmMacsecSecY, macsecAN_t nextActiveAn, macsecSAKey_t key);
66876 +
66877 +/**************************************************************************//**
66878 + @Function      FM_MACSEC_SECY_TxSaSetActive
66879 +
66880 + @Description   Set this SA to the active SA to be used on TX for SC;
66881 +                only one SA can be active at a time.
66882 +
66883 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66884 + @Param[in]     an                  association number represent the SA.
66885 +
66886 + @Return        E_OK on success; Error code otherwise.
66887 +
66888 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66889 +*//***************************************************************************/
66890 +t_Error FM_MACSEC_SECY_TxSaSetActive(t_Handle h_FmMacsecSecY, macsecAN_t an);
66891 +
66892 +/**************************************************************************//**
66893 + @Function      FM_MACSEC_SECY_TxSaGetActive
66894 +
66895 + @Description   Get the active SA that being used for TX.
66896 +
66897 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66898 + @Param[out]    p_An                the active an.
66899 +
66900 + @Return        E_OK on success; Error code otherwise.
66901 +
66902 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66903 +*//***************************************************************************/
66904 +t_Error FM_MACSEC_SECY_TxSaGetActive(t_Handle h_FmMacsecSecY, macsecAN_t *p_An);
66905 +
66906 +/**************************************************************************//**
66907 + @Function      FM_MACSEC_SECY_GetStatistics
66908 +
66909 + @Description   get all statistics counters.
66910 +
66911 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66912 + @Param[in]     p_Statistics        Structure with statistics.
66913 +
66914 + @Return        E_OK on success; Error code otherwise.
66915 +
66916 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66917 +*//***************************************************************************/
66918 +t_Error FM_MACSEC_SECY_GetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYStatistics *p_Statistics);
66919 +
66920 +/**************************************************************************//**
66921 + @Function      FM_MACSEC_SECY_RxScGetStatistics
66922 +
66923 + @Description   get all statistics counters.
66924 +
66925 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66926 + @Param[in]     h_Sc                Rx Sc handle.
66927 + @Param[in]     p_Statistics        Structure with statistics.
66928 +
66929 + @Return        E_OK on success; Error code otherwise.
66930 +
66931 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66932 +*//***************************************************************************/
66933 +t_Error FM_MACSEC_SECY_RxScGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, t_FmMacsecSecYRxScStatistics *p_Statistics);
66934 +
66935 +/**************************************************************************//**
66936 + @Function      FM_MACSEC_SECY_RxSaGetStatistics
66937 +
66938 + @Description   get all statistics counters
66939 +
66940 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66941 + @Param[in]     h_Sc                Rx Sc handle.
66942 + @Param[in]     an                  association number represent the SA.
66943 + @Param[in]     p_Statistics        Structure with statistics.
66944 +
66945 + @Return        E_OK on success; Error code otherwise.
66946 +
66947 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66948 +*//***************************************************************************/
66949 +t_Error FM_MACSEC_SECY_RxSaGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, t_FmMacsecSecYRxSaStatistics *p_Statistics);
66950 +
66951 +/**************************************************************************//**
66952 + @Function      FM_MACSEC_SECY_TxScGetStatistics
66953 +
66954 + @Description   get all statistics counters.
66955 +
66956 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66957 + @Param[in]     p_Statistics        Structure with statistics.
66958 +
66959 + @Return        E_OK on success; Error code otherwise.
66960 +
66961 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66962 +*//***************************************************************************/
66963 +t_Error FM_MACSEC_SECY_TxScGetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYTxScStatistics *p_Statistics);
66964 +
66965 +/**************************************************************************//**
66966 + @Function      FM_MACSEC_SECY_TxSaGetStatistics
66967 +
66968 + @Description   get all statistics counters.
66969 +
66970 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
66971 + @Param[in]     an                  association number represent the SA.
66972 + @Param[in]     p_Statistics        Structure with statistics.
66973 +
66974 + @Return        E_OK on success; Error code otherwise.
66975 +
66976 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66977 +*//***************************************************************************/
66978 +t_Error FM_MACSEC_SECY_TxSaGetStatistics(t_Handle h_FmMacsecSecY, macsecAN_t an, t_FmMacsecSecYTxSaStatistics *p_Statistics);
66979 +
66980 +/**************************************************************************//**
66981 + @Function      FM_MACSEC_SECY_SetException
66982 +
66983 + @Description   Calling this routine enables/disables the specified exception.
66984 +
66985 + @Param[in]     h_FmMacsecSecY  FM MACSEC SECY module descriptor.
66986 + @Param[in]     exception       The exception to be selected.
66987 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
66988 +
66989 + @Return        E_OK on success; Error code otherwise.
66990 +
66991 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
66992 +*//***************************************************************************/
66993 +t_Error FM_MACSEC_SECY_SetException(t_Handle h_FmMacsecSecY, e_FmMacsecExceptions exception, bool enable);
66994 +
66995 +/**************************************************************************//**
66996 + @Function      FM_MACSEC_SECY_SetEvent
66997 +
66998 + @Description   Calling this routine enables/disables the specified event.
66999 +
67000 + @Param[in]     h_FmMacsecSecY  FM MACSEC SECY module descriptor.
67001 + @Param[in]     event           The event to be selected.
67002 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
67003 +
67004 + @Return        E_OK on success; Error code otherwise.
67005 +
67006 + @Cautions      Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init().
67007 +*//***************************************************************************/
67008 +t_Error FM_MACSEC_SECY_SetEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable);
67009 +
67010 +/**************************************************************************//**
67011 + @Function      FM_MACSEC_SECY_GetRxScPhysId
67012 +
67013 + @Description   return the physical id of the Secure Channel.
67014 +
67015 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
67016 + @Param[in]     h_Sc                SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
67017 + @Param[out]    p_ScPhysId          the SC physical id.
67018 +
67019 + @Return        E_OK on success; Error code otherwise.
67020 +
67021 + @Cautions      Allowed only following FM_MACSEC_SECY_CreateRxSc().
67022 +*//***************************************************************************/
67023 +t_Error FM_MACSEC_SECY_GetRxScPhysId(t_Handle h_FmMacsecSecY, t_Handle h_Sc, uint32_t *p_ScPhysId);
67024 +
67025 +/**************************************************************************//**
67026 + @Function      FM_MACSEC_SECY_GetTxScPhysId
67027 +
67028 + @Description   return the physical id of the Secure Channel.
67029 +
67030 + @Param[in]     h_FmMacsecSecY      FM MACSEC SECY module descriptor.
67031 + @Param[out]    p_ScPhysId          the SC physical id.
67032 +
67033 + @Return        E_OK on success; Error code otherwise.
67034 +
67035 + @Cautions      Allowed only following FM_MACSEC_SECY_Init().
67036 +*//***************************************************************************/
67037 +t_Error FM_MACSEC_SECY_GetTxScPhysId(t_Handle h_FmMacsecSecY, uint32_t *p_ScPhysId);
67038 +
67039 +/** @} */ /* end of FM_MACSEC_SECY_runtime_control_grp group */
67040 +/** @} */ /* end of FM_MACSEC_SECY_grp group */
67041 +/** @} */ /* end of FM_MACSEC_grp group */
67042 +/** @} */ /* end of FM_grp group */
67043 +
67044 +
67045 +#endif /* __FM_MACSEC_EXT_H */
67046 --- /dev/null
67047 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_muram_ext.h
67048 @@ -0,0 +1,170 @@
67049 +/*
67050 + * Copyright 2008-2012 Freescale Semiconductor Inc.
67051 + *
67052 + * Redistribution and use in source and binary forms, with or without
67053 + * modification, are permitted provided that the following conditions are met:
67054 + *     * Redistributions of source code must retain the above copyright
67055 + *       notice, this list of conditions and the following disclaimer.
67056 + *     * Redistributions in binary form must reproduce the above copyright
67057 + *       notice, this list of conditions and the following disclaimer in the
67058 + *       documentation and/or other materials provided with the distribution.
67059 + *     * Neither the name of Freescale Semiconductor nor the
67060 + *       names of its contributors may be used to endorse or promote products
67061 + *       derived from this software without specific prior written permission.
67062 + *
67063 + *
67064 + * ALTERNATIVELY, this software may be distributed under the terms of the
67065 + * GNU General Public License ("GPL") as published by the Free Software
67066 + * Foundation, either version 2 of that License or (at your option) any
67067 + * later version.
67068 + *
67069 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
67070 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
67071 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
67072 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
67073 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
67074 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
67075 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
67076 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67077 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
67078 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67079 + */
67080 +
67081 +
67082 +/**************************************************************************//**
67083 + @File          fm_muram_ext.h
67084 +
67085 + @Description   FM MURAM Application Programming Interface.
67086 +*//***************************************************************************/
67087 +#ifndef __FM_MURAM_EXT
67088 +#define __FM_MURAM_EXT
67089 +
67090 +#include "error_ext.h"
67091 +#include "std_ext.h"
67092 +
67093 +
67094 +/**************************************************************************//**
67095 +
67096 + @Group         FM_grp Frame Manager API
67097 +
67098 + @Description   FM API functions, definitions and enums
67099 +
67100 + @{
67101 +*//***************************************************************************/
67102 +
67103 +/**************************************************************************//**
67104 + @Group         FM_muram_grp FM MURAM
67105 +
67106 + @Description   FM MURAM API functions, definitions and enums
67107 +
67108 + @{
67109 +*//***************************************************************************/
67110 +
67111 +/**************************************************************************//**
67112 + @Group         FM_muram_init_grp FM MURAM Initialization Unit
67113 +
67114 + @Description   FM MURAM initialization API functions, definitions and enums
67115 +
67116 + @{
67117 +*//***************************************************************************/
67118 +
67119 +/**************************************************************************//**
67120 + @Function      FM_MURAM_ConfigAndInit
67121 +
67122 + @Description   Creates partition in the MURAM.
67123 +
67124 +                The routine returns a handle (descriptor) to the MURAM partition.
67125 +                This descriptor must be passed as first parameter to all other
67126 +                FM-MURAM function calls.
67127 +
67128 +                No actual initialization or configuration of FM_MURAM hardware is
67129 +                done by this routine.
67130 +
67131 + @Param[in]     baseAddress - Pointer to base of memory mapped FM-MURAM.
67132 + @Param[in]     size        - Size of the FM-MURAM partition.
67133 +
67134 + @Return        Handle to FM-MURAM object, or NULL for Failure.
67135 +*//***************************************************************************/
67136 +t_Handle FM_MURAM_ConfigAndInit(uintptr_t baseAddress, uint32_t size);
67137 +
67138 +/**************************************************************************//**
67139 + @Function      FM_MURAM_Free
67140 +
67141 + @Description   Frees all resources that were assigned to FM-MURAM module.
67142 +
67143 +                Calling this routine invalidates the descriptor.
67144 +
67145 + @Param[in]     h_FmMuram - FM-MURAM module descriptor.
67146 +
67147 + @Return        E_OK on success; Error code otherwise.
67148 +*//***************************************************************************/
67149 +t_Error  FM_MURAM_Free(t_Handle h_FmMuram);
67150 +
67151 +/** @} */ /* end of FM_muram_init_grp group */
67152 +
67153 +
67154 +/**************************************************************************//**
67155 + @Group         FM_muram_ctrl_grp FM MURAM Control Unit
67156 +
67157 + @Description   FM MURAM control API functions, definitions and enums
67158 +
67159 + @{
67160 +*//***************************************************************************/
67161 +
67162 +/**************************************************************************//**
67163 + @Function      FM_MURAM_AllocMem
67164 +
67165 + @Description   Allocate some memory from FM-MURAM partition.
67166 +
67167 + @Param[in]     h_FmMuram - FM-MURAM module descriptor.
67168 + @Param[in]     size      - size of the memory to be allocated.
67169 + @Param[in]     align     - Alignment of the memory.
67170 +
67171 + @Return        address of the allocated memory; NULL otherwise.
67172 +*//***************************************************************************/
67173 +void  * FM_MURAM_AllocMem(t_Handle h_FmMuram, uint32_t size, uint32_t align);
67174 +
67175 +/**************************************************************************//**
67176 + @Function      FM_MURAM_AllocMemForce
67177 +
67178 + @Description   Allocate some specific memory from FM-MURAM partition (according
67179 +                to base).
67180 +
67181 + @Param[in]     h_FmMuram - FM-MURAM module descriptor.
67182 + @Param[in]     base      - the desired base-address to be allocated.
67183 + @Param[in]     size      - size of the memory to be allocated.
67184 +
67185 + @Return        address of the allocated memory; NULL otherwise.
67186 +*//***************************************************************************/
67187 +void  * FM_MURAM_AllocMemForce(t_Handle h_FmMuram, uint64_t base, uint32_t size);
67188 +
67189 +/**************************************************************************//**
67190 + @Function      FM_MURAM_FreeMem
67191 +
67192 + @Description   Free an allocated memory from FM-MURAM partition.
67193 +
67194 + @Param[in]     h_FmMuram - FM-MURAM module descriptor.
67195 + @Param[in]     ptr       - A pointer to an allocated memory.
67196 +
67197 + @Return        E_OK on success; Error code otherwise.
67198 +*//***************************************************************************/
67199 +t_Error FM_MURAM_FreeMem(t_Handle h_FmMuram, void *ptr);
67200 +
67201 +/**************************************************************************//**
67202 + @Function      FM_MURAM_GetFreeMemSize
67203 +
67204 + @Description   Returns the size (in bytes) of free MURAM memory.
67205 +
67206 + @Param[in]     h_FmMuram - FM-MURAM module descriptor.
67207 +
67208 + @Return        Free MURAM memory size in bytes.
67209 +*//***************************************************************************/
67210 +uint64_t FM_MURAM_GetFreeMemSize(t_Handle h_FmMuram);
67211 +
67212 +/** @} */ /* end of FM_muram_ctrl_grp group */
67213 +/** @} */ /* end of FM_muram_grp group */
67214 +/** @} */ /* end of FM_grp group */
67215 +
67216 +
67217 +
67218 +#endif /* __FM_MURAM_EXT */
67219 --- /dev/null
67220 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_pcd_ext.h
67221 @@ -0,0 +1,3974 @@
67222 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
67223 + * All rights reserved.
67224 + *
67225 + * Redistribution and use in source and binary forms, with or without
67226 + * modification, are permitted provided that the following conditions are met:
67227 + *     * Redistributions of source code must retain the above copyright
67228 + *       notice, this list of conditions and the following disclaimer.
67229 + *     * Redistributions in binary form must reproduce the above copyright
67230 + *       notice, this list of conditions and the following disclaimer in the
67231 + *       documentation and/or other materials provided with the distribution.
67232 + *     * Neither the name of Freescale Semiconductor nor the
67233 + *       names of its contributors may be used to endorse or promote products
67234 + *       derived from this software without specific prior written permission.
67235 + *
67236 + *
67237 + * ALTERNATIVELY, this software may be distributed under the terms of the
67238 + * GNU General Public License ("GPL") as published by the Free Software
67239 + * Foundation, either version 2 of that License or (at your option) any
67240 + * later version.
67241 + *
67242 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
67243 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
67244 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
67245 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
67246 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
67247 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
67248 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
67249 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67250 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
67251 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67252 + */
67253 +
67254 +
67255 +/**************************************************************************//**
67256 + @File          fm_pcd_ext.h
67257 +
67258 + @Description   FM PCD API definitions
67259 +*//***************************************************************************/
67260 +#ifndef __FM_PCD_EXT
67261 +#define __FM_PCD_EXT
67262 +
67263 +#include "std_ext.h"
67264 +#include "net_ext.h"
67265 +#include "list_ext.h"
67266 +#include "fm_ext.h"
67267 +#include "fsl_fman_kg.h"
67268 +
67269 +
67270 +/**************************************************************************//**
67271 + @Group         FM_grp Frame Manager API
67272 +
67273 + @Description   Frame Manager Application Programming Interface
67274 +
67275 + @{
67276 +*//***************************************************************************/
67277 +
67278 +/**************************************************************************//**
67279 + @Group         FM_PCD_grp FM PCD
67280 +
67281 + @Description   Frame Manager PCD (Parse-Classify-Distribute) API.
67282 +
67283 +                The FM PCD module is responsible for the initialization of all
67284 +                global classifying FM modules. This includes the parser general and
67285 +                common registers, the key generator global and common registers,
67286 +                and the policer global and common registers.
67287 +                In addition, the FM PCD SW module will initialize all required
67288 +                key generator schemes, coarse classification flows, and policer
67289 +                profiles. When FM module is configured to work with one of these
67290 +                entities, it will register to it using the FM PORT API. The PCD
67291 +                module will manage the PCD resources - i.e. resource management of
67292 +                KeyGen schemes, etc.
67293 +
67294 + @{
67295 +*//***************************************************************************/
67296 +
67297 +/**************************************************************************//**
67298 + @Collection    General PCD defines
67299 +*//***************************************************************************/
67300 +#define FM_PCD_MAX_NUM_OF_PRIVATE_HDRS              2                   /**< Number of units/headers saved for user */
67301 +
67302 +#define FM_PCD_PRS_NUM_OF_HDRS                      16                  /**< Number of headers supported by HW parser */
67303 +#define FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS         (32 - FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
67304 +                                                                        /**< Number of distinction units is limited by
67305 +                                                                             register size (32 bits) minus reserved bits
67306 +                                                                             for private headers. */
67307 +#define FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS      4                   /**< Maximum number of interchangeable headers
67308 +                                                                             in a distinction unit */
67309 +#define FM_PCD_KG_NUM_OF_GENERIC_REGS               FM_KG_NUM_OF_GENERIC_REGS /**< Total number of generic KeyGen registers */
67310 +#define FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY       35                  /**< Max number allowed on any configuration;
67311 +                                                                             For HW implementation reasons, in most
67312 +                                                                             cases less than this will be allowed; The
67313 +                                                                             driver will return an initialization error
67314 +                                                                             if resource is unavailable. */
67315 +#define FM_PCD_KG_NUM_OF_EXTRACT_MASKS              4                   /**< Total number of masks allowed on KeyGen extractions. */
67316 +#define FM_PCD_KG_NUM_OF_DEFAULT_GROUPS             16                  /**< Number of default value logical groups */
67317 +
67318 +#define FM_PCD_PRS_NUM_OF_LABELS                    32                  /**< Maximum number of SW parser labels */
67319 +#define FM_SW_PRS_MAX_IMAGE_SIZE                    (FM_PCD_SW_PRS_SIZE /*- FM_PCD_PRS_SW_OFFSET -FM_PCD_PRS_SW_TAIL_SIZE*/-FM_PCD_PRS_SW_PATCHES_SIZE)
67320 +                                                                        /**< Maximum size of SW parser code */
67321 +
67322 +#define FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE        128                 /**< Maximum size of insertion template for
67323 +                                                                             insert manipulation */
67324 +
67325 +#if (DPAA_VERSION >= 11)
67326 +#define FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES        64                  /**< Maximum possible entries for frame replicator group */
67327 +#endif /* (DPAA_VERSION >= 11) */
67328 +/* @} */
67329 +
67330 +
67331 +/**************************************************************************//**
67332 + @Group         FM_PCD_init_grp FM PCD Initialization Unit
67333 +
67334 + @Description   Frame Manager PCD Initialization Unit API
67335 +
67336 + @{
67337 +*//***************************************************************************/
67338 +
67339 +/**************************************************************************//**
67340 + @Description   PCD counters
67341 +*//***************************************************************************/
67342 +typedef enum e_FmPcdCounters {
67343 +    e_FM_PCD_KG_COUNTERS_TOTAL,                                 /**< KeyGen counter */
67344 +    e_FM_PCD_PLCR_COUNTERS_RED,                                 /**< Policer counter - counts the total number of RED packets that exit the Policer. */
67345 +    e_FM_PCD_PLCR_COUNTERS_YELLOW,                              /**< Policer counter - counts the total number of YELLOW packets that exit the Policer. */
67346 +    e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED,                    /**< Policer counter - counts the number of packets that changed color to RED by the Policer;
67347 +                                                                     This is a subset of e_FM_PCD_PLCR_COUNTERS_RED packet count, indicating active color changes. */
67348 +    e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW,                 /**< Policer counter - counts the number of packets that changed color to YELLOW by the Policer;
67349 +                                                                     This is a subset of e_FM_PCD_PLCR_COUNTERS_YELLOW packet count, indicating active color changes. */
67350 +    e_FM_PCD_PLCR_COUNTERS_TOTAL,                               /**< Policer counter - counts the total number of packets passed in the Policer. */
67351 +    e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH,                     /**< Policer counter - counts the number of packets with length mismatch. */
67352 +    e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH,                       /**< Parser counter - counts the number of times the parser block is dispatched. */
67353 +    e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED,             /**< Parser counter - counts the number of times L2 parse result is returned (including errors). */
67354 +    e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED,             /**< Parser counter - counts the number of times L3 parse result is returned (including errors). */
67355 +    e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED,             /**< Parser counter - counts the number of times L4 parse result is returned (including errors). */
67356 +    e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED,           /**< Parser counter - counts the number of times SHIM parse result is returned (including errors). */
67357 +    e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR,    /**< Parser counter - counts the number of times L2 parse result is returned with errors. */
67358 +    e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR,    /**< Parser counter - counts the number of times L3 parse result is returned with errors. */
67359 +    e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR,    /**< Parser counter - counts the number of times L4 parse result is returned with errors. */
67360 +    e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR,  /**< Parser counter - counts the number of times SHIM parse result is returned with errors. */
67361 +    e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES,                      /**< Parser counter - counts the number of cycles spent executing soft parser instruction (including stall cycles). */
67362 +    e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES,                /**< Parser counter - counts the number of cycles stalled waiting for parser internal memory reads while executing soft parser instruction. */
67363 +    e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES,     /**< Parser counter - counts the number of cycles spent executing hard parser (including stall cycles). */
67364 +    e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES,                    /**< MURAM counter - counts the number of cycles while performing FMan Memory read. */
67365 +    e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES,              /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory read. */
67366 +    e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES,                   /**< MURAM counter - counts the number of cycles while performing FMan Memory write. */
67367 +    e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES,             /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory write. */
67368 +    e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES              /**< FPM counter - counts the number of cycles stalled while performing a FPM Command. */
67369 +} e_FmPcdCounters;
67370 +
67371 +/**************************************************************************//**
67372 + @Description   PCD interrupts
67373 +*//***************************************************************************/
67374 +typedef enum e_FmPcdExceptions {
67375 +    e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC,                   /**< KeyGen double-bit ECC error is detected on internal memory read access. */
67376 +    e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW,             /**< KeyGen scheme configuration error indicating a key size larger than 56 bytes. */
67377 +    e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC,                 /**< Policer double-bit ECC error has been detected on PRAM read access. */
67378 +    e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR,           /**< Policer access to a non-initialized profile has been detected. */
67379 +    e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE,    /**< Policer RAM self-initialization complete */
67380 +    e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE,     /**< Policer atomic action complete */
67381 +    e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC,                  /**< Parser double-bit ECC error */
67382 +    e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC                   /**< Parser single-bit ECC error */
67383 +} e_FmPcdExceptions;
67384 +
67385 +
67386 +/**************************************************************************//**
67387 + @Description   Exceptions user callback routine, will be called upon an
67388 +                exception passing the exception identification.
67389 +
67390 + @Param[in]     h_App      - User's application descriptor.
67391 + @Param[in]     exception  - The exception.
67392 +  *//***************************************************************************/
67393 +typedef void (t_FmPcdExceptionCallback) (t_Handle h_App, e_FmPcdExceptions exception);
67394 +
67395 +/**************************************************************************//**
67396 + @Description   Exceptions user callback routine, will be called upon an exception
67397 +                passing the exception identification.
67398 +
67399 + @Param[in]     h_App           - User's application descriptor.
67400 + @Param[in]     exception       - The exception.
67401 + @Param[in]     index           - id of the relevant source (may be scheme or profile id).
67402 + *//***************************************************************************/
67403 +typedef void (t_FmPcdIdExceptionCallback) ( t_Handle           h_App,
67404 +                                            e_FmPcdExceptions  exception,
67405 +                                            uint16_t           index);
67406 +
67407 +/**************************************************************************//**
67408 + @Description   A callback for enqueuing frame onto a QM queue.
67409 +
67410 + @Param[in]     h_QmArg         - Application's handle passed to QM module on enqueue.
67411 + @Param[in]     p_Fd            - Frame descriptor for the frame.
67412 +
67413 + @Return        E_OK on success; Error code otherwise.
67414 + *//***************************************************************************/
67415 +typedef t_Error (t_FmPcdQmEnqueueCallback) (t_Handle h_QmArg, void *p_Fd);
67416 +
67417 +/**************************************************************************//**
67418 + @Description   Host-Command parameters structure.
67419 +
67420 +                When using Host command for PCD functionalities, a dedicated port
67421 +                must be used. If this routine is called for a PCD in a single partition
67422 +                environment, or it is the Master partition in a Multi-partition
67423 +                environment, The port will be initialized by the PCD driver
67424 +                initialization routine.
67425 + *//***************************************************************************/
67426 +typedef struct t_FmPcdHcParams {
67427 +    uintptr_t                   portBaseAddr;       /**< Virtual Address of Host-Command Port memory mapped registers.*/
67428 +    uint8_t                     portId;             /**< Port Id (0-6 relative to Host-Command/Offline-Parsing ports);
67429 +                                                         NOTE: When configuring Host Command port for
67430 +                                                         FMANv3 devices (DPAA_VERSION 11 and higher),
67431 +                                                         portId=0 MUST be used. */
67432 +    uint16_t                    liodnBase;          /**< LIODN base for this port, to be used together with LIODN offset
67433 +                                                         (irrelevant for P4080 revision 1.0) */
67434 +    uint32_t                    errFqid;            /**< Host-Command Port error queue Id. */
67435 +    uint32_t                    confFqid;           /**< Host-Command Port confirmation queue Id. */
67436 +    uint32_t                    qmChannel;          /**< QM channel dedicated to this Host-Command port;
67437 +                                                         will be used by the FM for dequeue. */
67438 +    t_FmPcdQmEnqueueCallback    *f_QmEnqueue;       /**< Callback routine for enqueuing a frame to the QM */
67439 +    t_Handle                    h_QmArg;            /**< Application's handle passed to QM module on enqueue */
67440 +} t_FmPcdHcParams;
67441 +
67442 +/**************************************************************************//**
67443 + @Description   The main structure for PCD initialization
67444 + *//***************************************************************************/
67445 +typedef struct t_FmPcdParams {
67446 +    bool                        prsSupport;             /**< TRUE if Parser will be used for any of the FM ports. */
67447 +    bool                        ccSupport;              /**< TRUE if Coarse Classification will be used for any
67448 +                                                             of the FM ports. */
67449 +    bool                        kgSupport;              /**< TRUE if KeyGen will be used for any of the FM ports. */
67450 +    bool                        plcrSupport;            /**< TRUE if Policer will be used for any of the FM ports. */
67451 +    t_Handle                    h_Fm;                   /**< A handle to the FM module. */
67452 +    uint8_t                     numOfSchemes;           /**< Number of schemes dedicated to this partition.
67453 +                                                             this parameter is relevant if 'kgSupport'=TRUE. */
67454 +    bool                        useHostCommand;         /**< Optional for single partition, Mandatory for Multi partition */
67455 +    t_FmPcdHcParams             hc;                     /**< Host Command parameters, relevant only if 'useHostCommand'=TRUE;
67456 +                                                             Relevant when FM not runs in "guest-mode". */
67457 +
67458 +    t_FmPcdExceptionCallback    *f_Exception;           /**< Callback routine for general PCD exceptions;
67459 +                                                             Relevant when FM not runs in "guest-mode". */
67460 +    t_FmPcdIdExceptionCallback  *f_ExceptionId;         /**< Callback routine for specific KeyGen scheme or
67461 +                                                             Policer profile exceptions;
67462 +                                                             Relevant when FM not runs in "guest-mode". */
67463 +    t_Handle                    h_App;                  /**< A handle to an application layer object; This handle will
67464 +                                                             be passed by the driver upon calling the above callbacks;
67465 +                                                             Relevant when FM not runs in "guest-mode". */
67466 +    uint8_t                     partPlcrProfilesBase;   /**< The first policer-profile-id dedicated to this partition.
67467 +                                                             this parameter is relevant if 'plcrSupport'=TRUE.
67468 +                                                             NOTE: this parameter relevant only when working with multiple partitions. */
67469 +    uint16_t                    partNumOfPlcrProfiles;  /**< Number of policer-profiles dedicated to this partition.
67470 +                                                             this parameter is relevant if 'plcrSupport'=TRUE.
67471 +                                                             NOTE: this parameter relevant only when working with multiple partitions. */
67472 +} t_FmPcdParams;
67473 +
67474 +
67475 +/**************************************************************************//**
67476 + @Function      FM_PCD_Config
67477 +
67478 + @Description   Basic configuration of the PCD module.
67479 +                Creates descriptor for the FM PCD module.
67480 +
67481 + @Param[in]     p_FmPcdParams    A structure of parameters for the initialization of PCD.
67482 +
67483 + @Return        A handle to the initialized module.
67484 +*//***************************************************************************/
67485 +t_Handle FM_PCD_Config(t_FmPcdParams *p_FmPcdParams);
67486 +
67487 +/**************************************************************************//**
67488 + @Function      FM_PCD_Init
67489 +
67490 + @Description   Initialization of the PCD module.
67491 +
67492 + @Param[in]     h_FmPcd - FM PCD module descriptor.
67493 +
67494 + @Return        E_OK on success; Error code otherwise.
67495 +*//***************************************************************************/
67496 +t_Error FM_PCD_Init(t_Handle h_FmPcd);
67497 +
67498 +/**************************************************************************//**
67499 + @Function      FM_PCD_Free
67500 +
67501 + @Description   Frees all resources that were assigned to FM module.
67502 +
67503 +                Calling this routine invalidates the descriptor.
67504 +
67505 + @Param[in]     h_FmPcd - FM PCD module descriptor.
67506 +
67507 + @Return        E_OK on success; Error code otherwise.
67508 +*//***************************************************************************/
67509 +t_Error FM_PCD_Free(t_Handle h_FmPcd);
67510 +
67511 +/**************************************************************************//**
67512 + @Group         FM_PCD_advanced_cfg_grp    FM PCD Advanced Configuration Unit
67513 +
67514 + @Description   Frame Manager PCD Advanced Configuration API.
67515 +
67516 + @{
67517 +*//***************************************************************************/
67518 +
67519 +/**************************************************************************//**
67520 + @Function      FM_PCD_ConfigException
67521 +
67522 + @Description   Calling this routine changes the internal driver data base
67523 +                from its default selection of exceptions enabling.
67524 +                [DEFAULT_numOfSharedPlcrProfiles].
67525 +
67526 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67527 + @Param[in]     exception       The exception to be selected.
67528 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
67529 +
67530 + @Return        E_OK on success; Error code otherwise.
67531 +
67532 + @Cautions      This routine should NOT be called from guest-partition
67533 +                (i.e. guestId != NCSW_MASTER_ID)
67534 +*//***************************************************************************/
67535 +t_Error FM_PCD_ConfigException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable);
67536 +
67537 +/**************************************************************************//**
67538 + @Function      FM_PCD_ConfigHcFramesDataMemory
67539 +
67540 + @Description   Configures memory-partition-id for FMan-Controller Host-Command
67541 +                frames. Calling this routine changes the internal driver data
67542 +                base from its default configuration [0].
67543 +
67544 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67545 + @Param[in]     memId           Memory partition ID.
67546 +
67547 + @Return        E_OK on success; Error code otherwise.
67548 +
67549 + @Cautions      This routine may be called only if 'useHostCommand' was TRUE
67550 +                when FM_PCD_Config() routine was called.
67551 +*//***************************************************************************/
67552 +t_Error FM_PCD_ConfigHcFramesDataMemory(t_Handle h_FmPcd, uint8_t memId);
67553 +
67554 +/**************************************************************************//**
67555 + @Function      FM_PCD_ConfigPlcrNumOfSharedProfiles
67556 +
67557 + @Description   Calling this routine changes the internal driver data base
67558 +                from its default selection of exceptions enablement.
67559 +                [DEFAULT_numOfSharedPlcrProfiles].
67560 +
67561 + @Param[in]     h_FmPcd                     FM PCD module descriptor.
67562 + @Param[in]     numOfSharedPlcrProfiles     Number of profiles to
67563 +                                            be shared between ports on this partition
67564 +
67565 + @Return        E_OK on success; Error code otherwise.
67566 +*//***************************************************************************/
67567 +t_Error FM_PCD_ConfigPlcrNumOfSharedProfiles(t_Handle h_FmPcd, uint16_t numOfSharedPlcrProfiles);
67568 +
67569 +/**************************************************************************//**
67570 + @Function      FM_PCD_ConfigPlcrAutoRefreshMode
67571 +
67572 + @Description   Calling this routine changes the internal driver data base
67573 +                from its default selection of exceptions enablement.
67574 +                By default auto-refresh is [DEFAULT_plcrAutoRefresh].
67575 +
67576 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67577 + @Param[in]     enable          TRUE to enable, FALSE to disable
67578 +
67579 + @Return        E_OK on success; Error code otherwise.
67580 +
67581 + @Cautions      This routine should NOT be called from guest-partition
67582 +                (i.e. guestId != NCSW_MASTER_ID)
67583 +*//***************************************************************************/
67584 +t_Error FM_PCD_ConfigPlcrAutoRefreshMode(t_Handle h_FmPcd, bool enable);
67585 +
67586 +/**************************************************************************//**
67587 + @Function      FM_PCD_ConfigPrsMaxCycleLimit
67588 +
67589 + @Description   Calling this routine changes the internal data structure for
67590 +                the maximum parsing time from its default value
67591 +                [DEFAULT_MAX_PRS_CYC_LIM].
67592 +
67593 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67594 + @Param[in]     value           0 to disable the mechanism, or new
67595 +                                maximum parsing time.
67596 +
67597 + @Return        E_OK on success; Error code otherwise.
67598 +
67599 + @Cautions      This routine should NOT be called from guest-partition
67600 +                (i.e. guestId != NCSW_MASTER_ID)
67601 +*//***************************************************************************/
67602 +t_Error FM_PCD_ConfigPrsMaxCycleLimit(t_Handle h_FmPcd,uint16_t value);
67603 +
67604 +/** @} */ /* end of FM_PCD_advanced_cfg_grp group */
67605 +/** @} */ /* end of FM_PCD_init_grp group */
67606 +
67607 +
67608 +/**************************************************************************//**
67609 + @Group         FM_PCD_Runtime_grp FM PCD Runtime Unit
67610 +
67611 + @Description   Frame Manager PCD Runtime Unit API
67612 +
67613 +                The runtime control allows creation of PCD infrastructure modules
67614 +                such as Network Environment Characteristics, Classification Plan
67615 +                Groups and Coarse Classification Trees.
67616 +                It also allows on-the-fly initialization, modification and removal
67617 +                of PCD modules such as KeyGen schemes, coarse classification nodes
67618 +                and Policer profiles.
67619 +
67620 +                In order to explain the programming model of the PCD driver interface
67621 +                a few terms should be explained, and will be used below.
67622 +                  - Distinction Header - One of the 16 protocols supported by the FM parser,
67623 +                    or one of the SHIM headers (1 or 2). May be a header with a special
67624 +                    option (see below).
67625 +                  - Interchangeable Headers Group - This is a group of Headers recognized
67626 +                    by either one of them. For example, if in a specific context the user
67627 +                    chooses to treat IPv4 and IPV6 in the same way, they may create an
67628 +                    interchangeable Headers Unit consisting of these 2 headers.
67629 +                  - A Distinction Unit - a Distinction Header or an Interchangeable Headers
67630 +                    Group.
67631 +                  - Header with special option - applies to Ethernet, MPLS, VLAN, IPv4 and
67632 +                    IPv6, includes multicast, broadcast and other protocol specific options.
67633 +                    In terms of hardware it relates to the options available in the classification
67634 +                    plan.
67635 +                  - Network Environment Characteristics - a set of Distinction Units that define
67636 +                    the total recognizable header selection for a certain environment. This is
67637 +                    NOT the list of all headers that will ever appear in a flow, but rather
67638 +                    everything that needs distinction in a flow, where distinction is made by KeyGen
67639 +                    schemes and coarse classification action descriptors.
67640 +
67641 +                The PCD runtime modules initialization is done in stages. The first stage after
67642 +                initializing the PCD module itself is to establish a Network Flows Environment
67643 +                Definition. The application may choose to establish one or more such environments.
67644 +                Later, when needed, the application will have to state, for some of its modules,
67645 +                to which single environment it belongs.
67646 +
67647 + @{
67648 +*//***************************************************************************/
67649 +
67650 +/**************************************************************************//**
67651 + @Description   A structure for SW parser labels
67652 + *//***************************************************************************/
67653 +typedef struct t_FmPcdPrsLabelParams {
67654 +    uint32_t                instructionOffset;              /**< SW parser label instruction offset (2 bytes
67655 +                                                                 resolution), relative to Parser RAM. */
67656 +    e_NetHeaderType         hdr;                            /**< The existence of this header will invoke
67657 +                                                                 the SW parser code; Use  HEADER_TYPE_NONE
67658 +                                                                 to indicate that sw parser is to run
67659 +                                                                 independent of the existence of any protocol
67660 +                                                                 (run before HW parser). */
67661 +    uint8_t                 indexPerHdr;                    /**< Normally 0, if more than one SW parser
67662 +                                                                 attachments for the same header, use this
67663 +                                                                 index to distinguish between them. */
67664 +} t_FmPcdPrsLabelParams;
67665 +
67666 +/**************************************************************************//**
67667 + @Description   A structure for SW parser
67668 + *//***************************************************************************/
67669 +typedef struct t_FmPcdPrsSwParams {
67670 +    bool                    override;                   /**< FALSE to invoke a check that nothing else
67671 +                                                             was loaded to this address, including
67672 +                                                             internal patches.
67673 +                                                             TRUE to override any existing code.*/
67674 +    uint32_t                size;                       /**< SW parser code size */
67675 +    uint16_t                base;                       /**< SW parser base (in instruction counts!
67676 +                                                             must be larger than 0x20)*/
67677 +    uint8_t                 *p_Code;                    /**< SW parser code */
67678 +    uint32_t                swPrsDataParams[FM_PCD_PRS_NUM_OF_HDRS];
67679 +                                                        /**< SW parser data (parameters) */
67680 +    uint8_t                 numOfLabels;                /**< Number of labels for SW parser. */
67681 +    t_FmPcdPrsLabelParams   labelsTable[FM_PCD_PRS_NUM_OF_LABELS];
67682 +                                                        /**< SW parser labels table, containing
67683 +                                                             numOfLabels entries */
67684 +} t_FmPcdPrsSwParams;
67685 +
67686 +
67687 +/**************************************************************************//**
67688 + @Function      FM_PCD_Enable
67689 +
67690 + @Description   This routine should be called after PCD is initialized for enabling all
67691 +                PCD engines according to their existing configuration.
67692 +
67693 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67694 +
67695 + @Return        E_OK on success; Error code otherwise.
67696 +
67697 + @Cautions      Allowed only following FM_PCD_Init() and when PCD is disabled.
67698 +*//***************************************************************************/
67699 +t_Error FM_PCD_Enable(t_Handle h_FmPcd);
67700 +
67701 +/**************************************************************************//**
67702 + @Function      FM_PCD_Disable
67703 +
67704 + @Description   This routine may be called when PCD is enabled in order to
67705 +                disable all PCD engines. It may be called
67706 +                only when none of the ports in the system are using the PCD.
67707 +
67708 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67709 +
67710 + @Return        E_OK on success; Error code otherwise.
67711 +
67712 + @Cautions      Allowed only following FM_PCD_Init() and when PCD is enabled.
67713 +*//***************************************************************************/
67714 +t_Error FM_PCD_Disable(t_Handle h_FmPcd);
67715 +
67716 +/**************************************************************************//**
67717 + @Function      FM_PCD_GetCounter
67718 +
67719 + @Description   Reads one of the FM PCD counters.
67720 +
67721 + @Param[in]     h_FmPcd     FM PCD module descriptor.
67722 + @Param[in]     counter     The requested counter.
67723 +
67724 + @Return        Counter's current value.
67725 +
67726 + @Cautions      Allowed only following FM_PCD_Init().
67727 +                Note that it is user's responsibility to call this routine only
67728 +                for enabled counters, and there will be no indication if a
67729 +                disabled counter is accessed.
67730 +*//***************************************************************************/
67731 +uint32_t FM_PCD_GetCounter(t_Handle h_FmPcd, e_FmPcdCounters counter);
67732 +
67733 +/**************************************************************************//**
67734 +@Function       FM_PCD_PrsLoadSw
67735 +
67736 +@Description    This routine may be called in order to load software parsing code.
67737 +
67738 +
67739 +@Param[in]      h_FmPcd        FM PCD module descriptor.
67740 +@Param[in]      p_SwPrs        A pointer to a structure of software
67741 +                               parser parameters, including the software
67742 +                               parser image.
67743 +
67744 +@Return         E_OK on success; Error code otherwise.
67745 +
67746 +@Cautions       Allowed only following FM_PCD_Init() and when PCD is disabled.
67747 +                This routine should NOT be called from guest-partition
67748 +                (i.e. guestId != NCSW_MASTER_ID)
67749 +*//***************************************************************************/
67750 +t_Error FM_PCD_PrsLoadSw(t_Handle h_FmPcd, t_FmPcdPrsSwParams *p_SwPrs);
67751 +
67752 +/**************************************************************************//**
67753 +@Function      FM_PCD_SetAdvancedOffloadSupport
67754 +
67755 +@Description   This routine must be called in order to support the following features:
67756 +               IP-fragmentation, IP-reassembly, IPsec, Header-manipulation, frame-replicator.
67757 +
67758 +@Param[in]     h_FmPcd         FM PCD module descriptor.
67759 +
67760 +@Return        E_OK on success; Error code otherwise.
67761 +
67762 +@Cautions      Allowed only following FM_PCD_Init() and when PCD is disabled.
67763 +               This routine should NOT be called from guest-partition
67764 +               (i.e. guestId != NCSW_MASTER_ID)
67765 +*//***************************************************************************/
67766 +t_Error FM_PCD_SetAdvancedOffloadSupport(t_Handle h_FmPcd);
67767 +
67768 +/**************************************************************************//**
67769 + @Function      FM_PCD_KgSetDfltValue
67770 +
67771 + @Description   Calling this routine sets a global default value to be used
67772 +                by the KeyGen when parser does not recognize a required
67773 +                field/header.
67774 +                By default default values are 0.
67775 +
67776 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67777 + @Param[in]     valueId         0,1 - one of 2 global default values.
67778 + @Param[in]     value           The requested default value.
67779 +
67780 + @Return        E_OK on success; Error code otherwise.
67781 +
67782 + @Cautions      Allowed only following FM_PCD_Init() and when PCD is disabled.
67783 +                This routine should NOT be called from guest-partition
67784 +                (i.e. guestId != NCSW_MASTER_ID)
67785 +*//***************************************************************************/
67786 +t_Error FM_PCD_KgSetDfltValue(t_Handle h_FmPcd, uint8_t valueId, uint32_t value);
67787 +
67788 +/**************************************************************************//**
67789 + @Function      FM_PCD_KgSetAdditionalDataAfterParsing
67790 +
67791 + @Description   Calling this routine allows the KeyGen to access data past
67792 +                the parser finishing point.
67793 +
67794 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67795 + @Param[in]     payloadOffset   the number of bytes beyond the parser location.
67796 +
67797 + @Return        E_OK on success; Error code otherwise.
67798 +
67799 + @Cautions      Allowed only following FM_PCD_Init() and when PCD is disabled.
67800 +                This routine should NOT be called from guest-partition
67801 +                (i.e. guestId != NCSW_MASTER_ID)
67802 +*//***************************************************************************/
67803 +t_Error FM_PCD_KgSetAdditionalDataAfterParsing(t_Handle h_FmPcd, uint8_t payloadOffset);
67804 +
67805 +/**************************************************************************//**
67806 + @Function      FM_PCD_SetException
67807 +
67808 + @Description   Calling this routine enables/disables PCD interrupts.
67809 +
67810 + @Param[in]     h_FmPcd         FM PCD module descriptor.
67811 + @Param[in]     exception       The exception to be selected.
67812 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
67813 +
67814 + @Return        E_OK on success; Error code otherwise.
67815 +
67816 + @Cautions      Allowed only following FM_PCD_Init().
67817 +                This routine should NOT be called from guest-partition
67818 +                (i.e. guestId != NCSW_MASTER_ID)
67819 +*//***************************************************************************/
67820 +t_Error FM_PCD_SetException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable);
67821 +
67822 +/**************************************************************************//**
67823 + @Function      FM_PCD_ModifyCounter
67824 +
67825 + @Description   Sets a value to an enabled counter. Use "0" to reset the counter.
67826 +
67827 + @Param[in]     h_FmPcd     FM PCD module descriptor.
67828 + @Param[in]     counter     The requested counter.
67829 + @Param[in]     value       The requested value to be written into the counter.
67830 +
67831 + @Return        E_OK on success; Error code otherwise.
67832 +
67833 + @Cautions      Allowed only following FM_PCD_Init().
67834 +                This routine should NOT be called from guest-partition
67835 +                (i.e. guestId != NCSW_MASTER_ID)
67836 +*//***************************************************************************/
67837 +t_Error FM_PCD_ModifyCounter(t_Handle h_FmPcd, e_FmPcdCounters counter, uint32_t value);
67838 +
67839 +/**************************************************************************//**
67840 + @Function      FM_PCD_SetPlcrStatistics
67841 +
67842 + @Description   This routine may be used to enable/disable policer statistics
67843 +                counter. By default the statistics is enabled.
67844 +
67845 + @Param[in]     h_FmPcd         FM PCD module descriptor
67846 + @Param[in]     enable          TRUE to enable, FALSE to disable.
67847 +
67848 + @Return        E_OK on success; Error code otherwise.
67849 +
67850 + @Cautions      Allowed only following FM_PCD_Init().
67851 +                This routine should NOT be called from guest-partition
67852 +                (i.e. guestId != NCSW_MASTER_ID)
67853 +*//***************************************************************************/
67854 +t_Error FM_PCD_SetPlcrStatistics(t_Handle h_FmPcd, bool enable);
67855 +
67856 +/**************************************************************************//**
67857 + @Function      FM_PCD_SetPrsStatistics
67858 +
67859 + @Description   Defines whether to gather parser statistics including all ports.
67860 +
67861 + @Param[in]     h_FmPcd     FM PCD module descriptor.
67862 + @Param[in]     enable      TRUE to enable, FALSE to disable.
67863 +
67864 + @Return        None
67865 +
67866 + @Cautions      Allowed only following FM_PCD_Init().
67867 +                This routine should NOT be called from guest-partition
67868 +                (i.e. guestId != NCSW_MASTER_ID)
67869 +*//***************************************************************************/
67870 +void FM_PCD_SetPrsStatistics(t_Handle h_FmPcd, bool enable);
67871 +
67872 +/**************************************************************************//**
67873 + @Function      FM_PCD_HcTxConf
67874 +
67875 + @Description   This routine should be called to confirm frames that were
67876 +                 received on the HC confirmation queue.
67877 +
67878 + @Param[in]     h_FmPcd         A handle to an FM PCD Module.
67879 + @Param[in]     p_Fd            Frame descriptor of the received frame.
67880 +
67881 + @Cautions      Allowed only following FM_PCD_Init(). Allowed only if 'useHostCommand'
67882 +                option was selected in the initialization.
67883 +*//***************************************************************************/
67884 +void FM_PCD_HcTxConf(t_Handle h_FmPcd, t_DpaaFD *p_Fd);
67885 +
67886 +/**************************************************************************//*
67887 + @Function      FM_PCD_ForceIntr
67888 +
67889 + @Description   Causes an interrupt event on the requested source.
67890 +
67891 + @Param[in]     h_FmPcd     FM PCD module descriptor.
67892 + @Param[in]     exception       An exception to be forced.
67893 +
67894 + @Return        E_OK on success; Error code if the exception is not enabled,
67895 +                or is not able to create interrupt.
67896 +
67897 + @Cautions      Allowed only following FM_PCD_Init().
67898 +                This routine should NOT be called from guest-partition
67899 +                (i.e. guestId != NCSW_MASTER_ID)
67900 +*//***************************************************************************/
67901 +t_Error FM_PCD_ForceIntr (t_Handle h_FmPcd, e_FmPcdExceptions exception);
67902 +
67903 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
67904 +/**************************************************************************//**
67905 + @Function      FM_PCD_DumpRegs
67906 +
67907 + @Description   Dumps all PCD registers
67908 +
67909 + @Param[in]     h_FmPcd         A handle to an FM PCD Module.
67910 +
67911 + @Return        E_OK on success; Error code otherwise.
67912 +
67913 + @Cautions      Allowed only following FM_PCD_Init().
67914 +                NOTE: this routine may be called only for FM in master mode
67915 +                (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
67916 +                are mapped.
67917 +*//***************************************************************************/
67918 +t_Error FM_PCD_DumpRegs(t_Handle h_FmPcd);
67919 +
67920 +/**************************************************************************//**
67921 + @Function      FM_PCD_KgDumpRegs
67922 +
67923 + @Description   Dumps all PCD KG registers
67924 +
67925 + @Param[in]     h_FmPcd         A handle to an FM PCD Module.
67926 +
67927 + @Return        E_OK on success; Error code otherwise.
67928 +
67929 + @Cautions      Allowed only following FM_PCD_Init().
67930 +                NOTE: this routine may be called only for FM in master mode
67931 +                (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
67932 +                are mapped.
67933 +*//***************************************************************************/
67934 +t_Error FM_PCD_KgDumpRegs(t_Handle h_FmPcd);
67935 +
67936 +/**************************************************************************//**
67937 + @Function      FM_PCD_PlcrDumpRegs
67938 +
67939 + @Description   Dumps all PCD Policer registers
67940 +
67941 + @Param[in]     h_FmPcd         A handle to an FM PCD Module.
67942 +
67943 + @Return        E_OK on success; Error code otherwise.
67944 +
67945 + @Cautions      Allowed only following FM_PCD_Init().
67946 +                NOTE: this routine may be called only for FM in master mode
67947 +                (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
67948 +                are mapped.
67949 +*//***************************************************************************/
67950 +t_Error FM_PCD_PlcrDumpRegs(t_Handle h_FmPcd);
67951 +
67952 +/**************************************************************************//**
67953 + @Function      FM_PCD_PlcrProfileDumpRegs
67954 +
67955 + @Description   Dumps all PCD Policer profile registers
67956 +
67957 + @Param[in]     h_Profile       A handle to a Policer profile.
67958 +
67959 + @Return        E_OK on success; Error code otherwise.
67960 +
67961 + @Cautions      Allowed only following FM_PCD_Init().
67962 +                NOTE: this routine may be called only for FM in master mode
67963 +                (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
67964 +                are mapped.
67965 +*//***************************************************************************/
67966 +t_Error FM_PCD_PlcrProfileDumpRegs(t_Handle h_Profile);
67967 +
67968 +/**************************************************************************//**
67969 + @Function      FM_PCD_PrsDumpRegs
67970 +
67971 + @Description   Dumps all PCD Parser registers
67972 +
67973 + @Param[in]     h_FmPcd         A handle to an FM PCD Module.
67974 +
67975 + @Return        E_OK on success; Error code otherwise.
67976 +
67977 + @Cautions      Allowed only following FM_PCD_Init().
67978 +                NOTE: this routine may be called only for FM in master mode
67979 +                (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
67980 +                are mapped.
67981 +*//***************************************************************************/
67982 +t_Error FM_PCD_PrsDumpRegs(t_Handle h_FmPcd);
67983 +
67984 +/**************************************************************************//**
67985 + @Function      FM_PCD_HcDumpRegs
67986 +
67987 + @Description   Dumps HC Port registers
67988 +
67989 + @Param[in]     h_FmPcd         A handle to an FM PCD Module.
67990 +
67991 + @Return        E_OK on success; Error code otherwise.
67992 +
67993 + @Cautions      Allowed only following FM_PCD_Init().
67994 +                NOTE: this routine may be called only for FM in master mode
67995 +                (i.e. 'guestId'=NCSW_MASTER_ID).
67996 +*//***************************************************************************/
67997 +t_Error     FM_PCD_HcDumpRegs(t_Handle h_FmPcd);
67998 +#endif /* (defined(DEBUG_ERRORS) && ... */
67999 +
68000 +
68001 +
68002 +/**************************************************************************//**
68003 + KeyGen         FM_PCD_Runtime_build_grp FM PCD Runtime Building Unit
68004 +
68005 + @Description   Frame Manager PCD Runtime Building API
68006 +
68007 +                This group contains routines for setting, deleting and modifying
68008 +                PCD resources, for defining the total PCD tree.
68009 + @{
68010 +*//***************************************************************************/
68011 +
68012 +/**************************************************************************//**
68013 + @Collection    Definitions of coarse classification
68014 +                parameters as required by KeyGen (when coarse classification
68015 +                is the next engine after this scheme).
68016 +*//***************************************************************************/
68017 +#define FM_PCD_MAX_NUM_OF_CC_TREES              8
68018 +#define FM_PCD_MAX_NUM_OF_CC_GROUPS             16
68019 +#define FM_PCD_MAX_NUM_OF_CC_UNITS              4
68020 +#define FM_PCD_MAX_NUM_OF_KEYS                  256
68021 +#define FM_PCD_MAX_NUM_OF_FLOWS                 (4*KILOBYTE)
68022 +#define FM_PCD_MAX_SIZE_OF_KEY                  56
68023 +#define FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP     16
68024 +#define FM_PCD_LAST_KEY_INDEX                   0xffff
68025 +
68026 +#define FM_PCD_MAX_NUM_OF_CC_NODES              255 /* Obsolete, not used - will be removed in the future */
68027 +/* @} */
68028 +
68029 +/**************************************************************************//**
68030 + @Collection    A set of definitions to allow protocol
68031 +                special option description.
68032 +*//***************************************************************************/
68033 +typedef uint32_t        protocolOpt_t;          /**< A general type to define a protocol option. */
68034 +
68035 +typedef protocolOpt_t   ethProtocolOpt_t;       /**< Ethernet protocol options. */
68036 +#define ETH_BROADCAST               0x80000000  /**< Ethernet Broadcast. */
68037 +#define ETH_MULTICAST               0x40000000  /**< Ethernet Multicast. */
68038 +
68039 +typedef protocolOpt_t   vlanProtocolOpt_t;      /**< VLAN protocol options. */
68040 +#define VLAN_STACKED                0x20000000  /**< Stacked VLAN. */
68041 +
68042 +typedef protocolOpt_t   mplsProtocolOpt_t;      /**< MPLS protocol options. */
68043 +#define MPLS_STACKED                0x10000000  /**< Stacked MPLS. */
68044 +
68045 +typedef protocolOpt_t   ipv4ProtocolOpt_t;      /**< IPv4 protocol options. */
68046 +#define IPV4_BROADCAST_1            0x08000000  /**< IPv4 Broadcast. */
68047 +#define IPV4_MULTICAST_1            0x04000000  /**< IPv4 Multicast. */
68048 +#define IPV4_UNICAST_2              0x02000000  /**< Tunneled IPv4 - Unicast. */
68049 +#define IPV4_MULTICAST_BROADCAST_2  0x01000000  /**< Tunneled IPv4 - Broadcast/Multicast. */
68050 +
68051 +#define IPV4_FRAG_1                 0x00000008  /**< IPV4 reassembly option.
68052 +                                                     IPV4 Reassembly manipulation requires network
68053 +                                                     environment with IPV4 header and IPV4_FRAG_1 option  */
68054 +
68055 +typedef protocolOpt_t   ipv6ProtocolOpt_t;      /**< IPv6 protocol options. */
68056 +#define IPV6_MULTICAST_1            0x00800000  /**< IPv6 Multicast. */
68057 +#define IPV6_UNICAST_2              0x00400000  /**< Tunneled IPv6 - Unicast. */
68058 +#define IPV6_MULTICAST_2            0x00200000  /**< Tunneled IPv6 - Multicast. */
68059 +
68060 +#define IPV6_FRAG_1                 0x00000004  /**< IPV6 reassembly option.
68061 +                                                     IPV6 Reassembly manipulation requires network
68062 +                                                     environment with IPV6 header and IPV6_FRAG_1 option;
68063 +                                                     in case where fragment found, the fragment-extension offset
68064 +                                                     may be found at 'shim2' (in parser-result). */
68065 +#if (DPAA_VERSION >= 11)
68066 +typedef protocolOpt_t   capwapProtocolOpt_t;      /**< CAPWAP protocol options. */
68067 +#define CAPWAP_FRAG_1               0x00000008  /**< CAPWAP reassembly option.
68068 +                                                     CAPWAP Reassembly manipulation requires network
68069 +                                                     environment with CAPWAP header and CAPWAP_FRAG_1 option;
68070 +                                                     in case where fragment found, the fragment-extension offset
68071 +                                                     may be found at 'shim2' (in parser-result). */
68072 +#endif /* (DPAA_VERSION >= 11) */
68073 +
68074 +
68075 +/* @} */
68076 +
68077 +#define FM_PCD_MANIP_MAX_HDR_SIZE               256
68078 +#define FM_PCD_MANIP_DSCP_TO_VLAN_TRANS         64
68079 +
68080 +/**************************************************************************//**
68081 + @Collection    A set of definitions to support Header Manipulation selection.
68082 +*//***************************************************************************/
68083 +typedef uint32_t                hdrManipFlags_t;            /**< A general type to define a HMan update command flags. */
68084 +
68085 +typedef hdrManipFlags_t         ipv4HdrManipUpdateFlags_t;  /**< IPv4 protocol HMan update command flags. */
68086 +
68087 +#define HDR_MANIP_IPV4_TOS      0x80000000                  /**< update TOS with the given value ('tos' field
68088 +                                                                 of t_FmPcdManipHdrFieldUpdateIpv4) */
68089 +#define HDR_MANIP_IPV4_ID       0x40000000                  /**< update IP ID with the given value ('id' field
68090 +                                                                 of t_FmPcdManipHdrFieldUpdateIpv4) */
68091 +#define HDR_MANIP_IPV4_TTL      0x20000000                  /**< Decrement TTL by 1 */
68092 +#define HDR_MANIP_IPV4_SRC      0x10000000                  /**< update IP source address with the given value
68093 +                                                                 ('src' field of t_FmPcdManipHdrFieldUpdateIpv4) */
68094 +#define HDR_MANIP_IPV4_DST      0x08000000                  /**< update IP destination address with the given value
68095 +                                                                 ('dst' field of t_FmPcdManipHdrFieldUpdateIpv4) */
68096 +
68097 +typedef hdrManipFlags_t         ipv6HdrManipUpdateFlags_t;  /**< IPv6 protocol HMan update command flags. */
68098 +
68099 +#define HDR_MANIP_IPV6_TC       0x80000000                  /**< update Traffic Class address with the given value
68100 +                                                                 ('trafficClass' field of t_FmPcdManipHdrFieldUpdateIpv6) */
68101 +#define HDR_MANIP_IPV6_HL       0x40000000                  /**< Decrement Hop Limit by 1 */
68102 +#define HDR_MANIP_IPV6_SRC      0x20000000                  /**< update IP source address with the given value
68103 +                                                                 ('src' field of t_FmPcdManipHdrFieldUpdateIpv6) */
68104 +#define HDR_MANIP_IPV6_DST      0x10000000                  /**< update IP destination address with the given value
68105 +                                                                 ('dst' field of t_FmPcdManipHdrFieldUpdateIpv6) */
68106 +
68107 +typedef hdrManipFlags_t         tcpUdpHdrManipUpdateFlags_t;/**< TCP/UDP protocol HMan update command flags. */
68108 +
68109 +#define HDR_MANIP_TCP_UDP_SRC       0x80000000              /**< update TCP/UDP source address with the given value
68110 +                                                                 ('src' field of t_FmPcdManipHdrFieldUpdateTcpUdp) */
68111 +#define HDR_MANIP_TCP_UDP_DST       0x40000000              /**< update TCP/UDP destination address with the given value
68112 +                                                                 ('dst' field of t_FmPcdManipHdrFieldUpdateTcpUdp) */
68113 +#define HDR_MANIP_TCP_UDP_CHECKSUM  0x20000000             /**< update TCP/UDP checksum */
68114 +
68115 +/* @} */
68116 +
68117 +/**************************************************************************//**
68118 + @Description   A type used for returning the order of the key extraction.
68119 +                each value in this array represents the index of the extraction
68120 +                command as defined by the user in the initialization extraction array.
68121 +                The valid size of this array is the user define number of extractions
68122 +                required (also marked by the second '0' in this array).
68123 +*//***************************************************************************/
68124 +typedef    uint8_t    t_FmPcdKgKeyOrder [FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
68125 +
68126 +/**************************************************************************//**
68127 + @Description   All PCD engines
68128 +*//***************************************************************************/
68129 +typedef enum e_FmPcdEngine {
68130 +    e_FM_PCD_INVALID = 0,   /**< Invalid PCD engine */
68131 +    e_FM_PCD_DONE,          /**< No PCD Engine indicated */
68132 +    e_FM_PCD_KG,            /**< KeyGen */
68133 +    e_FM_PCD_CC,            /**< Coarse classifier */
68134 +    e_FM_PCD_PLCR,          /**< Policer */
68135 +    e_FM_PCD_PRS,           /**< Parser */
68136 +#if (DPAA_VERSION >= 11)
68137 +    e_FM_PCD_FR,            /**< Frame-Replicator */
68138 +#endif /* (DPAA_VERSION >= 11) */
68139 +    e_FM_PCD_HASH           /**< Hash table */
68140 +} e_FmPcdEngine;
68141 +
68142 +/**************************************************************************//**
68143 + @Description   Enumeration type for selecting extraction by header types
68144 +*//***************************************************************************/
68145 +typedef enum e_FmPcdExtractByHdrType {
68146 +    e_FM_PCD_EXTRACT_FROM_HDR,      /**< Extract bytes from header */
68147 +    e_FM_PCD_EXTRACT_FROM_FIELD,    /**< Extract bytes from header field */
68148 +    e_FM_PCD_EXTRACT_FULL_FIELD     /**< Extract a full field */
68149 +} e_FmPcdExtractByHdrType;
68150 +
68151 +/**************************************************************************//**
68152 + @Description   Enumeration type for selecting extraction source
68153 +                (when it is not the header)
68154 +*//***************************************************************************/
68155 +typedef enum e_FmPcdExtractFrom {
68156 +    e_FM_PCD_EXTRACT_FROM_FRAME_START,          /**< KG & CC: Extract from beginning of frame */
68157 +    e_FM_PCD_EXTRACT_FROM_DFLT_VALUE,           /**< KG only: Extract from a default value */
68158 +    e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE,    /**< KG & CC: Extract from the point where parsing had finished */
68159 +    e_FM_PCD_EXTRACT_FROM_KEY,                  /**< CC only: Field where saved KEY */
68160 +    e_FM_PCD_EXTRACT_FROM_HASH,                 /**< CC only: Field where saved HASH */
68161 +    e_FM_PCD_EXTRACT_FROM_PARSE_RESULT,         /**< KG only: Extract from the parser result */
68162 +    e_FM_PCD_EXTRACT_FROM_ENQ_FQID,             /**< KG & CC: Extract from enqueue FQID */
68163 +    e_FM_PCD_EXTRACT_FROM_FLOW_ID               /**< CC only: Field where saved Dequeue FQID */
68164 +} e_FmPcdExtractFrom;
68165 +
68166 +/**************************************************************************//**
68167 + @Description   Enumeration type for selecting extraction type
68168 +*//***************************************************************************/
68169 +typedef enum e_FmPcdExtractType {
68170 +    e_FM_PCD_EXTRACT_BY_HDR,                /**< Extract according to header */
68171 +    e_FM_PCD_EXTRACT_NON_HDR,               /**< Extract from data that is not the header */
68172 +    e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO   /**< Extract private info as specified by user */
68173 +} e_FmPcdExtractType;
68174 +
68175 +/**************************************************************************//**
68176 + @Description   Enumeration type for selecting default extraction value
68177 +*//***************************************************************************/
68178 +typedef enum e_FmPcdKgExtractDfltSelect {
68179 +    e_FM_PCD_KG_DFLT_GBL_0,          /**< Default selection is KG register 0 */
68180 +    e_FM_PCD_KG_DFLT_GBL_1,          /**< Default selection is KG register 1 */
68181 +    e_FM_PCD_KG_DFLT_PRIVATE_0,      /**< Default selection is a per scheme register 0 */
68182 +    e_FM_PCD_KG_DFLT_PRIVATE_1,      /**< Default selection is a per scheme register 1 */
68183 +    e_FM_PCD_KG_DFLT_ILLEGAL         /**< Illegal selection */
68184 +} e_FmPcdKgExtractDfltSelect;
68185 +
68186 +/**************************************************************************//**
68187 + @Description   Enumeration type defining all default groups - each group shares
68188 +                a default value, one of four user-initialized values.
68189 +*//***************************************************************************/
68190 +typedef enum e_FmPcdKgKnownFieldsDfltTypes {
68191 +    e_FM_PCD_KG_MAC_ADDR,               /**< MAC Address */
68192 +    e_FM_PCD_KG_TCI,                    /**< TCI field */
68193 +    e_FM_PCD_KG_ENET_TYPE,              /**< ENET Type */
68194 +    e_FM_PCD_KG_PPP_SESSION_ID,         /**< PPP Session id */
68195 +    e_FM_PCD_KG_PPP_PROTOCOL_ID,        /**< PPP Protocol id */
68196 +    e_FM_PCD_KG_MPLS_LABEL,             /**< MPLS label */
68197 +    e_FM_PCD_KG_IP_ADDR,                /**< IP address */
68198 +    e_FM_PCD_KG_PROTOCOL_TYPE,          /**< Protocol type */
68199 +    e_FM_PCD_KG_IP_TOS_TC,              /**< TOS or TC */
68200 +    e_FM_PCD_KG_IPV6_FLOW_LABEL,        /**< IPV6 flow label */
68201 +    e_FM_PCD_KG_IPSEC_SPI,              /**< IPSEC SPI */
68202 +    e_FM_PCD_KG_L4_PORT,                /**< L4 Port */
68203 +    e_FM_PCD_KG_TCP_FLAG,               /**< TCP Flag */
68204 +    e_FM_PCD_KG_GENERIC_FROM_DATA,      /**< grouping implemented by SW,
68205 +                                             any data extraction that is not the full
68206 +                                             field described above  */
68207 +    e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V, /**< grouping implemented by SW,
68208 +                                             any data extraction without validation */
68209 +    e_FM_PCD_KG_GENERIC_NOT_FROM_DATA   /**< grouping implemented by SW,
68210 +                                             extraction from parser result or
68211 +                                             direct use of default value  */
68212 +} e_FmPcdKgKnownFieldsDfltTypes;
68213 +
68214 +/**************************************************************************//**
68215 + @Description   Enumeration type for defining header index for scenarios with
68216 +                multiple (tunneled) headers
68217 +*//***************************************************************************/
68218 +typedef enum e_FmPcdHdrIndex {
68219 +    e_FM_PCD_HDR_INDEX_NONE = 0,        /**< used when multiple headers not used, also
68220 +                                             to specify regular IP (not tunneled). */
68221 +    e_FM_PCD_HDR_INDEX_1,               /**< may be used for VLAN, MPLS, tunneled IP */
68222 +    e_FM_PCD_HDR_INDEX_2,               /**< may be used for MPLS, tunneled IP */
68223 +    e_FM_PCD_HDR_INDEX_3,               /**< may be used for MPLS */
68224 +    e_FM_PCD_HDR_INDEX_LAST = 0xFF      /**< may be used for VLAN, MPLS */
68225 +} e_FmPcdHdrIndex;
68226 +
68227 +/**************************************************************************//**
68228 + @Description   Enumeration type for selecting the policer profile functional type
68229 +*//***************************************************************************/
68230 +typedef enum e_FmPcdProfileTypeSelection {
68231 +    e_FM_PCD_PLCR_PORT_PRIVATE,         /**< Port dedicated profile */
68232 +    e_FM_PCD_PLCR_SHARED                /**< Shared profile (shared within partition) */
68233 +} e_FmPcdProfileTypeSelection;
68234 +
68235 +/**************************************************************************//**
68236 + @Description   Enumeration type for selecting the policer profile algorithm
68237 +*//***************************************************************************/
68238 +typedef enum e_FmPcdPlcrAlgorithmSelection {
68239 +    e_FM_PCD_PLCR_PASS_THROUGH,         /**< Policer pass through */
68240 +    e_FM_PCD_PLCR_RFC_2698,             /**< Policer algorithm RFC 2698 */
68241 +    e_FM_PCD_PLCR_RFC_4115              /**< Policer algorithm RFC 4115 */
68242 +} e_FmPcdPlcrAlgorithmSelection;
68243 +
68244 +/**************************************************************************//**
68245 + @Description   Enumeration type for selecting a policer profile color mode
68246 +*//***************************************************************************/
68247 +typedef enum e_FmPcdPlcrColorMode {
68248 +    e_FM_PCD_PLCR_COLOR_BLIND,          /**< Color blind */
68249 +    e_FM_PCD_PLCR_COLOR_AWARE           /**< Color aware */
68250 +} e_FmPcdPlcrColorMode;
68251 +
68252 +/**************************************************************************//**
68253 + @Description   Enumeration type for selecting a policer profile color
68254 +*//***************************************************************************/
68255 +typedef enum e_FmPcdPlcrColor {
68256 +    e_FM_PCD_PLCR_GREEN,                /**< Green color code */
68257 +    e_FM_PCD_PLCR_YELLOW,               /**< Yellow color code */
68258 +    e_FM_PCD_PLCR_RED,                  /**< Red color code */
68259 +    e_FM_PCD_PLCR_OVERRIDE              /**< Color override code */
68260 +} e_FmPcdPlcrColor;
68261 +
68262 +/**************************************************************************//**
68263 + @Description   Enumeration type for selecting the policer profile packet frame length selector
68264 +*//***************************************************************************/
68265 +typedef enum e_FmPcdPlcrFrameLengthSelect {
68266 +  e_FM_PCD_PLCR_L2_FRM_LEN,             /**< L2 frame length */
68267 +  e_FM_PCD_PLCR_L3_FRM_LEN,             /**< L3 frame length */
68268 +  e_FM_PCD_PLCR_L4_FRM_LEN,             /**< L4 frame length */
68269 +  e_FM_PCD_PLCR_FULL_FRM_LEN            /**< Full frame length */
68270 +} e_FmPcdPlcrFrameLengthSelect;
68271 +
68272 +/**************************************************************************//**
68273 + @Description   Enumeration type for selecting roll-back frame
68274 +*//***************************************************************************/
68275 +typedef enum e_FmPcdPlcrRollBackFrameSelect {
68276 +  e_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN,    /**< Roll-back L2 frame length */
68277 +  e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN   /**< Roll-back Full frame length */
68278 +} e_FmPcdPlcrRollBackFrameSelect;
68279 +
68280 +/**************************************************************************//**
68281 + @Description   Enumeration type for selecting the policer profile packet or byte mode
68282 +*//***************************************************************************/
68283 +typedef enum e_FmPcdPlcrRateMode {
68284 +    e_FM_PCD_PLCR_BYTE_MODE,            /**< Byte mode */
68285 +    e_FM_PCD_PLCR_PACKET_MODE           /**< Packet mode */
68286 +} e_FmPcdPlcrRateMode;
68287 +
68288 +/**************************************************************************//**
68289 + @Description   Enumeration type for defining action of frame
68290 +*//***************************************************************************/
68291 +typedef enum e_FmPcdDoneAction {
68292 +    e_FM_PCD_ENQ_FRAME = 0,        /**< Enqueue frame */
68293 +    e_FM_PCD_DROP_FRAME            /**< Mark this frame as error frame and continue
68294 +                                        to error flow; 'FM_PORT_FRM_ERR_CLS_DISCARD'
68295 +                                        flag will be set for this frame. */
68296 +} e_FmPcdDoneAction;
68297 +
68298 +/**************************************************************************//**
68299 + @Description   Enumeration type for selecting the policer counter
68300 +*//***************************************************************************/
68301 +typedef enum e_FmPcdPlcrProfileCounters {
68302 +    e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER,               /**< Green packets counter */
68303 +    e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER,              /**< Yellow packets counter */
68304 +    e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER,                 /**< Red packets counter */
68305 +    e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER,   /**< Recolored yellow packets counter */
68306 +    e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER       /**< Recolored red packets counter */
68307 +} e_FmPcdPlcrProfileCounters;
68308 +
68309 +/**************************************************************************//**
68310 + @Description   Enumeration type for selecting the PCD action after extraction
68311 +*//***************************************************************************/
68312 +typedef enum e_FmPcdAction {
68313 +    e_FM_PCD_ACTION_NONE,                           /**< NONE  */
68314 +    e_FM_PCD_ACTION_EXACT_MATCH,                    /**< Exact match on the selected extraction */
68315 +    e_FM_PCD_ACTION_INDEXED_LOOKUP                  /**< Indexed lookup on the selected extraction */
68316 +} e_FmPcdAction;
68317 +
68318 +/**************************************************************************//**
68319 + @Description   Enumeration type for selecting type of insert manipulation
68320 +*//***************************************************************************/
68321 +typedef enum e_FmPcdManipHdrInsrtType {
68322 +    e_FM_PCD_MANIP_INSRT_GENERIC,                   /**< Insert according to offset & size */
68323 +    e_FM_PCD_MANIP_INSRT_BY_HDR,                    /**< Insert according to protocol */
68324 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
68325 +    e_FM_PCD_MANIP_INSRT_BY_TEMPLATE                /**< Insert template to start of frame */
68326 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
68327 +} e_FmPcdManipHdrInsrtType;
68328 +
68329 +/**************************************************************************//**
68330 + @Description   Enumeration type for selecting type of remove manipulation
68331 +*//***************************************************************************/
68332 +typedef enum e_FmPcdManipHdrRmvType {
68333 +    e_FM_PCD_MANIP_RMV_GENERIC,                     /**< Remove according to offset & size */
68334 +    e_FM_PCD_MANIP_RMV_BY_HDR                       /**< Remove according to offset & size */
68335 +} e_FmPcdManipHdrRmvType;
68336 +
68337 +/**************************************************************************//**
68338 + @Description   Enumeration type for selecting specific L2 fields removal
68339 +*//***************************************************************************/
68340 +typedef enum e_FmPcdManipHdrRmvSpecificL2 {
68341 +    e_FM_PCD_MANIP_HDR_RMV_ETHERNET,                /**< Ethernet/802.3 MAC */
68342 +    e_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS,           /**< stacked QTags */
68343 +    e_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS,       /**< MPLS and Ethernet/802.3 MAC header until
68344 +                                                         the header which follows the MPLS header */
68345 +    e_FM_PCD_MANIP_HDR_RMV_MPLS,                     /**< Remove MPLS header (Unlimited MPLS labels) */
68346 +    e_FM_PCD_MANIP_HDR_RMV_PPPOE                     /**< Remove the PPPoE header and PPP protocol field. */
68347 +} e_FmPcdManipHdrRmvSpecificL2;
68348 +
68349 +/**************************************************************************//**
68350 + @Description   Enumeration type for selecting specific fields updates
68351 +*//***************************************************************************/
68352 +typedef enum e_FmPcdManipHdrFieldUpdateType {
68353 +    e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN,               /**< VLAN updates */
68354 +    e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4,               /**< IPV4 updates */
68355 +    e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6,               /**< IPV6 updates */
68356 +    e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP,            /**< TCP_UDP updates */
68357 +} e_FmPcdManipHdrFieldUpdateType;
68358 +
68359 +/**************************************************************************//**
68360 + @Description   Enumeration type for selecting VLAN updates
68361 +*//***************************************************************************/
68362 +typedef enum e_FmPcdManipHdrFieldUpdateVlan {
68363 +    e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI,      /**< Replace VPri of outer most VLAN tag. */
68364 +    e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN    /**< DSCP to VLAN priority bits translation */
68365 +} e_FmPcdManipHdrFieldUpdateVlan;
68366 +
68367 +/**************************************************************************//**
68368 + @Description   Enumeration type for selecting specific L2 header insertion
68369 +*//***************************************************************************/
68370 +typedef enum e_FmPcdManipHdrInsrtSpecificL2 {
68371 +    e_FM_PCD_MANIP_HDR_INSRT_MPLS,                   /**< Insert MPLS header (Unlimited MPLS labels) */
68372 +    e_FM_PCD_MANIP_HDR_INSRT_PPPOE                   /**< Insert PPPOE */
68373 +} e_FmPcdManipHdrInsrtSpecificL2;
68374 +
68375 +#if (DPAA_VERSION >= 11)
68376 +/**************************************************************************//**
68377 + @Description   Enumeration type for selecting QoS mapping mode
68378 +
68379 +                Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE'
68380 +                User should instruct the port to read the hash-result
68381 +*//***************************************************************************/
68382 +typedef enum e_FmPcdManipHdrQosMappingMode {
68383 +    e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE = 0,   /**< No mapping, QoS field will not be changed */
68384 +    e_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS, /**< QoS field will be overwritten by the last byte in the hash-result. */
68385 +} e_FmPcdManipHdrQosMappingMode;
68386 +
68387 +/**************************************************************************//**
68388 + @Description   Enumeration type for selecting QoS source
68389 +
68390 +                Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_SRC_NONE'
68391 +                User should left room for the hash-result on input/output buffer
68392 +                and instruct the port to read/write the hash-result to the buffer (RPD should be set)
68393 +*//***************************************************************************/
68394 +typedef enum e_FmPcdManipHdrQosSrc {
68395 +    e_FM_PCD_MANIP_HDR_QOS_SRC_NONE = 0,        /**< TODO */
68396 +    e_FM_PCD_MANIP_HDR_QOS_SRC_USER_DEFINED,    /**< QoS will be taken from the last byte in the hash-result. */
68397 +} e_FmPcdManipHdrQosSrc;
68398 +#endif /* (DPAA_VERSION >= 11) */
68399 +
68400 +/**************************************************************************//**
68401 + @Description   Enumeration type for selecting type of header insertion
68402 +*//***************************************************************************/
68403 +typedef enum e_FmPcdManipHdrInsrtByHdrType {
68404 +    e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2,        /**< Specific L2 fields insertion */
68405 +#if (DPAA_VERSION >= 11)
68406 +    e_FM_PCD_MANIP_INSRT_BY_HDR_IP,                 /**< IP insertion */
68407 +    e_FM_PCD_MANIP_INSRT_BY_HDR_UDP,                /**< UDP insertion */
68408 +    e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE,             /**< UDP lite insertion */
68409 +    e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP                 /**< CAPWAP insertion */
68410 +#endif /* (DPAA_VERSION >= 11) */
68411 +} e_FmPcdManipHdrInsrtByHdrType;
68412 +
68413 +/**************************************************************************//**
68414 + @Description   Enumeration type for selecting specific customCommand
68415 +*//***************************************************************************/
68416 +typedef enum e_FmPcdManipHdrCustomType {
68417 +    e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE,           /**< Replace IPv4/IPv6 */
68418 +    e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE,     /**< Replace IPv4/IPv6 */
68419 +} e_FmPcdManipHdrCustomType;
68420 +
68421 +/**************************************************************************//**
68422 + @Description   Enumeration type for selecting specific customCommand
68423 +*//***************************************************************************/
68424 +typedef enum e_FmPcdManipHdrCustomIpReplace {
68425 +    e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6,           /**< Replace IPv4 by IPv6 */
68426 +    e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4            /**< Replace IPv6 by IPv4 */
68427 +} e_FmPcdManipHdrCustomIpReplace;
68428 +
68429 +/**************************************************************************//**
68430 + @Description   Enumeration type for selecting type of header removal
68431 +*//***************************************************************************/
68432 +typedef enum e_FmPcdManipHdrRmvByHdrType {
68433 +    e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2 = 0,      /**< Specific L2 fields removal */
68434 +#if (DPAA_VERSION >= 11)
68435 +    e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP,                  /**< CAPWAP removal */
68436 +#endif /* (DPAA_VERSION >= 11) */
68437 +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
68438 +    e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START,           /**< Locate from data that is not the header */
68439 +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
68440 +} e_FmPcdManipHdrRmvByHdrType;
68441 +
68442 +/**************************************************************************//**
68443 + @Description   Enumeration type for selecting type of timeout mode
68444 +*//***************************************************************************/
68445 +typedef enum e_FmPcdManipReassemTimeOutMode {
68446 +    e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES, /**< Limits the time of the reassembly process
68447 +                                                 from the first fragment to the last */
68448 +    e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG    /**< Limits the time of receiving the fragment */
68449 +} e_FmPcdManipReassemTimeOutMode;
68450 +
68451 +/**************************************************************************//**
68452 + @Description   Enumeration type for selecting type of WaysNumber mode
68453 +*//***************************************************************************/
68454 +typedef enum e_FmPcdManipReassemWaysNumber {
68455 +    e_FM_PCD_MANIP_ONE_WAY_HASH = 1,    /**< One way hash    */
68456 +    e_FM_PCD_MANIP_TWO_WAYS_HASH,       /**< Two ways hash   */
68457 +    e_FM_PCD_MANIP_THREE_WAYS_HASH,     /**< Three ways hash */
68458 +    e_FM_PCD_MANIP_FOUR_WAYS_HASH,      /**< Four ways hash  */
68459 +    e_FM_PCD_MANIP_FIVE_WAYS_HASH,      /**< Five ways hash  */
68460 +    e_FM_PCD_MANIP_SIX_WAYS_HASH,       /**< Six ways hash   */
68461 +    e_FM_PCD_MANIP_SEVEN_WAYS_HASH,     /**< Seven ways hash */
68462 +    e_FM_PCD_MANIP_EIGHT_WAYS_HASH      /**< Eight ways hash */
68463 +} e_FmPcdManipReassemWaysNumber;
68464 +
68465 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
68466 +/**************************************************************************//**
68467 + @Description   Enumeration type for selecting type of statistics mode
68468 +*//***************************************************************************/
68469 +typedef enum e_FmPcdStatsType {
68470 +    e_FM_PCD_STATS_PER_FLOWID = 0       /**< Flow ID is used as index for getting statistics */
68471 +} e_FmPcdStatsType;
68472 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
68473 +
68474 +/**************************************************************************//**
68475 + @Description   Enumeration type for selecting manipulation type
68476 +*//***************************************************************************/
68477 +typedef enum e_FmPcdManipType {
68478 +    e_FM_PCD_MANIP_HDR = 0,             /**< Header manipulation */
68479 +    e_FM_PCD_MANIP_REASSEM,             /**< Reassembly */
68480 +    e_FM_PCD_MANIP_FRAG,                /**< Fragmentation */
68481 +    e_FM_PCD_MANIP_SPECIAL_OFFLOAD      /**< Special Offloading */
68482 +} e_FmPcdManipType;
68483 +
68484 +/**************************************************************************//**
68485 + @Description   Enumeration type for selecting type of statistics mode
68486 +*//***************************************************************************/
68487 +typedef enum e_FmPcdCcStatsMode {
68488 +    e_FM_PCD_CC_STATS_MODE_NONE = 0,        /**< No statistics support */
68489 +    e_FM_PCD_CC_STATS_MODE_FRAME,           /**< Frame count statistics */
68490 +    e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME,  /**< Byte and frame count statistics */
68491 +#if (DPAA_VERSION >= 11)
68492 +    e_FM_PCD_CC_STATS_MODE_RMON,            /**< Byte and frame length range count statistics;
68493 +                                                 This mode is supported only on B4860 device */
68494 +#endif /* (DPAA_VERSION >= 11) */
68495 +} e_FmPcdCcStatsMode;
68496 +
68497 +/**************************************************************************//**
68498 + @Description   Enumeration type for determining the action in case an IP packet
68499 +                is larger than MTU but its DF (Don't Fragment) bit is set.
68500 +*//***************************************************************************/
68501 +typedef enum e_FmPcdManipDontFragAction {
68502 +    e_FM_PCD_MANIP_DISCARD_PACKET = 0,                  /**< Discard packet */
68503 +    e_FM_PCD_MANIP_ENQ_TO_ERR_Q_OR_DISCARD_PACKET = e_FM_PCD_MANIP_DISCARD_PACKET,
68504 +                                                        /**< Obsolete, cannot enqueue to error queue;
68505 +                                                             In practice, selects to discard packets;
68506 +                                                             Will be removed in the future */
68507 +    e_FM_PCD_MANIP_FRAGMENT_PACKET,                     /**< Fragment packet and continue normal processing */
68508 +    e_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG                /**< Continue normal processing without fragmenting the packet */
68509 +} e_FmPcdManipDontFragAction;
68510 +
68511 +/**************************************************************************//**
68512 + @Description   Enumeration type for selecting type of special offload manipulation
68513 +*//***************************************************************************/
68514 +typedef enum e_FmPcdManipSpecialOffloadType {
68515 +    e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC,    /**< IPSec offload manipulation */
68516 +#if (DPAA_VERSION >= 11)
68517 +    e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP    /**< CAPWAP offload manipulation */
68518 +#endif /* (DPAA_VERSION >= 11) */
68519 +} e_FmPcdManipSpecialOffloadType;
68520 +
68521 +
68522 +/**************************************************************************//**
68523 + @Description   A Union of protocol dependent special options
68524 +*//***************************************************************************/
68525 +typedef union u_FmPcdHdrProtocolOpt {
68526 +    ethProtocolOpt_t    ethOpt;     /**< Ethernet options */
68527 +    vlanProtocolOpt_t   vlanOpt;    /**< VLAN options */
68528 +    mplsProtocolOpt_t   mplsOpt;    /**< MPLS options */
68529 +    ipv4ProtocolOpt_t   ipv4Opt;    /**< IPv4 options */
68530 +    ipv6ProtocolOpt_t   ipv6Opt;    /**< IPv6 options */
68531 +#if (DPAA_VERSION >= 11)
68532 +    capwapProtocolOpt_t capwapOpt;  /**< CAPWAP options */
68533 +#endif /* (DPAA_VERSION >= 11) */
68534 +} u_FmPcdHdrProtocolOpt;
68535 +
68536 +/**************************************************************************//**
68537 + @Description   A union holding protocol fields
68538 +
68539 +
68540 +                Fields supported as "full fields":
68541 +                    HEADER_TYPE_ETH:
68542 +                        NET_HEADER_FIELD_ETH_DA
68543 +                        NET_HEADER_FIELD_ETH_SA
68544 +                        NET_HEADER_FIELD_ETH_TYPE
68545 +
68546 +                    HEADER_TYPE_LLC_SNAP:
68547 +                        NET_HEADER_FIELD_LLC_SNAP_TYPE
68548 +
68549 +                    HEADER_TYPE_VLAN:
68550 +                        NET_HEADER_FIELD_VLAN_TCI
68551 +                                (index may apply:
68552 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68553 +                                 e_FM_PCD_HDR_INDEX_LAST)
68554 +
68555 +                    HEADER_TYPE_MPLS:
68556 +                        NET_HEADER_FIELD_MPLS_LABEL_STACK
68557 +                                (index may apply:
68558 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68559 +                                 e_FM_PCD_HDR_INDEX_2,
68560 +                                 e_FM_PCD_HDR_INDEX_LAST)
68561 +
68562 +                    HEADER_TYPE_IPv4:
68563 +                        NET_HEADER_FIELD_IPv4_SRC_IP
68564 +                        NET_HEADER_FIELD_IPv4_DST_IP
68565 +                        NET_HEADER_FIELD_IPv4_PROTO
68566 +                        NET_HEADER_FIELD_IPv4_TOS
68567 +                                (index may apply:
68568 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68569 +                                 e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
68570 +
68571 +                    HEADER_TYPE_IPv6:
68572 +                        NET_HEADER_FIELD_IPv6_SRC_IP
68573 +                        NET_HEADER_FIELD_IPv6_DST_IP
68574 +                        NET_HEADER_FIELD_IPv6_NEXT_HDR
68575 +                        NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL | NET_HEADER_FIELD_IPv6_TC (must come together!)
68576 +                                (index may apply:
68577 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68578 +                                 e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
68579 +
68580 +                                (Note that starting from DPAA 1-1, NET_HEADER_FIELD_IPv6_NEXT_HDR applies to
68581 +                                 the last next header indication, meaning the next L4, which may be
68582 +                                 present at the Ipv6 last extension. On earlier revisions this field
68583 +                                 applies to the Next-Header field of the main IPv6 header)
68584 +
68585 +                    HEADER_TYPE_IP:
68586 +                        NET_HEADER_FIELD_IP_PROTO
68587 +                                (index may apply:
68588 +                                 e_FM_PCD_HDR_INDEX_LAST)
68589 +                        NET_HEADER_FIELD_IP_DSCP
68590 +                                (index may apply:
68591 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1)
68592 +                    HEADER_TYPE_GRE:
68593 +                        NET_HEADER_FIELD_GRE_TYPE
68594 +
68595 +                    HEADER_TYPE_MINENCAP
68596 +                        NET_HEADER_FIELD_MINENCAP_SRC_IP
68597 +                        NET_HEADER_FIELD_MINENCAP_DST_IP
68598 +                        NET_HEADER_FIELD_MINENCAP_TYPE
68599 +
68600 +                    HEADER_TYPE_TCP:
68601 +                        NET_HEADER_FIELD_TCP_PORT_SRC
68602 +                        NET_HEADER_FIELD_TCP_PORT_DST
68603 +                        NET_HEADER_FIELD_TCP_FLAGS
68604 +
68605 +                    HEADER_TYPE_UDP:
68606 +                        NET_HEADER_FIELD_UDP_PORT_SRC
68607 +                        NET_HEADER_FIELD_UDP_PORT_DST
68608 +
68609 +                    HEADER_TYPE_UDP_LITE:
68610 +                        NET_HEADER_FIELD_UDP_LITE_PORT_SRC
68611 +                        NET_HEADER_FIELD_UDP_LITE_PORT_DST
68612 +
68613 +                    HEADER_TYPE_IPSEC_AH:
68614 +                        NET_HEADER_FIELD_IPSEC_AH_SPI
68615 +                        NET_HEADER_FIELD_IPSEC_AH_NH
68616 +
68617 +                    HEADER_TYPE_IPSEC_ESP:
68618 +                        NET_HEADER_FIELD_IPSEC_ESP_SPI
68619 +
68620 +                    HEADER_TYPE_SCTP:
68621 +                        NET_HEADER_FIELD_SCTP_PORT_SRC
68622 +                        NET_HEADER_FIELD_SCTP_PORT_DST
68623 +
68624 +                    HEADER_TYPE_DCCP:
68625 +                        NET_HEADER_FIELD_DCCP_PORT_SRC
68626 +                        NET_HEADER_FIELD_DCCP_PORT_DST
68627 +
68628 +                    HEADER_TYPE_PPPoE:
68629 +                        NET_HEADER_FIELD_PPPoE_PID
68630 +                        NET_HEADER_FIELD_PPPoE_SID
68631 +
68632 +        *****************************************************************
68633 +                Fields supported as "from fields":
68634 +                    HEADER_TYPE_ETH (with or without validation):
68635 +                        NET_HEADER_FIELD_ETH_TYPE
68636 +
68637 +                    HEADER_TYPE_VLAN (with or without validation):
68638 +                        NET_HEADER_FIELD_VLAN_TCI
68639 +                                (index may apply:
68640 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68641 +                                 e_FM_PCD_HDR_INDEX_LAST)
68642 +
68643 +                    HEADER_TYPE_IPv4 (without validation):
68644 +                        NET_HEADER_FIELD_IPv4_PROTO
68645 +                                (index may apply:
68646 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68647 +                                 e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
68648 +
68649 +                    HEADER_TYPE_IPv6 (without validation):
68650 +                        NET_HEADER_FIELD_IPv6_NEXT_HDR
68651 +                                (index may apply:
68652 +                                 e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
68653 +                                 e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
68654 +
68655 +*//***************************************************************************/
68656 +typedef union t_FmPcdFields {
68657 +    headerFieldEth_t            eth;            /**< Ethernet               */
68658 +    headerFieldVlan_t           vlan;           /**< VLAN                   */
68659 +    headerFieldLlcSnap_t        llcSnap;        /**< LLC SNAP               */
68660 +    headerFieldPppoe_t          pppoe;          /**< PPPoE                  */
68661 +    headerFieldMpls_t           mpls;           /**< MPLS                   */
68662 +    headerFieldIp_t             ip;             /**< IP                     */
68663 +    headerFieldIpv4_t           ipv4;           /**< IPv4                   */
68664 +    headerFieldIpv6_t           ipv6;           /**< IPv6                   */
68665 +    headerFieldUdp_t            udp;            /**< UDP                    */
68666 +    headerFieldUdpLite_t        udpLite;        /**< UDP Lite               */
68667 +    headerFieldTcp_t            tcp;            /**< TCP                    */
68668 +    headerFieldSctp_t           sctp;           /**< SCTP                   */
68669 +    headerFieldDccp_t           dccp;           /**< DCCP                   */
68670 +    headerFieldGre_t            gre;            /**< GRE                    */
68671 +    headerFieldMinencap_t       minencap;       /**< Minimal Encapsulation  */
68672 +    headerFieldIpsecAh_t        ipsecAh;        /**< IPSec AH               */
68673 +    headerFieldIpsecEsp_t       ipsecEsp;       /**< IPSec ESP              */
68674 +    headerFieldUdpEncapEsp_t    udpEncapEsp;    /**< UDP Encapsulation ESP  */
68675 +} t_FmPcdFields;
68676 +
68677 +/**************************************************************************//**
68678 + @Description   Parameters for defining header extraction for key generation
68679 +*//***************************************************************************/
68680 +typedef struct t_FmPcdFromHdr {
68681 +    uint8_t             size;           /**< Size in byte */
68682 +    uint8_t             offset;         /**< Byte offset */
68683 +} t_FmPcdFromHdr;
68684 +
68685 +/**************************************************************************//**
68686 + @Description   Parameters for defining field extraction for key generation
68687 +*//***************************************************************************/
68688 +typedef struct t_FmPcdFromField {
68689 +    t_FmPcdFields       field;          /**< Field selection */
68690 +    uint8_t             size;           /**< Size in byte */
68691 +    uint8_t             offset;         /**< Byte offset */
68692 +} t_FmPcdFromField;
68693 +
68694 +/**************************************************************************//**
68695 + @Description   Parameters for defining a single network environment unit
68696 +
68697 +                A distinction unit should be defined if it will later be used
68698 +                by one or more PCD engines to distinguish between flows.
68699 +*//***************************************************************************/
68700 +typedef struct t_FmPcdDistinctionUnit {
68701 +    struct {
68702 +        e_NetHeaderType         hdr;        /**< One of the headers supported by the FM */
68703 +        u_FmPcdHdrProtocolOpt   opt;        /**< Select only one option ! */
68704 +    } hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
68705 +} t_FmPcdDistinctionUnit;
68706 +
68707 +/**************************************************************************//**
68708 + @Description   Parameters for defining all different distinction units supported
68709 +                by a specific PCD Network Environment Characteristics module.
68710 +
68711 +                Each unit represent a protocol or a group of protocols that may
68712 +                be used later by the different PCD engines to distinguish
68713 +                between flows.
68714 +*//***************************************************************************/
68715 +typedef struct t_FmPcdNetEnvParams {
68716 +    uint8_t                 numOfDistinctionUnits;                      /**< Number of different units to be identified */
68717 +    t_FmPcdDistinctionUnit  units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /**< An array of numOfDistinctionUnits of the
68718 +                                                                             different units to be identified */
68719 +} t_FmPcdNetEnvParams;
68720 +
68721 +/**************************************************************************//**
68722 + @Description   Parameters for defining a single extraction action when
68723 +                creating a key
68724 +*//***************************************************************************/
68725 +typedef struct t_FmPcdExtractEntry {
68726 +    e_FmPcdExtractType                  type;           /**< Extraction type select */
68727 +    union {
68728 +        struct {
68729 +            e_NetHeaderType             hdr;            /**< Header selection */
68730 +            bool                        ignoreProtocolValidation;
68731 +                                                        /**< Ignore protocol validation */
68732 +            e_FmPcdHdrIndex             hdrIndex;       /**< Relevant only for MPLS, VLAN and tunneled
68733 +                                                             IP. Otherwise should be cleared. */
68734 +            e_FmPcdExtractByHdrType     type;           /**< Header extraction type select */
68735 +            union {
68736 +                t_FmPcdFromHdr          fromHdr;        /**< Extract bytes from header parameters */
68737 +                t_FmPcdFromField        fromField;      /**< Extract bytes from field parameters */
68738 +                t_FmPcdFields           fullField;      /**< Extract full filed parameters */
68739 +            } extractByHdrType;
68740 +        } extractByHdr;                                 /**< used when type = e_FM_PCD_KG_EXTRACT_BY_HDR */
68741 +        struct {
68742 +            e_FmPcdExtractFrom          src;            /**< Non-header extraction source */
68743 +            e_FmPcdAction               action;         /**< Relevant for CC Only */
68744 +            uint16_t                    icIndxMask;     /**< Relevant only for CC when
68745 +                                                             action = e_FM_PCD_ACTION_INDEXED_LOOKUP;
68746 +                                                             Note that the number of bits that are set within
68747 +                                                             this mask must be log2 of the CC-node 'numOfKeys'.
68748 +                                                             Note that the mask cannot be set on the lower bits. */
68749 +            uint8_t                     offset;         /**< Byte offset */
68750 +            uint8_t                     size;           /**< Size in byte */
68751 +        } extractNonHdr;                                /**< used when type = e_FM_PCD_KG_EXTRACT_NON_HDR */
68752 +    };
68753 +} t_FmPcdExtractEntry;
68754 +
68755 +/**************************************************************************//**
68756 + @Description   Parameters for defining masks for each extracted field in the key.
68757 +*//***************************************************************************/
68758 +typedef struct t_FmPcdKgExtractMask {
68759 +    uint8_t                             extractArrayIndex;  /**< Index in the extraction array, as initialized by user */
68760 +    uint8_t                             offset;             /**< Byte offset */
68761 +    uint8_t                             mask;               /**< A byte mask (selected bits will be used) */
68762 +} t_FmPcdKgExtractMask;
68763 +
68764 +/**************************************************************************//**
68765 + @Description   Parameters for defining default selection per groups of fields
68766 +*//***************************************************************************/
68767 +typedef struct t_FmPcdKgExtractDflt {
68768 +    e_FmPcdKgKnownFieldsDfltTypes       type;                /**< Default type select */
68769 +    e_FmPcdKgExtractDfltSelect          dfltSelect;          /**< Default register select */
68770 +} t_FmPcdKgExtractDflt;
68771 +
68772 +/**************************************************************************//**
68773 + @Description   Parameters for defining key extraction and hashing
68774 +*//***************************************************************************/
68775 +typedef struct t_FmPcdKgKeyExtractAndHashParams {
68776 +    uint32_t                    privateDflt0;                /**< Scheme default register 0 */
68777 +    uint32_t                    privateDflt1;                /**< Scheme default register 1 */
68778 +    uint8_t                     numOfUsedExtracts;           /**< defines the valid size of the following array */
68779 +    t_FmPcdExtractEntry         extractArray [FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY]; /**< An array of extractions definition. */
68780 +    uint8_t                     numOfUsedDflts;              /**< defines the valid size of the following array */
68781 +    t_FmPcdKgExtractDflt        dflts[FM_PCD_KG_NUM_OF_DEFAULT_GROUPS];
68782 +                                                             /**< For each extraction used in this scheme, specify the required
68783 +                                                                  default register to be used when header is not found.
68784 +                                                                  types not specified in this array will get undefined value. */
68785 +    uint8_t                     numOfUsedMasks;              /**< defines the valid size of the following array */
68786 +    t_FmPcdKgExtractMask        masks[FM_PCD_KG_NUM_OF_EXTRACT_MASKS];
68787 +    uint8_t                     hashShift;                   /**< hash result right shift. Select the 24 bits out of the 64 hash
68788 +                                                                  result. 0 means using the 24 LSB's, otherwise use the
68789 +                                                                  24 LSB's after shifting right.*/
68790 +    uint32_t                    hashDistributionNumOfFqids;  /**< must be > 1 and a power of 2. Represents the range
68791 +                                                                  of queues for the key and hash functionality */
68792 +    uint8_t                     hashDistributionFqidsShift;  /**< selects the FQID bits that will be effected by the hash */
68793 +    bool                        symmetricHash;               /**< TRUE to generate the same hash for frames with swapped source and
68794 +                                                                  destination fields on all layers; If TRUE, driver will check that for
68795 +                                                                  all layers, if SRC extraction is selected, DST extraction must also be
68796 +                                                                  selected, and vice versa. */
68797 +} t_FmPcdKgKeyExtractAndHashParams;
68798 +
68799 +/**************************************************************************//**
68800 + @Description   Parameters for defining a single FQID mask (extracted OR).
68801 +*//***************************************************************************/
68802 +typedef struct t_FmPcdKgExtractedOrParams {
68803 +    e_FmPcdExtractType              type;               /**< Extraction type select */
68804 +    union {
68805 +        struct {                                        /**< used when type = e_FM_PCD_KG_EXTRACT_BY_HDR */
68806 +            e_NetHeaderType         hdr;
68807 +            e_FmPcdHdrIndex         hdrIndex;           /**< Relevant only for MPLS, VLAN and tunneled
68808 +                                                             IP. Otherwise should be cleared.*/
68809 +            bool                    ignoreProtocolValidation;
68810 +                                                        /**< continue extraction even if protocol is not recognized */
68811 +        } extractByHdr;                                 /**< Header to extract by */
68812 +        e_FmPcdExtractFrom          src;                /**< used when type = e_FM_PCD_KG_EXTRACT_NON_HDR */
68813 +    };
68814 +    uint8_t                         extractionOffset;   /**< Offset for extraction (in bytes).  */
68815 +    e_FmPcdKgExtractDfltSelect      dfltValue;          /**< Select register from which extraction is taken if
68816 +                                                             field not found */
68817 +    uint8_t                         mask;               /**< Extraction mask (specified bits are used) */
68818 +    uint8_t                         bitOffsetInFqid;    /**< 0-31, Selects which bits of the 24 FQID bits to effect using
68819 +                                                             the extracted byte; Assume byte is placed as the 8 MSB's in
68820 +                                                             a 32 bit word where the lower bits
68821 +                                                             are the FQID; i.e if bitOffsetInFqid=1 than its LSB
68822 +                                                             will effect the FQID MSB, if bitOffsetInFqid=24 than the
68823 +                                                             extracted byte will effect the 8 LSB's of the FQID,
68824 +                                                             if bitOffsetInFqid=31 than the byte's MSB will effect
68825 +                                                             the FQID's LSB; 0 means - no effect on FQID;
68826 +                                                             Note that one, and only one of
68827 +                                                             bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
68828 +                                                             extracted byte must effect either FQID or Policer profile).*/
68829 +    uint8_t                         bitOffsetInPlcrProfile;
68830 +                                                        /**< 0-15, Selects which bits of the 8 policer profile id bits to
68831 +                                                             effect using the extracted byte; Assume byte is placed
68832 +                                                             as the 8 MSB's in a 16 bit word where the lower bits
68833 +                                                             are the policer profile id; i.e if bitOffsetInPlcrProfile=1
68834 +                                                             than its LSB will effect the profile MSB, if bitOffsetInFqid=8
68835 +                                                             than the extracted byte will effect the whole policer profile id,
68836 +                                                             if bitOffsetInFqid=15 than the byte's MSB will effect
68837 +                                                             the Policer Profile id's LSB;
68838 +                                                             0 means - no effect on policer profile; Note that one, and only one of
68839 +                                                             bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
68840 +                                                             extracted byte must effect either FQID or Policer profile).*/
68841 +} t_FmPcdKgExtractedOrParams;
68842 +
68843 +/**************************************************************************//**
68844 + @Description   Parameters for configuring a scheme counter
68845 +*//***************************************************************************/
68846 +typedef struct t_FmPcdKgSchemeCounter {
68847 +    bool        update;     /**< FALSE to keep the current counter state
68848 +                                 and continue from that point, TRUE to update/reset
68849 +                                 the counter when the scheme is written. */
68850 +    uint32_t    value;      /**< If update=TRUE, this value will be written into the
68851 +                                 counter. clear this field to reset the counter. */
68852 +} t_FmPcdKgSchemeCounter;
68853 +
68854 +/**************************************************************************//**
68855 + @Description   Parameters for configuring a policer profile for a KeyGen scheme
68856 +                (when policer is the next engine after this scheme).
68857 +*//***************************************************************************/
68858 +typedef struct t_FmPcdKgPlcrProfile {
68859 +    bool                sharedProfile;              /**< TRUE if this profile is shared between ports
68860 +                                                         (managed by master partition); Must not be TRUE
68861 +                                                         if profile is after Coarse Classification*/
68862 +    bool                direct;                     /**< if TRUE, directRelativeProfileId only selects the profile
68863 +                                                         id, if FALSE fqidOffsetRelativeProfileIdBase is used
68864 +                                                         together with fqidOffsetShift and numOfProfiles
68865 +                                                         parameters, to define a range of profiles from
68866 +                                                         which the KeyGen result will determine the
68867 +                                                         destination policer profile.  */
68868 +    union {
68869 +        uint16_t        directRelativeProfileId;    /**< Used if 'direct' is TRUE, to select policer profile.
68870 +                                                         should indicate the policer profile offset within the
68871 +                                                         port's policer profiles or shared window. */
68872 +        struct {
68873 +            uint8_t     fqidOffsetShift;            /**< Shift on the KeyGen create FQID offset (i.e. not the
68874 +                                                         final FQID - without the FQID base). */
68875 +            uint8_t     fqidOffsetRelativeProfileIdBase;
68876 +                                                    /**< The base of the FMan Port's relative Storage-Profile ID;
68877 +                                                         this value will be "OR'ed" with the KeyGen create FQID
68878 +                                                         offset (i.e. not the final FQID - without the FQID base);
68879 +                                                         the final result should indicate the Storage-Profile offset
68880 +                                                         within the FMan Port's relative Storage-Profiles window/
68881 +                                                         (or the SHARED window depends on 'sharedProfile'). */
68882 +            uint8_t     numOfProfiles;              /**< Range of profiles starting at base */
68883 +        } indirectProfile;                          /**< Indirect profile parameters */
68884 +    } profileSelect;                                /**< Direct/indirect profile selection and parameters */
68885 +} t_FmPcdKgPlcrProfile;
68886 +
68887 +#if (DPAA_VERSION >= 11)
68888 +/**************************************************************************//**
68889 + @Description   Parameters for configuring a storage profile for a KeyGen scheme.
68890 +*//***************************************************************************/
68891 +typedef struct t_FmPcdKgStorageProfile {
68892 +    bool                direct;                     /**< If TRUE, directRelativeProfileId only selects the
68893 +                                                         profile id;
68894 +                                                         If FALSE, fqidOffsetRelativeProfileIdBase is used
68895 +                                                         together with fqidOffsetShift and numOfProfiles
68896 +                                                         parameters to define a range of profiles from which
68897 +                                                         the KeyGen result will determine the destination
68898 +                                                         storage profile. */
68899 +    union {
68900 +        uint16_t        directRelativeProfileId;    /**< Used when 'direct' is TRUE, to select a storage profile;
68901 +                                                         should indicate the storage profile offset within the
68902 +                                                         port's storage profiles window. */
68903 +        struct {
68904 +            uint8_t     fqidOffsetShift;            /**< Shift on the KeyGen create FQID offset (i.e. not the
68905 +                                                         final FQID - without the FQID base). */
68906 +            uint8_t     fqidOffsetRelativeProfileIdBase;
68907 +                                                    /**< The base of the FMan Port's relative Storage-Profile ID;
68908 +                                                         this value will be "OR'ed" with the KeyGen create FQID
68909 +                                                         offset (i.e. not the final FQID - without the FQID base);
68910 +                                                         the final result should indicate the Storage-Profile offset
68911 +                                                         within the FMan Port's relative Storage-Profiles window. */
68912 +            uint8_t     numOfProfiles;              /**< Range of profiles starting at base. */
68913 +        } indirectProfile;                          /**< Indirect profile parameters. */
68914 +    } profileSelect;                                /**< Direct/indirect profile selection and parameters. */
68915 +} t_FmPcdKgStorageProfile;
68916 +#endif /* (DPAA_VERSION >= 11) */
68917 +
68918 +/**************************************************************************//**
68919 + @Description   Parameters for defining CC as the next engine after KeyGen
68920 +*//***************************************************************************/
68921 +typedef struct t_FmPcdKgCc {
68922 +    t_Handle                h_CcTree;                       /**< A handle to a CC Tree */
68923 +    uint8_t                 grpId;                          /**< CC group id within the CC tree */
68924 +    bool                    plcrNext;                       /**< TRUE if after CC, in case of data frame,
68925 +                                                                 policing is required. */
68926 +    bool                    bypassPlcrProfileGeneration;    /**< TRUE to bypass KeyGen policer profile generation;
68927 +                                                                 selected profile is the one set at port initialization. */
68928 +    t_FmPcdKgPlcrProfile    plcrProfile;                    /**< Valid only if plcrNext = TRUE and
68929 +                                                                 bypassPlcrProfileGeneration = FALSE */
68930 +} t_FmPcdKgCc;
68931 +
68932 +/**************************************************************************//**
68933 + @Description   Parameters for defining initializing a KeyGen scheme
68934 +*//***************************************************************************/
68935 +typedef struct t_FmPcdKgSchemeParams {
68936 +    bool                                modify;                 /**< TRUE to change an existing scheme */
68937 +    union
68938 +    {
68939 +        uint8_t                         relativeSchemeId;       /**< if modify=FALSE:Partition relative scheme id */
68940 +        t_Handle                        h_Scheme;               /**< if modify=TRUE: a handle of the existing scheme */
68941 +    } id;
68942 +    bool                                alwaysDirect;           /**< This scheme is reached only directly, i.e. no need
68943 +                                                                     for match vector; KeyGen will ignore it when matching */
68944 +    struct {                                                    /**< HL Relevant only if alwaysDirect = FALSE */
68945 +        t_Handle                        h_NetEnv;               /**< A handle to the Network environment as returned
68946 +                                                                     by FM_PCD_NetEnvCharacteristicsSet() */
68947 +        uint8_t                         numOfDistinctionUnits;  /**< Number of NetEnv units listed in unitIds array */
68948 +        uint8_t                         unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
68949 +                                                                /**< Indexes as passed to SetNetEnvCharacteristics array*/
68950 +    } netEnvParams;
68951 +    bool                                useHash;                /**< use the KeyGen Hash functionality  */
68952 +    t_FmPcdKgKeyExtractAndHashParams    keyExtractAndHashParams;
68953 +                                                                /**< used only if useHash = TRUE */
68954 +    bool                                bypassFqidGeneration;   /**< Normally - FALSE, TRUE to avoid FQID update in the IC;
68955 +                                                                     In such a case FQID after KeyGen will be the default FQID
68956 +                                                                     defined for the relevant port, or the FQID defined by CC
68957 +                                                                     in cases where CC was the previous engine. */
68958 +    uint32_t                            baseFqid;               /**< Base FQID; Relevant only if bypassFqidGeneration = FALSE;
68959 +                                                                     If hash is used and an even distribution is expected
68960 +                                                                     according to hashDistributionNumOfFqids, baseFqid must be aligned to
68961 +                                                                     hashDistributionNumOfFqids. */
68962 +    uint8_t                             numOfUsedExtractedOrs;  /**< Number of FQID masks listed in extractedOrs array */
68963 +    t_FmPcdKgExtractedOrParams          extractedOrs[FM_PCD_KG_NUM_OF_GENERIC_REGS];
68964 +                                                                /**< FM_PCD_KG_NUM_OF_GENERIC_REGS
68965 +                                                                     registers are shared between qidMasks
68966 +                                                                     functionality and some of the extraction
68967 +                                                                     actions; Normally only some will be used
68968 +                                                                     for qidMask. Driver will return error if
68969 +                                                                     resource is full at initialization time. */
68970 +
68971 +#if (DPAA_VERSION >= 11)
68972 +    bool                                overrideStorageProfile; /**< TRUE if KeyGen override previously decided storage profile */
68973 +    t_FmPcdKgStorageProfile             storageProfile;         /**< Used when overrideStorageProfile TRUE */
68974 +#endif /* (DPAA_VERSION >= 11) */
68975 +
68976 +    e_FmPcdEngine                       nextEngine;             /**< may be BMI, PLCR or CC */
68977 +    union {                                                     /**< depends on nextEngine */
68978 +        e_FmPcdDoneAction               doneAction;             /**< Used when next engine is BMI (done) */
68979 +        t_FmPcdKgPlcrProfile            plcrProfile;            /**< Used when next engine is PLCR */
68980 +        t_FmPcdKgCc                     cc;                     /**< Used when next engine is CC */
68981 +    } kgNextEngineParams;
68982 +    t_FmPcdKgSchemeCounter              schemeCounter;          /**< A structure of parameters for updating
68983 +                                                                     the scheme counter */
68984 +} t_FmPcdKgSchemeParams;
68985 +
68986 +/**************************************************************************//**
68987 + @Collection    Definitions for CC statistics
68988 +*//***************************************************************************/
68989 +#if (DPAA_VERSION >= 11)
68990 +#define FM_PCD_CC_STATS_MAX_NUM_OF_FLR      10  /* Maximal supported number of frame length ranges */
68991 +#define FM_PCD_CC_STATS_FLR_SIZE            2   /* Size in bytes of a frame length range limit */
68992 +#endif /* (DPAA_VERSION >= 11) */
68993 +#define FM_PCD_CC_STATS_COUNTER_SIZE        4   /* Size in bytes of a frame length range counter */
68994 +/* @} */
68995 +
68996 +/**************************************************************************//**
68997 + @Description   Parameters for defining CC as the next engine after a CC node.
68998 +*//***************************************************************************/
68999 +typedef struct t_FmPcdCcNextCcParams {
69000 +    t_Handle    h_CcNode;               /**< A handle of the next CC node */
69001 +} t_FmPcdCcNextCcParams;
69002 +
69003 +#if (DPAA_VERSION >= 11)
69004 +/**************************************************************************//**
69005 + @Description   Parameters for defining Frame replicator as the next engine after a CC node.
69006 +*//***************************************************************************/
69007 +typedef struct t_FmPcdCcNextFrParams {
69008 +    t_Handle    h_FrmReplic;               /**< A handle of the next frame replicator group */
69009 +} t_FmPcdCcNextFrParams;
69010 +#endif /* (DPAA_VERSION >= 11) */
69011 +
69012 +/**************************************************************************//**
69013 + @Description   Parameters for defining Policer as the next engine after a CC node.
69014 +*//***************************************************************************/
69015 +typedef struct t_FmPcdCcNextPlcrParams {
69016 +    bool        overrideParams;         /**< TRUE if CC override previously decided parameters*/
69017 +    bool        sharedProfile;          /**< Relevant only if overrideParams=TRUE:
69018 +                                             TRUE if this profile is shared between ports */
69019 +    uint16_t    newRelativeProfileId;   /**< Relevant only if overrideParams=TRUE:
69020 +                                             (otherwise profile id is taken from KeyGen);
69021 +                                             This parameter should indicate the policer
69022 +                                             profile offset within the port's
69023 +                                             policer profiles or from SHARED window.*/
69024 +    uint32_t    newFqid;                /**< Relevant only if overrideParams=TRUE:
69025 +                                             FQID for enqueuing the frame;
69026 +                                             In earlier chips  if policer next engine is KEYGEN,
69027 +                                             this parameter can be 0, because the KEYGEN
69028 +                                             always decides the enqueue FQID.*/
69029 +#if (DPAA_VERSION >= 11)
69030 +    uint8_t     newRelativeStorageProfileId;
69031 +                                        /**< Indicates the relative storage profile offset within
69032 +                                             the port's storage profiles window;
69033 +                                             Relevant only if the port was configured with VSP. */
69034 +#endif /* (DPAA_VERSION >= 11) */
69035 +} t_FmPcdCcNextPlcrParams;
69036 +
69037 +/**************************************************************************//**
69038 + @Description   Parameters for defining enqueue as the next action after a CC node.
69039 +*//***************************************************************************/
69040 +typedef struct t_FmPcdCcNextEnqueueParams {
69041 +    e_FmPcdDoneAction    action;        /**< Action - when next engine is BMI (done) */
69042 +    bool                 overrideFqid;  /**< TRUE if CC override previously decided fqid and vspid,
69043 +                                             relevant if action = e_FM_PCD_ENQ_FRAME */
69044 +    uint32_t             newFqid;       /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
69045 +                                             (otherwise FQID is taken from KeyGen),
69046 +                                             relevant if action = e_FM_PCD_ENQ_FRAME */
69047 +#if (DPAA_VERSION >= 11)
69048 +    uint8_t              newRelativeStorageProfileId;
69049 +                                        /**< Valid if overrideFqid=TRUE, Indicates the relative virtual
69050 +                                             storage profile offset within the port's storage profiles
69051 +                                             window; Relevant only if the port was configured with VSP. */
69052 +#endif /* (DPAA_VERSION >= 11) */
69053 +} t_FmPcdCcNextEnqueueParams;
69054 +
69055 +/**************************************************************************//**
69056 + @Description   Parameters for defining KeyGen as the next engine after a CC node.
69057 +*//***************************************************************************/
69058 +typedef struct t_FmPcdCcNextKgParams {
69059 +    bool        overrideFqid;           /**< TRUE if CC override previously decided fqid and vspid,
69060 +                                             Note - this parameters irrelevant for earlier chips */
69061 +    uint32_t    newFqid;                /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
69062 +                                             (otherwise FQID is taken from KeyGen),
69063 +                                             Note - this parameters irrelevant for earlier chips */
69064 +#if (DPAA_VERSION >= 11)
69065 +    uint8_t     newRelativeStorageProfileId;
69066 +                                        /**< Valid if overrideFqid=TRUE, Indicates the relative virtual
69067 +                                             storage profile offset within the port's storage profiles
69068 +                                             window; Relevant only if the port was configured with VSP. */
69069 +#endif /* (DPAA_VERSION >= 11) */
69070 +
69071 +    t_Handle    h_DirectScheme;         /**< Direct scheme handle to go to. */
69072 +} t_FmPcdCcNextKgParams;
69073 +
69074 +/**************************************************************************//**
69075 + @Description   Parameters for defining the next engine after a CC node.
69076 +*//***************************************************************************/
69077 +typedef struct t_FmPcdCcNextEngineParams {
69078 +    e_FmPcdEngine                       nextEngine;     /**< User has to initialize parameters
69079 +                                                             according to nextEngine definition */
69080 +    union {
69081 +        t_FmPcdCcNextCcParams           ccParams;       /**< Parameters in case next engine is CC */
69082 +        t_FmPcdCcNextPlcrParams         plcrParams;     /**< Parameters in case next engine is PLCR */
69083 +        t_FmPcdCcNextEnqueueParams      enqueueParams;  /**< Parameters in case next engine is BMI */
69084 +        t_FmPcdCcNextKgParams           kgParams;       /**< Parameters in case next engine is KG */
69085 +#if (DPAA_VERSION >= 11)
69086 +        t_FmPcdCcNextFrParams           frParams;       /**< Parameters in case next engine is FR */
69087 +#endif /* (DPAA_VERSION >= 11) */
69088 +    } params;                                           /**< union used for all the next-engine parameters options */
69089 +
69090 +    t_Handle                            h_Manip;        /**< Handle to Manipulation object.
69091 +                                                             Relevant if next engine is of type result
69092 +                                                             (e_FM_PCD_PLCR, e_FM_PCD_KG, e_FM_PCD_DONE) */
69093 +
69094 +    bool                                statisticsEn;   /**< If TRUE, statistics counters are incremented
69095 +                                                             for each frame passing through this
69096 +                                                             Coarse Classification entry. */
69097 +} t_FmPcdCcNextEngineParams;
69098 +
69099 +/**************************************************************************//**
69100 + @Description   Parameters for defining a single CC key
69101 +*//***************************************************************************/
69102 +typedef struct t_FmPcdCcKeyParams {
69103 +    uint8_t                     *p_Key;     /**< Relevant only if 'action' = e_FM_PCD_ACTION_EXACT_MATCH;
69104 +                                                 pointer to the key of the size defined in keySize */
69105 +    uint8_t                     *p_Mask;    /**< Relevant only if 'action' = e_FM_PCD_ACTION_EXACT_MATCH;
69106 +                                                 pointer to the Mask per key  of the size defined
69107 +                                                 in keySize. p_Key and p_Mask (if defined) has to be
69108 +                                                 of the same size defined in the keySize;
69109 +                                                 NOTE that if this value is equal for all entries whithin
69110 +                                                 this table, the driver will automatically use global-mask
69111 +                                                 (i.e. one common mask for all entries) instead of private
69112 +                                                 one; that is done in order to spare some memory and for
69113 +                                                 better performance. */
69114 +    t_FmPcdCcNextEngineParams   ccNextEngineParams;
69115 +                                            /**< parameters for the next for the defined Key in
69116 +                                                 the p_Key */
69117 +} t_FmPcdCcKeyParams;
69118 +
69119 +/**************************************************************************//**
69120 + @Description   Parameters for defining CC keys parameters
69121 +                The driver supports two methods for CC node allocation: dynamic and static.
69122 +                Static mode was created in order to prevent runtime alloc/free
69123 +                of FMan memory (MURAM), which may cause fragmentation; in this mode,
69124 +                the driver automatically allocates the memory according to
69125 +                'maxNumOfKeys' parameter. The driver calculates the maximal memory
69126 +                size that may be used for this CC-Node taking into consideration
69127 +                'maskSupport' and 'statisticsMode' parameters.
69128 +                When 'action' = e_FM_PCD_ACTION_INDEXED_LOOKUP in the extraction
69129 +                parameters of this node, 'maxNumOfKeys' must be equal to 'numOfKeys'.
69130 +                In dynamic mode, 'maxNumOfKeys' must be zero. At initialization,
69131 +                all required structures are allocated according to 'numOfKeys'
69132 +                parameter. During runtime modification, these structures are
69133 +                re-allocated according to the updated number of keys.
69134 +
69135 +                Please note that 'action' and 'icIndxMask' mentioned in the
69136 +                specific parameter explanations are passed in the extraction
69137 +                parameters of the node (fields of extractCcParams.extractNonHdr).
69138 +*//***************************************************************************/
69139 +typedef struct t_KeysParams {
69140 +    uint16_t                    maxNumOfKeys;   /**< Maximum number of keys that will (ever) be used in this CC-Node;
69141 +                                                     A value of zero may be used for dynamic memory allocation. */
69142 +    bool                        maskSupport;    /**< This parameter is relevant only if a node is initialized with
69143 +                                                     'action' = e_FM_PCD_ACTION_EXACT_MATCH and maxNumOfKeys > 0;
69144 +                                                     Should be TRUE to reserve table memory for key masks, even if
69145 +                                                     initial keys do not contain masks, or if the node was initialized
69146 +                                                     as 'empty' (without keys); this will allow user to add keys with
69147 +                                                     masks at runtime.
69148 +                                                     NOTE that if user want to use only global-masks (i.e. one common mask
69149 +                                                     for all the entries within this table, this parameter should set to 'FALSE'. */
69150 +    e_FmPcdCcStatsMode          statisticsMode; /**< Determines the supported statistics mode for all node's keys.
69151 +                                                     To enable statistics gathering, statistics should be enabled per
69152 +                                                     every key, using 'statisticsEn' in next engine parameters structure
69153 +                                                     of that key;
69154 +                                                     If 'maxNumOfKeys' is set, all required structures will be
69155 +                                                     preallocated for all keys. */
69156 +#if (DPAA_VERSION >= 11)
69157 +    uint16_t                    frameLengthRanges[FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
69158 +                                                /**< Relevant only for 'RMON' statistics mode
69159 +                                                     (this feature is supported only on B4860 device);
69160 +                                                     Holds a list of programmable thresholds - for each received frame,
69161 +                                                     its length in bytes is examined against these range thresholds and
69162 +                                                     the appropriate counter is incremented by 1 - for example, to belong
69163 +                                                     to range i, the following should hold:
69164 +                                                     range i-1 threshold < frame length <= range i threshold
69165 +                                                     Each range threshold must be larger then its preceding range
69166 +                                                     threshold, and last range threshold must be 0xFFFF. */
69167 +#endif /* (DPAA_VERSION >= 11) */
69168 +    uint16_t                    numOfKeys;      /**< Number of initial keys;
69169 +                                                     Note that in case of 'action' = e_FM_PCD_ACTION_INDEXED_LOOKUP,
69170 +                                                     this field should be power-of-2 of the number of bits that are
69171 +                                                     set in 'icIndxMask'. */
69172 +    uint8_t                     keySize;        /**< Size of key - for extraction of type FULL_FIELD, 'keySize' has
69173 +                                                     to be the standard size of the selected key; For other extraction
69174 +                                                     types, 'keySize' has to be as size of extraction; When 'action' =
69175 +                                                     e_FM_PCD_ACTION_INDEXED_LOOKUP, 'keySize' must be 2. */
69176 +    t_FmPcdCcKeyParams          keyParams[FM_PCD_MAX_NUM_OF_KEYS];
69177 +                                                /**< An array with 'numOfKeys' entries, each entry specifies the
69178 +                                                     corresponding key parameters;
69179 +                                                     When 'action' = e_FM_PCD_ACTION_EXACT_MATCH, this value must not
69180 +                                                     exceed 255 (FM_PCD_MAX_NUM_OF_KEYS-1) as the last entry is saved
69181 +                                                     for the 'miss' entry. */
69182 +    t_FmPcdCcNextEngineParams   ccNextEngineParamsForMiss;
69183 +                                                /**< Parameters for defining the next engine when a key is not matched;
69184 +                                                     Not relevant if action = e_FM_PCD_ACTION_INDEXED_LOOKUP. */
69185 +} t_KeysParams;
69186 +
69187 +
69188 +/**************************************************************************//**
69189 + @Description   Parameters for defining a CC node
69190 +*//***************************************************************************/
69191 +typedef struct t_FmPcdCcNodeParams {
69192 +    t_FmPcdExtractEntry         extractCcParams;    /**< Extraction parameters */
69193 +    t_KeysParams                keysParams;         /**< Keys definition matching the selected extraction */
69194 +} t_FmPcdCcNodeParams;
69195 +
69196 +/**************************************************************************//**
69197 + @Description   Parameters for defining a hash table
69198 +*//***************************************************************************/
69199 +typedef struct t_FmPcdHashTableParams {
69200 +    uint16_t                    maxNumOfKeys;               /**< Maximum Number Of Keys that will (ever) be used in this Hash-table */
69201 +    e_FmPcdCcStatsMode          statisticsMode;             /**< If not e_FM_PCD_CC_STATS_MODE_NONE, the required structures for the
69202 +                                                                 requested statistics mode will be allocated according to maxNumOfKeys. */
69203 +    uint8_t                     kgHashShift;                /**< KG-Hash-shift as it was configured in the KG-scheme
69204 +                                                                 that leads to this hash-table. */
69205 +    uint16_t                    hashResMask;                /**< Mask that will be used on the hash-result;
69206 +                                                                 The number-of-sets for this hash will be calculated
69207 +                                                                 as (2^(number of bits set in 'hashResMask'));
69208 +                                                                 The 4 lower bits must be cleared. */
69209 +    uint8_t                     hashShift;                  /**< Byte offset from the beginning of the KeyGen hash result to the
69210 +                                                                 2-bytes to be used as hash index. */
69211 +    uint8_t                     matchKeySize;               /**< Size of the exact match keys held by the hash buckets */
69212 +
69213 +    t_FmPcdCcNextEngineParams   ccNextEngineParamsForMiss;  /**< Parameters for defining the next engine when a key is not matched */
69214 +
69215 +} t_FmPcdHashTableParams;
69216 +
69217 +/**************************************************************************//**
69218 + @Description   Parameters for defining a CC tree group.
69219 +
69220 +                This structure defines a CC group in terms of NetEnv units
69221 +                and the action to be taken in each case. The unitIds list must
69222 +                be given in order from low to high indices.
69223 +
69224 +                t_FmPcdCcNextEngineParams is a list of 2^numOfDistinctionUnits
69225 +                structures where each defines the next action to be taken for
69226 +                each units combination. for example:
69227 +                numOfDistinctionUnits = 2
69228 +                unitIds = {1,3}
69229 +                p_NextEnginePerEntriesInGrp[0] = t_FmPcdCcNextEngineParams for the case that
69230 +                                                        unit 1 - not found; unit 3 - not found;
69231 +                p_NextEnginePerEntriesInGrp[1] = t_FmPcdCcNextEngineParams for the case that
69232 +                                                        unit 1 - not found; unit 3 - found;
69233 +                p_NextEnginePerEntriesInGrp[2] = t_FmPcdCcNextEngineParams for the case that
69234 +                                                        unit 1 - found; unit 3 - not found;
69235 +                p_NextEnginePerEntriesInGrp[3] = t_FmPcdCcNextEngineParams for the case that
69236 +                                                        unit 1 - found; unit 3 - found;
69237 +*//***************************************************************************/
69238 +typedef struct t_FmPcdCcGrpParams {
69239 +    uint8_t                     numOfDistinctionUnits;          /**< Up to 4 */
69240 +    uint8_t                     unitIds[FM_PCD_MAX_NUM_OF_CC_UNITS];
69241 +                                                                /**< Indices of the units as defined in
69242 +                                                                     FM_PCD_NetEnvCharacteristicsSet() */
69243 +    t_FmPcdCcNextEngineParams   nextEnginePerEntriesInGrp[FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP];
69244 +                                                                /**< Maximum entries per group is 16 */
69245 +} t_FmPcdCcGrpParams;
69246 +
69247 +/**************************************************************************//**
69248 + @Description   Parameters for defining CC tree groups
69249 +*//***************************************************************************/
69250 +typedef struct t_FmPcdCcTreeParams {
69251 +    t_Handle                h_NetEnv;                   /**< A handle to the Network environment as returned
69252 +                                                             by FM_PCD_NetEnvCharacteristicsSet() */
69253 +    uint8_t                 numOfGrps;                  /**< Number of CC groups within the CC tree */
69254 +    t_FmPcdCcGrpParams      ccGrpParams[FM_PCD_MAX_NUM_OF_CC_GROUPS];
69255 +                                                        /**< Parameters for each group. */
69256 +} t_FmPcdCcTreeParams;
69257 +
69258 +
69259 +/**************************************************************************//**
69260 + @Description   CC key statistics structure
69261 +*//***************************************************************************/
69262 +typedef struct t_FmPcdCcKeyStatistics {
69263 +    uint32_t    byteCount;      /**< This counter reflects byte count of frames that
69264 +                                     were matched by this key. */
69265 +    uint32_t    frameCount;     /**< This counter reflects count of frames that
69266 +                                     were matched by this key. */
69267 +#if (DPAA_VERSION >= 11)
69268 +    uint32_t    frameLengthRangeCount[FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
69269 +                                /**< These counters reflect how many frames matched
69270 +                                     this key in 'RMON' statistics mode:
69271 +                                     Each counter holds the number of frames of a
69272 +                                     specific frames length range, according to the
69273 +                                     ranges provided at initialization. */
69274 +#endif /* (DPAA_VERSION >= 11) */
69275 +} t_FmPcdCcKeyStatistics;
69276 +
69277 +/**************************************************************************//**
69278 + @Description   Parameters for defining policer byte rate
69279 +*//***************************************************************************/
69280 +typedef struct t_FmPcdPlcrByteRateModeParams {
69281 +    e_FmPcdPlcrFrameLengthSelect    frameLengthSelection;   /**< Frame length selection */
69282 +    e_FmPcdPlcrRollBackFrameSelect  rollBackFrameSelection; /**< relevant option only e_FM_PCD_PLCR_L2_FRM_LEN,
69283 +                                                                 e_FM_PCD_PLCR_FULL_FRM_LEN */
69284 +} t_FmPcdPlcrByteRateModeParams;
69285 +
69286 +/**************************************************************************//**
69287 + @Description   Parameters for defining the policer profile (based on
69288 +                RFC-2698 or RFC-4115 attributes).
69289 +*//***************************************************************************/
69290 +typedef struct t_FmPcdPlcrNonPassthroughAlgParams {
69291 +    e_FmPcdPlcrRateMode              rateMode;                       /**< Byte mode or Packet mode */
69292 +    t_FmPcdPlcrByteRateModeParams    byteModeParams;                 /**< Valid for Byte NULL for Packet */
69293 +    uint32_t                         committedInfoRate;              /**< KBits/Second or Packets/Second */
69294 +    uint32_t                         committedBurstSize;             /**< Bytes/Packets */
69295 +    uint32_t                         peakOrExcessInfoRate;           /**< KBits/Second or Packets/Second */
69296 +    uint32_t                         peakOrExcessBurstSize;          /**< Bytes/Packets */
69297 +} t_FmPcdPlcrNonPassthroughAlgParams;
69298 +
69299 +/**************************************************************************//**
69300 + @Description   Parameters for defining the next engine after policer
69301 +*//***************************************************************************/
69302 +typedef union u_FmPcdPlcrNextEngineParams {
69303 +    e_FmPcdDoneAction               action;             /**< Action - when next engine is BMI (done) */
69304 +    t_Handle                        h_Profile;          /**< Policer profile handle -  used when next engine
69305 +                                                             is Policer, must be a SHARED profile */
69306 +    t_Handle                        h_DirectScheme;     /**< Direct scheme select - when next engine is KeyGen */
69307 +} u_FmPcdPlcrNextEngineParams;
69308 +
69309 +/**************************************************************************//**
69310 + @Description   Parameters for defining the policer profile entry
69311 +*//***************************************************************************/
69312 +typedef struct t_FmPcdPlcrProfileParams {
69313 +    bool                                modify;                     /**< TRUE to change an existing profile */
69314 +    union {
69315 +        struct {
69316 +            e_FmPcdProfileTypeSelection profileType;                /**< Type of policer profile */
69317 +            t_Handle                    h_FmPort;                   /**< Relevant for per-port profiles only */
69318 +            uint16_t                    relativeProfileId;          /**< Profile id - relative to shared group or to port */
69319 +        } newParams;                                                /**< use it when modify = FALSE */
69320 +        t_Handle                        h_Profile;                  /**< A handle to a profile - use it when modify=TRUE */
69321 +    } id;
69322 +    e_FmPcdPlcrAlgorithmSelection       algSelection;               /**< Profile Algorithm PASS_THROUGH, RFC_2698, RFC_4115 */
69323 +    e_FmPcdPlcrColorMode                colorMode;                  /**< COLOR_BLIND, COLOR_AWARE */
69324 +
69325 +    union {
69326 +        e_FmPcdPlcrColor                dfltColor;                  /**< For Color-Blind Pass-Through mode; the policer will re-color
69327 +                                                                         any incoming packet with the default value. */
69328 +        e_FmPcdPlcrColor                override;                   /**< For Color-Aware modes; the profile response to a
69329 +                                                                         pre-color value of 2'b11. */
69330 +    } color;
69331 +
69332 +    t_FmPcdPlcrNonPassthroughAlgParams  nonPassthroughAlgParams;    /**< RFC2698 or RFC4115 parameters */
69333 +
69334 +    e_FmPcdEngine                       nextEngineOnGreen;          /**< Next engine for green-colored frames */
69335 +    u_FmPcdPlcrNextEngineParams         paramsOnGreen;              /**< Next engine parameters for green-colored frames  */
69336 +
69337 +    e_FmPcdEngine                       nextEngineOnYellow;         /**< Next engine for yellow-colored frames */
69338 +    u_FmPcdPlcrNextEngineParams         paramsOnYellow;             /**< Next engine parameters for yellow-colored frames  */
69339 +
69340 +    e_FmPcdEngine                       nextEngineOnRed;            /**< Next engine for red-colored frames */
69341 +    u_FmPcdPlcrNextEngineParams         paramsOnRed;                /**< Next engine parameters for red-colored frames  */
69342 +
69343 +    bool                                trapProfileOnFlowA;         /**< Obsolete - do not use */
69344 +    bool                                trapProfileOnFlowB;         /**< Obsolete - do not use */
69345 +    bool                                trapProfileOnFlowC;         /**< Obsolete - do not use */
69346 +} t_FmPcdPlcrProfileParams;
69347 +
69348 +/**************************************************************************//**
69349 + @Description   Parameters for selecting a location for requested manipulation
69350 +*//***************************************************************************/
69351 +typedef struct t_FmManipHdrInfo {
69352 +    e_NetHeaderType                     hdr;            /**< Header selection */
69353 +    e_FmPcdHdrIndex                     hdrIndex;       /**< Relevant only for MPLS, VLAN and tunneled IP. Otherwise should be cleared. */
69354 +    bool                                byField;        /**< TRUE if the location of manipulation is according to some field in the specific header*/
69355 +    t_FmPcdFields                       fullField;      /**< Relevant only when byField = TRUE: Extract field */
69356 +} t_FmManipHdrInfo;
69357 +
69358 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
69359 +/**************************************************************************//**
69360 + @Description   Parameters for defining an insertion manipulation
69361 +                of type e_FM_PCD_MANIP_INSRT_TO_START_OF_FRAME_TEMPLATE
69362 +*//***************************************************************************/
69363 +typedef struct t_FmPcdManipHdrInsrtByTemplateParams {
69364 +    uint8_t         size;                               /**< Size of insert template to the start of the frame. */
69365 +    uint8_t         hdrTemplate[FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE];
69366 +                                                        /**< Array of the insertion template. */
69367 +
69368 +    bool            modifyOuterIp;                      /**< TRUE if user want to modify some fields in outer IP. */
69369 +    struct {
69370 +        uint16_t    ipOuterOffset;                      /**< Offset of outer IP in the insert template, relevant if modifyOuterIp = TRUE.*/
69371 +        uint16_t    dscpEcn;                            /**< value of dscpEcn in IP outer, relevant if modifyOuterIp = TRUE.
69372 +                                                             in IPV4 dscpEcn only byte - it has to be adjusted to the right*/
69373 +        bool        udpPresent;                         /**< TRUE if UDP is present in the insert template, relevant if modifyOuterIp = TRUE.*/
69374 +        uint8_t     udpOffset;                          /**< Offset in the insert template of UDP, relevant if modifyOuterIp = TRUE and udpPresent=TRUE.*/
69375 +        uint8_t     ipIdentGenId;                       /**< Used by FMan-CTRL to calculate IP-identification field,relevant if modifyOuterIp = TRUE.*/
69376 +        bool        recalculateLength;                  /**< TRUE if recalculate length has to be performed due to the engines in the path which can change the frame later, relevant if modifyOuterIp = TRUE.*/
69377 +        struct {
69378 +            uint8_t blockSize;                          /**< The CAAM block-size; Used by FMan-CTRL to calculate the IP Total Length field.*/
69379 +            uint8_t extraBytesAddedAlignedToBlockSize;  /**< Used by FMan-CTRL to calculate the IP Total Length field and UDP length*/
69380 +            uint8_t extraBytesAddedNotAlignedToBlockSize;/**< Used by FMan-CTRL to calculate the IP Total Length field and UDP length.*/
69381 +        } recalculateLengthParams;                      /**< Recalculate length parameters - relevant if modifyOuterIp = TRUE and recalculateLength = TRUE */
69382 +    } modifyOuterIpParams;                              /**< Outer IP modification parameters - ignored if modifyOuterIp is FALSE */
69383 +
69384 +    bool            modifyOuterVlan;                    /**< TRUE if user wants to modify VPri field in the outer VLAN header*/
69385 +    struct {
69386 +        uint8_t     vpri;                               /**< Value of VPri, relevant if modifyOuterVlan = TRUE
69387 +                                                             VPri only 3 bits, it has to be adjusted to the right*/
69388 +    } modifyOuterVlanParams;
69389 +} t_FmPcdManipHdrInsrtByTemplateParams;
69390 +
69391 +/**************************************************************************//**
69392 + @Description   Parameters for defining CAPWAP fragmentation
69393 +*//***************************************************************************/
69394 +typedef struct t_CapwapFragmentationParams {
69395 +    uint16_t         sizeForFragmentation;              /**< if length of the frame is greater than this value, CAPWAP fragmentation will be executed.*/
69396 +    bool             headerOptionsCompr;                /**< TRUE - first fragment include the CAPWAP header options field,
69397 +                                                             and all other fragments exclude the CAPWAP options field,
69398 +                                                             FALSE - all fragments include CAPWAP header options field. */
69399 +} t_CapwapFragmentationParams;
69400 +
69401 +/**************************************************************************//**
69402 + @Description   Parameters for defining CAPWAP reassembly
69403 +*//***************************************************************************/
69404 +typedef struct t_CapwapReassemblyParams {
69405 +    uint16_t                        maxNumFramesInProcess;  /**< Number of frames which can be reassembled concurrently; must be power of 2.
69406 +                                                                 In case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
69407 +                                                                 maxNumFramesInProcess has to be in the range of 4 - 512,
69408 +                                                                 In case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
69409 +                                                                 maxNumFramesInProcess has to be in the range of 8 - 2048 */
69410 +    bool                            haltOnDuplicationFrag;  /**< If TRUE, reassembly process will be halted due to duplicated fragment,
69411 +                                                                 and all processed fragments will be enqueued with error indication;
69412 +                                                                 If FALSE, only duplicated fragments will be enqueued with error indication. */
69413 +
69414 +    e_FmPcdManipReassemTimeOutMode  timeOutMode;            /**< Expiration delay initialized by the reassembly process */
69415 +    uint32_t                        fqidForTimeOutFrames;   /**< FQID in which time out frames will enqueue during Time Out Process  */
69416 +    uint32_t                        timeoutRoutineRequestTime;
69417 +                                                            /**< Represents the time interval in microseconds between consecutive
69418 +                                                                 timeout routine requests It has to be power of 2. */
69419 +    uint32_t                        timeoutThresholdForReassmProcess;
69420 +                                                            /**< Time interval (microseconds) for marking frames in process as too old;
69421 +                                                                 Frames in process are those for which at least one fragment was received
69422 +                                                                 but not all fragments. */
69423 +
69424 +    e_FmPcdManipReassemWaysNumber   numOfFramesPerHashEntry;/**< Number of frames per hash entry (needed for the reassembly process) */
69425 +} t_CapwapReassemblyParams;
69426 +
69427 +/**************************************************************************//**
69428 + @Description   Parameters for defining fragmentation/reassembly manipulation
69429 +*//***************************************************************************/
69430 +typedef struct t_FmPcdManipFragOrReasmParams {
69431 +    bool                                frag;               /**< TRUE if using the structure for fragmentation,
69432 +                                                                 otherwise this structure is used for reassembly */
69433 +    uint8_t                             sgBpid;             /**< Scatter/Gather buffer pool id;
69434 +                                                                 Same LIODN number is used for these buffers as for
69435 +                                                                 the received frames buffers, so buffers of this pool
69436 +                                                                 need to be allocated in the same memory area as the
69437 +                                                                 received buffers. If the received buffers arrive
69438 +                                                                 from different sources, the Scatter/Gather BP id
69439 +                                                                 should be mutual to all these sources. */
69440 +    e_NetHeaderType                     hdr;                /**< Header selection */
69441 +    union {
69442 +        t_CapwapFragmentationParams     capwapFragParams;   /**< Structure for CAPWAP fragmentation,
69443 +                                                                 relevant if 'frag' = TRUE, 'hdr' = HEADER_TYPE_CAPWAP */
69444 +        t_CapwapReassemblyParams        capwapReasmParams;  /**< Structure for CAPWAP reassembly,
69445 +                                                                 relevant if 'frag' = FALSE, 'hdr' = HEADER_TYPE_CAPWAP */
69446 +    } u;
69447 +} t_FmPcdManipFragOrReasmParams;
69448 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
69449 +
69450 +
69451 +/**************************************************************************//**
69452 + @Description   Parameters for defining header removal by header type
69453 +*//***************************************************************************/
69454 +typedef struct t_FmPcdManipHdrRmvByHdrParams {
69455 +    e_FmPcdManipHdrRmvByHdrType         type;           /**< Selection of header removal location */
69456 +    union {
69457 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
69458 +        struct {
69459 +            bool                        include;        /**< If FALSE, remove until the specified header (not including the header);
69460 +                                                             If TRUE, remove also the specified header. */
69461 +            t_FmManipHdrInfo            hdrInfo;
69462 +        } fromStartByHdr;                               /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
69463 +#endif /* (DPAA_VERSION >= 11) || ... */
69464 +#if (DPAA_VERSION >= 11)
69465 +        t_FmManipHdrInfo                hdrInfo;        /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
69466 +#endif /* (DPAA_VERSION >= 11) */
69467 +        e_FmPcdManipHdrRmvSpecificL2    specificL2;     /**< Relevant when type = e_FM_PCD_MANIP_BY_HDR_SPECIFIC_L2;
69468 +                                                             Defines which L2 headers to remove. */
69469 +    } u;
69470 +} t_FmPcdManipHdrRmvByHdrParams;
69471 +
69472 +/**************************************************************************//**
69473 + @Description   Parameters for configuring IP fragmentation manipulation
69474 +
69475 + Restrictions:
69476 +     - IP Fragmentation output fragments must not be forwarded to application directly.
69477 +     - Maximum number of fragments per frame is 16.
69478 +     - Fragmentation of IP fragments is not supported.
69479 +     - IPv4 packets containing header Option fields are fragmented by copying all option
69480 +       fields to each fragment, regardless of the copy bit value.
69481 +     - Transmit confirmation is not supported.
69482 +     - Fragmentation after SEC can't handle S/G frames.
69483 +     - Fragmentation nodes must be set as the last PCD action (i.e. the
69484 +       corresponding CC node key must have next engine set to e_FM_PCD_DONE).
69485 +     - Only BMan buffers shall be used for frames to be fragmented.
69486 +     - IPF does not support VSP. Therefore, on the same port where we have IPF
69487 +       we cannot support VSP.
69488 +     - NOTE: The following comment is relevant only for FMAN v3 devices: IPF
69489 +       does not support VSP. Therefore, on the same port where we have IPF we
69490 +       cannot support VSP.
69491 +*//***************************************************************************/
69492 +typedef struct t_FmPcdManipFragIpParams {
69493 +    uint16_t                    sizeForFragmentation;   /**< If length of the frame is greater than this value,
69494 +                                                             IP fragmentation will be executed.*/
69495 +#if (DPAA_VERSION == 10)
69496 +    uint8_t                     scratchBpid;            /**< Absolute buffer pool id according to BM configuration.*/
69497 +#endif /* (DPAA_VERSION == 10) */
69498 +    bool                        sgBpidEn;               /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
69499 +                                                             If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
69500 +                                                             received frame's buffer. */
69501 +    uint8_t                     sgBpid;                 /**< Scatter/Gather buffer pool id;
69502 +                                                             This parameters is relevant when 'sgBpidEn=TRUE';
69503 +                                                             Same LIODN number is used for these buffers as for the received frames buffers, so buffers
69504 +                                                             of this pool need to be allocated in the same memory area as the received buffers.
69505 +                                                             If the received buffers arrive from different sources, the Scatter/Gather BP id should be
69506 +                                                             mutual to all these sources. */
69507 +    e_FmPcdManipDontFragAction  dontFragAction;         /**< Don't Fragment Action - If an IP packet is larger
69508 +                                                             than MTU and its DF bit is set, then this field will
69509 +                                                             determine the action to be taken.*/
69510 +} t_FmPcdManipFragIpParams;
69511 +
69512 +/**************************************************************************//**
69513 + @Description   Parameters for configuring IP reassembly manipulation.
69514 +
69515 +                This is a common structure for both IPv4 and IPv6 reassembly
69516 +                manipulation. For reassembly of both IPv4 and IPv6, make sure to
69517 +                set the 'hdr' field in t_FmPcdManipReassemParams to HEADER_TYPE_IPv6.
69518 +
69519 + Restrictions:
69520 +    - Application must define at least one scheme to catch the reassembled frames.
69521 +    - Maximum number of fragments per frame is 16.
69522 +    - Reassembly of IPv4 fragments containing Option fields is supported.
69523 +
69524 +*//***************************************************************************/
69525 +typedef struct t_FmPcdManipReassemIpParams {
69526 +    uint8_t                         relativeSchemeId[2];    /**< Partition relative scheme id:
69527 +                                                                 relativeSchemeId[0] -  Relative scheme ID for IPV4 Reassembly manipulation;
69528 +                                                                 relativeSchemeId[1] -  Relative scheme ID for IPV6 Reassembly manipulation;
69529 +                                                                 NOTE: The following comment is relevant only for FMAN v2 devices:
69530 +                                                                 Relative scheme ID for IPv4/IPv6 Reassembly manipulation must be smaller than
69531 +                                                                 the user schemes id to ensure that the reassembly schemes will be first match;
69532 +                                                                 Rest schemes, if defined, should have higher relative scheme ID. */
69533 +#if (DPAA_VERSION >= 11)
69534 +    uint32_t                        nonConsistentSpFqid;    /**< In case that other fragments of the frame corresponds to different storage
69535 +                                                                 profile than the opening fragment (Non-Consistent-SP state)
69536 +                                                                 then one of two possible scenarios occurs:
69537 +                                                                 if 'nonConsistentSpFqid != 0', the reassembled frame will be enqueued to
69538 +                                                                 this fqid, otherwise a 'Non Consistent SP' bit will be set in the FD[status].*/
69539 +#else
69540 +    uint8_t                         sgBpid;                 /**< Buffer pool id for the S/G frame created by the reassembly process */
69541 +#endif /* (DPAA_VERSION >= 11) */
69542 +    uint8_t                         dataMemId;              /**< Memory partition ID for the IPR's external tables structure */
69543 +    uint16_t                        dataLiodnOffset;        /**< LIODN offset for access the IPR's external tables structure. */
69544 +    uint16_t                        minFragSize[2];         /**< Minimum fragment size:
69545 +                                                                 minFragSize[0] - for ipv4, minFragSize[1] - for ipv6 */
69546 +    e_FmPcdManipReassemWaysNumber   numOfFramesPerHashEntry[2];
69547 +                                                            /**< Number of frames per hash entry needed for reassembly process:
69548 +                                                                 numOfFramesPerHashEntry[0] - for ipv4 (max value is e_FM_PCD_MANIP_EIGHT_WAYS_HASH);
69549 +                                                                 numOfFramesPerHashEntry[1] - for ipv6 (max value is e_FM_PCD_MANIP_SIX_WAYS_HASH). */
69550 +    uint16_t                        maxNumFramesInProcess;  /**< Number of frames which can be processed by Reassembly in the same time;
69551 +                                                                 Must be power of 2;
69552 +                                                                 In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
69553 +                                                                 maxNumFramesInProcess has to be in the range of 4 - 512;
69554 +                                                                 In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
69555 +                                                                 maxNumFramesInProcess has to be in the range of 8 - 2048. */
69556 +    e_FmPcdManipReassemTimeOutMode  timeOutMode;            /**< Expiration delay initialized by Reassembly process */
69557 +    uint32_t                        fqidForTimeOutFrames;   /**< FQID in which time out frames will enqueue during Time Out Process;
69558 +                                                                 Recommended value for this field is 0; in this way timed-out frames will be discarded */
69559 +    uint32_t                        timeoutThresholdForReassmProcess;
69560 +                                                            /**< Represents the time interval in microseconds which defines
69561 +                                                                 if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
69562 +} t_FmPcdManipReassemIpParams;
69563 +
69564 +/**************************************************************************//**
69565 + @Description   structure for defining IPSEC manipulation
69566 +*//***************************************************************************/
69567 +typedef struct t_FmPcdManipSpecialOffloadIPSecParams {
69568 +    bool        decryption;                     /**< TRUE if being used in decryption direction;
69569 +                                                     FALSE if being used in encryption direction. */
69570 +    bool        ecnCopy;                        /**< TRUE to copy the ECN bits from inner/outer to outer/inner
69571 +                                                     (direction depends on the 'decryption' field). */
69572 +    bool        dscpCopy;                       /**< TRUE to copy the DSCP bits from inner/outer to outer/inner
69573 +                                                     (direction depends on the 'decryption' field). */
69574 +    bool        variableIpHdrLen;               /**< TRUE for supporting variable IP header length in decryption. */
69575 +    bool        variableIpVersion;              /**< TRUE for supporting both IP version on the same SA in encryption */
69576 +    uint8_t     outerIPHdrLen;                  /**< if 'variableIpVersion == TRUE' then this field must be set to non-zero value;
69577 +                                                     It is specifies the length of the outer IP header that was configured in the
69578 +                                                     corresponding SA. */
69579 +    uint16_t    arwSize;                        /**< if <> '0' then will perform ARW check for this SA;
69580 +                                                     The value must be a multiplication of 16 */
69581 +    uintptr_t   arwAddr;                        /**< if arwSize <> '0' then this field must be set to non-zero value;
69582 +                                                     MUST be allocated from FMAN's MURAM that the post-sec op-port belongs to;
69583 +                                                     Must be 4B aligned. Required MURAM size is 'NEXT_POWER_OF_2(arwSize+32))/8+4' Bytes */
69584 +} t_FmPcdManipSpecialOffloadIPSecParams;
69585 +
69586 +#if (DPAA_VERSION >= 11)
69587 +/**************************************************************************//**
69588 + @Description   Parameters for configuring CAPWAP fragmentation manipulation
69589 +
69590 + Restrictions:
69591 +     - Maximum number of fragments per frame is 16.
69592 +     - Transmit confirmation is not supported.
69593 +     - Fragmentation nodes must be set as the last PCD action (i.e. the
69594 +       corresponding CC node key must have next engine set to e_FM_PCD_DONE).
69595 +     - Only BMan buffers shall be used for frames to be fragmented.
69596 +     - NOTE: The following comment is relevant only for FMAN v3 devices: IPF
69597 +       does not support VSP. Therefore, on the same port where we have IPF we
69598 +       cannot support VSP.
69599 +*//***************************************************************************/
69600 +typedef struct t_FmPcdManipFragCapwapParams {
69601 +    uint16_t                    sizeForFragmentation;   /**< If length of the frame is greater than this value,
69602 +                                                             CAPWAP fragmentation will be executed.*/
69603 +    bool                        sgBpidEn;               /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
69604 +                                                             If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
69605 +                                                             received frame's buffer. */
69606 +    uint8_t                     sgBpid;                 /**< Scatter/Gather buffer pool id;
69607 +                                                             This parameters is relevant when 'sgBpidEn=TRUE';
69608 +                                                             Same LIODN number is used for these buffers as for the received frames buffers, so buffers
69609 +                                                             of this pool need to be allocated in the same memory area as the received buffers.
69610 +                                                             If the received buffers arrive from different sources, the Scatter/Gather BP id should be
69611 +                                                             mutual to all these sources. */
69612 +    bool                        compressModeEn;         /**< CAPWAP Header Options Compress Enable mode;
69613 +                                                             When this mode is enabled then only the first fragment include the CAPWAP header options
69614 +                                                             field (if user provides it in the input frame) and all other fragments exclude the CAPWAP
69615 +                                                             options field (CAPWAP header is updated accordingly).*/
69616 +} t_FmPcdManipFragCapwapParams;
69617 +
69618 +/**************************************************************************//**
69619 + @Description   Parameters for configuring CAPWAP reassembly manipulation.
69620 +
69621 + Restrictions:
69622 +    - Application must define one scheme to catch the reassembled frames.
69623 +    - Maximum number of fragments per frame is 16.
69624 +
69625 +*//***************************************************************************/
69626 +typedef struct t_FmPcdManipReassemCapwapParams {
69627 +    uint8_t                         relativeSchemeId;    /**< Partition relative scheme id;
69628 +                                                                 NOTE: this id must be smaller than the user schemes id to ensure that the reassembly scheme will be first match;
69629 +                                                                 Rest schemes, if defined, should have higher relative scheme ID. */
69630 +    uint8_t                         dataMemId;              /**< Memory partition ID for the IPR's external tables structure */
69631 +    uint16_t                        dataLiodnOffset;        /**< LIODN offset for access the IPR's external tables structure. */
69632 +    uint16_t                        maxReassembledFrameLength;/**< The maximum CAPWAP reassembled frame length in bytes;
69633 +                                                                   If maxReassembledFrameLength == 0, any successful reassembled frame length is
69634 +                                                                   considered as a valid length;
69635 +                                                                   if maxReassembledFrameLength > 0, a successful reassembled frame which its length
69636 +                                                                   exceeds this value is considered as an error frame (FD status[CRE] bit is set). */
69637 +    e_FmPcdManipReassemWaysNumber   numOfFramesPerHashEntry;
69638 +                                                            /**< Number of frames per hash entry needed for reassembly process */
69639 +    uint16_t                        maxNumFramesInProcess;  /**< Number of frames which can be processed by reassembly in the same time;
69640 +                                                                 Must be power of 2;
69641 +                                                                 In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
69642 +                                                                 maxNumFramesInProcess has to be in the range of 4 - 512;
69643 +                                                                 In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
69644 +                                                                 maxNumFramesInProcess has to be in the range of 8 - 2048. */
69645 +    e_FmPcdManipReassemTimeOutMode  timeOutMode;            /**< Expiration delay initialized by Reassembly process */
69646 +    uint32_t                        fqidForTimeOutFrames;   /**< FQID in which time out frames will enqueue during Time Out Process;
69647 +                                                                 Recommended value for this field is 0; in this way timed-out frames will be discarded */
69648 +    uint32_t                        timeoutThresholdForReassmProcess;
69649 +                                                            /**< Represents the time interval in microseconds which defines
69650 +                                                                 if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
69651 +} t_FmPcdManipReassemCapwapParams;
69652 +
69653 +/**************************************************************************//**
69654 + @Description   structure for defining CAPWAP manipulation
69655 +*//***************************************************************************/
69656 +typedef struct t_FmPcdManipSpecialOffloadCapwapParams {
69657 +    bool                    dtls;   /**< TRUE if continue to SEC DTLS encryption */
69658 +    e_FmPcdManipHdrQosSrc   qosSrc; /**< TODO */
69659 +} t_FmPcdManipSpecialOffloadCapwapParams;
69660 +
69661 +#endif /* (DPAA_VERSION >= 11) */
69662 +
69663 +
69664 +/**************************************************************************//**
69665 + @Description   Parameters for defining special offload manipulation
69666 +*//***************************************************************************/
69667 +typedef struct t_FmPcdManipSpecialOffloadParams {
69668 +    e_FmPcdManipSpecialOffloadType              type;       /**< Type of special offload manipulation */
69669 +    union
69670 +    {
69671 +        t_FmPcdManipSpecialOffloadIPSecParams   ipsec;      /**< Parameters for IPSec; Relevant when
69672 +                                                                 type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC */
69673 +#if (DPAA_VERSION >= 11)
69674 +        t_FmPcdManipSpecialOffloadCapwapParams  capwap;     /**< Parameters for CAPWAP; Relevant when
69675 +                                                                 type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP */
69676 +#endif /* (DPAA_VERSION >= 11) */
69677 +    } u;
69678 +} t_FmPcdManipSpecialOffloadParams;
69679 +
69680 +/**************************************************************************//**
69681 + @Description   Parameters for defining insertion manipulation
69682 +*//***************************************************************************/
69683 +typedef struct t_FmPcdManipHdrInsrt {
69684 +    uint8_t size;           /**< size of inserted section */
69685 +    uint8_t *p_Data;        /**< data to be inserted */
69686 +} t_FmPcdManipHdrInsrt;
69687 +
69688 +
69689 +/**************************************************************************//**
69690 + @Description   Parameters for defining generic removal manipulation
69691 +*//***************************************************************************/
69692 +typedef struct t_FmPcdManipHdrRmvGenericParams {
69693 +    uint8_t                         offset;         /**< Offset from beginning of header to the start
69694 +                                                         location of the removal */
69695 +    uint8_t                         size;           /**< Size of removed section */
69696 +} t_FmPcdManipHdrRmvGenericParams;
69697 +
69698 +/**************************************************************************//**
69699 + @Description   Parameters for defining generic insertion manipulation
69700 +*//***************************************************************************/
69701 +typedef struct t_FmPcdManipHdrInsrtGenericParams {
69702 +    uint8_t                         offset;         /**< Offset from beginning of header to the start
69703 +                                                         location of the insertion */
69704 +    uint8_t                         size;           /**< Size of inserted section */
69705 +    bool                            replace;        /**< TRUE to override (replace) existing data at
69706 +                                                         'offset', FALSE to insert */
69707 +    uint8_t                         *p_Data;        /**< Pointer to data to be inserted */
69708 +} t_FmPcdManipHdrInsrtGenericParams;
69709 +
69710 +/**************************************************************************//**
69711 + @Description   Parameters for defining header manipulation VLAN DSCP To Vpri translation
69712 +*//***************************************************************************/
69713 +typedef struct t_FmPcdManipHdrFieldUpdateVlanDscpToVpri {
69714 +    uint8_t                         dscpToVpriTable[FM_PCD_MANIP_DSCP_TO_VLAN_TRANS];
69715 +                                                        /**< A table of VPri values for each DSCP value;
69716 +                                                             The index is the DSCP value (0-0x3F) and the
69717 +                                                             value is the corresponding VPRI (0-15). */
69718 +    uint8_t                         vpriDefVal;         /**< 0-7, Relevant only if if updateType =
69719 +                                                             e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN,
69720 +                                                             this field is the Q Tag default value if the
69721 +                                                             IP header is not found. */
69722 +} t_FmPcdManipHdrFieldUpdateVlanDscpToVpri;
69723 +
69724 +/**************************************************************************//**
69725 + @Description   Parameters for defining header manipulation VLAN fields updates
69726 +*//***************************************************************************/
69727 +typedef struct t_FmPcdManipHdrFieldUpdateVlan {
69728 +    e_FmPcdManipHdrFieldUpdateVlan                  updateType; /**< Selects VLAN update type */
69729 +    union {
69730 +        uint8_t                                     vpri;       /**< 0-7, Relevant only if If updateType =
69731 +                                                                     e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_PRI, this
69732 +                                                                     is the new VLAN pri. */
69733 +        t_FmPcdManipHdrFieldUpdateVlanDscpToVpri    dscpToVpri; /**< Parameters structure, Relevant only if updateType
69734 +                                                                     = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN. */
69735 +    } u;
69736 +} t_FmPcdManipHdrFieldUpdateVlan;
69737 +
69738 +/**************************************************************************//**
69739 + @Description   Parameters for defining header manipulation IPV4 fields updates
69740 +*//***************************************************************************/
69741 +typedef struct t_FmPcdManipHdrFieldUpdateIpv4 {
69742 +    ipv4HdrManipUpdateFlags_t       validUpdates;       /**< ORed flag, selecting the required updates */
69743 +    uint8_t                         tos;                /**< 8 bit New TOS; Relevant if validUpdates contains
69744 +                                                             HDR_MANIP_IPV4_TOS */
69745 +    uint16_t                        id;                 /**< 16 bit New IP ID; Relevant only if validUpdates
69746 +                                                             contains HDR_MANIP_IPV4_ID */
69747 +    uint32_t                        src;                /**< 32 bit New IP SRC; Relevant only if validUpdates
69748 +                                                             contains HDR_MANIP_IPV4_SRC */
69749 +    uint32_t                        dst;                /**< 32 bit New IP DST; Relevant only if validUpdates
69750 +                                                             contains HDR_MANIP_IPV4_DST */
69751 +} t_FmPcdManipHdrFieldUpdateIpv4;
69752 +
69753 +/**************************************************************************//**
69754 + @Description   Parameters for defining header manipulation IPV6 fields updates
69755 +*//***************************************************************************/
69756 +typedef struct t_FmPcdManipHdrFieldUpdateIpv6 {
69757 +    ipv6HdrManipUpdateFlags_t   validUpdates;           /**< ORed flag, selecting the required updates */
69758 +    uint8_t                     trafficClass;           /**< 8 bit New Traffic Class; Relevant if validUpdates contains
69759 +                                                             HDR_MANIP_IPV6_TC */
69760 +    uint8_t                     src[NET_HEADER_FIELD_IPv6_ADDR_SIZE];
69761 +                                                        /**< 16 byte new IP SRC; Relevant only if validUpdates
69762 +                                                             contains HDR_MANIP_IPV6_SRC */
69763 +    uint8_t                     dst[NET_HEADER_FIELD_IPv6_ADDR_SIZE];
69764 +                                                        /**< 16 byte new IP DST; Relevant only if validUpdates
69765 +                                                             contains HDR_MANIP_IPV6_DST */
69766 +} t_FmPcdManipHdrFieldUpdateIpv6;
69767 +
69768 +/**************************************************************************//**
69769 + @Description   Parameters for defining header manipulation TCP/UDP fields updates
69770 +*//***************************************************************************/
69771 +typedef struct t_FmPcdManipHdrFieldUpdateTcpUdp {
69772 +    tcpUdpHdrManipUpdateFlags_t     validUpdates;       /**< ORed flag, selecting the required updates */
69773 +    uint16_t                        src;                /**< 16 bit New TCP/UDP SRC; Relevant only if validUpdates
69774 +                                                             contains HDR_MANIP_TCP_UDP_SRC */
69775 +    uint16_t                        dst;                /**< 16 bit New TCP/UDP DST; Relevant only if validUpdates
69776 +                                                             contains HDR_MANIP_TCP_UDP_DST */
69777 +} t_FmPcdManipHdrFieldUpdateTcpUdp;
69778 +
69779 +/**************************************************************************//**
69780 + @Description   Parameters for defining header manipulation fields updates
69781 +*//***************************************************************************/
69782 +typedef struct t_FmPcdManipHdrFieldUpdateParams {
69783 +    e_FmPcdManipHdrFieldUpdateType                  type;           /**< Type of header field update manipulation */
69784 +    union {
69785 +        t_FmPcdManipHdrFieldUpdateVlan              vlan;           /**< Parameters for VLAN update. Relevant when
69786 +                                                                         type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN */
69787 +        t_FmPcdManipHdrFieldUpdateIpv4              ipv4;           /**< Parameters for IPv4 update. Relevant when
69788 +                                                                         type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4 */
69789 +        t_FmPcdManipHdrFieldUpdateIpv6              ipv6;           /**< Parameters for IPv6 update. Relevant when
69790 +                                                                         type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6 */
69791 +        t_FmPcdManipHdrFieldUpdateTcpUdp            tcpUdp;         /**< Parameters for TCP/UDP update. Relevant when
69792 +                                                                         type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP */
69793 +    } u;
69794 +} t_FmPcdManipHdrFieldUpdateParams;
69795 +
69796 +
69797 +
69798 +/**************************************************************************//**
69799 + @Description   Parameters for defining custom header manipulation for generic field replacement
69800 +*//***************************************************************************/
69801 +typedef struct t_FmPcdManipHdrCustomGenFieldReplace {
69802 +    uint8_t                         srcOffset;          /**< Location of new data - Offset from
69803 +                                                             Parse Result  (>= 16, srcOffset+size <= 32, ) */
69804 +    uint8_t                         dstOffset;          /**< Location of data to be overwritten - Offset from
69805 +                                                             start of frame (dstOffset + size <= 256). */
69806 +    uint8_t                         size;               /**< The number of bytes (<=16) to be replaced */
69807 +    uint8_t                         mask;               /**< Optional 1 byte mask. Set to select bits for
69808 +                                                             replacement (1 - bit will be replaced);
69809 +                                                             Clear to use field as is. */
69810 +    uint8_t                         maskOffset;         /**< Relevant if mask != 0;
69811 +                                                             Mask offset within the replaces "size" */
69812 +} t_FmPcdManipHdrCustomGenFieldReplace;
69813 +
69814 +/**************************************************************************//**
69815 + @Description   Parameters for defining custom header manipulation for IP replacement
69816 +*//***************************************************************************/
69817 +typedef struct t_FmPcdManipHdrCustomIpHdrReplace {
69818 +    e_FmPcdManipHdrCustomIpReplace  replaceType;        /**< Selects replace update type */
69819 +    bool                            decTtlHl;           /**< Decrement TTL (IPV4) or Hop limit (IPV6) by 1  */
69820 +    bool                            updateIpv4Id;       /**< Relevant when replaceType =
69821 +                                                             e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 */
69822 +    uint16_t                        id;                 /**< 16 bit New IP ID; Relevant only if
69823 +                                                             updateIpv4Id = TRUE */
69824 +    uint8_t                         hdrSize;            /**< The size of the new IP header */
69825 +    uint8_t                         hdr[FM_PCD_MANIP_MAX_HDR_SIZE];
69826 +                                                        /**< The new IP header */
69827 +} t_FmPcdManipHdrCustomIpHdrReplace;
69828 +
69829 +/**************************************************************************//**
69830 + @Description   Parameters for defining custom header manipulation
69831 +*//***************************************************************************/
69832 +typedef struct t_FmPcdManipHdrCustomParams {
69833 +    e_FmPcdManipHdrCustomType                   type;           /**< Type of header field update manipulation */
69834 +    union {
69835 +        t_FmPcdManipHdrCustomIpHdrReplace       ipHdrReplace;   /**< Parameters IP header replacement */
69836 +        t_FmPcdManipHdrCustomGenFieldReplace    genFieldReplace;   /**< Parameters IP header replacement */
69837 +    } u;
69838 +} t_FmPcdManipHdrCustomParams;
69839 +
69840 +/**************************************************************************//**
69841 + @Description   Parameters for defining specific L2 insertion manipulation
69842 +*//***************************************************************************/
69843 +typedef struct t_FmPcdManipHdrInsrtSpecificL2Params {
69844 +    e_FmPcdManipHdrInsrtSpecificL2  specificL2;     /**< Selects which L2 headers to insert */
69845 +    bool                            update;         /**< TRUE to update MPLS header */
69846 +    uint8_t                         size;           /**< size of inserted section */
69847 +    uint8_t                         *p_Data;        /**< data to be inserted */
69848 +} t_FmPcdManipHdrInsrtSpecificL2Params;
69849 +
69850 +#if (DPAA_VERSION >= 11)
69851 +/**************************************************************************//**
69852 + @Description   Parameters for defining IP insertion manipulation
69853 +*//***************************************************************************/
69854 +typedef struct t_FmPcdManipHdrInsrtIpParams {
69855 +    bool                            calcL4Checksum; /**< Calculate L4 checksum. */
69856 +    e_FmPcdManipHdrQosMappingMode   mappingMode;    /**< TODO */
69857 +    uint8_t                         lastPidOffset;  /**< the offset of the last Protocol within
69858 +                                                         the inserted header */
69859 +    uint16_t                        id;         /**< 16 bit New IP ID */
69860 +    bool                            dontFragOverwrite;
69861 +    /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte.
69862 +     * This byte is configured to be overwritten when RPD is set. */
69863 +    uint8_t                         lastDstOffset;
69864 +    /**< IPv6 only. if routing extension exist, user should set the offset of the destination address
69865 +     * in order to calculate UDP checksum pseudo header;
69866 +     * Otherwise set it to '0'. */
69867 +    t_FmPcdManipHdrInsrt            insrt;      /**< size and data to be inserted. */
69868 +} t_FmPcdManipHdrInsrtIpParams;
69869 +#endif /* (DPAA_VERSION >= 11) */
69870 +
69871 +/**************************************************************************//**
69872 + @Description   Parameters for defining header insertion manipulation by header type
69873 +*//***************************************************************************/
69874 +typedef struct t_FmPcdManipHdrInsrtByHdrParams {
69875 +    e_FmPcdManipHdrInsrtByHdrType               type;   /**< Selects manipulation type */
69876 +    union {
69877 +
69878 +        t_FmPcdManipHdrInsrtSpecificL2Params    specificL2Params;
69879 +                                                             /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2:
69880 +                                                              Selects which L2 headers to insert */
69881 +#if (DPAA_VERSION >= 11)
69882 +        t_FmPcdManipHdrInsrtIpParams            ipParams;  /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_IP */
69883 +        t_FmPcdManipHdrInsrt                    insrt;     /**< Used when type is one of e_FM_PCD_MANIP_INSRT_BY_HDR_UDP,
69884 +                                                                e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, or
69885 +                                                                e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP */
69886 +#endif /* (DPAA_VERSION >= 11) */
69887 +    } u;
69888 +} t_FmPcdManipHdrInsrtByHdrParams;
69889 +
69890 +/**************************************************************************//**
69891 + @Description   Parameters for defining header insertion manipulation
69892 +*//***************************************************************************/
69893 +typedef struct t_FmPcdManipHdrInsrtParams {
69894 +    e_FmPcdManipHdrInsrtType                    type;       /**< Type of insertion manipulation */
69895 +    union {
69896 +        t_FmPcdManipHdrInsrtByHdrParams         byHdr;      /**< Parameters for defining header insertion manipulation by header type,
69897 +                                                                 relevant if 'type' = e_FM_PCD_MANIP_INSRT_BY_HDR */
69898 +        t_FmPcdManipHdrInsrtGenericParams       generic;    /**< Parameters for defining generic header insertion manipulation,
69899 +                                                                 relevant if 'type' = e_FM_PCD_MANIP_INSRT_GENERIC */
69900 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
69901 +        t_FmPcdManipHdrInsrtByTemplateParams    byTemplate; /**< Parameters for defining header insertion manipulation by template,
69902 +                                                                 relevant if 'type' = e_FM_PCD_MANIP_INSRT_BY_TEMPLATE */
69903 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
69904 +    } u;
69905 +} t_FmPcdManipHdrInsrtParams;
69906 +
69907 +/**************************************************************************//**
69908 + @Description   Parameters for defining header removal manipulation
69909 +*//***************************************************************************/
69910 +typedef struct t_FmPcdManipHdrRmvParams {
69911 +    e_FmPcdManipHdrRmvType                  type;       /**< Type of header removal manipulation */
69912 +    union {
69913 +        t_FmPcdManipHdrRmvByHdrParams       byHdr;      /**< Parameters for defining header removal manipulation by header type,
69914 +                                                             relevant if type = e_FM_PCD_MANIP_RMV_BY_HDR */
69915 +        t_FmPcdManipHdrRmvGenericParams     generic;    /**< Parameters for defining generic header removal manipulation,
69916 +                                                             relevant if type = e_FM_PCD_MANIP_RMV_GENERIC */
69917 +    } u;
69918 +} t_FmPcdManipHdrRmvParams;
69919 +
69920 +/**************************************************************************//**
69921 + @Description   Parameters for defining header manipulation node
69922 +*//***************************************************************************/
69923 +typedef struct t_FmPcdManipHdrParams {
69924 +    bool                                        rmv;                /**< TRUE, to define removal manipulation */
69925 +    t_FmPcdManipHdrRmvParams                    rmvParams;          /**< Parameters for removal manipulation, relevant if 'rmv' = TRUE */
69926 +
69927 +    bool                                        insrt;              /**< TRUE, to define insertion manipulation */
69928 +    t_FmPcdManipHdrInsrtParams                  insrtParams;        /**< Parameters for insertion manipulation, relevant if 'insrt' = TRUE */
69929 +
69930 +    bool                                        fieldUpdate;        /**< TRUE, to define field update manipulation */
69931 +    t_FmPcdManipHdrFieldUpdateParams            fieldUpdateParams;  /**< Parameters for field update manipulation, relevant if 'fieldUpdate' = TRUE */
69932 +
69933 +    bool                                        custom;             /**< TRUE, to define custom manipulation */
69934 +    t_FmPcdManipHdrCustomParams                 customParams;       /**< Parameters for custom manipulation, relevant if 'custom' = TRUE */
69935 +
69936 +    bool                                        dontParseAfterManip;/**< TRUE to de-activate the parser after the manipulation defined in this node.
69937 +                                                                                          Restrictions:
69938 +                                                                                          1. MUST be set if the next engine after the CC is not another CC node
69939 +                                                                                          (but rather Policer or Keygen), and this is the last (no h_NextManip) in a chain
69940 +                                                                                          of manipulation nodes. This includes single nodes (i.e. no h_NextManip and
69941 +                                                                                          also never pointed as h_NextManip of other manipulation nodes)
69942 +                                                                                          2. MUST be set if the next engine after the CC is another CC node, and
69943 +                                                                                          this is NOT the last manipulation node (i.e. it has h_NextManip).*/
69944 +} t_FmPcdManipHdrParams;
69945 +
69946 +/**************************************************************************//**
69947 + @Description   Parameters for defining fragmentation manipulation
69948 +*//***************************************************************************/
69949 +typedef struct t_FmPcdManipFragParams {
69950 +    e_NetHeaderType                     hdr;          /**< Header selection */
69951 +    union {
69952 +#if (DPAA_VERSION >= 11)
69953 +        t_FmPcdManipFragCapwapParams    capwapFrag;   /**< Parameters for defining CAPWAP fragmentation,
69954 +                                                           relevant if 'hdr' = HEADER_TYPE_CAPWAP */
69955 +#endif /* (DPAA_VERSION >= 11) */
69956 +        t_FmPcdManipFragIpParams        ipFrag;       /**< Parameters for defining IP fragmentation,
69957 +                                                           relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
69958 +    } u;
69959 +} t_FmPcdManipFragParams;
69960 +
69961 +/**************************************************************************//**
69962 + @Description   Parameters for defining reassembly manipulation
69963 +*//***************************************************************************/
69964 +typedef struct t_FmPcdManipReassemParams {
69965 +    e_NetHeaderType                     hdr;          /**< Header selection */
69966 +    union {
69967 +#if (DPAA_VERSION >= 11)
69968 +        t_FmPcdManipReassemCapwapParams capwapReassem;  /**< Parameters for defining CAPWAP reassembly,
69969 +                                                           relevant if 'hdr' = HEADER_TYPE_CAPWAP */
69970 +#endif /* (DPAA_VERSION >= 11) */
69971 +
69972 +        t_FmPcdManipReassemIpParams     ipReassem;    /**< Parameters for defining IP reassembly,
69973 +                                                           relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
69974 +    } u;
69975 +} t_FmPcdManipReassemParams;
69976 +
69977 +/**************************************************************************//**
69978 + @Description   Parameters for defining a manipulation node
69979 +*//***************************************************************************/
69980 +typedef struct t_FmPcdManipParams {
69981 +    e_FmPcdManipType                        type;               /**< Selects type of manipulation node */
69982 +    union{
69983 +        t_FmPcdManipHdrParams               hdr;                /**< Parameters for defining header manipulation node */
69984 +        t_FmPcdManipReassemParams           reassem;            /**< Parameters for defining reassembly manipulation node */
69985 +        t_FmPcdManipFragParams              frag;               /**< Parameters for defining fragmentation manipulation node */
69986 +        t_FmPcdManipSpecialOffloadParams    specialOffload;     /**< Parameters for defining special offload manipulation node */
69987 +    } u;
69988 +
69989 +    t_Handle                                h_NextManip;        /**< Supported for Header Manipulation only;
69990 +                                                                     Handle to another (previously defined) manipulation node;
69991 +                                                                     Allows concatenation of manipulation actions;
69992 +                                                                     This parameter is optional and may be NULL. */
69993 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
69994 +    bool                                    fragOrReasm;        /**< TRUE, if defined fragmentation/reassembly manipulation */
69995 +    t_FmPcdManipFragOrReasmParams           fragOrReasmParams;  /**< Parameters for fragmentation/reassembly manipulation,
69996 +                                                                     relevant if fragOrReasm = TRUE */
69997 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
69998 +} t_FmPcdManipParams;
69999 +
70000 +/**************************************************************************//**
70001 + @Description   Structure for retrieving IP reassembly statistics
70002 +*//***************************************************************************/
70003 +typedef struct t_FmPcdManipReassemIpStats {
70004 +    /* common counters for both IPv4 and IPv6 */
70005 +    uint32_t        timeout;                    /**< Counts the number of timeout occurrences */
70006 +    uint32_t        rfdPoolBusy;                /**< Counts the number of failed attempts to allocate
70007 +                                                     a Reassembly Frame Descriptor */
70008 +    uint32_t        internalBufferBusy;         /**< Counts the number of times an internal buffer busy occurred */
70009 +    uint32_t        externalBufferBusy;         /**< Counts the number of times external buffer busy occurred */
70010 +    uint32_t        sgFragments;                /**< Counts the number of Scatter/Gather fragments */
70011 +    uint32_t        dmaSemaphoreDepletion;      /**< Counts the number of failed attempts to allocate a DMA semaphore */
70012 +#if (DPAA_VERSION >= 11)
70013 +    uint32_t        nonConsistentSp;            /**< Counts the number of Non Consistent Storage Profile events for
70014 +                                                     successfully reassembled frames */
70015 +#endif /* (DPAA_VERSION >= 11) */
70016 +    struct {
70017 +        uint32_t    successfullyReassembled;    /**< Counts the number of successfully reassembled frames */
70018 +        uint32_t    validFragments;             /**< Counts the total number of valid fragments that
70019 +                                                     have been processed for all frames */
70020 +        uint32_t    processedFragments;         /**< Counts the number of processed fragments
70021 +                                                     (valid and error fragments) for all frames */
70022 +        uint32_t    malformedFragments;         /**< Counts the number of malformed fragments processed for all frames */
70023 +        uint32_t    discardedFragments;         /**< Counts the number of fragments discarded by the reassembly process */
70024 +        uint32_t    autoLearnBusy;              /**< Counts the number of times a busy condition occurs when attempting
70025 +                                                     to access an IP-Reassembly Automatic Learning Hash set */
70026 +        uint32_t    moreThan16Fragments;        /**< Counts the fragment occurrences in which the number of fragments-per-frame
70027 +                                                     exceeds 16 */
70028 +    } specificHdrStatistics[2];                 /**< slot '0' is for IPv4, slot '1' is for IPv6 */
70029 +} t_FmPcdManipReassemIpStats;
70030 +
70031 +/**************************************************************************//**
70032 + @Description   Structure for retrieving IP fragmentation statistics
70033 +*//***************************************************************************/
70034 +typedef struct t_FmPcdManipFragIpStats {
70035 +    uint32_t    totalFrames;            /**< Number of frames that passed through the manipulation node */
70036 +    uint32_t    fragmentedFrames;       /**< Number of frames that were fragmented */
70037 +    uint32_t    generatedFragments;     /**< Number of fragments that were generated */
70038 +} t_FmPcdManipFragIpStats;
70039 +
70040 +#if (DPAA_VERSION >= 11)
70041 +/**************************************************************************//**
70042 + @Description   Structure for retrieving CAPWAP reassembly statistics
70043 +*//***************************************************************************/
70044 +typedef struct t_FmPcdManipReassemCapwapStats {
70045 +    uint32_t    timeout;                    /**< Counts the number of timeout occurrences */
70046 +    uint32_t    rfdPoolBusy;                /**< Counts the number of failed attempts to allocate
70047 +                                                 a Reassembly Frame Descriptor */
70048 +    uint32_t    internalBufferBusy;         /**< Counts the number of times an internal buffer busy occurred */
70049 +    uint32_t    externalBufferBusy;         /**< Counts the number of times external buffer busy occurred */
70050 +    uint32_t    sgFragments;                /**< Counts the number of Scatter/Gather fragments */
70051 +    uint32_t    dmaSemaphoreDepletion;      /**< Counts the number of failed attempts to allocate a DMA semaphore */
70052 +    uint32_t    successfullyReassembled;    /**< Counts the number of successfully reassembled frames */
70053 +    uint32_t    validFragments;             /**< Counts the total number of valid fragments that
70054 +                                                 have been processed for all frames */
70055 +    uint32_t    processedFragments;         /**< Counts the number of processed fragments
70056 +                                                 (valid and error fragments) for all frames */
70057 +    uint32_t    malformedFragments;         /**< Counts the number of malformed fragments processed for all frames */
70058 +    uint32_t    autoLearnBusy;              /**< Counts the number of times a busy condition occurs when attempting
70059 +                                                 to access an Reassembly Automatic Learning Hash set */
70060 +    uint32_t    discardedFragments;         /**< Counts the number of fragments discarded by the reassembly process */
70061 +    uint32_t    moreThan16Fragments;        /**< Counts the fragment occurrences in which the number of fragments-per-frame
70062 +                                                 exceeds 16 */
70063 +    uint32_t    exceedMaxReassemblyFrameLen;/**< ounts the number of times that a successful reassembled frame
70064 +                                                 length exceeds MaxReassembledFrameLength value */
70065 +} t_FmPcdManipReassemCapwapStats;
70066 +
70067 +/**************************************************************************//**
70068 + @Description   Structure for retrieving CAPWAP fragmentation statistics
70069 +*//***************************************************************************/
70070 +typedef struct t_FmPcdManipFragCapwapStats {
70071 +    uint32_t    totalFrames;            /**< Number of frames that passed through the manipulation node */
70072 +    uint32_t    fragmentedFrames;       /**< Number of frames that were fragmented */
70073 +    uint32_t    generatedFragments;     /**< Number of fragments that were generated */
70074 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
70075 +    uint8_t     sgAllocationFailure;    /**< Number of allocation failure of s/g buffers */
70076 +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
70077 +} t_FmPcdManipFragCapwapStats;
70078 +#endif /* (DPAA_VERSION >= 11) */
70079 +
70080 +/**************************************************************************//**
70081 + @Description   Structure for retrieving reassembly statistics
70082 +*//***************************************************************************/
70083 +typedef struct t_FmPcdManipReassemStats {
70084 +    union {
70085 +        t_FmPcdManipReassemIpStats  ipReassem;  /**< Structure for IP reassembly statistics */
70086 +#if (DPAA_VERSION >= 11)
70087 +        t_FmPcdManipReassemCapwapStats  capwapReassem;  /**< Structure for CAPWAP reassembly statistics */
70088 +#endif /* (DPAA_VERSION >= 11) */
70089 +    } u;
70090 +} t_FmPcdManipReassemStats;
70091 +
70092 +/**************************************************************************//**
70093 + @Description   Structure for retrieving fragmentation statistics
70094 +*//***************************************************************************/
70095 +typedef struct t_FmPcdManipFragStats {
70096 +    union {
70097 +        t_FmPcdManipFragIpStats     ipFrag;     /**< Structure for IP fragmentation statistics */
70098 +#if (DPAA_VERSION >= 11)
70099 +        t_FmPcdManipFragCapwapStats capwapFrag; /**< Structure for CAPWAP fragmentation statistics */
70100 +#endif /* (DPAA_VERSION >= 11) */
70101 +    } u;
70102 +} t_FmPcdManipFragStats;
70103 +
70104 +/**************************************************************************//**
70105 + @Description   Structure for selecting manipulation statistics
70106 +*//***************************************************************************/
70107 +typedef struct t_FmPcdManipStats {
70108 +    union {
70109 +        t_FmPcdManipReassemStats    reassem;    /**< Structure for reassembly statistics */
70110 +        t_FmPcdManipFragStats       frag;       /**< Structure for fragmentation statistics */
70111 +    } u;
70112 +} t_FmPcdManipStats;
70113 +
70114 +#if (DPAA_VERSION >= 11)
70115 +/**************************************************************************//**
70116 + @Description   Parameters for defining frame replicator group and its members
70117 +*//***************************************************************************/
70118 +typedef struct t_FmPcdFrmReplicGroupParams {
70119 +    uint8_t                     maxNumOfEntries;    /**< Maximal number of members in the group;
70120 +                                                         Must be at least 2. */
70121 +    uint8_t                     numOfEntries;       /**< Number of members in the group;
70122 +                                                         Must be at least 1. */
70123 +    t_FmPcdCcNextEngineParams   nextEngineParams[FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES];
70124 +                                                    /**< Array of members' parameters */
70125 +} t_FmPcdFrmReplicGroupParams;
70126 +#endif /* (DPAA_VERSION >= 11) */
70127 +
70128 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
70129 +/**************************************************************************//**
70130 + @Description   structure for defining statistics node
70131 +*//***************************************************************************/
70132 +typedef struct t_FmPcdStatsParams {
70133 +    e_FmPcdStatsType    type;   /**< type of statistics node */
70134 +} t_FmPcdStatsParams;
70135 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
70136 +
70137 +/**************************************************************************//**
70138 + @Function      FM_PCD_NetEnvCharacteristicsSet
70139 +
70140 + @Description   Define a set of Network Environment Characteristics.
70141 +
70142 +                When setting an environment it is important to understand its
70143 +                application. It is not meant to describe the flows that will run
70144 +                on the ports using this environment, but what the user means TO DO
70145 +                with the PCD mechanisms in order to parse-classify-distribute those
70146 +                frames.
70147 +                By specifying a distinction unit, the user means it would use that option
70148 +                for distinction between frames at either a KeyGen scheme or a coarse
70149 +                classification action descriptor. Using interchangeable headers to define a
70150 +                unit means that the user is indifferent to which of the interchangeable
70151 +                headers is present in the frame, and wants the distinction to be based
70152 +                on the presence of either one of them.
70153 +
70154 +                Depending on context, there are limitations to the use of environments. A
70155 +                port using the PCD functionality is bound to an environment. Some or even
70156 +                all ports may share an environment but also an environment per port is
70157 +                possible. When initializing a scheme, a classification plan group (see below),
70158 +                or a coarse classification tree, one of the initialized environments must be
70159 +                stated and related to. When a port is bound to a scheme, a classification
70160 +                plan group, or a coarse classification tree, it MUST be bound to the same
70161 +                environment.
70162 +
70163 +                The different PCD modules, may relate (for flows definition) ONLY on
70164 +                distinction units as defined by their environment. When initializing a
70165 +                scheme for example, it may not choose to select IPV4 as a match for
70166 +                recognizing flows unless it was defined in the relating environment. In
70167 +                fact, to guide the user through the configuration of the PCD, each module's
70168 +                characterization in terms of flows is not done using protocol names, but using
70169 +                environment indexes.
70170 +
70171 +                In terms of HW implementation, the list of distinction units sets the LCV vectors
70172 +                and later used for match vector, classification plan vectors and coarse classification
70173 +                indexing.
70174 +
70175 + @Param[in]     h_FmPcd         FM PCD module descriptor.
70176 + @Param[in]     p_NetEnvParams  A structure of parameters for the initialization of
70177 +                                the network environment.
70178 +
70179 + @Return        A handle to the initialized object on success; NULL code otherwise.
70180 +
70181 + @Cautions      Allowed only following FM_PCD_Init().
70182 +*//***************************************************************************/
70183 +t_Handle FM_PCD_NetEnvCharacteristicsSet(t_Handle h_FmPcd, t_FmPcdNetEnvParams *p_NetEnvParams);
70184 +
70185 +/**************************************************************************//**
70186 + @Function      FM_PCD_NetEnvCharacteristicsDelete
70187 +
70188 + @Description   Deletes a set of Network Environment Characteristics.
70189 +
70190 + @Param[in]     h_NetEnv        A handle to the Network environment.
70191 +
70192 + @Return        E_OK on success; Error code otherwise.
70193 +*//***************************************************************************/
70194 +t_Error FM_PCD_NetEnvCharacteristicsDelete(t_Handle h_NetEnv);
70195 +
70196 +/**************************************************************************//**
70197 + @Function      FM_PCD_KgSchemeSet
70198 +
70199 + @Description   Initializing or modifying and enabling a scheme for the KeyGen.
70200 +                This routine should be called for adding or modifying a scheme.
70201 +                When a scheme needs modifying, the API requires that it will be
70202 +                rewritten. In such a case 'modify' should be TRUE. If the
70203 +                routine is called for a valid scheme and 'modify' is FALSE,
70204 +                it will return error.
70205 +
70206 + @Param[in]     h_FmPcd         If this is a new scheme - A handle to an FM PCD Module.
70207 +                                Otherwise NULL (ignored by driver).
70208 + @Param[in,out] p_SchemeParams  A structure of parameters for defining the scheme
70209 +
70210 + @Return        A handle to the initialized scheme on success; NULL code otherwise.
70211 +                When used as "modify" (rather than for setting a new scheme),
70212 +                p_SchemeParams->id.h_Scheme will return NULL if action fails due to scheme
70213 +                BUSY state.
70214 +
70215 + @Cautions      Allowed only following FM_PCD_Init().
70216 +*//***************************************************************************/
70217 +t_Handle FM_PCD_KgSchemeSet(t_Handle                h_FmPcd,
70218 +                            t_FmPcdKgSchemeParams   *p_SchemeParams);
70219 +
70220 +/**************************************************************************//**
70221 + @Function      FM_PCD_KgSchemeDelete
70222 +
70223 + @Description   Deleting an initialized scheme.
70224 +
70225 + @Param[in]     h_Scheme        scheme handle as returned by FM_PCD_KgSchemeSet()
70226 +
70227 + @Return        E_OK on success; Error code otherwise.
70228 +
70229 + @Cautions      Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
70230 +*//***************************************************************************/
70231 +t_Error     FM_PCD_KgSchemeDelete(t_Handle h_Scheme);
70232 +
70233 +/**************************************************************************//**
70234 + @Function      FM_PCD_KgSchemeGetCounter
70235 +
70236 + @Description   Reads scheme packet counter.
70237 +
70238 + @Param[in]     h_Scheme        scheme handle as returned by FM_PCD_KgSchemeSet().
70239 +
70240 + @Return        Counter's current value.
70241 +
70242 + @Cautions      Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
70243 +*//***************************************************************************/
70244 +uint32_t  FM_PCD_KgSchemeGetCounter(t_Handle h_Scheme);
70245 +
70246 +/**************************************************************************//**
70247 + @Function      FM_PCD_KgSchemeSetCounter
70248 +
70249 + @Description   Writes scheme packet counter.
70250 +
70251 + @Param[in]     h_Scheme        scheme handle as returned by FM_PCD_KgSchemeSet().
70252 + @Param[in]     value           New scheme counter value - typically '0' for
70253 +                                resetting the counter.
70254 +
70255 + @Return        E_OK on success; Error code otherwise.
70256 +
70257 + @Cautions      Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
70258 +*//***************************************************************************/
70259 +t_Error  FM_PCD_KgSchemeSetCounter(t_Handle h_Scheme, uint32_t value);
70260 +
70261 +/**************************************************************************//**
70262 + @Function      FM_PCD_PlcrProfileSet
70263 +
70264 + @Description   Sets a profile entry in the policer profile table.
70265 +                The routine overrides any existing value.
70266 +
70267 + @Param[in]     h_FmPcd           A handle to an FM PCD Module.
70268 + @Param[in]     p_Profile         A structure of parameters for defining a
70269 +                                  policer profile entry.
70270 +
70271 + @Return        A handle to the initialized object on success; NULL code otherwise.
70272 +                When used as "modify" (rather than for setting a new profile),
70273 +                p_Profile->id.h_Profile will return NULL if action fails due to profile
70274 +                BUSY state.
70275 + @Cautions      Allowed only following FM_PCD_Init().
70276 +*//***************************************************************************/
70277 +t_Handle FM_PCD_PlcrProfileSet(t_Handle                  h_FmPcd,
70278 +                               t_FmPcdPlcrProfileParams  *p_Profile);
70279 +
70280 +/**************************************************************************//**
70281 + @Function      FM_PCD_PlcrProfileDelete
70282 +
70283 + @Description   Delete a profile entry in the policer profile table.
70284 +                The routine set entry to invalid.
70285 +
70286 + @Param[in]     h_Profile       A handle to the profile.
70287 +
70288 + @Return        E_OK on success; Error code otherwise.
70289 +
70290 + @Cautions      Allowed only following FM_PCD_Init().
70291 +*//***************************************************************************/
70292 +t_Error FM_PCD_PlcrProfileDelete(t_Handle h_Profile);
70293 +
70294 +/**************************************************************************//**
70295 + @Function      FM_PCD_PlcrProfileGetCounter
70296 +
70297 + @Description   Sets an entry in the classification plan.
70298 +                The routine overrides any existing value.
70299 +
70300 + @Param[in]     h_Profile       A handle to the profile.
70301 + @Param[in]     counter         Counter selector.
70302 +
70303 + @Return        specific counter value.
70304 +
70305 + @Cautions      Allowed only following FM_PCD_Init().
70306 +*//***************************************************************************/
70307 +uint32_t FM_PCD_PlcrProfileGetCounter(t_Handle                      h_Profile,
70308 +                                      e_FmPcdPlcrProfileCounters    counter);
70309 +
70310 +/**************************************************************************//**
70311 + @Function      FM_PCD_PlcrProfileSetCounter
70312 +
70313 + @Description   Sets an entry in the classification plan.
70314 +                The routine overrides any existing value.
70315 +
70316 + @Param[in]     h_Profile       A handle to the profile.
70317 + @Param[in]     counter         Counter selector.
70318 + @Param[in]     value           value to set counter with.
70319 +
70320 + @Return        E_OK on success; Error code otherwise.
70321 +
70322 + @Cautions      Allowed only following FM_PCD_Init().
70323 +*//***************************************************************************/
70324 +t_Error FM_PCD_PlcrProfileSetCounter(t_Handle                   h_Profile,
70325 +                                     e_FmPcdPlcrProfileCounters counter,
70326 +                                     uint32_t                   value);
70327 +
70328 +/**************************************************************************//**
70329 + @Function      FM_PCD_CcRootBuild
70330 +
70331 + @Description   This routine must be called to define a complete coarse
70332 +                classification tree. This is the way to define coarse
70333 +                classification to a certain flow - the KeyGen schemes
70334 +                may point only to trees defined in this way.
70335 +
70336 + @Param[in]     h_FmPcd         FM PCD module descriptor.
70337 + @Param[in]     p_Params        A structure of parameters to define the tree.
70338 +
70339 + @Return        A handle to the initialized object on success; NULL code otherwise.
70340 +
70341 + @Cautions      Allowed only following FM_PCD_Init().
70342 +*//***************************************************************************/
70343 +t_Handle FM_PCD_CcRootBuild (t_Handle             h_FmPcd,
70344 +                             t_FmPcdCcTreeParams  *p_Params);
70345 +
70346 +/**************************************************************************//**
70347 + @Function      FM_PCD_CcRootDelete
70348 +
70349 + @Description   Deleting an built tree.
70350 +
70351 + @Param[in]     h_CcTree        A handle to a CC tree.
70352 +
70353 + @Return        E_OK on success; Error code otherwise.
70354 +
70355 + @Cautions      Allowed only following FM_PCD_Init().
70356 +*//***************************************************************************/
70357 +t_Error FM_PCD_CcRootDelete(t_Handle h_CcTree);
70358 +
70359 +/**************************************************************************//**
70360 + @Function      FM_PCD_CcRootModifyNextEngine
70361 +
70362 + @Description   Modify the Next Engine Parameters in the entry of the tree.
70363 +
70364 + @Param[in]     h_CcTree                    A handle to the tree
70365 + @Param[in]     grpId                       A Group index in the tree
70366 + @Param[in]     index                       Entry index in the group defined by grpId
70367 + @Param[in]     p_FmPcdCcNextEngineParams   Pointer to new next engine parameters
70368 +
70369 + @Return        E_OK on success; Error code otherwise.
70370 +
70371 + @Cautions      Allowed only following FM_PCD_CcBuildTree().
70372 +*//***************************************************************************/
70373 +t_Error FM_PCD_CcRootModifyNextEngine(t_Handle                  h_CcTree,
70374 +                                      uint8_t                   grpId,
70375 +                                      uint8_t                   index,
70376 +                                      t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
70377 +
70378 +/**************************************************************************//**
70379 + @Function      FM_PCD_MatchTableSet
70380 +
70381 + @Description   This routine should be called for each CC (coarse classification)
70382 +                node. The whole CC tree should be built bottom up so that each
70383 +                node points to already defined nodes.
70384 +
70385 + @Param[in]     h_FmPcd         FM PCD module descriptor.
70386 + @Param[in]     p_Param         A structure of parameters defining the CC node
70387 +
70388 + @Return        A handle to the initialized object on success; NULL code otherwise.
70389 +
70390 + @Cautions      Allowed only following FM_PCD_Init().
70391 +*//***************************************************************************/
70392 +t_Handle   FM_PCD_MatchTableSet(t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_Param);
70393 +
70394 +/**************************************************************************//**
70395 + @Function      FM_PCD_MatchTableDelete
70396 +
70397 + @Description   Deleting an built node.
70398 +
70399 + @Param[in]     h_CcNode        A handle to a CC node.
70400 +
70401 + @Return        E_OK on success; Error code otherwise.
70402 +
70403 + @Cautions      Allowed only following FM_PCD_Init().
70404 +*//***************************************************************************/
70405 +t_Error FM_PCD_MatchTableDelete(t_Handle h_CcNode);
70406 +
70407 +/**************************************************************************//**
70408 + @Function      FM_PCD_MatchTableModifyMissNextEngine
70409 +
70410 + @Description   Modify the Next Engine Parameters of the Miss key case of the node.
70411 +
70412 + @Param[in]     h_CcNode                    A handle to the node
70413 + @Param[in]     p_FmPcdCcNextEngineParams   Parameters for defining next engine
70414 +
70415 + @Return        E_OK on success; Error code otherwise.
70416 +
70417 + @Cautions      Allowed only following FM_PCD_MatchTableSet();
70418 +                Not relevant in the case the node is of type 'INDEXED_LOOKUP'.
70419 +                When configuring nextEngine = e_FM_PCD_CC, note that
70420 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70421 +                from the currently changed table.
70422 +
70423 +*//***************************************************************************/
70424 +t_Error FM_PCD_MatchTableModifyMissNextEngine(t_Handle                  h_CcNode,
70425 +                                              t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
70426 +
70427 +/**************************************************************************//**
70428 + @Function      FM_PCD_MatchTableRemoveKey
70429 +
70430 + @Description   Remove the key (including next engine parameters of this key)
70431 +                defined by the index of the relevant node.
70432 +
70433 + @Param[in]     h_CcNode                    A handle to the node
70434 + @Param[in]     keyIndex                    Key index for removing
70435 +
70436 + @Return        E_OK on success; Error code otherwise.
70437 +
70438 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70439 +                node and the nodes that lead to it.
70440 +*//***************************************************************************/
70441 +t_Error FM_PCD_MatchTableRemoveKey(t_Handle h_CcNode, uint16_t keyIndex);
70442 +
70443 +/**************************************************************************//**
70444 + @Function      FM_PCD_MatchTableAddKey
70445 +
70446 + @Description   Add the key (including next engine parameters of this key in the
70447 +                index defined by the keyIndex. Note that 'FM_PCD_LAST_KEY_INDEX'
70448 +                may be used by user that don't care about the position of the
70449 +                key in the table - in that case, the key will be automatically
70450 +                added by the driver in the last available entry.
70451 +
70452 + @Param[in]     h_CcNode     A handle to the node
70453 + @Param[in]     keyIndex     Key index for adding.
70454 + @Param[in]     keySize      Key size of added key
70455 + @Param[in]     p_KeyParams  A pointer to the parameters includes
70456 +                             new key with Next Engine Parameters
70457 +
70458 + @Return        E_OK on success; Error code otherwise.
70459 +
70460 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70461 +                node and the nodes that lead to it.
70462 +*//***************************************************************************/
70463 +t_Error FM_PCD_MatchTableAddKey(t_Handle            h_CcNode,
70464 +                                uint16_t            keyIndex,
70465 +                                uint8_t             keySize,
70466 +                                t_FmPcdCcKeyParams  *p_KeyParams);
70467 +
70468 +/**************************************************************************//**
70469 + @Function      FM_PCD_MatchTableModifyNextEngine
70470 +
70471 + @Description   Modify the Next Engine Parameters in the relevant key entry of the node.
70472 +
70473 + @Param[in]     h_CcNode                    A handle to the node
70474 + @Param[in]     keyIndex                    Key index for Next Engine modifications
70475 + @Param[in]     p_FmPcdCcNextEngineParams   Parameters for defining next engine
70476 +
70477 + @Return        E_OK on success; Error code otherwise.
70478 +
70479 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
70480 +                When configuring nextEngine = e_FM_PCD_CC, note that
70481 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70482 +                from the currently changed table.
70483 +
70484 +*//***************************************************************************/
70485 +t_Error FM_PCD_MatchTableModifyNextEngine(t_Handle                  h_CcNode,
70486 +                                          uint16_t                  keyIndex,
70487 +                                          t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
70488 +
70489 +/**************************************************************************//**
70490 + @Function      FM_PCD_MatchTableModifyKeyAndNextEngine
70491 +
70492 + @Description   Modify the key and Next Engine Parameters of this key in the
70493 +                index defined by the keyIndex.
70494 +
70495 + @Param[in]     h_CcNode                    A handle to the node
70496 + @Param[in]     keyIndex                    Key index for adding
70497 + @Param[in]     keySize                     Key size of added key
70498 + @Param[in]     p_KeyParams                 A pointer to the parameters includes
70499 +                                            modified key and modified Next Engine Parameters
70500 +
70501 + @Return        E_OK on success; Error code otherwise.
70502 +
70503 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70504 +                node and the nodes that lead to it.
70505 +                When configuring nextEngine = e_FM_PCD_CC, note that
70506 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70507 +                from the currently changed table.
70508 +*//***************************************************************************/
70509 +t_Error FM_PCD_MatchTableModifyKeyAndNextEngine(t_Handle            h_CcNode,
70510 +                                                uint16_t            keyIndex,
70511 +                                                uint8_t             keySize,
70512 +                                                t_FmPcdCcKeyParams  *p_KeyParams);
70513 +
70514 +/**************************************************************************//**
70515 + @Function      FM_PCD_MatchTableModifyKey
70516 +
70517 + @Description   Modify the key in the index defined by the keyIndex.
70518 +
70519 + @Param[in]     h_CcNode                    A handle to the node
70520 + @Param[in]     keyIndex                    Key index for adding
70521 + @Param[in]     keySize                     Key size of added key
70522 + @Param[in]     p_Key                       A pointer to the new key
70523 + @Param[in]     p_Mask                      A pointer to the new mask if relevant,
70524 +                                            otherwise pointer to NULL
70525 +
70526 + @Return        E_OK on success; Error code otherwise.
70527 +
70528 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70529 +                node and the nodes that lead to it.
70530 +*//***************************************************************************/
70531 +t_Error FM_PCD_MatchTableModifyKey(t_Handle h_CcNode,
70532 +                                   uint16_t keyIndex,
70533 +                                   uint8_t  keySize,
70534 +                                   uint8_t  *p_Key,
70535 +                                   uint8_t  *p_Mask);
70536 +
70537 +/**************************************************************************//**
70538 + @Function      FM_PCD_MatchTableFindNRemoveKey
70539 +
70540 + @Description   Remove the key (including next engine parameters of this key)
70541 +                defined by the key and mask. Note that this routine will search
70542 +                the node to locate the index of the required key (& mask) to remove.
70543 +
70544 + @Param[in]     h_CcNode                    A handle to the node
70545 + @Param[in]     keySize                     Key size of the one to remove.
70546 + @Param[in]     p_Key                       A pointer to the requested key to remove.
70547 + @Param[in]     p_Mask                      A pointer to the mask if relevant,
70548 +                                            otherwise pointer to NULL
70549 +
70550 + @Return        E_OK on success; Error code otherwise.
70551 +
70552 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70553 +                node and the nodes that lead to it.
70554 +*//***************************************************************************/
70555 +t_Error FM_PCD_MatchTableFindNRemoveKey(t_Handle h_CcNode,
70556 +                                        uint8_t  keySize,
70557 +                                        uint8_t  *p_Key,
70558 +                                        uint8_t  *p_Mask);
70559 +
70560 +/**************************************************************************//**
70561 + @Function      FM_PCD_MatchTableFindNModifyNextEngine
70562 +
70563 + @Description   Modify the Next Engine Parameters in the relevant key entry of
70564 +                the node. Note that this routine will search the node to locate
70565 +                the index of the required key (& mask) to modify.
70566 +
70567 + @Param[in]     h_CcNode                    A handle to the node
70568 + @Param[in]     keySize                     Key size of the one to modify.
70569 + @Param[in]     p_Key                       A pointer to the requested key to modify.
70570 + @Param[in]     p_Mask                      A pointer to the mask if relevant,
70571 +                                            otherwise pointer to NULL
70572 + @Param[in]     p_FmPcdCcNextEngineParams   Parameters for defining next engine
70573 +
70574 + @Return        E_OK on success; Error code otherwise.
70575 +
70576 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
70577 +                When configuring nextEngine = e_FM_PCD_CC, note that
70578 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70579 +                from the currently changed table.
70580 +*//***************************************************************************/
70581 +t_Error FM_PCD_MatchTableFindNModifyNextEngine(t_Handle                  h_CcNode,
70582 +                                               uint8_t                   keySize,
70583 +                                               uint8_t                   *p_Key,
70584 +                                               uint8_t                   *p_Mask,
70585 +                                               t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
70586 +
70587 +/**************************************************************************//**
70588 + @Function      FM_PCD_MatchTableFindNModifyKeyAndNextEngine
70589 +
70590 + @Description   Modify the key and Next Engine Parameters of this key in the
70591 +                index defined by the keyIndex. Note that this routine will search
70592 +                the node to locate the index of the required key (& mask) to modify.
70593 +
70594 + @Param[in]     h_CcNode                    A handle to the node
70595 + @Param[in]     keySize                     Key size of the one to modify.
70596 + @Param[in]     p_Key                       A pointer to the requested key to modify.
70597 + @Param[in]     p_Mask                      A pointer to the mask if relevant,
70598 +                                            otherwise pointer to NULL
70599 + @Param[in]     p_KeyParams                 A pointer to the parameters includes
70600 +                                            modified key and modified Next Engine Parameters
70601 +
70602 + @Return        E_OK on success; Error code otherwise.
70603 +
70604 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70605 +                node and the nodes that lead to it.
70606 +                When configuring nextEngine = e_FM_PCD_CC, note that
70607 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70608 +                from the currently changed table.
70609 +*//***************************************************************************/
70610 +t_Error FM_PCD_MatchTableFindNModifyKeyAndNextEngine(t_Handle            h_CcNode,
70611 +                                                     uint8_t             keySize,
70612 +                                                     uint8_t             *p_Key,
70613 +                                                     uint8_t             *p_Mask,
70614 +                                                     t_FmPcdCcKeyParams  *p_KeyParams);
70615 +
70616 +/**************************************************************************//**
70617 + @Function      FM_PCD_MatchTableFindNModifyKey
70618 +
70619 + @Description   Modify the key  in the index defined by the keyIndex. Note that
70620 +                this routine will search the node to locate the index of the
70621 +                required key (& mask) to modify.
70622 +
70623 + @Param[in]     h_CcNode                    A handle to the node
70624 + @Param[in]     keySize                     Key size of the one to modify.
70625 + @Param[in]     p_Key                       A pointer to the requested key to modify.
70626 + @Param[in]     p_Mask                      A pointer to the mask if relevant,
70627 +                                            otherwise pointer to NULL
70628 + @Param[in]     p_NewKey                    A pointer to the new key
70629 + @Param[in]     p_NewMask                   A pointer to the new mask if relevant,
70630 +                                            otherwise pointer to NULL
70631 +
70632 + @Return        E_OK on success; Error code otherwise.
70633 +
70634 + @Cautions      Allowed only following FM_PCD_MatchTableSet() was called for this
70635 +                node and the nodes that lead to it.
70636 +*//***************************************************************************/
70637 +t_Error FM_PCD_MatchTableFindNModifyKey(t_Handle h_CcNode,
70638 +                                        uint8_t  keySize,
70639 +                                        uint8_t  *p_Key,
70640 +                                        uint8_t  *p_Mask,
70641 +                                        uint8_t  *p_NewKey,
70642 +                                        uint8_t  *p_NewMask);
70643 +
70644 +/**************************************************************************//**
70645 + @Function      FM_PCD_MatchTableGetKeyCounter
70646 +
70647 + @Description   This routine may be used to get a counter of specific key in a CC
70648 +                Node; This counter reflects how many frames passed that were matched
70649 +                this key.
70650 +
70651 + @Param[in]     h_CcNode        A handle to the node
70652 + @Param[in]     keyIndex        Key index for adding
70653 +
70654 + @Return        The specific key counter.
70655 +
70656 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
70657 +*//***************************************************************************/
70658 +uint32_t FM_PCD_MatchTableGetKeyCounter(t_Handle h_CcNode, uint16_t keyIndex);
70659 +
70660 +/**************************************************************************//**
70661 + @Function      FM_PCD_MatchTableGetKeyStatistics
70662 +
70663 + @Description   This routine may be used to get statistics counters of specific key
70664 +                in a CC Node.
70665 +
70666 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
70667 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
70668 +                these counters reflect how many frames passed that were matched
70669 +                this key; The total frames count will be returned in the counter
70670 +                of the first range (as only one frame length range was defined).
70671 +                If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
70672 +                frame count will be separated to frame length counters, based on
70673 +                provided frame length ranges.
70674 +
70675 + @Param[in]     h_CcNode        A handle to the node
70676 + @Param[in]     keyIndex        Key index for adding
70677 + @Param[out]    p_KeyStatistics Key statistics counters
70678 +
70679 + @Return        The specific key statistics.
70680 +
70681 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
70682 +*//***************************************************************************/
70683 +t_Error FM_PCD_MatchTableGetKeyStatistics(t_Handle                  h_CcNode,
70684 +                                          uint16_t                  keyIndex,
70685 +                                          t_FmPcdCcKeyStatistics    *p_KeyStatistics);
70686 +
70687 +/**************************************************************************//**
70688 + @Function      FM_PCD_MatchTableGetMissStatistics
70689 +
70690 + @Description   This routine may be used to get statistics counters of miss entry
70691 +                in a CC Node.
70692 +
70693 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
70694 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
70695 +                these counters reflect how many frames were not matched to any
70696 +                existing key and therefore passed through the miss entry; The
70697 +                total frames count will be returned in the counter of the
70698 +                first range (as only one frame length range was defined).
70699 +
70700 + @Param[in]     h_CcNode            A handle to the node
70701 + @Param[out]    p_MissStatistics    Statistics counters for 'miss'
70702 +
70703 + @Return        The statistics for 'miss'.
70704 +
70705 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
70706 +*//***************************************************************************/
70707 +t_Error FM_PCD_MatchTableGetMissStatistics(t_Handle                  h_CcNode,
70708 +                                           t_FmPcdCcKeyStatistics    *p_MissStatistics);
70709 +
70710 +/**************************************************************************//**
70711 + @Function      FM_PCD_MatchTableFindNGetKeyStatistics
70712 +
70713 + @Description   This routine may be used to get statistics counters of specific key
70714 +                in a CC Node.
70715 +
70716 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
70717 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
70718 +                these counters reflect how many frames passed that were matched
70719 +                this key; The total frames count will be returned in the counter
70720 +                of the first range (as only one frame length range was defined).
70721 +                If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
70722 +                frame count will be separated to frame length counters, based on
70723 +                provided frame length ranges.
70724 +                Note that this routine will search the node to locate the index
70725 +                of the required key based on received key parameters.
70726 +
70727 + @Param[in]     h_CcNode        A handle to the node
70728 + @Param[in]     keySize         Size of the requested key
70729 + @Param[in]     p_Key           A pointer to the requested key
70730 + @Param[in]     p_Mask          A pointer to the mask if relevant,
70731 +                                otherwise pointer to NULL
70732 + @Param[out]    p_KeyStatistics Key statistics counters
70733 +
70734 + @Return        The specific key statistics.
70735 +
70736 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
70737 +*//***************************************************************************/
70738 +t_Error FM_PCD_MatchTableFindNGetKeyStatistics(t_Handle                 h_CcNode,
70739 +                                               uint8_t                  keySize,
70740 +                                               uint8_t                  *p_Key,
70741 +                                               uint8_t                  *p_Mask,
70742 +                                               t_FmPcdCcKeyStatistics   *p_KeyStatistics);
70743 +
70744 +/**************************************************************************//*
70745 + @Function      FM_PCD_MatchTableGetNextEngine
70746 +
70747 + @Description   Gets NextEngine of the relevant keyIndex.
70748 +
70749 + @Param[in]     h_CcNode                    A handle to the node.
70750 + @Param[in]     keyIndex                    keyIndex in the relevant node.
70751 + @Param[out]    p_FmPcdCcNextEngineParams   here updated nextEngine parameters for
70752 +                                            the relevant keyIndex of the CC Node
70753 +                                            received as parameter to this function
70754 +
70755 + @Return        E_OK on success; Error code otherwise.
70756 +
70757 + @Cautions      Allowed only following FM_PCD_Init().
70758 +*//***************************************************************************/
70759 +t_Error FM_PCD_MatchTableGetNextEngine(t_Handle                     h_CcNode,
70760 +                                       uint16_t                     keyIndex,
70761 +                                       t_FmPcdCcNextEngineParams    *p_FmPcdCcNextEngineParams);
70762 +
70763 +/**************************************************************************//*
70764 + @Function      FM_PCD_MatchTableGetIndexedHashBucket
70765 +
70766 + @Description   This routine simulates KeyGen operation on the provided key and
70767 +                calculates to which hash bucket it will be mapped.
70768 +
70769 + @Param[in]     h_CcNode                A handle to the node.
70770 + @Param[in]     kgKeySize               Key size as it was configured in the KG
70771 +                                        scheme that leads to this hash.
70772 + @Param[in]     p_KgKey                 Pointer to the key; must be like the key
70773 +                                        that the KG is generated, i.e. the same
70774 +                                        extraction and with mask if exist.
70775 + @Param[in]     kgHashShift             Hash-shift as it was configured in the KG
70776 +                                        scheme that leads to this hash.
70777 + @Param[out]    p_CcNodeBucketHandle    Pointer to the bucket of the provided key.
70778 + @Param[out]    p_BucketIndex           Index to the bucket of the provided key
70779 + @Param[out]    p_LastIndex             Pointer to last index in the bucket of the
70780 +                                        provided key.
70781 +
70782 + @Return        E_OK on success; Error code otherwise.
70783 +
70784 + @Cautions      Allowed only following FM_PCD_HashTableSet()
70785 +*//***************************************************************************/
70786 +t_Error FM_PCD_MatchTableGetIndexedHashBucket(t_Handle    h_CcNode,
70787 +                                              uint8_t     kgKeySize,
70788 +                                              uint8_t     *p_KgKey,
70789 +                                              uint8_t     kgHashShift,
70790 +                                              t_Handle    *p_CcNodeBucketHandle,
70791 +                                              uint8_t     *p_BucketIndex,
70792 +                                              uint16_t    *p_LastIndex);
70793 +
70794 +/**************************************************************************//**
70795 + @Function      FM_PCD_HashTableSet
70796 +
70797 + @Description   This routine initializes a hash table structure.
70798 +                KeyGen hash result determines the hash bucket.
70799 +                Next, KeyGen key is compared against all keys of this
70800 +                bucket (exact match).
70801 +                Number of sets (number of buckets) of the hash equals to the
70802 +                number of 1-s in 'hashResMask' in the provided parameters.
70803 +                Number of hash table ways is then calculated by dividing
70804 +                'maxNumOfKeys' equally between the hash sets. This is the maximal
70805 +                number of keys that a hash bucket may hold.
70806 +                The hash table is initialized empty and keys may be
70807 +                added to it following the initialization. Keys masks are not
70808 +                supported in current hash table implementation.
70809 +                The initialized hash table can be integrated as a node in a
70810 +                CC tree.
70811 +
70812 + @Param[in]     h_FmPcd     FM PCD module descriptor.
70813 + @Param[in]     p_Param     A structure of parameters defining the hash table
70814 +
70815 + @Return        A handle to the initialized object on success; NULL code otherwise.
70816 +
70817 + @Cautions      Allowed only following FM_PCD_Init().
70818 +*//***************************************************************************/
70819 +t_Handle FM_PCD_HashTableSet(t_Handle h_FmPcd, t_FmPcdHashTableParams *p_Param);
70820 +
70821 +/**************************************************************************//**
70822 + @Function      FM_PCD_HashTableDelete
70823 +
70824 + @Description   This routine deletes the provided hash table and released all
70825 +                its allocated resources.
70826 +
70827 + @Param[in]     h_HashTbl       A handle to a hash table
70828 +
70829 + @Return        E_OK on success; Error code otherwise.
70830 +
70831 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70832 +*//***************************************************************************/
70833 +t_Error FM_PCD_HashTableDelete(t_Handle h_HashTbl);
70834 +
70835 +/**************************************************************************//**
70836 + @Function      FM_PCD_HashTableAddKey
70837 +
70838 + @Description   This routine adds the provided key (including next engine
70839 +                parameters of this key) to the hash table.
70840 +                The key is added as the last key of the bucket that it is
70841 +                mapped to.
70842 +
70843 + @Param[in]     h_HashTbl    A handle to a hash table
70844 + @Param[in]     keySize      Key size of added key
70845 + @Param[in]     p_KeyParams  A pointer to the parameters includes
70846 +                             new key with next engine parameters; The pointer
70847 +                             to the key mask must be NULL, as masks are not
70848 +                             supported in hash table implementation.
70849 +
70850 + @Return        E_OK on success; Error code otherwise.
70851 +
70852 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70853 +*//***************************************************************************/
70854 +t_Error FM_PCD_HashTableAddKey(t_Handle            h_HashTbl,
70855 +                               uint8_t             keySize,
70856 +                               t_FmPcdCcKeyParams  *p_KeyParams);
70857 +
70858 +/**************************************************************************//**
70859 + @Function      FM_PCD_HashTableRemoveKey
70860 +
70861 + @Description   This routine removes the requested key (including next engine
70862 +                parameters of this key) from the hash table.
70863 +
70864 + @Param[in]     h_HashTbl    A handle to a hash table
70865 + @Param[in]     keySize      Key size of the one to remove.
70866 + @Param[in]     p_Key        A pointer to the requested key to remove.
70867 +
70868 + @Return        E_OK on success; Error code otherwise.
70869 +
70870 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70871 +*//***************************************************************************/
70872 +t_Error FM_PCD_HashTableRemoveKey(t_Handle h_HashTbl,
70873 +                                  uint8_t  keySize,
70874 +                                  uint8_t  *p_Key);
70875 +
70876 +/**************************************************************************//**
70877 + @Function      FM_PCD_HashTableModifyNextEngine
70878 +
70879 + @Description   This routine modifies the next engine for the provided key. The
70880 +                key should be previously added to the hash table.
70881 +
70882 + @Param[in]     h_HashTbl                   A handle to a hash table
70883 + @Param[in]     keySize                     Key size of the key to modify.
70884 + @Param[in]     p_Key                       A pointer to the requested key to modify.
70885 + @Param[in]     p_FmPcdCcNextEngineParams   A structure for defining new next engine
70886 +                                            parameters.
70887 +
70888 + @Return        E_OK on success; Error code otherwise.
70889 +
70890 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70891 +                When configuring nextEngine = e_FM_PCD_CC, note that
70892 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70893 +                from the currently changed table.
70894 +*//***************************************************************************/
70895 +t_Error FM_PCD_HashTableModifyNextEngine(t_Handle                  h_HashTbl,
70896 +                                         uint8_t                   keySize,
70897 +                                         uint8_t                   *p_Key,
70898 +                                         t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
70899 +
70900 +/**************************************************************************//**
70901 + @Function      FM_PCD_HashTableModifyMissNextEngine
70902 +
70903 + @Description   This routine modifies the next engine on key match miss.
70904 +
70905 + @Param[in]     h_HashTbl                   A handle to a hash table
70906 + @Param[in]     p_FmPcdCcNextEngineParams   A structure for defining new next engine
70907 +                                            parameters.
70908 +
70909 + @Return        E_OK on success; Error code otherwise.
70910 +
70911 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70912 +                When configuring nextEngine = e_FM_PCD_CC, note that
70913 +                p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
70914 +                from the currently changed table.
70915 +*//***************************************************************************/
70916 +t_Error FM_PCD_HashTableModifyMissNextEngine(t_Handle                  h_HashTbl,
70917 +                                             t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
70918 +
70919 +/**************************************************************************//*
70920 + @Function      FM_PCD_HashTableGetMissNextEngine
70921 +
70922 + @Description   Gets NextEngine in case of key match miss.
70923 +
70924 + @Param[in]     h_HashTbl                   A handle to a hash table
70925 + @Param[out]    p_FmPcdCcNextEngineParams   Next engine parameters for the specified
70926 +                                            hash table.
70927 +
70928 + @Return        E_OK on success; Error code otherwise.
70929 +
70930 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70931 +*//***************************************************************************/
70932 +t_Error FM_PCD_HashTableGetMissNextEngine(t_Handle                     h_HashTbl,
70933 +                                          t_FmPcdCcNextEngineParams    *p_FmPcdCcNextEngineParams);
70934 +
70935 +/**************************************************************************//**
70936 + @Function      FM_PCD_HashTableFindNGetKeyStatistics
70937 +
70938 + @Description   This routine may be used to get statistics counters of specific key
70939 +                in a hash table.
70940 +
70941 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
70942 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
70943 +                these counters reflect how many frames passed that were matched
70944 +                this key; The total frames count will be returned in the counter
70945 +                of the first range (as only one frame length range was defined).
70946 +                If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
70947 +                frame count will be separated to frame length counters, based on
70948 +                provided frame length ranges.
70949 +                Note that this routine will identify the bucket of this key in
70950 +                the hash table and will search the bucket to locate the index
70951 +                of the required key based on received key parameters.
70952 +
70953 + @Param[in]     h_HashTbl       A handle to a hash table
70954 + @Param[in]     keySize         Size of the requested key
70955 + @Param[in]     p_Key           A pointer to the requested key
70956 + @Param[out]    p_KeyStatistics Key statistics counters
70957 +
70958 + @Return        The specific key statistics.
70959 +
70960 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70961 +*//***************************************************************************/
70962 +t_Error FM_PCD_HashTableFindNGetKeyStatistics(t_Handle                 h_HashTbl,
70963 +                                              uint8_t                  keySize,
70964 +                                              uint8_t                  *p_Key,
70965 +                                              t_FmPcdCcKeyStatistics   *p_KeyStatistics);
70966 +
70967 +/**************************************************************************//**
70968 + @Function      FM_PCD_HashTableGetMissStatistics
70969 +
70970 + @Description   This routine may be used to get statistics counters of 'miss'
70971 +                entry of the a hash table.
70972 +
70973 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
70974 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
70975 +                these counters reflect how many frames were not matched to any
70976 +                existing key and therefore passed through the miss entry;
70977 +
70978 + @Param[in]     h_HashTbl           A handle to a hash table
70979 + @Param[out]    p_MissStatistics    Statistics counters for 'miss'
70980 +
70981 + @Return        The statistics for 'miss'.
70982 +
70983 + @Cautions      Allowed only following FM_PCD_HashTableSet().
70984 +*//***************************************************************************/
70985 +t_Error FM_PCD_HashTableGetMissStatistics(t_Handle                 h_HashTbl,
70986 +                                          t_FmPcdCcKeyStatistics   *p_MissStatistics);
70987 +
70988 +/**************************************************************************//**
70989 + @Function      FM_PCD_ManipNodeSet
70990 +
70991 + @Description   This routine should be called for defining a manipulation
70992 +                node. A manipulation node must be defined before the CC node
70993 +                that precedes it.
70994 +
70995 + @Param[in]     h_FmPcd             FM PCD module descriptor.
70996 + @Param[in]     p_FmPcdManipParams  A structure of parameters defining the manipulation
70997 +
70998 + @Return        A handle to the initialized object on success; NULL code otherwise.
70999 +
71000 + @Cautions      Allowed only following FM_PCD_Init().
71001 +*//***************************************************************************/
71002 +t_Handle FM_PCD_ManipNodeSet(t_Handle h_FmPcd, t_FmPcdManipParams *p_FmPcdManipParams);
71003 +
71004 +/**************************************************************************//**
71005 + @Function      FM_PCD_ManipNodeDelete
71006 +
71007 + @Description   Delete an existing manipulation node.
71008 +
71009 + @Param[in]     h_ManipNode     A handle to a manipulation node.
71010 +
71011 + @Return        E_OK on success; Error code otherwise.
71012 +
71013 + @Cautions      Allowed only following FM_PCD_ManipNodeSet().
71014 +*//***************************************************************************/
71015 +t_Error  FM_PCD_ManipNodeDelete(t_Handle h_ManipNode);
71016 +
71017 +/**************************************************************************//**
71018 + @Function      FM_PCD_ManipGetStatistics
71019 +
71020 + @Description   Retrieve the manipulation statistics.
71021 +
71022 + @Param[in]     h_ManipNode         A handle to a manipulation node.
71023 + @Param[out]    p_FmPcdManipStats   A structure for retrieving the manipulation statistics
71024 +
71025 + @Return        E_OK on success; Error code otherwise.
71026 +
71027 + @Cautions      Allowed only following FM_PCD_ManipNodeSet().
71028 +*//***************************************************************************/
71029 +t_Error FM_PCD_ManipGetStatistics(t_Handle h_ManipNode, t_FmPcdManipStats *p_FmPcdManipStats);
71030 +
71031 +/**************************************************************************//**
71032 + @Function      FM_PCD_ManipNodeReplace
71033 +
71034 + @Description   Change existing manipulation node to be according to new requirement.
71035 +
71036 + @Param[in]     h_ManipNode         A handle to a manipulation node.
71037 + @Param[out]    p_ManipParams       A structure of parameters defining the change requirement
71038 +
71039 + @Return        E_OK on success; Error code otherwise.
71040 +
71041 + @Cautions      Allowed only following FM_PCD_ManipNodeSet().
71042 +*//***************************************************************************/
71043 +t_Error FM_PCD_ManipNodeReplace(t_Handle h_ManipNode, t_FmPcdManipParams *p_ManipParams);
71044 +
71045 +#if (DPAA_VERSION >= 11)
71046 +/**************************************************************************//**
71047 + @Function      FM_PCD_FrmReplicSetGroup
71048 +
71049 + @Description   Initialize a Frame Replicator group.
71050 +
71051 + @Param[in]     h_FmPcd                FM PCD module descriptor.
71052 + @Param[in]     p_FrmReplicGroupParam  A structure of parameters for the initialization of
71053 +                                       the frame replicator group.
71054 +
71055 + @Return        A handle to the initialized object on success; NULL code otherwise.
71056 +
71057 + @Cautions      Allowed only following FM_PCD_Init().
71058 +*//***************************************************************************/
71059 +t_Handle FM_PCD_FrmReplicSetGroup(t_Handle h_FmPcd, t_FmPcdFrmReplicGroupParams *p_FrmReplicGroupParam);
71060 +
71061 +/**************************************************************************//**
71062 + @Function      FM_PCD_FrmReplicDeleteGroup
71063 +
71064 + @Description   Delete a Frame Replicator group.
71065 +
71066 + @Param[in]     h_FrmReplicGroup  A handle to the frame replicator group.
71067 +
71068 + @Return        E_OK on success;  Error code otherwise.
71069 +
71070 + @Cautions      Allowed only following FM_PCD_FrmReplicSetGroup().
71071 +*//***************************************************************************/
71072 +t_Error FM_PCD_FrmReplicDeleteGroup(t_Handle h_FrmReplicGroup);
71073 +
71074 +/**************************************************************************//**
71075 + @Function      FM_PCD_FrmReplicAddMember
71076 +
71077 + @Description   Add the member in the index defined by the memberIndex.
71078 +
71079 + @Param[in]     h_FrmReplicGroup   A handle to the frame replicator group.
71080 + @Param[in]     memberIndex        member index for adding.
71081 + @Param[in]     p_MemberParams     A pointer to the new member parameters.
71082 +
71083 + @Return        E_OK on success; Error code otherwise.
71084 +
71085 + @Cautions      Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
71086 +*//***************************************************************************/
71087 +t_Error FM_PCD_FrmReplicAddMember(t_Handle                   h_FrmReplicGroup,
71088 +                                  uint16_t                   memberIndex,
71089 +                                  t_FmPcdCcNextEngineParams *p_MemberParams);
71090 +
71091 +/**************************************************************************//**
71092 + @Function      FM_PCD_FrmReplicRemoveMember
71093 +
71094 + @Description   Remove the member defined by the index from the relevant group.
71095 +
71096 + @Param[in]     h_FrmReplicGroup   A handle to the frame replicator group.
71097 + @Param[in]     memberIndex        member index for removing.
71098 +
71099 + @Return        E_OK on success; Error code otherwise.
71100 +
71101 + @Cautions      Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
71102 +*//***************************************************************************/
71103 +t_Error FM_PCD_FrmReplicRemoveMember(t_Handle h_FrmReplicGroup,
71104 +                                     uint16_t memberIndex);
71105 +#endif /* (DPAA_VERSION >= 11) */
71106 +
71107 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
71108 +/**************************************************************************//**
71109 + @Function      FM_PCD_StatisticsSetNode
71110 +
71111 + @Description   This routine should be called for defining a statistics node.
71112 +
71113 + @Param[in]     h_FmPcd             FM PCD module descriptor.
71114 + @Param[in]     p_FmPcdstatsParams  A structure of parameters defining the statistics
71115 +
71116 + @Return        A handle to the initialized object on success; NULL code otherwise.
71117 +
71118 + @Cautions      Allowed only following FM_PCD_Init().
71119 +*//***************************************************************************/
71120 +t_Handle FM_PCD_StatisticsSetNode(t_Handle h_FmPcd, t_FmPcdStatsParams *p_FmPcdstatsParams);
71121 +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
71122 +
71123 +/** @} */ /* end of FM_PCD_Runtime_build_grp group */
71124 +/** @} */ /* end of FM_PCD_Runtime_grp group */
71125 +/** @} */ /* end of FM_PCD_grp group */
71126 +/** @} */ /* end of FM_grp group */
71127 +
71128 +
71129 +#ifdef NCSW_BACKWARD_COMPATIBLE_API
71130 +#define FM_PCD_MAX_NUM_OF_INTERCHANGABLE_HDRS   FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS
71131 +#define e_FM_PCD_MANIP_ONE_WAYS_HASH            e_FM_PCD_MANIP_ONE_WAY_HASH
71132 +#define e_FM_PCD_MANIP_TOW_WAYS_HASH            e_FM_PCD_MANIP_TWO_WAYS_HASH
71133 +
71134 +#define e_FM_PCD_MANIP_FRAGMENT_PACKECT         e_FM_PCD_MANIP_FRAGMENT_PACKET /* Feb13 */
71135 +
71136 +#define FM_PCD_SetNetEnvCharacteristics(_pcd, _params)  \
71137 +    FM_PCD_NetEnvCharacteristicsSet(_pcd, _params)
71138 +#define FM_PCD_KgSetScheme(_pcd, _params)       FM_PCD_KgSchemeSet(_pcd, _params)
71139 +#define FM_PCD_CcBuildTree(_pcd, _params)       FM_PCD_CcRootBuild(_pcd, _params)
71140 +#define FM_PCD_CcSetNode(_pcd, _params)         FM_PCD_MatchTableSet(_pcd, _params)
71141 +#define FM_PCD_PlcrSetProfile(_pcd, _params)    FM_PCD_PlcrProfileSet(_pcd, _params)
71142 +#define FM_PCD_ManipSetNode(_pcd, _params)      FM_PCD_ManipNodeSet(_pcd, _params)
71143 +
71144 +#define FM_PCD_DeleteNetEnvCharacteristics(_pcd, ...)   \
71145 +    FM_PCD_NetEnvCharacteristicsDelete(__VA_ARGS__)
71146 +#define FM_PCD_KgDeleteScheme(_pcd, ...)   \
71147 +    FM_PCD_KgSchemeDelete(__VA_ARGS__)
71148 +#define FM_PCD_KgGetSchemeCounter(_pcd, ...)   \
71149 +    FM_PCD_KgSchemeGetCounter(__VA_ARGS__)
71150 +#define FM_PCD_KgSetSchemeCounter(_pcd, ...)   \
71151 +    FM_PCD_KgSchemeSetCounter(__VA_ARGS__)
71152 +#define FM_PCD_PlcrDeleteProfile(_pcd, ...)   \
71153 +    FM_PCD_PlcrProfileDelete(__VA_ARGS__)
71154 +#define FM_PCD_PlcrGetProfileCounter(_pcd, ...)   \
71155 +    FM_PCD_PlcrProfileGetCounter(__VA_ARGS__)
71156 +#define FM_PCD_PlcrSetProfileCounter(_pcd, ...)   \
71157 +    FM_PCD_PlcrProfileSetCounter(__VA_ARGS__)
71158 +#define FM_PCD_CcDeleteTree(_pcd, ...)   \
71159 +    FM_PCD_CcRootDelete(__VA_ARGS__)
71160 +#define FM_PCD_CcTreeModifyNextEngine(_pcd, ...)   \
71161 +    FM_PCD_CcRootModifyNextEngine(__VA_ARGS__)
71162 +#define FM_PCD_CcDeleteNode(_pcd, ...)   \
71163 +    FM_PCD_MatchTableDelete(__VA_ARGS__)
71164 +#define FM_PCD_CcNodeModifyMissNextEngine(_pcd, ...)   \
71165 +    FM_PCD_MatchTableModifyMissNextEngine(__VA_ARGS__)
71166 +#define FM_PCD_CcNodeRemoveKey(_pcd, ...)   \
71167 +    FM_PCD_MatchTableRemoveKey(__VA_ARGS__)
71168 +#define FM_PCD_CcNodeAddKey(_pcd, ...)   \
71169 +    FM_PCD_MatchTableAddKey(__VA_ARGS__)
71170 +#define FM_PCD_CcNodeModifyNextEngine(_pcd, ...)   \
71171 +    FM_PCD_MatchTableModifyNextEngine(__VA_ARGS__)
71172 +#define FM_PCD_CcNodeModifyKeyAndNextEngine(_pcd, ...)   \
71173 +    FM_PCD_MatchTableModifyKeyAndNextEngine(__VA_ARGS__)
71174 +#define FM_PCD_CcNodeModifyKey(_pcd, ...)   \
71175 +    FM_PCD_MatchTableModifyKey(__VA_ARGS__)
71176 +#define FM_PCD_CcNodeFindNRemoveKey(_pcd, ...)   \
71177 +    FM_PCD_MatchTableFindNRemoveKey(__VA_ARGS__)
71178 +#define FM_PCD_CcNodeFindNModifyNextEngine(_pcd, ...)   \
71179 +    FM_PCD_MatchTableFindNModifyNextEngine(__VA_ARGS__)
71180 +#define FM_PCD_CcNodeFindNModifyKeyAndNextEngine(_pcd, ...) \
71181 +    FM_PCD_MatchTableFindNModifyKeyAndNextEngine(__VA_ARGS__)
71182 +#define FM_PCD_CcNodeFindNModifyKey(_pcd, ...)   \
71183 +    FM_PCD_MatchTableFindNModifyKey(__VA_ARGS__)
71184 +#define FM_PCD_CcIndexedHashNodeGetBucket(_pcd, ...)   \
71185 +    FM_PCD_MatchTableGetIndexedHashBucket(__VA_ARGS__)
71186 +#define FM_PCD_CcNodeGetNextEngine(_pcd, ...)   \
71187 +    FM_PCD_MatchTableGetNextEngine(__VA_ARGS__)
71188 +#define FM_PCD_CcNodeGetKeyCounter(_pcd, ...)   \
71189 +    FM_PCD_MatchTableGetKeyCounter(__VA_ARGS__)
71190 +#define FM_PCD_ManipDeleteNode(_pcd, ...)   \
71191 +    FM_PCD_ManipNodeDelete(__VA_ARGS__)
71192 +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
71193 +
71194 +
71195 +#endif /* __FM_PCD_EXT */
71196 --- /dev/null
71197 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_port_ext.h
71198 @@ -0,0 +1,2608 @@
71199 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
71200 + * All rights reserved.
71201 + *
71202 + * Redistribution and use in source and binary forms, with or without
71203 + * modification, are permitted provided that the following conditions are met:
71204 + *     * Redistributions of source code must retain the above copyright
71205 + *       notice, this list of conditions and the following disclaimer.
71206 + *     * Redistributions in binary form must reproduce the above copyright
71207 + *       notice, this list of conditions and the following disclaimer in the
71208 + *       documentation and/or other materials provided with the distribution.
71209 + *     * Neither the name of Freescale Semiconductor nor the
71210 + *       names of its contributors may be used to endorse or promote products
71211 + *       derived from this software without specific prior written permission.
71212 + *
71213 + *
71214 + * ALTERNATIVELY, this software may be distributed under the terms of the
71215 + * GNU General Public License ("GPL") as published by the Free Software
71216 + * Foundation, either version 2 of that License or (at your option) any
71217 + * later version.
71218 + *
71219 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
71220 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
71221 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
71222 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
71223 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
71224 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
71225 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
71226 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
71227 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
71228 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
71229 + */
71230 +
71231 +
71232 +/**************************************************************************//**
71233 + @File          fm_port_ext.h
71234 +
71235 + @Description   FM-Port Application Programming Interface.
71236 +*//***************************************************************************/
71237 +#ifndef __FM_PORT_EXT
71238 +#define __FM_PORT_EXT
71239 +
71240 +#include "error_ext.h"
71241 +#include "std_ext.h"
71242 +#include "fm_pcd_ext.h"
71243 +#include "fm_ext.h"
71244 +#include "net_ext.h"
71245 +
71246 +
71247 +/**************************************************************************//**
71248 +
71249 + @Group         FM_grp Frame Manager API
71250 +
71251 + @Description   FM API functions, definitions and enums
71252 +
71253 + @{
71254 +*//***************************************************************************/
71255 +
71256 +/**************************************************************************//**
71257 + @Group         FM_PORT_grp FM Port
71258 +
71259 + @Description   FM Port API
71260 +
71261 +                The FM uses a general module called "port" to represent a Tx port
71262 +                (MAC), an Rx port (MAC) or Offline Parsing port.
71263 +                The number of ports in an FM varies between SOCs.
71264 +                The SW driver manages these ports as sub-modules of the FM, i.e.
71265 +                after an FM is initialized, its ports may be initialized and
71266 +                operated upon.
71267 +
71268 +                The port is initialized aware of its type, but other functions on
71269 +                a port may be indifferent to its type. When necessary, the driver
71270 +                verifies coherence and returns error if applicable.
71271 +
71272 +                On initialization, user specifies the port type and it's index
71273 +                (relative to the port's type) - always starting at 0.
71274 +
71275 + @{
71276 +*//***************************************************************************/
71277 +
71278 +/**************************************************************************//**
71279 + @Description   An enum for defining port PCD modes.
71280 +                This enum defines the superset of PCD engines support - i.e. not
71281 +                all engines have to be used, but all have to be enabled. The real
71282 +                flow of a specific frame depends on the PCD configuration and the
71283 +                frame headers and payload.
71284 +                Note: the first engine and the first engine after the parser (if
71285 +                exists) should be in order, the order is important as it will
71286 +                define the flow of the port. However, as for the rest engines
71287 +                (the ones that follows), the order is not important anymore as
71288 +                it is defined by the PCD graph itself.
71289 +*//***************************************************************************/
71290 +typedef enum e_FmPortPcdSupport {
71291 +      e_FM_PORT_PCD_SUPPORT_NONE = 0                /**< BMI to BMI, PCD is not used */
71292 +    , e_FM_PORT_PCD_SUPPORT_PRS_ONLY                /**< Use only Parser */
71293 +    , e_FM_PORT_PCD_SUPPORT_PLCR_ONLY               /**< Use only Policer */
71294 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR            /**< Use Parser and Policer */
71295 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG              /**< Use Parser and Keygen */
71296 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC       /**< Use Parser, Keygen and Coarse Classification */
71297 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR
71298 +                                                    /**< Use all PCD engines */
71299 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR     /**< Use Parser, Keygen and Policer */
71300 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_CC              /**< Use Parser and Coarse Classification */
71301 +    , e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR     /**< Use Parser and Coarse Classification and Policer */
71302 +    , e_FM_PORT_PCD_SUPPORT_CC_ONLY                 /**< Use only Coarse Classification */
71303 +#ifdef FM_CAPWAP_SUPPORT
71304 +    , e_FM_PORT_PCD_SUPPORT_CC_AND_KG               /**< Use Coarse Classification,and Keygen */
71305 +    , e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR      /**< Use Coarse Classification, Keygen and Policer */
71306 +#endif /* FM_CAPWAP_SUPPORT */
71307 +} e_FmPortPcdSupport;
71308 +
71309 +/**************************************************************************//**
71310 + @Description   Port interrupts
71311 +*//***************************************************************************/
71312 +typedef enum e_FmPortExceptions {
71313 +    e_FM_PORT_EXCEPTION_IM_BUSY                 /**< Independent-Mode Rx-BUSY */
71314 +} e_FmPortExceptions;
71315 +
71316 +
71317 +/**************************************************************************//**
71318 + @Collection    General FM Port defines
71319 +*//***************************************************************************/
71320 +#define FM_PORT_PRS_RESULT_NUM_OF_WORDS     8   /**< Number of 4 bytes words in parser result */
71321 +/* @} */
71322 +
71323 +/**************************************************************************//**
71324 + @Collection   FM Frame error
71325 +*//***************************************************************************/
71326 +typedef uint32_t    fmPortFrameErrSelect_t;                         /**< typedef for defining Frame Descriptor errors */
71327 +
71328 +#define FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT      FM_FD_ERR_UNSUPPORTED_FORMAT    /**< Not for Rx-Port! Unsupported Format */
71329 +#define FM_PORT_FRM_ERR_LENGTH                  FM_FD_ERR_LENGTH                /**< Not for Rx-Port! Length Error */
71330 +#define FM_PORT_FRM_ERR_DMA                     FM_FD_ERR_DMA                   /**< DMA Data error */
71331 +#define FM_PORT_FRM_ERR_NON_FM                  FM_FD_RX_STATUS_ERR_NON_FM      /**< non Frame-Manager error; probably come from SEC that
71332 +                                                                                     was chained to FM */
71333 +
71334 +#define FM_PORT_FRM_ERR_IPRE                    (FM_FD_ERR_IPR & ~FM_FD_IPR)        /**< IPR error */
71335 +#define FM_PORT_FRM_ERR_IPR_NCSP                (FM_FD_ERR_IPR_NCSP & ~FM_FD_IPR)   /**< IPR non-consistent-sp */
71336 +
71337 +#define FM_PORT_FRM_ERR_IPFE                    0                                   /**< Obsolete; will be removed in the future */
71338 +
71339 +#ifdef FM_CAPWAP_SUPPORT
71340 +#define FM_PORT_FRM_ERR_CRE                     FM_FD_ERR_CRE
71341 +#define FM_PORT_FRM_ERR_CHE                     FM_FD_ERR_CHE
71342 +#endif /* FM_CAPWAP_SUPPORT */
71343 +
71344 +#define FM_PORT_FRM_ERR_PHYSICAL                FM_FD_ERR_PHYSICAL              /**< Rx FIFO overflow, FCS error, code error, running disparity
71345 +                                                                                     error (SGMII and TBI modes), FIFO parity error. PHY
71346 +                                                                                     Sequence error, PHY error control character detected. */
71347 +#define FM_PORT_FRM_ERR_SIZE                    FM_FD_ERR_SIZE                  /**< Frame too long OR Frame size exceeds max_length_frame  */
71348 +#define FM_PORT_FRM_ERR_CLS_DISCARD             FM_FD_ERR_CLS_DISCARD           /**< indicates a classifier "drop" operation */
71349 +#define FM_PORT_FRM_ERR_EXTRACTION              FM_FD_ERR_EXTRACTION            /**< Extract Out of Frame */
71350 +#define FM_PORT_FRM_ERR_NO_SCHEME               FM_FD_ERR_NO_SCHEME             /**< No Scheme Selected */
71351 +#define FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW        FM_FD_ERR_KEYSIZE_OVERFLOW      /**< Keysize Overflow */
71352 +#define FM_PORT_FRM_ERR_COLOR_RED               FM_FD_ERR_COLOR_RED             /**< Frame color is red */
71353 +#define FM_PORT_FRM_ERR_COLOR_YELLOW            FM_FD_ERR_COLOR_YELLOW          /**< Frame color is yellow */
71354 +#define FM_PORT_FRM_ERR_ILL_PLCR                FM_FD_ERR_ILL_PLCR              /**< Illegal Policer Profile selected */
71355 +#define FM_PORT_FRM_ERR_PLCR_FRAME_LEN          FM_FD_ERR_PLCR_FRAME_LEN        /**< Policer frame length error */
71356 +#define FM_PORT_FRM_ERR_PRS_TIMEOUT             FM_FD_ERR_PRS_TIMEOUT           /**< Parser Time out Exceed */
71357 +#define FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT        FM_FD_ERR_PRS_ILL_INSTRUCT      /**< Invalid Soft Parser instruction */
71358 +#define FM_PORT_FRM_ERR_PRS_HDR_ERR             FM_FD_ERR_PRS_HDR_ERR           /**< Header error was identified during parsing */
71359 +#define FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED    FM_FD_ERR_BLOCK_LIMIT_EXCEEDED  /**< Frame parsed beyind 256 first bytes */
71360 +#define FM_PORT_FRM_ERR_PROCESS_TIMEOUT         0x00000001                      /**< FPM Frame Processing Timeout Exceeded */
71361 +/* @} */
71362 +
71363 +
71364 +
71365 +/**************************************************************************//**
71366 + @Group         FM_PORT_init_grp FM Port Initialization Unit
71367 +
71368 + @Description   FM Port Initialization Unit
71369 +
71370 + @{
71371 +*//***************************************************************************/
71372 +
71373 +/**************************************************************************//**
71374 + @Description   Exceptions user callback routine, will be called upon an
71375 +                exception passing the exception identification.
71376 +
71377 + @Param[in]     h_App      - User's application descriptor.
71378 + @Param[in]     exception  - The exception.
71379 +  *//***************************************************************************/
71380 +typedef void (t_FmPortExceptionCallback) (t_Handle h_App, e_FmPortExceptions exception);
71381 +
71382 +/**************************************************************************//**
71383 + @Description   User callback function called by driver with received data.
71384 +
71385 +                User provides this function. Driver invokes it.
71386 +
71387 + @Param[in]     h_App           Application's handle originally specified to
71388 +                                the API Config function
71389 + @Param[in]     p_Data          A pointer to data received
71390 + @Param[in]     length          length of received data
71391 + @Param[in]     status          receive status and errors
71392 + @Param[in]     position        position of buffer in frame
71393 + @Param[in]     h_BufContext    A handle of the user acossiated with this buffer
71394 +
71395 + @Retval        e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
71396 +                                               operation for all ready data.
71397 + @Retval        e_RX_STORE_RESPONSE_PAUSE    - order the driver to stop Rx operation.
71398 +*//***************************************************************************/
71399 +typedef e_RxStoreResponse (t_FmPortImRxStoreCallback) (t_Handle h_App,
71400 +                                                       uint8_t  *p_Data,
71401 +                                                       uint16_t length,
71402 +                                                       uint16_t status,
71403 +                                                       uint8_t  position,
71404 +                                                       t_Handle h_BufContext);
71405 +
71406 +/**************************************************************************//**
71407 + @Description   User callback function called by driver when transmit completed.
71408 +
71409 +                User provides this function. Driver invokes it.
71410 +
71411 + @Param[in]     h_App           Application's handle originally specified to
71412 +                                the API Config function
71413 + @Param[in]     p_Data          A pointer to data received
71414 + @Param[in]     status          transmit status and errors
71415 + @Param[in]     lastBuffer      is last buffer in frame
71416 + @Param[in]     h_BufContext    A handle of the user acossiated with this buffer
71417 + *//***************************************************************************/
71418 +typedef void (t_FmPortImTxConfCallback) (t_Handle   h_App,
71419 +                                         uint8_t    *p_Data,
71420 +                                         uint16_t   status,
71421 +                                         t_Handle   h_BufContext);
71422 +
71423 +/**************************************************************************//**
71424 + @Description   A structure for additional Rx port parameters
71425 +*//***************************************************************************/
71426 +typedef struct t_FmPortRxParams {
71427 +    uint32_t                errFqid;            /**< Error Queue Id. */
71428 +    uint32_t                dfltFqid;           /**< Default Queue Id.  */
71429 +    uint16_t                liodnOffset;        /**< Port's LIODN offset. */
71430 +    t_FmExtPools            extBufPools;        /**< Which external buffer pools are used
71431 +                                                     (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes. */
71432 +} t_FmPortRxParams;
71433 +
71434 +/**************************************************************************//**
71435 + @Description   A structure for additional non-Rx port parameters
71436 +*//***************************************************************************/
71437 +typedef struct t_FmPortNonRxParams {
71438 +    uint32_t                errFqid;            /**< Error Queue Id. */
71439 +    uint32_t                dfltFqid;           /**< For Tx - Default Confirmation queue,
71440 +                                                     0 means no Tx confirmation for processed
71441 +                                                     frames. For OP port - default Rx queue. */
71442 +    uint32_t                qmChannel;          /**< QM-channel dedicated to this port; will be used
71443 +                                                     by the FM for dequeue. */
71444 +} t_FmPortNonRxParams;
71445 +
71446 +/**************************************************************************//**
71447 + @Description   A structure for additional Rx port parameters
71448 +*//***************************************************************************/
71449 +typedef struct t_FmPortImRxTxParams {
71450 +    t_Handle                    h_FmMuram;          /**< A handle of the FM-MURAM partition */
71451 +    uint16_t                    liodnOffset;        /**< For Rx ports only. Port's LIODN Offset. */
71452 +    uint8_t                     dataMemId;          /**< Memory partition ID for data buffers */
71453 +    uint32_t                    dataMemAttributes;  /**< Memory attributes for data buffers */
71454 +    t_BufferPoolInfo            rxPoolParams;       /**< For Rx ports only. */
71455 +    t_FmPortImRxStoreCallback   *f_RxStore;         /**< For Rx ports only. */
71456 +    t_FmPortImTxConfCallback    *f_TxConf;          /**< For Tx ports only. */
71457 +} t_FmPortImRxTxParams;
71458 +
71459 +/**************************************************************************//**
71460 + @Description   A union for additional parameters depending on port type
71461 +*//***************************************************************************/
71462 +typedef union u_FmPortSpecificParams {
71463 +    t_FmPortImRxTxParams        imRxTxParams;       /**< Rx/Tx Independent-Mode port parameter structure */
71464 +    t_FmPortRxParams            rxParams;           /**< Rx port parameters structure */
71465 +    t_FmPortNonRxParams         nonRxParams;        /**< Non-Rx port parameters structure */
71466 +} u_FmPortSpecificParams;
71467 +
71468 +/**************************************************************************//**
71469 + @Description   A structure representing FM initialization parameters
71470 +*//***************************************************************************/
71471 +typedef struct t_FmPortParams {
71472 +    uintptr_t                   baseAddr;           /**< Virtual Address of memory mapped FM Port registers.*/
71473 +    t_Handle                    h_Fm;               /**< A handle to the FM object this port related to */
71474 +    e_FmPortType                portType;           /**< Port type */
71475 +    uint8_t                     portId;             /**< Port Id - relative to type;
71476 +                                                         NOTE: When configuring Offline Parsing port for
71477 +                                                         FMANv3 devices (DPAA_VERSION 11 and higher),
71478 +                                                         it is highly recommended NOT to use portId=0 due to lack
71479 +                                                         of HW resources on portId=0. */
71480 +    bool                        independentModeEnable;
71481 +                                                    /**< This port is Independent-Mode - Used for Rx/Tx ports only! */
71482 +    uint16_t                    liodnBase;          /**< Irrelevant for P4080 rev 1. LIODN base for this port, to be
71483 +                                                         used together with LIODN offset. */
71484 +    u_FmPortSpecificParams      specificParams;     /**< Additional parameters depending on port
71485 +                                                         type. */
71486 +
71487 +    t_FmPortExceptionCallback   *f_Exception;       /**< Relevant for IM only Callback routine to be called on BUSY exception */
71488 +    t_Handle                    h_App;              /**< A handle to an application layer object; This handle will
71489 +                                                         be passed by the driver upon calling the above callbacks */
71490 +} t_FmPortParams;
71491 +
71492 +
71493 +/**************************************************************************//**
71494 + @Function      FM_PORT_Config
71495 +
71496 + @Description   Creates a descriptor for the FM PORT module.
71497 +
71498 +                The routine returns a handle (descriptor) to the FM PORT object.
71499 +                This descriptor must be passed as first parameter to all other
71500 +                FM PORT function calls.
71501 +
71502 +                No actual initialization or configuration of FM hardware is
71503 +                done by this routine.
71504 +
71505 + @Param[in]     p_FmPortParams   - Pointer to data structure of parameters
71506 +
71507 + @Retval        Handle to FM object, or NULL for Failure.
71508 +*//***************************************************************************/
71509 +t_Handle FM_PORT_Config(t_FmPortParams *p_FmPortParams);
71510 +
71511 +/**************************************************************************//**
71512 + @Function      FM_PORT_Init
71513 +
71514 + @Description   Initializes the FM PORT module by defining the software structure
71515 +                and configuring the hardware registers.
71516 +
71517 + @Param[in]     h_FmPort - FM PORT module descriptor
71518 +
71519 + @Return        E_OK on success; Error code otherwise.
71520 +*//***************************************************************************/
71521 +t_Error FM_PORT_Init(t_Handle h_FmPort);
71522 +
71523 +/**************************************************************************//**
71524 + @Function      FM_PORT_Free
71525 +
71526 + @Description   Frees all resources that were assigned to FM PORT module.
71527 +
71528 +                Calling this routine invalidates the descriptor.
71529 +
71530 + @Param[in]     h_FmPort - FM PORT module descriptor
71531 +
71532 + @Return        E_OK on success; Error code otherwise.
71533 +*//***************************************************************************/
71534 +t_Error FM_PORT_Free(t_Handle h_FmPort);
71535 +
71536 +
71537 +/**************************************************************************//**
71538 + @Group         FM_PORT_advanced_init_grp    FM Port Advanced Configuration Unit
71539 +
71540 + @Description   Configuration functions used to change default values.
71541 +
71542 + @{
71543 +*//***************************************************************************/
71544 +
71545 +/**************************************************************************//**
71546 + @Description   enum for defining QM frame dequeue
71547 +*//***************************************************************************/
71548 +typedef enum e_FmPortDeqType {
71549 +   e_FM_PORT_DEQ_TYPE1,             /**< Dequeue from the SP channel - with priority precedence,
71550 +                                         and Intra-Class Scheduling respected. */
71551 +   e_FM_PORT_DEQ_TYPE2,             /**< Dequeue from the SP channel - with active FQ precedence,
71552 +                                         and Intra-Class Scheduling respected. */
71553 +   e_FM_PORT_DEQ_TYPE3              /**< Dequeue from the SP channel - with active FQ precedence,
71554 +                                         and override Intra-Class Scheduling */
71555 +} e_FmPortDeqType;
71556 +
71557 +/**************************************************************************//**
71558 + @Description   enum for defining QM frame dequeue
71559 +*//***************************************************************************/
71560 +typedef enum e_FmPortDeqPrefetchOption {
71561 +   e_FM_PORT_DEQ_NO_PREFETCH,       /**< QMI preforms a dequeue action for a single frame
71562 +                                         only when a dedicated portID Tnum is waiting. */
71563 +   e_FM_PORT_DEQ_PARTIAL_PREFETCH,  /**< QMI preforms a dequeue action for 3 frames when
71564 +                                         one dedicated portId tnum is waiting. */
71565 +   e_FM_PORT_DEQ_FULL_PREFETCH      /**< QMI preforms a dequeue action for 3 frames when
71566 +                                         no dedicated portId tnums are waiting. */
71567 +
71568 +} e_FmPortDeqPrefetchOption;
71569 +
71570 +/**************************************************************************//**
71571 + @Description   enum for defining port default color
71572 +*//***************************************************************************/
71573 +typedef enum e_FmPortColor {
71574 +    e_FM_PORT_COLOR_GREEN,          /**< Default port color is green */
71575 +    e_FM_PORT_COLOR_YELLOW,         /**< Default port color is yellow */
71576 +    e_FM_PORT_COLOR_RED,            /**< Default port color is red */
71577 +    e_FM_PORT_COLOR_OVERRIDE        /**< Ignore color */
71578 +} e_FmPortColor;
71579 +
71580 +/**************************************************************************//**
71581 + @Description   A structure for defining Dual Tx rate limiting scale
71582 +*//***************************************************************************/
71583 +typedef enum e_FmPortDualRateLimiterScaleDown {
71584 +    e_FM_PORT_DUAL_RATE_LIMITER_NONE = 0,           /**< Use only single rate limiter  */
71585 +    e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_2,    /**< Divide high rate limiter by 2 */
71586 +    e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_4,    /**< Divide high rate limiter by 4 */
71587 +    e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8     /**< Divide high rate limiter by 8 */
71588 +} e_FmPortDualRateLimiterScaleDown;
71589 +
71590 +
71591 +/**************************************************************************//**
71592 + @Description   A structure for defining FM port resources
71593 +*//***************************************************************************/
71594 +typedef struct t_FmPortRsrc {
71595 +    uint32_t    num;                /**< Committed required resource */
71596 +    uint32_t    extra;              /**< Extra (not committed) required resource */
71597 +} t_FmPortRsrc;
71598 +
71599 +/**************************************************************************//**
71600 + @Description   A structure for defining observed pool depletion
71601 +*//***************************************************************************/
71602 +typedef struct t_FmPortObservedBufPoolDepletion {
71603 +    t_FmBufPoolDepletion    poolDepletionParams;/**< parameters to define pool depletion */
71604 +    t_FmExtPools            poolsParams;        /**< Which external buffer pools are observed
71605 +                                                     (up to FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS),
71606 +                                                     and their sizes. */
71607 +} t_FmPortObservedBufPoolDepletion;
71608 +
71609 +/**************************************************************************//**
71610 + @Description   A structure for defining Tx rate limiting
71611 +*//***************************************************************************/
71612 +typedef struct t_FmPortRateLimit {
71613 +    uint16_t                            maxBurstSize;           /**< in KBytes for Tx ports, in frames
71614 +                                                                     for OP ports. (note that
71615 +                                                                     for early chips burst size is
71616 +                                                                     rounded up to a multiply of 1000 frames).*/
71617 +    uint32_t                            rateLimit;              /**< in Kb/sec for Tx ports, in frame/sec for
71618 +                                                                     OP ports. Rate limit refers to
71619 +                                                                     data rate (rather than line rate). */
71620 +    e_FmPortDualRateLimiterScaleDown    rateLimitDivider;       /**< For OP ports only. Not-valid
71621 +                                                                     for some earlier chip revisions */
71622 +} t_FmPortRateLimit;
71623 +
71624 +/**************************************************************************//**
71625 + @Description   A structure for defining the parameters of
71626 +                the Rx port performance counters
71627 +*//***************************************************************************/
71628 +typedef struct t_FmPortPerformanceCnt {
71629 +    uint8_t     taskCompVal;            /**< Task compare value */
71630 +    uint8_t     queueCompVal;           /**< Rx queue/Tx confirm queue compare
71631 +                                             value (unused for H/O) */
71632 +    uint8_t     dmaCompVal;             /**< Dma compare value */
71633 +    uint32_t    fifoCompVal;            /**< Fifo compare value (in bytes) */
71634 +} t_FmPortPerformanceCnt;
71635 +
71636 +
71637 +/**************************************************************************//**
71638 + @Description   A structure for defining the sizes of the Deep Sleep
71639 +                the Auto Response tables
71640 +*//***************************************************************************/
71641 +typedef struct t_FmPortDsarTablesSizes
71642 +{
71643 +    uint16_t   maxNumOfArpEntries;
71644 +    uint16_t   maxNumOfEchoIpv4Entries;
71645 +    uint16_t   maxNumOfNdpEntries;
71646 +    uint16_t   maxNumOfEchoIpv6Entries;
71647 +    uint16_t   maxNumOfSnmpIPV4Entries;
71648 +    uint16_t   maxNumOfSnmpIPV6Entries;
71649 +    uint16_t   maxNumOfSnmpOidEntries;
71650 +    uint16_t   maxNumOfSnmpOidChar; /* total amount of character needed for the snmp table */
71651 +
71652 +    uint16_t   maxNumOfIpProtFiltering;
71653 +    uint16_t   maxNumOfTcpPortFiltering;
71654 +    uint16_t   maxNumOfUdpPortFiltering;
71655 +} t_FmPortDsarTablesSizes;
71656 +
71657 +
71658 +/**************************************************************************//**
71659 + @Function      FM_PORT_ConfigDsarSupport
71660 +
71661 + @Description   This function will allocate the amount of MURAM needed for
71662 +                this max number of entries for Deep Sleep Auto Response.
71663 +                it will calculate all needed MURAM for autoresponse including
71664 +                necesary common stuff.
71665 +
71666 +
71667 + @Param[in]     h_FmPort    A handle to a FM Port module.
71668 + @Param[in]     params      A pointer to a structure containing the maximum
71669 +                            sizes of the auto response tables
71670 +
71671 + @Return        E_OK on success; Error code otherwise.
71672 +
71673 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71674 +*//***************************************************************************/
71675 +t_Error FM_PORT_ConfigDsarSupport(t_Handle h_FmPortRx, t_FmPortDsarTablesSizes *params);
71676 +
71677 +/**************************************************************************//**
71678 + @Function      FM_PORT_ConfigNumOfOpenDmas
71679 +
71680 + @Description   Calling this routine changes the max number of open DMA's
71681 +                available for this port. It changes this parameter in the
71682 +                internal driver data base from its default configuration
71683 +                [OP: 1]
71684 +                [1G-RX, 1G-TX: 1 (+1)]
71685 +                [10G-RX, 10G-TX: 8 (+8)]
71686 +
71687 + @Param[in]     h_FmPort    A handle to a FM Port module.
71688 + @Param[in]     p_OpenDmas  A pointer to a structure of parameters defining
71689 +                            the open DMA allocation.
71690 +
71691 + @Return        E_OK on success; Error code otherwise.
71692 +
71693 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71694 +*//***************************************************************************/
71695 +t_Error FM_PORT_ConfigNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_OpenDmas);
71696 +
71697 +/**************************************************************************//**
71698 + @Function      FM_PORT_ConfigNumOfTasks
71699 +
71700 + @Description   Calling this routine changes the max number of tasks
71701 +                available for this port. It changes this parameter in the
71702 +                internal driver data base from its default configuration
71703 +                [OP: 1]
71704 +                [1G-RX, 1G-TX: 3 (+2)]
71705 +                [10G-RX, 10G-TX: 16 (+8)]
71706 +
71707 + @Param[in]     h_FmPort        A handle to a FM Port module.
71708 + @Param[in]     p_NumOfTasks    A pointer to a structure of parameters defining
71709 +                                the tasks allocation.
71710 +
71711 + @Return        E_OK on success; Error code otherwise.
71712 +
71713 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71714 +*//***************************************************************************/
71715 +t_Error FM_PORT_ConfigNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks);
71716 +
71717 +/**************************************************************************//**
71718 + @Function      FM_PORT_ConfigSizeOfFifo
71719 +
71720 + @Description   Calling this routine changes the max FIFO size configured for this port.
71721 +
71722 +                This function changes the internal driver data base from its
71723 +                default configuration. Please refer to the driver's User Guide for
71724 +                information on default FIFO sizes in the various devices.
71725 +                [OP: 2KB]
71726 +                [1G-RX, 1G-TX: 11KB]
71727 +                [10G-RX, 10G-TX: 12KB]
71728 +
71729 + @Param[in]     h_FmPort        A handle to a FM Port module.
71730 + @Param[in]     p_SizeOfFifo    A pointer to a structure of parameters defining
71731 +                                the FIFO allocation.
71732 +
71733 + @Return        E_OK on success; Error code otherwise.
71734 +
71735 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71736 +*//***************************************************************************/
71737 +t_Error FM_PORT_ConfigSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo);
71738 +
71739 +/**************************************************************************//**
71740 + @Function      FM_PORT_ConfigDeqHighPriority
71741 +
71742 + @Description   Calling this routine changes the dequeue priority in the
71743 +                internal driver data base from its default configuration
71744 +                1G: [DEFAULT_PORT_deqHighPriority_1G]
71745 +                10G: [DEFAULT_PORT_deqHighPriority_10G]
71746 +
71747 +                May be used for Non-Rx ports only
71748 +
71749 + @Param[in]     h_FmPort    A handle to a FM Port module.
71750 + @Param[in]     highPri     TRUE to select high priority, FALSE for normal operation.
71751 +
71752 + @Return        E_OK on success; Error code otherwise.
71753 +
71754 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71755 +*//***************************************************************************/
71756 +t_Error FM_PORT_ConfigDeqHighPriority(t_Handle h_FmPort, bool highPri);
71757 +
71758 +/**************************************************************************//**
71759 + @Function      FM_PORT_ConfigDeqType
71760 +
71761 + @Description   Calling this routine changes the dequeue type parameter in the
71762 +                internal driver data base from its default configuration
71763 +                [DEFAULT_PORT_deqType].
71764 +
71765 +                May be used for Non-Rx ports only
71766 +
71767 + @Param[in]     h_FmPort    A handle to a FM Port module.
71768 + @Param[in]     deqType     According to QM definition.
71769 +
71770 + @Return        E_OK on success; Error code otherwise.
71771 +
71772 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71773 +*//***************************************************************************/
71774 +t_Error FM_PORT_ConfigDeqType(t_Handle h_FmPort, e_FmPortDeqType deqType);
71775 +
71776 +/**************************************************************************//**
71777 + @Function      FM_PORT_ConfigDeqPrefetchOption
71778 +
71779 + @Description   Calling this routine changes the dequeue prefetch option parameter in the
71780 +                internal driver data base from its default configuration
71781 +                [DEFAULT_PORT_deqPrefetchOption]
71782 +                Note: Available for some chips only
71783 +
71784 +                May be used for Non-Rx ports only
71785 +
71786 + @Param[in]     h_FmPort            A handle to a FM Port module.
71787 + @Param[in]     deqPrefetchOption   New option
71788 +
71789 + @Return        E_OK on success; Error code otherwise.
71790 +
71791 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71792 +*//***************************************************************************/
71793 +t_Error FM_PORT_ConfigDeqPrefetchOption(t_Handle h_FmPort, e_FmPortDeqPrefetchOption deqPrefetchOption);
71794 +
71795 +/**************************************************************************//**
71796 + @Function      FM_PORT_ConfigDeqByteCnt
71797 +
71798 + @Description   Calling this routine changes the dequeue byte count parameter in
71799 +                the internal driver data base from its default configuration
71800 +                1G:[DEFAULT_PORT_deqByteCnt_1G].
71801 +                10G:[DEFAULT_PORT_deqByteCnt_10G].
71802 +
71803 +                May be used for Non-Rx ports only
71804 +
71805 + @Param[in]     h_FmPort        A handle to a FM Port module.
71806 + @Param[in]     deqByteCnt      New byte count
71807 +
71808 + @Return        E_OK on success; Error code otherwise.
71809 +
71810 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71811 +*//***************************************************************************/
71812 +t_Error FM_PORT_ConfigDeqByteCnt(t_Handle h_FmPort, uint16_t deqByteCnt);
71813 +
71814 +/**************************************************************************//**
71815 + @Function      FM_PORT_ConfigBufferPrefixContent
71816 +
71817 + @Description   Defines the structure, size and content of the application buffer.
71818 +                The prefix will
71819 +                In Tx ports, if 'passPrsResult', the application
71820 +                should set a value to their offsets in the prefix of
71821 +                the FM will save the first 'privDataSize', than,
71822 +                depending on 'passPrsResult' and 'passTimeStamp', copy parse result
71823 +                and timeStamp, and the packet itself (in this order), to the
71824 +                application buffer, and to offset.
71825 +                Calling this routine changes the buffer margins definitions
71826 +                in the internal driver data base from its default
71827 +                configuration: Data size:  [DEFAULT_PORT_bufferPrefixContent_privDataSize]
71828 +                               Pass Parser result: [DEFAULT_PORT_bufferPrefixContent_passPrsResult].
71829 +                               Pass timestamp: [DEFAULT_PORT_bufferPrefixContent_passTimeStamp].
71830 +
71831 +                May be used for all ports
71832 +
71833 + @Param[in]     h_FmPort                        A handle to a FM Port module.
71834 + @Param[in,out] p_FmBufferPrefixContent         A structure of parameters describing the
71835 +                                                structure of the buffer.
71836 +                                                Out parameter: Start margin - offset
71837 +                                                of data from start of external buffer.
71838 +
71839 + @Return        E_OK on success; Error code otherwise.
71840 +
71841 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71842 +*//***************************************************************************/
71843 +t_Error FM_PORT_ConfigBufferPrefixContent(t_Handle                      h_FmPort,
71844 +                                          t_FmBufferPrefixContent       *p_FmBufferPrefixContent);
71845 +
71846 +/**************************************************************************//**
71847 + @Function      FM_PORT_ConfigCheksumLastBytesIgnore
71848 +
71849 + @Description   Calling this routine changes the number of checksum bytes to ignore
71850 +                parameter in the internal driver data base from its default configuration
71851 +                [DEFAULT_PORT_cheksumLastBytesIgnore]
71852 +
71853 +                May be used by Tx & Rx ports only
71854 +
71855 + @Param[in]     h_FmPort                A handle to a FM Port module.
71856 + @Param[in]     cheksumLastBytesIgnore  New value
71857 +
71858 + @Return        E_OK on success; Error code otherwise.
71859 +
71860 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71861 +*//***************************************************************************/
71862 +t_Error FM_PORT_ConfigCheksumLastBytesIgnore(t_Handle h_FmPort, uint8_t cheksumLastBytesIgnore);
71863 +
71864 +/**************************************************************************//**
71865 + @Function      FM_PORT_ConfigCutBytesFromEnd
71866 +
71867 + @Description   Calling this routine changes the number of bytes to cut from a
71868 +                frame's end parameter in the internal driver data base
71869 +                from its default configuration [DEFAULT_PORT_cutBytesFromEnd]
71870 +                Note that if the result of (frame length before chop - cutBytesFromEnd) is
71871 +                less than 14 bytes, the chop operation is not executed.
71872 +
71873 +                May be used for Rx ports only
71874 +
71875 + @Param[in]     h_FmPort            A handle to a FM Port module.
71876 + @Param[in]     cutBytesFromEnd     New value
71877 +
71878 + @Return        E_OK on success; Error code otherwise.
71879 +
71880 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71881 +*//***************************************************************************/
71882 +t_Error FM_PORT_ConfigCutBytesFromEnd(t_Handle h_FmPort, uint8_t cutBytesFromEnd);
71883 +
71884 +/**************************************************************************//**
71885 + @Function      FM_PORT_ConfigPoolDepletion
71886 +
71887 + @Description   Calling this routine enables pause frame generation depending on the
71888 +                depletion status of BM pools. It also defines the conditions to activate
71889 +                this functionality. By default, this functionality is disabled.
71890 +
71891 +                May be used for Rx ports only
71892 +
71893 + @Param[in]     h_FmPort                A handle to a FM Port module.
71894 + @Param[in]     p_BufPoolDepletion      A structure of pool depletion parameters
71895 +
71896 + @Return        E_OK on success; Error code otherwise.
71897 +
71898 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71899 +*//***************************************************************************/
71900 +t_Error FM_PORT_ConfigPoolDepletion(t_Handle h_FmPort, t_FmBufPoolDepletion *p_BufPoolDepletion);
71901 +
71902 +/**************************************************************************//**
71903 + @Function      FM_PORT_ConfigObservedPoolDepletion
71904 +
71905 + @Description   Calling this routine enables a mechanism to stop port enqueue
71906 +                depending on the depletion status of selected BM pools.
71907 +                It also defines the conditions to activate
71908 +                this functionality. By default, this functionality is disabled.
71909 +
71910 +                Note: Available for some chips only
71911 +
71912 +                May be used for OP ports only
71913 +
71914 + @Param[in]     h_FmPort                            A handle to a FM Port module.
71915 + @Param[in]     p_FmPortObservedBufPoolDepletion    A structure of parameters for pool depletion.
71916 +
71917 + @Return        E_OK on success; Error code otherwise.
71918 +
71919 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71920 +*//***************************************************************************/
71921 +t_Error FM_PORT_ConfigObservedPoolDepletion(t_Handle                            h_FmPort,
71922 +                                            t_FmPortObservedBufPoolDepletion    *p_FmPortObservedBufPoolDepletion);
71923 +
71924 +/**************************************************************************//**
71925 + @Function      FM_PORT_ConfigExtBufPools
71926 +
71927 + @Description   This routine should be called for OP ports
71928 +                that internally use BM buffer pools. In such cases, e.g. for fragmentation and
71929 +                re-assembly, the FM needs new BM buffers. By calling this routine the user
71930 +                specifies the BM buffer pools that should be used.
71931 +
71932 +                Note: Available for some chips only
71933 +
71934 +                May be used for OP ports only
71935 +
71936 + @Param[in]     h_FmPort            A handle to a FM Port module.
71937 + @Param[in]     p_FmExtPools        A structure of parameters for the external pools.
71938 +
71939 + @Return        E_OK on success; Error code otherwise.
71940 +
71941 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71942 +*//***************************************************************************/
71943 +t_Error FM_PORT_ConfigExtBufPools(t_Handle h_FmPort, t_FmExtPools *p_FmExtPools);
71944 +
71945 +/**************************************************************************//**
71946 + @Function      FM_PORT_ConfigBackupPools
71947 +
71948 + @Description   Calling this routine allows the configuration of some of the BM pools
71949 +                defined for this port as backup pools.
71950 +                A pool configured to be a backup pool will be used only if all other
71951 +                enabled non-backup pools are depleted.
71952 +
71953 +                May be used for Rx ports only
71954 +
71955 + @Param[in]     h_FmPort                A handle to a FM Port module.
71956 + @Param[in]     p_FmPortBackupBmPools   An array of pool id's. All pools specified here will
71957 +                                        be defined as backup pools.
71958 +
71959 + @Return        E_OK on success; Error code otherwise.
71960 +
71961 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71962 +*//***************************************************************************/
71963 +t_Error FM_PORT_ConfigBackupPools(t_Handle h_FmPort, t_FmBackupBmPools *p_FmPortBackupBmPools);
71964 +
71965 +/**************************************************************************//**
71966 + @Function      FM_PORT_ConfigFrmDiscardOverride
71967 +
71968 + @Description   Calling this routine changes the error frames destination parameter
71969 +                in the internal driver data base from its default configuration:
71970 +                override = [DEFAULT_PORT_frmDiscardOverride]
71971 +
71972 +                May be used for Rx and OP ports only
71973 +
71974 + @Param[in]     h_FmPort    A handle to a FM Port module.
71975 + @Param[in]     override    TRUE to override discarding of error frames and
71976 +                            enqueueing them to error queue.
71977 +
71978 + @Return        E_OK on success; Error code otherwise.
71979 +
71980 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
71981 +*//***************************************************************************/
71982 +t_Error FM_PORT_ConfigFrmDiscardOverride(t_Handle h_FmPort, bool override);
71983 +
71984 +/**************************************************************************//**
71985 + @Function      FM_PORT_ConfigErrorsToDiscard
71986 +
71987 + @Description   Calling this routine changes the behaviour on error parameter
71988 +                in the internal driver data base from its default configuration:
71989 +                [DEFAULT_PORT_errorsToDiscard].
71990 +                If a requested error was previously defined as "ErrorsToEnqueue" it's
71991 +                definition will change and the frame will be discarded.
71992 +                Errors that were not defined either as "ErrorsToEnqueue" nor as
71993 +                "ErrorsToDiscard", will be forwarded to CPU.
71994 +
71995 +                May be used for Rx and OP ports only
71996 +
71997 + @Param[in]     h_FmPort    A handle to a FM Port module.
71998 + @Param[in]     errs        A list of errors to discard
71999 +
72000 + @Return        E_OK on success; Error code otherwise.
72001 +
72002 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72003 +*//***************************************************************************/
72004 +t_Error FM_PORT_ConfigErrorsToDiscard(t_Handle h_FmPort, fmPortFrameErrSelect_t errs);
72005 +
72006 +/**************************************************************************//**
72007 + @Function      FM_PORT_ConfigDmaSwapData
72008 +
72009 + @Description   Calling this routine changes the DMA swap data aparameter
72010 +                in the internal driver data base from its default
72011 +                configuration  [DEFAULT_PORT_dmaSwapData]
72012 +
72013 +                May be used for all port types
72014 +
72015 + @Param[in]     h_FmPort    A handle to a FM Port module.
72016 + @Param[in]     swapData    New selection
72017 +
72018 + @Return        E_OK on success; Error code otherwise.
72019 +
72020 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72021 +*//***************************************************************************/
72022 +t_Error FM_PORT_ConfigDmaSwapData(t_Handle h_FmPort, e_FmDmaSwapOption swapData);
72023 +
72024 +/**************************************************************************//**
72025 + @Function      FM_PORT_ConfigDmaIcCacheAttr
72026 +
72027 + @Description   Calling this routine changes the internal context cache
72028 +                attribute parameter in the internal driver data base
72029 +                from its default configuration  [DEFAULT_PORT_dmaIntContextCacheAttr]
72030 +
72031 +                May be used for all port types
72032 +
72033 + @Param[in]     h_FmPort               A handle to a FM Port module.
72034 + @Param[in]     intContextCacheAttr    New selection
72035 +
72036 + @Return        E_OK on success; Error code otherwise.
72037 +
72038 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72039 +*//***************************************************************************/
72040 +t_Error FM_PORT_ConfigDmaIcCacheAttr(t_Handle h_FmPort, e_FmDmaCacheOption intContextCacheAttr);
72041 +
72042 +/**************************************************************************//**
72043 + @Function      FM_PORT_ConfigDmaHdrAttr
72044 +
72045 + @Description   Calling this routine changes the header cache
72046 +                attribute parameter in the internal driver data base
72047 +                from its default configuration  [DEFAULT_PORT_dmaHeaderCacheAttr]
72048 +
72049 +                May be used for all port types
72050 +
72051 + @Param[in]     h_FmPort                    A handle to a FM Port module.
72052 + @Param[in]     headerCacheAttr             New selection
72053 +
72054 + @Return        E_OK on success; Error code otherwise.
72055 +
72056 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72057 +*//***************************************************************************/
72058 +t_Error FM_PORT_ConfigDmaHdrAttr(t_Handle h_FmPort, e_FmDmaCacheOption headerCacheAttr);
72059 +
72060 +/**************************************************************************//**
72061 + @Function      FM_PORT_ConfigDmaScatterGatherAttr
72062 +
72063 + @Description   Calling this routine changes the scatter gather cache
72064 +                attribute parameter in the internal driver data base
72065 +                from its default configuration  [DEFAULT_PORT_dmaScatterGatherCacheAttr]
72066 +
72067 +                May be used for all port types
72068 +
72069 + @Param[in]     h_FmPort                    A handle to a FM Port module.
72070 + @Param[in]     scatterGatherCacheAttr      New selection
72071 +
72072 + @Return        E_OK on success; Error code otherwise.
72073 +
72074 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72075 +*//***************************************************************************/
72076 +t_Error FM_PORT_ConfigDmaScatterGatherAttr(t_Handle h_FmPort, e_FmDmaCacheOption scatterGatherCacheAttr);
72077 +
72078 +/**************************************************************************//**
72079 + @Function      FM_PORT_ConfigDmaWriteOptimize
72080 +
72081 + @Description   Calling this routine changes the write optimization
72082 +                parameter in the internal driver data base
72083 +                from its default configuration:  By default optimize = [DEFAULT_PORT_dmaWriteOptimize].
72084 +                Note:
72085 +
72086 +                1. For head optimization, data alignment must be >= 16 (supported by default).
72087 +
72088 +                3. For tail optimization, note that the optimization is performed by extending the write transaction
72089 +                of the frame payload at the tail as needed to achieve optimal bus transfers, so that the last write
72090 +                is extended to be on 16/64 bytes aligned block (chip dependent).
72091 +
72092 +                Relevant for non-Tx port types
72093 +
72094 + @Param[in]     h_FmPort    A handle to a FM Port module.
72095 + @Param[in]     optimize    TRUE to enable optimization, FALSE for normal operation
72096 +
72097 + @Return        E_OK on success; Error code otherwise.
72098 +
72099 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72100 +*//***************************************************************************/
72101 +t_Error FM_PORT_ConfigDmaWriteOptimize(t_Handle h_FmPort, bool optimize);
72102 +
72103 +/**************************************************************************//**
72104 + @Function      FM_PORT_ConfigNoScatherGather
72105 +
72106 + @Description    Calling this routine changes the noScatherGather parameter in internal driver data base
72107 +                 from its default configuration.
72108 +
72109 + @Param[in]     h_FmPort        A handle to a FM Port module.
72110 + @Param[in]     noScatherGather (TRUE - frame is discarded if can not be stored in single buffer,
72111 +                                 FALSE - frame can be stored in scatter gather (S/G) format).
72112 +
72113 + @Return        E_OK on success; Error code otherwise.
72114 +
72115 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72116 +*//***************************************************************************/
72117 +t_Error FM_PORT_ConfigNoScatherGather(t_Handle h_FmPort, bool noScatherGather);
72118 +
72119 +/**************************************************************************//**
72120 + @Function      FM_PORT_ConfigDfltColor
72121 +
72122 + @Description   Calling this routine changes the internal default color parameter
72123 +                in the internal driver data base
72124 +                from its default configuration  [DEFAULT_PORT_color]
72125 +
72126 +                May be used for all port types
72127 +
72128 + @Param[in]     h_FmPort        A handle to a FM Port module.
72129 + @Param[in]     color           New selection
72130 +
72131 + @Return        E_OK on success; Error code otherwise.
72132 +
72133 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72134 +*//***************************************************************************/
72135 +t_Error FM_PORT_ConfigDfltColor(t_Handle h_FmPort, e_FmPortColor color);
72136 +
72137 +/**************************************************************************//**
72138 + @Function      FM_PORT_ConfigSyncReq
72139 +
72140 + @Description   Calling this routine changes the synchronization attribute parameter
72141 +                in the internal driver data base from its default configuration:
72142 +                syncReq = [DEFAULT_PORT_syncReq]
72143 +
72144 +                May be used for all port types
72145 +
72146 + @Param[in]     h_FmPort        A handle to a FM Port module.
72147 + @Param[in]     syncReq         TRUE to request synchronization, FALSE otherwize.
72148 +
72149 + @Return        E_OK on success; Error code otherwise.
72150 +
72151 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72152 +*//***************************************************************************/
72153 +t_Error FM_PORT_ConfigSyncReq(t_Handle h_FmPort, bool syncReq);
72154 +
72155 +/**************************************************************************//**
72156 + @Function      FM_PORT_ConfigForwardReuseIntContext
72157 +
72158 + @Description   This routine is relevant for Rx ports that are routed to OP port.
72159 +                It changes the internal context reuse option in the internal
72160 +                driver data base from its default configuration:
72161 +                reuse = [DEFAULT_PORT_forwardIntContextReuse]
72162 +
72163 +                May be used for Rx ports only
72164 +
72165 + @Param[in]     h_FmPort        A handle to a FM Port module.
72166 + @Param[in]     reuse           TRUE to reuse internal context on frames
72167 +                                forwarded to OP port.
72168 +
72169 + @Return        E_OK on success; Error code otherwise.
72170 +
72171 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72172 +*//***************************************************************************/
72173 +t_Error FM_PORT_ConfigForwardReuseIntContext(t_Handle h_FmPort, bool reuse);
72174 +
72175 +/**************************************************************************//**
72176 + @Function      FM_PORT_ConfigDontReleaseTxBufToBM
72177 +
72178 + @Description   This routine should be called if no Tx confirmation
72179 +                is done, and yet buffers should not be released to the BM.
72180 +                Normally, buffers are returned using the Tx confirmation
72181 +                process. When Tx confirmation is not used (defFqid=0),
72182 +                buffers are typically released to the BM. This routine
72183 +                may be called to avoid this behavior and not release the
72184 +                buffers.
72185 +
72186 +                May be used for Tx ports only
72187 +
72188 + @Param[in]     h_FmPort        A handle to a FM Port module.
72189 +
72190 + @Return        E_OK on success; Error code otherwise.
72191 +
72192 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72193 +*//***************************************************************************/
72194 +t_Error FM_PORT_ConfigDontReleaseTxBufToBM(t_Handle h_FmPort);
72195 +
72196 +/**************************************************************************//**
72197 + @Function      FM_PORT_ConfigIMMaxRxBufLength
72198 +
72199 + @Description   Changes the maximum receive buffer length from its default
72200 +                configuration: Closest rounded down power of 2 value of the
72201 +                data buffer size.
72202 +
72203 +                The maximum receive buffer length directly affects the structure
72204 +                of received frames (single- or multi-buffered) and the performance
72205 +                of both the FM and the driver.
72206 +
72207 +                The selection between single- or multi-buffered frames should be
72208 +                done according to the characteristics of the specific application.
72209 +                The recommended mode is to use a single data buffer per packet,
72210 +                as this mode provides the best performance. However, the user can
72211 +                select to use multiple data buffers per packet.
72212 +
72213 + @Param[in]     h_FmPort        A handle to a FM Port module.
72214 + @Param[in]     newVal          Maximum receive buffer length (in bytes).
72215 +
72216 + @Return        E_OK on success; Error code otherwise.
72217 +
72218 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72219 +                This routine is to be used only if Independent-Mode is enabled.
72220 +*//***************************************************************************/
72221 +t_Error FM_PORT_ConfigIMMaxRxBufLength(t_Handle h_FmPort, uint16_t newVal);
72222 +
72223 +/**************************************************************************//**
72224 + @Function      FM_PORT_ConfigIMRxBdRingLength
72225 +
72226 + @Description   Changes the receive BD ring length from its default
72227 +                configuration:[DEFAULT_PORT_rxBdRingLength]
72228 +
72229 + @Param[in]     h_FmPort        A handle to a FM Port module.
72230 + @Param[in]     newVal          The desired BD ring length.
72231 +
72232 + @Return        E_OK on success; Error code otherwise.
72233 +
72234 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72235 +                This routine is to be used only if Independent-Mode is enabled.
72236 +*//***************************************************************************/
72237 +t_Error FM_PORT_ConfigIMRxBdRingLength(t_Handle h_FmPort, uint16_t newVal);
72238 +
72239 +/**************************************************************************//**
72240 + @Function      FM_PORT_ConfigIMTxBdRingLength
72241 +
72242 + @Description   Changes the transmit BD ring length from its default
72243 +                configuration:[DEFAULT_PORT_txBdRingLength]
72244 +
72245 + @Param[in]     h_FmPort        A handle to a FM Port module.
72246 + @Param[in]     newVal          The desired BD ring length.
72247 +
72248 + @Return        E_OK on success; Error code otherwise.
72249 +
72250 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72251 +                This routine is to be used only if Independent-Mode is enabled.
72252 +*//***************************************************************************/
72253 +t_Error FM_PORT_ConfigIMTxBdRingLength(t_Handle h_FmPort, uint16_t newVal);
72254 +
72255 +/**************************************************************************//**
72256 + @Function      FM_PORT_ConfigIMFmanCtrlExternalStructsMemory
72257 +
72258 + @Description   Configures memory partition and attributes for FMan-Controller
72259 +                data structures (e.g. BD rings).
72260 +                Calling this routine changes the internal driver data base
72261 +                from its default configuration
72262 +                [DEFAULT_PORT_ImfwExtStructsMemId, DEFAULT_PORT_ImfwExtStructsMemAttr].
72263 +
72264 + @Param[in]     h_FmPort        A handle to a FM Port module.
72265 + @Param[in]     memId           Memory partition ID.
72266 + @Param[in]     memAttributes   Memory attributes mask (a combination of MEMORY_ATTR_x flags).
72267 +
72268 + @Return        E_OK on success; Error code otherwise.
72269 +*//***************************************************************************/
72270 +t_Error  FM_PORT_ConfigIMFmanCtrlExternalStructsMemory(t_Handle h_FmPort,
72271 +                                                       uint8_t  memId,
72272 +                                                       uint32_t memAttributes);
72273 +
72274 +/**************************************************************************//**
72275 + @Function      FM_PORT_ConfigIMPolling
72276 +
72277 + @Description   Changes the Rx flow from interrupt driven (default) to polling.
72278 +
72279 + @Param[in]     h_FmPort        A handle to a FM Port module.
72280 +
72281 + @Return        E_OK on success; Error code otherwise.
72282 +
72283 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72284 +                This routine is to be used only if Independent-Mode is enabled.
72285 +*//***************************************************************************/
72286 +t_Error FM_PORT_ConfigIMPolling(t_Handle h_FmPort);
72287 +
72288 +/**************************************************************************//**
72289 + @Function      FM_PORT_ConfigMaxFrameLength
72290 +
72291 + @Description   Changes the definition of the max size of frame that should be
72292 +                transmitted/received on this port from its default value [DEFAULT_PORT_maxFrameLength].
72293 +                This parameter is used for confirmation of the minimum Fifo
72294 +                size calculations and only for Tx ports or ports working in
72295 +                independent mode. This should be larger than the maximum possible
72296 +                MTU that will be used for this port (i.e. its MAC).
72297 +
72298 + @Param[in]     h_FmPort        A handle to a FM Port module.
72299 + @Param[in]     length          Max size of frame
72300 +
72301 + @Return        E_OK on success; Error code otherwise.
72302 +
72303 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72304 +                This routine is to be used only if Independent-Mode is enabled.
72305 +*//***************************************************************************/
72306 +t_Error FM_PORT_ConfigMaxFrameLength(t_Handle h_FmPort, uint16_t length);
72307 +
72308 +/**************************************************************************//*
72309 + @Function      FM_PORT_ConfigTxFifoMinFillLevel
72310 +
72311 + @Description   Calling this routine changes the fifo minimum
72312 +                fill level parameter in the internal driver data base
72313 +                from its default configuration  [DEFAULT_PORT_txFifoMinFillLevel]
72314 +
72315 +                May be used for Tx ports only
72316 +
72317 + @Param[in]     h_FmPort        A handle to a FM Port module.
72318 + @Param[in]     minFillLevel    New value
72319 +
72320 + @Return        E_OK on success; Error code otherwise.
72321 +
72322 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72323 +*//***************************************************************************/
72324 +t_Error FM_PORT_ConfigTxFifoMinFillLevel(t_Handle h_FmPort, uint32_t minFillLevel);
72325 +
72326 +/**************************************************************************//*
72327 + @Function      FM_PORT_ConfigFifoDeqPipelineDepth
72328 +
72329 + @Description   Calling this routine changes the fifo dequeue
72330 +                pipeline depth parameter in the internal driver data base
72331 +
72332 +                from its default configuration: 1G ports: [DEFAULT_PORT_fifoDeqPipelineDepth_1G],
72333 +                10G port: [DEFAULT_PORT_fifoDeqPipelineDepth_10G],
72334 +                OP port: [DEFAULT_PORT_fifoDeqPipelineDepth_OH]
72335 +
72336 +                May be used for Tx/OP ports only
72337 +
72338 + @Param[in]     h_FmPort            A handle to a FM Port module.
72339 + @Param[in]     deqPipelineDepth    New value
72340 +
72341 + @Return        E_OK on success; Error code otherwise.
72342 +
72343 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72344 +*//***************************************************************************/
72345 +t_Error FM_PORT_ConfigFifoDeqPipelineDepth(t_Handle h_FmPort, uint8_t deqPipelineDepth);
72346 +
72347 +/**************************************************************************//*
72348 + @Function      FM_PORT_ConfigTxFifoLowComfLevel
72349 +
72350 + @Description   Calling this routine changes the fifo low comfort level
72351 +                parameter in internal driver data base
72352 +                from its default configuration [DEFAULT_PORT_txFifoLowComfLevel]
72353 +
72354 +                May be used for Tx ports only
72355 +
72356 + @Param[in]     h_FmPort            A handle to a FM Port module.
72357 + @Param[in]     fifoLowComfLevel    New value
72358 +
72359 + @Return        E_OK on success; Error code otherwise.
72360 +
72361 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72362 +*//***************************************************************************/
72363 +t_Error FM_PORT_ConfigTxFifoLowComfLevel(t_Handle h_FmPort, uint32_t fifoLowComfLevel);
72364 +
72365 +/**************************************************************************//*
72366 + @Function      FM_PORT_ConfigRxFifoThreshold
72367 +
72368 + @Description   Calling this routine changes the threshold of the FIFO
72369 +                fill level parameter in the internal driver data base
72370 +                from its default configuration [DEFAULT_PORT_rxFifoThreshold]
72371 +
72372 +                If the total number of buffers which are
72373 +                currently in use and associated with the
72374 +                specific RX port exceed this threshold, the
72375 +                BMI will signal the MAC to send a pause frame
72376 +                over the link.
72377 +
72378 +                May be used for Rx ports only
72379 +
72380 + @Param[in]     h_FmPort            A handle to a FM Port module.
72381 + @Param[in]     fifoThreshold       New value
72382 +
72383 + @Return        E_OK on success; Error code otherwise.
72384 +
72385 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72386 +*//***************************************************************************/
72387 +t_Error FM_PORT_ConfigRxFifoThreshold(t_Handle h_FmPort, uint32_t fifoThreshold);
72388 +
72389 +/**************************************************************************//*
72390 + @Function      FM_PORT_ConfigRxFifoPriElevationLevel
72391 +
72392 + @Description   Calling this routine changes the priority elevation level
72393 +                parameter in the internal driver data base from its default
72394 +                configuration  [DEFAULT_PORT_rxFifoPriElevationLevel]
72395 +
72396 +                If the total number of buffers which are currently in use and
72397 +                associated with the specific RX port exceed the amount specified
72398 +                in priElevationLevel, BMI will signal the main FM's DMA to
72399 +                elevate the FM priority on the system bus.
72400 +
72401 +                May be used for Rx ports only
72402 +
72403 + @Param[in]     h_FmPort            A handle to a FM Port module.
72404 + @Param[in]     priElevationLevel   New value
72405 +
72406 + @Return        E_OK on success; Error code otherwise.
72407 +
72408 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72409 +*//***************************************************************************/
72410 +t_Error FM_PORT_ConfigRxFifoPriElevationLevel(t_Handle h_FmPort, uint32_t priElevationLevel);
72411 +
72412 +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
72413 +/**************************************************************************//*
72414 + @Function      FM_PORT_ConfigBCBWorkaround
72415 +
72416 + @Description   Configures BCB errata workaround.
72417 +
72418 +                When BCB errata is applicable, the workaround is always
72419 +                performed by FM Controller. Thus, this functions doesn't
72420 +                actually enable errata workaround but rather allows driver
72421 +                to perform adjustments required due to errata workaround
72422 +                execution in FM controller.
72423 +
72424 +                Applying BCB workaround also configures FM_PORT_FRM_ERR_PHYSICAL
72425 +                errors to be discarded. Thus FM_PORT_FRM_ERR_PHYSICAL can't be
72426 +                set by FM_PORT_SetErrorsRoute() function.
72427 +
72428 + @Param[in]     h_FmPort            A handle to a FM Port module.
72429 +
72430 + @Return        E_OK on success; Error code otherwise.
72431 +
72432 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72433 +*//***************************************************************************/
72434 +t_Error FM_PORT_ConfigBCBWorkaround(t_Handle h_FmPort);
72435 +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
72436 +
72437 +#if (DPAA_VERSION >= 11)
72438 +/**************************************************************************//*
72439 + @Function      FM_PORT_ConfigInternalBuffOffset
72440 +
72441 + @Description   Configures internal buffer offset.
72442 +
72443 +                May be used for Rx and OP ports only
72444 +
72445 + @Param[in]     h_FmPort            A handle to a FM Port module.
72446 + @Param[in]     val                 New value
72447 +
72448 + @Return        E_OK on success; Error code otherwise.
72449 +
72450 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
72451 +*//***************************************************************************/
72452 +t_Error FM_PORT_ConfigInternalBuffOffset(t_Handle h_FmPort, uint8_t val);
72453 +#endif /* (DPAA_VERSION >= 11) */
72454 +
72455 +/** @} */ /* end of FM_PORT_advanced_init_grp group */
72456 +/** @} */ /* end of FM_PORT_init_grp group */
72457 +
72458 +
72459 +/**************************************************************************//**
72460 + @Group         FM_PORT_runtime_control_grp FM Port Runtime Control Unit
72461 +
72462 + @Description   FM Port Runtime control unit API functions, definitions and enums.
72463 +
72464 + @{
72465 +*//***************************************************************************/
72466 +
72467 +/**************************************************************************//**
72468 + @Description   enum for defining FM Port counters
72469 +*//***************************************************************************/
72470 +typedef enum e_FmPortCounters {
72471 +    e_FM_PORT_COUNTERS_CYCLE,                       /**< BMI performance counter */
72472 +    e_FM_PORT_COUNTERS_TASK_UTIL,                   /**< BMI performance counter */
72473 +    e_FM_PORT_COUNTERS_QUEUE_UTIL,                  /**< BMI performance counter */
72474 +    e_FM_PORT_COUNTERS_DMA_UTIL,                    /**< BMI performance counter */
72475 +    e_FM_PORT_COUNTERS_FIFO_UTIL,                   /**< BMI performance counter */
72476 +    e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION,         /**< BMI Rx only performance counter */
72477 +    e_FM_PORT_COUNTERS_FRAME,                       /**< BMI statistics counter */
72478 +    e_FM_PORT_COUNTERS_DISCARD_FRAME,               /**< BMI statistics counter */
72479 +    e_FM_PORT_COUNTERS_DEALLOC_BUF,                 /**< BMI deallocate buffer statistics counter */
72480 +    e_FM_PORT_COUNTERS_RX_BAD_FRAME,                /**< BMI Rx only statistics counter */
72481 +    e_FM_PORT_COUNTERS_RX_LARGE_FRAME,              /**< BMI Rx only statistics counter */
72482 +    e_FM_PORT_COUNTERS_RX_FILTER_FRAME,             /**< BMI Rx & OP only statistics counter */
72483 +    e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR,             /**< BMI Rx, OP & HC only statistics counter */
72484 +    e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD,   /**< BMI Rx, OP & HC statistics counter */
72485 +    e_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER,  /**< BMI Rx, OP & HC only statistics counter */
72486 +    e_FM_PORT_COUNTERS_WRED_DISCARD,                /**< BMI OP & HC only statistics counter */
72487 +    e_FM_PORT_COUNTERS_LENGTH_ERR,                  /**< BMI non-Rx statistics counter */
72488 +    e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT,           /**< BMI non-Rx statistics counter */
72489 +    e_FM_PORT_COUNTERS_DEQ_TOTAL,                   /**< QMI total QM dequeues counter */
72490 +    e_FM_PORT_COUNTERS_ENQ_TOTAL,                   /**< QMI total QM enqueues counter */
72491 +    e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT,            /**< QMI counter */
72492 +    e_FM_PORT_COUNTERS_DEQ_CONFIRM                  /**< QMI counter */
72493 +} e_FmPortCounters;
72494 +
72495 +typedef struct t_FmPortBmiStats {
72496 +    uint32_t cntCycle;
72497 +    uint32_t cntTaskUtil;
72498 +    uint32_t cntQueueUtil;
72499 +    uint32_t cntDmaUtil;
72500 +    uint32_t cntFifoUtil;
72501 +    uint32_t cntRxPauseActivation;
72502 +    uint32_t cntFrame;
72503 +    uint32_t cntDiscardFrame;
72504 +    uint32_t cntDeallocBuf;
72505 +    uint32_t cntRxBadFrame;
72506 +    uint32_t cntRxLargeFrame;
72507 +    uint32_t cntRxFilterFrame;
72508 +    uint32_t cntRxListDmaErr;
72509 +    uint32_t cntRxOutOfBuffersDiscard;
72510 +    uint32_t cntWredDiscard;
72511 +    uint32_t cntLengthErr;
72512 +    uint32_t cntUnsupportedFormat;
72513 +} t_FmPortBmiStats;
72514 +
72515 +/**************************************************************************//**
72516 + @Description   Structure for Port id parameters.
72517 +                Fields commented 'IN' are passed by the port module to be used
72518 +                by the FM module.
72519 +                Fields commented 'OUT' will be filled by FM before returning to port.
72520 +*//***************************************************************************/
72521 +typedef struct t_FmPortCongestionGrps {
72522 +    uint16_t    numOfCongestionGrpsToConsider;          /**< The number of required CGs
72523 +                                                             to define the size of the following array */
72524 +    uint8_t     congestionGrpsToConsider[FM_PORT_NUM_OF_CONGESTION_GRPS];
72525 +                                                        /**< An array of CG indexes;
72526 +                                                             Note that the size of the array should be
72527 +                                                             'numOfCongestionGrpsToConsider'. */
72528 +#if (DPAA_VERSION >= 11)
72529 +    bool        pfcPrioritiesEn[FM_PORT_NUM_OF_CONGESTION_GRPS][FM_MAX_NUM_OF_PFC_PRIORITIES];
72530 +                                                        /**< a matrix that represents the map between the CG ids
72531 +                                                             defined in 'congestionGrpsToConsider' to the priorties
72532 +                                                             mapping array. */
72533 +#endif /* (DPAA_VERSION >= 11) */
72534 +} t_FmPortCongestionGrps;
72535 +
72536 +/**************************************************************************//**
72537 + @Description   Structure for Deep Sleep Auto Response ARP Entry
72538 +*//***************************************************************************/
72539 +typedef struct t_FmPortDsarArpEntry
72540 +{
72541 +    uint32_t  ipAddress;
72542 +    uint8_t   mac[6];
72543 +    bool      isVlan;
72544 +    uint16_t  vid;
72545 +} t_FmPortDsarArpEntry;
72546 +
72547 +/**************************************************************************//**
72548 + @Description   Structure for Deep Sleep Auto Response ARP info
72549 +*//***************************************************************************/
72550 +typedef struct t_FmPortDsarArpInfo
72551 +{
72552 +    uint8_t           tableSize;
72553 +    t_FmPortDsarArpEntry *p_AutoResTable;
72554 +    bool              enableConflictDetection; /* when TRUE Conflict Detection will be checked and wake the host if needed */
72555 +} t_FmPortDsarArpInfo;
72556 +
72557 +/**************************************************************************//**
72558 + @Description   Structure for Deep Sleep Auto Response NDP Entry
72559 +*//***************************************************************************/
72560 +typedef struct t_FmPortDsarNdpEntry
72561 +{
72562 +    uint32_t  ipAddress[4];
72563 +    uint8_t   mac[6];
72564 +    bool      isVlan;
72565 +    uint16_t  vid;
72566 +} t_FmPortDsarNdpEntry;
72567 +
72568 +/**************************************************************************//**
72569 + @Description   Structure for Deep Sleep Auto Response NDP info
72570 +*//***************************************************************************/
72571 +typedef struct t_FmPortDsarNdpInfo
72572 +{
72573 +    uint32_t              multicastGroup;
72574 +
72575 +    uint8_t               tableSizeAssigned;
72576 +    t_FmPortDsarNdpEntry  *p_AutoResTableAssigned; /* This list refer to solicitation IP addresses.
72577 +                                                                 Note that all IP adresses must be from the same multicast group.
72578 +                                                                 This will be checked and if not operation will fail. */
72579 +    uint8_t               tableSizeTmp;
72580 +    t_FmPortDsarNdpEntry  *p_AutoResTableTmp;      /* This list refer to temp IP addresses.
72581 +                                                             Note that all temp IP adresses must be from the same multicast group.
72582 +                                                             This will be checked and if not operation will fail. */
72583 +
72584 +    bool                  enableConflictDetection; /* when TRUE Conflict Detection will be checked and wake the host if needed */
72585 +
72586 +} t_FmPortDsarNdpInfo;
72587 +
72588 +/**************************************************************************//**
72589 + @Description   Structure for Deep Sleep Auto Response ICMPV4 info
72590 +*//***************************************************************************/
72591 +typedef struct t_FmPortDsarEchoIpv4Info
72592 +{
72593 +    uint8_t            tableSize;
72594 +    t_FmPortDsarArpEntry  *p_AutoResTable;
72595 +} t_FmPortDsarEchoIpv4Info;
72596 +
72597 +/**************************************************************************//**
72598 + @Description   Structure for Deep Sleep Auto Response ICMPV6 info
72599 +*//***************************************************************************/
72600 +typedef struct t_FmPortDsarEchoIpv6Info
72601 +{
72602 +    uint8_t            tableSize;
72603 +    t_FmPortDsarNdpEntry  *p_AutoResTable;
72604 +} t_FmPortDsarEchoIpv6Info;
72605 +
72606 +/**************************************************************************//**
72607 +@Description    Deep Sleep Auto Response SNMP OIDs table entry
72608 +
72609 +*//***************************************************************************/
72610 +typedef struct {
72611 +       uint16_t     oidSize;
72612 +       uint8_t      *oidVal; /* only the oid string */
72613 +       uint16_t     resSize;
72614 +       uint8_t      *resVal; /* resVal will be the entire reply,
72615 +                               i.e. "Type|Length|Value" */
72616 +} t_FmPortDsarOidsEntry;
72617 +
72618 +/**************************************************************************//**
72619 + @Description   Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry
72620 +                Refer to the FMan Controller spec for more details.
72621 +*//***************************************************************************/
72622 +typedef struct
72623 +{
72624 +    uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
72625 +    bool      isVlan;
72626 +    uint16_t vid;   /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
72627 +                       /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
72628 +} t_FmPortDsarSnmpIpv4AddrTblEntry;
72629 +
72630 +/**************************************************************************//**
72631 + @Description   Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry
72632 +                Refer to the FMan Controller spec for more details.
72633 +*//***************************************************************************/
72634 +typedef struct
72635 +{
72636 +    uint32_t ipv6Addr[4];  /*!< 4 * 32 bit IPv6 Address.                                                     */
72637 +    bool      isVlan;
72638 +    uint16_t vid;       /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
72639 +                           /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
72640 +} t_FmPortDsarSnmpIpv6AddrTblEntry;
72641 +
72642 +/**************************************************************************//**
72643 + @Description   Deep Sleep Auto Response SNMP Descriptor
72644 +
72645 +*//***************************************************************************/
72646 +typedef struct
72647 +{
72648 +    uint16_t control;                          /**< Control bits [0-15]. */
72649 +    uint16_t maxSnmpMsgLength;                 /**< Maximal allowed SNMP message length. */
72650 +    uint16_t numOfIpv4Addresses;               /**< Number of entries in IPv4 addresses table. */
72651 +    uint16_t numOfIpv6Addresses;               /**< Number of entries in IPv6 addresses table. */
72652 +    t_FmPortDsarSnmpIpv4AddrTblEntry *p_Ipv4AddrTbl; /**< Pointer to IPv4 addresses table. */
72653 +    t_FmPortDsarSnmpIpv6AddrTblEntry *p_Ipv6AddrTbl; /**< Pointer to IPv6 addresses table. */
72654 +    uint8_t *p_RdOnlyCommunityStr;             /**< Pointer to the Read Only Community String. */
72655 +    uint8_t *p_RdWrCommunityStr;               /**< Pointer to the Read Write Community String. */
72656 +    t_FmPortDsarOidsEntry *p_OidsTbl;                 /**< Pointer to OIDs table. */
72657 +    uint32_t oidsTblSize;                      /**< Number of entries in OIDs table. */
72658 +} t_FmPortDsarSnmpInfo;
72659 +
72660 +/**************************************************************************//**
72661 + @Description   Structure for Deep Sleep Auto Response filtering Entry
72662 +*//***************************************************************************/
72663 +typedef struct t_FmPortDsarFilteringEntry
72664 +{
72665 +    uint16_t    srcPort;
72666 +    uint16_t    dstPort;
72667 +    uint16_t    srcPortMask;
72668 +    uint16_t    dstPortMask;
72669 +} t_FmPortDsarFilteringEntry;
72670 +
72671 +/**************************************************************************//**
72672 + @Description   Structure for Deep Sleep Auto Response filtering info
72673 +*//***************************************************************************/
72674 +typedef struct t_FmPortDsarFilteringInfo
72675 +{
72676 +    /* IP protocol filtering parameters */
72677 +    uint8_t     ipProtTableSize;
72678 +    uint8_t     *p_IpProtTablePtr;
72679 +    bool        ipProtPassOnHit;  /* when TRUE, miss in the table will cause the packet to be droped,
72680 +                                         hit will pass the packet to UDP/TCP filters if needed and if not
72681 +                                         to the classification tree. If the classification tree will pass
72682 +                                         the packet to a queue it will cause a wake interupt.
72683 +                                         When FALSE it the other way around. */
72684 +    /* UDP port filtering parameters */
72685 +    uint8_t     udpPortsTableSize;
72686 +    t_FmPortDsarFilteringEntry *p_UdpPortsTablePtr;
72687 +    bool        udpPortPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped,
72688 +                                         hit will pass the packet to classification tree.
72689 +                                         If the classification tree will pass the packet to a queue it
72690 +                                         will cause a wake interupt.
72691 +                                         When FALSE it the other way around. */
72692 +    /* TCP port filtering parameters */
72693 +    uint16_t    tcpFlagsMask;
72694 +    uint8_t     tcpPortsTableSize;
72695 +    t_FmPortDsarFilteringEntry *p_TcpPortsTablePtr;
72696 +    bool        tcpPortPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped,
72697 +                                         hit will pass the packet to classification tree.
72698 +                                         If the classification tree will pass the packet to a queue it
72699 +                                         will cause a wake interupt.
72700 +                                         When FALSE it the other way around. */
72701 +} t_FmPortDsarFilteringInfo;
72702 +
72703 +/**************************************************************************//**
72704 + @Description   Structure for Deep Sleep Auto Response parameters
72705 +*//***************************************************************************/
72706 +typedef struct t_FmPortDsarParams
72707 +{
72708 +    t_Handle                  h_FmPortTx;
72709 +    t_FmPortDsarArpInfo       *p_AutoResArpInfo;
72710 +    t_FmPortDsarEchoIpv4Info  *p_AutoResEchoIpv4Info;
72711 +    t_FmPortDsarNdpInfo       *p_AutoResNdpInfo;
72712 +    t_FmPortDsarEchoIpv6Info  *p_AutoResEchoIpv6Info;
72713 +    t_FmPortDsarSnmpInfo      *p_AutoResSnmpInfo;
72714 +    t_FmPortDsarFilteringInfo *p_AutoResFilteringInfo;
72715 +} t_FmPortDsarParams;
72716 +
72717 +/**************************************************************************//**
72718 + @Function      FM_PORT_EnterDsar
72719 +
72720 + @Description   Enter Deep Sleep Auto Response mode.
72721 +                This function write the apropriate values to in the relevant
72722 +                tables in the MURAM.
72723 +
72724 + @Param[in]     h_FmPortRx - FM PORT module descriptor
72725 + @Param[in]     params - Auto Response parameters
72726 +
72727 + @Return        E_OK on success; Error code otherwise.
72728 +
72729 + @Cautions      Allowed only following FM_PORT_Init().
72730 +*//***************************************************************************/
72731 +t_Error FM_PORT_EnterDsar(t_Handle h_FmPortRx, t_FmPortDsarParams *params);
72732 +
72733 +/**************************************************************************//**
72734 + @Function      FM_PORT_EnterDsarFinal
72735 +
72736 + @Description   Enter Deep Sleep Auto Response mode.
72737 +                This function sets the Tx port in independent mode as needed
72738 +                and redirect the receive flow to go through the
72739 +                Dsar Fman-ctrl code
72740 +
72741 + @Param[in]     h_DsarRxPort - FM Rx PORT module descriptor
72742 + @Param[in]     h_DsarTxPort - FM Tx PORT module descriptor
72743 +
72744 + @Return        E_OK on success; Error code otherwise.
72745 +
72746 + @Cautions      Allowed only following FM_PORT_Init().
72747 +*//***************************************************************************/
72748 +t_Error FM_PORT_EnterDsarFinal(t_Handle h_DsarRxPort, t_Handle h_DsarTxPort);
72749 +
72750 +/**************************************************************************//**
72751 + @Function      FM_PORT_ExitDsar
72752 +
72753 + @Description   Exit Deep Sleep Auto Response mode.
72754 +                This function reverse the AR mode and put the ports back into
72755 +                their original wake mode
72756 +
72757 + @Param[in]     h_FmPortRx - FM PORT Rx module descriptor
72758 + @Param[in]     h_FmPortTx - FM PORT Tx module descriptor
72759 +
72760 + @Return        E_OK on success; Error code otherwise.
72761 +
72762 + @Cautions      Allowed only following FM_PORT_EnterDsar().
72763 +*//***************************************************************************/
72764 +void FM_PORT_ExitDsar(t_Handle h_FmPortRx, t_Handle h_FmPortTx);
72765 +
72766 +/**************************************************************************//**
72767 + @Function      FM_PORT_IsInDsar
72768 +
72769 + @Description   This function returns TRUE if the port was set as Auto Response
72770 +                and FALSE if not. Once Exit AR mode it will return FALSE as well
72771 +                until re-enabled once more.
72772 +
72773 + @Param[in]     h_FmPort - FM PORT module descriptor
72774 +
72775 + @Return        E_OK on success; Error code otherwise.
72776 +*//***************************************************************************/
72777 +bool FM_PORT_IsInDsar(t_Handle h_FmPort);
72778 +
72779 +typedef struct t_FmPortDsarStats
72780 +{
72781 +    uint32_t arpArCnt;
72782 +    uint32_t echoIcmpv4ArCnt;
72783 +    uint32_t ndpArCnt;
72784 +    uint32_t echoIcmpv6ArCnt;
72785 +    uint32_t snmpGetCnt;
72786 +    uint32_t snmpGetNextCnt;
72787 +} t_FmPortDsarStats;
72788 +
72789 +/**************************************************************************//**
72790 + @Function      FM_PORT_GetDsarStats
72791 +
72792 + @Description   Return statistics for Deep Sleep Auto Response
72793 +
72794 + @Param[in]     h_FmPortRx - FM PORT module descriptor
72795 + @Param[out]    stats - structure containing the statistics counters
72796 +
72797 + @Return        E_OK on success; Error code otherwise.
72798 +*//***************************************************************************/
72799 +t_Error FM_PORT_GetDsarStats(t_Handle h_FmPortRx, t_FmPortDsarStats *stats);
72800 +
72801 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
72802 +/**************************************************************************//**
72803 + @Function      FM_PORT_DumpRegs
72804 +
72805 + @Description   Dump all regs.
72806 +
72807 +                Calling this routine invalidates the descriptor.
72808 +
72809 + @Param[in]     h_FmPort - FM PORT module descriptor
72810 +
72811 + @Return        E_OK on success; Error code otherwise.
72812 +
72813 + @Cautions      Allowed only following FM_PORT_Init().
72814 +*//***************************************************************************/
72815 +t_Error FM_PORT_DumpRegs(t_Handle h_FmPort);
72816 +#endif /* (defined(DEBUG_ERRORS) && ... */
72817 +
72818 +/**************************************************************************//**
72819 + @Function      FM_PORT_GetBufferDataOffset
72820 +
72821 + @Description   Relevant for Rx ports.
72822 +                Returns the data offset from the beginning of the data buffer
72823 +
72824 + @Param[in]     h_FmPort - FM PORT module descriptor
72825 +
72826 + @Return        data offset.
72827 +
72828 + @Cautions      Allowed only following FM_PORT_Init().
72829 +*//***************************************************************************/
72830 +uint32_t FM_PORT_GetBufferDataOffset(t_Handle h_FmPort);
72831 +
72832 +/**************************************************************************//**
72833 + @Function      FM_PORT_GetBufferICInfo
72834 +
72835 + @Description   Returns the Internal Context offset from the beginning of the data buffer
72836 +
72837 + @Param[in]     h_FmPort - FM PORT module descriptor
72838 + @Param[in]     p_Data   - A pointer to the data buffer.
72839 +
72840 + @Return        Internal context info pointer on success, NULL if 'allOtherInfo' was not
72841 +                configured for this port.
72842 +
72843 + @Cautions      Allowed only following FM_PORT_Init().
72844 +*//***************************************************************************/
72845 +uint8_t * FM_PORT_GetBufferICInfo(t_Handle h_FmPort, char *p_Data);
72846 +
72847 +/**************************************************************************//**
72848 + @Function      FM_PORT_GetBufferPrsResult
72849 +
72850 + @Description   Returns the pointer to the parse result in the data buffer.
72851 +                In Rx ports this is relevant after reception, if parse
72852 +                result is configured to be part of the data passed to the
72853 +                application. For non Rx ports it may be used to get the pointer
72854 +                of the area in the buffer where parse result should be
72855 +                initialized - if so configured.
72856 +                See FM_PORT_ConfigBufferPrefixContent for data buffer prefix
72857 +                configuration.
72858 +
72859 + @Param[in]     h_FmPort    - FM PORT module descriptor
72860 + @Param[in]     p_Data      - A pointer to the data buffer.
72861 +
72862 + @Return        Parse result pointer on success, NULL if parse result was not
72863 +                configured for this port.
72864 +
72865 + @Cautions      Allowed only following FM_PORT_Init().
72866 +*//***************************************************************************/
72867 +t_FmPrsResult * FM_PORT_GetBufferPrsResult(t_Handle h_FmPort, char *p_Data);
72868 +
72869 +/**************************************************************************//**
72870 + @Function      FM_PORT_GetBufferTimeStamp
72871 +
72872 + @Description   Returns the time stamp in the data buffer.
72873 +                Relevant for Rx ports for getting the buffer time stamp.
72874 +                See FM_PORT_ConfigBufferPrefixContent for data buffer prefix
72875 +                configuration.
72876 +
72877 + @Param[in]     h_FmPort    - FM PORT module descriptor
72878 + @Param[in]     p_Data      - A pointer to the data buffer.
72879 +
72880 + @Return        A pointer to the hash result on success, NULL otherwise.
72881 +
72882 + @Cautions      Allowed only following FM_PORT_Init().
72883 +*//***************************************************************************/
72884 +uint64_t * FM_PORT_GetBufferTimeStamp(t_Handle h_FmPort, char *p_Data);
72885 +
72886 +/**************************************************************************//**
72887 + @Function      FM_PORT_GetBufferHashResult
72888 +
72889 + @Description   Given a data buffer, on the condition that hash result was defined
72890 +                as a part of the buffer content (see FM_PORT_ConfigBufferPrefixContent)
72891 +                this routine will return the pointer to the hash result location in the
72892 +                buffer prefix.
72893 +
72894 + @Param[in]     h_FmPort    - FM PORT module descriptor
72895 + @Param[in]     p_Data      - A pointer to the data buffer.
72896 +
72897 + @Return        A pointer to the hash result on success, NULL otherwise.
72898 +
72899 + @Cautions      Allowed only following FM_PORT_Init().
72900 +*//***************************************************************************/
72901 +uint8_t * FM_PORT_GetBufferHashResult(t_Handle h_FmPort, char *p_Data);
72902 +
72903 +/**************************************************************************//**
72904 + @Function      FM_PORT_Disable
72905 +
72906 + @Description   Gracefully disable an FM port. The port will not start new tasks after all
72907 +                tasks associated with the port are terminated.
72908 +
72909 + @Param[in]     h_FmPort    A handle to a FM Port module.
72910 +
72911 + @Return        E_OK on success; Error code otherwise.
72912 +
72913 + @Cautions      Allowed only following FM_PORT_Init().
72914 +                This is a blocking routine, it returns after port is
72915 +                gracefully stopped, i.e. the port will not except new frames,
72916 +                but it will finish all frames or tasks which were already began
72917 +*//***************************************************************************/
72918 +t_Error FM_PORT_Disable(t_Handle h_FmPort);
72919 +
72920 +/**************************************************************************//**
72921 + @Function      FM_PORT_Enable
72922 +
72923 + @Description   A runtime routine provided to allow disable/enable of port.
72924 +
72925 + @Param[in]     h_FmPort    A handle to a FM Port module.
72926 +
72927 + @Return        E_OK on success; Error code otherwise.
72928 +
72929 + @Cautions      Allowed only following FM_PORT_Init().
72930 +*//***************************************************************************/
72931 +t_Error FM_PORT_Enable(t_Handle h_FmPort);
72932 +
72933 +/**************************************************************************//**
72934 + @Function      FM_PORT_SetRateLimit
72935 +
72936 + @Description   Calling this routine enables rate limit algorithm.
72937 +                By default, this functionality is disabled.
72938 +                Note that rate-limit mechanism uses the FM time stamp.
72939 +                The selected rate limit specified here would be
72940 +                rounded DOWN to the nearest 16M.
72941 +
72942 +                May be used for Tx and OP ports only
72943 +
72944 + @Param[in]     h_FmPort        A handle to a FM Port module.
72945 + @Param[in]     p_RateLimit     A structure of rate limit parameters
72946 +
72947 + @Return        E_OK on success; Error code otherwise.
72948 +
72949 + @Cautions      Allowed only following FM_PORT_Init().
72950 +                If rate limit is set on a port that need to send PFC frames,
72951 +                it might violate the stop transmit timing.
72952 +*//***************************************************************************/
72953 +t_Error FM_PORT_SetRateLimit(t_Handle h_FmPort, t_FmPortRateLimit *p_RateLimit);
72954 +
72955 +/**************************************************************************//**
72956 + @Function      FM_PORT_DeleteRateLimit
72957 +
72958 + @Description   Calling this routine disables and clears rate limit
72959 +                initialization.
72960 +
72961 +                May be used for Tx and OP ports only
72962 +
72963 + @Param[in]     h_FmPort        A handle to a FM Port module.
72964 +
72965 + @Return        E_OK on success; Error code otherwise.
72966 +
72967 + @Cautions      Allowed only following FM_PORT_Init().
72968 +*//***************************************************************************/
72969 +t_Error FM_PORT_DeleteRateLimit(t_Handle h_FmPort);
72970 +
72971 +/**************************************************************************//**
72972 + @Function      FM_PORT_SetPfcPrioritiesMappingToQmanWQ
72973 +
72974 + @Description   Calling this routine maps each PFC received priority to the transmit WQ.
72975 +                This WQ will be blocked upon receiving a PFC frame with this priority.
72976 +
72977 +                May be used for Tx ports only.
72978 +
72979 + @Param[in]     h_FmPort        A handle to a FM Port module.
72980 + @Param[in]     prio            PFC priority (0-7).
72981 + @Param[in]     wq              Work Queue (0-7).
72982 +
72983 + @Return        E_OK on success; Error code otherwise.
72984 +
72985 + @Cautions      Allowed only following FM_PORT_Init().
72986 +*//***************************************************************************/
72987 +t_Error FM_PORT_SetPfcPrioritiesMappingToQmanWQ(t_Handle h_FmPort, uint8_t prio, uint8_t wq);
72988 +
72989 +/**************************************************************************//**
72990 + @Function      FM_PORT_SetStatisticsCounters
72991 +
72992 + @Description   Calling this routine enables/disables port's statistics counters.
72993 +                By default, counters are enabled.
72994 +
72995 +                May be used for all port types
72996 +
72997 + @Param[in]     h_FmPort    A handle to a FM Port module.
72998 + @Param[in]     enable      TRUE to enable, FALSE to disable.
72999 +
73000 + @Return        E_OK on success; Error code otherwise.
73001 +
73002 + @Cautions      Allowed only following FM_PORT_Init().
73003 +*//***************************************************************************/
73004 +t_Error FM_PORT_SetStatisticsCounters(t_Handle h_FmPort, bool enable);
73005 +
73006 +/**************************************************************************//**
73007 + @Function      FM_PORT_SetFrameQueueCounters
73008 +
73009 + @Description   Calling this routine enables/disables port's enqueue/dequeue counters.
73010 +                By default, counters are enabled.
73011 +
73012 +                May be used for all ports
73013 +
73014 + @Param[in]     h_FmPort    A handle to a FM Port module.
73015 + @Param[in]     enable      TRUE to enable, FALSE to disable.
73016 +
73017 + @Return        E_OK on success; Error code otherwise.
73018 +
73019 + @Cautions      Allowed only following FM_PORT_Init().
73020 +*//***************************************************************************/
73021 +t_Error FM_PORT_SetFrameQueueCounters(t_Handle h_FmPort, bool enable);
73022 +
73023 +/**************************************************************************//**
73024 + @Function      FM_PORT_AnalyzePerformanceParams
73025 +
73026 + @Description   User may call this routine to so the driver will analyze if the
73027 +                basic performance parameters are correct and also the driver may
73028 +                suggest of improvements; The basic parameters are FIFO sizes, number
73029 +                of DMAs and number of TNUMs for the port.
73030 +
73031 +                May be used for all port types
73032 +
73033 + @Param[in]     h_FmPort                A handle to a FM Port module.
73034 +
73035 + @Return        E_OK on success; Error code otherwise.
73036 +
73037 + @Cautions      Allowed only following FM_PORT_Init().
73038 +*//***************************************************************************/
73039 +t_Error FM_PORT_AnalyzePerformanceParams(t_Handle h_FmPort);
73040 +
73041 +
73042 +/**************************************************************************//**
73043 + @Function      FM_PORT_SetAllocBufCounter
73044 +
73045 + @Description   Calling this routine enables/disables BM pool allocate
73046 +                buffer counters.
73047 +                By default, counters are enabled.
73048 +
73049 +                May be used for Rx ports only
73050 +
73051 + @Param[in]     h_FmPort    A handle to a FM Port module.
73052 + @Param[in]     poolId      BM pool id.
73053 + @Param[in]     enable      TRUE to enable, FALSE to disable.
73054 +
73055 + @Return        E_OK on success; Error code otherwise.
73056 +
73057 + @Cautions      Allowed only following FM_PORT_Init().
73058 +*//***************************************************************************/
73059 +t_Error FM_PORT_SetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId, bool enable);
73060 +
73061 +/**************************************************************************//**
73062 + @Function      FM_PORT_GetBmiCounters
73063 +
73064 + @Description   Read port's BMI stat counters and place them into
73065 +                a designated structure of counters.
73066 +
73067 + @Param[in]     h_FmPort    A handle to a FM Port module.
73068 + @Param[out]    p_BmiStats  counters structure
73069 +
73070 + @Return        E_OK on success; Error code otherwise.
73071 +
73072 + @Cautions      Allowed only following FM_PORT_Init().
73073 +*//***************************************************************************/
73074 +t_Error FM_PORT_GetBmiCounters(t_Handle h_FmPort, t_FmPortBmiStats *p_BmiStats);
73075 +
73076 +/**************************************************************************//**
73077 + @Function      FM_PORT_GetCounter
73078 +
73079 + @Description   Reads one of the FM PORT counters.
73080 +
73081 + @Param[in]     h_FmPort            A handle to a FM Port module.
73082 + @Param[in]     fmPortCounter       The requested counter.
73083 +
73084 + @Return        Counter's current value.
73085 +
73086 + @Cautions      Allowed only following FM_PORT_Init().
73087 +                Note that it is user's responsibility to call this routine only
73088 +                for enabled counters, and there will be no indication if a
73089 +                disabled counter is accessed.
73090 +*//***************************************************************************/
73091 +uint32_t FM_PORT_GetCounter(t_Handle h_FmPort, e_FmPortCounters fmPortCounter);
73092 +
73093 +/**************************************************************************//**
73094 + @Function      FM_PORT_ModifyCounter
73095 +
73096 + @Description   Sets a value to an enabled counter. Use "0" to reset the counter.
73097 +
73098 + @Param[in]     h_FmPort            A handle to a FM Port module.
73099 + @Param[in]     fmPortCounter       The requested counter.
73100 + @Param[in]     value               The requested value to be written into the counter.
73101 +
73102 + @Return        E_OK on success; Error code otherwise.
73103 +
73104 + @Cautions      Allowed only following FM_PORT_Init().
73105 +*//***************************************************************************/
73106 +t_Error FM_PORT_ModifyCounter(t_Handle h_FmPort, e_FmPortCounters fmPortCounter, uint32_t value);
73107 +
73108 +/**************************************************************************//**
73109 + @Function      FM_PORT_GetAllocBufCounter
73110 +
73111 + @Description   Reads one of the FM PORT buffer counters.
73112 +
73113 + @Param[in]     h_FmPort            A handle to a FM Port module.
73114 + @Param[in]     poolId              The requested pool.
73115 +
73116 + @Return        Counter's current value.
73117 +
73118 + @Cautions      Allowed only following FM_PORT_Init().
73119 +                Note that it is user's responsibility to call this routine only
73120 +                for enabled counters, and there will be no indication if a
73121 +                disabled counter is accessed.
73122 +*//***************************************************************************/
73123 +uint32_t FM_PORT_GetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId);
73124 +
73125 +/**************************************************************************//**
73126 + @Function      FM_PORT_ModifyAllocBufCounter
73127 +
73128 + @Description   Sets a value to an enabled counter. Use "0" to reset the counter.
73129 +
73130 + @Param[in]     h_FmPort            A handle to a FM Port module.
73131 + @Param[in]     poolId              The requested pool.
73132 + @Param[in]     value               The requested value to be written into the counter.
73133 +
73134 + @Return        E_OK on success; Error code otherwise.
73135 +
73136 + @Cautions      Allowed only following FM_PORT_Init().
73137 +*//***************************************************************************/
73138 +t_Error FM_PORT_ModifyAllocBufCounter(t_Handle h_FmPort,  uint8_t poolId, uint32_t value);
73139 +
73140 +/**************************************************************************//**
73141 + @Function      FM_PORT_AddCongestionGrps
73142 +
73143 + @Description   This routine effects the corresponding Tx port.
73144 +                It should be called in order to enable pause
73145 +                frame transmission in case of congestion in one or more
73146 +                of the congestion groups relevant to this port.
73147 +                Each call to this routine may add one or more congestion
73148 +                groups to be considered relevant to this port.
73149 +
73150 +                May be used for Rx, or RX+OP ports only (depending on chip)
73151 +
73152 + @Param[in]     h_FmPort            A handle to a FM Port module.
73153 + @Param[in]     p_CongestionGrps    A pointer to an array of congestion groups
73154 +                                    id's to consider.
73155 +
73156 + @Return        E_OK on success; Error code otherwise.
73157 +
73158 + @Cautions      Allowed only following FM_PORT_Init().
73159 +*//***************************************************************************/
73160 +t_Error FM_PORT_AddCongestionGrps(t_Handle h_FmPort, t_FmPortCongestionGrps *p_CongestionGrps);
73161 +
73162 +/**************************************************************************//**
73163 + @Function      FM_PORT_RemoveCongestionGrps
73164 +
73165 + @Description   This routine effects the corresponding Tx port. It should be
73166 +                called when congestion groups were
73167 +                defined for this port and are no longer relevant, or pause
73168 +                frames transmitting is not required on their behalf.
73169 +                Each call to this routine may remove one or more congestion
73170 +                groups to be considered relevant to this port.
73171 +
73172 +                May be used for Rx, or RX+OP ports only (depending on chip)
73173 +
73174 + @Param[in]     h_FmPort            A handle to a FM Port module.
73175 + @Param[in]     p_CongestionGrps    A pointer to an array of congestion groups
73176 +                                    id's to consider.
73177 +
73178 + @Return        E_OK on success; Error code otherwise.
73179 +
73180 + @Cautions      Allowed only following FM_PORT_Init().
73181 +*//***************************************************************************/
73182 +t_Error FM_PORT_RemoveCongestionGrps(t_Handle h_FmPort, t_FmPortCongestionGrps *p_CongestionGrps);
73183 +
73184 +/**************************************************************************//**
73185 + @Function      FM_PORT_IsStalled
73186 +
73187 + @Description   A routine for checking whether the specified port is stalled.
73188 +
73189 + @Param[in]     h_FmPort            A handle to a FM Port module.
73190 +
73191 + @Return        TRUE if port is stalled, FALSE otherwize
73192 +
73193 + @Cautions      Allowed only following FM_PORT_Init().
73194 +*//***************************************************************************/
73195 +bool FM_PORT_IsStalled(t_Handle h_FmPort);
73196 +
73197 +/**************************************************************************//**
73198 + @Function      FM_PORT_ReleaseStalled
73199 +
73200 + @Description   This routine may be called in case the port was stalled and may
73201 +                now be released.
73202 +                Note that this routine is available only on older FMan revisions
73203 +                (FMan v2, DPAA v1.0 only).
73204 +
73205 + @Param[in]     h_FmPort    A handle to a FM Port module.
73206 +
73207 + @Return        E_OK on success; Error code otherwise.
73208 +
73209 + @Cautions      Allowed only following FM_PORT_Init().
73210 +*//***************************************************************************/
73211 +t_Error FM_PORT_ReleaseStalled(t_Handle h_FmPort);
73212 +
73213 +/**************************************************************************//**
73214 + @Function      FM_PORT_SetRxL4ChecksumVerify
73215 +
73216 + @Description   This routine is relevant for Rx ports (1G and 10G). The routine
73217 +                set/clear the L3/L4 checksum verification (on RX side).
73218 +                Note that this takes affect only if hw-parser is enabled!
73219 +
73220 + @Param[in]     h_FmPort        A handle to a FM Port module.
73221 + @Param[in]     l4Checksum      boolean indicates whether to do L3/L4 checksum
73222 +                                on frames or not.
73223 +
73224 + @Return        E_OK on success; Error code otherwise.
73225 +
73226 + @Cautions      Allowed only following FM_PORT_Init().
73227 +*//***************************************************************************/
73228 +t_Error FM_PORT_SetRxL4ChecksumVerify(t_Handle h_FmPort, bool l4Checksum);
73229 +
73230 +/**************************************************************************//**
73231 + @Function      FM_PORT_SetErrorsRoute
73232 +
73233 + @Description   Errors selected for this routine will cause a frame with that error
73234 +                to be enqueued to error queue.
73235 +                Errors not selected for this routine will cause a frame with that error
73236 +                to be enqueued to the one of the other port queues.
73237 +                By default all errors are defined to be enqueued to error queue.
73238 +                Errors that were configured to be discarded (at initialization)
73239 +                may not be selected here.
73240 +
73241 +                May be used for Rx and OP ports only
73242 +
73243 + @Param[in]     h_FmPort    A handle to a FM Port module.
73244 + @Param[in]     errs        A list of errors to enqueue to error queue
73245 +
73246 + @Return        E_OK on success; Error code otherwise.
73247 +
73248 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
73249 +*//***************************************************************************/
73250 +t_Error FM_PORT_SetErrorsRoute(t_Handle h_FmPort, fmPortFrameErrSelect_t errs);
73251 +
73252 +/**************************************************************************//**
73253 + @Function      FM_PORT_SetIMExceptions
73254 +
73255 + @Description   Calling this routine enables/disables FM PORT interrupts.
73256 +
73257 + @Param[in]     h_FmPort        FM PORT module descriptor.
73258 + @Param[in]     exception       The exception to be selected.
73259 + @Param[in]     enable          TRUE to enable interrupt, FALSE to mask it.
73260 +
73261 + @Return        E_OK on success; Error code otherwise.
73262 +
73263 + @Cautions      Allowed only following FM_PORT_Init().
73264 +                This routine should NOT be called from guest-partition
73265 +                (i.e. guestId != NCSW_MASTER_ID)
73266 +*//***************************************************************************/
73267 +t_Error FM_PORT_SetIMExceptions(t_Handle h_FmPort, e_FmPortExceptions exception, bool enable);
73268 +
73269 +/**************************************************************************//*
73270 + @Function      FM_PORT_SetPerformanceCounters
73271 +
73272 + @Description   Calling this routine enables/disables port's performance counters.
73273 +                By default, counters are enabled.
73274 +
73275 +                May be used for all port types
73276 +
73277 + @Param[in]     h_FmPort                A handle to a FM Port module.
73278 + @Param[in]     enable                  TRUE to enable, FALSE to disable.
73279 +
73280 + @Return        E_OK on success; Error code otherwise.
73281 +
73282 + @Cautions      Allowed only following FM_PORT_Init().
73283 +*//***************************************************************************/
73284 +t_Error FM_PORT_SetPerformanceCounters(t_Handle h_FmPort, bool enable);
73285 +
73286 +/**************************************************************************//*
73287 + @Function      FM_PORT_SetPerformanceCountersParams
73288 +
73289 + @Description   Calling this routine defines port's performance
73290 +                counters parameters.
73291 +
73292 +                May be used for all port types
73293 +
73294 + @Param[in]     h_FmPort                A handle to a FM Port module.
73295 + @Param[in]     p_FmPortPerformanceCnt  A pointer to a structure of performance
73296 +                                        counters parameters.
73297 +
73298 + @Return        E_OK on success; Error code otherwise.
73299 +
73300 + @Cautions      Allowed only following FM_PORT_Init().
73301 +*//***************************************************************************/
73302 +t_Error FM_PORT_SetPerformanceCountersParams(t_Handle h_FmPort, t_FmPortPerformanceCnt *p_FmPortPerformanceCnt);
73303 +
73304 +/**************************************************************************//**
73305 + @Group         FM_PORT_pcd_runtime_control_grp FM Port PCD Runtime Control Unit
73306 +
73307 + @Description   FM Port PCD Runtime control unit API functions, definitions and enums.
73308 +
73309 + @{
73310 +*//***************************************************************************/
73311 +
73312 +/**************************************************************************//**
73313 + @Description   A structure defining the KG scheme after the parser.
73314 +                This is relevant only to change scheme selection mode - from
73315 +                direct to indirect and vice versa, or when the scheme is selected directly,
73316 +                to select the scheme id.
73317 +
73318 +*//***************************************************************************/
73319 +typedef struct t_FmPcdKgSchemeSelect {
73320 +    bool        direct;                 /**< TRUE to use 'h_Scheme' directly, FALSE to use LCV. */
73321 +    t_Handle    h_DirectScheme;         /**< Scheme handle, selects the scheme after parser;
73322 +                                             Relevant only when 'direct' is TRUE. */
73323 +} t_FmPcdKgSchemeSelect;
73324 +
73325 +/**************************************************************************//**
73326 + @Description   A structure of scheme parameters
73327 +*//***************************************************************************/
73328 +typedef struct t_FmPcdPortSchemesParams {
73329 +    uint8_t     numOfSchemes;                           /**< Number of schemes for port to be bound to. */
73330 +    t_Handle    h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES];    /**< Array of 'numOfSchemes' schemes for the
73331 +                                                             port to be bound to */
73332 +} t_FmPcdPortSchemesParams;
73333 +
73334 +/**************************************************************************//**
73335 + @Description   Union for defining port protocol parameters for parser
73336 +*//***************************************************************************/
73337 +typedef union u_FmPcdHdrPrsOpts {
73338 +    /* MPLS */
73339 +    struct {
73340 +        bool            labelInterpretationEnable;  /**< When this bit is set, the last MPLS label will be
73341 +                                                         interpreted as described in HW spec table. When the bit
73342 +                                                         is cleared, the parser will advance to MPLS next parse */
73343 +        e_NetHeaderType nextParse;                  /**< must be equal or higher than IPv4 */
73344 +    } mplsPrsOptions;
73345 +    /* VLAN */
73346 +    struct {
73347 +        uint16_t        tagProtocolId1;             /**< User defined Tag Protocol Identifier, to be recognized
73348 +                                                         on VLAN TAG on top of 0x8100 and 0x88A8 */
73349 +        uint16_t        tagProtocolId2;             /**< User defined Tag Protocol Identifier, to be recognized
73350 +                                                         on VLAN TAG on top of 0x8100 and 0x88A8 */
73351 +    } vlanPrsOptions;
73352 +    /* PPP */
73353 +    struct{
73354 +        bool            enableMTUCheck;             /**< Check validity of MTU according to RFC2516 */
73355 +    } pppoePrsOptions;
73356 +
73357 +    /* IPV6 */
73358 +    struct{
73359 +        bool            routingHdrEnable;          /**< TRUE to enable routing header, otherwise ignore */
73360 +    } ipv6PrsOptions;
73361 +
73362 +    /* UDP */
73363 +    struct{
73364 +        bool            padIgnoreChecksum;          /**< TRUE to ignore pad in checksum */
73365 +    } udpPrsOptions;
73366 +
73367 +    /* TCP */
73368 +    struct {
73369 +        bool            padIgnoreChecksum;          /**< TRUE to ignore pad in checksum */
73370 +    } tcpPrsOptions;
73371 +} u_FmPcdHdrPrsOpts;
73372 +
73373 +/**************************************************************************//**
73374 + @Description   A structure for defining each header for the parser
73375 +*//***************************************************************************/
73376 +typedef struct t_FmPcdPrsAdditionalHdrParams {
73377 +    e_NetHeaderType         hdr;            /**< Selected header; use  HEADER_TYPE_NONE
73378 +                                                 to indicate that sw parser is to run first
73379 +                                                 (before HW parser, and independent of the
73380 +                                                 existence of any protocol), in this case,
73381 +                                                 swPrsEnable must be set, and all other
73382 +                                                 parameters are irrelevant.  */
73383 +    bool                    errDisable;     /**< TRUE to disable error indication */
73384 +    bool                    swPrsEnable;    /**< Enable jump to SW parser when this
73385 +                                                 header is recognized by the HW parser. */
73386 +    uint8_t                 indexPerHdr;    /**< Normally 0, if more than one sw parser
73387 +                                                 attachments exists for the same header,
73388 +                                                 (in the main sw parser code) use this
73389 +                                                 index to distinguish between them. */
73390 +    bool                    usePrsOpts;     /**< TRUE to use parser options. */
73391 +    u_FmPcdHdrPrsOpts       prsOpts;        /**< A union according to header type,
73392 +                                                 defining the parser options selected.*/
73393 +} t_FmPcdPrsAdditionalHdrParams;
73394 +
73395 +/**************************************************************************//**
73396 + @Description   struct for defining port PCD parameters
73397 +*//***************************************************************************/
73398 +typedef struct t_FmPortPcdPrsParams {
73399 +    uint8_t                         prsResultPrivateInfo;           /**< The private info provides a method of inserting
73400 +                                                                         port information into the parser result. This information
73401 +                                                                         may be extracted by Keygen and be used for frames
73402 +                                                                         distribution when a per-port distinction is required,
73403 +                                                                         it may also be used as a port logical id for analyzing
73404 +                                                                         incoming frames. */
73405 +    uint8_t                         parsingOffset;                  /**< Number of bytes from beginning of packet to start parsing */
73406 +    e_NetHeaderType                 firstPrsHdr;                    /**< The type of the first header expected at 'parsingOffset' */
73407 +    bool                            includeInPrsStatistics;         /**< TRUE to include this port in the parser statistics;
73408 +                                                                         NOTE: this field is not valid when the FM is in "guest" mode
73409 +                                                                               and IPC is not available. */
73410 +    uint8_t                         numOfHdrsWithAdditionalParams;  /**< Normally 0, some headers may get
73411 +                                                                         special parameters */
73412 +    t_FmPcdPrsAdditionalHdrParams   additionalParams[FM_PCD_PRS_NUM_OF_HDRS];
73413 +                                                                    /**< 'numOfHdrsWithAdditionalParams'  structures
73414 +                                                                         of additional parameters
73415 +                                                                         for each header that requires them */
73416 +    bool                            setVlanTpid1;                   /**< TRUE to configure user selection of Ethertype to
73417 +                                                                         indicate a VLAN tag (in addition to the TPID values
73418 +                                                                         0x8100 and 0x88A8). */
73419 +    uint16_t                        vlanTpid1;                      /**< extra tag to use if setVlanTpid1=TRUE. */
73420 +    bool                            setVlanTpid2;                   /**< TRUE to configure user selection of Ethertype to
73421 +                                                                         indicate a VLAN tag (in addition to the TPID values
73422 +                                                                         0x8100 and 0x88A8). */
73423 +    uint16_t                        vlanTpid2;                      /**< extra tag to use if setVlanTpid1=TRUE. */
73424 +} t_FmPortPcdPrsParams;
73425 +
73426 +/**************************************************************************//**
73427 + @Description   struct for defining coarse alassification parameters
73428 +*//***************************************************************************/
73429 +typedef struct t_FmPortPcdCcParams {
73430 +    t_Handle            h_CcTree;                       /**< A handle to a CC tree */
73431 +} t_FmPortPcdCcParams;
73432 +
73433 +/**************************************************************************//**
73434 + @Description   struct for defining keygen parameters
73435 +*//***************************************************************************/
73436 +typedef struct t_FmPortPcdKgParams {
73437 +    uint8_t             numOfSchemes;                   /**< Number of schemes for port to be bound to. */
73438 +    t_Handle            h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES];
73439 +                                                        /**< Array of 'numOfSchemes' schemes handles for the
73440 +                                                             port to be bound to */
73441 +    bool                directScheme;                   /**< TRUE for going from parser to a specific scheme,
73442 +                                                             regardless of parser result */
73443 +    t_Handle            h_DirectScheme;                 /**< relevant only if direct == TRUE, Scheme handle,
73444 +                                                             as returned by FM_PCD_KgSetScheme */
73445 +} t_FmPortPcdKgParams;
73446 +
73447 +/**************************************************************************//**
73448 + @Description   struct for defining policer parameters
73449 +*//***************************************************************************/
73450 +typedef struct t_FmPortPcdPlcrParams {
73451 +    t_Handle                h_Profile;          /**< Selected profile handle */
73452 +} t_FmPortPcdPlcrParams;
73453 +
73454 +/**************************************************************************//**
73455 + @Description   struct for defining port PCD parameters
73456 +*//***************************************************************************/
73457 +typedef struct t_FmPortPcdParams {
73458 +    e_FmPortPcdSupport      pcdSupport;         /**< Relevant for Rx and offline ports only.
73459 +                                                     Describes the active PCD engines for this port. */
73460 +    t_Handle                h_NetEnv;           /**< HL Unused in PLCR only mode */
73461 +    t_FmPortPcdPrsParams    *p_PrsParams;       /**< Parser parameters for this port */
73462 +    t_FmPortPcdCcParams     *p_CcParams;        /**< Coarse classification parameters for this port */
73463 +    t_FmPortPcdKgParams     *p_KgParams;        /**< Keygen parameters for this port */
73464 +    t_FmPortPcdPlcrParams   *p_PlcrParams;      /**< Policer parameters for this port; Relevant for one of
73465 +                                                     following cases:
73466 +                                                     e_FM_PORT_PCD_SUPPORT_PLCR_ONLY or
73467 +                                                     e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR were selected,
73468 +                                                     or if any flow uses a KG scheme were policer
73469 +                                                     profile is not generated
73470 +                                                     ('bypassPlcrProfileGeneration selected'). */
73471 +    t_Handle                h_IpReassemblyManip;    /**< IP Reassembly manipulation */
73472 +#if (DPAA_VERSION >= 11)
73473 +    t_Handle                h_CapwapReassemblyManip;/**< CAPWAP Reassembly manipulation */
73474 +#endif /* (DPAA_VERSION >= 11) */
73475 +} t_FmPortPcdParams;
73476 +
73477 +/**************************************************************************//**
73478 + @Description   A structure for defining the Parser starting point
73479 +*//***************************************************************************/
73480 +typedef struct t_FmPcdPrsStart {
73481 +    uint8_t             parsingOffset;  /**< Number of bytes from beginning of packet to
73482 +                                             start parsing */
73483 +    e_NetHeaderType     firstPrsHdr;    /**< The type of the first header axpected at
73484 +                                             'parsingOffset' */
73485 +} t_FmPcdPrsStart;
73486 +
73487 +#if (DPAA_VERSION >= 11)
73488 +/**************************************************************************//**
73489 + @Description   struct for defining external buffer margins
73490 +*//***************************************************************************/
73491 +typedef struct t_FmPortVSPAllocParams {
73492 +    uint8_t     numOfProfiles;          /**< Number of Virtual Storage Profiles; must be a power of 2 */
73493 +    uint8_t     dfltRelativeId;         /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port
73494 +                                             The same default Virtual-Storage-Profile-id will be for coupled Tx port
73495 +                                             if relevant function called for Rx port */
73496 +    t_Handle    h_FmTxPort;             /**< Handle to coupled Tx Port; not relevant for OP port. */
73497 +} t_FmPortVSPAllocParams;
73498 +#endif /* (DPAA_VERSION >= 11) */
73499 +
73500 +
73501 +/**************************************************************************//**
73502 + @Function      FM_PORT_SetPCD
73503 +
73504 + @Description   Calling this routine defines the port's PCD configuration.
73505 +                It changes it from its default configuration which is PCD
73506 +                disabled (BMI to BMI) and configures it according to the passed
73507 +                parameters.
73508 +
73509 +                May be used for Rx and OP ports only
73510 +
73511 + @Param[in]     h_FmPort        A handle to a FM Port module.
73512 + @Param[in]     p_FmPortPcd     A Structure of parameters defining the port's PCD
73513 +                                configuration.
73514 +
73515 + @Return        E_OK on success; Error code otherwise.
73516 +
73517 + @Cautions      Allowed only following FM_PORT_Init().
73518 +*//***************************************************************************/
73519 +t_Error FM_PORT_SetPCD(t_Handle h_FmPort, t_FmPortPcdParams *p_FmPortPcd);
73520 +
73521 +/**************************************************************************//**
73522 + @Function      FM_PORT_DeletePCD
73523 +
73524 + @Description   Calling this routine releases the port's PCD configuration.
73525 +                The port returns to its default configuration which is PCD
73526 +                disabled (BMI to BMI) and all PCD configuration is removed.
73527 +
73528 +                May be used for Rx and OP ports which are
73529 +                in PCD mode  only
73530 +
73531 + @Param[in]     h_FmPort        A handle to a FM Port module.
73532 +
73533 + @Return        E_OK on success; Error code otherwise.
73534 +
73535 + @Cautions      Allowed only following FM_PORT_Init().
73536 +*//***************************************************************************/
73537 +t_Error FM_PORT_DeletePCD(t_Handle h_FmPort);
73538 +
73539 +/**************************************************************************//**
73540 + @Function      FM_PORT_AttachPCD
73541 +
73542 + @Description   This routine may be called after FM_PORT_DetachPCD was called,
73543 +                to return to the originally configured PCD support flow.
73544 +                The couple of routines are used to allow PCD configuration changes
73545 +                that demand that PCD will not be used while changes take place.
73546 +
73547 +                May be used for Rx and OP ports which are
73548 +                in PCD mode only
73549 +
73550 + @Param[in]     h_FmPort        A handle to a FM Port module.
73551 +
73552 + @Return        E_OK on success; Error code otherwise.
73553 +
73554 + @Cautions      Allowed only following FM_PORT_Init().
73555 +*//***************************************************************************/
73556 +t_Error FM_PORT_AttachPCD(t_Handle h_FmPort);
73557 +
73558 +/**************************************************************************//**
73559 + @Function      FM_PORT_DetachPCD
73560 +
73561 + @Description   Calling this routine detaches the port from its PCD functionality.
73562 +                The port returns to its default flow which is BMI to BMI.
73563 +
73564 +                May be used for Rx and OP ports which are
73565 +                in PCD mode only
73566 +
73567 + @Param[in]     h_FmPort        A handle to a FM Port module.
73568 +
73569 + @Return        E_OK on success; Error code otherwise.
73570 +
73571 + @Cautions      Allowed only following FM_PORT_AttachPCD().
73572 +*//***************************************************************************/
73573 +t_Error FM_PORT_DetachPCD(t_Handle h_FmPort);
73574 +
73575 +/**************************************************************************//**
73576 + @Function      FM_PORT_PcdPlcrAllocProfiles
73577 +
73578 + @Description   This routine may be called only for ports that use the Policer in
73579 +                order to allocate private policer profiles.
73580 +
73581 + @Param[in]     h_FmPort            A handle to a FM Port module.
73582 + @Param[in]     numOfProfiles       The number of required policer profiles
73583 +
73584 + @Return        E_OK on success; Error code otherwise.
73585 +
73586 + @Cautions      Allowed only following FM_PORT_Init() and FM_PCD_Init(),
73587 +                and before FM_PORT_SetPCD().
73588 +*//***************************************************************************/
73589 +t_Error FM_PORT_PcdPlcrAllocProfiles(t_Handle h_FmPort, uint16_t numOfProfiles);
73590 +
73591 +/**************************************************************************//**
73592 + @Function      FM_PORT_PcdPlcrFreeProfiles
73593 +
73594 + @Description   This routine should be called for freeing private policer profiles.
73595 +
73596 + @Param[in]     h_FmPort            A handle to a FM Port module.
73597 +
73598 + @Return        E_OK on success; Error code otherwise.
73599 +
73600 + @Cautions      Allowed only following FM_PORT_Init() and FM_PCD_Init(),
73601 +                and before FM_PORT_SetPCD().
73602 +*//***************************************************************************/
73603 +t_Error FM_PORT_PcdPlcrFreeProfiles(t_Handle h_FmPort);
73604 +
73605 +#if (DPAA_VERSION >= 11)
73606 +/**************************************************************************//**
73607 + @Function      FM_PORT_VSPAlloc
73608 +
73609 + @Description   This routine allocated VSPs per port and forces the port to work
73610 +                in VSP mode. Note that the port is initialized by default with the
73611 +                physical-storage-profile only.
73612 +
73613 + @Param[in]     h_FmPort    A handle to a FM Port module.
73614 + @Param[in]     p_Params    A structure of parameters for allocation VSP's per port
73615 +
73616 + @Return        E_OK on success; Error code otherwise.
73617 +
73618 + @Cautions      Allowed only following FM_PORT_Init(), and before FM_PORT_SetPCD()
73619 +                and also before FM_PORT_Enable(); i.e. the port should be disabled.
73620 +*//***************************************************************************/
73621 +t_Error FM_PORT_VSPAlloc(t_Handle h_FmPort, t_FmPortVSPAllocParams *p_Params);
73622 +#endif /* (DPAA_VERSION >= 11) */
73623 +
73624 +/**************************************************************************//**
73625 + @Function      FM_PORT_PcdKgModifyInitialScheme
73626 +
73627 + @Description   This routine may be called only for ports that use the keygen in
73628 +                order to change the initial scheme frame should be routed to.
73629 +                The change may be of a scheme id (in case of direct mode),
73630 +                from direct to indirect, or from indirect to direct - specifying the scheme id.
73631 +
73632 + @Param[in]     h_FmPort            A handle to a FM Port module.
73633 + @Param[in]     p_FmPcdKgScheme     A structure of parameters for defining whether
73634 +                                    a scheme is direct/indirect, and if direct - scheme id.
73635 +
73636 + @Return        E_OK on success; Error code otherwise.
73637 +
73638 + @Cautions      Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
73639 +*//***************************************************************************/
73640 +t_Error FM_PORT_PcdKgModifyInitialScheme (t_Handle h_FmPort, t_FmPcdKgSchemeSelect *p_FmPcdKgScheme);
73641 +
73642 +/**************************************************************************//**
73643 + @Function      FM_PORT_PcdPlcrModifyInitialProfile
73644 +
73645 + @Description   This routine may be called for ports with flows
73646 +                e_FM_PORT_PCD_SUPPORT_PLCR_ONLY or e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR
73647 +                only, to change the initial Policer profile frame should be
73648 +                routed to. The change may be of a profile and/or absolute/direct
73649 +                mode selection.
73650 +
73651 + @Param[in]     h_FmPort                A handle to a FM Port module.
73652 + @Param[in]     h_Profile               Policer profile handle
73653 +
73654 + @Return        E_OK on success; Error code otherwise.
73655 +
73656 + @Cautions      Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
73657 +*//***************************************************************************/
73658 +t_Error FM_PORT_PcdPlcrModifyInitialProfile (t_Handle h_FmPort, t_Handle h_Profile);
73659 +
73660 +/**************************************************************************//**
73661 + @Function      FM_PORT_PcdCcModifyTree
73662 +
73663 + @Description   This routine may be called for ports that use coarse classification tree
73664 +                if the user wishes to replace the tree. The routine may not be called while port
73665 +                receives packets using the PCD functionalities, therefor port must be first detached
73666 +                from the PCD, only than the routine may be called, and than port be attached to PCD again.
73667 +
73668 + @Param[in]     h_FmPort            A handle to a FM Port module.
73669 + @Param[in]     h_CcTree            A CC tree that was already built. The tree id as returned from
73670 +                                    the BuildTree routine.
73671 +
73672 + @Return        E_OK on success; Error code otherwise.
73673 +
73674 + @Cautions      Allowed only following FM_PORT_Init(), FM_PORT_SetPCD() and FM_PORT_DetachPCD()
73675 +*//***************************************************************************/
73676 +t_Error FM_PORT_PcdCcModifyTree (t_Handle h_FmPort, t_Handle h_CcTree);
73677 +
73678 +/**************************************************************************//**
73679 + @Function      FM_PORT_PcdKgBindSchemes
73680 +
73681 + @Description   These routines may be called for adding more schemes for the
73682 +                port to be bound to. The selected schemes are not added,
73683 +                just this specific port starts using them.
73684 +
73685 + @Param[in]     h_FmPort        A handle to a FM Port module.
73686 + @Param[in]     p_PortScheme    A structure defining the list of schemes to be added.
73687 +
73688 + @Return        E_OK on success; Error code otherwise.
73689 +
73690 + @Cautions      Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
73691 +*//***************************************************************************/
73692 +t_Error FM_PORT_PcdKgBindSchemes (t_Handle h_FmPort, t_FmPcdPortSchemesParams *p_PortScheme);
73693 +
73694 +/**************************************************************************//**
73695 + @Function      FM_PORT_PcdKgUnbindSchemes
73696 +
73697 + @Description   These routines may be called for adding more schemes for the
73698 +                port to be bound to. The selected schemes are not removed or invalidated,
73699 +                just this specific port stops using them.
73700 +
73701 + @Param[in]     h_FmPort        A handle to a FM Port module.
73702 + @Param[in]     p_PortScheme    A structure defining the list of schemes to be added.
73703 +
73704 + @Return        E_OK on success; Error code otherwise.
73705 +
73706 + @Cautions      Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
73707 +*//***************************************************************************/
73708 +t_Error FM_PORT_PcdKgUnbindSchemes (t_Handle h_FmPort, t_FmPcdPortSchemesParams *p_PortScheme);
73709 +
73710 +/**************************************************************************//**
73711 + @Function      FM_PORT_GetIPv4OptionsCount
73712 +
73713 + @Description   TODO
73714 +
73715 + @Param[in]     h_FmPort            A handle to a FM Port module.
73716 + @Param[out]    p_Ipv4OptionsCount  will hold the counter value
73717 +
73718 + @Return        E_OK on success; Error code otherwise.
73719 +
73720 + @Cautions      Allowed only following FM_PORT_Init()
73721 +*//***************************************************************************/
73722 +t_Error FM_PORT_GetIPv4OptionsCount(t_Handle h_FmPort, uint32_t *p_Ipv4OptionsCount);
73723 +
73724 +/** @} */ /* end of FM_PORT_pcd_runtime_control_grp group */
73725 +/** @} */ /* end of FM_PORT_runtime_control_grp group */
73726 +
73727 +
73728 +/**************************************************************************//**
73729 + @Group         FM_PORT_runtime_data_grp FM Port Runtime Data-path Unit
73730 +
73731 + @Description   FM Port Runtime data unit API functions, definitions and enums.
73732 +                This API is valid only if working in Independent-Mode.
73733 +
73734 + @{
73735 +*//***************************************************************************/
73736 +
73737 +/**************************************************************************//**
73738 + @Function      FM_PORT_ImTx
73739 +
73740 + @Description   Tx function, called to transmit a data buffer on the port.
73741 +
73742 + @Param[in]     h_FmPort    A handle to a FM Port module.
73743 + @Param[in]     p_Data      A pointer to an LCP data buffer.
73744 + @Param[in]     length      Size of data for transmission.
73745 + @Param[in]     lastBuffer  Buffer position - TRUE for the last buffer
73746 +                            of a frame, including a single buffer frame
73747 + @Param[in]     h_BufContext  A handle of the user acossiated with this buffer
73748 +
73749 + @Return        E_OK on success; Error code otherwise.
73750 +
73751 + @Cautions      Allowed only following FM_PORT_Init().
73752 +                NOTE - This routine can be used only when working in
73753 +                Independent-Mode mode.
73754 +*//***************************************************************************/
73755 +t_Error  FM_PORT_ImTx( t_Handle               h_FmPort,
73756 +                       uint8_t                *p_Data,
73757 +                       uint16_t               length,
73758 +                       bool                   lastBuffer,
73759 +                       t_Handle               h_BufContext);
73760 +
73761 +/**************************************************************************//**
73762 + @Function      FM_PORT_ImTxConf
73763 +
73764 + @Description   Tx port confirmation routine, optional, may be called to verify
73765 +                transmission of all frames. The procedure performed by this
73766 +                routine will be performed automatically on next buffer transmission,
73767 +                but if desired, calling this routine will invoke this action on
73768 +                demand.
73769 +
73770 + @Param[in]     h_FmPort            A handle to a FM Port module.
73771 +
73772 + @Cautions      Allowed only following FM_PORT_Init().
73773 +                NOTE - This routine can be used only when working in
73774 +                Independent-Mode mode.
73775 +*//***************************************************************************/
73776 +void FM_PORT_ImTxConf(t_Handle h_FmPort);
73777 +
73778 +/**************************************************************************//**
73779 + @Function      FM_PORT_ImRx
73780 +
73781 + @Description   Rx function, may be called to poll for received buffers.
73782 +                Normally, Rx process is invoked by the driver on Rx interrupt.
73783 +                Alternatively, this routine may be called on demand.
73784 +
73785 + @Param[in]     h_FmPort            A handle to a FM Port module.
73786 +
73787 + @Return        E_OK on success; Error code otherwise.
73788 +
73789 + @Cautions      Allowed only following FM_PORT_Init().
73790 +                NOTE - This routine can be used only when working in
73791 +                Independent-Mode mode.
73792 +*//***************************************************************************/
73793 +t_Error  FM_PORT_ImRx(t_Handle h_FmPort);
73794 +
73795 +/** @} */ /* end of FM_PORT_runtime_data_grp group */
73796 +/** @} */ /* end of FM_PORT_grp group */
73797 +/** @} */ /* end of FM_grp group */
73798 +
73799 +
73800 +
73801 +#ifdef NCSW_BACKWARD_COMPATIBLE_API
73802 +#define FM_PORT_ConfigTxFifoDeqPipelineDepth FM_PORT_ConfigFifoDeqPipelineDepth
73803 +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
73804 +
73805 +
73806 +#endif /* __FM_PORT_EXT */
73807 --- /dev/null
73808 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_rtc_ext.h
73809 @@ -0,0 +1,619 @@
73810 +/*
73811 + * Copyright 2008-2012 Freescale Semiconductor Inc.
73812 + *
73813 + * Redistribution and use in source and binary forms, with or without
73814 + * modification, are permitted provided that the following conditions are met:
73815 + *     * Redistributions of source code must retain the above copyright
73816 + *       notice, this list of conditions and the following disclaimer.
73817 + *     * Redistributions in binary form must reproduce the above copyright
73818 + *       notice, this list of conditions and the following disclaimer in the
73819 + *       documentation and/or other materials provided with the distribution.
73820 + *     * Neither the name of Freescale Semiconductor nor the
73821 + *       names of its contributors may be used to endorse or promote products
73822 + *       derived from this software without specific prior written permission.
73823 + *
73824 + *
73825 + * ALTERNATIVELY, this software may be distributed under the terms of the
73826 + * GNU General Public License ("GPL") as published by the Free Software
73827 + * Foundation, either version 2 of that License or (at your option) any
73828 + * later version.
73829 + *
73830 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
73831 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
73832 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
73833 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
73834 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
73835 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
73836 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
73837 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
73838 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
73839 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
73840 + */
73841 +
73842 +
73843 +/**************************************************************************//**
73844 + @File          fm_rtc_ext.h
73845 +
73846 + @Description   External definitions and API for FM RTC IEEE1588 Timer Module.
73847 +
73848 + @Cautions      None.
73849 +*//***************************************************************************/
73850 +
73851 +#ifndef __FM_RTC_EXT_H__
73852 +#define __FM_RTC_EXT_H__
73853 +
73854 +
73855 +#include "error_ext.h"
73856 +#include "std_ext.h"
73857 +#include "fsl_fman_rtc.h"
73858 +
73859 +/**************************************************************************//**
73860 +
73861 + @Group         FM_grp Frame Manager API
73862 +
73863 + @Description   FM API functions, definitions and enums
73864 +
73865 + @{
73866 +*//***************************************************************************/
73867 +
73868 +/**************************************************************************//**
73869 + @Group         fm_rtc_grp FM RTC
73870 +
73871 + @Description   FM RTC functions, definitions and enums.
73872 +
73873 + @{
73874 +*//***************************************************************************/
73875 +
73876 +/**************************************************************************//**
73877 + @Group         fm_rtc_init_grp FM RTC Initialization Unit
73878 +
73879 + @Description   FM RTC initialization API.
73880 +
73881 + @{
73882 +*//***************************************************************************/
73883 +
73884 +/**************************************************************************//**
73885 + @Description   FM RTC Alarm Polarity Options.
73886 +*//***************************************************************************/
73887 +typedef enum e_FmRtcAlarmPolarity
73888 +{
73889 +    e_FM_RTC_ALARM_POLARITY_ACTIVE_HIGH = E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH,    /**< Active-high output polarity */
73890 +    e_FM_RTC_ALARM_POLARITY_ACTIVE_LOW = E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW     /**< Active-low output polarity */
73891 +} e_FmRtcAlarmPolarity;
73892 +
73893 +/**************************************************************************//**
73894 + @Description   FM RTC Trigger Polarity Options.
73895 +*//***************************************************************************/
73896 +typedef enum e_FmRtcTriggerPolarity
73897 +{
73898 +    e_FM_RTC_TRIGGER_ON_RISING_EDGE = E_FMAN_RTC_TRIGGER_ON_RISING_EDGE,    /**< Trigger on rising edge */
73899 +    e_FM_RTC_TRIGGER_ON_FALLING_EDGE = E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE   /**< Trigger on falling edge */
73900 +} e_FmRtcTriggerPolarity;
73901 +
73902 +/**************************************************************************//**
73903 + @Description   IEEE1588 Timer Module FM RTC Optional Clock Sources.
73904 +*//***************************************************************************/
73905 +typedef enum e_FmSrcClock
73906 +{
73907 +    e_FM_RTC_SOURCE_CLOCK_EXTERNAL = E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL,  /**< external high precision timer reference clock */
73908 +    e_FM_RTC_SOURCE_CLOCK_SYSTEM = E_FMAN_RTC_SOURCE_CLOCK_SYSTEM,    /**< MAC system clock */
73909 +    e_FM_RTC_SOURCE_CLOCK_OSCILATOR = E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR  /**< RTC clock oscilator */
73910 +}e_FmSrcClk;
73911 +
73912 +/**************************************************************************//**
73913 + @Description   FM RTC configuration parameters structure.
73914 +
73915 +                This structure should be passed to FM_RTC_Config().
73916 +*//***************************************************************************/
73917 +typedef struct t_FmRtcParams
73918 +{
73919 +    t_Handle                 h_Fm;               /**< FM Handle*/
73920 +    uintptr_t                baseAddress;        /**< Base address of FM RTC registers */
73921 +    t_Handle                 h_App;              /**< A handle to an application layer object; This handle will
73922 +                                                      be passed by the driver upon calling the above callbacks */
73923 +} t_FmRtcParams;
73924 +
73925 +
73926 +/**************************************************************************//**
73927 + @Function      FM_RTC_Config
73928 +
73929 + @Description   Configures the FM RTC module according to user's parameters.
73930 +
73931 +                The driver assigns default values to some FM RTC parameters.
73932 +                These parameters can be overwritten using the advanced
73933 +                configuration routines.
73934 +
73935 + @Param[in]     p_FmRtcParam    - FM RTC configuration parameters.
73936 +
73937 + @Return        Handle to the new FM RTC object; NULL pointer on failure.
73938 +
73939 + @Cautions      None
73940 +*//***************************************************************************/
73941 +t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam);
73942 +
73943 +/**************************************************************************//**
73944 + @Function      FM_RTC_Init
73945 +
73946 + @Description   Initializes the FM RTC driver and hardware.
73947 +
73948 + @Param[in]     h_FmRtc - Handle to FM RTC object.
73949 +
73950 + @Return        E_OK on success; Error code otherwise.
73951 +
73952 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
73953 +*//***************************************************************************/
73954 +t_Error FM_RTC_Init(t_Handle h_FmRtc);
73955 +
73956 +/**************************************************************************//**
73957 + @Function      FM_RTC_Free
73958 +
73959 + @Description   Frees the FM RTC object and all allocated resources.
73960 +
73961 + @Param[in]     h_FmRtc - Handle to FM RTC object.
73962 +
73963 + @Return        E_OK on success; Error code otherwise.
73964 +
73965 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
73966 +*//***************************************************************************/
73967 +t_Error FM_RTC_Free(t_Handle h_FmRtc);
73968 +
73969 +
73970 +/**************************************************************************//**
73971 + @Group         fm_rtc_adv_config_grp  FM RTC Advanced Configuration Unit
73972 +
73973 + @Description   FM RTC advanced configuration functions.
73974 +
73975 + @{
73976 +*//***************************************************************************/
73977 +
73978 +/**************************************************************************//**
73979 + @Function      FM_RTC_ConfigPeriod
73980 +
73981 + @Description   Configures the period of the timestamp if different than
73982 +                default [DEFAULT_clockPeriod].
73983 +
73984 + @Param[in]     h_FmRtc         - Handle to FM RTC object.
73985 + @Param[in]     period          - Period in nano-seconds.
73986 +
73987 + @Return        E_OK on success; Error code otherwise.
73988 +
73989 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
73990 +*//***************************************************************************/
73991 +t_Error FM_RTC_ConfigPeriod(t_Handle h_FmRtc, uint32_t period);
73992 +
73993 +/**************************************************************************//**
73994 + @Function      FM_RTC_ConfigSourceClock
73995 +
73996 + @Description   Configures the source clock of the RTC.
73997 +
73998 + @Param[in]     h_FmRtc         - Handle to FM RTC object.
73999 + @Param[in]     srcClk          - Source clock selection.
74000 + @Param[in]     freqInMhz       - the source-clock frequency (in MHz).
74001 +
74002 + @Return        E_OK on success; Error code otherwise.
74003 +
74004 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74005 +*//***************************************************************************/
74006 +t_Error FM_RTC_ConfigSourceClock(t_Handle      h_FmRtc,
74007 +                                 e_FmSrcClk    srcClk,
74008 +                                 uint32_t      freqInMhz);
74009 +
74010 +/**************************************************************************//**
74011 + @Function      FM_RTC_ConfigPulseRealignment
74012 +
74013 + @Description   Configures the RTC to automatic FIPER pulse realignment in
74014 +                response to timer adjustments [DEFAULT_pulseRealign]
74015 +
74016 +                In this mode, the RTC clock is identical to the source clock.
74017 +                This feature can be useful when the system contains an external
74018 +                RTC with inherent frequency compensation.
74019 +
74020 + @Param[in]     h_FmRtc     - Handle to FM RTC object.
74021 + @Param[in]     enable      - TRUE to enable automatic realignment.
74022 +
74023 + @Return        E_OK on success; Error code otherwise.
74024 +
74025 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74026 +*//***************************************************************************/
74027 +t_Error FM_RTC_ConfigPulseRealignment(t_Handle h_FmRtc, bool enable);
74028 +
74029 +/**************************************************************************//**
74030 + @Function      FM_RTC_ConfigFrequencyBypass
74031 +
74032 + @Description   Configures the RTC to bypass the frequency compensation
74033 +                mechanism. [DEFAULT_bypass]
74034 +
74035 +                In this mode, the RTC clock is identical to the source clock.
74036 +                This feature can be useful when the system contains an external
74037 +                RTC with inherent frequency compensation.
74038 +
74039 + @Param[in]     h_FmRtc     - Handle to FM RTC object.
74040 + @Param[in]     enabled     - TRUE to bypass frequency compensation;
74041 +                              FALSE otherwise.
74042 +
74043 + @Return        E_OK on success; Error code otherwise.
74044 +
74045 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74046 +*//***************************************************************************/
74047 +t_Error FM_RTC_ConfigFrequencyBypass(t_Handle h_FmRtc, bool enabled);
74048 +
74049 +/**************************************************************************//**
74050 + @Function      FM_RTC_ConfigInvertedInputClockPhase
74051 +
74052 + @Description   Configures the RTC to invert the source clock phase on input.
74053 +                [DEFAULT_invertInputClkPhase]
74054 +
74055 + @Param[in]     h_FmRtc  - Handle to FM RTC object.
74056 + @Param[in]     inverted    - TRUE to invert the source clock phase on input.
74057 +                              FALSE otherwise.
74058 +
74059 + @Return        E_OK on success; Error code otherwise.
74060 +
74061 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74062 +*//***************************************************************************/
74063 +t_Error FM_RTC_ConfigInvertedInputClockPhase(t_Handle h_FmRtc, bool inverted);
74064 +
74065 +/**************************************************************************//**
74066 + @Function      FM_RTC_ConfigInvertedOutputClockPhase
74067 +
74068 + @Description   Configures the RTC to invert the output clock phase.
74069 +                [DEFAULT_invertOutputClkPhase]
74070 +
74071 + @Param[in]     h_FmRtc  - Handle to FM RTC object.
74072 + @Param[in]     inverted    - TRUE to invert the output clock phase.
74073 +                              FALSE otherwise.
74074 +
74075 + @Return        E_OK on success; Error code otherwise.
74076 +
74077 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74078 +*//***************************************************************************/
74079 +t_Error FM_RTC_ConfigInvertedOutputClockPhase(t_Handle h_FmRtc, bool inverted);
74080 +
74081 +/**************************************************************************//**
74082 + @Function      FM_RTC_ConfigOutputClockDivisor
74083 +
74084 + @Description   Configures the divisor for generating the output clock from
74085 +                the RTC clock. [DEFAULT_outputClockDivisor]
74086 +
74087 + @Param[in]     h_FmRtc  - Handle to FM RTC object.
74088 + @Param[in]     divisor     - Divisor for generation of the output clock.
74089 +
74090 + @Return        E_OK on success; Error code otherwise.
74091 +
74092 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74093 +*//***************************************************************************/
74094 +t_Error FM_RTC_ConfigOutputClockDivisor(t_Handle h_FmRtc, uint16_t divisor);
74095 +
74096 +/**************************************************************************//**
74097 + @Function      FM_RTC_ConfigAlarmPolarity
74098 +
74099 + @Description   Configures the polarity (active-high/active-low) of a specific
74100 +                alarm signal. [DEFAULT_alarmPolarity]
74101 +
74102 + @Param[in]     h_FmRtc      - Handle to FM RTC object.
74103 + @Param[in]     alarmId         - Alarm ID.
74104 + @Param[in]     alarmPolarity   - Alarm polarity.
74105 +
74106 + @Return        E_OK on success; Error code otherwise.
74107 +
74108 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74109 +*//***************************************************************************/
74110 +t_Error FM_RTC_ConfigAlarmPolarity(t_Handle             h_FmRtc,
74111 +                                   uint8_t              alarmId,
74112 +                                   e_FmRtcAlarmPolarity alarmPolarity);
74113 +
74114 +/**************************************************************************//**
74115 + @Function      FM_RTC_ConfigExternalTriggerPolarity
74116 +
74117 + @Description   Configures the polarity (rising/falling edge) of a specific
74118 +                external trigger signal. [DEFAULT_triggerPolarity]
74119 +
74120 + @Param[in]     h_FmRtc      - Handle to FM RTC object.
74121 + @Param[in]     triggerId       - Trigger ID.
74122 + @Param[in]     triggerPolarity - Trigger polarity.
74123 +
74124 + @Return        E_OK on success; Error code otherwise.
74125 +
74126 + @Cautions      h_FmRtc must have been previously created using FM_RTC_Config().
74127 +*//***************************************************************************/
74128 +t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle               h_FmRtc,
74129 +                                             uint8_t                triggerId,
74130 +                                             e_FmRtcTriggerPolarity triggerPolarity);
74131 +
74132 +/** @} */ /* end of fm_rtc_adv_config_grp */
74133 +/** @} */ /* end of fm_rtc_init_grp */
74134 +
74135 +
74136 +/**************************************************************************//**
74137 + @Group         fm_rtc_control_grp FM RTC Control Unit
74138 +
74139 + @Description   FM RTC runtime control API.
74140 +
74141 + @{
74142 +*//***************************************************************************/
74143 +
74144 +/**************************************************************************//**
74145 + @Function      t_FmRtcExceptionsCallback
74146 +
74147 + @Description   Exceptions user callback routine, used for RTC different mechanisms.
74148 +
74149 + @Param[in]     h_App       - User's application descriptor.
74150 + @Param[in]     id          - source id.
74151 +*//***************************************************************************/
74152 +typedef void (t_FmRtcExceptionsCallback) ( t_Handle  h_App, uint8_t id);
74153 +
74154 +/**************************************************************************//**
74155 + @Description   FM RTC alarm parameters.
74156 +*//***************************************************************************/
74157 +typedef struct t_FmRtcAlarmParams {
74158 +    uint8_t                     alarmId;            /**< 0 or 1 */
74159 +    uint64_t                    alarmTime;          /**< In nanoseconds, the time when the alarm
74160 +                                                         should go off - must be a multiple of
74161 +                                                         the RTC period */
74162 +    t_FmRtcExceptionsCallback   *f_AlarmCallback;   /**< This routine will be called when RTC
74163 +                                                         reaches alarmTime */
74164 +    bool                        clearOnExpiration;  /**< TRUE to turn off the alarm once expired. */
74165 +} t_FmRtcAlarmParams;
74166 +
74167 +/**************************************************************************//**
74168 + @Description   FM RTC Periodic Pulse parameters.
74169 +*//***************************************************************************/
74170 +typedef struct t_FmRtcPeriodicPulseParams {
74171 +    uint8_t                     periodicPulseId;            /**< 0 or 1 */
74172 +    uint64_t                    periodicPulsePeriod;        /**< In Nanoseconds. Must be
74173 +                                                                 a multiple of the RTC period */
74174 +    t_FmRtcExceptionsCallback   *f_PeriodicPulseCallback;   /**< This routine will be called every
74175 +                                                                 periodicPulsePeriod. */
74176 +} t_FmRtcPeriodicPulseParams;
74177 +
74178 +/**************************************************************************//**
74179 + @Description   FM RTC Periodic Pulse parameters.
74180 +*//***************************************************************************/
74181 +typedef struct t_FmRtcExternalTriggerParams {
74182 +    uint8_t                     externalTriggerId;              /**< 0 or 1 */
74183 +    bool                        usePulseAsInput;                /**< Use the pulse interrupt instead of
74184 +                                                                     an external signal */
74185 +    t_FmRtcExceptionsCallback   *f_ExternalTriggerCallback;     /**< This routine will be called every
74186 +                                                                     periodicPulsePeriod. */
74187 +} t_FmRtcExternalTriggerParams;
74188 +
74189 +
74190 +/**************************************************************************//**
74191 + @Function      FM_RTC_Enable
74192 +
74193 + @Description   Enable the RTC (time count is started).
74194 +
74195 +                The user can select to resume the time count from previous
74196 +                point, or to restart the time count.
74197 +
74198 + @Param[in]     h_FmRtc     - Handle to FM RTC object.
74199 + @Param[in]     resetClock  - Restart the time count from zero.
74200 +
74201 + @Return        E_OK on success; Error code otherwise.
74202 +
74203 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74204 +*//***************************************************************************/
74205 +t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock);
74206 +
74207 +/**************************************************************************//**
74208 + @Function      FM_RTC_Disable
74209 +
74210 + @Description   Disables the RTC (time count is stopped).
74211 +
74212 + @Param[in]     h_FmRtc - Handle to FM RTC object.
74213 +
74214 + @Return        E_OK on success; Error code otherwise.
74215 +
74216 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74217 +*//***************************************************************************/
74218 +t_Error FM_RTC_Disable(t_Handle h_FmRtc);
74219 +
74220 +/**************************************************************************//**
74221 + @Function      FM_RTC_SetClockOffset
74222 +
74223 + @Description   Sets the clock offset (usually relative to another clock).
74224 +
74225 +                The user can pass a negative offset value.
74226 +
74227 + @Param[in]     h_FmRtc  - Handle to FM RTC object.
74228 + @Param[in]     offset   - New clock offset (in nanoseconds).
74229 +
74230 + @Return        E_OK on success; Error code otherwise.
74231 +
74232 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74233 +*//***************************************************************************/
74234 +t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset);
74235 +
74236 +/**************************************************************************//**
74237 + @Function      FM_RTC_SetAlarm
74238 +
74239 + @Description   Schedules an alarm event to a given RTC time.
74240 +
74241 + @Param[in]     h_FmRtc             - Handle to FM RTC object.
74242 + @Param[in]     p_FmRtcAlarmParams  - Alarm parameters.
74243 +
74244 + @Return        E_OK on success; Error code otherwise.
74245 +
74246 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74247 +                Must be called only prior to FM_RTC_Enable().
74248 +*//***************************************************************************/
74249 +t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams);
74250 +
74251 +/**************************************************************************//**
74252 + @Function      FM_RTC_SetPeriodicPulse
74253 +
74254 + @Description   Sets a periodic pulse.
74255 +
74256 + @Param[in]     h_FmRtc                         - Handle to FM RTC object.
74257 + @Param[in]     p_FmRtcPeriodicPulseParams      - Periodic pulse parameters.
74258 +
74259 + @Return        E_OK on success; Error code otherwise.
74260 +
74261 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74262 +                Must be called only prior to FM_RTC_Enable().
74263 +*//***************************************************************************/
74264 +t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_FmRtcPeriodicPulseParams);
74265 +
74266 +/**************************************************************************//**
74267 + @Function      FM_RTC_ClearPeriodicPulse
74268 +
74269 + @Description   Clears a periodic pulse.
74270 +
74271 + @Param[in]     h_FmRtc                         - Handle to FM RTC object.
74272 + @Param[in]     periodicPulseId                 - Periodic pulse id.
74273 +
74274 + @Return        E_OK on success; Error code otherwise.
74275 +
74276 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74277 +*//***************************************************************************/
74278 +t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId);
74279 +
74280 +/**************************************************************************//**
74281 + @Function      FM_RTC_SetExternalTrigger
74282 +
74283 + @Description   Sets an external trigger indication and define a callback
74284 +                routine to be called on such event.
74285 +
74286 + @Param[in]     h_FmRtc                         - Handle to FM RTC object.
74287 + @Param[in]     p_FmRtcExternalTriggerParams    - External Trigger parameters.
74288 +
74289 + @Return        E_OK on success; Error code otherwise.
74290 +
74291 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74292 +*//***************************************************************************/
74293 +t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams *p_FmRtcExternalTriggerParams);
74294 +
74295 +/**************************************************************************//**
74296 + @Function      FM_RTC_ClearExternalTrigger
74297 +
74298 + @Description   Clears external trigger indication.
74299 +
74300 + @Param[in]     h_FmRtc                         - Handle to FM RTC object.
74301 + @Param[in]     id                              - External Trigger id.
74302 +
74303 + @Return        E_OK on success; Error code otherwise.
74304 +
74305 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74306 +*//***************************************************************************/
74307 +t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t id);
74308 +
74309 +/**************************************************************************//**
74310 + @Function      FM_RTC_GetExternalTriggerTimeStamp
74311 +
74312 + @Description   Reads the External Trigger TimeStamp.
74313 +
74314 + @Param[in]     h_FmRtc                 - Handle to FM RTC object.
74315 + @Param[in]     triggerId               - External Trigger id.
74316 + @Param[out]    p_TimeStamp             - External Trigger timestamp (in nanoseconds).
74317 +
74318 + @Return        E_OK on success; Error code otherwise.
74319 +
74320 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74321 +*//***************************************************************************/
74322 +t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle             h_FmRtc,
74323 +                                           uint8_t              triggerId,
74324 +                                           uint64_t             *p_TimeStamp);
74325 +
74326 +/**************************************************************************//**
74327 + @Function      FM_RTC_GetCurrentTime
74328 +
74329 + @Description   Returns the current RTC time.
74330 +
74331 + @Param[in]     h_FmRtc - Handle to FM RTC object.
74332 + @Param[out]    p_Ts - returned time stamp (in nanoseconds).
74333 +
74334 + @Return        E_OK on success; Error code otherwise.
74335 +
74336 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74337 +*//***************************************************************************/
74338 +t_Error FM_RTC_GetCurrentTime(t_Handle h_FmRtc, uint64_t *p_Ts);
74339 +
74340 +/**************************************************************************//**
74341 + @Function      FM_RTC_SetCurrentTime
74342 +
74343 + @Description   Sets the current RTC time.
74344 +
74345 + @Param[in]     h_FmRtc - Handle to FM RTC object.
74346 + @Param[in]     ts - The new time stamp (in nanoseconds).
74347 +
74348 + @Return        E_OK on success; Error code otherwise.
74349 +
74350 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74351 +*//***************************************************************************/
74352 +t_Error FM_RTC_SetCurrentTime(t_Handle h_FmRtc, uint64_t ts);
74353 +
74354 +/**************************************************************************//**
74355 + @Function      FM_RTC_GetFreqCompensation
74356 +
74357 + @Description   Retrieves the frequency compensation value
74358 +
74359 + @Param[in]     h_FmRtc         - Handle to FM RTC object.
74360 + @Param[out]    p_Compensation  - A pointer to the returned value of compensation.
74361 +
74362 + @Return        E_OK on success; Error code otherwise.
74363 +
74364 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74365 +*//***************************************************************************/
74366 +t_Error FM_RTC_GetFreqCompensation(t_Handle h_FmRtc, uint32_t *p_Compensation);
74367 +
74368 +/**************************************************************************//**
74369 + @Function      FM_RTC_SetFreqCompensation
74370 +
74371 + @Description   Sets a new frequency compensation value.
74372 +
74373 + @Param[in]     h_FmRtc             - Handle to FM RTC object.
74374 + @Param[in]     freqCompensation    - The new frequency compensation value to set.
74375 +
74376 + @Return        E_OK on success; Error code otherwise.
74377 +
74378 + @Cautions      h_FmRtc must have been previously initialized using FM_RTC_Init().
74379 +*//***************************************************************************/
74380 +t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation);
74381 +
74382 +#ifdef CONFIG_PTP_1588_CLOCK_DPAA
74383 +/**************************************************************************//**
74384 +*@Function      FM_RTC_EnableInterrupt
74385 +*
74386 +*@Description   Enable interrupt of FM RTC.
74387 +*
74388 +*@Param[in]     h_FmRtc             - Handle to FM RTC object.
74389 +*@Param[in]     events              - Interrupt events.
74390 +*
74391 +*@Return        E_OK on success; Error code otherwise.
74392 +*//***************************************************************************/
74393 +t_Error FM_RTC_EnableInterrupt(t_Handle h_FmRtc, uint32_t events);
74394 +
74395 +/**************************************************************************//**
74396 +*@Function      FM_RTC_DisableInterrupt
74397 +*
74398 +*@Description   Disable interrupt of FM RTC.
74399 +*
74400 +*@Param[in]     h_FmRtc             - Handle to FM RTC object.
74401 +*@Param[in]     events              - Interrupt events.
74402 +*
74403 +*@Return        E_OK on success; Error code otherwise.
74404 +*//***************************************************************************/
74405 +t_Error FM_RTC_DisableInterrupt(t_Handle h_FmRtc, uint32_t events);
74406 +#endif
74407 +
74408 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
74409 +/**************************************************************************//**
74410 + @Function      FM_RTC_DumpRegs
74411 +
74412 + @Description   Dumps all FM registers
74413 +
74414 + @Param[in]     h_FmRtc      A handle to an FM RTC Module.
74415 +
74416 + @Return        E_OK on success;
74417 +
74418 + @Cautions      Allowed only FM_Init().
74419 +*//***************************************************************************/
74420 +t_Error FM_RTC_DumpRegs(t_Handle h_FmRtc);
74421 +#endif /* (defined(DEBUG_ERRORS) && ... */
74422 +
74423 +/** @} */ /* end of fm_rtc_control_grp */
74424 +/** @} */ /* end of fm_rtc_grp */
74425 +/** @} */ /* end of FM_grp group */
74426 +
74427 +
74428 +#endif /* __FM_RTC_EXT_H__ */
74429 --- /dev/null
74430 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_vsp_ext.h
74431 @@ -0,0 +1,411 @@
74432 +/*
74433 + * Copyright 2008-2012 Freescale Semiconductor Inc.
74434 + *
74435 + * Redistribution and use in source and binary forms, with or without
74436 + * modification, are permitted provided that the following conditions are met:
74437 + *     * Redistributions of source code must retain the above copyright
74438 + *       notice, this list of conditions and the following disclaimer.
74439 + *     * Redistributions in binary form must reproduce the above copyright
74440 + *       notice, this list of conditions and the following disclaimer in the
74441 + *       documentation and/or other materials provided with the distribution.
74442 + *     * Neither the name of Freescale Semiconductor nor the
74443 + *       names of its contributors may be used to endorse or promote products
74444 + *       derived from this software without specific prior written permission.
74445 + *
74446 + *
74447 + * ALTERNATIVELY, this software may be distributed under the terms of the
74448 + * GNU General Public License ("GPL") as published by the Free Software
74449 + * Foundation, either version 2 of that License or (at your option) any
74450 + * later version.
74451 + *
74452 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
74453 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
74454 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
74455 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
74456 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
74457 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
74458 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
74459 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
74460 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
74461 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
74462 + */
74463 +
74464 +
74465 +/**************************************************************************//**
74466 + @File          fm_vsp_ext.h
74467 +
74468 + @Description   FM Virtual Storage-Profile ...
74469 +*//***************************************************************************/
74470 +#ifndef __FM_VSP_EXT_H
74471 +#define __FM_VSP_EXT_H
74472 +
74473 +#include "std_ext.h"
74474 +#include "error_ext.h"
74475 +#include "string_ext.h"
74476 +#include "debug_ext.h"
74477 +
74478 +#include "fm_ext.h"
74479 +
74480 +
74481 +/**************************************************************************//**
74482 +
74483 + @Group         FM_grp Frame Manager API
74484 +
74485 + @Description   FM API functions, definitions and enums
74486 +
74487 + @{
74488 +*//***************************************************************************/
74489 +
74490 +/**************************************************************************//**
74491 + @Group         FM_VSP_grp FM Virtual-Storage-Profile
74492 +
74493 + @Description   FM Virtual-Storage-Profile API
74494 +
74495 + @{
74496 +*//***************************************************************************/
74497 +
74498 +/**************************************************************************//**
74499 + @Group         FM_VSP_init_grp FM VSP Initialization Unit
74500 +
74501 + @Description   FM VSP initialization API.
74502 +
74503 + @{
74504 +*//***************************************************************************/
74505 +
74506 +/**************************************************************************//**
74507 + @Description   Virtual Storage Profile
74508 +*//***************************************************************************/
74509 +typedef struct t_FmVspParams {
74510 +    t_Handle            h_Fm;               /**< A handle to the FM object this VSP related to */
74511 +    t_FmExtPools        extBufPools;        /**< Which external buffer pools are used
74512 +                                                 (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes.
74513 +                                                 parameter associated with Rx / OP port */
74514 +    uint16_t            liodnOffset;        /**< VSP's LIODN offset */
74515 +    struct {
74516 +        e_FmPortType    portType;           /**< Port type */
74517 +        uint8_t         portId;             /**< Port Id - relative to type */
74518 +    } portParams;
74519 +    uint8_t             relativeProfileId;  /**< VSP Id - relative to VSP's range
74520 +                                                 defined in relevant FM object */
74521 +} t_FmVspParams;
74522 +
74523 +
74524 +/**************************************************************************//**
74525 + @Function      FM_VSP_Config
74526 +
74527 + @Description   Creates descriptor for the FM VSP module.
74528 +
74529 +                The routine returns a handle (descriptor) to the FM VSP object.
74530 +                This descriptor must be passed as first parameter to all other
74531 +                FM VSP function calls.
74532 +
74533 +                No actual initialization or configuration of FM hardware is
74534 +                done by this routine.
74535 +
74536 +@Param[in]      p_FmVspParams   Pointer to data structure of parameters
74537 +
74538 + @Retval        Handle to FM VSP object, or NULL for Failure.
74539 +*//***************************************************************************/
74540 +t_Handle FM_VSP_Config(t_FmVspParams *p_FmVspParams);
74541 +
74542 +/**************************************************************************//**
74543 + @Function      FM_VSP_Init
74544 +
74545 + @Description   Initializes the FM VSP module
74546 +
74547 + @Param[in]     h_FmVsp - FM VSP module descriptor
74548 +
74549 + @Return        E_OK on success; Error code otherwise.
74550 +*//***************************************************************************/
74551 +t_Error FM_VSP_Init(t_Handle h_FmVsp);
74552 +
74553 +/**************************************************************************//**
74554 + @Function      FM_VSP_Free
74555 +
74556 + @Description   Frees all resources that were assigned to FM VSP module.
74557 +
74558 +                Calling this routine invalidates the descriptor.
74559 +
74560 + @Param[in]     h_FmVsp - FM VSP module descriptor
74561 +
74562 + @Return        E_OK on success; Error code otherwise.
74563 +*//***************************************************************************/
74564 +t_Error FM_VSP_Free(t_Handle h_FmVsp);
74565 +
74566 +
74567 +/**************************************************************************//**
74568 + @Group         FM_VSP_adv_config_grp  FM VSP Advanced Configuration Unit
74569 +
74570 + @Description   FM VSP advanced configuration functions.
74571 +
74572 + @{
74573 +*//***************************************************************************/
74574 +
74575 +/**************************************************************************//**
74576 + @Function      FM_VSP_ConfigBufferPrefixContent
74577 +
74578 + @Description   Defines the structure, size and content of the application buffer.
74579 +
74580 +                The prefix will
74581 +                In VSPs defined for Tx ports, if 'passPrsResult', the application
74582 +                should set a value to their offsets in the prefix of
74583 +                the FM will save the first 'privDataSize', than,
74584 +                depending on 'passPrsResult' and 'passTimeStamp', copy parse result
74585 +                and timeStamp, and the packet itself (in this order), to the
74586 +                application buffer, and to offset.
74587 +
74588 +                Calling this routine changes the buffer margins definitions
74589 +                in the internal driver data base from its default
74590 +                configuration: Data size:  [DEFAULT_FM_SP_bufferPrefixContent_privDataSize]
74591 +                               Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult].
74592 +                               Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp].
74593 +
74594 + @Param[in]     h_FmVsp                         A handle to a FM VSP module.
74595 + @Param[in,out] p_FmBufferPrefixContent         A structure of parameters describing the
74596 +                                                structure of the buffer.
74597 +                                                Out parameter: Start margin - offset
74598 +                                                of data from start of external buffer.
74599 +
74600 + @Return        E_OK on success; Error code otherwise.
74601 +
74602 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74603 +*//***************************************************************************/
74604 +t_Error FM_VSP_ConfigBufferPrefixContent(t_Handle                   h_FmVsp,
74605 +                                         t_FmBufferPrefixContent    *p_FmBufferPrefixContent);
74606 +
74607 +/**************************************************************************//**
74608 + @Function      FM_VSP_ConfigDmaSwapData
74609 +
74610 + @Description   Calling this routine changes the DMA swap data parameter
74611 +                in the internal driver data base from its default
74612 +                configuration  [DEFAULT_FM_SP_dmaSwapData]
74613 +
74614 + @Param[in]     h_FmVsp     A handle to a FM VSP module.
74615 + @Param[in]     swapData    New selection
74616 +
74617 + @Return        E_OK on success; Error code otherwise.
74618 +
74619 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74620 +*//***************************************************************************/
74621 +t_Error FM_VSP_ConfigDmaSwapData(t_Handle h_FmVsp, e_FmDmaSwapOption swapData);
74622 +
74623 +/**************************************************************************//**
74624 + @Function      FM_VSP_ConfigDmaIcCacheAttr
74625 +
74626 + @Description   Calling this routine changes the internal context cache
74627 +                attribute parameter in the internal driver data base
74628 +                from its default configuration  [DEFAULT_FM_SP_dmaIntContextCacheAttr]
74629 +
74630 + @Param[in]     h_FmVsp                 A handle to a FM VSP module.
74631 + @Param[in]     intContextCacheAttr     New selection
74632 +
74633 + @Return        E_OK on success; Error code otherwise.
74634 +
74635 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74636 +*//***************************************************************************/
74637 +t_Error FM_VSP_ConfigDmaIcCacheAttr(t_Handle            h_FmVsp,
74638 +                                    e_FmDmaCacheOption  intContextCacheAttr);
74639 +
74640 +/**************************************************************************//**
74641 + @Function      FM_VSP_ConfigDmaHdrAttr
74642 +
74643 + @Description   Calling this routine changes the header cache
74644 +                attribute parameter in the internal driver data base
74645 +                from its default configuration  [DEFAULT_FM_SP_dmaHeaderCacheAttr]
74646 +
74647 + @Param[in]     h_FmVsp                     A handle to a FM VSP module.
74648 + @Param[in]     headerCacheAttr             New selection
74649 +
74650 + @Return        E_OK on success; Error code otherwise.
74651 +
74652 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74653 +*//***************************************************************************/
74654 +t_Error FM_VSP_ConfigDmaHdrAttr(t_Handle h_FmVsp, e_FmDmaCacheOption headerCacheAttr);
74655 +
74656 +/**************************************************************************//**
74657 + @Function      FM_VSP_ConfigDmaScatterGatherAttr
74658 +
74659 + @Description   Calling this routine changes the scatter gather cache
74660 +                attribute parameter in the internal driver data base
74661 +                from its default configuration [DEFAULT_FM_SP_dmaScatterGatherCacheAttr]
74662 +
74663 + @Param[in]     h_FmVsp                     A handle to a FM VSP module.
74664 + @Param[in]     scatterGatherCacheAttr      New selection
74665 +
74666 + @Return        E_OK on success; Error code otherwise.
74667 +
74668 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74669 +*//***************************************************************************/
74670 +t_Error FM_VSP_ConfigDmaScatterGatherAttr(t_Handle              h_FmVsp,
74671 +                                          e_FmDmaCacheOption    scatterGatherCacheAttr);
74672 +
74673 +/**************************************************************************//**
74674 + @Function      FM_VSP_ConfigDmaWriteOptimize
74675 +
74676 + @Description   Calling this routine changes the write optimization
74677 +                parameter in the internal driver data base
74678 +                from its default configuration: optimize = [DEFAULT_FM_SP_dmaWriteOptimize]
74679 +
74680 + @Param[in]     h_FmVsp     A handle to a FM VSP module.
74681 + @Param[in]     optimize    TRUE to enable optimization, FALSE for normal operation
74682 +
74683 + @Return        E_OK on success; Error code otherwise.
74684 +
74685 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74686 +*//***************************************************************************/
74687 +t_Error FM_VSP_ConfigDmaWriteOptimize(t_Handle h_FmVsp, bool optimize);
74688 +
74689 +/**************************************************************************//**
74690 + @Function      FM_VSP_ConfigNoScatherGather
74691 +
74692 + @Description   Calling this routine changes the possibility to receive S/G frame
74693 +                in the internal driver data base
74694 +                from its default configuration: optimize = [DEFAULT_FM_SP_noScatherGather]
74695 +
74696 + @Param[in]     h_FmVsp             A handle to a FM VSP module.
74697 + @Param[in]     noScatherGather     TRUE to operate without scatter/gather capability.
74698 +
74699 + @Return        E_OK on success; Error code otherwise.
74700 +
74701 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74702 +*//***************************************************************************/
74703 +t_Error FM_VSP_ConfigNoScatherGather(t_Handle h_FmVsp, bool noScatherGather);
74704 +
74705 +/**************************************************************************//**
74706 + @Function      FM_VSP_ConfigPoolDepletion
74707 +
74708 + @Description   Calling this routine enables pause frame generation depending on the
74709 +                depletion status of BM pools. It also defines the conditions to activate
74710 +                this functionality. By default, this functionality is disabled.
74711 +
74712 + @Param[in]     h_FmVsp                 A handle to a FM VSP module.
74713 + @Param[in]     p_BufPoolDepletion      A structure of pool depletion parameters
74714 +
74715 + @Return        E_OK on success; Error code otherwise.
74716 +
74717 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74718 +*//***************************************************************************/
74719 +t_Error FM_VSP_ConfigPoolDepletion(t_Handle h_FmVsp, t_FmBufPoolDepletion *p_BufPoolDepletion);
74720 +
74721 +/**************************************************************************//**
74722 + @Function      FM_VSP_ConfigBackupPools
74723 +
74724 + @Description   Calling this routine allows the configuration of some of the BM pools
74725 +                defined for this port as backup pools.
74726 +                A pool configured to be a backup pool will be used only if all other
74727 +                enabled non-backup pools are depleted.
74728 +
74729 + @Param[in]     h_FmVsp                 A handle to a FM VSP module.
74730 + @Param[in]     p_BackupBmPools         An array of pool id's. All pools specified here will
74731 +                                        be defined as backup pools.
74732 +
74733 + @Return        E_OK on success; Error code otherwise.
74734 +
74735 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
74736 +*//***************************************************************************/
74737 +t_Error FM_VSP_ConfigBackupPools(t_Handle h_FmVsp, t_FmBackupBmPools *p_BackupBmPools);
74738 +
74739 +/** @} */ /* end of FM_VSP_adv_config_grp group */
74740 +/** @} */ /* end of FM_VSP_init_grp group */
74741 +
74742 +
74743 +/**************************************************************************//**
74744 + @Group         FM_VSP_control_grp FM VSP Control Unit
74745 +
74746 + @Description   FM VSP runtime control API.
74747 +
74748 + @{
74749 +*//***************************************************************************/
74750 +
74751 +/**************************************************************************//**
74752 + @Function      FM_VSP_GetBufferDataOffset
74753 +
74754 + @Description   Relevant for Rx ports.
74755 +                Returns the data offset from the beginning of the data buffer
74756 +
74757 + @Param[in]     h_FmVsp - FM PORT module descriptor
74758 +
74759 + @Return        data offset.
74760 +
74761 + @Cautions      Allowed only following FM_VSP_Init().
74762 +*//***************************************************************************/
74763 +uint32_t FM_VSP_GetBufferDataOffset(t_Handle h_FmVsp);
74764 +
74765 +/**************************************************************************//**
74766 + @Function      FM_VSP_GetBufferICInfo
74767 +
74768 + @Description   Returns the Internal Context offset from the beginning of the data buffer
74769 +
74770 + @Param[in]     h_FmVsp - FM PORT module descriptor
74771 + @Param[in]     p_Data   - A pointer to the data buffer.
74772 +
74773 + @Return        Internal context info pointer on success, NULL if 'allOtherInfo' was not
74774 +                configured for this port.
74775 +
74776 + @Cautions      Allowed only following FM_VSP_Init().
74777 +*//***************************************************************************/
74778 +uint8_t * FM_VSP_GetBufferICInfo(t_Handle h_FmVsp, char *p_Data);
74779 +
74780 +/**************************************************************************//**
74781 + @Function      FM_VSP_GetBufferPrsResult
74782 +
74783 + @Description   Returns the pointer to the parse result in the data buffer.
74784 +                In Rx ports this is relevant after reception, if parse
74785 +                result is configured to be part of the data passed to the
74786 +                application. For non Rx ports it may be used to get the pointer
74787 +                of the area in the buffer where parse result should be
74788 +                initialized - if so configured.
74789 +                See FM_VSP_ConfigBufferPrefixContent for data buffer prefix
74790 +                configuration.
74791 +
74792 + @Param[in]     h_FmVsp    - FM PORT module descriptor
74793 + @Param[in]     p_Data      - A pointer to the data buffer.
74794 +
74795 + @Return        Parse result pointer on success, NULL if parse result was not
74796 +                configured for this port.
74797 +
74798 + @Cautions      Allowed only following FM_VSP_Init().
74799 +*//***************************************************************************/
74800 +t_FmPrsResult * FM_VSP_GetBufferPrsResult(t_Handle h_FmVsp, char *p_Data);
74801 +
74802 +/**************************************************************************//**
74803 + @Function      FM_VSP_GetBufferTimeStamp
74804 +
74805 + @Description   Returns the time stamp in the data buffer.
74806 +                Relevant for Rx ports for getting the buffer time stamp.
74807 +                See FM_VSP_ConfigBufferPrefixContent for data buffer prefix
74808 +                configuration.
74809 +
74810 + @Param[in]     h_FmVsp    - FM PORT module descriptor
74811 + @Param[in]     p_Data      - A pointer to the data buffer.
74812 +
74813 + @Return        A pointer to the hash result on success, NULL otherwise.
74814 +
74815 + @Cautions      Allowed only following FM_VSP_Init().
74816 +*//***************************************************************************/
74817 +uint64_t * FM_VSP_GetBufferTimeStamp(t_Handle h_FmVsp, char *p_Data);
74818 +
74819 +/**************************************************************************//**
74820 + @Function      FM_VSP_GetBufferHashResult
74821 +
74822 + @Description   Given a data buffer, on the condition that hash result was defined
74823 +                as a part of the buffer content (see FM_VSP_ConfigBufferPrefixContent)
74824 +                this routine will return the pointer to the hash result location in the
74825 +                buffer prefix.
74826 +
74827 + @Param[in]     h_FmVsp    - FM PORT module descriptor
74828 + @Param[in]     p_Data      - A pointer to the data buffer.
74829 +
74830 + @Return        A pointer to the hash result on success, NULL otherwise.
74831 +
74832 + @Cautions      Allowed only following FM_VSP_Init().
74833 +*//***************************************************************************/
74834 +uint8_t * FM_VSP_GetBufferHashResult(t_Handle h_FmVsp, char *p_Data);
74835 +
74836 +
74837 +/** @} */ /* end of FM_VSP_control_grp group */
74838 +/** @} */ /* end of FM_VSP_grp group */
74839 +/** @} */ /* end of FM_grp group */
74840 +
74841 +
74842 +#endif /* __FM_VSP_EXT_H */
74843 --- /dev/null
74844 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/mii_acc_ext.h
74845 @@ -0,0 +1,76 @@
74846 +/*
74847 + * Copyright 2008-2012 Freescale Semiconductor Inc.
74848 + *
74849 + * Redistribution and use in source and binary forms, with or without
74850 + * modification, are permitted provided that the following conditions are met:
74851 + *     * Redistributions of source code must retain the above copyright
74852 + *       notice, this list of conditions and the following disclaimer.
74853 + *     * Redistributions in binary form must reproduce the above copyright
74854 + *       notice, this list of conditions and the following disclaimer in the
74855 + *       documentation and/or other materials provided with the distribution.
74856 + *     * Neither the name of Freescale Semiconductor nor the
74857 + *       names of its contributors may be used to endorse or promote products
74858 + *       derived from this software without specific prior written permission.
74859 + *
74860 + *
74861 + * ALTERNATIVELY, this software may be distributed under the terms of the
74862 + * GNU General Public License ("GPL") as published by the Free Software
74863 + * Foundation, either version 2 of that License or (at your option) any
74864 + * later version.
74865 + *
74866 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
74867 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
74868 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
74869 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
74870 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
74871 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
74872 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
74873 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
74874 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
74875 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
74876 + */
74877 +
74878 +
74879 +
74880 +#ifndef __MII_ACC_EXT_H
74881 +#define __MII_ACC_EXT_H
74882 +
74883 +
74884 +/**************************************************************************//**
74885 + @Function      MII_ReadPhyReg
74886 +
74887 + @Description   This routine is called to read a specified PHY
74888 +                register value.
74889 +
74890 + @Param[in]     h_MiiAccess - Handle to MII configuration access registers
74891 + @Param[in]     phyAddr     - PHY address (0-31).
74892 + @Param[in]     reg         - PHY register to read
74893 + @Param[out]    p_Data      - Gets the register value.
74894 +
74895 + @Return        Always zero (success).
74896 +*//***************************************************************************/
74897 +int MII_ReadPhyReg(t_Handle h_MiiAccess,
74898 +                   uint8_t  phyAddr,
74899 +                   uint8_t  reg,
74900 +                   uint16_t *p_Data);
74901 +
74902 +/**************************************************************************//**
74903 + @Function      MII_WritePhyReg
74904 +
74905 + @Description   This routine is called to write data to a specified PHY
74906 +                   register.
74907 +
74908 + @Param[in]     h_MiiAccess - Handle to MII configuration access registers
74909 + @Param[in]     phyAddr     - PHY address (0-31).
74910 + @Param[in]     reg         - PHY register to write
74911 + @Param[in]     data        - Data to write in register.
74912 +
74913 + @Return        Always zero (success).
74914 +*//***************************************************************************/
74915 +int MII_WritePhyReg(t_Handle    h_MiiAccess,
74916 +                    uint8_t     phyAddr,
74917 +                    uint8_t     reg,
74918 +                    uint16_t    data);
74919 +
74920 +
74921 +#endif /* __MII_ACC_EXT_H */
74922 --- /dev/null
74923 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/core_ext.h
74924 @@ -0,0 +1,90 @@
74925 +/*
74926 + * Copyright 2008-2012 Freescale Semiconductor Inc.
74927 + *
74928 + * Redistribution and use in source and binary forms, with or without
74929 + * modification, are permitted provided that the following conditions are met:
74930 + *     * Redistributions of source code must retain the above copyright
74931 + *       notice, this list of conditions and the following disclaimer.
74932 + *     * Redistributions in binary form must reproduce the above copyright
74933 + *       notice, this list of conditions and the following disclaimer in the
74934 + *       documentation and/or other materials provided with the distribution.
74935 + *     * Neither the name of Freescale Semiconductor nor the
74936 + *       names of its contributors may be used to endorse or promote products
74937 + *       derived from this software without specific prior written permission.
74938 + *
74939 + *
74940 + * ALTERNATIVELY, this software may be distributed under the terms of the
74941 + * GNU General Public License ("GPL") as published by the Free Software
74942 + * Foundation, either version 2 of that License or (at your option) any
74943 + * later version.
74944 + *
74945 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
74946 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
74947 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
74948 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
74949 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
74950 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
74951 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
74952 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
74953 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
74954 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
74955 + */
74956 +
74957 +
74958 +/**************************************************************************//**
74959 + @File          core_ext.h
74960 +
74961 + @Description   Generic interface to basic core operations.
74962 +
74963 +                The system integrator must ensure that this interface is
74964 +                mapped to a specific core implementation, by including the
74965 +                appropriate header file.
74966 +*//***************************************************************************/
74967 +#ifndef __CORE_EXT_H
74968 +#define __CORE_EXT_H
74969 +
74970 +#ifdef CONFIG_FMAN_ARM
74971 +#include "arm_ext.h"
74972 +#include <linux/smp.h>
74973 +#else
74974 +#ifdef NCSW_PPC_CORE
74975 +#include "ppc_ext.h"
74976 +#elif defined(NCSW_VXWORKS)
74977 +#include "core_vxw_ext.h"
74978 +#else
74979 +#error "Core is not defined!"
74980 +#endif /* NCSW_CORE */
74981 +
74982 +#if (!defined(CORE_IS_LITTLE_ENDIAN) && !defined(CORE_IS_BIG_ENDIAN))
74983 +#error "Must define core as little-endian or big-endian!"
74984 +#endif /* (!defined(CORE_IS_LITTLE_ENDIAN) && ... */
74985 +
74986 +#ifndef CORE_CACHELINE_SIZE
74987 +#error "Must define the core cache-line size!"
74988 +#endif /* !CORE_CACHELINE_SIZE */
74989 +
74990 +#endif /* CONFIG_FMAN_ARM */
74991 +
74992 +
74993 +/**************************************************************************//**
74994 + @Function      CORE_GetId
74995 +
74996 + @Description   Returns the core ID in the system.
74997 +
74998 + @Return        Core ID.
74999 +*//***************************************************************************/
75000 +uint32_t CORE_GetId(void);
75001 +
75002 +/**************************************************************************//**
75003 + @Function      CORE_MemoryBarrier
75004 +
75005 + @Description   This routine will cause the core to stop executing any commands
75006 +                until all previous memory read/write commands are completely out
75007 +                of the core's pipeline.
75008 +
75009 + @Return        None.
75010 +*//***************************************************************************/
75011 +void CORE_MemoryBarrier(void);
75012 +#define fsl_mem_core_barrier() CORE_MemoryBarrier()
75013 +
75014 +#endif /* __CORE_EXT_H */
75015 --- /dev/null
75016 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/cores/arm_ext.h
75017 @@ -0,0 +1,55 @@
75018 +/*
75019 + * Copyright 2008-2012 Freescale Semiconductor Inc.
75020 + *
75021 + * Redistribution and use in source and binary forms, with or without
75022 + * modification, are permitted provided that the following conditions are met:
75023 + *     * Redistributions of source code must retain the above copyright
75024 + *       notice, this list of conditions and the following disclaimer.
75025 + *     * Redistributions in binary form must reproduce the above copyright
75026 + *       notice, this list of conditions and the following disclaimer in the
75027 + *       documentation and/or other materials provided with the distribution.
75028 + *     * Neither the name of Freescale Semiconductor nor the
75029 + *       names of its contributors may be used to endorse or promote products
75030 + *       derived from this software without specific prior written permission.
75031 + *
75032 + *
75033 + * ALTERNATIVELY, this software may be distributed under the terms of the
75034 + * GNU General Public License ("GPL") as published by the Free Software
75035 + * Foundation, either version 2 of that License or (at your option) any
75036 + * later version.
75037 + *
75038 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
75039 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
75040 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
75041 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
75042 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
75043 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
75044 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
75045 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
75046 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
75047 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
75048 + */
75049 +
75050 +
75051 +/**************************************************************************//**
75052 + @File          arm_ext.h
75053 +
75054 + @Description   Core API for ARM cores
75055 +
75056 +                These routines must be implemented by each specific PowerPC
75057 +                core driver.
75058 +*//***************************************************************************/
75059 +#ifndef __ARM_EXT_H
75060 +#define __ARM_EXT_H
75061 +
75062 +#include "part_ext.h"
75063 +
75064 +
75065 +#define CORE_IS_LITTLE_ENDIAN
75066 +
75067 +static __inline__ void CORE_MemoryBarrier(void)
75068 +{
75069 +       mb();
75070 +}
75071 +
75072 +#endif /* __PPC_EXT_H */
75073 --- /dev/null
75074 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/cores/e500v2_ext.h
75075 @@ -0,0 +1,476 @@
75076 +/*
75077 + * Copyright 2008-2012 Freescale Semiconductor Inc.
75078 + *
75079 + * Redistribution and use in source and binary forms, with or without
75080 + * modification, are permitted provided that the following conditions are met:
75081 + *     * Redistributions of source code must retain the above copyright
75082 + *       notice, this list of conditions and the following disclaimer.
75083 + *     * Redistributions in binary form must reproduce the above copyright
75084 + *       notice, this list of conditions and the following disclaimer in the
75085 + *       documentation and/or other materials provided with the distribution.
75086 + *     * Neither the name of Freescale Semiconductor nor the
75087 + *       names of its contributors may be used to endorse or promote products
75088 + *       derived from this software without specific prior written permission.
75089 + *
75090 + *
75091 + * ALTERNATIVELY, this software may be distributed under the terms of the
75092 + * GNU General Public License ("GPL") as published by the Free Software
75093 + * Foundation, either version 2 of that License or (at your option) any
75094 + * later version.
75095 + *
75096 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
75097 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
75098 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
75099 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
75100 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
75101 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
75102 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
75103 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
75104 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
75105 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
75106 + */
75107 +
75108 +
75109 +/**************************************************************************//**
75110 + @File          e500v2_ext.h
75111 +
75112 + @Description   E500 external definitions prototypes
75113 +                This file is not included by the E500
75114 +                source file as it is an assembly file. It is used
75115 +                only for prototypes exposure, for inclusion
75116 +                by user and other modules.
75117 +*//***************************************************************************/
75118 +
75119 +#ifndef __E500V2_EXT_H
75120 +#define __E500V2_EXT_H
75121 +
75122 +#include "std_ext.h"
75123 +
75124 +
75125 +/* Layer 1 Cache Manipulations
75126 + *==============================
75127 + * Should not be called directly by the user.
75128 + */
75129 +void        L1DCache_Invalidate (void);
75130 +void        L1ICache_Invalidate(void);
75131 +void        L1DCache_Enable(void);
75132 +void        L1ICache_Enable(void);
75133 +void        L1DCache_Disable(void);
75134 +void        L1ICache_Disable(void);
75135 +void        L1DCache_Flush(void);
75136 +void        L1ICache_Flush(void);
75137 +uint32_t    L1ICache_IsEnabled(void);
75138 +uint32_t    L1DCache_IsEnabled(void);
75139 +/*
75140 + *
75141 + */
75142 +uint32_t    L1DCache_LineLock(uint32_t addr);
75143 +uint32_t    L1ICache_LineLock(uint32_t addr);
75144 +void        L1Cache_BroadCastEnable(void);
75145 +void        L1Cache_BroadCastDisable(void);
75146 +
75147 +
75148 +#define CORE_DCacheEnable       E500_DCacheEnable
75149 +#define CORE_ICacheEnable       E500_ICacheEnable
75150 +#define CORE_DCacheDisable      E500_DCacheDisable
75151 +#define CORE_ICacheDisable      E500_ICacheDisable
75152 +#define CORE_GetId              E500_GetId
75153 +#define CORE_TestAndSet         E500_TestAndSet
75154 +#define CORE_MemoryBarrier      E500_MemoryBarrier
75155 +#define CORE_InstructionSync    E500_InstructionSync
75156 +
75157 +#define CORE_SetDozeMode        E500_SetDozeMode
75158 +#define CORE_SetNapMode         E500_SetNapMode
75159 +#define CORE_SetSleepMode       E500_SetSleepMode
75160 +#define CORE_SetJogMode         E500_SetJogMode
75161 +#define CORE_SetDeepSleepMode   E500_SetDeepSleepMode
75162 +
75163 +#define CORE_RecoverDozeMode    E500_RecoverDozeMode
75164 +#define CORE_RecoverNapMode     E500_RecoverNapMode
75165 +#define CORE_RecoverSleepMode   E500_RecoverSleepMode
75166 +#define CORE_RecoverJogMode     E500_RecoverJogMode
75167 +
75168 +void E500_SetDozeMode(void);
75169 +void E500_SetNapMode(void);
75170 +void E500_SetSleepMode(void);
75171 +void E500_SetJogMode(void);
75172 +t_Error E500_SetDeepSleepMode(uint32_t bptrAddress);
75173 +
75174 +void E500_RecoverDozeMode(void);
75175 +void E500_RecoverNapMode(void);
75176 +void E500_RecoverSleepMode(void);
75177 +void E500_RecoverJogMode(void);
75178 +
75179 +
75180 +/**************************************************************************//**
75181 + @Group         E500_id E500 Application Programming Interface
75182 +
75183 + @Description   E500 API functions, definitions and enums
75184 +
75185 + @{
75186 +*//***************************************************************************/
75187 +
75188 +/**************************************************************************//**
75189 + @Group         E500_init_grp E500 Initialization Unit
75190 +
75191 + @Description   E500 initialization unit API functions, definitions and enums
75192 +
75193 + @{
75194 +*//***************************************************************************/
75195 +
75196 +
75197 +/**************************************************************************//**
75198 + @Function      E500_DCacheEnable
75199 +
75200 + @Description   Enables the data cache for memory pages that are
75201 +                not cache inhibited.
75202 +
75203 + @Return        None.
75204 +*//***************************************************************************/
75205 +void E500_DCacheEnable(void);
75206 +
75207 +/**************************************************************************//**
75208 + @Function      E500_ICacheEnable
75209 +
75210 + @Description   Enables the instruction cache for memory pages that are
75211 +                not cache inhibited.
75212 +
75213 + @Return        None.
75214 +*//***************************************************************************/
75215 +void E500_ICacheEnable(void);
75216 +
75217 +/**************************************************************************//**
75218 + @Function      E500_DCacheDisable
75219 +
75220 + @Description   Disables the data cache.
75221 +
75222 + @Return        None.
75223 +*//***************************************************************************/
75224 +void E500_DCacheDisable(void);
75225 +
75226 +/**************************************************************************//**
75227 + @Function      E500_ICacheDisable
75228 +
75229 + @Description   Disables the instruction cache.
75230 +
75231 + @Return        None.
75232 +*//***************************************************************************/
75233 +void E500_ICacheDisable(void);
75234 +
75235 +/**************************************************************************//**
75236 + @Function      E500_DCacheFlush
75237 +
75238 + @Description   Flushes the data cache
75239 +
75240 + @Return        None.
75241 +*//***************************************************************************/
75242 +void E500_DCacheFlush(void);
75243 +
75244 +/**************************************************************************//**
75245 + @Function      E500_ICacheFlush
75246 +
75247 + @Description   Flushes the instruction cache.
75248 +
75249 + @Return        None.
75250 +*//***************************************************************************/
75251 +void E500_ICacheFlush(void);
75252 +
75253 +/**************************************************************************//**
75254 + @Function      E500_DCacheSetStashId
75255 +
75256 + @Description   Set Stash Id for data cache
75257 +
75258 + @Param[in]     stashId     the stash id to be set.
75259 +
75260 + @Return        None.
75261 +*//***************************************************************************/
75262 +void E500_DCacheSetStashId(uint8_t stashId);
75263 +
75264 +/**************************************************************************//**
75265 + @Description   E500mc L2 Cache Operation Mode
75266 +*//***************************************************************************/
75267 +typedef enum e_E500mcL2CacheMode
75268 +{
75269 +    e_L2_CACHE_MODE_DATA_ONLY      = 0x00000001,   /**< Cache data only */
75270 +    e_L2_CACHE_MODE_INST_ONLY      = 0x00000002,   /**< Cache instructions only */
75271 +    e_L2_CACHE_MODE_DATA_AND_INST  = 0x00000003    /**< Cache data and instructions */
75272 +} e_E500mcL2CacheMode;
75273 +
75274 +#if defined(CORE_E500MC) || defined(CORE_E5500)
75275 +/**************************************************************************//**
75276 + @Function      E500_L2CacheEnable
75277 +
75278 + @Description   Enables the cache for memory pages that are not cache inhibited.
75279 +
75280 + @param[in]     mode - L2 cache mode: data only, instruction only or instruction and data.
75281 +
75282 + @Return        None.
75283 +
75284 + @Cautions      This routine must be call only ONCE for both caches. I.e. it is
75285 +                not possible to call this routine for i-cache and than to call
75286 +                again for d-cache; The second call will override the first one.
75287 +*//***************************************************************************/
75288 +void E500_L2CacheEnable(e_E500mcL2CacheMode mode);
75289 +
75290 +/**************************************************************************//**
75291 + @Function      E500_L2CacheDisable
75292 +
75293 + @Description   Disables the cache (data instruction or both).
75294 +
75295 + @Return        None.
75296 +
75297 +*//***************************************************************************/
75298 +void E500_L2CacheDisable(void);
75299 +
75300 +/**************************************************************************//**
75301 + @Function      E500_L2CacheFlush
75302 +
75303 + @Description   Flushes the cache.
75304 +
75305 + @Return        None.
75306 +*//***************************************************************************/
75307 +void E500_L2CacheFlush(void);
75308 +
75309 +/**************************************************************************//**
75310 + @Function      E500_L2SetStashId
75311 +
75312 + @Description   Set Stash Id
75313 +
75314 + @Param[in]     stashId     the stash id to be set.
75315 +
75316 + @Return        None.
75317 +*//***************************************************************************/
75318 +void E500_L2SetStashId(uint8_t stashId);
75319 +#endif /* defined(CORE_E500MC) || defined(CORE_E5500) */
75320 +
75321 +#ifdef CORE_E6500
75322 +/**************************************************************************//**
75323 + @Function      E6500_L2CacheEnable
75324 +
75325 + @Description   Enables the cache for memory pages that are not cache inhibited.
75326 +
75327 + @param[in]     mode - L2 cache mode: support data & instruction only.
75328 +
75329 + @Return        None.
75330 +
75331 + @Cautions      This routine must be call only ONCE for both caches. I.e. it is
75332 +                not possible to call this routine for i-cache and than to call
75333 +                again for d-cache; The second call will override the first one.
75334 +*//***************************************************************************/
75335 +void E6500_L2CacheEnable(uintptr_t clusterBase);
75336 +
75337 +/**************************************************************************//**
75338 + @Function      E6500_L2CacheDisable
75339 +
75340 + @Description   Disables the cache (data instruction or both).
75341 +
75342 + @Return        None.
75343 +
75344 +*//***************************************************************************/
75345 +void E6500_L2CacheDisable(uintptr_t clusterBase);
75346 +
75347 +/**************************************************************************//**
75348 + @Function      E6500_L2CacheFlush
75349 +
75350 + @Description   Flushes the cache.
75351 +
75352 + @Return        None.
75353 +*//***************************************************************************/
75354 +void E6500_L2CacheFlush(uintptr_t clusterBase);
75355 +
75356 +/**************************************************************************//**
75357 + @Function      E6500_L2SetStashId
75358 +
75359 + @Description   Set Stash Id
75360 +
75361 + @Param[in]     stashId     the stash id to be set.
75362 +
75363 + @Return        None.
75364 +*//***************************************************************************/
75365 +void E6500_L2SetStashId(uintptr_t clusterBase, uint8_t stashId);
75366 +
75367 +/**************************************************************************//**
75368 + @Function      E6500_GetCcsrBase
75369 +
75370 + @Description   Obtain SoC CCSR base address
75371 +
75372 + @Param[in]     None.
75373 +
75374 + @Return        Physical CCSR base address.
75375 +*//***************************************************************************/
75376 +physAddress_t E6500_GetCcsrBase(void);
75377 +#endif /* CORE_E6500 */
75378 +
75379 +/**************************************************************************//**
75380 + @Function      E500_AddressBusStreamingEnable
75381 +
75382 + @Description   Enables address bus streaming on the CCB.
75383 +
75384 +                This setting, along with the ECM streaming configuration
75385 +                parameters, enables address bus streaming on the CCB.
75386 +
75387 + @Return        None.
75388 +*//***************************************************************************/
75389 +void E500_AddressBusStreamingEnable(void);
75390 +
75391 +/**************************************************************************//**
75392 + @Function      E500_AddressBusStreamingDisable
75393 +
75394 + @Description   Disables address bus streaming on the CCB.
75395 +
75396 + @Return        None.
75397 +*//***************************************************************************/
75398 +void E500_AddressBusStreamingDisable(void);
75399 +
75400 +/**************************************************************************//**
75401 + @Function      E500_AddressBroadcastEnable
75402 +
75403 + @Description   Enables address broadcast.
75404 +
75405 +                The e500 broadcasts cache management instructions (dcbst, dcblc
75406 +                (CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi)
75407 +                based on ABE. ABE must be set to allow management of external
75408 +                L2 caches.
75409 +
75410 + @Return        None.
75411 +*//***************************************************************************/
75412 +void E500_AddressBroadcastEnable(void);
75413 +
75414 +/**************************************************************************//**
75415 + @Function      E500_AddressBroadcastDisable
75416 +
75417 + @Description   Disables address broadcast.
75418 +
75419 +                The e500 broadcasts cache management instructions (dcbst, dcblc
75420 +                (CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi)
75421 +                based on ABE. ABE must be set to allow management of external
75422 +                L2 caches.
75423 +
75424 + @Return        None.
75425 +*//***************************************************************************/
75426 +void E500_AddressBroadcastDisable(void);
75427 +
75428 +/**************************************************************************//**
75429 + @Function      E500_IsTaskletSupported
75430 +
75431 + @Description   Checks if tasklets are supported by the e500 interrupt handler.
75432 +
75433 + @Retval        TRUE    - Tasklets are supported.
75434 + @Retval        FALSE   - Tasklets are not supported.
75435 +*//***************************************************************************/
75436 +bool E500_IsTaskletSupported(void);
75437 +
75438 +void E500_EnableTimeBase(void);
75439 +void E500_DisableTimeBase(void);
75440 +
75441 +uint64_t E500_GetTimeBaseTime(void);
75442 +
75443 +void E500_GenericIntrInit(void);
75444 +
75445 +t_Error E500_SetIntr(int        ppcIntrSrc,
75446 +                     void       (* Isr)(t_Handle handle),
75447 +                     t_Handle   handle);
75448 +
75449 +t_Error E500_ClearIntr(int ppcIntrSrc);
75450 +
75451 +/**************************************************************************//**
75452 + @Function      E500_GenericIntrHandler
75453 +
75454 + @Description   This is the general e500 interrupt handler.
75455 +
75456 +                It is called by the main assembly interrupt handler
75457 +                when an exception occurs and no other function has been
75458 +                assigned to this exception.
75459 +
75460 + @Param         intrEntry   - (In) The exception interrupt vector entry.
75461 +*//***************************************************************************/
75462 +void E500_GenericIntrHandler(uint32_t intrEntry);
75463 +
75464 +/**************************************************************************//**
75465 + @Function      CriticalIntr
75466 +
75467 + @Description   This is the specific critical e500 interrupt handler.
75468 +
75469 +                It is called by the main assembly interrupt handler
75470 +                when an critical interrupt.
75471 +
75472 + @Param         intrEntry   - (In) The exception interrupt vector entry.
75473 +*//***************************************************************************/
75474 +void CriticalIntr(uint32_t intrEntry);
75475 +
75476 +
75477 +/**************************************************************************//**
75478 + @Function      E500_GetId
75479 +
75480 + @Description   Returns the core ID in the system.
75481 +
75482 + @Return        Core ID.
75483 +*//***************************************************************************/
75484 +uint32_t E500_GetId(void);
75485 +
75486 +/**************************************************************************//**
75487 + @Function      E500_TestAndSet
75488 +
75489 + @Description   This routine tries to atomically test-and-set an integer
75490 +                in memory to a non-zero value.
75491 +
75492 +                The memory will be set only if it is tested as zero, in which
75493 +                case the routine returns the new non-zero value; otherwise the
75494 +                routine returns zero.
75495 +
75496 + @Param[in]     p - pointer to a volatile int in memory, on which test-and-set
75497 +                    operation should be made.
75498 +
75499 + @Retval        Zero        - Operation failed - memory was already set.
75500 + @Retval        Non-zero    - Operation succeeded - memory has been set.
75501 +*//***************************************************************************/
75502 +int E500_TestAndSet(volatile int *p);
75503 +
75504 +/**************************************************************************//**
75505 + @Function      E500_MemoryBarrier
75506 +
75507 + @Description   This routine will cause the core to stop executing any commands
75508 +                until all previous memory read/write commands are completely out
75509 +                of the core's pipeline.
75510 +
75511 + @Return        None.
75512 +*//***************************************************************************/
75513 +static __inline__ void E500_MemoryBarrier(void)
75514 +{
75515 +#ifndef CORE_E500V2
75516 +    __asm__ ("mbar 1");
75517 +#else  /* CORE_E500V2 */
75518 +    /**** ERRATA WORK AROUND START ****/
75519 +    /* ERRATA num:  CPU1 */
75520 +    /* Description: "mbar MO = 1" instruction fails to order caching-inhibited
75521 +                    guarded loads and stores. */
75522 +
75523 +    /* "msync" instruction is used instead */
75524 +
75525 +    __asm__ ("msync");
75526 +
75527 +    /**** ERRATA WORK AROUND END ****/
75528 +#endif /* CORE_E500V2 */
75529 +}
75530 +
75531 +/**************************************************************************//**
75532 + @Function      E500_InstructionSync
75533 +
75534 + @Description   This routine will cause the core to wait for previous instructions
75535 +                (including any interrupts they generate) to complete before the
75536 +                synchronization command executes, which purges all instructions
75537 +                from the processor's pipeline and refetches the next instruction.
75538 +
75539 + @Return        None.
75540 +*//***************************************************************************/
75541 +static __inline__ void E500_InstructionSync(void)
75542 +{
75543 +    __asm__ ("isync");
75544 +}
75545 +
75546 +
75547 +/** @} */ /* end of E500_init_grp group */
75548 +/** @} */ /* end of E500_grp group */
75549 +
75550 +
75551 +#endif /* __E500V2_EXT_H */
75552 --- /dev/null
75553 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/cores/ppc_ext.h
75554 @@ -0,0 +1,141 @@
75555 +/*
75556 + * Copyright 2008-2012 Freescale Semiconductor Inc.
75557 + *
75558 + * Redistribution and use in source and binary forms, with or without
75559 + * modification, are permitted provided that the following conditions are met:
75560 + *     * Redistributions of source code must retain the above copyright
75561 + *       notice, this list of conditions and the following disclaimer.
75562 + *     * Redistributions in binary form must reproduce the above copyright
75563 + *       notice, this list of conditions and the following disclaimer in the
75564 + *       documentation and/or other materials provided with the distribution.
75565 + *     * Neither the name of Freescale Semiconductor nor the
75566 + *       names of its contributors may be used to endorse or promote products
75567 + *       derived from this software without specific prior written permission.
75568 + *
75569 + *
75570 + * ALTERNATIVELY, this software may be distributed under the terms of the
75571 + * GNU General Public License ("GPL") as published by the Free Software
75572 + * Foundation, either version 2 of that License or (at your option) any
75573 + * later version.
75574 + *
75575 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
75576 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
75577 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
75578 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
75579 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
75580 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
75581 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
75582 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
75583 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
75584 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
75585 + */
75586 +
75587 +
75588 +/**************************************************************************//**
75589 + @File          ppc_ext.h
75590 +
75591 + @Description   Core API for PowerPC cores
75592 +
75593 +                These routines must be implemented by each specific PowerPC
75594 +                core driver.
75595 +*//***************************************************************************/
75596 +#ifndef __PPC_EXT_H
75597 +#define __PPC_EXT_H
75598 +
75599 +#include "part_ext.h"
75600 +
75601 +
75602 +#define CORE_IS_BIG_ENDIAN
75603 +
75604 +#if defined(CORE_E300) || defined(CORE_E500V2)
75605 +#define CORE_CACHELINE_SIZE     32
75606 +#elif defined(CORE_E500MC) || defined(CORE_E5500) || defined(CORE_E6500)
75607 +#define CORE_CACHELINE_SIZE     64
75608 +#else
75609 +#error "Core not defined!"
75610 +#endif /* defined(CORE_E300) || ... */
75611 +
75612 +
75613 +/**************************************************************************//**
75614 + @Function      CORE_TestAndSet
75615 +
75616 + @Description   This routine tries to atomically test-and-set an integer
75617 +                in memory to a non-zero value.
75618 +
75619 +                The memory will be set only if it is tested as zero, in which
75620 +                case the routine returns the new non-zero value; otherwise the
75621 +                routine returns zero.
75622 +
75623 + @Param[in]     p - pointer to a volatile int in memory, on which test-and-set
75624 +                    operation should be made.
75625 +
75626 + @Retval        Zero        - Operation failed - memory was already set.
75627 + @Retval        Non-zero    - Operation succeeded - memory has been set.
75628 +*//***************************************************************************/
75629 +int CORE_TestAndSet(volatile int *p);
75630 +
75631 +/**************************************************************************//**
75632 + @Function      CORE_InstructionSync
75633 +
75634 + @Description   This routine will cause the core to wait for previous instructions
75635 +                (including any interrupts they generate) to complete before the
75636 +                synchronization command executes, which purges all instructions
75637 +                from the processor's pipeline and refetches the next instruction.
75638 +
75639 + @Return        None.
75640 +*//***************************************************************************/
75641 +void CORE_InstructionSync(void);
75642 +
75643 +/**************************************************************************//**
75644 + @Function      CORE_DCacheEnable
75645 +
75646 + @Description   Enables the data cache for memory pages that are
75647 +                not cache inhibited.
75648 +
75649 + @Return        None.
75650 +*//***************************************************************************/
75651 +void CORE_DCacheEnable(void);
75652 +
75653 +/**************************************************************************//**
75654 + @Function      CORE_ICacheEnable
75655 +
75656 + @Description   Enables the instruction cache for memory pages that are
75657 +                not cache inhibited.
75658 +
75659 + @Return        None.
75660 +*//***************************************************************************/
75661 +void CORE_ICacheEnable(void);
75662 +
75663 +/**************************************************************************//**
75664 + @Function      CORE_DCacheDisable
75665 +
75666 + @Description   Disables the data cache.
75667 +
75668 + @Return        None.
75669 +*//***************************************************************************/
75670 +void CORE_DCacheDisable(void);
75671 +
75672 +/**************************************************************************//**
75673 + @Function      CORE_ICacheDisable
75674 +
75675 + @Description   Disables the instruction cache.
75676 +
75677 + @Return        None.
75678 +*//***************************************************************************/
75679 +void CORE_ICacheDisable(void);
75680 +
75681 +
75682 +
75683 +#if defined(CORE_E300)
75684 +#include "e300_ext.h"
75685 +#elif defined(CORE_E500V2) || defined(CORE_E500MC) || defined(CORE_E5500) || defined(CORE_E6500)
75686 +#include "e500v2_ext.h"
75687 +#if !defined(NCSW_LINUX)
75688 +#include "e500v2_asm_ext.h"
75689 +#endif
75690 +#else
75691 +#error "Core not defined!"
75692 +#endif
75693 +
75694 +
75695 +#endif /* __PPC_EXT_H */
75696 --- /dev/null
75697 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/ddr_std_ext.h
75698 @@ -0,0 +1,77 @@
75699 +/*
75700 + * Copyright 2008-2012 Freescale Semiconductor Inc.
75701 + *
75702 + * Redistribution and use in source and binary forms, with or without
75703 + * modification, are permitted provided that the following conditions are met:
75704 + *     * Redistributions of source code must retain the above copyright
75705 + *       notice, this list of conditions and the following disclaimer.
75706 + *     * Redistributions in binary form must reproduce the above copyright
75707 + *       notice, this list of conditions and the following disclaimer in the
75708 + *       documentation and/or other materials provided with the distribution.
75709 + *     * Neither the name of Freescale Semiconductor nor the
75710 + *       names of its contributors may be used to endorse or promote products
75711 + *       derived from this software without specific prior written permission.
75712 + *
75713 + *
75714 + * ALTERNATIVELY, this software may be distributed under the terms of the
75715 + * GNU General Public License ("GPL") as published by the Free Software
75716 + * Foundation, either version 2 of that License or (at your option) any
75717 + * later version.
75718 + *
75719 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
75720 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
75721 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
75722 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
75723 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
75724 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
75725 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
75726 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
75727 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
75728 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
75729 + */
75730 +
75731 +#ifndef __DDR_SDT_EXT_H
75732 +#define __DDR_SDT_EXT_H
75733 +
75734 +
75735 +/**************************************************************************//**
75736 + @Group         ddr_Generic_Resources
75737 +
75738 + @Description   ddr generic functions, definitions and enums.
75739 +
75740 + @{
75741 +*//***************************************************************************/
75742 +
75743 +
75744 +/**************************************************************************//**
75745 + @Description   SPD maximum size
75746 +*//***************************************************************************/
75747 +#define SPD_MAX_SIZE 256
75748 +
75749 +/**************************************************************************//**
75750 + @Description   DDR types select
75751 +*//***************************************************************************/
75752 +typedef enum e_DdrType
75753 +{
75754 +    e_DDR_DDR1,
75755 +    e_DDR_DDR2,
75756 +    e_DDR_DDR3,
75757 +    e_DDR_DDR3L,
75758 +    e_DDR_DDR4
75759 +} e_DdrType;
75760 +
75761 +/**************************************************************************//**
75762 + @Description   DDR Mode.
75763 +*//***************************************************************************/
75764 +typedef enum e_DdrMode
75765 +{
75766 +    e_DDR_BUS_WIDTH_32BIT,
75767 +    e_DDR_BUS_WIDTH_64BIT
75768 +} e_DdrMode;
75769 +
75770 +/** @} */ /* end of ddr_Generic_Resources group */
75771 +
75772 +
75773 +
75774 +#endif /* __DDR_SDT_EXT_H */
75775 +
75776 --- /dev/null
75777 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/debug_ext.h
75778 @@ -0,0 +1,233 @@
75779 +/*
75780 + * Copyright 2008-2012 Freescale Semiconductor Inc.
75781 + *
75782 + * Redistribution and use in source and binary forms, with or without
75783 + * modification, are permitted provided that the following conditions are met:
75784 + *     * Redistributions of source code must retain the above copyright
75785 + *       notice, this list of conditions and the following disclaimer.
75786 + *     * Redistributions in binary form must reproduce the above copyright
75787 + *       notice, this list of conditions and the following disclaimer in the
75788 + *       documentation and/or other materials provided with the distribution.
75789 + *     * Neither the name of Freescale Semiconductor nor the
75790 + *       names of its contributors may be used to endorse or promote products
75791 + *       derived from this software without specific prior written permission.
75792 + *
75793 + *
75794 + * ALTERNATIVELY, this software may be distributed under the terms of the
75795 + * GNU General Public License ("GPL") as published by the Free Software
75796 + * Foundation, either version 2 of that License or (at your option) any
75797 + * later version.
75798 + *
75799 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
75800 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
75801 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
75802 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
75803 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
75804 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
75805 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
75806 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
75807 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
75808 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
75809 + */
75810 +
75811 +
75812 +/**************************************************************************//**
75813 + @File          debug_ext.h
75814 +
75815 + @Description   Debug mode definitions.
75816 +*//***************************************************************************/
75817 +
75818 +#ifndef __DEBUG_EXT_H
75819 +#define __DEBUG_EXT_H
75820 +
75821 +#include "std_ext.h"
75822 +#include "xx_ext.h"
75823 +#include "memcpy_ext.h"
75824 +#if (DEBUG_ERRORS > 0)
75825 +#include "sprint_ext.h"
75826 +#include "string_ext.h"
75827 +#endif /* DEBUG_ERRORS > 0 */
75828 +
75829 +
75830 +#if (DEBUG_ERRORS > 0)
75831 +
75832 +/* Internally used macros */
75833 +
75834 +#define DUMP_Print          XX_Print
75835 +#define DUMP_MAX_LEVELS     6
75836 +#define DUMP_IDX_LEN        6
75837 +#define DUMP_MAX_STR        64
75838 +
75839 +
75840 +#define _CREATE_DUMP_SUBSTR(phrase) \
75841 +    dumpTmpLevel = 0; dumpSubStr[0] = '\0'; \
75842 +    snprintf(dumpTmpStr, DUMP_MAX_STR, "%s", #phrase); \
75843 +    p_DumpToken = strtok(dumpTmpStr, (dumpIsArr[0] ? "[" : ".")); \
75844 +    while ((p_DumpToken != NULL) && (dumpTmpLevel < DUMP_MAX_LEVELS)) \
75845 +    { \
75846 +        strlcat(dumpSubStr, p_DumpToken, DUMP_MAX_STR); \
75847 +        if (dumpIsArr[dumpTmpLevel]) \
75848 +        { \
75849 +            strlcat(dumpSubStr, dumpIdxStr[dumpTmpLevel], DUMP_MAX_STR); \
75850 +            p_DumpToken = strtok(NULL, "."); \
75851 +        } \
75852 +        if ((p_DumpToken != NULL) && \
75853 +            ((p_DumpToken = strtok(NULL, (dumpIsArr[++dumpTmpLevel] ? "[" : "."))) != NULL)) \
75854 +            strlcat(dumpSubStr, ".", DUMP_MAX_STR); \
75855 +    }
75856 +
75857 +
75858 +/**************************************************************************//**
75859 + @Group         gen_id  General Drivers Utilities
75860 +
75861 + @Description   External routines.
75862 +
75863 + @{
75864 +*//***************************************************************************/
75865 +
75866 +/**************************************************************************//**
75867 + @Group         dump_id  Memory and Registers Dump Mechanism
75868 +
75869 + @Description   Macros for dumping memory mapped structures.
75870 +
75871 + @{
75872 +*//***************************************************************************/
75873 +
75874 +/**************************************************************************//**
75875 + @Description   Declaration of dump mechanism variables.
75876 +
75877 +                This macro must be declared at the beginning of each routine
75878 +                which uses the dump mechanism macros, before the routine's code
75879 +                starts.
75880 +*//***************************************************************************/
75881 +#define DECLARE_DUMP \
75882 +    char    dumpIdxStr[DUMP_MAX_LEVELS + 1][DUMP_IDX_LEN] = { "", }; \
75883 +    char    dumpSubStr[DUMP_MAX_STR] = ""; \
75884 +    char    dumpTmpStr[DUMP_MAX_STR] = ""; \
75885 +    char    *p_DumpToken = NULL; \
75886 +    int     dumpArrIdx = 0, dumpArrSize = 0, dumpLevel = 0, dumpTmpLevel = 0; \
75887 +    uint8_t dumpIsArr[DUMP_MAX_LEVELS + 1] = { 0 }; \
75888 +    /* Prevent warnings if not all used */ \
75889 +    UNUSED(dumpIdxStr[0][0]); \
75890 +    UNUSED(dumpSubStr[0]); \
75891 +    UNUSED(dumpTmpStr[0]); \
75892 +    UNUSED(p_DumpToken); \
75893 +    UNUSED(dumpArrIdx); \
75894 +    UNUSED(dumpArrSize); \
75895 +    UNUSED(dumpLevel); \
75896 +    UNUSED(dumpTmpLevel); \
75897 +    UNUSED(dumpIsArr[0]);
75898 +
75899 +
75900 +/**************************************************************************//**
75901 + @Description   Prints a title for a subsequent dumped structure or memory.
75902 +
75903 +                The inputs for this macro are the structure/memory title and
75904 +                its base addresses.
75905 +*//***************************************************************************/
75906 +#define DUMP_TITLE(addr, msg)           \
75907 +    DUMP_Print("\r\n"); DUMP_Print msg; \
75908 +    if (addr)                           \
75909 +        DUMP_Print(" (%p)", (addr));    \
75910 +    DUMP_Print("\r\n---------------------------------------------------------\r\n");
75911 +
75912 +/**************************************************************************//**
75913 + @Description   Prints a subtitle for a subsequent dumped sub-structure (optional).
75914 +
75915 +                The inputs for this macro are the sub-structure subtitle.
75916 +                A separating line with this subtitle will be printed.
75917 +*//***************************************************************************/
75918 +#define DUMP_SUBTITLE(subtitle)  \
75919 +    DUMP_Print("----------- "); DUMP_Print subtitle; DUMP_Print("\r\n")
75920 +
75921 +
75922 +/**************************************************************************//**
75923 + @Description   Dumps a memory region in 4-bytes aligned format.
75924 +
75925 +                The inputs for this macro are the base addresses and size
75926 +                (in bytes) of the memory region.
75927 +*//***************************************************************************/
75928 +#define DUMP_MEMORY(addr, size)  \
75929 +    MemDisp((uint8_t *)(addr), (int)(size))
75930 +
75931 +
75932 +/**************************************************************************//**
75933 + @Description   Declares a dump loop, for dumping a sub-structure array.
75934 +
75935 +                The inputs for this macro are:
75936 +                - idx: an index variable, for indexing the sub-structure items
75937 +                       inside the loop. This variable must be declared separately
75938 +                       in the beginning of the routine.
75939 +                - cnt: the number of times to repeat the loop. This number should
75940 +                       equal the number of items in the sub-structures array.
75941 +
75942 +                Note, that the body of the loop must be written inside brackets.
75943 +*//***************************************************************************/
75944 +#define DUMP_SUBSTRUCT_ARRAY(idx, cnt) \
75945 +    for (idx=0, dumpIsArr[dumpLevel++] = 1; \
75946 +         (idx < cnt) && (dumpLevel > 0) && snprintf(dumpIdxStr[dumpLevel-1], DUMP_IDX_LEN, "[%d]", idx); \
75947 +         idx++, ((idx < cnt) || (dumpIsArr[--dumpLevel] = 0)))
75948 +
75949 +
75950 +/**************************************************************************//**
75951 + @Description   Dumps a structure's member variable.
75952 +
75953 +                The input for this macro is the full reference for the member
75954 +                variable, where the structure is referenced using a pointer.
75955 +
75956 +                Note, that a members array must be dumped using DUMP_ARR macro,
75957 +                rather than using this macro.
75958 +
75959 +                If the member variable is part of a sub-structure hierarchy,
75960 +                the full hierarchy (including array indexing) must be specified.
75961 +
75962 +                Examples:   p_Struct->member
75963 +                            p_Struct->sub.member
75964 +                            p_Struct->sub[i].member
75965 +*//***************************************************************************/
75966 +#define DUMP_VAR(st, phrase) \
75967 +    do { \
75968 +        void            *addr = (void *)&((st)->phrase); \
75969 +        physAddress_t   physAddr = XX_VirtToPhys(addr); \
75970 +        _CREATE_DUMP_SUBSTR(phrase); \
75971 +        DUMP_Print("0x%010llX: 0x%08x%8s\t%s\r\n", \
75972 +                   physAddr, GET_UINT32(*(uint32_t*)addr), "", dumpSubStr); \
75973 +    } while (0)
75974 +
75975 +
75976 +/**************************************************************************//**
75977 + @Description   Dumps a structure's members array.
75978 +
75979 +                The input for this macro is the full reference for the members
75980 +                array, where the structure is referenced using a pointer.
75981 +
75982 +                If the members array is part of a sub-structure hierarchy,
75983 +                the full hierarchy (including array indexing) must be specified.
75984 +
75985 +                Examples:   p_Struct->array
75986 +                            p_Struct->sub.array
75987 +                            p_Struct->sub[i].array
75988 +*//***************************************************************************/
75989 +#define DUMP_ARR(st, phrase) \
75990 +    do { \
75991 +        physAddress_t physAddr; \
75992 +        _CREATE_DUMP_SUBSTR(phrase); \
75993 +        dumpArrSize = ARRAY_SIZE((st)->phrase); \
75994 +        for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
75995 +            physAddr = XX_VirtToPhys((void *)&((st)->phrase[dumpArrIdx])); \
75996 +            DUMP_Print("0x%010llX: 0x%08x%8s\t%s[%d]\r\n", \
75997 +                       physAddr, GET_UINT32((st)->phrase[dumpArrIdx]), "", dumpSubStr, dumpArrIdx); \
75998 +        } \
75999 +    } while (0)
76000 +
76001 +
76002 +
76003 +#endif /* DEBUG_ERRORS > 0 */
76004 +
76005 +
76006 +/** @} */ /* end of dump_id group */
76007 +/** @} */ /* end of gen_id group */
76008 +
76009 +
76010 +#endif /* __DEBUG_EXT_H */
76011 +
76012 --- /dev/null
76013 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/endian_ext.h
76014 @@ -0,0 +1,447 @@
76015 +/*
76016 + * Copyright 2008-2012 Freescale Semiconductor Inc.
76017 + *
76018 + * Redistribution and use in source and binary forms, with or without
76019 + * modification, are permitted provided that the following conditions are met:
76020 + *     * Redistributions of source code must retain the above copyright
76021 + *       notice, this list of conditions and the following disclaimer.
76022 + *     * Redistributions in binary form must reproduce the above copyright
76023 + *       notice, this list of conditions and the following disclaimer in the
76024 + *       documentation and/or other materials provided with the distribution.
76025 + *     * Neither the name of Freescale Semiconductor nor the
76026 + *       names of its contributors may be used to endorse or promote products
76027 + *       derived from this software without specific prior written permission.
76028 + *
76029 + *
76030 + * ALTERNATIVELY, this software may be distributed under the terms of the
76031 + * GNU General Public License ("GPL") as published by the Free Software
76032 + * Foundation, either version 2 of that License or (at your option) any
76033 + * later version.
76034 + *
76035 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
76036 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
76037 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
76038 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
76039 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
76040 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
76041 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
76042 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
76043 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
76044 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
76045 + */
76046 +
76047 +
76048 +/**************************************************************************//**
76049 +
76050 + @File          endian_ext.h
76051 +
76052 + @Description   Big/little endian swapping routines.
76053 +*//***************************************************************************/
76054 +
76055 +#ifndef __ENDIAN_EXT_H
76056 +#define __ENDIAN_EXT_H
76057 +
76058 +#include "std_ext.h"
76059 +
76060 +
76061 +/**************************************************************************//**
76062 + @Group         gen_id  General Drivers Utilities
76063 +
76064 + @Description   General usage API. This API is intended for usage by both the
76065 +                internal modules and the user's application.
76066 +
76067 + @{
76068 +*//***************************************************************************/
76069 +
76070 +/**************************************************************************//**
76071 + @Group         endian_id Big/Little-Endian Conversion
76072 +
76073 + @Description   Routines and macros for Big/Little-Endian conversion and
76074 +                general byte swapping.
76075 +
76076 +                All routines and macros are expecting unsigned values as
76077 +                parameters, but will generate the correct result also for
76078 +                signed values. Therefore, signed/unsigned casting is allowed.
76079 + @{
76080 +*//***************************************************************************/
76081 +
76082 +/**************************************************************************//**
76083 + @Collection    Byte-Swap Macros
76084 +
76085 +                Macros for swapping byte order.
76086 +
76087 + @Cautions      The parameters of these macros are evaluated multiple times.
76088 +                For calculated expressions or expressions that contain function
76089 +                calls it is recommended to use the byte-swap routines.
76090 +
76091 + @{
76092 +*//***************************************************************************/
76093 +
76094 +/**************************************************************************//**
76095 + @Description   Swaps the byte order of a given 16-bit value.
76096 +
76097 + @Param[in]     val - The 16-bit value to swap.
76098 +
76099 + @Return        The byte-swapped value..
76100 +
76101 + @Cautions      The given value is evaluated multiple times by this macro.
76102 +                For calculated expressions or expressions that contain function
76103 +                calls it is recommended to use the SwapUint16() routine.
76104 +
76105 + @hideinitializer
76106 +*//***************************************************************************/
76107 +#define SWAP_UINT16(val) \
76108 +    ((uint16_t)((((val) & 0x00FF) << 8) | (((val) & 0xFF00) >> 8)))
76109 +
76110 +/**************************************************************************//**
76111 + @Description   Swaps the byte order of a given 32-bit value.
76112 +
76113 + @Param[in]     val - The 32-bit value to swap.
76114 +
76115 + @Return        The byte-swapped value..
76116 +
76117 + @Cautions      The given value is evaluated multiple times by this macro.
76118 +                For calculated expressions or expressions that contain function
76119 +                calls it is recommended to use the SwapUint32() routine.
76120 +
76121 + @hideinitializer
76122 +*//***************************************************************************/
76123 +#define SWAP_UINT32(val) \
76124 +    ((uint32_t)((((val) & 0x000000FF) << 24) | \
76125 +                (((val) & 0x0000FF00) <<  8) | \
76126 +                (((val) & 0x00FF0000) >>  8) | \
76127 +                (((val) & 0xFF000000) >> 24)))
76128 +
76129 +/**************************************************************************//**
76130 + @Description   Swaps the byte order of a given 64-bit value.
76131 +
76132 + @Param[in]     val - The 64-bit value to swap.
76133 +
76134 + @Return        The byte-swapped value..
76135 +
76136 + @Cautions      The given value is evaluated multiple times by this macro.
76137 +                For calculated expressions or expressions that contain function
76138 +                calls it is recommended to use the SwapUint64() routine.
76139 +
76140 + @hideinitializer
76141 +*//***************************************************************************/
76142 +#define SWAP_UINT64(val) \
76143 +    ((uint64_t)((((val) & 0x00000000000000FFULL) << 56) | \
76144 +                (((val) & 0x000000000000FF00ULL) << 40) | \
76145 +                (((val) & 0x0000000000FF0000ULL) << 24) | \
76146 +                (((val) & 0x00000000FF000000ULL) <<  8) | \
76147 +                (((val) & 0x000000FF00000000ULL) >>  8) | \
76148 +                (((val) & 0x0000FF0000000000ULL) >> 24) | \
76149 +                (((val) & 0x00FF000000000000ULL) >> 40) | \
76150 +                (((val) & 0xFF00000000000000ULL) >> 56)))
76151 +
76152 +/* @} */
76153 +
76154 +/**************************************************************************//**
76155 + @Collection    Byte-Swap Routines
76156 +
76157 +                Routines for swapping the byte order of a given parameter and
76158 +                returning the swapped value.
76159 +
76160 +                These inline routines are safer than the byte-swap macros,
76161 +                because they evaluate the parameter expression only once.
76162 + @{
76163 +*//***************************************************************************/
76164 +
76165 +/**************************************************************************//**
76166 + @Function      SwapUint16
76167 +
76168 + @Description   Returns the byte-swapped value of a given 16-bit value.
76169 +
76170 + @Param[in]     val - The 16-bit value.
76171 +
76172 + @Return        The byte-swapped value of the parameter.
76173 +*//***************************************************************************/
76174 +static __inline__ uint16_t SwapUint16(uint16_t val)
76175 +{
76176 +    return (uint16_t)(((val & 0x00FF) << 8) |
76177 +                      ((val & 0xFF00) >> 8));
76178 +}
76179 +
76180 +/**************************************************************************//**
76181 + @Function      SwapUint32
76182 +
76183 + @Description   Returns the byte-swapped value of a given 32-bit value.
76184 +
76185 + @Param[in]     val - The 32-bit value.
76186 +
76187 + @Return        The byte-swapped value of the parameter.
76188 +*//***************************************************************************/
76189 +static __inline__ uint32_t SwapUint32(uint32_t val)
76190 +{
76191 +    return (uint32_t)(((val & 0x000000FF) << 24) |
76192 +                      ((val & 0x0000FF00) <<  8) |
76193 +                      ((val & 0x00FF0000) >>  8) |
76194 +                      ((val & 0xFF000000) >> 24));
76195 +}
76196 +
76197 +/**************************************************************************//**
76198 + @Function      SwapUint64
76199 +
76200 + @Description   Returns the byte-swapped value of a given 64-bit value.
76201 +
76202 + @Param[in]     val - The 64-bit value.
76203 +
76204 + @Return        The byte-swapped value of the parameter.
76205 +*//***************************************************************************/
76206 +static __inline__ uint64_t SwapUint64(uint64_t val)
76207 +{
76208 +    return (uint64_t)(((val & 0x00000000000000FFULL) << 56) |
76209 +                      ((val & 0x000000000000FF00ULL) << 40) |
76210 +                      ((val & 0x0000000000FF0000ULL) << 24) |
76211 +                      ((val & 0x00000000FF000000ULL) <<  8) |
76212 +                      ((val & 0x000000FF00000000ULL) >>  8) |
76213 +                      ((val & 0x0000FF0000000000ULL) >> 24) |
76214 +                      ((val & 0x00FF000000000000ULL) >> 40) |
76215 +                      ((val & 0xFF00000000000000ULL) >> 56));
76216 +}
76217 +
76218 +/* @} */
76219 +
76220 +/**************************************************************************//**
76221 + @Collection    In-place Byte-Swap-And-Set Routines
76222 +
76223 +                Routines for swapping the byte order of a given variable and
76224 +                setting the swapped value back to the same variable.
76225 + @{
76226 +*//***************************************************************************/
76227 +
76228 +/**************************************************************************//**
76229 + @Function      SwapUint16P
76230 +
76231 + @Description   Swaps the byte order of a given 16-bit variable.
76232 +
76233 + @Param[in]     p_Val - Pointer to the 16-bit variable.
76234 +
76235 + @Return        None.
76236 +*//***************************************************************************/
76237 +static __inline__ void SwapUint16P(uint16_t *p_Val)
76238 +{
76239 +    *p_Val = SwapUint16(*p_Val);
76240 +}
76241 +
76242 +/**************************************************************************//**
76243 + @Function      SwapUint32P
76244 +
76245 + @Description   Swaps the byte order of a given 32-bit variable.
76246 +
76247 + @Param[in]     p_Val - Pointer to the 32-bit variable.
76248 +
76249 + @Return        None.
76250 +*//***************************************************************************/
76251 +static __inline__ void SwapUint32P(uint32_t *p_Val)
76252 +{
76253 +    *p_Val = SwapUint32(*p_Val);
76254 +}
76255 +
76256 +/**************************************************************************//**
76257 + @Function      SwapUint64P
76258 +
76259 + @Description   Swaps the byte order of a given 64-bit variable.
76260 +
76261 + @Param[in]     p_Val - Pointer to the 64-bit variable.
76262 +
76263 + @Return        None.
76264 +*//***************************************************************************/
76265 +static __inline__ void SwapUint64P(uint64_t *p_Val)
76266 +{
76267 +    *p_Val = SwapUint64(*p_Val);
76268 +}
76269 +
76270 +/* @} */
76271 +
76272 +
76273 +/**************************************************************************//**
76274 + @Collection    Little-Endian Conversion Macros
76275 +
76276 +                These macros convert given parameters to or from Little-Endian
76277 +                format. Use these macros when you want to read or write a specific
76278 +                Little-Endian value in memory, without a-priori knowing the CPU
76279 +                byte order.
76280 +
76281 +                These macros use the byte-swap routines. For conversion of
76282 +                constants in initialization structures, you may use the CONST
76283 +                versions of these macros (see below), which are using the
76284 +                byte-swap macros instead.
76285 + @{
76286 +*//***************************************************************************/
76287 +
76288 +/**************************************************************************//**
76289 + @Description   Converts a given 16-bit value from CPU byte order to
76290 +                Little-Endian byte order.
76291 +
76292 + @Param[in]     val - The 16-bit value to convert.
76293 +
76294 + @Return        The converted value.
76295 +
76296 + @hideinitializer
76297 +*//***************************************************************************/
76298 +#define CPU_TO_LE16(val)        SwapUint16(val)
76299 +
76300 +/**************************************************************************//**
76301 + @Description   Converts a given 32-bit value from CPU byte order to
76302 +                Little-Endian byte order.
76303 +
76304 + @Param[in]     val - The 32-bit value to convert.
76305 +
76306 + @Return        The converted value.
76307 +
76308 + @hideinitializer
76309 +*//***************************************************************************/
76310 +#define CPU_TO_LE32(val)        SwapUint32(val)
76311 +
76312 +/**************************************************************************//**
76313 + @Description   Converts a given 64-bit value from CPU byte order to
76314 +                Little-Endian byte order.
76315 +
76316 + @Param[in]     val - The 64-bit value to convert.
76317 +
76318 + @Return        The converted value.
76319 +
76320 + @hideinitializer
76321 +*//***************************************************************************/
76322 +#define CPU_TO_LE64(val)        SwapUint64(val)
76323 +
76324 +
76325 +/**************************************************************************//**
76326 + @Description   Converts a given 16-bit value from Little-Endian byte order to
76327 +                CPU byte order.
76328 +
76329 + @Param[in]     val - The 16-bit value to convert.
76330 +
76331 + @Return        The converted value.
76332 +
76333 + @hideinitializer
76334 +*//***************************************************************************/
76335 +#define LE16_TO_CPU(val)        CPU_TO_LE16(val)
76336 +
76337 +/**************************************************************************//**
76338 + @Description   Converts a given 32-bit value from Little-Endian byte order to
76339 +                CPU byte order.
76340 +
76341 + @Param[in]     val - The 32-bit value to convert.
76342 +
76343 + @Return        The converted value.
76344 +
76345 + @hideinitializer
76346 +*//***************************************************************************/
76347 +#define LE32_TO_CPU(val)        CPU_TO_LE32(val)
76348 +
76349 +/**************************************************************************//**
76350 + @Description   Converts a given 64-bit value from Little-Endian byte order to
76351 +                CPU byte order.
76352 +
76353 + @Param[in]     val - The 64-bit value to convert.
76354 +
76355 + @Return        The converted value.
76356 +
76357 + @hideinitializer
76358 +*//***************************************************************************/
76359 +#define LE64_TO_CPU(val)        CPU_TO_LE64(val)
76360 +
76361 +/* @} */
76362 +
76363 +/**************************************************************************//**
76364 + @Collection    Little-Endian Constant Conversion Macros
76365 +
76366 +                These macros convert given constants to or from Little-Endian
76367 +                format. Use these macros when you want to read or write a specific
76368 +                Little-Endian constant in memory, without a-priori knowing the
76369 +                CPU byte order.
76370 +
76371 +                These macros use the byte-swap macros, therefore can be used for
76372 +                conversion of constants in initialization structures.
76373 +
76374 + @Cautions      The parameters of these macros are evaluated multiple times.
76375 +                For non-constant expressions, use the non-CONST macro versions.
76376 +
76377 + @{
76378 +*//***************************************************************************/
76379 +
76380 +/**************************************************************************//**
76381 + @Description   Converts a given 16-bit constant from CPU byte order to
76382 +                Little-Endian byte order.
76383 +
76384 + @Param[in]     val - The 16-bit value to convert.
76385 +
76386 + @Return        The converted value.
76387 +
76388 + @hideinitializer
76389 +*//***************************************************************************/
76390 +#define CONST_CPU_TO_LE16(val)  SWAP_UINT16(val)
76391 +
76392 +/**************************************************************************//**
76393 + @Description   Converts a given 32-bit constant from CPU byte order to
76394 +                Little-Endian byte order.
76395 +
76396 + @Param[in]     val - The 32-bit value to convert.
76397 +
76398 + @Return        The converted value.
76399 +
76400 + @hideinitializer
76401 +*//***************************************************************************/
76402 +#define CONST_CPU_TO_LE32(val)  SWAP_UINT32(val)
76403 +
76404 +/**************************************************************************//**
76405 + @Description   Converts a given 64-bit constant from CPU byte order to
76406 +                Little-Endian byte order.
76407 +
76408 + @Param[in]     val - The 64-bit value to convert.
76409 +
76410 + @Return        The converted value.
76411 +
76412 + @hideinitializer
76413 +*//***************************************************************************/
76414 +#define CONST_CPU_TO_LE64(val)  SWAP_UINT64(val)
76415 +
76416 +
76417 +/**************************************************************************//**
76418 + @Description   Converts a given 16-bit constant from Little-Endian byte order
76419 +                to CPU byte order.
76420 +
76421 + @Param[in]     val - The 16-bit value to convert.
76422 +
76423 + @Return        The converted value.
76424 +
76425 + @hideinitializer
76426 +*//***************************************************************************/
76427 +#define CONST_LE16_TO_CPU(val)  CONST_CPU_TO_LE16(val)
76428 +
76429 +/**************************************************************************//**
76430 + @Description   Converts a given 32-bit constant from Little-Endian byte order
76431 +                to CPU byte order.
76432 +
76433 + @Param[in]     val - The 32-bit value to convert.
76434 +
76435 + @Return        The converted value.
76436 +
76437 + @hideinitializer
76438 +*//***************************************************************************/
76439 +#define CONST_LE32_TO_CPU(val)  CONST_CPU_TO_LE32(val)
76440 +
76441 +/**************************************************************************//**
76442 + @Description   Converts a given 64-bit constant from Little-Endian byte order
76443 +                to CPU byte order.
76444 +
76445 + @Param[in]     val - The 64-bit value to convert.
76446 +
76447 + @Return        The converted value.
76448 +
76449 + @hideinitializer
76450 +*//***************************************************************************/
76451 +#define CONST_LE64_TO_CPU(val)  CONST_CPU_TO_LE64(val)
76452 +
76453 +/* @} */
76454 +
76455 +
76456 +/** @} */ /* end of endian_id group */
76457 +/** @} */ /* end of gen_id group */
76458 +
76459 +
76460 +#endif /* __ENDIAN_EXT_H */
76461 +
76462 --- /dev/null
76463 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/enet_ext.h
76464 @@ -0,0 +1,205 @@
76465 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
76466 + * All rights reserved.
76467 + *
76468 + * Redistribution and use in source and binary forms, with or without
76469 + * modification, are permitted provided that the following conditions are met:
76470 + *     * Redistributions of source code must retain the above copyright
76471 + *       notice, this list of conditions and the following disclaimer.
76472 + *     * Redistributions in binary form must reproduce the above copyright
76473 + *       notice, this list of conditions and the following disclaimer in the
76474 + *       documentation and/or other materials provided with the distribution.
76475 + *     * Neither the name of Freescale Semiconductor nor the
76476 + *       names of its contributors may be used to endorse or promote products
76477 + *       derived from this software without specific prior written permission.
76478 + *
76479 + *
76480 + * ALTERNATIVELY, this software may be distributed under the terms of the
76481 + * GNU General Public License ("GPL") as published by the Free Software
76482 + * Foundation, either version 2 of that License or (at your option) any
76483 + * later version.
76484 + *
76485 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
76486 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
76487 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
76488 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
76489 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
76490 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
76491 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
76492 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
76493 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
76494 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
76495 + */
76496 +
76497 +
76498 +/**************************************************************************//**
76499 + @File          enet_ext.h
76500 +
76501 + @Description   Ethernet generic definitions and enums.
76502 +*//***************************************************************************/
76503 +
76504 +#ifndef __ENET_EXT_H
76505 +#define __ENET_EXT_H
76506 +
76507 +#include "fsl_enet.h"
76508 +
76509 +#define ENET_NUM_OCTETS_PER_ADDRESS 6     /**< Number of octets (8-bit bytes) in an ethernet address */
76510 +#define ENET_GROUP_ADDR             0x01  /**< Group address mask for ethernet addresses */
76511 +
76512 +
76513 +/**************************************************************************//**
76514 + @Description   Ethernet Address
76515 +*//***************************************************************************/
76516 +typedef uint8_t t_EnetAddr[ENET_NUM_OCTETS_PER_ADDRESS];
76517 +
76518 +/**************************************************************************//**
76519 + @Description   Ethernet Address Type.
76520 +*//***************************************************************************/
76521 +typedef enum e_EnetAddrType
76522 +{
76523 +    e_ENET_ADDR_TYPE_INDIVIDUAL,    /**< Individual (unicast) address */
76524 +    e_ENET_ADDR_TYPE_GROUP,         /**< Group (multicast) address */
76525 +    e_ENET_ADDR_TYPE_BROADCAST      /**< Broadcast address */
76526 +} e_EnetAddrType;
76527 +
76528 +/**************************************************************************//**
76529 + @Description   Ethernet MAC-PHY Interface
76530 +*//***************************************************************************/
76531 +typedef enum e_EnetInterface
76532 +{
76533 +    e_ENET_IF_MII   = E_ENET_IF_MII,     /**< MII interface */
76534 +    e_ENET_IF_RMII  = E_ENET_IF_RMII,    /**< RMII interface */
76535 +    e_ENET_IF_SMII  = E_ENET_IF_SMII,    /**< SMII interface */
76536 +    e_ENET_IF_GMII  = E_ENET_IF_GMII,    /**< GMII interface */
76537 +    e_ENET_IF_RGMII = E_ENET_IF_RGMII,   /**< RGMII interface */
76538 +    e_ENET_IF_TBI   = E_ENET_IF_TBI,     /**< TBI interface */
76539 +    e_ENET_IF_RTBI  = E_ENET_IF_RTBI,    /**< RTBI interface */
76540 +    e_ENET_IF_SGMII = E_ENET_IF_SGMII,   /**< SGMII interface */
76541 +    e_ENET_IF_XGMII = E_ENET_IF_XGMII,   /**< XGMII interface */
76542 +    e_ENET_IF_QSGMII= E_ENET_IF_QSGMII,  /**< QSGMII interface */
76543 +    e_ENET_IF_XFI   = E_ENET_IF_XFI      /**< XFI interface */
76544 +} e_EnetInterface;
76545 +
76546 +#define ENET_IF_SGMII_BASEX       0x80000000   /**< SGMII/QSGII interface with 1000BaseX
76547 +                                                    auto-negotiation between MAC and phy
76548 +                                                    or backplane;
76549 +                                                    Note: 1000BaseX auto-negotiation relates
76550 +                                                    only to interface between MAC and phy/backplane,
76551 +                                                    SGMII phy can still synchronize with far-end phy
76552 +                                                    at 10Mbps, 100Mbps or 1000Mbps */
76553 +
76554 +/**************************************************************************//**
76555 + @Description   Ethernet Duplex Mode
76556 +*//***************************************************************************/
76557 +typedef enum e_EnetDuplexMode
76558 +{
76559 +    e_ENET_HALF_DUPLEX,             /**< Half-Duplex mode */
76560 +    e_ENET_FULL_DUPLEX              /**< Full-Duplex mode */
76561 +} e_EnetDuplexMode;
76562 +
76563 +/**************************************************************************//**
76564 + @Description   Ethernet Speed (nominal data rate)
76565 +*//***************************************************************************/
76566 +typedef enum e_EnetSpeed
76567 +{
76568 +    e_ENET_SPEED_10     = E_ENET_SPEED_10,       /**< 10 Mbps */
76569 +    e_ENET_SPEED_100    = E_ENET_SPEED_100,      /**< 100 Mbps */
76570 +    e_ENET_SPEED_1000   = E_ENET_SPEED_1000,     /**< 1000 Mbps = 1 Gbps */
76571 +    e_ENET_SPEED_2500   = E_ENET_SPEED_2500,     /**< 2500 Mbps = 2.5 Gbps */
76572 +    e_ENET_SPEED_10000  = E_ENET_SPEED_10000     /**< 10000 Mbps = 10 Gbps */
76573 +} e_EnetSpeed;
76574 +
76575 +/**************************************************************************//**
76576 + @Description   Ethernet mode (combination of MAC-PHY interface and speed)
76577 +*//***************************************************************************/
76578 +typedef enum e_EnetMode
76579 +{
76580 +    e_ENET_MODE_INVALID           = 0,                                        /**< Invalid Ethernet mode */
76581 +    e_ENET_MODE_MII_10            = (e_ENET_IF_MII   | e_ENET_SPEED_10),      /**<    10 Mbps MII   */
76582 +    e_ENET_MODE_MII_100           = (e_ENET_IF_MII   | e_ENET_SPEED_100),     /**<   100 Mbps MII   */
76583 +    e_ENET_MODE_RMII_10           = (e_ENET_IF_RMII  | e_ENET_SPEED_10),      /**<    10 Mbps RMII  */
76584 +    e_ENET_MODE_RMII_100          = (e_ENET_IF_RMII  | e_ENET_SPEED_100),     /**<   100 Mbps RMII  */
76585 +    e_ENET_MODE_SMII_10           = (e_ENET_IF_SMII  | e_ENET_SPEED_10),      /**<    10 Mbps SMII  */
76586 +    e_ENET_MODE_SMII_100          = (e_ENET_IF_SMII  | e_ENET_SPEED_100),     /**<   100 Mbps SMII  */
76587 +    e_ENET_MODE_GMII_1000         = (e_ENET_IF_GMII  | e_ENET_SPEED_1000),    /**<  1000 Mbps GMII  */
76588 +    e_ENET_MODE_RGMII_10          = (e_ENET_IF_RGMII | e_ENET_SPEED_10),      /**<    10 Mbps RGMII */
76589 +    e_ENET_MODE_RGMII_100         = (e_ENET_IF_RGMII | e_ENET_SPEED_100),     /**<   100 Mbps RGMII */
76590 +    e_ENET_MODE_RGMII_1000        = (e_ENET_IF_RGMII | e_ENET_SPEED_1000),    /**<  1000 Mbps RGMII */
76591 +    e_ENET_MODE_TBI_1000          = (e_ENET_IF_TBI   | e_ENET_SPEED_1000),    /**<  1000 Mbps TBI   */
76592 +    e_ENET_MODE_RTBI_1000         = (e_ENET_IF_RTBI  | e_ENET_SPEED_1000),    /**<  1000 Mbps RTBI  */
76593 +    e_ENET_MODE_SGMII_10          = (e_ENET_IF_SGMII | e_ENET_SPEED_10),
76594 +                                        /**< 10 Mbps SGMII with auto-negotiation between MAC and
76595 +                                             SGMII phy according to Cisco SGMII specification */
76596 +    e_ENET_MODE_SGMII_100         = (e_ENET_IF_SGMII | e_ENET_SPEED_100),
76597 +                                        /**< 100 Mbps SGMII with auto-negotiation between MAC and
76598 +                                             SGMII phy according to Cisco SGMII specification */
76599 +    e_ENET_MODE_SGMII_1000        = (e_ENET_IF_SGMII | e_ENET_SPEED_1000),
76600 +                                        /**< 1000 Mbps SGMII with auto-negotiation between MAC and
76601 +                                             SGMII phy according to Cisco SGMII specification */
76602 +    e_ENET_MODE_SGMII_2500        = (e_ENET_IF_SGMII | e_ENET_SPEED_2500),
76603 +    e_ENET_MODE_SGMII_BASEX_10    = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_10),
76604 +                                        /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
76605 +                                             MAC and SGMII phy or backplane */
76606 +    e_ENET_MODE_SGMII_BASEX_100   = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_100),
76607 +                                        /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between
76608 +                                             MAC and SGMII phy or backplane */
76609 +    e_ENET_MODE_SGMII_BASEX_1000  = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_1000),
76610 +                                        /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between
76611 +                                             MAC and SGMII phy or backplane */
76612 +    e_ENET_MODE_QSGMII_1000       = (e_ENET_IF_QSGMII| e_ENET_SPEED_1000),
76613 +                                        /**< 1000 Mbps QSGMII with auto-negotiation between MAC and
76614 +                                             QSGMII phy according to Cisco QSGMII specification */
76615 +    e_ENET_MODE_QSGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | e_ENET_IF_QSGMII| e_ENET_SPEED_1000),
76616 +                                        /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between
76617 +                                             MAC and QSGMII phy or backplane */
76618 +    e_ENET_MODE_XGMII_10000       = (e_ENET_IF_XGMII | e_ENET_SPEED_10000),   /**< 10000 Mbps XGMII */
76619 +    e_ENET_MODE_XFI_10000         = (e_ENET_IF_XFI   | e_ENET_SPEED_10000)    /**< 10000 Mbps XFI */
76620 +} e_EnetMode;
76621 +
76622 +
76623 +#define IS_ENET_MODE_VALID(mode) \
76624 +        (((mode) == e_ENET_MODE_MII_10     ) || \
76625 +         ((mode) == e_ENET_MODE_MII_100    ) || \
76626 +         ((mode) == e_ENET_MODE_RMII_10    ) || \
76627 +         ((mode) == e_ENET_MODE_RMII_100   ) || \
76628 +         ((mode) == e_ENET_MODE_SMII_10    ) || \
76629 +         ((mode) == e_ENET_MODE_SMII_100   ) || \
76630 +         ((mode) == e_ENET_MODE_GMII_1000  ) || \
76631 +         ((mode) == e_ENET_MODE_RGMII_10   ) || \
76632 +         ((mode) == e_ENET_MODE_RGMII_100  ) || \
76633 +         ((mode) == e_ENET_MODE_RGMII_1000 ) || \
76634 +         ((mode) == e_ENET_MODE_TBI_1000   ) || \
76635 +         ((mode) == e_ENET_MODE_RTBI_1000  ) || \
76636 +         ((mode) == e_ENET_MODE_SGMII_10   ) || \
76637 +         ((mode) == e_ENET_MODE_SGMII_100  ) || \
76638 +         ((mode) == e_ENET_MODE_SGMII_1000 ) || \
76639 +         ((mode) == e_ENET_MODE_SGMII_BASEX_10   ) || \
76640 +         ((mode) == e_ENET_MODE_SGMII_BASEX_100  ) || \
76641 +         ((mode) == e_ENET_MODE_SGMII_BASEX_1000 ) || \
76642 +         ((mode) == e_ENET_MODE_XGMII_10000) || \
76643 +         ((mode) == e_ENET_MODE_QSGMII_1000) || \
76644 +         ((mode) == e_ENET_MODE_QSGMII_BASEX_1000) || \
76645 +         ((mode) == e_ENET_MODE_XFI_10000))
76646 +
76647 +
76648 +#define MAKE_ENET_MODE(_interface, _speed)     (e_EnetMode)((_interface) | (_speed))
76649 +
76650 +#define ENET_INTERFACE_FROM_MODE(mode)          (e_EnetInterface)((mode) & 0x0FFF0000)
76651 +#define ENET_SPEED_FROM_MODE(mode)              (e_EnetSpeed)((mode) & 0x0000FFFF)
76652 +
76653 +#define ENET_ADDR_TO_UINT64(_enetAddr)                  \
76654 +        (uint64_t)(((uint64_t)(_enetAddr)[0] << 40) |   \
76655 +                   ((uint64_t)(_enetAddr)[1] << 32) |   \
76656 +                   ((uint64_t)(_enetAddr)[2] << 24) |   \
76657 +                   ((uint64_t)(_enetAddr)[3] << 16) |   \
76658 +                   ((uint64_t)(_enetAddr)[4] << 8) |    \
76659 +                   ((uint64_t)(_enetAddr)[5]))
76660 +
76661 +#define MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enetAddr)              \
76662 +        do {                                                        \
76663 +            int i;                                                  \
76664 +            for (i=0; i < ENET_NUM_OCTETS_PER_ADDRESS; i++)         \
76665 +                (_enetAddr)[i] = (uint8_t)((_addr64) >> ((5-i)*8)); \
76666 +        } while (0)
76667 +
76668 +
76669 +#endif /* __ENET_EXT_H */
76670 --- /dev/null
76671 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/error_ext.h
76672 @@ -0,0 +1,529 @@
76673 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
76674 + * All rights reserved.
76675 + *
76676 + * Redistribution and use in source and binary forms, with or without
76677 + * modification, are permitted provided that the following conditions are met:
76678 + *     * Redistributions of source code must retain the above copyright
76679 + *       notice, this list of conditions and the following disclaimer.
76680 + *     * Redistributions in binary form must reproduce the above copyright
76681 + *       notice, this list of conditions and the following disclaimer in the
76682 + *       documentation and/or other materials provided with the distribution.
76683 + *     * Neither the name of Freescale Semiconductor nor the
76684 + *       names of its contributors may be used to endorse or promote products
76685 + *       derived from this software without specific prior written permission.
76686 + *
76687 + *
76688 + * ALTERNATIVELY, this software may be distributed under the terms of the
76689 + * GNU General Public License ("GPL") as published by the Free Software
76690 + * Foundation, either version 2 of that License or (at your option) any
76691 + * later version.
76692 + *
76693 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
76694 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
76695 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
76696 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
76697 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
76698 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
76699 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
76700 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
76701 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
76702 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
76703 + */
76704 +
76705 +
76706 +/**************************************************************************//**
76707 + @File          error_ext.h
76708 +
76709 + @Description   Error definitions.
76710 +*//***************************************************************************/
76711 +
76712 +#ifndef __ERROR_EXT_H
76713 +#define __ERROR_EXT_H
76714 +
76715 +#if !defined(NCSW_LINUX)
76716 +#include <errno.h>
76717 +#endif
76718 +
76719 +#include "std_ext.h"
76720 +#include "xx_ext.h"
76721 +#include "core_ext.h"
76722 +
76723 +
76724 +
76725 +
76726 +/**************************************************************************//**
76727 + @Group         gen_id  General Drivers Utilities
76728 +
76729 + @Description   External routines.
76730 +
76731 + @{
76732 +*//***************************************************************************/
76733 +
76734 +/**************************************************************************//**
76735 + @Group         gen_error_id  Errors, Events and Debug
76736 +
76737 + @Description   External routines.
76738 +
76739 + @{
76740 +*//***************************************************************************/
76741 +
76742 +/******************************************************************************
76743 +The scheme below provides the bits description for error codes:
76744 +
76745 + 0    1    2    3    4    5    6    7    8    9    10   11   12   13   14   15
76746 +|       Reserved (should be zero)      |              Module ID               |
76747 +
76748 + 16   17   18   19   20   21   22   23   24   25   26   27   28   29   30   31
76749 +|                               Error Type                                    |
76750 +******************************************************************************/
76751 +
76752 +#define ERROR_CODE(_err)            ((((uint32_t)_err) & 0x0000FFFF) | __ERR_MODULE__)
76753 +
76754 +#define GET_ERROR_TYPE(_errcode)    ((_errcode) & 0x0000FFFF)
76755 +                                /**< Extract module code from error code (#t_Error) */
76756 +
76757 +#define GET_ERROR_MODULE(_errcode)  ((_errcode) & 0x00FF0000)
76758 +                                /**< Extract error type (#e_ErrorType) from
76759 +                                     error code (#t_Error) */
76760 +
76761 +
76762 +/**************************************************************************//**
76763 + @Description    Error Type Enumeration
76764 +*//***************************************************************************/
76765 +typedef enum e_ErrorType    /*   Comments / Associated Message Strings                      */
76766 +{                           /* ------------------------------------------------------------ */
76767 +    E_OK = 0                /*   Never use "RETURN_ERROR" with E_OK; Use "return E_OK;"     */
76768 +    ,E_WRITE_FAILED = EIO   /**< Write access failed on memory/device.                      */
76769 +                            /*   String: none, or device name.                              */
76770 +    ,E_NO_DEVICE = ENXIO    /**< The associated device is not initialized.                  */
76771 +                            /*   String: none.                                              */
76772 +    ,E_NOT_AVAILABLE = EAGAIN
76773 +                            /**< Resource is unavailable.                                   */
76774 +                            /*   String: none, unless the operation is not the main goal
76775 +                                 of the function (in this case add resource description).   */
76776 +    ,E_NO_MEMORY = ENOMEM   /**< External memory allocation failed.                         */
76777 +                            /*   String: description of item for which allocation failed.   */
76778 +    ,E_INVALID_ADDRESS = EFAULT
76779 +                            /**< Invalid address.                                           */
76780 +                            /*   String: description of the specific violation.             */
76781 +    ,E_BUSY = EBUSY         /**< Resource or module is busy.                                */
76782 +                            /*   String: none, unless the operation is not the main goal
76783 +                                 of the function (in this case add resource description).   */
76784 +    ,E_ALREADY_EXISTS = EEXIST
76785 +                            /**< Requested resource or item already exists.                 */
76786 +                            /*   Use when resource duplication or sharing are not allowed.
76787 +                                 String: none, unless the operation is not the main goal
76788 +                                 of the function (in this case add item description).       */
76789 +    ,E_INVALID_OPERATION = ENODEV
76790 +                            /**< The operation/command is invalid (unrecognized).           */
76791 +                            /*   String: none.                                              */
76792 +    ,E_INVALID_VALUE = EDOM /**< Invalid value.                                             */
76793 +                            /*   Use for non-enumeration parameters, and
76794 +                                 only when other error types are not suitable.
76795 +                                 String: parameter description + "(should be <attribute>)",
76796 +                                 e.g: "Maximum Rx buffer length (should be divisible by 8)",
76797 +                                      "Channel number (should be even)".                    */
76798 +    ,E_NOT_IN_RANGE = ERANGE/**< Parameter value is out of range.                           */
76799 +                            /*   Don't use this error for enumeration parameters.
76800 +                                 String: parameter description + "(should be %d-%d)",
76801 +                                 e.g: "Number of pad characters (should be 0-15)".          */
76802 +    ,E_NOT_SUPPORTED = ENOSYS
76803 +                            /**< The function is not supported or not implemented.          */
76804 +                            /*   String: none.                                              */
76805 +    ,E_INVALID_STATE        /**< The operation is not allowed in current module state.      */
76806 +                            /*   String: none.                                              */
76807 +    ,E_INVALID_HANDLE       /**< Invalid handle of module or object.                        */
76808 +                            /*   String: none, unless the function takes in more than one
76809 +                                 handle (in this case add the handle description)           */
76810 +    ,E_INVALID_ID           /**< Invalid module ID (usually enumeration or index).          */
76811 +                            /*   String: none, unless the function takes in more than one
76812 +                                 ID (in this case add the ID description)                   */
76813 +    ,E_NULL_POINTER         /**< Unexpected NULL pointer.                                   */
76814 +                            /*   String: pointer description.                               */
76815 +    ,E_INVALID_SELECTION    /**< Invalid selection or mode.                                 */
76816 +                            /*   Use for enumeration values, only when other error types
76817 +                                 are not suitable.
76818 +                                 String: parameter description.                             */
76819 +    ,E_INVALID_COMM_MODE    /**< Invalid communication mode.                                */
76820 +                            /*   String: none, unless the function takes in more than one
76821 +                                 communication mode indications (in this case add
76822 +                                 parameter description).                                    */
76823 +    ,E_INVALID_MEMORY_TYPE  /**< Invalid memory type.                                       */
76824 +                            /*   String: none, unless the function takes in more than one
76825 +                                 memory types (in this case add memory description,
76826 +                                 e.g: "Data memory", "Buffer descriptors memory").          */
76827 +    ,E_INVALID_CLOCK        /**< Invalid clock.                                             */
76828 +                            /*   String: none, unless the function takes in more than one
76829 +                                 clocks (in this case add clock description,
76830 +                                 e.g: "Rx clock", "Tx clock").                              */
76831 +    ,E_CONFLICT             /**< Some setting conflicts with another setting.               */
76832 +                            /*   String: description of the conflicting settings.           */
76833 +    ,E_NOT_ALIGNED          /**< Non-aligned address.                                       */
76834 +                            /*   String: parameter description + "(should be %d-bytes aligned)",
76835 +                                 e.g: "Rx data buffer (should be 32-bytes aligned)".        */
76836 +    ,E_NOT_FOUND            /**< Requested resource or item was not found.                  */
76837 +                            /*   Use only when the resource/item is uniquely identified.
76838 +                                 String: none, unless the operation is not the main goal
76839 +                                 of the function (in this case add item description).       */
76840 +    ,E_FULL                 /**< Resource is full.                                          */
76841 +                            /*   String: none, unless the operation is not the main goal
76842 +                                 of the function (in this case add resource description).   */
76843 +    ,E_EMPTY                /**< Resource is empty.                                         */
76844 +                            /*   String: none, unless the operation is not the main goal
76845 +                                 of the function (in this case add resource description).   */
76846 +    ,E_ALREADY_FREE         /**< Specified resource or item is already free or deleted.     */
76847 +                            /*   String: none, unless the operation is not the main goal
76848 +                                 of the function (in this case add item description).       */
76849 +    ,E_READ_FAILED          /**< Read access failed on memory/device.                       */
76850 +                            /*   String: none, or device name.                              */
76851 +    ,E_INVALID_FRAME        /**< Invalid frame object (NULL handle or missing buffers).     */
76852 +                            /*   String: none.                                              */
76853 +    ,E_SEND_FAILED          /**< Send operation failed on device.                           */
76854 +                            /*   String: none, or device name.                              */
76855 +    ,E_RECEIVE_FAILED       /**< Receive operation failed on device.                        */
76856 +                            /*   String: none, or device name.                              */
76857 +    ,E_TIMEOUT/* = ETIMEDOUT*/  /**< The operation timed out.                                   */
76858 +                            /*   String: none.                                              */
76859 +
76860 +    ,E_DUMMY_LAST           /* NEVER USED */
76861 +
76862 +} e_ErrorType;
76863 +
76864 +/**************************************************************************//**
76865 + @Description    Event Type Enumeration
76866 +*//***************************************************************************/
76867 +typedef enum e_Event        /*   Comments / Associated Flags and Message Strings            */
76868 +{                           /* ------------------------------------------------------------ */
76869 +    EV_NO_EVENT = 0         /**< No event; Never used.                                      */
76870 +
76871 +    ,EV_RX_DISCARD          /**< Received packet discarded (by the driver, and only for
76872 +                                 complete packets);
76873 +                                 Flags: error flags in case of error, zero otherwise.       */
76874 +                            /*   String: reason for discard, e.g: "Error in frame",
76875 +                                 "Disordered frame", "Incomplete frame", "No frame object". */
76876 +    ,EV_RX_ERROR            /**< Receive error (by hardware/firmware);
76877 +                                 Flags: usually status flags from the buffer descriptor.    */
76878 +                            /*   String: none.                                              */
76879 +    ,EV_TX_ERROR            /**< Transmit error (by hardware/firmware);
76880 +                                 Flags: usually status flags from the buffer descriptor.    */
76881 +                            /*   String: none.                                              */
76882 +    ,EV_NO_BUFFERS          /**< System ran out of buffer objects;
76883 +                                 Flags: zero.                                               */
76884 +                            /*   String: none.                                              */
76885 +    ,EV_NO_MB_FRAMES        /**< System ran out of multi-buffer frame objects;
76886 +                                 Flags: zero.                                               */
76887 +                            /*   String: none.                                              */
76888 +    ,EV_NO_SB_FRAMES        /**< System ran out of single-buffer frame objects;
76889 +                                 Flags: zero.                                               */
76890 +                            /*   String: none.                                              */
76891 +    ,EV_TX_QUEUE_FULL       /**< Transmit queue is full;
76892 +                                 Flags: zero.                                               */
76893 +                            /*   String: none.                                              */
76894 +    ,EV_RX_QUEUE_FULL       /**< Receive queue is full;
76895 +                                 Flags: zero.                                               */
76896 +                            /*   String: none.                                              */
76897 +    ,EV_INTR_QUEUE_FULL     /**< Interrupt queue overflow;
76898 +                                 Flags: zero.                                               */
76899 +                            /*   String: none.                                              */
76900 +    ,EV_NO_DATA_BUFFER      /**< Data buffer allocation (from higher layer) failed;
76901 +                                 Flags: zero.                                               */
76902 +                            /*   String: none.                                              */
76903 +    ,EV_OBJ_POOL_EMPTY      /**< Objects pool is empty;
76904 +                                 Flags: zero.                                               */
76905 +                            /*   String: object description (name).                         */
76906 +    ,EV_BUS_ERROR           /**< Illegal access on bus;
76907 +                                 Flags: the address (if available) or bus identifier        */
76908 +                            /*   String: bus/address/module description.                    */
76909 +    ,EV_PTP_TXTS_QUEUE_FULL /**< PTP Tx timestamps queue is full;
76910 +                                 Flags: zero.                                               */
76911 +                            /*   String: none.                                              */
76912 +    ,EV_PTP_RXTS_QUEUE_FULL /**< PTP Rx timestamps queue is full;
76913 +                                 Flags: zero.                                               */
76914 +                            /*   String: none.                                              */
76915 +    ,EV_DUMMY_LAST
76916 +
76917 +} e_Event;
76918 +
76919 +
76920 +/**************************************************************************//**
76921 + @Collection    Debug Levels for Errors and Events
76922 +
76923 +                The level description refers to errors only.
76924 +                For events, classification is done by the user.
76925 +
76926 +                The TRACE, INFO and WARNING levels are allowed only when using
76927 +                the DBG macro, and are not allowed when using the error macros
76928 +                (RETURN_ERROR or REPORT_ERROR).
76929 + @{
76930 +*//***************************************************************************/
76931 +#define REPORT_LEVEL_CRITICAL   1       /**< Crasher: Incorrect flow, NULL pointers/handles. */
76932 +#define REPORT_LEVEL_MAJOR      2       /**< Cannot proceed: Invalid operation, parameters or
76933 +                                             configuration. */
76934 +#define REPORT_LEVEL_MINOR      3       /**< Recoverable problem: a repeating call with the same
76935 +                                             parameters may be successful. */
76936 +#define REPORT_LEVEL_WARNING    4       /**< Something is not exactly right, yet it is not an error. */
76937 +#define REPORT_LEVEL_INFO       5       /**< Messages which may be of interest to user/programmer. */
76938 +#define REPORT_LEVEL_TRACE      6       /**< Program flow messages. */
76939 +
76940 +#define EVENT_DISABLED          0xFF    /**< Disabled event (not reported at all) */
76941 +
76942 +/* @} */
76943 +
76944 +
76945 +
76946 +#define NO_MSG      ("")
76947 +
76948 +#ifndef DEBUG_GLOBAL_LEVEL
76949 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_WARNING
76950 +#endif /* DEBUG_GLOBAL_LEVEL */
76951 +
76952 +#ifndef ERROR_GLOBAL_LEVEL
76953 +#define ERROR_GLOBAL_LEVEL  DEBUG_GLOBAL_LEVEL
76954 +#endif /* ERROR_GLOBAL_LEVEL */
76955 +
76956 +#ifndef EVENT_GLOBAL_LEVEL
76957 +#define EVENT_GLOBAL_LEVEL  REPORT_LEVEL_MINOR
76958 +#endif /* EVENT_GLOBAL_LEVEL */
76959 +
76960 +#ifdef EVENT_LOCAL_LEVEL
76961 +#define EVENT_DYNAMIC_LEVEL EVENT_LOCAL_LEVEL
76962 +#else
76963 +#define EVENT_DYNAMIC_LEVEL EVENT_GLOBAL_LEVEL
76964 +#endif /* EVENT_LOCAL_LEVEL */
76965 +
76966 +
76967 +#ifndef DEBUG_DYNAMIC_LEVEL
76968 +#define DEBUG_USING_STATIC_LEVEL
76969 +
76970 +#ifdef DEBUG_STATIC_LEVEL
76971 +#define DEBUG_DYNAMIC_LEVEL DEBUG_STATIC_LEVEL
76972 +#else
76973 +#define DEBUG_DYNAMIC_LEVEL DEBUG_GLOBAL_LEVEL
76974 +#endif /* DEBUG_STATIC_LEVEL */
76975 +
76976 +#else /* DEBUG_DYNAMIC_LEVEL */
76977 +#ifdef DEBUG_STATIC_LEVEL
76978 +#error "Please use either DEBUG_STATIC_LEVEL or DEBUG_DYNAMIC_LEVEL (not both)"
76979 +#else
76980 +int DEBUG_DYNAMIC_LEVEL = DEBUG_GLOBAL_LEVEL;
76981 +#endif /* DEBUG_STATIC_LEVEL */
76982 +#endif /* !DEBUG_DYNAMIC_LEVEL */
76983 +
76984 +
76985 +#ifndef ERROR_DYNAMIC_LEVEL
76986 +
76987 +#ifdef ERROR_STATIC_LEVEL
76988 +#define ERROR_DYNAMIC_LEVEL ERROR_STATIC_LEVEL
76989 +#else
76990 +#define ERROR_DYNAMIC_LEVEL ERROR_GLOBAL_LEVEL
76991 +#endif /* ERROR_STATIC_LEVEL */
76992 +
76993 +#else /* ERROR_DYNAMIC_LEVEL */
76994 +#ifdef ERROR_STATIC_LEVEL
76995 +#error "Please use either ERROR_STATIC_LEVEL or ERROR_DYNAMIC_LEVEL (not both)"
76996 +#else
76997 +int ERROR_DYNAMIC_LEVEL = ERROR_GLOBAL_LEVEL;
76998 +#endif /* ERROR_STATIC_LEVEL */
76999 +#endif /* !ERROR_DYNAMIC_LEVEL */
77000 +
77001 +#define PRINT_FORMAT        "[CPU%02d, %s:%d %s]"
77002 +#define PRINT_FMT_PARAMS    raw_smp_processor_id(), __FILE__, __LINE__, __FUNCTION__
77003 +
77004 +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
77005 +/* No debug/error/event messages at all */
77006 +#define DBG(_level, _vmsg)
77007 +
77008 +#define REPORT_ERROR(_level, _err, _vmsg)
77009 +
77010 +#define RETURN_ERROR(_level, _err, _vmsg) \
77011 +        return ERROR_CODE(_err)
77012 +
77013 +#if (REPORT_EVENTS > 0)
77014 +
77015 +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \
77016 +    do { \
77017 +        if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \
77018 +            XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \
77019 +        } \
77020 +    } while (0)
77021 +
77022 +#else
77023 +
77024 +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg)
77025 +
77026 +#endif /* (REPORT_EVENTS > 0) */
77027 +
77028 +
77029 +#else /* DEBUG_ERRORS > 0 */
77030 +
77031 +extern const char *dbgLevelStrings[];
77032 +extern const char *moduleStrings[];
77033 +#if (REPORT_EVENTS > 0)
77034 +extern const char *eventStrings[];
77035 +#endif /* (REPORT_EVENTS > 0) */
77036 +
77037 +char * ErrTypeStrings (e_ErrorType err);
77038 +
77039 +
77040 +#if ((defined(DEBUG_USING_STATIC_LEVEL)) && (DEBUG_DYNAMIC_LEVEL < REPORT_LEVEL_WARNING))
77041 +/* No need for DBG macro - debug level is higher anyway */
77042 +#define DBG(_level, _vmsg)
77043 +#else
77044 +#define DBG(_level, _vmsg) \
77045 +    do { \
77046 +        if (REPORT_LEVEL_##_level <= DEBUG_DYNAMIC_LEVEL) { \
77047 +            XX_Print("> %s (%s) " PRINT_FORMAT ": ", \
77048 +                     dbgLevelStrings[REPORT_LEVEL_##_level - 1], \
77049 +                     moduleStrings[__ERR_MODULE__ >> 16], \
77050 +                     PRINT_FMT_PARAMS); \
77051 +            XX_Print _vmsg; \
77052 +            XX_Print("\r\n"); \
77053 +        } \
77054 +    } while (0)
77055 +#endif /* (defined(DEBUG_USING_STATIC_LEVEL) && (DEBUG_DYNAMIC_LEVEL < WARNING)) */
77056 +
77057 +
77058 +#define REPORT_ERROR(_level, _err, _vmsg) \
77059 +    do { \
77060 +        if (REPORT_LEVEL_##_level <= ERROR_DYNAMIC_LEVEL) { \
77061 +            XX_Print("! %s %s Error " PRINT_FORMAT ": %s; ", \
77062 +                     dbgLevelStrings[REPORT_LEVEL_##_level - 1], \
77063 +                     moduleStrings[__ERR_MODULE__ >> 16], \
77064 +                     PRINT_FMT_PARAMS, \
77065 +                     ErrTypeStrings((e_ErrorType)GET_ERROR_TYPE(_err))); \
77066 +            XX_Print _vmsg; \
77067 +            XX_Print("\r\n"); \
77068 +        } \
77069 +    } while (0)
77070 +
77071 +
77072 +#define RETURN_ERROR(_level, _err, _vmsg) \
77073 +    do { \
77074 +        REPORT_ERROR(_level, (_err), _vmsg); \
77075 +        return ERROR_CODE(_err); \
77076 +    } while (0)
77077 +
77078 +
77079 +#if (REPORT_EVENTS > 0)
77080 +
77081 +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \
77082 +    do { \
77083 +        if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \
77084 +            XX_Print("~ %s %s Event " PRINT_FORMAT ": %s (flags: 0x%04x); ", \
77085 +                     dbgLevelStrings[_ev##_LEVEL - 1], \
77086 +                     moduleStrings[__ERR_MODULE__ >> 16], \
77087 +                     PRINT_FMT_PARAMS, \
77088 +                     eventStrings[((_ev) - EV_NO_EVENT - 1)], \
77089 +                     (uint16_t)(_flg)); \
77090 +            XX_Print _vmsg; \
77091 +            XX_Print("\r\n"); \
77092 +            XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \
77093 +        } \
77094 +    } while (0)
77095 +
77096 +#else /* not REPORT_EVENTS */
77097 +
77098 +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg)
77099 +
77100 +#endif /* (REPORT_EVENTS > 0) */
77101 +
77102 +#endif /* (DEBUG_ERRORS > 0) */
77103 +
77104 +
77105 +/**************************************************************************//**
77106 + @Function      ASSERT_COND
77107 +
77108 + @Description   Assertion macro.
77109 +
77110 + @Param[in]     _cond - The condition being checked, in positive form;
77111 +                        Failure of the condition triggers the assert.
77112 +*//***************************************************************************/
77113 +#ifdef DISABLE_ASSERTIONS
77114 +#define ASSERT_COND(_cond)
77115 +#else
77116 +#define ASSERT_COND(_cond) \
77117 +    do { \
77118 +        if (!(_cond)) { \
77119 +            XX_Print("*** ASSERT_COND failed " PRINT_FORMAT "\r\n", \
77120 +                    PRINT_FMT_PARAMS); \
77121 +            XX_Exit(1); \
77122 +        } \
77123 +    } while (0)
77124 +#endif /* DISABLE_ASSERTIONS */
77125 +
77126 +
77127 +#ifdef DISABLE_INIT_PARAMETERS_CHECK
77128 +
77129 +#define CHECK_INIT_PARAMETERS(handle, f_check)
77130 +#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval)
77131 +
77132 +#else
77133 +
77134 +#define CHECK_INIT_PARAMETERS(handle, f_check) \
77135 +    do { \
77136 +        t_Error err = f_check(handle); \
77137 +        if (err != E_OK) { \
77138 +            RETURN_ERROR(MAJOR, err, NO_MSG); \
77139 +        } \
77140 +    } while (0)
77141 +
77142 +#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval) \
77143 +    do { \
77144 +        t_Error err = f_check(handle); \
77145 +        if (err != E_OK) { \
77146 +            REPORT_ERROR(MAJOR, err, NO_MSG); \
77147 +            return (retval); \
77148 +        } \
77149 +    } while (0)
77150 +
77151 +#endif /* DISABLE_INIT_PARAMETERS_CHECK */
77152 +
77153 +#ifdef DISABLE_SANITY_CHECKS
77154 +
77155 +#define SANITY_CHECK_RETURN_ERROR(_cond, _err)
77156 +#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval)
77157 +#define SANITY_CHECK_RETURN(_cond, _err)
77158 +#define SANITY_CHECK_EXIT(_cond, _err)
77159 +
77160 +#else /* DISABLE_SANITY_CHECKS */
77161 +
77162 +#define SANITY_CHECK_RETURN_ERROR(_cond, _err) \
77163 +    do { \
77164 +        if (!(_cond)) { \
77165 +            RETURN_ERROR(CRITICAL, (_err), NO_MSG); \
77166 +        } \
77167 +    } while (0)
77168 +
77169 +#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval) \
77170 +    do { \
77171 +        if (!(_cond)) { \
77172 +            REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
77173 +            return (retval); \
77174 +        } \
77175 +    } while (0)
77176 +
77177 +#define SANITY_CHECK_RETURN(_cond, _err) \
77178 +    do { \
77179 +        if (!(_cond)) { \
77180 +            REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
77181 +            return; \
77182 +        } \
77183 +    } while (0)
77184 +
77185 +#define SANITY_CHECK_EXIT(_cond, _err) \
77186 +    do { \
77187 +        if (!(_cond)) { \
77188 +            REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
77189 +            XX_Exit(1); \
77190 +        } \
77191 +    } while (0)
77192 +
77193 +#endif /* DISABLE_SANITY_CHECKS */
77194 +
77195 +/** @} */ /* end of Debug/error Utils group */
77196 +
77197 +/** @} */ /* end of General Utils group */
77198 +
77199 +#endif /* __ERROR_EXT_H */
77200 +
77201 +
77202 --- /dev/null
77203 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/list_ext.h
77204 @@ -0,0 +1,358 @@
77205 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
77206 + * All rights reserved.
77207 + *
77208 + * Redistribution and use in source and binary forms, with or without
77209 + * modification, are permitted provided that the following conditions are met:
77210 + *     * Redistributions of source code must retain the above copyright
77211 + *       notice, this list of conditions and the following disclaimer.
77212 + *     * Redistributions in binary form must reproduce the above copyright
77213 + *       notice, this list of conditions and the following disclaimer in the
77214 + *       documentation and/or other materials provided with the distribution.
77215 + *     * Neither the name of Freescale Semiconductor nor the
77216 + *       names of its contributors may be used to endorse or promote products
77217 + *       derived from this software without specific prior written permission.
77218 + *
77219 + *
77220 + * ALTERNATIVELY, this software may be distributed under the terms of the
77221 + * GNU General Public License ("GPL") as published by the Free Software
77222 + * Foundation, either version 2 of that License or (at your option) any
77223 + * later version.
77224 + *
77225 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
77226 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
77227 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
77228 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
77229 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
77230 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
77231 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
77232 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
77233 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
77234 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
77235 + */
77236 +
77237 +
77238 +/**************************************************************************//**
77239 +
77240 + @File          list_ext.h
77241 +
77242 + @Description   External prototypes for list.c
77243 +*//***************************************************************************/
77244 +
77245 +#ifndef __LIST_EXT_H
77246 +#define __LIST_EXT_H
77247 +
77248 +
77249 +#include "std_ext.h"
77250 +
77251 +
77252 +/**************************************************************************//**
77253 + @Group         etc_id   Utility Library Application Programming Interface
77254 +
77255 + @Description   External routines.
77256 +
77257 + @{
77258 +*//***************************************************************************/
77259 +
77260 +/**************************************************************************//**
77261 + @Group         list_id List
77262 +
77263 + @Description   List module functions,definitions and enums.
77264 +
77265 + @{
77266 +*//***************************************************************************/
77267 +
77268 +/**************************************************************************//**
77269 + @Description   List structure.
77270 +*//***************************************************************************/
77271 +typedef struct List
77272 +{
77273 +    struct List *p_Next;  /**< A pointer to the next list object     */
77274 +    struct List *p_Prev;  /**< A pointer to the previous list object */
77275 +} t_List;
77276 +
77277 +
77278 +/**************************************************************************//**
77279 + @Function      LIST_FIRST/LIST_LAST/LIST_NEXT/LIST_PREV
77280 +
77281 + @Description   Macro to get first/last/next/previous entry in a list.
77282 +
77283 + @Param[in]     p_List - A pointer to a list.
77284 +*//***************************************************************************/
77285 +#define LIST_FIRST(p_List) (p_List)->p_Next
77286 +#define LIST_LAST(p_List)  (p_List)->p_Prev
77287 +#define LIST_NEXT          LIST_FIRST
77288 +#define LIST_PREV          LIST_LAST
77289 +
77290 +
77291 +/**************************************************************************//**
77292 + @Function      LIST_INIT
77293 +
77294 + @Description   Macro for initialization of a list struct.
77295 +
77296 + @Param[in]     lst - The t_List object to initialize.
77297 +*//***************************************************************************/
77298 +#define LIST_INIT(lst) {&(lst), &(lst)}
77299 +
77300 +
77301 +/**************************************************************************//**
77302 + @Function      LIST
77303 +
77304 + @Description   Macro to declare of a list.
77305 +
77306 + @Param[in]     listName - The list object name.
77307 +*//***************************************************************************/
77308 +#define LIST(listName) t_List listName = LIST_INIT(listName)
77309 +
77310 +
77311 +/**************************************************************************//**
77312 + @Function      INIT_LIST
77313 +
77314 + @Description   Macro to initialize a list pointer.
77315 +
77316 + @Param[in]     p_List - The list pointer.
77317 +*//***************************************************************************/
77318 +#define INIT_LIST(p_List)   LIST_FIRST(p_List) = LIST_LAST(p_List) = (p_List)
77319 +
77320 +
77321 +/**************************************************************************//**
77322 + @Function      LIST_OBJECT
77323 +
77324 + @Description   Macro to get the struct (object) for this entry.
77325 +
77326 + @Param[in]     type   - The type of the struct (object) this list is embedded in.
77327 + @Param[in]     member - The name of the t_List object within the struct.
77328 +
77329 + @Return        The structure pointer for this entry.
77330 +*//***************************************************************************/
77331 +#define MEMBER_OFFSET(type, member) (PTR_TO_UINT(&((type *)0)->member))
77332 +#define LIST_OBJECT(p_List, type, member) \
77333 +    ((type *)((char *)(p_List)-MEMBER_OFFSET(type, member)))
77334 +
77335 +
77336 +/**************************************************************************//**
77337 + @Function      LIST_FOR_EACH
77338 +
77339 + @Description   Macro to iterate over a list.
77340 +
77341 + @Param[in]     p_Pos  - A pointer to a list to use as a loop counter.
77342 + @Param[in]     p_Head - A pointer to the head for your list pointer.
77343 +
77344 + @Cautions      You can't delete items with this routine.
77345 +                For deletion use LIST_FOR_EACH_SAFE().
77346 +*//***************************************************************************/
77347 +#define LIST_FOR_EACH(p_Pos, p_Head) \
77348 +    for (p_Pos = LIST_FIRST(p_Head); p_Pos != (p_Head); p_Pos = LIST_NEXT(p_Pos))
77349 +
77350 +
77351 +/**************************************************************************//**
77352 + @Function      LIST_FOR_EACH_SAFE
77353 +
77354 + @Description   Macro to iterate over a list safe against removal of list entry.
77355 +
77356 + @Param[in]     p_Pos  - A pointer to a list to use as a loop counter.
77357 + @Param[in]     p_Tmp  - Another pointer to a list to use as temporary storage.
77358 + @Param[in]     p_Head - A pointer to the head for your list pointer.
77359 +*//***************************************************************************/
77360 +#define LIST_FOR_EACH_SAFE(p_Pos, p_Tmp, p_Head)                \
77361 +    for (p_Pos = LIST_FIRST(p_Head), p_Tmp = LIST_FIRST(p_Pos); \
77362 +         p_Pos != (p_Head);                                     \
77363 +         p_Pos = p_Tmp, p_Tmp = LIST_NEXT(p_Pos))
77364 +
77365 +
77366 +/**************************************************************************//**
77367 + @Function      LIST_FOR_EACH_OBJECT_SAFE
77368 +
77369 + @Description   Macro to iterate over list of given type safely.
77370 +
77371 + @Param[in]     p_Pos  - A pointer to a list to use as a loop counter.
77372 + @Param[in]     p_Tmp  - Another pointer to a list to use as temporary storage.
77373 + @Param[in]     type   - The type of the struct this is embedded in.
77374 + @Param[in]     p_Head - A pointer to the head for your list pointer.
77375 + @Param[in]     member - The name of the list_struct within the struct.
77376 +
77377 + @Cautions      You can't delete items with this routine.
77378 +                For deletion use LIST_FOR_EACH_SAFE().
77379 +*//***************************************************************************/
77380 +#define LIST_FOR_EACH_OBJECT_SAFE(p_Pos, p_Tmp, p_Head, type, member)      \
77381 +    for (p_Pos = LIST_OBJECT(LIST_FIRST(p_Head), type, member),            \
77382 +         p_Tmp = LIST_OBJECT(LIST_FIRST(&p_Pos->member), type, member);    \
77383 +         &p_Pos->member != (p_Head);                                       \
77384 +         p_Pos = p_Tmp,                                                    \
77385 +         p_Tmp = LIST_OBJECT(LIST_FIRST(&p_Pos->member), type, member))
77386 +
77387 +/**************************************************************************//**
77388 + @Function      LIST_FOR_EACH_OBJECT
77389 +
77390 + @Description   Macro to iterate over list of given type.
77391 +
77392 + @Param[in]     p_Pos  - A pointer to a list to use as a loop counter.
77393 + @Param[in]     type   - The type of the struct this is embedded in.
77394 + @Param[in]     p_Head - A pointer to the head for your list pointer.
77395 + @Param[in]     member - The name of the list_struct within the struct.
77396 +
77397 + @Cautions      You can't delete items with this routine.
77398 +                For deletion use LIST_FOR_EACH_SAFE().
77399 +*//***************************************************************************/
77400 +#define LIST_FOR_EACH_OBJECT(p_Pos, type, p_Head, member)                  \
77401 +    for (p_Pos = LIST_OBJECT(LIST_FIRST(p_Head), type, member);            \
77402 +         &p_Pos->member != (p_Head);                                       \
77403 +         p_Pos = LIST_OBJECT(LIST_FIRST(&(p_Pos->member)), type, member))
77404 +
77405 +
77406 +/**************************************************************************//**
77407 + @Function      LIST_Add
77408 +
77409 + @Description   Add a new entry to a list.
77410 +
77411 +                Insert a new entry after the specified head.
77412 +                This is good for implementing stacks.
77413 +
77414 + @Param[in]     p_New  - A pointer to a new list entry to be added.
77415 + @Param[in]     p_Head - A pointer to a list head to add it after.
77416 +
77417 + @Return        none.
77418 +*//***************************************************************************/
77419 +static __inline__ void LIST_Add(t_List *p_New, t_List *p_Head)
77420 +{
77421 +    LIST_PREV(LIST_NEXT(p_Head)) = p_New;
77422 +    LIST_NEXT(p_New)             = LIST_NEXT(p_Head);
77423 +    LIST_PREV(p_New)             = p_Head;
77424 +    LIST_NEXT(p_Head)            = p_New;
77425 +}
77426 +
77427 +
77428 +/**************************************************************************//**
77429 + @Function      LIST_AddToTail
77430 +
77431 + @Description   Add a new entry to a list.
77432 +
77433 +                Insert a new entry before the specified head.
77434 +                This is useful for implementing queues.
77435 +
77436 + @Param[in]     p_New  - A pointer to a new list entry to be added.
77437 + @Param[in]     p_Head - A pointer to a list head to add it before.
77438 +
77439 + @Return        none.
77440 +*//***************************************************************************/
77441 +static __inline__ void LIST_AddToTail(t_List *p_New, t_List *p_Head)
77442 +{
77443 +    LIST_NEXT(LIST_PREV(p_Head)) = p_New;
77444 +    LIST_PREV(p_New)             = LIST_PREV(p_Head);
77445 +    LIST_NEXT(p_New)             = p_Head;
77446 +    LIST_PREV(p_Head)            = p_New;
77447 +}
77448 +
77449 +
77450 +/**************************************************************************//**
77451 + @Function      LIST_Del
77452 +
77453 + @Description   Deletes entry from a list.
77454 +
77455 + @Param[in]     p_Entry - A pointer to the element to delete from the list.
77456 +
77457 + @Return        none.
77458 +
77459 + @Cautions      LIST_IsEmpty() on entry does not return true after this,
77460 +                the entry is in an undefined state.
77461 +*//***************************************************************************/
77462 +static __inline__ void LIST_Del(t_List *p_Entry)
77463 +{
77464 +    LIST_PREV(LIST_NEXT(p_Entry)) = LIST_PREV(p_Entry);
77465 +    LIST_NEXT(LIST_PREV(p_Entry)) = LIST_NEXT(p_Entry);
77466 +}
77467 +
77468 +
77469 +/**************************************************************************//**
77470 + @Function      LIST_DelAndInit
77471 +
77472 + @Description   Deletes entry from list and reinitialize it.
77473 +
77474 + @Param[in]     p_Entry - A pointer to the element to delete from the list.
77475 +
77476 + @Return        none.
77477 +*//***************************************************************************/
77478 +static __inline__ void LIST_DelAndInit(t_List *p_Entry)
77479 +{
77480 +    LIST_Del(p_Entry);
77481 +    INIT_LIST(p_Entry);
77482 +}
77483 +
77484 +
77485 +/**************************************************************************//**
77486 + @Function      LIST_Move
77487 +
77488 + @Description   Delete from one list and add as another's head.
77489 +
77490 + @Param[in]     p_Entry - A pointer to the list entry to move.
77491 + @Param[in]     p_Head  - A pointer to the list head that will precede our entry.
77492 +
77493 + @Return        none.
77494 +*//***************************************************************************/
77495 +static __inline__ void LIST_Move(t_List *p_Entry, t_List *p_Head)
77496 +{
77497 +    LIST_Del(p_Entry);
77498 +    LIST_Add(p_Entry, p_Head);
77499 +}
77500 +
77501 +
77502 +/**************************************************************************//**
77503 + @Function      LIST_MoveToTail
77504 +
77505 + @Description   Delete from one list and add as another's tail.
77506 +
77507 + @Param[in]     p_Entry - A pointer to the entry to move.
77508 + @Param[in]     p_Head  - A pointer to the list head that will follow our entry.
77509 +
77510 + @Return        none.
77511 +*//***************************************************************************/
77512 +static __inline__ void LIST_MoveToTail(t_List *p_Entry, t_List *p_Head)
77513 +{
77514 +    LIST_Del(p_Entry);
77515 +    LIST_AddToTail(p_Entry, p_Head);
77516 +}
77517 +
77518 +
77519 +/**************************************************************************//**
77520 + @Function      LIST_IsEmpty
77521 +
77522 + @Description   Tests whether a list is empty.
77523 +
77524 + @Param[in]     p_List - A pointer to the list to test.
77525 +
77526 + @Return        1 if the list is empty, 0 otherwise.
77527 +*//***************************************************************************/
77528 +static __inline__ int LIST_IsEmpty(t_List *p_List)
77529 +{
77530 +    return (LIST_FIRST(p_List) == p_List);
77531 +}
77532 +
77533 +
77534 +/**************************************************************************//**
77535 + @Function      LIST_Append
77536 +
77537 + @Description   Join two lists.
77538 +
77539 + @Param[in]     p_NewList - A pointer to the new list to add.
77540 + @Param[in]     p_Head    - A pointer to the place to add it in the first list.
77541 +
77542 + @Return        none.
77543 +*//***************************************************************************/
77544 +void LIST_Append(t_List *p_NewList, t_List *p_Head);
77545 +
77546 +
77547 +/**************************************************************************//**
77548 + @Function      LIST_NumOfObjs
77549 +
77550 + @Description   Counts number of objects in the list
77551 +
77552 + @Param[in]     p_List - A pointer to the list which objects are to be counted.
77553 +
77554 + @Return        Number of objects in the list.
77555 +*//***************************************************************************/
77556 +int LIST_NumOfObjs(t_List *p_List);
77557 +
77558 +/** @} */ /* end of list_id group */
77559 +/** @} */ /* end of etc_id group */
77560 +
77561 +
77562 +#endif /* __LIST_EXT_H */
77563 --- /dev/null
77564 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/mem_ext.h
77565 @@ -0,0 +1,318 @@
77566 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
77567 + * All rights reserved.
77568 + *
77569 + * Redistribution and use in source and binary forms, with or without
77570 + * modification, are permitted provided that the following conditions are met:
77571 + *     * Redistributions of source code must retain the above copyright
77572 + *       notice, this list of conditions and the following disclaimer.
77573 + *     * Redistributions in binary form must reproduce the above copyright
77574 + *       notice, this list of conditions and the following disclaimer in the
77575 + *       documentation and/or other materials provided with the distribution.
77576 + *     * Neither the name of Freescale Semiconductor nor the
77577 + *       names of its contributors may be used to endorse or promote products
77578 + *       derived from this software without specific prior written permission.
77579 + *
77580 + *
77581 + * ALTERNATIVELY, this software may be distributed under the terms of the
77582 + * GNU General Public License ("GPL") as published by the Free Software
77583 + * Foundation, either version 2 of that License or (at your option) any
77584 + * later version.
77585 + *
77586 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
77587 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
77588 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
77589 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
77590 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
77591 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
77592 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
77593 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
77594 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
77595 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
77596 + */
77597 +
77598 +
77599 +/**************************************************************************//**
77600 +
77601 + @File          mem_ext.h
77602 +
77603 + @Description   External prototypes for the memory manager object
77604 +*//***************************************************************************/
77605 +
77606 +#ifndef __MEM_EXT_H
77607 +#define __MEM_EXT_H
77608 +
77609 +#include "std_ext.h"
77610 +#include "part_ext.h"
77611 +
77612 +
77613 +/**************************************************************************//**
77614 + @Group         etc_id   Utility Library Application Programming Interface
77615 +
77616 + @Description   External routines.
77617 +
77618 + @{
77619 +*//***************************************************************************/
77620 +
77621 +/**************************************************************************//**
77622 + @Group         mem_id   Slab Memory Manager
77623 +
77624 + @Description   Slab Memory Manager module functions, definitions and enums.
77625 +
77626 + @{
77627 +*//***************************************************************************/
77628 +
77629 +/* Each block is of the following structure:
77630 + *
77631 + *
77632 + *  +-----------+----------+---------------------------+-----------+-----------+
77633 + *  | Alignment |  Prefix  | Data                      | Postfix   | Alignment |
77634 + *  |  field    |   field  |  field                    |   field   | Padding   |
77635 + *  |           |          |                           |           |           |
77636 + *  +-----------+----------+---------------------------+-----------+-----------+
77637 + *  and at the beginning of all bytes, an additional optional padding might reside
77638 + *  to ensure that the first blocks data field is aligned as requested.
77639 + */
77640 +
77641 +
77642 +#define MEM_MAX_NAME_LENGTH     8
77643 +
77644 +/**************************************************************************//*
77645 + @Description   Memory Segment structure
77646 +*//***************************************************************************/
77647 +
77648 +typedef struct
77649 +{
77650 +    char        name[MEM_MAX_NAME_LENGTH];
77651 +                                    /* The segment's name */
77652 +    uint8_t     **p_Bases;          /* Base addresses of the segments */
77653 +    uint8_t     **p_BlocksStack;    /* Array of pointers to blocks */
77654 +    t_Handle    h_Spinlock;
77655 +    uint16_t    dataSize;           /* Size of each data block */
77656 +    uint16_t    prefixSize;         /* How many bytes to reserve before the data */
77657 +    uint16_t    postfixSize;        /* How many bytes to reserve after the data */
77658 +    uint16_t    alignment;          /* Requested alignment for the data field */
77659 +    int         allocOwner;         /* Memory allocation owner */
77660 +    uint32_t    getFailures;        /* Number of times get failed */
77661 +    uint32_t    num;                /* Number of blocks in segment */
77662 +    uint32_t    current;            /* Current block */
77663 +    bool        consecutiveMem;     /* Allocate consecutive data blocks memory */
77664 +#ifdef DEBUG_MEM_LEAKS
77665 +    void        *p_MemDbg;          /* MEM debug database (MEM leaks detection) */
77666 +    uint32_t    blockOffset;
77667 +    uint32_t    blockSize;
77668 +#endif /* DEBUG_MEM_LEAKS */
77669 +} t_MemorySegment;
77670 +
77671 +
77672 +
77673 +/**************************************************************************//**
77674 + @Function      MEM_Init
77675 +
77676 + @Description   Create a new memory segment.
77677 +
77678 + @Param[in]     name        - Name of memory partition.
77679 + @Param[in]     p_Handle    - Handle to new segment is returned through here.
77680 + @Param[in]     num         - Number of blocks in new segment.
77681 + @Param[in]     dataSize    - Size of blocks in segment.
77682 + @Param[in]     prefixSize  - How many bytes to allocate before the data.
77683 + @Param[in]     postfixSize - How many bytes to allocate after the data.
77684 + @Param[in]     alignment   - Requested alignment for data field (in bytes).
77685 +
77686 + @Return        E_OK - success, E_NO_MEMORY - out of memory.
77687 +*//***************************************************************************/
77688 +t_Error MEM_Init(char     name[],
77689 +                 t_Handle *p_Handle,
77690 +                 uint32_t num,
77691 +                 uint16_t dataSize,
77692 +                 uint16_t prefixSize,
77693 +                 uint16_t postfixSize,
77694 +                 uint16_t alignment);
77695 +
77696 +/**************************************************************************//**
77697 + @Function      MEM_InitSmart
77698 +
77699 + @Description   Create a new memory segment.
77700 +
77701 + @Param[in]     name            - Name of memory partition.
77702 + @Param[in]     p_Handle        - Handle to new segment is returned through here.
77703 + @Param[in]     num             - Number of blocks in new segment.
77704 + @Param[in]     dataSize        - Size of blocks in segment.
77705 + @Param[in]     prefixSize      - How many bytes to allocate before the data.
77706 + @Param[in]     postfixSize     - How many bytes to allocate after the data.
77707 + @Param[in]     alignment       - Requested alignment for data field (in bytes).
77708 + @Param[in]     memPartitionId  - Memory partition ID for allocation.
77709 + @Param[in]     consecutiveMem  - Whether to allocate the memory blocks
77710 +                                  continuously or not.
77711 +
77712 + @Return        E_OK - success, E_NO_MEMORY - out of memory.
77713 +*//***************************************************************************/
77714 +t_Error MEM_InitSmart(char      name[],
77715 +                      t_Handle  *p_Handle,
77716 +                      uint32_t  num,
77717 +                      uint16_t  dataSize,
77718 +                      uint16_t  prefixSize,
77719 +                      uint16_t  postfixSize,
77720 +                      uint16_t  alignment,
77721 +                      uint8_t   memPartitionId,
77722 +                      bool      consecutiveMem);
77723 +
77724 +/**************************************************************************//**
77725 + @Function      MEM_InitByAddress
77726 +
77727 + @Description   Create a new memory segment with a specified base address.
77728 +
77729 + @Param[in]     name        - Name of memory partition.
77730 + @Param[in]     p_Handle    - Handle to new segment is returned through here.
77731 + @Param[in]     num         - Number of blocks in new segment.
77732 + @Param[in]     dataSize    - Size of blocks in segment.
77733 + @Param[in]     prefixSize  - How many bytes to allocate before the data.
77734 + @Param[in]     postfixSize - How many bytes to allocate after the data.
77735 + @Param[in]     alignment   - Requested alignment for data field (in bytes).
77736 + @Param[in]     address     - The required base address.
77737 +
77738 + @Return        E_OK - success, E_NO_MEMORY - out of memory.
77739 + *//***************************************************************************/
77740 +t_Error MEM_InitByAddress(char        name[],
77741 +                          t_Handle    *p_Handle,
77742 +                          uint32_t    num,
77743 +                          uint16_t    dataSize,
77744 +                          uint16_t    prefixSize,
77745 +                          uint16_t    postfixSize,
77746 +                          uint16_t    alignment,
77747 +                          uint8_t     *address);
77748 +
77749 +/**************************************************************************//**
77750 + @Function      MEM_Free
77751 +
77752 + @Description   Free a specific memory segment.
77753 +
77754 + @Param[in]     h_Mem - Handle to memory segment.
77755 +
77756 + @Return        None.
77757 +*//***************************************************************************/
77758 +void MEM_Free(t_Handle h_Mem);
77759 +
77760 +/**************************************************************************//**
77761 + @Function      MEM_Get
77762 +
77763 + @Description   Get a block of memory from a segment.
77764 +
77765 + @Param[in]     h_Mem - Handle to memory segment.
77766 +
77767 + @Return        Pointer to new memory block on success,0 otherwise.
77768 +*//***************************************************************************/
77769 +void * MEM_Get(t_Handle h_Mem);
77770 +
77771 +/**************************************************************************//**
77772 + @Function      MEM_GetN
77773 +
77774 + @Description   Get up to N blocks of memory from a segment.
77775 +
77776 +                The blocks are assumed to be of a fixed size (one size per segment).
77777 +
77778 + @Param[in]     h_Mem   - Handle to memory segment.
77779 + @Param[in]     num     - Number of blocks to allocate.
77780 + @Param[out]    array   - Array of at least num pointers to which the addresses
77781 +                          of the allocated blocks are written.
77782 +
77783 + @Return        The number of blocks actually allocated.
77784 +
77785 + @Cautions      Interrupts are disabled for all of the allocation loop.
77786 +                Although this loop is very short for each block (several machine
77787 +                instructions), you should not allocate a very large number
77788 +                of blocks via this routine.
77789 +*//***************************************************************************/
77790 +uint16_t MEM_GetN(t_Handle h_Mem, uint32_t num, void *array[]);
77791 +
77792 +/**************************************************************************//**
77793 + @Function      MEM_Put
77794 +
77795 + @Description   Put a block of memory back to a segment.
77796 +
77797 + @Param[in]     h_Mem   - Handle to memory segment.
77798 + @Param[in]     p_Block - The block to return.
77799 +
77800 + @Return        Pointer to new memory block on success,0 otherwise.
77801 +*//***************************************************************************/
77802 +t_Error MEM_Put(t_Handle h_Mem, void *p_Block);
77803 +
77804 +/**************************************************************************//**
77805 + @Function      MEM_ComputePartitionSize
77806 +
77807 + @Description   calculate a tight upper boundary of the size of a partition with
77808 +                given attributes.
77809 +
77810 +                The returned value is suitable if one wants to use MEM_InitByAddress().
77811 +
77812 + @Param[in]     num         - The number of blocks in the segment.
77813 + @Param[in]     dataSize    - Size of block to get.
77814 + @Param[in]     prefixSize  - The prefix size
77815 + @Param         postfixSize - The postfix size
77816 + @Param[in]     alignment   - The requested alignment value (in bytes)
77817 +
77818 + @Return        The memory block size a segment with the given attributes needs.
77819 +*//***************************************************************************/
77820 +uint32_t MEM_ComputePartitionSize(uint32_t num,
77821 +                                  uint16_t dataSize,
77822 +                                  uint16_t prefixSize,
77823 +                                  uint16_t postfixSize,
77824 +                                  uint16_t alignment);
77825 +
77826 +#ifdef DEBUG_MEM_LEAKS
77827 +#if !((defined(__MWERKS__) || defined(__GNUC__)) && (__dest_os == __ppc_eabi))
77828 +#error  "Memory-Leaks-Debug option is supported only for freescale CodeWarrior"
77829 +#endif /* !(defined(__MWERKS__) && ... */
77830 +
77831 +/**************************************************************************//**
77832 + @Function      MEM_CheckLeaks
77833 +
77834 + @Description   Report MEM object leaks.
77835 +
77836 +                This routine is automatically called by the MEM_Free() routine,
77837 +                but it can also be invoked while the MEM object is alive.
77838 +
77839 + @Param[in]     h_Mem - Handle to memory segment.
77840 +
77841 + @Return        None.
77842 +*//***************************************************************************/
77843 +void MEM_CheckLeaks(t_Handle h_Mem);
77844 +
77845 +#else  /* not DEBUG_MEM_LEAKS */
77846 +#define MEM_CheckLeaks(h_Mem)
77847 +#endif /* not DEBUG_MEM_LEAKS */
77848 +
77849 +/**************************************************************************//**
77850 + @Description   Get base of MEM
77851 +*//***************************************************************************/
77852 +#define MEM_GetBase(h_Mem)             ((t_MemorySegment *)(h_Mem))->p_Bases[0]
77853 +
77854 +/**************************************************************************//**
77855 + @Description   Get size of MEM block
77856 +*//***************************************************************************/
77857 +#define MEM_GetSize(h_Mem)             ((t_MemorySegment *)(h_Mem))->dataSize
77858 +
77859 +/**************************************************************************//**
77860 + @Description   Get prefix size of MEM block
77861 +*//***************************************************************************/
77862 +#define MEM_GetPrefixSize(h_Mem)       ((t_MemorySegment *)(h_Mem))->prefixSize
77863 +
77864 +/**************************************************************************//**
77865 + @Description   Get postfix size of MEM block
77866 +*//***************************************************************************/
77867 +#define MEM_GetPostfixSize(h_Mem)      ((t_MemorySegment *)(h_Mem))->postfixSize
77868 +
77869 +/**************************************************************************//**
77870 + @Description   Get alignment of MEM block (in bytes)
77871 +*//***************************************************************************/
77872 +#define MEM_GetAlignment(h_Mem)        ((t_MemorySegment *)(h_Mem))->alignment
77873 +
77874 +/**************************************************************************//**
77875 + @Description   Get the number of blocks in the segment
77876 +*//***************************************************************************/
77877 +#define MEM_GetNumOfBlocks(h_Mem)             ((t_MemorySegment *)(h_Mem))->num
77878 +
77879 +/** @} */ /* end of MEM group */
77880 +/** @} */ /* end of etc_id group */
77881 +
77882 +
77883 +#endif /* __MEM_EXT_H */
77884 --- /dev/null
77885 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/memcpy_ext.h
77886 @@ -0,0 +1,208 @@
77887 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
77888 + * All rights reserved.
77889 + *
77890 + * Redistribution and use in source and binary forms, with or without
77891 + * modification, are permitted provided that the following conditions are met:
77892 + *     * Redistributions of source code must retain the above copyright
77893 + *       notice, this list of conditions and the following disclaimer.
77894 + *     * Redistributions in binary form must reproduce the above copyright
77895 + *       notice, this list of conditions and the following disclaimer in the
77896 + *       documentation and/or other materials provided with the distribution.
77897 + *     * Neither the name of Freescale Semiconductor nor the
77898 + *       names of its contributors may be used to endorse or promote products
77899 + *       derived from this software without specific prior written permission.
77900 + *
77901 + *
77902 + * ALTERNATIVELY, this software may be distributed under the terms of the
77903 + * GNU General Public License ("GPL") as published by the Free Software
77904 + * Foundation, either version 2 of that License or (at your option) any
77905 + * later version.
77906 + *
77907 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
77908 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
77909 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
77910 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
77911 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
77912 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
77913 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
77914 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
77915 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
77916 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
77917 + */
77918 +
77919 +
77920 +/**************************************************************************//**
77921 +
77922 + @File          memcpy_ext.h
77923 +
77924 + @Description   Efficient functions for copying and setting blocks of memory.
77925 +*//***************************************************************************/
77926 +
77927 +#ifndef __MEMCPY_EXT_H
77928 +#define __MEMCPY_EXT_H
77929 +
77930 +#include "std_ext.h"
77931 +
77932 +
77933 +/**************************************************************************//**
77934 + @Group         etc_id   Utility Library Application Programming Interface
77935 +
77936 + @Description   External routines.
77937 +
77938 + @{
77939 +*//***************************************************************************/
77940 +
77941 +/**************************************************************************//**
77942 + @Group         mem_cpy Memory Copy
77943 +
77944 + @Description   Memory Copy module functions,definitions and enums.
77945 +
77946 + @{
77947 +*//***************************************************************************/
77948 +
77949 +/**************************************************************************//**
77950 + @Function      MemCpy32
77951 +
77952 + @Description   Copies one memory buffer into another one in 4-byte chunks!
77953 +                Which should be more efficient than byte by byte.
77954 +
77955 +                For large buffers (over 60 bytes) this function is about 4 times
77956 +                more efficient than the trivial memory copy. For short buffers
77957 +                it is reduced to the trivial copy and may be a bit worse.
77958 +
77959 + @Param[in]     pDst    - The address of the destination buffer.
77960 + @Param[in]     pSrc    - The address of the source buffer.
77961 + @Param[in]     size    - The number of bytes that will be copied from pSrc to pDst.
77962 +
77963 + @Return        pDst (the address of the destination buffer).
77964 +
77965 + @Cautions      There is no parameter or boundary checking! It is up to the user
77966 +                to supply non-null parameters as source & destination and size
77967 +                that actually fits into the destination buffer.
77968 +*//***************************************************************************/
77969 +void * MemCpy32(void* pDst,void* pSrc, uint32_t size);
77970 +void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size);
77971 +void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size);
77972 +void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size);
77973 +
77974 +/**************************************************************************//**
77975 + @Function      MemCpy64
77976 +
77977 + @Description   Copies one memory buffer into another one in 8-byte chunks!
77978 +                Which should be more efficient than byte by byte.
77979 +
77980 +                For large buffers (over 60 bytes) this function is about 8 times
77981 +                more efficient than the trivial memory copy. For short buffers
77982 +                it is reduced to the trivial copy and may be a bit worse.
77983 +
77984 +                Some testing suggests that MemCpy32() preforms better than
77985 +                MemCpy64() over small buffers. On average they break even at
77986 +                100 byte buffers. For buffers larger than that MemCpy64 is
77987 +                superior.
77988 +
77989 + @Param[in]     pDst    - The address of the destination buffer.
77990 + @Param[in]     pSrc    - The address of the source buffer.
77991 + @Param[in]     size    - The number of bytes that will be copied from pSrc to pDst.
77992 +
77993 + @Return        pDst (the address of the destination buffer).
77994 +
77995 + @Cautions      There is no parameter or boundary checking! It is up to the user
77996 +                to supply non null parameters as source & destination and size
77997 +                that actually fits into their buffer.
77998 +
77999 +                Do not use under Linux.
78000 +*//***************************************************************************/
78001 +void * MemCpy64(void* pDst,void* pSrc, uint32_t size);
78002 +
78003 +/**************************************************************************//**
78004 + @Function      MemSet32
78005 +
78006 + @Description   Sets all bytes of a memory buffer to a specific value, in
78007 +                4-byte chunks.
78008 +
78009 + @Param[in]     pDst    - The address of the destination buffer.
78010 + @Param[in]     val     - Value to set destination bytes to.
78011 + @Param[in]     size    - The number of bytes that will be set to val.
78012 +
78013 + @Return        pDst (the address of the destination buffer).
78014 +
78015 + @Cautions      There is no parameter or boundary checking! It is up to the user
78016 +                to supply non null parameter as destination and size
78017 +                that actually fits into the destination buffer.
78018 +*//***************************************************************************/
78019 +void * MemSet32(void* pDst, uint8_t val, uint32_t size);
78020 +void * IOMemSet32(void* pDst, uint8_t val, uint32_t size);
78021 +
78022 +/**************************************************************************//**
78023 + @Function      MemSet64
78024 +
78025 + @Description   Sets all bytes of a memory buffer to a specific value, in
78026 +                8-byte chunks.
78027 +
78028 + @Param[in]     pDst    - The address of the destination buffer.
78029 + @Param[in]     val     - Value to set destination bytes to.
78030 + @Param[in]     size    - The number of bytes that will be set to val.
78031 +
78032 + @Return        pDst (the address of the destination buffer).
78033 +
78034 + @Cautions      There is no parameter or boundary checking! It is up to the user
78035 +                to supply non null parameter as destination and size
78036 +                that actually fits into the destination buffer.
78037 +*//***************************************************************************/
78038 +void * MemSet64(void* pDst, uint8_t val, uint32_t size);
78039 +
78040 +/**************************************************************************//**
78041 + @Function      MemDisp
78042 +
78043 + @Description   Displays a block of memory in chunks of 32 bits.
78044 +
78045 + @Param[in]     addr    - The address of the memory to display.
78046 + @Param[in]     size    - The number of bytes that will be displayed.
78047 +
78048 + @Return        None.
78049 +
78050 + @Cautions      There is no parameter or boundary checking! It is up to the user
78051 +                to supply non null parameter as destination and size
78052 +                that actually fits into the destination buffer.
78053 +*//***************************************************************************/
78054 +void MemDisp(uint8_t *addr, int size);
78055 +
78056 +/**************************************************************************//**
78057 + @Function      MemCpy8
78058 +
78059 + @Description   Trivial copy one memory buffer into another byte by byte
78060 +
78061 + @Param[in]     pDst    - The address of the destination buffer.
78062 + @Param[in]     pSrc    - The address of the source buffer.
78063 + @Param[in]     size    - The number of bytes that will be copied from pSrc to pDst.
78064 +
78065 + @Return        pDst (the address of the destination buffer).
78066 +
78067 + @Cautions      There is no parameter or boundary checking! It is up to the user
78068 +                to supply non-null parameters as source & destination and size
78069 +                that actually fits into the destination buffer.
78070 +*//***************************************************************************/
78071 +void * MemCpy8(void* pDst,void* pSrc, uint32_t size);
78072 +
78073 +/**************************************************************************//**
78074 + @Function      MemSet8
78075 +
78076 + @Description   Sets all bytes of a memory buffer to a specific value byte by byte.
78077 +
78078 + @Param[in]     pDst    - The address of the destination buffer.
78079 + @Param[in]     c       - Value to set destination bytes to.
78080 + @Param[in]     size    - The number of bytes that will be set to val.
78081 +
78082 + @Return        pDst (the address of the destination buffer).
78083 +
78084 + @Cautions      There is no parameter or boundary checking! It is up to the user
78085 +                to supply non null parameter as destination and size
78086 +                that actually fits into the destination buffer.
78087 +*//***************************************************************************/
78088 +void * MemSet8(void* pDst, int c, uint32_t size);
78089 +
78090 +/** @} */ /* end of mem_cpy group */
78091 +/** @} */ /* end of etc_id group */
78092 +
78093 +
78094 +#endif /* __MEMCPY_EXT_H */
78095 --- /dev/null
78096 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/mm_ext.h
78097 @@ -0,0 +1,310 @@
78098 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
78099 + * All rights reserved.
78100 + *
78101 + * Redistribution and use in source and binary forms, with or without
78102 + * modification, are permitted provided that the following conditions are met:
78103 + *     * Redistributions of source code must retain the above copyright
78104 + *       notice, this list of conditions and the following disclaimer.
78105 + *     * Redistributions in binary form must reproduce the above copyright
78106 + *       notice, this list of conditions and the following disclaimer in the
78107 + *       documentation and/or other materials provided with the distribution.
78108 + *     * Neither the name of Freescale Semiconductor nor the
78109 + *       names of its contributors may be used to endorse or promote products
78110 + *       derived from this software without specific prior written permission.
78111 + *
78112 + *
78113 + * ALTERNATIVELY, this software may be distributed under the terms of the
78114 + * GNU General Public License ("GPL") as published by the Free Software
78115 + * Foundation, either version 2 of that License or (at your option) any
78116 + * later version.
78117 + *
78118 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
78119 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
78120 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78121 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
78122 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78123 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
78124 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
78125 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
78126 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
78127 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78128 + */
78129 +
78130 +
78131 +/**************************************************************************//**
78132 + @File          mm_ext.h
78133 +
78134 + @Description   Memory Manager Application Programming Interface
78135 +*//***************************************************************************/
78136 +#ifndef __MM_EXT
78137 +#define __MM_EXT
78138 +
78139 +#include "std_ext.h"
78140 +
78141 +#define MM_MAX_ALIGNMENT    20  /* Alignments from 2 to 128 are available
78142 +                                   where maximum alignment defined as
78143 +                                   MM_MAX_ALIGNMENT power of 2 */
78144 +
78145 +#define MM_MAX_NAME_LEN     32
78146 +
78147 +/**************************************************************************//**
78148 + @Group         etc_id   Utility Library Application Programming Interface
78149 +
78150 + @Description   External routines.
78151 +
78152 + @{
78153 +*//***************************************************************************/
78154 +
78155 +/**************************************************************************//**
78156 + @Group         mm_grp Flexible Memory Manager
78157 +
78158 + @Description   Flexible Memory Manager module functions,definitions and enums.
78159 +                (All of the following functions,definitions and enums can be found in mm_ext.h)
78160 +
78161 + @{
78162 +*//***************************************************************************/
78163 +
78164 +
78165 +/**************************************************************************//**
78166 + @Function      MM_Init
78167 +
78168 + @Description   Initializes a new MM object.
78169 +
78170 +                It initializes a new memory block consisting of base address
78171 +                and size of the available memory by calling to MemBlock_Init
78172 +                routine. It is also initializes a new free block for each
78173 +                by calling FreeBlock_Init routine, which is pointed to
78174 +                the almost all memory started from the required alignment
78175 +                from the base address and to the end of the memory.
78176 +                The handle to the new MM object is returned via "MM"
78177 +                argument (passed by reference).
78178 +
78179 + @Param[in]     h_MM    - Handle to the MM object.
78180 + @Param[in]     base    - Base address of the MM.
78181 + @Param[in]     size    - Size of the MM.
78182 +
78183 + @Return        E_OK is returned on success. E_NOMEMORY is returned if the new MM object or a new free block can not be initialized.
78184 +*//***************************************************************************/
78185 +t_Error     MM_Init(t_Handle *h_MM, uint64_t base, uint64_t size);
78186 +
78187 +/**************************************************************************//**
78188 + @Function      MM_Get
78189 +
78190 + @Description   Allocates a block of memory according to the given size and the alignment.
78191 +
78192 +                The Alignment argument tells from which
78193 +                free list allocate a block of memory. 2^alignment indicates
78194 +                the alignment that the base address of the allocated block
78195 +                should have. So, the only values 1, 2, 4, 8, 16, 32 and 64
78196 +                are available for the alignment argument.
78197 +                The routine passes through the specific free list of free
78198 +                blocks and seeks for a first block that have anough memory
78199 +                that  is required (best fit).
78200 +                After the block is found and data is allocated, it calls
78201 +                the internal MM_CutFree routine to update all free lists
78202 +                do not include a just allocated block. Of course, each
78203 +                free list contains a free blocks with the same alignment.
78204 +                It is also creates a busy block that holds
78205 +                information about an allocated block.
78206 +
78207 + @Param[in]     h_MM        - Handle to the MM object.
78208 + @Param[in]     size        - Size of the MM.
78209 + @Param[in]     alignment   - Index as a power of two defines a required
78210 +                              alignment (in bytes); Should be 1, 2, 4, 8, 16, 32 or 64
78211 + @Param[in]     name        - The name that specifies an allocated block.
78212 +
78213 + @Return        base address of an allocated block ILLEGAL_BASE if can't allocate a block
78214 +*//***************************************************************************/
78215 +uint64_t    MM_Get(t_Handle h_MM, uint64_t size, uint64_t alignment, char *name);
78216 +
78217 +/**************************************************************************//**
78218 + @Function      MM_GetBase
78219 +
78220 + @Description   Gets the base address of the required MM objects.
78221 +
78222 + @Param[in]     h_MM - Handle to the MM object.
78223 +
78224 + @Return        base address of the block.
78225 +*//***************************************************************************/
78226 +uint64_t    MM_GetBase(t_Handle h_MM);
78227 +
78228 +/**************************************************************************//**
78229 + @Function      MM_GetForce
78230 +
78231 + @Description   Force memory allocation.
78232 +
78233 +                It means to allocate a block of memory of the given
78234 +                size from the given base address.
78235 +                The routine checks if the required block can be allocated
78236 +                (that is it is free) and then, calls the internal MM_CutFree
78237 +                routine to update all free lists do not include that block.
78238 +
78239 + @Param[in]     h_MM    - Handle to the MM object.
78240 + @Param[in]     base    - Base address of the MM.
78241 + @Param[in]     size    - Size of the MM.
78242 + @Param[in]     name    - Name that specifies an allocated block.
78243 +
78244 + @Return        base address of an allocated block, ILLEGAL_BASE if can't allocate a block.
78245 +*//***************************************************************************/
78246 +uint64_t    MM_GetForce(t_Handle h_MM, uint64_t base, uint64_t size, char *name);
78247 +
78248 +/**************************************************************************//**
78249 + @Function      MM_GetForceMin
78250 +
78251 + @Description   Allocates a block of memory according to the given size, the alignment and minimum base address.
78252 +
78253 +                The Alignment argument tells from which
78254 +                free list allocate a block of memory. 2^alignment indicates
78255 +                the alignment that the base address of the allocated block
78256 +                should have. So, the only values 1, 2, 4, 8, 16, 32 and 64
78257 +                are available for the alignment argument.
78258 +                The minimum baser address forces the location of the block
78259 +                to be from a given address onward.
78260 +                The routine passes through the specific free list of free
78261 +                blocks and seeks for the first base address equal or smaller
78262 +                than the required minimum address and end address larger than
78263 +                than the required base + its size - i.e. that may contain
78264 +                the required block.
78265 +                After the block is found and data is allocated, it calls
78266 +                the internal MM_CutFree routine to update all free lists
78267 +                do not include a just allocated block. Of course, each
78268 +                free list contains a free blocks with the same alignment.
78269 +                It is also creates a busy block that holds
78270 +                information about an allocated block.
78271 +
78272 + @Param[in]     h_MM        - Handle to the MM object.
78273 + @Param[in]     size        - Size of the MM.
78274 + @Param[in]     alignment   - Index as a power of two defines a required
78275 +                              alignment (in bytes); Should be 1, 2, 4, 8, 16, 32 or 64
78276 + @Param[in]     min         - The minimum base address of the block.
78277 + @Param[in]     name        - Name that specifies an allocated block.
78278 +
78279 + @Return        base address of an allocated block,ILLEGAL_BASE if can't allocate a block.
78280 +*//***************************************************************************/
78281 +uint64_t    MM_GetForceMin(t_Handle h_MM,
78282 +                           uint64_t size,
78283 +                           uint64_t alignment,
78284 +                           uint64_t min,
78285 +                           char     *name);
78286 +
78287 +/**************************************************************************//**
78288 + @Function      MM_Put
78289 +
78290 + @Description   Puts a block of memory of the given base address back to the memory.
78291 +
78292 +                It checks if there is a busy block with the
78293 +                given base address. If not, it returns 0, that
78294 +                means can't free a block. Otherwise, it gets parameters of
78295 +                the busy block and after it updates lists of free blocks,
78296 +                removes that busy block from the list by calling to MM_CutBusy
78297 +                routine.
78298 +                After that it calls to MM_AddFree routine to add a new free
78299 +                block to the free lists.
78300 +
78301 + @Param[in]     h_MM    - Handle to the MM object.
78302 + @Param[in]     base    - Base address of the MM.
78303 +
78304 + @Return         The size of bytes released, 0 if failed.
78305 +*//***************************************************************************/
78306 +uint64_t    MM_Put(t_Handle h_MM, uint64_t base);
78307 +
78308 +/**************************************************************************//**
78309 + @Function      MM_PutForce
78310 +
78311 + @Description   Releases a block of memory of the required size from the required base address.
78312 +
78313 +                First, it calls to MM_CutBusy routine
78314 +                to cut a free block from the busy list. And then, calls to
78315 +                MM_AddFree routine to add the free block to the free lists.
78316 +
78317 + @Param[in]     h_MM    - Handle to the MM object.
78318 + @Param[in]     base    - Base address of of a block to free.
78319 + @Param[in]     size    - Size of a block to free.
78320 +
78321 + @Return        The number of bytes released, 0 on failure.
78322 +*//***************************************************************************/
78323 +uint64_t    MM_PutForce(t_Handle h_MM, uint64_t base, uint64_t size);
78324 +
78325 +/**************************************************************************//**
78326 + @Function      MM_Add
78327 +
78328 + @Description   Adds a new memory block for memory allocation.
78329 +
78330 +                When a new memory block is initialized and added to the
78331 +                memory list, it calls to MM_AddFree routine to add the
78332 +                new free block to the free lists.
78333 +
78334 + @Param[in]     h_MM    - Handle to the MM object.
78335 + @Param[in]     base    - Base address of the memory block.
78336 + @Param[in]     size    - Size of the memory block.
78337 +
78338 + @Return        E_OK on success, otherwise returns an error code.
78339 +*//***************************************************************************/
78340 +t_Error     MM_Add(t_Handle h_MM, uint64_t base, uint64_t size);
78341 +
78342 +/**************************************************************************//**
78343 + @Function      MM_Dump
78344 +
78345 + @Description   Prints results of free and busy lists.
78346 +
78347 + @Param[in]     h_MM        - Handle to the MM object.
78348 +*//***************************************************************************/
78349 +void        MM_Dump(t_Handle h_MM);
78350 +
78351 +/**************************************************************************//**
78352 + @Function      MM_Free
78353 +
78354 + @Description   Releases memory allocated for MM object.
78355 +
78356 + @Param[in]     h_MM - Handle of the MM object.
78357 +*//***************************************************************************/
78358 +void        MM_Free(t_Handle h_MM);
78359 +
78360 +/**************************************************************************//**
78361 + @Function      MM_GetMemBlock
78362 +
78363 + @Description   Returns base address of the memory block specified by the index.
78364 +
78365 +                If index is 0, returns base address
78366 +                of the first memory block, 1 - returns base address
78367 +                of the second memory block, etc.
78368 +                Note, those memory blocks are allocated by the
78369 +                application before MM_Init or MM_Add and have to
78370 +                be released by the application before or after invoking
78371 +                the MM_Free routine.
78372 +
78373 + @Param[in]     h_MM    - Handle to the MM object.
78374 + @Param[in]     index   - Index of the memory block.
78375 +
78376 + @Return        valid base address or ILLEGAL_BASE if no memory block specified by the index.
78377 +*//***************************************************************************/
78378 +uint64_t    MM_GetMemBlock(t_Handle h_MM, int index);
78379 +
78380 +/**************************************************************************//**
78381 + @Function      MM_InRange
78382 +
78383 + @Description   Checks if a specific address is in the memory range of the passed MM object.
78384 +
78385 + @Param[in]     h_MM    - Handle to the MM object.
78386 + @Param[in]     addr    - The address to be checked.
78387 +
78388 + @Return        TRUE if the address is in the address range of the block, FALSE otherwise.
78389 +*//***************************************************************************/
78390 +bool        MM_InRange(t_Handle h_MM, uint64_t addr);
78391 +
78392 +/**************************************************************************//**
78393 + @Function      MM_GetFreeMemSize
78394 +
78395 + @Description   Returns the size (in bytes) of free memory.
78396 +
78397 + @Param[in]     h_MM    - Handle to the MM object.
78398 +
78399 + @Return        Free memory size in bytes.
78400 +*//***************************************************************************/
78401 +uint64_t MM_GetFreeMemSize(t_Handle h_MM);
78402 +
78403 +
78404 +/** @} */ /* end of mm_grp group */
78405 +/** @} */ /* end of etc_id group */
78406 +
78407 +#endif /* __MM_EXT_H */
78408 --- /dev/null
78409 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/sprint_ext.h
78410 @@ -0,0 +1,118 @@
78411 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
78412 + * All rights reserved.
78413 + *
78414 + * Redistribution and use in source and binary forms, with or without
78415 + * modification, are permitted provided that the following conditions are met:
78416 + *     * Redistributions of source code must retain the above copyright
78417 + *       notice, this list of conditions and the following disclaimer.
78418 + *     * Redistributions in binary form must reproduce the above copyright
78419 + *       notice, this list of conditions and the following disclaimer in the
78420 + *       documentation and/or other materials provided with the distribution.
78421 + *     * Neither the name of Freescale Semiconductor nor the
78422 + *       names of its contributors may be used to endorse or promote products
78423 + *       derived from this software without specific prior written permission.
78424 + *
78425 + *
78426 + * ALTERNATIVELY, this software may be distributed under the terms of the
78427 + * GNU General Public License ("GPL") as published by the Free Software
78428 + * Foundation, either version 2 of that License or (at your option) any
78429 + * later version.
78430 + *
78431 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
78432 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
78433 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78434 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
78435 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78436 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
78437 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
78438 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
78439 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
78440 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78441 + */
78442 +
78443 +
78444 +/**************************************************************************//**
78445 + @File          sprint_ext.h
78446 +
78447 + @Description   Debug routines (externals).
78448 +
78449 +*//***************************************************************************/
78450 +
78451 +#ifndef __SPRINT_EXT_H
78452 +#define __SPRINT_EXT_H
78453 +
78454 +
78455 +#if defined(NCSW_LINUX) && defined(__KERNEL__)
78456 +#include <linux/kernel.h>
78457 +
78458 +#elif defined(NCSW_VXWORKS)
78459 +#include "private/stdioP.h"
78460 +
78461 +#else
78462 +#include <stdio.h>
78463 +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
78464 +
78465 +#include "std_ext.h"
78466 +
78467 +
78468 +/**************************************************************************//**
78469 + @Group         etc_id   Utility Library Application Programming Interface
78470 +
78471 + @Description   External routines.
78472 +
78473 + @{
78474 +*//***************************************************************************/
78475 +
78476 +/**************************************************************************//**
78477 + @Group         sprint_id Sprint
78478 +
78479 + @Description   Sprint & Sscan module functions,definitions and enums.
78480 +
78481 + @{
78482 +*//***************************************************************************/
78483 +
78484 +/**************************************************************************//**
78485 + @Function      Sprint
78486 +
78487 + @Description   Format a string and place it in a buffer.
78488 +
78489 + @Param[in]     buff - The buffer to place the result into.
78490 + @Param[in]     str  - The format string to use.
78491 + @Param[in]     ...  - Arguments for the format string.
78492 +
78493 + @Return        Number of bytes formatted.
78494 +*//***************************************************************************/
78495 +int Sprint(char *buff, const char *str, ...);
78496 +
78497 +/**************************************************************************//**
78498 + @Function      Snprint
78499 +
78500 + @Description   Format a string and place it in a buffer.
78501 +
78502 + @Param[in]     buf  - The buffer to place the result into.
78503 + @Param[in]     size - The size of the buffer, including the trailing null space.
78504 + @Param[in]     fmt  - The format string to use.
78505 + @Param[in]     ...  - Arguments for the format string.
78506 +
78507 + @Return        Number of bytes formatted.
78508 +*//***************************************************************************/
78509 +int Snprint(char * buf, uint32_t size, const char *fmt, ...);
78510 +
78511 +/**************************************************************************//**
78512 + @Function      Sscan
78513 +
78514 + @Description   Unformat a buffer into a list of arguments.
78515 +
78516 + @Param[in]     buf  - input buffer.
78517 + @Param[in]     fmt  - formatting of buffer.
78518 + @Param[out]    ...  - resulting arguments.
78519 +
78520 + @Return        Number of bytes unformatted.
78521 +*//***************************************************************************/
78522 +int Sscan(const char * buf, const char * fmt, ...);
78523 +
78524 +/** @} */ /* end of sprint_id group */
78525 +/** @} */ /* end of etc_id group */
78526 +
78527 +
78528 +#endif /* __SPRINT_EXT_H */
78529 --- /dev/null
78530 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/arch/ppc_access.h
78531 @@ -0,0 +1,37 @@
78532 +/*
78533 + * Copyright 2008-2012 Freescale Semiconductor Inc.
78534 + *
78535 + * Redistribution and use in source and binary forms, with or without
78536 + * modification, are permitted provided that the following conditions are met:
78537 + *     * Redistributions of source code must retain the above copyright
78538 + *       notice, this list of conditions and the following disclaimer.
78539 + *     * Redistributions in binary form must reproduce the above copyright
78540 + *       notice, this list of conditions and the following disclaimer in the
78541 + *       documentation and/or other materials provided with the distribution.
78542 + *     * Neither the name of Freescale Semiconductor nor the
78543 + *       names of its contributors may be used to endorse or promote products
78544 + *       derived from this software without specific prior written permission.
78545 + *
78546 + *
78547 + * ALTERNATIVELY, this software may be distributed under the terms of the
78548 + * GNU General Public License ("GPL") as published by the Free Software
78549 + * Foundation, either version 2 of that License or (at your option) any
78550 + * later version.
78551 + *
78552 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
78553 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
78554 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78555 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
78556 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78557 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
78558 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
78559 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
78560 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
78561 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78562 + */
78563 +
78564 +#ifndef FL_E500_MACROS_H
78565 +#define FL_E500_MACROS_H
78566 +
78567 +#endif /* FL_E500_MACROS_H */
78568 +
78569 --- /dev/null
78570 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/general.h
78571 @@ -0,0 +1,52 @@
78572 +/*
78573 + * Copyright 2008-2012 Freescale Semiconductor Inc.
78574 + *
78575 + * Redistribution and use in source and binary forms, with or without
78576 + * modification, are permitted provided that the following conditions are met:
78577 + *     * Redistributions of source code must retain the above copyright
78578 + *       notice, this list of conditions and the following disclaimer.
78579 + *     * Redistributions in binary form must reproduce the above copyright
78580 + *       notice, this list of conditions and the following disclaimer in the
78581 + *       documentation and/or other materials provided with the distribution.
78582 + *     * Neither the name of Freescale Semiconductor nor the
78583 + *       names of its contributors may be used to endorse or promote products
78584 + *       derived from this software without specific prior written permission.
78585 + *
78586 + *
78587 + * ALTERNATIVELY, this software may be distributed under the terms of the
78588 + * GNU General Public License ("GPL") as published by the Free Software
78589 + * Foundation, either version 2 of that License or (at your option) any
78590 + * later version.
78591 + *
78592 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
78593 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
78594 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78595 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
78596 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78597 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
78598 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
78599 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
78600 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
78601 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78602 + */
78603 +
78604 +#ifndef __GENERAL_H
78605 +#define __GENERAL_H
78606 +
78607 +#include "std_ext.h"
78608 +#if !defined(NCSW_LINUX)
78609 +#include "errno.h"
78610 +#endif
78611 +
78612 +
78613 +extern uint32_t get_mac_addr_crc(uint64_t _addr);
78614 +
78615 +#ifndef CONFIG_FMAN_ARM
78616 +#define iowrite32be(val, addr)  WRITE_UINT32(*addr, val)
78617 +#define ioread32be(addr)        GET_UINT32(*addr)
78618 +#endif
78619 +
78620 +#define ether_crc(len, addr)    get_mac_addr_crc(*(uint64_t *)(addr)>>16)
78621 +
78622 +
78623 +#endif /* __GENERAL_H */
78624 --- /dev/null
78625 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fman_common.h
78626 @@ -0,0 +1,78 @@
78627 +/*
78628 + * Copyright 2008-2013 Freescale Semiconductor Inc.
78629 + *
78630 + * Redistribution and use in source and binary forms, with or without
78631 + * modification, are permitted provided that the following conditions are met:
78632 + *     * Redistributions of source code must retain the above copyright
78633 + *       notice, this list of conditions and the following disclaimer.
78634 + *     * Redistributions in binary form must reproduce the above copyright
78635 + *       notice, this list of conditions and the following disclaimer in the
78636 + *       documentation and/or other materials provided with the distribution.
78637 + *     * Neither the name of Freescale Semiconductor nor the
78638 + *       names of its contributors may be used to endorse or promote products
78639 + *       derived from this software without specific prior written permission.
78640 + *
78641 + *
78642 + * ALTERNATIVELY, this software may be distributed under the terms of the
78643 + * GNU General Public License ("GPL") as published by the Free Software
78644 + * Foundation, either version 2 of that License or (at your option) any
78645 + * later version.
78646 + *
78647 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
78648 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
78649 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78650 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
78651 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78652 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
78653 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
78654 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
78655 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
78656 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78657 + */
78658 +
78659 +
78660 +#ifndef __FMAN_COMMON_H
78661 +#define __FMAN_COMMON_H
78662 +
78663 +/**************************************************************************//**
78664 +  @Description       NIA Description
78665 +*//***************************************************************************/
78666 +#define NIA_ORDER_RESTOR                        0x00800000
78667 +#define NIA_ENG_FM_CTL                          0x00000000
78668 +#define NIA_ENG_PRS                             0x00440000
78669 +#define NIA_ENG_KG                              0x00480000
78670 +#define NIA_ENG_PLCR                            0x004C0000
78671 +#define NIA_ENG_BMI                             0x00500000
78672 +#define NIA_ENG_QMI_ENQ                         0x00540000
78673 +#define NIA_ENG_QMI_DEQ                         0x00580000
78674 +#define NIA_ENG_MASK                            0x007C0000
78675 +
78676 +#define NIA_FM_CTL_AC_CC                        0x00000006
78677 +#define NIA_FM_CTL_AC_HC                        0x0000000C
78678 +#define NIA_FM_CTL_AC_IND_MODE_TX               0x00000008
78679 +#define NIA_FM_CTL_AC_IND_MODE_RX               0x0000000A
78680 +#define NIA_FM_CTL_AC_FRAG                      0x0000000e
78681 +#define NIA_FM_CTL_AC_PRE_FETCH                 0x00000010
78682 +#define NIA_FM_CTL_AC_POST_FETCH_PCD            0x00000012
78683 +#define NIA_FM_CTL_AC_POST_FETCH_PCD_UDP_LEN    0x00000018
78684 +#define NIA_FM_CTL_AC_POST_FETCH_NO_PCD         0x00000012
78685 +#define NIA_FM_CTL_AC_FRAG_CHECK                0x00000014
78686 +#define NIA_FM_CTL_AC_PRE_CC                    0x00000020
78687 +
78688 +
78689 +#define NIA_BMI_AC_ENQ_FRAME                    0x00000002
78690 +#define NIA_BMI_AC_TX_RELEASE                   0x000002C0
78691 +#define NIA_BMI_AC_RELEASE                      0x000000C0
78692 +#define NIA_BMI_AC_DISCARD                      0x000000C1
78693 +#define NIA_BMI_AC_TX                           0x00000274
78694 +#define NIA_BMI_AC_FETCH                        0x00000208
78695 +#define NIA_BMI_AC_MASK                         0x000003FF
78696 +
78697 +#define NIA_KG_DIRECT                           0x00000100
78698 +#define NIA_KG_CC_EN                            0x00000200
78699 +#define NIA_PLCR_ABSOLUTE                       0x00008000
78700 +
78701 +#define NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA        0x00000202
78702 +#define NIA_BMI_AC_FETCH_ALL_FRAME              0x0000020c
78703 +
78704 +#endif /* __FMAN_COMMON_H */
78705 --- /dev/null
78706 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_enet.h
78707 @@ -0,0 +1,273 @@
78708 +/*
78709 + * Copyright 2008-2012 Freescale Semiconductor Inc.
78710 + *
78711 + * Redistribution and use in source and binary forms, with or without
78712 + * modification, are permitted provided that the following conditions are met:
78713 + *     * Redistributions of source code must retain the above copyright
78714 + *       notice, this list of conditions and the following disclaimer.
78715 + *     * Redistributions in binary form must reproduce the above copyright
78716 + *       notice, this list of conditions and the following disclaimer in the
78717 + *       documentation and/or other materials provided with the distribution.
78718 + *     * Neither the name of Freescale Semiconductor nor the
78719 + *       names of its contributors may be used to endorse or promote products
78720 + *       derived from this software without specific prior written permission.
78721 + *
78722 + *
78723 + * ALTERNATIVELY, this software may be distributed under the terms of the
78724 + * GNU General Public License ("GPL") as published by the Free Software
78725 + * Foundation, either version 2 of that License or (at your option) any
78726 + * later version.
78727 + *
78728 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
78729 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
78730 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78731 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
78732 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78733 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
78734 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
78735 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
78736 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
78737 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78738 + */
78739 +
78740 +#ifndef __FSL_ENET_H
78741 +#define __FSL_ENET_H
78742 +
78743 +/**
78744 + @Description  Ethernet MAC-PHY Interface
78745 +*/
78746 +
78747 +enum enet_interface {
78748 +       E_ENET_IF_MII           = 0x00010000, /**< MII interface */
78749 +       E_ENET_IF_RMII          = 0x00020000, /**< RMII interface */
78750 +       E_ENET_IF_SMII          = 0x00030000, /**< SMII interface */
78751 +       E_ENET_IF_GMII          = 0x00040000, /**< GMII interface */
78752 +       E_ENET_IF_RGMII         = 0x00050000, /**< RGMII interface */
78753 +       E_ENET_IF_TBI           = 0x00060000, /**< TBI interface */
78754 +       E_ENET_IF_RTBI          = 0x00070000, /**< RTBI interface */
78755 +       E_ENET_IF_SGMII         = 0x00080000, /**< SGMII interface */
78756 +       E_ENET_IF_XGMII         = 0x00090000, /**< XGMII interface */
78757 +       E_ENET_IF_QSGMII        = 0x000a0000, /**< QSGMII interface */
78758 +       E_ENET_IF_XFI           = 0x000b0000  /**< XFI interface */
78759 +};
78760 +
78761 +/**
78762 + @Description  Ethernet Speed (nominal data rate)
78763 +*/
78764 +enum enet_speed {
78765 +       E_ENET_SPEED_10         = 10,   /**< 10 Mbps */
78766 +       E_ENET_SPEED_100        = 100,  /**< 100 Mbps */
78767 +       E_ENET_SPEED_1000       = 1000, /**< 1000 Mbps = 1 Gbps */
78768 +       E_ENET_SPEED_2500       = 2500, /**< 2500 Mbps = 2.5 Gbps */
78769 +       E_ENET_SPEED_10000      = 10000 /**< 10000 Mbps = 10 Gbps */
78770 +};
78771 +
78772 +enum mac_type {
78773 +       E_MAC_DTSEC,
78774 +       E_MAC_TGEC,
78775 +       E_MAC_MEMAC
78776 +};
78777 +
78778 +/**************************************************************************//**
78779 + @Description   Enum for inter-module interrupts registration
78780 +*//***************************************************************************/
78781 +enum fman_event_modules {
78782 +       E_FMAN_MOD_PRS,                   /**< Parser event */
78783 +       E_FMAN_MOD_KG,                    /**< Keygen event */
78784 +       E_FMAN_MOD_PLCR,                  /**< Policer event */
78785 +       E_FMAN_MOD_10G_MAC,               /**< 10G MAC event */
78786 +       E_FMAN_MOD_1G_MAC,                /**< 1G MAC event */
78787 +       E_FMAN_MOD_TMR,                   /**< Timer event */
78788 +       E_FMAN_MOD_FMAN_CTRL,             /**< FMAN Controller  Timer event */
78789 +       E_FMAN_MOD_MACSEC,
78790 +       E_FMAN_MOD_DUMMY_LAST
78791 +};
78792 +
78793 +/**************************************************************************//**
78794 + @Description   Enum for interrupts types
78795 +*//***************************************************************************/
78796 +enum fman_intr_type {
78797 +       E_FMAN_INTR_TYPE_ERR,
78798 +       E_FMAN_INTR_TYPE_NORMAL
78799 +};
78800 +
78801 +/**************************************************************************//**
78802 + @Description   enum for defining MAC types
78803 +*//***************************************************************************/
78804 +enum fman_mac_type {
78805 +       E_FMAN_MAC_10G = 0,               /**< 10G MAC */
78806 +       E_FMAN_MAC_1G                     /**< 1G MAC */
78807 +};
78808 +
78809 +enum fman_mac_exceptions {
78810 +       E_FMAN_MAC_EX_10G_MDIO_SCAN_EVENTMDIO = 0,
78811 +               /**< 10GEC MDIO scan event interrupt */
78812 +       E_FMAN_MAC_EX_10G_MDIO_CMD_CMPL,
78813 +               /**< 10GEC MDIO command completion interrupt */
78814 +       E_FMAN_MAC_EX_10G_REM_FAULT,
78815 +               /**< 10GEC, mEMAC Remote fault interrupt */
78816 +       E_FMAN_MAC_EX_10G_LOC_FAULT,
78817 +               /**< 10GEC, mEMAC Local fault interrupt */
78818 +       E_FMAN_MAC_EX_10G_1TX_ECC_ER,
78819 +               /**< 10GEC, mEMAC Transmit frame ECC error interrupt */
78820 +       E_FMAN_MAC_EX_10G_TX_FIFO_UNFL,
78821 +               /**< 10GEC, mEMAC Transmit FIFO underflow interrupt */
78822 +       E_FMAN_MAC_EX_10G_TX_FIFO_OVFL,
78823 +               /**< 10GEC, mEMAC Transmit FIFO overflow interrupt */
78824 +       E_FMAN_MAC_EX_10G_TX_ER,
78825 +               /**< 10GEC Transmit frame error interrupt */
78826 +       E_FMAN_MAC_EX_10G_RX_FIFO_OVFL,
78827 +               /**< 10GEC, mEMAC Receive FIFO overflow interrupt */
78828 +       E_FMAN_MAC_EX_10G_RX_ECC_ER,
78829 +               /**< 10GEC, mEMAC Receive frame ECC error interrupt */
78830 +       E_FMAN_MAC_EX_10G_RX_JAB_FRM,
78831 +               /**< 10GEC Receive jabber frame interrupt */
78832 +       E_FMAN_MAC_EX_10G_RX_OVRSZ_FRM,
78833 +               /**< 10GEC Receive oversized frame interrupt */
78834 +       E_FMAN_MAC_EX_10G_RX_RUNT_FRM,
78835 +               /**< 10GEC Receive runt frame interrupt */
78836 +       E_FMAN_MAC_EX_10G_RX_FRAG_FRM,
78837 +               /**< 10GEC Receive fragment frame interrupt */
78838 +       E_FMAN_MAC_EX_10G_RX_LEN_ER,
78839 +               /**< 10GEC Receive payload length error interrupt */
78840 +       E_FMAN_MAC_EX_10G_RX_CRC_ER,
78841 +               /**< 10GEC Receive CRC error interrupt */
78842 +       E_FMAN_MAC_EX_10G_RX_ALIGN_ER,
78843 +               /**< 10GEC Receive alignment error interrupt */
78844 +       E_FMAN_MAC_EX_1G_BAB_RX,
78845 +               /**< dTSEC Babbling receive error */
78846 +       E_FMAN_MAC_EX_1G_RX_CTL,
78847 +               /**< dTSEC Receive control (pause frame) interrupt */
78848 +       E_FMAN_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET,
78849 +               /**< dTSEC Graceful transmit stop complete */
78850 +       E_FMAN_MAC_EX_1G_BAB_TX,
78851 +               /**< dTSEC Babbling transmit error */
78852 +       E_FMAN_MAC_EX_1G_TX_CTL,
78853 +               /**< dTSEC Transmit control (pause frame) interrupt */
78854 +       E_FMAN_MAC_EX_1G_TX_ERR,
78855 +               /**< dTSEC Transmit error */
78856 +       E_FMAN_MAC_EX_1G_LATE_COL,
78857 +               /**< dTSEC Late collision */
78858 +       E_FMAN_MAC_EX_1G_COL_RET_LMT,
78859 +               /**< dTSEC Collision retry limit */
78860 +       E_FMAN_MAC_EX_1G_TX_FIFO_UNDRN,
78861 +               /**< dTSEC Transmit FIFO underrun */
78862 +       E_FMAN_MAC_EX_1G_MAG_PCKT,
78863 +               /**< dTSEC Magic Packet detection */
78864 +       E_FMAN_MAC_EX_1G_MII_MNG_RD_COMPLET,
78865 +               /**< dTSEC MII management read completion */
78866 +       E_FMAN_MAC_EX_1G_MII_MNG_WR_COMPLET,
78867 +               /**< dTSEC MII management write completion */
78868 +       E_FMAN_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET,
78869 +               /**< dTSEC Graceful receive stop complete */
78870 +       E_FMAN_MAC_EX_1G_TX_DATA_ERR,
78871 +               /**< dTSEC Internal data error on transmit */
78872 +       E_FMAN_MAC_EX_1G_RX_DATA_ERR,
78873 +               /**< dTSEC Internal data error on receive */
78874 +       E_FMAN_MAC_EX_1G_1588_TS_RX_ERR,
78875 +               /**< dTSEC Time-Stamp Receive Error */
78876 +       E_FMAN_MAC_EX_1G_RX_MIB_CNT_OVFL,
78877 +               /**< dTSEC MIB counter overflow */
78878 +       E_FMAN_MAC_EX_TS_FIFO_ECC_ERR,
78879 +               /**< mEMAC Time-stamp FIFO ECC error interrupt;
78880 +               not supported on T4240/B4860 rev1 chips */
78881 +};
78882 +
78883 +#define ENET_IF_SGMII_BASEX 0x80000000
78884 +       /**< SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
78885 +       and phy or backplane;
78886 +       Note: 1000BaseX auto-negotiation relates only to interface between MAC
78887 +       and phy/backplane, SGMII phy can still synchronize with far-end phy at
78888 +       10Mbps, 100Mbps or 1000Mbps */
78889 +
78890 +enum enet_mode {
78891 +       E_ENET_MODE_INVALID           = 0,
78892 +               /**< Invalid Ethernet mode */
78893 +       E_ENET_MODE_MII_10            = (E_ENET_IF_MII   | E_ENET_SPEED_10),
78894 +               /**<    10 Mbps MII   */
78895 +       E_ENET_MODE_MII_100           = (E_ENET_IF_MII   | E_ENET_SPEED_100),
78896 +               /**<   100 Mbps MII   */
78897 +       E_ENET_MODE_RMII_10           = (E_ENET_IF_RMII  | E_ENET_SPEED_10),
78898 +               /**<    10 Mbps RMII  */
78899 +       E_ENET_MODE_RMII_100          = (E_ENET_IF_RMII  | E_ENET_SPEED_100),
78900 +               /**<   100 Mbps RMII  */
78901 +       E_ENET_MODE_SMII_10           = (E_ENET_IF_SMII  | E_ENET_SPEED_10),
78902 +               /**<    10 Mbps SMII  */
78903 +       E_ENET_MODE_SMII_100          = (E_ENET_IF_SMII  | E_ENET_SPEED_100),
78904 +               /**<   100 Mbps SMII  */
78905 +       E_ENET_MODE_GMII_1000         = (E_ENET_IF_GMII  | E_ENET_SPEED_1000),
78906 +               /**<  1000 Mbps GMII  */
78907 +       E_ENET_MODE_RGMII_10          = (E_ENET_IF_RGMII | E_ENET_SPEED_10),
78908 +               /**<    10 Mbps RGMII */
78909 +       E_ENET_MODE_RGMII_100         = (E_ENET_IF_RGMII | E_ENET_SPEED_100),
78910 +               /**<   100 Mbps RGMII */
78911 +       E_ENET_MODE_RGMII_1000        = (E_ENET_IF_RGMII | E_ENET_SPEED_1000),
78912 +               /**<  1000 Mbps RGMII */
78913 +       E_ENET_MODE_TBI_1000          = (E_ENET_IF_TBI   | E_ENET_SPEED_1000),
78914 +               /**<  1000 Mbps TBI   */
78915 +       E_ENET_MODE_RTBI_1000         = (E_ENET_IF_RTBI  | E_ENET_SPEED_1000),
78916 +               /**<  1000 Mbps RTBI  */
78917 +       E_ENET_MODE_SGMII_10          = (E_ENET_IF_SGMII | E_ENET_SPEED_10),
78918 +               /**< 10 Mbps SGMII with auto-negotiation between MAC and
78919 +               SGMII phy according to Cisco SGMII specification */
78920 +       E_ENET_MODE_SGMII_100         = (E_ENET_IF_SGMII | E_ENET_SPEED_100),
78921 +               /**< 100 Mbps SGMII with auto-negotiation between MAC and
78922 +               SGMII phy according to Cisco SGMII specification */
78923 +       E_ENET_MODE_SGMII_1000        = (E_ENET_IF_SGMII | E_ENET_SPEED_1000),
78924 +               /**< 1000 Mbps SGMII with auto-negotiation between MAC and
78925 +               SGMII phy according to Cisco SGMII specification */
78926 +       E_ENET_MODE_SGMII_BASEX_10    = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII
78927 +               | E_ENET_SPEED_10),
78928 +               /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
78929 +               MAC and SGMII phy or backplane */
78930 +       E_ENET_MODE_SGMII_BASEX_100   = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII
78931 +               | E_ENET_SPEED_100),
78932 +               /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between
78933 +               MAC and SGMII phy or backplane */
78934 +       E_ENET_MODE_SGMII_BASEX_1000  = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII
78935 +               | E_ENET_SPEED_1000),
78936 +               /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between
78937 +               MAC and SGMII phy or backplane */
78938 +       E_ENET_MODE_QSGMII_1000       = (E_ENET_IF_QSGMII | E_ENET_SPEED_1000),
78939 +               /**< 1000 Mbps QSGMII with auto-negotiation between MAC and
78940 +               QSGMII phy according to Cisco QSGMII specification */
78941 +       E_ENET_MODE_QSGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | E_ENET_IF_QSGMII
78942 +               | E_ENET_SPEED_1000),
78943 +               /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between
78944 +               MAC and QSGMII phy or backplane */
78945 +       E_ENET_MODE_XGMII_10000       = (E_ENET_IF_XGMII | E_ENET_SPEED_10000),
78946 +               /**< 10000 Mbps XGMII */
78947 +       E_ENET_MODE_XFI_10000         = (E_ENET_IF_XFI   | E_ENET_SPEED_10000)
78948 +               /**< 10000 Mbps XFI */
78949 +};
78950 +
78951 +enum fmam_mac_statistics_level {
78952 +       E_FMAN_MAC_NONE_STATISTICS,     /**< No statistics */
78953 +       E_FMAN_MAC_PARTIAL_STATISTICS,  /**< Only error counters are available;
78954 +                                       Optimized for performance */
78955 +       E_FMAN_MAC_FULL_STATISTICS      /**< All counters available; Not
78956 +                                       optimized for performance */
78957 +};
78958 +
78959 +#define _MAKE_ENET_MODE(_interface, _speed) (enum enet_mode)((_interface) \
78960 +       | (_speed))
78961 +
78962 +#define _ENET_INTERFACE_FROM_MODE(mode) (enum enet_interface) \
78963 +       ((mode) & 0x0FFF0000)
78964 +#define _ENET_SPEED_FROM_MODE(mode) (enum enet_speed)((mode) & 0x0000FFFF)
78965 +#define _ENET_ADDR_TO_UINT64(_enet_addr)               \
78966 +       (uint64_t)(((uint64_t)(_enet_addr)[0] << 40) |  \
78967 +               ((uint64_t)(_enet_addr)[1] << 32) |     \
78968 +               ((uint64_t)(_enet_addr)[2] << 24) |     \
78969 +               ((uint64_t)(_enet_addr)[3] << 16) |     \
78970 +               ((uint64_t)(_enet_addr)[4] << 8) |      \
78971 +               ((uint64_t)(_enet_addr)[5]))
78972 +
78973 +#define _MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enet_addr)               \
78974 +       do {                                                            \
78975 +               int i;                                                  \
78976 +               for (i = 0; i < ENET_NUM_OCTETS_PER_ADDRESS; i++)       \
78977 +                       (_enet_addr)[i] = (uint8_t)((_addr64) >> ((5-i)*8));\
78978 +       } while (0)
78979 +
78980 +#endif /* __FSL_ENET_H */
78981 --- /dev/null
78982 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman.h
78983 @@ -0,0 +1,825 @@
78984 +/*
78985 + * Copyright 2013 Freescale Semiconductor Inc.
78986 + *
78987 + * Redistribution and use in source and binary forms, with or without
78988 + * modification, are permitted provided that the following conditions are met:
78989 + *     * Redistributions of source code must retain the above copyright
78990 + *       notice, this list of conditions and the following disclaimer.
78991 + *     * Redistributions in binary form must reproduce the above copyright
78992 + *       notice, this list of conditions and the following disclaimer in the
78993 + *       documentation and/or other materials provided with the distribution.
78994 + *     * Neither the name of Freescale Semiconductor nor the
78995 + *       names of its contributors may be used to endorse or promote products
78996 + *       derived from this software without specific prior written permission.
78997 + *
78998 + *
78999 + * ALTERNATIVELY, this software may be distributed under the terms of the
79000 + * GNU General Public License ("GPL") as published by the Free Software
79001 + * Foundation, either version 2 of that License or (at your option) any
79002 + * later version.
79003 + *
79004 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
79005 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
79006 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
79007 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
79008 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
79009 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79010 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
79011 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
79012 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
79013 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
79014 + */
79015 +
79016 +#ifndef __FSL_FMAN_H
79017 +#define __FSL_FMAN_H
79018 +
79019 +#include "common/general.h"
79020 +
79021 +struct fman_ext_pool_params {
79022 +       uint8_t                 id;    /**< External buffer pool id */
79023 +       uint16_t                size;  /**< External buffer pool buffer size */
79024 +};
79025 +
79026 +struct fman_ext_pools {
79027 +       uint8_t num_pools_used;        /**< Number of pools use by this port */
79028 +       struct fman_ext_pool_params *ext_buf_pool;
79029 +                                       /**< Parameters for each port */
79030 +};
79031 +
79032 +struct fman_backup_bm_pools {
79033 +       uint8_t          num_backup_pools; /**< Number of BM backup pools -
79034 +                                       must be smaller than the total number
79035 +                                       of pools defined for the specified
79036 +                                       port.*/
79037 +       uint8_t         *pool_ids;      /**< numOfBackupPools pool id's,
79038 +                                       specifying which pools should be used
79039 +                                       only as backup. Pool id's specified
79040 +                                       here must be a subset of the pools
79041 +                                       used by the specified port.*/
79042 +};
79043 +
79044 +/**************************************************************************//**
79045 + @Description   A structure for defining BM pool depletion criteria
79046 +*//***************************************************************************/
79047 +struct fman_buf_pool_depletion {
79048 +       bool buf_pool_depletion_enabled;
79049 +       bool pools_grp_mode_enable;    /**< select mode in which pause frames
79050 +                                       will be sent after a number of pools
79051 +                                       (all together!) are depleted */
79052 +       uint8_t num_pools;             /**< the number of depleted pools that
79053 +                                       will invoke pause frames transmission.
79054 +                                       */
79055 +       bool *pools_to_consider;       /**< For each pool, TRUE if it should be
79056 +                                       considered for depletion (Note - this
79057 +                                       pool must be used by this port!). */
79058 +       bool single_pool_mode_enable;  /**< select mode in which pause frames
79059 +                                       will be sent after a single-pool
79060 +                                       is depleted; */
79061 +       bool *pools_to_consider_for_single_mode;
79062 +                                      /**< For each pool, TRUE if it should be
79063 +                                       considered for depletion (Note - this
79064 +                                       pool must be used by this port!) */
79065 +       bool has_pfc_priorities;
79066 +       bool *pfc_priorities_en;       /**< This field is used by the MAC as
79067 +                                       the Priority Enable Vector in the PFC
79068 +                                       frame which is transmitted */
79069 +};
79070 +
79071 +/**************************************************************************//**
79072 + @Description   Enum for defining port DMA swap mode
79073 +*//***************************************************************************/
79074 +enum fman_dma_swap_option {
79075 +       FMAN_DMA_NO_SWP,           /**< No swap, transfer data as is.*/
79076 +       FMAN_DMA_SWP_PPC_LE,       /**< The transferred data should be swapped
79077 +                                       in PowerPc Little Endian mode. */
79078 +       FMAN_DMA_SWP_BE            /**< The transferred data should be swapped
79079 +                                       in Big Endian mode */
79080 +};
79081 +
79082 +/**************************************************************************//**
79083 + @Description   Enum for defining port DMA cache attributes
79084 +*//***************************************************************************/
79085 +enum fman_dma_cache_option {
79086 +       FMAN_DMA_NO_STASH = 0,     /**< Cacheable, no Allocate (No Stashing) */
79087 +       FMAN_DMA_STASH = 1         /**< Cacheable and Allocate (Stashing on) */
79088 +};
79089 +
79090 +typedef struct t_FmPrsResult fm_prs_result_t;
79091 +typedef enum e_EnetMode enet_mode_t;
79092 +typedef t_Handle handle_t;
79093 +
79094 +struct fman_revision_info {
79095 +       uint8_t         majorRev;               /**< Major revision */
79096 +       uint8_t         minorRev;               /**< Minor revision */
79097 +};
79098 +
79099 +/* sizes */
79100 +#define CAPWAP_FRAG_EXTRA_SPACE                 32
79101 +#define OFFSET_UNITS                            16
79102 +#define MAX_INT_OFFSET                          240
79103 +#define MAX_IC_SIZE                             256
79104 +#define MAX_EXT_OFFSET                          496
79105 +#define MAX_EXT_BUFFER_OFFSET                   511
79106 +
79107 +/**************************************************************************
79108 + @Description       Memory Mapped Registers
79109 +***************************************************************************/
79110 +#define FMAN_LIODN_TBL 64      /* size of LIODN table */
79111 +
79112 +struct fman_fpm_regs {
79113 +       uint32_t fmfp_tnc;      /**< FPM TNUM Control 0x00 */
79114 +       uint32_t fmfp_prc;      /**< FPM Port_ID FmCtl Association 0x04 */
79115 +       uint32_t fmfp_brkc;             /**< FPM Breakpoint Control 0x08 */
79116 +       uint32_t fmfp_mxd;      /**< FPM Flush Control 0x0c */
79117 +       uint32_t fmfp_dist1;    /**< FPM Dispatch Thresholds1 0x10 */
79118 +       uint32_t fmfp_dist2;    /**< FPM Dispatch Thresholds2 0x14 */
79119 +       uint32_t fm_epi;        /**< FM Error Pending Interrupts 0x18 */
79120 +       uint32_t fm_rie;        /**< FM Error Interrupt Enable 0x1c */
79121 +       uint32_t fmfp_fcev[4];  /**< FPM FMan-Controller Event 1-4 0x20-0x2f */
79122 +       uint32_t res0030[4];    /**< res 0x30 - 0x3f */
79123 +       uint32_t fmfp_cee[4];   /**< PM FMan-Controller Event 1-4 0x40-0x4f */
79124 +       uint32_t res0050[4];    /**< res 0x50-0x5f */
79125 +       uint32_t fmfp_tsc1;     /**< FPM TimeStamp Control1 0x60 */
79126 +       uint32_t fmfp_tsc2;     /**< FPM TimeStamp Control2 0x64 */
79127 +       uint32_t fmfp_tsp;      /**< FPM Time Stamp 0x68 */
79128 +       uint32_t fmfp_tsf;      /**< FPM Time Stamp Fraction 0x6c */
79129 +       uint32_t fm_rcr;        /**< FM Rams Control 0x70 */
79130 +       uint32_t fmfp_extc;     /**< FPM External Requests Control 0x74 */
79131 +       uint32_t fmfp_ext1;     /**< FPM External Requests Config1 0x78 */
79132 +       uint32_t fmfp_ext2;     /**< FPM External Requests Config2 0x7c */
79133 +       uint32_t fmfp_drd[16];  /**< FPM Data_Ram Data 0-15 0x80 - 0xbf */
79134 +       uint32_t fmfp_dra;      /**< FPM Data Ram Access 0xc0 */
79135 +       uint32_t fm_ip_rev_1;   /**< FM IP Block Revision 1 0xc4 */
79136 +       uint32_t fm_ip_rev_2;   /**< FM IP Block Revision 2 0xc8 */
79137 +       uint32_t fm_rstc;       /**< FM Reset Command 0xcc */
79138 +       uint32_t fm_cld;        /**< FM Classifier Debug 0xd0 */
79139 +       uint32_t fm_npi;        /**< FM Normal Pending Interrupts 0xd4 */
79140 +       uint32_t fmfp_exte;     /**< FPM External Requests Enable 0xd8 */
79141 +       uint32_t fmfp_ee;       /**< FPM Event & Mask 0xdc */
79142 +       uint32_t fmfp_cev[4];   /**< FPM CPU Event 1-4 0xe0-0xef */
79143 +       uint32_t res00f0[4];    /**< res 0xf0-0xff */
79144 +       uint32_t fmfp_ps[64];   /**< FPM Port Status 0x100-0x1ff */
79145 +       uint32_t fmfp_clfabc;   /**< FPM CLFABC 0x200 */
79146 +       uint32_t fmfp_clfcc;    /**< FPM CLFCC 0x204 */
79147 +       uint32_t fmfp_clfaval;  /**< FPM CLFAVAL 0x208 */
79148 +       uint32_t fmfp_clfbval;  /**< FPM CLFBVAL 0x20c */
79149 +       uint32_t fmfp_clfcval;  /**< FPM CLFCVAL 0x210 */
79150 +       uint32_t fmfp_clfamsk;  /**< FPM CLFAMSK 0x214 */
79151 +       uint32_t fmfp_clfbmsk;  /**< FPM CLFBMSK 0x218 */
79152 +       uint32_t fmfp_clfcmsk;  /**< FPM CLFCMSK 0x21c */
79153 +       uint32_t fmfp_clfamc;   /**< FPM CLFAMC 0x220 */
79154 +       uint32_t fmfp_clfbmc;   /**< FPM CLFBMC 0x224 */
79155 +       uint32_t fmfp_clfcmc;   /**< FPM CLFCMC 0x228 */
79156 +       uint32_t fmfp_decceh;   /**< FPM DECCEH 0x22c */
79157 +       uint32_t res0230[116];  /**< res 0x230 - 0x3ff */
79158 +       uint32_t fmfp_ts[128];  /**< 0x400: FPM Task Status 0x400 - 0x5ff */
79159 +       uint32_t res0600[0x400 - 384];
79160 +};
79161 +
79162 +struct fman_bmi_regs {
79163 +       uint32_t fmbm_init; /**< BMI Initialization 0x00 */
79164 +       uint32_t fmbm_cfg1; /**< BMI Configuration 1 0x04 */
79165 +       uint32_t fmbm_cfg2; /**< BMI Configuration 2 0x08 */
79166 +       uint32_t res000c[5]; /**< 0x0c - 0x1f */
79167 +       uint32_t fmbm_ievr; /**< Interrupt Event Register 0x20 */
79168 +       uint32_t fmbm_ier; /**< Interrupt Enable Register 0x24 */
79169 +       uint32_t fmbm_ifr; /**< Interrupt Force Register 0x28 */
79170 +       uint32_t res002c[5]; /**< 0x2c - 0x3f */
79171 +       uint32_t fmbm_arb[8]; /**< BMI Arbitration 0x40 - 0x5f */
79172 +       uint32_t res0060[12]; /**<0x60 - 0x8f */
79173 +       uint32_t fmbm_dtc[3]; /**< Debug Trap Counter 0x90 - 0x9b */
79174 +       uint32_t res009c; /**< 0x9c */
79175 +       uint32_t fmbm_dcv[3][4]; /**< Debug Compare val 0xa0-0xcf */
79176 +       uint32_t fmbm_dcm[3][4]; /**< Debug Compare Mask 0xd0-0xff */
79177 +       uint32_t fmbm_gde; /**< BMI Global Debug Enable 0x100 */
79178 +       uint32_t fmbm_pp[63]; /**< BMI Port Parameters 0x104 - 0x1ff */
79179 +       uint32_t res0200; /**< 0x200 */
79180 +       uint32_t fmbm_pfs[63]; /**< BMI Port FIFO Size 0x204 - 0x2ff */
79181 +       uint32_t res0300; /**< 0x300 */
79182 +       uint32_t fmbm_spliodn[63]; /**< Port Partition ID 0x304 - 0x3ff */
79183 +};
79184 +
79185 +struct fman_qmi_regs {
79186 +       uint32_t fmqm_gc; /**< General Configuration Register 0x00 */
79187 +       uint32_t res0004; /**< 0x04 */
79188 +       uint32_t fmqm_eie; /**< Error Interrupt Event Register 0x08 */
79189 +       uint32_t fmqm_eien; /**< Error Interrupt Enable Register 0x0c */
79190 +       uint32_t fmqm_eif; /**< Error Interrupt Force Register 0x10 */
79191 +       uint32_t fmqm_ie; /**< Interrupt Event Register 0x14 */
79192 +       uint32_t fmqm_ien; /**< Interrupt Enable Register 0x18 */
79193 +       uint32_t fmqm_if; /**< Interrupt Force Register 0x1c */
79194 +       uint32_t fmqm_gs; /**< Global Status Register 0x20 */
79195 +       uint32_t fmqm_ts; /**< Task Status Register 0x24 */
79196 +       uint32_t fmqm_etfc; /**< Enqueue Total Frame Counter 0x28 */
79197 +       uint32_t fmqm_dtfc; /**< Dequeue Total Frame Counter 0x2c */
79198 +       uint32_t fmqm_dc0; /**< Dequeue Counter 0 0x30 */
79199 +       uint32_t fmqm_dc1; /**< Dequeue Counter 1 0x34 */
79200 +       uint32_t fmqm_dc2; /**< Dequeue Counter 2 0x38 */
79201 +       uint32_t fmqm_dc3; /**< Dequeue Counter 3 0x3c */
79202 +       uint32_t fmqm_dfdc; /**< Dequeue FQID from Default Counter 0x40 */
79203 +       uint32_t fmqm_dfcc; /**< Dequeue FQID from Context Counter 0x44 */
79204 +       uint32_t fmqm_dffc; /**< Dequeue FQID from FD Counter 0x48 */
79205 +       uint32_t fmqm_dcc; /**< Dequeue Confirm Counter 0x4c */
79206 +       uint32_t res0050[7]; /**< 0x50 - 0x6b */
79207 +       uint32_t fmqm_tapc; /**< Tnum Aging Period Control 0x6c */
79208 +       uint32_t fmqm_dmcvc; /**< Dequeue MAC Command Valid Counter 0x70 */
79209 +       uint32_t fmqm_difdcc; /**< Dequeue Invalid FD Command Counter 0x74 */
79210 +       uint32_t fmqm_da1v; /**< Dequeue A1 Valid Counter 0x78 */
79211 +       uint32_t res007c; /**< 0x7c */
79212 +       uint32_t fmqm_dtc; /**< 0x80 Debug Trap Counter 0x80 */
79213 +       uint32_t fmqm_efddd; /**< 0x84 Enqueue Frame desc Dynamic dbg 0x84 */
79214 +       uint32_t res0088[2]; /**< 0x88 - 0x8f */
79215 +       struct {
79216 +               uint32_t fmqm_dtcfg1; /**< 0x90 dbg trap cfg 1 Register 0x00 */
79217 +               uint32_t fmqm_dtval1; /**< Debug Trap Value 1 Register 0x04 */
79218 +               uint32_t fmqm_dtm1; /**< Debug Trap Mask 1 Register 0x08 */
79219 +               uint32_t fmqm_dtc1; /**< Debug Trap Counter 1 Register 0x0c */
79220 +               uint32_t fmqm_dtcfg2; /**< dbg Trap cfg 2 Register 0x10 */
79221 +               uint32_t fmqm_dtval2; /**< Debug Trap Value 2 Register 0x14 */
79222 +               uint32_t fmqm_dtm2; /**< Debug Trap Mask 2 Register 0x18 */
79223 +               uint32_t res001c; /**< 0x1c */
79224 +       } dbg_traps[3]; /**< 0x90 - 0xef */
79225 +       uint8_t res00f0[0x400 - 0xf0]; /**< 0xf0 - 0x3ff */
79226 +};
79227 +
79228 +struct fman_dma_regs {
79229 +       uint32_t fmdmsr; /**< FM DMA status register 0x00 */
79230 +       uint32_t fmdmmr; /**< FM DMA mode register 0x04 */
79231 +       uint32_t fmdmtr; /**< FM DMA bus threshold register 0x08 */
79232 +       uint32_t fmdmhy; /**< FM DMA bus hysteresis register 0x0c */
79233 +       uint32_t fmdmsetr; /**< FM DMA SOS emergency Threshold Register 0x10 */
79234 +       uint32_t fmdmtah; /**< FM DMA transfer bus address high reg 0x14 */
79235 +       uint32_t fmdmtal; /**< FM DMA transfer bus address low reg 0x18 */
79236 +       uint32_t fmdmtcid; /**< FM DMA transfer bus communication ID reg 0x1c */
79237 +       uint32_t fmdmra; /**< FM DMA bus internal ram address register 0x20 */
79238 +       uint32_t fmdmrd; /**< FM DMA bus internal ram data register 0x24 */
79239 +       uint32_t fmdmwcr; /**< FM DMA CAM watchdog counter value 0x28 */
79240 +       uint32_t fmdmebcr; /**< FM DMA CAM base in MURAM register 0x2c */
79241 +       uint32_t fmdmccqdr; /**< FM DMA CAM and CMD Queue Debug reg 0x30 */
79242 +       uint32_t fmdmccqvr1; /**< FM DMA CAM and CMD Queue Value reg #1 0x34 */
79243 +       uint32_t fmdmccqvr2; /**< FM DMA CAM and CMD Queue Value reg #2 0x38 */
79244 +       uint32_t fmdmcqvr3; /**< FM DMA CMD Queue Value register #3 0x3c */
79245 +       uint32_t fmdmcqvr4; /**< FM DMA CMD Queue Value register #4 0x40 */
79246 +       uint32_t fmdmcqvr5; /**< FM DMA CMD Queue Value register #5 0x44 */
79247 +       uint32_t fmdmsefrc; /**< FM DMA Semaphore Entry Full Reject Cntr 0x48 */
79248 +       uint32_t fmdmsqfrc; /**< FM DMA Semaphore Queue Full Reject Cntr 0x4c */
79249 +       uint32_t fmdmssrc; /**< FM DMA Semaphore SYNC Reject Counter 0x50 */
79250 +       uint32_t fmdmdcr;  /**< FM DMA Debug Counter 0x54 */
79251 +       uint32_t fmdmemsr; /**< FM DMA Emergency Smoother Register 0x58 */
79252 +       uint32_t res005c; /**< 0x5c */
79253 +       uint32_t fmdmplr[FMAN_LIODN_TBL / 2]; /**< DMA LIODN regs 0x60-0xdf */
79254 +       uint32_t res00e0[0x400 - 56];
79255 +};
79256 +
79257 +struct fman_rg {
79258 +       struct fman_fpm_regs *fpm_rg;
79259 +       struct fman_dma_regs *dma_rg;
79260 +       struct fman_bmi_regs *bmi_rg;
79261 +       struct fman_qmi_regs *qmi_rg;
79262 +};
79263 +
79264 +enum fman_dma_cache_override {
79265 +       E_FMAN_DMA_NO_CACHE_OR = 0, /**< No override of the Cache field */
79266 +       E_FMAN_DMA_NO_STASH_DATA, /**< No data stashing in system level cache */
79267 +       E_FMAN_DMA_MAY_STASH_DATA, /**< Stashing allowed in sys level cache */
79268 +       E_FMAN_DMA_STASH_DATA /**< Stashing performed in system level cache */
79269 +};
79270 +
79271 +enum fman_dma_aid_mode {
79272 +       E_FMAN_DMA_AID_OUT_PORT_ID = 0,           /**< 4 LSB of PORT_ID */
79273 +       E_FMAN_DMA_AID_OUT_TNUM                   /**< 4 LSB of TNUM */
79274 +};
79275 +
79276 +enum fman_dma_dbg_cnt_mode {
79277 +       E_FMAN_DMA_DBG_NO_CNT = 0, /**< No counting */
79278 +       E_FMAN_DMA_DBG_CNT_DONE, /**< Count DONE commands */
79279 +       E_FMAN_DMA_DBG_CNT_COMM_Q_EM, /**< command Q emergency signal */
79280 +       E_FMAN_DMA_DBG_CNT_INT_READ_EM, /**< Read buf emergency signal */
79281 +       E_FMAN_DMA_DBG_CNT_INT_WRITE_EM, /**< Write buf emergency signal */
79282 +       E_FMAN_DMA_DBG_CNT_FPM_WAIT, /**< FPM WAIT signal */
79283 +       E_FMAN_DMA_DBG_CNT_SIGLE_BIT_ECC, /**< Single bit ECC errors */
79284 +       E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT /**< RAW & WAR protection counter */
79285 +};
79286 +
79287 +enum fman_dma_emergency_level {
79288 +       E_FMAN_DMA_EM_EBS = 0, /**< EBS emergency */
79289 +       E_FMAN_DMA_EM_SOS /**< SOS emergency */
79290 +};
79291 +
79292 +enum fman_catastrophic_err {
79293 +       E_FMAN_CATAST_ERR_STALL_PORT = 0, /**< Port_ID stalled reset required */
79294 +       E_FMAN_CATAST_ERR_STALL_TASK /**< Only erroneous task is stalled */
79295 +};
79296 +
79297 +enum fman_dma_err {
79298 +       E_FMAN_DMA_ERR_CATASTROPHIC = 0, /**< Catastrophic DMA error */
79299 +       E_FMAN_DMA_ERR_REPORT /**< Reported DMA error */
79300 +};
79301 +
79302 +struct fman_cfg {
79303 +       uint16_t        liodn_bs_pr_port[FMAN_LIODN_TBL];/* base per port */
79304 +       bool            en_counters;
79305 +       uint8_t         disp_limit_tsh;
79306 +       uint8_t         prs_disp_tsh;
79307 +       uint8_t         plcr_disp_tsh;
79308 +       uint8_t         kg_disp_tsh;
79309 +       uint8_t         bmi_disp_tsh;
79310 +       uint8_t         qmi_enq_disp_tsh;
79311 +       uint8_t         qmi_deq_disp_tsh;
79312 +       uint8_t         fm_ctl1_disp_tsh;
79313 +       uint8_t         fm_ctl2_disp_tsh;
79314 +       enum fman_dma_cache_override    dma_cache_override;
79315 +       enum fman_dma_aid_mode          dma_aid_mode;
79316 +       bool            dma_aid_override;
79317 +       uint8_t         dma_axi_dbg_num_of_beats;
79318 +       uint8_t         dma_cam_num_of_entries;
79319 +       uint32_t        dma_watchdog;
79320 +       uint8_t         dma_comm_qtsh_asrt_emer;
79321 +       uint8_t         dma_write_buf_tsh_asrt_emer;
79322 +       uint8_t         dma_read_buf_tsh_asrt_emer;
79323 +       uint8_t         dma_comm_qtsh_clr_emer;
79324 +       uint8_t         dma_write_buf_tsh_clr_emer;
79325 +       uint8_t         dma_read_buf_tsh_clr_emer;
79326 +       uint32_t        dma_sos_emergency;
79327 +       enum fman_dma_dbg_cnt_mode      dma_dbg_cnt_mode;
79328 +       bool            dma_stop_on_bus_error;
79329 +       bool            dma_en_emergency;
79330 +       uint32_t        dma_emergency_bus_select;
79331 +       enum fman_dma_emergency_level   dma_emergency_level;
79332 +       bool            dma_en_emergency_smoother;
79333 +       uint32_t        dma_emergency_switch_counter;
79334 +       bool            halt_on_external_activ;
79335 +       bool            halt_on_unrecov_ecc_err;
79336 +       enum fman_catastrophic_err      catastrophic_err;
79337 +       enum fman_dma_err               dma_err;
79338 +       bool            en_muram_test_mode;
79339 +       bool            en_iram_test_mode;
79340 +       bool            external_ecc_rams_enable;
79341 +       uint16_t        tnum_aging_period;
79342 +       uint32_t        exceptions;
79343 +       uint16_t        clk_freq;
79344 +       bool            pedantic_dma;
79345 +       uint32_t        cam_base_addr;
79346 +       uint32_t        fifo_base_addr;
79347 +       uint32_t        total_fifo_size;
79348 +       uint8_t         total_num_of_tasks;
79349 +       bool            qmi_deq_option_support;
79350 +       uint32_t        qmi_def_tnums_thresh;
79351 +       bool            fman_partition_array;
79352 +       uint8_t         num_of_fman_ctrl_evnt_regs;
79353 +};
79354 +
79355 +/**************************************************************************//**
79356 + @Description       Exceptions
79357 +*//***************************************************************************/
79358 +#define FMAN_EX_DMA_BUS_ERROR                  0x80000000
79359 +#define FMAN_EX_DMA_READ_ECC                   0x40000000
79360 +#define FMAN_EX_DMA_SYSTEM_WRITE_ECC           0x20000000
79361 +#define FMAN_EX_DMA_FM_WRITE_ECC               0x10000000
79362 +#define FMAN_EX_FPM_STALL_ON_TASKS             0x08000000
79363 +#define FMAN_EX_FPM_SINGLE_ECC                 0x04000000
79364 +#define FMAN_EX_FPM_DOUBLE_ECC                 0x02000000
79365 +#define FMAN_EX_QMI_SINGLE_ECC                 0x01000000
79366 +#define FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID    0x00800000
79367 +#define FMAN_EX_QMI_DOUBLE_ECC                 0x00400000
79368 +#define FMAN_EX_BMI_LIST_RAM_ECC               0x00200000
79369 +#define FMAN_EX_BMI_PIPELINE_ECC               0x00100000
79370 +#define FMAN_EX_BMI_STATISTICS_RAM_ECC         0x00080000
79371 +#define FMAN_EX_IRAM_ECC                       0x00040000
79372 +#define FMAN_EX_NURAM_ECC                      0x00020000
79373 +#define FMAN_EX_BMI_DISPATCH_RAM_ECC           0x00010000
79374 +
79375 +enum fman_exceptions {
79376 +       E_FMAN_EX_DMA_BUS_ERROR = 0, /**< DMA bus error. */
79377 +       E_FMAN_EX_DMA_READ_ECC, /**< Read Buffer ECC error */
79378 +       E_FMAN_EX_DMA_SYSTEM_WRITE_ECC, /**< Write Buffer ECC err on sys side */
79379 +       E_FMAN_EX_DMA_FM_WRITE_ECC, /**< Write Buffer ECC error on FM side */
79380 +       E_FMAN_EX_FPM_STALL_ON_TASKS, /**< Stall of tasks on FPM */
79381 +       E_FMAN_EX_FPM_SINGLE_ECC, /**< Single ECC on FPM. */
79382 +       E_FMAN_EX_FPM_DOUBLE_ECC, /**< Double ECC error on FPM ram access */
79383 +       E_FMAN_EX_QMI_SINGLE_ECC, /**< Single ECC on QMI. */
79384 +       E_FMAN_EX_QMI_DOUBLE_ECC, /**< Double bit ECC occurred on QMI */
79385 +       E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< DeQ from unknown port id */
79386 +       E_FMAN_EX_BMI_LIST_RAM_ECC, /**< Linked List RAM ECC error */
79387 +       E_FMAN_EX_BMI_STORAGE_PROFILE_ECC, /**< storage profile */
79388 +       E_FMAN_EX_BMI_STATISTICS_RAM_ECC, /**< Statistics RAM ECC Err Enable */
79389 +       E_FMAN_EX_BMI_DISPATCH_RAM_ECC, /**< Dispatch RAM ECC Error Enable */
79390 +       E_FMAN_EX_IRAM_ECC, /**< Double bit ECC occurred on IRAM*/
79391 +       E_FMAN_EX_MURAM_ECC /**< Double bit ECC occurred on MURAM*/
79392 +};
79393 +
79394 +enum fman_counters {
79395 +       E_FMAN_COUNTERS_ENQ_TOTAL_FRAME = 0, /**< QMI tot enQ frames counter */
79396 +       E_FMAN_COUNTERS_DEQ_TOTAL_FRAME, /**< QMI tot deQ frames counter */
79397 +       E_FMAN_COUNTERS_DEQ_0, /**< QMI 0 frames from QMan counter */
79398 +       E_FMAN_COUNTERS_DEQ_1, /**< QMI 1 frames from QMan counter */
79399 +       E_FMAN_COUNTERS_DEQ_2, /**< QMI 2 frames from QMan counter */
79400 +       E_FMAN_COUNTERS_DEQ_3, /**< QMI 3 frames from QMan counter */
79401 +       E_FMAN_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI deQ from dflt queue cntr */
79402 +       E_FMAN_COUNTERS_DEQ_FROM_CONTEXT, /**< QMI deQ from FQ context cntr */
79403 +       E_FMAN_COUNTERS_DEQ_FROM_FD, /**< QMI deQ from FD command field cntr */
79404 +       E_FMAN_COUNTERS_DEQ_CONFIRM, /**< QMI dequeue confirm counter */
79405 +       E_FMAN_COUNTERS_SEMAPHOR_ENTRY_FULL_REJECT, /**< DMA full entry cntr */
79406 +       E_FMAN_COUNTERS_SEMAPHOR_QUEUE_FULL_REJECT, /**< DMA full CAM Q cntr */
79407 +       E_FMAN_COUNTERS_SEMAPHOR_SYNC_REJECT /**< DMA sync counter */
79408 +};
79409 +
79410 +#define FPM_PRT_FM_CTL1        0x00000001
79411 +#define FPM_PRT_FM_CTL2        0x00000002
79412 +
79413 +/**************************************************************************//**
79414 + @Description       DMA definitions
79415 +*//***************************************************************************/
79416 +
79417 +/* masks */
79418 +#define DMA_MODE_AID_OR                        0x20000000
79419 +#define DMA_MODE_SBER                  0x10000000
79420 +#define DMA_MODE_BER                   0x00200000
79421 +#define DMA_MODE_EB             0x00100000
79422 +#define DMA_MODE_ECC                   0x00000020
79423 +#define DMA_MODE_PRIVILEGE_PROT        0x00001000
79424 +#define DMA_MODE_SECURE_PROT   0x00000800
79425 +#define DMA_MODE_EMER_READ             0x00080000
79426 +#define DMA_MODE_EMER_WRITE            0x00040000
79427 +#define DMA_MODE_CACHE_OR_MASK  0xC0000000
79428 +#define DMA_MODE_CEN_MASK       0x0000E000
79429 +#define DMA_MODE_DBG_MASK       0x00000380
79430 +#define DMA_MODE_AXI_DBG_MASK   0x0F000000
79431 +
79432 +#define DMA_EMSR_EMSTR_MASK         0x0000FFFF
79433 +
79434 +#define DMA_TRANSFER_PORTID_MASK       0xFF000000
79435 +#define DMA_TRANSFER_TNUM_MASK         0x00FF0000
79436 +#define DMA_TRANSFER_LIODN_MASK                0x00000FFF
79437 +
79438 +#define DMA_HIGH_LIODN_MASK            0x0FFF0000
79439 +#define DMA_LOW_LIODN_MASK             0x00000FFF
79440 +
79441 +#define DMA_STATUS_CMD_QUEUE_NOT_EMPTY 0x10000000
79442 +#define DMA_STATUS_BUS_ERR             0x08000000
79443 +#define DMA_STATUS_READ_ECC            0x04000000
79444 +#define DMA_STATUS_SYSTEM_WRITE_ECC    0x02000000
79445 +#define DMA_STATUS_FM_WRITE_ECC                0x01000000
79446 +#define DMA_STATUS_SYSTEM_DPEXT_ECC    0x00800000
79447 +#define DMA_STATUS_FM_DPEXT_ECC                0x00400000
79448 +#define DMA_STATUS_SYSTEM_DPDAT_ECC    0x00200000
79449 +#define DMA_STATUS_FM_DPDAT_ECC                0x00100000
79450 +#define DMA_STATUS_FM_SPDAT_ECC                0x00080000
79451 +
79452 +#define FM_LIODN_BASE_MASK             0x00000FFF
79453 +
79454 +/* shifts */
79455 +#define DMA_MODE_CACHE_OR_SHIFT                        30
79456 +#define DMA_MODE_BUS_PRI_SHIFT                 16
79457 +#define DMA_MODE_AXI_DBG_SHIFT                 24
79458 +#define DMA_MODE_CEN_SHIFT                     13
79459 +#define DMA_MODE_BUS_PROT_SHIFT                        10
79460 +#define DMA_MODE_DBG_SHIFT                     7
79461 +#define DMA_MODE_EMER_LVL_SHIFT                        6
79462 +#define DMA_MODE_AID_MODE_SHIFT                        4
79463 +#define DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS      16
79464 +#define DMA_MODE_MAX_CAM_NUM_OF_ENTRIES                32
79465 +
79466 +#define DMA_THRESH_COMMQ_SHIFT                 24
79467 +#define DMA_THRESH_READ_INT_BUF_SHIFT          16
79468 +
79469 +#define DMA_LIODN_SHIFT                                16
79470 +
79471 +#define DMA_TRANSFER_PORTID_SHIFT              24
79472 +#define DMA_TRANSFER_TNUM_SHIFT                        16
79473 +
79474 +/* sizes */
79475 +#define DMA_MAX_WATCHDOG                       0xffffffff
79476 +
79477 +/* others */
79478 +#define DMA_CAM_SIZEOF_ENTRY                   0x40
79479 +#define DMA_CAM_ALIGN                          0x1000
79480 +#define DMA_CAM_UNITS                          8
79481 +
79482 +/**************************************************************************//**
79483 + @Description       General defines
79484 +*//***************************************************************************/
79485 +
79486 +#define FM_DEBUG_STATUS_REGISTER_OFFSET        0x000d1084UL
79487 +#define FM_UCODE_DEBUG_INSTRUCTION     0x6ffff805UL
79488 +
79489 +/**************************************************************************//**
79490 + @Description       FPM defines
79491 +*//***************************************************************************/
79492 +
79493 +/* masks */
79494 +#define FPM_EV_MASK_DOUBLE_ECC         0x80000000
79495 +#define FPM_EV_MASK_STALL              0x40000000
79496 +#define FPM_EV_MASK_SINGLE_ECC         0x20000000
79497 +#define FPM_EV_MASK_RELEASE_FM         0x00010000
79498 +#define FPM_EV_MASK_DOUBLE_ECC_EN      0x00008000
79499 +#define FPM_EV_MASK_STALL_EN           0x00004000
79500 +#define FPM_EV_MASK_SINGLE_ECC_EN      0x00002000
79501 +#define FPM_EV_MASK_EXTERNAL_HALT      0x00000008
79502 +#define FPM_EV_MASK_ECC_ERR_HALT       0x00000004
79503 +
79504 +#define FPM_RAM_RAMS_ECC_EN            0x80000000
79505 +#define FPM_RAM_IRAM_ECC_EN            0x40000000
79506 +#define FPM_RAM_MURAM_ECC              0x00008000
79507 +#define FPM_RAM_IRAM_ECC               0x00004000
79508 +#define FPM_RAM_MURAM_TEST_ECC         0x20000000
79509 +#define FPM_RAM_IRAM_TEST_ECC          0x10000000
79510 +#define FPM_RAM_RAMS_ECC_EN_SRC_SEL    0x08000000
79511 +
79512 +#define FPM_IRAM_ECC_ERR_EX_EN         0x00020000
79513 +#define FPM_MURAM_ECC_ERR_EX_EN                0x00040000
79514 +
79515 +#define FPM_REV1_MAJOR_MASK            0x0000FF00
79516 +#define FPM_REV1_MINOR_MASK            0x000000FF
79517 +
79518 +#define FPM_REV2_INTEG_MASK            0x00FF0000
79519 +#define FPM_REV2_ERR_MASK              0x0000FF00
79520 +#define FPM_REV2_CFG_MASK              0x000000FF
79521 +
79522 +#define FPM_TS_FRACTION_MASK           0x0000FFFF
79523 +#define FPM_TS_CTL_EN                  0x80000000
79524 +
79525 +#define FPM_PRC_REALSE_STALLED         0x00800000
79526 +
79527 +#define FPM_PS_STALLED                 0x00800000
79528 +#define FPM_PS_FM_CTL1_SEL             0x80000000
79529 +#define FPM_PS_FM_CTL2_SEL             0x40000000
79530 +#define FPM_PS_FM_CTL_SEL_MASK (FPM_PS_FM_CTL1_SEL | FPM_PS_FM_CTL2_SEL)
79531 +
79532 +#define FPM_RSTC_FM_RESET              0x80000000
79533 +#define FPM_RSTC_10G0_RESET            0x04000000
79534 +#define FPM_RSTC_1G0_RESET             0x40000000
79535 +#define FPM_RSTC_1G1_RESET             0x20000000
79536 +#define FPM_RSTC_1G2_RESET             0x10000000
79537 +#define FPM_RSTC_1G3_RESET             0x08000000
79538 +#define FPM_RSTC_1G4_RESET             0x02000000
79539 +
79540 +
79541 +#define FPM_DISP_LIMIT_MASK             0x1F000000
79542 +#define FPM_THR1_PRS_MASK               0xFF000000
79543 +#define FPM_THR1_KG_MASK                0x00FF0000
79544 +#define FPM_THR1_PLCR_MASK              0x0000FF00
79545 +#define FPM_THR1_BMI_MASK               0x000000FF
79546 +
79547 +#define FPM_THR2_QMI_ENQ_MASK           0xFF000000
79548 +#define FPM_THR2_QMI_DEQ_MASK           0x000000FF
79549 +#define FPM_THR2_FM_CTL1_MASK           0x00FF0000
79550 +#define FPM_THR2_FM_CTL2_MASK           0x0000FF00
79551 +
79552 +/* shifts */
79553 +#define FPM_DISP_LIMIT_SHIFT           24
79554 +
79555 +#define FPM_THR1_PRS_SHIFT             24
79556 +#define FPM_THR1_KG_SHIFT              16
79557 +#define FPM_THR1_PLCR_SHIFT            8
79558 +#define FPM_THR1_BMI_SHIFT             0
79559 +
79560 +#define FPM_THR2_QMI_ENQ_SHIFT         24
79561 +#define FPM_THR2_QMI_DEQ_SHIFT         0
79562 +#define FPM_THR2_FM_CTL1_SHIFT         16
79563 +#define FPM_THR2_FM_CTL2_SHIFT         8
79564 +
79565 +#define FPM_EV_MASK_CAT_ERR_SHIFT      1
79566 +#define FPM_EV_MASK_DMA_ERR_SHIFT      0
79567 +
79568 +#define FPM_REV1_MAJOR_SHIFT           8
79569 +#define FPM_REV1_MINOR_SHIFT           0
79570 +
79571 +#define FPM_REV2_INTEG_SHIFT           16
79572 +#define FPM_REV2_ERR_SHIFT             8
79573 +#define FPM_REV2_CFG_SHIFT             0
79574 +
79575 +#define FPM_TS_INT_SHIFT               16
79576 +
79577 +#define FPM_PORT_FM_CTL_PORTID_SHIFT   24
79578 +
79579 +#define FPM_PS_FM_CTL_SEL_SHIFT                30
79580 +#define FPM_PRC_ORA_FM_CTL_SEL_SHIFT   16
79581 +
79582 +#define FPM_DISP_LIMIT_SHIFT            24
79583 +
79584 +/* Interrupts defines */
79585 +#define FPM_EVENT_FM_CTL_0             0x00008000
79586 +#define FPM_EVENT_FM_CTL               0x0000FF00
79587 +#define FPM_EVENT_FM_CTL_BRK           0x00000080
79588 +
79589 +/* others */
79590 +#define FPM_MAX_DISP_LIMIT             31
79591 +#define FPM_RSTC_FM_RESET               0x80000000
79592 +#define FPM_RSTC_1G0_RESET              0x40000000
79593 +#define FPM_RSTC_1G1_RESET              0x20000000
79594 +#define FPM_RSTC_1G2_RESET              0x10000000
79595 +#define FPM_RSTC_1G3_RESET              0x08000000
79596 +#define FPM_RSTC_10G0_RESET             0x04000000
79597 +#define FPM_RSTC_1G4_RESET              0x02000000
79598 +#define FPM_RSTC_1G5_RESET              0x01000000
79599 +#define FPM_RSTC_1G6_RESET              0x00800000
79600 +#define FPM_RSTC_1G7_RESET              0x00400000
79601 +#define FPM_RSTC_10G1_RESET             0x00200000
79602 +/**************************************************************************//**
79603 + @Description       BMI defines
79604 +*//***************************************************************************/
79605 +/* masks */
79606 +#define BMI_INIT_START                         0x80000000
79607 +#define BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC    0x80000000
79608 +#define BMI_ERR_INTR_EN_LIST_RAM_ECC           0x40000000
79609 +#define BMI_ERR_INTR_EN_STATISTICS_RAM_ECC     0x20000000
79610 +#define BMI_ERR_INTR_EN_DISPATCH_RAM_ECC       0x10000000
79611 +#define BMI_NUM_OF_TASKS_MASK                  0x3F000000
79612 +#define BMI_NUM_OF_EXTRA_TASKS_MASK            0x000F0000
79613 +#define BMI_NUM_OF_DMAS_MASK                   0x00000F00
79614 +#define BMI_NUM_OF_EXTRA_DMAS_MASK             0x0000000F
79615 +#define BMI_FIFO_SIZE_MASK                     0x000003FF
79616 +#define BMI_EXTRA_FIFO_SIZE_MASK               0x03FF0000
79617 +#define BMI_CFG2_DMAS_MASK                     0x0000003F
79618 +#define BMI_TOTAL_FIFO_SIZE_MASK           0x07FF0000
79619 +#define BMI_TOTAL_NUM_OF_TASKS_MASK        0x007F0000
79620 +
79621 +/* shifts */
79622 +#define BMI_CFG2_TASKS_SHIFT           16
79623 +#define BMI_CFG2_DMAS_SHIFT            0
79624 +#define BMI_CFG1_FIFO_SIZE_SHIFT       16
79625 +#define BMI_FIFO_SIZE_SHIFT            0
79626 +#define BMI_EXTRA_FIFO_SIZE_SHIFT      16
79627 +#define BMI_NUM_OF_TASKS_SHIFT         24
79628 +#define BMI_EXTRA_NUM_OF_TASKS_SHIFT   16
79629 +#define BMI_NUM_OF_DMAS_SHIFT          8
79630 +#define BMI_EXTRA_NUM_OF_DMAS_SHIFT    0
79631 +
79632 +/* others */
79633 +#define BMI_FIFO_ALIGN                 0x100
79634 +#define FMAN_BMI_FIFO_UNITS            0x100
79635 +
79636 +
79637 +/**************************************************************************//**
79638 + @Description       QMI defines
79639 +*//***************************************************************************/
79640 +/* masks */
79641 +#define QMI_CFG_ENQ_EN                 0x80000000
79642 +#define QMI_CFG_DEQ_EN                 0x40000000
79643 +#define QMI_CFG_EN_COUNTERS            0x10000000
79644 +#define QMI_CFG_SOFT_RESET             0x01000000
79645 +#define QMI_CFG_DEQ_MASK               0x0000003F
79646 +#define QMI_CFG_ENQ_MASK               0x00003F00
79647 +
79648 +#define QMI_ERR_INTR_EN_DOUBLE_ECC     0x80000000
79649 +#define QMI_ERR_INTR_EN_DEQ_FROM_DEF   0x40000000
79650 +#define QMI_INTR_EN_SINGLE_ECC         0x80000000
79651 +
79652 +/* shifts */
79653 +#define QMI_CFG_ENQ_SHIFT              8
79654 +#define QMI_TAPC_TAP                   22
79655 +
79656 +#define QMI_GS_HALT_NOT_BUSY            0x00000002
79657 +
79658 +/**************************************************************************//**
79659 + @Description       IRAM defines
79660 +*//***************************************************************************/
79661 +/* masks */
79662 +#define IRAM_IADD_AIE                  0x80000000
79663 +#define IRAM_READY                     0x80000000
79664 +
79665 +uint32_t fman_get_bmi_err_event(struct fman_bmi_regs *bmi_rg);
79666 +uint32_t fman_get_qmi_err_event(struct fman_qmi_regs *qmi_rg);
79667 +uint32_t fman_get_dma_com_id(struct fman_dma_regs *dma_rg);
79668 +uint64_t fman_get_dma_addr(struct fman_dma_regs *dma_rg);
79669 +uint32_t fman_get_dma_err_event(struct fman_dma_regs *dma_rg);
79670 +uint32_t fman_get_fpm_err_event(struct fman_fpm_regs *fpm_rg);
79671 +uint32_t fman_get_muram_err_event(struct fman_fpm_regs *fpm_rg);
79672 +uint32_t fman_get_iram_err_event(struct fman_fpm_regs *fpm_rg);
79673 +uint32_t fman_get_qmi_event(struct fman_qmi_regs *qmi_rg);
79674 +uint32_t fman_get_fpm_error_interrupts(struct fman_fpm_regs *fpm_rg);
79675 +uint32_t fman_get_ctrl_intr(struct fman_fpm_regs *fpm_rg,
79676 +                               uint8_t event_reg_id);
79677 +uint8_t fman_get_qmi_deq_th(struct fman_qmi_regs *qmi_rg);
79678 +uint8_t fman_get_qmi_enq_th(struct fman_qmi_regs *qmi_rg);
79679 +uint16_t fman_get_size_of_fifo(struct fman_bmi_regs *bmi_rg, uint8_t port_id);
79680 +uint32_t fman_get_total_fifo_size(struct fman_bmi_regs *bmi_rg);
79681 +uint16_t fman_get_size_of_extra_fifo(struct fman_bmi_regs *bmi_rg,
79682 +                               uint8_t port_id);
79683 +uint8_t fman_get_num_of_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id);
79684 +uint8_t fman_get_num_extra_tasks(struct fman_bmi_regs *bmi_rg,
79685 +                               uint8_t port_id);
79686 +uint8_t fman_get_num_of_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id);
79687 +uint8_t fman_get_num_extra_dmas(struct fman_bmi_regs *bmi_rg,
79688 +                               uint8_t port_id);
79689 +uint32_t fman_get_normal_pending(struct fman_fpm_regs *fpm_rg);
79690 +uint32_t fman_get_controller_event(struct fman_fpm_regs *fpm_rg,
79691 +                                       uint8_t reg_id);
79692 +uint32_t fman_get_error_pending(struct fman_fpm_regs *fpm_rg);
79693 +void fman_get_revision(struct fman_fpm_regs *fpm_rg, uint8_t *major,
79694 +                               uint8_t *minor);
79695 +uint32_t fman_get_counter(struct fman_rg *fman_rg,
79696 +                               enum fman_counters reg_name);
79697 +uint32_t fman_get_dma_status(struct fman_dma_regs *dma_rg);
79698 +
79699 +
79700 +int fman_set_erratum_10gmac_a004_wa(struct fman_fpm_regs *fpm_rg);
79701 +void fman_set_ctrl_intr(struct fman_fpm_regs *fpm_rg, uint8_t event_reg_id,
79702 +                               uint32_t enable_events);
79703 +void fman_set_num_of_riscs_per_port(struct fman_fpm_regs *fpm_rg,
79704 +                               uint8_t port_id,
79705 +                               uint8_t num_fman_ctrls,
79706 +                               uint32_t or_fman_ctrl);
79707 +void fman_set_order_restoration_per_port(struct fman_fpm_regs *fpm_rg,
79708 +                               uint8_t port_id,
79709 +                               bool independent_mode,
79710 +                               bool is_rx_port);
79711 +void fman_set_qmi_enq_th(struct fman_qmi_regs *qmi_rg, uint8_t val);
79712 +void fman_set_qmi_deq_th(struct fman_qmi_regs *qmi_rg, uint8_t val);
79713 +void fman_set_liodn_per_port(struct fman_rg *fman_rg,
79714 +                               uint8_t port_id,
79715 +                               uint16_t liodn_base,
79716 +                               uint16_t liodn_offset);
79717 +void fman_set_size_of_fifo(struct fman_bmi_regs *bmi_rg,
79718 +                               uint8_t port_id,
79719 +                               uint32_t size_of_fifo,
79720 +                               uint32_t extra_size_of_fifo);
79721 +void fman_set_num_of_tasks(struct fman_bmi_regs *bmi_rg,
79722 +                               uint8_t port_id,
79723 +                               uint8_t num_of_tasks,
79724 +                               uint8_t num_of_extra_tasks);
79725 +void fman_set_num_of_open_dmas(struct fman_bmi_regs *bmi_rg,
79726 +                               uint8_t port_id,
79727 +                               uint8_t num_of_open_dmas,
79728 +                               uint8_t num_of_extra_open_dmas,
79729 +                               uint8_t total_num_of_dmas);
79730 +void fman_set_ports_bandwidth(struct fman_bmi_regs *bmi_rg, uint8_t *weights);
79731 +int fman_set_exception(struct fman_rg *fman_rg,
79732 +                               enum fman_exceptions exception,
79733 +                               bool enable);
79734 +void fman_set_dma_emergency(struct fman_dma_regs *dma_rg, bool is_write,
79735 +                               bool enable);
79736 +void fman_set_dma_ext_bus_pri(struct fman_dma_regs *dma_rg, uint32_t pri);
79737 +void fman_set_congestion_group_pfc_priority(uint32_t *cpg_rg,
79738 +                                            uint32_t congestion_group_id,
79739 +                                            uint8_t piority_bit_map,
79740 +                                            uint32_t reg_num);
79741 +
79742 +
79743 +void fman_defconfig(struct fman_cfg *cfg, bool is_master);
79744 +void fman_regconfig(struct fman_rg *fman_rg, struct fman_cfg *cfg);
79745 +int fman_fpm_init(struct fman_fpm_regs *fpm_rg, struct fman_cfg *cfg);
79746 +int fman_bmi_init(struct fman_bmi_regs *bmi_rg, struct fman_cfg *cfg);
79747 +int fman_qmi_init(struct fman_qmi_regs *qmi_rg, struct fman_cfg *cfg);
79748 +int fman_dma_init(struct fman_dma_regs *dma_rg, struct fman_cfg *cfg);
79749 +void fman_free_resources(struct fman_rg *fman_rg);
79750 +int fman_enable(struct fman_rg *fman_rg, struct fman_cfg *cfg);
79751 +void fman_reset(struct fman_fpm_regs *fpm_rg);
79752 +void fman_resume(struct fman_fpm_regs *fpm_rg);
79753 +
79754 +
79755 +void fman_enable_time_stamp(struct fman_fpm_regs *fpm_rg,
79756 +                               uint8_t count1ubit,
79757 +                               uint16_t fm_clk_freq);
79758 +void fman_enable_rams_ecc(struct fman_fpm_regs *fpm_rg);
79759 +void fman_qmi_disable_dispatch_limit(struct fman_fpm_regs *fpm_rg);
79760 +void fman_disable_rams_ecc(struct fman_fpm_regs *fpm_rg);
79761 +void fman_resume_stalled_port(struct fman_fpm_regs *fpm_rg, uint8_t port_id);
79762 +int fman_reset_mac(struct fman_fpm_regs *fpm_rg, uint8_t macId, bool is_10g);
79763 +bool fman_is_port_stalled(struct fman_fpm_regs *fpm_rg, uint8_t port_id);
79764 +bool fman_rams_ecc_is_external_ctl(struct fman_fpm_regs *fpm_rg);
79765 +bool fman_is_qmi_halt_not_busy_state(struct fman_qmi_regs *qmi_rg);
79766 +int fman_modify_counter(struct fman_rg *fman_rg,
79767 +                               enum fman_counters reg_name,
79768 +                               uint32_t val);
79769 +void fman_force_intr(struct fman_rg *fman_rg,
79770 +                               enum fman_exceptions exception);
79771 +void fman_set_vsp_window(struct fman_bmi_regs *bmi_rg,
79772 +                                    uint8_t port_id,
79773 +                                        uint8_t base_storage_profile,
79774 +                                        uint8_t log2_num_of_profiles);
79775 +
79776 +/**************************************************************************//**
79777 + @Description       default values
79778 +*//***************************************************************************/
79779 +#define DEFAULT_CATASTROPHIC_ERR                E_FMAN_CATAST_ERR_STALL_PORT
79780 +#define DEFAULT_DMA_ERR                         E_FMAN_DMA_ERR_CATASTROPHIC
79781 +#define DEFAULT_HALT_ON_EXTERNAL_ACTIVATION     FALSE   /* do not change! if changed, must be disabled for rev1 ! */
79782 +#define DEFAULT_HALT_ON_UNRECOVERABLE_ECC_ERROR FALSE   /* do not change! if changed, must be disabled for rev1 ! */
79783 +#define DEFAULT_EXTERNAL_ECC_RAMS_ENABLE        FALSE
79784 +#define DEFAULT_AID_OVERRIDE                    FALSE
79785 +#define DEFAULT_AID_MODE                        E_FMAN_DMA_AID_OUT_TNUM
79786 +#define DEFAULT_DMA_COMM_Q_LOW                  0x2A
79787 +#define DEFAULT_DMA_COMM_Q_HIGH                 0x3F
79788 +#define DEFAULT_CACHE_OVERRIDE                  E_FMAN_DMA_NO_CACHE_OR
79789 +#define DEFAULT_DMA_CAM_NUM_OF_ENTRIES          64
79790 +#define DEFAULT_DMA_DBG_CNT_MODE                E_FMAN_DMA_DBG_NO_CNT
79791 +#define DEFAULT_DMA_EN_EMERGENCY                FALSE
79792 +#define DEFAULT_DMA_SOS_EMERGENCY               0
79793 +#define DEFAULT_DMA_WATCHDOG                    0 /* disabled */
79794 +#define DEFAULT_DMA_EN_EMERGENCY_SMOOTHER       FALSE
79795 +#define DEFAULT_DMA_EMERGENCY_SWITCH_COUNTER    0
79796 +#define DEFAULT_DISP_LIMIT                      0
79797 +#define DEFAULT_PRS_DISP_TH                     16
79798 +#define DEFAULT_PLCR_DISP_TH                    16
79799 +#define DEFAULT_KG_DISP_TH                      16
79800 +#define DEFAULT_BMI_DISP_TH                     16
79801 +#define DEFAULT_QMI_ENQ_DISP_TH                 16
79802 +#define DEFAULT_QMI_DEQ_DISP_TH                 16
79803 +#define DEFAULT_FM_CTL1_DISP_TH                 16
79804 +#define DEFAULT_FM_CTL2_DISP_TH                 16
79805 +#define DEFAULT_TNUM_AGING_PERIOD               4
79806 +
79807 +
79808 +#endif /* __FSL_FMAN_H */
79809 --- /dev/null
79810 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h
79811 @@ -0,0 +1,1096 @@
79812 +/*
79813 + * Copyright 2008-2012 Freescale Semiconductor Inc.
79814 + *
79815 + * Redistribution and use in source and binary forms, with or without
79816 + * modification, are permitted provided that the following conditions are met:
79817 + *     * Redistributions of source code must retain the above copyright
79818 + *       notice, this list of conditions and the following disclaimer.
79819 + *     * Redistributions in binary form must reproduce the above copyright
79820 + *       notice, this list of conditions and the following disclaimer in the
79821 + *       documentation and/or other materials provided with the distribution.
79822 + *     * Neither the name of Freescale Semiconductor nor the
79823 + *       names of its contributors may be used to endorse or promote products
79824 + *       derived from this software without specific prior written permission.
79825 + *
79826 + *
79827 + * ALTERNATIVELY, this software may be distributed under the terms of the
79828 + * GNU General Public License ("GPL") as published by the Free Software
79829 + * Foundation, either version 2 of that License or (at your option) any
79830 + * later version.
79831 + *
79832 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
79833 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
79834 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
79835 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
79836 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
79837 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79838 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
79839 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
79840 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
79841 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
79842 + */
79843 +
79844 +#ifndef __FSL_FMAN_DTSEC_H
79845 +#define __FSL_FMAN_DTSEC_H
79846 +
79847 +#include "common/general.h"
79848 +#include "fsl_enet.h"
79849 +
79850 +/**
79851 + * DOC: dTSEC Init sequence
79852 + *
79853 + * To prepare dTSEC block for transfer use the following call sequence:
79854 + *
79855 + * - fman_dtsec_defconfig() - This step is optional and yet recommended. Its
79856 + * use is to obtain the default dTSEC configuration parameters.
79857 + *
79858 + * - Change dtsec configuration in &dtsec_cfg. This structure will be used
79859 + * to customize the dTSEC behavior.
79860 + *
79861 + * - fman_dtsec_init() - Applies the configuration on dTSEC hardware.  Note that
79862 + * dTSEC is initialized while both Tx and Rx are disabled.
79863 + *
79864 + * - fman_dtsec_set_mac_address() - Set the station address (mac address).
79865 + * This is used by dTSEC to match against received packets.
79866 + *
79867 + * - fman_dtsec_adjust_link() - Set the link speed and duplex parameters
79868 + * after the PHY establishes the link.
79869 + *
79870 + * - dtsec_enable_tx() and dtsec_enable_rx() to enable transmission and
79871 + * reception.
79872 + */
79873 +
79874 +/**
79875 + * DOC: dTSEC Graceful stop
79876 + *
79877 + * To temporary stop dTSEC activity use fman_dtsec_stop_tx() and
79878 + * fman_dtsec_stop_rx(). Note that these functions request dTSEC graceful stop
79879 + * but return before this stop is complete.  To query for graceful stop
79880 + * completion use fman_dtsec_get_event() and check DTSEC_IEVENT_GTSC and
79881 + * DTSEC_IEVENT_GRSC bits. Alternatively the dTSEC interrupt mask can be set to
79882 + * enable graceful stop interrupts.
79883 + *
79884 + * To resume operation after graceful stop use fman_dtsec_start_tx() and
79885 + * fman_dtsec_start_rx().
79886 + */
79887 +
79888 +/**
79889 + * DOC: dTSEC interrupt handling
79890 + *
79891 + * This code does not provide an interrupt handler for dTSEC.  Instead this
79892 + * handler should be implemented and registered to the operating system by the
79893 + * caller.  Some primitives for accessing the event status and mask registers
79894 + * are provided.
79895 + *
79896 + * See "dTSEC Events" section for a list of events that dTSEC can generate.
79897 + */
79898 +
79899 +/**
79900 + * DOC: dTSEC Events
79901 + *
79902 + * Interrupt events cause dTSEC event bits to be set.  Software may poll the
79903 + * event register at any time to check for pending interrupts.  If an event
79904 + * occurs and its corresponding enable bit is set in the interrupt mask
79905 + * register, the event also causes a hardware interrupt at the PIC.
79906 + *
79907 + * To poll for event status use the fman_dtsec_get_event() function.
79908 + * To configure the interrupt mask use fman_dtsec_enable_interrupt() and
79909 + * fman_dtsec_disable_interrupt() functions.
79910 + * After servicing a dTSEC interrupt use fman_dtsec_ack_event to reset the
79911 + * serviced event bit.
79912 + *
79913 + * The following events may be signaled by dTSEC hardware:
79914 + *
79915 + * %DTSEC_IEVENT_BABR - Babbling receive error.  This bit indicates that
79916 + * a frame was received with length in excess of the MAC's maximum frame length
79917 + * register.
79918 + *
79919 + * %DTSEC_IEVENT_RXC - Receive control (pause frame) interrupt.  A pause
79920 + * control frame was received while Rx pause frame handling is enabled.
79921 + * Also see fman_dtsec_handle_rx_pause().
79922 + *
79923 + * %DTSEC_IEVENT_MSRO - MIB counter overflow.  The count for one of the MIB
79924 + * counters has exceeded the size of its register.
79925 + *
79926 + * %DTSEC_IEVENT_GTSC - Graceful transmit stop complete.  Graceful stop is now
79927 + * complete. The transmitter is in a stopped state, in which only pause frames
79928 + * can be transmitted.
79929 + * Also see fman_dtsec_stop_tx().
79930 + *
79931 + * %DTSEC_IEVENT_BABT - Babbling transmit error.  The transmitted frame length
79932 + * has exceeded the value in the MAC's Maximum Frame Length register.
79933 + *
79934 + * %DTSEC_IEVENT_TXC - Transmit control (pause frame) interrupt.  his bit
79935 + * indicates that a control frame was transmitted.
79936 + *
79937 + * %DTSEC_IEVENT_TXE - Transmit error.  This bit indicates that an error
79938 + * occurred on the transmitted channel.  This bit is set whenever any transmit
79939 + * error occurs which causes the dTSEC to discard all or part of a frame
79940 + * (LC, CRL, XFUN).
79941 + *
79942 + * %DTSEC_IEVENT_LC - Late collision.  This bit indicates that a collision
79943 + * occurred beyond the collision window (slot time) in half-duplex mode.
79944 + * The frame is truncated with a bad CRC and the remainder of the frame
79945 + * is discarded.
79946 + *
79947 + * %DTSEC_IEVENT_CRL - Collision retry limit.  is bit indicates that the number
79948 + * of successive transmission collisions has exceeded the MAC's half-duplex
79949 + * register's retransmission maximum count.  The frame is discarded without
79950 + * being transmitted and transmission of the next frame commences.  This only
79951 + * occurs while in half-duplex mode.
79952 + * The number of retransmit attempts can be set in
79953 + * &dtsec_halfdup_cfg.@retransmit before calling fman_dtsec_init().
79954 + *
79955 + * %DTSEC_IEVENT_XFUN - Transmit FIFO underrun.  This bit indicates that the
79956 + * transmit FIFO became empty before the complete frame was transmitted.
79957 + * The frame is truncated with a bad CRC and the remainder of the frame is
79958 + * discarded.
79959 + *
79960 + * %DTSEC_IEVENT_MAG - TBD
79961 + *
79962 + * %DTSEC_IEVENT_MMRD - MII management read completion.
79963 + *
79964 + * %DTSEC_IEVENT_MMWR - MII management write completion.
79965 + *
79966 + * %DTSEC_IEVENT_GRSC - Graceful receive stop complete.  It allows the user to
79967 + * know if the system has completed the stop and it is safe to write to receive
79968 + * registers (status, control or configuration registers) that are used by the
79969 + * system during normal operation.
79970 + *
79971 + * %DTSEC_IEVENT_TDPE - Internal data error on transmit.  This bit indicates
79972 + * that the dTSEC has detected a parity error on its stored transmit data, which
79973 + * is likely to compromise the validity of recently transferred frames.
79974 + *
79975 + * %DTSEC_IEVENT_RDPE - Internal data error on receive.  This bit indicates that
79976 + * the dTSEC has detected a parity error on its stored receive data, which is
79977 + * likely to compromise the validity of recently transferred frames.
79978 + */
79979 +/* Interrupt Mask Register (IMASK) */
79980 +#define DTSEC_IMASK_BREN       0x80000000
79981 +#define DTSEC_IMASK_RXCEN      0x40000000
79982 +#define DTSEC_IMASK_MSROEN     0x04000000
79983 +#define DTSEC_IMASK_GTSCEN     0x02000000
79984 +#define DTSEC_IMASK_BTEN       0x01000000
79985 +#define DTSEC_IMASK_TXCEN      0x00800000
79986 +#define DTSEC_IMASK_TXEEN      0x00400000
79987 +#define DTSEC_IMASK_LCEN       0x00040000
79988 +#define DTSEC_IMASK_CRLEN      0x00020000
79989 +#define DTSEC_IMASK_XFUNEN     0x00010000
79990 +#define DTSEC_IMASK_ABRTEN     0x00008000
79991 +#define DTSEC_IMASK_IFERREN    0x00004000
79992 +#define DTSEC_IMASK_MAGEN      0x00000800
79993 +#define DTSEC_IMASK_MMRDEN     0x00000400
79994 +#define DTSEC_IMASK_MMWREN     0x00000200
79995 +#define DTSEC_IMASK_GRSCEN     0x00000100
79996 +#define DTSEC_IMASK_TDPEEN     0x00000002
79997 +#define DTSEC_IMASK_RDPEEN     0x00000001
79998 +
79999 +#define DTSEC_EVENTS_MASK                                      \
80000 +       ((uint32_t)(DTSEC_IMASK_BREN    | \
80001 +                               DTSEC_IMASK_RXCEN   | \
80002 +                               DTSEC_IMASK_BTEN    | \
80003 +                               DTSEC_IMASK_TXCEN   | \
80004 +                               DTSEC_IMASK_TXEEN   | \
80005 +                               DTSEC_IMASK_ABRTEN  | \
80006 +                               DTSEC_IMASK_LCEN    | \
80007 +                               DTSEC_IMASK_CRLEN   | \
80008 +                               DTSEC_IMASK_XFUNEN  | \
80009 +                               DTSEC_IMASK_IFERREN | \
80010 +                               DTSEC_IMASK_MAGEN   | \
80011 +                               DTSEC_IMASK_TDPEEN  | \
80012 +                               DTSEC_IMASK_RDPEEN))
80013 +
80014 +/* dtsec timestamp event bits */
80015 +#define TMR_PEMASK_TSREEN      0x00010000
80016 +#define TMR_PEVENT_TSRE                0x00010000
80017 +
80018 +/* Group address bit indication */
80019 +#define MAC_GROUP_ADDRESS      0x0000010000000000ULL
80020 +/* size in bytes of L2 address */
80021 +#define MAC_ADDRLEN            6
80022 +
80023 +#define DEFAULT_HALFDUP_ON             FALSE
80024 +#define DEFAULT_HALFDUP_RETRANSMIT     0xf
80025 +#define DEFAULT_HALFDUP_COLL_WINDOW    0x37
80026 +#define DEFAULT_HALFDUP_EXCESS_DEFER   TRUE
80027 +#define DEFAULT_HALFDUP_NO_BACKOFF     FALSE
80028 +#define DEFAULT_HALFDUP_BP_NO_BACKOFF  FALSE
80029 +#define DEFAULT_HALFDUP_ALT_BACKOFF_VAL        0x0A
80030 +#define DEFAULT_HALFDUP_ALT_BACKOFF_EN FALSE
80031 +#define DEFAULT_RX_DROP_BCAST          FALSE
80032 +#define DEFAULT_RX_SHORT_FRM           TRUE
80033 +#define DEFAULT_RX_LEN_CHECK           FALSE
80034 +#define DEFAULT_TX_PAD_CRC             TRUE
80035 +#define DEFAULT_TX_CRC                 FALSE
80036 +#define DEFAULT_RX_CTRL_ACC            FALSE
80037 +#define DEFAULT_TX_PAUSE_TIME          0xf000
80038 +#define DEFAULT_TBIPA                  5
80039 +#define DEFAULT_RX_PREPEND             0
80040 +#define DEFAULT_PTP_TSU_EN             TRUE
80041 +#define DEFAULT_PTP_EXCEPTION_EN       TRUE
80042 +#define DEFAULT_PREAMBLE_LEN           7
80043 +#define DEFAULT_RX_PREAMBLE            FALSE
80044 +#define DEFAULT_TX_PREAMBLE            FALSE
80045 +#define DEFAULT_LOOPBACK               FALSE
80046 +#define DEFAULT_RX_TIME_STAMP_EN       FALSE
80047 +#define DEFAULT_TX_TIME_STAMP_EN       FALSE
80048 +#define DEFAULT_RX_FLOW                        TRUE
80049 +#define DEFAULT_TX_FLOW                        TRUE
80050 +#define DEFAULT_RX_GROUP_HASH_EXD      FALSE
80051 +#define DEFAULT_TX_PAUSE_TIME_EXTD     0
80052 +#define DEFAULT_RX_PROMISC             FALSE
80053 +#define DEFAULT_NON_BACK_TO_BACK_IPG1  0x40
80054 +#define DEFAULT_NON_BACK_TO_BACK_IPG2  0x60
80055 +#define DEFAULT_MIN_IFG_ENFORCEMENT    0x50
80056 +#define DEFAULT_BACK_TO_BACK_IPG       0x60
80057 +#define DEFAULT_MAXIMUM_FRAME          0x600
80058 +#define DEFAULT_TBI_PHY_ADDR           5
80059 +#define DEFAULT_WAKE_ON_LAN                    FALSE
80060 +
80061 +/* register related defines (bits, field offsets..) */
80062 +#define DTSEC_ID1_ID                   0xffff0000
80063 +#define DTSEC_ID1_REV_MJ               0x0000FF00
80064 +#define DTSEC_ID1_REV_MN               0x000000ff
80065 +
80066 +#define DTSEC_ID2_INT_REDUCED_OFF      0x00010000
80067 +#define DTSEC_ID2_INT_NORMAL_OFF       0x00020000
80068 +
80069 +#define DTSEC_ECNTRL_CLRCNT            0x00004000
80070 +#define DTSEC_ECNTRL_AUTOZ             0x00002000
80071 +#define DTSEC_ECNTRL_STEN              0x00001000
80072 +#define DTSEC_ECNTRL_CFG_RO            0x80000000
80073 +#define DTSEC_ECNTRL_GMIIM             0x00000040
80074 +#define DTSEC_ECNTRL_TBIM              0x00000020
80075 +#define DTSEC_ECNTRL_SGMIIM            0x00000002
80076 +#define DTSEC_ECNTRL_RPM               0x00000010
80077 +#define DTSEC_ECNTRL_R100M             0x00000008
80078 +#define DTSEC_ECNTRL_RMM               0x00000004
80079 +#define DTSEC_ECNTRL_QSGMIIM           0x00000001
80080 +
80081 +#define DTSEC_TCTRL_THDF               0x00000800
80082 +#define DTSEC_TCTRL_TTSE               0x00000040
80083 +#define DTSEC_TCTRL_GTS                        0x00000020
80084 +#define DTSEC_TCTRL_TFC_PAUSE          0x00000010
80085 +
80086 +/* PTV offsets */
80087 +#define PTV_PTE_OFST           16
80088 +
80089 +#define RCTRL_CFA              0x00008000
80090 +#define RCTRL_GHTX             0x00000400
80091 +#define RCTRL_RTSE             0x00000040
80092 +#define RCTRL_GRS              0x00000020
80093 +#define RCTRL_BC_REJ           0x00000010
80094 +#define RCTRL_MPROM            0x00000008
80095 +#define RCTRL_RSF              0x00000004
80096 +#define RCTRL_UPROM            0x00000001
80097 +#define RCTRL_PROM             (RCTRL_UPROM | RCTRL_MPROM)
80098 +
80099 +#define TMR_CTL_ESFDP          0x00000800
80100 +#define TMR_CTL_ESFDE          0x00000400
80101 +
80102 +#define MACCFG1_SOFT_RESET     0x80000000
80103 +#define MACCFG1_LOOPBACK       0x00000100
80104 +#define MACCFG1_RX_FLOW                0x00000020
80105 +#define MACCFG1_TX_FLOW                0x00000010
80106 +#define MACCFG1_TX_EN          0x00000001
80107 +#define MACCFG1_RX_EN          0x00000004
80108 +#define MACCFG1_RESET_RxMC     0x00080000
80109 +#define MACCFG1_RESET_TxMC     0x00040000
80110 +#define MACCFG1_RESET_RxFUN    0x00020000
80111 +#define MACCFG1_RESET_TxFUN    0x00010000
80112 +
80113 +#define MACCFG2_NIBBLE_MODE    0x00000100
80114 +#define MACCFG2_BYTE_MODE      0x00000200
80115 +#define MACCFG2_PRE_AM_Rx_EN   0x00000080
80116 +#define MACCFG2_PRE_AM_Tx_EN   0x00000040
80117 +#define MACCFG2_LENGTH_CHECK   0x00000010
80118 +#define MACCFG2_MAGIC_PACKET_EN        0x00000008
80119 +#define MACCFG2_PAD_CRC_EN     0x00000004
80120 +#define MACCFG2_CRC_EN         0x00000002
80121 +#define MACCFG2_FULL_DUPLEX    0x00000001
80122 +
80123 +#define PREAMBLE_LENGTH_SHIFT  12
80124 +
80125 +#define IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT    24
80126 +#define IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT    16
80127 +#define IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT       8
80128 +
80129 +#define IPGIFG_NON_BACK_TO_BACK_IPG_1  0x7F000000
80130 +#define IPGIFG_NON_BACK_TO_BACK_IPG_2  0x007F0000
80131 +#define IPGIFG_MIN_IFG_ENFORCEMENT     0x0000FF00
80132 +#define IPGIFG_BACK_TO_BACK_IPG                0x0000007F
80133 +
80134 +#define HAFDUP_ALT_BEB                 0x00080000
80135 +#define HAFDUP_BP_NO_BACKOFF           0x00040000
80136 +#define HAFDUP_NO_BACKOFF              0x00020000
80137 +#define HAFDUP_EXCESS_DEFER            0x00010000
80138 +#define HAFDUP_COLLISION_WINDOW                0x000003ff
80139 +
80140 +#define HAFDUP_ALTERNATE_BEB_TRUNCATION_SHIFT  20
80141 +#define HAFDUP_RETRANSMISSION_MAX_SHIFT                12
80142 +#define HAFDUP_RETRANSMISSION_MAX              0x0000f000
80143 +
80144 +#define NUM_OF_HASH_REGS       8 /* Number of hash table registers */
80145 +
80146 +/* CAR1/2 bits */
80147 +#define DTSEC_CAR1_TR64                0x80000000
80148 +#define DTSEC_CAR1_TR127       0x40000000
80149 +#define DTSEC_CAR1_TR255       0x20000000
80150 +#define DTSEC_CAR1_TR511       0x10000000
80151 +#define DTSEC_CAR1_TRK1                0x08000000
80152 +#define DTSEC_CAR1_TRMAX       0x04000000
80153 +#define DTSEC_CAR1_TRMGV       0x02000000
80154 +
80155 +#define DTSEC_CAR1_RBYT                0x00010000
80156 +#define DTSEC_CAR1_RPKT                0x00008000
80157 +#define DTSEC_CAR1_RFCS                0x00004000
80158 +#define DTSEC_CAR1_RMCA                0x00002000
80159 +#define DTSEC_CAR1_RBCA                0x00001000
80160 +#define DTSEC_CAR1_RXCF                0x00000800
80161 +#define DTSEC_CAR1_RXPF                0x00000400
80162 +#define DTSEC_CAR1_RXUO                0x00000200
80163 +#define DTSEC_CAR1_RALN                0x00000100
80164 +#define DTSEC_CAR1_RFLR                0x00000080
80165 +#define DTSEC_CAR1_RCDE                0x00000040
80166 +#define DTSEC_CAR1_RCSE                0x00000020
80167 +#define DTSEC_CAR1_RUND                0x00000010
80168 +#define DTSEC_CAR1_ROVR                0x00000008
80169 +#define DTSEC_CAR1_RFRG                0x00000004
80170 +#define DTSEC_CAR1_RJBR                0x00000002
80171 +#define DTSEC_CAR1_RDRP                0x00000001
80172 +
80173 +#define DTSEC_CAR2_TJBR                0x00080000
80174 +#define DTSEC_CAR2_TFCS                0x00040000
80175 +#define DTSEC_CAR2_TXCF                0x00020000
80176 +#define DTSEC_CAR2_TOVR                0x00010000
80177 +#define DTSEC_CAR2_TUND                0x00008000
80178 +#define DTSEC_CAR2_TFRG                0x00004000
80179 +#define DTSEC_CAR2_TBYT                0x00002000
80180 +#define DTSEC_CAR2_TPKT                0x00001000
80181 +#define DTSEC_CAR2_TMCA                0x00000800
80182 +#define DTSEC_CAR2_TBCA                0x00000400
80183 +#define DTSEC_CAR2_TXPF                0x00000200
80184 +#define DTSEC_CAR2_TDFR                0x00000100
80185 +#define DTSEC_CAR2_TEDF                0x00000080
80186 +#define DTSEC_CAR2_TSCL                0x00000040
80187 +#define DTSEC_CAR2_TMCL                0x00000020
80188 +#define DTSEC_CAR2_TLCL                0x00000010
80189 +#define DTSEC_CAR2_TXCL                0x00000008
80190 +#define DTSEC_CAR2_TNCL                0x00000004
80191 +#define DTSEC_CAR2_TDRP                0x00000001
80192 +
80193 +#define CAM1_ERRORS_ONLY \
80194 +       (DTSEC_CAR1_RXPF | DTSEC_CAR1_RALN | DTSEC_CAR1_RFLR \
80195 +       | DTSEC_CAR1_RCDE | DTSEC_CAR1_RCSE | DTSEC_CAR1_RUND \
80196 +       | DTSEC_CAR1_ROVR | DTSEC_CAR1_RFRG | DTSEC_CAR1_RJBR \
80197 +       | DTSEC_CAR1_RDRP)
80198 +
80199 +#define CAM2_ERRORS_ONLY (DTSEC_CAR2_TFCS | DTSEC_CAR2_TXPF | DTSEC_CAR2_TDRP)
80200 +
80201 +/*
80202 + * Group of dTSEC specific counters relating to the standard RMON MIB Group 1
80203 + * (or Ethernet) statistics.
80204 + */
80205 +#define CAM1_MIB_GRP_1 \
80206 +       (DTSEC_CAR1_RDRP | DTSEC_CAR1_RBYT | DTSEC_CAR1_RPKT | DTSEC_CAR1_RMCA\
80207 +       | DTSEC_CAR1_RBCA | DTSEC_CAR1_RALN | DTSEC_CAR1_RUND | DTSEC_CAR1_ROVR\
80208 +       | DTSEC_CAR1_RFRG | DTSEC_CAR1_RJBR \
80209 +       | DTSEC_CAR1_TR64 | DTSEC_CAR1_TR127 | DTSEC_CAR1_TR255 \
80210 +       | DTSEC_CAR1_TR511 | DTSEC_CAR1_TRMAX)
80211 +
80212 +#define CAM2_MIB_GRP_1 (DTSEC_CAR2_TNCL | DTSEC_CAR2_TDRP)
80213 +
80214 +/* memory map */
80215 +
80216 +struct dtsec_regs {
80217 +       /* dTSEC General Control and Status Registers */
80218 +       uint32_t tsec_id;       /* 0x000 ETSEC_ID register */
80219 +       uint32_t tsec_id2;      /* 0x004 ETSEC_ID2 register */
80220 +       uint32_t ievent;        /* 0x008 Interrupt event register */
80221 +       uint32_t imask;         /* 0x00C Interrupt mask register */
80222 +       uint32_t reserved0010[1];
80223 +       uint32_t ecntrl;        /* 0x014 E control register */
80224 +       uint32_t ptv;           /* 0x018 Pause time value register */
80225 +       uint32_t tbipa;         /* 0x01C TBI PHY address register */
80226 +       uint32_t tmr_ctrl;      /* 0x020 Time-stamp Control register */
80227 +       uint32_t tmr_pevent;    /* 0x024 Time-stamp event register */
80228 +       uint32_t tmr_pemask;    /* 0x028 Timer event mask register */
80229 +       uint32_t reserved002c[5];
80230 +       uint32_t tctrl;         /* 0x040 Transmit control register */
80231 +       uint32_t reserved0044[3];
80232 +       uint32_t rctrl;         /* 0x050 Receive control register */
80233 +       uint32_t reserved0054[11];
80234 +       uint32_t igaddr[8];     /* 0x080-0x09C Individual/group address */
80235 +       uint32_t gaddr[8];      /* 0x0A0-0x0BC Group address registers 0-7 */
80236 +       uint32_t reserved00c0[16];
80237 +       uint32_t maccfg1;               /* 0x100 MAC configuration #1 */
80238 +       uint32_t maccfg2;               /* 0x104 MAC configuration #2 */
80239 +       uint32_t ipgifg;                /* 0x108 IPG/IFG */
80240 +       uint32_t hafdup;                /* 0x10C Half-duplex */
80241 +       uint32_t maxfrm;                /* 0x110 Maximum frame */
80242 +       uint32_t reserved0114[10];
80243 +       uint32_t ifstat;                /* 0x13C Interface status */
80244 +       uint32_t macstnaddr1;           /* 0x140 Station Address,part 1 */
80245 +       uint32_t macstnaddr2;           /* 0x144 Station Address,part 2  */
80246 +       struct {
80247 +           uint32_t exact_match1; /* octets 1-4 */
80248 +           uint32_t exact_match2; /* octets 5-6 */
80249 +       } macaddr[15];  /* 0x148-0x1BC mac exact match addresses 1-15 */
80250 +       uint32_t reserved01c0[16];
80251 +       uint32_t tr64;  /* 0x200 transmit and receive 64 byte frame counter */
80252 +       uint32_t tr127; /* 0x204 transmit and receive 65 to 127 byte frame
80253 +                        * counter */
80254 +       uint32_t tr255; /* 0x208 transmit and receive 128 to 255 byte frame
80255 +                        * counter */
80256 +       uint32_t tr511; /* 0x20C transmit and receive 256 to 511 byte frame
80257 +                        * counter */
80258 +       uint32_t tr1k;  /* 0x210 transmit and receive 512 to 1023 byte frame
80259 +                        * counter */
80260 +       uint32_t trmax; /* 0x214 transmit and receive 1024 to 1518 byte frame
80261 +                        * counter */
80262 +       uint32_t trmgv; /* 0x218 transmit and receive 1519 to 1522 byte good
80263 +                        * VLAN frame count */
80264 +       uint32_t rbyt;  /* 0x21C receive byte counter */
80265 +       uint32_t rpkt;  /* 0x220 receive packet counter */
80266 +       uint32_t rfcs;  /* 0x224 receive FCS error counter */
80267 +       uint32_t rmca;  /* 0x228 RMCA receive multicast packet counter */
80268 +       uint32_t rbca;  /* 0x22C receive broadcast packet counter */
80269 +       uint32_t rxcf;  /* 0x230 receive control frame packet counter */
80270 +       uint32_t rxpf;  /* 0x234 receive pause frame packet counter */
80271 +       uint32_t rxuo;  /* 0x238 receive unknown OP code counter */
80272 +       uint32_t raln;  /* 0x23C receive alignment error counter */
80273 +       uint32_t rflr;  /* 0x240 receive frame length error counter */
80274 +       uint32_t rcde;  /* 0x244 receive code error counter */
80275 +       uint32_t rcse;  /* 0x248 receive carrier sense error counter */
80276 +       uint32_t rund;  /* 0x24C receive undersize packet counter */
80277 +       uint32_t rovr;  /* 0x250 receive oversize packet counter */
80278 +       uint32_t rfrg;  /* 0x254 receive fragments counter */
80279 +       uint32_t rjbr;  /* 0x258 receive jabber counter */
80280 +       uint32_t rdrp;  /* 0x25C receive drop */
80281 +       uint32_t tbyt;  /* 0x260 transmit byte counter */
80282 +       uint32_t tpkt;  /* 0x264 transmit packet counter */
80283 +       uint32_t tmca;  /* 0x268 transmit multicast packet counter */
80284 +       uint32_t tbca;  /* 0x26C transmit broadcast packet counter */
80285 +       uint32_t txpf;  /* 0x270 transmit pause control frame counter */
80286 +       uint32_t tdfr;  /* 0x274 transmit deferral packet counter */
80287 +       uint32_t tedf;  /* 0x278 transmit excessive deferral packet counter */
80288 +       uint32_t tscl;  /* 0x27C transmit single collision packet counter */
80289 +       uint32_t tmcl;  /* 0x280 transmit multiple collision packet counter */
80290 +       uint32_t tlcl;  /* 0x284 transmit late collision packet counter */
80291 +       uint32_t txcl;  /* 0x288 transmit excessive collision packet counter */
80292 +       uint32_t tncl;  /* 0x28C transmit total collision counter */
80293 +       uint32_t reserved0290[1];
80294 +       uint32_t tdrp;  /* 0x294 transmit drop frame counter */
80295 +       uint32_t tjbr;  /* 0x298 transmit jabber frame counter */
80296 +       uint32_t tfcs;  /* 0x29C transmit FCS error counter */
80297 +       uint32_t txcf;  /* 0x2A0 transmit control frame counter */
80298 +       uint32_t tovr;  /* 0x2A4 transmit oversize frame counter */
80299 +       uint32_t tund;  /* 0x2A8 transmit undersize frame counter */
80300 +       uint32_t tfrg;  /* 0x2AC transmit fragments frame counter */
80301 +       uint32_t car1;  /* 0x2B0 carry register one register* */
80302 +       uint32_t car2;  /* 0x2B4 carry register two register* */
80303 +       uint32_t cam1;  /* 0x2B8 carry register one mask register */
80304 +       uint32_t cam2;  /* 0x2BC carry register two mask register */
80305 +       uint32_t reserved02c0[848];
80306 +};
80307 +
80308 +/**
80309 + * struct dtsec_mib_grp_1_counters - MIB counter overflows
80310 + *
80311 + * @tr64:      Transmit and Receive 64 byte frame count.  Increment for each
80312 + *             good or bad frame, of any type, transmitted or received, which
80313 + *             is 64 bytes in length.
80314 + * @tr127:     Transmit and Receive 65 to 127 byte frame count.  Increments for
80315 + *             each good or bad frame of any type, transmitted or received,
80316 + *             which is 65-127 bytes in length.
80317 + * @tr255:     Transmit and Receive 128 to 255 byte frame count.  Increments
80318 + *             for each good or bad frame, of any type, transmitted or
80319 + *             received, which is 128-255 bytes in length.
80320 + * @tr511:     Transmit and Receive 256 to 511 byte frame count.  Increments
80321 + *             for each good or bad frame, of any type, transmitted or
80322 + *             received, which is 256-511 bytes in length.
80323 + * @tr1k:      Transmit and Receive 512 to 1023 byte frame count.  Increments
80324 + *             for each good or bad frame, of any type, transmitted or
80325 + *             received, which is 512-1023 bytes in length.
80326 + * @trmax:     Transmit and Receive 1024 to 1518 byte frame count.  Increments
80327 + *             for each good or bad frame, of any type, transmitted or
80328 + *             received, which is 1024-1518 bytes in length.
80329 + * @rfrg:      Receive fragments count.  Increments for each received frame
80330 + *             which is less than 64 bytes in length and contains an invalid
80331 + *             FCS.  This includes integral and non-integral lengths.
80332 + * @rjbr:      Receive jabber count.  Increments for received frames which
80333 + *             exceed 1518 (non VLAN) or 1522 (VLAN) bytes and contain an
80334 + *             invalid FCS.  This includes alignment errors.
80335 + * @rdrp:      Receive dropped packets count.  Increments for received frames
80336 + *             which are streamed to system but are later dropped due to lack
80337 + *             of system resources.  Does not increment for frames rejected due
80338 + *             to address filtering.
80339 + * @raln:      Receive alignment error count.  Increments for each received
80340 + *             frame from 64 to 1518 (non VLAN) or 1522 (VLAN) which contains
80341 + *             an invalid FCS and is not an integral number of bytes.
80342 + * @rund:      Receive undersize packet count.  Increments each time a frame is
80343 + *             received which is less than 64 bytes in length and contains a
80344 + *             valid FCS and is otherwise well formed.  This count does not
80345 + *             include range length errors.
80346 + * @rovr:      Receive oversize packet count.  Increments each time a frame is
80347 + *             received which exceeded 1518 (non VLAN) or 1522 (VLAN) and
80348 + *             contains a valid FCS and is otherwise well formed.
80349 + * @rbyt:      Receive byte count.  Increments by the byte count of frames
80350 + *             received, including those in bad packets, excluding preamble and
80351 + *             SFD but including FCS bytes.
80352 + * @rpkt:      Receive packet count.  Increments for each received frame
80353 + *             (including bad packets, all unicast, broadcast, and multicast
80354 + *             packets).
80355 + * @rmca:      Receive multicast packet count.  Increments for each multicast
80356 + *             frame with valid CRC and of lengths 64 to 1518 (non VLAN) or
80357 + *             1522 (VLAN), excluding broadcast frames. This count does not
80358 + *             include range/length errors.
80359 + * @rbca:      Receive broadcast packet count.  Increments for each broadcast
80360 + *             frame with valid CRC and of lengths 64 to 1518 (non VLAN) or
80361 + *             1522 (VLAN), excluding multicast frames. Does not include
80362 + *             range/length errors.
80363 + * @tdrp:      Transmit drop frame count.  Increments each time a memory error
80364 + *             or an underrun has occurred.
80365 + * @tncl:      Transmit total collision counter. Increments by the number of
80366 + *             collisions experienced during the transmission of a frame. Does
80367 + *             not increment for aborted frames.
80368 + *
80369 + * The structure contains a group of dTSEC HW specific counters relating to the
80370 + * standard RMON MIB Group 1 (or Ethernet statistics) counters.  This structure
80371 + * is counting only the carry events of the corresponding HW counters.
80372 + *
80373 + * tr64 to trmax notes: Frame sizes specified are considered excluding preamble
80374 + * and SFD but including FCS bytes.
80375 + */
80376 +struct dtsec_mib_grp_1_counters {
80377 +       uint64_t        rdrp;
80378 +       uint64_t        tdrp;
80379 +       uint64_t        rbyt;
80380 +       uint64_t        rpkt;
80381 +       uint64_t        rbca;
80382 +       uint64_t        rmca;
80383 +       uint64_t        raln;
80384 +       uint64_t        rund;
80385 +       uint64_t        rovr;
80386 +       uint64_t        rfrg;
80387 +       uint64_t        rjbr;
80388 +       uint64_t        tncl;
80389 +       uint64_t        tr64;
80390 +       uint64_t        tr127;
80391 +       uint64_t        tr255;
80392 +       uint64_t        tr511;
80393 +       uint64_t        tr1k;
80394 +       uint64_t        trmax;
80395 +};
80396 +
80397 +enum dtsec_stat_counters {
80398 +       E_DTSEC_STAT_TR64,
80399 +       E_DTSEC_STAT_TR127,
80400 +       E_DTSEC_STAT_TR255,
80401 +       E_DTSEC_STAT_TR511,
80402 +       E_DTSEC_STAT_TR1K,
80403 +       E_DTSEC_STAT_TRMAX,
80404 +       E_DTSEC_STAT_TRMGV,
80405 +       E_DTSEC_STAT_RBYT,
80406 +       E_DTSEC_STAT_RPKT,
80407 +       E_DTSEC_STAT_RMCA,
80408 +       E_DTSEC_STAT_RBCA,
80409 +       E_DTSEC_STAT_RXPF,
80410 +       E_DTSEC_STAT_RALN,
80411 +       E_DTSEC_STAT_RFLR,
80412 +       E_DTSEC_STAT_RCDE,
80413 +       E_DTSEC_STAT_RCSE,
80414 +       E_DTSEC_STAT_RUND,
80415 +       E_DTSEC_STAT_ROVR,
80416 +       E_DTSEC_STAT_RFRG,
80417 +       E_DTSEC_STAT_RJBR,
80418 +       E_DTSEC_STAT_RDRP,
80419 +       E_DTSEC_STAT_TFCS,
80420 +       E_DTSEC_STAT_TBYT,
80421 +       E_DTSEC_STAT_TPKT,
80422 +       E_DTSEC_STAT_TMCA,
80423 +       E_DTSEC_STAT_TBCA,
80424 +       E_DTSEC_STAT_TXPF,
80425 +       E_DTSEC_STAT_TNCL,
80426 +       E_DTSEC_STAT_TDRP
80427 +};
80428 +
80429 +enum dtsec_stat_level {
80430 +       /* No statistics */
80431 +       E_MAC_STAT_NONE = 0,
80432 +       /* Only RMON MIB group 1 (ether stats). Optimized for performance */
80433 +       E_MAC_STAT_MIB_GRP1,
80434 +       /* Only error counters are available. Optimized for performance */
80435 +       E_MAC_STAT_PARTIAL,
80436 +       /* All counters available. Not optimized for performance */
80437 +       E_MAC_STAT_FULL
80438 +};
80439 +
80440 +
80441 +/**
80442 + * struct dtsec_cfg - dTSEC configuration
80443 + *
80444 + * @halfdup_on:                Transmit half-duplex flow control, under software
80445 + *                     control for 10/100-Mbps half-duplex media. If set,
80446 + *                     back pressure is applied to media by raising carrier.
80447 + * @halfdup_retransmit:        Number of retransmission attempts following a collision.
80448 + *                     If this is exceeded dTSEC aborts transmission due to
80449 + *                     excessive collisions. The standard specifies the
80450 + *                     attempt limit to be 15.
80451 + * @halfdup_coll_window:The number of bytes of the frame during which
80452 + *                     collisions may occur. The default value of 55
80453 + *                     corresponds to the frame byte at the end of the
80454 + *                     standard 512-bit slot time window. If collisions are
80455 + *                     detected after this byte, the late collision event is
80456 + *                     asserted and transmission of current frame is aborted.
80457 + * @rx_drop_bcast:     Discard broadcast frames.  If set, all broadcast frames
80458 + *                     will be discarded by dTSEC.
80459 + * @rx_short_frm:      Accept short frames.  If set, dTSEC will accept frames
80460 + *                     of length 14..63 bytes.
80461 + * @rx_len_check:      Length check for received frames.  If set, the MAC
80462 + *                     checks the frame's length field on receive to ensure it
80463 + *                     matches the actual data field length. This only works
80464 + *                     for received frames with length field less than 1500.
80465 + *                     No check is performed for larger frames.
80466 + * @tx_pad_crc:                Pad and append CRC.  If set, the MAC pads all
80467 + *                     transmitted short frames and appends a CRC to every
80468 + *                     frame regardless of padding requirement.
80469 + * @tx_crc:            Transmission CRC enable.  If set, the MAC appends a CRC
80470 + *                     to all frames.  If frames presented to the MAC have a
80471 + *                     valid length and contain a valid CRC, @tx_crc should be
80472 + *                     reset.
80473 + *                     This field is ignored if @tx_pad_crc is set.
80474 + * @rx_ctrl_acc:       Control frame accept.  If set, this overrides 802.3
80475 + *                     standard control frame behavior, and all Ethernet frames
80476 + *                     that have an ethertype of 0x8808 are treated as normal
80477 + *                     Ethernet frames and passed up to the packet interface on
80478 + *                     a DA match.  Received pause control frames are passed to
80479 + *                     the packet interface only if Rx flow control is also
80480 + *                     disabled.  See fman_dtsec_handle_rx_pause() function.
80481 + * @tx_pause_time:     Transmit pause time value.  This pause value is used as
80482 + *                     part of the pause frame to be sent when a transmit pause
80483 + *                     frame is initiated.  If set to 0 this disables
80484 + *                     transmission of pause frames.
80485 + * @rx_preamble:       Receive preamble enable.  If set, the MAC recovers the
80486 + *                     received Ethernet 7-byte preamble and passes it to the
80487 + *                     packet interface at the start of each received frame.
80488 + *                     This field should be reset for internal MAC loop-back
80489 + *                     mode.
80490 + * @tx_preamble:       User defined preamble enable for transmitted frames.
80491 + *                     If set, a user-defined preamble must passed to the MAC
80492 + *                     and it is transmitted instead of the standard preamble.
80493 + * @preamble_len:      Length, in bytes, of the preamble field preceding each
80494 + *                     Ethernet start-of-frame delimiter byte.  The default
80495 + *                     value of 0x7 should be used in order to guarantee
80496 + *                     reliable operation with IEEE 802.3 compliant hardware.
80497 + * @rx_prepend:                Packet alignment padding length.  The specified number
80498 + *                     of bytes (1-31) of zero padding are inserted before the
80499 + *                     start of each received frame.  For Ethernet, where
80500 + *                     optional preamble extraction is enabled, the padding
80501 + *                     appears before the preamble, otherwise the padding
80502 + *                     precedes the layer 2 header.
80503 + *
80504 + * This structure contains basic dTSEC configuration and must be passed to
80505 + * fman_dtsec_init() function.  A default set of configuration values can be
80506 + * obtained by calling fman_dtsec_defconfig().
80507 + */
80508 +struct dtsec_cfg {
80509 +       bool            halfdup_on;
80510 +       bool            halfdup_alt_backoff_en;
80511 +       bool            halfdup_excess_defer;
80512 +       bool            halfdup_no_backoff;
80513 +       bool            halfdup_bp_no_backoff;
80514 +       uint8_t         halfdup_alt_backoff_val;
80515 +       uint16_t        halfdup_retransmit;
80516 +       uint16_t        halfdup_coll_window;
80517 +       bool            rx_drop_bcast;
80518 +       bool            rx_short_frm;
80519 +       bool            rx_len_check;
80520 +       bool            tx_pad_crc;
80521 +       bool            tx_crc;
80522 +       bool            rx_ctrl_acc;
80523 +       unsigned short  tx_pause_time;
80524 +       unsigned short  tbipa;
80525 +       bool            ptp_tsu_en;
80526 +       bool            ptp_exception_en;
80527 +       bool            rx_preamble;
80528 +       bool            tx_preamble;
80529 +       unsigned char   preamble_len;
80530 +       unsigned char   rx_prepend;
80531 +       bool            loopback;
80532 +       bool            rx_time_stamp_en;
80533 +       bool            tx_time_stamp_en;
80534 +       bool            rx_flow;
80535 +       bool            tx_flow;
80536 +       bool            rx_group_hash_exd;
80537 +       bool            rx_promisc;
80538 +       uint8_t         tbi_phy_addr;
80539 +       uint16_t        tx_pause_time_extd;
80540 +       uint16_t        maximum_frame;
80541 +       uint32_t        non_back_to_back_ipg1;
80542 +       uint32_t        non_back_to_back_ipg2;
80543 +       uint32_t        min_ifg_enforcement;
80544 +       uint32_t        back_to_back_ipg;
80545 +       bool            wake_on_lan;
80546 +};
80547 +
80548 +
80549 +/**
80550 + * fman_dtsec_defconfig() - Get default dTSEC configuration
80551 + * @cfg:       pointer to configuration structure.
80552 + *
80553 + * Call this function to obtain a default set of configuration values for
80554 + * initializing dTSEC.  The user can overwrite any of the values before calling
80555 + * fman_dtsec_init(), if specific configuration needs to be applied.
80556 + */
80557 +void fman_dtsec_defconfig(struct dtsec_cfg *cfg);
80558 +
80559 +/**
80560 + * fman_dtsec_init() - Init dTSEC hardware block
80561 + * @regs:              Pointer to dTSEC register block
80562 + * @cfg:               dTSEC configuration data
80563 + * @iface_mode:                dTSEC interface mode, the type of MAC - PHY interface.
80564 + * @iface_speed:       1G or 10G
80565 + * @macaddr:           MAC station address to be assigned to the device
80566 + * @fm_rev_maj:                major rev number
80567 + * @fm_rev_min:                minor rev number
80568 + * @exceptions_mask:   initial exceptions mask
80569 + *
80570 + * This function initializes dTSEC and applies basic configuration.
80571 + *
80572 + * dTSEC initialization sequence:
80573 + * Before enabling Rx/Tx call dtsec_set_address() to set MAC address,
80574 + * fman_dtsec_adjust_link() to configure interface speed and duplex and finally
80575 + * dtsec_enable_tx()/dtsec_enable_rx() to start transmission and reception.
80576 + *
80577 + * Returns: 0 if successful, an error code otherwise.
80578 + */
80579 +int fman_dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg,
80580 +       enum enet_interface iface_mode,
80581 +       enum enet_speed iface_speed,
80582 +       uint8_t *macaddr, uint8_t fm_rev_maj,
80583 +       uint8_t fm_rev_min,
80584 +       uint32_t exception_mask);
80585 +
80586 +/**
80587 + * fman_dtsec_enable() - Enable dTSEC Tx and Tx
80588 + * @regs:      Pointer to dTSEC register block
80589 + * @apply_rx:  enable rx side
80590 + * @apply_tx:  enable tx side
80591 + *
80592 + * This function resets Tx and Rx graceful stop bit and enables dTSEC Tx and Rx.
80593 + */
80594 +void fman_dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
80595 +
80596 +/**
80597 + * fman_dtsec_disable() - Disable dTSEC Tx and Rx
80598 + * @regs:      Pointer to dTSEC register block
80599 + * @apply_rx:  disable rx side
80600 + * @apply_tx:  disable tx side
80601 + *
80602 + * This function disables Tx and Rx in dTSEC.
80603 + */
80604 +void fman_dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
80605 +
80606 +/**
80607 + * fman_dtsec_get_revision() - Get dTSEC hardware revision
80608 + * @regs:   Pointer to dTSEC register block
80609 + *
80610 + * Returns dtsec_id content
80611 + *
80612 + * Call this function to obtain the dTSEC hardware version.
80613 + */
80614 +uint32_t fman_dtsec_get_revision(struct dtsec_regs *regs);
80615 +
80616 +/**
80617 + * fman_dtsec_set_mac_address() - Set MAC station address
80618 + * @regs:   Pointer to dTSEC register block
80619 + * @macaddr:    MAC address array
80620 + *
80621 + * This function sets MAC station address.  To enable unicast reception call
80622 + * this after fman_dtsec_init().  While promiscuous mode is disabled dTSEC will
80623 + * match the destination address of received unicast frames against this
80624 + * address.
80625 + */
80626 +void fman_dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
80627 +
80628 +/**
80629 + * fman_dtsec_get_mac_address() - Query MAC station address
80630 + * @regs:   Pointer to dTSEC register block
80631 + * @macaddr:    MAC address array
80632 + */
80633 +void fman_dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
80634 +
80635 +/**
80636 + * fman_dtsec_set_uc_promisc() - Sets unicast promiscuous mode
80637 + * @regs:      Pointer to dTSEC register block
80638 + * @enable:    Enable unicast promiscuous mode
80639 + *
80640 + * Use this function to enable/disable dTSEC L2 address filtering.  If the
80641 + * address filtering is disabled all unicast packets are accepted.
80642 + * To set dTSEC in promiscuous mode call both fman_dtsec_set_uc_promisc() and
80643 + * fman_dtsec_set_mc_promisc() to disable filtering for both unicast and
80644 + * multicast addresses.
80645 + */
80646 +void fman_dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable);
80647 +
80648 +/**
80649 + * fman_dtsec_set_wol() - Enable/Disable wake on lan
80650 + *                        (magic packet support)
80651 + * @regs:   Pointer to dTSEC register block
80652 + * @en:     Enable Wake On Lan support in dTSEC
80653 + *
80654 + */
80655 +void fman_dtsec_set_wol(struct dtsec_regs *regs, bool en);
80656 +
80657 +/**
80658 + * fman_dtsec_adjust_link() - Adjust dTSEC speed/duplex settings
80659 + * @regs:      Pointer to dTSEC register block
80660 + * @iface_mode: dTSEC interface mode
80661 + * @speed:     Link speed
80662 + * @full_dx:   True for full-duplex, false for half-duplex.
80663 + *
80664 + * This function configures the MAC to function and the desired rates.  Use it
80665 + * to configure dTSEC after fman_dtsec_init() and whenever the link speed
80666 + * changes (for instance following PHY auto-negociation).
80667 + *
80668 + * Returns: 0 if successful, an error code otherwise.
80669 + */
80670 +int fman_dtsec_adjust_link(struct dtsec_regs *regs,
80671 +       enum enet_interface iface_mode,
80672 +       enum enet_speed speed, bool full_dx);
80673 +
80674 +/**
80675 + * fman_dtsec_set_tbi_phy_addr() - Updates TBI address field
80676 + * @regs:      Pointer to dTSEC register block
80677 + * @address:   Valid PHY address in the range of 1 to 31. 0 is reserved.
80678 + *
80679 + * In SGMII mode, the dTSEC's TBIPA field must contain a valid TBI PHY address
80680 + * so that the associated TBI PHY (i.e. the link) may be initialized.
80681 + *
80682 + * Returns: 0 if successful, an error code otherwise.
80683 + */
80684 +int fman_dtsec_set_tbi_phy_addr(struct dtsec_regs *regs,
80685 +       uint8_t addr);
80686 +
80687 +/**
80688 + * fman_dtsec_set_max_frame_len() - Set max frame length
80689 + * @regs:      Pointer to dTSEC register block
80690 + * @length:    Max frame length.
80691 + *
80692 + * Sets maximum frame length for received and transmitted frames.  Frames that
80693 + * exceeds this length are truncated.
80694 + */
80695 +void fman_dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length);
80696 +
80697 +/**
80698 + * fman_dtsec_get_max_frame_len() - Query max frame length
80699 + * @regs:      Pointer to dTSEC register block
80700 + *
80701 + * Returns: the current value of the maximum frame length.
80702 + */
80703 +uint16_t fman_dtsec_get_max_frame_len(struct dtsec_regs *regs);
80704 +
80705 +/**
80706 + * fman_dtsec_handle_rx_pause() - Configure pause frame handling
80707 + * @regs:      Pointer to dTSEC register block
80708 + * @en:                Enable pause frame handling in dTSEC
80709 + *
80710 + * If enabled, dTSEC will handle pause frames internally.  This must be disabled
80711 + * if dTSEC is set in half-duplex mode.
80712 + * If pause frame handling is disabled and &dtsec_cfg.rx_ctrl_acc is set, pause
80713 + * frames will be transferred to the packet interface just like regular Ethernet
80714 + * frames.
80715 + */
80716 +void fman_dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en);
80717 +
80718 +/**
80719 + * fman_dtsec_set_tx_pause_frames() - Configure Tx pause time
80720 + * @regs:      Pointer to dTSEC register block
80721 + * @time:      Time value included in pause frames
80722 + *
80723 + * Call this function to set the time value used in transmitted pause frames.
80724 + * If time is 0, transmission of pause frames is disabled
80725 + */
80726 +void fman_dtsec_set_tx_pause_frames(struct dtsec_regs *regs, uint16_t time);
80727 +
80728 +/**
80729 + * fman_dtsec_ack_event() - Acknowledge handled events
80730 + * @regs:      Pointer to dTSEC register block
80731 + * @ev_mask:   Events to acknowledge
80732 + *
80733 + * After handling events signaled by dTSEC in either polling or interrupt mode,
80734 + * call this function to reset the associated status bits in dTSEC event
80735 + * register.
80736 + */
80737 +void fman_dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask);
80738 +
80739 +/**
80740 + * fman_dtsec_get_event() - Returns currently asserted events
80741 + * @regs:      Pointer to dTSEC register block
80742 + * @ev_mask:   Mask of relevant events
80743 + *
80744 + * Call this function to obtain a bit-mask of events that are currently asserted
80745 + * in dTSEC, taken from IEVENT register.
80746 + *
80747 + * Returns: a bit-mask of events asserted in dTSEC.
80748 + */
80749 +uint32_t fman_dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask);
80750 +
80751 +/**
80752 + * fman_dtsec_get_interrupt_mask() - Returns a bit-mask of enabled interrupts
80753 + * @regs:   Pointer to dTSEC register block
80754 + *
80755 + * Call this function to obtain a bit-mask of enabled interrupts
80756 + * in dTSEC, taken from IMASK register.
80757 + *
80758 + * Returns: a bit-mask of enabled interrupts in dTSEC.
80759 + */
80760 +uint32_t fman_dtsec_get_interrupt_mask(struct dtsec_regs *regs);
80761 +
80762 +void fman_dtsec_clear_addr_in_paddr(struct dtsec_regs *regs,
80763 +       uint8_t paddr_num);
80764 +
80765 +void fman_dtsec_add_addr_in_paddr(struct dtsec_regs *regs,
80766 +       uint64_t addr,
80767 +       uint8_t paddr_num);
80768 +
80769 +void fman_dtsec_enable_tmr_interrupt (struct dtsec_regs *regs);
80770 +
80771 +void fman_dtsec_disable_tmr_interrupt(struct dtsec_regs *regs);
80772 +
80773 +/**
80774 + * fman_dtsec_disable_interrupt() - Disables interrupts for the specified events
80775 + * @regs:      Pointer to dTSEC register block
80776 + * @ev_mask:   Mask of relevant events
80777 + *
80778 + * Call this function to disable interrupts in dTSEC for the specified events.
80779 + * To enable interrupts use fman_dtsec_enable_interrupt().
80780 + */
80781 +void fman_dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
80782 +
80783 +/**
80784 + * fman_dtsec_enable_interrupt() - Enable interrupts for the specified events
80785 + * @regs:      Pointer to dTSEC register block
80786 + * @ev_mask:   Mask of relevant events
80787 + *
80788 + * Call this function to enable interrupts in dTSEC for the specified events.
80789 + * To disable interrupts use fman_dtsec_disable_interrupt().
80790 + */
80791 +void fman_dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
80792 +
80793 +/**
80794 + * fman_dtsec_set_ts() - Enables dTSEC timestamps
80795 + * @regs:      Pointer to dTSEC register block
80796 + * @en:                true to enable timestamps, false to disable them
80797 + *
80798 + * Call this function to enable/disable dTSEC timestamps.  This affects both
80799 + * Tx and Rx.
80800 + */
80801 +void fman_dtsec_set_ts(struct dtsec_regs *regs, bool en);
80802 +
80803 +/**
80804 + * fman_dtsec_set_bucket() - Enables/disables a filter bucket
80805 + * @regs:   Pointer to dTSEC register block
80806 + * @bucket: Bucket index
80807 + * @enable: true/false to enable/disable this bucket
80808 + *
80809 + * This function enables or disables the specified bucket.  Enabling a bucket
80810 + * associated with an address configures dTSEC to accept received packets
80811 + * with that destination address.
80812 + * Multiple addresses may be associated with the same bucket.  Disabling a
80813 + * bucket will affect all addresses associated with that bucket. A bucket that
80814 + * is enabled requires further filtering and verification in the upper layers
80815 + *
80816 + */
80817 +void fman_dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable);
80818 +
80819 +/**
80820 + * dtsec_set_hash_table() - insert a crc code into thr filter table
80821 + * @regs:      Pointer to dTSEC register block
80822 + * @crc:       crc to insert
80823 + * @mcast:     true is this is a multicast address
80824 + * @ghtx:      true if we are in ghtx mode
80825 + *
80826 + * This function inserts a crc code into the filter table.
80827 + */
80828 +void fman_dtsec_set_hash_table(struct dtsec_regs *regs, uint32_t crc,
80829 +       bool mcast, bool ghtx);
80830 +
80831 +/**
80832 + * fman_dtsec_reset_filter_table() - Resets the address filtering table
80833 + * @regs:      Pointer to dTSEC register block
80834 + * @mcast:     Reset multicast entries
80835 + * @ucast:     Reset unicast entries
80836 + *
80837 + * Resets all entries in L2 address filter table.  After calling this function
80838 + * all buckets enabled using fman_dtsec_set_bucket() will be disabled.
80839 + * If dtsec_init_filter_table() was called with @unicast_hash set to false,
80840 + * @ucast argument is ignored.
80841 + * This does not affect the primary nor the 15 additional addresses configured
80842 + * using dtsec_set_address() or dtsec_set_match_address().
80843 + */
80844 +void fman_dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast,
80845 +       bool ucast);
80846 +
80847 +/**
80848 + * fman_dtsec_set_mc_promisc() - Set multicast promiscuous mode
80849 + * @regs:      Pointer to dTSEC register block
80850 + * @enable:    Enable multicast promiscuous mode
80851 + *
80852 + * Call this to enable/disable L2 address filtering for multicast packets.
80853 + */
80854 +void fman_dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable);
80855 +
80856 +/* statistics APIs */
80857 +
80858 +/**
80859 + * fman_dtsec_set_stat_level() - Enable a group of MIB statistics counters
80860 + * @regs:      Pointer to dTSEC register block
80861 + * @level:     Specifies a certain group of dTSEC MIB HW counters or _all_,
80862 + *             to specify all the existing counters.
80863 + *             If set to _none_, it disables all the counters.
80864 + *
80865 + * Enables the MIB statistics hw counters and sets up the carry interrupt
80866 + * masks for the counters corresponding to the @level input parameter.
80867 + *
80868 + * Returns: error if invalid @level value given.
80869 + */
80870 +int fman_dtsec_set_stat_level(struct dtsec_regs *regs,
80871 +       enum dtsec_stat_level level);
80872 +
80873 +/**
80874 + * fman_dtsec_reset_stat() - Completely resets all dTSEC HW counters
80875 + * @regs:      Pointer to dTSEC register block
80876 + */
80877 +void fman_dtsec_reset_stat(struct dtsec_regs *regs);
80878 +
80879 +/**
80880 + * fman_dtsec_get_clear_carry_regs() - Read and clear carry bits (CAR1-2 registers)
80881 + * @regs:      Pointer to dTSEC register block
80882 + * @car1:      car1 register value
80883 + * @car2:      car2 register value
80884 + *
80885 + * When set, the carry bits signal that an overflow occurred on the
80886 + * corresponding counters.
80887 + * Note that the carry bits (CAR1-2 registers) will assert the
80888 + * %DTSEC_IEVENT_MSRO interrupt if unmasked (via CAM1-2 regs).
80889 + *
80890 + * Returns: true if overflow occurred, otherwise - false
80891 + */
80892 +bool fman_dtsec_get_clear_carry_regs(struct dtsec_regs *regs,
80893 +       uint32_t *car1, uint32_t *car2);
80894 +
80895 +uint32_t fman_dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs);
80896 +
80897 +uint32_t fman_dtsec_get_stat_counter(struct dtsec_regs *regs,
80898 +       enum dtsec_stat_counters reg_name);
80899 +
80900 +void fman_dtsec_start_tx(struct dtsec_regs *regs);
80901 +void fman_dtsec_start_rx(struct dtsec_regs *regs);
80902 +void fman_dtsec_stop_tx(struct dtsec_regs *regs);
80903 +void fman_dtsec_stop_rx(struct dtsec_regs *regs);
80904 +uint32_t fman_dtsec_get_rctrl(struct dtsec_regs *regs);
80905 +
80906 +
80907 +#endif /* __FSL_FMAN_DTSEC_H */
80908 --- /dev/null
80909 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h
80910 @@ -0,0 +1,107 @@
80911 +/*
80912 + * Copyright 2008-2013 Freescale Semiconductor Inc.
80913 + *
80914 + * Redistribution and use in source and binary forms, with or without
80915 + * modification, are permitted provided that the following conditions are met:
80916 + *     * Redistributions of source code must retain the above copyright
80917 + *       notice, this list of conditions and the following disclaimer.
80918 + *     * Redistributions in binary form must reproduce the above copyright
80919 + *       notice, this list of conditions and the following disclaimer in the
80920 + *       documentation and/or other materials provided with the distribution.
80921 + *     * Neither the name of Freescale Semiconductor nor the
80922 + *       names of its contributors may be used to endorse or promote products
80923 + *       derived from this software without specific prior written permission.
80924 + *
80925 + *
80926 + * ALTERNATIVELY, this software may be distributed under the terms of the
80927 + * GNU General Public License ("GPL") as published by the Free Software
80928 + * Foundation, either version 2 of that License or (at your option) any
80929 + * later version.
80930 + *
80931 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
80932 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
80933 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
80934 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
80935 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
80936 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
80937 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80938 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
80939 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
80940 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
80941 + */
80942 +
80943 +#ifndef __FSL_FMAN_DTSEC_MII_ACC_H
80944 +#define __FSL_FMAN_DTSEC_MII_ACC_H
80945 +
80946 +#include "common/general.h"
80947 +
80948 +
80949 +/* MII Management Configuration Register */
80950 +#define MIIMCFG_RESET_MGMT             0x80000000
80951 +#define MIIMCFG_MGNTCLK_MASK           0x00000007
80952 +#define MIIMCFG_MGNTCLK_SHIFT          0
80953 +
80954 +/* MII  Management Command Register */
80955 +#define MIIMCOM_SCAN_CYCLE             0x00000002
80956 +#define MIIMCOM_READ_CYCLE             0x00000001
80957 +
80958 +/* MII  Management Address Register */
80959 +#define MIIMADD_PHY_ADDR_SHIFT         8
80960 +#define MIIMADD_PHY_ADDR_MASK          0x00001f00
80961 +
80962 +#define MIIMADD_REG_ADDR_SHIFT         0
80963 +#define MIIMADD_REG_ADDR_MASK          0x0000001f
80964 +
80965 +/* MII Management Indicator Register */
80966 +#define MIIMIND_BUSY                   0x00000001
80967 +
80968 +
80969 +/* PHY Control Register */
80970 +#define PHY_CR_PHY_RESET    0x8000
80971 +#define PHY_CR_LOOPBACK     0x4000
80972 +#define PHY_CR_SPEED0       0x2000
80973 +#define PHY_CR_ANE          0x1000
80974 +#define PHY_CR_RESET_AN     0x0200
80975 +#define PHY_CR_FULLDUPLEX   0x0100
80976 +#define PHY_CR_SPEED1       0x0040
80977 +
80978 +#define PHY_TBICON_SRESET   0x8000
80979 +#define PHY_TBICON_SPEED2   0x0020
80980 +#define PHY_TBICON_CLK_SEL  0x0020
80981 +#define PHY_TBIANA_SGMII    0x4001
80982 +#define PHY_TBIANA_1000X    0x01a0
80983 +/* register map */
80984 +
80985 +/* MII Configuration Control Memory Map Registers */
80986 +struct dtsec_mii_reg {
80987 +       uint32_t reserved1[72];
80988 +       uint32_t miimcfg;       /* MII Mgmt:configuration */
80989 +       uint32_t miimcom;       /* MII Mgmt:command       */
80990 +       uint32_t miimadd;       /* MII Mgmt:address       */
80991 +       uint32_t miimcon;       /* MII Mgmt:control 3     */
80992 +       uint32_t miimstat;      /* MII Mgmt:status        */
80993 +       uint32_t miimind;       /* MII Mgmt:indicators    */
80994 +};
80995 +
80996 +/* dTSEC MII API */
80997 +
80998 +/* functions to access the mii registers for phy configuration.
80999 + * this functionality may not be available for all dtsecs in the system.
81000 + * consult the reference manual for details */
81001 +void fman_dtsec_mii_reset(struct dtsec_mii_reg *regs);
81002 +/* frequency is in MHz.
81003 + * note that dtsec clock is 1/2 of fman clock */
81004 +void fman_dtsec_mii_init(struct dtsec_mii_reg *regs, uint16_t dtsec_freq);
81005 +int fman_dtsec_mii_write_reg(struct dtsec_mii_reg *regs,
81006 +                       uint8_t addr,
81007 +                       uint8_t reg,
81008 +                       uint16_t data,
81009 +                       uint16_t dtsec_freq);
81010 +
81011 +int fman_dtsec_mii_read_reg(struct dtsec_mii_reg *regs,
81012 +                       uint8_t addr,
81013 +                       uint8_t reg,
81014 +                       uint16_t *data,
81015 +                       uint16_t dtsec_freq);
81016 +
81017 +#endif /* __FSL_FMAN_DTSEC_MII_ACC_H */
81018 --- /dev/null
81019 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_kg.h
81020 @@ -0,0 +1,514 @@
81021 +/*
81022 + * Copyright 2008-2012 Freescale Semiconductor Inc.
81023 + *
81024 + * Redistribution and use in source and binary forms, with or without
81025 + * modification, are permitted provided that the following conditions are met:
81026 + *     * Redistributions of source code must retain the above copyright
81027 + *       notice, this list of conditions and the following disclaimer.
81028 + *     * Redistributions in binary form must reproduce the above copyright
81029 + *       notice, this list of conditions and the following disclaimer in the
81030 + *       documentation and/or other materials provided with the distribution.
81031 + *     * Neither the name of Freescale Semiconductor nor the
81032 + *       names of its contributors may be used to endorse or promote products
81033 + *       derived from this software without specific prior written permission.
81034 + *
81035 + *
81036 + * ALTERNATIVELY, this software may be distributed under the terms of the
81037 + * GNU General Public License ("GPL") as published by the Free Software
81038 + * Foundation, either version 2 of that License or (at your option) any
81039 + * later version.
81040 + *
81041 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
81042 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
81043 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
81044 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
81045 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
81046 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
81047 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
81048 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81049 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
81050 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81051 + */
81052 +
81053 +#ifndef __FSL_FMAN_KG_H
81054 +#define __FSL_FMAN_KG_H
81055 +
81056 +#include "common/general.h"
81057 +
81058 +#define FM_KG_NUM_OF_GENERIC_REGS      8 /**< Num of generic KeyGen regs */
81059 +#define FMAN_MAX_NUM_OF_HW_PORTS       64
81060 +/**< Total num of masks allowed on KG extractions */
81061 +#define FM_KG_EXTRACT_MASKS_NUM                4
81062 +#define FM_KG_NUM_CLS_PLAN_ENTR                8 /**< Num of class. plan regs */
81063 +#define FM_KG_CLS_PLAN_GRPS_NUM                32 /**< Max num of class. groups */
81064 +
81065 +struct fman_kg_regs {
81066 +       uint32_t fmkg_gcr;
81067 +       uint32_t res004;
81068 +       uint32_t res008;
81069 +       uint32_t fmkg_eer;
81070 +       uint32_t fmkg_eeer;
81071 +       uint32_t res014;
81072 +       uint32_t res018;
81073 +       uint32_t fmkg_seer;
81074 +       uint32_t fmkg_seeer;
81075 +       uint32_t fmkg_gsr;
81076 +       uint32_t fmkg_tpc;
81077 +       uint32_t fmkg_serc;
81078 +       uint32_t res030[4];
81079 +       uint32_t fmkg_fdor;
81080 +       uint32_t fmkg_gdv0r;
81081 +       uint32_t fmkg_gdv1r;
81082 +       uint32_t res04c[6];
81083 +       uint32_t fmkg_feer;
81084 +       uint32_t res068[38];
81085 +       uint32_t fmkg_indirect[63];
81086 +       uint32_t fmkg_ar;
81087 +};
81088 +
81089 +struct fman_kg_scheme_regs {
81090 +       uint32_t kgse_mode; /**< MODE */
81091 +       uint32_t kgse_ekfc; /**< Extract Known Fields Command */
81092 +       uint32_t kgse_ekdv; /**< Extract Known Default Value */
81093 +       uint32_t kgse_bmch; /**< Bit Mask Command High */
81094 +       uint32_t kgse_bmcl; /**< Bit Mask Command Low */
81095 +       uint32_t kgse_fqb; /**< Frame Queue Base */
81096 +       uint32_t kgse_hc; /**< Hash Command */
81097 +       uint32_t kgse_ppc; /**< Policer Profile Command */
81098 +       uint32_t kgse_gec[FM_KG_NUM_OF_GENERIC_REGS];
81099 +                               /**< Generic Extract Command */
81100 +       uint32_t kgse_spc; /**< KeyGen Scheme Entry Statistic Packet Counter */
81101 +       uint32_t kgse_dv0; /**< KeyGen Scheme Entry Default Value 0 */
81102 +       uint32_t kgse_dv1; /**< KeyGen Scheme Entry Default Value 1 */
81103 +       uint32_t kgse_ccbs; /**< KeyGen Scheme Entry Coarse Classification Bit*/
81104 +       uint32_t kgse_mv; /**< KeyGen Scheme Entry Match vector */
81105 +       uint32_t kgse_om; /**< KeyGen Scheme Entry Operation Mode bits */
81106 +       uint32_t kgse_vsp; /**< KeyGen Scheme Entry Virtual Storage Profile */
81107 +};
81108 +
81109 +struct fman_kg_pe_regs{
81110 +       uint32_t fmkg_pe_sp;
81111 +       uint32_t fmkg_pe_cpp;
81112 +};
81113 +
81114 +struct fman_kg_cp_regs {
81115 +       uint32_t kgcpe[FM_KG_NUM_CLS_PLAN_ENTR];
81116 +};
81117 +
81118 +
81119 +#define FM_KG_KGAR_GO                          0x80000000
81120 +#define FM_KG_KGAR_READ                                0x40000000
81121 +#define FM_KG_KGAR_WRITE                       0x00000000
81122 +#define FM_KG_KGAR_SEL_SCHEME_ENTRY            0x00000000
81123 +#define FM_KG_KGAR_SCM_WSEL_UPDATE_CNT         0x00008000
81124 +
81125 +#define KG_SCH_PP_SHIFT_HIGH                   0x80000000
81126 +#define KG_SCH_PP_NO_GEN                       0x10000000
81127 +#define KG_SCH_PP_SHIFT_LOW                    0x0000F000
81128 +#define KG_SCH_MODE_NIA_PLCR                   0x40000000
81129 +#define KG_SCH_GEN_EXTRACT_TYPE                        0x00008000
81130 +#define KG_SCH_BITMASK_MASK                    0x000000FF
81131 +#define KG_SCH_GEN_VALID                       0x80000000
81132 +#define KG_SCH_GEN_MASK                                0x00FF0000
81133 +#define FM_PCD_KG_KGAR_ERR                     0x20000000
81134 +#define FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY      0x01000000
81135 +#define FM_PCD_KG_KGAR_SEL_PORT_ENTRY          0x02000000
81136 +#define FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP                0x00008000
81137 +#define FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP       0x00004000
81138 +#define FM_PCD_KG_KGAR_WSEL_MASK               0x0000FF00
81139 +#define KG_SCH_HASH_CONFIG_NO_FQID             0x80000000
81140 +#define KG_SCH_HASH_CONFIG_SYM                 0x40000000
81141 +
81142 +#define FM_EX_KG_DOUBLE_ECC                    0x80000000
81143 +#define FM_EX_KG_KEYSIZE_OVERFLOW              0x40000000
81144 +
81145 +/* ECC capture register */
81146 +#define KG_FMKG_SERC_CAP                       0x80000000
81147 +#define KG_FMKG_SERC_CET                       0x40000000
81148 +#define KG_FMKG_SERC_CNT_MSK                   0x00FF0000
81149 +#define KG_FMKG_SERC_CNT_SHIFT                 16
81150 +#define KG_FMKG_SERC_ADDR_MSK                  0x000003FF
81151 +
81152 +/* Masks */
81153 +#define FM_KG_KGGCR_EN                         0x80000000
81154 +#define KG_SCH_GEN_VALID                       0x80000000
81155 +#define KG_SCH_GEN_EXTRACT_TYPE                        0x00008000
81156 +#define KG_ERR_TYPE_DOUBLE                     0x40000000
81157 +#define KG_ERR_ADDR_MASK                       0x00000FFF
81158 +#define KG_SCH_MODE_EN                         0x80000000
81159 +
81160 +/* shifts */
81161 +#define FM_KG_KGAR_NUM_SHIFT                   16
81162 +#define FM_KG_PE_CPP_MASK_SHIFT                        16
81163 +#define FM_KG_KGAR_WSEL_SHIFT                  8
81164 +
81165 +#define FM_KG_SCH_GEN_HT_INVALID               0
81166 +
81167 +#define FM_KG_MASK_SEL_GEN_BASE                        0x20
81168 +
81169 +#define KG_GET_MASK_SEL_SHIFT(shift, i)        \
81170 +switch (i)                             \
81171 +{                                      \
81172 +       case 0: (shift) = 26; break;    \
81173 +       case 1: (shift) = 20; break;    \
81174 +       case 2: (shift) = 10; break;    \
81175 +       case 3: (shift) = 4; break;     \
81176 +       default: (shift) = 0;           \
81177 +}
81178 +
81179 +#define KG_GET_MASK_OFFSET_SHIFT(shift, i)     \
81180 +switch (i)                             \
81181 +{                                      \
81182 +       case 0: (shift) = 16; break;    \
81183 +       case 1: (shift) = 0; break;     \
81184 +       case 2: (shift) = 28; break;    \
81185 +       case 3: (shift) = 24; break;    \
81186 +       default: (shift) = 0;           \
81187 +}
81188 +
81189 +#define KG_GET_MASK_SHIFT(shift, i)    \
81190 +switch (i)                             \
81191 +{                                      \
81192 +       case 0: shift = 24; break;      \
81193 +       case 1: shift = 16; break;      \
81194 +       case 2: shift = 8;  break;      \
81195 +       case 3: shift = 0;  break;      \
81196 +       default: shift = 0;             \
81197 +}
81198 +
81199 +/* Port entry CPP register */
81200 +#define FMAN_KG_PE_CPP_MASK_SHIFT      16
81201 +
81202 +/* Scheme registers */
81203 +#define FMAN_KG_SCH_MODE_EN            0x80000000
81204 +#define FMAN_KG_SCH_MODE_NIA_PLCR      0x40000000
81205 +#define FMAN_KG_SCH_MODE_CCOBASE_SHIFT 24
81206 +
81207 +#define FMAN_KG_SCH_DEF_MAC_ADDR_SHIFT 30
81208 +#define FMAN_KG_SCH_DEF_VLAN_TCI_SHIFT 28
81209 +#define FMAN_KG_SCH_DEF_ETYPE_SHIFT    26
81210 +#define FMAN_KG_SCH_DEF_PPP_SID_SHIFT  24
81211 +#define FMAN_KG_SCH_DEF_PPP_PID_SHIFT  22
81212 +#define FMAN_KG_SCH_DEF_MPLS_SHIFT     20
81213 +#define FMAN_KG_SCH_DEF_IP_ADDR_SHIFT  18
81214 +#define FMAN_KG_SCH_DEF_PTYPE_SHIFT    16
81215 +#define FMAN_KG_SCH_DEF_IP_TOS_TC_SHIFT        14
81216 +#define FMAN_KG_SCH_DEF_IPv6_FL_SHIFT  12
81217 +#define FMAN_KG_SCH_DEF_IPSEC_SPI_SHIFT        10
81218 +#define FMAN_KG_SCH_DEF_L4_PORT_SHIFT  8
81219 +#define FMAN_KG_SCH_DEF_TCP_FLG_SHIFT  6
81220 +
81221 +#define FMAN_KG_SCH_GEN_VALID          0x80000000
81222 +#define FMAN_KG_SCH_GEN_SIZE_MAX       16
81223 +#define FMAN_KG_SCH_GEN_OR             0x00008000
81224 +
81225 +#define FMAN_KG_SCH_GEN_DEF_SHIFT      29
81226 +#define FMAN_KG_SCH_GEN_SIZE_SHIFT     24
81227 +#define FMAN_KG_SCH_GEN_MASK_SHIFT     16
81228 +#define FMAN_KG_SCH_GEN_HT_SHIFT       8
81229 +
81230 +#define FMAN_KG_SCH_HASH_HSHIFT_SHIFT  24
81231 +#define FMAN_KG_SCH_HASH_HSHIFT_MAX    0x28
81232 +#define FMAN_KG_SCH_HASH_SYM           0x40000000
81233 +#define FMAN_KG_SCH_HASH_NO_FQID_GEN   0x80000000
81234 +
81235 +#define FMAN_KG_SCH_PP_SH_SHIFT                27
81236 +#define FMAN_KG_SCH_PP_SL_SHIFT                12
81237 +#define FMAN_KG_SCH_PP_SH_MASK         0x80000000
81238 +#define FMAN_KG_SCH_PP_SL_MASK         0x0000F000
81239 +#define FMAN_KG_SCH_PP_SHIFT_MAX       0x17
81240 +#define FMAN_KG_SCH_PP_MASK_SHIFT      16
81241 +#define FMAN_KG_SCH_PP_NO_GEN          0x10000000
81242 +
81243 +enum fman_kg_gen_extract_src {
81244 +       E_FMAN_KG_GEN_EXTRACT_ETH,
81245 +       E_FMAN_KG_GEN_EXTRACT_ETYPE,
81246 +       E_FMAN_KG_GEN_EXTRACT_SNAP,
81247 +       E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_1,
81248 +       E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_N,
81249 +       E_FMAN_KG_GEN_EXTRACT_PPPoE,
81250 +       E_FMAN_KG_GEN_EXTRACT_MPLS_1,
81251 +       E_FMAN_KG_GEN_EXTRACT_MPLS_2,
81252 +       E_FMAN_KG_GEN_EXTRACT_MPLS_3,
81253 +       E_FMAN_KG_GEN_EXTRACT_MPLS_N,
81254 +       E_FMAN_KG_GEN_EXTRACT_IPv4_1,
81255 +       E_FMAN_KG_GEN_EXTRACT_IPv6_1,
81256 +       E_FMAN_KG_GEN_EXTRACT_IPv4_2,
81257 +       E_FMAN_KG_GEN_EXTRACT_IPv6_2,
81258 +       E_FMAN_KG_GEN_EXTRACT_MINENCAP,
81259 +       E_FMAN_KG_GEN_EXTRACT_IP_PID,
81260 +       E_FMAN_KG_GEN_EXTRACT_GRE,
81261 +       E_FMAN_KG_GEN_EXTRACT_TCP,
81262 +       E_FMAN_KG_GEN_EXTRACT_UDP,
81263 +       E_FMAN_KG_GEN_EXTRACT_SCTP,
81264 +       E_FMAN_KG_GEN_EXTRACT_DCCP,
81265 +       E_FMAN_KG_GEN_EXTRACT_IPSEC_AH,
81266 +       E_FMAN_KG_GEN_EXTRACT_IPSEC_ESP,
81267 +       E_FMAN_KG_GEN_EXTRACT_SHIM_1,
81268 +       E_FMAN_KG_GEN_EXTRACT_SHIM_2,
81269 +       E_FMAN_KG_GEN_EXTRACT_FROM_DFLT,
81270 +       E_FMAN_KG_GEN_EXTRACT_FROM_FRAME_START,
81271 +       E_FMAN_KG_GEN_EXTRACT_FROM_PARSE_RESULT,
81272 +       E_FMAN_KG_GEN_EXTRACT_FROM_END_OF_PARSE,
81273 +       E_FMAN_KG_GEN_EXTRACT_FROM_FQID
81274 +};
81275 +
81276 +struct fman_kg_ex_ecc_attr
81277 +{
81278 +       bool            valid;
81279 +       bool            double_ecc;
81280 +       uint16_t        addr;
81281 +       uint8_t         single_ecc_count;
81282 +};
81283 +
81284 +enum fman_kg_def_select
81285 +{
81286 +       E_FMAN_KG_DEF_GLOBAL_0,
81287 +       E_FMAN_KG_DEF_GLOBAL_1,
81288 +       E_FMAN_KG_DEF_SCHEME_0,
81289 +       E_FMAN_KG_DEF_SCHEME_1
81290 +};
81291 +
81292 +struct fman_kg_extract_def
81293 +{
81294 +       enum fman_kg_def_select mac_addr;
81295 +       enum fman_kg_def_select vlan_tci;
81296 +       enum fman_kg_def_select etype;
81297 +       enum fman_kg_def_select ppp_sid;
81298 +       enum fman_kg_def_select ppp_pid;
81299 +       enum fman_kg_def_select mpls;
81300 +       enum fman_kg_def_select ip_addr;
81301 +       enum fman_kg_def_select ptype;
81302 +       enum fman_kg_def_select ip_tos_tc;
81303 +       enum fman_kg_def_select ipv6_fl;
81304 +       enum fman_kg_def_select ipsec_spi;
81305 +       enum fman_kg_def_select l4_port;
81306 +       enum fman_kg_def_select tcp_flg;
81307 +};
81308 +
81309 +enum fman_kg_gen_extract_type
81310 +{
81311 +       E_FMAN_KG_HASH_EXTRACT,
81312 +       E_FMAN_KG_OR_EXTRACT
81313 +};
81314 +
81315 +struct fman_kg_gen_extract_params
81316 +{
81317 +       /* Hash or Or-ed extract */
81318 +       enum fman_kg_gen_extract_type   type;
81319 +       enum fman_kg_gen_extract_src    src;
81320 +       bool                            no_validation;
81321 +       /* Extraction offset from the header location specified above */
81322 +       uint8_t                         offset;
81323 +       /* Size of extraction for FMAN_KG_HASH_EXTRACT,
81324 +        * hash result shift for FMAN_KG_OR_EXTRACT */
81325 +       uint8_t                         extract;
81326 +       uint8_t                         mask;
81327 +       /* Default value to use when header specified
81328 +        * by fman_kg_gen_extract_src doesn't present */
81329 +       enum fman_kg_def_select         def_val;
81330 +};
81331 +
81332 +struct fman_kg_extract_mask
81333 +{
81334 +       /**< Indication if mask is on known field extraction or
81335 +        * on general extraction; TRUE for known field */
81336 +       bool            is_known;
81337 +       /**< One of FMAN_KG_EXTRACT_xxx defines for known fields mask and
81338 +        * generic register index for generic extracts mask */
81339 +       uint32_t        field_or_gen_idx;
81340 +       /**< Byte offset from start of the extracted data specified
81341 +        * by field_or_gen_idx */
81342 +       uint8_t         offset;
81343 +       /**< Byte mask (selected bits will be used) */
81344 +       uint8_t         mask;
81345 +};
81346 +
81347 +struct fman_kg_extract_params
81348 +{
81349 +       /* Or-ed mask of FMAN_KG_EXTRACT_xxx defines */
81350 +       uint32_t                                known_fields;
81351 +       struct fman_kg_extract_def              known_fields_def;
81352 +       /* Number of entries in gen_extract */
81353 +       uint8_t                                 gen_extract_num;
81354 +       struct fman_kg_gen_extract_params       gen_extract[FM_KG_NUM_OF_GENERIC_REGS];
81355 +       /* Number of entries in masks */
81356 +       uint8_t                                 masks_num;
81357 +       struct fman_kg_extract_mask             masks[FM_KG_EXTRACT_MASKS_NUM];
81358 +       uint32_t                                def_scheme_0;
81359 +       uint32_t                                def_scheme_1;
81360 +};
81361 +
81362 +struct fman_kg_hash_params
81363 +{
81364 +       bool            use_hash;
81365 +       uint8_t         shift_r;
81366 +       uint32_t        mask; /**< 24-bit mask */
81367 +       bool            sym; /**< Symmetric hash for src and dest pairs */
81368 +};
81369 +
81370 +struct fman_kg_pp_params
81371 +{
81372 +       uint8_t         base;
81373 +       uint8_t         shift;
81374 +       uint8_t         mask;
81375 +       bool            bypass_pp_gen;
81376 +};
81377 +
81378 +struct fman_kg_cc_params
81379 +{
81380 +       uint8_t         base_offset;
81381 +       uint32_t        qlcv_bits_sel;
81382 +};
81383 +
81384 +enum fman_pcd_engine
81385 +{
81386 +       E_FMAN_PCD_INVALID = 0, /**< Invalid PCD engine indicated*/
81387 +       E_FMAN_PCD_DONE,        /**< No PCD Engine indicated */
81388 +       E_FMAN_PCD_KG,          /**< Keygen indicated */
81389 +       E_FMAN_PCD_CC,          /**< Coarse classification indicated */
81390 +       E_FMAN_PCD_PLCR,        /**< Policer indicated */
81391 +       E_FMAN_PCD_PRS          /**< Parser indicated */
81392 +};
81393 +
81394 +struct fman_kg_cls_plan_params
81395 +{
81396 +       uint8_t entries_mask;
81397 +       uint32_t mask_vector[FM_KG_NUM_CLS_PLAN_ENTR];
81398 +};
81399 +
81400 +struct fman_kg_scheme_params
81401 +{
81402 +       uint32_t                        match_vector;
81403 +       struct fman_kg_extract_params   extract_params;
81404 +       struct fman_kg_hash_params      hash_params;
81405 +       uint32_t                        base_fqid;
81406 +       /* What we do w/features supported per FM version ?? */
81407 +       bool                            bypass_fqid_gen;
81408 +       struct fman_kg_pp_params        policer_params;
81409 +       struct fman_kg_cc_params        cc_params;
81410 +       bool                            update_counter;
81411 +       /**< counter_value: Set scheme counter to the specified value;
81412 +        * relevant only when update_counter = TRUE. */
81413 +       uint32_t                        counter_value;
81414 +       enum fman_pcd_engine            next_engine;
81415 +       /**< Next engine action code */
81416 +       uint32_t                        next_engine_action;
81417 +};
81418 +
81419 +
81420 +
81421 +int fman_kg_write_ar_wait(struct fman_kg_regs *regs, uint32_t fmkg_ar);
81422 +void fman_kg_write_sp(struct fman_kg_regs *regs, uint32_t sp, bool add);
81423 +void fman_kg_write_cpp(struct fman_kg_regs *regs, uint32_t cpp);
81424 +void fman_kg_get_event(struct fman_kg_regs *regs,
81425 +                       uint32_t *event,
81426 +                       uint32_t *scheme_idx);
81427 +void fman_kg_init(struct fman_kg_regs *regs,
81428 +                       uint32_t exceptions,
81429 +                       uint32_t dflt_nia);
81430 +void fman_kg_enable_scheme_interrupts(struct fman_kg_regs *regs);
81431 +void fman_kg_enable(struct fman_kg_regs *regs);
81432 +void fman_kg_disable(struct fman_kg_regs *regs);
81433 +int fman_kg_write_bind_cls_plans(struct fman_kg_regs *regs,
81434 +                                       uint8_t hwport_id,
81435 +                                       uint32_t bind_cls_plans);
81436 +int fman_kg_build_bind_cls_plans(uint8_t grp_base,
81437 +                                       uint8_t grp_mask,
81438 +                                       uint32_t *bind_cls_plans);
81439 +int fman_kg_write_bind_schemes(struct fman_kg_regs *regs,
81440 +                               uint8_t hwport_id,
81441 +                               uint32_t schemes);
81442 +int fman_kg_write_cls_plan(struct fman_kg_regs *regs,
81443 +                               uint8_t grp_id,
81444 +                               uint8_t entries_mask,
81445 +                               uint8_t hwport_id,
81446 +                               struct fman_kg_cp_regs *cls_plan_regs);
81447 +int fman_kg_build_cls_plan(struct fman_kg_cls_plan_params *params,
81448 +                               struct fman_kg_cp_regs *cls_plan_regs);
81449 +uint32_t fman_kg_get_schemes_total_counter(struct fman_kg_regs *regs);
81450 +int fman_kg_set_scheme_counter(struct fman_kg_regs *regs,
81451 +                               uint8_t scheme_id,
81452 +                               uint8_t hwport_id,
81453 +                               uint32_t counter);
81454 +int fman_kg_get_scheme_counter(struct fman_kg_regs *regs,
81455 +                               uint8_t scheme_id,
81456 +                               uint8_t hwport_id,
81457 +                               uint32_t *counter);
81458 +int fman_kg_delete_scheme(struct fman_kg_regs *regs,
81459 +                               uint8_t scheme_id,
81460 +                               uint8_t hwport_id);
81461 +int fman_kg_write_scheme(struct fman_kg_regs *regs,
81462 +                               uint8_t scheme_id,
81463 +                               uint8_t hwport_id,
81464 +                               struct fman_kg_scheme_regs *scheme_regs,
81465 +                               bool update_counter);
81466 +int fman_kg_build_scheme(struct fman_kg_scheme_params *params,
81467 +                               struct fman_kg_scheme_regs *scheme_regs);
81468 +void fman_kg_get_capture(struct fman_kg_regs *regs,
81469 +                               struct fman_kg_ex_ecc_attr *ecc_attr,
81470 +                               bool clear);
81471 +void fman_kg_get_exception(struct fman_kg_regs *regs,
81472 +                               uint32_t *events,
81473 +                               uint32_t *scheme_ids,
81474 +                               bool clear);
81475 +void fman_kg_set_exception(struct fman_kg_regs *regs,
81476 +                               uint32_t exception,
81477 +                               bool enable);
81478 +void fman_kg_set_dflt_val(struct fman_kg_regs *regs,
81479 +                               uint8_t def_id,
81480 +                               uint32_t val);
81481 +void fman_kg_set_data_after_prs(struct fman_kg_regs *regs, uint8_t offset);
81482 +
81483 +
81484 +
81485 +/**************************************************************************//**
81486 +  @Description       NIA Description
81487 +*//***************************************************************************/
81488 +#define KG_NIA_ORDER_RESTOR    0x00800000
81489 +#define KG_NIA_ENG_FM_CTL      0x00000000
81490 +#define KG_NIA_ENG_PRS         0x00440000
81491 +#define KG_NIA_ENG_KG          0x00480000
81492 +#define KG_NIA_ENG_PLCR                0x004C0000
81493 +#define KG_NIA_ENG_BMI         0x00500000
81494 +#define KG_NIA_ENG_QMI_ENQ     0x00540000
81495 +#define KG_NIA_ENG_QMI_DEQ     0x00580000
81496 +#define KG_NIA_ENG_MASK                0x007C0000
81497 +
81498 +#define KG_NIA_AC_MASK         0x0003FFFF
81499 +
81500 +#define KG_NIA_INVALID         0xFFFFFFFF
81501 +
81502 +static __inline__ uint32_t fm_kg_build_nia(enum fman_pcd_engine next_engine,
81503 +                                       uint32_t next_engine_action)
81504 +{
81505 +       uint32_t nia;
81506 +
81507 +       if (next_engine_action & ~KG_NIA_AC_MASK)
81508 +               return KG_NIA_INVALID;
81509 +
81510 +       switch (next_engine) {
81511 +       case E_FMAN_PCD_DONE:
81512 +               nia = KG_NIA_ENG_BMI | next_engine_action;
81513 +               break;
81514 +
81515 +       case E_FMAN_PCD_KG:
81516 +               nia = KG_NIA_ENG_KG | next_engine_action;
81517 +               break;
81518 +
81519 +       case E_FMAN_PCD_CC:
81520 +               nia = KG_NIA_ENG_FM_CTL | next_engine_action;
81521 +               break;
81522 +
81523 +       case E_FMAN_PCD_PLCR:
81524 +               nia = KG_NIA_ENG_PLCR | next_engine_action;
81525 +               break;
81526 +
81527 +       default:
81528 +               nia = KG_NIA_INVALID;
81529 +       }
81530 +
81531 +       return nia;
81532 +}
81533 +
81534 +#endif /* __FSL_FMAN_KG_H */
81535 --- /dev/null
81536 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac.h
81537 @@ -0,0 +1,427 @@
81538 +/*
81539 + * Copyright 2008-2012 Freescale Semiconductor Inc.
81540 + *
81541 + * Redistribution and use in source and binary forms, with or without
81542 + * modification, are permitted provided that the following conditions are met:
81543 + *     * Redistributions of source code must retain the above copyright
81544 + *       notice, this list of conditions and the following disclaimer.
81545 + *     * Redistributions in binary form must reproduce the above copyright
81546 + *       notice, this list of conditions and the following disclaimer in the
81547 + *       documentation and/or other materials provided with the distribution.
81548 + *     * Neither the name of Freescale Semiconductor nor the
81549 + *       names of its contributors may be used to endorse or promote products
81550 + *       derived from this software without specific prior written permission.
81551 + *
81552 + *
81553 + * ALTERNATIVELY, this software may be distributed under the terms of the
81554 + * GNU General Public License ("GPL") as published by the Free Software
81555 + * Foundation, either version 2 of that License or (at your option) any
81556 + * later version.
81557 + *
81558 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
81559 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
81560 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
81561 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
81562 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
81563 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
81564 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
81565 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81566 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
81567 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81568 + */
81569 +
81570 +
81571 +#ifndef __FSL_FMAN_MEMAC_H
81572 +#define __FSL_FMAN_MEMAC_H
81573 +
81574 +#include "common/general.h"
81575 +#include "fsl_enet.h"
81576 +
81577 +
81578 +#define MEMAC_NUM_OF_PADDRS 7 /* Num of additional exact match MAC adr regs */
81579 +
81580 +/* Control and Configuration Register (COMMAND_CONFIG) */
81581 +#define CMD_CFG_MG             0x80000000 /* 00 Magic Packet detection */
81582 +#define CMD_CFG_REG_LOWP_RXETY 0x01000000 /* 07 Rx low power indication */
81583 +#define CMD_CFG_TX_LOWP_ENA    0x00800000 /* 08 Tx Low Power Idle Enable */
81584 +#define CMD_CFG_SFD_ANY                0x00200000 /* 10 Disable SFD check */
81585 +#define CMD_CFG_PFC_MODE       0x00080000 /* 12 Enable PFC */
81586 +#define CMD_CFG_NO_LEN_CHK     0x00020000 /* 14 Payload length check disable */
81587 +#define CMD_CFG_SEND_IDLE      0x00010000 /* 15 Force idle generation */
81588 +#define CMD_CFG_CNT_FRM_EN     0x00002000 /* 18 Control frame rx enable */
81589 +#define CMD_CFG_SW_RESET       0x00001000 /* 19 S/W Reset, self clearing bit */
81590 +#define CMD_CFG_TX_PAD_EN      0x00000800 /* 20 Enable Tx padding of frames */
81591 +#define CMD_CFG_LOOPBACK_EN    0x00000400 /* 21 XGMII/GMII loopback enable */
81592 +#define CMD_CFG_TX_ADDR_INS    0x00000200 /* 22 Tx source MAC addr insertion */
81593 +#define CMD_CFG_PAUSE_IGNORE   0x00000100 /* 23 Ignore Pause frame quanta */
81594 +#define CMD_CFG_PAUSE_FWD      0x00000080 /* 24 Terminate/frwd Pause frames */
81595 +#define CMD_CFG_CRC_FWD                0x00000040 /* 25 Terminate/frwd CRC of frames */
81596 +#define CMD_CFG_PAD_EN         0x00000020 /* 26 Frame padding removal */
81597 +#define CMD_CFG_PROMIS_EN      0x00000010 /* 27 Promiscuous operation enable */
81598 +#define CMD_CFG_WAN_MODE       0x00000008 /* 28 WAN mode enable */
81599 +#define CMD_CFG_RX_EN          0x00000002 /* 30 MAC receive path enable */
81600 +#define CMD_CFG_TX_EN          0x00000001 /* 31 MAC transmit path enable */
81601 +
81602 +/* Transmit FIFO Sections Register (TX_FIFO_SECTIONS) */
81603 +#define TX_FIFO_SECTIONS_TX_EMPTY_MASK                 0xFFFF0000
81604 +#define TX_FIFO_SECTIONS_TX_AVAIL_MASK                 0x0000FFFF
81605 +#define TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G  0x00400000
81606 +#define TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G   0x00100000
81607 +#define TX_FIFO_SECTIONS_TX_EMPTY_PFC_10G              0x00360000
81608 +#define TX_FIFO_SECTIONS_TX_EMPTY_PFC_1G               0x00040000
81609 +#define TX_FIFO_SECTIONS_TX_AVAIL_10G                  0x00000019
81610 +#define TX_FIFO_SECTIONS_TX_AVAIL_1G                   0x00000020
81611 +#define TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G             0x00000060
81612 +
81613 +#define GET_TX_EMPTY_DEFAULT_VALUE(_val)                                       \
81614 +_val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK;                                       \
81615 +((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ?                                     \
81616 +               (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G) :       \
81617 +               (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G));
81618 +
81619 +#define GET_TX_EMPTY_PFC_VALUE(_val)                                           \
81620 +_val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK;                                       \
81621 +((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ?                                     \
81622 +               (_val |= TX_FIFO_SECTIONS_TX_EMPTY_PFC_10G) :           \
81623 +               (_val |= TX_FIFO_SECTIONS_TX_EMPTY_PFC_1G));
81624 +
81625 +/* Interface Mode Register (IF_MODE) */
81626 +#define IF_MODE_MASK           0x00000003 /* 30-31 Mask on i/f mode bits */
81627 +#define IF_MODE_XGMII          0x00000000 /* 30-31 XGMII (10G) interface */
81628 +#define IF_MODE_GMII           0x00000002 /* 30-31 GMII (1G) interface */
81629 +#define IF_MODE_RGMII          0x00000004
81630 +#define IF_MODE_RGMII_AUTO     0x00008000
81631 +#define IF_MODE_RGMII_1000  0x00004000 /* 10 - 1000Mbps RGMII */
81632 +#define IF_MODE_RGMII_100   0x00000000 /* 00 - 100Mbps RGMII */
81633 +#define IF_MODE_RGMII_10    0x00002000 /* 01 - 10Mbps RGMII */
81634 +#define IF_MODE_RGMII_SP_MASK 0x00006000 /* Setsp mask bits */
81635 +#define IF_MODE_RGMII_FD    0x00001000 /* Full duplex RGMII */
81636 +#define IF_MODE_HD          0x00000040 /* Half duplex operation */
81637 +
81638 +/* Hash table Control Register (HASHTABLE_CTRL) */
81639 +#define HASH_CTRL_MCAST_SHIFT  26
81640 +#define HASH_CTRL_MCAST_EN     0x00000100 /* 23 Mcast frame rx for hash */
81641 +#define HASH_CTRL_ADDR_MASK    0x0000003F /* 26-31 Hash table address code */
81642 +
81643 +#define GROUP_ADDRESS          0x0000010000000000LL /* MAC mcast indication */
81644 +#define HASH_TABLE_SIZE                64 /* Hash tbl size */
81645 +
81646 +/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
81647 +#define MEMAC_TX_IPG_LENGTH_MASK       0x0000003F
81648 +
81649 +/* Statistics Configuration Register (STATN_CONFIG) */
81650 +#define STATS_CFG_CLR          0x00000004 /* 29 Reset all counters */
81651 +#define STATS_CFG_CLR_ON_RD    0x00000002 /* 30 Clear on read */
81652 +#define STATS_CFG_SATURATE     0x00000001 /* 31 Saturate at the maximum val */
81653 +
81654 +/* Interrupt Mask Register (IMASK) */
81655 +#define MEMAC_IMASK_MGI                0x40000000 /* 1 Magic pkt detect indication */
81656 +#define MEMAC_IMASK_TSECC_ER 0x20000000 /* 2 Timestamp FIFO ECC error evnt */
81657 +#define MEMAC_IMASK_TECC_ER    0x02000000 /* 6 Transmit frame ECC error evnt */
81658 +#define MEMAC_IMASK_RECC_ER    0x01000000 /* 7 Receive frame ECC error evnt */
81659 +
81660 +#define MEMAC_ALL_ERRS_IMASK                   \
81661 +               ((uint32_t)(MEMAC_IMASK_TSECC_ER        | \
81662 +                       MEMAC_IMASK_TECC_ER     | \
81663 +                       MEMAC_IMASK_RECC_ER     | \
81664 +                       MEMAC_IMASK_MGI))
81665 +
81666 +#define MEMAC_IEVNT_PCS                        0x80000000 /* PCS (XG). Link sync (G) */
81667 +#define MEMAC_IEVNT_AN                 0x40000000 /* Auto-negotiation */
81668 +#define MEMAC_IEVNT_LT                 0x20000000 /* Link Training/New page */
81669 +#define MEMAC_IEVNT_MGI                        0x00004000 /* Magic pkt detection */
81670 +#define MEMAC_IEVNT_TS_ECC_ER   0x00002000 /* Timestamp FIFO ECC error */
81671 +#define MEMAC_IEVNT_RX_FIFO_OVFL       0x00001000 /* Rx FIFO overflow */
81672 +#define MEMAC_IEVNT_TX_FIFO_UNFL       0x00000800 /* Tx FIFO underflow */
81673 +#define MEMAC_IEVNT_TX_FIFO_OVFL       0x00000400 /* Tx FIFO overflow */
81674 +#define MEMAC_IEVNT_TX_ECC_ER          0x00000200 /* Tx frame ECC error */
81675 +#define MEMAC_IEVNT_RX_ECC_ER          0x00000100 /* Rx frame ECC error */
81676 +#define MEMAC_IEVNT_LI_FAULT           0x00000080 /* Link Interruption flt */
81677 +#define MEMAC_IEVNT_RX_EMPTY           0x00000040 /* Rx FIFO empty */
81678 +#define MEMAC_IEVNT_TX_EMPTY           0x00000020 /* Tx FIFO empty */
81679 +#define MEMAC_IEVNT_RX_LOWP            0x00000010 /* Low Power Idle */
81680 +#define MEMAC_IEVNT_PHY_LOS            0x00000004 /* Phy loss of signal */
81681 +#define MEMAC_IEVNT_REM_FAULT          0x00000002 /* Remote fault (XGMII) */
81682 +#define MEMAC_IEVNT_LOC_FAULT          0x00000001 /* Local fault (XGMII) */
81683 +
81684 +enum memac_counters {
81685 +       E_MEMAC_COUNTER_R64,
81686 +       E_MEMAC_COUNTER_R127,
81687 +       E_MEMAC_COUNTER_R255,
81688 +       E_MEMAC_COUNTER_R511,
81689 +       E_MEMAC_COUNTER_R1023,
81690 +       E_MEMAC_COUNTER_R1518,
81691 +       E_MEMAC_COUNTER_R1519X,
81692 +       E_MEMAC_COUNTER_RFRG,
81693 +       E_MEMAC_COUNTER_RJBR,
81694 +       E_MEMAC_COUNTER_RDRP,
81695 +       E_MEMAC_COUNTER_RALN,
81696 +       E_MEMAC_COUNTER_TUND,
81697 +       E_MEMAC_COUNTER_ROVR,
81698 +       E_MEMAC_COUNTER_RXPF,
81699 +       E_MEMAC_COUNTER_TXPF,
81700 +       E_MEMAC_COUNTER_ROCT,
81701 +       E_MEMAC_COUNTER_RMCA,
81702 +       E_MEMAC_COUNTER_RBCA,
81703 +       E_MEMAC_COUNTER_RPKT,
81704 +       E_MEMAC_COUNTER_RUCA,
81705 +       E_MEMAC_COUNTER_RERR,
81706 +       E_MEMAC_COUNTER_TOCT,
81707 +       E_MEMAC_COUNTER_TMCA,
81708 +       E_MEMAC_COUNTER_TBCA,
81709 +       E_MEMAC_COUNTER_TUCA,
81710 +       E_MEMAC_COUNTER_TERR
81711 +};
81712 +
81713 +#define DEFAULT_PAUSE_QUANTA   0xf000
81714 +#define DEFAULT_FRAME_LENGTH   0x600
81715 +#define DEFAULT_TX_IPG_LENGTH  12
81716 +
81717 +/*
81718 + * memory map
81719 + */
81720 +
81721 +struct mac_addr {
81722 +       uint32_t   mac_addr_l;  /* Lower 32 bits of 48-bit MAC address */
81723 +       uint32_t   mac_addr_u;  /* Upper 16 bits of 48-bit MAC address */
81724 +};
81725 +
81726 +struct memac_regs {
81727 +       /* General Control and Status */
81728 +       uint32_t res0000[2];
81729 +       uint32_t command_config;        /* 0x008 Ctrl and cfg */
81730 +       struct mac_addr mac_addr0;      /* 0x00C-0x010 MAC_ADDR_0...1 */
81731 +       uint32_t maxfrm;                /* 0x014 Max frame length */
81732 +       uint32_t res0018[1];
81733 +       uint32_t rx_fifo_sections;      /* Receive FIFO configuration reg */
81734 +       uint32_t tx_fifo_sections;      /* Transmit FIFO configuration reg */
81735 +       uint32_t res0024[2];
81736 +       uint32_t hashtable_ctrl;        /* 0x02C Hash table control */
81737 +       uint32_t res0030[4];
81738 +       uint32_t ievent;                /* 0x040 Interrupt event */
81739 +       uint32_t tx_ipg_length;         /* 0x044 Transmitter inter-packet-gap */
81740 +       uint32_t res0048;
81741 +       uint32_t imask;                 /* 0x04C Interrupt mask */
81742 +       uint32_t res0050;
81743 +       uint32_t pause_quanta[4];       /* 0x054 Pause quanta */
81744 +       uint32_t pause_thresh[4];       /* 0x064 Pause quanta threshold */
81745 +       uint32_t rx_pause_status;       /* 0x074 Receive pause status */
81746 +       uint32_t res0078[2];
81747 +       struct mac_addr mac_addr[MEMAC_NUM_OF_PADDRS]; /* 0x80-0x0B4 mac padr */
81748 +       uint32_t lpwake_timer;          /* 0x0B8 Low Power Wakeup Timer */
81749 +       uint32_t sleep_timer;           /* 0x0BC Transmit EEE Low Power Timer */
81750 +       uint32_t res00c0[8];
81751 +       uint32_t statn_config;          /* 0x0E0 Statistics configuration */
81752 +       uint32_t res00e4[7];
81753 +       /* Rx Statistics Counter */
81754 +       uint32_t reoct_l;
81755 +       uint32_t reoct_u;
81756 +       uint32_t roct_l;
81757 +       uint32_t roct_u;
81758 +       uint32_t raln_l;
81759 +       uint32_t raln_u;
81760 +       uint32_t rxpf_l;
81761 +       uint32_t rxpf_u;
81762 +       uint32_t rfrm_l;
81763 +       uint32_t rfrm_u;
81764 +       uint32_t rfcs_l;
81765 +       uint32_t rfcs_u;
81766 +       uint32_t rvlan_l;
81767 +       uint32_t rvlan_u;
81768 +       uint32_t rerr_l;
81769 +       uint32_t rerr_u;
81770 +       uint32_t ruca_l;
81771 +       uint32_t ruca_u;
81772 +       uint32_t rmca_l;
81773 +       uint32_t rmca_u;
81774 +       uint32_t rbca_l;
81775 +       uint32_t rbca_u;
81776 +       uint32_t rdrp_l;
81777 +       uint32_t rdrp_u;
81778 +       uint32_t rpkt_l;
81779 +       uint32_t rpkt_u;
81780 +       uint32_t rund_l;
81781 +       uint32_t rund_u;
81782 +       uint32_t r64_l;
81783 +       uint32_t r64_u;
81784 +       uint32_t r127_l;
81785 +       uint32_t r127_u;
81786 +       uint32_t r255_l;
81787 +       uint32_t r255_u;
81788 +       uint32_t r511_l;
81789 +       uint32_t r511_u;
81790 +       uint32_t r1023_l;
81791 +       uint32_t r1023_u;
81792 +       uint32_t r1518_l;
81793 +       uint32_t r1518_u;
81794 +       uint32_t r1519x_l;
81795 +       uint32_t r1519x_u;
81796 +       uint32_t rovr_l;
81797 +       uint32_t rovr_u;
81798 +       uint32_t rjbr_l;
81799 +       uint32_t rjbr_u;
81800 +       uint32_t rfrg_l;
81801 +       uint32_t rfrg_u;
81802 +       uint32_t rcnp_l;
81803 +       uint32_t rcnp_u;
81804 +       uint32_t rdrntp_l;
81805 +       uint32_t rdrntp_u;
81806 +       uint32_t res01d0[12];
81807 +       /* Tx Statistics Counter */
81808 +       uint32_t teoct_l;
81809 +       uint32_t teoct_u;
81810 +       uint32_t toct_l;
81811 +       uint32_t toct_u;
81812 +       uint32_t res0210[2];
81813 +       uint32_t txpf_l;
81814 +       uint32_t txpf_u;
81815 +       uint32_t tfrm_l;
81816 +       uint32_t tfrm_u;
81817 +       uint32_t tfcs_l;
81818 +       uint32_t tfcs_u;
81819 +       uint32_t tvlan_l;
81820 +       uint32_t tvlan_u;
81821 +       uint32_t terr_l;
81822 +       uint32_t terr_u;
81823 +       uint32_t tuca_l;
81824 +       uint32_t tuca_u;
81825 +       uint32_t tmca_l;
81826 +       uint32_t tmca_u;
81827 +       uint32_t tbca_l;
81828 +       uint32_t tbca_u;
81829 +       uint32_t res0258[2];
81830 +       uint32_t tpkt_l;
81831 +       uint32_t tpkt_u;
81832 +       uint32_t tund_l;
81833 +       uint32_t tund_u;
81834 +       uint32_t t64_l;
81835 +       uint32_t t64_u;
81836 +       uint32_t t127_l;
81837 +       uint32_t t127_u;
81838 +       uint32_t t255_l;
81839 +       uint32_t t255_u;
81840 +       uint32_t t511_l;
81841 +       uint32_t t511_u;
81842 +       uint32_t t1023_l;
81843 +       uint32_t t1023_u;
81844 +       uint32_t t1518_l;
81845 +       uint32_t t1518_u;
81846 +       uint32_t t1519x_l;
81847 +       uint32_t t1519x_u;
81848 +       uint32_t res02a8[6];
81849 +       uint32_t tcnp_l;
81850 +       uint32_t tcnp_u;
81851 +       uint32_t res02c8[14];
81852 +       /* Line Interface Control */
81853 +       uint32_t if_mode;               /* 0x300 Interface Mode Control */
81854 +       uint32_t if_status;             /* 0x304 Interface Status */
81855 +       uint32_t res0308[14];
81856 +       /* HiGig/2 */
81857 +       uint32_t hg_config;             /* 0x340 Control and cfg */
81858 +       uint32_t res0344[3];
81859 +       uint32_t hg_pause_quanta;       /* 0x350 Pause quanta */
81860 +       uint32_t res0354[3];
81861 +       uint32_t hg_pause_thresh;       /* 0x360 Pause quanta threshold */
81862 +       uint32_t res0364[3];
81863 +       uint32_t hgrx_pause_status;     /* 0x370 Receive pause status */
81864 +       uint32_t hg_fifos_status;       /* 0x374 fifos status */
81865 +       uint32_t rhm;                   /* 0x378 rx messages counter */
81866 +       uint32_t thm;                   /* 0x37C tx messages counter */
81867 +};
81868 +
81869 +struct memac_cfg {
81870 +       bool            reset_on_init;
81871 +       bool            rx_error_discard;
81872 +       bool            pause_ignore;
81873 +       bool            pause_forward_enable;
81874 +       bool            no_length_check_enable;
81875 +       bool            cmd_frame_enable;
81876 +       bool            send_idle_enable;
81877 +       bool            wan_mode_enable;
81878 +       bool            promiscuous_mode_enable;
81879 +       bool            tx_addr_ins_enable;
81880 +       bool            loopback_enable;
81881 +       bool            lgth_check_nostdr;
81882 +       bool            time_stamp_enable;
81883 +       bool            pad_enable;
81884 +       bool            phy_tx_ena_on;
81885 +       bool            rx_sfd_any;
81886 +       bool            rx_pbl_fwd;
81887 +       bool            tx_pbl_fwd;
81888 +       bool            debug_mode;
81889 +       bool            wake_on_lan;
81890 +       uint16_t        max_frame_length;
81891 +       uint16_t        pause_quanta;
81892 +       uint32_t        tx_ipg_length;
81893 +};
81894 +
81895 +
81896 +/**
81897 + * fman_memac_defconfig() - Get default MEMAC configuration
81898 + * @cfg:    pointer to configuration structure.
81899 + *
81900 + * Call this function to obtain a default set of configuration values for
81901 + * initializing MEMAC. The user can overwrite any of the values before calling
81902 + * fman_memac_init(), if specific configuration needs to be applied.
81903 + */
81904 +void fman_memac_defconfig(struct memac_cfg *cfg);
81905 +
81906 +int fman_memac_init(struct memac_regs *regs,
81907 +       struct memac_cfg *cfg,
81908 +       enum enet_interface enet_interface,
81909 +       enum enet_speed enet_speed,
81910 +       bool slow_10g_if,
81911 +       uint32_t exceptions);
81912 +
81913 +void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
81914 +
81915 +void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
81916 +
81917 +void fman_memac_set_promiscuous(struct memac_regs *regs, bool val);
81918 +
81919 +void fman_memac_add_addr_in_paddr(struct memac_regs *regs,
81920 +       uint8_t *adr,
81921 +       uint8_t paddr_num);
81922 +
81923 +void fman_memac_clear_addr_in_paddr(struct memac_regs *regs,
81924 +       uint8_t paddr_num);
81925 +
81926 +uint64_t fman_memac_get_counter(struct memac_regs *regs,
81927 +       enum memac_counters reg_name);
81928 +
81929 +void fman_memac_set_tx_pause_frames(struct memac_regs *regs,
81930 +       uint8_t priority, uint16_t pauseTime, uint16_t threshTime);
81931 +
81932 +uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs);
81933 +
81934 +void fman_memac_set_exception(struct memac_regs *regs, uint32_t val,
81935 +       bool enable);
81936 +
81937 +void fman_memac_reset_stat(struct memac_regs *regs);
81938 +
81939 +void fman_memac_reset(struct memac_regs *regs);
81940 +
81941 +void fman_memac_reset_filter_table(struct memac_regs *regs);
81942 +
81943 +void fman_memac_set_hash_table_entry(struct memac_regs *regs, uint32_t crc);
81944 +
81945 +void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val);
81946 +
81947 +void fman_memac_set_rx_ignore_pause_frames(struct memac_regs *regs,
81948 +       bool enable);
81949 +
81950 +void fman_memac_set_wol(struct memac_regs *regs, bool enable);
81951 +
81952 +uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask);
81953 +
81954 +void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask);
81955 +
81956 +uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs);
81957 +
81958 +void fman_memac_adjust_link(struct memac_regs *regs,
81959 +       enum enet_interface iface_mode,
81960 +       enum enet_speed speed, bool full_dx);
81961 +
81962 +
81963 +
81964 +#endif /*__FSL_FMAN_MEMAC_H*/
81965 --- /dev/null
81966 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h
81967 @@ -0,0 +1,78 @@
81968 +/*
81969 + * Copyright 2008-2013 Freescale Semiconductor Inc.
81970 + *
81971 + * Redistribution and use in source and binary forms, with or without
81972 + * modification, are permitted provided that the following conditions are met:
81973 + *     * Redistributions of source code must retain the above copyright
81974 + *       notice, this list of conditions and the following disclaimer.
81975 + *     * Redistributions in binary form must reproduce the above copyright
81976 + *       notice, this list of conditions and the following disclaimer in the
81977 + *       documentation and/or other materials provided with the distribution.
81978 + *     * Neither the name of Freescale Semiconductor nor the
81979 + *       names of its contributors may be used to endorse or promote products
81980 + *       derived from this software without specific prior written permission.
81981 + *
81982 + *
81983 + * ALTERNATIVELY, this software may be distributed under the terms of the
81984 + * GNU General Public License ("GPL") as published by the Free Software
81985 + * Foundation, either version 2 of that License or (at your option) any
81986 + * later version.
81987 + *
81988 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
81989 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
81990 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
81991 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
81992 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
81993 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
81994 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
81995 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81996 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
81997 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81998 + */
81999 +
82000 +#ifndef __FSL_FMAN_MEMAC_MII_ACC_H
82001 +#define __FSL_FMAN_MEMAC_MII_ACC_H
82002 +
82003 +#include "common/general.h"
82004 +#include "fsl_enet.h"
82005 +/* MII Management Registers */
82006 +#define MDIO_CFG_CLK_DIV_MASK       0x0080ff80
82007 +#define MDIO_CFG_CLK_DIV_SHIFT      7
82008 +#define MDIO_CFG_HOLD_MASK          0x0000001c
82009 +#define MDIO_CFG_ENC45              0x00000040
82010 +#define MDIO_CFG_READ_ERR           0x00000002
82011 +#define MDIO_CFG_BSY                0x00000001
82012 +
82013 +#define MDIO_CTL_PHY_ADDR_SHIFT     5
82014 +#define MDIO_CTL_READ               0x00008000
82015 +
82016 +#define MDIO_DATA_BSY               0x80000000
82017 +
82018 +/*MEMAC Internal PHY Registers - SGMII */
82019 +#define PHY_SGMII_CR_PHY_RESET          0x8000
82020 +#define PHY_SGMII_CR_RESET_AN           0x0200
82021 +#define PHY_SGMII_CR_DEF_VAL            0x1140
82022 +#define PHY_SGMII_DEV_ABILITY_SGMII     0x4001
82023 +#define PHY_SGMII_DEV_ABILITY_1000X     0x01A0
82024 +#define PHY_SGMII_IF_MODE_AN            0x0002
82025 +#define PHY_SGMII_IF_MODE_SGMII         0x0001
82026 +#define PHY_SGMII_IF_MODE_1000X         0x0000
82027 +
82028 +/*----------------------------------------------------*/
82029 +/* MII Configuration Control Memory Map Registers     */
82030 +/*----------------------------------------------------*/
82031 +struct memac_mii_access_mem_map {
82032 +       uint32_t   mdio_cfg;       /* 0x030  */
82033 +       uint32_t   mdio_ctrl;      /* 0x034  */
82034 +       uint32_t   mdio_data;      /* 0x038  */
82035 +       uint32_t   mdio_addr;      /* 0x03c  */
82036 +};
82037 +
82038 +int fman_memac_mii_read_phy_reg(struct memac_mii_access_mem_map *mii_regs,
82039 +       uint8_t phy_addr, uint8_t reg, uint16_t *data,
82040 +       enum enet_speed enet_speed);
82041 +int fman_memac_mii_write_phy_reg(struct memac_mii_access_mem_map *mii_regs,
82042 +       uint8_t phy_addr, uint8_t reg, uint16_t data,
82043 +       enum enet_speed enet_speed);
82044 +
82045 +#endif /* __MAC_API_MEMAC_MII_ACC_H */
82046 --- /dev/null
82047 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_port.h
82048 @@ -0,0 +1,593 @@
82049 +/*
82050 + * Copyright 2008-2013 Freescale Semiconductor Inc.
82051 + *
82052 + * Redistribution and use in source and binary forms, with or without
82053 + * modification, are permitted provided that the following conditions are met:
82054 + *     * Redistributions of source code must retain the above copyright
82055 + *       notice, this list of conditions and the following disclaimer.
82056 + *     * Redistributions in binary form must reproduce the above copyright
82057 + *       notice, this list of conditions and the following disclaimer in the
82058 + *       documentation and/or other materials provided with the distribution.
82059 + *     * Neither the name of Freescale Semiconductor nor the
82060 + *       names of its contributors may be used to endorse or promote products
82061 + *       derived from this software without specific prior written permission.
82062 + *
82063 + *
82064 + * ALTERNATIVELY, this software may be distributed under the terms of the
82065 + * GNU General Public License ("GPL") as published by the Free Software
82066 + * Foundation, either version 2 of that License or (at your option) any
82067 + * later version.
82068 + *
82069 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
82070 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
82071 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
82072 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
82073 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
82074 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
82075 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
82076 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
82077 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
82078 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
82079 + */
82080 +
82081 +#ifndef __FSL_FMAN_PORT_H
82082 +#define __FSL_FMAN_PORT_H
82083 +
82084 +#include "fsl_fman_sp.h"
82085 +
82086 +/** @Collection  Registers bit fields */
82087 +
82088 +/** @Description  BMI defines */
82089 +#define BMI_EBD_EN                              0x80000000
82090 +
82091 +#define BMI_PORT_CFG_EN                                0x80000000
82092 +#define BMI_PORT_CFG_FDOVR                     0x02000000
82093 +#define BMI_PORT_CFG_IM                                0x01000000
82094 +
82095 +#define BMI_PORT_STATUS_BSY                    0x80000000
82096 +
82097 +#define BMI_DMA_ATTR_SWP_SHIFT                 FMAN_SP_DMA_ATTR_SWP_SHIFT
82098 +#define BMI_DMA_ATTR_IC_STASH_ON               0x10000000
82099 +#define BMI_DMA_ATTR_HDR_STASH_ON              0x04000000
82100 +#define BMI_DMA_ATTR_SG_STASH_ON               0x01000000
82101 +#define BMI_DMA_ATTR_WRITE_OPTIMIZE            FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE
82102 +
82103 +#define BMI_RX_FIFO_PRI_ELEVATION_SHIFT                16
82104 +#define BMI_RX_FIFO_THRESHOLD_ETHE             0x80000000
82105 +
82106 +#define BMI_TX_FRAME_END_CS_IGNORE_SHIFT       24
82107 +#define BMI_RX_FRAME_END_CS_IGNORE_SHIFT       24
82108 +#define BMI_RX_FRAME_END_CUT_SHIFT             16
82109 +
82110 +#define BMI_IC_TO_EXT_SHIFT                    FMAN_SP_IC_TO_EXT_SHIFT
82111 +#define BMI_IC_FROM_INT_SHIFT                  FMAN_SP_IC_FROM_INT_SHIFT
82112 +
82113 +#define BMI_INT_BUF_MARG_SHIFT                 28
82114 +#define BMI_EXT_BUF_MARG_START_SHIFT           FMAN_SP_EXT_BUF_MARG_START_SHIFT
82115 +
82116 +#define BMI_CMD_MR_LEAC                                0x00200000
82117 +#define BMI_CMD_MR_SLEAC                       0x00100000
82118 +#define BMI_CMD_MR_MA                          0x00080000
82119 +#define BMI_CMD_MR_DEAS                                0x00040000
82120 +#define BMI_CMD_RX_MR_DEF                      (BMI_CMD_MR_LEAC | \
82121 +                                               BMI_CMD_MR_SLEAC | \
82122 +                                               BMI_CMD_MR_MA | \
82123 +                                               BMI_CMD_MR_DEAS)
82124 +#define BMI_CMD_TX_MR_DEF                      0
82125 +#define BMI_CMD_OP_MR_DEF                      (BMI_CMD_MR_DEAS | \
82126 +                                               BMI_CMD_MR_MA)
82127 +
82128 +#define BMI_CMD_ATTR_ORDER                     0x80000000
82129 +#define BMI_CMD_ATTR_SYNC                      0x02000000
82130 +#define BMI_CMD_ATTR_COLOR_SHIFT               26
82131 +
82132 +#define BMI_FIFO_PIPELINE_DEPTH_SHIFT           12
82133 +#define BMI_NEXT_ENG_FD_BITS_SHIFT             24
82134 +#define BMI_FRAME_END_CS_IGNORE_SHIFT           24
82135 +
82136 +#define BMI_COUNTERS_EN                                0x80000000
82137 +
82138 +#define BMI_EXT_BUF_POOL_VALID                 FMAN_SP_EXT_BUF_POOL_VALID
82139 +#define BMI_EXT_BUF_POOL_EN_COUNTER            FMAN_SP_EXT_BUF_POOL_EN_COUNTER
82140 +#define BMI_EXT_BUF_POOL_BACKUP                        FMAN_SP_EXT_BUF_POOL_BACKUP
82141 +#define BMI_EXT_BUF_POOL_ID_SHIFT              16
82142 +#define BMI_EXT_BUF_POOL_ID_MASK               0x003F0000
82143 +#define BMI_POOL_DEP_NUM_OF_POOLS_SHIFT                16
82144 +
82145 +#define BMI_TX_FIFO_MIN_FILL_SHIFT             16
82146 +#define BMI_TX_FIFO_PIPELINE_DEPTH_SHIFT       12
82147 +
82148 +#define MAX_PERFORMANCE_TASK_COMP              64
82149 +#define MAX_PERFORMANCE_RX_QUEUE_COMP          64
82150 +#define MAX_PERFORMANCE_TX_QUEUE_COMP          8
82151 +#define MAX_PERFORMANCE_DMA_COMP               16
82152 +#define MAX_PERFORMANCE_FIFO_COMP              1024
82153 +
82154 +#define BMI_PERFORMANCE_TASK_COMP_SHIFT                24
82155 +#define BMI_PERFORMANCE_QUEUE_COMP_SHIFT       16
82156 +#define BMI_PERFORMANCE_DMA_COMP_SHIFT         12
82157 +
82158 +#define BMI_RATE_LIMIT_GRAN_TX                 16000 /* In Kbps */
82159 +#define BMI_RATE_LIMIT_GRAN_OP                 10000 /* In frames */
82160 +#define BMI_RATE_LIMIT_MAX_RATE_IN_GRAN_UNITS  1024
82161 +#define BMI_RATE_LIMIT_MAX_BURST_SIZE          1024 /* In KBytes */
82162 +#define BMI_RATE_LIMIT_MAX_BURST_SHIFT         16
82163 +#define BMI_RATE_LIMIT_HIGH_BURST_SIZE_GRAN    0x80000000
82164 +#define BMI_RATE_LIMIT_SCALE_TSBS_SHIFT                16
82165 +#define BMI_RATE_LIMIT_SCALE_EN                        0x80000000
82166 +#define BMI_SG_DISABLE                          FMAN_SP_SG_DISABLE
82167 +
82168 +/** @Description  QMI defines */
82169 +#define QMI_PORT_CFG_EN                                0x80000000
82170 +#define QMI_PORT_CFG_EN_COUNTERS               0x10000000
82171 +
82172 +#define QMI_PORT_STATUS_DEQ_TNUM_BSY           0x80000000
82173 +#define QMI_PORT_STATUS_DEQ_FD_BSY             0x20000000
82174 +
82175 +#define QMI_DEQ_CFG_PRI                                0x80000000
82176 +#define QMI_DEQ_CFG_TYPE1                      0x10000000
82177 +#define QMI_DEQ_CFG_TYPE2                      0x20000000
82178 +#define QMI_DEQ_CFG_TYPE3                      0x30000000
82179 +#define QMI_DEQ_CFG_PREFETCH_PARTIAL           0x01000000
82180 +#define QMI_DEQ_CFG_PREFETCH_FULL              0x03000000
82181 +#define QMI_DEQ_CFG_SP_MASK                    0xf
82182 +#define QMI_DEQ_CFG_SP_SHIFT                   20
82183 +
82184 +
82185 +/** @Description  General port defines */
82186 +#define FMAN_PORT_EXT_POOLS_NUM(fm_rev_maj) \
82187 +               (((fm_rev_maj) == 4) ? 4 : 8)
82188 +#define FMAN_PORT_MAX_EXT_POOLS_NUM    8
82189 +#define FMAN_PORT_OBS_EXT_POOLS_NUM    2
82190 +#define FMAN_PORT_CG_MAP_NUM           8
82191 +#define FMAN_PORT_PRS_RESULT_WORDS_NUM 8
82192 +#define FMAN_PORT_BMI_FIFO_UNITS       0x100
82193 +#define FMAN_PORT_IC_OFFSET_UNITS      0x10
82194 +
82195 +
82196 +/** @Collection    FM Port Register Map */
82197 +
82198 +/** @Description   BMI Rx port register map */
82199 +struct fman_port_rx_bmi_regs {
82200 +       uint32_t fmbm_rcfg;             /**< Rx Configuration */
82201 +       uint32_t fmbm_rst;              /**< Rx Status */
82202 +       uint32_t fmbm_rda;              /**< Rx DMA attributes*/
82203 +       uint32_t fmbm_rfp;              /**< Rx FIFO Parameters*/
82204 +       uint32_t fmbm_rfed;             /**< Rx Frame End Data*/
82205 +       uint32_t fmbm_ricp;             /**< Rx Internal Context Parameters*/
82206 +       uint32_t fmbm_rim;              /**< Rx Internal Buffer Margins*/
82207 +       uint32_t fmbm_rebm;             /**< Rx External Buffer Margins*/
82208 +       uint32_t fmbm_rfne;             /**< Rx Frame Next Engine*/
82209 +       uint32_t fmbm_rfca;             /**< Rx Frame Command Attributes.*/
82210 +       uint32_t fmbm_rfpne;            /**< Rx Frame Parser Next Engine*/
82211 +       uint32_t fmbm_rpso;             /**< Rx Parse Start Offset*/
82212 +       uint32_t fmbm_rpp;              /**< Rx Policer Profile  */
82213 +       uint32_t fmbm_rccb;             /**< Rx Coarse Classification Base */
82214 +       uint32_t fmbm_reth;             /**< Rx Excessive Threshold */
82215 +       uint32_t reserved003c[1];       /**< (0x03C 0x03F) */
82216 +       uint32_t fmbm_rprai[FMAN_PORT_PRS_RESULT_WORDS_NUM];
82217 +                                       /**< Rx Parse Results Array Init*/
82218 +       uint32_t fmbm_rfqid;            /**< Rx Frame Queue ID*/
82219 +       uint32_t fmbm_refqid;           /**< Rx Error Frame Queue ID*/
82220 +       uint32_t fmbm_rfsdm;            /**< Rx Frame Status Discard Mask*/
82221 +       uint32_t fmbm_rfsem;            /**< Rx Frame Status Error Mask*/
82222 +       uint32_t fmbm_rfene;            /**< Rx Frame Enqueue Next Engine */
82223 +       uint32_t reserved0074[0x2];     /**< (0x074-0x07C)  */
82224 +       uint32_t fmbm_rcmne;            /**< Rx Frame Continuous Mode Next Engine */
82225 +       uint32_t reserved0080[0x20];/**< (0x080 0x0FF)  */
82226 +       uint32_t fmbm_ebmpi[FMAN_PORT_MAX_EXT_POOLS_NUM];
82227 +                                       /**< Buffer Manager pool Information-*/
82228 +       uint32_t fmbm_acnt[FMAN_PORT_MAX_EXT_POOLS_NUM];
82229 +                                       /**< Allocate Counter-*/
82230 +       uint32_t reserved0130[8];
82231 +                                       /**< 0x130/0x140 - 0x15F reserved -*/
82232 +       uint32_t fmbm_rcgm[FMAN_PORT_CG_MAP_NUM];
82233 +                                       /**< Congestion Group Map*/
82234 +       uint32_t fmbm_mpd;              /**< BM Pool Depletion  */
82235 +       uint32_t reserved0184[0x1F];    /**< (0x184 0x1FF) */
82236 +       uint32_t fmbm_rstc;             /**< Rx Statistics Counters*/
82237 +       uint32_t fmbm_rfrc;             /**< Rx Frame Counter*/
82238 +       uint32_t fmbm_rfbc;             /**< Rx Bad Frames Counter*/
82239 +       uint32_t fmbm_rlfc;             /**< Rx Large Frames Counter*/
82240 +       uint32_t fmbm_rffc;             /**< Rx Filter Frames Counter*/
82241 +       uint32_t fmbm_rfdc;             /**< Rx Frame Discard Counter*/
82242 +       uint32_t fmbm_rfldec;           /**< Rx Frames List DMA Error Counter*/
82243 +       uint32_t fmbm_rodc;             /**< Rx Out of Buffers Discard nntr*/
82244 +       uint32_t fmbm_rbdc;             /**< Rx Buffers Deallocate Counter*/
82245 +       uint32_t reserved0224[0x17];    /**< (0x224 0x27F) */
82246 +       uint32_t fmbm_rpc;              /**< Rx Performance Counters*/
82247 +       uint32_t fmbm_rpcp;             /**< Rx Performance Count Parameters*/
82248 +       uint32_t fmbm_rccn;             /**< Rx Cycle Counter*/
82249 +       uint32_t fmbm_rtuc;             /**< Rx Tasks Utilization Counter*/
82250 +       uint32_t fmbm_rrquc;            /**< Rx Receive Queue Utilization cntr*/
82251 +       uint32_t fmbm_rduc;             /**< Rx DMA Utilization Counter*/
82252 +       uint32_t fmbm_rfuc;             /**< Rx FIFO Utilization Counter*/
82253 +       uint32_t fmbm_rpac;             /**< Rx Pause Activation Counter*/
82254 +       uint32_t reserved02a0[0x18];    /**< (0x2A0 0x2FF) */
82255 +       uint32_t fmbm_rdbg;             /**< Rx Debug-*/
82256 +};
82257 +
82258 +/** @Description   BMI Tx port register map */
82259 +struct fman_port_tx_bmi_regs {
82260 +       uint32_t fmbm_tcfg;             /**< Tx Configuration */
82261 +       uint32_t fmbm_tst;              /**< Tx Status */
82262 +       uint32_t fmbm_tda;              /**< Tx DMA attributes */
82263 +       uint32_t fmbm_tfp;              /**< Tx FIFO Parameters */
82264 +       uint32_t fmbm_tfed;             /**< Tx Frame End Data */
82265 +       uint32_t fmbm_ticp;             /**< Tx Internal Context Parameters */
82266 +       uint32_t fmbm_tfdne;            /**< Tx Frame Dequeue Next Engine. */
82267 +       uint32_t fmbm_tfca;             /**< Tx Frame Command attribute. */
82268 +       uint32_t fmbm_tcfqid;           /**< Tx Confirmation Frame Queue ID. */
82269 +       uint32_t fmbm_tefqid;           /**< Tx Frame Error Queue ID */
82270 +       uint32_t fmbm_tfene;            /**< Tx Frame Enqueue Next Engine */
82271 +       uint32_t fmbm_trlmts;           /**< Tx Rate Limiter Scale */
82272 +       uint32_t fmbm_trlmt;            /**< Tx Rate Limiter */
82273 +       uint32_t reserved0034[0x0e];    /**< (0x034-0x6c) */
82274 +       uint32_t fmbm_tccb;             /**< Tx Coarse Classification base */
82275 +       uint32_t fmbm_tfne;             /**< Tx Frame Next Engine */
82276 +       uint32_t fmbm_tpfcm[0x02];      /**< Tx Priority based Flow Control (PFC) Mapping */
82277 +       uint32_t fmbm_tcmne;            /**< Tx Frame Continuous Mode Next Engine */
82278 +       uint32_t reserved0080[0x60];    /**< (0x080-0x200) */
82279 +       uint32_t fmbm_tstc;             /**< Tx Statistics Counters */
82280 +       uint32_t fmbm_tfrc;             /**< Tx Frame Counter */
82281 +       uint32_t fmbm_tfdc;             /**< Tx Frames Discard Counter */
82282 +       uint32_t fmbm_tfledc;           /**< Tx Frame len error discard cntr */
82283 +       uint32_t fmbm_tfufdc;           /**< Tx Frame unsprt frmt discard cntr*/
82284 +       uint32_t fmbm_tbdc;             /**< Tx Buffers Deallocate Counter */
82285 +       uint32_t reserved0218[0x1A];    /**< (0x218-0x280) */
82286 +       uint32_t fmbm_tpc;              /**< Tx Performance Counters*/
82287 +       uint32_t fmbm_tpcp;             /**< Tx Performance Count Parameters*/
82288 +       uint32_t fmbm_tccn;             /**< Tx Cycle Counter*/
82289 +       uint32_t fmbm_ttuc;             /**< Tx Tasks Utilization Counter*/
82290 +       uint32_t fmbm_ttcquc;           /**< Tx Transmit conf Q util Counter*/
82291 +       uint32_t fmbm_tduc;             /**< Tx DMA Utilization Counter*/
82292 +       uint32_t fmbm_tfuc;             /**< Tx FIFO Utilization Counter*/
82293 +};
82294 +
82295 +/** @Description   BMI O/H port register map */
82296 +struct fman_port_oh_bmi_regs {
82297 +       uint32_t fmbm_ocfg;             /**< O/H Configuration  */
82298 +       uint32_t fmbm_ost;              /**< O/H Status */
82299 +       uint32_t fmbm_oda;              /**< O/H DMA attributes  */
82300 +       uint32_t fmbm_oicp;             /**< O/H Internal Context Parameters */
82301 +       uint32_t fmbm_ofdne;            /**< O/H Frame Dequeue Next Engine  */
82302 +       uint32_t fmbm_ofne;             /**< O/H Frame Next Engine  */
82303 +       uint32_t fmbm_ofca;             /**< O/H Frame Command Attributes.  */
82304 +       uint32_t fmbm_ofpne;            /**< O/H Frame Parser Next Engine  */
82305 +       uint32_t fmbm_opso;             /**< O/H Parse Start Offset  */
82306 +       uint32_t fmbm_opp;              /**< O/H Policer Profile */
82307 +       uint32_t fmbm_occb;             /**< O/H Coarse Classification base */
82308 +       uint32_t fmbm_oim;              /**< O/H Internal margins*/
82309 +       uint32_t fmbm_ofp;              /**< O/H Fifo Parameters*/
82310 +       uint32_t fmbm_ofed;             /**< O/H Frame End Data*/
82311 +       uint32_t reserved0030[2];       /**< (0x038 - 0x03F) */
82312 +       uint32_t fmbm_oprai[FMAN_PORT_PRS_RESULT_WORDS_NUM];
82313 +                               /**< O/H Parse Results Array Initialization  */
82314 +       uint32_t fmbm_ofqid;            /**< O/H Frame Queue ID  */
82315 +       uint32_t fmbm_oefqid;           /**< O/H Error Frame Queue ID  */
82316 +       uint32_t fmbm_ofsdm;            /**< O/H Frame Status Discard Mask  */
82317 +       uint32_t fmbm_ofsem;            /**< O/H Frame Status Error Mask  */
82318 +       uint32_t fmbm_ofene;            /**< O/H Frame Enqueue Next Engine  */
82319 +       uint32_t fmbm_orlmts;           /**< O/H Rate Limiter Scale  */
82320 +       uint32_t fmbm_orlmt;            /**< O/H Rate Limiter  */
82321 +       uint32_t fmbm_ocmne;            /**< O/H Continuous Mode Next Engine  */
82322 +       uint32_t reserved0080[0x20];    /**< 0x080 - 0x0FF Reserved */
82323 +       uint32_t fmbm_oebmpi[2];        /**< Buf Mngr Observed Pool Info */
82324 +       uint32_t reserved0108[0x16];    /**< 0x108 - 0x15F Reserved */
82325 +       uint32_t fmbm_ocgm[FMAN_PORT_CG_MAP_NUM]; /**< Observed Congestion Group Map */
82326 +       uint32_t fmbm_ompd;             /**< Observed BMan Pool Depletion */
82327 +       uint32_t reserved0184[0x1F];    /**< 0x184 - 0x1FF Reserved */
82328 +       uint32_t fmbm_ostc;             /**< O/H Statistics Counters  */
82329 +       uint32_t fmbm_ofrc;             /**< O/H Frame Counter  */
82330 +       uint32_t fmbm_ofdc;             /**< O/H Frames Discard Counter  */
82331 +       uint32_t fmbm_ofledc;           /**< O/H Frames Len Err Discard Cntr */
82332 +       uint32_t fmbm_ofufdc;           /**< O/H Frames Unsprtd Discard Cutr  */
82333 +       uint32_t fmbm_offc;             /**< O/H Filter Frames Counter  */
82334 +       uint32_t fmbm_ofwdc;            /**< Rx Frames WRED Discard Counter  */
82335 +       uint32_t fmbm_ofldec;           /**< O/H Frames List DMA Error Cntr */
82336 +       uint32_t fmbm_obdc;             /**< O/H Buffers Deallocate Counter */
82337 +       uint32_t reserved0218[0x17];    /**< (0x218 - 0x27F) */
82338 +       uint32_t fmbm_opc;              /**< O/H Performance Counters  */
82339 +       uint32_t fmbm_opcp;             /**< O/H Performance Count Parameters */
82340 +       uint32_t fmbm_occn;             /**< O/H Cycle Counter  */
82341 +       uint32_t fmbm_otuc;             /**< O/H Tasks Utilization Counter  */
82342 +       uint32_t fmbm_oduc;             /**< O/H DMA Utilization Counter */
82343 +       uint32_t fmbm_ofuc;             /**< O/H FIFO Utilization Counter */
82344 +};
82345 +
82346 +/** @Description   BMI port register map */
82347 +union fman_port_bmi_regs {
82348 +       struct fman_port_rx_bmi_regs rx;
82349 +       struct fman_port_tx_bmi_regs tx;
82350 +       struct fman_port_oh_bmi_regs oh;
82351 +};
82352 +
82353 +/** @Description   QMI port register map */
82354 +struct fman_port_qmi_regs {
82355 +       uint32_t fmqm_pnc;              /**< PortID n Configuration Register */
82356 +       uint32_t fmqm_pns;              /**< PortID n Status Register */
82357 +       uint32_t fmqm_pnts;             /**< PortID n Task Status Register */
82358 +       uint32_t reserved00c[4];        /**< 0xn00C - 0xn01B */
82359 +       uint32_t fmqm_pnen;             /**< PortID n Enqueue NIA Register */
82360 +       uint32_t fmqm_pnetfc;           /**< PortID n Enq Total Frame Counter */
82361 +       uint32_t reserved024[2];        /**< 0xn024 - 0x02B */
82362 +       uint32_t fmqm_pndn;             /**< PortID n Dequeue NIA Register */
82363 +       uint32_t fmqm_pndc;             /**< PortID n Dequeue Config Register */
82364 +       uint32_t fmqm_pndtfc;           /**< PortID n Dequeue tot Frame cntr */
82365 +       uint32_t fmqm_pndfdc;           /**< PortID n Dequeue FQID Dflt Cntr */
82366 +       uint32_t fmqm_pndcc;            /**< PortID n Dequeue Confirm Counter */
82367 +};
82368 +
82369 +
82370 +enum fman_port_dma_swap {
82371 +       E_FMAN_PORT_DMA_NO_SWAP,        /**< No swap, transfer data as is */
82372 +       E_FMAN_PORT_DMA_SWAP_LE,
82373 +       /**< The transferred data should be swapped in PPC Little Endian mode */
82374 +       E_FMAN_PORT_DMA_SWAP_BE
82375 +       /**< The transferred data should be swapped in Big Endian mode */
82376 +};
82377 +
82378 +/* Default port color */
82379 +enum fman_port_color {
82380 +       E_FMAN_PORT_COLOR_GREEN,        /**< Default port color is green */
82381 +       E_FMAN_PORT_COLOR_YELLOW,       /**< Default port color is yellow */
82382 +       E_FMAN_PORT_COLOR_RED,          /**< Default port color is red */
82383 +       E_FMAN_PORT_COLOR_OVERRIDE      /**< Ignore color */
82384 +};
82385 +
82386 +/* QMI dequeue from the SP channel - types */
82387 +enum fman_port_deq_type {
82388 +       E_FMAN_PORT_DEQ_BY_PRI,
82389 +       /**< Priority precedence and Intra-Class scheduling */
82390 +       E_FMAN_PORT_DEQ_ACTIVE_FQ,
82391 +       /**< Active FQ precedence and Intra-Class scheduling */
82392 +       E_FMAN_PORT_DEQ_ACTIVE_FQ_NO_ICS
82393 +       /**< Active FQ precedence and override Intra-Class scheduling */
82394 +};
82395 +
82396 +/* QMI dequeue prefetch modes */
82397 +enum fman_port_deq_prefetch {
82398 +       E_FMAN_PORT_DEQ_NO_PREFETCH, /**< No prefetch mode */
82399 +       E_FMAN_PORT_DEQ_PART_PREFETCH, /**< Partial prefetch mode */
82400 +       E_FMAN_PORT_DEQ_FULL_PREFETCH /**< Full prefetch mode */
82401 +};
82402 +
82403 +/* Parameters for defining performance counters behavior */
82404 +struct fman_port_perf_cnt_params {
82405 +       uint8_t task_val;       /**< Task compare value */
82406 +       uint8_t queue_val;
82407 +       /**< Rx or Tx conf queue compare value (unused for O/H ports) */
82408 +       uint8_t dma_val;        /**< Dma compare value */
82409 +       uint32_t fifo_val;      /**< Fifo compare value (in bytes) */
82410 +};
82411 +
82412 +/** @Description   FM Port configuration structure, used at init */
82413 +struct fman_port_cfg {
82414 +       struct fman_port_perf_cnt_params perf_cnt_params;
82415 +       /* BMI parameters */
82416 +       enum fman_port_dma_swap         dma_swap_data;
82417 +       bool                            dma_ic_stash_on;
82418 +       bool                            dma_header_stash_on;
82419 +       bool                            dma_sg_stash_on;
82420 +       bool                            dma_write_optimize;
82421 +       uint16_t                        ic_ext_offset;
82422 +       uint8_t                         ic_int_offset;
82423 +       uint16_t                        ic_size;
82424 +       enum fman_port_color            color;
82425 +       bool                            sync_req;
82426 +       bool                            discard_override;
82427 +       uint8_t                         checksum_bytes_ignore;
82428 +       uint8_t                         rx_cut_end_bytes;
82429 +       uint32_t                        rx_pri_elevation;
82430 +       uint32_t                        rx_fifo_thr;
82431 +       uint8_t                         rx_fd_bits;
82432 +       uint8_t                         int_buf_start_margin;
82433 +       uint16_t                        ext_buf_start_margin;
82434 +       uint16_t                        ext_buf_end_margin;
82435 +       uint32_t                        tx_fifo_min_level;
82436 +       uint32_t                        tx_fifo_low_comf_level;
82437 +       uint8_t                         tx_fifo_deq_pipeline_depth;
82438 +       bool                            stats_counters_enable;
82439 +       bool                            perf_counters_enable;
82440 +       /* QMI parameters */
82441 +       bool                            deq_high_pri;
82442 +       enum fman_port_deq_type         deq_type;
82443 +       enum fman_port_deq_prefetch     deq_prefetch_opt;
82444 +       uint16_t                        deq_byte_cnt;
82445 +       bool                            queue_counters_enable;
82446 +       bool                            no_scatter_gather;
82447 +       int                             errata_A006675;
82448 +       int                             errata_A006320;
82449 +       int                             excessive_threshold_register;
82450 +       int                             fmbm_rebm_has_sgd;
82451 +       int                             fmbm_tfne_has_features;
82452 +       int                             qmi_deq_options_support;
82453 +};
82454 +
82455 +enum fman_port_type {
82456 +       E_FMAN_PORT_TYPE_OP = 0,
82457 +       /**< Offline parsing port, shares id-s with
82458 +        * host command, so must have exclusive id-s */
82459 +       E_FMAN_PORT_TYPE_RX,        /**< 1G Rx port */
82460 +       E_FMAN_PORT_TYPE_RX_10G,    /**< 10G Rx port */
82461 +       E_FMAN_PORT_TYPE_TX,        /**< 1G Tx port */
82462 +       E_FMAN_PORT_TYPE_TX_10G,     /**< 10G Tx port */
82463 +       E_FMAN_PORT_TYPE_DUMMY,
82464 +       E_FMAN_PORT_TYPE_HC = E_FMAN_PORT_TYPE_DUMMY
82465 +       /**< Host command port, shares id-s with
82466 +        * offline parsing ports, so must have exclusive id-s */
82467 +};
82468 +
82469 +struct fman_port_params {
82470 +       uint32_t discard_mask;
82471 +       uint32_t err_mask;
82472 +       uint32_t dflt_fqid;
82473 +       uint32_t err_fqid;
82474 +       uint8_t deq_sp;
82475 +       bool dont_release_buf;
82476 +};
82477 +
82478 +/* Port context - used by most API functions */
82479 +struct fman_port {
82480 +       enum fman_port_type type;
82481 +       uint8_t fm_rev_maj;
82482 +       uint8_t fm_rev_min;
82483 +       union fman_port_bmi_regs *bmi_regs;
82484 +       struct fman_port_qmi_regs *qmi_regs;
82485 +       bool im_en;
82486 +       uint8_t ext_pools_num;
82487 +};
82488 +
82489 +/** @Description   External buffer pools configuration */
82490 +struct fman_port_bpools {
82491 +       uint8_t count;                  /**< Num of pools to set up */
82492 +       bool    counters_enable;        /**< Enable allocate counters */
82493 +       uint8_t grp_bp_depleted_num;
82494 +       /**< Number of depleted pools - if reached the BMI indicates
82495 +        * the MAC to send a pause frame */
82496 +       struct {
82497 +               uint8_t         bpid;   /**< BM pool ID */
82498 +               uint16_t        size;
82499 +               /**< Pool's size - must be in ascending order */
82500 +               bool            is_backup;
82501 +               /**< If this is a backup pool */
82502 +               bool            grp_bp_depleted;
82503 +               /**< Consider this buffer in multiple pools depletion criteria*/
82504 +               bool            single_bp_depleted;
82505 +               /**< Consider this buffer in single pool depletion criteria */
82506 +               bool            pfc_priorities_en;
82507 +       } bpool[FMAN_PORT_MAX_EXT_POOLS_NUM];
82508 +};
82509 +
82510 +enum fman_port_rate_limiter_scale_down {
82511 +       E_FMAN_PORT_RATE_DOWN_NONE,
82512 +       E_FMAN_PORT_RATE_DOWN_BY_2,
82513 +       E_FMAN_PORT_RATE_DOWN_BY_4,
82514 +       E_FMAN_PORT_RATE_DOWN_BY_8
82515 +};
82516 +
82517 +/* Rate limiter configuration */
82518 +struct fman_port_rate_limiter {
82519 +       uint8_t         count_1micro_bit;
82520 +       bool            high_burst_size_gran;
82521 +       /**< Defines burst_size granularity for OP ports; when TRUE,
82522 +        * burst_size below counts in frames, otherwise in 10^3 frames */
82523 +       uint16_t        burst_size;
82524 +       /**< Max burst size, in KBytes for Tx port, according to
82525 +        * high_burst_size_gran definition for OP port */
82526 +       uint32_t        rate;
82527 +       /**< In Kbps for Tx port, in frames/sec for OP port */
82528 +       enum fman_port_rate_limiter_scale_down rate_factor;
82529 +};
82530 +
82531 +/* BMI statistics counters */
82532 +enum fman_port_stats_counters {
82533 +       E_FMAN_PORT_STATS_CNT_FRAME,
82534 +       /**< Number of processed frames; valid for all ports */
82535 +       E_FMAN_PORT_STATS_CNT_DISCARD,
82536 +       /**< For Rx ports - frames discarded by QMAN, for Tx or O/H ports -
82537 +        * frames discarded due to DMA error; valid for all ports */
82538 +       E_FMAN_PORT_STATS_CNT_DEALLOC_BUF,
82539 +       /**< Number of buffer deallocate operations; valid for all ports */
82540 +       E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME,
82541 +       /**< Number of bad Rx frames, like CRC error, Rx FIFO overflow etc;
82542 +        * valid for Rx ports only */
82543 +       E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME,
82544 +       /**< Number of Rx oversized frames, that is frames exceeding max frame
82545 +        * size configured for the corresponding ETH controller;
82546 +        * valid for Rx ports only */
82547 +       E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF,
82548 +       /**< Frames discarded due to lack of external buffers; valid for
82549 +        * Rx ports only */
82550 +       E_FMAN_PORT_STATS_CNT_LEN_ERR,
82551 +       /**< Frames discarded due to frame length error; valid for Tx and
82552 +        * O/H ports only */
82553 +       E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT,
82554 +       /**< Frames discarded due to unsupported FD format; valid for Tx
82555 +        * and O/H ports only */
82556 +       E_FMAN_PORT_STATS_CNT_FILTERED_FRAME,
82557 +       /**< Number of frames filtered out by PCD module; valid for
82558 +        * Rx and OP ports only */
82559 +       E_FMAN_PORT_STATS_CNT_DMA_ERR,
82560 +       /**< Frames rejected by QMAN that were not able to release their
82561 +        * buffers due to DMA error; valid for Rx and O/H ports only */
82562 +       E_FMAN_PORT_STATS_CNT_WRED_DISCARD
82563 +       /**< Frames going through O/H port that were not able to to enter the
82564 +        * return queue due to WRED algorithm; valid for O/H ports only */
82565 +};
82566 +
82567 +/* BMI performance counters */
82568 +enum fman_port_perf_counters {
82569 +       E_FMAN_PORT_PERF_CNT_CYCLE,     /**< Cycle counter */
82570 +       E_FMAN_PORT_PERF_CNT_TASK_UTIL, /**< Tasks utilization counter */
82571 +       E_FMAN_PORT_PERF_CNT_QUEUE_UTIL,
82572 +       /**< For Rx ports - Rx queue utilization, for Tx ports - Tx conf queue
82573 +        * utilization; not valid for O/H ports */
82574 +       E_FMAN_PORT_PERF_CNT_DMA_UTIL,  /**< DMA utilization counter */
82575 +       E_FMAN_PORT_PERF_CNT_FIFO_UTIL, /**< FIFO utilization counter */
82576 +       E_FMAN_PORT_PERF_CNT_RX_PAUSE
82577 +       /**< Number of cycles in which Rx pause activation control is on;
82578 +        * valid for Rx ports only */
82579 +};
82580 +
82581 +/* QMI counters */
82582 +enum fman_port_qmi_counters {
82583 +       E_FMAN_PORT_ENQ_TOTAL,  /**< EnQ tot frame cntr */
82584 +       E_FMAN_PORT_DEQ_TOTAL,  /**< DeQ tot frame cntr; invalid for Rx ports */
82585 +       E_FMAN_PORT_DEQ_FROM_DFLT,
82586 +       /**< Dequeue from default FQID counter not valid for Rx ports */
82587 +       E_FMAN_PORT_DEQ_CONFIRM /**< DeQ confirm cntr invalid for Rx ports */
82588 +};
82589 +
82590 +
82591 +/** @Collection    FM Port API */
82592 +void fman_port_defconfig(struct fman_port_cfg *cfg, enum fman_port_type type);
82593 +int fman_port_init(struct fman_port *port,
82594 +               struct fman_port_cfg *cfg,
82595 +               struct fman_port_params *params);
82596 +int fman_port_enable(struct fman_port *port);
82597 +int fman_port_disable(const struct fman_port *port);
82598 +int fman_port_set_bpools(const struct fman_port *port,
82599 +               const struct fman_port_bpools *bp);
82600 +int fman_port_set_rate_limiter(struct fman_port *port,
82601 +               struct fman_port_rate_limiter *rate_limiter);
82602 +int fman_port_delete_rate_limiter(struct fman_port *port);
82603 +int fman_port_set_err_mask(struct fman_port *port, uint32_t err_mask);
82604 +int fman_port_set_discard_mask(struct fman_port *port, uint32_t discard_mask);
82605 +int fman_port_modify_rx_fd_bits(struct fman_port *port,
82606 +               uint8_t rx_fd_bits,
82607 +               bool add);
82608 +int fman_port_set_perf_cnt_params(struct fman_port *port,
82609 +               struct fman_port_perf_cnt_params *params);
82610 +int fman_port_set_stats_cnt_mode(struct fman_port *port, bool enable);
82611 +int fman_port_set_perf_cnt_mode(struct fman_port *port, bool enable);
82612 +int fman_port_set_queue_cnt_mode(struct fman_port *port, bool enable);
82613 +int fman_port_set_bpool_cnt_mode(struct fman_port *port,
82614 +               uint8_t bpid,
82615 +               bool enable);
82616 +uint32_t fman_port_get_stats_counter(struct fman_port *port,
82617 +               enum fman_port_stats_counters counter);
82618 +void fman_port_set_stats_counter(struct fman_port *port,
82619 +               enum fman_port_stats_counters counter,
82620 +               uint32_t value);
82621 +uint32_t fman_port_get_perf_counter(struct fman_port *port,
82622 +               enum fman_port_perf_counters counter);
82623 +void fman_port_set_perf_counter(struct fman_port *port,
82624 +               enum fman_port_perf_counters counter,
82625 +               uint32_t value);
82626 +uint32_t fman_port_get_qmi_counter(struct fman_port *port,
82627 +               enum fman_port_qmi_counters counter);
82628 +void fman_port_set_qmi_counter(struct fman_port *port,
82629 +               enum fman_port_qmi_counters counter,
82630 +               uint32_t value);
82631 +uint32_t fman_port_get_bpool_counter(struct fman_port *port, uint8_t bpid);
82632 +void fman_port_set_bpool_counter(struct fman_port *port,
82633 +               uint8_t bpid,
82634 +               uint32_t value);
82635 +int fman_port_add_congestion_grps(struct fman_port *port,
82636 +               uint32_t grps_map[FMAN_PORT_CG_MAP_NUM]);
82637 +int fman_port_remove_congestion_grps(struct fman_port  *port,
82638 +               uint32_t grps_map[FMAN_PORT_CG_MAP_NUM]);
82639 +
82640 +
82641 +#endif /* __FSL_FMAN_PORT_H */
82642 --- /dev/null
82643 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_prs.h
82644 @@ -0,0 +1,102 @@
82645 +/*
82646 + * Copyright 2008-2012 Freescale Semiconductor Inc.
82647 + *
82648 + * Redistribution and use in source and binary forms, with or without
82649 + * modification, are permitted provided that the following conditions are met:
82650 + *     * Redistributions of source code must retain the above copyright
82651 + *       notice, this list of conditions and the following disclaimer.
82652 + *     * Redistributions in binary form must reproduce the above copyright
82653 + *       notice, this list of conditions and the following disclaimer in the
82654 + *       documentation and/or other materials provided with the distribution.
82655 + *     * Neither the name of Freescale Semiconductor nor the
82656 + *       names of its contributors may be used to endorse or promote products
82657 + *       derived from this software without specific prior written permission.
82658 + *
82659 + *
82660 + * ALTERNATIVELY, this software may be distributed under the terms of the
82661 + * GNU General Public License ("GPL") as published by the Free Software
82662 + * Foundation, either version 2 of that License or (at your option) any
82663 + * later version.
82664 + *
82665 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
82666 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
82667 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
82668 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
82669 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
82670 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
82671 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
82672 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
82673 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
82674 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
82675 + */
82676 +
82677 +#ifndef __FSL_FMAN_PRS_H
82678 +#define __FSL_FMAN_PRS_H
82679 +
82680 +#include "common/general.h"
82681 +
82682 +#define FM_PCD_EX_PRS_DOUBLE_ECC       0x02000000
82683 +#define FM_PCD_EX_PRS_SINGLE_ECC       0x01000000
82684 +
82685 +#define FM_PCD_PRS_PPSC_ALL_PORTS      0xffff0000
82686 +#define FM_PCD_PRS_RPIMAC_EN           0x00000001
82687 +#define FM_PCD_PRS_PORT_IDLE_STS       0xffff0000
82688 +#define FM_PCD_PRS_SINGLE_ECC          0x00004000
82689 +#define FM_PCD_PRS_DOUBLE_ECC          0x00004000
82690 +#define PRS_MAX_CYCLE_LIMIT            8191
82691 +
82692 +#define DEFAULT_MAX_PRS_CYC_LIM                0
82693 +
82694 +struct fman_prs_regs {
82695 +       uint32_t fmpr_rpclim;
82696 +       uint32_t fmpr_rpimac;
82697 +       uint32_t pmeec;
82698 +       uint32_t res00c[5];
82699 +       uint32_t fmpr_pevr;
82700 +       uint32_t fmpr_pever;
82701 +       uint32_t res028;
82702 +       uint32_t fmpr_perr;
82703 +       uint32_t fmpr_perer;
82704 +       uint32_t res034;
82705 +       uint32_t res038[10];
82706 +       uint32_t fmpr_ppsc;
82707 +       uint32_t res064;
82708 +       uint32_t fmpr_pds;
82709 +       uint32_t fmpr_l2rrs;
82710 +       uint32_t fmpr_l3rrs;
82711 +       uint32_t fmpr_l4rrs;
82712 +       uint32_t fmpr_srrs;
82713 +       uint32_t fmpr_l2rres;
82714 +       uint32_t fmpr_l3rres;
82715 +       uint32_t fmpr_l4rres;
82716 +       uint32_t fmpr_srres;
82717 +       uint32_t fmpr_spcs;
82718 +       uint32_t fmpr_spscs;
82719 +       uint32_t fmpr_hxscs;
82720 +       uint32_t fmpr_mrcs;
82721 +       uint32_t fmpr_mwcs;
82722 +       uint32_t fmpr_mrscs;
82723 +       uint32_t fmpr_mwscs;
82724 +       uint32_t fmpr_fcscs;
82725 +};
82726 +
82727 +struct fman_prs_cfg {
82728 +       uint32_t        port_id_stat;
82729 +       uint16_t        max_prs_cyc_lim;
82730 +       uint32_t        prs_exceptions;
82731 +};
82732 +
82733 +uint32_t fman_prs_get_err_event(struct fman_prs_regs *regs, uint32_t ev_mask);
82734 +uint32_t fman_prs_get_err_ev_mask(struct fman_prs_regs *regs);
82735 +void fman_prs_ack_err_event(struct fman_prs_regs *regs, uint32_t event);
82736 +uint32_t fman_prs_get_expt_event(struct fman_prs_regs *regs, uint32_t ev_mask);
82737 +uint32_t fman_prs_get_expt_ev_mask(struct fman_prs_regs *regs);
82738 +void fman_prs_ack_expt_event(struct fman_prs_regs *regs, uint32_t event);
82739 +void fman_prs_defconfig(struct fman_prs_cfg *cfg);
82740 +int fman_prs_init(struct fman_prs_regs *regs, struct fman_prs_cfg *cfg);
82741 +void fman_prs_enable(struct fman_prs_regs *regs);
82742 +void fman_prs_disable(struct fman_prs_regs *regs);
82743 +int fman_prs_is_enabled(struct fman_prs_regs *regs);
82744 +void fman_prs_set_stst_port_msk(struct fman_prs_regs *regs, uint32_t pid_msk);
82745 +void fman_prs_set_stst(struct fman_prs_regs *regs, bool enable);
82746 +#endif /* __FSL_FMAN_PRS_H */
82747 --- /dev/null
82748 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_rtc.h
82749 @@ -0,0 +1,449 @@
82750 +/*
82751 + * Copyright 2013 Freescale Semiconductor Inc.
82752 + *
82753 + * Redistribution and use in source and binary forms, with or without
82754 + * modification, are permitted provided that the following conditions are met:
82755 + *     * Redistributions of source code must retain the above copyright
82756 + *       notice, this list of conditions and the following disclaimer.
82757 + *     * Redistributions in binary form must reproduce the above copyright
82758 + *       notice, this list of conditions and the following disclaimer in the
82759 + *       documentation and/or other materials provided with the distribution.
82760 + *     * Neither the name of Freescale Semiconductor nor the
82761 + *       names of its contributors may be used to endorse or promote products
82762 + *       derived from this software without specific prior written permission.
82763 + *
82764 + *
82765 + * ALTERNATIVELY, this software may be distributed under the terms of the
82766 + * GNU General Public License ("GPL") as published by the Free Software
82767 + * Foundation, either version 2 of that License or (at your option) any
82768 + * later version.
82769 + *
82770 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
82771 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
82772 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
82773 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
82774 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
82775 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
82776 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
82777 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
82778 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
82779 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
82780 + */
82781 +
82782 +#ifndef __FSL_FMAN_RTC_H
82783 +#define __FSL_FMAN_RTC_H
82784 +
82785 +#include "common/general.h"
82786 +
82787 +/* FM RTC Registers definitions */
82788 +#define FMAN_RTC_TMR_CTRL_ALMP1                  0x80000000
82789 +#define FMAN_RTC_TMR_CTRL_ALMP2                  0x40000000
82790 +#define FMAN_RTC_TMR_CTRL_FS                     0x10000000
82791 +#define FMAN_RTC_TMR_CTRL_PP1L                   0x08000000
82792 +#define FMAN_RTC_TMR_CTRL_PP2L                   0x04000000
82793 +#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK       0x03FF0000
82794 +#define FMAN_RTC_TMR_CTRL_FRD                    0x00004000
82795 +#define FMAN_RTC_TMR_CTRL_SLV                    0x00002000
82796 +#define FMAN_RTC_TMR_CTRL_ETEP1                  0x00000100
82797 +#define FMAN_RTC_TMR_CTRL_COPH                   0x00000080
82798 +#define FMAN_RTC_TMR_CTRL_CIPH                   0x00000040
82799 +#define FMAN_RTC_TMR_CTRL_TMSR                   0x00000020
82800 +#define FMAN_RTC_TMR_CTRL_DBG                    0x00000010
82801 +#define FMAN_RTC_TMR_CTRL_BYP                    0x00000008
82802 +#define FMAN_RTC_TMR_CTRL_TE                     0x00000004
82803 +#define FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK          0x00000003
82804 +#define FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK          0x00000001
82805 +#define FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK          0x00000000
82806 +#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT      16
82807 +
82808 +#define FMAN_RTC_TMR_TEVENT_ETS2                 0x02000000
82809 +#define FMAN_RTC_TMR_TEVENT_ETS1                 0x01000000
82810 +#define FMAN_RTC_TMR_TEVENT_ALM2                 0x00020000
82811 +#define FMAN_RTC_TMR_TEVENT_ALM1                 0x00010000
82812 +#define FMAN_RTC_TMR_TEVENT_PP1                  0x00000080
82813 +#define FMAN_RTC_TMR_TEVENT_PP2                  0x00000040
82814 +#define FMAN_RTC_TMR_TEVENT_PP3                  0x00000020
82815 +#define FMAN_RTC_TMR_TEVENT_ALL                  (FMAN_RTC_TMR_TEVENT_ETS2 |\
82816 +                                               FMAN_RTC_TMR_TEVENT_ETS1 |\
82817 +                                               FMAN_RTC_TMR_TEVENT_ALM2 |\
82818 +                                               FMAN_RTC_TMR_TEVENT_ALM1 |\
82819 +                                               FMAN_RTC_TMR_TEVENT_PP1 |\
82820 +                                               FMAN_RTC_TMR_TEVENT_PP2 |\
82821 +                                               FMAN_RTC_TMR_TEVENT_PP3)
82822 +
82823 +#define FMAN_RTC_TMR_PRSC_OCK_MASK               0x0000FFFF
82824 +
82825 +/**************************************************************************//**
82826 + @Description   FM RTC Alarm Polarity Options.
82827 +*//***************************************************************************/
82828 +enum fman_rtc_alarm_polarity {
82829 +    E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH,  /**< Active-high output polarity */
82830 +    E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW    /**< Active-low output polarity */
82831 +};
82832 +
82833 +/**************************************************************************//**
82834 + @Description   FM RTC Trigger Polarity Options.
82835 +*//***************************************************************************/
82836 +enum fman_rtc_trigger_polarity {
82837 +    E_FMAN_RTC_TRIGGER_ON_RISING_EDGE,    /**< Trigger on rising edge */
82838 +    E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE    /**< Trigger on falling edge */
82839 +};
82840 +
82841 +/**************************************************************************//**
82842 + @Description   IEEE1588 Timer Module FM RTC Optional Clock Sources.
82843 +*//***************************************************************************/
82844 +enum fman_src_clock {
82845 +    E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL,  /**< external high precision timer
82846 +                                               reference clock */
82847 +    E_FMAN_RTC_SOURCE_CLOCK_SYSTEM,    /**< MAC system clock */
82848 +    E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR  /**< RTC clock oscilator */
82849 +};
82850 +
82851 +/* RTC default values */
82852 +#define DEFAULT_SRC_CLOCK                E_FMAN_RTC_SOURCE_CLOCK_SYSTEM
82853 +#define DEFAULT_INVERT_INPUT_CLK_PHASE   FALSE
82854 +#define DEFAULT_INVERT_OUTPUT_CLK_PHASE  FALSE
82855 +#define DEFAULT_ALARM_POLARITY           E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH
82856 +#define DEFAULT_TRIGGER_POLARITY         E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE
82857 +#define DEFAULT_PULSE_REALIGN            FALSE
82858 +
82859 +#define FMAN_RTC_MAX_NUM_OF_ALARMS 3
82860 +#define FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES 4
82861 +#define FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS 3
82862 +
82863 +/**************************************************************************//**
82864 + @Description FM RTC timer alarm
82865 +*//***************************************************************************/
82866 +struct t_tmr_alarm{
82867 +    uint32_t   tmr_alarm_h;    /**<  */
82868 +    uint32_t   tmr_alarm_l;    /**<  */
82869 +};
82870 +
82871 +/**************************************************************************//**
82872 + @Description FM RTC timer Ex trigger
82873 +*//***************************************************************************/
82874 +struct t_tmr_ext_trigger{
82875 +    uint32_t   tmr_etts_h;     /**<  */
82876 +    uint32_t   tmr_etts_l;     /**<  */
82877 +};
82878 +
82879 +struct rtc_regs {
82880 +    uint32_t tmr_id;      /* 0x000 Module ID register */
82881 +    uint32_t tmr_id2;     /* 0x004 Controller ID register */
82882 +    uint32_t reserved0008[30];
82883 +    uint32_t tmr_ctrl;    /* 0x0080 timer control register */
82884 +    uint32_t tmr_tevent;  /* 0x0084 timer event register */
82885 +    uint32_t tmr_temask;  /* 0x0088 timer event mask register */
82886 +    uint32_t reserved008c[3];
82887 +    uint32_t tmr_cnt_h;   /* 0x0098 timer counter high register */
82888 +    uint32_t tmr_cnt_l;   /* 0x009c timer counter low register */
82889 +    uint32_t tmr_add;     /* 0x00a0 timer drift compensation addend register */
82890 +    uint32_t tmr_acc;     /* 0x00a4 timer accumulator register */
82891 +    uint32_t tmr_prsc;    /* 0x00a8 timer prescale */
82892 +    uint32_t reserved00ac;
82893 +    uint32_t tmr_off_h;    /* 0x00b0 timer offset high */
82894 +    uint32_t tmr_off_l;    /* 0x00b4 timer offset low  */
82895 +    struct t_tmr_alarm tmr_alarm[FMAN_RTC_MAX_NUM_OF_ALARMS]; /* 0x00b8 timer
82896 +                                                               alarm */
82897 +    uint32_t tmr_fiper[FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES]; /* 0x00d0 timer
82898 +                                               fixed period interval */
82899 +    struct t_tmr_ext_trigger tmr_etts[FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
82900 +                       /* 0x00e0 time stamp general purpose external */
82901 +    uint32_t reserved00f0[4];
82902 +};
82903 +
82904 +struct rtc_cfg {
82905 +    enum fman_src_clock            src_clk;
82906 +    uint32_t                ext_src_clk_freq;
82907 +    uint32_t                rtc_freq_hz;
82908 +    bool                    timer_slave_mode;
82909 +    bool                    invert_input_clk_phase;
82910 +    bool                    invert_output_clk_phase;
82911 +    uint32_t                events_mask;
82912 +    bool                    bypass; /**< Indicates if frequency compensation
82913 +                                       is bypassed */
82914 +    bool                    pulse_realign;
82915 +    enum fman_rtc_alarm_polarity    alarm_polarity[FMAN_RTC_MAX_NUM_OF_ALARMS];
82916 +    enum fman_rtc_trigger_polarity  trigger_polarity
82917 +                                       [FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
82918 +};
82919 +
82920 +/**
82921 + * fman_rtc_defconfig() - Get default RTC configuration
82922 + * @cfg:       pointer to configuration structure.
82923 + *
82924 + * Call this function to obtain a default set of configuration values for
82925 + * initializing RTC.  The user can overwrite any of the values before calling
82926 + * fman_rtc_init(), if specific configuration needs to be applied.
82927 + */
82928 +void fman_rtc_defconfig(struct rtc_cfg *cfg);
82929 +
82930 +/**
82931 + * fman_rtc_get_events() - Get the events
82932 + * @regs:              Pointer to RTC register block
82933 + *
82934 + * Returns: The events
82935 + */
82936 +uint32_t fman_rtc_get_events(struct rtc_regs *regs);
82937 +
82938 +/**
82939 + * fman_rtc_get_interrupt_mask() - Get the events mask
82940 + * @regs:              Pointer to RTC register block
82941 + *
82942 + * Returns: The events mask
82943 + */
82944 +uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs);
82945 +
82946 +
82947 +/**
82948 + * fman_rtc_set_interrupt_mask() - Set the events mask
82949 + * @regs:              Pointer to RTC register block
82950 + * @mask:              The mask to set
82951 + */
82952 +void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask);
82953 +
82954 +/**
82955 + * fman_rtc_get_event() - Check if specific events occurred
82956 + * @regs:              Pointer to RTC register block
82957 + * @ev_mask:   a mask of the events to check
82958 + *
82959 + * Returns: 0 if the events did not occur. Non zero if one of the events occurred
82960 + */
82961 +uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask);
82962 +
82963 +/**
82964 + * fman_rtc_check_and_clear_event() - Clear events which are on
82965 + * @regs:              Pointer to RTC register block
82966 + *
82967 + * Returns: A mask of the events which were cleared
82968 + */
82969 +uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs);
82970 +
82971 +/**
82972 + * fman_rtc_ack_event() - Clear events
82973 + * @regs:              Pointer to RTC register block
82974 + * @events:            The events to disable
82975 + */
82976 +void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events);
82977 +
82978 +/**
82979 + * fman_rtc_enable_interupt() - Enable events interrupts
82980 + * @regs:              Pointer to RTC register block
82981 + * @mask:              The events to disable
82982 + */
82983 +void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t mask);
82984 +
82985 +/**
82986 + * fman_rtc_disable_interupt() - Disable events interrupts
82987 + * @regs:              Pointer to RTC register block
82988 + * @mask:              The events to disable
82989 + */
82990 +void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t mask);
82991 +
82992 +/**
82993 + * fman_rtc_get_timer_ctrl() - Get the control register
82994 + * @regs:              Pointer to RTC register block
82995 + *
82996 + * Returns: The control register value
82997 + */
82998 +uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs);
82999 +
83000 +/**
83001 + * fman_rtc_set_timer_ctrl() - Set timer control register
83002 + * @regs:              Pointer to RTC register block
83003 + * @val:               The value to set
83004 + */
83005 +void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val);
83006 +
83007 +/**
83008 + * fman_rtc_get_frequency_compensation() - Get the frequency compensation
83009 + * @regs:              Pointer to RTC register block
83010 + *
83011 + * Returns: The timer counter
83012 + */
83013 +uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs);
83014 +
83015 +/**
83016 + * fman_rtc_set_frequency_compensation() - Set frequency compensation
83017 + * @regs:              Pointer to RTC register block
83018 + * @val:               The value to set
83019 + */
83020 +void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val);
83021 +
83022 +/**
83023 + * fman_rtc_get_trigger_stamp() - Get a trigger stamp
83024 + * @regs:              Pointer to RTC register block
83025 + * @id:        The id of the trigger stamp
83026 + *
83027 + * Returns: The time stamp
83028 + */
83029 +uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs,  int id);
83030 +
83031 +/**
83032 + * fman_rtc_set_timer_alarm_l() - Set timer alarm low register
83033 + * @regs:              Pointer to RTC register block
83034 + * @index:             The index of alarm to set
83035 + * @val:               The value to set
83036 + */
83037 +void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index,
83038 +               uint32_t val);
83039 +
83040 +/**
83041 + * fman_rtc_set_timer_alarm() - Set timer alarm
83042 + * @regs:              Pointer to RTC register block
83043 + * @index:             The index of alarm to set
83044 + * @val:               The value to set
83045 + */
83046 +void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val);
83047 +
83048 +/**
83049 + * fman_rtc_set_timer_fiper() - Set timer fiper
83050 + * @regs:              Pointer to RTC register block
83051 + * @index:             The index of fiper to set
83052 + * @val:               The value to set
83053 + */
83054 +void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val);
83055 +
83056 +/**
83057 + * fman_rtc_set_timer_offset() - Set timer offset
83058 + * @regs:              Pointer to RTC register block
83059 + * @val:               The value to set
83060 + */
83061 +void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val);
83062 +
83063 +/**
83064 + * fman_rtc_get_timer() - Get the timer counter
83065 + * @regs:              Pointer to RTC register block
83066 + *
83067 + * Returns: The timer counter
83068 + */
83069 +static inline uint64_t fman_rtc_get_timer(struct rtc_regs *regs)
83070 +{
83071 +       uint64_t time;
83072 +    /* TMR_CNT_L must be read first to get an accurate value */
83073 +    time = (uint64_t)ioread32be(&regs->tmr_cnt_l);
83074 +    time |= ((uint64_t)ioread32be(&regs->tmr_cnt_h) << 32);
83075 +
83076 +    return time;
83077 +}
83078 +
83079 +/**
83080 + * fman_rtc_set_timer() - Set timer counter
83081 + * @regs:              Pointer to RTC register block
83082 + * @val:               The value to set
83083 + */
83084 +static inline void fman_rtc_set_timer(struct rtc_regs *regs, int64_t val)
83085 +{
83086 +       iowrite32be((uint32_t)val, &regs->tmr_cnt_l);
83087 +       iowrite32be((uint32_t)(val >> 32), &regs->tmr_cnt_h);
83088 +}
83089 +
83090 +/**
83091 + * fman_rtc_timers_soft_reset() - Soft reset
83092 + * @regs:              Pointer to RTC register block
83093 + *
83094 + * Resets all the timer registers and state machines for the 1588 IP and
83095 + * the attached client 1588
83096 + */
83097 +void fman_rtc_timers_soft_reset(struct rtc_regs *regs);
83098 +
83099 +/**
83100 + * fman_rtc_clear_external_trigger() - Clear an external trigger
83101 + * @regs:              Pointer to RTC register block
83102 + * @id: The id of the trigger to clear
83103 + */
83104 +void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id);
83105 +
83106 +/**
83107 + * fman_rtc_clear_periodic_pulse() - Clear periodic pulse
83108 + * @regs:              Pointer to RTC register block
83109 + * @id: The id of the fiper to clear
83110 + */
83111 +void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id);
83112 +
83113 +/**
83114 + * fman_rtc_enable() - Enable RTC hardware block
83115 + * @regs:              Pointer to RTC register block
83116 + */
83117 +void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock);
83118 +
83119 +/**
83120 + * fman_rtc_is_enabled() - Is RTC hardware block enabled
83121 + * @regs:              Pointer to RTC register block
83122 + *
83123 + * Return: TRUE if enabled
83124 + */
83125 +bool fman_rtc_is_enabled(struct rtc_regs *regs);
83126 +
83127 +/**
83128 + * fman_rtc_disable() - Disable RTC hardware block
83129 + * @regs:              Pointer to RTC register block
83130 + */
83131 +void fman_rtc_disable(struct rtc_regs *regs);
83132 +
83133 +/**
83134 + * fman_rtc_init() - Init RTC hardware block
83135 + * @cfg:               RTC configuration data
83136 + * @regs:              Pointer to RTC register block
83137 + * @num_alarms:                Number of alarms in RTC
83138 + * @num_fipers:                Number of fipers in RTC
83139 + * @num_ext_triggers:  Number of external triggers in RTC
83140 + * @freq_compensation:         Frequency compensation
83141 + * @output_clock_divisor:              Output clock divisor
83142 + *
83143 + * This function initializes RTC and applies basic configuration.
83144 + */
83145 +void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms,
83146 +               int num_fipers, int num_ext_triggers, bool init_freq_comp,
83147 +               uint32_t freq_compensation, uint32_t output_clock_divisor);
83148 +
83149 +/**
83150 + * fman_rtc_set_alarm() - Set an alarm
83151 + * @regs:              Pointer to RTC register block
83152 + * @id:                        id of alarm
83153 + * @val:               value to write
83154 + * @enable:            should interrupt be enabled
83155 + */
83156 +void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable);
83157 +
83158 +/**
83159 + * fman_rtc_set_periodic_pulse() - Set an alarm
83160 + * @regs:              Pointer to RTC register block
83161 + * @id:                        id of fiper
83162 + * @val:               value to write
83163 + * @enable:            should interrupt be enabled
83164 + */
83165 +void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val,
83166 +       bool enable);
83167 +
83168 +/**
83169 + * fman_rtc_set_ext_trigger() - Set an external trigger
83170 + * @regs:              Pointer to RTC register block
83171 + * @id:                        id of trigger
83172 + * @enable:            should interrupt be enabled
83173 + * @use_pulse_as_input: use the pulse as input
83174 + */
83175 +void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable,
83176 +       bool use_pulse_as_input);
83177 +
83178 +struct fm_rtc_alarm_params {
83179 +       uint8_t alarm_id;               /**< 0 or 1 */
83180 +       uint64_t alarm_time;            /**< In nanoseconds, the time when the
83181 +                                       alarm should go off - must be a
83182 +                                       multiple of the RTC period */
83183 +       void (*f_alarm_callback)(void* app, uint8_t id); /**< This routine will
83184 +                                       be called when RTC reaches alarmTime */
83185 +       bool clear_on_expiration;       /**< TRUE to turn off the alarm once
83186 +                                       expired.*/
83187 +};
83188 +
83189 +struct fm_rtc_periodic_pulse_params {
83190 +       uint8_t periodic_pulse_id;      /**< 0 or 1 */
83191 +       uint64_t periodic_pulse_period; /**< In Nanoseconds. Must be a multiple
83192 +                                       of the RTC period */
83193 +       void (*f_periodic_pulse_callback)(void* app, uint8_t id); /**< This
83194 +                                       routine will be called every
83195 +                                       periodicPulsePeriod. */
83196 +};
83197 +
83198 +#endif /* __FSL_FMAN_RTC_H */
83199 --- /dev/null
83200 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_sp.h
83201 @@ -0,0 +1,138 @@
83202 +/*
83203 + * Copyright 2013 Freescale Semiconductor Inc.
83204 + *
83205 + * Redistribution and use in source and binary forms, with or without
83206 + * modification, are permitted provided that the following conditions are met:
83207 + *     * Redistributions of source code must retain the above copyright
83208 + *       notice, this list of conditions and the following disclaimer.
83209 + *     * Redistributions in binary form must reproduce the above copyright
83210 + *       notice, this list of conditions and the following disclaimer in the
83211 + *       documentation and/or other materials provided with the distribution.
83212 + *     * Neither the name of Freescale Semiconductor nor the
83213 + *       names of its contributors may be used to endorse or promote products
83214 + *       derived from this software without specific prior written permission.
83215 + *
83216 + *
83217 + * ALTERNATIVELY, this software may be distributed under the terms of the
83218 + * GNU General Public License ("GPL") as published by the Free Software
83219 + * Foundation, either version 2 of that License or (at your option) any
83220 + * later version.
83221 + *
83222 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
83223 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
83224 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
83225 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
83226 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
83227 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
83228 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
83229 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83230 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
83231 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83232 + */
83233 +
83234 +#ifndef __FSL_FMAN_SP_H
83235 +#define __FSL_FMAN_SP_H
83236 +
83237 +#include "common/general.h"
83238 +#include "fsl_fman.h"
83239 +
83240 +
83241 +struct fm_pcd_storage_profile_regs{
83242 +       uint32_t   fm_sp_ebmpi[8];
83243 +                                       /*offset 0 - 0xc*/
83244 +                                       /**< Buffer Manager pool Information */
83245 +
83246 +       uint32_t   fm_sp_acnt;      /*offset 0x20*/
83247 +       uint32_t   fm_sp_ebm;       /*offset 0x24*/
83248 +       uint32_t   fm_sp_da;        /*offset 0x28*/
83249 +       uint32_t   fm_sp_icp;       /*offset 0x2c*/
83250 +       uint32_t   fm_sp_mpd;       /*offset 0x30*/
83251 +       uint32_t   res1[2];         /*offset 0x34 - 0x38*/
83252 +       uint32_t   fm_sp_spliodn;   /*offset 0x3c*/
83253 +};
83254 +
83255 +/**************************************************************************//**
83256 + @Description   structure for defining internal context copying
83257 +*//***************************************************************************/
83258 +struct fman_sp_int_context_data_copy{
83259 +       uint16_t ext_buf_offset;     /**< Offset in External buffer to which
83260 +                                       internal context is copied to (Rx)
83261 +                                       or taken from (Tx, Op). */
83262 +       uint8_t int_context_offset; /**< Offset within internal context to copy
83263 +                                       from (Rx) or to copy to (Tx, Op).*/
83264 +       uint16_t size;             /**< Internal offset size to be copied */
83265 +};
83266 +
83267 +/**************************************************************************//**
83268 + @Description   struct for defining external buffer margins
83269 +*//***************************************************************************/
83270 +struct fman_sp_buf_margins{
83271 +       uint16_t start_margins; /**< Number of bytes to be left at the
83272 +                               beginning of the external buffer (must be
83273 +                               divisible by 16) */
83274 +       uint16_t end_margins;   /**< number of bytes to be left at the end of
83275 +                                the external buffer(must be divisible by 16)*/
83276 +};
83277 +
83278 +struct fm_storage_profile_params {
83279 +       struct fman_ext_pools                   fm_ext_pools;
83280 +       struct fman_backup_bm_pools             backup_pools;
83281 +       struct fman_sp_int_context_data_copy    *int_context;
83282 +       struct fman_sp_buf_margins              *buf_margins;
83283 +       enum fman_dma_swap_option               dma_swap_data;
83284 +       enum fman_dma_cache_option              int_context_cache_attr;
83285 +       enum fman_dma_cache_option              header_cache_attr;
83286 +       enum fman_dma_cache_option              scatter_gather_cache_attr;
83287 +       bool                                    dma_write_optimize;
83288 +       uint16_t                                liodn_offset;
83289 +       bool                                    no_scather_gather;
83290 +       struct fman_buf_pool_depletion        buf_pool_depletion;
83291 +};
83292 +
83293 +/**************************************************************************//**
83294 + @Description       Registers bit fields
83295 +*//***************************************************************************/
83296 +#define FMAN_SP_EXT_BUF_POOL_EN_COUNTER             0x40000000
83297 +#define FMAN_SP_EXT_BUF_POOL_VALID                  0x80000000
83298 +#define FMAN_SP_EXT_BUF_POOL_BACKUP                 0x20000000
83299 +#define FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE             0x00100000
83300 +#define FMAN_SP_SG_DISABLE                          0x80000000
83301 +
83302 +/* shifts */
83303 +#define FMAN_SP_EXT_BUF_POOL_ID_SHIFT               16
83304 +#define FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT         16
83305 +#define FMAN_SP_EXT_BUF_MARG_START_SHIFT            16
83306 +#define FMAN_SP_EXT_BUF_MARG_END_SHIFT              0
83307 +#define FMAN_SP_DMA_ATTR_SWP_SHIFT                  30
83308 +#define FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT             28
83309 +#define FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT            26
83310 +#define FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT             24
83311 +#define FMAN_SP_IC_TO_EXT_SHIFT                     16
83312 +#define FMAN_SP_IC_FROM_INT_SHIFT                   8
83313 +#define FMAN_SP_IC_SIZE_SHIFT                       0
83314 +
83315 +/**************************************************************************//**
83316 + @Description       defaults
83317 +*//***************************************************************************/
83318 +#define DEFAULT_FMAN_SP_DMA_SWAP_DATA                         FMAN_DMA_NO_SWP
83319 +#define DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR            FMAN_DMA_NO_STASH
83320 +#define DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR                 FMAN_DMA_NO_STASH
83321 +#define DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR         FMAN_DMA_NO_STASH
83322 +#define DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE                    TRUE
83323 +#define DEFAULT_FMAN_SP_NO_SCATTER_GATHER                     FALSE
83324 +
83325 +void fman_vsp_defconfig(struct fm_storage_profile_params *cfg);
83326 +
83327 +void fman_vsp_init(struct fm_pcd_storage_profile_regs   *regs,
83328 +       uint16_t index, struct fm_storage_profile_params *fm_vsp_params,
83329 +       int port_max_num_of_ext_pools, int bm_max_num_of_pools,
83330 +       int max_num_of_pfc_priorities);
83331 +
83332 +uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs,
83333 +                                       uint16_t index);
83334 +
83335 +void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,
83336 +                       uint16_t index, uint32_t value);
83337 +
83338 +
83339 +#endif /* __FSL_FMAN_SP_H */
83340 --- /dev/null
83341 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_tgec.h
83342 @@ -0,0 +1,479 @@
83343 +/*
83344 + * Copyright 2008-2012 Freescale Semiconductor Inc.
83345 + *
83346 + * Redistribution and use in source and binary forms, with or without
83347 + * modification, are permitted provided that the following conditions are met:
83348 + *     * Redistributions of source code must retain the above copyright
83349 + *       notice, this list of conditions and the following disclaimer.
83350 + *     * Redistributions in binary form must reproduce the above copyright
83351 + *       notice, this list of conditions and the following disclaimer in the
83352 + *       documentation and/or other materials provided with the distribution.
83353 + *     * Neither the name of Freescale Semiconductor nor the
83354 + *       names of its contributors may be used to endorse or promote products
83355 + *       derived from this software without specific prior written permission.
83356 + *
83357 + *
83358 + * ALTERNATIVELY, this software may be distributed under the terms of the
83359 + * GNU General Public License ("GPL") as published by the Free Software
83360 + * Foundation, either version 2 of that License or (at your option) any
83361 + * later version.
83362 + *
83363 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
83364 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
83365 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
83366 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
83367 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
83368 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
83369 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
83370 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83371 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
83372 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83373 + */
83374 +
83375 +#ifndef __FSL_FMAN_TGEC_H
83376 +#define __FSL_FMAN_TGEC_H
83377 +
83378 +#include "common/general.h"
83379 +#include "fsl_enet.h"
83380 +
83381 +
83382 +/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
83383 +#define TGEC_TX_IPG_LENGTH_MASK        0x000003ff
83384 +
83385 +enum tgec_counters {
83386 +       E_TGEC_COUNTER_R64,
83387 +       E_TGEC_COUNTER_R127,
83388 +       E_TGEC_COUNTER_R255,
83389 +       E_TGEC_COUNTER_R511,
83390 +       E_TGEC_COUNTER_R1023,
83391 +       E_TGEC_COUNTER_R1518,
83392 +       E_TGEC_COUNTER_R1519X,
83393 +       E_TGEC_COUNTER_TRFRG,
83394 +       E_TGEC_COUNTER_TRJBR,
83395 +       E_TGEC_COUNTER_RDRP,
83396 +       E_TGEC_COUNTER_RALN,
83397 +       E_TGEC_COUNTER_TRUND,
83398 +       E_TGEC_COUNTER_TROVR,
83399 +       E_TGEC_COUNTER_RXPF,
83400 +       E_TGEC_COUNTER_TXPF,
83401 +       E_TGEC_COUNTER_ROCT,
83402 +       E_TGEC_COUNTER_RMCA,
83403 +       E_TGEC_COUNTER_RBCA,
83404 +       E_TGEC_COUNTER_RPKT,
83405 +       E_TGEC_COUNTER_RUCA,
83406 +       E_TGEC_COUNTER_RERR,
83407 +       E_TGEC_COUNTER_TOCT,
83408 +       E_TGEC_COUNTER_TMCA,
83409 +       E_TGEC_COUNTER_TBCA,
83410 +       E_TGEC_COUNTER_TUCA,
83411 +       E_TGEC_COUNTER_TERR
83412 +};
83413 +
83414 +/* Command and Configuration Register (COMMAND_CONFIG) */
83415 +#define CMD_CFG_EN_TIMESTAMP   0x00100000
83416 +#define CMD_CFG_TX_ADDR_INS_SEL        0x00080000
83417 +#define CMD_CFG_NO_LEN_CHK     0x00020000
83418 +#define CMD_CFG_SEND_IDLE      0x00010000
83419 +#define CMD_CFG_RX_ER_DISC     0x00004000
83420 +#define CMD_CFG_CMD_FRM_EN     0x00002000
83421 +#define CMD_CFG_STAT_CLR       0x00001000
83422 +#define CMD_CFG_LOOPBACK_EN    0x00000400
83423 +#define CMD_CFG_TX_ADDR_INS    0x00000200
83424 +#define CMD_CFG_PAUSE_IGNORE   0x00000100
83425 +#define CMD_CFG_PAUSE_FWD      0x00000080
83426 +#define CMD_CFG_PROMIS_EN      0x00000010
83427 +#define CMD_CFG_WAN_MODE       0x00000008
83428 +#define CMD_CFG_RX_EN          0x00000002
83429 +#define CMD_CFG_TX_EN          0x00000001
83430 +
83431 +/* Interrupt Mask Register (IMASK) */
83432 +#define TGEC_IMASK_MDIO_SCAN_EVENT     0x00010000
83433 +#define TGEC_IMASK_MDIO_CMD_CMPL       0x00008000
83434 +#define TGEC_IMASK_REM_FAULT           0x00004000
83435 +#define TGEC_IMASK_LOC_FAULT           0x00002000
83436 +#define TGEC_IMASK_TX_ECC_ER           0x00001000
83437 +#define TGEC_IMASK_TX_FIFO_UNFL                0x00000800
83438 +#define TGEC_IMASK_TX_FIFO_OVFL                0x00000400
83439 +#define TGEC_IMASK_TX_ER                       0x00000200
83440 +#define TGEC_IMASK_RX_FIFO_OVFL                0x00000100
83441 +#define TGEC_IMASK_RX_ECC_ER           0x00000080
83442 +#define TGEC_IMASK_RX_JAB_FRM          0x00000040
83443 +#define TGEC_IMASK_RX_OVRSZ_FRM                0x00000020
83444 +#define TGEC_IMASK_RX_RUNT_FRM         0x00000010
83445 +#define TGEC_IMASK_RX_FRAG_FRM         0x00000008
83446 +#define TGEC_IMASK_RX_LEN_ER           0x00000004
83447 +#define TGEC_IMASK_RX_CRC_ER           0x00000002
83448 +#define TGEC_IMASK_RX_ALIGN_ER         0x00000001
83449 +
83450 +#define TGEC_EVENTS_MASK                                       \
83451 +       ((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT                  | \
83452 +                               TGEC_IMASK_MDIO_CMD_CMPL        | \
83453 +                               TGEC_IMASK_REM_FAULT            | \
83454 +                               TGEC_IMASK_LOC_FAULT            | \
83455 +                               TGEC_IMASK_TX_ECC_ER            | \
83456 +                               TGEC_IMASK_TX_FIFO_UNFL         | \
83457 +                               TGEC_IMASK_TX_FIFO_OVFL         | \
83458 +                               TGEC_IMASK_TX_ER                | \
83459 +                               TGEC_IMASK_RX_FIFO_OVFL         | \
83460 +                               TGEC_IMASK_RX_ECC_ER            | \
83461 +                               TGEC_IMASK_RX_JAB_FRM           | \
83462 +                               TGEC_IMASK_RX_OVRSZ_FRM         | \
83463 +                               TGEC_IMASK_RX_RUNT_FRM          | \
83464 +                               TGEC_IMASK_RX_FRAG_FRM          | \
83465 +                               TGEC_IMASK_RX_LEN_ER            | \
83466 +                               TGEC_IMASK_RX_CRC_ER            | \
83467 +                               TGEC_IMASK_RX_ALIGN_ER))
83468 +
83469 +/* Hashtable Control Register (HASHTABLE_CTRL) */
83470 +#define TGEC_HASH_MCAST_SHIFT  23
83471 +#define TGEC_HASH_MCAST_EN     0x00000200
83472 +#define TGEC_HASH_ADR_MSK      0x000001ff
83473 +
83474 +#define DEFAULT_WAN_MODE_ENABLE                FALSE
83475 +#define DEFAULT_PROMISCUOUS_MODE_ENABLE        FALSE
83476 +#define DEFAULT_PAUSE_FORWARD_ENABLE   FALSE
83477 +#define DEFAULT_PAUSE_IGNORE           FALSE
83478 +#define DEFAULT_TX_ADDR_INS_ENABLE     FALSE
83479 +#define DEFAULT_LOOPBACK_ENABLE                FALSE
83480 +#define DEFAULT_CMD_FRAME_ENABLE       FALSE
83481 +#define DEFAULT_RX_ERROR_DISCARD       FALSE
83482 +#define DEFAULT_SEND_IDLE_ENABLE       FALSE
83483 +#define DEFAULT_NO_LENGTH_CHECK_ENABLE TRUE
83484 +#define DEFAULT_LGTH_CHECK_NOSTDR      FALSE
83485 +#define DEFAULT_TIME_STAMP_ENABLE      FALSE
83486 +#define DEFAULT_TX_IPG_LENGTH          12
83487 +#define DEFAULT_MAX_FRAME_LENGTH       0x600
83488 +#define DEFAULT_PAUSE_QUANT            0xf000
83489 +
83490 +/*
83491 + * 10G memory map
83492 + */
83493 +struct tgec_regs {
83494 +       uint32_t tgec_id;               /* 0x000 Controller ID */
83495 +       uint32_t reserved001[1];        /* 0x004 */
83496 +       uint32_t command_config;        /* 0x008 Control and configuration */
83497 +       uint32_t mac_addr_0;            /* 0x00c Lower 32 bits of the MAC adr */
83498 +       uint32_t mac_addr_1;            /* 0x010 Upper 16 bits of the MAC adr */
83499 +       uint32_t maxfrm;                /* 0x014 Maximum frame length */
83500 +       uint32_t pause_quant;           /* 0x018 Pause quanta */
83501 +       uint32_t rx_fifo_sections;      /* 0x01c  */
83502 +       uint32_t tx_fifo_sections;      /* 0x020  */
83503 +       uint32_t rx_fifo_almost_f_e;    /* 0x024  */
83504 +       uint32_t tx_fifo_almost_f_e;    /* 0x028  */
83505 +       uint32_t hashtable_ctrl;        /* 0x02c Hash table control*/
83506 +       uint32_t mdio_cfg_status;       /* 0x030  */
83507 +       uint32_t mdio_command;          /* 0x034  */
83508 +       uint32_t mdio_data;             /* 0x038  */
83509 +       uint32_t mdio_regaddr;          /* 0x03c  */
83510 +       uint32_t status;                /* 0x040  */
83511 +       uint32_t tx_ipg_len;            /* 0x044 Transmitter inter-packet-gap */
83512 +       uint32_t mac_addr_2;            /* 0x048 Lower 32 bits of 2nd MAC adr */
83513 +       uint32_t mac_addr_3;            /* 0x04c Upper 16 bits of 2nd MAC adr */
83514 +       uint32_t rx_fifo_ptr_rd;        /* 0x050  */
83515 +       uint32_t rx_fifo_ptr_wr;        /* 0x054  */
83516 +       uint32_t tx_fifo_ptr_rd;        /* 0x058  */
83517 +       uint32_t tx_fifo_ptr_wr;        /* 0x05c  */
83518 +       uint32_t imask;                 /* 0x060 Interrupt mask */
83519 +       uint32_t ievent;                /* 0x064 Interrupt event */
83520 +       uint32_t udp_port;              /* 0x068 Defines a UDP Port number */
83521 +       uint32_t type_1588v2;           /* 0x06c Type field for 1588v2 */
83522 +       uint32_t reserved070[4];        /* 0x070 */
83523 +       /*10Ge Statistics Counter */
83524 +       uint32_t tfrm_u;                /* 80 aFramesTransmittedOK */
83525 +       uint32_t tfrm_l;                /* 84 aFramesTransmittedOK */
83526 +       uint32_t rfrm_u;                /* 88 aFramesReceivedOK */
83527 +       uint32_t rfrm_l;                /* 8c aFramesReceivedOK */
83528 +       uint32_t rfcs_u;                /* 90 aFrameCheckSequenceErrors */
83529 +       uint32_t rfcs_l;                /* 94 aFrameCheckSequenceErrors */
83530 +       uint32_t raln_u;                /* 98 aAlignmentErrors */
83531 +       uint32_t raln_l;                /* 9c aAlignmentErrors */
83532 +       uint32_t txpf_u;                /* A0 aPAUSEMACCtrlFramesTransmitted */
83533 +       uint32_t txpf_l;                /* A4 aPAUSEMACCtrlFramesTransmitted */
83534 +       uint32_t rxpf_u;                /* A8 aPAUSEMACCtrlFramesReceived */
83535 +       uint32_t rxpf_l;                /* Ac aPAUSEMACCtrlFramesReceived */
83536 +       uint32_t rlong_u;               /* B0 aFrameTooLongErrors */
83537 +       uint32_t rlong_l;               /* B4 aFrameTooLongErrors */
83538 +       uint32_t rflr_u;                /* B8 aInRangeLengthErrors */
83539 +       uint32_t rflr_l;                /* Bc aInRangeLengthErrors */
83540 +       uint32_t tvlan_u;               /* C0 VLANTransmittedOK */
83541 +       uint32_t tvlan_l;               /* C4 VLANTransmittedOK */
83542 +       uint32_t rvlan_u;               /* C8 VLANReceivedOK */
83543 +       uint32_t rvlan_l;               /* Cc VLANReceivedOK */
83544 +       uint32_t toct_u;                /* D0 ifOutOctets */
83545 +       uint32_t toct_l;                /* D4 ifOutOctets */
83546 +       uint32_t roct_u;                /* D8 ifInOctets */
83547 +       uint32_t roct_l;                /* Dc ifInOctets */
83548 +       uint32_t ruca_u;                /* E0 ifInUcastPkts */
83549 +       uint32_t ruca_l;                /* E4 ifInUcastPkts */
83550 +       uint32_t rmca_u;                /* E8 ifInMulticastPkts */
83551 +       uint32_t rmca_l;                /* Ec ifInMulticastPkts */
83552 +       uint32_t rbca_u;                /* F0 ifInBroadcastPkts */
83553 +       uint32_t rbca_l;                /* F4 ifInBroadcastPkts */
83554 +       uint32_t terr_u;                /* F8 ifOutErrors */
83555 +       uint32_t terr_l;                /* Fc ifOutErrors */
83556 +       uint32_t reserved100[2];        /* 100-108*/
83557 +       uint32_t tuca_u;                /* 108 ifOutUcastPkts */
83558 +       uint32_t tuca_l;                /* 10c ifOutUcastPkts */
83559 +       uint32_t tmca_u;                /* 110 ifOutMulticastPkts */
83560 +       uint32_t tmca_l;                /* 114 ifOutMulticastPkts */
83561 +       uint32_t tbca_u;                /* 118 ifOutBroadcastPkts */
83562 +       uint32_t tbca_l;                /* 11c ifOutBroadcastPkts */
83563 +       uint32_t rdrp_u;                /* 120 etherStatsDropEvents */
83564 +       uint32_t rdrp_l;                /* 124 etherStatsDropEvents */
83565 +       uint32_t reoct_u;               /* 128 etherStatsOctets */
83566 +       uint32_t reoct_l;               /* 12c etherStatsOctets */
83567 +       uint32_t rpkt_u;                /* 130 etherStatsPkts */
83568 +       uint32_t rpkt_l;                /* 134 etherStatsPkts */
83569 +       uint32_t trund_u;               /* 138 etherStatsUndersizePkts */
83570 +       uint32_t trund_l;               /* 13c etherStatsUndersizePkts */
83571 +       uint32_t r64_u;                 /* 140 etherStatsPkts64Octets */
83572 +       uint32_t r64_l;                 /* 144 etherStatsPkts64Octets */
83573 +       uint32_t r127_u;                /* 148 etherStatsPkts65to127Octets */
83574 +       uint32_t r127_l;                /* 14c etherStatsPkts65to127Octets */
83575 +       uint32_t r255_u;                /* 150 etherStatsPkts128to255Octets */
83576 +       uint32_t r255_l;                /* 154 etherStatsPkts128to255Octets */
83577 +       uint32_t r511_u;                /* 158 etherStatsPkts256to511Octets */
83578 +       uint32_t r511_l;                /* 15c etherStatsPkts256to511Octets */
83579 +       uint32_t r1023_u;               /* 160 etherStatsPkts512to1023Octets */
83580 +       uint32_t r1023_l;               /* 164 etherStatsPkts512to1023Octets */
83581 +       uint32_t r1518_u;               /* 168 etherStatsPkts1024to1518Octets */
83582 +       uint32_t r1518_l;               /* 16c etherStatsPkts1024to1518Octets */
83583 +       uint32_t r1519x_u;              /* 170 etherStatsPkts1519toX */
83584 +       uint32_t r1519x_l;              /* 174 etherStatsPkts1519toX */
83585 +       uint32_t trovr_u;               /* 178 etherStatsOversizePkts */
83586 +       uint32_t trovr_l;               /* 17c etherStatsOversizePkts */
83587 +       uint32_t trjbr_u;               /* 180 etherStatsJabbers */
83588 +       uint32_t trjbr_l;               /* 184 etherStatsJabbers */
83589 +       uint32_t trfrg_u;               /* 188 etherStatsFragments */
83590 +       uint32_t trfrg_l;               /* 18C etherStatsFragments */
83591 +       uint32_t rerr_u;                /* 190 ifInErrors */
83592 +       uint32_t rerr_l;                /* 194 ifInErrors */
83593 +};
83594 +
83595 +/**
83596 + * struct tgec_cfg - TGEC configuration
83597 + *
83598 + * @rx_error_discard:    Receive Erroneous Frame Discard Enable. When set to 1
83599 + *            any frame received with an error is discarded in the
83600 + *            Core and not forwarded to the Client interface.
83601 + *            When set to 0 (Reset value), erroneous Frames are
83602 + *            forwarded to the Client interface with ff_rx_err
83603 + *            asserted.
83604 + * @pause_ignore:    Ignore Pause Frame Quanta. If set to 1 received pause
83605 + *            frames are ignored by the MAC. When set to 0
83606 + *            (Reset value) the transmit process is stopped for the
83607 + *            amount of time specified in the pause quanta received
83608 + *            within a pause frame.
83609 + * @pause_forward_enable:
83610 + *            Terminate / Forward Pause Frames. If set to 1 pause
83611 + *            frames are forwarded to the user application. When set
83612 + *            to 0 (Reset value) pause frames are terminated and
83613 + *            discarded within the MAC.
83614 + * @no_length_check_enable:
83615 + *            Payload Length Check Disable. When set to 0
83616 + *            (Reset value), the Core checks the frame's payload
83617 + *            length with the Frame Length/Type field, when set to 1
83618 + *            the payload length check is disabled.
83619 + * @cmd_frame_enable:    Enables reception of all command frames. When set to 1
83620 + *            all Command Frames are accepted, when set to 0
83621 + *            (Reset Value) only Pause Frames are accepted and all
83622 + *            other Command Frames are rejected.
83623 + * @send_idle_enable:    Force Idle Generation. When set to 1, the MAC
83624 + *            permanently sends XGMII Idle sequences even when faults
83625 + *            are received.
83626 + * @wan_mode_enable:    WAN Mode Enable. Sets WAN mode (1) or LAN mode
83627 + *            (0, default) of operation.
83628 + * @promiscuous_mode_enable:
83629 + *            Enables MAC promiscuous operation. When set to 1, all
83630 + *            frames are received without any MAC address filtering,
83631 + *            when set to 0 (Reset value) Unicast Frames with a
83632 + *            destination address not matching the Core MAC Address
83633 + *            (MAC Address programmed in Registers MAC_ADDR_0 and
83634 + *            MAC_ADDR_1 or the MAC address programmed in Registers
83635 + *            MAC_ADDR_2 and MAC_ADDR_3) are rejected.
83636 + * @tx_addr_ins_enable:    Set Source MAC Address on Transmit. If set to 1 the
83637 + *            MAC overwrites the source MAC address received from the
83638 + *            Client Interface with one of the MAC addresses. If set
83639 + *            to 0 (Reset value), the source MAC address from the
83640 + *            Client Interface is transmitted unmodified to the line.
83641 + * @loopback_enable:    PHY Interface Loopback. When set to 1, the signal
83642 + *            loop_ena is set to '1', when set to 0 (Reset value)
83643 + *            the signal loop_ena is set to 0.
83644 + * @lgth_check_nostdr:    The Core interprets the Length/Type field differently
83645 + *            depending on the value of this Bit
83646 + * @time_stamp_enable:    This bit selects between enabling and disabling the
83647 + *            IEEE 1588 functionality. 1: IEEE 1588 is enabled
83648 + *            0: IEEE 1588 is disabled
83649 + * @max_frame_length:    Maximum supported received frame length.
83650 + *            The 10GEC MAC supports reception of any frame size up
83651 + *            to 16,352 bytes (0x3FE0). Typical settings are
83652 + *            0x05EE (1,518 bytes) for standard frames.
83653 + *            Default setting is 0x0600 (1,536 bytes).
83654 + *            Received frames that exceed this stated maximum
83655 + *            are truncated.
83656 + * @pause_quant:    Pause quanta value used with transmitted pause frames.
83657 + *            Each quanta represents a 512 bit-times.
83658 + * @tx_ipg_length:    Transmit Inter-Packet-Gap (IPG) value. A 6-bit value:
83659 + *            Depending on LAN or WAN mode of operation the value has
83660 + *            the following meaning: - LAN Mode: Number of octets in
83661 + *            steps of 4. Valid values are 8, 12, 16, ... 100. DIC is
83662 + *            fully supported (see 10.6.1 page 49) for any setting. A
83663 + *            default of 12 (reset value) must be set to conform to
83664 + *            IEEE802.3ae. Warning: When set to 8, PCS layers may not
83665 + *            be able to perform clock rate compensation. - WAN Mode:
83666 + *            Stretch factor. Valid values are 4..15. The stretch
83667 + *            factor is calculated as (value+1)*8. A default of 12
83668 + *            (reset value) must be set to conform to IEEE 802.3ae
83669 + *            (i.e. 13*8=104). A larger value shrinks the IPG
83670 + *            (increasing bandwidth).
83671 + *
83672 + * This structure contains basic TGEC configuration and must be passed to
83673 + * fman_tgec_init() function.  A default set of configuration values can be
83674 + * obtained by calling fman_tgec_defconfig().
83675 + */
83676 +struct tgec_cfg {
83677 +       bool            rx_error_discard;
83678 +       bool            pause_ignore;
83679 +       bool            pause_forward_enable;
83680 +       bool            no_length_check_enable;
83681 +       bool            cmd_frame_enable;
83682 +       bool            send_idle_enable;
83683 +       bool            wan_mode_enable;
83684 +       bool            promiscuous_mode_enable;
83685 +       bool            tx_addr_ins_enable;
83686 +       bool            loopback_enable;
83687 +       bool            lgth_check_nostdr;
83688 +       bool            time_stamp_enable;
83689 +       uint16_t        max_frame_length;
83690 +       uint16_t        pause_quant;
83691 +       uint32_t        tx_ipg_length;
83692 +       bool            skip_fman11_workaround;
83693 +};
83694 +
83695 +
83696 +void fman_tgec_defconfig(struct tgec_cfg *cfg);
83697 +
83698 +/**
83699 + * fman_tgec_init() - Init tgec hardware block
83700 + * @regs:        Pointer to tgec register block
83701 + * @cfg:        tgec configuration data
83702 + * @exceptions_mask:    initial exceptions mask
83703 + *
83704 + * This function initializes the tgec controller and applies its
83705 + * basic configuration.
83706 + *
83707 + * Returns: 0 if successful, an error code otherwise.
83708 + */
83709 +
83710 +int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,
83711 +       uint32_t exception_mask);
83712 +
83713 +void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
83714 +
83715 +void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
83716 +
83717 +uint32_t fman_tgec_get_revision(struct tgec_regs *regs);
83718 +
83719 +void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *macaddr);
83720 +
83721 +void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val);
83722 +
83723 +/**
83724 + * fman_tgec_reset_stat() - Completely resets all TGEC HW counters
83725 + * @regs:    Pointer to TGEC register block
83726 + */
83727 +void fman_tgec_reset_stat(struct tgec_regs *regs);
83728 +
83729 +/**
83730 + * fman_tgec_get_counter() - Reads TGEC HW counters
83731 + * @regs:    Pointer to TGEC register block
83732 + * @reg_name:    Counter name according to the appropriate enum
83733 + *
83734 + * Returns:    Required counter value
83735 + */
83736 +uint64_t fman_tgec_get_counter(struct tgec_regs *regs,
83737 +       enum tgec_counters reg_name);
83738 +
83739 +/**
83740 + * fman_tgec_set_hash_table() - Sets the Hashtable Control Register
83741 + * @regs:    Pointer to TGEC register block
83742 + * @value:    Value to be written in Hashtable Control Register
83743 + */
83744 +void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value);
83745 +
83746 +/**
83747 + * fman_tgec_set_tx_pause_frames() - Sets the Pause Quanta Register
83748 + * @regs:    Pointer to TGEC register block
83749 + * @pause_time:    Pause quanta value used with transmitted pause frames.
83750 + *        Each quanta represents a 512 bit-times
83751 + */
83752 +void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time);
83753 +
83754 +/**
83755 + * fman_tgec_set_rx_ignore_pause_frames() - Changes the policy WRT pause frames
83756 + * @regs:    Pointer to TGEC register block
83757 + * @en:        Ignore/Respond to pause frame quanta
83758 + *
83759 + * Sets the value of PAUSE_IGNORE field in the COMMAND_CONFIG Register
83760 + * 0 - MAC stops transmit process for the duration specified
83761 + * in the Pause frame quanta of a received Pause frame.
83762 + * 1 - MAC ignores received Pause frames.
83763 + */
83764 +void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en);
83765 +
83766 +/**
83767 + * fman_tgec_enable_1588_time_stamp() - change timestamp functionality
83768 + * @regs:    Pointer to TGEC register block
83769 + * @en:        enable/disable timestamp functionality
83770 + *
83771 + * Sets the value of EN_TIMESTAMP field in the COMMAND_CONFIG Register
83772 + * IEEE 1588 timestamp functionality control:
83773 + * 0 disabled, 1 enabled
83774 + */
83775 +
83776 +void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en);
83777 +
83778 +uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask);
83779 +
83780 +void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask);
83781 +
83782 +uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs);
83783 +
83784 +/**
83785 + * fman_tgec_add_addr_in_paddr() - Sets additional exact match MAC address
83786 + * @regs:    Pointer to TGEC register block
83787 + * @addr_ptr:    Pointer to 6-byte array containing the MAC address
83788 + *
83789 + * Sets the additional station MAC address
83790 + */
83791 +void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *addr_ptr);
83792 +
83793 +void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs);
83794 +
83795 +void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
83796 +
83797 +void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
83798 +
83799 +void fman_tgec_reset_filter_table(struct tgec_regs *regs);
83800 +
83801 +void fman_tgec_set_hash_table_entry(struct tgec_regs *regs, uint32_t crc);
83802 +
83803 +
83804 +/**
83805 + * fman_tgec_get_max_frame_len() - Returns the maximum frame length value
83806 + * @regs:    Pointer to TGEC register block
83807 + */
83808 +uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs);
83809 +
83810 +/**
83811 + * fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007() - Initialize the
83812 + * main tgec configuration parameters
83813 + * @regs:    Pointer to TGEC register block
83814 + *
83815 + * TODO
83816 + */
83817 +void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs
83818 +       *regs);
83819 +
83820 +
83821 +#endif /* __FSL_FMAN_TGEC_H */
83822 --- /dev/null
83823 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/dpaa_integration_ext.h
83824 @@ -0,0 +1,291 @@
83825 +/*
83826 + * Copyright 2012 Freescale Semiconductor Inc.
83827 + *
83828 + * Redistribution and use in source and binary forms, with or without
83829 + * modification, are permitted provided that the following conditions are met:
83830 + *     * Redistributions of source code must retain the above copyright
83831 + *       notice, this list of conditions and the following disclaimer.
83832 + *     * Redistributions in binary form must reproduce the above copyright
83833 + *       notice, this list of conditions and the following disclaimer in the
83834 + *       documentation and/or other materials provided with the distribution.
83835 + *     * Neither the name of Freescale Semiconductor nor the
83836 + *       names of its contributors may be used to endorse or promote products
83837 + *       derived from this software without specific prior written permission.
83838 + *
83839 + *
83840 + * ALTERNATIVELY, this software may be distributed under the terms of the
83841 + * GNU General Public License ("GPL") as published by the Free Software
83842 + * Foundation, either version 2 of that License or (at your option) any
83843 + * later version.
83844 + *
83845 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
83846 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
83847 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
83848 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
83849 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
83850 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
83851 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
83852 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83853 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
83854 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83855 + */
83856 +
83857 +/**
83858 +
83859 + @File          dpaa_integration_ext.h
83860 +
83861 + @Description   T4240 FM external definitions and structures.
83862 +*//***************************************************************************/
83863 +#ifndef __DPAA_INTEGRATION_EXT_H
83864 +#define __DPAA_INTEGRATION_EXT_H
83865 +
83866 +#include "std_ext.h"
83867 +
83868 +
83869 +#define DPAA_VERSION    11
83870 +
83871 +/**************************************************************************//**
83872 + @Description   DPAA SW Portals Enumeration.
83873 +*//***************************************************************************/
83874 +typedef enum
83875 +{
83876 +    e_DPAA_SWPORTAL0 = 0,
83877 +    e_DPAA_SWPORTAL1,
83878 +    e_DPAA_SWPORTAL2,
83879 +    e_DPAA_SWPORTAL3,
83880 +    e_DPAA_SWPORTAL4,
83881 +    e_DPAA_SWPORTAL5,
83882 +    e_DPAA_SWPORTAL6,
83883 +    e_DPAA_SWPORTAL7,
83884 +    e_DPAA_SWPORTAL8,
83885 +    e_DPAA_SWPORTAL9,
83886 +    e_DPAA_SWPORTAL10,
83887 +    e_DPAA_SWPORTAL11,
83888 +    e_DPAA_SWPORTAL12,
83889 +    e_DPAA_SWPORTAL13,
83890 +    e_DPAA_SWPORTAL14,
83891 +    e_DPAA_SWPORTAL15,
83892 +    e_DPAA_SWPORTAL16,
83893 +    e_DPAA_SWPORTAL17,
83894 +    e_DPAA_SWPORTAL18,
83895 +    e_DPAA_SWPORTAL19,
83896 +    e_DPAA_SWPORTAL20,
83897 +    e_DPAA_SWPORTAL21,
83898 +    e_DPAA_SWPORTAL22,
83899 +    e_DPAA_SWPORTAL23,
83900 +    e_DPAA_SWPORTAL24,
83901 +    e_DPAA_SWPORTAL_DUMMY_LAST
83902 +} e_DpaaSwPortal;
83903 +
83904 +/**************************************************************************//**
83905 + @Description   DPAA Direct Connect Portals Enumeration.
83906 +*//***************************************************************************/
83907 +typedef enum
83908 +{
83909 +    e_DPAA_DCPORTAL0 = 0,
83910 +    e_DPAA_DCPORTAL1,
83911 +    e_DPAA_DCPORTAL2,
83912 +    e_DPAA_DCPORTAL_DUMMY_LAST
83913 +} e_DpaaDcPortal;
83914 +
83915 +#define DPAA_MAX_NUM_OF_SW_PORTALS      e_DPAA_SWPORTAL_DUMMY_LAST
83916 +#define DPAA_MAX_NUM_OF_DC_PORTALS      e_DPAA_DCPORTAL_DUMMY_LAST
83917 +
83918 +/*****************************************************************************
83919 + QMan INTEGRATION-SPECIFIC DEFINITIONS
83920 +******************************************************************************/
83921 +#define QM_MAX_NUM_OF_POOL_CHANNELS     15      /**< Total number of channels, dedicated and pool */
83922 +#define QM_MAX_NUM_OF_WQ                8       /**< Number of work queues per channel */
83923 +#define QM_MAX_NUM_OF_CGS               256     /**< Congestion groups number */
83924 +#define QM_MAX_NUM_OF_FQIDS             (16 * MEGABYTE)
83925 +                                                /**< FQIDs range - 24 bits */
83926 +
83927 +/**************************************************************************//**
83928 + @Description   Work Queue Channel assignments in QMan.
83929 +*//***************************************************************************/
83930 +typedef enum
83931 +{
83932 +    e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0,              /**< Dedicated channels serviced by software portals 0 to 24 */
83933 +    e_QM_FQ_CHANNEL_SWPORTAL1,
83934 +    e_QM_FQ_CHANNEL_SWPORTAL2,
83935 +    e_QM_FQ_CHANNEL_SWPORTAL3,
83936 +    e_QM_FQ_CHANNEL_SWPORTAL4,
83937 +    e_QM_FQ_CHANNEL_SWPORTAL5,
83938 +    e_QM_FQ_CHANNEL_SWPORTAL6,
83939 +    e_QM_FQ_CHANNEL_SWPORTAL7,
83940 +    e_QM_FQ_CHANNEL_SWPORTAL8,
83941 +    e_QM_FQ_CHANNEL_SWPORTAL9,
83942 +    e_QM_FQ_CHANNEL_SWPORTAL10,
83943 +    e_QM_FQ_CHANNEL_SWPORTAL11,
83944 +    e_QM_FQ_CHANNEL_SWPORTAL12,
83945 +    e_QM_FQ_CHANNEL_SWPORTAL13,
83946 +    e_QM_FQ_CHANNEL_SWPORTAL14,
83947 +    e_QM_FQ_CHANNEL_SWPORTAL15,
83948 +    e_QM_FQ_CHANNEL_SWPORTAL16,
83949 +    e_QM_FQ_CHANNEL_SWPORTAL17,
83950 +    e_QM_FQ_CHANNEL_SWPORTAL18,
83951 +    e_QM_FQ_CHANNEL_SWPORTAL19,
83952 +    e_QM_FQ_CHANNEL_SWPORTAL20,
83953 +    e_QM_FQ_CHANNEL_SWPORTAL21,
83954 +    e_QM_FQ_CHANNEL_SWPORTAL22,
83955 +    e_QM_FQ_CHANNEL_SWPORTAL23,
83956 +    e_QM_FQ_CHANNEL_SWPORTAL24,
83957 +
83958 +    e_QM_FQ_CHANNEL_POOL1 = 0x401,               /**< Pool channels that can be serviced by any of the software portals */
83959 +    e_QM_FQ_CHANNEL_POOL2,
83960 +    e_QM_FQ_CHANNEL_POOL3,
83961 +    e_QM_FQ_CHANNEL_POOL4,
83962 +    e_QM_FQ_CHANNEL_POOL5,
83963 +    e_QM_FQ_CHANNEL_POOL6,
83964 +    e_QM_FQ_CHANNEL_POOL7,
83965 +    e_QM_FQ_CHANNEL_POOL8,
83966 +    e_QM_FQ_CHANNEL_POOL9,
83967 +    e_QM_FQ_CHANNEL_POOL10,
83968 +    e_QM_FQ_CHANNEL_POOL11,
83969 +    e_QM_FQ_CHANNEL_POOL12,
83970 +    e_QM_FQ_CHANNEL_POOL13,
83971 +    e_QM_FQ_CHANNEL_POOL14,
83972 +    e_QM_FQ_CHANNEL_POOL15,
83973 +
83974 +    e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800,           /**< Dedicated channels serviced by Direct Connect Portal 0:
83975 +                                                      connected to FMan 0; assigned in incrementing order to
83976 +                                                      each sub-portal (SP) in the portal */
83977 +    e_QM_FQ_CHANNEL_FMAN0_SP1,
83978 +    e_QM_FQ_CHANNEL_FMAN0_SP2,
83979 +    e_QM_FQ_CHANNEL_FMAN0_SP3,
83980 +    e_QM_FQ_CHANNEL_FMAN0_SP4,
83981 +    e_QM_FQ_CHANNEL_FMAN0_SP5,
83982 +    e_QM_FQ_CHANNEL_FMAN0_SP6,
83983 +    e_QM_FQ_CHANNEL_FMAN0_SP7,
83984 +    e_QM_FQ_CHANNEL_FMAN0_SP8,
83985 +    e_QM_FQ_CHANNEL_FMAN0_SP9,
83986 +    e_QM_FQ_CHANNEL_FMAN0_SP10,
83987 +    e_QM_FQ_CHANNEL_FMAN0_SP11,
83988 +    e_QM_FQ_CHANNEL_FMAN0_SP12,
83989 +    e_QM_FQ_CHANNEL_FMAN0_SP13,
83990 +    e_QM_FQ_CHANNEL_FMAN0_SP14,
83991 +    e_QM_FQ_CHANNEL_FMAN0_SP15,
83992 +
83993 +    e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820,            /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */
83994 +    e_QM_FQ_CHANNEL_RMAN_SP1,
83995 +
83996 +    e_QM_FQ_CHANNEL_CAAM = 0x840                 /**< Dedicated channel serviced by Direct Connect Portal 2:
83997 +                                                      connected to SEC */
83998 +} e_QmFQChannel;
83999 +
84000 +/*****************************************************************************
84001 + BMan INTEGRATION-SPECIFIC DEFINITIONS
84002 +******************************************************************************/
84003 +#define BM_MAX_NUM_OF_POOLS         64          /**< Number of buffers pools */
84004 +
84005 +/*****************************************************************************
84006 + SEC INTEGRATION-SPECIFIC DEFINITIONS
84007 +******************************************************************************/
84008 +#define SEC_NUM_OF_DECOS            3
84009 +#define SEC_ALL_DECOS_MASK          0x00000003
84010 +
84011 +
84012 +/*****************************************************************************
84013 + FM INTEGRATION-SPECIFIC DEFINITIONS
84014 +******************************************************************************/
84015 +#define INTG_MAX_NUM_OF_FM          2
84016 +/* Ports defines */
84017 +#define FM_MAX_NUM_OF_1G_MACS       6
84018 +#define FM_MAX_NUM_OF_10G_MACS      2
84019 +#define FM_MAX_NUM_OF_MACS          (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
84020 +#define FM_MAX_NUM_OF_OH_PORTS      6
84021 +
84022 +#define FM_MAX_NUM_OF_1G_RX_PORTS   FM_MAX_NUM_OF_1G_MACS
84023 +#define FM_MAX_NUM_OF_10G_RX_PORTS  FM_MAX_NUM_OF_10G_MACS
84024 +#define FM_MAX_NUM_OF_RX_PORTS      (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
84025 +
84026 +#define FM_MAX_NUM_OF_1G_TX_PORTS   FM_MAX_NUM_OF_1G_MACS
84027 +#define FM_MAX_NUM_OF_10G_TX_PORTS  FM_MAX_NUM_OF_10G_MACS
84028 +#define FM_MAX_NUM_OF_TX_PORTS      (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
84029 +
84030 +#define FM_PORT_MAX_NUM_OF_EXT_POOLS            4           /**< Number of external BM pools per Rx port */
84031 +#define FM_PORT_NUM_OF_CONGESTION_GRPS          256         /**< Total number of congestion groups in QM */
84032 +#define FM_MAX_NUM_OF_SUB_PORTALS               16
84033 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS   0
84034 +
84035 +#define FM_VSP_MAX_NUM_OF_ENTRIES               64
84036 +#define FM_MAX_NUM_OF_PFC_PRIORITIES            8
84037 +
84038 +/* RAMs defines */
84039 +#define FM_MURAM_SIZE                   (384 * KILOBYTE)
84040 +#define FM_IRAM_SIZE(major, minor)      (64 * KILOBYTE)
84041 +#define FM_NUM_OF_CTRL                  4
84042 +
84043 +/* PCD defines */
84044 +#define FM_PCD_PLCR_NUM_ENTRIES         256                 /**< Total number of policer profiles */
84045 +#define FM_PCD_KG_NUM_OF_SCHEMES        32                  /**< Total number of KG schemes */
84046 +#define FM_PCD_MAX_NUM_OF_CLS_PLANS     256                 /**< Number of classification plan entries. */
84047 +#define FM_PCD_PRS_SW_PATCHES_SIZE      0x00000600          /**< Number of bytes saved for patches */
84048 +#define FM_PCD_SW_PRS_SIZE              0x00000800          /**< Total size of SW parser area */
84049 +
84050 +/* RTC defines */
84051 +#define FM_RTC_NUM_OF_ALARMS            2                   /**< RTC number of alarms */
84052 +#define FM_RTC_NUM_OF_PERIODIC_PULSES   3                   /**< RTC number of periodic pulses */
84053 +#define FM_RTC_NUM_OF_EXT_TRIGGERS      2                   /**< RTC number of external triggers */
84054 +
84055 +/* QMI defines */
84056 +#define QMI_MAX_NUM_OF_TNUMS            64
84057 +#define QMI_DEF_TNUMS_THRESH            32
84058 +/* FPM defines */
84059 +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS  4
84060 +
84061 +/* DMA defines */
84062 +#define DMA_THRESH_MAX_COMMQ            83
84063 +#define DMA_THRESH_MAX_BUF              127
84064 +
84065 +/* BMI defines */
84066 +#define BMI_MAX_NUM_OF_TASKS            128
84067 +#define BMI_MAX_NUM_OF_DMAS             84
84068 +
84069 +#define BMI_MAX_FIFO_SIZE               (FM_MURAM_SIZE)
84070 +#define PORT_MAX_WEIGHT                 16
84071 +
84072 +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx)   TRUE
84073 +
84074 +/* Unique T4240 */
84075 +#define FM_OP_OPEN_DMA_MIN_LIMIT
84076 +#define FM_NO_RESTRICT_ON_ACCESS_RSRC
84077 +#define FM_NO_OP_OBSERVED_POOLS
84078 +#define FM_FRAME_END_PARAMS_FOR_OP
84079 +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
84080 +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION
84081 +
84082 +#define FM_NO_GUARANTEED_RESET_VALUES
84083 +
84084 +/* FM errata */
84085 +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
84086 +#define FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127
84087 +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
84088 +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
84089 +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
84090 +#define FM_HANG_AT_RESET_MAC_CLK_DISABLED_ERRATA_FMAN_A007273
84091 +
84092 +#define FM_BCB_ERRATA_BMI_SW001
84093 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
84094 +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */
84095 +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */
84096 +
84097 +/*****************************************************************************
84098 + RMan INTEGRATION-SPECIFIC DEFINITIONS
84099 +******************************************************************************/
84100 +#define RM_MAX_NUM_OF_IB        4           /**< Number of inbound blocks */
84101 +#define RM_NUM_OF_IBCU          8           /**< NUmber of classification units in an inbound block */
84102 +
84103 +/* RMan erratas */
84104 +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756
84105 +
84106 +/*****************************************************************************
84107 + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
84108 +******************************************************************************/
84109 +#define NUM_OF_RX_SC                16
84110 +#define NUM_OF_TX_SC                16
84111 +
84112 +#define NUM_OF_SA_PER_RX_SC         2
84113 +#define NUM_OF_SA_PER_TX_SC         2
84114 +
84115 +#endif /* __DPAA_INTEGRATION_EXT_H */
84116 --- /dev/null
84117 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_ext.h
84118 @@ -0,0 +1,71 @@
84119 +/*
84120 + * Copyright 2012 Freescale Semiconductor Inc.
84121 + *
84122 + * Redistribution and use in source and binary forms, with or without
84123 + * modification, are permitted provided that the following conditions are met:
84124 + *     * Redistributions of source code must retain the above copyright
84125 + *       notice, this list of conditions and the following disclaimer.
84126 + *     * Redistributions in binary form must reproduce the above copyright
84127 + *       notice, this list of conditions and the following disclaimer in the
84128 + *       documentation and/or other materials provided with the distribution.
84129 + *     * Neither the name of Freescale Semiconductor nor the
84130 + *       names of its contributors may be used to endorse or promote products
84131 + *       derived from this software without specific prior written permission.
84132 + *
84133 + *
84134 + * ALTERNATIVELY, this software may be distributed under the terms of the
84135 + * GNU General Public License ("GPL") as published by the Free Software
84136 + * Foundation, either version 2 of that License or (at your option) any
84137 + * later version.
84138 + *
84139 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
84140 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
84141 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
84142 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
84143 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
84144 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
84145 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
84146 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
84147 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
84148 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84149 + */
84150 +
84151 +/**************************************************************************//**
84152 +
84153 + @File          part_ext.h
84154 +
84155 + @Description   Definitions for the part (integration) module.
84156 +*//***************************************************************************/
84157 +
84158 +#ifndef __PART_EXT_H
84159 +#define __PART_EXT_H
84160 +
84161 +#include "std_ext.h"
84162 +#include "part_integration_ext.h"
84163 +
84164 +#if !(defined(P1023) || \
84165 +      defined(P2041) || \
84166 +      defined(P3041) || \
84167 +      defined(P4080) || \
84168 +      defined(P5020) || \
84169 +      defined(P5040) || \
84170 +      defined(B4860) || \
84171 +      defined(T4240))
84172 +#error "unable to proceed without chip-definition"
84173 +#endif
84174 +
84175 +
84176 +/**************************************************************************//*
84177 + @Description   Part data structure - must be contained in any integration
84178 +                data structure.
84179 +*//***************************************************************************/
84180 +typedef struct t_Part
84181 +{
84182 +    uintptr_t   (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
84183 +                /**< Returns the address of the module's memory map base. */
84184 +    e_ModuleId  (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
84185 +                /**< Returns the module's ID according to its memory map base. */
84186 +} t_Part;
84187 +
84188 +
84189 +#endif /* __PART_EXT_H */
84190 --- /dev/null
84191 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_integration_ext.h
84192 @@ -0,0 +1,304 @@
84193 +/*
84194 + * Copyright 2008-2012 Freescale Semiconductor Inc.
84195 + *
84196 + * Redistribution and use in source and binary forms, with or without
84197 + * modification, are permitted provided that the following conditions are met:
84198 + *     * Redistributions of source code must retain the above copyright
84199 + *       notice, this list of conditions and the following disclaimer.
84200 + *     * Redistributions in binary form must reproduce the above copyright
84201 + *       notice, this list of conditions and the following disclaimer in the
84202 + *       documentation and/or other materials provided with the distribution.
84203 + *     * Neither the name of Freescale Semiconductor nor the
84204 + *       names of its contributors may be used to endorse or promote products
84205 + *       derived from this software without specific prior written permission.
84206 + *
84207 + *
84208 + * ALTERNATIVELY, this software may be distributed under the terms of the
84209 + * GNU General Public License ("GPL") as published by the Free Software
84210 + * Foundation, either version 2 of that License or (at your option) any
84211 + * later version.
84212 + *
84213 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
84214 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
84215 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
84216 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
84217 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
84218 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
84219 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
84220 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
84221 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
84222 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84223 + */
84224 +
84225 +/**
84226 +
84227 + @File          part_integration_ext.h
84228 +
84229 + @Description   T4240 external definitions and structures.
84230 +*//***************************************************************************/
84231 +#ifndef __PART_INTEGRATION_EXT_H
84232 +#define __PART_INTEGRATION_EXT_H
84233 +
84234 +#include "std_ext.h"
84235 +#include "ddr_std_ext.h"
84236 +#include "enet_ext.h"
84237 +#include "dpaa_integration_ext.h"
84238 +
84239 +
84240 +/**************************************************************************//**
84241 + @Group         T4240_chip_id T4240 Application Programming Interface
84242 +
84243 + @Description   T4240 Chip functions,definitions and enums.
84244 +
84245 + @{
84246 +*//***************************************************************************/
84247 +
84248 +#define CORE_E6500
84249 +
84250 +#define INTG_MAX_NUM_OF_CORES   24
84251 +
84252 +
84253 +/**************************************************************************//**
84254 + @Description   Module types.
84255 +*//***************************************************************************/
84256 +typedef enum e_ModuleId
84257 +{
84258 +    e_MODULE_ID_DUART_1 = 0,
84259 +    e_MODULE_ID_DUART_2,
84260 +    e_MODULE_ID_DUART_3,
84261 +    e_MODULE_ID_DUART_4,
84262 +    e_MODULE_ID_LAW,
84263 +    e_MODULE_ID_IFC,
84264 +    e_MODULE_ID_PAMU,
84265 +    e_MODULE_ID_QM,                 /**< Queue manager module */
84266 +    e_MODULE_ID_BM,                 /**< Buffer manager module */
84267 +    e_MODULE_ID_QM_CE_PORTAL_0,
84268 +    e_MODULE_ID_QM_CI_PORTAL_0,
84269 +    e_MODULE_ID_QM_CE_PORTAL_1,
84270 +    e_MODULE_ID_QM_CI_PORTAL_1,
84271 +    e_MODULE_ID_QM_CE_PORTAL_2,
84272 +    e_MODULE_ID_QM_CI_PORTAL_2,
84273 +    e_MODULE_ID_QM_CE_PORTAL_3,
84274 +    e_MODULE_ID_QM_CI_PORTAL_3,
84275 +    e_MODULE_ID_QM_CE_PORTAL_4,
84276 +    e_MODULE_ID_QM_CI_PORTAL_4,
84277 +    e_MODULE_ID_QM_CE_PORTAL_5,
84278 +    e_MODULE_ID_QM_CI_PORTAL_5,
84279 +    e_MODULE_ID_QM_CE_PORTAL_6,
84280 +    e_MODULE_ID_QM_CI_PORTAL_6,
84281 +    e_MODULE_ID_QM_CE_PORTAL_7,
84282 +    e_MODULE_ID_QM_CI_PORTAL_7,
84283 +    e_MODULE_ID_QM_CE_PORTAL_8,
84284 +    e_MODULE_ID_QM_CI_PORTAL_8,
84285 +    e_MODULE_ID_QM_CE_PORTAL_9,
84286 +    e_MODULE_ID_QM_CI_PORTAL_9,
84287 +    e_MODULE_ID_BM_CE_PORTAL_0,
84288 +    e_MODULE_ID_BM_CI_PORTAL_0,
84289 +    e_MODULE_ID_BM_CE_PORTAL_1,
84290 +    e_MODULE_ID_BM_CI_PORTAL_1,
84291 +    e_MODULE_ID_BM_CE_PORTAL_2,
84292 +    e_MODULE_ID_BM_CI_PORTAL_2,
84293 +    e_MODULE_ID_BM_CE_PORTAL_3,
84294 +    e_MODULE_ID_BM_CI_PORTAL_3,
84295 +    e_MODULE_ID_BM_CE_PORTAL_4,
84296 +    e_MODULE_ID_BM_CI_PORTAL_4,
84297 +    e_MODULE_ID_BM_CE_PORTAL_5,
84298 +    e_MODULE_ID_BM_CI_PORTAL_5,
84299 +    e_MODULE_ID_BM_CE_PORTAL_6,
84300 +    e_MODULE_ID_BM_CI_PORTAL_6,
84301 +    e_MODULE_ID_BM_CE_PORTAL_7,
84302 +    e_MODULE_ID_BM_CI_PORTAL_7,
84303 +    e_MODULE_ID_BM_CE_PORTAL_8,
84304 +    e_MODULE_ID_BM_CI_PORTAL_8,
84305 +    e_MODULE_ID_BM_CE_PORTAL_9,
84306 +    e_MODULE_ID_BM_CI_PORTAL_9,
84307 +    e_MODULE_ID_FM,                 /**< Frame manager module */
84308 +    e_MODULE_ID_FM_RTC,             /**< FM Real-Time-Clock */
84309 +    e_MODULE_ID_FM_MURAM,           /**< FM Multi-User-RAM */
84310 +    e_MODULE_ID_FM_BMI,             /**< FM BMI block */
84311 +    e_MODULE_ID_FM_QMI,             /**< FM QMI block */
84312 +    e_MODULE_ID_FM_PARSER,          /**< FM parser block */
84313 +    e_MODULE_ID_FM_PORT_HO1,        /**< FM Host-command/offline-parsing port block */
84314 +    e_MODULE_ID_FM_PORT_HO2,        /**< FM Host-command/offline-parsing port block */
84315 +    e_MODULE_ID_FM_PORT_HO3,        /**< FM Host-command/offline-parsing port block */
84316 +    e_MODULE_ID_FM_PORT_HO4,        /**< FM Host-command/offline-parsing port block */
84317 +    e_MODULE_ID_FM_PORT_HO5,        /**< FM Host-command/offline-parsing port block */
84318 +    e_MODULE_ID_FM_PORT_HO6,        /**< FM Host-command/offline-parsing port block */
84319 +    e_MODULE_ID_FM_PORT_HO7,        /**< FM Host-command/offline-parsing port block */
84320 +    e_MODULE_ID_FM_PORT_1GRx1,      /**< FM Rx 1G MAC port block */
84321 +    e_MODULE_ID_FM_PORT_1GRx2,      /**< FM Rx 1G MAC port block */
84322 +    e_MODULE_ID_FM_PORT_1GRx3,      /**< FM Rx 1G MAC port block */
84323 +    e_MODULE_ID_FM_PORT_1GRx4,      /**< FM Rx 1G MAC port block */
84324 +    e_MODULE_ID_FM_PORT_1GRx5,      /**< FM Rx 1G MAC port block */
84325 +    e_MODULE_ID_FM_PORT_1GRx6,      /**< FM Rx 1G MAC port block */
84326 +    e_MODULE_ID_FM_PORT_10GRx1,     /**< FM Rx 10G MAC port block */
84327 +    e_MODULE_ID_FM_PORT_10GRx2,     /**< FM Rx 10G MAC port block */
84328 +    e_MODULE_ID_FM_PORT_1GTx1,      /**< FM Tx 1G MAC port block */
84329 +    e_MODULE_ID_FM_PORT_1GTx2,      /**< FM Tx 1G MAC port block */
84330 +    e_MODULE_ID_FM_PORT_1GTx3,      /**< FM Tx 1G MAC port block */
84331 +    e_MODULE_ID_FM_PORT_1GTx4,      /**< FM Tx 1G MAC port block */
84332 +    e_MODULE_ID_FM_PORT_1GTx5,      /**< FM Tx 1G MAC port block */
84333 +    e_MODULE_ID_FM_PORT_1GTx6,      /**< FM Tx 1G MAC port block */
84334 +    e_MODULE_ID_FM_PORT_10GTx1,     /**< FM Tx 10G MAC port block */
84335 +    e_MODULE_ID_FM_PORT_10GTx2,     /**< FM Tx 10G MAC port block */
84336 +    e_MODULE_ID_FM_PLCR,            /**< FM Policer */
84337 +    e_MODULE_ID_FM_KG,              /**< FM Keygen */
84338 +    e_MODULE_ID_FM_DMA,             /**< FM DMA */
84339 +    e_MODULE_ID_FM_FPM,             /**< FM FPM */
84340 +    e_MODULE_ID_FM_IRAM,            /**< FM Instruction-RAM */
84341 +    e_MODULE_ID_FM_1GMDIO,          /**< FM 1G MDIO MAC */
84342 +    e_MODULE_ID_FM_10GMDIO,         /**< FM 10G MDIO */
84343 +    e_MODULE_ID_FM_PRS_IRAM,        /**< FM SW-parser Instruction-RAM */
84344 +    e_MODULE_ID_FM_1GMAC1,          /**< FM 1G MAC #1 */
84345 +    e_MODULE_ID_FM_1GMAC2,          /**< FM 1G MAC #2 */
84346 +    e_MODULE_ID_FM_1GMAC3,          /**< FM 1G MAC #3 */
84347 +    e_MODULE_ID_FM_1GMAC4,          /**< FM 1G MAC #4 */
84348 +    e_MODULE_ID_FM_1GMAC5,          /**< FM 1G MAC #5 */
84349 +    e_MODULE_ID_FM_1GMAC6,          /**< FM 1G MAC #6 */
84350 +    e_MODULE_ID_FM_10GMAC1,         /**< FM 10G MAC */
84351 +    e_MODULE_ID_FM_10GMAC2,         /**< FM 10G MAC */
84352 +
84353 +    e_MODULE_ID_SEC_GEN,            /**< SEC 4.0 General registers      */
84354 +    e_MODULE_ID_SEC_QI,             /**< SEC 4.0 QI registers           */
84355 +    e_MODULE_ID_SEC_JQ0,            /**< SEC 4.0 JQ-0 registers         */
84356 +    e_MODULE_ID_SEC_JQ1,            /**< SEC 4.0 JQ-1 registers         */
84357 +    e_MODULE_ID_SEC_JQ2,            /**< SEC 4.0 JQ-2 registers         */
84358 +    e_MODULE_ID_SEC_JQ3,            /**< SEC 4.0 JQ-3 registers         */
84359 +    e_MODULE_ID_SEC_RTIC,           /**< SEC 4.0 RTIC registers         */
84360 +    e_MODULE_ID_SEC_DECO0_CCB0,     /**< SEC 4.0 DECO-0/CCB-0 registers */
84361 +    e_MODULE_ID_SEC_DECO1_CCB1,     /**< SEC 4.0 DECO-1/CCB-1 registers */
84362 +    e_MODULE_ID_SEC_DECO2_CCB2,     /**< SEC 4.0 DECO-2/CCB-2 registers */
84363 +    e_MODULE_ID_SEC_DECO3_CCB3,     /**< SEC 4.0 DECO-3/CCB-3 registers */
84364 +    e_MODULE_ID_SEC_DECO4_CCB4,     /**< SEC 4.0 DECO-4/CCB-4 registers */
84365 +
84366 +    e_MODULE_ID_PIC,                /**< PIC */
84367 +    e_MODULE_ID_GPIO,               /**< GPIO */
84368 +    e_MODULE_ID_SERDES,             /**< SERDES */
84369 +    e_MODULE_ID_CPC_1,              /**< CoreNet-Platform-Cache 1 */
84370 +    e_MODULE_ID_CPC_2,              /**< CoreNet-Platform-Cache 2 */
84371 +
84372 +    e_MODULE_ID_SRIO_PORTS,         /**< RapidIO controller */
84373 +
84374 +    e_MODULE_ID_DUMMY_LAST
84375 +} e_ModuleId;
84376 +
84377 +#define NUM_OF_MODULES  e_MODULE_ID_DUMMY_LAST
84378 +
84379 +#if 0 /* using unified values */
84380 +/*****************************************************************************
84381 + INTEGRATION-SPECIFIC MODULE CODES
84382 +******************************************************************************/
84383 +#define MODULE_UNKNOWN          0x00000000
84384 +#define MODULE_MEM              0x00010000
84385 +#define MODULE_MM               0x00020000
84386 +#define MODULE_CORE             0x00030000
84387 +#define MODULE_T4240            0x00040000
84388 +#define MODULE_T4240_PLATFORM   0x00050000
84389 +#define MODULE_PM               0x00060000
84390 +#define MODULE_MMU              0x00070000
84391 +#define MODULE_PIC              0x00080000
84392 +#define MODULE_CPC              0x00090000
84393 +#define MODULE_DUART            0x000a0000
84394 +#define MODULE_SERDES           0x000b0000
84395 +#define MODULE_PIO              0x000c0000
84396 +#define MODULE_QM               0x000d0000
84397 +#define MODULE_BM               0x000e0000
84398 +#define MODULE_SEC              0x000f0000
84399 +#define MODULE_LAW              0x00100000
84400 +#define MODULE_LBC              0x00110000
84401 +#define MODULE_PAMU             0x00120000
84402 +#define MODULE_FM               0x00130000
84403 +#define MODULE_FM_MURAM         0x00140000
84404 +#define MODULE_FM_PCD           0x00150000
84405 +#define MODULE_FM_RTC           0x00160000
84406 +#define MODULE_FM_MAC           0x00170000
84407 +#define MODULE_FM_PORT          0x00180000
84408 +#define MODULE_FM_SP            0x00190000
84409 +#define MODULE_DPA_PORT         0x001a0000
84410 +#define MODULE_MII              0x001b0000
84411 +#define MODULE_I2C              0x001c0000
84412 +#define MODULE_DMA              0x001d0000
84413 +#define MODULE_DDR              0x001e0000
84414 +#define MODULE_ESPI             0x001f0000
84415 +#define MODULE_DPAA_IPSEC       0x00200000
84416 +#endif /* using unified values */
84417 +
84418 +/*****************************************************************************
84419 + PAMU INTEGRATION-SPECIFIC DEFINITIONS
84420 +******************************************************************************/
84421 +#define PAMU_NUM_OF_PARTITIONS  4
84422 +
84423 +/*****************************************************************************
84424 + LAW INTEGRATION-SPECIFIC DEFINITIONS
84425 +******************************************************************************/
84426 +#define LAW_NUM_OF_WINDOWS      32
84427 +#define LAW_MIN_WINDOW_SIZE     0x0000000000001000LL    /**< 4 Kbytes */
84428 +#define LAW_MAX_WINDOW_SIZE     0x0000010000000000LL    /**< 1 Tbytes for 40-bit address space */
84429 +
84430 +
84431 +/*****************************************************************************
84432 + LBC INTEGRATION-SPECIFIC DEFINITIONS
84433 +******************************************************************************/
84434 +/**************************************************************************//**
84435 + @Group         lbc_exception_grp LBC Exception Unit
84436 +
84437 + @Description   LBC Exception unit API functions, definitions and enums
84438 +
84439 + @{
84440 +*//***************************************************************************/
84441 +
84442 +/**************************************************************************//**
84443 + @Anchor        lbc_exbm
84444 +
84445 + @Collection    LBC Errors Bit Mask
84446 +
84447 +                These errors are reported through the exceptions callback..
84448 +                The values can be or'ed in any combination in the errors mask
84449 +                parameter of the errors report structure.
84450 +
84451 +                These errors can also be passed as a bit-mask to
84452 +                LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
84453 +                for enabling or disabling error checking.
84454 + @{
84455 +*//***************************************************************************/
84456 +#define LBC_ERR_BUS_MONITOR     0x80000000  /**< Bus monitor error */
84457 +#define LBC_ERR_PARITY_ECC      0x20000000  /**< Parity error for GPCM/UPM */
84458 +#define LBC_ERR_WRITE_PROTECT   0x04000000  /**< Write protection error */
84459 +#define LBC_ERR_CHIP_SELECT     0x00080000  /**< Unrecognized chip select */
84460 +
84461 +#define LBC_ERR_ALL             (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
84462 +                                 LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT)
84463 +                                            /**< All possible errors */
84464 +/* @} */
84465 +/** @} */ /* end of lbc_exception_grp group */
84466 +
84467 +#define LBC_INCORRECT_ERROR_REPORT_ERRATA
84468 +
84469 +#define LBC_NUM_OF_BANKS            8
84470 +#define LBC_MAX_CS_SIZE             0x0000000100000000LL  /* Up to 4G memory block size */
84471 +#define LBC_PARITY_SUPPORT
84472 +#define LBC_ADDRESS_HOLD_TIME_CTRL
84473 +#define LBC_HIGH_CLK_DIVIDERS
84474 +#define LBC_FCM_AVAILABLE
84475 +
84476 +/*****************************************************************************
84477 + GPIO INTEGRATION-SPECIFIC DEFINITIONS
84478 +******************************************************************************/
84479 +#define GPIO_PORT_OFFSET_0x1000
84480 +
84481 +#define GPIO_NUM_OF_PORTS   3   /**< Number of ports in GPIO module;
84482 +                                     Each port contains up to 32 I/O pins. */
84483 +
84484 +#define GPIO_VALID_PIN_MASKS   \
84485 +    { /* Port A */ 0xFFFFFFFF, \
84486 +      /* Port B */ 0xFFFFFFFF, \
84487 +      /* Port C */ 0xFFFFFFFF }
84488 +
84489 +#define GPIO_VALID_INTR_MASKS  \
84490 +    { /* Port A */ 0xFFFFFFFF, \
84491 +      /* Port B */ 0xFFFFFFFF, \
84492 +      /* Port C */ 0xFFFFFFFF }
84493 +
84494 +
84495 +
84496 +#endif /* __PART_INTEGRATION_EXT_H */
84497 --- /dev/null
84498 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/dpaa_integration_ext.h
84499 @@ -0,0 +1,293 @@
84500 +/*
84501 + * Copyright 2012 Freescale Semiconductor Inc.
84502 + *
84503 + * Redistribution and use in source and binary forms, with or without
84504 + * modification, are permitted provided that the following conditions are met:
84505 + *     * Redistributions of source code must retain the above copyright
84506 + *       notice, this list of conditions and the following disclaimer.
84507 + *     * Redistributions in binary form must reproduce the above copyright
84508 + *       notice, this list of conditions and the following disclaimer in the
84509 + *       documentation and/or other materials provided with the distribution.
84510 + *     * Neither the name of Freescale Semiconductor nor the
84511 + *       names of its contributors may be used to endorse or promote products
84512 + *       derived from this software without specific prior written permission.
84513 + *
84514 + *
84515 + * ALTERNATIVELY, this software may be distributed under the terms of the
84516 + * GNU General Public License ("GPL") as published by the Free Software
84517 + * Foundation, either version 2 of that License or (at your option) any
84518 + * later version.
84519 + *
84520 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
84521 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
84522 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
84523 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
84524 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
84525 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
84526 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
84527 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
84528 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
84529 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84530 + */
84531 +
84532 +/**
84533 +
84534 + @File          dpaa_integration_ext.h
84535 +
84536 + @Description   T4240 FM external definitions and structures.
84537 +*//***************************************************************************/
84538 +#ifndef __DPAA_INTEGRATION_EXT_H
84539 +#define __DPAA_INTEGRATION_EXT_H
84540 +
84541 +#include "std_ext.h"
84542 +
84543 +
84544 +#define DPAA_VERSION    11
84545 +
84546 +/**************************************************************************//**
84547 + @Description   DPAA SW Portals Enumeration.
84548 +*//***************************************************************************/
84549 +typedef enum
84550 +{
84551 +    e_DPAA_SWPORTAL0 = 0,
84552 +    e_DPAA_SWPORTAL1,
84553 +    e_DPAA_SWPORTAL2,
84554 +    e_DPAA_SWPORTAL3,
84555 +    e_DPAA_SWPORTAL4,
84556 +    e_DPAA_SWPORTAL5,
84557 +    e_DPAA_SWPORTAL6,
84558 +    e_DPAA_SWPORTAL7,
84559 +    e_DPAA_SWPORTAL8,
84560 +    e_DPAA_SWPORTAL9,
84561 +    e_DPAA_SWPORTAL10,
84562 +    e_DPAA_SWPORTAL11,
84563 +    e_DPAA_SWPORTAL12,
84564 +    e_DPAA_SWPORTAL13,
84565 +    e_DPAA_SWPORTAL14,
84566 +    e_DPAA_SWPORTAL15,
84567 +    e_DPAA_SWPORTAL16,
84568 +    e_DPAA_SWPORTAL17,
84569 +    e_DPAA_SWPORTAL18,
84570 +    e_DPAA_SWPORTAL19,
84571 +    e_DPAA_SWPORTAL20,
84572 +    e_DPAA_SWPORTAL21,
84573 +    e_DPAA_SWPORTAL22,
84574 +    e_DPAA_SWPORTAL23,
84575 +    e_DPAA_SWPORTAL24,
84576 +    e_DPAA_SWPORTAL_DUMMY_LAST
84577 +} e_DpaaSwPortal;
84578 +
84579 +/**************************************************************************//**
84580 + @Description   DPAA Direct Connect Portals Enumeration.
84581 +*//***************************************************************************/
84582 +typedef enum
84583 +{
84584 +    e_DPAA_DCPORTAL0 = 0,
84585 +    e_DPAA_DCPORTAL1,
84586 +    e_DPAA_DCPORTAL2,
84587 +    e_DPAA_DCPORTAL_DUMMY_LAST
84588 +} e_DpaaDcPortal;
84589 +
84590 +#define DPAA_MAX_NUM_OF_SW_PORTALS      e_DPAA_SWPORTAL_DUMMY_LAST
84591 +#define DPAA_MAX_NUM_OF_DC_PORTALS      e_DPAA_DCPORTAL_DUMMY_LAST
84592 +
84593 +/*****************************************************************************
84594 + QMan INTEGRATION-SPECIFIC DEFINITIONS
84595 +******************************************************************************/
84596 +#define QM_MAX_NUM_OF_POOL_CHANNELS     15      /**< Total number of channels, dedicated and pool */
84597 +#define QM_MAX_NUM_OF_WQ                8       /**< Number of work queues per channel */
84598 +#define QM_MAX_NUM_OF_CGS               256     /**< Congestion groups number */
84599 +#define QM_MAX_NUM_OF_FQIDS             (16 * MEGABYTE)
84600 +                                                /**< FQIDs range - 24 bits */
84601 +
84602 +/**************************************************************************//**
84603 + @Description   Work Queue Channel assignments in QMan.
84604 +*//***************************************************************************/
84605 +typedef enum
84606 +{
84607 +    e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0,              /**< Dedicated channels serviced by software portals 0 to 24 */
84608 +    e_QM_FQ_CHANNEL_SWPORTAL1,
84609 +    e_QM_FQ_CHANNEL_SWPORTAL2,
84610 +    e_QM_FQ_CHANNEL_SWPORTAL3,
84611 +    e_QM_FQ_CHANNEL_SWPORTAL4,
84612 +    e_QM_FQ_CHANNEL_SWPORTAL5,
84613 +    e_QM_FQ_CHANNEL_SWPORTAL6,
84614 +    e_QM_FQ_CHANNEL_SWPORTAL7,
84615 +    e_QM_FQ_CHANNEL_SWPORTAL8,
84616 +    e_QM_FQ_CHANNEL_SWPORTAL9,
84617 +    e_QM_FQ_CHANNEL_SWPORTAL10,
84618 +    e_QM_FQ_CHANNEL_SWPORTAL11,
84619 +    e_QM_FQ_CHANNEL_SWPORTAL12,
84620 +    e_QM_FQ_CHANNEL_SWPORTAL13,
84621 +    e_QM_FQ_CHANNEL_SWPORTAL14,
84622 +    e_QM_FQ_CHANNEL_SWPORTAL15,
84623 +    e_QM_FQ_CHANNEL_SWPORTAL16,
84624 +    e_QM_FQ_CHANNEL_SWPORTAL17,
84625 +    e_QM_FQ_CHANNEL_SWPORTAL18,
84626 +    e_QM_FQ_CHANNEL_SWPORTAL19,
84627 +    e_QM_FQ_CHANNEL_SWPORTAL20,
84628 +    e_QM_FQ_CHANNEL_SWPORTAL21,
84629 +    e_QM_FQ_CHANNEL_SWPORTAL22,
84630 +    e_QM_FQ_CHANNEL_SWPORTAL23,
84631 +    e_QM_FQ_CHANNEL_SWPORTAL24,
84632 +
84633 +    e_QM_FQ_CHANNEL_POOL1 = 0x401,               /**< Pool channels that can be serviced by any of the software portals */
84634 +    e_QM_FQ_CHANNEL_POOL2,
84635 +    e_QM_FQ_CHANNEL_POOL3,
84636 +    e_QM_FQ_CHANNEL_POOL4,
84637 +    e_QM_FQ_CHANNEL_POOL5,
84638 +    e_QM_FQ_CHANNEL_POOL6,
84639 +    e_QM_FQ_CHANNEL_POOL7,
84640 +    e_QM_FQ_CHANNEL_POOL8,
84641 +    e_QM_FQ_CHANNEL_POOL9,
84642 +    e_QM_FQ_CHANNEL_POOL10,
84643 +    e_QM_FQ_CHANNEL_POOL11,
84644 +    e_QM_FQ_CHANNEL_POOL12,
84645 +    e_QM_FQ_CHANNEL_POOL13,
84646 +    e_QM_FQ_CHANNEL_POOL14,
84647 +    e_QM_FQ_CHANNEL_POOL15,
84648 +
84649 +    e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800,           /**< Dedicated channels serviced by Direct Connect Portal 0:
84650 +                                                      connected to FMan 0; assigned in incrementing order to
84651 +                                                      each sub-portal (SP) in the portal */
84652 +    e_QM_FQ_CHANNEL_FMAN0_SP1,
84653 +    e_QM_FQ_CHANNEL_FMAN0_SP2,
84654 +    e_QM_FQ_CHANNEL_FMAN0_SP3,
84655 +    e_QM_FQ_CHANNEL_FMAN0_SP4,
84656 +    e_QM_FQ_CHANNEL_FMAN0_SP5,
84657 +    e_QM_FQ_CHANNEL_FMAN0_SP6,
84658 +    e_QM_FQ_CHANNEL_FMAN0_SP7,
84659 +    e_QM_FQ_CHANNEL_FMAN0_SP8,
84660 +    e_QM_FQ_CHANNEL_FMAN0_SP9,
84661 +    e_QM_FQ_CHANNEL_FMAN0_SP10,
84662 +    e_QM_FQ_CHANNEL_FMAN0_SP11,
84663 +    e_QM_FQ_CHANNEL_FMAN0_SP12,
84664 +    e_QM_FQ_CHANNEL_FMAN0_SP13,
84665 +    e_QM_FQ_CHANNEL_FMAN0_SP14,
84666 +    e_QM_FQ_CHANNEL_FMAN0_SP15,
84667 +
84668 +    e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820,            /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */
84669 +    e_QM_FQ_CHANNEL_RMAN_SP1,
84670 +
84671 +    e_QM_FQ_CHANNEL_CAAM = 0x840                 /**< Dedicated channel serviced by Direct Connect Portal 2:
84672 +                                                      connected to SEC */
84673 +} e_QmFQChannel;
84674 +
84675 +/*****************************************************************************
84676 + BMan INTEGRATION-SPECIFIC DEFINITIONS
84677 +******************************************************************************/
84678 +#define BM_MAX_NUM_OF_POOLS         64          /**< Number of buffers pools */
84679 +
84680 +/*****************************************************************************
84681 + SEC INTEGRATION-SPECIFIC DEFINITIONS
84682 +******************************************************************************/
84683 +#define SEC_NUM_OF_DECOS            3
84684 +#define SEC_ALL_DECOS_MASK          0x00000003
84685 +
84686 +
84687 +/*****************************************************************************
84688 + FM INTEGRATION-SPECIFIC DEFINITIONS
84689 +******************************************************************************/
84690 +#define INTG_MAX_NUM_OF_FM         1
84691 +/* Ports defines */
84692 +#define FM_MAX_NUM_OF_1G_MACS      5
84693 +#define FM_MAX_NUM_OF_10G_MACS     1
84694 +#define FM_MAX_NUM_OF_MACS         (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
84695 +#define FM_MAX_NUM_OF_OH_PORTS     4
84696 +
84697 +#define FM_MAX_NUM_OF_1G_RX_PORTS   FM_MAX_NUM_OF_1G_MACS
84698 +#define FM_MAX_NUM_OF_10G_RX_PORTS  FM_MAX_NUM_OF_10G_MACS
84699 +#define FM_MAX_NUM_OF_RX_PORTS      (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
84700 +
84701 +#define FM_MAX_NUM_OF_1G_TX_PORTS   FM_MAX_NUM_OF_1G_MACS
84702 +#define FM_MAX_NUM_OF_10G_TX_PORTS  FM_MAX_NUM_OF_10G_MACS
84703 +#define FM_MAX_NUM_OF_TX_PORTS      (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
84704 +
84705 +#define FM_MAX_NUM_OF_MACSECS       1 /* Should be updated */
84706 +
84707 +#define FM_PORT_MAX_NUM_OF_EXT_POOLS            4           /**< Number of external BM pools per Rx port */
84708 +#define FM_PORT_NUM_OF_CONGESTION_GRPS          256         /**< Total number of congestion groups in QM */
84709 +#define FM_MAX_NUM_OF_SUB_PORTALS               16
84710 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS   0
84711 +
84712 +#define FM_VSP_MAX_NUM_OF_ENTRIES               32
84713 +#define FM_MAX_NUM_OF_PFC_PRIORITIES            8
84714 +
84715 +/* RAMs defines */
84716 +#define FM_MURAM_SIZE                   (192 * KILOBYTE)
84717 +#define FM_IRAM_SIZE(major, minor)      \
84718 +    (((major == 6) && ((minor == 4) )) ? (64 * KILOBYTE) : (32 * KILOBYTE))
84719 +#define FM_NUM_OF_CTRL                  2
84720 +
84721 +/* PCD defines */
84722 +#define FM_PCD_PLCR_NUM_ENTRIES         256                 /**< Total number of policer profiles */
84723 +#define FM_PCD_KG_NUM_OF_SCHEMES        32                  /**< Total number of KG schemes */
84724 +#define FM_PCD_MAX_NUM_OF_CLS_PLANS     256                 /**< Number of classification plan entries. */
84725 +#define FM_PCD_PRS_SW_PATCHES_SIZE      0x00000600          /**< Number of bytes saved for patches */
84726 +#define FM_PCD_SW_PRS_SIZE              0x00000800          /**< Total size of SW parser area */
84727 +
84728 +/* RTC defines */
84729 +#define FM_RTC_NUM_OF_ALARMS            2                   /**< RTC number of alarms */
84730 +#define FM_RTC_NUM_OF_PERIODIC_PULSES   3                   /**< RTC number of periodic pulses */
84731 +#define FM_RTC_NUM_OF_EXT_TRIGGERS      2                   /**< RTC number of external triggers */
84732 +
84733 +/* QMI defines */
84734 +#define QMI_MAX_NUM_OF_TNUMS            64
84735 +#define QMI_DEF_TNUMS_THRESH            32
84736 +/* FPM defines */
84737 +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS  4
84738 +
84739 +/* DMA defines */
84740 +#define DMA_THRESH_MAX_COMMQ            83
84741 +#define DMA_THRESH_MAX_BUF              127
84742 +
84743 +/* BMI defines */
84744 +#define BMI_MAX_NUM_OF_TASKS            64
84745 +#define BMI_MAX_NUM_OF_DMAS             32
84746 +
84747 +#define BMI_MAX_FIFO_SIZE               (FM_MURAM_SIZE)
84748 +#define PORT_MAX_WEIGHT                 16
84749 +
84750 +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx)   TRUE
84751 +
84752 +/* Unique T4240 */
84753 +#define FM_OP_OPEN_DMA_MIN_LIMIT
84754 +#define FM_NO_RESTRICT_ON_ACCESS_RSRC
84755 +#define FM_NO_OP_OBSERVED_POOLS
84756 +#define FM_FRAME_END_PARAMS_FOR_OP
84757 +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
84758 +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION
84759 +
84760 +#define FM_NO_GUARANTEED_RESET_VALUES
84761 +
84762 +/* FM errata */
84763 +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
84764 +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
84765 +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
84766 +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
84767 +#define FM_HANG_AT_RESET_MAC_CLK_DISABLED_ERRATA_FMAN_A007273
84768 +
84769 +#define FM_BCB_ERRATA_BMI_SW001
84770 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
84771 +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */
84772 +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */
84773 +
84774 +/*****************************************************************************
84775 + RMan INTEGRATION-SPECIFIC DEFINITIONS
84776 +******************************************************************************/
84777 +#define RM_MAX_NUM_OF_IB        4           /**< Number of inbound blocks */
84778 +#define RM_NUM_OF_IBCU          8           /**< NUmber of classification units in an inbound block */
84779 +
84780 +/* RMan erratas */
84781 +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756
84782 +
84783 +/*****************************************************************************
84784 + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
84785 +******************************************************************************/
84786 +#define NUM_OF_RX_SC                16
84787 +#define NUM_OF_TX_SC                16
84788 +
84789 +#define NUM_OF_SA_PER_RX_SC         2
84790 +#define NUM_OF_SA_PER_TX_SC         2
84791 +
84792 +#endif /* __DPAA_INTEGRATION_EXT_H */
84793 --- /dev/null
84794 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_ext.h
84795 @@ -0,0 +1,59 @@
84796 +/*
84797 + * Copyright 2012 Freescale Semiconductor Inc.
84798 + *
84799 + * Redistribution and use in source and binary forms, with or without
84800 + * modification, are permitted provided that the following conditions are met:
84801 + *     * Redistributions of source code must retain the above copyright
84802 + *       notice, this list of conditions and the following disclaimer.
84803 + *     * Redistributions in binary form must reproduce the above copyright
84804 + *       notice, this list of conditions and the following disclaimer in the
84805 + *       documentation and/or other materials provided with the distribution.
84806 + *     * Neither the name of Freescale Semiconductor nor the
84807 + *       names of its contributors may be used to endorse or promote products
84808 + *       derived from this software without specific prior written permission.
84809 + *
84810 + *
84811 + * ALTERNATIVELY, this software may be distributed under the terms of the
84812 + * GNU General Public License ("GPL") as published by the Free Software
84813 + * Foundation, either version 2 of that License or (at your option) any
84814 + * later version.
84815 + *
84816 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
84817 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
84818 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
84819 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
84820 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
84821 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
84822 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
84823 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
84824 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
84825 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84826 + */
84827 +
84828 +/**************************************************************************//**
84829 +
84830 + @File          part_ext.h
84831 +
84832 + @Description   Definitions for the part (integration) module.
84833 +*//***************************************************************************/
84834 +
84835 +#ifndef __PART_EXT_H
84836 +#define __PART_EXT_H
84837 +
84838 +#include "std_ext.h"
84839 +#include "part_integration_ext.h"
84840 +
84841 +/**************************************************************************//*
84842 + @Description   Part data structure - must be contained in any integration
84843 +                data structure.
84844 +*//***************************************************************************/
84845 +typedef struct t_Part
84846 +{
84847 +    uintptr_t   (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
84848 +                /**< Returns the address of the module's memory map base. */
84849 +    e_ModuleId  (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
84850 +                /**< Returns the module's ID according to its memory map base. */
84851 +} t_Part;
84852 +
84853 +
84854 +#endif /* __PART_EXT_H */
84855 --- /dev/null
84856 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_integration_ext.h
84857 @@ -0,0 +1,304 @@
84858 +/*
84859 + * Copyright 2008-2012 Freescale Semiconductor Inc.
84860 + *
84861 + * Redistribution and use in source and binary forms, with or without
84862 + * modification, are permitted provided that the following conditions are met:
84863 + *     * Redistributions of source code must retain the above copyright
84864 + *       notice, this list of conditions and the following disclaimer.
84865 + *     * Redistributions in binary form must reproduce the above copyright
84866 + *       notice, this list of conditions and the following disclaimer in the
84867 + *       documentation and/or other materials provided with the distribution.
84868 + *     * Neither the name of Freescale Semiconductor nor the
84869 + *       names of its contributors may be used to endorse or promote products
84870 + *       derived from this software without specific prior written permission.
84871 + *
84872 + *
84873 + * ALTERNATIVELY, this software may be distributed under the terms of the
84874 + * GNU General Public License ("GPL") as published by the Free Software
84875 + * Foundation, either version 2 of that License or (at your option) any
84876 + * later version.
84877 + *
84878 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
84879 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
84880 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
84881 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
84882 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
84883 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
84884 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
84885 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
84886 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
84887 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84888 + */
84889 +
84890 +/**
84891 +
84892 + @File          part_integration_ext.h
84893 +
84894 + @Description   T4240 external definitions and structures.
84895 +*//***************************************************************************/
84896 +#ifndef __PART_INTEGRATION_EXT_H
84897 +#define __PART_INTEGRATION_EXT_H
84898 +
84899 +#include "std_ext.h"
84900 +#include "ddr_std_ext.h"
84901 +#include "enet_ext.h"
84902 +#include "dpaa_integration_ext.h"
84903 +
84904 +
84905 +/**************************************************************************//**
84906 + @Group         T4240_chip_id T4240 Application Programming Interface
84907 +
84908 + @Description   T4240 Chip functions,definitions and enums.
84909 +
84910 + @{
84911 +*//***************************************************************************/
84912 +
84913 +#define CORE_E6500
84914 +
84915 +#define INTG_MAX_NUM_OF_CORES   24
84916 +
84917 +
84918 +/**************************************************************************//**
84919 + @Description   Module types.
84920 +*//***************************************************************************/
84921 +typedef enum e_ModuleId
84922 +{
84923 +    e_MODULE_ID_DUART_1 = 0,
84924 +    e_MODULE_ID_DUART_2,
84925 +    e_MODULE_ID_DUART_3,
84926 +    e_MODULE_ID_DUART_4,
84927 +    e_MODULE_ID_LAW,
84928 +    e_MODULE_ID_IFC,
84929 +    e_MODULE_ID_PAMU,
84930 +    e_MODULE_ID_QM,                 /**< Queue manager module */
84931 +    e_MODULE_ID_BM,                 /**< Buffer manager module */
84932 +    e_MODULE_ID_QM_CE_PORTAL_0,
84933 +    e_MODULE_ID_QM_CI_PORTAL_0,
84934 +    e_MODULE_ID_QM_CE_PORTAL_1,
84935 +    e_MODULE_ID_QM_CI_PORTAL_1,
84936 +    e_MODULE_ID_QM_CE_PORTAL_2,
84937 +    e_MODULE_ID_QM_CI_PORTAL_2,
84938 +    e_MODULE_ID_QM_CE_PORTAL_3,
84939 +    e_MODULE_ID_QM_CI_PORTAL_3,
84940 +    e_MODULE_ID_QM_CE_PORTAL_4,
84941 +    e_MODULE_ID_QM_CI_PORTAL_4,
84942 +    e_MODULE_ID_QM_CE_PORTAL_5,
84943 +    e_MODULE_ID_QM_CI_PORTAL_5,
84944 +    e_MODULE_ID_QM_CE_PORTAL_6,
84945 +    e_MODULE_ID_QM_CI_PORTAL_6,
84946 +    e_MODULE_ID_QM_CE_PORTAL_7,
84947 +    e_MODULE_ID_QM_CI_PORTAL_7,
84948 +    e_MODULE_ID_QM_CE_PORTAL_8,
84949 +    e_MODULE_ID_QM_CI_PORTAL_8,
84950 +    e_MODULE_ID_QM_CE_PORTAL_9,
84951 +    e_MODULE_ID_QM_CI_PORTAL_9,
84952 +    e_MODULE_ID_BM_CE_PORTAL_0,
84953 +    e_MODULE_ID_BM_CI_PORTAL_0,
84954 +    e_MODULE_ID_BM_CE_PORTAL_1,
84955 +    e_MODULE_ID_BM_CI_PORTAL_1,
84956 +    e_MODULE_ID_BM_CE_PORTAL_2,
84957 +    e_MODULE_ID_BM_CI_PORTAL_2,
84958 +    e_MODULE_ID_BM_CE_PORTAL_3,
84959 +    e_MODULE_ID_BM_CI_PORTAL_3,
84960 +    e_MODULE_ID_BM_CE_PORTAL_4,
84961 +    e_MODULE_ID_BM_CI_PORTAL_4,
84962 +    e_MODULE_ID_BM_CE_PORTAL_5,
84963 +    e_MODULE_ID_BM_CI_PORTAL_5,
84964 +    e_MODULE_ID_BM_CE_PORTAL_6,
84965 +    e_MODULE_ID_BM_CI_PORTAL_6,
84966 +    e_MODULE_ID_BM_CE_PORTAL_7,
84967 +    e_MODULE_ID_BM_CI_PORTAL_7,
84968 +    e_MODULE_ID_BM_CE_PORTAL_8,
84969 +    e_MODULE_ID_BM_CI_PORTAL_8,
84970 +    e_MODULE_ID_BM_CE_PORTAL_9,
84971 +    e_MODULE_ID_BM_CI_PORTAL_9,
84972 +    e_MODULE_ID_FM,                 /**< Frame manager module */
84973 +    e_MODULE_ID_FM_RTC,             /**< FM Real-Time-Clock */
84974 +    e_MODULE_ID_FM_MURAM,           /**< FM Multi-User-RAM */
84975 +    e_MODULE_ID_FM_BMI,             /**< FM BMI block */
84976 +    e_MODULE_ID_FM_QMI,             /**< FM QMI block */
84977 +    e_MODULE_ID_FM_PARSER,          /**< FM parser block */
84978 +    e_MODULE_ID_FM_PORT_HO1,        /**< FM Host-command/offline-parsing port block */
84979 +    e_MODULE_ID_FM_PORT_HO2,        /**< FM Host-command/offline-parsing port block */
84980 +    e_MODULE_ID_FM_PORT_HO3,        /**< FM Host-command/offline-parsing port block */
84981 +    e_MODULE_ID_FM_PORT_HO4,        /**< FM Host-command/offline-parsing port block */
84982 +    e_MODULE_ID_FM_PORT_HO5,        /**< FM Host-command/offline-parsing port block */
84983 +    e_MODULE_ID_FM_PORT_HO6,        /**< FM Host-command/offline-parsing port block */
84984 +    e_MODULE_ID_FM_PORT_HO7,        /**< FM Host-command/offline-parsing port block */
84985 +    e_MODULE_ID_FM_PORT_1GRx1,      /**< FM Rx 1G MAC port block */
84986 +    e_MODULE_ID_FM_PORT_1GRx2,      /**< FM Rx 1G MAC port block */
84987 +    e_MODULE_ID_FM_PORT_1GRx3,      /**< FM Rx 1G MAC port block */
84988 +    e_MODULE_ID_FM_PORT_1GRx4,      /**< FM Rx 1G MAC port block */
84989 +    e_MODULE_ID_FM_PORT_1GRx5,      /**< FM Rx 1G MAC port block */
84990 +    e_MODULE_ID_FM_PORT_1GRx6,      /**< FM Rx 1G MAC port block */
84991 +    e_MODULE_ID_FM_PORT_10GRx1,     /**< FM Rx 10G MAC port block */
84992 +    e_MODULE_ID_FM_PORT_10GRx2,     /**< FM Rx 10G MAC port block */
84993 +    e_MODULE_ID_FM_PORT_1GTx1,      /**< FM Tx 1G MAC port block */
84994 +    e_MODULE_ID_FM_PORT_1GTx2,      /**< FM Tx 1G MAC port block */
84995 +    e_MODULE_ID_FM_PORT_1GTx3,      /**< FM Tx 1G MAC port block */
84996 +    e_MODULE_ID_FM_PORT_1GTx4,      /**< FM Tx 1G MAC port block */
84997 +    e_MODULE_ID_FM_PORT_1GTx5,      /**< FM Tx 1G MAC port block */
84998 +    e_MODULE_ID_FM_PORT_1GTx6,      /**< FM Tx 1G MAC port block */
84999 +    e_MODULE_ID_FM_PORT_10GTx1,     /**< FM Tx 10G MAC port block */
85000 +    e_MODULE_ID_FM_PORT_10GTx2,     /**< FM Tx 10G MAC port block */
85001 +    e_MODULE_ID_FM_PLCR,            /**< FM Policer */
85002 +    e_MODULE_ID_FM_KG,              /**< FM Keygen */
85003 +    e_MODULE_ID_FM_DMA,             /**< FM DMA */
85004 +    e_MODULE_ID_FM_FPM,             /**< FM FPM */
85005 +    e_MODULE_ID_FM_IRAM,            /**< FM Instruction-RAM */
85006 +    e_MODULE_ID_FM_1GMDIO,          /**< FM 1G MDIO MAC */
85007 +    e_MODULE_ID_FM_10GMDIO,         /**< FM 10G MDIO */
85008 +    e_MODULE_ID_FM_PRS_IRAM,        /**< FM SW-parser Instruction-RAM */
85009 +    e_MODULE_ID_FM_1GMAC1,          /**< FM 1G MAC #1 */
85010 +    e_MODULE_ID_FM_1GMAC2,          /**< FM 1G MAC #2 */
85011 +    e_MODULE_ID_FM_1GMAC3,          /**< FM 1G MAC #3 */
85012 +    e_MODULE_ID_FM_1GMAC4,          /**< FM 1G MAC #4 */
85013 +    e_MODULE_ID_FM_1GMAC5,          /**< FM 1G MAC #5 */
85014 +    e_MODULE_ID_FM_1GMAC6,          /**< FM 1G MAC #6 */
85015 +    e_MODULE_ID_FM_10GMAC1,         /**< FM 10G MAC */
85016 +    e_MODULE_ID_FM_10GMAC2,         /**< FM 10G MAC */
85017 +
85018 +    e_MODULE_ID_SEC_GEN,            /**< SEC 4.0 General registers      */
85019 +    e_MODULE_ID_SEC_QI,             /**< SEC 4.0 QI registers           */
85020 +    e_MODULE_ID_SEC_JQ0,            /**< SEC 4.0 JQ-0 registers         */
85021 +    e_MODULE_ID_SEC_JQ1,            /**< SEC 4.0 JQ-1 registers         */
85022 +    e_MODULE_ID_SEC_JQ2,            /**< SEC 4.0 JQ-2 registers         */
85023 +    e_MODULE_ID_SEC_JQ3,            /**< SEC 4.0 JQ-3 registers         */
85024 +    e_MODULE_ID_SEC_RTIC,           /**< SEC 4.0 RTIC registers         */
85025 +    e_MODULE_ID_SEC_DECO0_CCB0,     /**< SEC 4.0 DECO-0/CCB-0 registers */
85026 +    e_MODULE_ID_SEC_DECO1_CCB1,     /**< SEC 4.0 DECO-1/CCB-1 registers */
85027 +    e_MODULE_ID_SEC_DECO2_CCB2,     /**< SEC 4.0 DECO-2/CCB-2 registers */
85028 +    e_MODULE_ID_SEC_DECO3_CCB3,     /**< SEC 4.0 DECO-3/CCB-3 registers */
85029 +    e_MODULE_ID_SEC_DECO4_CCB4,     /**< SEC 4.0 DECO-4/CCB-4 registers */
85030 +
85031 +    e_MODULE_ID_PIC,                /**< PIC */
85032 +    e_MODULE_ID_GPIO,               /**< GPIO */
85033 +    e_MODULE_ID_SERDES,             /**< SERDES */
85034 +    e_MODULE_ID_CPC_1,              /**< CoreNet-Platform-Cache 1 */
85035 +    e_MODULE_ID_CPC_2,              /**< CoreNet-Platform-Cache 2 */
85036 +
85037 +    e_MODULE_ID_SRIO_PORTS,         /**< RapidIO controller */
85038 +
85039 +    e_MODULE_ID_DUMMY_LAST
85040 +} e_ModuleId;
85041 +
85042 +#define NUM_OF_MODULES  e_MODULE_ID_DUMMY_LAST
85043 +
85044 +#if 0 /* using unified values */
85045 +/*****************************************************************************
85046 + INTEGRATION-SPECIFIC MODULE CODES
85047 +******************************************************************************/
85048 +#define MODULE_UNKNOWN          0x00000000
85049 +#define MODULE_MEM              0x00010000
85050 +#define MODULE_MM               0x00020000
85051 +#define MODULE_CORE             0x00030000
85052 +#define MODULE_T4240            0x00040000
85053 +#define MODULE_T4240_PLATFORM   0x00050000
85054 +#define MODULE_PM               0x00060000
85055 +#define MODULE_MMU              0x00070000
85056 +#define MODULE_PIC              0x00080000
85057 +#define MODULE_CPC              0x00090000
85058 +#define MODULE_DUART            0x000a0000
85059 +#define MODULE_SERDES           0x000b0000
85060 +#define MODULE_PIO              0x000c0000
85061 +#define MODULE_QM               0x000d0000
85062 +#define MODULE_BM               0x000e0000
85063 +#define MODULE_SEC              0x000f0000
85064 +#define MODULE_LAW              0x00100000
85065 +#define MODULE_LBC              0x00110000
85066 +#define MODULE_PAMU             0x00120000
85067 +#define MODULE_FM               0x00130000
85068 +#define MODULE_FM_MURAM         0x00140000
85069 +#define MODULE_FM_PCD           0x00150000
85070 +#define MODULE_FM_RTC           0x00160000
85071 +#define MODULE_FM_MAC           0x00170000
85072 +#define MODULE_FM_PORT          0x00180000
85073 +#define MODULE_FM_SP            0x00190000
85074 +#define MODULE_DPA_PORT         0x001a0000
85075 +#define MODULE_MII              0x001b0000
85076 +#define MODULE_I2C              0x001c0000
85077 +#define MODULE_DMA              0x001d0000
85078 +#define MODULE_DDR              0x001e0000
85079 +#define MODULE_ESPI             0x001f0000
85080 +#define MODULE_DPAA_IPSEC       0x00200000
85081 +#endif /* using unified values */
85082 +
85083 +/*****************************************************************************
85084 + PAMU INTEGRATION-SPECIFIC DEFINITIONS
85085 +******************************************************************************/
85086 +#define PAMU_NUM_OF_PARTITIONS  4
85087 +
85088 +/*****************************************************************************
85089 + LAW INTEGRATION-SPECIFIC DEFINITIONS
85090 +******************************************************************************/
85091 +#define LAW_NUM_OF_WINDOWS      32
85092 +#define LAW_MIN_WINDOW_SIZE     0x0000000000001000LL    /**< 4 Kbytes */
85093 +#define LAW_MAX_WINDOW_SIZE     0x0000010000000000LL    /**< 1 Tbytes for 40-bit address space */
85094 +
85095 +
85096 +/*****************************************************************************
85097 + LBC INTEGRATION-SPECIFIC DEFINITIONS
85098 +******************************************************************************/
85099 +/**************************************************************************//**
85100 + @Group         lbc_exception_grp LBC Exception Unit
85101 +
85102 + @Description   LBC Exception unit API functions, definitions and enums
85103 +
85104 + @{
85105 +*//***************************************************************************/
85106 +
85107 +/**************************************************************************//**
85108 + @Anchor        lbc_exbm
85109 +
85110 + @Collection    LBC Errors Bit Mask
85111 +
85112 +                These errors are reported through the exceptions callback..
85113 +                The values can be or'ed in any combination in the errors mask
85114 +                parameter of the errors report structure.
85115 +
85116 +                These errors can also be passed as a bit-mask to
85117 +                LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
85118 +                for enabling or disabling error checking.
85119 + @{
85120 +*//***************************************************************************/
85121 +#define LBC_ERR_BUS_MONITOR     0x80000000  /**< Bus monitor error */
85122 +#define LBC_ERR_PARITY_ECC      0x20000000  /**< Parity error for GPCM/UPM */
85123 +#define LBC_ERR_WRITE_PROTECT   0x04000000  /**< Write protection error */
85124 +#define LBC_ERR_CHIP_SELECT     0x00080000  /**< Unrecognized chip select */
85125 +
85126 +#define LBC_ERR_ALL             (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
85127 +                                 LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT)
85128 +                                            /**< All possible errors */
85129 +/* @} */
85130 +/** @} */ /* end of lbc_exception_grp group */
85131 +
85132 +#define LBC_INCORRECT_ERROR_REPORT_ERRATA
85133 +
85134 +#define LBC_NUM_OF_BANKS            8
85135 +#define LBC_MAX_CS_SIZE             0x0000000100000000LL  /* Up to 4G memory block size */
85136 +#define LBC_PARITY_SUPPORT
85137 +#define LBC_ADDRESS_HOLD_TIME_CTRL
85138 +#define LBC_HIGH_CLK_DIVIDERS
85139 +#define LBC_FCM_AVAILABLE
85140 +
85141 +/*****************************************************************************
85142 + GPIO INTEGRATION-SPECIFIC DEFINITIONS
85143 +******************************************************************************/
85144 +#define GPIO_PORT_OFFSET_0x1000
85145 +
85146 +#define GPIO_NUM_OF_PORTS   3   /**< Number of ports in GPIO module;
85147 +                                     Each port contains up to 32 I/O pins. */
85148 +
85149 +#define GPIO_VALID_PIN_MASKS   \
85150 +    { /* Port A */ 0xFFFFFFFF, \
85151 +      /* Port B */ 0xFFFFFFFF, \
85152 +      /* Port C */ 0xFFFFFFFF }
85153 +
85154 +#define GPIO_VALID_INTR_MASKS  \
85155 +    { /* Port A */ 0xFFFFFFFF, \
85156 +      /* Port B */ 0xFFFFFFFF, \
85157 +      /* Port C */ 0xFFFFFFFF }
85158 +
85159 +
85160 +
85161 +#endif /* __PART_INTEGRATION_EXT_H */
85162 --- /dev/null
85163 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/dpaa_integration_ext.h
85164 @@ -0,0 +1,291 @@
85165 +/*
85166 + * Copyright 2012 Freescale Semiconductor Inc.
85167 + *
85168 + * Redistribution and use in source and binary forms, with or without
85169 + * modification, are permitted provided that the following conditions are met:
85170 + *     * Redistributions of source code must retain the above copyright
85171 + *       notice, this list of conditions and the following disclaimer.
85172 + *     * Redistributions in binary form must reproduce the above copyright
85173 + *       notice, this list of conditions and the following disclaimer in the
85174 + *       documentation and/or other materials provided with the distribution.
85175 + *     * Neither the name of Freescale Semiconductor nor the
85176 + *       names of its contributors may be used to endorse or promote products
85177 + *       derived from this software without specific prior written permission.
85178 + *
85179 + *
85180 + * ALTERNATIVELY, this software may be distributed under the terms of the
85181 + * GNU General Public License ("GPL") as published by the Free Software
85182 + * Foundation, either version 2 of that License or (at your option) any
85183 + * later version.
85184 + *
85185 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
85186 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
85187 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
85188 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
85189 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
85190 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
85191 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
85192 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
85193 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
85194 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85195 + */
85196 +
85197 +/**
85198 +
85199 + @File          dpaa_integration_ext.h
85200 +
85201 + @Description   T4240 FM external definitions and structures.
85202 +*//***************************************************************************/
85203 +#ifndef __DPAA_INTEGRATION_EXT_H
85204 +#define __DPAA_INTEGRATION_EXT_H
85205 +
85206 +#include "std_ext.h"
85207 +
85208 +
85209 +#define DPAA_VERSION    11
85210 +
85211 +/**************************************************************************//**
85212 + @Description   DPAA SW Portals Enumeration.
85213 +*//***************************************************************************/
85214 +typedef enum
85215 +{
85216 +    e_DPAA_SWPORTAL0 = 0,
85217 +    e_DPAA_SWPORTAL1,
85218 +    e_DPAA_SWPORTAL2,
85219 +    e_DPAA_SWPORTAL3,
85220 +    e_DPAA_SWPORTAL4,
85221 +    e_DPAA_SWPORTAL5,
85222 +    e_DPAA_SWPORTAL6,
85223 +    e_DPAA_SWPORTAL7,
85224 +    e_DPAA_SWPORTAL8,
85225 +    e_DPAA_SWPORTAL9,
85226 +    e_DPAA_SWPORTAL10,
85227 +    e_DPAA_SWPORTAL11,
85228 +    e_DPAA_SWPORTAL12,
85229 +    e_DPAA_SWPORTAL13,
85230 +    e_DPAA_SWPORTAL14,
85231 +    e_DPAA_SWPORTAL15,
85232 +    e_DPAA_SWPORTAL16,
85233 +    e_DPAA_SWPORTAL17,
85234 +    e_DPAA_SWPORTAL18,
85235 +    e_DPAA_SWPORTAL19,
85236 +    e_DPAA_SWPORTAL20,
85237 +    e_DPAA_SWPORTAL21,
85238 +    e_DPAA_SWPORTAL22,
85239 +    e_DPAA_SWPORTAL23,
85240 +    e_DPAA_SWPORTAL24,
85241 +    e_DPAA_SWPORTAL_DUMMY_LAST
85242 +} e_DpaaSwPortal;
85243 +
85244 +/**************************************************************************//**
85245 + @Description   DPAA Direct Connect Portals Enumeration.
85246 +*//***************************************************************************/
85247 +typedef enum
85248 +{
85249 +    e_DPAA_DCPORTAL0 = 0,
85250 +    e_DPAA_DCPORTAL1,
85251 +    e_DPAA_DCPORTAL2,
85252 +    e_DPAA_DCPORTAL_DUMMY_LAST
85253 +} e_DpaaDcPortal;
85254 +
85255 +#define DPAA_MAX_NUM_OF_SW_PORTALS      e_DPAA_SWPORTAL_DUMMY_LAST
85256 +#define DPAA_MAX_NUM_OF_DC_PORTALS      e_DPAA_DCPORTAL_DUMMY_LAST
85257 +
85258 +/*****************************************************************************
85259 + QMan INTEGRATION-SPECIFIC DEFINITIONS
85260 +******************************************************************************/
85261 +#define QM_MAX_NUM_OF_POOL_CHANNELS     15      /**< Total number of channels, dedicated and pool */
85262 +#define QM_MAX_NUM_OF_WQ                8       /**< Number of work queues per channel */
85263 +#define QM_MAX_NUM_OF_CGS               256     /**< Congestion groups number */
85264 +#define QM_MAX_NUM_OF_FQIDS             (16 * MEGABYTE)
85265 +                                                /**< FQIDs range - 24 bits */
85266 +
85267 +/**************************************************************************//**
85268 + @Description   Work Queue Channel assignments in QMan.
85269 +*//***************************************************************************/
85270 +typedef enum
85271 +{
85272 +    e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0,              /**< Dedicated channels serviced by software portals 0 to 24 */
85273 +    e_QM_FQ_CHANNEL_SWPORTAL1,
85274 +    e_QM_FQ_CHANNEL_SWPORTAL2,
85275 +    e_QM_FQ_CHANNEL_SWPORTAL3,
85276 +    e_QM_FQ_CHANNEL_SWPORTAL4,
85277 +    e_QM_FQ_CHANNEL_SWPORTAL5,
85278 +    e_QM_FQ_CHANNEL_SWPORTAL6,
85279 +    e_QM_FQ_CHANNEL_SWPORTAL7,
85280 +    e_QM_FQ_CHANNEL_SWPORTAL8,
85281 +    e_QM_FQ_CHANNEL_SWPORTAL9,
85282 +    e_QM_FQ_CHANNEL_SWPORTAL10,
85283 +    e_QM_FQ_CHANNEL_SWPORTAL11,
85284 +    e_QM_FQ_CHANNEL_SWPORTAL12,
85285 +    e_QM_FQ_CHANNEL_SWPORTAL13,
85286 +    e_QM_FQ_CHANNEL_SWPORTAL14,
85287 +    e_QM_FQ_CHANNEL_SWPORTAL15,
85288 +    e_QM_FQ_CHANNEL_SWPORTAL16,
85289 +    e_QM_FQ_CHANNEL_SWPORTAL17,
85290 +    e_QM_FQ_CHANNEL_SWPORTAL18,
85291 +    e_QM_FQ_CHANNEL_SWPORTAL19,
85292 +    e_QM_FQ_CHANNEL_SWPORTAL20,
85293 +    e_QM_FQ_CHANNEL_SWPORTAL21,
85294 +    e_QM_FQ_CHANNEL_SWPORTAL22,
85295 +    e_QM_FQ_CHANNEL_SWPORTAL23,
85296 +    e_QM_FQ_CHANNEL_SWPORTAL24,
85297 +
85298 +    e_QM_FQ_CHANNEL_POOL1 = 0x401,               /**< Pool channels that can be serviced by any of the software portals */
85299 +    e_QM_FQ_CHANNEL_POOL2,
85300 +    e_QM_FQ_CHANNEL_POOL3,
85301 +    e_QM_FQ_CHANNEL_POOL4,
85302 +    e_QM_FQ_CHANNEL_POOL5,
85303 +    e_QM_FQ_CHANNEL_POOL6,
85304 +    e_QM_FQ_CHANNEL_POOL7,
85305 +    e_QM_FQ_CHANNEL_POOL8,
85306 +    e_QM_FQ_CHANNEL_POOL9,
85307 +    e_QM_FQ_CHANNEL_POOL10,
85308 +    e_QM_FQ_CHANNEL_POOL11,
85309 +    e_QM_FQ_CHANNEL_POOL12,
85310 +    e_QM_FQ_CHANNEL_POOL13,
85311 +    e_QM_FQ_CHANNEL_POOL14,
85312 +    e_QM_FQ_CHANNEL_POOL15,
85313 +
85314 +    e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800,           /**< Dedicated channels serviced by Direct Connect Portal 0:
85315 +                                                      connected to FMan 0; assigned in incrementing order to
85316 +                                                      each sub-portal (SP) in the portal */
85317 +    e_QM_FQ_CHANNEL_FMAN0_SP1,
85318 +    e_QM_FQ_CHANNEL_FMAN0_SP2,
85319 +    e_QM_FQ_CHANNEL_FMAN0_SP3,
85320 +    e_QM_FQ_CHANNEL_FMAN0_SP4,
85321 +    e_QM_FQ_CHANNEL_FMAN0_SP5,
85322 +    e_QM_FQ_CHANNEL_FMAN0_SP6,
85323 +    e_QM_FQ_CHANNEL_FMAN0_SP7,
85324 +    e_QM_FQ_CHANNEL_FMAN0_SP8,
85325 +    e_QM_FQ_CHANNEL_FMAN0_SP9,
85326 +    e_QM_FQ_CHANNEL_FMAN0_SP10,
85327 +    e_QM_FQ_CHANNEL_FMAN0_SP11,
85328 +    e_QM_FQ_CHANNEL_FMAN0_SP12,
85329 +    e_QM_FQ_CHANNEL_FMAN0_SP13,
85330 +    e_QM_FQ_CHANNEL_FMAN0_SP14,
85331 +    e_QM_FQ_CHANNEL_FMAN0_SP15,
85332 +
85333 +    e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820,            /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */
85334 +    e_QM_FQ_CHANNEL_RMAN_SP1,
85335 +
85336 +    e_QM_FQ_CHANNEL_CAAM = 0x840                 /**< Dedicated channel serviced by Direct Connect Portal 2:
85337 +                                                      connected to SEC */
85338 +} e_QmFQChannel;
85339 +
85340 +/*****************************************************************************
85341 + BMan INTEGRATION-SPECIFIC DEFINITIONS
85342 +******************************************************************************/
85343 +#define BM_MAX_NUM_OF_POOLS         64          /**< Number of buffers pools */
85344 +
85345 +/*****************************************************************************
85346 + SEC INTEGRATION-SPECIFIC DEFINITIONS
85347 +******************************************************************************/
85348 +#define SEC_NUM_OF_DECOS            3
85349 +#define SEC_ALL_DECOS_MASK          0x00000003
85350 +
85351 +
85352 +/*****************************************************************************
85353 + FM INTEGRATION-SPECIFIC DEFINITIONS
85354 +******************************************************************************/
85355 +#define INTG_MAX_NUM_OF_FM          2
85356 +
85357 +/* Ports defines */
85358 +#define FM_MAX_NUM_OF_1G_MACS       6
85359 +#define FM_MAX_NUM_OF_10G_MACS      2
85360 +#define FM_MAX_NUM_OF_MACS          (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
85361 +#define FM_MAX_NUM_OF_OH_PORTS      6
85362 +
85363 +#define FM_MAX_NUM_OF_1G_RX_PORTS   FM_MAX_NUM_OF_1G_MACS
85364 +#define FM_MAX_NUM_OF_10G_RX_PORTS  FM_MAX_NUM_OF_10G_MACS
85365 +#define FM_MAX_NUM_OF_RX_PORTS      (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
85366 +
85367 +#define FM_MAX_NUM_OF_1G_TX_PORTS   FM_MAX_NUM_OF_1G_MACS
85368 +#define FM_MAX_NUM_OF_10G_TX_PORTS  FM_MAX_NUM_OF_10G_MACS
85369 +#define FM_MAX_NUM_OF_TX_PORTS      (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
85370 +
85371 +#define FM_PORT_MAX_NUM_OF_EXT_POOLS            4           /**< Number of external BM pools per Rx port */
85372 +#define FM_PORT_NUM_OF_CONGESTION_GRPS          256         /**< Total number of congestion groups in QM */
85373 +#define FM_MAX_NUM_OF_SUB_PORTALS               16
85374 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS   0
85375 +
85376 +#define FM_VSP_MAX_NUM_OF_ENTRIES               64
85377 +#define FM_MAX_NUM_OF_PFC_PRIORITIES            8
85378 +
85379 +/* RAMs defines */
85380 +#define FM_MURAM_SIZE                   (384 * KILOBYTE)
85381 +#define FM_IRAM_SIZE(major, minor)      (64 * KILOBYTE)
85382 +#define FM_NUM_OF_CTRL                  4
85383 +
85384 +/* PCD defines */
85385 +#define FM_PCD_PLCR_NUM_ENTRIES         256                 /**< Total number of policer profiles */
85386 +#define FM_PCD_KG_NUM_OF_SCHEMES        32                  /**< Total number of KG schemes */
85387 +#define FM_PCD_MAX_NUM_OF_CLS_PLANS     256                 /**< Number of classification plan entries. */
85388 +#define FM_PCD_PRS_SW_PATCHES_SIZE      0x00000600          /**< Number of bytes saved for patches */
85389 +#define FM_PCD_SW_PRS_SIZE              0x00000800          /**< Total size of SW parser area */
85390 +
85391 +/* RTC defines */
85392 +#define FM_RTC_NUM_OF_ALARMS            2                   /**< RTC number of alarms */
85393 +#define FM_RTC_NUM_OF_PERIODIC_PULSES   3                   /**< RTC number of periodic pulses */
85394 +#define FM_RTC_NUM_OF_EXT_TRIGGERS      2                   /**< RTC number of external triggers */
85395 +
85396 +/* QMI defines */
85397 +#define QMI_MAX_NUM_OF_TNUMS            64
85398 +#define QMI_DEF_TNUMS_THRESH            32
85399 +/* FPM defines */
85400 +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS  4
85401 +
85402 +/* DMA defines */
85403 +#define DMA_THRESH_MAX_COMMQ            83
85404 +#define DMA_THRESH_MAX_BUF              127
85405 +
85406 +/* BMI defines */
85407 +#define BMI_MAX_NUM_OF_TASKS            128
85408 +#define BMI_MAX_NUM_OF_DMAS             84
85409 +
85410 +#define BMI_MAX_FIFO_SIZE               (FM_MURAM_SIZE)
85411 +#define PORT_MAX_WEIGHT                 16
85412 +
85413 +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx)   TRUE
85414 +
85415 +/* Unique T4240 */
85416 +#define FM_OP_OPEN_DMA_MIN_LIMIT
85417 +#define FM_NO_RESTRICT_ON_ACCESS_RSRC
85418 +#define FM_NO_OP_OBSERVED_POOLS
85419 +#define FM_FRAME_END_PARAMS_FOR_OP
85420 +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
85421 +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION
85422 +
85423 +#define FM_NO_GUARANTEED_RESET_VALUES
85424 +
85425 +/* FM errata */
85426 +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
85427 +#define FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127
85428 +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
85429 +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
85430 +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
85431 +
85432 +#define FM_BCB_ERRATA_BMI_SW001
85433 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
85434 +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */
85435 +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */
85436 +
85437 +/*****************************************************************************
85438 + RMan INTEGRATION-SPECIFIC DEFINITIONS
85439 +******************************************************************************/
85440 +#define RM_MAX_NUM_OF_IB        4           /**< Number of inbound blocks */
85441 +#define RM_NUM_OF_IBCU          8           /**< NUmber of classification units in an inbound block */
85442 +
85443 +/* RMan erratas */
85444 +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756
85445 +
85446 +/*****************************************************************************
85447 + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
85448 +******************************************************************************/
85449 +#define NUM_OF_RX_SC                16
85450 +#define NUM_OF_TX_SC                16
85451 +
85452 +#define NUM_OF_SA_PER_RX_SC         2
85453 +#define NUM_OF_SA_PER_TX_SC         2
85454 +
85455 +#endif /* __DPAA_INTEGRATION_EXT_H */
85456 --- /dev/null
85457 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_ext.h
85458 @@ -0,0 +1,64 @@
85459 +/*
85460 + * Copyright 2012 Freescale Semiconductor Inc.
85461 + *
85462 + * Redistribution and use in source and binary forms, with or without
85463 + * modification, are permitted provided that the following conditions are met:
85464 + *     * Redistributions of source code must retain the above copyright
85465 + *       notice, this list of conditions and the following disclaimer.
85466 + *     * Redistributions in binary form must reproduce the above copyright
85467 + *       notice, this list of conditions and the following disclaimer in the
85468 + *       documentation and/or other materials provided with the distribution.
85469 + *     * Neither the name of Freescale Semiconductor nor the
85470 + *       names of its contributors may be used to endorse or promote products
85471 + *       derived from this software without specific prior written permission.
85472 + *
85473 + *
85474 + * ALTERNATIVELY, this software may be distributed under the terms of the
85475 + * GNU General Public License ("GPL") as published by the Free Software
85476 + * Foundation, either version 2 of that License or (at your option) any
85477 + * later version.
85478 + *
85479 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
85480 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
85481 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
85482 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
85483 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
85484 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
85485 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
85486 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
85487 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
85488 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85489 + */
85490 +
85491 +/**************************************************************************//**
85492 +
85493 + @File          part_ext.h
85494 +
85495 + @Description   Definitions for the part (integration) module.
85496 +*//***************************************************************************/
85497 +
85498 +#ifndef __PART_EXT_H
85499 +#define __PART_EXT_H
85500 +
85501 +#include "std_ext.h"
85502 +#include "part_integration_ext.h"
85503 +
85504 +#if !(defined(LS1043))
85505 +#error "unable to proceed without chip-definition"
85506 +#endif
85507 +
85508 +
85509 +/**************************************************************************//*
85510 + @Description   Part data structure - must be contained in any integration
85511 +                data structure.
85512 +*//***************************************************************************/
85513 +typedef struct t_Part
85514 +{
85515 +    uintptr_t   (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
85516 +                /**< Returns the address of the module's memory map base. */
85517 +    e_ModuleId  (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
85518 +                /**< Returns the module's ID according to its memory map base. */
85519 +} t_Part;
85520 +
85521 +
85522 +#endif /* __PART_EXT_H */
85523 --- /dev/null
85524 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_integration_ext.h
85525 @@ -0,0 +1,185 @@
85526 +/*
85527 + * Copyright 2008-2012 Freescale Semiconductor Inc.
85528 + *
85529 + * Redistribution and use in source and binary forms, with or without
85530 + * modification, are permitted provided that the following conditions are met:
85531 + *     * Redistributions of source code must retain the above copyright
85532 + *       notice, this list of conditions and the following disclaimer.
85533 + *     * Redistributions in binary form must reproduce the above copyright
85534 + *       notice, this list of conditions and the following disclaimer in the
85535 + *       documentation and/or other materials provided with the distribution.
85536 + *     * Neither the name of Freescale Semiconductor nor the
85537 + *       names of its contributors may be used to endorse or promote products
85538 + *       derived from this software without specific prior written permission.
85539 + *
85540 + *
85541 + * ALTERNATIVELY, this software may be distributed under the terms of the
85542 + * GNU General Public License ("GPL") as published by the Free Software
85543 + * Foundation, either version 2 of that License or (at your option) any
85544 + * later version.
85545 + *
85546 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
85547 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
85548 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
85549 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
85550 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
85551 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
85552 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
85553 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
85554 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
85555 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85556 + */
85557 +
85558 +/**
85559 +
85560 + @File          part_integration_ext.h
85561 +
85562 + @Description   T4240 external definitions and structures.
85563 +*//***************************************************************************/
85564 +#ifndef __PART_INTEGRATION_EXT_H
85565 +#define __PART_INTEGRATION_EXT_H
85566 +
85567 +#include "std_ext.h"
85568 +#include "ddr_std_ext.h"
85569 +#include "enet_ext.h"
85570 +#include "dpaa_integration_ext.h"
85571 +
85572 +
85573 +/**************************************************************************//**
85574 + @Group         T4240_chip_id T4240 Application Programming Interface
85575 +
85576 + @Description   T4240 Chip functions,definitions and enums.
85577 +
85578 + @{
85579 +*//***************************************************************************/
85580 +
85581 +#define INTG_MAX_NUM_OF_CORES   4
85582 +
85583 +/**************************************************************************//**
85584 + @Description   Module types.
85585 +*//***************************************************************************/
85586 +typedef enum e_ModuleId
85587 +{
85588 +    e_MODULE_ID_DUART_1 = 0,
85589 +    e_MODULE_ID_DUART_2,
85590 +    e_MODULE_ID_DUART_3,
85591 +    e_MODULE_ID_DUART_4,
85592 +    e_MODULE_ID_LAW,
85593 +    e_MODULE_ID_IFC,
85594 +    e_MODULE_ID_PAMU,
85595 +    e_MODULE_ID_QM,                 /**< Queue manager module */
85596 +    e_MODULE_ID_BM,                 /**< Buffer manager module */
85597 +    e_MODULE_ID_QM_CE_PORTAL_0,
85598 +    e_MODULE_ID_QM_CI_PORTAL_0,
85599 +    e_MODULE_ID_QM_CE_PORTAL_1,
85600 +    e_MODULE_ID_QM_CI_PORTAL_1,
85601 +    e_MODULE_ID_QM_CE_PORTAL_2,
85602 +    e_MODULE_ID_QM_CI_PORTAL_2,
85603 +    e_MODULE_ID_QM_CE_PORTAL_3,
85604 +    e_MODULE_ID_QM_CI_PORTAL_3,
85605 +    e_MODULE_ID_QM_CE_PORTAL_4,
85606 +    e_MODULE_ID_QM_CI_PORTAL_4,
85607 +    e_MODULE_ID_QM_CE_PORTAL_5,
85608 +    e_MODULE_ID_QM_CI_PORTAL_5,
85609 +    e_MODULE_ID_QM_CE_PORTAL_6,
85610 +    e_MODULE_ID_QM_CI_PORTAL_6,
85611 +    e_MODULE_ID_QM_CE_PORTAL_7,
85612 +    e_MODULE_ID_QM_CI_PORTAL_7,
85613 +    e_MODULE_ID_QM_CE_PORTAL_8,
85614 +    e_MODULE_ID_QM_CI_PORTAL_8,
85615 +    e_MODULE_ID_QM_CE_PORTAL_9,
85616 +    e_MODULE_ID_QM_CI_PORTAL_9,
85617 +    e_MODULE_ID_BM_CE_PORTAL_0,
85618 +    e_MODULE_ID_BM_CI_PORTAL_0,
85619 +    e_MODULE_ID_BM_CE_PORTAL_1,
85620 +    e_MODULE_ID_BM_CI_PORTAL_1,
85621 +    e_MODULE_ID_BM_CE_PORTAL_2,
85622 +    e_MODULE_ID_BM_CI_PORTAL_2,
85623 +    e_MODULE_ID_BM_CE_PORTAL_3,
85624 +    e_MODULE_ID_BM_CI_PORTAL_3,
85625 +    e_MODULE_ID_BM_CE_PORTAL_4,
85626 +    e_MODULE_ID_BM_CI_PORTAL_4,
85627 +    e_MODULE_ID_BM_CE_PORTAL_5,
85628 +    e_MODULE_ID_BM_CI_PORTAL_5,
85629 +    e_MODULE_ID_BM_CE_PORTAL_6,
85630 +    e_MODULE_ID_BM_CI_PORTAL_6,
85631 +    e_MODULE_ID_BM_CE_PORTAL_7,
85632 +    e_MODULE_ID_BM_CI_PORTAL_7,
85633 +    e_MODULE_ID_BM_CE_PORTAL_8,
85634 +    e_MODULE_ID_BM_CI_PORTAL_8,
85635 +    e_MODULE_ID_BM_CE_PORTAL_9,
85636 +    e_MODULE_ID_BM_CI_PORTAL_9,
85637 +    e_MODULE_ID_FM,                 /**< Frame manager module */
85638 +    e_MODULE_ID_FM_RTC,             /**< FM Real-Time-Clock */
85639 +    e_MODULE_ID_FM_MURAM,           /**< FM Multi-User-RAM */
85640 +    e_MODULE_ID_FM_BMI,             /**< FM BMI block */
85641 +    e_MODULE_ID_FM_QMI,             /**< FM QMI block */
85642 +    e_MODULE_ID_FM_PARSER,          /**< FM parser block */
85643 +    e_MODULE_ID_FM_PORT_HO1,        /**< FM Host-command/offline-parsing port block */
85644 +    e_MODULE_ID_FM_PORT_HO2,        /**< FM Host-command/offline-parsing port block */
85645 +    e_MODULE_ID_FM_PORT_HO3,        /**< FM Host-command/offline-parsing port block */
85646 +    e_MODULE_ID_FM_PORT_HO4,        /**< FM Host-command/offline-parsing port block */
85647 +    e_MODULE_ID_FM_PORT_HO5,        /**< FM Host-command/offline-parsing port block */
85648 +    e_MODULE_ID_FM_PORT_HO6,        /**< FM Host-command/offline-parsing port block */
85649 +    e_MODULE_ID_FM_PORT_HO7,        /**< FM Host-command/offline-parsing port block */
85650 +    e_MODULE_ID_FM_PORT_1GRx1,      /**< FM Rx 1G MAC port block */
85651 +    e_MODULE_ID_FM_PORT_1GRx2,      /**< FM Rx 1G MAC port block */
85652 +    e_MODULE_ID_FM_PORT_1GRx3,      /**< FM Rx 1G MAC port block */
85653 +    e_MODULE_ID_FM_PORT_1GRx4,      /**< FM Rx 1G MAC port block */
85654 +    e_MODULE_ID_FM_PORT_1GRx5,      /**< FM Rx 1G MAC port block */
85655 +    e_MODULE_ID_FM_PORT_1GRx6,      /**< FM Rx 1G MAC port block */
85656 +    e_MODULE_ID_FM_PORT_10GRx1,     /**< FM Rx 10G MAC port block */
85657 +    e_MODULE_ID_FM_PORT_10GRx2,     /**< FM Rx 10G MAC port block */
85658 +    e_MODULE_ID_FM_PORT_1GTx1,      /**< FM Tx 1G MAC port block */
85659 +    e_MODULE_ID_FM_PORT_1GTx2,      /**< FM Tx 1G MAC port block */
85660 +    e_MODULE_ID_FM_PORT_1GTx3,      /**< FM Tx 1G MAC port block */
85661 +    e_MODULE_ID_FM_PORT_1GTx4,      /**< FM Tx 1G MAC port block */
85662 +    e_MODULE_ID_FM_PORT_1GTx5,      /**< FM Tx 1G MAC port block */
85663 +    e_MODULE_ID_FM_PORT_1GTx6,      /**< FM Tx 1G MAC port block */
85664 +    e_MODULE_ID_FM_PORT_10GTx1,     /**< FM Tx 10G MAC port block */
85665 +    e_MODULE_ID_FM_PORT_10GTx2,     /**< FM Tx 10G MAC port block */
85666 +    e_MODULE_ID_FM_PLCR,            /**< FM Policer */
85667 +    e_MODULE_ID_FM_KG,              /**< FM Keygen */
85668 +    e_MODULE_ID_FM_DMA,             /**< FM DMA */
85669 +    e_MODULE_ID_FM_FPM,             /**< FM FPM */
85670 +    e_MODULE_ID_FM_IRAM,            /**< FM Instruction-RAM */
85671 +    e_MODULE_ID_FM_1GMDIO,          /**< FM 1G MDIO MAC */
85672 +    e_MODULE_ID_FM_10GMDIO,         /**< FM 10G MDIO */
85673 +    e_MODULE_ID_FM_PRS_IRAM,        /**< FM SW-parser Instruction-RAM */
85674 +    e_MODULE_ID_FM_1GMAC1,          /**< FM 1G MAC #1 */
85675 +    e_MODULE_ID_FM_1GMAC2,          /**< FM 1G MAC #2 */
85676 +    e_MODULE_ID_FM_1GMAC3,          /**< FM 1G MAC #3 */
85677 +    e_MODULE_ID_FM_1GMAC4,          /**< FM 1G MAC #4 */
85678 +    e_MODULE_ID_FM_1GMAC5,          /**< FM 1G MAC #5 */
85679 +    e_MODULE_ID_FM_1GMAC6,          /**< FM 1G MAC #6 */
85680 +    e_MODULE_ID_FM_10GMAC1,         /**< FM 10G MAC */
85681 +    e_MODULE_ID_FM_10GMAC2,         /**< FM 10G MAC */
85682 +
85683 +    e_MODULE_ID_SEC_GEN,            /**< SEC 4.0 General registers      */
85684 +    e_MODULE_ID_SEC_QI,             /**< SEC 4.0 QI registers           */
85685 +    e_MODULE_ID_SEC_JQ0,            /**< SEC 4.0 JQ-0 registers         */
85686 +    e_MODULE_ID_SEC_JQ1,            /**< SEC 4.0 JQ-1 registers         */
85687 +    e_MODULE_ID_SEC_JQ2,            /**< SEC 4.0 JQ-2 registers         */
85688 +    e_MODULE_ID_SEC_JQ3,            /**< SEC 4.0 JQ-3 registers         */
85689 +    e_MODULE_ID_SEC_RTIC,           /**< SEC 4.0 RTIC registers         */
85690 +    e_MODULE_ID_SEC_DECO0_CCB0,     /**< SEC 4.0 DECO-0/CCB-0 registers */
85691 +    e_MODULE_ID_SEC_DECO1_CCB1,     /**< SEC 4.0 DECO-1/CCB-1 registers */
85692 +    e_MODULE_ID_SEC_DECO2_CCB2,     /**< SEC 4.0 DECO-2/CCB-2 registers */
85693 +    e_MODULE_ID_SEC_DECO3_CCB3,     /**< SEC 4.0 DECO-3/CCB-3 registers */
85694 +    e_MODULE_ID_SEC_DECO4_CCB4,     /**< SEC 4.0 DECO-4/CCB-4 registers */
85695 +
85696 +    e_MODULE_ID_PIC,                /**< PIC */
85697 +    e_MODULE_ID_GPIO,               /**< GPIO */
85698 +    e_MODULE_ID_SERDES,             /**< SERDES */
85699 +    e_MODULE_ID_CPC_1,              /**< CoreNet-Platform-Cache 1 */
85700 +    e_MODULE_ID_CPC_2,              /**< CoreNet-Platform-Cache 2 */
85701 +
85702 +    e_MODULE_ID_SRIO_PORTS,         /**< RapidIO controller */
85703 +
85704 +    e_MODULE_ID_DUMMY_LAST
85705 +} e_ModuleId;
85706 +
85707 +#define NUM_OF_MODULES  e_MODULE_ID_DUMMY_LAST
85708 +
85709 +
85710 +#endif /* __PART_INTEGRATION_EXT_H */
85711 --- /dev/null
85712 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/dpaa_integration_ext.h
85713 @@ -0,0 +1,213 @@
85714 +/*
85715 + * Copyright 2008-2012 Freescale Semiconductor Inc.
85716 + *
85717 + * Redistribution and use in source and binary forms, with or without
85718 + * modification, are permitted provided that the following conditions are met:
85719 + *     * Redistributions of source code must retain the above copyright
85720 + *       notice, this list of conditions and the following disclaimer.
85721 + *     * Redistributions in binary form must reproduce the above copyright
85722 + *       notice, this list of conditions and the following disclaimer in the
85723 + *       documentation and/or other materials provided with the distribution.
85724 + *     * Neither the name of Freescale Semiconductor nor the
85725 + *       names of its contributors may be used to endorse or promote products
85726 + *       derived from this software without specific prior written permission.
85727 + *
85728 + *
85729 + * ALTERNATIVELY, this software may be distributed under the terms of the
85730 + * GNU General Public License ("GPL") as published by the Free Software
85731 + * Foundation, either version 2 of that License or (at your option) any
85732 + * later version.
85733 + *
85734 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
85735 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
85736 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
85737 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
85738 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
85739 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
85740 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
85741 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
85742 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
85743 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85744 + */
85745 +
85746 +
85747 +/**
85748 +
85749 + @File          dpaa_integration_ext.h
85750 +
85751 + @Description   P1023 FM external definitions and structures.
85752 +*//***************************************************************************/
85753 +#ifndef __DPAA_INTEGRATION_EXT_H
85754 +#define __DPAA_INTEGRATION_EXT_H
85755 +
85756 +#include "std_ext.h"
85757 +
85758 +
85759 +#define DPAA_VERSION    10
85760 +
85761 +typedef enum e_DpaaSwPortal {
85762 +    e_DPAA_SWPORTAL0 = 0,
85763 +    e_DPAA_SWPORTAL1,
85764 +    e_DPAA_SWPORTAL2,
85765 +    e_DPAA_SWPORTAL_DUMMY_LAST
85766 +} e_DpaaSwPortal;
85767 +
85768 +typedef enum {
85769 +    e_DPAA_DCPORTAL0 = 0,
85770 +    e_DPAA_DCPORTAL2,
85771 +    e_DPAA_DCPORTAL_DUMMY_LAST
85772 +} e_DpaaDcPortal;
85773 +
85774 +#define DPAA_MAX_NUM_OF_SW_PORTALS      e_DPAA_SWPORTAL_DUMMY_LAST
85775 +#define DPAA_MAX_NUM_OF_DC_PORTALS      e_DPAA_DCPORTAL_DUMMY_LAST
85776 +
85777 +/*****************************************************************************
85778 + QMAN INTEGRATION-SPECIFIC DEFINITIONS
85779 +******************************************************************************/
85780 +#define QM_MAX_NUM_OF_POOL_CHANNELS 3
85781 +#define QM_MAX_NUM_OF_WQ            8
85782 +#define QM_MAX_NUM_OF_SWP_AS        2
85783 +#define QM_MAX_NUM_OF_CGS           64
85784 +#define QM_MAX_NUM_OF_FQIDS         (16*MEGABYTE)
85785 +
85786 +typedef enum {
85787 +    e_QM_FQ_CHANNEL_SWPORTAL0 = 0,
85788 +    e_QM_FQ_CHANNEL_SWPORTAL1,
85789 +    e_QM_FQ_CHANNEL_SWPORTAL2,
85790 +
85791 +    e_QM_FQ_CHANNEL_POOL1 = 0x21,
85792 +    e_QM_FQ_CHANNEL_POOL2,
85793 +    e_QM_FQ_CHANNEL_POOL3,
85794 +
85795 +    e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x40,
85796 +    e_QM_FQ_CHANNEL_FMAN0_SP1,
85797 +    e_QM_FQ_CHANNEL_FMAN0_SP2,
85798 +    e_QM_FQ_CHANNEL_FMAN0_SP3,
85799 +    e_QM_FQ_CHANNEL_FMAN0_SP4,
85800 +    e_QM_FQ_CHANNEL_FMAN0_SP5,
85801 +    e_QM_FQ_CHANNEL_FMAN0_SP6,
85802 +
85803 +
85804 +    e_QM_FQ_CHANNEL_CAAM = 0x80
85805 +} e_QmFQChannel;
85806 +
85807 +/*****************************************************************************
85808 + BMAN INTEGRATION-SPECIFIC DEFINITIONS
85809 +******************************************************************************/
85810 +#define BM_MAX_NUM_OF_POOLS         8
85811 +
85812 +/*****************************************************************************
85813 + SEC INTEGRATION-SPECIFIC DEFINITIONS
85814 +******************************************************************************/
85815 +#define SEC_NUM_OF_DECOS    2
85816 +#define SEC_ALL_DECOS_MASK  0x00000003
85817 +#define SEC_RNGB
85818 +#define SEC_NO_ESP_TRAILER_REMOVAL
85819 +
85820 +/*****************************************************************************
85821 + FM INTEGRATION-SPECIFIC DEFINITIONS
85822 +******************************************************************************/
85823 +#define INTG_MAX_NUM_OF_FM          1
85824 +
85825 +/* Ports defines */
85826 +#define FM_MAX_NUM_OF_1G_MACS       2
85827 +#define FM_MAX_NUM_OF_10G_MACS      0
85828 +#define FM_MAX_NUM_OF_MACS          (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
85829 +#define FM_MAX_NUM_OF_OH_PORTS      5
85830 +
85831 +#define FM_MAX_NUM_OF_1G_RX_PORTS   FM_MAX_NUM_OF_1G_MACS
85832 +#define FM_MAX_NUM_OF_10G_RX_PORTS  FM_MAX_NUM_OF_10G_MACS
85833 +#define FM_MAX_NUM_OF_RX_PORTS      (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
85834 +
85835 +#define FM_MAX_NUM_OF_1G_TX_PORTS   FM_MAX_NUM_OF_1G_MACS
85836 +#define FM_MAX_NUM_OF_10G_TX_PORTS  FM_MAX_NUM_OF_10G_MACS
85837 +#define FM_MAX_NUM_OF_TX_PORTS      (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
85838 +
85839 +#define FM_MAX_NUM_OF_MACSECS       1
85840 +
85841 +#define FM_MACSEC_SUPPORT
85842 +
85843 +#define FM_LOW_END_RESTRICTION      /* prevents the use of TX port 1 with OP port 0 */
85844 +
85845 +#define FM_PORT_MAX_NUM_OF_EXT_POOLS            4           /**< Number of external BM pools per Rx port */
85846 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS   2           /**< Number of Offline parsing port external BM pools per Rx port */
85847 +#define FM_PORT_NUM_OF_CONGESTION_GRPS          32          /**< Total number of congestion groups in QM */
85848 +#define FM_MAX_NUM_OF_SUB_PORTALS               7
85849 +
85850 +/* Rams defines */
85851 +#define FM_MURAM_SIZE                   (64*KILOBYTE)
85852 +#define FM_IRAM_SIZE(major, minor)      (32 * KILOBYTE)
85853 +#define FM_NUM_OF_CTRL                  2
85854 +
85855 +/* PCD defines */
85856 +#define FM_PCD_PLCR_NUM_ENTRIES         32                  /**< Total number of policer profiles */
85857 +#define FM_PCD_KG_NUM_OF_SCHEMES        16                  /**< Total number of KG schemes */
85858 +#define FM_PCD_MAX_NUM_OF_CLS_PLANS     128                 /**< Number of classification plan entries. */
85859 +#define FM_PCD_PRS_SW_PATCHES_SIZE      0x00000240          /**< Number of bytes saved for patches */
85860 +#define FM_PCD_SW_PRS_SIZE              0x00000800          /**< Total size of SW parser area */
85861 +
85862 +/* RTC defines */
85863 +#define FM_RTC_NUM_OF_ALARMS            2
85864 +#define FM_RTC_NUM_OF_PERIODIC_PULSES   2
85865 +#define FM_RTC_NUM_OF_EXT_TRIGGERS      2
85866 +
85867 +/* QMI defines */
85868 +#define QMI_MAX_NUM_OF_TNUMS            15
85869 +
85870 +/* FPM defines */
85871 +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS  4
85872 +
85873 +/* DMA defines */
85874 +#define DMA_THRESH_MAX_COMMQ            15
85875 +#define DMA_THRESH_MAX_BUF              7
85876 +
85877 +/* BMI defines */
85878 +#define BMI_MAX_NUM_OF_TASKS            64
85879 +#define BMI_MAX_NUM_OF_DMAS             16
85880 +#define BMI_MAX_FIFO_SIZE              (FM_MURAM_SIZE)
85881 +#define PORT_MAX_WEIGHT                 4
85882 +
85883 +/*****************************************************************************
85884 + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
85885 +******************************************************************************/
85886 +#define NUM_OF_RX_SC                16
85887 +#define NUM_OF_TX_SC                16
85888 +
85889 +#define NUM_OF_SA_PER_RX_SC         2
85890 +#define NUM_OF_SA_PER_TX_SC         2
85891 +
85892 +/**************************************************************************//**
85893 + @Description   Enum for inter-module interrupts registration
85894 +*//***************************************************************************/
85895 +
85896 +/* 1023 unique features */
85897 +#define FM_QMI_NO_ECC_EXCEPTIONS
85898 +#define FM_CSI_CFED_LIMIT
85899 +#define FM_PEDANTIC_DMA
85900 +#define FM_QMI_NO_DEQ_OPTIONS_SUPPORT
85901 +#define FM_FIFO_ALLOCATION_ALG
85902 +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
85903 +#define FM_HAS_TOTAL_DMAS
85904 +#define FM_KG_NO_IPPID_SUPPORT
85905 +#define FM_NO_GUARANTEED_RESET_VALUES
85906 +#define FM_MAC_RESET
85907 +
85908 +/* FM erratas */
85909 +#define FM_RX_PREAM_4_ERRATA_DTSEC_A001
85910 +#define FM_MAGIC_PACKET_UNRECOGNIZED_ERRATA_DTSEC2      /* No implementation, Out of LLD scope */
85911 +
85912 +#define FM_DEBUG_TRACE_FMAN_A004                        /* No implementation, Out of LLD scope */
85913 +#define FM_INT_BUF_LEAK_FMAN_A005                       /* No implementation, Out of LLD scope. App must avoid S/G */
85914 +
85915 +#define FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839
85916 +
85917 +/* #define FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
85918 +
85919 +/*
85920 +TKT056919 - axi12axi0 can hang if read request follows the single byte write on the very next cycle
85921 +TKT038900 - FM dma lockup occur due to AXI slave protocol violation
85922 +*/
85923 +#define FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
85924 +
85925 +
85926 +#endif /* __DPAA_INTEGRATION_EXT_H */
85927 --- /dev/null
85928 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_ext.h
85929 @@ -0,0 +1,82 @@
85930 +/*
85931 + * Copyright 2008-2012 Freescale Semiconductor Inc.
85932 + *
85933 + * Redistribution and use in source and binary forms, with or without
85934 + * modification, are permitted provided that the following conditions are met:
85935 + *     * Redistributions of source code must retain the above copyright
85936 + *       notice, this list of conditions and the following disclaimer.
85937 + *     * Redistributions in binary form must reproduce the above copyright
85938 + *       notice, this list of conditions and the following disclaimer in the
85939 + *       documentation and/or other materials provided with the distribution.
85940 + *     * Neither the name of Freescale Semiconductor nor the
85941 + *       names of its contributors may be used to endorse or promote products
85942 + *       derived from this software without specific prior written permission.
85943 + *
85944 + *
85945 + * ALTERNATIVELY, this software may be distributed under the terms of the
85946 + * GNU General Public License ("GPL") as published by the Free Software
85947 + * Foundation, either version 2 of that License or (at your option) any
85948 + * later version.
85949 + *
85950 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
85951 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
85952 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
85953 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
85954 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
85955 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
85956 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
85957 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
85958 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
85959 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85960 + */
85961 +
85962 +
85963 +/**************************************************************************//**
85964 +
85965 + @File          part_ext.h
85966 +
85967 + @Description   Definitions for the part (integration) module.
85968 +*//***************************************************************************/
85969 +
85970 +#ifndef __PART_EXT_H
85971 +#define __PART_EXT_H
85972 +
85973 +#include "std_ext.h"
85974 +#include "part_integration_ext.h"
85975 +
85976 +
85977 +#if !(defined(MPC8306) || \
85978 +      defined(MPC8309) || \
85979 +      defined(MPC834x) || \
85980 +      defined(MPC836x) || \
85981 +      defined(MPC832x) || \
85982 +      defined(MPC837x) || \
85983 +      defined(MPC8568) || \
85984 +      defined(MPC8569) || \
85985 +      defined(P1020)   || \
85986 +      defined(P1021)   || \
85987 +      defined(P1022)   || \
85988 +      defined(P1023)   || \
85989 +      defined(P2020)   || \
85990 +      defined(P3041)   || \
85991 +      defined(P4080)   || \
85992 +      defined(P5020)   || \
85993 +      defined(MSC814x))
85994 +#error "unable to proceed without chip-definition"
85995 +#endif
85996 +
85997 +
85998 +/**************************************************************************//*
85999 + @Description   Part data structure - must be contained in any integration
86000 +                data structure.
86001 +*//***************************************************************************/
86002 +typedef struct t_Part
86003 +{
86004 +    uint64_t    (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
86005 +                /**< Returns the address of the module's memory map base. */
86006 +    e_ModuleId  (* f_GetModuleIdByBase)(t_Handle h_Part, uint64_t baseAddress);
86007 +                /**< Returns the module's ID according to its memory map base. */
86008 +} t_Part;
86009 +
86010 +
86011 +#endif /* __PART_EXT_H */
86012 --- /dev/null
86013 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_integration_ext.h
86014 @@ -0,0 +1,635 @@
86015 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
86016 + * All rights reserved.
86017 + *
86018 + * Redistribution and use in source and binary forms, with or without
86019 + * modification, are permitted provided that the following conditions are met:
86020 + *     * Redistributions of source code must retain the above copyright
86021 + *       notice, this list of conditions and the following disclaimer.
86022 + *     * Redistributions in binary form must reproduce the above copyright
86023 + *       notice, this list of conditions and the following disclaimer in the
86024 + *       documentation and/or other materials provided with the distribution.
86025 + *     * Neither the name of Freescale Semiconductor nor the
86026 + *       names of its contributors may be used to endorse or promote products
86027 + *       derived from this software without specific prior written permission.
86028 + *
86029 + *
86030 + * ALTERNATIVELY, this software may be distributed under the terms of the
86031 + * GNU General Public License ("GPL") as published by the Free Software
86032 + * Foundation, either version 2 of that License or (at your option) any
86033 + * later version.
86034 + *
86035 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
86036 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
86037 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
86038 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
86039 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
86040 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
86041 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
86042 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
86043 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
86044 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
86045 + */
86046 +
86047 +/**************************************************************************//**
86048 + @File          part_integration_ext.h
86049 +
86050 + @Description   P1023 external definitions and structures.
86051 +*//***************************************************************************/
86052 +#ifndef __PART_INTEGRATION_EXT_H
86053 +#define __PART_INTEGRATION_EXT_H
86054 +
86055 +#include "std_ext.h"
86056 +#include "dpaa_integration_ext.h"
86057 +
86058 +
86059 +/**************************************************************************//**
86060 + @Group         1023_chip_id P1023 Application Programming Interface
86061 +
86062 + @Description   P1023 Chip functions,definitions and enums.
86063 +
86064 + @{
86065 +*//***************************************************************************/
86066 +
86067 +#define INTG_MAX_NUM_OF_CORES   2
86068 +
86069 +
86070 +/**************************************************************************//**
86071 + @Description   Module types.
86072 +*//***************************************************************************/
86073 +typedef enum e_ModuleId
86074 +{
86075 +    e_MODULE_ID_LAW,            /**< Local Access module                     */
86076 +    e_MODULE_ID_ECM,            /**< e500 Coherency Module                   */
86077 +    e_MODULE_ID_DDR,            /**< DDR memory controller                   */
86078 +    e_MODULE_ID_I2C_1,          /**< I2C 1                                   */
86079 +    e_MODULE_ID_I2C_2,          /**< I2C 1                                   */
86080 +    e_MODULE_ID_DUART_1,        /**< DUART module 1                          */
86081 +    e_MODULE_ID_DUART_2,        /**< DUART module 2                          */
86082 +    e_MODULE_ID_LBC,            /**< Local bus memory controller module      */
86083 +    e_MODULE_ID_PCIE_1,         /**< PCI Express 1 controller module         */
86084 +    e_MODULE_ID_PCIE_ATMU_1,    /**< PCI 1 ATMU Window                       */
86085 +    e_MODULE_ID_PCIE_2,         /**< PCI Express 2 controller module         */
86086 +    e_MODULE_ID_PCIE_ATMU_2,    /**< PCI 2 ATMU Window                       */
86087 +    e_MODULE_ID_PCIE_3,         /**< PCI Express 3 controller module         */
86088 +    e_MODULE_ID_PCIE_ATMU_3,    /**< PCI 3 ATMU Window                       */
86089 +    e_MODULE_ID_MSI,            /**< MSI registers                           */
86090 +    e_MODULE_ID_L2_SRAM,        /**< L2/SRAM Memory-Mapped controller module */
86091 +    e_MODULE_ID_DMA_1,          /**< DMA controller 1                        */
86092 +    e_MODULE_ID_DMA_2,          /**< DMA controller 2                        */
86093 +    e_MODULE_ID_EPIC,           /**< Programmable interrupt controller       */
86094 +    e_MODULE_ID_ESPI,           /**< ESPI module                             */
86095 +    e_MODULE_ID_GPIO,           /**< General Purpose I/O                     */
86096 +    e_MODULE_ID_SEC_GEN,        /**< SEC 4.0 General registers               */
86097 +    e_MODULE_ID_SEC_QI,         /**< SEC 4.0 QI registers                    */
86098 +    e_MODULE_ID_SEC_JQ0,        /**< SEC 4.0 JQ-0 registers                  */
86099 +    e_MODULE_ID_SEC_JQ1,        /**< SEC 4.0 JQ-1 registers                  */
86100 +    e_MODULE_ID_SEC_JQ2,        /**< SEC 4.0 JQ-2 registers                  */
86101 +    e_MODULE_ID_SEC_JQ3,        /**< SEC 4.0 JQ-3 registers                  */
86102 +    e_MODULE_ID_SEC_RTIC,       /**< SEC 4.0 RTIC registers                  */
86103 +    e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers          */
86104 +    e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers          */
86105 +    e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers          */
86106 +    e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers          */
86107 +    e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers          */
86108 +    e_MODULE_ID_USB_DR_1,       /**< USB 2.0 module 1                        */
86109 +    e_MODULE_ID_USB_DR_2,       /**< USB 2.0 module 2                        */
86110 +    e_MODULE_ID_ETSEC_MII_MNG,  /**< MII MNG registers                       */
86111 +    e_MODULE_ID_ETSEC_1,        /**< ETSEC module 1                             */
86112 +    e_MODULE_ID_ETSEC_2,        /**< ETSEC module 2                             */
86113 +    e_MODULE_ID_GUTS,           /**< Serial DMA                              */
86114 +    e_MODULE_ID_PM,             /**< Performance Monitor module              */
86115 +    e_MODULE_ID_QM,                 /**< Queue manager module */
86116 +    e_MODULE_ID_BM,                 /**< Buffer manager module */
86117 +    e_MODULE_ID_QM_CE_PORTAL,
86118 +    e_MODULE_ID_QM_CI_PORTAL,
86119 +    e_MODULE_ID_BM_CE_PORTAL,
86120 +    e_MODULE_ID_BM_CI_PORTAL,
86121 +    e_MODULE_ID_FM,                /**< Frame manager #1 module */
86122 +    e_MODULE_ID_FM_RTC,            /**< FM Real-Time-Clock */
86123 +    e_MODULE_ID_FM_MURAM,          /**< FM Multi-User-RAM */
86124 +    e_MODULE_ID_FM_BMI,            /**< FM BMI block */
86125 +    e_MODULE_ID_FM_QMI,            /**< FM QMI block */
86126 +    e_MODULE_ID_FM_PRS,            /**< FM parser block */
86127 +    e_MODULE_ID_FM_PORT_HO0,       /**< FM Host-command/offline-parsing port block */
86128 +    e_MODULE_ID_FM_PORT_HO1,       /**< FM Host-command/offline-parsing port block */
86129 +    e_MODULE_ID_FM_PORT_HO2,       /**< FM Host-command/offline-parsing port block */
86130 +    e_MODULE_ID_FM_PORT_HO3,       /**< FM Host-command/offline-parsing port block */
86131 +    e_MODULE_ID_FM_PORT_HO4,       /**< FM Host-command/offline-parsing port block */
86132 +    e_MODULE_ID_FM_PORT_1GRx0,     /**< FM Rx 1G MAC port block */
86133 +    e_MODULE_ID_FM_PORT_1GRx1,     /**< FM Rx 1G MAC port block */
86134 +    e_MODULE_ID_FM_PORT_1GTx0,     /**< FM Tx 1G MAC port block */
86135 +    e_MODULE_ID_FM_PORT_1GTx1,     /**< FM Tx 1G MAC port block */
86136 +    e_MODULE_ID_FM_PLCR,           /**< FM Policer */
86137 +    e_MODULE_ID_FM_KG,             /**< FM Keygen */
86138 +    e_MODULE_ID_FM_DMA,            /**< FM DMA */
86139 +    e_MODULE_ID_FM_FPM,            /**< FM FPM */
86140 +    e_MODULE_ID_FM_IRAM,           /**< FM Instruction-RAM */
86141 +    e_MODULE_ID_FM_1GMDIO0,        /**< FM 1G MDIO MAC 0*/
86142 +    e_MODULE_ID_FM_1GMDIO1,        /**< FM 1G MDIO MAC 1*/
86143 +    e_MODULE_ID_FM_PRS_IRAM,       /**< FM SW-parser Instruction-RAM */
86144 +    e_MODULE_ID_FM_RISC0,          /**< FM risc #0 */
86145 +    e_MODULE_ID_FM_RISC1,          /**< FM risc #1 */
86146 +    e_MODULE_ID_FM_1GMAC0,         /**< FM 1G MAC #0 */
86147 +    e_MODULE_ID_FM_1GMAC1,         /**< FM 1G MAC #1 */
86148 +    e_MODULE_ID_FM_MACSEC,         /**< FM MACSEC */
86149 +
86150 +    e_MODULE_ID_DUMMY_LAST
86151 +} e_ModuleId;
86152 +
86153 +#define NUM_OF_MODULES  e_MODULE_ID_DUMMY_LAST
86154 +
86155 +
86156 +#define P1023_OFFSET_LAW                    0x00000C08
86157 +#define P1023_OFFSET_ECM                    0x00001000
86158 +#define P1023_OFFSET_DDR                    0x00002000
86159 +#define P1023_OFFSET_I2C1                   0x00003000
86160 +#define P1023_OFFSET_I2C2                   0x00003100
86161 +#define P1023_OFFSET_DUART1                 0x00004500
86162 +#define P1023_OFFSET_DUART2                 0x00004600
86163 +#define P1023_OFFSET_LBC                    0x00005000
86164 +#define P1023_OFFSET_ESPI                   0x00007000
86165 +#define P1023_OFFSET_PCIE2                  0x00009000
86166 +#define P1023_OFFSET_PCIE2_ATMU             0x00009C00
86167 +#define P1023_OFFSET_PCIE1                  0x0000A000
86168 +#define P1023_OFFSET_PCIE1_ATMU             0x0000AC00
86169 +#define P1023_OFFSET_PCIE3                  0x0000B000
86170 +#define P1023_OFFSET_PCIE3_ATMU             0x0000BC00
86171 +#define P1023_OFFSET_DMA2                   0x0000C100
86172 +#define P1023_OFFSET_GPIO                   0x0000F000
86173 +#define P1023_OFFSET_L2_SRAM                0x00020000
86174 +#define P1023_OFFSET_DMA1                   0x00021100
86175 +#define P1023_OFFSET_USB1                   0x00022000
86176 +#define P1023_OFFSET_SEC_GEN                0x00030000
86177 +#define P1023_OFFSET_SEC_JQ0                0x00031000
86178 +#define P1023_OFFSET_SEC_JQ1                0x00032000
86179 +#define P1023_OFFSET_SEC_JQ2                0x00033000
86180 +#define P1023_OFFSET_SEC_JQ3                0x00034000
86181 +#define P1023_OFFSET_SEC_RTIC               0x00036000
86182 +#define P1023_OFFSET_SEC_QI                 0x00037000
86183 +#define P1023_OFFSET_SEC_DECO0_CCB0         0x00038000
86184 +#define P1023_OFFSET_SEC_DECO1_CCB1         0x00039000
86185 +#define P1023_OFFSET_SEC_DECO2_CCB2         0x0003a000
86186 +#define P1023_OFFSET_SEC_DECO3_CCB3         0x0003b000
86187 +#define P1023_OFFSET_SEC_DECO4_CCB4         0x0003c000
86188 +#define P1023_OFFSET_PIC                    0x00040000
86189 +#define P1023_OFFSET_MSI                    0x00041600
86190 +#define P1023_OFFSET_AXI                    0x00081000
86191 +#define P1023_OFFSET_QM                     0x00088000
86192 +#define P1023_OFFSET_BM                     0x0008A000
86193 +#define P1022_OFFSET_PM                     0x000E1000
86194 +
86195 +#define P1023_OFFSET_GUTIL                  0x000E0000
86196 +#define P1023_OFFSET_PM                     0x000E1000
86197 +#define P1023_OFFSET_DEBUG                  0x000E2000
86198 +#define P1023_OFFSET_SERDES                 0x000E3000
86199 +#define P1023_OFFSET_ROM                    0x000F0000
86200 +#define P1023_OFFSET_FM                     0x00100000
86201 +
86202 +#define P1023_OFFSET_FM_MURAM               (P1023_OFFSET_FM + 0x00000000)
86203 +#define P1023_OFFSET_FM_BMI                 (P1023_OFFSET_FM + 0x00080000)
86204 +#define P1023_OFFSET_FM_QMI                 (P1023_OFFSET_FM + 0x00080400)
86205 +#define P1023_OFFSET_FM_PRS                 (P1023_OFFSET_FM + 0x00080800)
86206 +#define P1023_OFFSET_FM_PORT_HO0            (P1023_OFFSET_FM + 0x00081000)
86207 +#define P1023_OFFSET_FM_PORT_HO1            (P1023_OFFSET_FM + 0x00082000)
86208 +#define P1023_OFFSET_FM_PORT_HO2            (P1023_OFFSET_FM + 0x00083000)
86209 +#define P1023_OFFSET_FM_PORT_HO3            (P1023_OFFSET_FM + 0x00084000)
86210 +#define P1023_OFFSET_FM_PORT_HO4            (P1023_OFFSET_FM + 0x00085000)
86211 +#define P1023_OFFSET_FM_PORT_1GRX0          (P1023_OFFSET_FM + 0x00088000)
86212 +#define P1023_OFFSET_FM_PORT_1GRX1          (P1023_OFFSET_FM + 0x00089000)
86213 +#define P1023_OFFSET_FM_PORT_1GTX0          (P1023_OFFSET_FM + 0x000A8000)
86214 +#define P1023_OFFSET_FM_PORT_1GTX1          (P1023_OFFSET_FM + 0x000A9000)
86215 +#define P1023_OFFSET_FM_PLCR                (P1023_OFFSET_FM + 0x000C0000)
86216 +#define P1023_OFFSET_FM_KG                  (P1023_OFFSET_FM + 0x000C1000)
86217 +#define P1023_OFFSET_FM_DMA                 (P1023_OFFSET_FM + 0x000C2000)
86218 +#define P1023_OFFSET_FM_FPM                 (P1023_OFFSET_FM + 0x000C3000)
86219 +#define P1023_OFFSET_FM_IRAM                (P1023_OFFSET_FM + 0x000C4000)
86220 +#define P1023_OFFSET_FM_PRS_IRAM            (P1023_OFFSET_FM + 0x000C7000)
86221 +#define P1023_OFFSET_FM_RISC0               (P1023_OFFSET_FM + 0x000D0000)
86222 +#define P1023_OFFSET_FM_RISC1               (P1023_OFFSET_FM + 0x000D0400)
86223 +#define P1023_OFFSET_FM_MACSEC              (P1023_OFFSET_FM + 0x000D8000)
86224 +#define P1023_OFFSET_FM_1GMAC0              (P1023_OFFSET_FM + 0x000E0000)
86225 +#define P1023_OFFSET_FM_1GMDIO0             (P1023_OFFSET_FM + 0x000E1120)
86226 +#define P1023_OFFSET_FM_1GMAC1              (P1023_OFFSET_FM + 0x000E2000)
86227 +#define P1023_OFFSET_FM_1GMDIO1             (P1023_OFFSET_FM + 0x000E3000)
86228 +#define P1023_OFFSET_FM_RTC                 (P1023_OFFSET_FM + 0x000FE000)
86229 +
86230 +/* Offsets relative to QM or BM portals base */
86231 +#define P1023_OFFSET_PORTALS_CE_AREA        0x00000000        /* cache enabled area */
86232 +#define P1023_OFFSET_PORTALS_CI_AREA        0x00100000        /* cache inhibited area */
86233 +
86234 +#define P1023_OFFSET_PORTALS_CE(portal)     (P1023_OFFSET_PORTALS_CE_AREA + 0x4000 * (portal))
86235 +#define P1023_OFFSET_PORTALS_CI(portal)     (P1023_OFFSET_PORTALS_CI_AREA + 0x1000 * (portal))
86236 +
86237 +/**************************************************************************//**
86238 + @Description   Transaction source ID (for memory controllers error reporting).
86239 +*//***************************************************************************/
86240 +typedef enum e_TransSrc
86241 +{
86242 +    e_TRANS_SRC_PCIE_2          = 0x01, /**< PCIe port 2                    */
86243 +    e_TRANS_SRC_PCIE_1          = 0x02, /**< PCIe port 1                    */
86244 +    e_TRANS_SRC_PCIE_3          = 0x03, /**< PCIe port 3                    */
86245 +    e_TRANS_SRC_LBC             = 0x04, /**< Enhanced local bus             */
86246 +    e_TRANS_SRC_DPAA_SW_PORTALS = 0x0E, /**< DPAA software portals or SRAM  */
86247 +    e_TRANS_SRC_DDR             = 0x0F, /**< DDR controller                 */
86248 +    e_TRANS_SRC_CORE_INS_FETCH  = 0x10, /**< Processor (instruction)        */
86249 +    e_TRANS_SRC_CORE_DATA       = 0x11, /**< Processor (data)               */
86250 +    e_TRANS_SRC_DMA             = 0x15  /**< DMA                            */
86251 +} e_TransSrc;
86252 +
86253 +/**************************************************************************//**
86254 + @Description   Local Access Window Target interface ID
86255 +*//***************************************************************************/
86256 +typedef enum e_P1023LawTargetId
86257 +{
86258 +    e_P1023_LAW_TARGET_PCIE_2       = 0x01, /**< PCI Express 2 target interface */
86259 +    e_P1023_LAW_TARGET_PCIE_1       = 0x02, /**< PCI Express 1 target interface */
86260 +    e_P1023_LAW_TARGET_PCIE_3       = 0x03, /**< PCI Express 3 target interface */
86261 +    e_P1023_LAW_TARGET_LBC          = 0x04, /**< Local bus target interface */
86262 +    e_P1023_LAW_TARGET_QM_PORTALS   = 0x0E, /**< Queue Manager Portals */
86263 +    e_P1023_LAW_TARGET_BM_PORTALS   = 0x0E, /**< Buffer Manager Portals */
86264 +    e_P1023_LAW_TARGET_SRAM         = 0x0E, /**< SRAM scratchpad */
86265 +    e_P1023_LAW_TARGET_DDR          = 0x0F, /**< DDR target interface */
86266 +    e_P1023_LAW_TARGET_NONE         = 0xFF  /**< Invalid target interface */
86267 +} e_P1023LawTargetId;
86268 +
86269 +
86270 +/**************************************************************************//**
86271 + @Group         1023_init_grp P1023 Initialization Unit
86272 +
86273 + @Description   P1023 initialization unit API functions, definitions and enums
86274 +
86275 + @{
86276 +*//***************************************************************************/
86277 +
86278 +/**************************************************************************//**
86279 + @Description   Part ID and revision number
86280 +*//***************************************************************************/
86281 +typedef enum e_P1023DeviceName
86282 +{
86283 +    e_P1023_REV_INVALID     = 0x00000000,       /**< Invalid revision */
86284 +    e_SC1023_REV_1_0        = (int)0x80FC0010,  /**< SC1023 rev 1.0 */
86285 +    e_SC1023_REV_1_1        = (int)0x80FC0011,  /**< SC1023 rev 1.1 */
86286 +    e_P1023_REV_1_0         = (int)0x80FE0010,  /**< P1023 rev 1.0 with security */
86287 +    e_P1023_REV_1_1         = (int)0x80FE0011,  /**< P1023 rev 1.1 with security */
86288 +    e_P1017_REV_1_1         = (int)0x80FF0011,  /**< P1017 rev 1.1 with security */
86289 +    e_P1023_REV_1_0_NO_SEC  = (int)0x80F60010,  /**< P1023 rev 1.0 without security */
86290 +    e_P1023_REV_1_1_NO_SEC  = (int)0x80F60011,  /**< P1023 rev 1.1 without security */
86291 +    e_P1017_REV_1_1_NO_SEC  = (int)0x80F70011   /**< P1017 rev 1.1 without security */
86292 +} e_P1023DeviceName;
86293 +
86294 +/**************************************************************************//**
86295 + @Description   structure representing P1023 initialization parameters
86296 +*//***************************************************************************/
86297 +typedef struct t_P1023Params
86298 +{
86299 +    uintptr_t   ccsrBaseAddress;        /**< CCSR base address (virtual) */
86300 +    uintptr_t   bmPortalsBaseAddress;   /**< Portals base address (virtual) */
86301 +    uintptr_t   qmPortalsBaseAddress;   /**< Portals base address (virtual) */
86302 +} t_P1023Params;
86303 +
86304 +/**************************************************************************//**
86305 + @Function      P1023_ConfigAndInit
86306 +
86307 + @Description   General initiation of the chip registers.
86308 +
86309 + @Param[in]     p_P1023Params  - A pointer to data structure of parameters
86310 +
86311 + @Return        A handle to the P1023 data structure.
86312 +*//***************************************************************************/
86313 +t_Handle P1023_ConfigAndInit(t_P1023Params *p_P1023Params);
86314 +
86315 +/**************************************************************************//**
86316 + @Function      P1023_Free
86317 +
86318 + @Description   Free all resources.
86319 +
86320 + @Param         h_P1023 - (In) The handle of the initialized P1023 object.
86321 +
86322 + @Return        E_OK on success; Other value otherwise.
86323 +*//***************************************************************************/
86324 +t_Error P1023_Free(t_Handle h_P1023);
86325 +
86326 +/**************************************************************************//**
86327 + @Function      P1023_GetRevInfo
86328 +
86329 + @Description   This routine enables access to chip and revision information.
86330 +
86331 + @Param[in]     gutilBase       - Base address of P1023 GUTIL registers.
86332 +
86333 + @Return        Part ID and revision.
86334 +*//***************************************************************************/
86335 +e_P1023DeviceName P1023_GetRevInfo(uintptr_t gutilBase);
86336 +
86337 +/**************************************************************************//**
86338 + @Function      P1023_GetE500Factor
86339 +
86340 + @Description   Returns E500 core clock multiplication factor.
86341 +
86342 + @Param[in]     gutilBase       - Base address of P1023 GUTIL registers.
86343 + @Param[in]     coreId          - Id of the requested core.
86344 + @Param[out]    p_E500MulFactor - Returns E500 to CCB multification factor.
86345 + @Param[out]    p_E500DivFactor - Returns E500 to CCB division factor.
86346 +
86347 + @Return        E_OK on success; Other value otherwise.
86348 +*
86349 +*//***************************************************************************/
86350 +t_Error P1023_GetE500Factor(uintptr_t    gutilBase,
86351 +                            uint32_t    coreId,
86352 +                            uint32_t    *p_E500MulFactor,
86353 +                            uint32_t    *p_E500DivFactor);
86354 +
86355 +/**************************************************************************//**
86356 + @Function      P1023_GetFmFactor
86357 +
86358 + @Description   returns FM multiplication factors. (This value is returned using
86359 +                two parameters to avoid using float parameter).
86360 +
86361 + @Param[in]     gutilBase       - Base address of P1023 GUTIL registers.
86362 + @Param[out]    p_FmMulFactor   - returns E500 to CCB multification factor.
86363 + @Param[out]    p_FmDivFactor   - returns E500 to CCB division factor.
86364 +
86365 + @Return        E_OK on success; Other value otherwise.
86366 +*//***************************************************************************/
86367 +t_Error  P1023_GetFmFactor(uintptr_t gutilBase, uint32_t *p_FmMulFactor, uint32_t *p_FmDivFactor);
86368 +
86369 +/**************************************************************************//**
86370 + @Function      P1023_GetCcbFactor
86371 +
86372 + @Description   returns system multiplication factor.
86373 +
86374 + @Param[in]     gutilBase       - Base address of P1023 GUTIL registers.
86375 +
86376 + @Return        System multiplication factor.
86377 +*//***************************************************************************/
86378 +uint32_t P1023_GetCcbFactor(uintptr_t gutilBase);
86379 +
86380 +#if 0
86381 +/**************************************************************************//**
86382 + @Function      P1023_GetDdrFactor
86383 +
86384 + @Description   returns the multiplication factor of the clock in for the DDR clock .
86385 +                Note: assumes the ddr_in_clk is identical to the sys_in_clk
86386 +
86387 + @Param[in]     gutilBase       - Base address of P1023 GUTIL registers.
86388 + @Param         p_DdrMulFactor  - returns DDR in clk multification factor.
86389 + @Param         p_DdrDivFactor  - returns DDR division factor.
86390 +
86391 + @Return        E_OK on success; Other value otherwise..
86392 +*//***************************************************************************/
86393 +t_Error P1023_GetDdrFactor( uintptr_t   gutilBase,
86394 +                            uint32_t    *p_DdrMulFactor,
86395 +                            uint32_t    *p_DdrDivFactor);
86396 +
86397 +/**************************************************************************//**
86398 + @Function      P1023_GetDdrType
86399 +
86400 + @Description   returns the multiplication factor of the clock in for the DDR clock .
86401 +
86402 + @Param[in]     gutilBase       - Base address of P1023 GUTIL registers.
86403 + @Param         p_DdrType   - (Out) returns DDR type DDR1/DDR2/DDR3.
86404 +
86405 + @Return        E_OK on success; Other value otherwise.
86406 +*//***************************************************************************/
86407 +t_Error P1023_GetDdrType(uintptr_t gutilBase, e_DdrType *p_DdrType );
86408 +#endif
86409 +
86410 +/** @} */ /* end of 1023_init_grp group */
86411 +/** @} */ /* end of 1023_grp group */
86412 +
86413 +#define CORE_E500V2
86414 +
86415 +#if 0 /* using unified values */
86416 +/*****************************************************************************
86417 + INTEGRATION-SPECIFIC MODULE CODES
86418 +******************************************************************************/
86419 +#define MODULE_UNKNOWN          0x00000000
86420 +#define MODULE_MEM              0x00010000
86421 +#define MODULE_MM               0x00020000
86422 +#define MODULE_CORE             0x00030000
86423 +#define MODULE_P1023            0x00040000
86424 +#define MODULE_MII              0x00050000
86425 +#define MODULE_PM               0x00060000
86426 +#define MODULE_MMU              0x00070000
86427 +#define MODULE_PIC              0x00080000
86428 +#define MODULE_L2_CACHE         0x00090000
86429 +#define MODULE_DUART            0x000a0000
86430 +#define MODULE_SERDES           0x000b0000
86431 +#define MODULE_PIO              0x000c0000
86432 +#define MODULE_QM               0x000d0000
86433 +#define MODULE_BM               0x000e0000
86434 +#define MODULE_SEC              0x000f0000
86435 +#define MODULE_FM               0x00100000
86436 +#define MODULE_FM_MURAM         0x00110000
86437 +#define MODULE_FM_PCD           0x00120000
86438 +#define MODULE_FM_RTC           0x00130000
86439 +#define MODULE_FM_MAC           0x00140000
86440 +#define MODULE_FM_PORT          0x00150000
86441 +#define MODULE_FM_MACSEC        0x00160000
86442 +#define MODULE_FM_MACSEC_SECY   0x00170000
86443 +#define MODULE_FM_SP            0x00280000
86444 +#define MODULE_ECM              0x00190000
86445 +#define MODULE_DMA              0x001a0000
86446 +#define MODULE_DDR              0x001b0000
86447 +#define MODULE_LAW              0x001c0000
86448 +#define MODULE_LBC              0x001d0000
86449 +#define MODULE_I2C              0x001e0000
86450 +#define MODULE_ESPI             0x001f0000
86451 +#define MODULE_PCI              0x00200000
86452 +#define MODULE_DPA_PORT         0x00210000
86453 +#define MODULE_USB              0x00220000
86454 +#endif /* using unified values */
86455 +
86456 +/*****************************************************************************
86457 + LBC INTEGRATION-SPECIFIC DEFINITIONS
86458 +******************************************************************************/
86459 +/**************************************************************************//**
86460 + @Group         lbc_exception_grp LBC Exception Unit
86461 +
86462 + @Description   LBC Exception unit API functions, definitions and enums
86463 +
86464 + @{
86465 +*//***************************************************************************/
86466 +
86467 +/**************************************************************************//**
86468 + @Anchor        lbc_exbm
86469 +
86470 + @Collection    LBC Errors Bit Mask
86471 +
86472 +                These errors are reported through the exceptions callback..
86473 +                The values can be or'ed in any combination in the errors mask
86474 +                parameter of the errors report structure.
86475 +
86476 +                These errors can also be passed as a bit-mask to
86477 +                LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
86478 +                for enabling or disabling error checking.
86479 + @{
86480 +*//***************************************************************************/
86481 +#define LBC_ERR_BUS_MONITOR     0x80000000  /**< Bus monitor error */
86482 +#define LBC_ERR_PARITY_ECC      0x20000000  /**< Parity error for GPCM/UPM */
86483 +#define LBC_ERR_WRITE_PROTECT   0x04000000  /**< Write protection error */
86484 +#define LBC_ERR_CHIP_SELECT     0x00080000  /**< Unrecognized chip select */
86485 +
86486 +#define LBC_ERR_ALL             (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
86487 +                                 LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT)
86488 +                                            /**< All possible errors */
86489 +/* @} */
86490 +/** @} */ /* end of lbc_exception_grp group */
86491 +
86492 +#define LBC_NUM_OF_BANKS            2
86493 +#define LBC_MAX_CS_SIZE             0x0000000100000000LL
86494 +#define LBC_ATOMIC_OPERATION_SUPPORT
86495 +#define LBC_PARITY_SUPPORT
86496 +#define LBC_ADDRESS_SHIFT_SUPPORT
86497 +#define LBC_ADDRESS_HOLD_TIME_CTRL
86498 +#define LBC_HIGH_CLK_DIVIDERS
86499 +#define LBC_FCM_AVAILABLE
86500 +
86501 +
86502 +/*****************************************************************************
86503 + LAW INTEGRATION-SPECIFIC DEFINITIONS
86504 +******************************************************************************/
86505 +#define LAW_ARCH_CCB
86506 +#define LAW_NUM_OF_WINDOWS      12
86507 +#define LAW_MIN_WINDOW_SIZE     0x0000000000001000LL    /**< 4KB */
86508 +#define LAW_MAX_WINDOW_SIZE     0x0000001000000000LL    /**< 32GB */
86509 +
86510 +
86511 +/*****************************************************************************
86512 + SPI INTEGRATION-SPECIFIC DEFINITIONS
86513 +******************************************************************************/
86514 +#define SPI_NUM_OF_CONTROLLERS      1
86515 +
86516 +/*****************************************************************************
86517 + PCI/PCIe INTEGRATION-SPECIFIC DEFINITIONS
86518 +******************************************************************************/
86519 +
86520 +#define PCI_MAX_INBOUND_WINDOWS_NUM     4
86521 +#define PCI_MAX_OUTBOUND_WINDOWS_NUM    5
86522 +
86523 +/**************************************************************************//**
86524 + @Description   Target interface of an inbound window
86525 +*//***************************************************************************/
86526 +typedef enum e_PciTargetInterface
86527 +{
86528 +    e_PCI_TARGET_PCIE_2         = 0x1,  /**<  PCI Express target interface 2 */
86529 +    e_PCI_TARGET_PCIE_1         = 0x2,  /**<  PCI Express target interface 1 */
86530 +    e_PCI_TARGET_PCIE_3         = 0x3,  /**<  PCI Express target interface 3 */
86531 +    e_PCI_TARGET_LOCAL_MEMORY   = 0xF   /**<  Local Memory (DDR SDRAM, Local Bus, SRAM) target interface */
86532 +
86533 +} e_PciTargetInterface;
86534 +
86535 +/*****************************************************************************
86536 + DDR INTEGRATION-SPECIFIC DEFINITIONS
86537 +******************************************************************************/
86538 +#define DDR_NUM_OF_VALID_CS         2
86539 +
86540 +/*****************************************************************************
86541 + SEC INTEGRATION-SPECIFIC DEFINITIONS
86542 +******************************************************************************/
86543 +#define SEC_ERRATA_STAT_REGS_UNUSABLE
86544 +
86545 +/*****************************************************************************
86546 + DMA INTEGRATION-SPECIFIC DEFINITIONS
86547 +******************************************************************************/
86548 +#define DMA_NUM_OF_CONTROLLERS      2
86549 +
86550 +
86551 +
86552 +
86553 +/*****************************************************************************
86554 + 1588 INTEGRATION-SPECIFIC DEFINITIONS
86555 +******************************************************************************/
86556 +#define PTP_V2
86557 +
86558 +/**************************************************************************//**
86559 + @Function      P1023_GetMuxControlReg
86560 +
86561 + @Description   Returns the value of PMUXCR (Alternate Function Signal Multiplex
86562 +                Control Register)
86563 +
86564 + @Param[in]     gutilBase   - Base address of P1023 GUTIL registers.
86565 +
86566 + @Return        Value of PMUXCR
86567 +*//***************************************************************************/
86568 +uint32_t P1023_GetMuxControlReg(uintptr_t gutilBase);
86569 +
86570 +/**************************************************************************//**
86571 + @Function      P1023_SetMuxControlReg
86572 +
86573 + @Description   Sets the value of PMUXCR (Alternate Function Signal Multiplex
86574 +                Control Register)
86575 +
86576 + @Param[in]     gutilBase   - Base address of P1023 GUTIL registers.
86577 + @Param[in]     val         - the new value for PMUXCR.
86578 +
86579 + @Return        None
86580 +*//***************************************************************************/
86581 +void P1023_SetMuxControlReg(uintptr_t gutilBase, uint32_t val);
86582 +
86583 +/**************************************************************************//**
86584 + @Function      P1023_GetDeviceDisableStatusRegister
86585 +
86586 + @Description   Returns the value of DEVDISR (Device Disable Register)
86587 +
86588 + @Param[in]     gutilBase   - Base address of P1023 GUTIL registers.
86589 +
86590 + @Return        Value of DEVDISR
86591 +*//***************************************************************************/
86592 +uint32_t P1023_GetDeviceDisableStatusRegister(uintptr_t gutilBase);
86593 +
86594 +/**************************************************************************//**
86595 + @Function      P1023_GetPorDeviceStatusRegister
86596 +
86597 + @Description   Returns the value of POR Device Status Register
86598 +
86599 + @Param[in]     gutilBase   - Base address of P1023 GUTIL registers.
86600 +
86601 + @Return        POR Device Status Register
86602 +*//***************************************************************************/
86603 +uint32_t P1023_GetPorDeviceStatusRegister(uintptr_t gutilBase);
86604 +
86605 +/**************************************************************************//**
86606 + @Function      P1023_GetPorBootModeStatusRegister
86607 +
86608 + @Description   Returns the value of POR Boot Mode Status Register
86609 +
86610 + @Param[in]     gutilBase   - Base address of P1023 GUTIL registers.
86611 +
86612 + @Return        POR Boot Mode Status Register value
86613 +*//***************************************************************************/
86614 +uint32_t P1023_GetPorBootModeStatusRegister(uintptr_t gutilBase);
86615 +
86616 +
86617 +#define PORDEVSR_SGMII1_DIS     0x10000000
86618 +#define PORDEVSR_SGMII2_DIS     0x08000000
86619 +#define PORDEVSR_ECP1           0x02000000
86620 +#define PORDEVSR_IO_SEL         0x00780000
86621 +#define PORDEVSR_IO_SEL_SHIFT   19
86622 +#define PORBMSR_HA              0x00070000
86623 +#define PORBMSR_HA_SHIFT        16
86624 +
86625 +#define DEVDISR_QM_BM           0x80000000
86626 +#define DEVDISR_FM              0x40000000
86627 +#define DEVDISR_PCIE1           0x20000000
86628 +#define DEVDISR_MAC_SEC         0x10000000
86629 +#define DEVDISR_ELBC            0x08000000
86630 +#define DEVDISR_PCIE2           0x04000000
86631 +#define DEVDISR_PCIE3           0x02000000
86632 +#define DEVDISR_CAAM            0x01000000
86633 +#define DEVDISR_USB0            0x00800000
86634 +#define DEVDISR_1588            0x00020000
86635 +#define DEVDISR_CORE0           0x00008000
86636 +#define DEVDISR_TB0             0x00004000
86637 +#define DEVDISR_CORE1           0x00002000
86638 +#define DEVDISR_TB1             0x00001000
86639 +#define DEVDISR_DMA1            0x00000400
86640 +#define DEVDISR_DMA2            0x00000200
86641 +#define DEVDISR_DDR             0x00000010
86642 +#define DEVDISR_TSEC1           0x00000080
86643 +#define DEVDISR_TSEC2           0x00000040
86644 +#define DEVDISR_SPI             0x00000008
86645 +#define DEVDISR_I2C             0x00000004
86646 +#define DEVDISR_DUART           0x00000002
86647 +
86648 +
86649 +#endif /* __PART_INTEGRATION_EXT_H */
86650 --- /dev/null
86651 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/dpaa_integration_ext.h
86652 @@ -0,0 +1,276 @@
86653 +/* Copyright (c) 2009-2012 Freescale Semiconductor, Inc
86654 + * All rights reserved.
86655 + *
86656 + * Redistribution and use in source and binary forms, with or without
86657 + * modification, are permitted provided that the following conditions are met:
86658 + *     * Redistributions of source code must retain the above copyright
86659 + *       notice, this list of conditions and the following disclaimer.
86660 + *     * Redistributions in binary form must reproduce the above copyright
86661 + *       notice, this list of conditions and the following disclaimer in the
86662 + *       documentation and/or other materials provided with the distribution.
86663 + *     * Neither the name of Freescale Semiconductor nor the
86664 + *       names of its contributors may be used to endorse or promote products
86665 + *       derived from this software without specific prior written permission.
86666 + *
86667 + *
86668 + * ALTERNATIVELY, this software may be distributed under the terms of the
86669 + * GNU General Public License ("GPL") as published by the Free Software
86670 + * Foundation, either version 2 of that License or (at your option) any
86671 + * later version.
86672 + *
86673 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
86674 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
86675 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
86676 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
86677 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
86678 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
86679 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
86680 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
86681 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
86682 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
86683 + */
86684 +
86685 +/**************************************************************************//**
86686 + @File          dpaa_integration_ext.h
86687 +
86688 + @Description   P3040/P4080/P5020 FM external definitions and structures.
86689 +*//***************************************************************************/
86690 +#ifndef __DPAA_INTEGRATION_EXT_H
86691 +#define __DPAA_INTEGRATION_EXT_H
86692 +
86693 +#include "std_ext.h"
86694 +
86695 +
86696 +#define DPAA_VERSION    10
86697 +
86698 +typedef enum {
86699 +    e_DPAA_SWPORTAL0 = 0,
86700 +    e_DPAA_SWPORTAL1,
86701 +    e_DPAA_SWPORTAL2,
86702 +    e_DPAA_SWPORTAL3,
86703 +    e_DPAA_SWPORTAL4,
86704 +    e_DPAA_SWPORTAL5,
86705 +    e_DPAA_SWPORTAL6,
86706 +    e_DPAA_SWPORTAL7,
86707 +    e_DPAA_SWPORTAL8,
86708 +    e_DPAA_SWPORTAL9,
86709 +    e_DPAA_SWPORTAL_DUMMY_LAST
86710 +} e_DpaaSwPortal;
86711 +
86712 +typedef enum {
86713 +    e_DPAA_DCPORTAL0 = 0,
86714 +    e_DPAA_DCPORTAL1,
86715 +    e_DPAA_DCPORTAL2,
86716 +    e_DPAA_DCPORTAL3,
86717 +    e_DPAA_DCPORTAL4,
86718 +    e_DPAA_DCPORTAL_DUMMY_LAST
86719 +} e_DpaaDcPortal;
86720 +
86721 +#define DPAA_MAX_NUM_OF_SW_PORTALS      e_DPAA_SWPORTAL_DUMMY_LAST
86722 +#define DPAA_MAX_NUM_OF_DC_PORTALS      e_DPAA_DCPORTAL_DUMMY_LAST
86723 +
86724 +/*****************************************************************************
86725 + QMan INTEGRATION-SPECIFIC DEFINITIONS
86726 +******************************************************************************/
86727 +#define QM_MAX_NUM_OF_POOL_CHANNELS 15              /**< Total number of channels, dedicated and pool */
86728 +#define QM_MAX_NUM_OF_WQ            8               /**< Number of work queues per channel */
86729 +#define QM_MAX_NUM_OF_SWP_AS        4
86730 +#define QM_MAX_NUM_OF_CGS           256             /**< Number of congestion groups */
86731 +#define QM_MAX_NUM_OF_FQIDS         (16 * MEGABYTE) /**< FQIDs range - 24 bits */
86732 +
86733 +/**************************************************************************//**
86734 + @Description   Work Queue Channel assignments in QMan.
86735 +*//***************************************************************************/
86736 +typedef enum
86737 +{
86738 +    e_QM_FQ_CHANNEL_SWPORTAL0 = 0,              /**< Dedicated channels serviced by software portals 0 to 9 */
86739 +    e_QM_FQ_CHANNEL_SWPORTAL1,
86740 +    e_QM_FQ_CHANNEL_SWPORTAL2,
86741 +    e_QM_FQ_CHANNEL_SWPORTAL3,
86742 +    e_QM_FQ_CHANNEL_SWPORTAL4,
86743 +    e_QM_FQ_CHANNEL_SWPORTAL5,
86744 +    e_QM_FQ_CHANNEL_SWPORTAL6,
86745 +    e_QM_FQ_CHANNEL_SWPORTAL7,
86746 +    e_QM_FQ_CHANNEL_SWPORTAL8,
86747 +    e_QM_FQ_CHANNEL_SWPORTAL9,
86748 +
86749 +    e_QM_FQ_CHANNEL_POOL1 = 0x21,               /**< Pool channels that can be serviced by any of the software portals */
86750 +    e_QM_FQ_CHANNEL_POOL2,
86751 +    e_QM_FQ_CHANNEL_POOL3,
86752 +    e_QM_FQ_CHANNEL_POOL4,
86753 +    e_QM_FQ_CHANNEL_POOL5,
86754 +    e_QM_FQ_CHANNEL_POOL6,
86755 +    e_QM_FQ_CHANNEL_POOL7,
86756 +    e_QM_FQ_CHANNEL_POOL8,
86757 +    e_QM_FQ_CHANNEL_POOL9,
86758 +    e_QM_FQ_CHANNEL_POOL10,
86759 +    e_QM_FQ_CHANNEL_POOL11,
86760 +    e_QM_FQ_CHANNEL_POOL12,
86761 +    e_QM_FQ_CHANNEL_POOL13,
86762 +    e_QM_FQ_CHANNEL_POOL14,
86763 +    e_QM_FQ_CHANNEL_POOL15,
86764 +
86765 +    e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x40,           /**< Dedicated channels serviced by Direct Connect Portal 0:
86766 +                                                     connected to FMan 0; assigned in incrementing order to
86767 +                                                     each sub-portal (SP) in the portal */
86768 +    e_QM_FQ_CHANNEL_FMAN0_SP1,
86769 +    e_QM_FQ_CHANNEL_FMAN0_SP2,
86770 +    e_QM_FQ_CHANNEL_FMAN0_SP3,
86771 +    e_QM_FQ_CHANNEL_FMAN0_SP4,
86772 +    e_QM_FQ_CHANNEL_FMAN0_SP5,
86773 +    e_QM_FQ_CHANNEL_FMAN0_SP6,
86774 +    e_QM_FQ_CHANNEL_FMAN0_SP7,
86775 +    e_QM_FQ_CHANNEL_FMAN0_SP8,
86776 +    e_QM_FQ_CHANNEL_FMAN0_SP9,
86777 +    e_QM_FQ_CHANNEL_FMAN0_SP10,
86778 +    e_QM_FQ_CHANNEL_FMAN0_SP11,
86779 +/* difference between 5020 and 4080 :) */
86780 +    e_QM_FQ_CHANNEL_FMAN1_SP0 = 0x60,
86781 +    e_QM_FQ_CHANNEL_FMAN1_SP1,
86782 +    e_QM_FQ_CHANNEL_FMAN1_SP2,
86783 +    e_QM_FQ_CHANNEL_FMAN1_SP3,
86784 +    e_QM_FQ_CHANNEL_FMAN1_SP4,
86785 +    e_QM_FQ_CHANNEL_FMAN1_SP5,
86786 +    e_QM_FQ_CHANNEL_FMAN1_SP6,
86787 +    e_QM_FQ_CHANNEL_FMAN1_SP7,
86788 +    e_QM_FQ_CHANNEL_FMAN1_SP8,
86789 +    e_QM_FQ_CHANNEL_FMAN1_SP9,
86790 +    e_QM_FQ_CHANNEL_FMAN1_SP10,
86791 +    e_QM_FQ_CHANNEL_FMAN1_SP11,
86792 +
86793 +    e_QM_FQ_CHANNEL_CAAM = 0x80,                /**< Dedicated channel serviced by Direct Connect Portal 2:
86794 +                                                     connected to SEC 4.x */
86795 +
86796 +    e_QM_FQ_CHANNEL_PME = 0xA0,                 /**< Dedicated channel serviced by Direct Connect Portal 3:
86797 +                                                     connected to PME */
86798 +    e_QM_FQ_CHANNEL_RAID = 0xC0                 /**< Dedicated channel serviced by Direct Connect Portal 4:
86799 +                                                     connected to RAID */
86800 +} e_QmFQChannel;
86801 +
86802 +/*****************************************************************************
86803 + BMan INTEGRATION-SPECIFIC DEFINITIONS
86804 +******************************************************************************/
86805 +#define BM_MAX_NUM_OF_POOLS         64          /**< Number of buffers pools */
86806 +
86807 +
86808 +/*****************************************************************************
86809 + FM INTEGRATION-SPECIFIC DEFINITIONS
86810 +******************************************************************************/
86811 +#define INTG_MAX_NUM_OF_FM          2
86812 +
86813 +/* Ports defines */
86814 +#define FM_MAX_NUM_OF_1G_MACS       5
86815 +#define FM_MAX_NUM_OF_10G_MACS      1
86816 +#define FM_MAX_NUM_OF_MACS          (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
86817 +#define FM_MAX_NUM_OF_OH_PORTS      7
86818 +
86819 +#define FM_MAX_NUM_OF_1G_RX_PORTS   FM_MAX_NUM_OF_1G_MACS
86820 +#define FM_MAX_NUM_OF_10G_RX_PORTS  FM_MAX_NUM_OF_10G_MACS
86821 +#define FM_MAX_NUM_OF_RX_PORTS      (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
86822 +
86823 +#define FM_MAX_NUM_OF_1G_TX_PORTS   FM_MAX_NUM_OF_1G_MACS
86824 +#define FM_MAX_NUM_OF_10G_TX_PORTS  FM_MAX_NUM_OF_10G_MACS
86825 +#define FM_MAX_NUM_OF_TX_PORTS      (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
86826 +
86827 +#define FM_PORT_MAX_NUM_OF_EXT_POOLS            8           /**< Number of external BM pools per Rx port */
86828 +#define FM_PORT_NUM_OF_CONGESTION_GRPS          256         /**< Total number of congestion groups in QM */
86829 +#define FM_MAX_NUM_OF_SUB_PORTALS               12
86830 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS   0
86831 +
86832 +/* Rams defines */
86833 +#define FM_MURAM_SIZE                   (160*KILOBYTE)
86834 +#define FM_IRAM_SIZE(major, minor)      (64 * KILOBYTE)
86835 +#define FM_NUM_OF_CTRL                  2
86836 +
86837 +/* PCD defines */
86838 +#define FM_PCD_PLCR_NUM_ENTRIES         256             /**< Total number of policer profiles */
86839 +#define FM_PCD_KG_NUM_OF_SCHEMES        32              /**< Total number of KG schemes */
86840 +#define FM_PCD_MAX_NUM_OF_CLS_PLANS     256             /**< Number of classification plan entries. */
86841 +#define FM_PCD_PRS_SW_PATCHES_SIZE      0x00000200      /**< Number of bytes saved for patches */
86842 +#define FM_PCD_SW_PRS_SIZE              0x00000800      /**< Total size of SW parser area */
86843 +
86844 +/* RTC defines */
86845 +#define FM_RTC_NUM_OF_ALARMS            2                   /**< RTC number of alarms */
86846 +#define FM_RTC_NUM_OF_PERIODIC_PULSES   2                   /**< RTC number of periodic pulses */
86847 +#define FM_RTC_NUM_OF_EXT_TRIGGERS      2                   /**< RTC number of external triggers */
86848 +
86849 +/* QMI defines */
86850 +#define QMI_MAX_NUM_OF_TNUMS            64
86851 +#define QMI_DEF_TNUMS_THRESH            48
86852 +
86853 +/* FPM defines */
86854 +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS  4
86855 +
86856 +/* DMA defines */
86857 +#define DMA_THRESH_MAX_COMMQ            31
86858 +#define DMA_THRESH_MAX_BUF              127
86859 +
86860 +/* BMI defines */
86861 +#define BMI_MAX_NUM_OF_TASKS            128
86862 +#define BMI_MAX_NUM_OF_DMAS             32
86863 +#define BMI_MAX_FIFO_SIZE               (FM_MURAM_SIZE)
86864 +#define PORT_MAX_WEIGHT                 16
86865 +
86866 +
86867 +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx)   TRUE
86868 +
86869 +/* p4080-rev1 unique features */
86870 +#define QM_CGS_NO_FRAME_MODE
86871 +
86872 +/* p4080 unique features */
86873 +#define FM_NO_DISPATCH_RAM_ECC
86874 +#define FM_NO_WATCHDOG
86875 +#define FM_NO_TNUM_AGING
86876 +#define FM_KG_NO_BYPASS_FQID_GEN
86877 +#define FM_KG_NO_BYPASS_PLCR_PROFILE_GEN
86878 +#define FM_NO_BACKUP_POOLS
86879 +#define FM_NO_OP_OBSERVED_POOLS
86880 +#define FM_NO_ADVANCED_RATE_LIMITER
86881 +#define FM_NO_OP_OBSERVED_CGS
86882 +#define FM_HAS_TOTAL_DMAS
86883 +#define FM_KG_NO_IPPID_SUPPORT
86884 +#define FM_NO_GUARANTEED_RESET_VALUES
86885 +#define FM_MAC_RESET
86886 +
86887 +/* FM erratas */
86888 +#define FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
86889 +#define FM_TX_SHORT_FRAME_BAD_TS_ERRATA_10GMAC_A006     /* No implementation, Out of LLD scope */
86890 +#define FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007
86891 +#define FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008
86892 +#define FM_TX_INVALID_ECC_ERRATA_10GMAC_A009            /* Out of LLD scope, user may disable ECC exceptions using FM_DisableRamsEcc */
86893 +#define FM_BAD_VLAN_DETECT_ERRATA_10GMAC_A010
86894 +
86895 +#define FM_RX_PREAM_4_ERRATA_DTSEC_A001
86896 +#define FM_GRS_ERRATA_DTSEC_A002
86897 +#define FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003
86898 +#define FM_GTS_ERRATA_DTSEC_A004
86899 +#define FM_GTS_AFTER_MAC_ABORTED_FRAME_ERRATA_DTSEC_A0012
86900 +#define FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014
86901 +#define FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839
86902 +
86903 +#define FM_MAGIC_PACKET_UNRECOGNIZED_ERRATA_DTSEC2          /* No implementation, Out of LLD scope */
86904 +#define FM_TX_LOCKUP_ERRATA_DTSEC6
86905 +
86906 +#define FM_HC_DEF_FQID_ONLY_ERRATA_FMAN_A003                /* Implemented by ucode */
86907 +#define FM_DEBUG_TRACE_FMAN_A004                            /* No implementation, Out of LLD scope */
86908 +
86909 +#define FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
86910 +
86911 +#define FM_10G_REM_N_LCL_FLT_EX_10GMAC_ERRATA_SW005
86912 +
86913 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
86914 +
86915 +#define FM_NO_CTXA_COPY_ERRATA_FMAN_SW001
86916 +#define FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004
86917 +
86918 +/*****************************************************************************
86919 + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
86920 +******************************************************************************/
86921 +#define NUM_OF_RX_SC                16
86922 +#define NUM_OF_TX_SC                16
86923 +
86924 +#define NUM_OF_SA_PER_RX_SC         2
86925 +#define NUM_OF_SA_PER_TX_SC         2
86926 +
86927 +
86928 +#endif /* __DPAA_INTEGRATION_EXT_H */
86929 --- /dev/null
86930 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_ext.h
86931 @@ -0,0 +1,83 @@
86932 +/*
86933 + * Copyright 2008-2012 Freescale Semiconductor Inc.
86934 + *
86935 + * Redistribution and use in source and binary forms, with or without
86936 + * modification, are permitted provided that the following conditions are met:
86937 + *     * Redistributions of source code must retain the above copyright
86938 + *       notice, this list of conditions and the following disclaimer.
86939 + *     * Redistributions in binary form must reproduce the above copyright
86940 + *       notice, this list of conditions and the following disclaimer in the
86941 + *       documentation and/or other materials provided with the distribution.
86942 + *     * Neither the name of Freescale Semiconductor nor the
86943 + *       names of its contributors may be used to endorse or promote products
86944 + *       derived from this software without specific prior written permission.
86945 + *
86946 + *
86947 + * ALTERNATIVELY, this software may be distributed under the terms of the
86948 + * GNU General Public License ("GPL") as published by the Free Software
86949 + * Foundation, either version 2 of that License or (at your option) any
86950 + * later version.
86951 + *
86952 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
86953 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
86954 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
86955 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
86956 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
86957 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
86958 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
86959 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
86960 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
86961 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
86962 + */
86963 +
86964 +/**************************************************************************//**
86965 +
86966 + @File          part_ext.h
86967 +
86968 + @Description   Definitions for the part (integration) module.
86969 +*//***************************************************************************/
86970 +
86971 +#ifndef __PART_EXT_H
86972 +#define __PART_EXT_H
86973 +
86974 +#include "std_ext.h"
86975 +#include "part_integration_ext.h"
86976 +
86977 +
86978 +#if !(defined(MPC8306) || \
86979 +      defined(MPC8309) || \
86980 +      defined(MPC834x) || \
86981 +      defined(MPC836x) || \
86982 +      defined(MPC832x) || \
86983 +      defined(MPC837x) || \
86984 +      defined(MPC8568) || \
86985 +      defined(MPC8569) || \
86986 +      defined(P1020)   || \
86987 +      defined(P1021)   || \
86988 +      defined(P1022)   || \
86989 +      defined(P1023)   || \
86990 +      defined(P2020)   || \
86991 +      defined(P2040)   || \
86992 +      defined(P3041)   || \
86993 +      defined(P4080)   || \
86994 +      defined(SC4080)  || \
86995 +      defined(P5020)   || \
86996 +      defined(MSC814x))
86997 +#error "unable to proceed without chip-definition"
86998 +#endif /* !(defined(MPC834x) || ... */
86999 +
87000 +
87001 +/**************************************************************************//*
87002 + @Description   Part data structure - must be contained in any integration
87003 +                data structure.
87004 +*//***************************************************************************/
87005 +typedef struct t_Part
87006 +{
87007 +    uintptr_t   (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
87008 +                /**< Returns the address of the module's memory map base. */
87009 +    e_ModuleId  (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
87010 +                /**< Returns the module's ID according to its memory map base. */
87011 +} t_Part;
87012 +
87013 +
87014 +#endif /* __PART_EXT_H */
87015 --- /dev/null
87016 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_integration_ext.h
87017 @@ -0,0 +1,336 @@
87018 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
87019 + * All rights reserved.
87020 + *
87021 + * Redistribution and use in source and binary forms, with or without
87022 + * modification, are permitted provided that the following conditions are met:
87023 + *     * Redistributions of source code must retain the above copyright
87024 + *       notice, this list of conditions and the following disclaimer.
87025 + *     * Redistributions in binary form must reproduce the above copyright
87026 + *       notice, this list of conditions and the following disclaimer in the
87027 + *       documentation and/or other materials provided with the distribution.
87028 + *     * Neither the name of Freescale Semiconductor nor the
87029 + *       names of its contributors may be used to endorse or promote products
87030 + *       derived from this software without specific prior written permission.
87031 + *
87032 + *
87033 + * ALTERNATIVELY, this software may be distributed under the terms of the
87034 + * GNU General Public License ("GPL") as published by the Free Software
87035 + * Foundation, either version 2 of that License or (at your option) any
87036 + * later version.
87037 + *
87038 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
87039 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
87040 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
87041 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
87042 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
87043 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
87044 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
87045 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
87046 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
87047 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
87048 + */
87049 +
87050 +/**************************************************************************//**
87051 + @File          part_integration_ext.h
87052 +
87053 + @Description   P3040/P4080/P5020 external definitions and structures.
87054 +*//***************************************************************************/
87055 +#ifndef __PART_INTEGRATION_EXT_H
87056 +#define __PART_INTEGRATION_EXT_H
87057 +
87058 +#include "std_ext.h"
87059 +#include "dpaa_integration_ext.h"
87060 +
87061 +
87062 +/**************************************************************************//**
87063 + @Group         P3040/P4080/P5020_chip_id P5020 Application Programming Interface
87064 +
87065 + @Description   P3040/P4080/P5020 Chip functions,definitions and enums.
87066 +
87067 + @{
87068 +*//***************************************************************************/
87069 +
87070 +#define CORE_E500MC
87071 +
87072 +#define INTG_MAX_NUM_OF_CORES   1
87073 +
87074 +
87075 +/**************************************************************************//**
87076 + @Description   Module types.
87077 +*//***************************************************************************/
87078 +typedef enum e_ModuleId
87079 +{
87080 +    e_MODULE_ID_DUART_1 = 0,
87081 +    e_MODULE_ID_DUART_2,
87082 +    e_MODULE_ID_DUART_3,
87083 +    e_MODULE_ID_DUART_4,
87084 +    e_MODULE_ID_LAW,
87085 +    e_MODULE_ID_LBC,
87086 +    e_MODULE_ID_PAMU,
87087 +    e_MODULE_ID_QM,                 /**< Queue manager module */
87088 +    e_MODULE_ID_BM,                 /**< Buffer manager module */
87089 +    e_MODULE_ID_QM_CE_PORTAL_0,
87090 +    e_MODULE_ID_QM_CI_PORTAL_0,
87091 +    e_MODULE_ID_QM_CE_PORTAL_1,
87092 +    e_MODULE_ID_QM_CI_PORTAL_1,
87093 +    e_MODULE_ID_QM_CE_PORTAL_2,
87094 +    e_MODULE_ID_QM_CI_PORTAL_2,
87095 +    e_MODULE_ID_QM_CE_PORTAL_3,
87096 +    e_MODULE_ID_QM_CI_PORTAL_3,
87097 +    e_MODULE_ID_QM_CE_PORTAL_4,
87098 +    e_MODULE_ID_QM_CI_PORTAL_4,
87099 +    e_MODULE_ID_QM_CE_PORTAL_5,
87100 +    e_MODULE_ID_QM_CI_PORTAL_5,
87101 +    e_MODULE_ID_QM_CE_PORTAL_6,
87102 +    e_MODULE_ID_QM_CI_PORTAL_6,
87103 +    e_MODULE_ID_QM_CE_PORTAL_7,
87104 +    e_MODULE_ID_QM_CI_PORTAL_7,
87105 +    e_MODULE_ID_QM_CE_PORTAL_8,
87106 +    e_MODULE_ID_QM_CI_PORTAL_8,
87107 +    e_MODULE_ID_QM_CE_PORTAL_9,
87108 +    e_MODULE_ID_QM_CI_PORTAL_9,
87109 +    e_MODULE_ID_BM_CE_PORTAL_0,
87110 +    e_MODULE_ID_BM_CI_PORTAL_0,
87111 +    e_MODULE_ID_BM_CE_PORTAL_1,
87112 +    e_MODULE_ID_BM_CI_PORTAL_1,
87113 +    e_MODULE_ID_BM_CE_PORTAL_2,
87114 +    e_MODULE_ID_BM_CI_PORTAL_2,
87115 +    e_MODULE_ID_BM_CE_PORTAL_3,
87116 +    e_MODULE_ID_BM_CI_PORTAL_3,
87117 +    e_MODULE_ID_BM_CE_PORTAL_4,
87118 +    e_MODULE_ID_BM_CI_PORTAL_4,
87119 +    e_MODULE_ID_BM_CE_PORTAL_5,
87120 +    e_MODULE_ID_BM_CI_PORTAL_5,
87121 +    e_MODULE_ID_BM_CE_PORTAL_6,
87122 +    e_MODULE_ID_BM_CI_PORTAL_6,
87123 +    e_MODULE_ID_BM_CE_PORTAL_7,
87124 +    e_MODULE_ID_BM_CI_PORTAL_7,
87125 +    e_MODULE_ID_BM_CE_PORTAL_8,
87126 +    e_MODULE_ID_BM_CI_PORTAL_8,
87127 +    e_MODULE_ID_BM_CE_PORTAL_9,
87128 +    e_MODULE_ID_BM_CI_PORTAL_9,
87129 +    e_MODULE_ID_FM1,                /**< Frame manager #1 module */
87130 +    e_MODULE_ID_FM1_RTC,            /**< FM Real-Time-Clock */
87131 +    e_MODULE_ID_FM1_MURAM,          /**< FM Multi-User-RAM */
87132 +    e_MODULE_ID_FM1_BMI,            /**< FM BMI block */
87133 +    e_MODULE_ID_FM1_QMI,            /**< FM QMI block */
87134 +    e_MODULE_ID_FM1_PRS,            /**< FM parser block */
87135 +    e_MODULE_ID_FM1_PORT_HO0,       /**< FM Host-command/offline-parsing port block */
87136 +    e_MODULE_ID_FM1_PORT_HO1,       /**< FM Host-command/offline-parsing port block */
87137 +    e_MODULE_ID_FM1_PORT_HO2,       /**< FM Host-command/offline-parsing port block */
87138 +    e_MODULE_ID_FM1_PORT_HO3,       /**< FM Host-command/offline-parsing port block */
87139 +    e_MODULE_ID_FM1_PORT_HO4,       /**< FM Host-command/offline-parsing port block */
87140 +    e_MODULE_ID_FM1_PORT_HO5,       /**< FM Host-command/offline-parsing port block */
87141 +    e_MODULE_ID_FM1_PORT_HO6,       /**< FM Host-command/offline-parsing port block */
87142 +    e_MODULE_ID_FM1_PORT_1GRx0,     /**< FM Rx 1G MAC port block */
87143 +    e_MODULE_ID_FM1_PORT_1GRx1,     /**< FM Rx 1G MAC port block */
87144 +    e_MODULE_ID_FM1_PORT_1GRx2,     /**< FM Rx 1G MAC port block */
87145 +    e_MODULE_ID_FM1_PORT_1GRx3,     /**< FM Rx 1G MAC port block */
87146 +    e_MODULE_ID_FM1_PORT_1GRx4,     /**< FM Rx 1G MAC port block */
87147 +    e_MODULE_ID_FM1_PORT_10GRx0,    /**< FM Rx 10G MAC port block */
87148 +    e_MODULE_ID_FM1_PORT_1GTx0,     /**< FM Tx 1G MAC port block */
87149 +    e_MODULE_ID_FM1_PORT_1GTx1,     /**< FM Tx 1G MAC port block */
87150 +    e_MODULE_ID_FM1_PORT_1GTx2,     /**< FM Tx 1G MAC port block */
87151 +    e_MODULE_ID_FM1_PORT_1GTx3,     /**< FM Tx 1G MAC port block */
87152 +    e_MODULE_ID_FM1_PORT_1GTx4,     /**< FM Tx 1G MAC port block */
87153 +    e_MODULE_ID_FM1_PORT_10GTx0,    /**< FM Tx 10G MAC port block */
87154 +    e_MODULE_ID_FM1_PLCR,           /**< FM Policer */
87155 +    e_MODULE_ID_FM1_KG,             /**< FM Keygen */
87156 +    e_MODULE_ID_FM1_DMA,            /**< FM DMA */
87157 +    e_MODULE_ID_FM1_FPM,            /**< FM FPM */
87158 +    e_MODULE_ID_FM1_IRAM,           /**< FM Instruction-RAM */
87159 +    e_MODULE_ID_FM1_1GMDIO0,        /**< FM 1G MDIO MAC 0*/
87160 +    e_MODULE_ID_FM1_1GMDIO1,        /**< FM 1G MDIO MAC 1*/
87161 +    e_MODULE_ID_FM1_1GMDIO2,        /**< FM 1G MDIO MAC 2*/
87162 +    e_MODULE_ID_FM1_1GMDIO3,        /**< FM 1G MDIO MAC 3*/
87163 +    e_MODULE_ID_FM1_10GMDIO,        /**< FM 10G MDIO */
87164 +    e_MODULE_ID_FM1_PRS_IRAM,       /**< FM SW-parser Instruction-RAM */
87165 +    e_MODULE_ID_FM1_1GMAC0,         /**< FM 1G MAC #0 */
87166 +    e_MODULE_ID_FM1_1GMAC1,         /**< FM 1G MAC #1 */
87167 +    e_MODULE_ID_FM1_1GMAC2,         /**< FM 1G MAC #2 */
87168 +    e_MODULE_ID_FM1_1GMAC3,         /**< FM 1G MAC #3 */
87169 +    e_MODULE_ID_FM1_10GMAC0,        /**< FM 10G MAC #0 */
87170 +
87171 +    e_MODULE_ID_FM2,                /**< Frame manager #2 module */
87172 +    e_MODULE_ID_FM2_RTC,            /**< FM Real-Time-Clock */
87173 +    e_MODULE_ID_FM2_MURAM,          /**< FM Multi-User-RAM */
87174 +    e_MODULE_ID_FM2_BMI,            /**< FM BMI block */
87175 +    e_MODULE_ID_FM2_QMI,            /**< FM QMI block */
87176 +    e_MODULE_ID_FM2_PRS,            /**< FM parser block */
87177 +    e_MODULE_ID_FM2_PORT_HO0,       /**< FM Host-command/offline-parsing port block */
87178 +    e_MODULE_ID_FM2_PORT_HO1,       /**< FM Host-command/offline-parsing port block */
87179 +    e_MODULE_ID_FM2_PORT_HO2,       /**< FM Host-command/offline-parsing port block */
87180 +    e_MODULE_ID_FM2_PORT_HO3,       /**< FM Host-command/offline-parsing port block */
87181 +    e_MODULE_ID_FM2_PORT_HO4,       /**< FM Host-command/offline-parsing port block */
87182 +    e_MODULE_ID_FM2_PORT_HO5,       /**< FM Host-command/offline-parsing port block */
87183 +    e_MODULE_ID_FM2_PORT_HO6,       /**< FM Host-command/offline-parsing port block */
87184 +    e_MODULE_ID_FM2_PORT_1GRx0,     /**< FM Rx 1G MAC port block */
87185 +    e_MODULE_ID_FM2_PORT_1GRx1,     /**< FM Rx 1G MAC port block */
87186 +    e_MODULE_ID_FM2_PORT_1GRx2,     /**< FM Rx 1G MAC port block */
87187 +    e_MODULE_ID_FM2_PORT_1GRx3,     /**< FM Rx 1G MAC port block */
87188 +    e_MODULE_ID_FM2_PORT_10GRx0,    /**< FM Rx 10G MAC port block */
87189 +    e_MODULE_ID_FM2_PORT_1GTx0,     /**< FM Tx 1G MAC port block */
87190 +    e_MODULE_ID_FM2_PORT_1GTx1,     /**< FM Tx 1G MAC port block */
87191 +    e_MODULE_ID_FM2_PORT_1GTx2,     /**< FM Tx 1G MAC port block */
87192 +    e_MODULE_ID_FM2_PORT_1GTx3,     /**< FM Tx 1G MAC port block */
87193 +    e_MODULE_ID_FM2_PORT_10GTx0,    /**< FM Tx 10G MAC port block */
87194 +    e_MODULE_ID_FM2_PLCR,           /**< FM Policer */
87195 +    e_MODULE_ID_FM2_KG,             /**< FM Keygen */
87196 +    e_MODULE_ID_FM2_DMA,            /**< FM DMA */
87197 +    e_MODULE_ID_FM2_FPM,            /**< FM FPM */
87198 +    e_MODULE_ID_FM2_IRAM,           /**< FM Instruction-RAM */
87199 +    e_MODULE_ID_FM2_1GMDIO0,        /**< FM 1G MDIO MAC 0*/
87200 +    e_MODULE_ID_FM2_1GMDIO1,        /**< FM 1G MDIO MAC 1*/
87201 +    e_MODULE_ID_FM2_1GMDIO2,        /**< FM 1G MDIO MAC 2*/
87202 +    e_MODULE_ID_FM2_1GMDIO3,        /**< FM 1G MDIO MAC 3*/
87203 +    e_MODULE_ID_FM2_10GMDIO,        /**< FM 10G MDIO */
87204 +    e_MODULE_ID_FM2_PRS_IRAM,       /**< FM SW-parser Instruction-RAM */
87205 +    e_MODULE_ID_FM2_1GMAC0,         /**< FM 1G MAC #0 */
87206 +    e_MODULE_ID_FM2_1GMAC1,         /**< FM 1G MAC #1 */
87207 +    e_MODULE_ID_FM2_1GMAC2,         /**< FM 1G MAC #2 */
87208 +    e_MODULE_ID_FM2_1GMAC3,         /**< FM 1G MAC #3 */
87209 +    e_MODULE_ID_FM2_10GMAC0,        /**< FM 10G MAC #0 */
87210 +
87211 +    e_MODULE_ID_SEC_GEN,            /**< SEC 4.0 General registers      */
87212 +    e_MODULE_ID_SEC_QI,             /**< SEC 4.0 QI registers           */
87213 +    e_MODULE_ID_SEC_JQ0,            /**< SEC 4.0 JQ-0 registers         */
87214 +    e_MODULE_ID_SEC_JQ1,            /**< SEC 4.0 JQ-1 registers         */
87215 +    e_MODULE_ID_SEC_JQ2,            /**< SEC 4.0 JQ-2 registers         */
87216 +    e_MODULE_ID_SEC_JQ3,            /**< SEC 4.0 JQ-3 registers         */
87217 +    e_MODULE_ID_SEC_RTIC,           /**< SEC 4.0 RTIC registers         */
87218 +    e_MODULE_ID_SEC_DECO0_CCB0,     /**< SEC 4.0 DECO-0/CCB-0 registers */
87219 +    e_MODULE_ID_SEC_DECO1_CCB1,     /**< SEC 4.0 DECO-1/CCB-1 registers */
87220 +    e_MODULE_ID_SEC_DECO2_CCB2,     /**< SEC 4.0 DECO-2/CCB-2 registers */
87221 +    e_MODULE_ID_SEC_DECO3_CCB3,     /**< SEC 4.0 DECO-3/CCB-3 registers */
87222 +    e_MODULE_ID_SEC_DECO4_CCB4,     /**< SEC 4.0 DECO-4/CCB-4 registers */
87223 +
87224 +    e_MODULE_ID_MPIC,               /**< MPIC */
87225 +    e_MODULE_ID_GPIO,               /**< GPIO */
87226 +    e_MODULE_ID_SERDES,             /**< SERDES */
87227 +    e_MODULE_ID_CPC_1,              /**< CoreNet-Platform-Cache 1 */
87228 +    e_MODULE_ID_CPC_2,              /**< CoreNet-Platform-Cache 2 */
87229 +
87230 +    e_MODULE_ID_SRIO_PORTS,         /**< RapidIO controller */
87231 +    e_MODULE_ID_SRIO_MU,            /**< RapidIO messaging unit module */
87232 +
87233 +    e_MODULE_ID_DUMMY_LAST
87234 +} e_ModuleId;
87235 +
87236 +#define NUM_OF_MODULES  e_MODULE_ID_DUMMY_LAST
87237 +
87238 +#if 0 /* using unified values */
87239 +/*****************************************************************************
87240 + INTEGRATION-SPECIFIC MODULE CODES
87241 +******************************************************************************/
87242 +#define MODULE_UNKNOWN          0x00000000
87243 +#define MODULE_MEM              0x00010000
87244 +#define MODULE_MM               0x00020000
87245 +#define MODULE_CORE             0x00030000
87246 +#define MODULE_CHIP             0x00040000
87247 +#define MODULE_PLTFRM           0x00050000
87248 +#define MODULE_PM               0x00060000
87249 +#define MODULE_MMU              0x00070000
87250 +#define MODULE_PIC              0x00080000
87251 +#define MODULE_CPC              0x00090000
87252 +#define MODULE_DUART            0x000a0000
87253 +#define MODULE_SERDES           0x000b0000
87254 +#define MODULE_PIO              0x000c0000
87255 +#define MODULE_QM               0x000d0000
87256 +#define MODULE_BM               0x000e0000
87257 +#define MODULE_SEC              0x000f0000
87258 +#define MODULE_LAW              0x00100000
87259 +#define MODULE_LBC              0x00110000
87260 +#define MODULE_PAMU             0x00120000
87261 +#define MODULE_FM               0x00130000
87262 +#define MODULE_FM_MURAM         0x00140000
87263 +#define MODULE_FM_PCD           0x00150000
87264 +#define MODULE_FM_RTC           0x00160000
87265 +#define MODULE_FM_MAC           0x00170000
87266 +#define MODULE_FM_PORT          0x00180000
87267 +#define MODULE_FM_SP            0x00190000
87268 +#define MODULE_DPA_PORT         0x001a0000
87269 +#define MODULE_MII              0x001b0000
87270 +#define MODULE_I2C              0x001c0000
87271 +#define MODULE_DMA              0x001d0000
87272 +#define MODULE_DDR              0x001e0000
87273 +#define MODULE_ESPI             0x001f0000
87274 +#define MODULE_DPAA_IPSEC       0x00200000
87275 +#endif /* using unified values */
87276 +
87277 +/*****************************************************************************
87278 + PAMU INTEGRATION-SPECIFIC DEFINITIONS
87279 +******************************************************************************/
87280 +#define PAMU_NUM_OF_PARTITIONS  5
87281 +
87282 +#define PAMU_PICS_AVICS_ERRATA_PAMU3
87283 +
87284 +/*****************************************************************************
87285 + LAW INTEGRATION-SPECIFIC DEFINITIONS
87286 +******************************************************************************/
87287 +#define LAW_NUM_OF_WINDOWS      32
87288 +#define LAW_MIN_WINDOW_SIZE     0x0000000000001000LL    /**< 4KB */
87289 +#define LAW_MAX_WINDOW_SIZE     0x0000002000000000LL    /**< 64GB */
87290 +
87291 +
87292 +/*****************************************************************************
87293 + LBC INTEGRATION-SPECIFIC DEFINITIONS
87294 +******************************************************************************/
87295 +/**************************************************************************//**
87296 + @Group         lbc_exception_grp LBC Exception Unit
87297 +
87298 + @Description   LBC Exception unit API functions, definitions and enums
87299 +
87300 + @{
87301 +*//***************************************************************************/
87302 +
87303 +/**************************************************************************//**
87304 + @Anchor        lbc_exbm
87305 +
87306 + @Collection    LBC Errors Bit Mask
87307 +
87308 +                These errors are reported through the exceptions callback..
87309 +                The values can be or'ed in any combination in the errors mask
87310 +                parameter of the errors report structure.
87311 +
87312 +                These errors can also be passed as a bit-mask to
87313 +                LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
87314 +                for enabling or disabling error checking.
87315 + @{
87316 +*//***************************************************************************/
87317 +#define LBC_ERR_BUS_MONITOR     0x80000000  /**< Bus monitor error */
87318 +#define LBC_ERR_PARITY_ECC      0x20000000  /**< Parity error for GPCM/UPM */
87319 +#define LBC_ERR_WRITE_PROTECT   0x04000000  /**< Write protection error */
87320 +#define LBC_ERR_ATOMIC_WRITE    0x00800000  /**< Atomic write error */
87321 +#define LBC_ERR_ATOMIC_READ     0x00400000  /**< Atomic read error */
87322 +#define LBC_ERR_CHIP_SELECT     0x00080000  /**< Unrecognized chip select */
87323 +
87324 +#define LBC_ERR_ALL             (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
87325 +                                 LBC_ERR_WRITE_PROTECT | LBC_ERR_ATOMIC_WRITE | \
87326 +                                 LBC_ERR_ATOMIC_READ | LBC_ERR_CHIP_SELECT)
87327 +                                            /**< All possible errors */
87328 +/* @} */
87329 +/** @} */ /* end of lbc_exception_grp group */
87330 +
87331 +#define LBC_INCORRECT_ERROR_REPORT_ERRATA
87332 +
87333 +#define LBC_NUM_OF_BANKS            8
87334 +#define LBC_MAX_CS_SIZE             0x0000000100000000LL
87335 +#define LBC_ATOMIC_OPERATION_SUPPORT
87336 +#define LBC_PARITY_SUPPORT
87337 +#define LBC_ADDRESS_HOLD_TIME_CTRL
87338 +#define LBC_HIGH_CLK_DIVIDERS
87339 +#define LBC_FCM_AVAILABLE
87340 +
87341 +/*****************************************************************************
87342 + GPIO INTEGRATION-SPECIFIC DEFINITIONS
87343 +******************************************************************************/
87344 +#define GPIO_NUM_OF_PORTS   1   /**< Number of ports in GPIO module;
87345 +                                     Each port contains up to 32 i/O pins. */
87346 +
87347 +#define GPIO_VALID_PIN_MASKS  \
87348 +    { /* Port A */ 0xFFFFFFFF }
87349 +
87350 +#define GPIO_VALID_INTR_MASKS \
87351 +    { /* Port A */ 0xFFFFFFFF }
87352 +
87353 +#endif /* __PART_INTEGRATION_EXT_H */
87354 --- /dev/null
87355 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/math_ext.h
87356 @@ -0,0 +1,100 @@
87357 +/*
87358 + * Copyright 2008-2012 Freescale Semiconductor Inc.
87359 + *
87360 + * Redistribution and use in source and binary forms, with or without
87361 + * modification, are permitted provided that the following conditions are met:
87362 + *     * Redistributions of source code must retain the above copyright
87363 + *       notice, this list of conditions and the following disclaimer.
87364 + *     * Redistributions in binary form must reproduce the above copyright
87365 + *       notice, this list of conditions and the following disclaimer in the
87366 + *       documentation and/or other materials provided with the distribution.
87367 + *     * Neither the name of Freescale Semiconductor nor the
87368 + *       names of its contributors may be used to endorse or promote products
87369 + *       derived from this software without specific prior written permission.
87370 + *
87371 + *
87372 + * ALTERNATIVELY, this software may be distributed under the terms of the
87373 + * GNU General Public License ("GPL") as published by the Free Software
87374 + * Foundation, either version 2 of that License or (at your option) any
87375 + * later version.
87376 + *
87377 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
87378 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
87379 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
87380 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
87381 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
87382 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
87383 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
87384 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
87385 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
87386 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
87387 + */
87388 +
87389 +
87390 +#ifndef __MATH_EXT_H
87391 +#define __MATH_EXT_H
87392 +
87393 +
87394 +#if defined(NCSW_LINUX) && defined(__KERNEL__)
87395 +#include <linux/math.h>
87396 +#include <linux/math64.h>
87397 +
87398 +#elif defined(__MWERKS__)
87399 +#define LOW(x) ( sizeof(x)==8 ? *(1+(int32_t*)&x) : (*(int32_t*)&x))
87400 +#define HIGH(x) (*(int32_t*)&x)
87401 +#define ULOW(x) ( sizeof(x)==8 ? *(1+(uint32_t*)&x) : (*(uint32_t*)&x))
87402 +#define UHIGH(x) (*(uint32_t*)&x)
87403 +
87404 +static const double big = 1.0e300;
87405 +
87406 +/* Macro for checking if a number is a power of 2 */
87407 +static __inline__ double ceil(double x)
87408 +{
87409 +    int32_t i0,i1,j0; /*- cc 020130 -*/
87410 +    uint32_t i,j; /*- cc 020130 -*/
87411 +    i0 =  HIGH(x);
87412 +    i1 =  LOW(x);
87413 +    j0 = ((i0>>20)&0x7ff)-0x3ff;
87414 +    if(j0<20) {
87415 +        if(j0<0) {     /* raise inexact if x != 0 */
87416 +        if(big+x>0.0) {/* return 0*sign(x) if |x|<1 */
87417 +            if(i0<0) {i0=0x80000000;i1=0;}
87418 +            else if((i0|i1)!=0) { i0=0x3ff00000;i1=0;}
87419 +        }
87420 +        } else {
87421 +        i = (uint32_t)(0x000fffff)>>j0;
87422 +        if(((i0&i)|i1)==0) return x; /* x is integral */
87423 +        if(big+x>0.0) {    /* raise inexact flag */
87424 +            if(i0>0) i0 += (0x00100000)>>j0;
87425 +            i0 &= (~i); i1=0;
87426 +        }
87427 +        }
87428 +    } else if (j0>51) {
87429 +        if(j0==0x400) return x+x;    /* inf or NaN */
87430 +        else return x;        /* x is integral */
87431 +    } else {
87432 +        i = ((uint32_t)(0xffffffff))>>(j0-20); /*- cc 020130 -*/
87433 +        if((i1&i)==0) return x;    /* x is integral */
87434 +        if(big+x>0.0) {         /* raise inexact flag */
87435 +        if(i0>0) {
87436 +            if(j0==20) i0+=1;
87437 +            else {
87438 +            j = (uint32_t)(i1 + (1<<(52-j0)));
87439 +            if(j<i1) i0+=1;    /* got a carry */
87440 +            i1 = (int32_t)j;
87441 +            }
87442 +        }
87443 +        i1 &= (~i);
87444 +        }
87445 +    }
87446 +    HIGH(x) = i0;
87447 +    LOW(x) = i1;
87448 +    return x;
87449 +}
87450 +
87451 +#else
87452 +#include <math.h>
87453 +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
87454 +
87455 +
87456 +#endif /* __MATH_EXT_H */
87457 --- /dev/null
87458 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/ncsw_ext.h
87459 @@ -0,0 +1,435 @@
87460 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
87461 + * All rights reserved.
87462 + *
87463 + * Redistribution and use in source and binary forms, with or without
87464 + * modification, are permitted provided that the following conditions are met:
87465 + *     * Redistributions of source code must retain the above copyright
87466 + *       notice, this list of conditions and the following disclaimer.
87467 + *     * Redistributions in binary form must reproduce the above copyright
87468 + *       notice, this list of conditions and the following disclaimer in the
87469 + *       documentation and/or other materials provided with the distribution.
87470 + *     * Neither the name of Freescale Semiconductor nor the
87471 + *       names of its contributors may be used to endorse or promote products
87472 + *       derived from this software without specific prior written permission.
87473 + *
87474 + *
87475 + * ALTERNATIVELY, this software may be distributed under the terms of the
87476 + * GNU General Public License ("GPL") as published by the Free Software
87477 + * Foundation, either version 2 of that License or (at your option) any
87478 + * later version.
87479 + *
87480 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
87481 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
87482 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
87483 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
87484 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
87485 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
87486 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
87487 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
87488 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
87489 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
87490 + */
87491 +
87492 +
87493 +/**************************************************************************//**
87494 + @File          ncsw_ext.h
87495 +
87496 + @Description   General NetCommSw Standard Definitions
87497 +*//***************************************************************************/
87498 +
87499 +#ifndef __NCSW_EXT_H
87500 +#define __NCSW_EXT_H
87501 +
87502 +
87503 +#include "memcpy_ext.h"
87504 +
87505 +#define WRITE_BLOCK                 IOMemSet32   /* include memcpy_ext.h */
87506 +#define COPY_BLOCK                  Mem2IOCpy32  /* include memcpy_ext.h */
87507 +
87508 +#define PTR_TO_UINT(_ptr)           ((uintptr_t)(_ptr))
87509 +#define UINT_TO_PTR(_val)           ((void*)(uintptr_t)(_val))
87510 +
87511 +#define PTR_MOVE(_ptr, _offset)     (void*)((uint8_t*)(_ptr) + (_offset))
87512 +
87513 +
87514 +#define WRITE_UINT8_UINT24(arg, data08, data24) \
87515 +    WRITE_UINT32(arg,((uint32_t)(data08)<<24)|((uint32_t)(data24)&0x00FFFFFF))
87516 +#define WRITE_UINT24_UINT8(arg, data24, data08) \
87517 +    WRITE_UINT32(arg,((uint32_t)(data24)<< 8)|((uint32_t)(data08)&0x000000FF))
87518 +
87519 +/* Little-Endian access macros */
87520 +
87521 +#define WRITE_UINT16_LE(arg, data) \
87522 +        WRITE_UINT16((arg), SwapUint16(data))
87523 +
87524 +#define WRITE_UINT32_LE(arg, data) \
87525 +        WRITE_UINT32((arg), SwapUint32(data))
87526 +
87527 +#define WRITE_UINT64_LE(arg, data) \
87528 +        WRITE_UINT64((arg), SwapUint64(data))
87529 +
87530 +#define GET_UINT16_LE(arg) \
87531 +        SwapUint16(GET_UINT16(arg))
87532 +
87533 +#define GET_UINT32_LE(arg) \
87534 +        SwapUint32(GET_UINT32(arg))
87535 +
87536 +#define GET_UINT64_LE(arg) \
87537 +        SwapUint64(GET_UINT64(arg))
87538 +
87539 +/* Write and Read again macros */
87540 +#define WRITE_UINT_SYNC(size, arg, data)    \
87541 +    do {                                    \
87542 +        WRITE_UINT##size((arg), (data));    \
87543 +        CORE_MemoryBarrier();               \
87544 +    } while (0)
87545 +
87546 +#define WRITE_UINT8_SYNC(arg, data)     WRITE_UINT_SYNC(8, (arg), (data))
87547 +
87548 +#define WRITE_UINT16_SYNC(arg, data)    WRITE_UINT_SYNC(16, (arg), (data))
87549 +#define WRITE_UINT32_SYNC(arg, data)    WRITE_UINT_SYNC(32, (arg), (data))
87550 +
87551 +#define MAKE_UINT64(high32, low32)      (((uint64_t)high32 << 32) | (low32))
87552 +
87553 +
87554 +/*----------------------*/
87555 +/* Miscellaneous macros */
87556 +/*----------------------*/
87557 +
87558 +#define UNUSED(_x)             ((void)(_x))
87559 +
87560 +#define KILOBYTE            0x400UL                 /* 1024 */
87561 +#define MEGABYTE            (KILOBYTE * KILOBYTE)   /* 1024*1024 */
87562 +#define GIGABYTE            ((uint64_t)(KILOBYTE * MEGABYTE))   /* 1024*1024*1024 */
87563 +#define TERABYTE            ((uint64_t)(KILOBYTE * GIGABYTE))   /* 1024*1024*1024*1024 */
87564 +
87565 +#ifndef NO_IRQ
87566 +#define NO_IRQ         (0)
87567 +#endif
87568 +#define NCSW_MASTER_ID      (0)
87569 +
87570 +/* Macro for checking if a number is a power of 2 */
87571 +#define POWER_OF_2(n)   (!((n) & ((n)-1)))
87572 +
87573 +/* Macro for calculating log of base 2 */
87574 +#define LOG2(num, log2Num)      \
87575 +    do                          \
87576 +    {                           \
87577 +        uint64_t tmp = (num);   \
87578 +        log2Num = 0;            \
87579 +        while (tmp > 1)         \
87580 +        {                       \
87581 +            log2Num++;          \
87582 +            tmp >>= 1;          \
87583 +        }                       \
87584 +    } while (0)
87585 +
87586 +#define NEXT_POWER_OF_2(_num, _nextPow) \
87587 +do                                      \
87588 +{                                       \
87589 +    if (POWER_OF_2(_num))               \
87590 +        _nextPow = (_num);              \
87591 +    else                                \
87592 +    {                                   \
87593 +        uint64_t tmp = (_num);          \
87594 +        _nextPow = 1;                   \
87595 +        while (tmp)                     \
87596 +        {                               \
87597 +            _nextPow <<= 1;             \
87598 +            tmp >>= 1;                  \
87599 +        }                               \
87600 +    }                                   \
87601 +} while (0)
87602 +
87603 +/* Ceiling division - not the fastest way, but safer in terms of overflow */
87604 +#define DIV_CEIL(x,y) (div64_u64((x),(y)) + (((div64_u64((x),(y))*(y)) == (x)) ? 0 : 1))
87605 +
87606 +/* Round up a number to be a multiple of a second number */
87607 +#define ROUND_UP(x,y)   ((((x) + (y) - 1) / (y)) * (y))
87608 +
87609 +/* Timing macro for converting usec units to number of ticks.   */
87610 +/* (number of usec *  clock_Hz) / 1,000,000) - since            */
87611 +/* clk is in MHz units, no division needed.                     */
87612 +#define USEC_TO_CLK(usec,clk)       ((usec) * (clk))
87613 +#define CYCLES_TO_USEC(cycles,clk)  ((cycles) / (clk))
87614 +
87615 +/* Timing macros for converting between nsec units and number of clocks. */
87616 +#define NSEC_TO_CLK(nsec,clk)       DIV_CEIL(((nsec) * (clk)), 1000)
87617 +#define CYCLES_TO_NSEC(cycles,clk)  (((cycles) * 1000) / (clk))
87618 +
87619 +/* Timing macros for converting between psec units and number of clocks. */
87620 +#define PSEC_TO_CLK(psec,clk)       DIV_CEIL(((psec) * (clk)), 1000000)
87621 +#define CYCLES_TO_PSEC(cycles,clk)  (((cycles) * 1000000) / (clk))
87622 +
87623 +/* Min, Max macros */
87624 +#define MIN(a,b)    ((a) < (b) ? (a) : (b))
87625 +#define MAX(a,b)    ((a) > (b) ? (a) : (b))
87626 +#define IN_RANGE(min,val,max) ((min)<=(val) && (val)<=(max))
87627 +
87628 +#define ABS(a)  ((a<0)?(a*-1):a)
87629 +
87630 +#if !(defined(ARRAY_SIZE))
87631 +#define ARRAY_SIZE(arr)   (sizeof(arr) / sizeof((arr)[0]))
87632 +#endif /* !defined(ARRAY_SIZE) */
87633 +
87634 +
87635 +/* possible alignments */
87636 +#define HALF_WORD_ALIGNMENT     2
87637 +#define WORD_ALIGNMENT          4
87638 +#define DOUBLE_WORD_ALIGNMENT   8
87639 +#define BURST_ALIGNMENT         32
87640 +
87641 +#define HALF_WORD_ALIGNED       0x00000001
87642 +#define WORD_ALIGNED            0x00000003
87643 +#define DOUBLE_WORD_ALIGNED     0x00000007
87644 +#define BURST_ALIGNED           0x0000001f
87645 +#ifndef IS_ALIGNED
87646 +#define IS_ALIGNED(n,align)     (!((uint32_t)(n) & (align - 1)))
87647 +#endif /* IS_ALIGNED */
87648 +
87649 +
87650 +#define LAST_BUF        1
87651 +#define FIRST_BUF       2
87652 +#define SINGLE_BUF      (LAST_BUF | FIRST_BUF)
87653 +#define MIDDLE_BUF      4
87654 +
87655 +#define ARRAY_END       -1
87656 +
87657 +#define ILLEGAL_BASE    (~0)
87658 +
87659 +#define BUF_POSITION(first, last)   state[(!!(last))<<1 | !!(first)]
87660 +#define DECLARE_POSITION static uint8_t state[4] = { (uint8_t)MIDDLE_BUF, (uint8_t)FIRST_BUF, (uint8_t)LAST_BUF, (uint8_t)SINGLE_BUF };
87661 +
87662 +
87663 +/**************************************************************************//**
87664 + @Description   Timers operation mode
87665 +*//***************************************************************************/
87666 +typedef enum e_TimerMode
87667 +{
87668 +    e_TIMER_MODE_INVALID = 0,
87669 +    e_TIMER_MODE_FREE_RUN,    /**< Free run - counter continues to increase
87670 +                                   after reaching the reference value. */
87671 +    e_TIMER_MODE_PERIODIC,    /**< Periodic - counter restarts counting from 0
87672 +                                   after reaching the reference value. */
87673 +    e_TIMER_MODE_SINGLE       /**< Single (one-shot) - counter stops counting
87674 +                                   after reaching the reference value. */
87675 +} e_TimerMode;
87676 +
87677 +
87678 +/**************************************************************************//**
87679 + @Description   Enumeration (bit flags) of communication modes (Transmit,
87680 +                receive or both).
87681 +*//***************************************************************************/
87682 +typedef enum e_CommMode
87683 +{
87684 +    e_COMM_MODE_NONE        = 0,    /**< No transmit/receive communication */
87685 +    e_COMM_MODE_RX          = 1,    /**< Only receive communication */
87686 +    e_COMM_MODE_TX          = 2,    /**< Only transmit communication */
87687 +    e_COMM_MODE_RX_AND_TX   = 3     /**< Both transmit and receive communication */
87688 +} e_CommMode;
87689 +
87690 +/**************************************************************************//**
87691 + @Description   General Diagnostic Mode
87692 +*//***************************************************************************/
87693 +typedef enum e_DiagMode
87694 +{
87695 +    e_DIAG_MODE_NONE = 0,       /**< Normal operation; no diagnostic mode */
87696 +    e_DIAG_MODE_CTRL_LOOPBACK,  /**< Loopback in the controller */
87697 +    e_DIAG_MODE_CHIP_LOOPBACK,  /**< Loopback in the chip but not in the
87698 +                                     controller; e.g. IO-pins, SerDes, etc. */
87699 +    e_DIAG_MODE_PHY_LOOPBACK,   /**< Loopback in the external PHY */
87700 +    e_DIAG_MODE_EXT_LOOPBACK,   /**< Loopback in the external line (beyond the PHY) */
87701 +    e_DIAG_MODE_CTRL_ECHO,      /**< Echo incoming data by the controller */
87702 +    e_DIAG_MODE_PHY_ECHO        /**< Echo incoming data by the PHY */
87703 +} e_DiagMode;
87704 +
87705 +/**************************************************************************//**
87706 + @Description   Possible RxStore callback responses.
87707 +*//***************************************************************************/
87708 +typedef enum e_RxStoreResponse
87709 +{
87710 +      e_RX_STORE_RESPONSE_PAUSE     /**< Pause invoking callback with received data;
87711 +                                         in polling mode, start again invoking callback
87712 +                                         only next time user invokes the receive routine;
87713 +                                         in interrupt mode, start again invoking callback
87714 +                                         only next time a receive event triggers an interrupt;
87715 +                                         in all cases, received data that are pending are not
87716 +                                         lost, rather, their processing is temporarily deferred;
87717 +                                         in all cases, received data are processed in the order
87718 +                                         in which they were received. */
87719 +    , e_RX_STORE_RESPONSE_CONTINUE  /**< Continue invoking callback with received data. */
87720 +} e_RxStoreResponse;
87721 +
87722 +
87723 +/**************************************************************************//**
87724 + @Description   General Handle
87725 +*//***************************************************************************/
87726 +typedef void *      t_Handle;   /**< handle, used as object's descriptor */
87727 +
87728 +/**************************************************************************//**
87729 + @Description   MUTEX type
87730 +*//***************************************************************************/
87731 +typedef uint32_t    t_Mutex;
87732 +
87733 +/**************************************************************************//**
87734 + @Description   Error Code.
87735 +
87736 +                The high word of the error code is the code of the software
87737 +                module (driver). The low word is the error type (e_ErrorType).
87738 +                To get the values from the error code, use GET_ERROR_TYPE()
87739 +                and GET_ERROR_MODULE().
87740 +*//***************************************************************************/
87741 +typedef uint32_t    t_Error;
87742 +
87743 +/**************************************************************************//**
87744 + @Description   General prototype of interrupt service routine (ISR).
87745 +
87746 + @Param[in]     handle - Optional handle of the module handling the interrupt.
87747 +
87748 + @Return        None
87749 + *//***************************************************************************/
87750 +typedef void (t_Isr)(t_Handle handle);
87751 +
87752 +/**************************************************************************//**
87753 + @Anchor        mem_attr
87754 +
87755 + @Collection    Memory Attributes
87756 +
87757 +                Various attributes of memory partitions. These values may be
87758 +                or'ed together to create a mask of all memory attributes.
87759 + @{
87760 +*//***************************************************************************/
87761 +#define MEMORY_ATTR_CACHEABLE           0x00000001
87762 +                                        /**< Memory is cacheable */
87763 +#define MEMORY_ATTR_QE_2ND_BUS_ACCESS   0x00000002
87764 +                                        /**< Memory can be accessed by QUICC Engine
87765 +                                             through its secondary bus interface */
87766 +
87767 +/* @} */
87768 +
87769 +
87770 +/**************************************************************************//**
87771 + @Function      t_GetBufFunction
87772 +
87773 + @Description   User callback function called by driver to get data buffer.
87774 +
87775 +                User provides this function. Driver invokes it.
87776 +
87777 + @Param[in]     h_BufferPool        - A handle to buffer pool manager
87778 + @Param[out]    p_BufContextHandle  - Returns the user's private context that
87779 +                                      should be associated with the buffer
87780 +
87781 + @Return        Pointer to data buffer, NULL if error
87782 + *//***************************************************************************/
87783 +typedef uint8_t * (t_GetBufFunction)(t_Handle   h_BufferPool,
87784 +                                     t_Handle   *p_BufContextHandle);
87785 +
87786 +/**************************************************************************//**
87787 + @Function      t_PutBufFunction
87788 +
87789 + @Description   User callback function called by driver to return data buffer.
87790 +
87791 +                User provides this function. Driver invokes it.
87792 +
87793 + @Param[in]     h_BufferPool    - A handle to buffer pool manager
87794 + @Param[in]     p_Buffer        - A pointer to buffer to return
87795 + @Param[in]     h_BufContext    - The user's private context associated with
87796 +                                  the returned buffer
87797 +
87798 + @Return        E_OK on success; Error code otherwise
87799 + *//***************************************************************************/
87800 +typedef t_Error (t_PutBufFunction)(t_Handle h_BufferPool,
87801 +                                   uint8_t  *p_Buffer,
87802 +                                   t_Handle h_BufContext);
87803 +
87804 +/**************************************************************************//**
87805 + @Function      t_PhysToVirt
87806 +
87807 + @Description   Translates a physical address to the matching virtual address.
87808 +
87809 + @Param[in]     addr - The physical address to translate.
87810 +
87811 + @Return        Virtual address.
87812 +*//***************************************************************************/
87813 +typedef void * t_PhysToVirt(physAddress_t addr);
87814 +
87815 +/**************************************************************************//**
87816 + @Function      t_VirtToPhys
87817 +
87818 + @Description   Translates a virtual address to the matching physical address.
87819 +
87820 + @Param[in]     addr - The virtual address to translate.
87821 +
87822 + @Return        Physical address.
87823 +*//***************************************************************************/
87824 +typedef physAddress_t t_VirtToPhys(void *addr);
87825 +
87826 +/**************************************************************************//**
87827 + @Description   Buffer Pool Information Structure.
87828 +*//***************************************************************************/
87829 +typedef struct t_BufferPoolInfo
87830 +{
87831 +    t_Handle            h_BufferPool;   /**< A handle to the buffer pool manager */
87832 +    t_GetBufFunction    *f_GetBuf;      /**< User callback to get a free buffer */
87833 +    t_PutBufFunction    *f_PutBuf;      /**< User callback to return a buffer */
87834 +    uint16_t            bufferSize;     /**< Buffer size (in bytes) */
87835 +
87836 +    t_PhysToVirt        *f_PhysToVirt;  /**< User callback to translate pool buffers
87837 +                                             physical addresses to virtual addresses  */
87838 +    t_VirtToPhys        *f_VirtToPhys;  /**< User callback to translate pool buffers
87839 +                                             virtual addresses to physical addresses */
87840 +} t_BufferPoolInfo;
87841 +
87842 +
87843 +/**************************************************************************//**
87844 + @Description   User callback function called by driver when transmit completed.
87845 +
87846 +                User provides this function. Driver invokes it.
87847 +
87848 + @Param[in]     h_App           - Application's handle, as was provided to the
87849 +                                  driver by the user
87850 + @Param[in]     queueId         - Transmit queue ID
87851 + @Param[in]     p_Data          - Pointer to the data buffer
87852 + @Param[in]     h_BufContext    - The user's private context associated with
87853 +                                  the given data buffer
87854 + @Param[in]     status          - Transmit status and errors
87855 + @Param[in]     flags           - Driver-dependent information
87856 + *//***************************************************************************/
87857 +typedef void (t_TxConfFunction)(t_Handle    h_App,
87858 +                                uint32_t    queueId,
87859 +                                uint8_t     *p_Data,
87860 +                                t_Handle    h_BufContext,
87861 +                                uint16_t    status,
87862 +                                uint32_t    flags);
87863 +
87864 +/**************************************************************************//**
87865 + @Description   User callback function called by driver with receive data.
87866 +
87867 +                User provides this function. Driver invokes it.
87868 +
87869 + @Param[in]     h_App           - Application's handle, as was provided to the
87870 +                                  driver by the user
87871 + @Param[in]     queueId         - Receive queue ID
87872 + @Param[in]     p_Data          - Pointer to the buffer with received data
87873 + @Param[in]     h_BufContext    - The user's private context associated with
87874 +                                  the given data buffer
87875 + @Param[in]     length          - Length of received data
87876 + @Param[in]     status          - Receive status and errors
87877 + @Param[in]     position        - Position of buffer in frame
87878 + @Param[in]     flags           - Driver-dependent information
87879 +
87880 + @Retval        e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
87881 +                                               operation for all ready data.
87882 + @Retval        e_RX_STORE_RESPONSE_PAUSE    - order the driver to stop Rx operation.
87883 + *//***************************************************************************/
87884 +typedef e_RxStoreResponse (t_RxStoreFunction)(t_Handle  h_App,
87885 +                                              uint32_t  queueId,
87886 +                                              uint8_t   *p_Data,
87887 +                                              t_Handle  h_BufContext,
87888 +                                              uint32_t  length,
87889 +                                              uint16_t  status,
87890 +                                              uint8_t   position,
87891 +                                              uint32_t  flags);
87892 +
87893 +
87894 +#endif /* __NCSW_EXT_H */
87895 --- /dev/null
87896 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/net_ext.h
87897 @@ -0,0 +1,430 @@
87898 +/*
87899 + * Copyright 2008-2012 Freescale Semiconductor Inc.
87900 + *
87901 + * Redistribution and use in source and binary forms, with or without
87902 + * modification, are permitted provided that the following conditions are met:
87903 + *     * Redistributions of source code must retain the above copyright
87904 + *       notice, this list of conditions and the following disclaimer.
87905 + *     * Redistributions in binary form must reproduce the above copyright
87906 + *       notice, this list of conditions and the following disclaimer in the
87907 + *       documentation and/or other materials provided with the distribution.
87908 + *     * Neither the name of Freescale Semiconductor nor the
87909 + *       names of its contributors may be used to endorse or promote products
87910 + *       derived from this software without specific prior written permission.
87911 + *
87912 + *
87913 + * ALTERNATIVELY, this software may be distributed under the terms of the
87914 + * GNU General Public License ("GPL") as published by the Free Software
87915 + * Foundation, either version 2 of that License or (at your option) any
87916 + * later version.
87917 + *
87918 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
87919 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
87920 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
87921 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
87922 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
87923 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
87924 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
87925 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
87926 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
87927 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
87928 + */
87929 +
87930 +
87931 +/**************************************************************************//**
87932 + @File          net_ext.h
87933 +
87934 + @Description   This file contains common and general netcomm headers definitions.
87935 +*//***************************************************************************/
87936 +#ifndef __NET_EXT_H
87937 +#define __NET_EXT_H
87938 +
87939 +#include "std_ext.h"
87940 +
87941 +
87942 +typedef uint8_t headerFieldPpp_t;
87943 +
87944 +#define NET_HEADER_FIELD_PPP_PID                        (1)
87945 +#define NET_HEADER_FIELD_PPP_COMPRESSED                 (NET_HEADER_FIELD_PPP_PID << 1)
87946 +#define NET_HEADER_FIELD_PPP_ALL_FIELDS                 ((NET_HEADER_FIELD_PPP_PID << 2) - 1)
87947 +
87948 +
87949 +typedef uint8_t headerFieldPppoe_t;
87950 +
87951 +#define NET_HEADER_FIELD_PPPoE_VER                      (1)
87952 +#define NET_HEADER_FIELD_PPPoE_TYPE                     (NET_HEADER_FIELD_PPPoE_VER << 1)
87953 +#define NET_HEADER_FIELD_PPPoE_CODE                     (NET_HEADER_FIELD_PPPoE_VER << 2)
87954 +#define NET_HEADER_FIELD_PPPoE_SID                      (NET_HEADER_FIELD_PPPoE_VER << 3)
87955 +#define NET_HEADER_FIELD_PPPoE_LEN                      (NET_HEADER_FIELD_PPPoE_VER << 4)
87956 +#define NET_HEADER_FIELD_PPPoE_SESSION                  (NET_HEADER_FIELD_PPPoE_VER << 5)
87957 +#define NET_HEADER_FIELD_PPPoE_PID                      (NET_HEADER_FIELD_PPPoE_VER << 6)
87958 +#define NET_HEADER_FIELD_PPPoE_ALL_FIELDS               ((NET_HEADER_FIELD_PPPoE_VER << 7) - 1)
87959 +
87960 +#define NET_HEADER_FIELD_PPPMUX_PID                     (1)
87961 +#define NET_HEADER_FIELD_PPPMUX_CKSUM                   (NET_HEADER_FIELD_PPPMUX_PID << 1)
87962 +#define NET_HEADER_FIELD_PPPMUX_COMPRESSED              (NET_HEADER_FIELD_PPPMUX_PID << 2)
87963 +#define NET_HEADER_FIELD_PPPMUX_ALL_FIELDS              ((NET_HEADER_FIELD_PPPMUX_PID << 3) - 1)
87964 +
87965 +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF            (1)
87966 +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_LXT            (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 1)
87967 +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_LEN            (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 2)
87968 +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_PID            (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 3)
87969 +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_USE_PID        (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 4)
87970 +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS     ((NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 5) - 1)
87971 +
87972 +
87973 +typedef uint8_t headerFieldEth_t;
87974 +
87975 +#define NET_HEADER_FIELD_ETH_DA                         (1)
87976 +#define NET_HEADER_FIELD_ETH_SA                         (NET_HEADER_FIELD_ETH_DA << 1)
87977 +#define NET_HEADER_FIELD_ETH_LENGTH                     (NET_HEADER_FIELD_ETH_DA << 2)
87978 +#define NET_HEADER_FIELD_ETH_TYPE                       (NET_HEADER_FIELD_ETH_DA << 3)
87979 +#define NET_HEADER_FIELD_ETH_FINAL_CKSUM                (NET_HEADER_FIELD_ETH_DA << 4)
87980 +#define NET_HEADER_FIELD_ETH_PADDING                    (NET_HEADER_FIELD_ETH_DA << 5)
87981 +#define NET_HEADER_FIELD_ETH_ALL_FIELDS                 ((NET_HEADER_FIELD_ETH_DA << 6) - 1)
87982 +
87983 +#define NET_HEADER_FIELD_ETH_ADDR_SIZE                 6
87984 +
87985 +typedef uint16_t headerFieldIp_t;
87986 +
87987 +#define NET_HEADER_FIELD_IP_VER                         (1)
87988 +#define NET_HEADER_FIELD_IP_DSCP                        (NET_HEADER_FIELD_IP_VER << 2)
87989 +#define NET_HEADER_FIELD_IP_ECN                         (NET_HEADER_FIELD_IP_VER << 3)
87990 +#define NET_HEADER_FIELD_IP_PROTO                       (NET_HEADER_FIELD_IP_VER << 4)
87991 +
87992 +#define NET_HEADER_FIELD_IP_PROTO_SIZE                  1
87993 +
87994 +typedef uint16_t headerFieldIpv4_t;
87995 +
87996 +#define NET_HEADER_FIELD_IPv4_VER                       (1)
87997 +#define NET_HEADER_FIELD_IPv4_HDR_LEN                   (NET_HEADER_FIELD_IPv4_VER << 1)
87998 +#define NET_HEADER_FIELD_IPv4_TOS                       (NET_HEADER_FIELD_IPv4_VER << 2)
87999 +#define NET_HEADER_FIELD_IPv4_TOTAL_LEN                 (NET_HEADER_FIELD_IPv4_VER << 3)
88000 +#define NET_HEADER_FIELD_IPv4_ID                        (NET_HEADER_FIELD_IPv4_VER << 4)
88001 +#define NET_HEADER_FIELD_IPv4_FLAG_D                    (NET_HEADER_FIELD_IPv4_VER << 5)
88002 +#define NET_HEADER_FIELD_IPv4_FLAG_M                    (NET_HEADER_FIELD_IPv4_VER << 6)
88003 +#define NET_HEADER_FIELD_IPv4_OFFSET                    (NET_HEADER_FIELD_IPv4_VER << 7)
88004 +#define NET_HEADER_FIELD_IPv4_TTL                       (NET_HEADER_FIELD_IPv4_VER << 8)
88005 +#define NET_HEADER_FIELD_IPv4_PROTO                     (NET_HEADER_FIELD_IPv4_VER << 9)
88006 +#define NET_HEADER_FIELD_IPv4_CKSUM                     (NET_HEADER_FIELD_IPv4_VER << 10)
88007 +#define NET_HEADER_FIELD_IPv4_SRC_IP                    (NET_HEADER_FIELD_IPv4_VER << 11)
88008 +#define NET_HEADER_FIELD_IPv4_DST_IP                    (NET_HEADER_FIELD_IPv4_VER << 12)
88009 +#define NET_HEADER_FIELD_IPv4_OPTS                      (NET_HEADER_FIELD_IPv4_VER << 13)
88010 +#define NET_HEADER_FIELD_IPv4_OPTS_COUNT                (NET_HEADER_FIELD_IPv4_VER << 14)
88011 +#define NET_HEADER_FIELD_IPv4_ALL_FIELDS                ((NET_HEADER_FIELD_IPv4_VER << 15) - 1)
88012 +
88013 +#define NET_HEADER_FIELD_IPv4_ADDR_SIZE                 4
88014 +#define NET_HEADER_FIELD_IPv4_PROTO_SIZE                1
88015 +
88016 +
88017 +typedef uint8_t headerFieldIpv6_t;
88018 +
88019 +#define NET_HEADER_FIELD_IPv6_VER                       (1)
88020 +#define NET_HEADER_FIELD_IPv6_TC                        (NET_HEADER_FIELD_IPv6_VER << 1)
88021 +#define NET_HEADER_FIELD_IPv6_SRC_IP                    (NET_HEADER_FIELD_IPv6_VER << 2)
88022 +#define NET_HEADER_FIELD_IPv6_DST_IP                    (NET_HEADER_FIELD_IPv6_VER << 3)
88023 +#define NET_HEADER_FIELD_IPv6_NEXT_HDR                  (NET_HEADER_FIELD_IPv6_VER << 4)
88024 +#define NET_HEADER_FIELD_IPv6_FL                        (NET_HEADER_FIELD_IPv6_VER << 5)
88025 +#define NET_HEADER_FIELD_IPv6_HOP_LIMIT                 (NET_HEADER_FIELD_IPv6_VER << 6)
88026 +#define NET_HEADER_FIELD_IPv6_ALL_FIELDS                ((NET_HEADER_FIELD_IPv6_VER << 7) - 1)
88027 +
88028 +#define NET_HEADER_FIELD_IPv6_ADDR_SIZE                 16
88029 +#define NET_HEADER_FIELD_IPv6_NEXT_HDR_SIZE             1
88030 +
88031 +#define NET_HEADER_FIELD_ICMP_TYPE                      (1)
88032 +#define NET_HEADER_FIELD_ICMP_CODE                      (NET_HEADER_FIELD_ICMP_TYPE << 1)
88033 +#define NET_HEADER_FIELD_ICMP_CKSUM                     (NET_HEADER_FIELD_ICMP_TYPE << 2)
88034 +#define NET_HEADER_FIELD_ICMP_ID                        (NET_HEADER_FIELD_ICMP_TYPE << 3)
88035 +#define NET_HEADER_FIELD_ICMP_SQ_NUM                    (NET_HEADER_FIELD_ICMP_TYPE << 4)
88036 +#define NET_HEADER_FIELD_ICMP_ALL_FIELDS                ((NET_HEADER_FIELD_ICMP_TYPE << 5) - 1)
88037 +
88038 +#define NET_HEADER_FIELD_ICMP_CODE_SIZE                 1
88039 +#define NET_HEADER_FIELD_ICMP_TYPE_SIZE                 1
88040 +
88041 +#define NET_HEADER_FIELD_IGMP_VERSION                   (1)
88042 +#define NET_HEADER_FIELD_IGMP_TYPE                      (NET_HEADER_FIELD_IGMP_VERSION << 1)
88043 +#define NET_HEADER_FIELD_IGMP_CKSUM                     (NET_HEADER_FIELD_IGMP_VERSION << 2)
88044 +#define NET_HEADER_FIELD_IGMP_DATA                      (NET_HEADER_FIELD_IGMP_VERSION << 3)
88045 +#define NET_HEADER_FIELD_IGMP_ALL_FIELDS                ((NET_HEADER_FIELD_IGMP_VERSION << 4) - 1)
88046 +
88047 +
88048 +typedef uint16_t headerFieldTcp_t;
88049 +
88050 +#define NET_HEADER_FIELD_TCP_PORT_SRC                   (1)
88051 +#define NET_HEADER_FIELD_TCP_PORT_DST                   (NET_HEADER_FIELD_TCP_PORT_SRC << 1)
88052 +#define NET_HEADER_FIELD_TCP_SEQ                        (NET_HEADER_FIELD_TCP_PORT_SRC << 2)
88053 +#define NET_HEADER_FIELD_TCP_ACK                        (NET_HEADER_FIELD_TCP_PORT_SRC << 3)
88054 +#define NET_HEADER_FIELD_TCP_OFFSET                     (NET_HEADER_FIELD_TCP_PORT_SRC << 4)
88055 +#define NET_HEADER_FIELD_TCP_FLAGS                      (NET_HEADER_FIELD_TCP_PORT_SRC << 5)
88056 +#define NET_HEADER_FIELD_TCP_WINDOW                     (NET_HEADER_FIELD_TCP_PORT_SRC << 6)
88057 +#define NET_HEADER_FIELD_TCP_CKSUM                      (NET_HEADER_FIELD_TCP_PORT_SRC << 7)
88058 +#define NET_HEADER_FIELD_TCP_URGPTR                     (NET_HEADER_FIELD_TCP_PORT_SRC << 8)
88059 +#define NET_HEADER_FIELD_TCP_OPTS                       (NET_HEADER_FIELD_TCP_PORT_SRC << 9)
88060 +#define NET_HEADER_FIELD_TCP_OPTS_COUNT                 (NET_HEADER_FIELD_TCP_PORT_SRC << 10)
88061 +#define NET_HEADER_FIELD_TCP_ALL_FIELDS                 ((NET_HEADER_FIELD_TCP_PORT_SRC << 11) - 1)
88062 +
88063 +#define NET_HEADER_FIELD_TCP_PORT_SIZE                  2
88064 +
88065 +
88066 +typedef uint8_t headerFieldSctp_t;
88067 +
88068 +#define NET_HEADER_FIELD_SCTP_PORT_SRC                  (1)
88069 +#define NET_HEADER_FIELD_SCTP_PORT_DST                  (NET_HEADER_FIELD_SCTP_PORT_SRC << 1)
88070 +#define NET_HEADER_FIELD_SCTP_VER_TAG                   (NET_HEADER_FIELD_SCTP_PORT_SRC << 2)
88071 +#define NET_HEADER_FIELD_SCTP_CKSUM                     (NET_HEADER_FIELD_SCTP_PORT_SRC << 3)
88072 +#define NET_HEADER_FIELD_SCTP_ALL_FIELDS                ((NET_HEADER_FIELD_SCTP_PORT_SRC << 4) - 1)
88073 +
88074 +#define NET_HEADER_FIELD_SCTP_PORT_SIZE                 2
88075 +
88076 +typedef uint8_t headerFieldDccp_t;
88077 +
88078 +#define NET_HEADER_FIELD_DCCP_PORT_SRC                  (1)
88079 +#define NET_HEADER_FIELD_DCCP_PORT_DST                  (NET_HEADER_FIELD_DCCP_PORT_SRC << 1)
88080 +#define NET_HEADER_FIELD_DCCP_ALL_FIELDS                ((NET_HEADER_FIELD_DCCP_PORT_SRC << 2) - 1)
88081 +
88082 +#define NET_HEADER_FIELD_DCCP_PORT_SIZE                 2
88083 +
88084 +
88085 +typedef uint8_t headerFieldUdp_t;
88086 +
88087 +#define NET_HEADER_FIELD_UDP_PORT_SRC                   (1)
88088 +#define NET_HEADER_FIELD_UDP_PORT_DST                   (NET_HEADER_FIELD_UDP_PORT_SRC << 1)
88089 +#define NET_HEADER_FIELD_UDP_LEN                        (NET_HEADER_FIELD_UDP_PORT_SRC << 2)
88090 +#define NET_HEADER_FIELD_UDP_CKSUM                      (NET_HEADER_FIELD_UDP_PORT_SRC << 3)
88091 +#define NET_HEADER_FIELD_UDP_ALL_FIELDS                 ((NET_HEADER_FIELD_UDP_PORT_SRC << 4) - 1)
88092 +
88093 +#define NET_HEADER_FIELD_UDP_PORT_SIZE                  2
88094 +
88095 +typedef uint8_t headerFieldUdpLite_t;
88096 +
88097 +#define NET_HEADER_FIELD_UDP_LITE_PORT_SRC              (1)
88098 +#define NET_HEADER_FIELD_UDP_LITE_PORT_DST              (NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 1)
88099 +#define NET_HEADER_FIELD_UDP_LITE_ALL_FIELDS            ((NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 2) - 1)
88100 +
88101 +#define NET_HEADER_FIELD_UDP_LITE_PORT_SIZE             2
88102 +
88103 +typedef uint8_t headerFieldUdpEncapEsp_t;
88104 +
88105 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC         (1)
88106 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST         (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 1)
88107 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN              (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 2)
88108 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM            (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 3)
88109 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI              (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 4)
88110 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM     (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 5)
88111 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS       ((NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 6) - 1)
88112 +
88113 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SIZE        2
88114 +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI_SIZE         4
88115 +
88116 +#define NET_HEADER_FIELD_IPHC_CID                       (1)
88117 +#define NET_HEADER_FIELD_IPHC_CID_TYPE                  (NET_HEADER_FIELD_IPHC_CID << 1)
88118 +#define NET_HEADER_FIELD_IPHC_HCINDEX                   (NET_HEADER_FIELD_IPHC_CID << 2)
88119 +#define NET_HEADER_FIELD_IPHC_GEN                       (NET_HEADER_FIELD_IPHC_CID << 3)
88120 +#define NET_HEADER_FIELD_IPHC_D_BIT                     (NET_HEADER_FIELD_IPHC_CID << 4)
88121 +#define NET_HEADER_FIELD_IPHC_ALL_FIELDS                ((NET_HEADER_FIELD_IPHC_CID << 5) - 1)
88122 +
88123 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE           (1)
88124 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_FLAGS          (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 1)
88125 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_LENGTH         (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 2)
88126 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_TSN            (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 3)
88127 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_ID      (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 4)
88128 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_SQN     (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 5)
88129 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_PAYLOAD_PID    (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 6)
88130 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_UNORDERED      (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 7)
88131 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_BEGGINING      (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 8)
88132 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_END            (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 9)
88133 +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS     ((NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
88134 +
88135 +#define NET_HEADER_FIELD_L2TPv2_TYPE_BIT                (1)
88136 +#define NET_HEADER_FIELD_L2TPv2_LENGTH_BIT              (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 1)
88137 +#define NET_HEADER_FIELD_L2TPv2_SEQUENCE_BIT            (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 2)
88138 +#define NET_HEADER_FIELD_L2TPv2_OFFSET_BIT              (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 3)
88139 +#define NET_HEADER_FIELD_L2TPv2_PRIORITY_BIT            (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 4)
88140 +#define NET_HEADER_FIELD_L2TPv2_VERSION                 (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 5)
88141 +#define NET_HEADER_FIELD_L2TPv2_LEN                     (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 6)
88142 +#define NET_HEADER_FIELD_L2TPv2_TUNNEL_ID               (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 7)
88143 +#define NET_HEADER_FIELD_L2TPv2_SESSION_ID              (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 8)
88144 +#define NET_HEADER_FIELD_L2TPv2_NS                      (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 9)
88145 +#define NET_HEADER_FIELD_L2TPv2_NR                      (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 10)
88146 +#define NET_HEADER_FIELD_L2TPv2_OFFSET_SIZE             (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 11)
88147 +#define NET_HEADER_FIELD_L2TPv2_FIRST_BYTE              (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 12)
88148 +#define NET_HEADER_FIELD_L2TPv2_ALL_FIELDS              ((NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 13) - 1)
88149 +
88150 +#define NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT           (1)
88151 +#define NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH_BIT         (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 1)
88152 +#define NET_HEADER_FIELD_L2TPv3_CTRL_SEQUENCE_BIT       (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 2)
88153 +#define NET_HEADER_FIELD_L2TPv3_CTRL_VERSION            (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 3)
88154 +#define NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH             (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 4)
88155 +#define NET_HEADER_FIELD_L2TPv3_CTRL_CONTROL            (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 5)
88156 +#define NET_HEADER_FIELD_L2TPv3_CTRL_SENT               (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 6)
88157 +#define NET_HEADER_FIELD_L2TPv3_CTRL_RECV               (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 7)
88158 +#define NET_HEADER_FIELD_L2TPv3_CTRL_FIRST_BYTE         (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 8)
88159 +#define NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS         ((NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 9) - 1)
88160 +
88161 +#define NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT           (1)
88162 +#define NET_HEADER_FIELD_L2TPv3_SESS_VERSION            (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 1)
88163 +#define NET_HEADER_FIELD_L2TPv3_SESS_ID                 (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 2)
88164 +#define NET_HEADER_FIELD_L2TPv3_SESS_COOKIE             (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 3)
88165 +#define NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS         ((NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 4) - 1)
88166 +
88167 +
88168 +typedef uint8_t headerFieldVlan_t;
88169 +
88170 +#define NET_HEADER_FIELD_VLAN_VPRI                      (1)
88171 +#define NET_HEADER_FIELD_VLAN_CFI                       (NET_HEADER_FIELD_VLAN_VPRI << 1)
88172 +#define NET_HEADER_FIELD_VLAN_VID                       (NET_HEADER_FIELD_VLAN_VPRI << 2)
88173 +#define NET_HEADER_FIELD_VLAN_LENGTH                    (NET_HEADER_FIELD_VLAN_VPRI << 3)
88174 +#define NET_HEADER_FIELD_VLAN_TYPE                      (NET_HEADER_FIELD_VLAN_VPRI << 4)
88175 +#define NET_HEADER_FIELD_VLAN_ALL_FIELDS                ((NET_HEADER_FIELD_VLAN_VPRI << 5) - 1)
88176 +
88177 +#define NET_HEADER_FIELD_VLAN_TCI                       (NET_HEADER_FIELD_VLAN_VPRI | \
88178 +                                                         NET_HEADER_FIELD_VLAN_CFI | \
88179 +                                                         NET_HEADER_FIELD_VLAN_VID)
88180 +
88181 +
88182 +typedef uint8_t headerFieldLlc_t;
88183 +
88184 +#define NET_HEADER_FIELD_LLC_DSAP                       (1)
88185 +#define NET_HEADER_FIELD_LLC_SSAP                       (NET_HEADER_FIELD_LLC_DSAP << 1)
88186 +#define NET_HEADER_FIELD_LLC_CTRL                       (NET_HEADER_FIELD_LLC_DSAP << 2)
88187 +#define NET_HEADER_FIELD_LLC_ALL_FIELDS                 ((NET_HEADER_FIELD_LLC_DSAP << 3) - 1)
88188 +
88189 +#define NET_HEADER_FIELD_NLPID_NLPID                    (1)
88190 +#define NET_HEADER_FIELD_NLPID_ALL_FIELDS               ((NET_HEADER_FIELD_NLPID_NLPID << 1) - 1)
88191 +
88192 +
88193 +typedef uint8_t headerFieldSnap_t;
88194 +
88195 +#define NET_HEADER_FIELD_SNAP_OUI                       (1)
88196 +#define NET_HEADER_FIELD_SNAP_PID                       (NET_HEADER_FIELD_SNAP_OUI << 1)
88197 +#define NET_HEADER_FIELD_SNAP_ALL_FIELDS                ((NET_HEADER_FIELD_SNAP_OUI << 2) - 1)
88198 +
88199 +
88200 +typedef uint8_t headerFieldLlcSnap_t;
88201 +
88202 +#define NET_HEADER_FIELD_LLC_SNAP_TYPE                  (1)
88203 +#define NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS            ((NET_HEADER_FIELD_LLC_SNAP_TYPE << 1) - 1)
88204 +
88205 +#define NET_HEADER_FIELD_ARP_HTYPE                      (1)
88206 +#define NET_HEADER_FIELD_ARP_PTYPE                      (NET_HEADER_FIELD_ARP_HTYPE << 1)
88207 +#define NET_HEADER_FIELD_ARP_HLEN                       (NET_HEADER_FIELD_ARP_HTYPE << 2)
88208 +#define NET_HEADER_FIELD_ARP_PLEN                       (NET_HEADER_FIELD_ARP_HTYPE << 3)
88209 +#define NET_HEADER_FIELD_ARP_OPER                       (NET_HEADER_FIELD_ARP_HTYPE << 4)
88210 +#define NET_HEADER_FIELD_ARP_SHA                        (NET_HEADER_FIELD_ARP_HTYPE << 5)
88211 +#define NET_HEADER_FIELD_ARP_SPA                        (NET_HEADER_FIELD_ARP_HTYPE << 6)
88212 +#define NET_HEADER_FIELD_ARP_THA                        (NET_HEADER_FIELD_ARP_HTYPE << 7)
88213 +#define NET_HEADER_FIELD_ARP_TPA                        (NET_HEADER_FIELD_ARP_HTYPE << 8)
88214 +#define NET_HEADER_FIELD_ARP_ALL_FIELDS                 ((NET_HEADER_FIELD_ARP_HTYPE << 9) - 1)
88215 +
88216 +#define NET_HEADER_FIELD_RFC2684_LLC                    (1)
88217 +#define NET_HEADER_FIELD_RFC2684_NLPID                  (NET_HEADER_FIELD_RFC2684_LLC << 1)
88218 +#define NET_HEADER_FIELD_RFC2684_OUI                    (NET_HEADER_FIELD_RFC2684_LLC << 2)
88219 +#define NET_HEADER_FIELD_RFC2684_PID                    (NET_HEADER_FIELD_RFC2684_LLC << 3)
88220 +#define NET_HEADER_FIELD_RFC2684_VPN_OUI                (NET_HEADER_FIELD_RFC2684_LLC << 4)
88221 +#define NET_HEADER_FIELD_RFC2684_VPN_IDX                (NET_HEADER_FIELD_RFC2684_LLC << 5)
88222 +#define NET_HEADER_FIELD_RFC2684_ALL_FIELDS             ((NET_HEADER_FIELD_RFC2684_LLC << 6) - 1)
88223 +
88224 +#define NET_HEADER_FIELD_USER_DEFINED_SRCPORT           (1)
88225 +#define NET_HEADER_FIELD_USER_DEFINED_PCDID             (NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 1)
88226 +#define NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS        ((NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 2) - 1)
88227 +
88228 +#define NET_HEADER_FIELD_PAYLOAD_BUFFER                 (1)
88229 +#define NET_HEADER_FIELD_PAYLOAD_SIZE                   (NET_HEADER_FIELD_PAYLOAD_BUFFER << 1)
88230 +#define NET_HEADER_FIELD_MAX_FRM_SIZE                   (NET_HEADER_FIELD_PAYLOAD_BUFFER << 2)
88231 +#define NET_HEADER_FIELD_MIN_FRM_SIZE                   (NET_HEADER_FIELD_PAYLOAD_BUFFER << 3)
88232 +#define NET_HEADER_FIELD_PAYLOAD_TYPE                   (NET_HEADER_FIELD_PAYLOAD_BUFFER << 4)
88233 +#define NET_HEADER_FIELD_FRAME_SIZE                     (NET_HEADER_FIELD_PAYLOAD_BUFFER << 5)
88234 +#define NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS             ((NET_HEADER_FIELD_PAYLOAD_BUFFER << 6) - 1)
88235 +
88236 +
88237 +typedef uint8_t headerFieldGre_t;
88238 +
88239 +#define NET_HEADER_FIELD_GRE_TYPE                       (1)
88240 +#define NET_HEADER_FIELD_GRE_ALL_FIELDS                 ((NET_HEADER_FIELD_GRE_TYPE << 1) - 1)
88241 +
88242 +
88243 +typedef uint8_t headerFieldMinencap_t;
88244 +
88245 +#define NET_HEADER_FIELD_MINENCAP_SRC_IP                (1)
88246 +#define NET_HEADER_FIELD_MINENCAP_DST_IP                (NET_HEADER_FIELD_MINENCAP_SRC_IP << 1)
88247 +#define NET_HEADER_FIELD_MINENCAP_TYPE                  (NET_HEADER_FIELD_MINENCAP_SRC_IP << 2)
88248 +#define NET_HEADER_FIELD_MINENCAP_ALL_FIELDS            ((NET_HEADER_FIELD_MINENCAP_SRC_IP << 3) - 1)
88249 +
88250 +
88251 +typedef uint8_t headerFieldIpsecAh_t;
88252 +
88253 +#define NET_HEADER_FIELD_IPSEC_AH_SPI                   (1)
88254 +#define NET_HEADER_FIELD_IPSEC_AH_NH                    (NET_HEADER_FIELD_IPSEC_AH_SPI << 1)
88255 +#define NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS            ((NET_HEADER_FIELD_IPSEC_AH_SPI << 2) - 1)
88256 +
88257 +
88258 +typedef uint8_t headerFieldIpsecEsp_t;
88259 +
88260 +#define NET_HEADER_FIELD_IPSEC_ESP_SPI                  (1)
88261 +#define NET_HEADER_FIELD_IPSEC_ESP_SEQUENCE_NUM         (NET_HEADER_FIELD_IPSEC_ESP_SPI << 1)
88262 +#define NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS           ((NET_HEADER_FIELD_IPSEC_ESP_SPI << 2) - 1)
88263 +
88264 +#define NET_HEADER_FIELD_IPSEC_ESP_SPI_SIZE             4
88265 +
88266 +
88267 +typedef uint8_t headerFieldMpls_t;
88268 +
88269 +#define NET_HEADER_FIELD_MPLS_LABEL_STACK               (1)
88270 +#define NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS    ((NET_HEADER_FIELD_MPLS_LABEL_STACK << 1) - 1)
88271 +
88272 +
88273 +typedef uint8_t headerFieldMacsec_t;
88274 +
88275 +#define NET_HEADER_FIELD_MACSEC_SECTAG                  (1)
88276 +#define NET_HEADER_FIELD_MACSEC_ALL_FIELDS              ((NET_HEADER_FIELD_MACSEC_SECTAG << 1) - 1)
88277 +
88278 +
88279 +typedef enum {
88280 +    HEADER_TYPE_NONE = 0,
88281 +    HEADER_TYPE_PAYLOAD,
88282 +    HEADER_TYPE_ETH,
88283 +    HEADER_TYPE_VLAN,
88284 +    HEADER_TYPE_IPv4,
88285 +    HEADER_TYPE_IPv6,
88286 +    HEADER_TYPE_IP,
88287 +    HEADER_TYPE_TCP,
88288 +    HEADER_TYPE_UDP,
88289 +    HEADER_TYPE_UDP_LITE,
88290 +    HEADER_TYPE_IPHC,
88291 +    HEADER_TYPE_SCTP,
88292 +    HEADER_TYPE_SCTP_CHUNK_DATA,
88293 +    HEADER_TYPE_PPPoE,
88294 +    HEADER_TYPE_PPP,
88295 +    HEADER_TYPE_PPPMUX,
88296 +    HEADER_TYPE_PPPMUX_SUBFRAME,
88297 +    HEADER_TYPE_L2TPv2,
88298 +    HEADER_TYPE_L2TPv3_CTRL,
88299 +    HEADER_TYPE_L2TPv3_SESS,
88300 +    HEADER_TYPE_LLC,
88301 +    HEADER_TYPE_LLC_SNAP,
88302 +    HEADER_TYPE_NLPID,
88303 +    HEADER_TYPE_SNAP,
88304 +    HEADER_TYPE_MPLS,
88305 +    HEADER_TYPE_IPSEC_AH,
88306 +    HEADER_TYPE_IPSEC_ESP,
88307 +    HEADER_TYPE_UDP_ENCAP_ESP, /* RFC 3948 */
88308 +    HEADER_TYPE_MACSEC,
88309 +    HEADER_TYPE_GRE,
88310 +    HEADER_TYPE_MINENCAP,
88311 +    HEADER_TYPE_DCCP,
88312 +    HEADER_TYPE_ICMP,
88313 +    HEADER_TYPE_IGMP,
88314 +    HEADER_TYPE_ARP,
88315 +    HEADER_TYPE_CAPWAP,
88316 +    HEADER_TYPE_CAPWAP_DTLS,
88317 +    HEADER_TYPE_RFC2684,
88318 +    HEADER_TYPE_USER_DEFINED_L2,
88319 +    HEADER_TYPE_USER_DEFINED_L3,
88320 +    HEADER_TYPE_USER_DEFINED_L4,
88321 +    HEADER_TYPE_USER_DEFINED_SHIM1,
88322 +    HEADER_TYPE_USER_DEFINED_SHIM2,
88323 +    MAX_HEADER_TYPE_COUNT
88324 +} e_NetHeaderType;
88325 +
88326 +
88327 +#endif /* __NET_EXT_H */
88328 --- /dev/null
88329 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/std_ext.h
88330 @@ -0,0 +1,48 @@
88331 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
88332 + * All rights reserved.
88333 + *
88334 + * Redistribution and use in source and binary forms, with or without
88335 + * modification, are permitted provided that the following conditions are met:
88336 + *     * Redistributions of source code must retain the above copyright
88337 + *       notice, this list of conditions and the following disclaimer.
88338 + *     * Redistributions in binary form must reproduce the above copyright
88339 + *       notice, this list of conditions and the following disclaimer in the
88340 + *       documentation and/or other materials provided with the distribution.
88341 + *     * Neither the name of Freescale Semiconductor nor the
88342 + *       names of its contributors may be used to endorse or promote products
88343 + *       derived from this software without specific prior written permission.
88344 + *
88345 + *
88346 + * ALTERNATIVELY, this software may be distributed under the terms of the
88347 + * GNU General Public License ("GPL") as published by the Free Software
88348 + * Foundation, either version 2 of that License or (at your option) any
88349 + * later version.
88350 + *
88351 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88352 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88353 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88354 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88355 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88356 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88357 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88358 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88359 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88360 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88361 + */
88362 +
88363 +
88364 +/**************************************************************************//**
88365 + @File          std_ext.h
88366 +
88367 + @Description   General Standard Definitions
88368 +*//***************************************************************************/
88369 +
88370 +#ifndef __STD_EXT_H
88371 +#define __STD_EXT_H
88372 +
88373 +
88374 +#include "types_ext.h"
88375 +#include "ncsw_ext.h"
88376 +
88377 +
88378 +#endif /* __STD_EXT_H */
88379 --- /dev/null
88380 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/stdarg_ext.h
88381 @@ -0,0 +1,49 @@
88382 +/*
88383 + * Copyright 2008-2012 Freescale Semiconductor Inc.
88384 + *
88385 + * Redistribution and use in source and binary forms, with or without
88386 + * modification, are permitted provided that the following conditions are met:
88387 + *     * Redistributions of source code must retain the above copyright
88388 + *       notice, this list of conditions and the following disclaimer.
88389 + *     * Redistributions in binary form must reproduce the above copyright
88390 + *       notice, this list of conditions and the following disclaimer in the
88391 + *       documentation and/or other materials provided with the distribution.
88392 + *     * Neither the name of Freescale Semiconductor nor the
88393 + *       names of its contributors may be used to endorse or promote products
88394 + *       derived from this software without specific prior written permission.
88395 + *
88396 + *
88397 + * ALTERNATIVELY, this software may be distributed under the terms of the
88398 + * GNU General Public License ("GPL") as published by the Free Software
88399 + * Foundation, either version 2 of that License or (at your option) any
88400 + * later version.
88401 + *
88402 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88403 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88404 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88405 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88406 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88407 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88408 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88409 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88410 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88411 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88412 + */
88413 +
88414 +
88415 +#ifndef __STDARG_EXT_H
88416 +#define __STDARG_EXT_H
88417 +
88418 +
88419 +#if defined(NCSW_LINUX) && defined(__KERNEL__)
88420 +#include <stdarg.h>
88421 +
88422 +#else
88423 +#include <stdarg.h>
88424 +
88425 +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
88426 +
88427 +#include "std_ext.h"
88428 +
88429 +
88430 +#endif /* __STDARG_EXT_H */
88431 --- /dev/null
88432 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/stdlib_ext.h
88433 @@ -0,0 +1,162 @@
88434 +/*
88435 + * Copyright 2008-2012 Freescale Semiconductor Inc.
88436 + *
88437 + * Redistribution and use in source and binary forms, with or without
88438 + * modification, are permitted provided that the following conditions are met:
88439 + *     * Redistributions of source code must retain the above copyright
88440 + *       notice, this list of conditions and the following disclaimer.
88441 + *     * Redistributions in binary form must reproduce the above copyright
88442 + *       notice, this list of conditions and the following disclaimer in the
88443 + *       documentation and/or other materials provided with the distribution.
88444 + *     * Neither the name of Freescale Semiconductor nor the
88445 + *       names of its contributors may be used to endorse or promote products
88446 + *       derived from this software without specific prior written permission.
88447 + *
88448 + *
88449 + * ALTERNATIVELY, this software may be distributed under the terms of the
88450 + * GNU General Public License ("GPL") as published by the Free Software
88451 + * Foundation, either version 2 of that License or (at your option) any
88452 + * later version.
88453 + *
88454 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88455 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88456 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88457 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88458 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88459 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88460 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88461 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88462 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88463 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88464 + */
88465 +
88466 +
88467 +
88468 +#ifndef __STDLIB_EXT_H
88469 +#define __STDLIB_EXT_H
88470 +
88471 +
88472 +#if (defined(NCSW_LINUX)) && defined(__KERNEL__)
88473 +#include "stdarg_ext.h"
88474 +#include "std_ext.h"
88475 +
88476 +
88477 +/**
88478 + * strtoul - convert a string to an uint32_t
88479 + * @cp: The start of the string
88480 + * @endp: A pointer to the end of the parsed string will be placed here
88481 + * @base: The number base to use
88482 + */
88483 +uint32_t strtoul(const char *cp,char **endp,uint32_t base);
88484 +
88485 +/**
88486 + * strtol - convert a string to a int32_t
88487 + * @cp: The start of the string
88488 + * @endp: A pointer to the end of the parsed string will be placed here
88489 + * @base: The number base to use
88490 + */
88491 +long strtol(const char *cp,char **endp,uint32_t base);
88492 +
88493 +/**
88494 + * strtoull - convert a string to an uint64_t
88495 + * @cp: The start of the string
88496 + * @endp: A pointer to the end of the parsed string will be placed here
88497 + * @base: The number base to use
88498 + */
88499 +uint64_t strtoull(const char *cp,char **endp,uint32_t base);
88500 +
88501 +/**
88502 + * strtoll - convert a string to a int64 long
88503 + * @cp: The start of the string
88504 + * @endp: A pointer to the end of the parsed string will be placed here
88505 + * @base: The number base to use
88506 + */
88507 +long long strtoll(const char *cp,char **endp,uint32_t base);
88508 +
88509 +/**
88510 + * atoi - convert a character to a int
88511 + * @s: The start of the string
88512 + */
88513 +int atoi(const char *s);
88514 +
88515 +/**
88516 + * strnlen - Find the length of a length-limited string
88517 + * @s: The string to be sized
88518 + * @count: The maximum number of bytes to search
88519 + */
88520 +size_t strnlen(const char * s, size_t count);
88521 +
88522 +/**
88523 + * strlen - Find the length of a string
88524 + * @s: The string to be sized
88525 + */
88526 +size_t strlen(const char * s);
88527 +
88528 +/**
88529 + * strtok - Split a string into tokens
88530 + * @s: The string to be searched
88531 + * @ct: The characters to search for
88532 + *
88533 + * WARNING: strtok is deprecated, use strsep instead.
88534 + */
88535 +char * strtok(char * s,const char * ct);
88536 +
88537 +/**
88538 + * strncpy - Copy a length-limited, %NUL-terminated string
88539 + * @dest: Where to copy the string to
88540 + * @src: Where to copy the string from
88541 + * @count: The maximum number of bytes to copy
88542 + *
88543 + * Note that unlike userspace strncpy, this does not %NUL-pad the buffer.
88544 + * However, the result is not %NUL-terminated if the source exceeds
88545 + * @count bytes.
88546 + */
88547 +char * strncpy(char * dest,const char *src,size_t count);
88548 +
88549 +/**
88550 + * strcpy - Copy a %NUL terminated string
88551 + * @dest: Where to copy the string to
88552 + * @src: Where to copy the string from
88553 + */
88554 +char * strcpy(char * dest,const char *src);
88555 +
88556 +/**
88557 + * vsscanf - Unformat a buffer into a list of arguments
88558 + * @buf:    input buffer
88559 + * @fmt:    format of buffer
88560 + * @args:    arguments
88561 + */
88562 +int vsscanf(const char * buf, const char * fmt, va_list args);
88563 +
88564 +/**
88565 + * vsnprintf - Format a string and place it in a buffer
88566 + * @buf: The buffer to place the result into
88567 + * @size: The size of the buffer, including the trailing null space
88568 + * @fmt: The format string to use
88569 + * @args: Arguments for the format string
88570 + *
88571 + * Call this function if you are already dealing with a va_list.
88572 + * You probably want snprintf instead.
88573 + */
88574 +int vsnprintf(char *buf, size_t size, const char *fmt, va_list args);
88575 +
88576 +/**
88577 + * vsprintf - Format a string and place it in a buffer
88578 + * @buf: The buffer to place the result into
88579 + * @fmt: The format string to use
88580 + * @args: Arguments for the format string
88581 + *
88582 + * Call this function if you are already dealing with a va_list.
88583 + * You probably want sprintf instead.
88584 + */
88585 +int vsprintf(char *buf, const char *fmt, va_list args);
88586 +
88587 +#else
88588 +#include <stdlib.h>
88589 +#include <stdio.h>
88590 +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
88591 +
88592 +#include "std_ext.h"
88593 +
88594 +
88595 +#endif /* __STDLIB_EXT_H */
88596 --- /dev/null
88597 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/string_ext.h
88598 @@ -0,0 +1,56 @@
88599 +/*
88600 + * Copyright 2008-2012 Freescale Semiconductor Inc.
88601 + *
88602 + * Redistribution and use in source and binary forms, with or without
88603 + * modification, are permitted provided that the following conditions are met:
88604 + *     * Redistributions of source code must retain the above copyright
88605 + *       notice, this list of conditions and the following disclaimer.
88606 + *     * Redistributions in binary form must reproduce the above copyright
88607 + *       notice, this list of conditions and the following disclaimer in the
88608 + *       documentation and/or other materials provided with the distribution.
88609 + *     * Neither the name of Freescale Semiconductor nor the
88610 + *       names of its contributors may be used to endorse or promote products
88611 + *       derived from this software without specific prior written permission.
88612 + *
88613 + *
88614 + * ALTERNATIVELY, this software may be distributed under the terms of the
88615 + * GNU General Public License ("GPL") as published by the Free Software
88616 + * Foundation, either version 2 of that License or (at your option) any
88617 + * later version.
88618 + *
88619 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88620 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88621 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88622 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88623 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88624 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88625 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88626 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88627 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88628 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88629 + */
88630 +
88631 +
88632 +#ifndef __STRING_EXT_H
88633 +#define __STRING_EXT_H
88634 +
88635 +
88636 +#if defined(NCSW_LINUX) && defined(__KERNEL__)
88637 +#include <linux/kernel.h>
88638 +#include <linux/string.h>
88639 +extern char * strtok ( char * str, const char * delimiters );
88640 +
88641 +#elif defined(__KERNEL__)
88642 +#include "linux/types.h"
88643 +#include "linux/posix_types.h"
88644 +#include "linux/string.h"
88645 +
88646 +#else
88647 +#include <string.h>
88648 +
88649 +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
88650 +
88651 +#include "std_ext.h"
88652 +
88653 +
88654 +#endif /* __STRING_EXT_H */
88655 --- /dev/null
88656 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/types_ext.h
88657 @@ -0,0 +1,62 @@
88658 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
88659 + * All rights reserved.
88660 + *
88661 + * Redistribution and use in source and binary forms, with or without
88662 + * modification, are permitted provided that the following conditions are met:
88663 + *     * Redistributions of source code must retain the above copyright
88664 + *       notice, this list of conditions and the following disclaimer.
88665 + *     * Redistributions in binary form must reproduce the above copyright
88666 + *       notice, this list of conditions and the following disclaimer in the
88667 + *       documentation and/or other materials provided with the distribution.
88668 + *     * Neither the name of Freescale Semiconductor nor the
88669 + *       names of its contributors may be used to endorse or promote products
88670 + *       derived from this software without specific prior written permission.
88671 + *
88672 + *
88673 + * ALTERNATIVELY, this software may be distributed under the terms of the
88674 + * GNU General Public License ("GPL") as published by the Free Software
88675 + * Foundation, either version 2 of that License or (at your option) any
88676 + * later version.
88677 + *
88678 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88679 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88680 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88681 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88682 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88683 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88684 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88685 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88686 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88687 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88688 + */
88689 +
88690 +
88691 +/**************************************************************************//**
88692 + @File          types_ext.h
88693 +
88694 + @Description   General types Standard Definitions
88695 +*//***************************************************************************/
88696 +
88697 +#ifndef __TYPES_EXT_H
88698 +#define __TYPES_EXT_H
88699 +
88700 +#if defined(NCSW_LINUX)
88701 +#include "types_linux.h"
88702 +
88703 +#elif defined(NCSW_VXWORKS)
88704 +#include "types_vxworks.h"
88705 +
88706 +#elif defined(__GNUC__) && defined(__cplusplus)
88707 +#include "types_bb_gpp.h"
88708 +
88709 +#elif defined(__GNUC__)
88710 +#include "types_bb_gcc.h"
88711 +
88712 +#elif defined(__ghs__)
88713 +#include "types_ghs.h"
88714 +
88715 +#else
88716 +#include "types_dflt.h"
88717 +#endif /* defined (__ROCOO__) */
88718 +
88719 +#endif /* __TYPES_EXT_H */
88720 --- /dev/null
88721 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/xx_common.h
88722 @@ -0,0 +1,56 @@
88723 +/*
88724 + * Copyright 2012 Freescale Semiconductor Inc.
88725 + *
88726 + * Redistribution and use in source and binary forms, with or without
88727 + * modification, are permitted provided that the following conditions are met:
88728 + *     * Redistributions of source code must retain the above copyright
88729 + *       notice, this list of conditions and the following disclaimer.
88730 + *     * Redistributions in binary form must reproduce the above copyright
88731 + *       notice, this list of conditions and the following disclaimer in the
88732 + *       documentation and/or other materials provided with the distribution.
88733 + *     * Neither the name of Freescale Semiconductor nor the
88734 + *       names of its contributors may be used to endorse or promote products
88735 + *       derived from this software without specific prior written permission.
88736 + *
88737 + *
88738 + * ALTERNATIVELY, this software may be distributed under the terms of the
88739 + * GNU General Public License ("GPL") as published by the Free Software
88740 + * Foundation, either version 2 of that License or (at your option) any
88741 + * later version.
88742 + *
88743 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88744 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88745 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88746 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88747 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88748 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88749 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88750 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88751 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88752 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88753 + */
88754 +
88755 +
88756 +/**************************************************************************//**
88757 + @File          debug_ext.h
88758 +
88759 + @Description   Debug mode definitions.
88760 +*//***************************************************************************/
88761 +
88762 +#ifndef __XX_COMMON_H
88763 +#define __XX_COMMON_H
88764 +
88765 +/*****************************************************************************
88766 + *  UNIFIED MODULE CODES
88767 + *****************************************************************************/
88768 +#define MODULE_UNKNOWN          0x00000000
88769 +#define MODULE_FM               0x00010000
88770 +#define MODULE_FM_MURAM         0x00020000
88771 +#define MODULE_FM_PCD           0x00030000
88772 +#define MODULE_FM_RTC           0x00040000
88773 +#define MODULE_FM_MAC           0x00050000
88774 +#define MODULE_FM_PORT          0x00060000
88775 +#define MODULE_MM               0x00070000
88776 +#define MODULE_FM_SP            0x00080000
88777 +#define MODULE_FM_MACSEC        0x00090000
88778 +#endif /* __XX_COMMON_H */
88779 --- /dev/null
88780 +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/xx_ext.h
88781 @@ -0,0 +1,791 @@
88782 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
88783 + * All rights reserved.
88784 + *
88785 + * Redistribution and use in source and binary forms, with or without
88786 + * modification, are permitted provided that the following conditions are met:
88787 + *     * Redistributions of source code must retain the above copyright
88788 + *       notice, this list of conditions and the following disclaimer.
88789 + *     * Redistributions in binary form must reproduce the above copyright
88790 + *       notice, this list of conditions and the following disclaimer in the
88791 + *       documentation and/or other materials provided with the distribution.
88792 + *     * Neither the name of Freescale Semiconductor nor the
88793 + *       names of its contributors may be used to endorse or promote products
88794 + *       derived from this software without specific prior written permission.
88795 + *
88796 + *
88797 + * ALTERNATIVELY, this software may be distributed under the terms of the
88798 + * GNU General Public License ("GPL") as published by the Free Software
88799 + * Foundation, either version 2 of that License or (at your option) any
88800 + * later version.
88801 + *
88802 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
88803 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
88804 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
88805 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
88806 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
88807 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
88808 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
88809 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
88810 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
88811 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
88812 + */
88813 +
88814 +
88815 +/**************************************************************************//**
88816 + @File          xx_ext.h
88817 +
88818 + @Description   Prototypes, externals and typedefs for system-supplied
88819 +                (external) routines
88820 +*//***************************************************************************/
88821 +
88822 +#ifndef __XX_EXT_H
88823 +#define __XX_EXT_H
88824 +
88825 +#include "std_ext.h"
88826 +#include "xx_common.h"
88827 +#include "part_ext.h"
88828 +
88829 +
88830 +
88831 +/**************************************************************************//**
88832 + @Group         xx_id  XX Interface (System call hooks)
88833 +
88834 + @Description   Prototypes, externals and typedefs for system-supplied
88835 +                (external) routines
88836 +
88837 + @{
88838 +*//***************************************************************************/
88839 +
88840 +#ifdef DEBUG_XX_MALLOC
88841 +void * XX_MallocDebug(uint32_t size, char *fname, int line);
88842 +
88843 +void * XX_MallocSmartDebug(uint32_t size,
88844 +                           int      memPartitionId,
88845 +                           uint32_t alignment,
88846 +                           char     *fname,
88847 +                           int      line);
88848 +
88849 +#define XX_Malloc(sz) \
88850 +    XX_MallocDebug((sz), __FILE__, __LINE__)
88851 +
88852 +#define XX_MallocSmart(sz, memt, al) \
88853 +    XX_MallocSmartDebug((sz), (memt), (al), __FILE__, __LINE__)
88854 +
88855 +#else /* not DEBUG_XX_MALLOC */
88856 +/**************************************************************************//**
88857 + @Function      XX_Malloc
88858 +
88859 + @Description   allocates contiguous block of memory.
88860 +
88861 + @Param[in]     size - Number of bytes to allocate.
88862 +
88863 + @Return        The address of the newly allocated block on success, NULL on failure.
88864 +*//***************************************************************************/
88865 +void * XX_Malloc(uint32_t size);
88866 +
88867 +/**************************************************************************//**
88868 + @Function      XX_MallocSmart
88869 +
88870 + @Description   Allocates contiguous block of memory in a specified
88871 +                alignment and from the specified segment.
88872 +
88873 + @Param[in]     size            - Number of bytes to allocate.
88874 + @Param[in]     memPartitionId  - Memory partition ID; The value zero must
88875 +                                  be mapped to the default heap partition.
88876 + @Param[in]     alignment       - Required memory alignment (in bytes).
88877 +
88878 + @Return        The address of the newly allocated block on success, NULL on failure.
88879 +*//***************************************************************************/
88880 +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment);
88881 +#endif /* not DEBUG_XX_MALLOC */
88882 +
88883 +/**************************************************************************//**
88884 + @Function      XX_FreeSmart
88885 +
88886 + @Description   Frees the memory block pointed to by "p".
88887 +                Only for memory allocated by XX_MallocSmart
88888 +
88889 + @Param[in]     p_Memory - pointer to the memory block.
88890 +
88891 + @Return        None.
88892 +*//***************************************************************************/
88893 +void XX_FreeSmart(void *p_Memory);
88894 +
88895 +/**************************************************************************//**
88896 + @Function      XX_Free
88897 +
88898 + @Description   frees the memory block pointed to by "p".
88899 +
88900 + @Param[in]     p_Memory - pointer to the memory block.
88901 +
88902 + @Return        None.
88903 +*//***************************************************************************/
88904 +void XX_Free(void *p_Memory);
88905 +
88906 +/**************************************************************************//**
88907 + @Function      XX_Print
88908 +
88909 + @Description   print a string.
88910 +
88911 + @Param[in]     str - string to print.
88912 +
88913 + @Return        None.
88914 +*//***************************************************************************/
88915 +void XX_Print(char *str, ...);
88916 +
88917 +/**************************************************************************//**
88918 + @Function      XX_SetIntr
88919 +
88920 + @Description   Set an interrupt service routine for a specific interrupt source.
88921 +
88922 + @Param[in]     irq     - Interrupt ID (system-specific number).
88923 + @Param[in]     f_Isr   - Callback routine that will be called when the interrupt occurs.
88924 + @Param[in]     handle  - The argument for the user callback routine.
88925 +
88926 + @Return        E_OK on success; error code otherwise..
88927 +*//***************************************************************************/
88928 +t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle);
88929 +
88930 +/**************************************************************************//**
88931 + @Function      XX_FreeIntr
88932 +
88933 + @Description   Free a specific interrupt and a specific callback routine.
88934 +
88935 + @Param[in]     irq - Interrupt ID (system-specific number).
88936 +
88937 + @Return        E_OK on success; error code otherwise..
88938 +*//***************************************************************************/
88939 +t_Error XX_FreeIntr(int irq);
88940 +
88941 +/**************************************************************************//**
88942 + @Function      XX_EnableIntr
88943 +
88944 + @Description   Enable a specific interrupt.
88945 +
88946 + @Param[in]     irq - Interrupt ID (system-specific number).
88947 +
88948 + @Return        E_OK on success; error code otherwise..
88949 +*//***************************************************************************/
88950 +t_Error XX_EnableIntr(int irq);
88951 +
88952 +/**************************************************************************//**
88953 + @Function      XX_DisableIntr
88954 +
88955 + @Description   Disable a specific interrupt.
88956 +
88957 + @Param[in]     irq - Interrupt ID (system-specific number).
88958 +
88959 + @Return        E_OK on success; error code otherwise..
88960 +*//***************************************************************************/
88961 +t_Error XX_DisableIntr(int irq);
88962 +
88963 +/**************************************************************************//**
88964 + @Function      XX_DisableAllIntr
88965 +
88966 + @Description   Disable all interrupts by masking them at the CPU.
88967 +
88968 + @Return        A value that represents the interrupts state before the
88969 +                operation, and should be passed to the matching
88970 +                XX_RestoreAllIntr() call.
88971 +*//***************************************************************************/
88972 +uint32_t XX_DisableAllIntr(void);
88973 +
88974 +/**************************************************************************//**
88975 + @Function      XX_RestoreAllIntr
88976 +
88977 + @Description   Restore previous state of interrupts level at the CPU.
88978 +
88979 + @Param[in]     flags - A value that represents the interrupts state to restore,
88980 +                        as returned by the matching call for XX_DisableAllIntr().
88981 +
88982 + @Return        None.
88983 +*//***************************************************************************/
88984 +void XX_RestoreAllIntr(uint32_t flags);
88985 +
88986 +
88987 +/**************************************************************************//**
88988 + @Function      XX_Exit
88989 +
88990 + @Description   Stop execution and report status (where it is applicable)
88991 +
88992 + @Param[in]     status - exit status
88993 +*//***************************************************************************/
88994 +void    XX_Exit(int status);
88995 +
88996 +
88997 +/*****************************************************************************/
88998 +/*                        Tasklet Service Routines                           */
88999 +/*****************************************************************************/
89000 +typedef t_Handle t_TaskletHandle;
89001 +
89002 +/**************************************************************************//**
89003 + @Function      XX_InitTasklet
89004 +
89005 + @Description   Create and initialize a tasklet object.
89006 +
89007 + @Param[in]     routine - A routine to be ran as a tasklet.
89008 + @Param[in]     data    - An argument to pass to the tasklet.
89009 +
89010 + @Return        Tasklet handle is returned on success. NULL is returned otherwise.
89011 +*//***************************************************************************/
89012 +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data);
89013 +
89014 +/**************************************************************************//**
89015 + @Function      XX_FreeTasklet
89016 +
89017 + @Description   Free a tasklet object.
89018 +
89019 + @Param[in]     h_Tasklet - A handle to a tasklet to be free.
89020 +
89021 + @Return        None.
89022 +*//***************************************************************************/
89023 +void XX_FreeTasklet (t_TaskletHandle h_Tasklet);
89024 +
89025 +/**************************************************************************//**
89026 + @Function      XX_ScheduleTask
89027 +
89028 + @Description   Schedule a tasklet object.
89029 +
89030 + @Param[in]     h_Tasklet - A handle to a tasklet to be scheduled.
89031 + @Param[in]     immediate - Indicate whether to schedule this tasklet on
89032 +                            the immediate queue or on the delayed one.
89033 +
89034 + @Return        0 - on success. Error code - otherwise.
89035 +*//***************************************************************************/
89036 +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate);
89037 +
89038 +/**************************************************************************//**
89039 + @Function      XX_FlushScheduledTasks
89040 +
89041 + @Description   Flush all tasks there are in the scheduled tasks queue.
89042 +
89043 + @Return        None.
89044 +*//***************************************************************************/
89045 +void XX_FlushScheduledTasks(void);
89046 +
89047 +/**************************************************************************//**
89048 + @Function      XX_TaskletIsQueued
89049 +
89050 + @Description   Check if task is queued.
89051 +
89052 + @Param[in]     h_Tasklet - A handle to a tasklet to be scheduled.
89053 +
89054 + @Return        1 - task is queued. 0 - otherwise.
89055 +*//***************************************************************************/
89056 +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet);
89057 +
89058 +/**************************************************************************//**
89059 + @Function      XX_SetTaskletData
89060 +
89061 + @Description   Set data to a scheduled task. Used to change data of already
89062 +                scheduled task.
89063 +
89064 + @Param[in]     h_Tasklet - A handle to a tasklet to be scheduled.
89065 + @Param[in]     data      - Data to be set.
89066 +*//***************************************************************************/
89067 +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data);
89068 +
89069 +/**************************************************************************//**
89070 + @Function      XX_GetTaskletData
89071 +
89072 + @Description   Get the data of scheduled task.
89073 +
89074 + @Param[in]     h_Tasklet - A handle to a tasklet to be scheduled.
89075 +
89076 + @Return        handle to the data of the task.
89077 +*//***************************************************************************/
89078 +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet);
89079 +
89080 +/**************************************************************************//**
89081 + @Function      XX_BottomHalf
89082 +
89083 + @Description   Bottom half implementation, invoked by the interrupt handler.
89084 +
89085 +                This routine handles all bottom-half tasklets with interrupts
89086 +                enabled.
89087 +
89088 + @Return        None.
89089 +*//***************************************************************************/
89090 +void XX_BottomHalf(void);
89091 +
89092 +
89093 +/*****************************************************************************/
89094 +/*                        Spinlock Service Routines                          */
89095 +/*****************************************************************************/
89096 +
89097 +/**************************************************************************//**
89098 + @Function      XX_InitSpinlock
89099 +
89100 + @Description   Creates a spinlock.
89101 +
89102 + @Return        Spinlock handle is returned on success; NULL otherwise.
89103 +*//***************************************************************************/
89104 +t_Handle XX_InitSpinlock(void);
89105 +
89106 +/**************************************************************************//**
89107 + @Function      XX_FreeSpinlock
89108 +
89109 + @Description   Frees the memory allocated for the spinlock creation.
89110 +
89111 + @Param[in]     h_Spinlock - A handle to a spinlock.
89112 +
89113 + @Return        None.
89114 +*//***************************************************************************/
89115 +void XX_FreeSpinlock(t_Handle h_Spinlock);
89116 +
89117 +/**************************************************************************//**
89118 + @Function      XX_LockSpinlock
89119 +
89120 + @Description   Locks a spinlock.
89121 +
89122 + @Param[in]     h_Spinlock - A handle to a spinlock.
89123 +
89124 + @Return        None.
89125 +*//***************************************************************************/
89126 +void XX_LockSpinlock(t_Handle h_Spinlock);
89127 +
89128 +/**************************************************************************//**
89129 + @Function      XX_UnlockSpinlock
89130 +
89131 + @Description   Unlocks a spinlock.
89132 +
89133 + @Param[in]     h_Spinlock - A handle to a spinlock.
89134 +
89135 + @Return        None.
89136 +*//***************************************************************************/
89137 +void XX_UnlockSpinlock(t_Handle h_Spinlock);
89138 +
89139 +/**************************************************************************//**
89140 + @Function      XX_LockIntrSpinlock
89141 +
89142 + @Description   Locks a spinlock (interrupt safe).
89143 +
89144 + @Param[in]     h_Spinlock - A handle to a spinlock.
89145 +
89146 + @Return        A value that represents the interrupts state before the
89147 +                operation, and should be passed to the matching
89148 +                XX_UnlockIntrSpinlock() call.
89149 +*//***************************************************************************/
89150 +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock);
89151 +
89152 +/**************************************************************************//**
89153 + @Function      XX_UnlockIntrSpinlock
89154 +
89155 + @Description   Unlocks a spinlock (interrupt safe).
89156 +
89157 + @Param[in]     h_Spinlock  - A handle to a spinlock.
89158 + @Param[in]     intrFlags   - A value that represents the interrupts state to
89159 +                              restore, as returned by the matching call for
89160 +                              XX_LockIntrSpinlock().
89161 +
89162 + @Return        None.
89163 +*//***************************************************************************/
89164 +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags);
89165 +
89166 +
89167 +/*****************************************************************************/
89168 +/*                        Timers Service Routines                            */
89169 +/*****************************************************************************/
89170 +
89171 +/**************************************************************************//**
89172 + @Function      XX_CurrentTime
89173 +
89174 + @Description   Returns current system time.
89175 +
89176 + @Return        Current system time (in milliseconds).
89177 +*//***************************************************************************/
89178 +uint32_t XX_CurrentTime(void);
89179 +
89180 +/**************************************************************************//**
89181 + @Function      XX_CreateTimer
89182 +
89183 + @Description   Creates a timer.
89184 +
89185 + @Return        Timer handle is returned on success; NULL otherwise.
89186 +*//***************************************************************************/
89187 +t_Handle XX_CreateTimer(void);
89188 +
89189 +/**************************************************************************//**
89190 + @Function      XX_FreeTimer
89191 +
89192 + @Description   Frees the memory allocated for the timer creation.
89193 +
89194 + @Param[in]     h_Timer - A handle to a timer.
89195 +
89196 + @Return        None.
89197 +*//***************************************************************************/
89198 +void XX_FreeTimer(t_Handle h_Timer);
89199 +
89200 +/**************************************************************************//**
89201 + @Function      XX_StartTimer
89202 +
89203 + @Description   Starts a timer.
89204 +
89205 +                The user can select to start the timer as periodic timer or as
89206 +                one-shot timer. The user should provide a callback routine that
89207 +                will be called when the timer expires.
89208 +
89209 + @Param[in]     h_Timer         - A handle to a timer.
89210 + @Param[in]     msecs           - Timer expiration period (in milliseconds).
89211 + @Param[in]     periodic        - TRUE for a periodic timer;
89212 +                                  FALSE for a one-shot timer..
89213 + @Param[in]     f_TimerExpired  - A callback routine to be called when the
89214 +                                  timer expires.
89215 + @Param[in]     h_Arg           - The argument to pass in the timer-expired
89216 +                                  callback routine.
89217 +
89218 + @Return        None.
89219 +*//***************************************************************************/
89220 +void XX_StartTimer(t_Handle h_Timer,
89221 +                   uint32_t msecs,
89222 +                   bool     periodic,
89223 +                   void     (*f_TimerExpired)(t_Handle h_Arg),
89224 +                   t_Handle h_Arg);
89225 +
89226 +/**************************************************************************//**
89227 + @Function      XX_StopTimer
89228 +
89229 + @Description   Frees the memory allocated for the timer creation.
89230 +
89231 + @Param[in]     h_Timer - A handle to a timer.
89232 +
89233 + @Return        None.
89234 +*//***************************************************************************/
89235 +void XX_StopTimer(t_Handle h_Timer);
89236 +
89237 +/**************************************************************************//**
89238 + @Function      XX_ModTimer
89239 +
89240 + @Description   Updates the expiration time of a timer.
89241 +
89242 +                This routine adds the given time to the current system time,
89243 +                and sets this value as the new expiration time of the timer.
89244 +
89245 + @Param[in]     h_Timer - A handle to a timer.
89246 + @Param[in]     msecs   - The new interval until timer expiration
89247 +                          (in milliseconds).
89248 +
89249 + @Return        None.
89250 +*//***************************************************************************/
89251 +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs);
89252 +
89253 +/**************************************************************************//**
89254 + @Function      XX_Sleep
89255 +
89256 + @Description   Non-busy wait until the desired time (in milliseconds) has passed.
89257 +
89258 + @Param[in]     msecs - The requested sleep time (in milliseconds).
89259 +
89260 + @Return        Zero if the requested time has elapsed; Otherwise, the value
89261 +                returned will be the unslept amount) in milliseconds.
89262 +
89263 + @Cautions      This routine enables interrupts during its wait time.
89264 +*//***************************************************************************/
89265 +uint32_t XX_Sleep(uint32_t msecs);
89266 +
89267 +/**************************************************************************//**
89268 + @Function      XX_UDelay
89269 +
89270 + @Description   Busy-wait until the desired time (in microseconds) has passed.
89271 +
89272 + @Param[in]     usecs - The requested delay time (in microseconds).
89273 +
89274 + @Return        None.
89275 +
89276 + @Cautions      It is highly unrecommended to call this routine during interrupt
89277 +                time, because the system time may not be updated properly during
89278 +                the delay loop. The behavior of this routine during interrupt
89279 +                time is unexpected.
89280 +*//***************************************************************************/
89281 +void XX_UDelay(uint32_t usecs);
89282 +
89283 +
89284 +/*****************************************************************************/
89285 +/*                         Other Service Routines                            */
89286 +/*****************************************************************************/
89287 +
89288 +/**************************************************************************//**
89289 + @Function      XX_PhysToVirt
89290 +
89291 + @Description   Translates a physical address to the matching virtual address.
89292 +
89293 + @Param[in]     addr - The physical address to translate.
89294 +
89295 + @Return        Virtual address.
89296 +*//***************************************************************************/
89297 +void * XX_PhysToVirt(physAddress_t addr);
89298 +
89299 +/**************************************************************************//**
89300 + @Function      XX_VirtToPhys
89301 +
89302 + @Description   Translates a virtual address to the matching physical address.
89303 +
89304 + @Param[in]     addr - The virtual address to translate.
89305 +
89306 + @Return        Physical address.
89307 +*//***************************************************************************/
89308 +physAddress_t XX_VirtToPhys(void *addr);
89309 +
89310 +
89311 +/**************************************************************************//**
89312 + @Group         xx_ipc  XX Inter-Partition-Communication API
89313 +
89314 + @Description   The following API is to be used when working with multiple
89315 +                partitions configuration.
89316 +
89317 + @{
89318 +*//***************************************************************************/
89319 +
89320 +#define XX_IPC_MAX_ADDR_NAME_LENGTH 16         /**< Maximum length of an endpoint name string;
89321 +                                                    The IPC service can use this constant to limit
89322 +                                                    the storage space for IPC endpoint names. */
89323 +
89324 +
89325 +/**************************************************************************//**
89326 + @Function      t_IpcMsgCompletion
89327 +
89328 + @Description   Callback function used upon IPC non-blocking transaction completion
89329 +                to return message buffer to the caller and to forward reply if available.
89330 +
89331 +                This callback function may be attached by the source endpoint to any outgoing
89332 +                IPC message to indicate a non-blocking send (see also XX_IpcSendMessage() routine).
89333 +                Upon completion of an IPC transaction (consisting of a message and an optional reply),
89334 +                the IPC service invokes this callback routine to return the message buffer to the sender
89335 +                and to provide the received reply, if requested.
89336 +
89337 +                User provides this function. Driver invokes it.
89338 +
89339 + @Param[in]     h_Module        - Abstract handle to the sending module -  the same handle as was passed
89340 +                                  in the XX_IpcSendMessage() function; This handle is typically used to point
89341 +                                  to the internal data structure of the source endpoint.
89342 + @Param[in]     p_Msg           - Pointer to original (sent) message buffer;
89343 +                                  The source endpoint can free (or reuse) this buffer when message
89344 +                                  completion callback is called.
89345 + @Param[in]     p_Reply         - Pointer to (received) reply buffer;
89346 +                                  This pointer is the same as was provided by the source endpoint in
89347 +                                  XX_IpcSendMessage().
89348 + @Param[in]     replyLength     - Length (in bytes) of actual data in the reply buffer.
89349 + @Param[in]     status          - Completion status - E_OK or failure indication, e.g. IPC transaction completion
89350 +                                  timeout.
89351 +
89352 + @Return        None
89353 + *//***************************************************************************/
89354 +typedef void    (t_IpcMsgCompletion)(t_Handle   h_Module,
89355 +                                     uint8_t    *p_Msg,
89356 +                                     uint8_t    *p_Reply,
89357 +                                     uint32_t   replyLength,
89358 +                                     t_Error    status);
89359 +
89360 +/**************************************************************************//**
89361 + @Function      t_IpcMsgHandler
89362 +
89363 + @Description   Callback function used as IPC message handler.
89364 +
89365 +                The IPC service invokes message handlers for each IPC message received.
89366 +                The actual function pointer should be registered by each destination endpoint
89367 +                via the XX_IpcRegisterMsgHandler() routine.
89368 +
89369 +                User provides this function. Driver invokes it.
89370 +
89371 + @Param[in]     h_Module        - Abstract handle to the message handling module -  the same handle as
89372 +                                  was passed in the XX_IpcRegisterMsgHandler() function; this handle is
89373 +                                  typically used to point to the internal data structure of the destination
89374 +                                  endpoint.
89375 + @Param[in]     p_Msg           - Pointer to message buffer with data received from peer.
89376 + @Param[in]     msgLength       - Length (in bytes) of message data.
89377 + @Param[in]     p_Reply         - Pointer to reply buffer, to be filled by the message handler and then sent
89378 +                                  by the IPC service;
89379 +                                  The reply buffer is allocated by the IPC service with size equals to the
89380 +                                  replyLength parameter provided in message handler registration (see
89381 +                                  XX_IpcRegisterMsgHandler() function);
89382 +                                  If replyLength was initially specified as zero during message handler registration,
89383 +                                  the IPC service may set this pointer to NULL and assume that a reply is not needed;
89384 +                                  The IPC service is also responsible for freeing the reply buffer after the
89385 +                                  reply has been sent or dismissed.
89386 + @Param[in,out] p_ReplyLength   - Pointer to reply length, which has a dual role in this function:
89387 +                                  [In] equals the replyLength parameter provided in message handler
89388 +                                  registration (see XX_IpcRegisterMsgHandler() function), and
89389 +                                  [Out] should be updated by message handler to the actual reply length; if
89390 +                                  this value is set to zero, the IPC service must assume that a reply should
89391 +                                  not be sent;
89392 +                                  Note: If p_Reply is not NULL, p_ReplyLength must not be NULL as well.
89393 +
89394 + @Return        E_OK on success; Error code otherwise.
89395 + *//***************************************************************************/
89396 +typedef t_Error (t_IpcMsgHandler)(t_Handle  h_Module,
89397 +                                  uint8_t   *p_Msg,
89398 +                                  uint32_t  msgLength,
89399 +                                  uint8_t   *p_Reply,
89400 +                                  uint32_t  *p_ReplyLength);
89401 +
89402 +/**************************************************************************//**
89403 + @Function      XX_IpcRegisterMsgHandler
89404 +
89405 + @Description   IPC mailbox registration.
89406 +
89407 +                This function is used for registering an IPC message handler in the IPC service.
89408 +                This function is called by each destination endpoint to indicate that it is ready
89409 +                to handle incoming messages. The IPC service invokes the message handler upon receiving
89410 +                a message addressed to the specified destination endpoint.
89411 +
89412 + @Param[in]     addr                - The address name string associated with the destination endpoint;
89413 +                                      This address must be unique across the IPC service domain to ensure
89414 +                                      correct message routing.
89415 + @Param[in]     f_MsgHandler        - Pointer to the message handler callback for processing incoming
89416 +                                      message; invoked by the IPC service upon receiving a message
89417 +                                      addressed to the destination endpoint specified by the addr
89418 +                                      parameter.
89419 + @Param[in]     h_Module            - Abstract handle to the message handling module, passed unchanged
89420 +                                      to f_MsgHandler callback function.
89421 + @Param[in]     replyLength         - The maximal data length (in bytes) of any reply that the specified message handler
89422 +                                      may generate; the IPC service provides the message handler with buffer
89423 +                                      for reply according to the length specified here (refer also to the description
89424 +                                      of #t_IpcMsgHandler callback function type);
89425 +                                      This size shall be zero if the message handler never generates replies.
89426 +
89427 + @Return        E_OK on success; Error code otherwise.
89428 +*//***************************************************************************/
89429 +t_Error XX_IpcRegisterMsgHandler(char                   addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
89430 +                                 t_IpcMsgHandler        *f_MsgHandler,
89431 +                                 t_Handle               h_Module,
89432 +                                 uint32_t               replyLength);
89433 +
89434 +/**************************************************************************//**
89435 + @Function      XX_IpcUnregisterMsgHandler
89436 +
89437 + @Description   Release IPC mailbox routine.
89438 +
89439 +                 This function is used for unregistering an IPC message handler from the IPC service.
89440 +                 This function is called by each destination endpoint to indicate that it is no longer
89441 +                 capable of handling incoming messages.
89442 +
89443 + @Param[in]     addr          - The address name string associated with the destination endpoint;
89444 +                                This address is the same as was used when the message handler was
89445 +                                registered via XX_IpcRegisterMsgHandler().
89446 +
89447 + @Return        E_OK on success; Error code otherwise.
89448 +*//***************************************************************************/
89449 +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH]);
89450 +
89451 +/**************************************************************************//**
89452 + @Function      XX_IpcInitSession
89453 +
89454 + @Description   This function is used for creating an IPC session between the source endpoint
89455 +                and the destination endpoint.
89456 +
89457 +                The actual implementation and representation of a session is left for the IPC service.
89458 +                The function returns an abstract handle to the created session. This handle shall be used
89459 +                by the source endpoint in subsequent calls to XX_IpcSendMessage().
89460 +                The IPC service assumes that before this function is called, no messages are sent from
89461 +                the specified source endpoint to the specified destination endpoint.
89462 +
89463 +                The IPC service may use a connection-oriented approach or a connectionless approach (or both)
89464 +                as described below.
89465 +
89466 +                @par Connection-Oriented Approach
89467 +
89468 +                The IPC service may implement a session in a connection-oriented approach -  when this function is called,
89469 +                the IPC service should take the necessary steps to bring up a source-to-destination channel for messages
89470 +                and a destination-to-source channel for replies. The returned handle should represent the internal
89471 +                representation of these channels.
89472 +
89473 +                @par Connectionless Approach
89474 +
89475 +                The IPC service may implement a session in a connectionless approach -  when this function is called, the
89476 +                IPC service should not perform any particular steps, but it must store the pair of source and destination
89477 +                addresses in some session representation and return it as a handle. When XX_IpcSendMessage() shall be
89478 +                called, the IPC service may use this handle to provide the necessary identifiers for routing the messages
89479 +                through the connectionless medium.
89480 +
89481 + @Param[in]     destAddr      - The address name string associated with the destination endpoint.
89482 + @Param[in]     srcAddr       - The address name string associated with the source endpoint.
89483 +
89484 + @Return        Abstract handle to the initialized session, or NULL on error.
89485 +*//***************************************************************************/
89486 +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
89487 +                           char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH]);
89488 +
89489 +/**************************************************************************//**
89490 + @Function      XX_IpcFreeSession
89491 +
89492 + @Description   This function is used for terminating an existing IPC session between a source endpoint
89493 +                and a destination endpoint.
89494 +
89495 +                The IPC service assumes that after this function is called, no messages shall be sent from
89496 +                the associated source endpoint to the associated destination endpoint.
89497 +
89498 + @Param[in]     h_Session      - Abstract handle to the IPC session -  the same handle as was originally
89499 +                                 returned by the XX_IpcInitSession() function.
89500 +
89501 + @Return        E_OK on success; Error code otherwise.
89502 +*//***************************************************************************/
89503 +t_Error XX_IpcFreeSession(t_Handle h_Session);
89504 +
89505 +/**************************************************************************//**
89506 + @Function      XX_IpcSendMessage
89507 +
89508 + @Description   IPC message send routine.
89509 +
89510 +                This function may be used by a source endpoint to send an IPC message to a destination
89511 +                endpoint. The source endpoint cannot send a message to the destination endpoint without
89512 +                first initiating a session with that destination endpoint via XX_IpcInitSession() routine.
89513 +
89514 +                The source endpoint must provide the buffer pointer and length of the outgoing message.
89515 +                Optionally, it may also provide a buffer for an expected reply. In the latter case, the
89516 +                transaction is not considered complete by the IPC service until the reply has been received.
89517 +                If the source endpoint does not provide a reply buffer, the transaction is considered
89518 +                complete after the message has been sent. The source endpoint must keep the message (and
89519 +                optional reply) buffers valid until the transaction is complete.
89520 +
89521 +                @par Non-blocking mode
89522 +
89523 +                The source endpoint may request a non-blocking send by providing a non-NULL pointer to a message
89524 +                completion callback function (f_Completion). Upon completion of the IPC transaction (consisting of a
89525 +                message and an optional reply), the IPC service invokes this callback routine to return the message
89526 +                buffer to the sender and to provide the received reply, if requested.
89527 +
89528 +                @par Blocking mode
89529 +
89530 +                The source endpoint may request a blocking send by setting f_Completion to NULL. The function is
89531 +                expected to block until the IPC transaction is complete -  either the reply has been received or (if no reply
89532 +                was requested) the message has been sent.
89533 +
89534 + @Param[in]     h_Session       - Abstract handle to the IPC session -  the same handle as was originally
89535 +                                  returned by the XX_IpcInitSession() function.
89536 + @Param[in]     p_Msg           - Pointer to message buffer to send.
89537 + @Param[in]     msgLength       - Length (in bytes) of actual data in the message buffer.
89538 + @Param[in]     p_Reply         - Pointer to reply buffer -  if this buffer is not NULL, the IPC service
89539 +                                  fills this buffer with the received reply data;
89540 +                                  In blocking mode, the reply data must be valid when the function returns;
89541 +                                  In non-blocking mode, the reply data is valid when f_Completion is called;
89542 +                                  If this pointer is NULL, no reply is expected.
89543 + @Param[in,out] p_ReplyLength   - Pointer to reply length, which has a dual role in this function:
89544 +                                  [In] specifies the maximal length (in bytes) of the reply buffer pointed by
89545 +                                  p_Reply, and
89546 +                                  [Out] in non-blocking mode this value is updated by the IPC service to the
89547 +                                  actual reply length (in bytes).
89548 + @Param[in]     f_Completion    - Pointer to a completion callback to be used in non-blocking send mode;
89549 +                                  The completion callback is invoked by the IPC service upon
89550 +                                  completion of the IPC transaction (consisting of a message and an optional
89551 +                                  reply);
89552 +                                  If this pointer is NULL, the function is expected to block until the IPC
89553 +                                  transaction is complete.
89554 + @Param[in]     h_Arg           - Abstract handle to the sending module; passed unchanged to the f_Completion
89555 +                                  callback function as the first argument.
89556 +
89557 + @Return        E_OK on success; Error code otherwise.
89558 +*//***************************************************************************/
89559 +t_Error XX_IpcSendMessage(t_Handle           h_Session,
89560 +                          uint8_t            *p_Msg,
89561 +                          uint32_t           msgLength,
89562 +                          uint8_t            *p_Reply,
89563 +                          uint32_t           *p_ReplyLength,
89564 +                          t_IpcMsgCompletion *f_Completion,
89565 +                          t_Handle           h_Arg);
89566 +
89567 +
89568 +/** @} */ /* end of xx_ipc group */
89569 +/** @} */ /* end of xx_id group */
89570 +
89571 +
89572 +#endif /* __XX_EXT_H */
89573 --- /dev/null
89574 +++ b/drivers/net/ethernet/freescale/sdk_fman/ls1043_dflags.h
89575 @@ -0,0 +1,56 @@
89576 +/*
89577 + * Copyright 2012 Freescale Semiconductor Inc.
89578 + *
89579 + * Redistribution and use in source and binary forms, with or without
89580 + * modification, are permitted provided that the following conditions are met:
89581 + *     * Redistributions of source code must retain the above copyright
89582 + *       notice, this list of conditions and the following disclaimer.
89583 + *     * Redistributions in binary form must reproduce the above copyright
89584 + *       notice, this list of conditions and the following disclaimer in the
89585 + *       documentation and/or other materials provided with the distribution.
89586 + *     * Neither the name of Freescale Semiconductor nor the
89587 + *       names of its contributors may be used to endorse or promote products
89588 + *       derived from this software without specific prior written permission.
89589 + *
89590 + *
89591 + * ALTERNATIVELY, this software may be distributed under the terms of the
89592 + * GNU General Public License ("GPL") as published by the Free Software
89593 + * Foundation, either version 2 of that License or (at your option) any
89594 + * later version.
89595 + *
89596 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
89597 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
89598 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89599 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
89600 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89601 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
89602 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
89603 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
89604 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
89605 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
89606 + */
89607 +
89608 +#ifndef __dflags_h
89609 +#define __dflags_h
89610 +
89611 +
89612 +#define NCSW_LINUX
89613 +
89614 +#define LS1043
89615 +
89616 +#define DEBUG_ERRORS        1
89617 +
89618 +#if defined(DEBUG)
89619 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_INFO
89620 +
89621 +#define DEBUG_XX_MALLOC
89622 +#define DEBUG_MEM_LEAKS
89623 +
89624 +#else
89625 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_WARNING
89626 +#endif /* (DEBUG) */
89627 +
89628 +#define REPORT_EVENTS       1
89629 +#define EVENT_GLOBAL_LEVEL  REPORT_LEVEL_MINOR
89630 +
89631 +#endif /* __dflags_h */
89632 --- /dev/null
89633 +++ b/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
89634 @@ -0,0 +1,53 @@
89635 +#
89636 +# Makefile config for the Freescale NetcommSW
89637 +#
89638 +NET_DPA     = $(srctree)/drivers/net
89639 +DRV_DPA     = $(srctree)/drivers/net/ethernet/freescale/sdk_dpaa
89640 +FMAN        = $(srctree)/drivers/net/ethernet/freescale/sdk_fman
89641 +
89642 +ifeq ("$(CONFIG_FMAN_P3040_P4080_P5020)", "y")
89643 +ccflags-y +=-include $(FMAN)/p3040_4080_5020_dflags.h
89644 +endif
89645 +ifeq ("$(CONFIG_FMAN_P1023)", "y")
89646 +ccflags-y +=-include $(FMAN)/p1023_dflags.h
89647 +endif
89648 +ifdef CONFIG_FMAN_V3H
89649 +ccflags-y +=-include $(FMAN)/fmanv3h_dflags.h
89650 +endif
89651 +ifdef CONFIG_FMAN_V3L
89652 +ccflags-y +=-include $(FMAN)/fmanv3l_dflags.h
89653 +endif
89654 +ifdef CONFIG_FMAN_ARM
89655 +ccflags-y +=-include $(FMAN)/ls1043_dflags.h
89656 +endif
89657 +
89658 +ccflags-y += -I$(DRV_DPA)/
89659 +ccflags-y += -I$(FMAN)/inc
89660 +ccflags-y += -I$(FMAN)/inc/cores
89661 +ccflags-y += -I$(FMAN)/inc/etc
89662 +ccflags-y += -I$(FMAN)/inc/Peripherals
89663 +ccflags-y += -I$(FMAN)/inc/flib
89664 +
89665 +ifeq ("$(CONFIG_FMAN_P3040_P4080_P5020)", "y")
89666 +ccflags-y += -I$(FMAN)/inc/integrations/P3040_P4080_P5020
89667 +endif
89668 +ifeq ("$(CONFIG_FMAN_P1023)", "y")
89669 +ccflags-y += -I$(FMAN)/inc/integrations/P1023
89670 +endif
89671 +ifdef CONFIG_FMAN_V3H
89672 +ccflags-y += -I$(FMAN)/inc/integrations/FMANV3H
89673 +endif
89674 +ifdef CONFIG_FMAN_V3L
89675 +ccflags-y += -I$(FMAN)/inc/integrations/FMANV3L
89676 +endif
89677 +ifdef CONFIG_FMAN_ARM
89678 +ccflags-y += -I$(FMAN)/inc/integrations/LS1043
89679 +endif
89680 +
89681 +ccflags-y += -I$(FMAN)/src/inc
89682 +ccflags-y += -I$(FMAN)/src/inc/system
89683 +ccflags-y += -I$(FMAN)/src/inc/wrapper
89684 +ccflags-y += -I$(FMAN)/src/inc/xx
89685 +ccflags-y += -I$(srctree)/include/uapi/linux/fmd
89686 +ccflags-y += -I$(srctree)/include/uapi/linux/fmd/Peripherals
89687 +ccflags-y += -I$(srctree)/include/uapi/linux/fmd/integrations
89688 --- /dev/null
89689 +++ b/drivers/net/ethernet/freescale/sdk_fman/p1023_dflags.h
89690 @@ -0,0 +1,65 @@
89691 +/*
89692 + * Copyright 2008-2012 Freescale Semiconductor Inc.
89693 + *
89694 + * Redistribution and use in source and binary forms, with or without
89695 + * modification, are permitted provided that the following conditions are met:
89696 + *     * Redistributions of source code must retain the above copyright
89697 + *       notice, this list of conditions and the following disclaimer.
89698 + *     * Redistributions in binary form must reproduce the above copyright
89699 + *       notice, this list of conditions and the following disclaimer in the
89700 + *       documentation and/or other materials provided with the distribution.
89701 + *     * Neither the name of Freescale Semiconductor nor the
89702 + *       names of its contributors may be used to endorse or promote products
89703 + *       derived from this software without specific prior written permission.
89704 + *
89705 + *
89706 + * ALTERNATIVELY, this software may be distributed under the terms of the
89707 + * GNU General Public License ("GPL") as published by the Free Software
89708 + * Foundation, either version 2 of that License or (at your option) any
89709 + * later version.
89710 + *
89711 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
89712 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
89713 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89714 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
89715 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89716 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
89717 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
89718 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
89719 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
89720 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
89721 + */
89722 +
89723 +#ifndef __dflags_h
89724 +#define __dflags_h
89725 +
89726 +
89727 +#define NCSW_LINUX
89728 +#if 0
89729 +#define DEBUG
89730 +#endif
89731 +
89732 +#define P1023
89733 +#define NCSW_PPC_CORE
89734 +
89735 +#define DEBUG_ERRORS        1
89736 +
89737 +#if defined(DEBUG)
89738 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_INFO
89739 +
89740 +#define DEBUG_XX_MALLOC
89741 +#define DEBUG_MEM_LEAKS
89742 +
89743 +#else
89744 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_WARNING
89745 +#endif /* (DEBUG) */
89746 +
89747 +#define REPORT_EVENTS       1
89748 +#define EVENT_GLOBAL_LEVEL  REPORT_LEVEL_MINOR
89749 +
89750 +#ifdef CONFIG_P4080_SIM
89751 +#error "Do not define CONFIG_P4080_SIM..."
89752 +#endif
89753 +
89754 +
89755 +#endif /* __dflags_h */
89756 --- /dev/null
89757 +++ b/drivers/net/ethernet/freescale/sdk_fman/p3040_4080_5020_dflags.h
89758 @@ -0,0 +1,62 @@
89759 +/*
89760 + * Copyright 2008-2012 Freescale Semiconductor Inc.
89761 + *
89762 + * Redistribution and use in source and binary forms, with or without
89763 + * modification, are permitted provided that the following conditions are met:
89764 + *     * Redistributions of source code must retain the above copyright
89765 + *       notice, this list of conditions and the following disclaimer.
89766 + *     * Redistributions in binary form must reproduce the above copyright
89767 + *       notice, this list of conditions and the following disclaimer in the
89768 + *       documentation and/or other materials provided with the distribution.
89769 + *     * Neither the name of Freescale Semiconductor nor the
89770 + *       names of its contributors may be used to endorse or promote products
89771 + *       derived from this software without specific prior written permission.
89772 + *
89773 + *
89774 + * ALTERNATIVELY, this software may be distributed under the terms of the
89775 + * GNU General Public License ("GPL") as published by the Free Software
89776 + * Foundation, either version 2 of that License or (at your option) any
89777 + * later version.
89778 + *
89779 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
89780 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
89781 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89782 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
89783 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89784 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
89785 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
89786 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
89787 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
89788 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
89789 + */
89790 +
89791 +#ifndef __dflags_h
89792 +#define __dflags_h
89793 +
89794 +
89795 +#define NCSW_LINUX
89796 +
89797 +#define P4080
89798 +#define NCSW_PPC_CORE
89799 +
89800 +#define DEBUG_ERRORS        1
89801 +
89802 +#if defined(DEBUG)
89803 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_INFO
89804 +
89805 +#define DEBUG_XX_MALLOC
89806 +#define DEBUG_MEM_LEAKS
89807 +
89808 +#else
89809 +#define DEBUG_GLOBAL_LEVEL  REPORT_LEVEL_WARNING
89810 +#endif /* (DEBUG) */
89811 +
89812 +#define REPORT_EVENTS       1
89813 +#define EVENT_GLOBAL_LEVEL  REPORT_LEVEL_MINOR
89814 +
89815 +#ifdef CONFIG_P4080_SIM
89816 +#define SIMULATOR
89817 +#endif /* CONFIG_P4080_SIM */
89818 +
89819 +
89820 +#endif /* __dflags_h */
89821 --- /dev/null
89822 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/Makefile
89823 @@ -0,0 +1,11 @@
89824 +#
89825 +# Makefile for the Freescale Ethernet controllers
89826 +#
89827 +ccflags-y           += -DVERSION=\"\"
89828 +#
89829 +#Include netcomm SW specific definitions
89830 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
89831 +#
89832 +obj-y          += system/
89833 +obj-y          += wrapper/
89834 +obj-y          += xx/
89835 --- /dev/null
89836 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_ext.h
89837 @@ -0,0 +1,118 @@
89838 +/*
89839 + * Copyright 2008-2012 Freescale Semiconductor Inc.
89840 + *
89841 + * Redistribution and use in source and binary forms, with or without
89842 + * modification, are permitted provided that the following conditions are met:
89843 + *     * Redistributions of source code must retain the above copyright
89844 + *       notice, this list of conditions and the following disclaimer.
89845 + *     * Redistributions in binary form must reproduce the above copyright
89846 + *       notice, this list of conditions and the following disclaimer in the
89847 + *       documentation and/or other materials provided with the distribution.
89848 + *     * Neither the name of Freescale Semiconductor nor the
89849 + *       names of its contributors may be used to endorse or promote products
89850 + *       derived from this software without specific prior written permission.
89851 + *
89852 + *
89853 + * ALTERNATIVELY, this software may be distributed under the terms of the
89854 + * GNU General Public License ("GPL") as published by the Free Software
89855 + * Foundation, either version 2 of that License or (at your option) any
89856 + * later version.
89857 + *
89858 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
89859 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
89860 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89861 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
89862 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89863 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
89864 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
89865 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
89866 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
89867 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
89868 + */
89869 +
89870 +#ifndef __SYS_EXT_H
89871 +#define __SYS_EXT_H
89872 +
89873 +#include "std_ext.h"
89874 +
89875 +
89876 +/**************************************************************************//**
89877 + @Group         sys_grp     System Interfaces
89878 +
89879 + @Description   Linux system programming interfaces.
89880 +
89881 + @{
89882 +*//***************************************************************************/
89883 +
89884 +/**************************************************************************//**
89885 + @Group         sys_gen_grp     System General Interface
89886 +
89887 + @Description   General definitions, structures and routines of the linux
89888 +                system programming interface.
89889 +
89890 + @{
89891 +*//***************************************************************************/
89892 +
89893 +/**************************************************************************//**
89894 + @Collection    Macros for Advanced Configuration Requests
89895 + @{
89896 +*//***************************************************************************/
89897 +#define SYS_MAX_ADV_CONFIG_ARGS     4
89898 +                                    /**< Maximum number of arguments in
89899 +                                         an advanced configuration entry */
89900 +/* @} */
89901 +
89902 +/**************************************************************************//**
89903 + @Description   System Object Advanced Configuration Entry
89904 +
89905 +                This structure represents a single request for an advanced
89906 +                configuration call on the initialized object. An array of such
89907 +                requests may be contained in the settings structure of the
89908 +                corresponding object.
89909 +
89910 +                The maximum number of arguments is limited to #SYS_MAX_ADV_CONFIG_ARGS.
89911 +*//***************************************************************************/
89912 +typedef struct t_SysObjectAdvConfigEntry
89913 +{
89914 +    void        *p_Function;    /**< Pointer to advanced configuration routine */
89915 +
89916 +    uintptr_t    args[SYS_MAX_ADV_CONFIG_ARGS];
89917 +                                /**< Array of arguments for the specified routine;
89918 +                                     All arguments should be casted to uint32_t. */
89919 +} t_SysObjectAdvConfigEntry;
89920 +
89921 +
89922 +/** @} */ /* end of sys_gen_grp */
89923 +/** @} */ /* end of sys_grp */
89924 +
89925 +#define NCSW_PARAMS(_num, _params)   ADV_CONFIG_PARAMS_##_num _params
89926 +
89927 +#define ADV_CONFIG_PARAMS_1(_type) \
89928 +    , (_type)p_Entry->args[0]
89929 +
89930 +#define SET_ADV_CONFIG_ARGS_1(_arg0)        \
89931 +    p_Entry->args[0] = (uintptr_t )(_arg0);   \
89932 +
89933 +#define ARGS(_num, _params) SET_ADV_CONFIG_ARGS_##_num _params
89934 +
89935 +#define ADD_ADV_CONFIG_START(_p_Entries, _maxEntries)           \
89936 +    {                                                           \
89937 +        t_SysObjectAdvConfigEntry   *p_Entry;                   \
89938 +        t_SysObjectAdvConfigEntry   *p_Entrys = (_p_Entries);   \
89939 +        int                         i=0, max = (_maxEntries);   \
89940 +
89941 +#define ADD_ADV_CONFIG_END \
89942 +    }
89943 +
89944 +#define ADV_CONFIG_CHECK_START(_p_Entry)                        \
89945 +    {                                                           \
89946 +        t_SysObjectAdvConfigEntry   *p_Entry = _p_Entry;        \
89947 +        t_Error                     errCode;                    \
89948 +
89949 +#define ADV_CONFIG_CHECK(_handle, _func, _params)               \
89950 +        if (p_Entry->p_Function == _func)                       \
89951 +        {                                                       \
89952 +            errCode = _func(_handle _params);                   \
89953 +        } else
89954 +
89955 +#endif /* __SYS_EXT_H */
89956 --- /dev/null
89957 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_io_ext.h
89958 @@ -0,0 +1,46 @@
89959 +/*
89960 + * Copyright 2008-2012 Freescale Semiconductor Inc.
89961 + *
89962 + * Redistribution and use in source and binary forms, with or without
89963 + * modification, are permitted provided that the following conditions are met:
89964 + *     * Redistributions of source code must retain the above copyright
89965 + *       notice, this list of conditions and the following disclaimer.
89966 + *     * Redistributions in binary form must reproduce the above copyright
89967 + *       notice, this list of conditions and the following disclaimer in the
89968 + *       documentation and/or other materials provided with the distribution.
89969 + *     * Neither the name of Freescale Semiconductor nor the
89970 + *       names of its contributors may be used to endorse or promote products
89971 + *       derived from this software without specific prior written permission.
89972 + *
89973 + *
89974 + * ALTERNATIVELY, this software may be distributed under the terms of the
89975 + * GNU General Public License ("GPL") as published by the Free Software
89976 + * Foundation, either version 2 of that License or (at your option) any
89977 + * later version.
89978 + *
89979 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
89980 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
89981 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89982 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
89983 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89984 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
89985 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
89986 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
89987 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
89988 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
89989 + */
89990 +
89991 +#ifndef __SYS_IO_EXT_H
89992 +#define __SYS_IO_EXT_H
89993 +
89994 +#include "std_ext.h"
89995 +#include "error_ext.h"
89996 +
89997 +
89998 +t_Error  SYS_RegisterIoMap   (uint64_t virtAddr, uint64_t physAddr, uint32_t size);
89999 +t_Error  SYS_UnregisterIoMap (uint64_t virtAddr);
90000 +uint64_t SYS_PhysToVirt      (uint64_t addr);
90001 +uint64_t SYS_VirtToPhys      (uint64_t addr);
90002 +
90003 +
90004 +#endif /* __SYS_IO_EXT_H */
90005 --- /dev/null
90006 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/types_linux.h
90007 @@ -0,0 +1,208 @@
90008 +/*
90009 + * Copyright 2008-2012 Freescale Semiconductor Inc.
90010 + *
90011 + * Redistribution and use in source and binary forms, with or without
90012 + * modification, are permitted provided that the following conditions are met:
90013 + *     * Redistributions of source code must retain the above copyright
90014 + *       notice, this list of conditions and the following disclaimer.
90015 + *     * Redistributions in binary form must reproduce the above copyright
90016 + *       notice, this list of conditions and the following disclaimer in the
90017 + *       documentation and/or other materials provided with the distribution.
90018 + *     * Neither the name of Freescale Semiconductor nor the
90019 + *       names of its contributors may be used to endorse or promote products
90020 + *       derived from this software without specific prior written permission.
90021 + *
90022 + *
90023 + * ALTERNATIVELY, this software may be distributed under the terms of the
90024 + * GNU General Public License ("GPL") as published by the Free Software
90025 + * Foundation, either version 2 of that License or (at your option) any
90026 + * later version.
90027 + *
90028 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
90029 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
90030 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
90031 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
90032 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90033 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
90034 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
90035 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
90036 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
90037 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
90038 + */
90039 +
90040 +#ifndef __TYPES_LINUX_H__
90041 +#define __TYPES_LINUX_H__
90042 +
90043 +#include <linux/version.h>
90044 +
90045 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
90046 +#define MODVERSIONS
90047 +#endif
90048 +#ifdef MODVERSIONS
90049 +#include <config/modversions.h>
90050 +#endif /* MODVERSIONS */
90051 +
90052 +#include <linux/kernel.h>
90053 +#include <linux/types.h>
90054 +#include <asm/io.h>
90055 +#include <linux/delay.h>
90056 +
90057 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
90058 +    #error "This kernel is probably not supported!!!"
90059 +#elif   (!((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)) || \
90060 +           (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)) || \
90061 +           (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,30))))
90062 +    #warning "This kernel is probably not supported!!! You may need to add some fixes."
90063 +#endif    /* LINUX_VERSION_CODE */
90064 +
90065 +
90066 +typedef float               float_t;    /* Single precision floating point  */
90067 +typedef double              double_t;   /* Double precision floating point  */
90068 +
90069 +
90070 +#define _Packed
90071 +#define _PackedType __attribute__ ((packed))
90072 +
90073 +typedef  phys_addr_t physAddress_t;
90074 +
90075 +#define UINT8_MAX   0xFF
90076 +#define UINT8_MIN   0
90077 +#define UINT16_MAX  0xFFFF
90078 +#define UINT16_MIN  0
90079 +#define UINT32_MAX  0xFFFFFFFF
90080 +#define UINT32_MIN  0
90081 +#define UINT64_MAX  0xFFFFFFFFFFFFFFFFLL
90082 +#define UINT64_MIN  0
90083 +#define INT8_MAX    0x7F
90084 +#define INT8_MIN    0x80
90085 +#define INT16_MAX   0x7FFF
90086 +#define INT16_MIN   0x8000
90087 +#define INT32_MAX   0x7FFFFFFF
90088 +#define INT32_MIN   0x80000000
90089 +#define INT64_MAX   0x7FFFFFFFFFFFFFFFLL
90090 +#define INT64_MIN   0x8000000000000000LL
90091 +
90092 +#define ON          1
90093 +#define OFF         0
90094 +
90095 +#define FALSE       false
90096 +#define TRUE        true
90097 +
90098 +
90099 +/************************/
90100 +/* memory access macros */
90101 +/************************/
90102 +#ifdef CONFIG_FMAN_ARM
90103 +#define in_be16(a)             __be16_to_cpu(__raw_readw(a))
90104 +#define in_be32(a)             __be32_to_cpu(__raw_readl(a))
90105 +#define out_be16(a, v)         __raw_writew(__cpu_to_be16(v), a)
90106 +#define out_be32(a, v)         __raw_writel(__cpu_to_be32(v), a)
90107 +#endif
90108 +
90109 +#define GET_UINT8(arg)              *(volatile uint8_t *)(&(arg))
90110 +#define GET_UINT16(arg)             in_be16(&(arg))//*(volatile uint16_t*)(&(arg))
90111 +#define GET_UINT32(arg)             in_be32(&(arg))//*(volatile uint32_t*)(&(arg))
90112 +#define GET_UINT64(arg)             *(volatile uint64_t*)(&(arg))
90113 +
90114 +#ifdef VERBOSE_WRITE
90115 +void    XX_Print(char *str, ...);
90116 +#define WRITE_UINT8(arg, data)  \
90117 +    do { XX_Print("ADDR: 0x%08x, VAL: 0x%02x\r\n",    (uint32_t)&(arg), (data)); *(volatile uint8_t *)(&(arg)) = (data); } while (0)
90118 +#define WRITE_UINT16(arg, data) \
90119 +    do { XX_Print("ADDR: 0x%08x, VAL: 0x%04x\r\n",    (uint32_t)&(arg), (data)); out_be16(&(arg), data); /* *(volatile uint16_t*)(&(arg)) = (data);*/ } while (0)
90120 +#define WRITE_UINT32(arg, data) \
90121 +    do { XX_Print("ADDR: 0x%08x, VAL: 0x%08x\r\n",    (uint32_t)&(arg), (data)); out_be32(&(arg), data); /* *(volatile uint32_t*)(&(arg)) = (data);*/ } while (0)
90122 +#define WRITE_UINT64(arg, data) \
90123 +    do { XX_Print("ADDR: 0x%08x, VAL: 0x%016llx\r\n", (uint32_t)&(arg), (data)); *(volatile uint64_t*)(&(arg)) = (data); } while (0)
90124 +
90125 +#else  /* not VERBOSE_WRITE */
90126 +#define WRITE_UINT8(arg, data)      *(volatile uint8_t *)(&(arg)) = (data)
90127 +#define WRITE_UINT16(arg, data)     out_be16(&(arg), data)//*(volatile uint16_t*)(&(arg)) = (data)
90128 +#define WRITE_UINT32(arg, data)     out_be32(&(arg), data)//*(volatile unsigned int *)(&(arg)) = (data)
90129 +#define WRITE_UINT64(arg, data)     *(volatile uint64_t*)(&(arg)) = (data)
90130 +#endif /* not VERBOSE_WRITE */
90131 +
90132 +
90133 +/*****************************************************************************/
90134 +/*                      General stuff                                        */
90135 +/*****************************************************************************/
90136 +#ifdef ARRAY_SIZE
90137 +#undef ARRAY_SIZE
90138 +#endif /* ARRAY_SIZE */
90139 +
90140 +#ifdef MAJOR
90141 +#undef MAJOR
90142 +#endif /* MAJOR */
90143 +
90144 +#ifdef MINOR
90145 +#undef MINOR
90146 +#endif /* MINOR */
90147 +
90148 +#ifdef QE_SIZEOF_BD
90149 +#undef QE_SIZEOF_BD
90150 +#endif /* QE_SIZEOF_BD */
90151 +
90152 +#ifdef BD_BUFFER_CLEAR
90153 +#undef BD_BUFFER_CLEAR
90154 +#endif /* BD_BUFFER_CLEAR */
90155 +
90156 +#ifdef BD_BUFFER
90157 +#undef BD_BUFFER
90158 +#endif /* BD_BUFFER */
90159 +
90160 +#ifdef BD_STATUS_AND_LENGTH_SET
90161 +#undef BD_STATUS_AND_LENGTH_SET
90162 +#endif /* BD_STATUS_AND_LENGTH_SET */
90163 +
90164 +#ifdef BD_STATUS_AND_LENGTH
90165 +#undef BD_STATUS_AND_LENGTH
90166 +#endif /* BD_STATUS_AND_LENGTH */
90167 +
90168 +#ifdef BD_BUFFER_ARG
90169 +#undef BD_BUFFER_ARG
90170 +#endif /* BD_BUFFER_ARG */
90171 +
90172 +#ifdef BD_GET_NEXT
90173 +#undef BD_GET_NEXT
90174 +#endif /* BD_GET_NEXT */
90175 +
90176 +#ifdef QE_SDEBCR_BA_MASK
90177 +#undef QE_SDEBCR_BA_MASK
90178 +#endif /* QE_SDEBCR_BA_MASK */
90179 +
90180 +#ifdef BD_BUFFER_SET
90181 +#undef BD_BUFFER_SET
90182 +#endif /* BD_BUFFER_SET */
90183 +
90184 +#ifdef UPGCR_PROTOCOL
90185 +#undef UPGCR_PROTOCOL
90186 +#endif /* UPGCR_PROTOCOL */
90187 +
90188 +#ifdef UPGCR_TMS
90189 +#undef UPGCR_TMS
90190 +#endif /* UPGCR_TMS */
90191 +
90192 +#ifdef UPGCR_RMS
90193 +#undef UPGCR_RMS
90194 +#endif /* UPGCR_RMS */
90195 +
90196 +#ifdef UPGCR_ADDR
90197 +#undef UPGCR_ADDR
90198 +#endif /* UPGCR_ADDR */
90199 +
90200 +#ifdef UPGCR_DIAG
90201 +#undef UPGCR_DIAG
90202 +#endif /* UPGCR_DIAG */
90203 +
90204 +#ifdef NCSW_PARAMS
90205 +#undef NCSW_PARAMS
90206 +#endif /* NCSW_PARAMS */
90207 +
90208 +#ifdef NO_IRQ
90209 +#undef NO_IRQ
90210 +#endif /* NO_IRQ */
90211 +
90212 +#define PRINT_LINE   XX_Print("%s:\n %s [%d]\n",__FILE__,__FUNCTION__,__LINE__);
90213 +
90214 +
90215 +#endif /* __TYPES_LINUX_H__ */
90216 --- /dev/null
90217 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/fsl_fman_test.h
90218 @@ -0,0 +1,84 @@
90219 +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
90220 + * All rights reserved.
90221 + *
90222 + * Redistribution and use in source and binary forms, with or without
90223 + * modification, are permitted provided that the following conditions are met:
90224 + *     * Redistributions of source code must retain the above copyright
90225 + *       notice, this list of conditions and the following disclaimer.
90226 + *     * Redistributions in binary form must reproduce the above copyright
90227 + *       notice, this list of conditions and the following disclaimer in the
90228 + *       documentation and/or other materials provided with the distribution.
90229 + *     * Neither the name of Freescale Semiconductor nor the
90230 + *       names of its contributors may be used to endorse or promote products
90231 + *       derived from this software without specific prior written permission.
90232 + *
90233 + *
90234 + * ALTERNATIVELY, this software may be distributed under the terms of the
90235 + * GNU General Public License ("GPL") as published by the Free Software
90236 + * Foundation, either version 2 of that License or (at your option) any
90237 + * later version.
90238 + *
90239 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
90240 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
90241 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
90242 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
90243 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90244 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
90245 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
90246 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
90247 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
90248 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
90249 + */
90250 +
90251 +/******************************************************************************
90252 + @File          fsl_fman_test.h
90253 +
90254 + @Description
90255 +*//***************************************************************************/
90256 +
90257 +#ifndef __FSL_FMAN_TEST_H
90258 +#define __FSL_FMAN_TEST_H
90259 +
90260 +#include <linux/types.h>
90261 +#include <linux/smp.h>  /* raw_smp_processor_id() */
90262 +
90263 +//#define FMT_K_DBG
90264 +//#define FMT_K_DBG_RUNTIME
90265 +
90266 +#define _fmt_prk(stage, format, arg...)        \
90267 +       printk(stage "fmt (cpu:%u): " format, raw_smp_processor_id(), ##arg)
90268 +
90269 +#define _fmt_inf(format, arg...) _fmt_prk(KERN_INFO, format, ##arg)
90270 +#define _fmt_wrn(format, arg...) _fmt_prk(KERN_WARNING, format, ##arg)
90271 +#define _fmt_err(format, arg...) _fmt_prk(KERN_ERR, format, ##arg)
90272 +
90273 +/* there are two macros for debugging: for runtime and generic.
90274 + * Helps when the runtime functions are not targeted for debugging,
90275 + * thus all the unnecessary information will be skipped.
90276 + */
90277 +/* used for generic debugging */
90278 +#if defined(FMT_K_DBG)
90279 +       #define _fmt_dbg(format, arg...) \
90280 +               printk("fmt [%s:%u](cpu:%u) - " format, \
90281 +                       __func__, __LINE__, raw_smp_processor_id(), ##arg)
90282 +#else
90283 +#      define _fmt_dbg(arg...)
90284 +#endif
90285 +
90286 +/* used for debugging runtime functions */
90287 +#if defined(FMT_K_DBG_RUNTIME)
90288 +       #define _fmt_dbgr(format, arg...) \
90289 +               printk("fmt [%s:%u](cpu:%u) - " format, \
90290 +                       __func__, __LINE__, raw_smp_processor_id(), ##arg)
90291 +#else
90292 +#      define _fmt_dbgr(arg...)
90293 +#endif
90294 +
90295 +#define FMT_RX_ERR_Q    0xffffffff
90296 +#define FMT_RX_DFLT_Q   0xfffffffe
90297 +#define FMT_TX_ERR_Q    0xfffffffd
90298 +#define FMT_TX_CONF_Q   0xfffffffc
90299 +
90300 +#define FMAN_TEST_MAX_TX_FQS 8
90301 +
90302 +#endif /* __FSL_FMAN_TEST_H */
90303 --- /dev/null
90304 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h
90305 @@ -0,0 +1,128 @@
90306 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
90307 + * All rights reserved.
90308 + *
90309 + * Redistribution and use in source and binary forms, with or without
90310 + * modification, are permitted provided that the following conditions are met:
90311 + *     * Redistributions of source code must retain the above copyright
90312 + *       notice, this list of conditions and the following disclaimer.
90313 + *     * Redistributions in binary form must reproduce the above copyright
90314 + *       notice, this list of conditions and the following disclaimer in the
90315 + *       documentation and/or other materials provided with the distribution.
90316 + *     * Neither the name of Freescale Semiconductor nor the
90317 + *       names of its contributors may be used to endorse or promote products
90318 + *       derived from this software without specific prior written permission.
90319 + *
90320 + *
90321 + * ALTERNATIVELY, this software may be distributed under the terms of the
90322 + * GNU General Public License ("GPL") as published by the Free Software
90323 + * Foundation, either version 2 of that License or (at your option) any
90324 + * later version.
90325 + *
90326 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
90327 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
90328 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
90329 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
90330 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90331 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
90332 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
90333 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
90334 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
90335 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
90336 + */
90337 +
90338 +/*
90339 + @File          lnxwrp_exp_sym.h
90340 + @Description   FMan exported routines
90341 +*/
90342 +
90343 +#ifndef __LNXWRP_EXP_SYM_H
90344 +#define __LNXWRP_EXP_SYM_H
90345 +
90346 +#include "fm_port_ext.h"
90347 +#include "fm_pcd_ext.h"
90348 +#include "fm_mac_ext.h"
90349 +
90350 +
90351 +/* FMAN Port exported routines */
90352 +EXPORT_SYMBOL(FM_PORT_Disable);
90353 +EXPORT_SYMBOL(FM_PORT_Enable);
90354 +EXPORT_SYMBOL(FM_PORT_SetPCD);
90355 +EXPORT_SYMBOL(FM_PORT_DeletePCD);
90356 +
90357 +/* Runtime PCD exported routines */
90358 +EXPORT_SYMBOL(FM_PCD_Enable);
90359 +EXPORT_SYMBOL(FM_PCD_Disable);
90360 +EXPORT_SYMBOL(FM_PCD_GetCounter);
90361 +EXPORT_SYMBOL(FM_PCD_PrsLoadSw);
90362 +EXPORT_SYMBOL(FM_PCD_KgSetDfltValue);
90363 +EXPORT_SYMBOL(FM_PCD_KgSetAdditionalDataAfterParsing);
90364 +EXPORT_SYMBOL(FM_PCD_SetException);
90365 +EXPORT_SYMBOL(FM_PCD_ModifyCounter);
90366 +EXPORT_SYMBOL(FM_PCD_SetPlcrStatistics);
90367 +EXPORT_SYMBOL(FM_PCD_SetPrsStatistics);
90368 +EXPORT_SYMBOL(FM_PCD_ForceIntr);
90369 +EXPORT_SYMBOL(FM_PCD_HcTxConf);
90370 +
90371 +EXPORT_SYMBOL(FM_PCD_NetEnvCharacteristicsSet);
90372 +EXPORT_SYMBOL(FM_PCD_NetEnvCharacteristicsDelete);
90373 +EXPORT_SYMBOL(FM_PCD_KgSchemeSet);
90374 +EXPORT_SYMBOL(FM_PCD_KgSchemeDelete);
90375 +EXPORT_SYMBOL(FM_PCD_KgSchemeGetCounter);
90376 +EXPORT_SYMBOL(FM_PCD_KgSchemeSetCounter);
90377 +EXPORT_SYMBOL(FM_PCD_CcRootBuild);
90378 +EXPORT_SYMBOL(FM_PCD_CcRootDelete);
90379 +EXPORT_SYMBOL(FM_PCD_MatchTableSet);
90380 +EXPORT_SYMBOL(FM_PCD_MatchTableDelete);
90381 +EXPORT_SYMBOL(FM_PCD_CcRootModifyNextEngine);
90382 +EXPORT_SYMBOL(FM_PCD_MatchTableModifyNextEngine);
90383 +EXPORT_SYMBOL(FM_PCD_MatchTableFindNModifyNextEngine);
90384 +EXPORT_SYMBOL(FM_PCD_MatchTableModifyMissNextEngine);
90385 +EXPORT_SYMBOL(FM_PCD_MatchTableRemoveKey);
90386 +EXPORT_SYMBOL(FM_PCD_MatchTableFindNRemoveKey);
90387 +EXPORT_SYMBOL(FM_PCD_MatchTableAddKey);
90388 +EXPORT_SYMBOL(FM_PCD_MatchTableModifyKeyAndNextEngine);
90389 +EXPORT_SYMBOL(FM_PCD_MatchTableFindNModifyKeyAndNextEngine);
90390 +EXPORT_SYMBOL(FM_PCD_MatchTableModifyKey);
90391 +EXPORT_SYMBOL(FM_PCD_MatchTableFindNModifyKey);
90392 +EXPORT_SYMBOL(FM_PCD_MatchTableGetIndexedHashBucket);
90393 +EXPORT_SYMBOL(FM_PCD_MatchTableGetNextEngine);
90394 +EXPORT_SYMBOL(FM_PCD_MatchTableGetKeyCounter);
90395 +EXPORT_SYMBOL(FM_PCD_MatchTableGetKeyStatistics);
90396 +EXPORT_SYMBOL(FM_PCD_MatchTableFindNGetKeyStatistics);
90397 +EXPORT_SYMBOL(FM_PCD_MatchTableGetMissStatistics);
90398 +EXPORT_SYMBOL(FM_PCD_HashTableGetMissStatistics);
90399 +EXPORT_SYMBOL(FM_PCD_HashTableSet);
90400 +EXPORT_SYMBOL(FM_PCD_HashTableDelete);
90401 +EXPORT_SYMBOL(FM_PCD_HashTableAddKey);
90402 +EXPORT_SYMBOL(FM_PCD_HashTableRemoveKey);
90403 +EXPORT_SYMBOL(FM_PCD_HashTableModifyNextEngine);
90404 +EXPORT_SYMBOL(FM_PCD_HashTableModifyMissNextEngine);
90405 +EXPORT_SYMBOL(FM_PCD_HashTableGetMissNextEngine);
90406 +EXPORT_SYMBOL(FM_PCD_HashTableFindNGetKeyStatistics);
90407 +EXPORT_SYMBOL(FM_PCD_PlcrProfileSet);
90408 +EXPORT_SYMBOL(FM_PCD_PlcrProfileDelete);
90409 +EXPORT_SYMBOL(FM_PCD_PlcrProfileGetCounter);
90410 +EXPORT_SYMBOL(FM_PCD_PlcrProfileSetCounter);
90411 +EXPORT_SYMBOL(FM_PCD_ManipNodeSet);
90412 +EXPORT_SYMBOL(FM_PCD_ManipNodeDelete);
90413 +EXPORT_SYMBOL(FM_PCD_ManipGetStatistics);
90414 +EXPORT_SYMBOL(FM_PCD_ManipNodeReplace);
90415 +#if (DPAA_VERSION >= 11)
90416 +EXPORT_SYMBOL(FM_PCD_FrmReplicSetGroup);
90417 +EXPORT_SYMBOL(FM_PCD_FrmReplicDeleteGroup);
90418 +EXPORT_SYMBOL(FM_PCD_FrmReplicAddMember);
90419 +EXPORT_SYMBOL(FM_PCD_FrmReplicRemoveMember);
90420 +#endif /* DPAA_VERSION >= 11 */
90421 +
90422 +#ifdef FM_CAPWAP_SUPPORT
90423 +EXPORT_SYMBOL(FM_PCD_StatisticsSetNode);
90424 +#endif /* FM_CAPWAP_SUPPORT */
90425 +
90426 +EXPORT_SYMBOL(FM_PCD_SetAdvancedOffloadSupport);
90427 +
90428 +/* FMAN MAC exported routines */
90429 +EXPORT_SYMBOL(FM_MAC_GetStatistics);
90430 +
90431 +EXPORT_SYMBOL(FM_GetSpecialOperationCoding);
90432 +
90433 +#endif /* __LNXWRP_EXP_SYM_H */
90434 --- /dev/null
90435 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h
90436 @@ -0,0 +1,163 @@
90437 +/*
90438 + * Copyright 2008-2012 Freescale Semiconductor Inc.
90439 + *
90440 + * Redistribution and use in source and binary forms, with or without
90441 + * modification, are permitted provided that the following conditions are met:
90442 + *     * Redistributions of source code must retain the above copyright
90443 + *       notice, this list of conditions and the following disclaimer.
90444 + *     * Redistributions in binary form must reproduce the above copyright
90445 + *       notice, this list of conditions and the following disclaimer in the
90446 + *       documentation and/or other materials provided with the distribution.
90447 + *     * Neither the name of Freescale Semiconductor nor the
90448 + *       names of its contributors may be used to endorse or promote products
90449 + *       derived from this software without specific prior written permission.
90450 + *
90451 + *
90452 + * ALTERNATIVELY, this software may be distributed under the terms of the
90453 + * GNU General Public License ("GPL") as published by the Free Software
90454 + * Foundation, either version 2 of that License or (at your option) any
90455 + * later version.
90456 + *
90457 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
90458 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
90459 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
90460 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
90461 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90462 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
90463 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
90464 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
90465 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
90466 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
90467 + */
90468 +
90469 +/******************************************************************************
90470 + @File          lnxwrp_fm_ext.h
90471 +
90472 + @Description   TODO
90473 +*//***************************************************************************/
90474 +
90475 +#ifndef __LNXWRP_FM_EXT_H
90476 +#define __LNXWRP_FM_EXT_H
90477 +
90478 +#include "std_ext.h"
90479 +#include "sys_ext.h"
90480 +#include "fm_ext.h"
90481 +#include "fm_muram_ext.h"
90482 +#include "fm_pcd_ext.h"
90483 +#include "fm_port_ext.h"
90484 +#include "fm_mac_ext.h"
90485 +#include "fm_rtc_ext.h"
90486 +
90487 +
90488 +/**************************************************************************//**
90489 + @Group         FM_LnxKern_grp Frame Manager Linux wrapper API
90490 +
90491 + @Description   FM API functions, definitions and enums.
90492 +
90493 + @{
90494 +*//***************************************************************************/
90495 +
90496 +/**************************************************************************//**
90497 + @Group         FM_LnxKern_init_grp Initialization Unit
90498 +
90499 + @Description   Initialization Unit
90500 +
90501 +                Initialization Flow:
90502 +                Initialization of the FM Module will be carried out by the Linux
90503 +                kernel according to the following sequence:
90504 +                a. Calling the initialization routine with no parameters.
90505 +                b. The driver will register to the Device-Tree.
90506 +                c. The Linux Device-Tree will initiate a call to the driver for
90507 +                   initialization.
90508 +                d. The driver will read the appropriate information from the Device-Tree
90509 +                e. [Optional] Calling the advance initialization routines to change
90510 +                   driver's defaults.
90511 +                f. Initialization of the device will be automatically upon using it.
90512 +
90513 + @{
90514 +*//***************************************************************************/
90515 +
90516 +typedef struct t_WrpFmDevSettings
90517 +{
90518 +    t_FmParams                  param;
90519 +    t_SysObjectAdvConfigEntry   *advConfig;
90520 +} t_WrpFmDevSettings;
90521 +
90522 +typedef struct t_WrpFmPcdDevSettings
90523 +{
90524 +    t_FmPcdParams               param;
90525 +    t_SysObjectAdvConfigEntry   *advConfig;
90526 +} t_WrpFmPcdDevSettings;
90527 +
90528 +typedef struct t_WrpFmPortDevSettings
90529 +{
90530 +    bool                        frag_enabled;
90531 +    t_FmPortParams              param;
90532 +    t_SysObjectAdvConfigEntry   *advConfig;
90533 +} t_WrpFmPortDevSettings;
90534 +
90535 +typedef struct t_WrpFmMacDevSettings
90536 +{
90537 +    t_FmMacParams               param;
90538 +    t_SysObjectAdvConfigEntry   *advConfig;
90539 +} t_WrpFmMacDevSettings;
90540 +
90541 +
90542 +/**************************************************************************//**
90543 + @Function      LNXWRP_FM_Init
90544 +
90545 + @Description   Initialize the FM linux wrapper.
90546 +
90547 + @Return        A handle (descriptor) of the newly created FM Linux wrapper
90548 +                structure.
90549 +*//***************************************************************************/
90550 +t_Handle LNXWRP_FM_Init(void);
90551 +
90552 +/**************************************************************************//**
90553 + @Function      LNXWRP_FM_Free
90554 +
90555 + @Description   Free the FM linux wrapper.
90556 +
90557 + @Param[in]     h_LnxWrpFm   - A handle to the FM linux wrapper.
90558 +
90559 + @Return        E_OK on success; Error code otherwise.
90560 +*//***************************************************************************/
90561 +t_Error  LNXWRP_FM_Free(t_Handle h_LnxWrpFm);
90562 +
90563 +/**************************************************************************//**
90564 + @Function      LNXWRP_FM_GetMacHandle
90565 +
90566 + @Description   Get the FM-MAC LLD handle from the FM linux wrapper.
90567 +
90568 + @Param[in]     h_LnxWrpFm   - A handle to the FM linux wrapper.
90569 + @Param[in]     fmId         - Index of the FM device to get the MAC handle from.
90570 + @Param[in]     macId        - Index of the mac handle.
90571 +
90572 + @Return        A handle of the LLD compressor.
90573 +*//***************************************************************************/
90574 +t_Handle LNXWRP_FM_GetMacHandle(t_Handle h_LnxWrpFm, uint8_t fmId, uint8_t macId);
90575 +
90576 +#ifdef CONFIG_FSL_SDK_FMAN_TEST
90577 +t_Handle LNXWRP_FM_TEST_Init(void);
90578 +t_Error  LNXWRP_FM_TEST_Free(t_Handle h_FmTestLnxWrp);
90579 +#endif /* CONFIG_FSL_SDK_FMAN_TEST */
90580 +
90581 +/** @} */ /* end of FM_LnxKern_init_grp group */
90582 +
90583 +
90584 +/**************************************************************************//**
90585 + @Group         FM_LnxKern_ctrl_grp Control Unit
90586 +
90587 + @Description   Control Unit
90588 +
90589 +                TODO
90590 + @{
90591 +*//***************************************************************************/
90592 +
90593 +#include "lnxwrp_fsl_fman.h"
90594 +
90595 +/** @} */ /* end of FM_LnxKern_ctrl_grp group */
90596 +/** @} */ /* end of FM_LnxKern_grp group */
90597 +
90598 +
90599 +#endif /* __LNXWRP_FM_EXT_H */
90600 --- /dev/null
90601 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h
90602 @@ -0,0 +1,921 @@
90603 +/*
90604 + * Copyright 2008-2012 Freescale Semiconductor Inc.
90605 + *
90606 + * Redistribution and use in source and binary forms, with or without
90607 + * modification, are permitted provided that the following conditions are met:
90608 + *     * Redistributions of source code must retain the above copyright
90609 + *       notice, this list of conditions and the following disclaimer.
90610 + *     * Redistributions in binary form must reproduce the above copyright
90611 + *       notice, this list of conditions and the following disclaimer in the
90612 + *       documentation and/or other materials provided with the distribution.
90613 + *     * Neither the name of Freescale Semiconductor nor the
90614 + *       names of its contributors may be used to endorse or promote products
90615 + *       derived from this software without specific prior written permission.
90616 + *
90617 + *
90618 + * ALTERNATIVELY, this software may be distributed under the terms of the
90619 + * GNU General Public License ("GPL") as published by the Free Software
90620 + * Foundation, either version 2 of that License or (at your option) any
90621 + * later version.
90622 + *
90623 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
90624 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
90625 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
90626 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
90627 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90628 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
90629 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
90630 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
90631 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
90632 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
90633 + */
90634 +
90635 +/******************************************************************************
90636 + @File         lnxwrp_fsl_fman.h
90637 +
90638 + @Description  Linux internal kernel API
90639 +*//***************************************************************************/
90640 +
90641 +#ifndef __LNXWRP_FSL_FMAN_H
90642 +#define __LNXWRP_FSL_FMAN_H
90643 +
90644 +#include <linux/types.h>
90645 +#include <linux/device.h>   /* struct device */
90646 +#include <linux/fsl_qman.h> /* struct qman_fq */
90647 +#include "dpaa_integration_ext.h"
90648 +#include "fm_port_ext.h"
90649 +#include "fm_mac_ext.h"
90650 +#include "fm_macsec_ext.h"
90651 +#include "fm_rtc_ext.h"
90652 +
90653 +/**************************************************************************//**
90654 + @Group                FM_LnxKern_grp Frame Manager Linux wrapper API
90655 +
90656 + @Description  FM API functions, definitions and enums.
90657 +
90658 + @{
90659 +*//***************************************************************************/
90660 +
90661 +/**************************************************************************//**
90662 + @Group                FM_LnxKern_ctrl_grp Control Unit
90663 +
90664 + @Description  Control Unit
90665 +
90666 +               Internal Kernel Control Unit API
90667 + @{
90668 +*//***************************************************************************/
90669 +
90670 +/*****************************************************************************/
90671 +/*                  Internal Linux kernel routines                           */
90672 +/*****************************************************************************/
90673 +
90674 +/**************************************************************************//**
90675 + @Description   MACSEC Exceptions wrapper
90676 +*//***************************************************************************/
90677 +typedef enum fm_macsec_exception {
90678 +       SINGLE_BIT_ECC = e_FM_MACSEC_EX_SINGLE_BIT_ECC,
90679 +       MULTI_BIT_ECC = e_FM_MACSEC_EX_MULTI_BIT_ECC
90680 +} fm_macsec_exception;
90681 +
90682 +/**************************************************************************//**
90683 + @Description   Unknown sci frame treatment wrapper
90684 +*//***************************************************************************/
90685 +typedef enum fm_macsec_unknown_sci_frame_treatment {
90686 +       SCI_DISCARD_BOTH = e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH,
90687 +       SCI_DISCARD_UNCTRL_DELIVER_DISCARD_CTRL = \
90688 +               e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED,
90689 +       SCI_DELIVER_UNCTRL_DISCARD_CTRL = \
90690 +               e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED,
90691 +       SCI_DELIVER_DISCARD_UNCTRL_DELIVER_DISCARD_CTRL = \
90692 +               e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_OR_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED
90693 +} fm_macsec_unknown_sci_frame_treatment;
90694 +
90695 +/**************************************************************************//**
90696 + @Description   Untag frame treatment wrapper
90697 +*//***************************************************************************/
90698 +typedef enum fm_macsec_untag_frame_treatment {
90699 +       UNTAG_DELIVER_UNCTRL_DISCARD_CTRL = \
90700 +               e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED,
90701 +       UNTAG_DISCARD_BOTH = e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_BOTH,
90702 +       UNTAG_DISCARD_UNCTRL_DELIVER_CTRL_UNMODIFIED = \
90703 +               e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_CONTROLLED_UNMODIFIED
90704 +} fm_macsec_untag_frame_treatment;
90705 +
90706 +/**************************************************************************//**
90707 +@Description   MACSEC SECY Cipher Suite wrapper
90708 +*//***************************************************************************/
90709 +typedef enum fm_macsec_secy_cipher_suite {
90710 +       SECY_GCM_AES_128 = e_FM_MACSEC_SECY_GCM_AES_128,    /**< GCM-AES-128 */
90711 +#if (DPAA_VERSION >= 11)
90712 +       SECY_GCM_AES_256 = e_FM_MACSEC_SECY_GCM_AES_256     /**< GCM-AES-256 */
90713 +#endif /* (DPAA_VERSION >= 11) */
90714 +} fm_macsec_secy_cipher_suite;
90715 +
90716 +/**************************************************************************//**
90717 + @Description   MACSEC SECY Exceptions wrapper
90718 +*//***************************************************************************/
90719 +typedef enum fm_macsec_secy_exception {
90720 +       SECY_EX_FRAME_DISCARDED = e_FM_MACSEC_SECY_EX_FRAME_DISCARDED
90721 +} fm_macsec_secy_exception;
90722 +
90723 +/**************************************************************************//**
90724 + @Description   MACSEC SECY Events wrapper
90725 +*//***************************************************************************/
90726 +typedef enum fm_macsec_secy_event {
90727 +       SECY_EV_NEXT_PN = e_FM_MACSEC_SECY_EV_NEXT_PN
90728 +} fm_macsec_secy_event;
90729 +
90730 +/**************************************************************************//**
90731 + @Description   Valid frame behaviors wrapper
90732 +*//***************************************************************************/
90733 +typedef enum fm_macsec_valid_frame_behavior {
90734 +       VALID_FRAME_BEHAVIOR_DISABLE = e_FM_MACSEC_VALID_FRAME_BEHAVIOR_DISABLE,
90735 +       VALID_FRAME_BEHAVIOR_CHECK = e_FM_MACSEC_VALID_FRAME_BEHAVIOR_CHECK,
90736 +       VALID_FRAME_BEHAVIOR_STRICT = e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT
90737 +} fm_macsec_valid_frame_behavior;
90738 +
90739 +/**************************************************************************//**
90740 + @Description   SCI insertion modes wrapper
90741 +*//***************************************************************************/
90742 +typedef enum fm_macsec_sci_insertion_mode {
90743 +       SCI_INSERTION_MODE_EXPLICIT_SECTAG = \
90744 +               e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG,
90745 +       SCI_INSERTION_MODE_EXPLICIT_MAC_SA = \
90746 +               e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA,
90747 +       SCI_INSERTION_MODE_IMPLICT_PTP = e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP
90748 +} fm_macsec_sci_insertion_mode;
90749 +
90750 +typedef macsecSAKey_t macsec_sa_key_t;
90751 +typedef macsecSCI_t macsec_sci_t;
90752 +typedef macsecAN_t macsec_an_t;
90753 +typedef t_Handle handle_t;
90754 +
90755 +/**************************************************************************//**
90756 + @Function      fm_macsec_secy_exception_callback wrapper
90757 + @Description   Exceptions user callback routine, will be called upon an
90758 +                exception passing the exception identification.
90759 + @Param[in]     app_h       A handle to an application layer object; This handle
90760 +                            will be passed by the driver upon calling this callback.
90761 + @Param[in]     exception   The exception.
90762 +*//***************************************************************************/
90763 +typedef void (fm_macsec_secy_exception_callback) (handle_t app_h,
90764 +                               fm_macsec_secy_exception exception);
90765 +
90766 +/**************************************************************************//**
90767 + @Function      fm_macsec_secy_event_callback wrapper
90768 + @Description   Events user callback routine, will be called upon an
90769 +                event passing the event identification.
90770 + @Param[in]     app_h       A handle to an application layer object; This handle
90771 +                            will be passed by the driver upon calling this callback.
90772 + @Param[in]     event       The event.
90773 +*//***************************************************************************/
90774 +typedef void (fm_macsec_secy_event_callback) (handle_t app_h,
90775 +                               fm_macsec_secy_event event);
90776 +
90777 +/**************************************************************************//**
90778 + @Function      fm_macsec_exception_callback wrapper
90779 + @Description   Exceptions user callback routine, will be called upon an
90780 +                exception passing the exception identification.
90781 + @Param[in]     app_h       A handle to an application layer object; This handle
90782 +                            will be passed by the driver upon calling this callback.
90783 + @Param[in]     exception   The exception.
90784 +*//***************************************************************************/
90785 +typedef void (fm_macsec_exception_callback) (handle_t app_h,
90786 +                               fm_macsec_exception exception);
90787 +
90788 +/**************************************************************************//**
90789 + @Description   MACSEC SecY SC Params wrapper
90790 +*//***************************************************************************/
90791 +struct fm_macsec_secy_sc_params {
90792 +       macsec_sci_t sci;
90793 +       fm_macsec_secy_cipher_suite cipher_suite;
90794 +};
90795 +
90796 +/**************************************************************************//**
90797 + @Description   FM MACSEC SecY config input wrapper
90798 +*//***************************************************************************/
90799 +struct fm_macsec_secy_params {
90800 +       handle_t fm_macsec_h;
90801 +       struct fm_macsec_secy_sc_params tx_sc_params;
90802 +       uint32_t num_receive_channels;
90803 +       fm_macsec_secy_exception_callback *exception_f;
90804 +       fm_macsec_secy_event_callback *event_f;
90805 +       handle_t app_h;
90806 +};
90807 +
90808 +/**************************************************************************//**
90809 + @Description   FM MACSEC config input wrapper
90810 +*//***************************************************************************/
90811 +struct fm_macsec_params {
90812 +       handle_t fm_h;
90813 +       bool guest_mode;
90814 +
90815 +       union {
90816 +               struct {
90817 +                       uint8_t fm_mac_id;
90818 +               } guest_params;
90819 +
90820 +               struct {
90821 +                       uintptr_t base_addr;
90822 +                       handle_t fm_mac_h;
90823 +                       fm_macsec_exception_callback *exception_f;
90824 +                       handle_t app_h;
90825 +               } non_guest_params;
90826 +       };
90827 +
90828 +};
90829 +
90830 +/**************************************************************************//**
90831 + @Description  FM device opaque structure used for type checking
90832 +*//***************************************************************************/
90833 +struct fm;
90834 +
90835 +/**************************************************************************//**
90836 + @Description  FM MAC device opaque structure used for type checking
90837 +*//***************************************************************************/
90838 +struct fm_mac_dev;
90839 +
90840 +/**************************************************************************//**
90841 + @Description  FM MACSEC device opaque structure used for type checking
90842 +*//***************************************************************************/
90843 +struct fm_macsec_dev;
90844 +struct fm_macsec_secy_dev;
90845 +
90846 +/**************************************************************************//**
90847 + @Description  A structure ..,
90848 +*//***************************************************************************/
90849 +struct fm_port;
90850 +
90851 +typedef int (*alloc_pcd_fqids)(struct device *dev, uint32_t num,
90852 +                              uint8_t alignment, uint32_t *base_fqid);
90853 +
90854 +typedef int (*free_pcd_fqids)(struct device *dev, uint32_t base_fqid);
90855 +
90856 +struct fm_port_pcd_param {
90857 +       alloc_pcd_fqids  cba;
90858 +       free_pcd_fqids   cbf;
90859 +       struct device   *dev;
90860 +};
90861 +
90862 +/**************************************************************************//**
90863 + @Description  A structure of information about each of the external
90864 +               buffer pools used by the port,
90865 +*//***************************************************************************/
90866 +struct fm_port_pool_param {
90867 +       uint8_t         id;             /**< External buffer pool id */
90868 +       uint16_t        size;           /**< External buffer pool buffer size */
90869 +};
90870 +
90871 +/**************************************************************************//**
90872 + @Description   structure for additional port parameters
90873 +*//***************************************************************************/
90874 +struct fm_port_params {
90875 +       uint32_t errq;      /**< Error Queue Id. */
90876 +       uint32_t defq;      /**< For Tx and HC - Default Confirmation queue,
90877 +                                0 means no Tx conf for processed frames.
90878 +                                For Rx and OP - default Rx queue. */
90879 +       uint8_t num_pools;  /**< Number of pools use by this port */
90880 +       struct fm_port_pool_param pool_param[FM_PORT_MAX_NUM_OF_EXT_POOLS];
90881 +                           /**< Parameters for each pool */
90882 +       uint16_t priv_data_size;  /**< Area that user may save for his own
90883 +                                      need (E.g. save the SKB) */
90884 +       bool parse_results; /**< Put the parser-results in the Rx/Tx buffer */
90885 +       bool hash_results;  /**< Put the hash-results in the Rx/Tx buffer */
90886 +       bool time_stamp;    /**< Put the time-stamp in the Rx/Tx buffer */
90887 +       bool frag_enable;   /**< Fragmentation support, for OP only */
90888 +       uint16_t data_align;  /**< value for selecting a data alignment (must be a power of 2);
90889 +                               if write optimization is used, must be >= 16. */
90890 +       uint8_t manip_extra_space;  /**< Maximum extra size needed (insertion-size minus removal-size);
90891 +                                     Note that this field impacts the size of the buffer-prefix
90892 +                                     (i.e. it pushes the data offset); */
90893 +};
90894 +
90895 +/**************************************************************************//**
90896 + @Function     fm_bind
90897 +
90898 + @Description  Bind to a specific FM device.
90899 +
90900 + @Param[in]    fm_dev  - the OF handle of the FM device.
90901 +
90902 + @Return       A handle of the FM device.
90903 +
90904 + @Cautions     Allowed only after the port was created.
90905 +*//***************************************************************************/
90906 +struct fm *fm_bind(struct device *fm_dev);
90907 +
90908 +/**************************************************************************//**
90909 + @Function     fm_unbind
90910 +
90911 + @Description  Un-bind from a specific FM device.
90912 +
90913 + @Param[in]    fm      - A handle of the FM device.
90914 +
90915 + @Cautions     Allowed only after the port was created.
90916 +*//***************************************************************************/
90917 +void fm_unbind(struct fm *fm);
90918 +
90919 +void *fm_get_handle(struct fm *fm);
90920 +void *fm_get_rtc_handle(struct fm *fm);
90921 +struct resource *fm_get_mem_region(struct fm *fm);
90922 +
90923 +/**************************************************************************//**
90924 + @Function     fm_port_bind
90925 +
90926 + @Description  Bind to a specific FM-port device (may be Rx or Tx port).
90927 +
90928 + @Param[in]    fm_port_dev - the OF handle of the FM port device.
90929 +
90930 + @Return       A handle of the FM port device.
90931 +
90932 + @Cautions     Allowed only after the port was created.
90933 +*//***************************************************************************/
90934 +struct fm_port *fm_port_bind(struct device *fm_port_dev);
90935 +
90936 +/**************************************************************************//**
90937 + @Function     fm_port_unbind
90938 +
90939 + @Description  Un-bind from a specific FM-port device (may be Rx or Tx port).
90940 +
90941 + @Param[in]    port    - A handle of the FM port device.
90942 +
90943 + @Cautions     Allowed only after the port was created.
90944 +*//***************************************************************************/
90945 +void fm_port_unbind(struct fm_port *port);
90946 +
90947 +/**************************************************************************//**
90948 + @Function     fm_set_rx_port_params
90949 +
90950 + @Description  Configure parameters for a specific Rx FM-port device.
90951 +
90952 + @Param[in]    port    - A handle of the FM port device.
90953 + @Param[in]    params  - Rx port parameters
90954 +
90955 + @Cautions     Allowed only after the port is binded.
90956 +*//***************************************************************************/
90957 +void fm_set_rx_port_params(struct fm_port *port,
90958 +                          struct fm_port_params *params);
90959 +
90960 +/**************************************************************************//**
90961 + @Function     fm_port_pcd_bind
90962 +
90963 + @Description  Bind as a listener on a port PCD.
90964 +
90965 + @Param[in]    port    - A handle of the FM port device.
90966 + @Param[in]    params  - PCD port parameters
90967 +
90968 + @Cautions     Allowed only after the port is binded.
90969 +*//***************************************************************************/
90970 +void fm_port_pcd_bind (struct fm_port *port, struct fm_port_pcd_param *params);
90971 +
90972 +/**************************************************************************//**
90973 + @Function     fm_port_get_buff_layout_ext_params
90974 +
90975 + @Description  Get data_align and manip_extra_space from the device tree
90976 +                chosen node if applied.
90977 +                This function will only update these two parameters.
90978 +                When this port has no such parameters in the device tree
90979 +                values will be set to 0.
90980 +
90981 + @Param[in]    port    - A handle of the FM port device.
90982 + @Param[in]    params  - PCD port parameters
90983 +
90984 + @Cautions     Allowed only after the port is binded.
90985 +*//***************************************************************************/
90986 +void fm_port_get_buff_layout_ext_params(struct fm_port *port, struct fm_port_params *params);
90987 +
90988 +/**************************************************************************//**
90989 + @Function     fm_get_tx_port_channel
90990 +
90991 + @Description  Get qman-channel number for this Tx port.
90992 +
90993 + @Param[in]    port    - A handle of the FM port device.
90994 +
90995 + @Return       qman-channel number for this Tx port.
90996 +
90997 + @Cautions     Allowed only after the port is binded.
90998 +*//***************************************************************************/
90999 +uint16_t fm_get_tx_port_channel(struct fm_port *port);
91000 +
91001 +/**************************************************************************//**
91002 + @Function     fm_set_tx_port_params
91003 +
91004 + @Description  Configure parameters for a specific Tx FM-port device
91005 +
91006 + @Param[in]    port    - A handle of the FM port device.
91007 + @Param[in]    params  - Tx port parameters
91008 +
91009 + @Cautions     Allowed only after the port is binded.
91010 +*//***************************************************************************/
91011 +void fm_set_tx_port_params(struct fm_port *port, struct fm_port_params *params);
91012 +
91013 +
91014 +/**************************************************************************//**
91015 + @Function     fm_mac_set_handle
91016 +
91017 + @Description  Set mac handle
91018 +
91019 + @Param[in]    h_lnx_wrp_fm_dev - A handle of the LnxWrp FM device.
91020 + @Param[in]    h_fm_mac         - A handle of the LnxWrp FM MAC device.
91021 + @Param[in]    mac_id           - MAC id.
91022 +*//***************************************************************************/
91023 +void fm_mac_set_handle(t_Handle h_lnx_wrp_fm_dev, t_Handle h_fm_mac,
91024 +                      int mac_id);
91025 +
91026 +/**************************************************************************//**
91027 + @Function     fm_port_enable
91028 +
91029 + @Description  Enable specific FM-port device (may be Rx or Tx port).
91030 +
91031 + @Param[in]    port    - A handle of the FM port device.
91032 +
91033 + @Cautions     Allowed only after the port is initialized.
91034 +*//***************************************************************************/
91035 +int fm_port_enable(struct fm_port *port);
91036 +
91037 +/**************************************************************************//**
91038 + @Function     fm_port_disable
91039 +
91040 + @Description  Disable specific FM-port device (may be Rx or Tx port).
91041 +
91042 + @Param[in]    port    - A handle of the FM port device.
91043 +
91044 + @Cautions     Allowed only after the port is initialized.
91045 +*//***************************************************************************/
91046 +int fm_port_disable(struct fm_port *port);
91047 +
91048 +void *fm_port_get_handle(const struct fm_port *port);
91049 +
91050 +u64 *fm_port_get_buffer_time_stamp(const struct fm_port *port,
91051 +               const void *data);
91052 +
91053 +/**************************************************************************//**
91054 + @Function     fm_port_get_base_address
91055 +
91056 + @Description  Get base address of this port. Useful for accessing
91057 +               port-specific registers (i.e., not common ones).
91058 +
91059 + @Param[in]    port            - A handle of the FM port device.
91060 +
91061 + @Param[out]   base_addr       - The port's base addr (virtual address).
91062 +*//***************************************************************************/
91063 +void fm_port_get_base_addr(const struct fm_port *port, uint64_t *base_addr);
91064 +
91065 +/**************************************************************************//**
91066 + @Function     fm_mutex_lock
91067 +
91068 + @Description   Lock function required before any FMD/LLD call.
91069 +*//***************************************************************************/
91070 +void fm_mutex_lock(void);
91071 +
91072 +/**************************************************************************//**
91073 + @Function     fm_mutex_unlock
91074 +
91075 + @Description   Unlock function required after any FMD/LLD call.
91076 +*//***************************************************************************/
91077 +void fm_mutex_unlock(void);
91078 +
91079 +/**************************************************************************//**
91080 + @Function     fm_get_max_frm
91081 +
91082 + @Description   Get the maximum frame size
91083 +*//***************************************************************************/
91084 +int fm_get_max_frm(void);
91085 +
91086 +/**************************************************************************//**
91087 + @Function     fm_get_rx_extra_headroom
91088 +
91089 + @Description   Get the extra headroom size
91090 +*//***************************************************************************/
91091 +int fm_get_rx_extra_headroom(void);
91092 +
91093 +/**************************************************************************//**
91094 +@Function     fm_port_set_rate_limit
91095 +
91096 +@Description  Configure Shaper parameter on FM-port device (Tx port).
91097 +
91098 +@Param[in]    port   - A handle of the FM port device.
91099 +@Param[in]    max_burst_size - Value of maximum burst size allowed.
91100 +@Param[in]    rate_limit     - The required rate value.
91101 +
91102 +@Cautions     Allowed only after the port is initialized.
91103 +*//***************************************************************************/
91104 +int fm_port_set_rate_limit(struct fm_port *port,
91105 +                           uint16_t max_burst_size,
91106 +                           uint32_t rate_limit);
91107 +/**************************************************************************//**
91108 +@Function     fm_port_set_rate_limit
91109 +
91110 +@Description  Delete Shaper configuration on FM-port device (Tx port).
91111 +
91112 +@Param[in]    port   - A handle of the FM port device.
91113 +
91114 +@Cautions     Allowed only after the port is initialized.
91115 +*//***************************************************************************/
91116 +int fm_port_del_rate_limit(struct fm_port *port);
91117 +
91118 +struct   auto_res_tables_sizes
91119 +{
91120 +       uint16_t   max_num_of_arp_entries;
91121 +       uint16_t   max_num_of_echo_ipv4_entries;
91122 +       uint16_t   max_num_of_ndp_entries;
91123 +       uint16_t   max_num_of_echo_ipv6_entries;
91124 +       uint16_t   max_num_of_snmp_ipv4_entries;
91125 +       uint16_t   max_num_of_snmp_ipv6_entries;
91126 +       uint16_t   max_num_of_snmp_oid_entries;
91127 +       uint16_t   max_num_of_snmp_char; /* total amount of character needed
91128 +               for the snmp table */
91129 +       uint16_t   max_num_of_ip_prot_filtering;
91130 +       uint16_t   max_num_of_tcp_port_filtering;
91131 +       uint16_t   max_num_of_udp_port_filtering;
91132 +};
91133 +/* ARP */
91134 +struct   auto_res_arp_entry
91135 +{
91136 +       uint32_t  ip_address;
91137 +       uint8_t   mac[6];
91138 +       bool      is_vlan;
91139 +       uint16_t  vid;
91140 +};
91141 +struct   auto_res_arp_info
91142 +{
91143 +       uint8_t                     table_size;
91144 +       struct auto_res_arp_entry   *auto_res_table;
91145 +       bool                        enable_conflict_detection; /* when TRUE
91146 +               Conflict Detection will be checked and wake the host if
91147 +               needed */
91148 +};
91149 +
91150 +/* NDP */
91151 +struct   auto_res_ndp_entry
91152 +{
91153 +       uint32_t  ip_address[4];
91154 +       uint8_t   mac[6];
91155 +       bool      is_vlan;
91156 +       uint16_t  vid;
91157 +};
91158 +struct   auto_res_ndp_info
91159 +{
91160 +       uint32_t                    multicast_group;
91161 +       uint8_t                     table_size_assigned;
91162 +       struct auto_res_ndp_entry   *auto_res_table_assigned; /* This list
91163 +               refer to solicitation IP addresses. Note that all IP adresses
91164 +               must be from the same multicast group. This will be checked and
91165 +               if not operation will fail. */
91166 +       uint8_t                     table_size_tmp;
91167 +       struct auto_res_ndp_entry   *auto_res_table_tmp;      /* This list
91168 +               refer to temp IP addresses. Note that all temp IP adresses must
91169 +               be from the same multicast group. This will be checked and if
91170 +               not operation will fail. */
91171 +
91172 +       bool                        enable_conflict_detection; /* when TRUE
91173 +               Conflict Detection will be checked and wake the host if
91174 +               needed */
91175 +};
91176 +
91177 +/* ICMP ECHO */
91178 +struct   auto_res_echo_ipv4_info
91179 +{
91180 +       uint8_t                     table_size;
91181 +       struct auto_res_arp_entry  *auto_res_table;
91182 +};
91183 +
91184 +struct   auto_res_echo_ipv6_info
91185 +{
91186 +       uint8_t                     table_size;
91187 +       struct auto_res_ndp_entry  *auto_res_table;
91188 +};
91189 +
91190 +/* SNMP */
91191 +struct   auto_res_snmp_entry
91192 +{
91193 +       uint16_t     oidSize;
91194 +       uint8_t      *oidVal; /* only the oid string */
91195 +       uint16_t     resSize;
91196 +       uint8_t      *resVal; /* resVal will be the entire reply,
91197 +                               i.e. "Type|Length|Value" */
91198 +};
91199 +
91200 +/**************************************************************************//**
91201 + @Description   Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry
91202 +                Refer to the FMan Controller spec for more details.
91203 +*//***************************************************************************/
91204 +struct auto_res_snmp_ipv4addr_tbl_entry
91205 +{
91206 +       uint32_t ipv4addr; /*!< 32 bit IPv4 Address. */
91207 +       bool      is_vlan;
91208 +       uint16_t vid;   /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
91209 +                       /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
91210 +};
91211 +
91212 +/**************************************************************************//**
91213 + @Description   Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry
91214 +                Refer to the FMan Controller spec for more details.
91215 +*//***************************************************************************/
91216 +struct auto_res_snmp_ipv6addr_tbl_entry
91217 +{
91218 +       uint32_t ipv6Addr[4];  /*!< 4 * 32 bit IPv6 Address.                                                     */
91219 +       bool      isVlan;
91220 +       uint16_t vid;       /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared                      */
91221 +                       /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
91222 +};
91223 +
91224 +struct   auto_res_snmp_info
91225 +{
91226 +       uint16_t control;                          /**< Control bits [0-15]. */
91227 +       uint16_t max_snmp_msg_length;              /**< Maximal allowed SNMP message length. */
91228 +       uint16_t num_ipv4_addresses;               /**< Number of entries in IPv4 addresses table. */
91229 +       uint16_t num_ipv6_addresses;               /**< Number of entries in IPv6 addresses table. */
91230 +       struct auto_res_snmp_ipv4addr_tbl_entry *ipv4addr_tbl; /**< Pointer to IPv4 addresses table. */
91231 +       struct auto_res_snmp_ipv6addr_tbl_entry *ipv6addr_tbl; /**< Pointer to IPv6 addresses table. */
91232 +       char                        *community_read_write_string;
91233 +       char                        *community_read_only_string;
91234 +       struct auto_res_snmp_entry  *oid_table;
91235 +       uint32_t                     oid_table_size;
91236 +       uint32_t                    *statistics;
91237 +};
91238 +
91239 +/* Filtering */
91240 +struct   auto_res_port_filtering_entry
91241 +{
91242 +       uint16_t    src_port;
91243 +       uint16_t    dst_port;
91244 +       uint16_t    src_port_mask;
91245 +       uint16_t    dst_port_mask;
91246 +};
91247 +struct   auto_res_filtering_info
91248 +{
91249 +       /* IP protocol filtering parameters */
91250 +       uint8_t     ip_prot_table_size;
91251 +       uint8_t     *ip_prot_table_ptr;
91252 +       bool        ip_prot_pass_on_hit;  /* when TRUE, miss in the table will
91253 +               cause the packet to be droped, hit will pass the packet to
91254 +               UDP/TCP filters if needed and if not to the classification
91255 +               tree. If the classification tree will pass the packet to a
91256 +               queue it will cause a wake interupt. When FALSE it the other
91257 +               way around. */
91258 +       /* UDP port filtering parameters */
91259 +       uint8_t     udp_ports_table_size;
91260 +       struct auto_res_port_filtering_entry *udp_ports_table_ptr;
91261 +       bool        udp_port_pass_on_hit; /* when TRUE, miss in the table will
91262 +               cause the packet to be droped, hit will pass the packet to
91263 +               classification tree. If the classification tree will pass the
91264 +               packet to a queue it will cause a wake interupt. When FALSE it
91265 +               the other way around. */
91266 +    /* TCP port filtering parameters */
91267 +       uint16_t    tcp_flags_mask;
91268 +       uint8_t     tcp_ports_table_size;
91269 +       struct auto_res_port_filtering_entry *tcp_ports_table_ptr;
91270 +       bool        tcp_port_pass_on_hit; /* when TRUE, miss in the table will
91271 +               cause the packet to be droped, hit will pass the packet to
91272 +               classification tree. If the classification tree will pass the
91273 +               packet to a queue it will cause a wake interupt. When FALSE it
91274 +               the other way around. */
91275 +};
91276 +
91277 +struct auto_res_port_params
91278 +{
91279 +       t_Handle                            h_FmPortTx;
91280 +       struct   auto_res_arp_info          *p_auto_res_arp_info;
91281 +       struct   auto_res_echo_ipv4_info    *p_auto_res_echo_ipv4_info;
91282 +       struct   auto_res_ndp_info          *p_auto_res_ndp_info;
91283 +       struct   auto_res_echo_ipv6_info    *p_auto_res_echo_ipv6_info;
91284 +       struct   auto_res_snmp_info         *p_auto_res_snmp_info;
91285 +       struct   auto_res_filtering_info    *p_auto_res_filtering_info;
91286 +};
91287 +
91288 +struct auto_res_port_stats
91289 +{
91290 +    uint32_t arp_ar_cnt;
91291 +    uint32_t echo_icmpv4_ar_cnt;
91292 +    uint32_t ndp_ar_cnt;
91293 +    uint32_t echo_icmpv6_ar_cnt;
91294 +};
91295 +
91296 +int fm_port_config_autores_for_deepsleep_support(struct fm_port *port,
91297 +       struct auto_res_tables_sizes *params);
91298 +
91299 +int fm_port_enter_autores_for_deepsleep(struct fm_port *port,
91300 +       struct auto_res_port_params *params);
91301 +
91302 +void fm_port_exit_auto_res_for_deep_sleep(struct fm_port *port_rx,
91303 +       struct fm_port *port_tx);
91304 +
91305 +bool fm_port_is_in_auto_res_mode(struct fm_port *port);
91306 +
91307 +struct auto_res_tables_sizes *fm_port_get_autores_maxsize(
91308 +       struct fm_port *port);
91309 +
91310 +int fm_port_get_autores_stats(struct fm_port *port, struct auto_res_port_stats
91311 +       *stats);
91312 +
91313 +int fm_port_resume(struct fm_port *port);
91314 +
91315 +int fm_port_suspend(struct fm_port *port);
91316 +
91317 +#ifdef CONFIG_FMAN_PFC
91318 +/**************************************************************************//**
91319 +@Function     fm_port_set_pfc_priorities_mapping_to_qman_wq
91320 +
91321 +@Description  Associate a QMan Work Queue with a PFC priority on this
91322 +               FM-port device (Tx port).
91323 +
91324 +@Param[in]    port   - A handle of the FM port device.
91325 +
91326 +@Param[in]    prio   - The PFC priority.
91327 +
91328 +@Param[in]    wq   - The Work Queue associated with the PFC priority.
91329 +
91330 +@Cautions     Allowed only after the port is initialized.
91331 +*//***************************************************************************/
91332 +int fm_port_set_pfc_priorities_mapping_to_qman_wq(struct fm_port *port,
91333 +               uint8_t prio, uint8_t wq);
91334 +#endif
91335 +
91336 +/**************************************************************************//**
91337 +@Function     fm_mac_set_exception
91338 +
91339 +@Description  Set MAC exception state.
91340 +
91341 +@Param[in]    fm_mac_dev   - A handle of the FM MAC device.
91342 +@Param[in]    exception    - FM MAC exception type.
91343 +@Param[in]    enable       - new state.
91344 +
91345 +*//***************************************************************************/
91346 +int fm_mac_set_exception(struct fm_mac_dev *fm_mac_dev,
91347 +               e_FmMacExceptions exception, bool enable);
91348 +
91349 +int fm_mac_free(struct fm_mac_dev *fm_mac_dev);
91350 +
91351 +struct fm_mac_dev *fm_mac_config(t_FmMacParams *params);
91352 +
91353 +int fm_mac_config_max_frame_length(struct fm_mac_dev *fm_mac_dev,
91354 +               int len);
91355 +
91356 +int fm_mac_config_pad_and_crc(struct fm_mac_dev *fm_mac_dev, bool enable);
91357 +
91358 +int fm_mac_config_half_duplex(struct fm_mac_dev *fm_mac_dev, bool enable);
91359 +
91360 +int fm_mac_config_reset_on_init(struct fm_mac_dev *fm_mac_dev, bool enable);
91361 +
91362 +int fm_mac_init(struct fm_mac_dev *fm_mac_dev);
91363 +
91364 +int fm_mac_get_version(struct fm_mac_dev *fm_mac_dev, uint32_t *version);
91365 +
91366 +int fm_mac_enable(struct fm_mac_dev *fm_mac_dev);
91367 +
91368 +int fm_mac_disable(struct fm_mac_dev *fm_mac_dev);
91369 +
91370 +int fm_mac_resume(struct fm_mac_dev *fm_mac_dev);
91371 +
91372 +int fm_mac_set_promiscuous(struct fm_mac_dev *fm_mac_dev,
91373 +               bool enable);
91374 +
91375 +int fm_mac_remove_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
91376 +               t_EnetAddr *mac_addr);
91377 +
91378 +int fm_mac_add_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
91379 +               t_EnetAddr *mac_addr);
91380 +
91381 +int fm_mac_modify_mac_addr(struct fm_mac_dev *fm_mac_dev,
91382 +                                        uint8_t *addr);
91383 +
91384 +int fm_mac_adjust_link(struct fm_mac_dev *fm_mac_dev,
91385 +               bool link, int speed, bool duplex);
91386 +
91387 +int fm_mac_enable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev);
91388 +
91389 +int fm_mac_disable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev);
91390 +
91391 +int fm_mac_set_rx_pause_frames(
91392 +               struct fm_mac_dev *fm_mac_dev, bool en);
91393 +
91394 +int fm_mac_set_tx_pause_frames(struct fm_mac_dev *fm_mac_dev,
91395 +                                            bool en);
91396 +
91397 +int fm_rtc_enable(struct fm *fm_dev);
91398 +
91399 +int fm_rtc_disable(struct fm *fm_dev);
91400 +
91401 +int fm_rtc_get_cnt(struct fm *fm_dev, uint64_t *ts);
91402 +
91403 +int fm_rtc_set_cnt(struct fm *fm_dev, uint64_t ts);
91404 +
91405 +int fm_rtc_get_drift(struct fm *fm_dev, uint32_t *drift);
91406 +
91407 +int fm_rtc_set_drift(struct fm *fm_dev, uint32_t drift);
91408 +
91409 +int fm_rtc_set_alarm(struct fm *fm_dev, uint32_t id,
91410 +               uint64_t time);
91411 +
91412 +int fm_rtc_set_fiper(struct fm *fm_dev, uint32_t id,
91413 +               uint64_t fiper);
91414 +
91415 +int fm_mac_set_wol(struct fm_port *port, struct fm_mac_dev *fm_mac_dev,
91416 +                       bool en);
91417 +
91418 +/**************************************************************************//**
91419 +@Function     fm_macsec_set_exception
91420 +
91421 +@Description  Set MACSEC exception state.
91422 +
91423 +@Param[in]    fm_macsec_dev   - A handle of the FM MACSEC device.
91424 +@Param[in]    exception    - FM MACSEC exception type.
91425 +@Param[in]    enable       - new state.
91426 +
91427 +*//***************************************************************************/
91428 +
91429 +int fm_macsec_set_exception(struct fm_macsec_dev *fm_macsec_dev,
91430 +                       fm_macsec_exception exception, bool enable);
91431 +int fm_macsec_free(struct fm_macsec_dev *fm_macsec_dev);
91432 +struct fm_macsec_dev *fm_macsec_config(struct fm_macsec_params *fm_params);
91433 +int fm_macsec_init(struct fm_macsec_dev *fm_macsec_dev);
91434 +int fm_macsec_config_unknown_sci_frame_treatment(struct fm_macsec_dev
91435 +                               *fm_macsec_dev,
91436 +                               fm_macsec_unknown_sci_frame_treatment treat_mode);
91437 +int fm_macsec_config_invalid_tags_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
91438 +                               bool deliver_uncontrolled);
91439 +int fm_macsec_config_kay_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
91440 +                               bool discard_uncontrolled);
91441 +int fm_macsec_config_untag_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
91442 +                                   fm_macsec_untag_frame_treatment treat_mode);
91443 +int fm_macsec_config_pn_exhaustion_threshold(struct fm_macsec_dev *fm_macsec_dev,
91444 +                                       uint32_t pnExhThr);
91445 +int fm_macsec_config_keys_unreadable(struct fm_macsec_dev *fm_macsec_dev);
91446 +int fm_macsec_config_sectag_without_sci(struct fm_macsec_dev *fm_macsec_dev);
91447 +int fm_macsec_config_exception(struct fm_macsec_dev *fm_macsec_dev,
91448 +                           fm_macsec_exception exception, bool enable);
91449 +int fm_macsec_get_revision(struct fm_macsec_dev *fm_macsec_dev,
91450 +                           int *macsec_revision);
91451 +int fm_macsec_enable(struct fm_macsec_dev *fm_macsec_dev);
91452 +int fm_macsec_disable(struct fm_macsec_dev *fm_macsec_dev);
91453 +
91454 +
91455 +int fm_macsec_secy_config_exception(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91456 +                                   fm_macsec_secy_exception exception,
91457 +                                   bool enable);
91458 +int fm_macsec_secy_free(struct fm_macsec_secy_dev *fm_macsec_secy_dev);
91459 +struct fm_macsec_secy_dev *fm_macsec_secy_config(struct fm_macsec_secy_params *secy_params);
91460 +int fm_macsec_secy_init(struct fm_macsec_secy_dev *fm_macsec_secy_dev);
91461 +int fm_macsec_secy_config_sci_insertion_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91462 +                               fm_macsec_sci_insertion_mode sci_insertion_mode);
91463 +int fm_macsec_secy_config_protect_frames(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91464 +                               bool protect_frames);
91465 +int fm_macsec_secy_config_replay_window(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91466 +                               bool replay_protect, uint32_t replay_window);
91467 +int fm_macsec_secy_config_validation_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91468 +                               fm_macsec_valid_frame_behavior validate_frames);
91469 +int fm_macsec_secy_config_confidentiality(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91470 +                               bool confidentiality_enable,
91471 +                               uint32_t confidentiality_offset);
91472 +int fm_macsec_secy_config_point_to_point(struct fm_macsec_secy_dev *fm_macsec_secy_dev);
91473 +int fm_macsec_secy_config_event(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91474 +                                   fm_macsec_secy_event event,
91475 +                                   bool enable);
91476 +struct rx_sc_dev *fm_macsec_secy_create_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91477 +                               struct fm_macsec_secy_sc_params *params);
91478 +int fm_macsec_secy_delete_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91479 +                               struct rx_sc_dev *sc);
91480 +int fm_macsec_secy_create_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91481 +                               struct rx_sc_dev *sc, macsec_an_t an,
91482 +                               uint32_t lowest_pn, macsec_sa_key_t key);
91483 +int fm_macsec_secy_delete_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91484 +                               struct rx_sc_dev *sc, macsec_an_t an);
91485 +int fm_macsec_secy_rxsa_enable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91486 +                                       struct rx_sc_dev *sc,
91487 +                                       macsec_an_t an);
91488 +int fm_macsec_secy_rxsa_disable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91489 +                                       struct rx_sc_dev *sc,
91490 +                                       macsec_an_t an);
91491 +int fm_macsec_secy_rxsa_update_next_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91492 +                                       struct rx_sc_dev *sc,
91493 +                                       macsec_an_t an, uint32_t updt_next_pn);
91494 +int fm_macsec_secy_rxsa_update_lowest_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91495 +                                       struct rx_sc_dev *sc,
91496 +                                       macsec_an_t an, uint32_t updt_lowest_pn);
91497 +int fm_macsec_secy_rxsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91498 +                                       struct rx_sc_dev *sc,
91499 +                                       macsec_an_t an, macsec_sa_key_t key);
91500 +int fm_macsec_secy_create_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91501 +                               macsec_an_t an, macsec_sa_key_t key);
91502 +int fm_macsec_secy_delete_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91503 +                               macsec_an_t an);
91504 +int fm_macsec_secy_txsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91505 +                                       macsec_an_t next_active_an,
91506 +                                       macsec_sa_key_t key);
91507 +int fm_macsec_secy_txsa_set_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91508 +                                       macsec_an_t an);
91509 +int fm_macsec_secy_txsa_get_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91510 +                                       macsec_an_t *p_an);
91511 +int fm_macsec_secy_get_rxsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91512 +                               struct rx_sc_dev *sc, uint32_t *sc_phys_id);
91513 +int fm_macsec_secy_get_txsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
91514 +                                   uint32_t *sc_phys_id);
91515 +
91516 +/** @} */ /* end of FM_LnxKern_ctrl_grp group */
91517 +/** @} */ /* end of FM_LnxKern_grp group */
91518 +
91519 +/* default values for initializing PTP 1588 timer clock */
91520 +#define DPA_PTP_NOMINAL_FREQ_PERIOD_SHIFT 2 /* power of 2 for better performance */
91521 +#define DPA_PTP_NOMINAL_FREQ_PERIOD_NS (1 << DPA_PTP_NOMINAL_FREQ_PERIOD_SHIFT) /* 4ns,250MHz */
91522 +
91523 +#endif /* __LNXWRP_FSL_FMAN_H */
91524 --- /dev/null
91525 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/xx/xx.h
91526 @@ -0,0 +1,50 @@
91527 +/*
91528 + * Copyright 2008-2012 Freescale Semiconductor Inc.
91529 + *
91530 + * Redistribution and use in source and binary forms, with or without
91531 + * modification, are permitted provided that the following conditions are met:
91532 + *     * Redistributions of source code must retain the above copyright
91533 + *       notice, this list of conditions and the following disclaimer.
91534 + *     * Redistributions in binary form must reproduce the above copyright
91535 + *       notice, this list of conditions and the following disclaimer in the
91536 + *       documentation and/or other materials provided with the distribution.
91537 + *     * Neither the name of Freescale Semiconductor nor the
91538 + *       names of its contributors may be used to endorse or promote products
91539 + *       derived from this software without specific prior written permission.
91540 + *
91541 + *
91542 + * ALTERNATIVELY, this software may be distributed under the terms of the
91543 + * GNU General Public License ("GPL") as published by the Free Software
91544 + * Foundation, either version 2 of that License or (at your option) any
91545 + * later version.
91546 + *
91547 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
91548 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
91549 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
91550 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
91551 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
91552 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
91553 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
91554 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
91555 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
91556 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
91557 + */
91558 +
91559 +#ifndef __XX_H
91560 +#define __XX_H
91561 +
91562 +#include "xx_ext.h"
91563 +
91564 +void * xx_Malloc(uint32_t n);
91565 +void xx_Free(void *p);
91566 +
91567 +void *xx_MallocSmart(uint32_t size, int memPartitionId, uint32_t align);
91568 +void xx_FreeSmart(void *p);
91569 +
91570 +/* never used: */
91571 +#define GetDeviceName(irq) ((char *)NULL)
91572 +
91573 +int     GetDeviceIrqNum(int irq);
91574 +
91575 +
91576 +#endif /* __XX_H */
91577 --- /dev/null
91578 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/system/Makefile
91579 @@ -0,0 +1,10 @@
91580 +#
91581 +# Makefile for the Freescale Ethernet controllers
91582 +#
91583 +ccflags-y           += -DVERSION=\"\"
91584 +#
91585 +#Include netcomm SW specific definitions
91586 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
91587 +#
91588 +
91589 +obj-y          += sys_io.o
91590 --- /dev/null
91591 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/system/sys_io.c
91592 @@ -0,0 +1,171 @@
91593 +/*
91594 + * Copyright 2008-2012 Freescale Semiconductor Inc.
91595 + *
91596 + * Redistribution and use in source and binary forms, with or without
91597 + * modification, are permitted provided that the following conditions are met:
91598 + *     * Redistributions of source code must retain the above copyright
91599 + *       notice, this list of conditions and the following disclaimer.
91600 + *     * Redistributions in binary form must reproduce the above copyright
91601 + *       notice, this list of conditions and the following disclaimer in the
91602 + *       documentation and/or other materials provided with the distribution.
91603 + *     * Neither the name of Freescale Semiconductor nor the
91604 + *       names of its contributors may be used to endorse or promote products
91605 + *       derived from this software without specific prior written permission.
91606 + *
91607 + *
91608 + * ALTERNATIVELY, this software may be distributed under the terms of the
91609 + * GNU General Public License ("GPL") as published by the Free Software
91610 + * Foundation, either version 2 of that License or (at your option) any
91611 + * later version.
91612 + *
91613 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
91614 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
91615 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
91616 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
91617 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
91618 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
91619 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
91620 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
91621 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
91622 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
91623 + */
91624 +
91625 +#include <linux/version.h>
91626 +
91627 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
91628 +#define MODVERSIONS
91629 +#endif
91630 +#ifdef MODVERSIONS
91631 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
91632 +#include <linux/modversions.h>
91633 +#else
91634 +#include <config/modversions.h>
91635 +#endif    /* LINUX_VERSION_CODE */
91636 +#endif /* MODVERSIONS */
91637 +
91638 +#include <linux/module.h>
91639 +#include <linux/kernel.h>
91640 +
91641 +#include <asm/io.h>
91642 +
91643 +#include "std_ext.h"
91644 +#include "error_ext.h"
91645 +#include "string_ext.h"
91646 +#include "list_ext.h"
91647 +#include "sys_io_ext.h"
91648 +
91649 +
91650 +#define __ERR_MODULE__      MODULE_UNKNOWN
91651 +
91652 +
91653 +typedef struct {
91654 +    uint64_t    virtAddr;
91655 +    uint64_t    physAddr;
91656 +    uint32_t    size;
91657 +    t_List      node;
91658 +} t_IoMap;
91659 +#define IOMAP_OBJECT(ptr)  LIST_OBJECT(ptr, t_IoMap, node)
91660 +
91661 +LIST(mapsList);
91662 +
91663 +
91664 +static void EnqueueIoMap(t_IoMap *p_IoMap)
91665 +{
91666 +    uint32_t   intFlags;
91667 +
91668 +    intFlags = XX_DisableAllIntr();
91669 +    LIST_AddToTail(&p_IoMap->node, &mapsList);
91670 +    XX_RestoreAllIntr(intFlags);
91671 +}
91672 +
91673 +static t_IoMap * FindIoMapByVirtAddr(uint64_t addr)
91674 +{
91675 +    t_IoMap     *p_IoMap;
91676 +    t_List      *p_Pos;
91677 +
91678 +    LIST_FOR_EACH(p_Pos, &mapsList)
91679 +    {
91680 +        p_IoMap = IOMAP_OBJECT(p_Pos);
91681 +        if ((addr >= p_IoMap->virtAddr) && (addr < p_IoMap->virtAddr+p_IoMap->size))
91682 +            return p_IoMap;
91683 +    }
91684 +
91685 +    return NULL;
91686 +}
91687 +
91688 +static t_IoMap * FindIoMapByPhysAddr(uint64_t addr)
91689 +{
91690 +    t_IoMap     *p_IoMap;
91691 +    t_List      *p_Pos;
91692 +
91693 +    LIST_FOR_EACH(p_Pos, &mapsList)
91694 +    {
91695 +        p_IoMap = IOMAP_OBJECT(p_Pos);
91696 +        if ((addr >= p_IoMap->physAddr) && (addr < p_IoMap->physAddr+p_IoMap->size))
91697 +            return p_IoMap;
91698 +    }
91699 +
91700 +    return NULL;
91701 +}
91702 +
91703 +t_Error SYS_RegisterIoMap (uint64_t virtAddr, uint64_t physAddr, uint32_t size)
91704 +{
91705 +    t_IoMap *p_IoMap;
91706 +
91707 +    p_IoMap = (t_IoMap*)XX_Malloc(sizeof(t_IoMap));
91708 +    if (!p_IoMap)
91709 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("message handler object!!!"));
91710 +    memset(p_IoMap, 0, sizeof(t_IoMap));
91711 +
91712 +    p_IoMap->virtAddr = virtAddr;
91713 +    p_IoMap->physAddr = physAddr;
91714 +    p_IoMap->size     = size;
91715 +
91716 +    INIT_LIST(&p_IoMap->node);
91717 +    EnqueueIoMap(p_IoMap);
91718 +
91719 +    return E_OK;
91720 +}
91721 +
91722 +t_Error SYS_UnregisterIoMap  (uint64_t virtAddr)
91723 +{
91724 +    t_IoMap *p_IoMap = FindIoMapByVirtAddr(virtAddr);
91725 +    if (!p_IoMap)
91726 +        RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
91727 +
91728 +    LIST_Del(&p_IoMap->node);
91729 +    XX_Free(p_IoMap);
91730 +
91731 +    return E_OK;
91732 +}
91733 +
91734 +uint64_t SYS_PhysToVirt(uint64_t addr)
91735 +{
91736 +    t_IoMap *p_IoMap = FindIoMapByPhysAddr(addr);
91737 +    if (p_IoMap)
91738 +    {
91739 +        /* This is optimization - put the latest in the list-head - like a cache */
91740 +        if (mapsList.p_Next != &p_IoMap->node)
91741 +        {
91742 +            uint32_t intFlags = XX_DisableAllIntr();
91743 +            LIST_DelAndInit(&p_IoMap->node);
91744 +            LIST_Add(&p_IoMap->node, &mapsList);
91745 +            XX_RestoreAllIntr(intFlags);
91746 +        }
91747 +        return (uint64_t)(addr - p_IoMap->physAddr + p_IoMap->virtAddr);
91748 +    }
91749 +    return PTR_TO_UINT(phys_to_virt((unsigned long)addr));
91750 +}
91751 +
91752 +uint64_t SYS_VirtToPhys(uint64_t addr)
91753 +{
91754 +    t_IoMap *p_IoMap;
91755 +
91756 +    if (addr == 0)
91757 +        return 0;
91758 +
91759 +    p_IoMap = FindIoMapByVirtAddr(addr);
91760 +    if (p_IoMap)
91761 +        return (uint64_t)(addr - p_IoMap->virtAddr + p_IoMap->physAddr);
91762 +    return (uint64_t)virt_to_phys(UINT_TO_PTR(addr));
91763 +}
91764 --- /dev/null
91765 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/Makefile
91766 @@ -0,0 +1,19 @@
91767 +#
91768 +# Makefile for the Freescale Ethernet controllers
91769 +#
91770 +ccflags-y           += -DVERSION=\"\"
91771 +#
91772 +#Include netcomm SW specific definitions
91773 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
91774 +
91775 +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
91776 +
91777 +ccflags-y += -I$(NCSW_FM_INC)
91778 +ccflags-y += -I$(NET_DPA)
91779 +
91780 +obj-y          += fsl-ncsw-PFM.o
91781 +obj-$(CONFIG_FSL_SDK_FMAN_TEST)        += fman_test.o
91782 +
91783 +fsl-ncsw-PFM-objs      :=      lnxwrp_fm.o lnxwrp_fm_port.o lnxwrp_ioctls_fm.o \
91784 +                               lnxwrp_sysfs.o lnxwrp_sysfs_fm.o lnxwrp_sysfs_fm_port.o
91785 +obj-$(CONFIG_COMPAT)     +=   lnxwrp_ioctls_fm_compat.o
91786 --- /dev/null
91787 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/fman_test.c
91788 @@ -0,0 +1,1665 @@
91789 +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
91790 + * All rights reserved.
91791 + *
91792 + * Redistribution and use in source and binary forms, with or without
91793 + * modification, are permitted provided that the following conditions are met:
91794 + *     * Redistributions of source code must retain the above copyright
91795 + *       notice, this list of conditions and the following disclaimer.
91796 + *     * Redistributions in binary form must reproduce the above copyright
91797 + *       notice, this list of conditions and the following disclaimer in the
91798 + *       documentation and/or other materials provided with the distribution.
91799 + *     * Neither the name of Freescale Semiconductor nor the
91800 + *       names of its contributors may be used to endorse or promote products
91801 + *       derived from this software without specific prior written permission.
91802 + *
91803 + *
91804 + * ALTERNATIVELY, this software may be distributed under the terms of the
91805 + * GNU General Public License ("GPL") as published by the Free Software
91806 + * Foundation, either version 2 of that License or (at your option) any
91807 + * later version.
91808 + *
91809 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
91810 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
91811 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
91812 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
91813 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
91814 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
91815 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
91816 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
91817 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
91818 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
91819 + */
91820 +
91821 +/*
91822 + @File          fman_test.c
91823 + @Authors       Pistirica Sorin Andrei
91824 + @Description   FM Linux test environment
91825 +*/
91826 +
91827 +#include <linux/kernel.h>
91828 +#include <linux/module.h>
91829 +#include <linux/fs.h>
91830 +#include <linux/cdev.h>
91831 +#include <linux/device.h>
91832 +#include <linux/io.h>
91833 +#include <linux/ioport.h>
91834 +#include <linux/of_platform.h>
91835 +#include <linux/ip.h>
91836 +#include <linux/compat.h>
91837 +#include <linux/uaccess.h>
91838 +#include <linux/errno.h>
91839 +#include <linux/netdevice.h>
91840 +#include <linux/spinlock.h>
91841 +#include <linux/types.h>
91842 +#include <linux/fsl_qman.h>
91843 +#include <linux/fsl_bman.h>
91844 +
91845 +/* private headers */
91846 +#include "fm_ext.h"
91847 +#include "lnxwrp_fsl_fman.h"
91848 +#include "fm_port_ext.h"
91849 +#if (DPAA_VERSION == 11)
91850 +#include "../../Peripherals/FM/MAC/memac.h"
91851 +#endif
91852 +#include "fm_test_ioctls.h"
91853 +#include "fsl_fman_test.h"
91854 +
91855 +#include "dpaa_eth.h"
91856 +#include "dpaa_eth_common.h"
91857 +
91858 +#define FMT_FRM_WATERMARK   0xdeadbeefdeadbeeaLL
91859 +
91860 +struct fmt_frame_s {
91861 +       ioc_fmt_buff_desc_t     buff;
91862 +       struct list_head        list;
91863 +};
91864 +
91865 +struct fmt_fqs_s {
91866 +       struct qman_fq          fq_base;
91867 +       bool                    init;
91868 +       struct fmt_port_s       *fmt_port_priv;
91869 +};
91870 +
91871 +struct fmt_port_pcd_s {
91872 +       int              num_queues;
91873 +       struct fmt_fqs_s *fmt_pcd_fqs;
91874 +       uint32_t         fqid_base;
91875 +};
91876 +
91877 +/* char dev structure: fm test port */
91878 +struct fmt_port_s {
91879 +       bool                valid;
91880 +       uint8_t             id;
91881 +       ioc_fmt_port_type   port_type;
91882 +       ioc_diag_mode       diag;
91883 +       bool                compat_test_type;
91884 +
91885 +       /* fm ports */
91886 +       /* ! for oh ports p_tx_fm_port_dev == p_rx_fm_port_dev &&
91887 +        * p_tx_port == p_rx_port */
91888 +                               /* t_LnxWrpFmPortDev */
91889 +       struct fm_port      *p_tx_port;
91890 +                               /* t_LnxWrpFmPortDev->h_Dev: t_FmPort */
91891 +       void                *p_tx_fm_port_dev;
91892 +                               /* t_LnxWrpFmPortDev */
91893 +       struct fm_port      *p_rx_port;
91894 +                               /* t_LnxWrpFmPortDev->h_Dev: t_FmPort */
91895 +       void                *p_rx_fm_port_dev;
91896 +
91897 +       void                *p_mac_dev;
91898 +       uint64_t            fm_phys_base_addr;
91899 +
91900 +       /* read/write queue manipulation */
91901 +       spinlock_t          rx_q_lock;
91902 +       struct list_head    rx_q;
91903 +
91904 +       /* tx queuee for injecting traffic */
91905 +       int                 num_of_tx_fqs;
91906 +       struct fmt_fqs_s    p_tx_fqs[FMAN_TEST_MAX_TX_FQS];
91907 +
91908 +       /* pcd private queues manipulation */
91909 +       struct fmt_port_pcd_s fmt_port_pcd;
91910 +
91911 +       /* debugging stuff */
91912 +
91913 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
91914 +       atomic_t enqueue_to_qman_frm;
91915 +       atomic_t enqueue_to_rxq;
91916 +       atomic_t dequeue_from_rxq;
91917 +       atomic_t not_enqueue_to_rxq_wrong_frm;
91918 +#endif
91919 +
91920 +};
91921 +
91922 +/* The devices. */
91923 +struct fmt_s {
91924 +       int major;
91925 +       struct fmt_port_s ports[IOC_FMT_MAX_NUM_OF_PORTS];
91926 +       struct class *fmt_class;
91927 +};
91928 +
91929 +/* fm test structure */
91930 +static struct fmt_s fm_test;
91931 +
91932 +#if (DPAA_VERSION == 11)
91933 +struct mac_priv_s {
91934 +        t_Handle        mac;
91935 +};
91936 +#endif
91937 +
91938 +#define DTSEC_BASE_ADDR         0x000e0000
91939 +#define DTSEC_MEM_RANGE         0x00002000
91940 +#define MAC_1G_MACCFG1          0x00000100
91941 +#define MAC_1G_LOOP_MASK        0x00000100
91942 +static int set_1gmac_loopback(
91943 +               struct fmt_port_s *fmt_port,
91944 +               bool en)
91945 +{
91946 +#if (DPAA_VERSION <= 10)
91947 +       uint32_t dtsec_idx = fmt_port->id; /* dtsec for which port */
91948 +       uint32_t dtsec_idx_off = dtsec_idx * DTSEC_MEM_RANGE;
91949 +       phys_addr_t maccfg1_hw;
91950 +       void *maccfg1_map;
91951 +       uint32_t maccfg1_val;
91952 +
91953 +       /* compute the maccfg1 register address */
91954 +       maccfg1_hw = fmt_port->fm_phys_base_addr +
91955 +                       (phys_addr_t)(DTSEC_BASE_ADDR +
91956 +                                       dtsec_idx_off +
91957 +                                       MAC_1G_MACCFG1);
91958 +
91959 +       /* map register */
91960 +       maccfg1_map = ioremap(maccfg1_hw, sizeof(u32));
91961 +
91962 +       /* set register */
91963 +       maccfg1_val = in_be32(maccfg1_map);
91964 +       if (en)
91965 +               maccfg1_val |= MAC_1G_LOOP_MASK;
91966 +       else
91967 +               maccfg1_val &= ~MAC_1G_LOOP_MASK;
91968 +       out_be32(maccfg1_map, maccfg1_val);
91969 +
91970 +       /* unmap register */
91971 +       iounmap(maccfg1_map);
91972 +#else
91973 +       struct mac_device *mac_dev;
91974 +       struct mac_priv_s *priv;
91975 +       t_Memac *p_memac;
91976 +
91977 +       if (!fmt_port)
91978 +               return -EINVAL;
91979 +
91980 +       mac_dev = (struct mac_device *)fmt_port->p_mac_dev;
91981 +
91982 +       if (!mac_dev)
91983 +               return -EINVAL;
91984 +
91985 +       priv = macdev_priv(mac_dev);
91986 +
91987 +       if (!priv)
91988 +               return -EINVAL;
91989 +
91990 +       p_memac = priv->mac;
91991 +
91992 +       if (!p_memac)
91993 +               return -EINVAL;
91994 +
91995 +       memac_set_loopback(p_memac->p_MemMap, en);
91996 +#endif
91997 +       return 0;
91998 +}
91999 +
92000 +/* TODO: re-write this function */
92001 +static int set_10gmac_int_loopback(
92002 +               struct fmt_port_s *fmt_port,
92003 +               bool en)
92004 +{
92005 +#ifndef FM_10G_MAC_NO_CTRL_LOOPBACK
92006 +#define FM_10GMAC0_OFFSET               0x000f0000
92007 +#define FM_10GMAC_CMD_CONF_CTRL_OFFSET  0x8
92008 +#define CMD_CFG_LOOPBACK_EN             0x00000400
92009 +
92010 +       uint64_t    base_addr, reg_addr;
92011 +       uint32_t    tmp_val;
92012 +
92013 +       base_addr = fmt_port->fm_phys_base_addr + (FM_10GMAC0_OFFSET +
92014 +                       ((fmt_port->id-FM_MAX_NUM_OF_1G_RX_PORTS)*0x2000));
92015 +
92016 +       base_addr = PTR_TO_UINT(ioremap(base_addr, 0x1000));
92017 +
92018 +       reg_addr = base_addr + FM_10GMAC_CMD_CONF_CTRL_OFFSET;
92019 +       tmp_val = GET_UINT32(*((uint32_t  *)UINT_TO_PTR(reg_addr)));
92020 +       if (en)
92021 +               tmp_val |= CMD_CFG_LOOPBACK_EN;
92022 +       else
92023 +               tmp_val &= ~CMD_CFG_LOOPBACK_EN;
92024 +       WRITE_UINT32(*((uint32_t  *)UINT_TO_PTR(reg_addr)), tmp_val);
92025 +
92026 +       iounmap(UINT_TO_PTR(base_addr));
92027 +
92028 +       return 0;
92029 +#else
92030 +       _fmt_err("TGEC don't have internal-loopback.\n");
92031 +       return  -EPERM;
92032 +#endif
92033 +}
92034 +
92035 +static int set_mac_int_loopback(struct fmt_port_s *fmt_port, bool en)
92036 +{
92037 +       int _err = 0;
92038 +
92039 +       switch (fmt_port->port_type) {
92040 +
92041 +       case e_IOC_FMT_PORT_T_RXTX:
92042 +       /* 1G port */
92043 +       if (fmt_port->id < FM_MAX_NUM_OF_1G_RX_PORTS)
92044 +               _err = set_1gmac_loopback(fmt_port, en);
92045 +       /* 10g port */
92046 +       else if ((fmt_port->id >= FM_MAX_NUM_OF_1G_RX_PORTS) &&
92047 +                       (fmt_port->id < FM_MAX_NUM_OF_1G_RX_PORTS +
92048 +                                       FM_MAX_NUM_OF_10G_RX_PORTS)) {
92049 +
92050 +               _err = set_10gmac_int_loopback(fmt_port, en);
92051 +       } else
92052 +               _err = -EINVAL;
92053 +       break;
92054 +       /* op port does not have MAC (loopback mode) */
92055 +       case e_IOC_FMT_PORT_T_OP:
92056 +
92057 +       _err = 0;
92058 +       break;
92059 +       default:
92060 +
92061 +       _err = -EPERM;
92062 +       break;
92063 +       }
92064 +
92065 +       return _err;
92066 +}
92067 +
92068 +static void enqueue_fmt_frame(
92069 +               struct fmt_port_s *fmt_port,
92070 +               struct fmt_frame_s *p_fmt_frame)
92071 +{
92072 +       spinlock_t *rx_q_lock = NULL;
92073 +
92074 +       rx_q_lock = &fmt_port->rx_q_lock;
92075 +
92076 +       spin_lock(rx_q_lock);
92077 +       list_add_tail(&p_fmt_frame->list, &fmt_port->rx_q);
92078 +       spin_unlock(rx_q_lock);
92079 +
92080 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92081 +       atomic_inc(&fmt_port->enqueue_to_rxq);
92082 +#endif
92083 +}
92084 +
92085 +static struct fmt_frame_s *dequeue_fmt_frame(
92086 +               struct fmt_port_s *fmt_port)
92087 +{
92088 +       struct fmt_frame_s *p_fmt_frame = NULL;
92089 +       spinlock_t *rx_q_lock = NULL;
92090 +
92091 +       rx_q_lock = &fmt_port->rx_q_lock;
92092 +
92093 +       spin_lock(rx_q_lock);
92094 +
92095 +#define list_last_entry(ptr, type, member) list_entry((ptr)->prev, type, member)
92096 +
92097 +       if (!list_empty(&fmt_port->rx_q)) {
92098 +               p_fmt_frame = list_last_entry(&fmt_port->rx_q,
92099 +                                               struct fmt_frame_s,
92100 +                                               list);
92101 +               list_del(&p_fmt_frame->list);
92102 +
92103 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92104 +               atomic_inc(&fmt_port->dequeue_from_rxq);
92105 +#endif
92106 +       }
92107 +
92108 +       spin_unlock(rx_q_lock);
92109 +
92110 +       return p_fmt_frame;
92111 +}
92112 +
92113 +/* eth-dev -to- fmt port association */
92114 +struct fmt_port_s *match_dpa_to_fmt_port(
92115 +                               struct dpa_priv_s *dpa_priv) {
92116 +       struct mac_device *mac_dev = dpa_priv->mac_dev;
92117 +       struct fm_port *fm_port = (struct fm_port  *) mac_dev;
92118 +       struct fmt_port_s *fmt_port = NULL;
92119 +       int i;
92120 +
92121 +       _fmt_dbgr("calling...\n");
92122 +
92123 +       /* find the FM-test-port object */
92124 +       for (i = 0; i < IOC_FMT_MAX_NUM_OF_PORTS; i++)
92125 +               if ((fm_test.ports[i].p_mac_dev &&
92126 +                    mac_dev == fm_test.ports[i].p_mac_dev) ||
92127 +                    fm_port == fm_test.ports[i].p_tx_port) {
92128 +
92129 +                       fmt_port = &fm_test.ports[i];
92130 +                       break;
92131 +               }
92132 +
92133 +       _fmt_dbgr("called\n");
92134 +       return fmt_port;
92135 +}
92136 +
92137 +void dump_frame(
92138 +       uint8_t  *buffer,
92139 +       uint32_t size)
92140 +{
92141 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92142 +       unsigned int i;
92143 +
92144 +       for (i = 0; i < size; i++) {
92145 +               if (i%16 == 0)
92146 +                       printk(KERN_DEBUG "\n");
92147 +               printk(KERN_DEBUG "%2x ", *(buffer+i));
92148 +       }
92149 +#endif
92150 +       return;
92151 +}
92152 +
92153 +bool test_and_steal_frame(struct fmt_port_s *fmt_port,
92154 +               uint32_t fqid,
92155 +               uint8_t  *buffer,
92156 +               uint32_t size)
92157 +{
92158 +       struct fmt_frame_s *p_fmt_frame = NULL;
92159 +       bool test_and_steal_frame_frame;
92160 +       uint32_t data_offset;
92161 +       uint32_t i;
92162 +
92163 +       _fmt_dbgr("calling...\n");
92164 +
92165 +       if (!fmt_port || !fmt_port->p_rx_fm_port_dev)
92166 +               return false;
92167 +
92168 +       /* check watermark */
92169 +       test_and_steal_frame_frame = false;
92170 +       for (i = 0; i < size; i++) {
92171 +               uint64_t temp = *((uint64_t  *)(buffer + i));
92172 +
92173 +               if (temp == (uint64_t) FMT_FRM_WATERMARK) {
92174 +                       _fmt_dbgr("watermark found!\n");
92175 +                       test_and_steal_frame_frame = true;
92176 +                       break;
92177 +               }
92178 +       }
92179 +
92180 +       if (!test_and_steal_frame_frame) {
92181 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92182 +               atomic_inc(&fmt_port->not_enqueue_to_rxq_wrong_frm);
92183 +#endif
92184 +               _fmt_dbgr("NOT watermark found!\n");
92185 +               return false;
92186 +       }
92187 +
92188 +       /* do not enqueue the tx conf/err frames */
92189 +       if ((fqid == FMT_TX_CONF_Q) || (fqid == FMT_TX_ERR_Q))
92190 +               goto _test_and_steal_frame_return_true;
92191 +
92192 +       _fmt_dbgr("on port %d got FMUC frame\n", fmt_port->id);
92193 +       data_offset = FM_PORT_GetBufferDataOffset(
92194 +                                       fmt_port->p_rx_fm_port_dev);
92195 +
92196 +       p_fmt_frame = kmalloc(sizeof(struct fmt_frame_s), GFP_KERNEL);
92197 +
92198 +       /* dump frame... no more space left on device */
92199 +       if (p_fmt_frame == NULL) {
92200 +               _fmt_err("no space left on device!\n");
92201 +               goto _test_and_steal_frame_return_true;
92202 +       }
92203 +
92204 +       memset(p_fmt_frame, 0, sizeof(struct fmt_frame_s));
92205 +       p_fmt_frame->buff.p_data = kmalloc(size * sizeof(uint8_t), GFP_KERNEL);
92206 +
92207 +       /* No more space left on device*/
92208 +       if (p_fmt_frame->buff.p_data == NULL) {
92209 +               _fmt_err("no space left on device!\n");
92210 +               kfree(p_fmt_frame);
92211 +               goto _test_and_steal_frame_return_true;
92212 +       }
92213 +
92214 +       p_fmt_frame->buff.size = size-data_offset;
92215 +       p_fmt_frame->buff.qid = fqid;
92216 +
92217 +       memcpy(p_fmt_frame->buff.p_data,
92218 +               (uint8_t  *)PTR_MOVE(buffer, data_offset),
92219 +               p_fmt_frame->buff.size);
92220 +
92221 +       memcpy(p_fmt_frame->buff.buff_context.fm_prs_res,
92222 +               FM_PORT_GetBufferPrsResult(fmt_port->p_rx_fm_port_dev,
92223 +                                               (char *)buffer),
92224 +               32);
92225 +
92226 +       /* enqueue frame - this frame will go to us */
92227 +       enqueue_fmt_frame(fmt_port, p_fmt_frame);
92228 +
92229 +_test_and_steal_frame_return_true:
92230 +       return true;
92231 +}
92232 +
92233 +static int fmt_fq_release(const struct qm_fd *fd)
92234 +{
92235 +       struct dpa_bp *_dpa_bp;
92236 +       struct bm_buffer _bmb;
92237 +
92238 +       if (fd->format == qm_fd_contig) {
92239 +               _dpa_bp = dpa_bpid2pool(fd->bpid);
92240 +               BUG_ON(IS_ERR(_dpa_bp));
92241 +
92242 +               _bmb.hi = fd->addr_hi;
92243 +               _bmb.lo = fd->addr_lo;
92244 +
92245 +               while (bman_release(_dpa_bp->pool, &_bmb, 1, 0))
92246 +                       cpu_relax();
92247 +
92248 +       } else {
92249 +               _fmt_err("frame not supported !\n");
92250 +               return -1;
92251 +       }
92252 +
92253 +       return 0;
92254 +}
92255 +
92256 +/* sync it w/ dpaa_eth.c: DPA_BP_HEAD */
92257 +#define DPA_BP_HEADROOM (DPA_TX_PRIV_DATA_SIZE + \
92258 +                       fm_get_rx_extra_headroom() + \
92259 +                       DPA_PARSE_RESULTS_SIZE + \
92260 +                       DPA_HASH_RESULTS_SIZE)
92261 +#define MAC_HEADER_LENGTH 14
92262 +#define L2_AND_HEADROOM_OFF ((DPA_BP_HEADROOM) + (MAC_HEADER_LENGTH))
92263 +
92264 +/* dpa ingress hooks definition */
92265 +enum dpaa_eth_hook_result fmt_rx_default_hook(
92266 +               struct sk_buff *skb,
92267 +               struct net_device *net_dev,
92268 +               u32 fqid)
92269 +{
92270 +       struct dpa_priv_s *dpa_priv = NULL;
92271 +       struct fmt_port_s *fmt_port = NULL;
92272 +       uint8_t *buffer;
92273 +       uint32_t buffer_len;
92274 +
92275 +       _fmt_dbgr("calling...\n");
92276 +
92277 +       dpa_priv = netdev_priv(net_dev);
92278 +       fmt_port = match_dpa_to_fmt_port(dpa_priv);
92279 +
92280 +       /* conversion from skb to fd:
92281 +        *  skb cames processed for L3, so we need to go back for
92282 +        *  layer 2 offset */
92283 +       buffer = (uint8_t  *)(skb->data - ((int)L2_AND_HEADROOM_OFF));
92284 +       buffer_len = skb->len + ((int)L2_AND_HEADROOM_OFF);
92285 +
92286 +       /* if is not out frame let dpa to handle it */
92287 +       if (test_and_steal_frame(fmt_port,
92288 +                       FMT_RX_DFLT_Q,
92289 +                       buffer,
92290 +                       buffer_len))
92291 +               goto _fmt_rx_default_hook_stolen;
92292 +
92293 +       _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
92294 +       return DPAA_ETH_CONTINUE;
92295 +
92296 +_fmt_rx_default_hook_stolen:
92297 +       dev_kfree_skb(skb);
92298 +
92299 +       _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
92300 +       return DPAA_ETH_STOLEN;
92301 +}
92302 +
92303 +enum dpaa_eth_hook_result fmt_rx_error_hook(
92304 +       struct net_device *net_dev,
92305 +       const struct qm_fd *fd,
92306 +       u32 fqid)
92307 +{
92308 +       struct dpa_priv_s *dpa_priv = NULL;
92309 +       struct dpa_bp *dpa_bp = NULL;
92310 +       struct fmt_port_s *fmt_port = NULL;
92311 +       void *fd_virt_addr = NULL;
92312 +       dma_addr_t addr = qm_fd_addr(fd);
92313 +
92314 +       _fmt_dbgr("calling...\n");
92315 +
92316 +       dpa_priv = netdev_priv(net_dev);
92317 +       fmt_port = match_dpa_to_fmt_port(dpa_priv);
92318 +
92319 +       /* dpaa doesn't do this... we have to do it here */
92320 +       dpa_bp = dpa_bpid2pool(fd->bpid);
92321 +       dma_unmap_single(dpa_bp->dev, addr, dpa_bp->size, DMA_BIDIRECTIONAL);
92322 +
92323 +       fd_virt_addr = phys_to_virt(addr);
92324 +       /* if is not out frame let dpa to handle it */
92325 +       if (test_and_steal_frame(fmt_port,
92326 +                       FMT_RX_ERR_Q,
92327 +                       fd_virt_addr,
92328 +                       fd->length20 + fd->offset)) {
92329 +               goto _fmt_rx_error_hook_stolen;
92330 +       }
92331 +
92332 +       _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
92333 +       return DPAA_ETH_CONTINUE;
92334 +
92335 +_fmt_rx_error_hook_stolen:
92336 +       /* the frame data  doesn't matter,
92337 +        * so, no mapping is needed */
92338 +       fmt_fq_release(fd);
92339 +
92340 +       _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
92341 +       return DPAA_ETH_STOLEN;
92342 +}
92343 +
92344 +enum dpaa_eth_hook_result fmt_tx_confirm_hook(
92345 +       struct net_device *net_dev,
92346 +       const struct qm_fd *fd,
92347 +       u32 fqid)
92348 +{
92349 +       struct dpa_priv_s *dpa_priv = NULL;
92350 +       struct fmt_port_s *fmt_port = NULL;
92351 +       dma_addr_t addr = qm_fd_addr(fd);
92352 +       void *fd_virt_addr = NULL;
92353 +       uint32_t fd_len = 0;
92354 +
92355 +       _fmt_dbgr("calling...\n");
92356 +
92357 +       dpa_priv = netdev_priv(net_dev);
92358 +       fmt_port = match_dpa_to_fmt_port(dpa_priv);
92359 +
92360 +       fd_virt_addr = phys_to_virt(addr);
92361 +       fd_len = fd->length20 + fd->offset;
92362 +
92363 +       if (fd_len > fm_get_max_frm()) {
92364 +               _fmt_err("tx confirm bad frame size: %u!\n", fd_len);
92365 +               goto _fmt_tx_confirm_hook_continue;
92366 +       }
92367 +
92368 +       if (test_and_steal_frame(fmt_port,
92369 +                       FMT_TX_CONF_Q,
92370 +                       fd_virt_addr,
92371 +                       fd_len))
92372 +               goto _fmt_tx_confirm_hook_stolen;
92373 +
92374 +_fmt_tx_confirm_hook_continue:
92375 +       _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
92376 +       return DPAA_ETH_CONTINUE;
92377 +
92378 +_fmt_tx_confirm_hook_stolen:
92379 +       kfree(fd_virt_addr);
92380 +
92381 +       _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
92382 +       return DPAA_ETH_STOLEN;
92383 +}
92384 +
92385 +enum dpaa_eth_hook_result fmt_tx_confirm_error_hook(
92386 +       struct net_device *net_dev,
92387 +       const struct qm_fd *fd,
92388 +       u32 fqid)
92389 +{
92390 +       struct dpa_priv_s *dpa_priv = NULL;
92391 +       struct fmt_port_s *fmt_port = NULL;
92392 +       dma_addr_t addr = qm_fd_addr(fd);
92393 +       void *fd_virt_addr = NULL;
92394 +       uint32_t fd_len = 0;
92395 +
92396 +       _fmt_dbgr("calling...\n");
92397 +
92398 +       dpa_priv = netdev_priv(net_dev);
92399 +       fmt_port = match_dpa_to_fmt_port(dpa_priv);
92400 +
92401 +       fd_virt_addr = phys_to_virt(addr);
92402 +       fd_len = fd->length20 + fd->offset;
92403 +
92404 +       if (fd_len > fm_get_max_frm()) {
92405 +               _fmt_err("tx confirm err bad frame size: %u !\n", fd_len);
92406 +               goto _priv_ingress_tx_err_continue;
92407 +       }
92408 +
92409 +       if (test_and_steal_frame(fmt_port, FMT_TX_ERR_Q, fd_virt_addr, fd_len))
92410 +               goto _priv_ingress_tx_err_stolen;
92411 +
92412 +_priv_ingress_tx_err_continue:
92413 +       _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
92414 +       return DPAA_ETH_CONTINUE;
92415 +
92416 +_priv_ingress_tx_err_stolen:
92417 +       kfree(fd_virt_addr);
92418 +
92419 +       _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
92420 +       return DPAA_ETH_STOLEN;
92421 +}
92422 +
92423 +/* egress callbacks definition */
92424 +enum qman_cb_dqrr_result fmt_egress_dqrr(
92425 +               struct qman_portal         *portal,
92426 +               struct qman_fq             *fq,
92427 +               const struct qm_dqrr_entry *dqrr)
92428 +{
92429 +       /* this callback should never be called */
92430 +       BUG();
92431 +       return qman_cb_dqrr_consume;
92432 +}
92433 +
92434 +static void  fmt_egress_error_dqrr(
92435 +               struct qman_portal *p,
92436 +               struct qman_fq *fq,
92437 +               const struct qm_mr_entry *msg)
92438 +{
92439 +       uint8_t *fd_virt_addr = NULL;
92440 +
92441 +       /* tx failure, on the ern callback - release buffer */
92442 +       fd_virt_addr = (uint8_t  *)phys_to_virt(qm_fd_addr(&msg->ern.fd));
92443 +       kfree(fd_virt_addr);
92444 +
92445 +       return;
92446 +}
92447 +
92448 +static const struct qman_fq fmt_egress_fq = {
92449 +       .cb = { .dqrr = fmt_egress_dqrr,
92450 +               .ern = fmt_egress_error_dqrr,
92451 +               .fqs = NULL}
92452 +};
92453 +
92454 +int fmt_fq_alloc(
92455 +       struct fmt_fqs_s *fmt_fqs,
92456 +       const struct qman_fq *qman_fq,
92457 +       uint32_t fqid,  uint32_t flags,
92458 +       uint16_t channel, uint8_t wq)
92459 +{
92460 +       int _errno = 0;
92461 +
92462 +       _fmt_dbg("calling...\n");
92463 +
92464 +       fmt_fqs->fq_base = *qman_fq;
92465 +
92466 +       if (fqid == 0) {
92467 +               flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
92468 +               flags &= ~QMAN_FQ_FLAG_NO_MODIFY;
92469 +       } else
92470 +               flags &= ~QMAN_FQ_FLAG_DYNAMIC_FQID;
92471 +
92472 +       fmt_fqs->init = !(flags & QMAN_FQ_FLAG_NO_MODIFY);
92473 +
92474 +       _errno = qman_create_fq(fqid, flags, &fmt_fqs->fq_base);
92475 +       if (_errno < 0) {
92476 +               _fmt_err("frame queues create failed.\n");
92477 +               return -EINVAL;
92478 +       }
92479 +
92480 +       if (fmt_fqs->init) {
92481 +               struct qm_mcc_initfq initfq;
92482 +
92483 +               initfq.we_mask          = QM_INITFQ_WE_DESTWQ;
92484 +               initfq.fqd.dest.channel = channel;
92485 +               initfq.fqd.dest.wq      = wq;
92486 +
92487 +               _errno = qman_init_fq(&fmt_fqs->fq_base,
92488 +                               QMAN_INITFQ_FLAG_SCHED,
92489 +                               &initfq);
92490 +               if (_errno < 0) {
92491 +                       _fmt_err("frame queues init erorr.\n");
92492 +                       qman_destroy_fq(&fmt_fqs->fq_base, 0);
92493 +                       return -EINVAL;
92494 +               }
92495 +       }
92496 +
92497 +       _fmt_dbg("called.\n");
92498 +       return 0;
92499 +}
92500 +
92501 +static int fmt_fq_free(struct fmt_fqs_s *fmt_fq)
92502 +{
92503 +       int _err = 0;
92504 +
92505 +       _fmt_dbg("calling...\n");
92506 +
92507 +       if (fmt_fq->init) {
92508 +               _err = qman_retire_fq(&fmt_fq->fq_base, NULL);
92509 +               if (unlikely(_err < 0))
92510 +                       _fmt_err("qman_retire_fq(%u) = %d\n",
92511 +                               qman_fq_fqid(&fmt_fq->fq_base), _err);
92512 +
92513 +               _err = qman_oos_fq(&fmt_fq->fq_base);
92514 +               if (unlikely(_err < 0))
92515 +                       _fmt_err("qman_oos_fq(%u) = %d\n",
92516 +                               qman_fq_fqid(&fmt_fq->fq_base), _err);
92517 +       }
92518 +
92519 +       qman_destroy_fq(&fmt_fq->fq_base, 0);
92520 +
92521 +       _fmt_dbg("called.\n");
92522 +       return _err;
92523 +}
92524 +
92525 +/* private pcd dqrr calbacks */
92526 +static enum qman_cb_dqrr_result fmt_pcd_dqrr(
92527 +               struct qman_portal *portal,
92528 +               struct qman_fq *fq,
92529 +               const struct qm_dqrr_entry *dq)
92530 +{
92531 +       struct dpa_bp *dpa_bp = NULL;
92532 +       dma_addr_t addr = qm_fd_addr(&dq->fd);
92533 +       uint8_t *fd_virt_addr = NULL;
92534 +       struct fmt_port_s *fmt_port;
92535 +       struct fmt_port_pcd_s *fmt_port_pcd;
92536 +       uint32_t relative_fqid = 0;
92537 +       uint32_t fd_len = 0;
92538 +
92539 +       _fmt_dbgr("calling...\n");
92540 +
92541 +       /* upcast - from pcd_alloc_fq */
92542 +       fmt_port = ((struct fmt_fqs_s  *)fq)->fmt_port_priv;
92543 +       if (!fmt_port) {
92544 +               _fmt_err(" wrong fmt port -to- fq match.\n");
92545 +               goto _fmt_pcd_dqrr_return;
92546 +       }
92547 +       fmt_port_pcd = &fmt_port->fmt_port_pcd;
92548 +
92549 +       relative_fqid = dq->fqid - fmt_port_pcd->fqid_base;
92550 +       _fmt_dbgr("pcd dqrr got frame on relative fq:%u@base:%u\n",
92551 +                               relative_fqid, fmt_port_pcd->fqid_base);
92552 +
92553 +       fd_len = dq->fd.length20 + dq->fd.offset;
92554 +
92555 +       if (fd_len > fm_get_max_frm()) {
92556 +               _fmt_err("pcd dqrr wrong frame size: %u (%u:%u)!\n",
92557 +                       fd_len, dq->fd.length20, dq->fd.offset);
92558 +               goto _fmt_pcd_dqrr_return;
92559 +       }
92560 +
92561 +       dpa_bp = dpa_bpid2pool(dq->fd.bpid);
92562 +       dma_unmap_single(dpa_bp->dev, addr, dpa_bp->size, DMA_BIDIRECTIONAL);
92563 +
92564 +       fd_virt_addr = phys_to_virt(addr);
92565 +       if (!test_and_steal_frame(fmt_port, relative_fqid, fd_virt_addr,
92566 +                                                                  fd_len)) {
92567 +
92568 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92569 +               atomic_inc(&fmt_port->not_enqueue_to_rxq_wrong_frm);
92570 +#endif
92571 +               _fmt_wrn("pcd dqrr unrecognized frame@fqid: %u,"
92572 +                        " frame len: %u (dropped).\n",
92573 +                       dq->fqid, dq->fd.length20);
92574 +               dump_frame(fd_virt_addr, fd_len);
92575 +       }
92576 +
92577 +_fmt_pcd_dqrr_return:
92578 +       /* no need to map again here */
92579 +       fmt_fq_release(&dq->fd);
92580 +
92581 +       _fmt_dbgr("calle.\n");
92582 +       return qman_cb_dqrr_consume;
92583 +}
92584 +
92585 +static void fmt_pcd_err_dqrr(
92586 +       struct qman_portal *qm,
92587 +       struct qman_fq *fq,
92588 +       const struct qm_mr_entry *msg)
92589 +{
92590 +       _fmt_err("this callback should never be called.\n");
92591 +       BUG();
92592 +       return;
92593 +}
92594 +
92595 +static void fmt_pcd_fqs_dqrr(
92596 +       struct qman_portal *qm,
92597 +       struct qman_fq *fq,
92598 +       const struct qm_mr_entry *msg)
92599 +{
92600 +       _fmt_dbg(" fq state(0x%x)@fqid(%u.\n", msg->fq.fqs, msg->fq.fqid);
92601 +       return;
92602 +}
92603 +
92604 +/* private pcd queue template */
92605 +static const struct qman_fq pcd_fq = {
92606 +       .cb = { .dqrr = fmt_pcd_dqrr,
92607 +               .ern = fmt_pcd_err_dqrr,
92608 +               .fqs = fmt_pcd_fqs_dqrr}
92609 +};
92610 +
92611 +/* defined as weak in dpaa driver. */
92612 +/* ! parameters come from IOCTL call - US */
92613 +int dpa_alloc_pcd_fqids(
92614 +               struct device *dev,
92615 +               uint32_t num, uint8_t alignment,
92616 +               uint32_t *base_fqid)
92617 +{
92618 +       int _err = 0, i;
92619 +       struct net_device *net_dev = NULL;
92620 +       struct dpa_priv_s *dpa_priv = NULL;
92621 +       struct fmt_port_pcd_s *fmt_port_pcd = NULL;
92622 +       struct fmt_fqs_s *fmt_fqs = NULL;
92623 +       struct fmt_port_s *fmt_port = NULL;
92624 +       int num_allocated = 0;
92625 +
92626 +       _fmt_dbg("calling...\n");
92627 +
92628 +       net_dev = (typeof(net_dev))dev_get_drvdata(dev);
92629 +       dpa_priv = (typeof(dpa_priv))netdev_priv(net_dev);
92630 +
92631 +       if (!netif_msg_probe(dpa_priv)) {
92632 +               _fmt_err("dpa not probe.\n");
92633 +               _err = -ENODEV;
92634 +               goto _pcd_alloc_fqs_err;
92635 +       }
92636 +
92637 +       fmt_port = match_dpa_to_fmt_port(dpa_priv);
92638 +       if (!fmt_port) {
92639 +               _fmt_err("fmt port not found.");
92640 +               _err = -EINVAL;
92641 +               goto _pcd_alloc_fqs_err;
92642 +       }
92643 +
92644 +       fmt_port_pcd = &fmt_port->fmt_port_pcd;
92645 +
92646 +       num_allocated = qman_alloc_fqid_range(base_fqid, num, alignment, 0);
92647 +
92648 +       if ((num_allocated <= 0) ||
92649 +           (num_allocated < num) ||
92650 +           (alignment && (*base_fqid) % alignment)) {
92651 +               *base_fqid = 0;
92652 +               _fmt_err("Failed to alloc pcd fqs rang.\n");
92653 +               _err = -EINVAL;
92654 +               goto _pcd_alloc_fqs_err;
92655 +       }
92656 +
92657 +       _fmt_dbg("wanted %d fqs(align %d), got %d fqids@%u.\n",
92658 +                               num, alignment, num_allocated, *base_fqid);
92659 +
92660 +       /* alloc pcd queues */
92661 +       fmt_port_pcd->fmt_pcd_fqs = kmalloc(num_allocated *
92662 +                                               sizeof(struct fmt_fqs_s),
92663 +                                               GFP_KERNEL);
92664 +       fmt_port_pcd->num_queues = num_allocated;
92665 +       fmt_port_pcd->fqid_base = *base_fqid;
92666 +       fmt_fqs = fmt_port_pcd->fmt_pcd_fqs;
92667 +
92668 +       /* alloc the pcd queues */
92669 +       for (i = 0; i < num_allocated; i++, fmt_fqs++) {
92670 +               _err = fmt_fq_alloc(
92671 +                       fmt_fqs,
92672 +                       &pcd_fq,
92673 +                       (*base_fqid) + i, QMAN_FQ_FLAG_NO_ENQUEUE,
92674 +                       dpa_priv->channel, 7);
92675 +
92676 +               if (_err < 0)
92677 +                       goto _pcd_alloc_fqs_err;
92678 +
92679 +               /* upcast to identify from where the frames came from */
92680 +               fmt_fqs->fmt_port_priv = fmt_port;
92681 +       }
92682 +
92683 +       _fmt_dbg("called.\n");
92684 +       return _err;
92685 +_pcd_alloc_fqs_err:
92686 +       if (num_allocated > 0)
92687 +               qman_release_fqid_range(*base_fqid, num_allocated);
92688 +       /*TODO: free fmt_pcd_fqs if are any */
92689 +
92690 +       _fmt_dbg("called(_err:%d).\n", _err);
92691 +       return _err;
92692 +}
92693 +
92694 +/* defined as weak in dpaa driver. */
92695 +int dpa_free_pcd_fqids(
92696 +       struct device *dev,
92697 +       uint32_t base_fqid)
92698 +{
92699 +
92700 +       int _err = 0, i;
92701 +       struct net_device *net_dev = NULL;
92702 +       struct dpa_priv_s *dpa_priv = NULL;
92703 +       struct fmt_port_pcd_s *fmt_port_pcd = NULL;
92704 +       struct fmt_fqs_s *fmt_fqs = NULL;
92705 +       struct fmt_port_s *fmt_port = NULL;
92706 +       int num_allocated = 0;
92707 +
92708 +       _fmt_dbg("calling...\n");
92709 +
92710 +       net_dev = (typeof(net_dev))dev_get_drvdata(dev);
92711 +       dpa_priv = (typeof(dpa_priv))netdev_priv(net_dev);
92712 +
92713 +       if (!netif_msg_probe(dpa_priv)) {
92714 +               _fmt_err("dpa not probe.\n");
92715 +               _err = -ENODEV;
92716 +               goto _pcd_free_fqs_err;
92717 +       }
92718 +
92719 +       fmt_port = match_dpa_to_fmt_port(dpa_priv);
92720 +       if (!fmt_port) {
92721 +               _fmt_err("fmt port not found.");
92722 +               _err = -EINVAL;
92723 +               goto _pcd_free_fqs_err;
92724 +       }
92725 +
92726 +       fmt_port_pcd = &fmt_port->fmt_port_pcd;
92727 +       num_allocated = fmt_port_pcd->num_queues;
92728 +       fmt_fqs = fmt_port_pcd->fmt_pcd_fqs;
92729 +
92730 +       for (i = 0; i < num_allocated; i++, fmt_fqs++)
92731 +               fmt_fq_free(fmt_fqs);
92732 +
92733 +       qman_release_fqid_range(base_fqid,num_allocated);
92734 +
92735 +       kfree(fmt_port_pcd->fmt_pcd_fqs);
92736 +       memset(fmt_port_pcd, 0, sizeof(*fmt_port_pcd));
92737 +
92738 +       /* debugging stuff */
92739 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92740 +       _fmt_dbg(" portid: %u.\n", fmt_port->id);
92741 +       _fmt_dbg(" frames enqueue to qman: %u.\n",
92742 +                       atomic_read(&fmt_port->enqueue_to_qman_frm));
92743 +       _fmt_dbg(" frames enqueue to rxq: %u.\n",
92744 +                       atomic_read(&fmt_port->enqueue_to_rxq));
92745 +       _fmt_dbg(" frames dequeue from rxq: %u.\n",
92746 +                       atomic_read(&fmt_port->dequeue_from_rxq));
92747 +       _fmt_dbg(" frames not enqueue to rxq - wrong frm: %u.\n",
92748 +                       atomic_read(&fmt_port->not_enqueue_to_rxq_wrong_frm));
92749 +       atomic_set(&fmt_port->enqueue_to_qman_frm, 0);
92750 +       atomic_set(&fmt_port->enqueue_to_rxq, 0);
92751 +       atomic_set(&fmt_port->dequeue_from_rxq, 0);
92752 +       atomic_set(&fmt_port->not_enqueue_to_rxq_wrong_frm, 0);
92753 +#endif
92754 +       return 0;
92755 +
92756 +_pcd_free_fqs_err:
92757 +       return _err;
92758 +}
92759 +
92760 +static int fmt_port_init(
92761 +       struct fmt_port_s *fmt_port,
92762 +       ioc_fmt_port_param_t *p_Params)
92763 +{
92764 +       struct device_node  *fm_node, *fm_port_node;
92765 +       const uint32_t      *uint32_prop;
92766 +       int                 _errno = 0, lenp = 0, i;
92767 +       static struct of_device_id fm_node_of_match[] = {
92768 +               { .compatible = "fsl,fman", },
92769 +               { /* end of list */ },
92770 +               };
92771 +
92772 +       _fmt_dbg("calling...\n");
92773 +
92774 +       /* init send/receive tu US list */
92775 +       INIT_LIST_HEAD(&fmt_port->rx_q);
92776 +
92777 +       /* check parameters */
92778 +       if (p_Params->num_tx_queues > FMAN_TEST_MAX_TX_FQS ||
92779 +               p_Params->fm_port_id > IOC_FMT_MAX_NUM_OF_PORTS) {
92780 +               _fmt_dbg("wrong test parameters.\n");
92781 +               return -EINVAL;
92782 +       }
92783 +
92784 +       /* set port parameters */
92785 +       fmt_port->num_of_tx_fqs = p_Params->num_tx_queues;
92786 +       fmt_port->id = p_Params->fm_port_id;
92787 +       fmt_port->port_type = p_Params->fm_port_type;
92788 +       fmt_port->diag = e_IOC_DIAG_MODE_NONE;
92789 +
92790 +       /* init debugging stuff */
92791 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
92792 +       atomic_set(&fmt_port->enqueue_to_qman_frm, 0);
92793 +       atomic_set(&fmt_port->enqueue_to_rxq, 0);
92794 +       atomic_set(&fmt_port->dequeue_from_rxq, 0);
92795 +       atomic_set(&fmt_port->not_enqueue_to_rxq_wrong_frm, 0);
92796 +#endif
92797 +
92798 +       /* TODO: This should be done at probe time not at runtime
92799 +        *      very ugly function */
92800 +       /* fill fmt port properties from dts */
92801 +       for_each_matching_node(fm_node, fm_node_of_match) {
92802 +
92803 +       uint32_prop = (uint32_t *)of_get_property(fm_node,
92804 +                                               "cell-index", &lenp);
92805 +       if (unlikely(uint32_prop == NULL)) {
92806 +               _fmt_wrn("of_get_property(%s, cell-index) invalid",
92807 +                                               fm_node->full_name);
92808 +               return -EINVAL;
92809 +       }
92810 +       if (WARN_ON(lenp != sizeof(uint32_t))) {
92811 +               _fmt_wrn("of_get_property(%s, cell-index) invalid",
92812 +                                               fm_node->full_name);
92813 +               return -EINVAL;
92814 +       }
92815 +
92816 +       if (*uint32_prop == p_Params->fm_id) {
92817 +               struct resource res;
92818 +
92819 +               /* Get the FM address */
92820 +               _errno = of_address_to_resource(fm_node, 0, &res);
92821 +               if (unlikely(_errno < 0)) {
92822 +                       _fmt_wrn("of_address_to_resource() = %u.\n", _errno);
92823 +                       return -EINVAL;
92824 +               }
92825 +
92826 +               fmt_port->fm_phys_base_addr = res.start;
92827 +
92828 +               for_each_child_of_node(fm_node, fm_port_node) {
92829 +               struct platform_device    *of_dev;
92830 +
92831 +               if (!of_device_is_available(fm_port_node))
92832 +                       continue;
92833 +
92834 +               uint32_prop = (uint32_t *)of_get_property(
92835 +                                               fm_port_node,
92836 +                                               "cell-index",
92837 +                                               &lenp);
92838 +               if (uint32_prop == NULL)
92839 +                       continue;
92840 +
92841 +               if (of_device_is_compatible(fm_port_node,
92842 +                                               "fsl,fman-port-oh") &&
92843 +                       (fmt_port->port_type  == e_IOC_FMT_PORT_T_OP)) {
92844 +
92845 +                       if (*uint32_prop == fmt_port->id) {
92846 +                               of_dev = of_find_device_by_node(fm_port_node);
92847 +                               if (unlikely(of_dev == NULL)) {
92848 +                                       _fmt_wrn("fm id invalid\n");
92849 +                                       return -EINVAL;
92850 +                               }
92851 +
92852 +                               fmt_port->p_tx_port =
92853 +                                               fm_port_bind(&of_dev->dev);
92854 +                               fmt_port->p_tx_fm_port_dev =
92855 +                                               (void  *)fm_port_get_handle(
92856 +                                                       fmt_port->p_tx_port);
92857 +                               fmt_port->p_rx_port =
92858 +                                               fmt_port->p_tx_port;
92859 +                               fmt_port->p_rx_fm_port_dev =
92860 +                                               fmt_port->p_tx_fm_port_dev;
92861 +                               fmt_port->p_mac_dev = NULL;
92862 +                       break;
92863 +                       }
92864 +               } else if ((*uint32_prop == fmt_port->id) &&
92865 +                       fmt_port->port_type == e_IOC_FMT_PORT_T_RXTX) {
92866 +
92867 +                       of_dev = of_find_device_by_node(fm_port_node);
92868 +                       if (unlikely(of_dev == NULL)) {
92869 +                               _fmt_wrn("dtb fm id invalid value");
92870 +                               return -EINVAL;
92871 +                       }
92872 +
92873 +                       if (of_device_is_compatible(fm_port_node,
92874 +                                          "fsl,fman-port-1g-tx")) {
92875 +                               fmt_port->p_tx_port =
92876 +                                               fm_port_bind(&of_dev->dev);
92877 +                               fmt_port->p_tx_fm_port_dev = (void  *)
92878 +                                               fm_port_get_handle(
92879 +                                                       fmt_port->p_tx_port);
92880 +                       } else if (of_device_is_compatible(fm_port_node,
92881 +                                                     "fsl,fman-port-1g-rx")) {
92882 +                               fmt_port->p_rx_port =
92883 +                                               fm_port_bind(&of_dev->dev);
92884 +                               fmt_port->p_rx_fm_port_dev = (void  *)
92885 +                                               fm_port_get_handle(
92886 +                                                       fmt_port->p_rx_port);
92887 +                       } else if (of_device_is_compatible(fm_port_node,
92888 +                                                       "fsl,fman-1g-mac") ||
92889 +                                  of_device_is_compatible(fm_port_node,
92890 +                                                       "fsl,fman-memac"))
92891 +                               fmt_port->p_mac_dev =
92892 +                                               (typeof(fmt_port->p_mac_dev))
92893 +                                               dev_get_drvdata(&of_dev->dev);
92894 +                       else
92895 +                               continue;
92896 +
92897 +                       if (fmt_port->p_tx_fm_port_dev &&
92898 +                       fmt_port->p_rx_fm_port_dev && fmt_port->p_mac_dev)
92899 +                               break;
92900 +               } else if (((*uint32_prop + FM_MAX_NUM_OF_1G_RX_PORTS) ==
92901 +                               fmt_port->id) &&
92902 +                               fmt_port->port_type == e_IOC_FMT_PORT_T_RXTX) {
92903 +
92904 +                       of_dev = of_find_device_by_node(fm_port_node);
92905 +                       if (unlikely(of_dev == NULL)) {
92906 +                               _fmt_wrn("dtb fm id invalid value\n");
92907 +                               return -EINVAL;
92908 +                       }
92909 +
92910 +                       if (of_device_is_compatible(fm_port_node,
92911 +                                            "fsl,fman-port-10g-tx")) {
92912 +                               fmt_port->p_tx_port =
92913 +                                               fm_port_bind(&of_dev->dev);
92914 +                               fmt_port->p_tx_fm_port_dev = (void *)
92915 +                                               fm_port_get_handle(
92916 +                                                       fmt_port->p_tx_port);
92917 +                       } else if (of_device_is_compatible(fm_port_node,
92918 +                                                    "fsl,fman-port-10g-rx")) {
92919 +                               fmt_port->p_rx_port =
92920 +                                               fm_port_bind(&of_dev->dev);
92921 +                               fmt_port->p_rx_fm_port_dev = (void *)
92922 +                                               fm_port_get_handle(
92923 +                                                       fmt_port->p_rx_port);
92924 +                       } else if (of_device_is_compatible(fm_port_node,
92925 +                                                       "fsl,fman-10g-mac") ||
92926 +                                  of_device_is_compatible(fm_port_node,
92927 +                                                       "fsl,fman-memac"))
92928 +                               fmt_port->p_mac_dev =
92929 +                                               (typeof(fmt_port->p_mac_dev))
92930 +                                               dev_get_drvdata(&of_dev->dev);
92931 +                       else
92932 +                               continue;
92933 +
92934 +                       if (fmt_port->p_tx_fm_port_dev &&
92935 +                       fmt_port->p_rx_fm_port_dev && fmt_port->p_mac_dev)
92936 +                               break;
92937 +                       }
92938 +               } /* for_each_child */
92939 +       }
92940 +       } /* for each matching node */
92941 +
92942 +       if (fmt_port->p_tx_fm_port_dev == 0 ||
92943 +               fmt_port->p_rx_fm_port_dev == 0) {
92944 +
92945 +               _fmt_err("bad fm port pointers.\n");
92946 +               return -EINVAL;
92947 +       }
92948 +
92949 +       _fmt_dbg("alloc %u tx queues.\n", fmt_port->num_of_tx_fqs);
92950 +
92951 +       /* init fman test egress dynamic frame queues */
92952 +       for (i = 0; i < fmt_port->num_of_tx_fqs; i++) {
92953 +               int _errno;
92954 +               _errno = fmt_fq_alloc(
92955 +                               &fmt_port->p_tx_fqs[i],
92956 +                               &fmt_egress_fq,
92957 +                               0,
92958 +                               QMAN_FQ_FLAG_TO_DCPORTAL,
92959 +                               fm_get_tx_port_channel(fmt_port->p_tx_port),
92960 +                               i);
92961 +
92962 +               if (_errno < 0) {
92963 +                       _fmt_err("tx queues allocation failed.\n");
92964 +                       /* TODO: memory leak here if 1 queue is allocated and
92965 +                       * next queues are failing ... */
92966 +                       return -EINVAL;
92967 +               }
92968 +       }
92969 +
92970 +       /* port is valid and ready to use. */
92971 +       fmt_port->valid  = TRUE;
92972 +
92973 +       _fmt_dbg("called.\n");
92974 +       return 0;
92975 +}
92976 +
92977 +/* fm test chardev functions */
92978 +static int fmt_open(struct inode *inode, struct file *file)
92979 +{
92980 +       unsigned int minor = iminor(inode);
92981 +
92982 +       _fmt_dbg("calling...\n");
92983 +
92984 +       if (file->private_data != NULL)
92985 +               return 0;
92986 +
92987 +       /* The minor represent the port number.
92988 +        * Set the port structure accordingly, thus all the operations
92989 +        * will be done on this port. */
92990 +       if ((minor >= DEV_FM_TEST_PORTS_MINOR_BASE) &&
92991 +           (minor < DEV_FM_TEST_MAX_MINORS))
92992 +               file->private_data = &fm_test.ports[minor];
92993 +       else
92994 +               return -ENXIO;
92995 +
92996 +       _fmt_dbg("called.\n");
92997 +       return 0;
92998 +}
92999 +
93000 +static int fmt_close(struct inode *inode, struct file *file)
93001 +{
93002 +       struct fmt_port_s *fmt_port = NULL;
93003 +       struct fmt_frame_s *fmt_frame = NULL;
93004 +
93005 +       int err = 0;
93006 +
93007 +       _fmt_dbg("calling...\n");
93008 +
93009 +       fmt_port = file->private_data;
93010 +       if (!fmt_port)
93011 +               return -ENODEV;
93012 +
93013 +       /* Close the current test port by invalidating it. */
93014 +       fmt_port->valid = FALSE;
93015 +
93016 +       /* clean the fmt port queue */
93017 +       while ((fmt_frame = dequeue_fmt_frame(fmt_port)) != NULL) {
93018 +               if (fmt_frame && fmt_frame->buff.p_data){
93019 +               kfree(fmt_frame->buff.p_data);
93020 +               kfree(fmt_frame);
93021 +       }
93022 +       }
93023 +
93024 +       /* !!! the qman queues are cleaning from fm_ioctl...
93025 +        * - very ugly */
93026 +
93027 +       _fmt_dbg("called.\n");
93028 +       return err;
93029 +}
93030 +
93031 +static int fmt_ioctls(unsigned int minor,
93032 +                       struct file *file,
93033 +                       unsigned int cmd,
93034 +                       unsigned long arg,
93035 +                       bool compat)
93036 +{
93037 +       struct fmt_port_s *fmt_port = NULL;
93038 +
93039 +       _fmt_dbg("IOCTL minor:%u "
93040 +                 " arg:0x%08lx ioctl cmd (0x%08x):(0x%02x:0x%02x.\n",
93041 +                  minor, arg, cmd, _IOC_TYPE(cmd), _IOC_NR(cmd));
93042 +
93043 +       fmt_port = file->private_data;
93044 +       if (!fmt_port) {
93045 +               _fmt_err("invalid fmt port.\n");
93046 +               return -ENODEV;
93047 +       }
93048 +
93049 +       /* set test type properly */
93050 +       if (compat)
93051 +               fmt_port->compat_test_type = true;
93052 +       else
93053 +               fmt_port->compat_test_type = false;
93054 +
93055 +       switch (cmd) {
93056 +       case FMT_PORT_IOC_INIT:
93057 +       {
93058 +               ioc_fmt_port_param_t param;
93059 +
93060 +               if (fmt_port->valid) {
93061 +                       _fmt_wrn("port is already initialized.\n");
93062 +                       return -EFAULT;
93063 +               }
93064 +#if defined(CONFIG_COMPAT)
93065 +               if (compat) {
93066 +                       if (copy_from_user(&param,
93067 +                               (ioc_fmt_port_param_t  *)compat_ptr(arg),
93068 +                               sizeof(ioc_fmt_port_param_t)))
93069 +
93070 +                               return -EFAULT;
93071 +               } else
93072 +#endif
93073 +               {
93074 +                       if (copy_from_user(&param,
93075 +                               (ioc_fmt_port_param_t  *) arg,
93076 +                               sizeof(ioc_fmt_port_param_t)))
93077 +
93078 +                               return -EFAULT;
93079 +               }
93080 +
93081 +               return fmt_port_init(fmt_port, &param);
93082 +       }
93083 +
93084 +       case FMT_PORT_IOC_SET_DIAG_MODE:
93085 +               if (get_user(fmt_port->diag, (ioc_diag_mode  *)arg))
93086 +                       return -EFAULT;
93087 +
93088 +               if (fmt_port->diag == e_IOC_DIAG_MODE_CTRL_LOOPBACK)
93089 +                       return set_mac_int_loopback(fmt_port, TRUE);
93090 +               else
93091 +                       return set_mac_int_loopback(fmt_port, FALSE);
93092 +       break;
93093 +
93094 +       case FMT_PORT_IOC_SET_DPAECHO_MODE:
93095 +       case FMT_PORT_IOC_SET_IP_HEADER_MANIP:
93096 +       default:
93097 +               _fmt_wrn("ioctl unimplemented minor:%u@ioctl"
93098 +                         " cmd:0x%08x(type:0x%02x, nr:0x%02x.\n",
93099 +                         minor, cmd, _IOC_TYPE(cmd), _IOC_NR(cmd));
93100 +       return -EFAULT;
93101 +       }
93102 +
93103 +       return 0;
93104 +}
93105 +
93106 +#ifdef CONFIG_COMPAT
93107 +static long fmt_compat_ioctl(
93108 +               struct file *file,
93109 +               unsigned int cmd,
93110 +               unsigned long arg)
93111 +{
93112 +       unsigned int minor = iminor(file->f_path.dentry->d_inode);
93113 +
93114 +       _fmt_dbg("calling...\n");
93115 +       return fmt_ioctls(minor, file, cmd, arg, true);
93116 +}
93117 +#endif
93118 +
93119 +static long fmt_ioctl(
93120 +               struct file *file,
93121 +               unsigned int cmd,
93122 +               unsigned long arg)
93123 +{
93124 +       unsigned int minor = iminor(file->f_path.dentry->d_inode);
93125 +       unsigned int res;
93126 +
93127 +       _fmt_dbg("calling...\n");
93128 +
93129 +       fm_mutex_lock();
93130 +       res = fmt_ioctls(minor, file, cmd, arg, false);
93131 +       fm_mutex_unlock();
93132 +
93133 +       _fmt_dbg("called.\n");
93134 +
93135 +       return res;
93136 +}
93137 +
93138 +#ifdef CONFIG_COMPAT
93139 +void copy_compat_test_frame_buffer(
93140 +               ioc_fmt_buff_desc_t *buff,
93141 +               ioc_fmt_compat_buff_desc_t *compat_buff)
93142 +{
93143 +       compat_buff->qid = buff->qid;
93144 +       compat_buff->p_data = ptr_to_compat(buff->p_data);
93145 +       compat_buff->size = buff->size;
93146 +       compat_buff->status = buff->status;
93147 +
93148 +       compat_buff->buff_context.p_user_priv =
93149 +                       ptr_to_compat(buff->buff_context.p_user_priv);
93150 +       memcpy(compat_buff->buff_context.fm_prs_res,
93151 +                       buff->buff_context.fm_prs_res,
93152 +                       FM_PRS_MAX * sizeof(uint8_t));
93153 +       memcpy(compat_buff->buff_context.fm_time_stamp,
93154 +                       buff->buff_context.fm_time_stamp,
93155 +                       FM_TIME_STAMP_MAX * sizeof(uint8_t));
93156 +}
93157 +#endif
93158 +
93159 +ssize_t fmt_read(
93160 +               struct file *file,
93161 +               char __user *buf,
93162 +               size_t size,
93163 +               loff_t *ppos)
93164 +{
93165 +       struct fmt_port_s *fmt_port = NULL;
93166 +       struct fmt_frame_s *p_fmt_frame = NULL;
93167 +       ssize_t cnt = 0;
93168 +
93169 +       fmt_port = file->private_data;
93170 +       if (!fmt_port || !fmt_port->valid) {
93171 +               _fmt_err("fmt port not valid!\n");
93172 +               return -ENODEV;
93173 +       }
93174 +
93175 +       p_fmt_frame = dequeue_fmt_frame(fmt_port);
93176 +       if (p_fmt_frame == NULL)
93177 +               return 0;
93178 +
93179 +       _fmt_dbgr("calling...\n");
93180 +
93181 +#ifdef CONFIG_COMPAT
93182 +       if (fmt_port->compat_test_type){
93183 +               cnt = sizeof(ioc_fmt_compat_buff_desc_t);
93184 +       }
93185 +       else
93186 +#endif
93187 +       {
93188 +               cnt = sizeof(ioc_fmt_buff_desc_t);
93189 +       }
93190 +
93191 +       if (size < cnt) {
93192 +               _fmt_err("illegal buffer-size!\n");
93193 +               cnt = 0;
93194 +               goto _fmt_read_return;
93195 +       }
93196 +
93197 +        /* Copy structure */
93198 +#ifdef CONFIG_COMPAT
93199 +       if (fmt_port->compat_test_type) {
93200 +               {
93201 +                       ioc_fmt_compat_buff_desc_t compat_buff;
93202 +                       copy_compat_test_frame_buffer(&p_fmt_frame->buff,
93203 +                                                               &compat_buff);
93204 +
93205 +                       if (copy_to_user(buf, &compat_buff, cnt)) {
93206 +                               _fmt_err("copy_to_user failed!\n");
93207 +                               goto _fmt_read_return;
93208 +                       }
93209 +               }
93210 +
93211 +               ((ioc_fmt_compat_buff_desc_t  *)buf)->p_data =
93212 +                       ptr_to_compat(buf+sizeof(ioc_fmt_compat_buff_desc_t));
93213 +               cnt += MIN(p_fmt_frame->buff.size, size-cnt);
93214 +       } else
93215 +#endif
93216 +       {
93217 +               if (copy_to_user(buf, &p_fmt_frame->buff, cnt)) {
93218 +                       _fmt_err("copy_to_user failed!\n");
93219 +                       goto _fmt_read_return;
93220 +               }
93221 +
93222 +               ((ioc_fmt_buff_desc_t  *)buf)->p_data =
93223 +                               buf + sizeof(ioc_fmt_buff_desc_t);
93224 +               cnt += MIN(p_fmt_frame->buff.size, size-cnt);
93225 +       }
93226 +
93227 +       if (size < cnt) {
93228 +               _fmt_err("illegal buffer-size!\n");
93229 +               goto _fmt_read_return;
93230 +       }
93231 +
93232 +       /* copy frame */
93233 +#ifdef CONFIG_COMPAT
93234 +       if (fmt_port->compat_test_type) {
93235 +               if (copy_to_user(buf+sizeof(ioc_fmt_compat_buff_desc_t),
93236 +                                       p_fmt_frame->buff.p_data, cnt)) {
93237 +                       _fmt_err("copy_to_user failed!\n");
93238 +                       goto _fmt_read_return;
93239 +               }
93240 +       } else
93241 +#endif
93242 +       {
93243 +               if (copy_to_user(buf+sizeof(ioc_fmt_buff_desc_t),
93244 +                                       p_fmt_frame->buff.p_data, cnt)) {
93245 +                       _fmt_err("copy_to_user failed!\n");
93246 +                       goto _fmt_read_return;
93247 +               }
93248 +       }
93249 +
93250 +_fmt_read_return:
93251 +       kfree(p_fmt_frame->buff.p_data);
93252 +       kfree(p_fmt_frame);
93253 +
93254 +       _fmt_dbgr("called.\n");
93255 +       return cnt;
93256 +}
93257 +
93258 +ssize_t fmt_write(
93259 +               struct file *file,
93260 +               const char __user *buf,
93261 +               size_t size,
93262 +               loff_t *ppos)
93263 +{
93264 +       struct fmt_port_s *fmt_port = NULL;
93265 +       ioc_fmt_buff_desc_t buff_desc;
93266 +#ifdef CONFIG_COMPAT
93267 +       ioc_fmt_compat_buff_desc_t buff_desc_compat;
93268 +#endif
93269 +       uint8_t *p_data = NULL;
93270 +       uint32_t data_offset;
93271 +       int _errno;
93272 +       t_DpaaFD fd;
93273 +
93274 +       _fmt_dbgr("calling...\n");
93275 +
93276 +       fmt_port = file->private_data;
93277 +       if (!fmt_port || !fmt_port->valid) {
93278 +               _fmt_err("fmt port not valid.\n");
93279 +               return -EINVAL;
93280 +       }
93281 +
93282 +    /* If Compat (32B UserSpace - 64B KernelSpace)  */
93283 +#ifdef CONFIG_COMPAT
93284 +       if (fmt_port->compat_test_type) {
93285 +               if (size < sizeof(ioc_fmt_compat_buff_desc_t)) {
93286 +                       _fmt_err("invalid buff_desc size.\n");
93287 +                       return -EFAULT;
93288 +               }
93289 +
93290 +               if (copy_from_user(&buff_desc_compat, buf,
93291 +                                       sizeof(ioc_fmt_compat_buff_desc_t)))
93292 +                       return -EFAULT;
93293 +
93294 +               buff_desc.qid = buff_desc_compat.qid;
93295 +               buff_desc.p_data = compat_ptr(buff_desc_compat.p_data);
93296 +               buff_desc.size = buff_desc_compat.size;
93297 +               buff_desc.status = buff_desc_compat.status;
93298 +
93299 +               buff_desc.buff_context.p_user_priv =
93300 +                       compat_ptr(buff_desc_compat.buff_context.p_user_priv);
93301 +               memcpy(buff_desc.buff_context.fm_prs_res,
93302 +                               buff_desc_compat.buff_context.fm_prs_res,
93303 +                               FM_PRS_MAX * sizeof(uint8_t));
93304 +               memcpy(buff_desc.buff_context.fm_time_stamp,
93305 +                               buff_desc_compat.buff_context.fm_time_stamp,
93306 +                               FM_TIME_STAMP_MAX * sizeof(uint8_t));
93307 +       } else
93308 +#endif
93309 +       {
93310 +               if (size < sizeof(ioc_fmt_buff_desc_t)) {
93311 +                       _fmt_err("invalid buff_desc size.\n");
93312 +                       return -EFAULT;
93313 +               }
93314 +
93315 +               if (copy_from_user(&buff_desc, (ioc_fmt_buff_desc_t  *)buf,
93316 +                                       sizeof(ioc_fmt_buff_desc_t)))
93317 +                       return -EFAULT;
93318 +       }
93319 +
93320 +       data_offset = FM_PORT_GetBufferDataOffset(fmt_port->p_tx_fm_port_dev);
93321 +       p_data = kmalloc(buff_desc.size+data_offset, GFP_KERNEL);
93322 +       if (!p_data)
93323 +               return -ENOMEM;
93324 +
93325 +       /* If Compat (32UserSpace - 64KernelSpace) the buff_desc.p_data is ok */
93326 +       if (copy_from_user((uint8_t *)PTR_MOVE(p_data, data_offset),
93327 +                               buff_desc.p_data,
93328 +                               buff_desc.size)) {
93329 +               kfree(p_data);
93330 +               return -EFAULT;
93331 +       }
93332 +
93333 +       /* TODO: dma_map_single here (cannot access the bpool struct) */
93334 +
93335 +       /* prepare fd */
93336 +       memset(&fd, 0, sizeof(fd));
93337 +       DPAA_FD_SET_ADDR(&fd, p_data);
93338 +       DPAA_FD_SET_OFFSET(&fd, data_offset);
93339 +       DPAA_FD_SET_LENGTH(&fd, buff_desc.size);
93340 +
93341 +       _errno = qman_enqueue(&fmt_port->p_tx_fqs[buff_desc.qid].fq_base,
93342 +                                                       (struct qm_fd *)&fd, 0);
93343 +       if (_errno) {
93344 +               buff_desc.status = (uint32_t)_errno;
93345 +               if (copy_to_user((ioc_fmt_buff_desc_t *)buf, &buff_desc,
93346 +                                               sizeof(ioc_fmt_buff_desc_t))) {
93347 +                       kfree(p_data);
93348 +                       return -EFAULT;
93349 +               }
93350 +       }
93351 +
93352 +       /* for debugging */
93353 +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
93354 +       atomic_inc(&fmt_port->enqueue_to_qman_frm);
93355 +#endif
93356 +       _fmt_dbgr("called.\n");
93357 +       return buff_desc.size;
93358 +}
93359 +
93360 +/* fm test character device definition */
93361 +static const struct file_operations fmt_fops =
93362 +{
93363 +       .owner                  = THIS_MODULE,
93364 +#ifdef CONFIG_COMPAT
93365 +       .compat_ioctl           = fmt_compat_ioctl,
93366 +#endif
93367 +       .unlocked_ioctl         = fmt_ioctl,
93368 +       .open                   = fmt_open,
93369 +       .release                = fmt_close,
93370 +       .read                   = fmt_read,
93371 +       .write                  = fmt_write,
93372 +};
93373 +
93374 +static int fmt_init(void)
93375 +{
93376 +       int id;
93377 +
93378 +       _fmt_dbg("calling...\n");
93379 +
93380 +       /* Register to the /dev for IOCTL API */
93381 +       /* Register dynamically a new major number for the character device: */
93382 +       fm_test.major = register_chrdev(0, DEV_FM_TEST_NAME, &fmt_fops);
93383 +       if (fm_test.major  <= 0) {
93384 +               _fmt_wrn("Failed to allocate major number for device %s.\n",
93385 +                                                       DEV_FM_TEST_NAME);
93386 +               return -ENODEV;
93387 +       }
93388 +
93389 +       /* Creating class for FMan_test */
93390 +       fm_test.fmt_class = class_create(THIS_MODULE, DEV_FM_TEST_NAME);
93391 +       if (IS_ERR(fm_test.fmt_class)) {
93392 +               unregister_chrdev(fm_test.major, DEV_FM_TEST_NAME);
93393 +               _fmt_wrn("Error creating %s class.\n", DEV_FM_TEST_NAME);
93394 +               return -ENODEV;
93395 +       }
93396 +
93397 +       for (id = 0; id < IOC_FMT_MAX_NUM_OF_PORTS; id++)
93398 +               if (NULL == device_create(fm_test.fmt_class, NULL,
93399 +                               MKDEV(fm_test.major,
93400 +                               DEV_FM_TEST_PORTS_MINOR_BASE + id), NULL,
93401 +                               DEV_FM_TEST_NAME "%d", id)) {
93402 +
93403 +                       _fmt_err("Error creating %s device.\n",
93404 +                                                       DEV_FM_TEST_NAME);
93405 +                       return -ENODEV;
93406 +               }
93407 +
93408 +       return 0;
93409 +}
93410 +
93411 +static void  fmt_free(void)
93412 +{
93413 +       int id;
93414 +
93415 +       for (id = 0; id < IOC_FMT_MAX_NUM_OF_PORTS; id++)
93416 +               device_destroy(fm_test.fmt_class, MKDEV(fm_test.major,
93417 +                       DEV_FM_TEST_PORTS_MINOR_BASE + id));
93418 +       class_destroy(fm_test.fmt_class);
93419 +}
93420 +
93421 +static int __init __cold fmt_load(void)
93422 +{
93423 +       struct dpaa_eth_hooks_s priv_dpaa_eth_hooks;
93424 +
93425 +       /* set dpaa hooks for default queues */
93426 +       memset(&priv_dpaa_eth_hooks, 0, sizeof(priv_dpaa_eth_hooks));
93427 +       priv_dpaa_eth_hooks.rx_default = fmt_rx_default_hook;
93428 +       priv_dpaa_eth_hooks.rx_error = fmt_rx_error_hook;
93429 +       priv_dpaa_eth_hooks.tx_confirm = fmt_tx_confirm_hook;
93430 +       priv_dpaa_eth_hooks.tx_error = fmt_tx_confirm_error_hook;
93431 +
93432 +       fsl_dpaa_eth_set_hooks(&priv_dpaa_eth_hooks);
93433 +
93434 +       /* initialize the fman test environment */
93435 +       if (fmt_init() < 0) {
93436 +               _fmt_err("Failed to init FM-test modul.\n");
93437 +               fmt_free();
93438 +               return -ENODEV;
93439 +       }
93440 +
93441 +       _fmt_inf("FSL FM test module loaded.\n");
93442 +
93443 +       return 0;
93444 +}
93445 +
93446 +static void __exit __cold fmt_unload(void)
93447 +{
93448 +       fmt_free();
93449 +       _fmt_inf("FSL FM test module unloaded.\n");
93450 +}
93451 +
93452 +module_init(fmt_load);
93453 +module_exit(fmt_unload);
93454 --- /dev/null
93455 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.c
93456 @@ -0,0 +1,2908 @@
93457 +/*
93458 + * Copyright 2008-2012 Freescale Semiconductor Inc.
93459 + *
93460 + * Redistribution and use in source and binary forms, with or without
93461 + * modification, are permitted provided that the following conditions are met:
93462 + *     * Redistributions of source code must retain the above copyright
93463 + *       notice, this list of conditions and the following disclaimer.
93464 + *     * Redistributions in binary form must reproduce the above copyright
93465 + *       notice, this list of conditions and the following disclaimer in the
93466 + *       documentation and/or other materials provided with the distribution.
93467 + *     * Neither the name of Freescale Semiconductor nor the
93468 + *       names of its contributors may be used to endorse or promote products
93469 + *       derived from this software without specific prior written permission.
93470 + *
93471 + *
93472 + * ALTERNATIVELY, this software may be distributed under the terms of the
93473 + * GNU General Public License ("GPL") as published by the Free Software
93474 + * Foundation, either version 2 of that License or (at your option) any
93475 + * later version.
93476 + *
93477 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
93478 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
93479 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
93480 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
93481 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
93482 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
93483 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
93484 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
93485 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
93486 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
93487 + */
93488 +
93489 +/*
93490 + @File          lnxwrp_fm.c
93491 + @Author        Shlomi Gridish
93492 + @Description   FM Linux wrapper functions.
93493 +*/
93494 +
93495 +#include <linux/version.h>
93496 +#include <linux/slab.h>
93497 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
93498 +#define MODVERSIONS
93499 +#endif
93500 +#ifdef MODVERSIONS
93501 +#include <config/modversions.h>
93502 +#endif /* MODVERSIONS */
93503 +#include <linux/kernel.h>
93504 +#include <linux/module.h>
93505 +#include <linux/fs.h>
93506 +#include <linux/cdev.h>
93507 +#include <linux/device.h>
93508 +#include <linux/irq.h>
93509 +#include <linux/interrupt.h>
93510 +#include <linux/io.h>
93511 +#include <linux/ioport.h>
93512 +#include <linux/of_platform.h>
93513 +#include <linux/of_address.h>
93514 +#include <linux/of_irq.h>
93515 +#include <linux/clk.h>
93516 +#include <asm/uaccess.h>
93517 +#include <asm/errno.h>
93518 +#ifndef CONFIG_FMAN_ARM
93519 +#include <sysdev/fsl_soc.h>
93520 +#include <linux/fsl/guts.h>
93521 +#include <linux/fsl/svr.h>
93522 +#endif
93523 +#include <linux/stat.h>           /* For file access mask */
93524 +#include <linux/skbuff.h>
93525 +#include <linux/proc_fs.h>
93526 +
93527 +/* NetCommSw Headers --------------- */
93528 +#include "std_ext.h"
93529 +#include "error_ext.h"
93530 +#include "sprint_ext.h"
93531 +#include "debug_ext.h"
93532 +#include "sys_io_ext.h"
93533 +
93534 +#include "fm_ioctls.h"
93535 +
93536 +#include "lnxwrp_fm.h"
93537 +#include "lnxwrp_resources.h"
93538 +#include "lnxwrp_sysfs_fm.h"
93539 +#include "lnxwrp_sysfs_fm_port.h"
93540 +#include "lnxwrp_exp_sym.h"
93541 +#include "fm_common.h"
93542 +#include "../../sdk_fman/Peripherals/FM/fm.h"
93543 +#define __ERR_MODULE__  MODULE_FM
93544 +
93545 +extern struct device_node *GetFmPortAdvArgsDevTreeNode (struct device_node *fm_node,
93546 +                                                         e_FmPortType       portType,
93547 +                                                         uint8_t            portId);
93548 +
93549 +#define PROC_PRINT(args...) offset += sprintf(buf+offset,args)
93550 +
93551 +#define ADD_ADV_CONFIG_NO_RET(_func, _param)    \
93552 +    do {                                        \
93553 +        if (i<max){                             \
93554 +            p_Entry = &p_Entrys[i];             \
93555 +            p_Entry->p_Function = _func;        \
93556 +            _param                              \
93557 +            i++;                                \
93558 +        }                                       \
93559 +        else                                    \
93560 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE,\
93561 +                         ("Number of advanced-configuration entries exceeded"));\
93562 +    } while (0)
93563 +
93564 +/* Bootarg used to override the Kconfig FSL_FM_MAX_FRAME_SIZE value */
93565 +#define FSL_FM_MAX_FRM_BOOTARG     "fsl_fm_max_frm"
93566 +
93567 +/* Bootarg used to override FSL_FM_RX_EXTRA_HEADROOM Kconfig value */
93568 +#define FSL_FM_RX_EXTRA_HEADROOM_BOOTARG  "fsl_fm_rx_extra_headroom"
93569 +
93570 +/* Minimum and maximum value for the fsl_fm_rx_extra_headroom bootarg */
93571 +#define FSL_FM_RX_EXTRA_HEADROOM_MIN 16
93572 +#define FSL_FM_RX_EXTRA_HEADROOM_MAX 384
93573 +
93574 +#define FSL_FM_PAUSE_TIME_ENABLE 0xf000
93575 +#define FSL_FM_PAUSE_TIME_DISABLE 0
93576 +#define FSL_FM_PAUSE_THRESH_DEFAULT 0
93577 +
93578 +/*
93579 + * Max frame size, across all interfaces.
93580 + * Configurable from Kconfig or bootargs, to avoid allocating
93581 + * oversized (socket) buffers when not using jumbo frames.
93582 + * Must be large enough to accommodate the network MTU, but small enough
93583 + * to avoid wasting skb memory.
93584 + *
93585 + * Could be overridden once, at boot-time, via the
93586 + * fm_set_max_frm() callback.
93587 + */
93588 +int fsl_fm_max_frm = CONFIG_FSL_FM_MAX_FRAME_SIZE;
93589 +
93590 +/*
93591 + * Extra headroom for Rx buffers.
93592 + * FMan is instructed to allocate, on the Rx path, this amount of
93593 + * space at the beginning of a data buffer, beside the DPA private
93594 + * data area and the IC fields.
93595 + * Does not impact Tx buffer layout.
93596 + *
93597 + * Configurable from Kconfig or bootargs. Zero by default, it's needed
93598 + * on particular forwarding scenarios that add extra headers to the
93599 + * forwarded frame.
93600 + */
93601 +int fsl_fm_rx_extra_headroom = CONFIG_FSL_FM_RX_EXTRA_HEADROOM;
93602 +
93603 +#ifdef CONFIG_FMAN_PFC
93604 +static int fsl_fm_pfc_quanta[] = {
93605 +               CONFIG_FMAN_PFC_QUANTA_0,
93606 +               CONFIG_FMAN_PFC_QUANTA_1,
93607 +               CONFIG_FMAN_PFC_QUANTA_2,
93608 +               CONFIG_FMAN_PFC_QUANTA_3
93609 +};
93610 +#endif
93611 +
93612 +static t_LnxWrpFm   lnxWrpFm;
93613 +
93614 +int fm_get_max_frm()
93615 +{
93616 +       return fsl_fm_max_frm;
93617 +}
93618 +EXPORT_SYMBOL(fm_get_max_frm);
93619 +
93620 +int fm_get_rx_extra_headroom()
93621 +{
93622 +       return ALIGN(fsl_fm_rx_extra_headroom, 16);
93623 +}
93624 +EXPORT_SYMBOL(fm_get_rx_extra_headroom);
93625 +
93626 +static int __init fm_set_max_frm(char *str)
93627 +{
93628 +       int ret = 0;
93629 +
93630 +       ret = get_option(&str, &fsl_fm_max_frm);
93631 +       if (ret != 1) {
93632 +               /*
93633 +                * This will only work if CONFIG_EARLY_PRINTK is compiled in,
93634 +                * and something like "earlyprintk=serial,uart0,115200" is
93635 +                * specified in the bootargs
93636 +                */
93637 +               printk(KERN_WARNING "No suitable %s=<int> prop in bootargs; "
93638 +                       "will use the default FSL_FM_MAX_FRAME_SIZE (%d) "
93639 +                       "from Kconfig.\n", FSL_FM_MAX_FRM_BOOTARG,
93640 +                       CONFIG_FSL_FM_MAX_FRAME_SIZE);
93641 +
93642 +               fsl_fm_max_frm = CONFIG_FSL_FM_MAX_FRAME_SIZE;
93643 +               return 1;
93644 +       }
93645 +
93646 +       /* Don't allow invalid bootargs; fallback to the Kconfig value */
93647 +       if (fsl_fm_max_frm < 64 || fsl_fm_max_frm > 9600) {
93648 +               printk(KERN_WARNING "Invalid %s=%d in bootargs, valid range is "
93649 +                       "64-9600. Falling back to the FSL_FM_MAX_FRAME_SIZE (%d) "
93650 +                       "from Kconfig.\n",
93651 +                       FSL_FM_MAX_FRM_BOOTARG, fsl_fm_max_frm,
93652 +                       CONFIG_FSL_FM_MAX_FRAME_SIZE);
93653 +
93654 +               fsl_fm_max_frm = CONFIG_FSL_FM_MAX_FRAME_SIZE;
93655 +               return 1;
93656 +       }
93657 +
93658 +       printk(KERN_INFO "Using fsl_fm_max_frm=%d from bootargs\n",
93659 +               fsl_fm_max_frm);
93660 +       return 0;
93661 +}
93662 +early_param(FSL_FM_MAX_FRM_BOOTARG, fm_set_max_frm);
93663 +
93664 +static int __init fm_set_rx_extra_headroom(char *str)
93665 +{
93666 +       int ret;
93667 +
93668 +       ret = get_option(&str, &fsl_fm_rx_extra_headroom);
93669 +
93670 +       if (ret != 1) {
93671 +               printk(KERN_WARNING "No suitable %s=<int> prop in bootargs; "
93672 +                       "will use the default FSL_FM_RX_EXTRA_HEADROOM (%d) "
93673 +                       "from Kconfig.\n", FSL_FM_RX_EXTRA_HEADROOM_BOOTARG,
93674 +                       CONFIG_FSL_FM_RX_EXTRA_HEADROOM);
93675 +               fsl_fm_rx_extra_headroom = CONFIG_FSL_FM_RX_EXTRA_HEADROOM;
93676 +
93677 +               return 1;
93678 +       }
93679 +
93680 +       if (fsl_fm_rx_extra_headroom < FSL_FM_RX_EXTRA_HEADROOM_MIN ||
93681 +               fsl_fm_rx_extra_headroom > FSL_FM_RX_EXTRA_HEADROOM_MAX) {
93682 +               printk(KERN_WARNING "Invalid value for %s=%d prop in "
93683 +                       "bootargs; will use the default "
93684 +                       "FSL_FM_RX_EXTRA_HEADROOM (%d) from Kconfig.\n",
93685 +                       FSL_FM_RX_EXTRA_HEADROOM_BOOTARG,
93686 +                       fsl_fm_rx_extra_headroom,
93687 +                       CONFIG_FSL_FM_RX_EXTRA_HEADROOM);
93688 +               fsl_fm_rx_extra_headroom = CONFIG_FSL_FM_RX_EXTRA_HEADROOM;
93689 +       }
93690 +
93691 +       printk(KERN_INFO "Using fsl_fm_rx_extra_headroom=%d from bootargs\n",
93692 +               fsl_fm_rx_extra_headroom);
93693 +
93694 +       return 0;
93695 +}
93696 +early_param(FSL_FM_RX_EXTRA_HEADROOM_BOOTARG, fm_set_rx_extra_headroom);
93697 +
93698 +static irqreturn_t fm_irq(int irq, void *_dev)
93699 +{
93700 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev *)_dev;
93701 +#ifdef CONFIG_PM_SLEEP
93702 +    t_Fm               *p_Fm = (t_Fm*)p_LnxWrpFmDev->h_Dev;
93703 +#endif
93704 +    if (!p_LnxWrpFmDev || !p_LnxWrpFmDev->h_Dev)
93705 +        return IRQ_NONE;
93706 +
93707 +#ifdef CONFIG_PM_SLEEP
93708 +    if (fman_get_normal_pending(p_Fm->p_FmFpmRegs) & INTR_EN_WAKEUP)
93709 +    {
93710 +        pm_wakeup_event(p_LnxWrpFmDev->dev, 200);
93711 +    }
93712 +#endif
93713 +    FM_EventIsr(p_LnxWrpFmDev->h_Dev);
93714 +    return IRQ_HANDLED;
93715 +}
93716 +
93717 +static irqreturn_t fm_err_irq(int irq, void *_dev)
93718 +{
93719 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev *)_dev;
93720 +
93721 +    if (!p_LnxWrpFmDev || !p_LnxWrpFmDev->h_Dev)
93722 +        return IRQ_NONE;
93723 +
93724 +    if (FM_ErrorIsr(p_LnxWrpFmDev->h_Dev) == E_OK)
93725 +        return IRQ_HANDLED;
93726 +
93727 +    return IRQ_NONE;
93728 +}
93729 +
93730 +/* used to protect FMD/LLD from concurrent calls in functions fm_mutex_lock / fm_mutex_unlock */
93731 +static struct mutex   lnxwrp_mutex;
93732 +
93733 +static t_LnxWrpFmDev * CreateFmDev(uint8_t  id)
93734 +{
93735 +    t_LnxWrpFmDev   *p_LnxWrpFmDev;
93736 +    int             j;
93737 +
93738 +    p_LnxWrpFmDev = (t_LnxWrpFmDev *)XX_Malloc(sizeof(t_LnxWrpFmDev));
93739 +    if (!p_LnxWrpFmDev)
93740 +    {
93741 +        REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
93742 +        return NULL;
93743 +    }
93744 +
93745 +    memset(p_LnxWrpFmDev, 0, sizeof(t_LnxWrpFmDev));
93746 +    p_LnxWrpFmDev->fmDevSettings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
93747 +    memset(p_LnxWrpFmDev->fmDevSettings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
93748 +    p_LnxWrpFmDev->fmPcdDevSettings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
93749 +    memset(p_LnxWrpFmDev->fmPcdDevSettings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
93750 +    p_LnxWrpFmDev->hcPort.settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
93751 +    memset(p_LnxWrpFmDev->hcPort.settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
93752 +    for (j=0; j<FM_MAX_NUM_OF_RX_PORTS; j++)
93753 +    {
93754 +        p_LnxWrpFmDev->rxPorts[j].settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
93755 +        memset(p_LnxWrpFmDev->rxPorts[j].settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
93756 +    }
93757 +    for (j=0; j<FM_MAX_NUM_OF_TX_PORTS; j++)
93758 +    {
93759 +        p_LnxWrpFmDev->txPorts[j].settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
93760 +        memset(p_LnxWrpFmDev->txPorts[j].settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
93761 +    }
93762 +    for (j=0; j<FM_MAX_NUM_OF_OH_PORTS-1; j++)
93763 +    {
93764 +        p_LnxWrpFmDev->opPorts[j].settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
93765 +        memset(p_LnxWrpFmDev->opPorts[j].settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
93766 +    }
93767 +
93768 +    return p_LnxWrpFmDev;
93769 +}
93770 +
93771 +static void DestroyFmDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
93772 +{
93773 +    int             j;
93774 +
93775 +    for (j=0; j<FM_MAX_NUM_OF_OH_PORTS-1; j++)
93776 +        if (p_LnxWrpFmDev->opPorts[j].settings.advConfig)
93777 +            XX_Free(p_LnxWrpFmDev->opPorts[j].settings.advConfig);
93778 +    for (j=0; j<FM_MAX_NUM_OF_TX_PORTS; j++)
93779 +        if (p_LnxWrpFmDev->txPorts[j].settings.advConfig)
93780 +            XX_Free(p_LnxWrpFmDev->txPorts[j].settings.advConfig);
93781 +    for (j=0; j<FM_MAX_NUM_OF_RX_PORTS; j++)
93782 +        if (p_LnxWrpFmDev->rxPorts[j].settings.advConfig)
93783 +            XX_Free(p_LnxWrpFmDev->rxPorts[j].settings.advConfig);
93784 +    if (p_LnxWrpFmDev->hcPort.settings.advConfig)
93785 +        XX_Free(p_LnxWrpFmDev->hcPort.settings.advConfig);
93786 +    if (p_LnxWrpFmDev->fmPcdDevSettings.advConfig)
93787 +        XX_Free(p_LnxWrpFmDev->fmPcdDevSettings.advConfig);
93788 +    if (p_LnxWrpFmDev->fmDevSettings.advConfig)
93789 +        XX_Free(p_LnxWrpFmDev->fmDevSettings.advConfig);
93790 +
93791 +    XX_Free(p_LnxWrpFmDev);
93792 +}
93793 +
93794 +static t_Error FillRestFmInfo(t_LnxWrpFmDev *p_LnxWrpFmDev)
93795 +{
93796 +#define FM_BMI_PPIDS_OFFSET                 0x00080304
93797 +#define FM_DMA_PLR_OFFSET                   0x000c2060
93798 +#define FM_FPM_IP_REV_1_OFFSET              0x000c30c4
93799 +#define DMA_HIGH_LIODN_MASK                 0x0FFF0000
93800 +#define DMA_LOW_LIODN_MASK                  0x00000FFF
93801 +#define DMA_LIODN_SHIFT                     16
93802 +
93803 +typedef _Packed struct {
93804 +    uint32_t    plr[32];
93805 +} _PackedType t_Plr;
93806 +
93807 +typedef _Packed struct {
93808 +   volatile uint32_t   fmbm_ppid[63];
93809 +} _PackedType t_Ppids;
93810 +
93811 +    t_Plr       *p_Plr;
93812 +    t_Ppids     *p_Ppids;
93813 +    int         i,j;
93814 +    uint32_t    fmRev;
93815 +
93816 +    static const uint8_t     phys1GRxPortId[] = {0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf};
93817 +    static const uint8_t     phys10GRxPortId[] = {0x10,0x11};
93818 +#if (DPAA_VERSION >= 11)
93819 +    static const uint8_t     physOhPortId[] = {/* 0x1, */0x2,0x3,0x4,0x5,0x6,0x7};
93820 +#else
93821 +    static const uint8_t     physOhPortId[] = {0x1,0x2,0x3,0x4,0x5,0x6,0x7};
93822 +#endif
93823 +    static const uint8_t     phys1GTxPortId[] = {0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f};
93824 +    static const uint8_t     phys10GTxPortId[] = {0x30,0x31};
93825 +
93826 +    fmRev = (uint32_t)(*((volatile uint32_t *)UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr+FM_FPM_IP_REV_1_OFFSET)));
93827 +    fmRev &= 0xffff;
93828 +
93829 +    p_Plr = (t_Plr *)UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr+FM_DMA_PLR_OFFSET);
93830 +#ifdef MODULE
93831 +    for (i=0;i<FM_MAX_NUM_OF_PARTITIONS/2;i++)
93832 +        p_Plr->plr[i] = 0;
93833 +#endif /* MODULE */
93834 +
93835 +    for (i=0; i<FM_MAX_NUM_OF_PARTITIONS; i++)
93836 +    {
93837 +        uint16_t liodnBase = (uint16_t)((i%2) ?
93838 +                       (p_Plr->plr[i/2] & DMA_LOW_LIODN_MASK) :
93839 +                       ((p_Plr->plr[i/2] & DMA_HIGH_LIODN_MASK) >> DMA_LIODN_SHIFT));
93840 +#ifdef FM_PARTITION_ARRAY
93841 +        /* TODO: this was .liodnPerPartition[i] = liodnBase; is the index meaning the same? */
93842 +        p_LnxWrpFmDev->fmDevSettings.param.liodnBasePerPort[i] = liodnBase;
93843 +#endif /* FM_PARTITION_ARRAY */
93844 +
93845 +        if ((i >= phys1GRxPortId[0]) &&
93846 +             (i <= phys1GRxPortId[FM_MAX_NUM_OF_1G_RX_PORTS-1]))
93847 +        {
93848 +            for (j=0; j<ARRAY_SIZE(phys1GRxPortId); j++)
93849 +                if (phys1GRxPortId[j] == i)
93850 +                    break;
93851 +            ASSERT_COND(j<ARRAY_SIZE(phys1GRxPortId));
93852 +            p_LnxWrpFmDev->rxPorts[j].settings.param.liodnBase = liodnBase;
93853 +        }
93854 +        else if (FM_MAX_NUM_OF_10G_RX_PORTS &&
93855 +                 (i >= phys10GRxPortId[0]) &&
93856 +                 (i <= phys10GRxPortId[FM_MAX_NUM_OF_10G_RX_PORTS-1]))
93857 +        {
93858 +            for (j=0; j<ARRAY_SIZE(phys10GRxPortId); j++)
93859 +                if (phys10GRxPortId[j] == i)
93860 +                    break;
93861 +            ASSERT_COND(j<ARRAY_SIZE(phys10GRxPortId));
93862 +            p_LnxWrpFmDev->rxPorts[FM_MAX_NUM_OF_1G_RX_PORTS+j].settings.param.liodnBase = liodnBase;
93863 +        }
93864 +        else if ((i >= physOhPortId[0]) &&
93865 +                 (i <= physOhPortId[FM_MAX_NUM_OF_OH_PORTS-1]))
93866 +        {
93867 +            for (j=0; j<ARRAY_SIZE(physOhPortId); j++)
93868 +                if (physOhPortId[j] == i)
93869 +                    break;
93870 +            ASSERT_COND(j<ARRAY_SIZE(physOhPortId));
93871 +            if (j == 0)
93872 +                p_LnxWrpFmDev->hcPort.settings.param.liodnBase = liodnBase;
93873 +            else
93874 +                p_LnxWrpFmDev->opPorts[j - 1].settings.param.liodnBase = liodnBase;
93875 +        }
93876 +        else if ((i >= phys1GTxPortId[0]) &&
93877 +                  (i <= phys1GTxPortId[FM_MAX_NUM_OF_1G_TX_PORTS-1]))
93878 +        {
93879 +            for (j=0; j<ARRAY_SIZE(phys1GTxPortId); j++)
93880 +                if (phys1GTxPortId[j] == i)
93881 +                    break;
93882 +            ASSERT_COND(j<ARRAY_SIZE(phys1GTxPortId));
93883 +            p_LnxWrpFmDev->txPorts[j].settings.param.liodnBase = liodnBase;
93884 +        }
93885 +        else if (FM_MAX_NUM_OF_10G_TX_PORTS &&
93886 +                 (i >= phys10GTxPortId[0]) &&
93887 +                 (i <= phys10GTxPortId[FM_MAX_NUM_OF_10G_TX_PORTS-1]))
93888 +        {
93889 +            for (j=0; j<ARRAY_SIZE(phys10GTxPortId); j++)
93890 +                if (phys10GTxPortId[j] == i)
93891 +                    break;
93892 +            ASSERT_COND(j<ARRAY_SIZE(phys10GTxPortId));
93893 +            p_LnxWrpFmDev->txPorts[FM_MAX_NUM_OF_1G_TX_PORTS+j].settings.param.liodnBase = liodnBase;
93894 +        }
93895 +    }
93896 +
93897 +    p_Ppids = (t_Ppids *)UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr+FM_BMI_PPIDS_OFFSET);
93898 +
93899 +    for (i=0; i<FM_MAX_NUM_OF_1G_RX_PORTS; i++)
93900 +        p_LnxWrpFmDev->rxPorts[i].settings.param.specificParams.rxParams.liodnOffset =
93901 +                p_Ppids->fmbm_ppid[phys1GRxPortId[i]-1];
93902 +
93903 +    for (i=0; i<FM_MAX_NUM_OF_10G_RX_PORTS; i++)
93904 +            p_LnxWrpFmDev->rxPorts[FM_MAX_NUM_OF_1G_RX_PORTS+i].settings.param.specificParams.rxParams.liodnOffset =
93905 +                p_Ppids->fmbm_ppid[phys10GRxPortId[i]-1];
93906 +
93907 +    return E_OK;
93908 +}
93909 +
93910 +/* Structure that defines QE firmware binary files.
93911 + *
93912 + * See Documentation/powerpc/qe_firmware.txt for a description of these
93913 + * fields.
93914 + */
93915 +struct qe_firmware {
93916 +        struct qe_header {
93917 +                __be32 length;  /* Length of the entire structure, in bytes */
93918 +                u8 magic[3];    /* Set to { 'Q', 'E', 'F' } */
93919 +                u8 version;     /* Version of this layout. First ver is '1' */
93920 +        } header;
93921 +        u8 id[62];      /* Null-terminated identifier string */
93922 +        u8 split;       /* 0 = shared I-RAM, 1 = split I-RAM */
93923 +        u8 count;       /* Number of microcode[] structures */
93924 +        struct {
93925 +                __be16 model;           /* The SOC model  */
93926 +                u8 major;               /* The SOC revision major */
93927 +                u8 minor;               /* The SOC revision minor */
93928 +        } __attribute__ ((packed)) soc;
93929 +        u8 padding[4];                  /* Reserved, for alignment */
93930 +        __be64 extended_modes;          /* Extended modes */
93931 +        __be32 vtraps[8];               /* Virtual trap addresses */
93932 +        u8 reserved[4];                 /* Reserved, for future expansion */
93933 +        struct qe_microcode {
93934 +                u8 id[32];              /* Null-terminated identifier */
93935 +                __be32 traps[16];       /* Trap addresses, 0 == ignore */
93936 +                __be32 eccr;            /* The value for the ECCR register */
93937 +                __be32 iram_offset;     /* Offset into I-RAM for the code */
93938 +                __be32 count;           /* Number of 32-bit words of the code */
93939 +                __be32 code_offset;     /* Offset of the actual microcode */
93940 +                u8 major;               /* The microcode version major */
93941 +                u8 minor;               /* The microcode version minor */
93942 +                u8 revision;            /* The microcode version revision */
93943 +                u8 padding;             /* Reserved, for alignment */
93944 +                u8 reserved[4];         /* Reserved, for future expansion */
93945 +        } __attribute__ ((packed)) microcode[1];
93946 +        /* All microcode binaries should be located here */
93947 +        /* CRC32 should be located here, after the microcode binaries */
93948 +} __attribute__ ((packed));
93949 +
93950 +
93951 +/**
93952 + * FindFmanMicrocode - find the Fman microcode
93953 + *
93954 + * This function returns a pointer to the QE Firmware blob that holds
93955 + * the Fman microcode.  We use the QE Firmware structure because Fman microcode
93956 + * is similar to QE microcode, so there's no point in defining a new layout.
93957 + *
93958 + * Current versions of U-Boot embed the Fman firmware into the device tree,
93959 + * so we check for that first.  Each Fman node in the device tree contains a
93960 + * node or a pointer to node that holds the firmware.  Technically, we should
93961 + * be fetching the firmware node for the current Fman, but we don't have that
93962 + * information any more, so we assume that there is only one firmware node in
93963 + * the device tree, and that all Fmen use the same firmware.
93964 + */
93965 +static const struct qe_firmware *FindFmanMicrocode(void)
93966 +{
93967 +    static const struct qe_firmware *P4080_UCPatch;
93968 +    struct device_node *np;
93969 +
93970 +    if (P4080_UCPatch)
93971 +           return P4080_UCPatch;
93972 +
93973 +    /* The firmware should be inside the device tree. */
93974 +    np = of_find_compatible_node(NULL, NULL, "fsl,fman-firmware");
93975 +    if (np) {
93976 +           P4080_UCPatch = of_get_property(np, "fsl,firmware", NULL);
93977 +            of_node_put(np);
93978 +           if (P4080_UCPatch)
93979 +                   return P4080_UCPatch;
93980 +           else
93981 +                   REPORT_ERROR(WARNING, E_NOT_FOUND, ("firmware node is incomplete"));
93982 +    }
93983 +
93984 +    /* Returning NULL here forces the reuse of the IRAM content */
93985 +    return NULL;
93986 +}
93987 +#define SVR_SECURITY_MASK    0x00080000
93988 +#define SVR_PERSONALITY_MASK 0x0000FF00
93989 +#define SVR_VER_IGNORE_MASK (SVR_SECURITY_MASK | SVR_PERSONALITY_MASK)
93990 +#define SVR_B4860_REV1_VALUE 0x86800010
93991 +#define SVR_B4860_REV2_VALUE 0x86800020
93992 +#define SVR_T4240_VALUE      0x82400000
93993 +#define SVR_T4120_VALUE      0x82400100
93994 +#define SVR_T4160_VALUE      0x82410000
93995 +#define SVR_T4080_VALUE      0x82410200
93996 +#define SVR_T4_DEVICE_ID     0x82400000
93997 +#define SVR_DEVICE_ID_MASK   0xFFF00000
93998 +
93999 +#define OF_DEV_ID_NUM 2 /* one used, another one zeroed */
94000 +
94001 +/* searches for a subnode with the given name/compatible  */
94002 +static bool HasFmPcdOfNode(struct device_node *fm_node,
94003 +                           struct of_device_id *ids,
94004 +                           const char *name,
94005 +                           const char *compatible)
94006 +{
94007 +    struct device_node *dev_node;
94008 +    bool ret = false;
94009 +
94010 +    memset(ids, 0, OF_DEV_ID_NUM*sizeof(struct of_device_id));
94011 +    if (WARN_ON(strlen(name) >= sizeof(ids[0].name)))
94012 +        return false;
94013 +    strcpy(ids[0].name, name);
94014 +    if (WARN_ON(strlen(compatible) >= sizeof(ids[0].compatible)))
94015 +        return false;
94016 +    strcpy(ids[0].compatible, compatible);
94017 +    for_each_child_of_node(fm_node, dev_node)
94018 +        if (of_match_node(ids, dev_node) != NULL)
94019 +            ret = true;
94020 +    return ret;
94021 +}
94022 +
94023 +static t_LnxWrpFmDev * ReadFmDevTreeNode (struct platform_device *of_dev)
94024 +{
94025 +    t_LnxWrpFmDev       *p_LnxWrpFmDev;
94026 +    struct device_node  *fm_node, *dev_node;
94027 +    struct of_device_id ids[OF_DEV_ID_NUM];
94028 +    struct resource     res;
94029 +    struct clk *clk;
94030 +    u32 clk_rate;
94031 +    const uint32_t      *uint32_prop;
94032 +    int                 _errno=0, lenp;
94033 +    uint32_t            tmp_prop;
94034 +
94035 +    fm_node = of_node_get(of_dev->dev.of_node);
94036 +
94037 +    uint32_prop = (uint32_t *)of_get_property(fm_node, "cell-index", &lenp);
94038 +    if (unlikely(uint32_prop == NULL)) {
94039 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_get_property(%s, cell-index) failed", fm_node->full_name));
94040 +        return NULL;
94041 +    }
94042 +    tmp_prop = be32_to_cpu(*uint32_prop);
94043 +
94044 +    if (WARN_ON(lenp != sizeof(uint32_t)))
94045 +        return NULL;
94046 +
94047 +    if (tmp_prop > INTG_MAX_NUM_OF_FM) {
94048 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("fm id!"));
94049 +        return NULL;
94050 +    }
94051 +    p_LnxWrpFmDev = CreateFmDev(tmp_prop);
94052 +    if (!p_LnxWrpFmDev) {
94053 +        REPORT_ERROR(MAJOR, E_NULL_POINTER, NO_MSG);
94054 +        return NULL;
94055 +    }
94056 +    p_LnxWrpFmDev->dev = &of_dev->dev;
94057 +    p_LnxWrpFmDev->id = tmp_prop;
94058 +
94059 +    /* Get the FM interrupt */
94060 +    p_LnxWrpFmDev->irq = of_irq_to_resource(fm_node, 0, NULL);
94061 +    if (unlikely(p_LnxWrpFmDev->irq == /*NO_IRQ*/0)) {
94062 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_irq_to_resource() = %d", NO_IRQ));
94063 +        DestroyFmDev(p_LnxWrpFmDev);
94064 +        return NULL;
94065 +    }
94066 +
94067 +    /* Get the FM error interrupt */
94068 +    p_LnxWrpFmDev->err_irq = of_irq_to_resource(fm_node, 1, NULL);
94069 +
94070 +    if (unlikely(p_LnxWrpFmDev->err_irq == /*NO_IRQ*/0)) {
94071 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_irq_to_resource() = %d", NO_IRQ));
94072 +        DestroyFmDev(p_LnxWrpFmDev);
94073 +        return NULL;
94074 +    }
94075 +
94076 +    /* Get the FM address */
94077 +    _errno = of_address_to_resource(fm_node, 0, &res);
94078 +    if (unlikely(_errno < 0)) {
94079 +        REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
94080 +        DestroyFmDev(p_LnxWrpFmDev);
94081 +        return NULL;
94082 +    }
94083 +
94084 +
94085 +    p_LnxWrpFmDev->fmBaseAddr = 0;
94086 +    p_LnxWrpFmDev->fmPhysBaseAddr = res.start;
94087 +    p_LnxWrpFmDev->fmMemSize = res.end + 1 - res.start;
94088 +
94089 +    clk = of_clk_get(fm_node, 0);
94090 +    if (IS_ERR(clk)) {
94091 +        dev_err(&of_dev->dev, "%s: Failed to get FM clock structure\n",
94092 +                __func__);
94093 +        of_node_put(fm_node);
94094 +        DestroyFmDev(p_LnxWrpFmDev);
94095 +        return NULL;
94096 +    }
94097 +
94098 +    clk_rate = clk_get_rate(clk);
94099 +    if (!clk_rate) {
94100 +        dev_err(&of_dev->dev, "%s: Failed to determine FM clock rate\n",
94101 +                __func__);
94102 +        of_node_put(fm_node);
94103 +        DestroyFmDev(p_LnxWrpFmDev);
94104 +        return NULL;
94105 +    }
94106 +
94107 +    p_LnxWrpFmDev->fmDevSettings.param.fmClkFreq = DIV_ROUND_UP(clk_rate, 1000000); /* In MHz, rounded */
94108 +    /* Get the MURAM base address and size */
94109 +    memset(ids, 0, sizeof(ids));
94110 +    if (WARN_ON(strlen("muram") >= sizeof(ids[0].name)))
94111 +        return NULL;
94112 +    strcpy(ids[0].name, "muram");
94113 +    if (WARN_ON(strlen("fsl,fman-muram") >= sizeof(ids[0].compatible)))
94114 +        return NULL;
94115 +    strcpy(ids[0].compatible, "fsl,fman-muram");
94116 +    for_each_child_of_node(fm_node, dev_node) {
94117 +        if (likely(of_match_node(ids, dev_node) != NULL)) {
94118 +            _errno = of_address_to_resource(dev_node, 0, &res);
94119 +            if (unlikely(_errno < 0)) {
94120 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
94121 +                DestroyFmDev(p_LnxWrpFmDev);
94122 +                return NULL;
94123 +            }
94124 +
94125 +            p_LnxWrpFmDev->fmMuramBaseAddr = 0;
94126 +            p_LnxWrpFmDev->fmMuramPhysBaseAddr = res.start;
94127 +            p_LnxWrpFmDev->fmMuramMemSize = res.end + 1 - res.start;
94128 +
94129 +#ifndef CONFIG_FMAN_ARM
94130 +            {
94131 +               uint32_t svr;
94132 +                svr = mfspr(SPRN_SVR);
94133 +
94134 +                if ((svr & ~SVR_VER_IGNORE_MASK) >= SVR_B4860_REV2_VALUE)
94135 +                    p_LnxWrpFmDev->fmMuramMemSize = 0x80000;
94136 +            }
94137 +#endif
94138 +        }
94139 +    }
94140 +
94141 +    /* Get the RTC base address and size */
94142 +    memset(ids, 0, sizeof(ids));
94143 +    if (WARN_ON(strlen("rtc") >= sizeof(ids[0].name)))
94144 +        return NULL;
94145 +    strcpy(ids[0].name, "rtc");
94146 +    if (WARN_ON(strlen("fsl,fman-rtc") >= sizeof(ids[0].compatible)))
94147 +        return NULL;
94148 +    strcpy(ids[0].compatible, "fsl,fman-rtc");
94149 +    for_each_child_of_node(fm_node, dev_node) {
94150 +        if (likely(of_match_node(ids, dev_node) != NULL)) {
94151 +            _errno = of_address_to_resource(dev_node, 0, &res);
94152 +            if (unlikely(_errno < 0)) {
94153 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
94154 +                DestroyFmDev(p_LnxWrpFmDev);
94155 +                return NULL;
94156 +            }
94157 +
94158 +            p_LnxWrpFmDev->fmRtcBaseAddr = 0;
94159 +            p_LnxWrpFmDev->fmRtcPhysBaseAddr = res.start;
94160 +            p_LnxWrpFmDev->fmRtcMemSize = res.end + 1 - res.start;
94161 +        }
94162 +    }
94163 +
94164 +#if (DPAA_VERSION >= 11)
94165 +    /* Get the VSP base address */
94166 +    for_each_child_of_node(fm_node, dev_node) {
94167 +        if (of_device_is_compatible(dev_node, "fsl,fman-vsps")) {
94168 +            _errno = of_address_to_resource(dev_node, 0, &res);
94169 +            if (unlikely(_errno < 0)) {
94170 +                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
94171 +                DestroyFmDev(p_LnxWrpFmDev);
94172 +                return NULL;
94173 +            }
94174 +            p_LnxWrpFmDev->fmVspBaseAddr = 0;
94175 +            p_LnxWrpFmDev->fmVspPhysBaseAddr = res.start;
94176 +            p_LnxWrpFmDev->fmVspMemSize = res.end + 1 - res.start;
94177 +        }
94178 +    }
94179 +#endif
94180 +
94181 +    /* Get all PCD nodes */
94182 +    p_LnxWrpFmDev->prsActive = HasFmPcdOfNode(fm_node, ids, "parser", "fsl,fman-parser");
94183 +    p_LnxWrpFmDev->kgActive = HasFmPcdOfNode(fm_node, ids, "keygen", "fsl,fman-keygen");
94184 +    p_LnxWrpFmDev->ccActive = HasFmPcdOfNode(fm_node, ids, "cc", "fsl,fman-cc");
94185 +    p_LnxWrpFmDev->plcrActive = HasFmPcdOfNode(fm_node, ids, "policer", "fsl,fman-policer");
94186 +
94187 +    if (p_LnxWrpFmDev->prsActive || p_LnxWrpFmDev->kgActive ||
94188 +        p_LnxWrpFmDev->ccActive || p_LnxWrpFmDev->plcrActive)
94189 +        p_LnxWrpFmDev->pcdActive = TRUE;
94190 +
94191 +    if (p_LnxWrpFmDev->pcdActive)
94192 +    {
94193 +        const char *str_prop = (char *)of_get_property(fm_node, "fsl,default-pcd", &lenp);
94194 +        if (str_prop) {
94195 +            if (strncmp(str_prop, "3-tuple", strlen("3-tuple")) == 0)
94196 +                p_LnxWrpFmDev->defPcd = e_FM_PCD_3_TUPLE;
94197 +        }
94198 +        else
94199 +            p_LnxWrpFmDev->defPcd = e_NO_PCD;
94200 +    }
94201 +
94202 +    of_node_put(fm_node);
94203 +
94204 +    p_LnxWrpFmDev->hcCh =
94205 +        qman_affine_channel(cpumask_first(qman_affine_cpus()));
94206 +
94207 +    p_LnxWrpFmDev->active = TRUE;
94208 +
94209 +    return p_LnxWrpFmDev;
94210 +}
94211 +
94212 +struct device_node *GetFmAdvArgsDevTreeNode (uint8_t fmIndx)
94213 +{
94214 +    struct device_node  *dev_node;
94215 +    const uint32_t      *uint32_prop;
94216 +    int                 lenp;
94217 +    uint32_t            tmp_prop;
94218 +
94219 +    for_each_compatible_node(dev_node, NULL, "fsl,fman-extended-args") {
94220 +        uint32_prop = (uint32_t *)of_get_property(dev_node, "cell-index", &lenp);
94221 +        if (unlikely(uint32_prop == NULL)) {
94222 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE,
94223 +                         ("of_get_property(%s, cell-index) failed",
94224 +                          dev_node->full_name));
94225 +            return NULL;
94226 +        }
94227 +        tmp_prop = be32_to_cpu(*uint32_prop);
94228 +        if (WARN_ON(lenp != sizeof(uint32_t)))
94229 +            return NULL;
94230 +        if (tmp_prop > INTG_MAX_NUM_OF_FM) {
94231 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("fm id!"));
94232 +            return NULL;
94233 +        }
94234 +        if (fmIndx == tmp_prop)
94235 +            return dev_node;
94236 +    }
94237 +
94238 +    return NULL;
94239 +}
94240 +
94241 +static t_Error CheckNConfigFmAdvArgs (t_LnxWrpFmDev *p_LnxWrpFmDev)
94242 +{
94243 +    struct device_node  *dev_node;
94244 +    t_Error             err = E_INVALID_VALUE;
94245 +    const uint32_t      *uint32_prop;
94246 +    const char          *str_prop;
94247 +    int                 lenp;
94248 +    uint32_t            tmp_prop;
94249 +
94250 +    dev_node = GetFmAdvArgsDevTreeNode(p_LnxWrpFmDev->id);
94251 +    if (!dev_node) /* no advance parameters for FMan */
94252 +        return E_OK;
94253 +
94254 +    str_prop = (char *)of_get_property(dev_node, "dma-aid-mode", &lenp);
94255 +    if (str_prop) {
94256 +        if (strcmp(str_prop, "port") == 0)
94257 +            err = FM_ConfigDmaAidMode(p_LnxWrpFmDev->h_Dev, e_FM_DMA_AID_OUT_PORT_ID);
94258 +        else if (strcmp(str_prop, "tnum") == 0)
94259 +            err = FM_ConfigDmaAidMode(p_LnxWrpFmDev->h_Dev, e_FM_DMA_AID_OUT_TNUM);
94260 +
94261 +        if (err != E_OK)
94262 +            RETURN_ERROR(MINOR, err, NO_MSG);
94263 +    }
94264 +
94265 +       uint32_prop = (uint32_t *)of_get_property(dev_node,
94266 +                                               "total-fifo-size", &lenp);
94267 +       if (uint32_prop) {
94268 +               tmp_prop = be32_to_cpu(*uint32_prop);
94269 +               if (WARN_ON(lenp != sizeof(uint32_t)))
94270 +                       RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
94271 +
94272 +               if (FM_ConfigTotalFifoSize(p_LnxWrpFmDev->h_Dev,
94273 +                               tmp_prop) != E_OK)
94274 +                       RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
94275 +       }
94276 +
94277 +    uint32_prop = (uint32_t *)of_get_property(dev_node, "tnum-aging-period",
94278 +       &lenp);
94279 +       if (uint32_prop) {
94280 +               tmp_prop = be32_to_cpu(*uint32_prop);
94281 +               if (WARN_ON(lenp != sizeof(uint32_t)))
94282 +                       RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
94283 +
94284 +        err = FM_ConfigTnumAgingPeriod(p_LnxWrpFmDev->h_Dev,
94285 +            (uint16_t)tmp_prop/*tnumAgingPeriod*/);
94286 +
94287 +        if (err != E_OK)
94288 +            RETURN_ERROR(MINOR, err, NO_MSG);
94289 +    }
94290 +
94291 +    of_node_put(dev_node);
94292 +
94293 +    return E_OK;
94294 +}
94295 +
94296 +static void LnxwrpFmDevExceptionsCb(t_Handle h_App, e_FmExceptions exception)
94297 +{
94298 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev *)h_App;
94299 +
94300 +    ASSERT_COND(p_LnxWrpFmDev);
94301 +
94302 +    DBG(INFO, ("got fm exception %d", exception));
94303 +
94304 +    /* do nothing */
94305 +    UNUSED(exception);
94306 +}
94307 +
94308 +static void LnxwrpFmDevBusErrorCb(t_Handle        h_App,
94309 +                                  e_FmPortType    portType,
94310 +                                  uint8_t         portId,
94311 +                                  uint64_t        addr,
94312 +                                  uint8_t         tnum,
94313 +                                  uint16_t        liodn)
94314 +{
94315 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev *)h_App;
94316 +
94317 +    ASSERT_COND(p_LnxWrpFmDev);
94318 +
94319 +    /* do nothing */
94320 +    UNUSED(portType);UNUSED(portId);UNUSED(addr);UNUSED(tnum);UNUSED(liodn);
94321 +}
94322 +
94323 +static t_Error ConfigureFmDev(t_LnxWrpFmDev  *p_LnxWrpFmDev)
94324 +{
94325 +    struct resource     *dev_res;
94326 +    int                 _errno;
94327 +
94328 +    if (!p_LnxWrpFmDev->active)
94329 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM not configured!!!"));
94330 +
94331 +#ifndef MODULE
94332 +    _errno = can_request_irq(p_LnxWrpFmDev->irq, 0);
94333 +    if (unlikely(_errno < 0))
94334 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("can_request_irq() = %d", _errno));
94335 +#endif
94336 +    _errno = devm_request_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->irq, fm_irq, 0, "fman", p_LnxWrpFmDev);
94337 +    if (unlikely(_errno < 0))
94338 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("request_irq(%d) = %d", p_LnxWrpFmDev->irq, _errno));
94339 +
94340 +    enable_irq_wake(p_LnxWrpFmDev->irq);
94341 +
94342 +    if (p_LnxWrpFmDev->err_irq != 0) {
94343 +#ifndef MODULE
94344 +        _errno = can_request_irq(p_LnxWrpFmDev->err_irq, 0);
94345 +        if (unlikely(_errno < 0))
94346 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("can_request_irq() = %d", _errno));
94347 +#endif
94348 +        _errno = devm_request_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->err_irq, fm_err_irq, IRQF_SHARED, "fman-err", p_LnxWrpFmDev);
94349 +        if (unlikely(_errno < 0))
94350 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("request_irq(%d) = %d", p_LnxWrpFmDev->err_irq, _errno));
94351 +
94352 +       enable_irq_wake(p_LnxWrpFmDev->err_irq);
94353 +    }
94354 +
94355 +    p_LnxWrpFmDev->res = devm_request_mem_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize, "fman");
94356 +    if (unlikely(p_LnxWrpFmDev->res == NULL))
94357 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("request_mem_region() failed"));
94358 +
94359 +    p_LnxWrpFmDev->fmBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize));
94360 +    if (unlikely(p_LnxWrpFmDev->fmBaseAddr == 0))
94361 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
94362 +
94363 +    if (SYS_RegisterIoMap((uint64_t)p_LnxWrpFmDev->fmBaseAddr, (uint64_t)p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize) != E_OK)
94364 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM memory map"));
94365 +
94366 +    dev_res = __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize, "fman-muram");
94367 +    if (unlikely(dev_res == NULL))
94368 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("__devm_request_region() failed"));
94369 +
94370 +    p_LnxWrpFmDev->fmMuramBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize));
94371 +    if (unlikely(p_LnxWrpFmDev->fmMuramBaseAddr == 0))
94372 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
94373 +
94374 +    if (SYS_RegisterIoMap((uint64_t)p_LnxWrpFmDev->fmMuramBaseAddr, (uint64_t)p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize) != E_OK)
94375 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM MURAM memory map"));
94376 +
94377 +    if (p_LnxWrpFmDev->fmRtcPhysBaseAddr)
94378 +    {
94379 +        dev_res = __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize, "fman-rtc");
94380 +        if (unlikely(dev_res == NULL))
94381 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("__devm_request_region() failed"));
94382 +
94383 +        p_LnxWrpFmDev->fmRtcBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize));
94384 +        if (unlikely(p_LnxWrpFmDev->fmRtcBaseAddr == 0))
94385 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
94386 +
94387 +        if (SYS_RegisterIoMap((uint64_t)p_LnxWrpFmDev->fmRtcBaseAddr, (uint64_t)p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize) != E_OK)
94388 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-RTC memory map"));
94389 +    }
94390 +
94391 +#if (DPAA_VERSION >= 11)
94392 +    if (p_LnxWrpFmDev->fmVspPhysBaseAddr) {
94393 +        dev_res = __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmVspPhysBaseAddr, p_LnxWrpFmDev->fmVspMemSize, "fman-vsp");
94394 +        if (unlikely(dev_res == NULL))
94395 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("__devm_request_region() failed"));
94396 +
94397 +        p_LnxWrpFmDev->fmVspBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmVspPhysBaseAddr, p_LnxWrpFmDev->fmVspMemSize));
94398 +        if (unlikely(p_LnxWrpFmDev->fmVspBaseAddr == 0))
94399 +           RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
94400 +    }
94401 +#endif
94402 +
94403 +    p_LnxWrpFmDev->fmDevSettings.param.baseAddr     = p_LnxWrpFmDev->fmBaseAddr;
94404 +    p_LnxWrpFmDev->fmDevSettings.param.fmId         = p_LnxWrpFmDev->id;
94405 +    p_LnxWrpFmDev->fmDevSettings.param.irq          = NO_IRQ;
94406 +    p_LnxWrpFmDev->fmDevSettings.param.errIrq       = NO_IRQ;
94407 +    p_LnxWrpFmDev->fmDevSettings.param.f_Exception  = LnxwrpFmDevExceptionsCb;
94408 +    p_LnxWrpFmDev->fmDevSettings.param.f_BusError   = LnxwrpFmDevBusErrorCb;
94409 +    p_LnxWrpFmDev->fmDevSettings.param.h_App        = p_LnxWrpFmDev;
94410 +
94411 +    return FillRestFmInfo(p_LnxWrpFmDev);
94412 +}
94413 +
94414 +#ifndef CONFIG_FMAN_ARM
94415 +/*
94416 + * Table for matching compatible strings, for device tree
94417 + * guts node, for QorIQ SOCs.
94418 + * "fsl,qoriq-device-config-2.0" corresponds to T4 & B4
94419 + * SOCs. For the older SOCs "fsl,qoriq-device-config-1.0"
94420 + * string would be used.
94421 +*/
94422 +static const struct of_device_id guts_device_ids[] = {
94423 +        { .compatible = "fsl,qoriq-device-config-1.0", },
94424 +        { .compatible = "fsl,qoriq-device-config-2.0", },
94425 +        {}
94426 +};
94427 +
94428 +static unsigned int get_rcwsr(int regnum)
94429 +{
94430 +       struct ccsr_guts __iomem *guts_regs = NULL;
94431 +       struct device_node *guts_node;
94432 +
94433 +       guts_node = of_find_matching_node(NULL, guts_device_ids);
94434 +       if (!guts_node) {
94435 +               pr_err("could not find GUTS node\n");
94436 +               return 0;
94437 +       }
94438 +       guts_regs = of_iomap(guts_node, 0);
94439 +       of_node_put(guts_node);
94440 +       if (!guts_regs) {
94441 +               pr_err("ioremap of GUTS node failed\n");
94442 +               return 0;
94443 +       }
94444 +
94445 +       return ioread32be(&guts_regs->rcwsr[regnum]);
94446 +}
94447 +
94448 +#define FMAN1_ALL_MACS_MASK    0xFCC00000
94449 +#define FMAN2_ALL_MACS_MASK    0x000FCC00
94450 +
94451 +/**
94452 + * @Function           ResetOnInitErrata_A007273
94453 + *
94454 + * @Description                Workaround for Errata A-007273
94455 + *                                     This workaround is required to avoid a FMan hang during reset on initialization.
94456 + *                                     Enable all MACs in guts.devdisr2 register,
94457 + *                                     then perform a regular FMan reset and then restore MACs to their original state.
94458 + *
94459 + * @Param[in]     h_Fm - FM module descriptor
94460 + *
94461 + * @Return        None.
94462 + */
94463 +void ResetOnInitErrata_A007273(t_Handle h_Fm)
94464 +{
94465 +       struct ccsr_guts __iomem *guts_regs = NULL;
94466 +       struct device_node *guts_node;
94467 +       u32 devdisr2, enableMacs;
94468 +
94469 +       /* Get guts registers */
94470 +       guts_node = of_find_matching_node(NULL, guts_device_ids);
94471 +       if (!guts_node) {
94472 +               pr_err("could not find GUTS node\n");
94473 +               return;
94474 +       }
94475 +       guts_regs = of_iomap(guts_node, 0);
94476 +       of_node_put(guts_node);
94477 +       if (!guts_regs) {
94478 +               pr_err("ioremap of GUTS node failed\n");
94479 +               return;
94480 +       }
94481 +
94482 +       /* Read current state */
94483 +       devdisr2 = ioread32be(&guts_regs->devdisr2);
94484 +
94485 +       if (FmGetId(h_Fm) == 0)
94486 +               enableMacs = devdisr2 & ~FMAN1_ALL_MACS_MASK;
94487 +       else
94488 +               enableMacs = devdisr2 & ~FMAN2_ALL_MACS_MASK;
94489 +
94490 +       /* Enable all MACs */
94491 +       iowrite32be(enableMacs, &guts_regs->devdisr2);
94492 +
94493 +       /* Perform standard FMan reset */
94494 +       FmReset(h_Fm);
94495 +
94496 +       /* Restore devdisr2 value */
94497 +       iowrite32be(devdisr2, &guts_regs->devdisr2);
94498 +
94499 +       iounmap(guts_regs);
94500 +}
94501 +#endif
94502 +
94503 +static t_Error InitFmDev(t_LnxWrpFmDev  *p_LnxWrpFmDev)
94504 +{
94505 +    const struct qe_firmware *fw;
94506 +
94507 +    if (!p_LnxWrpFmDev->active)
94508 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM not configured!!!"));
94509 +
94510 +    if ((p_LnxWrpFmDev->h_MuramDev = FM_MURAM_ConfigAndInit(p_LnxWrpFmDev->fmMuramBaseAddr, p_LnxWrpFmDev->fmMuramMemSize)) == NULL)
94511 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-MURAM!"));
94512 +
94513 +    /* Loading the fman-controller code */
94514 +    fw = FindFmanMicrocode();
94515 +
94516 +    if (!fw) {
94517 +        /* this forces the reuse of the current IRAM content */
94518 +        p_LnxWrpFmDev->fmDevSettings.param.firmware.size = 0;
94519 +        p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code = NULL;
94520 +    } else {
94521 +        p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code =
94522 +            (void *) fw + be32_to_cpu(fw->microcode[0].code_offset);
94523 +        p_LnxWrpFmDev->fmDevSettings.param.firmware.size =
94524 +            sizeof(u32) * be32_to_cpu(fw->microcode[0].count);
94525 +        DBG(INFO, ("Loading fman-controller code version %d.%d.%d",
94526 +                   fw->microcode[0].major,
94527 +                   fw->microcode[0].minor,
94528 +                   fw->microcode[0].revision));
94529 +    }
94530 +
94531 +#ifdef CONFIG_FMAN_ARM
94532 +       { /* endianness adjustments: byteswap the ucode retrieved from the f/w blob */
94533 +               int i;
94534 +               int usz = p_LnxWrpFmDev->fmDevSettings.param.firmware.size;
94535 +               void * p_Code = p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code;
94536 +               u32 *dest = kzalloc(usz, GFP_KERNEL);
94537 +
94538 +               if (p_Code && dest)
94539 +               for(i=0; i < usz / 4; ++i)
94540 +                       dest[i] = be32_to_cpu(((u32 *)p_Code)[i]);
94541 +
94542 +               p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code = dest;
94543 +       }
94544 +#endif
94545 +
94546 +    p_LnxWrpFmDev->fmDevSettings.param.h_FmMuram = p_LnxWrpFmDev->h_MuramDev;
94547 +
94548 +#if (DPAA_VERSION >= 11)
94549 +    if (p_LnxWrpFmDev->fmVspBaseAddr) {
94550 +        p_LnxWrpFmDev->fmDevSettings.param.vspBaseAddr = p_LnxWrpFmDev->fmVspBaseAddr;
94551 +        p_LnxWrpFmDev->fmDevSettings.param.partVSPBase = 0;
94552 +        p_LnxWrpFmDev->fmDevSettings.param.partNumOfVSPs = FM_VSP_MAX_NUM_OF_ENTRIES;
94553 +    }
94554 +#endif
94555 +
94556 +#ifdef CONFIG_FMAN_ARM
94557 +    p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio = 1;
94558 +#else
94559 +    if(p_LnxWrpFmDev->fmDevSettings.param.fmId == 0)
94560 +        p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio =
94561 +            !!(get_rcwsr(4) & 0x2); /* RCW[FM_MAC_RAT0] */
94562 +    else
94563 +        p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio =
94564 +            !!(get_rcwsr(4) & 0x1); /* RCW[FM_MAC_RAT1] */
94565 +
94566 +    {
94567 +    /* T4 Devices ClkRatio is always 1 regardless of RCW[FM_MAC_RAT1] */
94568 +        uint32_t svr;
94569 +        svr = mfspr(SPRN_SVR);
94570 +
94571 +        if ((svr & SVR_DEVICE_ID_MASK) == SVR_T4_DEVICE_ID)
94572 +            p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio = 1;
94573 +    }
94574 +#endif /* CONFIG_FMAN_ARM */
94575 +
94576 +    if ((p_LnxWrpFmDev->h_Dev = FM_Config(&p_LnxWrpFmDev->fmDevSettings.param)) == NULL)
94577 +        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM"));
94578 +
94579 +
94580 +    if (FM_ConfigResetOnInit(p_LnxWrpFmDev->h_Dev, TRUE) != E_OK)
94581 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
94582 +
94583 +#ifndef CONFIG_FMAN_ARM
94584 +#ifdef FM_HANG_AT_RESET_MAC_CLK_DISABLED_ERRATA_FMAN_A007273
94585 +       if (FM_ConfigResetOnInitOverrideCallback(p_LnxWrpFmDev->h_Dev, ResetOnInitErrata_A007273) != E_OK)
94586 +               RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
94587 +#endif /* FM_HANG_AT_RESET_MAC_CLK_DISABLED_ERRATA_FMAN_A007273 */
94588 +#endif /* CONFIG_FMAN_ARM */
94589 +
94590 +#ifdef CONFIG_FMAN_P1023
94591 +    if (FM_ConfigDmaAidOverride(p_LnxWrpFmDev->h_Dev, TRUE) != E_OK)
94592 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
94593 +#endif
94594 +
94595 +
94596 +    CheckNConfigFmAdvArgs(p_LnxWrpFmDev);
94597 +
94598 +    if (FM_Init(p_LnxWrpFmDev->h_Dev) != E_OK)
94599 +        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
94600 +
94601 +    /* TODO: Why we mask these interrupts? */
94602 +    if (p_LnxWrpFmDev->err_irq == 0) {
94603 +        FM_SetException(p_LnxWrpFmDev->h_Dev, e_FM_EX_DMA_BUS_ERROR,FALSE);
94604 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_READ_ECC,FALSE);
94605 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_SYSTEM_WRITE_ECC,FALSE);
94606 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_FM_WRITE_ECC,FALSE);
94607 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_SINGLE_PORT_ECC, FALSE);
94608 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_FPM_STALL_ON_TASKS , FALSE);
94609 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_FPM_SINGLE_ECC, FALSE);
94610 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_FPM_DOUBLE_ECC,FALSE);
94611 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_QMI_SINGLE_ECC, FALSE);
94612 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_QMI_DOUBLE_ECC,FALSE);
94613 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,FALSE);
94614 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_LIST_RAM_ECC,FALSE);
94615 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_STORAGE_PROFILE_ECC, FALSE);
94616 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_STATISTICS_RAM_ECC, FALSE);
94617 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_DISPATCH_RAM_ECC, FALSE);
94618 +        FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_IRAM_ECC,FALSE);
94619 +        /* TODO: FmDisableRamsEcc assert for ramsEccOwners.
94620 +         * FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_MURAM_ECC,FALSE);*/
94621 +    }
94622 +
94623 +    if (p_LnxWrpFmDev->fmRtcBaseAddr)
94624 +    {
94625 +        t_FmRtcParams   fmRtcParam;
94626 +
94627 +        memset(&fmRtcParam, 0, sizeof(fmRtcParam));
94628 +        fmRtcParam.h_App = p_LnxWrpFmDev;
94629 +        fmRtcParam.h_Fm = p_LnxWrpFmDev->h_Dev;
94630 +        fmRtcParam.baseAddress = p_LnxWrpFmDev->fmRtcBaseAddr;
94631 +
94632 +        if(!(p_LnxWrpFmDev->h_RtcDev = FM_RTC_Config(&fmRtcParam)))
94633 +            RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-RTC"));
94634 +
94635 +       if (FM_RTC_ConfigPeriod(p_LnxWrpFmDev->h_RtcDev, DPA_PTP_NOMINAL_FREQ_PERIOD_NS) != E_OK)
94636 +           RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-RTC"));
94637 +
94638 +        if (FM_RTC_Init(p_LnxWrpFmDev->h_RtcDev) != E_OK)
94639 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-RTC"));
94640 +    }
94641 +
94642 +    return E_OK;
94643 +}
94644 +
94645 +/* TODO: to be moved back here */
94646 +extern void FreeFmPcdDev(t_LnxWrpFmDev  *p_LnxWrpFmDev);
94647 +
94648 +static void FreeFmDev(t_LnxWrpFmDev  *p_LnxWrpFmDev)
94649 +{
94650 +    if (!p_LnxWrpFmDev->active)
94651 +        return;
94652 +
94653 +    FreeFmPcdDev(p_LnxWrpFmDev);
94654 +
94655 +    if (p_LnxWrpFmDev->h_RtcDev)
94656 +       FM_RTC_Free(p_LnxWrpFmDev->h_RtcDev);
94657 +
94658 +    if (p_LnxWrpFmDev->h_Dev)
94659 +        FM_Free(p_LnxWrpFmDev->h_Dev);
94660 +
94661 +    if (p_LnxWrpFmDev->h_MuramDev)
94662 +        FM_MURAM_Free(p_LnxWrpFmDev->h_MuramDev);
94663 +
94664 +    if (p_LnxWrpFmDev->fmRtcBaseAddr)
94665 +    {
94666 +        SYS_UnregisterIoMap(p_LnxWrpFmDev->fmRtcBaseAddr);
94667 +        devm_iounmap(p_LnxWrpFmDev->dev, UINT_TO_PTR(p_LnxWrpFmDev->fmRtcBaseAddr));
94668 +        __devm_release_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize);
94669 +    }
94670 +    SYS_UnregisterIoMap(p_LnxWrpFmDev->fmMuramBaseAddr);
94671 +    devm_iounmap(p_LnxWrpFmDev->dev, UINT_TO_PTR(p_LnxWrpFmDev->fmMuramBaseAddr));
94672 +    __devm_release_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize);
94673 +    SYS_UnregisterIoMap(p_LnxWrpFmDev->fmBaseAddr);
94674 +    devm_iounmap(p_LnxWrpFmDev->dev, UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr));
94675 +    devm_release_mem_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize);
94676 +    if (p_LnxWrpFmDev->err_irq != 0) {
94677 +        devm_free_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->err_irq, p_LnxWrpFmDev);
94678 +    }
94679 +
94680 +    devm_free_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->irq, p_LnxWrpFmDev);
94681 +}
94682 +
94683 +/* FMan character device file operations */
94684 +extern struct file_operations fm_fops;
94685 +
94686 +static int /*__devinit*/ fm_probe(struct platform_device *of_dev)
94687 +{
94688 +    t_LnxWrpFmDev   *p_LnxWrpFmDev;
94689 +
94690 +    if ((p_LnxWrpFmDev = ReadFmDevTreeNode(of_dev)) == NULL)
94691 +        return -EIO;
94692 +    if (ConfigureFmDev(p_LnxWrpFmDev) != E_OK)
94693 +        return -EIO;
94694 +    if (InitFmDev(p_LnxWrpFmDev) != E_OK)
94695 +        return -EIO;
94696 +
94697 +    /* IOCTL ABI checking */
94698 +    LnxWrpPCDIOCTLEnumChecking();
94699 +    LnxWrpPCDIOCTLTypeChecking();
94700 +
94701 +    Sprint (p_LnxWrpFmDev->name, "%s%d", DEV_FM_NAME, p_LnxWrpFmDev->id);
94702 +
94703 +    /* Register to the /dev for IOCTL API */
94704 +    /* Register dynamically a new major number for the character device: */
94705 +    if ((p_LnxWrpFmDev->major = register_chrdev(0, p_LnxWrpFmDev->name, &fm_fops)) <= 0) {
94706 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Failed to allocate a major number for device \"%s\"", p_LnxWrpFmDev->name));
94707 +        return -EIO;
94708 +    }
94709 +
94710 +    /* Creating classes for FM */
94711 +    DBG(TRACE ,("class_create fm_class"));
94712 +    p_LnxWrpFmDev->fm_class = class_create(THIS_MODULE, p_LnxWrpFmDev->name);
94713 +    if (IS_ERR(p_LnxWrpFmDev->fm_class)) {
94714 +        unregister_chrdev(p_LnxWrpFmDev->major, p_LnxWrpFmDev->name);
94715 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("class_create error fm_class"));
94716 +        return -EIO;
94717 +    }
94718 +
94719 +    device_create(p_LnxWrpFmDev->fm_class, NULL, MKDEV(p_LnxWrpFmDev->major, DEV_FM_MINOR_BASE), NULL,
94720 +                  "fm%d", p_LnxWrpFmDev->id);
94721 +    device_create(p_LnxWrpFmDev->fm_class, NULL, MKDEV(p_LnxWrpFmDev->major, DEV_FM_PCD_MINOR_BASE), NULL,
94722 +                  "fm%d-pcd", p_LnxWrpFmDev->id);
94723 +    dev_set_drvdata(p_LnxWrpFmDev->dev, p_LnxWrpFmDev);
94724 +
94725 +   /* create sysfs entries for stats and regs */
94726 +    if ( fm_sysfs_create(p_LnxWrpFmDev->dev) !=0 )
94727 +    {
94728 +        FreeFmDev(p_LnxWrpFmDev);
94729 +        REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Unable to create sysfs entry - fm!!!"));
94730 +        return -EIO;
94731 +    }
94732 +
94733 +#ifdef CONFIG_PM
94734 +    device_set_wakeup_capable(p_LnxWrpFmDev->dev, true);
94735 +#endif
94736 +
94737 +    DBG(TRACE, ("FM%d probed", p_LnxWrpFmDev->id));
94738 +
94739 +    return 0;
94740 +}
94741 +
94742 +static int fm_remove(struct platform_device *of_dev)
94743 +{
94744 +    t_LnxWrpFmDev   *p_LnxWrpFmDev;
94745 +    struct device   *dev;
94746 +
94747 +    dev = &of_dev->dev;
94748 +    p_LnxWrpFmDev = dev_get_drvdata(dev);
94749 +
94750 +    fm_sysfs_destroy(dev);
94751 +
94752 +    DBG(TRACE, ("destroy fm_class"));
94753 +    device_destroy(p_LnxWrpFmDev->fm_class, MKDEV(p_LnxWrpFmDev->major, DEV_FM_MINOR_BASE));
94754 +    device_destroy(p_LnxWrpFmDev->fm_class, MKDEV(p_LnxWrpFmDev->major, DEV_FM_PCD_MINOR_BASE));
94755 +    class_destroy(p_LnxWrpFmDev->fm_class);
94756 +
94757 +    /* Destroy chardev */
94758 +    unregister_chrdev(p_LnxWrpFmDev->major, p_LnxWrpFmDev->name);
94759 +
94760 +    FreeFmDev(p_LnxWrpFmDev);
94761 +
94762 +    DestroyFmDev(p_LnxWrpFmDev);
94763 +
94764 +    dev_set_drvdata(dev, NULL);
94765 +
94766 +    return 0;
94767 +}
94768 +
94769 +static const struct of_device_id fm_match[] = {
94770 +    {
94771 +        .compatible    = "fsl,fman"
94772 +    },
94773 +    {}
94774 +};
94775 +#ifndef MODULE
94776 +MODULE_DEVICE_TABLE(of, fm_match);
94777 +#endif /* !MODULE */
94778 +
94779 +#ifdef CONFIG_PM
94780 +
94781 +#define SCFG_FMCLKDPSLPCR_ADDR 0xFFE0FC00C
94782 +#define SCFG_FMCLKDPSLPCR_DS_VAL 0x48402000
94783 +#define SCFG_FMCLKDPSLPCR_NORMAL_VAL 0x00402000
94784 +
94785 +struct device *g_fm_dev;
94786 +
94787 +static int fm_soc_suspend(struct device *dev)
94788 +{
94789 +       int err = 0;
94790 +       uint32_t *fmclk;
94791 +       t_LnxWrpFmDev *p_LnxWrpFmDev = dev_get_drvdata(get_device(dev));
94792 +       g_fm_dev = dev;
94793 +       fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
94794 +       WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_DS_VAL);
94795 +       if (p_LnxWrpFmDev->h_DsarRxPort)
94796 +       {
94797 +#ifdef CONFIG_FSL_QORIQ_PM
94798 +               device_set_wakeup_enable(p_LnxWrpFmDev->dev, 1);
94799 +#endif
94800 +               err = FM_PORT_EnterDsarFinal(p_LnxWrpFmDev->h_DsarRxPort,
94801 +                       p_LnxWrpFmDev->h_DsarTxPort);
94802 +       }
94803 +       return err;
94804 +}
94805 +
94806 +static int fm_soc_resume(struct device *dev)
94807 +{
94808 +       t_LnxWrpFmDev *p_LnxWrpFmDev = dev_get_drvdata(get_device(dev));
94809 +       uint32_t *fmclk;
94810 +       fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
94811 +       WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_NORMAL_VAL);
94812 +       if (p_LnxWrpFmDev->h_DsarRxPort)
94813 +       {
94814 +#ifdef CONFIG_FSL_QORIQ_PM
94815 +               device_set_wakeup_enable(p_LnxWrpFmDev->dev, 0);
94816 +#endif
94817 +               FM_PORT_ExitDsar(p_LnxWrpFmDev->h_DsarRxPort,
94818 +                       p_LnxWrpFmDev->h_DsarTxPort);
94819 +               p_LnxWrpFmDev->h_DsarRxPort = 0;
94820 +               p_LnxWrpFmDev->h_DsarTxPort = 0;
94821 +       }
94822 +       return 0;
94823 +}
94824 +
94825 +static const struct dev_pm_ops fm_pm_ops = {
94826 +       .suspend = fm_soc_suspend,
94827 +       .resume = fm_soc_resume,
94828 +};
94829 +
94830 +#define FM_PM_OPS (&fm_pm_ops)
94831 +
94832 +#else /* CONFIG_PM */
94833 +
94834 +#define FM_PM_OPS NULL
94835 +
94836 +#endif /* CONFIG_PM */
94837 +
94838 +static struct platform_driver fm_driver = {
94839 +    .driver = {
94840 +        .name           = "fsl-fman",
94841 +        .of_match_table    = fm_match,
94842 +        .owner          = THIS_MODULE,
94843 +       .pm             = FM_PM_OPS,
94844 +    },
94845 +    .probe          = fm_probe,
94846 +    .remove         = fm_remove
94847 +};
94848 +
94849 +t_Handle LNXWRP_FM_Init(void)
94850 +{
94851 +    memset(&lnxWrpFm, 0, sizeof(lnxWrpFm));
94852 +    mutex_init(&lnxwrp_mutex);
94853 +
94854 +    /* Register to the DTB for basic FM API */
94855 +    platform_driver_register(&fm_driver);
94856 +
94857 +    return &lnxWrpFm;
94858 +}
94859 +
94860 +t_Error LNXWRP_FM_Free(t_Handle h_LnxWrpFm)
94861 +{
94862 +    platform_driver_unregister(&fm_driver);
94863 +    mutex_destroy(&lnxwrp_mutex);
94864 +
94865 +    return E_OK;
94866 +}
94867 +
94868 +
94869 +struct fm * fm_bind(struct device *fm_dev)
94870 +{
94871 +    return (struct fm *)(dev_get_drvdata(get_device(fm_dev)));
94872 +}
94873 +EXPORT_SYMBOL(fm_bind);
94874 +
94875 +void fm_unbind(struct fm *fm)
94876 +{
94877 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
94878 +
94879 +    put_device(p_LnxWrpFmDev->dev);
94880 +}
94881 +EXPORT_SYMBOL(fm_unbind);
94882 +
94883 +struct resource * fm_get_mem_region(struct fm *fm)
94884 +{
94885 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
94886 +
94887 +    return p_LnxWrpFmDev->res;
94888 +}
94889 +EXPORT_SYMBOL(fm_get_mem_region);
94890 +
94891 +void * fm_get_handle(struct fm *fm)
94892 +{
94893 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
94894 +
94895 +    return (void *)p_LnxWrpFmDev->h_Dev;
94896 +}
94897 +EXPORT_SYMBOL(fm_get_handle);
94898 +
94899 +void * fm_get_rtc_handle(struct fm *fm)
94900 +{
94901 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
94902 +
94903 +    return (void *)p_LnxWrpFmDev->h_RtcDev;
94904 +}
94905 +EXPORT_SYMBOL(fm_get_rtc_handle);
94906 +
94907 +struct fm_port * fm_port_bind (struct device *fm_port_dev)
94908 +{
94909 +    return (struct fm_port *)(dev_get_drvdata(get_device(fm_port_dev)));
94910 +}
94911 +EXPORT_SYMBOL(fm_port_bind);
94912 +
94913 +void fm_port_unbind(struct fm_port *port)
94914 +{
94915 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
94916 +
94917 +    put_device(p_LnxWrpFmPortDev->dev);
94918 +}
94919 +EXPORT_SYMBOL(fm_port_unbind);
94920 +
94921 +void *fm_port_get_handle(const struct fm_port *port)
94922 +{
94923 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
94924 +
94925 +    return (void *)p_LnxWrpFmPortDev->h_Dev;
94926 +}
94927 +EXPORT_SYMBOL(fm_port_get_handle);
94928 +
94929 +u64 *fm_port_get_buffer_time_stamp(const struct fm_port *port,
94930 +               const void *data)
94931 +{
94932 +       return FM_PORT_GetBufferTimeStamp(fm_port_get_handle(port),
94933 +                                         (void *)data);
94934 +}
94935 +EXPORT_SYMBOL(fm_port_get_buffer_time_stamp);
94936 +
94937 +void fm_port_get_base_addr(const struct fm_port *port, uint64_t *base_addr)
94938 +{
94939 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
94940 +
94941 +    *base_addr = p_LnxWrpFmPortDev->settings.param.baseAddr;
94942 +}
94943 +EXPORT_SYMBOL(fm_port_get_base_addr);
94944 +
94945 +void fm_port_pcd_bind (struct fm_port *port, struct fm_port_pcd_param *params)
94946 +{
94947 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
94948 +
94949 +    p_LnxWrpFmPortDev->pcd_owner_params.cba = params->cba;
94950 +    p_LnxWrpFmPortDev->pcd_owner_params.cbf = params->cbf;
94951 +    p_LnxWrpFmPortDev->pcd_owner_params.dev = params->dev;
94952 +}
94953 +EXPORT_SYMBOL(fm_port_pcd_bind);
94954 +
94955 +void fm_port_get_buff_layout_ext_params(struct fm_port *port, struct fm_port_params *params)
94956 +{
94957 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
94958 +    struct device_node  *fm_node, *port_node;
94959 +    const uint32_t       *uint32_prop;
94960 +    int                  lenp;
94961 +
94962 +    params->data_align = 0;
94963 +    params->manip_extra_space = 0;
94964 +
94965 +    fm_node = GetFmAdvArgsDevTreeNode(((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev)->id);
94966 +    if (!fm_node) /* no advance parameters for FMan */
94967 +        return;
94968 +
94969 +    port_node = GetFmPortAdvArgsDevTreeNode(fm_node,
94970 +                                            p_LnxWrpFmPortDev->settings.param.portType,
94971 +                                            p_LnxWrpFmPortDev->settings.param.portId);
94972 +    if (!port_node) /* no advance parameters for FMan-Port */
94973 +        return;
94974 +
94975 +    uint32_prop = (uint32_t *)of_get_property(port_node, "buffer-layout", &lenp);
94976 +    if (uint32_prop) {
94977 +       if (WARN_ON(lenp != sizeof(uint32_t)*2))
94978 +            return;
94979 +
94980 +        params->manip_extra_space = (uint8_t)be32_to_cpu(uint32_prop[0]);
94981 +        params->data_align        = (uint16_t)be32_to_cpu(uint32_prop[1]);
94982 +    }
94983 +
94984 +    of_node_put(port_node);
94985 +    of_node_put(fm_node);
94986 +}
94987 +EXPORT_SYMBOL(fm_port_get_buff_layout_ext_params);
94988 +
94989 +uint16_t fm_get_tx_port_channel(struct fm_port *port)
94990 +{
94991 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
94992 +
94993 +    return p_LnxWrpFmPortDev->txCh;
94994 +}
94995 +EXPORT_SYMBOL(fm_get_tx_port_channel);
94996 +
94997 +int fm_port_enable (struct fm_port *port)
94998 +{
94999 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
95000 +    t_Error err = FM_PORT_Enable(p_LnxWrpFmPortDev->h_Dev);
95001 +
95002 +    return GET_ERROR_TYPE(err);
95003 +}
95004 +EXPORT_SYMBOL(fm_port_enable);
95005 +
95006 +int fm_port_disable(struct fm_port *port)
95007 +{
95008 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
95009 +    t_Error err = FM_PORT_Disable(p_LnxWrpFmPortDev->h_Dev);
95010 +
95011 +    return GET_ERROR_TYPE(err);
95012 +}
95013 +EXPORT_SYMBOL(fm_port_disable);
95014 +
95015 +int fm_port_set_rate_limit(struct fm_port *port,
95016 +                       uint16_t        max_burst_size,
95017 +                       uint32_t        rate_limit)
95018 +{
95019 +       t_FmPortRateLimit param;
95020 +       t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95021 +       int err = 0;
95022 +
95023 +       param.maxBurstSize = max_burst_size;
95024 +       param.rateLimit = rate_limit;
95025 +       param.rateLimitDivider = 0;
95026 +
95027 +       err = FM_PORT_SetRateLimit(p_LnxWrpFmPortDev->h_Dev, &param);
95028 +       return err;
95029 +}
95030 +EXPORT_SYMBOL(fm_port_set_rate_limit);
95031 +
95032 +int fm_port_del_rate_limit(struct fm_port *port)
95033 +{
95034 +       t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95035 +
95036 +       FM_PORT_DeleteRateLimit(p_LnxWrpFmPortDev->h_Dev);
95037 +       return 0;
95038 +}
95039 +EXPORT_SYMBOL(fm_port_del_rate_limit);
95040 +
95041 +void FM_PORT_Dsar_DumpRegs(void);
95042 +int ar_showmem(struct file *file, const char __user *buffer,
95043 +               unsigned long count, void *data)
95044 +{
95045 +       FM_PORT_Dsar_DumpRegs();
95046 +       return 2;
95047 +}
95048 +
95049 +struct auto_res_tables_sizes *fm_port_get_autores_maxsize(
95050 +       struct fm_port *port)
95051 +{
95052 +       t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95053 +       return &p_LnxWrpFmPortDev->dsar_table_sizes;
95054 +}
95055 +EXPORT_SYMBOL(fm_port_get_autores_maxsize);
95056 +
95057 +int fm_port_enter_autores_for_deepsleep(struct fm_port *port,
95058 +       struct auto_res_port_params *params)
95059 +{
95060 +       t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95061 +       t_LnxWrpFmDev* p_LnxWrpFmDev = (t_LnxWrpFmDev*)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
95062 +       p_LnxWrpFmDev->h_DsarRxPort = p_LnxWrpFmPortDev->h_Dev;
95063 +       p_LnxWrpFmDev->h_DsarTxPort = params->h_FmPortTx;
95064 +
95065 +               /*Register other under /proc/autoresponse */
95066 +       if (WARN_ON(sizeof(t_FmPortDsarParams) != sizeof(struct auto_res_port_params)))
95067 +            return -EFAULT;
95068 +
95069 +       FM_PORT_EnterDsar(p_LnxWrpFmPortDev->h_Dev, (t_FmPortDsarParams*)params);
95070 +       return 0;
95071 +}
95072 +EXPORT_SYMBOL(fm_port_enter_autores_for_deepsleep);
95073 +
95074 +void fm_port_exit_auto_res_for_deep_sleep(struct fm_port *port_rx,
95075 +       struct fm_port *port_tx)
95076 +{
95077 +}
95078 +EXPORT_SYMBOL(fm_port_exit_auto_res_for_deep_sleep);
95079 +
95080 +int fm_port_get_autores_stats(struct fm_port *port,
95081 +       struct auto_res_port_stats *stats)
95082 +{
95083 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95084 +       if (WARN_ON(sizeof(t_FmPortDsarStats) != sizeof(struct auto_res_port_stats)))
95085 +            return -EFAULT;
95086 +       return FM_PORT_GetDsarStats(p_LnxWrpFmPortDev->h_Dev, (t_FmPortDsarStats*)stats);
95087 +}
95088 +EXPORT_SYMBOL(fm_port_get_autores_stats);
95089 +
95090 +int fm_port_suspend(struct fm_port *port)
95091 +{
95092 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95093 +       if (!FM_PORT_IsInDsar(p_LnxWrpFmPortDev->h_Dev))
95094 +               return FM_PORT_Disable(p_LnxWrpFmPortDev->h_Dev);
95095 +       else
95096 +               return 0;
95097 +}
95098 +EXPORT_SYMBOL(fm_port_suspend);
95099 +
95100 +int fm_port_resume(struct fm_port *port)
95101 +{
95102 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95103 +       if (!FM_PORT_IsInDsar(p_LnxWrpFmPortDev->h_Dev))
95104 +               return FM_PORT_Enable(p_LnxWrpFmPortDev->h_Dev);
95105 +       else
95106 +               return 0;
95107 +}
95108 +EXPORT_SYMBOL(fm_port_resume);
95109 +
95110 +bool fm_port_is_in_auto_res_mode(struct fm_port *port)
95111 +{
95112 +       return FM_PORT_IsInDsar(port);
95113 +}
95114 +EXPORT_SYMBOL(fm_port_is_in_auto_res_mode);
95115 +
95116 +#ifdef CONFIG_FMAN_PFC
95117 +int fm_port_set_pfc_priorities_mapping_to_qman_wq(struct fm_port *port,
95118 +               uint8_t prio, uint8_t wq)
95119 +{
95120 +       t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95121 +       int err;
95122 +       int _errno;
95123 +
95124 +       err = FM_PORT_SetPfcPrioritiesMappingToQmanWQ(p_LnxWrpFmPortDev->h_Dev,
95125 +                       prio, wq);
95126 +       _errno = -GET_ERROR_TYPE(err);
95127 +       if (unlikely(_errno < 0))
95128 +               pr_err("FM_PORT_SetPfcPrioritiesMappingToQmanWQ() = 0x%08x\n", err);
95129 +
95130 +       return _errno;
95131 +}
95132 +EXPORT_SYMBOL(fm_port_set_pfc_priorities_mapping_to_qman_wq);
95133 +#endif
95134 +
95135 +int fm_mac_set_exception(struct fm_mac_dev *fm_mac_dev,
95136 +               e_FmMacExceptions exception, bool enable)
95137 +{
95138 +       int err;
95139 +       int _errno;
95140 +
95141 +       err = FM_MAC_SetException(fm_mac_dev, exception, enable);
95142 +
95143 +       _errno = -GET_ERROR_TYPE(err);
95144 +       if (unlikely(_errno < 0))
95145 +               pr_err("FM_MAC_SetException() = 0x%08x\n", err);
95146 +
95147 +       return _errno;
95148 +}
95149 +EXPORT_SYMBOL(fm_mac_set_exception);
95150 +
95151 +int fm_mac_free(struct fm_mac_dev *fm_mac_dev)
95152 +{
95153 +       int err;
95154 +       int _error;
95155 +
95156 +       err = FM_MAC_Free(fm_mac_dev);
95157 +       _error = -GET_ERROR_TYPE(err);
95158 +
95159 +       if (unlikely(_error < 0))
95160 +               pr_err("FM_MAC_Free() = 0x%08x\n", err);
95161 +
95162 +       return _error;
95163 +}
95164 +EXPORT_SYMBOL(fm_mac_free);
95165 +
95166 +struct fm_mac_dev *fm_mac_config(t_FmMacParams *params)
95167 +{
95168 +       struct fm_mac_dev *fm_mac_dev;
95169 +
95170 +       fm_mac_dev = FM_MAC_Config(params);
95171 +       if (unlikely(fm_mac_dev == NULL))
95172 +               pr_err("FM_MAC_Config() failed\n");
95173 +
95174 +       return fm_mac_dev;
95175 +}
95176 +EXPORT_SYMBOL(fm_mac_config);
95177 +
95178 +int fm_mac_config_max_frame_length(struct fm_mac_dev *fm_mac_dev,
95179 +               int len)
95180 +{
95181 +       int err;
95182 +       int _errno;
95183 +
95184 +       err = FM_MAC_ConfigMaxFrameLength(fm_mac_dev, len);
95185 +       _errno = -GET_ERROR_TYPE(err);
95186 +       if (unlikely(_errno < 0))
95187 +               pr_err("FM_MAC_ConfigMaxFrameLength() = 0x%08x\n", err);
95188 +
95189 +       return _errno;
95190 +}
95191 +EXPORT_SYMBOL(fm_mac_config_max_frame_length);
95192 +
95193 +int fm_mac_config_pad_and_crc(struct fm_mac_dev *fm_mac_dev, bool enable)
95194 +{
95195 +       int err;
95196 +       int _errno;
95197 +
95198 +       err = FM_MAC_ConfigPadAndCrc(fm_mac_dev, enable);
95199 +       _errno = -GET_ERROR_TYPE(err);
95200 +       if (unlikely(_errno < 0))
95201 +               pr_err("FM_MAC_ConfigPadAndCrc() = 0x%08x\n", err);
95202 +
95203 +       return _errno;
95204 +}
95205 +EXPORT_SYMBOL(fm_mac_config_pad_and_crc);
95206 +
95207 +int fm_mac_config_half_duplex(struct fm_mac_dev *fm_mac_dev, bool enable)
95208 +{
95209 +       int err;
95210 +       int _errno;
95211 +
95212 +       err = FM_MAC_ConfigHalfDuplex(fm_mac_dev, enable);
95213 +       _errno = -GET_ERROR_TYPE(err);
95214 +       if (unlikely(_errno < 0))
95215 +               pr_err("FM_MAC_ConfigHalfDuplex() = 0x%08x\n", err);
95216 +
95217 +       return _errno;
95218 +}
95219 +EXPORT_SYMBOL(fm_mac_config_half_duplex);
95220 +
95221 +int fm_mac_config_reset_on_init(struct fm_mac_dev *fm_mac_dev, bool enable)
95222 +{
95223 +       int err;
95224 +       int _errno;
95225 +
95226 +       err = FM_MAC_ConfigResetOnInit(fm_mac_dev, enable);
95227 +       _errno = -GET_ERROR_TYPE(err);
95228 +       if (unlikely(_errno < 0))
95229 +               pr_err("FM_MAC_ConfigResetOnInit() = 0x%08x\n", err);
95230 +
95231 +       return _errno;
95232 +}
95233 +EXPORT_SYMBOL(fm_mac_config_reset_on_init);
95234 +
95235 +int fm_mac_init(struct fm_mac_dev *fm_mac_dev)
95236 +{
95237 +       int err;
95238 +       int _errno;
95239 +
95240 +       err = FM_MAC_Init(fm_mac_dev);
95241 +       _errno = -GET_ERROR_TYPE(err);
95242 +       if (unlikely(_errno < 0))
95243 +               pr_err("FM_MAC_Init() = 0x%08x\n", err);
95244 +
95245 +       return _errno;
95246 +}
95247 +EXPORT_SYMBOL(fm_mac_init);
95248 +
95249 +int fm_mac_get_version(struct fm_mac_dev *fm_mac_dev, uint32_t *version)
95250 +{
95251 +       int err;
95252 +       int _errno;
95253 +
95254 +       err = FM_MAC_GetVesrion(fm_mac_dev, version);
95255 +       _errno = -GET_ERROR_TYPE(err);
95256 +       if (unlikely(_errno < 0))
95257 +               pr_err("FM_MAC_GetVesrion() = 0x%08x\n", err);
95258 +
95259 +       return _errno;
95260 +}
95261 +EXPORT_SYMBOL(fm_mac_get_version);
95262 +
95263 +int fm_mac_enable(struct fm_mac_dev *fm_mac_dev)
95264 +{
95265 +       int      _errno;
95266 +       t_Error  err;
95267 +
95268 +       err = FM_MAC_Enable(fm_mac_dev, e_COMM_MODE_RX_AND_TX);
95269 +       _errno = -GET_ERROR_TYPE(err);
95270 +       if (unlikely(_errno < 0))
95271 +               pr_err("FM_MAC_Enable() = 0x%08x\n", err);
95272 +
95273 +       return _errno;
95274 +}
95275 +EXPORT_SYMBOL(fm_mac_enable);
95276 +
95277 +int fm_mac_disable(struct fm_mac_dev *fm_mac_dev)
95278 +{
95279 +       int      _errno;
95280 +       t_Error  err;
95281 +
95282 +       err = FM_MAC_Disable(fm_mac_dev, e_COMM_MODE_RX_AND_TX);
95283 +       _errno = -GET_ERROR_TYPE(err);
95284 +       if (unlikely(_errno < 0))
95285 +               pr_err("FM_MAC_Disable() = 0x%08x\n", err);
95286 +
95287 +       return _errno;
95288 +}
95289 +EXPORT_SYMBOL(fm_mac_disable);
95290 +
95291 +int fm_mac_resume(struct fm_mac_dev *fm_mac_dev)
95292 +{
95293 +        int      _errno;
95294 +        t_Error  err;
95295 +
95296 +        err = FM_MAC_Resume(fm_mac_dev);
95297 +        _errno = -GET_ERROR_TYPE(err);
95298 +        if (unlikely(_errno < 0))
95299 +                pr_err("FM_MAC_Resume() = 0x%08x\n", err);
95300 +
95301 +        return _errno;
95302 +}
95303 +EXPORT_SYMBOL(fm_mac_resume);
95304 +
95305 +int fm_mac_set_promiscuous(struct fm_mac_dev *fm_mac_dev,
95306 +               bool enable)
95307 +{
95308 +       int     _errno;
95309 +       t_Error err;
95310 +
95311 +       err = FM_MAC_SetPromiscuous(fm_mac_dev, enable);
95312 +       _errno = -GET_ERROR_TYPE(err);
95313 +       if (unlikely(_errno < 0))
95314 +               pr_err("FM_MAC_SetPromiscuous() = 0x%08x\n", err);
95315 +
95316 +       return _errno;
95317 +}
95318 +EXPORT_SYMBOL(fm_mac_set_promiscuous);
95319 +
95320 +int fm_mac_remove_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
95321 +               t_EnetAddr *mac_addr)
95322 +{
95323 +       int     _errno;
95324 +       t_Error err;
95325 +
95326 +       err = FM_MAC_RemoveHashMacAddr(fm_mac_dev, mac_addr);
95327 +       _errno = -GET_ERROR_TYPE(err);
95328 +       if (_errno < 0) {
95329 +               pr_err("FM_MAC_RemoveHashMacAddr() = 0x%08x\n", err);
95330 +               return _errno;
95331 +       }
95332 +
95333 +       return 0;
95334 +}
95335 +EXPORT_SYMBOL(fm_mac_remove_hash_mac_addr);
95336 +
95337 +int fm_mac_add_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
95338 +               t_EnetAddr *mac_addr)
95339 +{
95340 +       int     _errno;
95341 +       t_Error err;
95342 +
95343 +       err = FM_MAC_AddHashMacAddr(fm_mac_dev, mac_addr);
95344 +       _errno = -GET_ERROR_TYPE(err);
95345 +       if (_errno < 0) {
95346 +               pr_err("FM_MAC_AddHashMacAddr() = 0x%08x\n", err);
95347 +               return _errno;
95348 +       }
95349 +
95350 +       return 0;
95351 +}
95352 +EXPORT_SYMBOL(fm_mac_add_hash_mac_addr);
95353 +
95354 +int fm_mac_modify_mac_addr(struct fm_mac_dev *fm_mac_dev,
95355 +                                        uint8_t *addr)
95356 +{
95357 +       int     _errno;
95358 +       t_Error err;
95359 +
95360 +       err = FM_MAC_ModifyMacAddr(fm_mac_dev, (t_EnetAddr *)addr);
95361 +       _errno = -GET_ERROR_TYPE(err);
95362 +       if (_errno < 0)
95363 +               pr_err("FM_MAC_ModifyMacAddr() = 0x%08x\n", err);
95364 +
95365 +       return _errno;
95366 +}
95367 +EXPORT_SYMBOL(fm_mac_modify_mac_addr);
95368 +
95369 +int fm_mac_adjust_link(struct fm_mac_dev *fm_mac_dev,
95370 +               bool link, int speed, bool duplex)
95371 +{
95372 +       int      _errno;
95373 +       t_Error  err;
95374 +
95375 +       if (!link) {
95376 +#if (DPAA_VERSION < 11)
95377 +               FM_MAC_RestartAutoneg(fm_mac_dev);
95378 +#endif
95379 +               return 0;
95380 +       }
95381 +
95382 +       err = FM_MAC_AdjustLink(fm_mac_dev, speed, duplex);
95383 +       _errno = -GET_ERROR_TYPE(err);
95384 +       if (unlikely(_errno < 0))
95385 +               pr_err("FM_MAC_AdjustLink() = 0x%08x\n", err);
95386 +
95387 +       return _errno;
95388 +}
95389 +EXPORT_SYMBOL(fm_mac_adjust_link);
95390 +
95391 +int fm_mac_enable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev)
95392 +{
95393 +       int                      _errno;
95394 +       t_Error                  err;
95395 +
95396 +       err = FM_MAC_Enable1588TimeStamp(fm_mac_dev);
95397 +       _errno = -GET_ERROR_TYPE(err);
95398 +       if (unlikely(_errno < 0))
95399 +               pr_err("FM_MAC_Enable1588TimeStamp() = 0x%08x\n", err);
95400 +       return _errno;
95401 +}
95402 +EXPORT_SYMBOL(fm_mac_enable_1588_time_stamp);
95403 +
95404 +int fm_mac_disable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev)
95405 +{
95406 +       int                      _errno;
95407 +       t_Error                  err;
95408 +
95409 +       err = FM_MAC_Disable1588TimeStamp(fm_mac_dev);
95410 +       _errno = -GET_ERROR_TYPE(err);
95411 +       if (unlikely(_errno < 0))
95412 +               pr_err("FM_MAC_Disable1588TimeStamp() = 0x%08x\n", err);
95413 +       return _errno;
95414 +}
95415 +EXPORT_SYMBOL(fm_mac_disable_1588_time_stamp);
95416 +
95417 +int fm_mac_set_rx_pause_frames(
95418 +               struct fm_mac_dev *fm_mac_dev, bool en)
95419 +{
95420 +       int     _errno;
95421 +       t_Error err;
95422 +
95423 +       /* if rx pause is enabled, do NOT ignore pause frames */
95424 +       err = FM_MAC_SetRxIgnorePauseFrames(fm_mac_dev, !en);
95425 +
95426 +       _errno = -GET_ERROR_TYPE(err);
95427 +       if (_errno < 0)
95428 +               pr_err("FM_MAC_SetRxIgnorePauseFrames() = 0x%08x\n", err);
95429 +
95430 +       return _errno;
95431 +}
95432 +EXPORT_SYMBOL(fm_mac_set_rx_pause_frames);
95433 +
95434 +#ifdef CONFIG_FMAN_PFC
95435 +int fm_mac_set_tx_pause_frames(struct fm_mac_dev *fm_mac_dev,
95436 +                                            bool en)
95437 +{
95438 +       int     _errno, i;
95439 +       t_Error err;
95440 +
95441 +       if (en)
95442 +               for (i = 0; i < CONFIG_FMAN_PFC_COS_COUNT; i++) {
95443 +                       err = FM_MAC_SetTxPauseFrames(fm_mac_dev,
95444 +                                       i, fsl_fm_pfc_quanta[i],
95445 +                                       FSL_FM_PAUSE_THRESH_DEFAULT);
95446 +                       _errno = -GET_ERROR_TYPE(err);
95447 +                       if (_errno < 0) {
95448 +                               pr_err("FM_MAC_SetTxPauseFrames() = 0x%08x\n", err);
95449 +                               return _errno;
95450 +                       }
95451 +               }
95452 +       else
95453 +               for (i = 0; i < CONFIG_FMAN_PFC_COS_COUNT; i++) {
95454 +                       err = FM_MAC_SetTxPauseFrames(fm_mac_dev,
95455 +                                       i, FSL_FM_PAUSE_TIME_DISABLE,
95456 +                                       FSL_FM_PAUSE_THRESH_DEFAULT);
95457 +                       _errno = -GET_ERROR_TYPE(err);
95458 +                       if (_errno < 0) {
95459 +                               pr_err("FM_MAC_SetTxPauseFrames() = 0x%08x\n", err);
95460 +                               return _errno;
95461 +                       }
95462 +               }
95463 +
95464 +       return _errno;
95465 +}
95466 +#else
95467 +int fm_mac_set_tx_pause_frames(struct fm_mac_dev *fm_mac_dev,
95468 +                                            bool en)
95469 +{
95470 +       int     _errno;
95471 +       t_Error err;
95472 +
95473 +       if (en)
95474 +               err = FM_MAC_SetTxAutoPauseFrames(fm_mac_dev,
95475 +                               FSL_FM_PAUSE_TIME_ENABLE);
95476 +       else
95477 +               err = FM_MAC_SetTxAutoPauseFrames(fm_mac_dev,
95478 +                               FSL_FM_PAUSE_TIME_DISABLE);
95479 +
95480 +       _errno = -GET_ERROR_TYPE(err);
95481 +       if (_errno < 0)
95482 +               pr_err("FM_MAC_SetTxAutoPauseFrames() = 0x%08x\n", err);
95483 +
95484 +       return _errno;
95485 +}
95486 +#endif
95487 +EXPORT_SYMBOL(fm_mac_set_tx_pause_frames);
95488 +
95489 +int fm_rtc_enable(struct fm *fm_dev)
95490 +{
95491 +       int                      _errno;
95492 +       t_Error                  err;
95493 +
95494 +       err = FM_RTC_Enable(fm_get_rtc_handle(fm_dev), 0);
95495 +       _errno = -GET_ERROR_TYPE(err);
95496 +       if (unlikely(_errno < 0))
95497 +               pr_err("FM_RTC_Enable = 0x%08x\n", err);
95498 +
95499 +       return _errno;
95500 +}
95501 +EXPORT_SYMBOL(fm_rtc_enable);
95502 +
95503 +int fm_rtc_disable(struct fm *fm_dev)
95504 +{
95505 +       int                      _errno;
95506 +       t_Error                  err;
95507 +
95508 +       err = FM_RTC_Disable(fm_get_rtc_handle(fm_dev));
95509 +       _errno = -GET_ERROR_TYPE(err);
95510 +       if (unlikely(_errno < 0))
95511 +               pr_err("FM_RTC_Disable = 0x%08x\n", err);
95512 +
95513 +       return _errno;
95514 +}
95515 +EXPORT_SYMBOL(fm_rtc_disable);
95516 +
95517 +int fm_rtc_get_cnt(struct fm *fm_dev, uint64_t *ts)
95518 +{
95519 +       int _errno;
95520 +       t_Error err;
95521 +
95522 +       err = FM_RTC_GetCurrentTime(fm_get_rtc_handle(fm_dev), ts);
95523 +       _errno = -GET_ERROR_TYPE(err);
95524 +       if (unlikely(_errno < 0))
95525 +               pr_err("FM_RTC_GetCurrentTime = 0x%08x\n", err);
95526 +
95527 +       return _errno;
95528 +}
95529 +EXPORT_SYMBOL(fm_rtc_get_cnt);
95530 +
95531 +int fm_rtc_set_cnt(struct fm *fm_dev, uint64_t ts)
95532 +{
95533 +       int _errno;
95534 +       t_Error err;
95535 +
95536 +       err = FM_RTC_SetCurrentTime(fm_get_rtc_handle(fm_dev), ts);
95537 +       _errno = -GET_ERROR_TYPE(err);
95538 +       if (unlikely(_errno < 0))
95539 +               pr_err("FM_RTC_SetCurrentTime = 0x%08x\n", err);
95540 +
95541 +       return _errno;
95542 +}
95543 +EXPORT_SYMBOL(fm_rtc_set_cnt);
95544 +
95545 +int fm_rtc_get_drift(struct fm *fm_dev, uint32_t *drift)
95546 +{
95547 +       int _errno;
95548 +       t_Error err;
95549 +
95550 +       err = FM_RTC_GetFreqCompensation(fm_get_rtc_handle(fm_dev),
95551 +                       drift);
95552 +       _errno = -GET_ERROR_TYPE(err);
95553 +       if (unlikely(_errno < 0))
95554 +               pr_err("FM_RTC_GetFreqCompensation = 0x%08x\n", err);
95555 +
95556 +       return _errno;
95557 +}
95558 +EXPORT_SYMBOL(fm_rtc_get_drift);
95559 +
95560 +int fm_rtc_set_drift(struct fm *fm_dev, uint32_t drift)
95561 +{
95562 +       int _errno;
95563 +       t_Error err;
95564 +
95565 +       err = FM_RTC_SetFreqCompensation(fm_get_rtc_handle(fm_dev),
95566 +                       drift);
95567 +       _errno = -GET_ERROR_TYPE(err);
95568 +       if (unlikely(_errno < 0))
95569 +               pr_err("FM_RTC_SetFreqCompensation = 0x%08x\n", err);
95570 +
95571 +       return _errno;
95572 +}
95573 +EXPORT_SYMBOL(fm_rtc_set_drift);
95574 +
95575 +int fm_rtc_set_alarm(struct fm *fm_dev, uint32_t id,
95576 +               uint64_t time)
95577 +{
95578 +       t_FmRtcAlarmParams alarm;
95579 +       int _errno;
95580 +       t_Error err;
95581 +
95582 +       alarm.alarmId = id;
95583 +       alarm.alarmTime = time;
95584 +       alarm.f_AlarmCallback = NULL;
95585 +       err = FM_RTC_SetAlarm(fm_get_rtc_handle(fm_dev),
95586 +                       &alarm);
95587 +       _errno = -GET_ERROR_TYPE(err);
95588 +       if (unlikely(_errno < 0))
95589 +               pr_err("FM_RTC_SetAlarm = 0x%08x\n", err);
95590 +
95591 +       return _errno;
95592 +}
95593 +EXPORT_SYMBOL(fm_rtc_set_alarm);
95594 +
95595 +int fm_rtc_set_fiper(struct fm *fm_dev, uint32_t id,
95596 +               uint64_t fiper)
95597 +{
95598 +       t_FmRtcPeriodicPulseParams pp;
95599 +       int _errno;
95600 +       t_Error err;
95601 +
95602 +       pp.periodicPulseId = id;
95603 +       pp.periodicPulsePeriod = fiper;
95604 +       pp.f_PeriodicPulseCallback = NULL;
95605 +       err = FM_RTC_SetPeriodicPulse(fm_get_rtc_handle(fm_dev), &pp);
95606 +       _errno = -GET_ERROR_TYPE(err);
95607 +       if (unlikely(_errno < 0))
95608 +               pr_err("FM_RTC_SetPeriodicPulse = 0x%08x\n", err);
95609 +
95610 +       return _errno;
95611 +}
95612 +EXPORT_SYMBOL(fm_rtc_set_fiper);
95613 +
95614 +#ifdef CONFIG_PTP_1588_CLOCK_DPAA
95615 +int fm_rtc_enable_interrupt(struct fm *fm_dev, uint32_t events)
95616 +{
95617 +       int _errno;
95618 +       t_Error err;
95619 +
95620 +       err = FM_RTC_EnableInterrupt(fm_get_rtc_handle(fm_dev),
95621 +                       events);
95622 +       _errno = -GET_ERROR_TYPE(err);
95623 +       if (unlikely(_errno < 0))
95624 +               pr_err("FM_RTC_EnableInterrupt = 0x%08x\n", err);
95625 +
95626 +       return _errno;
95627 +}
95628 +EXPORT_SYMBOL(fm_rtc_enable_interrupt);
95629 +
95630 +int fm_rtc_disable_interrupt(struct fm *fm_dev, uint32_t events)
95631 +{
95632 +       int _errno;
95633 +       t_Error err;
95634 +
95635 +       err = FM_RTC_DisableInterrupt(fm_get_rtc_handle(fm_dev),
95636 +                       events);
95637 +       _errno = -GET_ERROR_TYPE(err);
95638 +       if (unlikely(_errno < 0))
95639 +               pr_err("FM_RTC_DisableInterrupt = 0x%08x\n", err);
95640 +
95641 +       return _errno;
95642 +}
95643 +EXPORT_SYMBOL(fm_rtc_disable_interrupt);
95644 +#endif
95645 +
95646 +int fm_mac_set_wol(struct fm_port *port, struct fm_mac_dev *fm_mac_dev, bool en)
95647 +{
95648 +       int _errno;
95649 +       t_Error err;
95650 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
95651 +
95652 +       /* Do not set WoL on AR ports */
95653 +       if (FM_PORT_IsInDsar(p_LnxWrpFmPortDev->h_Dev)) {
95654 +               printk(KERN_WARNING "Port is AutoResponse enabled! WoL will not be set on this port!\n");
95655 +               return 0;
95656 +       }
95657 +
95658 +       err = FM_MAC_SetWakeOnLan(fm_mac_dev, en);
95659 +
95660 +       _errno = -GET_ERROR_TYPE(err);
95661 +       if (_errno < 0)
95662 +               pr_err("FM_MAC_SetWakeOnLan() = 0x%08x\n", err);
95663 +
95664 +       return _errno;
95665 +}
95666 +EXPORT_SYMBOL(fm_mac_set_wol);
95667 +
95668 +void fm_mutex_lock(void)
95669 +{
95670 +    mutex_lock(&lnxwrp_mutex);
95671 +}
95672 +EXPORT_SYMBOL(fm_mutex_lock);
95673 +
95674 +void fm_mutex_unlock(void)
95675 +{
95676 +    mutex_unlock(&lnxwrp_mutex);
95677 +}
95678 +EXPORT_SYMBOL(fm_mutex_unlock);
95679 +
95680 +/*Macsec wrapper functions*/
95681 +struct fm_macsec_dev *fm_macsec_config(struct fm_macsec_params *fm_params)
95682 +{
95683 +       struct fm_macsec_dev *fm_macsec_dev;
95684 +
95685 +       fm_macsec_dev = FM_MACSEC_Config((t_FmMacsecParams *)fm_params);
95686 +       if (unlikely(fm_macsec_dev == NULL))
95687 +               pr_err("FM_MACSEC_Config() failed\n");
95688 +
95689 +       return fm_macsec_dev;
95690 +}
95691 +EXPORT_SYMBOL(fm_macsec_config);
95692 +
95693 +int fm_macsec_init(struct fm_macsec_dev *fm_macsec_dev)
95694 +{
95695 +       int err;
95696 +       int _errno;
95697 +
95698 +       err = FM_MACSEC_Init(fm_macsec_dev);
95699 +       _errno = -GET_ERROR_TYPE(err);
95700 +       if (unlikely(_errno < 0))
95701 +               pr_err("FM_MACSEC_Init() = 0x%08x\n", err);
95702 +
95703 +       return _errno;
95704 +}
95705 +EXPORT_SYMBOL(fm_macsec_init);
95706 +
95707 +int fm_macsec_free(struct fm_macsec_dev *fm_macsec_dev)
95708 +{
95709 +       int err;
95710 +       int _error;
95711 +
95712 +       err = FM_MACSEC_Free(fm_macsec_dev);
95713 +       _error = -GET_ERROR_TYPE(err);
95714 +
95715 +       if (unlikely(_error < 0))
95716 +               pr_err("FM_MACSEC_Free() = 0x%08x\n", err);
95717 +
95718 +       return _error;
95719 +}
95720 +EXPORT_SYMBOL(fm_macsec_free);
95721 +
95722 +int fm_macsec_config_unknown_sci_frame_treatment(struct fm_macsec_dev
95723 +                               *fm_macsec_dev,
95724 +                               fm_macsec_unknown_sci_frame_treatment treat_mode)
95725 +{
95726 +       int err;
95727 +       int _errno;
95728 +
95729 +       err = FM_MACSEC_ConfigUnknownSciFrameTreatment(fm_macsec_dev,
95730 +               treat_mode);
95731 +       _errno = -GET_ERROR_TYPE(err);
95732 +       if (unlikely(_errno < 0))
95733 +               pr_err("FM_MACSEC_ConfigUnknownSciFrameTreatmen() = 0x%08x\n", err);
95734 +
95735 +       return _errno;
95736 +}
95737 +EXPORT_SYMBOL(fm_macsec_config_unknown_sci_frame_treatment);
95738 +
95739 +int fm_macsec_config_invalid_tags_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
95740 +                               bool deliver_uncontrolled)
95741 +{
95742 +       int err;
95743 +       int _errno;
95744 +
95745 +       err = FM_MACSEC_ConfigInvalidTagsFrameTreatment(fm_macsec_dev,
95746 +                                               deliver_uncontrolled);
95747 +       _errno = -GET_ERROR_TYPE(err);
95748 +       if (unlikely(_errno < 0))
95749 +               pr_err("FM_MAC_ConfigMaxFrameLength() = 0x%08x\n", err);
95750 +
95751 +       return _errno;
95752 +}
95753 +EXPORT_SYMBOL(fm_macsec_config_invalid_tags_frame_treatment);
95754 +
95755 +int fm_macsec_config_kay_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
95756 +                               bool discard_uncontrolled)
95757 +{
95758 +       int err;
95759 +       int _errno;
95760 +
95761 +       err = FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(fm_macsec_dev,
95762 +                                               discard_uncontrolled);
95763 +       _errno = -GET_ERROR_TYPE(err);
95764 +       if (unlikely(_errno < 0))
95765 +               pr_err("FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatmen() = 0x%08x\n", err);
95766 +
95767 +       return _errno;
95768 +}
95769 +EXPORT_SYMBOL(fm_macsec_config_kay_frame_treatment);
95770 +
95771 +int fm_macsec_config_untag_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
95772 +                                   fm_macsec_untag_frame_treatment treat_mode)
95773 +{
95774 +       int err;
95775 +       int _errno;
95776 +
95777 +       err = FM_MACSEC_ConfigUntagFrameTreatment(fm_macsec_dev, treat_mode);
95778 +       _errno = -GET_ERROR_TYPE(err);
95779 +       if (unlikely(_errno < 0))
95780 +               pr_err("FM_MACSEC_ConfigUntagFrameTreatment() = 0x%08x\n", err);
95781 +
95782 +       return _errno;
95783 +}
95784 +EXPORT_SYMBOL(fm_macsec_config_untag_frame_treatment);
95785 +
95786 +int fm_macsec_config_pn_exhaustion_threshold(struct fm_macsec_dev *fm_macsec_dev,
95787 +                                       uint32_t pn_exh_thr)
95788 +{
95789 +       int err;
95790 +       int _errno;
95791 +
95792 +       err = FM_MACSEC_ConfigPnExhaustionThreshold(fm_macsec_dev, pn_exh_thr);
95793 +       _errno = -GET_ERROR_TYPE(err);
95794 +       if (unlikely(_errno < 0))
95795 +               pr_err("FM_MACSEC_ConfigPnExhaustionThreshold() = 0x%08x\n", err);
95796 +
95797 +       return _errno;
95798 +}
95799 +EXPORT_SYMBOL(fm_macsec_config_pn_exhaustion_threshold);
95800 +
95801 +int fm_macsec_config_keys_unreadable(struct fm_macsec_dev *fm_macsec_dev)
95802 +{
95803 +       int err;
95804 +       int _errno;
95805 +
95806 +       err =  FM_MACSEC_ConfigKeysUnreadable(fm_macsec_dev);
95807 +       _errno = -GET_ERROR_TYPE(err);
95808 +       if (unlikely(_errno < 0))
95809 +               pr_err("FM_MACSEC_ConfigKeysUnreadable() = 0x%08x\n", err);
95810 +
95811 +       return _errno;
95812 +}
95813 +EXPORT_SYMBOL(fm_macsec_config_keys_unreadable);
95814 +
95815 +int fm_macsec_config_sectag_without_sci(struct fm_macsec_dev *fm_macsec_dev)
95816 +{
95817 +       int err;
95818 +       int _errno;
95819 +
95820 +       err =  FM_MACSEC_ConfigSectagWithoutSCI(fm_macsec_dev);
95821 +       _errno = -GET_ERROR_TYPE(err);
95822 +       if (unlikely(_errno < 0))
95823 +               pr_err("FM_MACSEC_ConfigSectagWithoutSCI() = 0x%08x\n", err);
95824 +
95825 +       return _errno;
95826 +}
95827 +EXPORT_SYMBOL(fm_macsec_config_sectag_without_sci);
95828 +
95829 +int fm_macsec_config_exception(struct fm_macsec_dev *fm_macsec_dev,
95830 +                           fm_macsec_exception exception, bool enable)
95831 +{
95832 +       int err;
95833 +       int _errno;
95834 +
95835 +       err = FM_MACSEC_ConfigException(fm_macsec_dev, exception, enable);
95836 +       _errno = -GET_ERROR_TYPE(err);
95837 +       if (unlikely(_errno < 0))
95838 +               pr_err("FM_MACSEC_ConfigException() = 0x%08x\n", err);
95839 +
95840 +       return _errno;
95841 +}
95842 +EXPORT_SYMBOL(fm_macsec_config_exception);
95843 +
95844 +int fm_macsec_get_revision(struct fm_macsec_dev *fm_macsec_dev,
95845 +                           int *macsec_revision)
95846 +{
95847 +       int err;
95848 +       int _errno;
95849 +
95850 +       err = FM_MACSEC_GetRevision(fm_macsec_dev, macsec_revision);
95851 +       _errno = -GET_ERROR_TYPE(err);
95852 +       if (unlikely(_errno < 0))
95853 +               pr_err("FM_MACSEC_GetRevision() = 0x%08x\n", err);
95854 +
95855 +       return _errno;
95856 +}
95857 +EXPORT_SYMBOL(fm_macsec_get_revision);
95858 +
95859 +int fm_macsec_enable(struct fm_macsec_dev *fm_macsec_dev)
95860 +{
95861 +       int err;
95862 +       int _errno;
95863 +
95864 +       err = FM_MACSEC_Enable(fm_macsec_dev);
95865 +       _errno = -GET_ERROR_TYPE(err);
95866 +       if (unlikely(_errno < 0))
95867 +               pr_err("FM_MACSEC_Enable() = 0x%08x\n", err);
95868 +
95869 +       return _errno;
95870 +}
95871 +EXPORT_SYMBOL(fm_macsec_enable);
95872 +
95873 +int fm_macsec_disable(struct fm_macsec_dev *fm_macsec_dev)
95874 +{
95875 +       int err;
95876 +       int _errno;
95877 +
95878 +       err = FM_MACSEC_Disable(fm_macsec_dev);
95879 +       _errno = -GET_ERROR_TYPE(err);
95880 +       if (unlikely(_errno < 0))
95881 +               pr_err("FM_MACSEC_Disable() = 0x%08x\n", err);
95882 +
95883 +       return _errno;
95884 +}
95885 +EXPORT_SYMBOL(fm_macsec_disable);
95886 +
95887 +int fm_macsec_set_exception(struct fm_macsec_dev *fm_macsec_dev,
95888 +                       fm_macsec_exception exception, bool enable)
95889 +{
95890 +       int err;
95891 +       int _errno;
95892 +
95893 +       err = FM_MACSEC_SetException(fm_macsec_dev, exception, enable);
95894 +       _errno = -GET_ERROR_TYPE(err);
95895 +       if (unlikely(_errno < 0))
95896 +               pr_err("FM_MACSEC_SetException() = 0x%08x\n", err);
95897 +
95898 +       return _errno;
95899 +}
95900 +EXPORT_SYMBOL(fm_macsec_set_exception);
95901 +
95902 +/* Macsec SECY wrapper API */
95903 +struct fm_macsec_secy_dev *fm_macsec_secy_config(struct fm_macsec_secy_params *secy_params)
95904 +{
95905 +       struct fm_macsec_secy_dev *fm_macsec_secy;
95906 +
95907 +       fm_macsec_secy = FM_MACSEC_SECY_Config((t_FmMacsecSecYParams *)secy_params);
95908 +       if (unlikely(fm_macsec_secy < 0))
95909 +               pr_err("FM_MACSEC_SECY_Config() failed\n");
95910 +
95911 +       return fm_macsec_secy;
95912 +}
95913 +EXPORT_SYMBOL(fm_macsec_secy_config);
95914 +
95915 +int fm_macsec_secy_init(struct fm_macsec_secy_dev *fm_macsec_secy_dev)
95916 +{
95917 +       int err;
95918 +       int _errno;
95919 +
95920 +       err = FM_MACSEC_SECY_Init(fm_macsec_secy_dev);
95921 +       _errno = -GET_ERROR_TYPE(err);
95922 +       if (unlikely(_errno < 0))
95923 +               pr_err("FM_MACSEC_SECY_Init() = 0x%08x\n", err);
95924 +
95925 +       return _errno;
95926 +}
95927 +EXPORT_SYMBOL(fm_macsec_secy_init);
95928 +
95929 +int fm_macsec_secy_free(struct fm_macsec_secy_dev *fm_macsec_secy_dev)
95930 +{
95931 +       int err;
95932 +       int _errno;
95933 +
95934 +       err = FM_MACSEC_SECY_Free(fm_macsec_secy_dev);
95935 +       _errno = -GET_ERROR_TYPE(err);
95936 +       if (unlikely(_errno < 0))
95937 +               pr_err("FM_MACSEC_SECY_Free() = 0x%08x\n", err);
95938 +
95939 +       return _errno;
95940 +}
95941 +EXPORT_SYMBOL(fm_macsec_secy_free);
95942 +
95943 +int fm_macsec_secy_config_sci_insertion_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
95944 +                               fm_macsec_sci_insertion_mode sci_insertion_mode)
95945 +{
95946 +       int err;
95947 +       int _errno;
95948 +
95949 +       err = FM_MACSEC_SECY_ConfigSciInsertionMode(fm_macsec_secy_dev,
95950 +                                       sci_insertion_mode);
95951 +       _errno = -GET_ERROR_TYPE(err);
95952 +       if (unlikely(_errno < 0))
95953 +               pr_err("FM_MACSEC_SECY_ConfigSciInsertionMode() = 0x%08x\n", err);
95954 +
95955 +       return _errno;
95956 +}
95957 +EXPORT_SYMBOL(fm_macsec_secy_config_sci_insertion_mode);
95958 +
95959 +int fm_macsec_secy_config_protect_frames(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
95960 +                               bool protect_frames)
95961 +{
95962 +       int err;
95963 +       int _errno;
95964 +
95965 +       err = FM_MACSEC_SECY_ConfigProtectFrames(fm_macsec_secy_dev,
95966 +                                               protect_frames);
95967 +       _errno = -GET_ERROR_TYPE(err);
95968 +       if (unlikely(_errno < 0))
95969 +               pr_err("FM_MACSEC_SECY_ConfigProtectFrames() = 0x%08x\n", err);
95970 +
95971 +       return _errno;
95972 +}
95973 +EXPORT_SYMBOL(fm_macsec_secy_config_protect_frames);
95974 +
95975 +int fm_macsec_secy_config_replay_window(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
95976 +                               bool replay_protect, uint32_t replay_window)
95977 +{
95978 +       int err;
95979 +       int _errno;
95980 +
95981 +       err = FM_MACSEC_SECY_ConfigReplayWindow(fm_macsec_secy_dev,
95982 +                                               replay_protect, replay_window);
95983 +       _errno = -GET_ERROR_TYPE(err);
95984 +       if (unlikely(_errno < 0))
95985 +               pr_err("FM_MACSEC_SECY_ConfigReplayWindow() = 0x%08x\n", err);
95986 +
95987 +       return _errno;
95988 +}
95989 +EXPORT_SYMBOL(fm_macsec_secy_config_replay_window);
95990 +
95991 +int fm_macsec_secy_config_validation_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
95992 +                               fm_macsec_valid_frame_behavior validate_frames)
95993 +{
95994 +       int err;
95995 +       int _errno;
95996 +
95997 +       err = FM_MACSEC_SECY_ConfigValidationMode(fm_macsec_secy_dev,
95998 +                                                   validate_frames);
95999 +       _errno = -GET_ERROR_TYPE(err);
96000 +       if (unlikely(_errno < 0))
96001 +               pr_err("FM_MACSEC_SECY_ConfigValidationMode() = 0x%08x\n", err);
96002 +
96003 +       return _errno;
96004 +}
96005 +EXPORT_SYMBOL(fm_macsec_secy_config_validation_mode);
96006 +
96007 +int fm_macsec_secy_config_confidentiality(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96008 +                               bool confidentiality_enable,
96009 +                               uint32_t confidentiality_offset)
96010 +{
96011 +       int err;
96012 +       int _errno;
96013 +
96014 +       err = FM_MACSEC_SECY_ConfigConfidentiality(fm_macsec_secy_dev,
96015 +                                                   confidentiality_enable,
96016 +                                                   confidentiality_offset);
96017 +       _errno = -GET_ERROR_TYPE(err);
96018 +       if (unlikely(_errno < 0))
96019 +               pr_err("FM_MACSEC_SECY_ConfigConfidentiality() = 0x%08x\n",
96020 +                       err);
96021 +
96022 +       return _errno;
96023 +}
96024 +EXPORT_SYMBOL(fm_macsec_secy_config_confidentiality);
96025 +
96026 +int fm_macsec_secy_config_point_to_point(struct fm_macsec_secy_dev *fm_macsec_secy_dev)
96027 +{
96028 +       int err;
96029 +       int _errno;
96030 +
96031 +       err = FM_MACSEC_SECY_ConfigPointToPoint(fm_macsec_secy_dev);
96032 +       _errno = -GET_ERROR_TYPE(err);
96033 +       if (unlikely(_errno < 0))
96034 +               pr_err("FM_MACSEC_SECY_ConfigPointToPoint() = 0x%08x\n",
96035 +                       err);
96036 +
96037 +       return _errno;
96038 +}
96039 +EXPORT_SYMBOL(fm_macsec_secy_config_point_to_point);
96040 +
96041 +int fm_macsec_secy_config_exception(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96042 +                                   fm_macsec_secy_exception exception,
96043 +                                   bool enable)
96044 +{
96045 +       int err;
96046 +       int _errno;
96047 +
96048 +       err = FM_MACSEC_SECY_ConfigException(fm_macsec_secy_dev, exception,
96049 +                                           enable);
96050 +       _errno = -GET_ERROR_TYPE(err);
96051 +       if (unlikely(_errno < 0))
96052 +               pr_err("FM_MACSEC_SECY_ConfigException() = 0x%08x\n",
96053 +                       err);
96054 +
96055 +       return _errno;
96056 +}
96057 +EXPORT_SYMBOL(fm_macsec_secy_config_exception);
96058 +
96059 +int fm_macsec_secy_config_event(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96060 +                                   fm_macsec_secy_event event,
96061 +                                   bool enable)
96062 +{
96063 +       int err;
96064 +       int _errno;
96065 +
96066 +       err = FM_MACSEC_SECY_ConfigEvent(fm_macsec_secy_dev, event, enable);
96067 +       _errno = -GET_ERROR_TYPE(err);
96068 +       if (unlikely(_errno < 0))
96069 +               pr_err("FM_MACSEC_SECY_ConfigEvent() = 0x%08x\n",
96070 +                       err);
96071 +
96072 +       return _errno;
96073 +}
96074 +EXPORT_SYMBOL(fm_macsec_secy_config_event);
96075 +
96076 +struct rx_sc_dev *fm_macsec_secy_create_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96077 +                               struct fm_macsec_secy_sc_params  *params)
96078 +{
96079 +       struct rx_sc_dev *rx_sc_dev;
96080 +
96081 +       rx_sc_dev = FM_MACSEC_SECY_CreateRxSc(fm_macsec_secy_dev, (t_FmMacsecSecYSCParams *)params);
96082 +       if (unlikely(rx_sc_dev == NULL))
96083 +               pr_err("FM_MACSEC_SECY_CreateRxSc() failed\n");
96084 +
96085 +       return rx_sc_dev;
96086 +}
96087 +EXPORT_SYMBOL(fm_macsec_secy_create_rxsc);
96088 +
96089 +int fm_macsec_secy_delete_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96090 +                               struct rx_sc_dev *sc)
96091 +{
96092 +       int err;
96093 +       int _errno;
96094 +
96095 +       err = FM_MACSEC_SECY_DeleteRxSc(fm_macsec_secy_dev, sc);
96096 +       _errno = -GET_ERROR_TYPE(err);
96097 +       if (unlikely(_errno < 0))
96098 +               pr_err("FM_MACSEC_SECY_DeleteRxSc() = 0x%08x\n",
96099 +                       err);
96100 +
96101 +       return _errno;
96102 +}
96103 +EXPORT_SYMBOL(fm_macsec_secy_delete_rxsc);
96104 +
96105 +int fm_macsec_secy_create_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96106 +                               struct rx_sc_dev *sc, macsec_an_t an,
96107 +                               uint32_t lowest_pn, macsec_sa_key_t key)
96108 +{
96109 +       int err;
96110 +       int _errno;
96111 +
96112 +       err = FM_MACSEC_SECY_CreateRxSa(fm_macsec_secy_dev, sc, an,
96113 +                                       lowest_pn, key);
96114 +       _errno = -GET_ERROR_TYPE(err);
96115 +       if (unlikely(_errno < 0))
96116 +               pr_err("FM_MACSEC_SECY_CreateRxSa() = 0x%08x\n",
96117 +                       err);
96118 +
96119 +       return _errno;
96120 +}
96121 +EXPORT_SYMBOL(fm_macsec_secy_create_rx_sa);
96122 +
96123 +int fm_macsec_secy_delete_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96124 +                               struct rx_sc_dev *sc, macsec_an_t an)
96125 +{
96126 +       int err;
96127 +       int _errno;
96128 +
96129 +       err = FM_MACSEC_SECY_DeleteRxSa(fm_macsec_secy_dev, sc, an);
96130 +       _errno = -GET_ERROR_TYPE(err);
96131 +       if (unlikely(_errno < 0))
96132 +               pr_err("FM_MACSEC_SECY_DeleteRxSa() = 0x%08x\n",
96133 +                       err);
96134 +
96135 +       return _errno;
96136 +}
96137 +EXPORT_SYMBOL(fm_macsec_secy_delete_rx_sa);
96138 +
96139 +int fm_macsec_secy_rxsa_enable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96140 +                                       struct rx_sc_dev *sc,
96141 +                                       macsec_an_t an)
96142 +{
96143 +       int err;
96144 +       int _errno;
96145 +
96146 +       err = FM_MACSEC_SECY_RxSaEnableReceive(fm_macsec_secy_dev, sc, an);
96147 +       _errno = -GET_ERROR_TYPE(err);
96148 +       if (unlikely(_errno < 0))
96149 +               pr_err("FM_MACSEC_SECY_RxSaEnableReceive() = 0x%08x\n",
96150 +                       err);
96151 +
96152 +       return _errno;
96153 +}
96154 +EXPORT_SYMBOL(fm_macsec_secy_rxsa_enable_receive);
96155 +
96156 +int fm_macsec_secy_rxsa_disable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96157 +                                       struct rx_sc_dev *sc,
96158 +                                       macsec_an_t an)
96159 +{
96160 +       int err;
96161 +       int _errno;
96162 +
96163 +       err = FM_MACSEC_SECY_RxSaDisableReceive(fm_macsec_secy_dev, sc, an);
96164 +       _errno = -GET_ERROR_TYPE(err);
96165 +       if (unlikely(_errno < 0))
96166 +               pr_err("FM_MACSEC_SECY_RxSaDisableReceive() = 0x%08x\n",
96167 +                       err);
96168 +
96169 +       return _errno;
96170 +}
96171 +EXPORT_SYMBOL(fm_macsec_secy_rxsa_disable_receive);
96172 +
96173 +int fm_macsec_secy_rxsa_update_next_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96174 +                                       struct rx_sc_dev *sc,
96175 +                                       macsec_an_t an, uint32_t updt_next_pn)
96176 +{
96177 +       int err;
96178 +       int _errno;
96179 +
96180 +       err = FM_MACSEC_SECY_RxSaUpdateNextPn(fm_macsec_secy_dev, sc, an,
96181 +                                               updt_next_pn);
96182 +       _errno = -GET_ERROR_TYPE(err);
96183 +       if (unlikely(_errno < 0))
96184 +               pr_err("FM_MACSEC_SECY_RxSaUpdateNextPn() = 0x%08x\n", err);
96185 +
96186 +       return _errno;
96187 +}
96188 +EXPORT_SYMBOL(fm_macsec_secy_rxsa_update_next_pn);
96189 +
96190 +int fm_macsec_secy_rxsa_update_lowest_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96191 +                                       struct rx_sc_dev *sc,
96192 +                                       macsec_an_t an, uint32_t updt_lowest_pn)
96193 +{
96194 +       int err;
96195 +       int _errno;
96196 +
96197 +       err = FM_MACSEC_SECY_RxSaUpdateLowestPn(fm_macsec_secy_dev, sc, an,
96198 +                                               updt_lowest_pn);
96199 +       _errno = -GET_ERROR_TYPE(err);
96200 +       if (unlikely(_errno < 0))
96201 +               pr_err("FM_MACSEC_SECY_RxSaUpdateLowestPn() = 0x%08x\n",
96202 +                       err);
96203 +
96204 +       return _errno;
96205 +}
96206 +EXPORT_SYMBOL(fm_macsec_secy_rxsa_update_lowest_pn);
96207 +
96208 +int fm_macsec_secy_rxsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96209 +                                       struct rx_sc_dev *sc,
96210 +                                       macsec_an_t an, macsec_sa_key_t key)
96211 +{
96212 +       int err;
96213 +       int _errno;
96214 +
96215 +       err = FM_MACSEC_SECY_RxSaModifyKey(fm_macsec_secy_dev, sc, an, key);
96216 +       _errno = -GET_ERROR_TYPE(err);
96217 +       if (unlikely(_errno < 0))
96218 +               pr_err("FM_MACSEC_SECY_RxSaModifyKey() = 0x%08x\n",
96219 +                       err);
96220 +
96221 +       return _errno;
96222 +}
96223 +EXPORT_SYMBOL(fm_macsec_secy_rxsa_modify_key);
96224 +
96225 +int fm_macsec_secy_create_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96226 +                               macsec_an_t an, macsec_sa_key_t key)
96227 +{
96228 +       int err;
96229 +       int _errno;
96230 +
96231 +       err = FM_MACSEC_SECY_CreateTxSa(fm_macsec_secy_dev, an, key);
96232 +       _errno = -GET_ERROR_TYPE(err);
96233 +       if (unlikely(_errno < 0))
96234 +               pr_err("FM_MACSEC_SECY_CreateTxSa() = 0x%08x\n",
96235 +                       err);
96236 +
96237 +       return _errno;
96238 +}
96239 +EXPORT_SYMBOL(fm_macsec_secy_create_tx_sa);
96240 +
96241 +int fm_macsec_secy_delete_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96242 +                               macsec_an_t an)
96243 +{
96244 +       int err;
96245 +       int _errno;
96246 +
96247 +       err = FM_MACSEC_SECY_DeleteTxSa(fm_macsec_secy_dev, an);
96248 +       _errno = -GET_ERROR_TYPE(err);
96249 +       if (unlikely(_errno < 0))
96250 +               pr_err("FM_MACSEC_SECY_DeleteTxSa() = 0x%08x\n",
96251 +                       err);
96252 +
96253 +       return _errno;
96254 +}
96255 +EXPORT_SYMBOL(fm_macsec_secy_delete_tx_sa);
96256 +
96257 +int fm_macsec_secy_txsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96258 +                                       macsec_an_t next_active_an,
96259 +                                       macsec_sa_key_t key)
96260 +{
96261 +       int err;
96262 +       int _errno;
96263 +
96264 +       err = FM_MACSEC_SECY_TxSaModifyKey(fm_macsec_secy_dev, next_active_an,
96265 +                                           key);
96266 +       _errno = -GET_ERROR_TYPE(err);
96267 +       if (unlikely(_errno < 0))
96268 +               pr_err("FM_MACSEC_SECY_TxSaModifyKey() = 0x%08x\n",
96269 +                       err);
96270 +
96271 +       return _errno;
96272 +}
96273 +EXPORT_SYMBOL(fm_macsec_secy_txsa_modify_key);
96274 +
96275 +int fm_macsec_secy_txsa_set_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96276 +                                       macsec_an_t an)
96277 +{
96278 +       int err;
96279 +       int _errno;
96280 +
96281 +       err = FM_MACSEC_SECY_TxSaSetActive(fm_macsec_secy_dev, an);
96282 +       _errno = -GET_ERROR_TYPE(err);
96283 +       if (unlikely(_errno < 0))
96284 +               pr_err("FM_MACSEC_SECY_TxSaSetActive() = 0x%08x\n",
96285 +                       err);
96286 +
96287 +       return _errno;
96288 +}
96289 +EXPORT_SYMBOL(fm_macsec_secy_txsa_set_active);
96290 +
96291 +int fm_macsec_secy_txsa_get_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96292 +                                       macsec_an_t *p_an)
96293 +{
96294 +       int err;
96295 +       int _errno;
96296 +
96297 +       err = FM_MACSEC_SECY_TxSaGetActive(fm_macsec_secy_dev, p_an);
96298 +       _errno = -GET_ERROR_TYPE(err);
96299 +       if (unlikely(_errno < 0))
96300 +               pr_err("FM_MACSEC_SECY_TxSaGetActive() = 0x%08x\n",
96301 +                       err);
96302 +
96303 +       return _errno;
96304 +}
96305 +EXPORT_SYMBOL(fm_macsec_secy_txsa_get_active);
96306 +
96307 +int fm_macsec_secy_get_rxsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96308 +                               struct rx_sc_dev *sc, uint32_t *sc_phys_id)
96309 +{
96310 +       int err;
96311 +       int _errno;
96312 +
96313 +       err = FM_MACSEC_SECY_GetRxScPhysId(fm_macsec_secy_dev, sc, sc_phys_id);
96314 +       _errno = -GET_ERROR_TYPE(err);
96315 +       if (unlikely(_errno < 0))
96316 +               pr_err("FM_MACSEC_SECY_GetRxScPhysId() = 0x%08x\n",
96317 +                       err);
96318 +
96319 +       return _errno;
96320 +}
96321 +EXPORT_SYMBOL(fm_macsec_secy_get_rxsc_phys_id);
96322 +
96323 +int fm_macsec_secy_get_txsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
96324 +                                   uint32_t *sc_phys_id)
96325 +{
96326 +       int err;
96327 +       int _errno;
96328 +
96329 +       err = FM_MACSEC_SECY_GetTxScPhysId(fm_macsec_secy_dev, sc_phys_id);
96330 +       _errno = -GET_ERROR_TYPE(err);
96331 +       if (unlikely(_errno < 0))
96332 +               pr_err("FM_MACSEC_SECY_GetTxScPhysId() = 0x%08x\n",
96333 +                       err);
96334 +
96335 +       return _errno;
96336 +}
96337 +EXPORT_SYMBOL(fm_macsec_secy_get_txsc_phys_id);
96338 +
96339 +static t_Handle h_FmLnxWrp;
96340 +
96341 +static int __init __cold fm_load (void)
96342 +{
96343 +    if ((h_FmLnxWrp = LNXWRP_FM_Init()) == NULL)
96344 +    {
96345 +        printk("Failed to init FM wrapper!\n");
96346 +        return -ENODEV;
96347 +    }
96348 +
96349 +       printk(KERN_CRIT "Freescale FM module," \
96350 +               " FMD API version %d.%d.%d\n",
96351 +               FMD_API_VERSION_MAJOR,
96352 +               FMD_API_VERSION_MINOR,
96353 +               FMD_API_VERSION_RESPIN);
96354 +    return 0;
96355 +}
96356 +
96357 +static void __exit __cold fm_unload (void)
96358 +{
96359 +    if (h_FmLnxWrp)
96360 +        LNXWRP_FM_Free(h_FmLnxWrp);
96361 +}
96362 +
96363 +module_init (fm_load);
96364 +module_exit (fm_unload);
96365 --- /dev/null
96366 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.h
96367 @@ -0,0 +1,294 @@
96368 +/*
96369 + * Copyright 2008-2012 Freescale Semiconductor Inc.
96370 + *
96371 + * Redistribution and use in source and binary forms, with or without
96372 + * modification, are permitted provided that the following conditions are met:
96373 + *     * Redistributions of source code must retain the above copyright
96374 + *       notice, this list of conditions and the following disclaimer.
96375 + *     * Redistributions in binary form must reproduce the above copyright
96376 + *       notice, this list of conditions and the following disclaimer in the
96377 + *       documentation and/or other materials provided with the distribution.
96378 + *     * Neither the name of Freescale Semiconductor nor the
96379 + *       names of its contributors may be used to endorse or promote products
96380 + *       derived from this software without specific prior written permission.
96381 + *
96382 + *
96383 + * ALTERNATIVELY, this software may be distributed under the terms of the
96384 + * GNU General Public License ("GPL") as published by the Free Software
96385 + * Foundation, either version 2 of that License or (at your option) any
96386 + * later version.
96387 + *
96388 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
96389 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
96390 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
96391 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
96392 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
96393 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
96394 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
96395 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
96396 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
96397 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96398 + */
96399 +
96400 +/*
96401 + @File          lnxwrp_fm.h
96402 +
96403 + @Author        Shlomi Gridish
96404 +
96405 + @Description   FM Linux wrapper functions.
96406 +
96407 +*/
96408 +
96409 +#ifndef __LNXWRP_FM_H__
96410 +#define __LNXWRP_FM_H__
96411 +
96412 +#include <linux/fsl_qman.h> /* struct qman_fq */
96413 +
96414 +#include "std_ext.h"
96415 +#include "error_ext.h"
96416 +#include "list_ext.h"
96417 +
96418 +#include "lnxwrp_fm_ext.h"
96419 +
96420 +#define FM_MAX_NUM_OF_ADV_SETTINGS          10
96421 +
96422 +#define LNXWRP_FM_NUM_OF_SHARED_PROFILES    16
96423 +
96424 +#if defined(CONFIG_FMAN_DISABLE_OH_TO_REUSE_RESOURCES)
96425 +#define FM_10G_OPENDMA_MIN_TRESHOLD 8 /* 10g minimum treshold if only HC is enabled and no OH port enabled */
96426 +#define FM_OPENDMA_RX_TX_RAPORT 2 /* RX = 2*TX */
96427 +#else
96428 +#define FM_10G_OPENDMA_MIN_TRESHOLD 7 /* 10g minimum treshold if 7 OH ports are enabled */
96429 +#define FM_OPENDMA_RX_TX_RAPORT 1 /* RX = TX */
96430 +#endif
96431 +#define FM_DEFAULT_TX10G_OPENDMA 8 /* default TX 10g open dmas */
96432 +#define FM_DEFAULT_RX10G_OPENDMA 8 /* default RX 10g open dmas */
96433 +
96434 +#define FRAG_MANIP_SPACE 128
96435 +#define FRAG_DATA_ALIGN 64
96436 +
96437 +#ifndef CONFIG_FSL_FM_MAX_FRAME_SIZE
96438 +#define CONFIG_FSL_FM_MAX_FRAME_SIZE 0
96439 +#endif
96440 +
96441 +#ifndef CONFIG_FSL_FM_RX_EXTRA_HEADROOM
96442 +#define CONFIG_FSL_FM_RX_EXTRA_HEADROOM       16
96443 +#endif
96444 +
96445 +typedef enum {
96446 +    e_NO_PCD = 0,
96447 +    e_FM_PCD_3_TUPLE
96448 +} e_LnxWrpFmPortPcdDefUseCase;
96449 +
96450 +
96451 +typedef struct t_FmTestFq {
96452 +    struct qman_fq      fq_base;
96453 +    t_Handle            h_Arg;
96454 +} t_FmTestFq;
96455 +
96456 +typedef struct {
96457 +    uint8_t                     id; /* sw port id, see SW_PORT_ID_TO_HW_PORT_ID() in fm_common.h */
96458 +    int                         minor;
96459 +    char                        name[20];
96460 +    bool                        active;
96461 +    uint64_t                    phys_baseAddr;
96462 +    uint64_t                    baseAddr;               /* Port's *virtual* address */
96463 +    uint32_t                    memSize;
96464 +    t_WrpFmPortDevSettings      settings;
96465 +    t_FmExtPools                opExtPools;
96466 +    uint8_t                     totalNumOfSchemes;
96467 +    uint8_t                     schemesBase;
96468 +    uint8_t                     numOfSchemesUsed;
96469 +    uint32_t                    pcdBaseQ;
96470 +    uint16_t                    pcdNumOfQs;
96471 +    struct fm_port_pcd_param    pcd_owner_params;
96472 +    e_LnxWrpFmPortPcdDefUseCase defPcd;
96473 +    t_Handle                    h_DefNetEnv;
96474 +    t_Handle                    h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES];
96475 +    t_FmBufferPrefixContent     buffPrefixContent;
96476 +    t_Handle                    h_Dev;
96477 +    t_Handle                    h_DfltVsp;
96478 +    t_Handle                    h_LnxWrpFmDev;
96479 +    uint16_t                    txCh;
96480 +    struct device               *dev;
96481 +    struct device_attribute     *dev_attr_stats;
96482 +    struct device_attribute     *dev_attr_regs;
96483 +    struct device_attribute     *dev_attr_bmi_regs;
96484 +    struct device_attribute     *dev_attr_qmi_regs;
96485 +#if (DPAA_VERSION >= 11)
96486 +    struct device_attribute     *dev_attr_ipv4_opt;
96487 +#endif
96488 +    struct device_attribute     *dev_attr_dsar_regs;
96489 +    struct device_attribute     *dev_attr_dsar_mem;
96490 +    struct auto_res_tables_sizes dsar_table_sizes;
96491 +} t_LnxWrpFmPortDev;
96492 +
96493 +typedef struct {
96494 +    uint8_t                     id;
96495 +    bool                        active;
96496 +    uint64_t                    baseAddr;
96497 +    uint32_t                    memSize;
96498 +    t_WrpFmMacDevSettings       settings;
96499 +    t_Handle                    h_Dev;
96500 +    t_Handle                    h_LnxWrpFmDev;
96501 +} t_LnxWrpFmMacDev;
96502 +
96503 +/* information about all active ports for an FMan.
96504 + * !Some ports may be disabled by u-boot, thus will not be available */
96505 +struct fm_active_ports {
96506 +    uint32_t num_oh_ports;
96507 +    uint32_t num_tx_ports;
96508 +    uint32_t num_rx_ports;
96509 +    uint32_t num_tx25_ports;
96510 +    uint32_t num_rx25_ports;
96511 +    uint32_t num_tx10_ports;
96512 +    uint32_t num_rx10_ports;
96513 +};
96514 +
96515 +/* FMan resources precalculated at fm probe based
96516 + * on available FMan port. */
96517 +struct fm_resource_settings {
96518 +    /* buffers - fifo sizes */
96519 +    uint32_t tx1g_num_buffers;
96520 +    uint32_t rx1g_num_buffers;
96521 +    uint32_t tx2g5_num_buffers; /* Not supported yet by LLD */
96522 +    uint32_t rx2g5_num_buffers; /* Not supported yet by LLD */
96523 +    uint32_t tx10g_num_buffers;
96524 +    uint32_t rx10g_num_buffers;
96525 +    uint32_t oh_num_buffers;
96526 +    uint32_t shared_ext_buffers;
96527 +
96528 +    /* open DMAs */
96529 +    uint32_t tx_1g_dmas;
96530 +    uint32_t rx_1g_dmas;
96531 +    uint32_t tx_2g5_dmas; /* Not supported yet by LLD */
96532 +    uint32_t rx_2g5_dmas; /* Not supported yet by LLD */
96533 +    uint32_t tx_10g_dmas;
96534 +    uint32_t rx_10g_dmas;
96535 +    uint32_t oh_dmas;
96536 +    uint32_t shared_ext_open_dma;
96537 +
96538 +    /* Tnums */
96539 +    uint32_t tx_1g_tnums;
96540 +    uint32_t rx_1g_tnums;
96541 +    uint32_t tx_2g5_tnums; /* Not supported yet by LLD */
96542 +    uint32_t rx_2g5_tnums; /* Not supported yet by LLD */
96543 +    uint32_t tx_10g_tnums;
96544 +    uint32_t rx_10g_tnums;
96545 +    uint32_t oh_tnums;
96546 +    uint32_t shared_ext_tnums;
96547 +};
96548 +
96549 +typedef struct {
96550 +    uint8_t                     id;
96551 +    char                        name[10];
96552 +    bool                        active;
96553 +    bool                        pcdActive;
96554 +    bool                        prsActive;
96555 +    bool                        kgActive;
96556 +    bool                        ccActive;
96557 +    bool                        plcrActive;
96558 +    e_LnxWrpFmPortPcdDefUseCase defPcd;
96559 +    uint32_t                    usedSchemes;
96560 +    uint8_t                     totalNumOfSharedSchemes;
96561 +    uint8_t                     sharedSchemesBase;
96562 +    uint8_t                     numOfSchemesUsed;
96563 +    uint8_t                     defNetEnvId;
96564 +    uint64_t                    fmPhysBaseAddr;
96565 +    uint64_t                    fmBaseAddr;
96566 +    uint32_t                    fmMemSize;
96567 +    uint64_t                    fmMuramPhysBaseAddr;
96568 +    uint64_t                    fmMuramBaseAddr;
96569 +    uint32_t                    fmMuramMemSize;
96570 +    uint64_t                    fmRtcPhysBaseAddr;
96571 +    uint64_t                    fmRtcBaseAddr;
96572 +    uint32_t                    fmRtcMemSize;
96573 +    uint64_t                    fmVspPhysBaseAddr;
96574 +    uint64_t                    fmVspBaseAddr;
96575 +    uint32_t                    fmVspMemSize;
96576 +    int                         irq;
96577 +    int                         err_irq;
96578 +    t_WrpFmDevSettings          fmDevSettings;
96579 +    t_WrpFmPcdDevSettings       fmPcdDevSettings;
96580 +    t_Handle                    h_Dev;
96581 +    uint16_t                    hcCh;
96582 +
96583 +    t_Handle                    h_MuramDev;
96584 +    t_Handle                    h_PcdDev;
96585 +    t_Handle                    h_RtcDev;
96586 +
96587 +    t_Handle                   h_DsarRxPort;
96588 +    t_Handle                   h_DsarTxPort;
96589 +
96590 +    t_LnxWrpFmPortDev           hcPort;
96591 +    t_LnxWrpFmPortDev           opPorts[FM_MAX_NUM_OF_OH_PORTS-1];
96592 +    t_LnxWrpFmPortDev           rxPorts[FM_MAX_NUM_OF_RX_PORTS];
96593 +    t_LnxWrpFmPortDev           txPorts[FM_MAX_NUM_OF_TX_PORTS];
96594 +    t_LnxWrpFmMacDev            macs[FM_MAX_NUM_OF_MACS];
96595 +    struct fm_active_ports      fm_active_ports_info;
96596 +    struct fm_resource_settings fm_resource_settings_info;
96597 +
96598 +    struct device               *dev;
96599 +    struct resource             *res;
96600 +    int                         major;
96601 +    struct class                *fm_class;
96602 +    struct device_attribute     *dev_attr_stats;
96603 +    struct device_attribute     *dev_attr_regs;
96604 +    struct device_attribute     *dev_attr_risc_load;
96605 +
96606 +    struct device_attribute     *dev_pcd_attr_stats;
96607 +    struct device_attribute     *dev_plcr_attr_regs;
96608 +    struct device_attribute     *dev_prs_attr_regs;
96609 +    struct device_attribute     *dev_fm_fpm_attr_regs;
96610 +    struct device_attribute     *dev_fm_kg_attr_regs;
96611 +    struct device_attribute     *dev_fm_kg_pe_attr_regs;
96612 +    struct device_attribute     *dev_attr_muram_free_size;
96613 +    struct device_attribute     *dev_attr_fm_ctrl_code_ver;
96614 +
96615 +
96616 +    struct qman_fq              *hc_tx_conf_fq, *hc_tx_err_fq, *hc_tx_fq;
96617 +} t_LnxWrpFmDev;
96618 +
96619 +typedef struct {
96620 +    t_LnxWrpFmDev   *p_FmDevs[INTG_MAX_NUM_OF_FM];
96621 +} t_LnxWrpFm;
96622 +#define LNXWRP_FM_OBJECT(ptr)   LIST_OBJECT(ptr, t_LnxWrpFm, fms[((t_LnxWrpFmDev *)ptr)->id])
96623 +
96624 +
96625 +t_Error  LnxwrpFmIOCTL(t_LnxWrpFmDev *p_LnxWrpFmDev, unsigned int cmd, unsigned long arg, bool compat);
96626 +t_Error  LnxwrpFmPortIOCTL(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev, unsigned int cmd, unsigned long arg, bool compat);
96627 +
96628 +
96629 +#if 0
96630 +static __inline__ t_Error AllocSchemesForPort(t_LnxWrpFmDev *p_LnxWrpFmDev, uint8_t numSchemes, uint8_t *p_BaseSchemeNum)
96631 +{
96632 +    uint32_t    schemeMask;
96633 +    uint8_t     i;
96634 +
96635 +    if (!numSchemes)
96636 +        RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
96637 +
96638 +    schemeMask = 0x80000000;
96639 +    *p_BaseSchemeNum = 0xff;
96640 +
96641 +    for (i=0; schemeMask && numSchemes; schemeMask>>=1, i++)
96642 +        if ((p_LnxWrpFmDev->usedSchemes & schemeMask) == 0)
96643 +        {
96644 +            p_LnxWrpFmDev->usedSchemes |= schemeMask;
96645 +            numSchemes--;
96646 +            if (*p_BaseSchemeNum==0xff)
96647 +                *p_BaseSchemeNum = i;
96648 +        }
96649 +        else if (*p_BaseSchemeNum!=0xff)
96650 +            RETURN_ERROR(MINOR, E_INVALID_STATE, ("Fragmentation on schemes array!!!"));
96651 +
96652 +    if (numSchemes)
96653 +        RETURN_ERROR(MINOR, E_FULL, ("schemes!!!"));
96654 +    return E_OK;
96655 +}
96656 +#endif
96657 +
96658 +void LnxWrpPCDIOCTLTypeChecking(void);
96659 +void LnxWrpPCDIOCTLEnumChecking(void);
96660 +
96661 +#endif /* __LNXWRP_FM_H__ */
96662 --- /dev/null
96663 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm_port.c
96664 @@ -0,0 +1,1480 @@
96665 +/*
96666 + * Copyright 2008-2012 Freescale Semiconductor Inc.
96667 + *
96668 + * Redistribution and use in source and binary forms, with or without
96669 + * modification, are permitted provided that the following conditions are met:
96670 + *     * Redistributions of source code must retain the above copyright
96671 + *       notice, this list of conditions and the following disclaimer.
96672 + *     * Redistributions in binary form must reproduce the above copyright
96673 + *       notice, this list of conditions and the following disclaimer in the
96674 + *       documentation and/or other materials provided with the distribution.
96675 + *     * Neither the name of Freescale Semiconductor nor the
96676 + *       names of its contributors may be used to endorse or promote products
96677 + *       derived from this software without specific prior written permission.
96678 + *
96679 + *
96680 + * ALTERNATIVELY, this software may be distributed under the terms of the
96681 + * GNU General Public License ("GPL") as published by the Free Software
96682 + * Foundation, either version 2 of that License or (at your option) any
96683 + * later version.
96684 + *
96685 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
96686 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
96687 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
96688 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
96689 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
96690 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
96691 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
96692 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
96693 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
96694 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96695 + */
96696 +
96697 +/*
96698 + @File          lnxwrp_fm_port.c
96699 +
96700 + @Description   FMD wrapper - FMan port functions.
96701 +
96702 +*/
96703 +
96704 +#include <linux/version.h>
96705 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
96706 +#define MODVERSIONS
96707 +#endif
96708 +#ifdef MODVERSIONS
96709 +#include <config/modversions.h>
96710 +#endif /* MODVERSIONS */
96711 +#include <linux/kernel.h>
96712 +#include <linux/module.h>
96713 +#include <linux/of_platform.h>
96714 +#include <linux/of_address.h>
96715 +#include <linux/cdev.h>
96716 +#include <linux/slab.h>
96717 +#include <linux/spinlock.h>
96718 +#ifndef CONFIG_FMAN_ARM
96719 +#include <linux/fsl/svr.h>
96720 +#endif
96721 +#include <linux/io.h>
96722 +
96723 +#include "sprint_ext.h"
96724 +#include "fm_common.h"
96725 +#include "lnxwrp_fsl_fman.h"
96726 +#include "fm_port_ext.h"
96727 +#if (DPAA_VERSION >= 11)
96728 +#include "fm_vsp_ext.h"
96729 +#endif /* DPAA_VERSION >= 11 */
96730 +#include "fm_ioctls.h"
96731 +#include "lnxwrp_resources.h"
96732 +#include "lnxwrp_sysfs_fm_port.h"
96733 +
96734 +#define __ERR_MODULE__  MODULE_FM
96735 +
96736 +extern struct device_node *GetFmAdvArgsDevTreeNode (uint8_t fmIndx);
96737 +
96738 +/* TODO: duplicated, see lnxwrp_fm.c */
96739 +#define ADD_ADV_CONFIG_NO_RET(_func, _param)\
96740 +do {\
96741 +       if (i < max) {\
96742 +               p_Entry = &p_Entrys[i];\
96743 +               p_Entry->p_Function = _func;\
96744 +               _param\
96745 +               i++;\
96746 +       } else {\
96747 +               REPORT_ERROR(MAJOR, E_INVALID_VALUE,\
96748 +               ("Number of advanced-configuration entries exceeded"));\
96749 +       } \
96750 +} while (0)
96751 +
96752 +#ifndef CONFIG_FMAN_ARM
96753 +#define IS_T1023_T1024 (SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1024 || \
96754 +                       SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1023)
96755 +#endif
96756 +
96757 +static volatile int hcFrmRcv/* = 0 */;
96758 +static spinlock_t lock;
96759 +
96760 +static enum qman_cb_dqrr_result qm_tx_conf_dqrr_cb(struct qman_portal *portal,
96761 +                                                  struct qman_fq *fq,
96762 +                                                  const struct qm_dqrr_entry
96763 +                                                  *dq)
96764 +{
96765 +       t_LnxWrpFmDev *p_LnxWrpFmDev = ((t_FmTestFq *) fq)->h_Arg;
96766 +       unsigned long flags;
96767 +
96768 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
96769 +{
96770 +       /* extract the HC frame address */
96771 +       uint32_t *hcf_va = XX_PhysToVirt(qm_fd_addr((struct qm_fd *)&dq->fd));
96772 +       int hcf_l = ((struct qm_fd *)&dq->fd)->length20;
96773 +       int i;
96774 +
96775 +       /* 32b byteswap of all data in the HC Frame */
96776 +       for(i = 0; i < hcf_l / 4; ++i)
96777 +               hcf_va[i] =
96778 +                       ___constant_swab32(hcf_va[i]);
96779 +}
96780 +#endif
96781 +       FM_PCD_HcTxConf(p_LnxWrpFmDev->h_PcdDev, (t_DpaaFD *)&dq->fd);
96782 +       spin_lock_irqsave(&lock, flags);
96783 +       hcFrmRcv--;
96784 +       spin_unlock_irqrestore(&lock, flags);
96785 +
96786 +       return qman_cb_dqrr_consume;
96787 +}
96788 +
96789 +static enum qman_cb_dqrr_result qm_tx_dqrr_cb(struct qman_portal *portal,
96790 +                                             struct qman_fq *fq,
96791 +                                             const struct qm_dqrr_entry *dq)
96792 +{
96793 +       WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
96794 +            __func__);
96795 +       return qman_cb_dqrr_consume;
96796 +}
96797 +
96798 +static void qm_err_cb(struct qman_portal *portal,
96799 +                     struct qman_fq *fq, const struct qm_mr_entry *msg)
96800 +{
96801 +       WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
96802 +            __func__);
96803 +}
96804 +
96805 +static struct qman_fq *FqAlloc(t_LnxWrpFmDev * p_LnxWrpFmDev,
96806 +                              uint32_t fqid,
96807 +                              uint32_t flags, uint16_t channel, uint8_t wq)
96808 +{
96809 +       int _errno;
96810 +       struct qman_fq *fq = NULL;
96811 +       t_FmTestFq *p_FmtFq;
96812 +       struct qm_mcc_initfq initfq;
96813 +
96814 +       p_FmtFq = (t_FmTestFq *) XX_Malloc(sizeof(t_FmTestFq));
96815 +       if (!p_FmtFq) {
96816 +               REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FQ obj!!!"));
96817 +               return NULL;
96818 +       }
96819 +
96820 +       p_FmtFq->fq_base.cb.dqrr = ((flags & QMAN_FQ_FLAG_NO_ENQUEUE)
96821 +                       ? qm_tx_conf_dqrr_cb
96822 +                       : qm_tx_dqrr_cb);
96823 +       p_FmtFq->fq_base.cb.ern = qm_err_cb;
96824 +       /* p_FmtFq->fq_base.cb.fqs = qm_err_cb; */
96825 +       /* qm_err_cb wrongly called when the FQ is parked */
96826 +       p_FmtFq->fq_base.cb.fqs = NULL;
96827 +       p_FmtFq->h_Arg = (t_Handle) p_LnxWrpFmDev;
96828 +       if (fqid == 0) {
96829 +               flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
96830 +               flags &= ~QMAN_FQ_FLAG_NO_MODIFY;
96831 +       } else {
96832 +               flags &= ~QMAN_FQ_FLAG_DYNAMIC_FQID;
96833 +       }
96834 +
96835 +       if (qman_create_fq(fqid, flags, &p_FmtFq->fq_base)) {
96836 +               REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FQ obj - qman_new_fq!!!"));
96837 +               XX_Free(p_FmtFq);
96838 +               return NULL;
96839 +       }
96840 +       fq = &p_FmtFq->fq_base;
96841 +
96842 +       if (!(flags & QMAN_FQ_FLAG_NO_MODIFY)) {
96843 +               initfq.we_mask = QM_INITFQ_WE_DESTWQ;
96844 +               initfq.fqd.dest.channel = channel;
96845 +               initfq.fqd.dest.wq = wq;
96846 +
96847 +               _errno = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &initfq);
96848 +               if (unlikely(_errno < 0)) {
96849 +                       REPORT_ERROR(MAJOR, E_NO_MEMORY,
96850 +                                    ("FQ obj - qman_init_fq!!!"));
96851 +                       qman_destroy_fq(fq, 0);
96852 +                       XX_Free(p_FmtFq);
96853 +                       return NULL;
96854 +               }
96855 +       }
96856 +
96857 +       DBG(TRACE,
96858 +           ("fqid %d, flags 0x%08x, channel %d, wq %d", qman_fq_fqid(fq),
96859 +            flags, channel, wq));
96860 +
96861 +       return fq;
96862 +}
96863 +
96864 +static void FqFree(struct qman_fq *fq)
96865 +{
96866 +       int _errno;
96867 +
96868 +       _errno = qman_retire_fq(fq, NULL);
96869 +       if (unlikely(_errno < 0))
96870 +               printk(KERN_WARNING "qman_retire_fq(%u) = %d\n", qman_fq_fqid(fq), _errno);
96871 +
96872 +       _errno = qman_oos_fq(fq);
96873 +       if (unlikely(_errno < 0))
96874 +               printk(KERN_WARNING "qman_oos_fq(%u) = %d\n", qman_fq_fqid(fq), _errno);
96875 +
96876 +       qman_destroy_fq(fq, 0);
96877 +       XX_Free((t_FmTestFq *) fq);
96878 +}
96879 +
96880 +static t_Error QmEnqueueCB(t_Handle h_Arg, void *p_Fd)
96881 +{
96882 +       t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *) h_Arg;
96883 +       int _errno, timeout = 1000000;
96884 +       unsigned long flags;
96885 +
96886 +       ASSERT_COND(p_LnxWrpFmDev);
96887 +
96888 +       spin_lock_irqsave(&lock, flags);
96889 +       hcFrmRcv++;
96890 +       spin_unlock_irqrestore(&lock, flags);
96891 +
96892 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
96893 +{
96894 +       /* extract the HC frame address */
96895 +       uint32_t *hcf_va = XX_PhysToVirt(qm_fd_addr((struct qm_fd *) p_Fd));
96896 +       int hcf_l = ((struct qm_fd *)p_Fd)->length20;
96897 +       int i;
96898 +
96899 +       /* 32b byteswap of all data in the HC Frame */
96900 +       for(i = 0; i < hcf_l / 4; ++i)
96901 +               hcf_va[i] =
96902 +                       ___constant_swab32(hcf_va[i]);
96903 +}
96904 +#endif
96905 +
96906 +       _errno = qman_enqueue(p_LnxWrpFmDev->hc_tx_fq, (struct qm_fd *) p_Fd,
96907 +                             0);
96908 +       if (_errno)
96909 +               RETURN_ERROR(MINOR, E_INVALID_STATE,
96910 +                            ("qman_enqueue() failed"));
96911 +
96912 +       while (hcFrmRcv && --timeout) {
96913 +               udelay(1);
96914 +               cpu_relax();
96915 +       }
96916 +       if (timeout == 0) {
96917 +               dump_stack();
96918 +               RETURN_ERROR(MINOR, E_WRITE_FAILED,
96919 +                            ("timeout waiting for Tx confirmation"));
96920 +               return E_WRITE_FAILED;
96921 +       }
96922 +
96923 +       return E_OK;
96924 +}
96925 +
96926 +static t_LnxWrpFmPortDev *ReadFmPortDevTreeNode(struct platform_device
96927 +                                               *of_dev)
96928 +{
96929 +       t_LnxWrpFmDev *p_LnxWrpFmDev;
96930 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
96931 +       struct device_node *fm_node, *port_node;
96932 +       struct resource res;
96933 +       const uint32_t *uint32_prop;
96934 +       int _errno = 0, lenp;
96935 +       uint32_t tmp_prop;
96936 +
96937 +#ifdef CONFIG_FMAN_P1023
96938 +       static unsigned char have_oh_port/* = 0 */;
96939 +#endif
96940 +
96941 +       port_node = of_node_get(of_dev->dev.of_node);
96942 +
96943 +       /* Get the FM node */
96944 +       fm_node = of_get_parent(port_node);
96945 +       if (unlikely(fm_node == NULL)) {
96946 +               REPORT_ERROR(MAJOR, E_NO_DEVICE,
96947 +                            ("of_get_parent() = %d", _errno));
96948 +               return NULL;
96949 +       }
96950 +
96951 +       p_LnxWrpFmDev =
96952 +               dev_get_drvdata(&of_find_device_by_node(fm_node)->dev);
96953 +       of_node_put(fm_node);
96954 +
96955 +       /* if fm_probe() failed, no point in going further with port probing */
96956 +       if (p_LnxWrpFmDev == NULL)
96957 +               return NULL;
96958 +
96959 +       uint32_prop =
96960 +               (uint32_t *) of_get_property(port_node, "cell-index", &lenp);
96961 +       if (unlikely(uint32_prop == NULL)) {
96962 +               REPORT_ERROR(MAJOR, E_INVALID_VALUE,
96963 +                            ("of_get_property(%s, cell-index) failed",
96964 +                             port_node->full_name));
96965 +               return NULL;
96966 +       }
96967 +       tmp_prop = be32_to_cpu(*uint32_prop);
96968 +       if (WARN_ON(lenp != sizeof(uint32_t)))
96969 +               return NULL;
96970 +       if (of_device_is_compatible(port_node, "fsl,fman-port-oh")) {
96971 +               if (unlikely(tmp_prop >= FM_MAX_NUM_OF_OH_PORTS)) {
96972 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
96973 +                                    ("of_get_property(%s, cell-index) failed",
96974 +                                     port_node->full_name));
96975 +                       return NULL;
96976 +               }
96977 +
96978 +#ifdef CONFIG_FMAN_P1023
96979 +               /* Beware, this can be done when there is only
96980 +                  one FMan to be initialized */
96981 +               if (!have_oh_port) {
96982 +                       have_oh_port = 1; /* first OP/HC port
96983 +                                            is used for host command */
96984 +#else
96985 +               /* Here it is hardcoded the use of the OH port 1
96986 +                  (with cell-index 0) */
96987 +               if (tmp_prop == 0) {
96988 +#endif
96989 +                       p_LnxWrpFmPortDev = &p_LnxWrpFmDev->hcPort;
96990 +                       p_LnxWrpFmPortDev->id = 0;
96991 +                       /*
96992 +                       p_LnxWrpFmPortDev->id = *uint32_prop-1;
96993 +                       p_LnxWrpFmPortDev->id = *uint32_prop;
96994 +                       */
96995 +                       p_LnxWrpFmPortDev->settings.param.portType =
96996 +                               e_FM_PORT_TYPE_OH_HOST_COMMAND;
96997 +               } else {
96998 +                       p_LnxWrpFmPortDev =
96999 +                               &p_LnxWrpFmDev->opPorts[tmp_prop - 1];
97000 +                       p_LnxWrpFmPortDev->id = tmp_prop- 1;
97001 +                       p_LnxWrpFmPortDev->settings.param.portType =
97002 +                               e_FM_PORT_TYPE_OH_OFFLINE_PARSING;
97003 +               }
97004 +               p_LnxWrpFmPortDev->settings.param.portId = tmp_prop;
97005 +
97006 +               uint32_prop =
97007 +                       (uint32_t *) of_get_property(port_node,
97008 +                                                    "fsl,qman-channel-id",
97009 +                                                    &lenp);
97010 +               if (uint32_prop == NULL) {
97011 +                                               /*
97012 + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("missing fsl,qman-channel-id"));
97013 + */
97014 +                       XX_Print("FM warning: missing fsl,qman-channel-id"
97015 +                                       " for OH port.\n");
97016 +                       return NULL;
97017 +               }
97018 +               tmp_prop = be32_to_cpu(*uint32_prop);
97019 +               if (WARN_ON(lenp != sizeof(uint32_t)))
97020 +                       return NULL;
97021 +               p_LnxWrpFmPortDev->txCh = tmp_prop;
97022 +
97023 +               p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.
97024 +                       qmChannel = p_LnxWrpFmPortDev->txCh;
97025 +       } else if (of_device_is_compatible(port_node, "fsl,fman-port-1g-tx")) {
97026 +               tmp_prop -= 0x28;
97027 +               if (unlikely(tmp_prop >= FM_MAX_NUM_OF_1G_TX_PORTS)) {
97028 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97029 +                                       ("of_get_property(%s, cell-index) failed",
97030 +                                        port_node->full_name));
97031 +                       return NULL;
97032 +               }
97033 +               p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[tmp_prop];
97034 +
97035 +               p_LnxWrpFmPortDev->id = tmp_prop;
97036 +               p_LnxWrpFmPortDev->settings.param.portId =
97037 +                       p_LnxWrpFmPortDev->id;
97038 +               p_LnxWrpFmPortDev->settings.param.portType = e_FM_PORT_TYPE_TX;
97039 +
97040 +               uint32_prop = (uint32_t *) of_get_property(port_node,
97041 +                               "fsl,qman-channel-id", &lenp);
97042 +               if (uint32_prop == NULL) {
97043 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97044 +                                       ("missing fsl,qman-channel-id"));
97045 +                       return NULL;
97046 +               }
97047 +               tmp_prop = be32_to_cpu(*uint32_prop);
97048 +               if (WARN_ON(lenp != sizeof(uint32_t)))
97049 +                       return NULL;
97050 +               p_LnxWrpFmPortDev->txCh = tmp_prop;
97051 +               p_LnxWrpFmPortDev->
97052 +                       settings.param.specificParams.nonRxParams.qmChannel =
97053 +                       p_LnxWrpFmPortDev->txCh;
97054 +       } else if (of_device_is_compatible(port_node, "fsl,fman-port-10g-tx")) {
97055 +               tmp_prop -= 0x30;
97056 +               if (unlikely(tmp_prop>= FM_MAX_NUM_OF_10G_TX_PORTS)) {
97057 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97058 +                                       ("of_get_property(%s, cell-index) failed",
97059 +                                        port_node->full_name));
97060 +                       return NULL;
97061 +               }
97062 +               p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[tmp_prop +
97063 +                       FM_MAX_NUM_OF_1G_TX_PORTS];
97064 +#ifndef CONFIG_FMAN_ARM
97065 +               if (IS_T1023_T1024)
97066 +                       p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[*uint32_prop];
97067 +#endif
97068 +
97069 +               p_LnxWrpFmPortDev->id = tmp_prop;
97070 +               p_LnxWrpFmPortDev->settings.param.portId =
97071 +                       p_LnxWrpFmPortDev->id;
97072 +               p_LnxWrpFmPortDev->settings.param.portType =
97073 +                       e_FM_PORT_TYPE_TX_10G;
97074 +               uint32_prop = (uint32_t *) of_get_property(port_node,
97075 +                               "fsl,qman-channel-id", &lenp);
97076 +               if (uint32_prop == NULL) {
97077 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97078 +                                       ("missing fsl,qman-channel-id"));
97079 +                       return NULL;
97080 +               }
97081 +               tmp_prop = be32_to_cpu(*uint32_prop);
97082 +               if (WARN_ON(lenp != sizeof(uint32_t)))
97083 +                       return NULL;
97084 +               p_LnxWrpFmPortDev->txCh = tmp_prop;
97085 +               p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.
97086 +                       qmChannel = p_LnxWrpFmPortDev->txCh;
97087 +       } else if (of_device_is_compatible(port_node, "fsl,fman-port-1g-rx")) {
97088 +               tmp_prop -= 0x08;
97089 +               if (unlikely(tmp_prop >= FM_MAX_NUM_OF_1G_RX_PORTS)) {
97090 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97091 +                                       ("of_get_property(%s, cell-index) failed",
97092 +                                        port_node->full_name));
97093 +                       return NULL;
97094 +               }
97095 +               p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[tmp_prop];
97096 +
97097 +               p_LnxWrpFmPortDev->id = tmp_prop;
97098 +               p_LnxWrpFmPortDev->settings.param.portId =
97099 +                       p_LnxWrpFmPortDev->id;
97100 +               p_LnxWrpFmPortDev->settings.param.portType = e_FM_PORT_TYPE_RX;
97101 +               if (p_LnxWrpFmDev->pcdActive)
97102 +                       p_LnxWrpFmPortDev->defPcd = p_LnxWrpFmDev->defPcd;
97103 +       } else if (of_device_is_compatible(port_node, "fsl,fman-port-10g-rx")) {
97104 +               tmp_prop -= 0x10;
97105 +               if (unlikely(tmp_prop >= FM_MAX_NUM_OF_10G_RX_PORTS)) {
97106 +                       REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97107 +                                       ("of_get_property(%s, cell-index) failed",
97108 +                                        port_node->full_name));
97109 +                       return NULL;
97110 +               }
97111 +               p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[tmp_prop +
97112 +                       FM_MAX_NUM_OF_1G_RX_PORTS];
97113 +
97114 +#ifndef CONFIG_FMAN_ARM
97115 +               if (IS_T1023_T1024)
97116 +                       p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[*uint32_prop];
97117 +#endif
97118 +
97119 +               p_LnxWrpFmPortDev->id = tmp_prop;
97120 +               p_LnxWrpFmPortDev->settings.param.portId =
97121 +                       p_LnxWrpFmPortDev->id;
97122 +               p_LnxWrpFmPortDev->settings.param.portType =
97123 +                       e_FM_PORT_TYPE_RX_10G;
97124 +               if (p_LnxWrpFmDev->pcdActive)
97125 +                       p_LnxWrpFmPortDev->defPcd = p_LnxWrpFmDev->defPcd;
97126 +       } else {
97127 +               REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal port type"));
97128 +               return NULL;
97129 +       }
97130 +
97131 +       _errno = of_address_to_resource(port_node, 0, &res);
97132 +       if (unlikely(_errno < 0)) {
97133 +               REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97134 +                            ("of_address_to_resource() = %d", _errno));
97135 +               return NULL;
97136 +       }
97137 +
97138 +       p_LnxWrpFmPortDev->dev = &of_dev->dev;
97139 +       p_LnxWrpFmPortDev->baseAddr = 0;
97140 +       p_LnxWrpFmPortDev->phys_baseAddr = res.start;
97141 +       p_LnxWrpFmPortDev->memSize = res.end + 1 - res.start;
97142 +       p_LnxWrpFmPortDev->settings.param.h_Fm = p_LnxWrpFmDev->h_Dev;
97143 +       p_LnxWrpFmPortDev->h_LnxWrpFmDev = (t_Handle) p_LnxWrpFmDev;
97144 +
97145 +       of_node_put(port_node);
97146 +
97147 +       p_LnxWrpFmPortDev->active = TRUE;
97148 +
97149 +#if defined(CONFIG_FMAN_DISABLE_OH_TO_REUSE_RESOURCES)
97150 +       /* for performance mode no OH port available. */
97151 +       if (p_LnxWrpFmPortDev->settings.param.portType ==
97152 +           e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
97153 +               p_LnxWrpFmPortDev->active = FALSE;
97154 +#endif
97155 +
97156 +       return p_LnxWrpFmPortDev;
97157 +}
97158 +
97159 +struct device_node * GetFmPortAdvArgsDevTreeNode (struct device_node *fm_node,
97160 +                                                         e_FmPortType       portType,
97161 +                                                         uint8_t            portId)
97162 +{
97163 +    struct device_node  *port_node;
97164 +    const uint32_t      *uint32_prop;
97165 +    int                 lenp;
97166 +    char                *portTypeString;
97167 +    uint32_t            tmp_prop;
97168 +
97169 +    switch(portType) {
97170 +        case e_FM_PORT_TYPE_OH_OFFLINE_PARSING:
97171 +            portTypeString = "fsl,fman-port-op-extended-args";
97172 +            break;
97173 +        case e_FM_PORT_TYPE_TX:
97174 +            portTypeString = "fsl,fman-port-1g-tx-extended-args";
97175 +            break;
97176 +        case e_FM_PORT_TYPE_TX_10G:
97177 +            portTypeString = "fsl,fman-port-10g-tx-extended-args";
97178 +            break;
97179 +        case e_FM_PORT_TYPE_RX:
97180 +            portTypeString = "fsl,fman-port-1g-rx-extended-args";
97181 +            break;
97182 +        case e_FM_PORT_TYPE_RX_10G:
97183 +            portTypeString = "fsl,fman-port-10g-rx-extended-args";
97184 +            break;
97185 +        default:
97186 +            return NULL;
97187 +    }
97188 +
97189 +    for_each_child_of_node(fm_node, port_node) {
97190 +        uint32_prop = (uint32_t *)of_get_property(port_node, "cell-index", &lenp);
97191 +        if (unlikely(uint32_prop == NULL)) {
97192 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE,
97193 +                         ("of_get_property(%s, cell-index) failed",
97194 +                          port_node->full_name));
97195 +            return NULL;
97196 +        }
97197 +        tmp_prop = be32_to_cpu(*uint32_prop);
97198 +        if (WARN_ON(lenp != sizeof(uint32_t)))
97199 +            return NULL;
97200 +       if ((portId == tmp_prop) &&
97201 +           (of_device_is_compatible(port_node, portTypeString))) {
97202 +            return port_node;
97203 +       }
97204 +    }
97205 +
97206 +    return NULL;
97207 +}
97208 +
97209 +static t_Error CheckNConfigFmPortAdvArgs (t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
97210 +{
97211 +    struct device_node      *fm_node, *port_node;
97212 +    t_Error                 err;
97213 +    t_FmPortRsrc            portRsrc;
97214 +    const uint32_t          *uint32_prop;
97215 +    /*const char              *str_prop;*/
97216 +    int                     lenp;
97217 +#ifdef CONFIG_FMAN_PFC
97218 +    uint8_t i, id, num_pools;
97219 +    t_FmBufPoolDepletion poolDepletion;
97220 +
97221 +    if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX ||
97222 +            p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX_10G) {
97223 +        memset(&poolDepletion, 0, sizeof(t_FmBufPoolDepletion));
97224 +        poolDepletion.singlePoolModeEnable = true;
97225 +        num_pools = p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
97226 +                extBufPools.numOfPoolsUsed;
97227 +        for (i = 0; i < num_pools; i++) {
97228 +            id = p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
97229 +                    extBufPools.extBufPool[i].id;
97230 +            poolDepletion.poolsToConsiderForSingleMode[id] = true;
97231 +        }
97232 +
97233 +        for (i = 0; i < CONFIG_FMAN_PFC_COS_COUNT; i++)
97234 +            poolDepletion.pfcPrioritiesEn[i] = true;
97235 +
97236 +        err = FM_PORT_ConfigPoolDepletion(p_LnxWrpFmPortDev->h_Dev,
97237 +                &poolDepletion);
97238 +        if (err != E_OK)
97239 +            RETURN_ERROR(MAJOR, err, ("FM_PORT_ConfigPoolDepletion() failed"));
97240 +    }
97241 +#endif
97242 +
97243 +    fm_node = GetFmAdvArgsDevTreeNode(((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev)->id);
97244 +    if (!fm_node) /* no advance parameters for FMan */
97245 +        return E_OK;
97246 +
97247 +    port_node = GetFmPortAdvArgsDevTreeNode(fm_node,
97248 +                                            p_LnxWrpFmPortDev->settings.param.portType,
97249 +                                            p_LnxWrpFmPortDev->settings.param.portId);
97250 +    if (!port_node) /* no advance parameters for FMan-Port */
97251 +        return E_OK;
97252 +
97253 +    uint32_prop = (uint32_t *)of_get_property(port_node, "num-tnums", &lenp);
97254 +    if (uint32_prop) {
97255 +       if (WARN_ON(lenp != sizeof(uint32_t)*2))
97256 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97257 +
97258 +        portRsrc.num   = be32_to_cpu(uint32_prop[0]);
97259 +        portRsrc.extra = be32_to_cpu(uint32_prop[1]);
97260 +
97261 +        if ((err = FM_PORT_ConfigNumOfTasks(p_LnxWrpFmPortDev->h_Dev,
97262 +                                            &portRsrc)) != E_OK)
97263 +            RETURN_ERROR(MINOR, err, NO_MSG);
97264 +    }
97265 +
97266 +    uint32_prop = (uint32_t *)of_get_property(port_node, "num-dmas", &lenp);
97267 +    if (uint32_prop) {
97268 +       if (WARN_ON(lenp != sizeof(uint32_t)*2))
97269 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97270 +
97271 +        portRsrc.num   = be32_to_cpu(uint32_prop[0]);
97272 +        portRsrc.extra = be32_to_cpu(uint32_prop[1]);
97273 +
97274 +        if ((err = FM_PORT_ConfigNumOfOpenDmas(p_LnxWrpFmPortDev->h_Dev,
97275 +                                            &portRsrc)) != E_OK)
97276 +            RETURN_ERROR(MINOR, err, NO_MSG);
97277 +    }
97278 +
97279 +    uint32_prop = (uint32_t *)of_get_property(port_node, "fifo-size", &lenp);
97280 +    if (uint32_prop) {
97281 +       if (WARN_ON(lenp != sizeof(uint32_t)*2))
97282 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97283 +
97284 +        portRsrc.num   = be32_to_cpu(uint32_prop[0]);
97285 +        portRsrc.extra = be32_to_cpu(uint32_prop[1]);
97286 +
97287 +        if ((err = FM_PORT_ConfigSizeOfFifo(p_LnxWrpFmPortDev->h_Dev,
97288 +                                            &portRsrc)) != E_OK)
97289 +            RETURN_ERROR(MINOR, err, NO_MSG);
97290 +    }
97291 +
97292 +    uint32_prop = (uint32_t *)of_get_property(port_node, "errors-to-discard", &lenp);
97293 +    if (uint32_prop) {
97294 +       if (WARN_ON(lenp != sizeof(uint32_t)))
97295 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97296 +        if ((err = FM_PORT_ConfigErrorsToDiscard(p_LnxWrpFmPortDev->h_Dev,
97297 +                                                 be32_to_cpu(uint32_prop[0]))) != E_OK)
97298 +            RETURN_ERROR(MINOR, err, NO_MSG);
97299 +    }
97300 +
97301 +    uint32_prop = (uint32_t *)of_get_property(port_node, "ar-tables-sizes",
97302 +       &lenp);
97303 +    if (uint32_prop) {
97304 +
97305 +       if (WARN_ON(lenp != sizeof(uint32_t)*8))
97306 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97307 +       if (WARN_ON(p_LnxWrpFmPortDev->settings.param.portType !=
97308 +               e_FM_PORT_TYPE_RX) &&
97309 +               (p_LnxWrpFmPortDev->settings.param.portType !=
97310 +               e_FM_PORT_TYPE_RX_10G))
97311 +            RETURN_ERROR(MINOR, E_INVALID_VALUE,
97312 +               ("Auto Response is an Rx port atribute."));
97313 +
97314 +        memset(&p_LnxWrpFmPortDev->dsar_table_sizes, 0, sizeof(struct auto_res_tables_sizes));
97315 +
97316 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_arp_entries        =
97317 +               (uint16_t)be32_to_cpu(uint32_prop[0]);
97318 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_echo_ipv4_entries  =
97319 +               (uint16_t)be32_to_cpu(uint32_prop[1]);
97320 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_ndp_entries        =
97321 +               (uint16_t)be32_to_cpu(uint32_prop[2]);
97322 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_echo_ipv6_entries  =
97323 +               (uint16_t)be32_to_cpu(uint32_prop[3]);
97324 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_ipv4_entries   =
97325 +               (uint16_t)be32_to_cpu(uint32_prop[4]);
97326 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_ipv6_entries   =
97327 +               (uint16_t)be32_to_cpu(uint32_prop[5]);
97328 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_oid_entries   =
97329 +               (uint16_t)be32_to_cpu(uint32_prop[6]);
97330 +        p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_char          =
97331 +               (uint16_t)be32_to_cpu(uint32_prop[7]);
97332 +
97333 +       uint32_prop = (uint32_t *)of_get_property(port_node,
97334 +               "ar-filters-sizes", &lenp);
97335 +        if (uint32_prop) {
97336 +               if (WARN_ON(lenp != sizeof(uint32_t)*3))
97337 +                RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97338 +
97339 +            p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_ip_prot_filtering  =
97340 +               (uint16_t)be32_to_cpu(uint32_prop[0]);
97341 +            p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_tcp_port_filtering =
97342 +               (uint16_t)be32_to_cpu(uint32_prop[1]);
97343 +            p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_udp_port_filtering =
97344 +               (uint16_t)be32_to_cpu(uint32_prop[2]);
97345 +        }
97346 +
97347 +        if ((err = FM_PORT_ConfigDsarSupport(p_LnxWrpFmPortDev->h_Dev,
97348 +               (t_FmPortDsarTablesSizes*)&p_LnxWrpFmPortDev->dsar_table_sizes)) != E_OK)
97349 +               RETURN_ERROR(MINOR, err, NO_MSG);
97350 +    }
97351 +
97352 +    of_node_put(port_node);
97353 +    of_node_put(fm_node);
97354 +
97355 +    return E_OK;
97356 +}
97357 +
97358 +static t_Error CheckNSetFmPortAdvArgs (t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
97359 +{
97360 +    struct device_node      *fm_node, *port_node;
97361 +    t_Error                 err;
97362 +    const uint32_t          *uint32_prop;
97363 +    /*const char              *str_prop;*/
97364 +    int                     lenp;
97365 +
97366 +    fm_node = GetFmAdvArgsDevTreeNode(((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev)->id);
97367 +    if (!fm_node) /* no advance parameters for FMan */
97368 +        return E_OK;
97369 +
97370 +    port_node = GetFmPortAdvArgsDevTreeNode(fm_node,
97371 +                                            p_LnxWrpFmPortDev->settings.param.portType,
97372 +                                            p_LnxWrpFmPortDev->settings.param.portId);
97373 +    if (!port_node) /* no advance parameters for FMan-Port */
97374 +        return E_OK;
97375 +
97376 +#if (DPAA_VERSION >= 11)
97377 +    uint32_prop = (uint32_t *)of_get_property(port_node, "vsp-window", &lenp);
97378 +    if (uint32_prop) {
97379 +        t_FmPortVSPAllocParams  portVSPAllocParams;
97380 +        t_FmVspParams           fmVspParams;
97381 +        t_LnxWrpFmDev           *p_LnxWrpFmDev;
97382 +        uint8_t                 portId;
97383 +
97384 +        p_LnxWrpFmDev = ((t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev);
97385 +
97386 +       if (WARN_ON(lenp != sizeof(uint32_t)*2))
97387 +            RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
97388 +
97389 +        if ((p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_TX) ||
97390 +            (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_TX_10G) ||
97391 +            ((p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
97392 +             p_LnxWrpFmPortDev->settings.frag_enabled))
97393 +            return E_OK;
97394 +
97395 +        memset(&portVSPAllocParams, 0, sizeof(portVSPAllocParams));
97396 +        memset(&fmVspParams, 0, sizeof(fmVspParams));
97397 +
97398 +        portVSPAllocParams.numOfProfiles = (uint8_t)be32_to_cpu(uint32_prop[0]);
97399 +        portVSPAllocParams.dfltRelativeId = (uint8_t)be32_to_cpu(uint32_prop[1]);
97400 +        fmVspParams.h_Fm = p_LnxWrpFmDev->h_Dev;
97401 +
97402 +        fmVspParams.portParams.portType = p_LnxWrpFmPortDev->settings.param.portType;
97403 +        fmVspParams.portParams.portId   = p_LnxWrpFmPortDev->settings.param.portId;
97404 +        fmVspParams.relativeProfileId   = portVSPAllocParams.dfltRelativeId;
97405 +
97406 +        if (p_LnxWrpFmPortDev->settings.param.portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
97407 +        {
97408 +            portId = fmVspParams.portParams.portId;
97409 +            if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX_10G){
97410 +#ifndef CONFIG_FMAN_ARM
97411 +               if (!(IS_T1023_T1024))
97412 +#endif
97413 +                    portId += FM_MAX_NUM_OF_1G_RX_PORTS;
97414 +           }
97415 +           portVSPAllocParams.h_FmTxPort =
97416 +                p_LnxWrpFmDev->txPorts[portId].h_Dev;
97417 +            fmVspParams.liodnOffset =
97418 +                p_LnxWrpFmDev->rxPorts[portId].settings.param.specificParams.rxParams.liodnOffset;
97419 +            memcpy(&fmVspParams.extBufPools,
97420 +                   &p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.extBufPools,
97421 +                   sizeof(t_FmExtPools));
97422 +        }
97423 +        else
97424 +        {
97425 +            memcpy(&fmVspParams.extBufPools,
97426 +                   &p_LnxWrpFmPortDev->opExtPools,
97427 +                   sizeof(t_FmExtPools));
97428 +        }
97429 +
97430 +        if ((err = FM_PORT_VSPAlloc(p_LnxWrpFmPortDev->h_Dev,
97431 +                                    &portVSPAllocParams)) != E_OK)
97432 +            RETURN_ERROR(MINOR, err, NO_MSG);
97433 +
97434 +        /* We're initializing only the default VSP that are being used by the Linux-Ethernet-driver */
97435 +        if ((p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
97436 +            !p_LnxWrpFmPortDev->opExtPools.numOfPoolsUsed)
97437 +            return E_OK;
97438 +
97439 +        p_LnxWrpFmPortDev->h_DfltVsp = FM_VSP_Config(&fmVspParams);
97440 +        if (!p_LnxWrpFmPortDev->h_DfltVsp)
97441 +            RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("default-VSP for port!"));
97442 +
97443 +        if ((err = FM_VSP_ConfigBufferPrefixContent(p_LnxWrpFmPortDev->h_DfltVsp,
97444 +                                                    &p_LnxWrpFmPortDev->buffPrefixContent)) != E_OK)
97445 +            RETURN_ERROR(MINOR, err, NO_MSG);
97446 +
97447 +        if ((err = FM_VSP_Init(p_LnxWrpFmPortDev->h_DfltVsp)) != E_OK)
97448 +            RETURN_ERROR(MINOR, err, NO_MSG);
97449 +    }
97450 +#else
97451 +UNUSED(err); UNUSED(uint32_prop); UNUSED(lenp);
97452 +#endif /* (DPAA_VERSION >= 11) */
97453 +
97454 +    of_node_put(port_node);
97455 +    of_node_put(fm_node);
97456 +
97457 +    return E_OK;
97458 +}
97459 +
97460 +static t_Error ConfigureFmPortDev(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
97461 +{
97462 +       t_LnxWrpFmDev *p_LnxWrpFmDev =
97463 +               (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
97464 +       struct resource *dev_res;
97465 +
97466 +       if (!p_LnxWrpFmPortDev->active)
97467 +               RETURN_ERROR(MAJOR, E_INVALID_STATE,
97468 +                            ("FM port not configured!!!"));
97469 +
97470 +       dev_res =
97471 +               __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res,
97472 +                                     p_LnxWrpFmPortDev->phys_baseAddr,
97473 +                                     p_LnxWrpFmPortDev->memSize,
97474 +                                     "fman-port-hc");
97475 +       if (unlikely(dev_res == NULL))
97476 +               RETURN_ERROR(MAJOR, E_INVALID_STATE,
97477 +                            ("__devm_request_region() failed"));
97478 +       p_LnxWrpFmPortDev->baseAddr =
97479 +               PTR_TO_UINT(devm_ioremap
97480 +                           (p_LnxWrpFmDev->dev,
97481 +                            p_LnxWrpFmPortDev->phys_baseAddr,
97482 +                            p_LnxWrpFmPortDev->memSize));
97483 +       if (unlikely(p_LnxWrpFmPortDev->baseAddr == 0))
97484 +               REPORT_ERROR(MAJOR, E_INVALID_STATE,
97485 +                            ("devm_ioremap() failed"));
97486 +
97487 +       p_LnxWrpFmPortDev->settings.param.baseAddr =
97488 +               p_LnxWrpFmPortDev->baseAddr;
97489 +
97490 +       return E_OK;
97491 +}
97492 +
97493 +static t_Error InitFmPortDev(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
97494 +{
97495 +#define MY_ADV_CONFIG_CHECK_END \
97496 +               RETURN_ERROR(MAJOR, E_INVALID_SELECTION,\
97497 +                       ("Advanced configuration routine"));\
97498 +               if (errCode != E_OK)\
97499 +                       RETURN_ERROR(MAJOR, errCode, NO_MSG);\
97500 +       }
97501 +
97502 +       int i = 0;
97503 +
97504 +       if (!p_LnxWrpFmPortDev->active || p_LnxWrpFmPortDev->h_Dev)
97505 +               return E_INVALID_STATE;
97506 +
97507 +       p_LnxWrpFmPortDev->h_Dev =
97508 +                    FM_PORT_Config(&p_LnxWrpFmPortDev->settings.param);
97509 +       if (p_LnxWrpFmPortDev->h_Dev == NULL)
97510 +               RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-port"));
97511 +
97512 +#ifndef  FM_QMI_NO_DEQ_OPTIONS_SUPPORT
97513 +       if ((p_LnxWrpFmPortDev->settings.param.portType ==
97514 +            e_FM_PORT_TYPE_TX_10G)
97515 +           || (p_LnxWrpFmPortDev->settings.param.portType ==
97516 +               e_FM_PORT_TYPE_TX)) {
97517 +               t_Error errCode = E_OK;
97518 +               errCode =
97519 +                    FM_PORT_ConfigDeqHighPriority(p_LnxWrpFmPortDev->h_Dev,
97520 +                                                                  TRUE);
97521 +               if (errCode != E_OK)
97522 +                       RETURN_ERROR(MAJOR, errCode, NO_MSG);
97523 +               errCode =
97524 +               FM_PORT_ConfigDeqPrefetchOption(p_LnxWrpFmPortDev->h_Dev,
97525 +                                               e_FM_PORT_DEQ_FULL_PREFETCH);
97526 +               if (errCode
97527 +                   != E_OK)
97528 +                       RETURN_ERROR(MAJOR, errCode, NO_MSG);
97529 +       }
97530 +#endif  /* !FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
97531 +
97532 +#ifndef CONFIG_FMAN_ARM
97533 +#ifdef FM_BCB_ERRATA_BMI_SW001
97534 +/* Configure BCB workaround on Rx ports, only for B4860 rev1 */
97535 +#define SVR_SECURITY_MASK    0x00080000
97536 +#define SVR_PERSONALITY_MASK 0x0000FF00
97537 +#define SVR_VER_IGNORE_MASK (SVR_SECURITY_MASK | SVR_PERSONALITY_MASK)
97538 +#define SVR_B4860_REV1_VALUE 0x86800010
97539 +
97540 +       if ((p_LnxWrpFmPortDev->settings.param.portType ==
97541 +               e_FM_PORT_TYPE_RX_10G) ||
97542 +               (p_LnxWrpFmPortDev->settings.param.portType ==
97543 +               e_FM_PORT_TYPE_RX)) {
97544 +               unsigned int svr;
97545 +
97546 +               svr = mfspr(SPRN_SVR);
97547 +
97548 +               if ((svr & ~SVR_VER_IGNORE_MASK) == SVR_B4860_REV1_VALUE)
97549 +                       FM_PORT_ConfigBCBWorkaround(p_LnxWrpFmPortDev->h_Dev);
97550 +       }
97551 +#endif /* FM_BCB_ERRATA_BMI_SW001 */
97552 +#endif /* CONFIG_FMAN_ARM */
97553 +/* Call the driver's advanced configuration routines, if requested:
97554 +   Compare the function pointer of each entry to the available routines,
97555 +   and invoke the matching routine with proper casting of arguments. */
97556 +       while (p_LnxWrpFmPortDev->settings.advConfig[i].p_Function
97557 +              && (i < FM_MAX_NUM_OF_ADV_SETTINGS)) {
97558 +
97559 +/* TODO: Change this MACRO */
97560 +                       ADV_CONFIG_CHECK_START(
97561 +                               &(p_LnxWrpFmPortDev->settings.advConfig[i]))
97562 +
97563 +                       ADV_CONFIG_CHECK(p_LnxWrpFmPortDev->h_Dev,
97564 +                                        FM_PORT_ConfigBufferPrefixContent,
97565 +                                        NCSW_PARAMS(1,
97566 +                                               (t_FmBufferPrefixContent *)))
97567 +
97568 +                       if ((p_LnxWrpFmPortDev->settings.param.portType ==
97569 +                                   e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
97570 +                                  (p_LnxWrpFmPortDev->settings.frag_enabled == TRUE)) {
97571 +
97572 +                               ADV_CONFIG_CHECK(p_LnxWrpFmPortDev->h_Dev,
97573 +                                       FM_PORT_ConfigExtBufPools,
97574 +                                       NCSW_PARAMS(1, (t_FmExtPools *)))
97575 +
97576 +               /* this define contains an else */
97577 +               MY_ADV_CONFIG_CHECK_END
97578 +               }
97579 +
97580 +                       /* Advance to next advanced configuration entry */
97581 +                       i++;
97582 +       }
97583 +
97584 +
97585 +    if ((p_LnxWrpFmPortDev->settings.param.portType != e_FM_PORT_TYPE_TX) &&
97586 +        (p_LnxWrpFmPortDev->settings.param.portType != e_FM_PORT_TYPE_TX_10G)) {
97587 +            if (FM_PORT_ConfigErrorsToDiscard(p_LnxWrpFmPortDev->h_Dev, (FM_PORT_FRM_ERR_IPRE |
97588 +                                                                         FM_PORT_FRM_ERR_IPR_NCSP |
97589 +                                                                         FM_PORT_FRM_ERR_CLS_DISCARD)) !=E_OK)
97590 +            RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
97591 +    }
97592 +
97593 +    if (CheckNConfigFmPortAdvArgs(p_LnxWrpFmPortDev) != E_OK)
97594 +               RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
97595 +
97596 +    if (FM_PORT_Init(p_LnxWrpFmPortDev->h_Dev) != E_OK)
97597 +               RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
97598 +
97599 +    if (CheckNSetFmPortAdvArgs(p_LnxWrpFmPortDev) != E_OK)
97600 +               RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
97601 +
97602 +/* FMan Fifo sizes behind the scene":
97603 + * Using the following formulae (*), under a set of simplifying assumptions (.):
97604 + *  . all ports are configured in Normal Mode (rather than Independent Mode)
97605 + *  . the DPAA Eth driver allocates buffers of size:
97606 + *      . MAXFRM + NET_IP_ALIGN + DPA_PRIV_DATA_SIZE + DPA_PARSE_RESULTS_SIZE
97607 + *              + DPA_HASH_RESULTS_SIZE, i.e.:
97608 + *        MAXFRM + 2 + 16 + sizeof(t_FmPrsResult) + 16, i.e.:
97609 + *        MAXFRM + 66
97610 + *  . excessive buffer pools not accounted for
97611 + *
97612 + *  * for Rx ports on P4080:
97613 + *      . IFSZ = ceil(max(FMBM_EBMPI[PBS]) / 256) * 256 + 7 * 256
97614 + *      . no internal frame offset (FMBM_RIM[FOF] == 0) - otherwise,
97615 + *      add up to 256 to the above
97616 + *
97617 + *  * for Rx ports on P1023:
97618 + *      . IFSZ = ceil(second_largest(FMBM_EBMPI[PBS] / 256)) * 256 + 7 * 256,
97619 + *      if at least 2 bpools are configured
97620 + *      . IFSZ = 8 * 256, if only a single bpool is configured
97621 + *
97622 + *  * for Tx ports:
97623 + *      . IFSZ = ceil(frame_size / 256) * 256 + 3 * 256
97624 + *                     + FMBM_TFP[DPDE] * 256, i.e.:
97625 + *        IFSZ = ceil(MAXFRM / 256) * 256 + 3 x 256 + FMBM_TFP[DPDE] * 256
97626 + *
97627 + *  * for OH ports on P4080:
97628 + *      . IFSZ = ceil(frame_size / 256) * 256 + 1 * 256 + FMBM_PP[MXT] * 256
97629 + *  * for OH ports on P1023:
97630 + *      . IFSZ = ceil(frame_size / 256) * 256 + 3 * 256 + FMBM_TFP[DPDE] * 256
97631 + *  * for both P4080 and P1023:
97632 + *      . (conservative decisions, assuming that BMI must bring the entire
97633 + *      frame, not only the frame header)
97634 + *      . no internal frame offset (FMBM_OIM[FOF] == 0) - otherwise,
97635 + *      add up to 256 to the above
97636 + *
97637 + *  . for P4080/P5020/P3041/P2040, DPDE is:
97638 + *              > 0 or 1, for 1Gb ports, HW default: 0
97639 + *              > 2..7 (recommended: 3..7) for 10Gb ports, HW default: 3
97640 + *  . for P1023, DPDE should be 1
97641 + *
97642 + *  . for P1023, MXT is in range (0..31)
97643 + *  . for P4080, MXT is in range (0..63)
97644 + *
97645 + */
97646 +#if 0
97647 +       if ((p_LnxWrpFmPortDev->defPcd != e_NO_PCD) &&
97648 +           (InitFmPort3TupleDefPcd(p_LnxWrpFmPortDev) != E_OK))
97649 +               RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
97650 +#endif
97651 +       return E_OK;
97652 +}
97653 +
97654 +void fm_set_rx_port_params(struct fm_port *port,
97655 +                          struct fm_port_params *params)
97656 +{
97657 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) port;
97658 +       int i;
97659 +
97660 +       p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.errFqid =
97661 +               params->errq;
97662 +       p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.dfltFqid =
97663 +               params->defq;
97664 +       p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.extBufPools.
97665 +               numOfPoolsUsed = params->num_pools;
97666 +       for (i = 0; i < params->num_pools; i++) {
97667 +               p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
97668 +                       extBufPools.extBufPool[i].id =
97669 +                       params->pool_param[i].id;
97670 +               p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
97671 +                       extBufPools.extBufPool[i].size =
97672 +                       params->pool_param[i].size;
97673 +       }
97674 +
97675 +       p_LnxWrpFmPortDev->buffPrefixContent.privDataSize =
97676 +               params->priv_data_size;
97677 +       p_LnxWrpFmPortDev->buffPrefixContent.passPrsResult =
97678 +               params->parse_results;
97679 +       p_LnxWrpFmPortDev->buffPrefixContent.passHashResult =
97680 +               params->hash_results;
97681 +       p_LnxWrpFmPortDev->buffPrefixContent.passTimeStamp =
97682 +               params->time_stamp;
97683 +       p_LnxWrpFmPortDev->buffPrefixContent.dataAlign =
97684 +               params->data_align;
97685 +       p_LnxWrpFmPortDev->buffPrefixContent.manipExtraSpace =
97686 +               params->manip_extra_space;
97687 +
97688 +       ADD_ADV_CONFIG_START(p_LnxWrpFmPortDev->settings.advConfig,
97689 +                            FM_MAX_NUM_OF_ADV_SETTINGS)
97690 +
97691 +               ADD_ADV_CONFIG_NO_RET(FM_PORT_ConfigBufferPrefixContent,
97692 +                                     ARGS(1,
97693 +                                          (&p_LnxWrpFmPortDev->
97694 +                                           buffPrefixContent)));
97695 +
97696 +       ADD_ADV_CONFIG_END InitFmPortDev(p_LnxWrpFmPortDev);
97697 +}
97698 +EXPORT_SYMBOL(fm_set_rx_port_params);
97699 +
97700 +/* this function is called from oh_probe as well, thus it contains oh port
97701 + * specific parameters (make sure everything is checked) */
97702 +void fm_set_tx_port_params(struct fm_port *port,
97703 +                          struct fm_port_params *params)
97704 +{
97705 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) port;
97706 +
97707 +       p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.errFqid =
97708 +               params->errq;
97709 +       p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.
97710 +               dfltFqid = params->defq;
97711 +
97712 +       p_LnxWrpFmPortDev->buffPrefixContent.privDataSize =
97713 +               params->priv_data_size;
97714 +       p_LnxWrpFmPortDev->buffPrefixContent.passPrsResult =
97715 +               params->parse_results;
97716 +       p_LnxWrpFmPortDev->buffPrefixContent.passHashResult =
97717 +               params->hash_results;
97718 +       p_LnxWrpFmPortDev->buffPrefixContent.passTimeStamp =
97719 +               params->time_stamp;
97720 +       p_LnxWrpFmPortDev->settings.frag_enabled =
97721 +               params->frag_enable;
97722 +       p_LnxWrpFmPortDev->buffPrefixContent.dataAlign =
97723 +               params->data_align;
97724 +       p_LnxWrpFmPortDev->buffPrefixContent.manipExtraSpace =
97725 +               params->manip_extra_space;
97726 +
97727 +       ADD_ADV_CONFIG_START(p_LnxWrpFmPortDev->settings.advConfig,
97728 +                            FM_MAX_NUM_OF_ADV_SETTINGS)
97729 +
97730 +       ADD_ADV_CONFIG_NO_RET(FM_PORT_ConfigBufferPrefixContent,
97731 +                             ARGS(1,
97732 +                                  (&p_LnxWrpFmPortDev->
97733 +                                   buffPrefixContent)));
97734 +
97735 +       /* oh port specific parameter (for fragmentation only) */
97736 +       if ((p_LnxWrpFmPortDev->settings.param.portType ==
97737 +            e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
97738 +            params->num_pools) {
97739 +               int i;
97740 +
97741 +               p_LnxWrpFmPortDev->opExtPools.numOfPoolsUsed = params->num_pools;
97742 +               for (i = 0; i < params->num_pools; i++) {
97743 +                       p_LnxWrpFmPortDev->opExtPools.extBufPool[i].id = params->pool_param[i].id;
97744 +                       p_LnxWrpFmPortDev->opExtPools.extBufPool[i].size = params->pool_param[i].size;
97745 +               }
97746 +
97747 +               if (p_LnxWrpFmPortDev->settings.frag_enabled)
97748 +               ADD_ADV_CONFIG_NO_RET(FM_PORT_ConfigExtBufPools,
97749 +                                     ARGS(1, (&p_LnxWrpFmPortDev->opExtPools)));
97750 +       }
97751 +
97752 +       ADD_ADV_CONFIG_END InitFmPortDev(p_LnxWrpFmPortDev);
97753 +}
97754 +EXPORT_SYMBOL(fm_set_tx_port_params);
97755 +
97756 +void fm_mac_set_handle(t_Handle h_lnx_wrp_fm_dev,
97757 +        t_Handle h_fm_mac,
97758 +        int mac_id)
97759 +{
97760 +    t_LnxWrpFmDev *p_lnx_wrp_fm_dev = (t_LnxWrpFmDev *)h_lnx_wrp_fm_dev;
97761 +
97762 +    p_lnx_wrp_fm_dev->macs[mac_id].h_Dev = h_fm_mac;
97763 +    p_lnx_wrp_fm_dev->macs[mac_id].h_LnxWrpFmDev = h_lnx_wrp_fm_dev;
97764 +}
97765 +EXPORT_SYMBOL(fm_mac_set_handle);
97766 +
97767 +static void LnxwrpFmPcdDevExceptionsCb(t_Handle h_App,
97768 +                                      e_FmPcdExceptions exception)
97769 +{
97770 +       t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *) h_App;
97771 +
97772 +       ASSERT_COND(p_LnxWrpFmDev);
97773 +
97774 +       DBG(INFO, ("got fm-pcd exception %d", exception));
97775 +
97776 +       /* do nothing */
97777 +       UNUSED(exception);
97778 +}
97779 +
97780 +static void LnxwrpFmPcdDevIndexedExceptionsCb(t_Handle h_App,
97781 +                                             e_FmPcdExceptions exception,
97782 +                                             uint16_t index)
97783 +{
97784 +       t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *) h_App;
97785 +
97786 +       ASSERT_COND(p_LnxWrpFmDev);
97787 +
97788 +       DBG(INFO,
97789 +           ("got fm-pcd-indexed exception %d, indx %d", exception, index));
97790 +
97791 +       /* do nothing */
97792 +       UNUSED(exception);
97793 +       UNUSED(index);
97794 +}
97795 +
97796 +static t_Error InitFmPcdDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
97797 +{
97798 +       spin_lock_init(&lock);
97799 +
97800 +       if (p_LnxWrpFmDev->pcdActive) {
97801 +               t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = &p_LnxWrpFmDev->hcPort;
97802 +               t_FmPcdParams fmPcdParams;
97803 +               t_Error err;
97804 +
97805 +               memset(&fmPcdParams, 0, sizeof(fmPcdParams));
97806 +               fmPcdParams.h_Fm = p_LnxWrpFmDev->h_Dev;
97807 +               fmPcdParams.prsSupport = p_LnxWrpFmDev->prsActive;
97808 +               fmPcdParams.kgSupport = p_LnxWrpFmDev->kgActive;
97809 +               fmPcdParams.plcrSupport = p_LnxWrpFmDev->plcrActive;
97810 +               fmPcdParams.ccSupport = p_LnxWrpFmDev->ccActive;
97811 +               fmPcdParams.numOfSchemes = FM_PCD_KG_NUM_OF_SCHEMES;
97812 +
97813 +#ifndef CONFIG_GUEST_PARTITION
97814 +               fmPcdParams.f_Exception = LnxwrpFmPcdDevExceptionsCb;
97815 +               if (fmPcdParams.kgSupport)
97816 +                       fmPcdParams.f_ExceptionId =
97817 +                               LnxwrpFmPcdDevIndexedExceptionsCb;
97818 +               fmPcdParams.h_App = p_LnxWrpFmDev;
97819 +#endif /* !CONFIG_GUEST_PARTITION */
97820 +
97821 +#ifdef CONFIG_MULTI_PARTITION_SUPPORT
97822 +               fmPcdParams.numOfSchemes = 0;
97823 +               fmPcdParams.numOfClsPlanEntries = 0;
97824 +               fmPcdParams.partitionId = 0;
97825 +#endif /* CONFIG_MULTI_PARTITION_SUPPORT */
97826 +               fmPcdParams.useHostCommand = TRUE;
97827 +
97828 +               p_LnxWrpFmDev->hc_tx_fq =
97829 +                       FqAlloc(p_LnxWrpFmDev,
97830 +                               0,
97831 +                               QMAN_FQ_FLAG_TO_DCPORTAL,
97832 +                               p_LnxWrpFmPortDev->txCh, 0);
97833 +               if (!p_LnxWrpFmDev->hc_tx_fq)
97834 +                       RETURN_ERROR(MAJOR, E_NULL_POINTER,
97835 +                                    ("Frame queue allocation failed..."));
97836 +
97837 +               p_LnxWrpFmDev->hc_tx_conf_fq =
97838 +                       FqAlloc(p_LnxWrpFmDev,
97839 +                               0,
97840 +                               QMAN_FQ_FLAG_NO_ENQUEUE,
97841 +                               p_LnxWrpFmDev->hcCh, 1);
97842 +               if (!p_LnxWrpFmDev->hc_tx_conf_fq)
97843 +                       RETURN_ERROR(MAJOR, E_NULL_POINTER,
97844 +                                    ("Frame queue allocation failed..."));
97845 +
97846 +               p_LnxWrpFmDev->hc_tx_err_fq =
97847 +                       FqAlloc(p_LnxWrpFmDev,
97848 +                               0,
97849 +                               QMAN_FQ_FLAG_NO_ENQUEUE,
97850 +                               p_LnxWrpFmDev->hcCh, 2);
97851 +               if (!p_LnxWrpFmDev->hc_tx_err_fq)
97852 +                       RETURN_ERROR(MAJOR, E_NULL_POINTER,
97853 +                                    ("Frame queue allocation failed..."));
97854 +
97855 +               fmPcdParams.hc.portBaseAddr = p_LnxWrpFmPortDev->baseAddr;
97856 +               fmPcdParams.hc.portId =
97857 +                       p_LnxWrpFmPortDev->settings.param.portId;
97858 +               fmPcdParams.hc.liodnBase =
97859 +                       p_LnxWrpFmPortDev->settings.param.liodnBase;
97860 +               fmPcdParams.hc.errFqid =
97861 +                       qman_fq_fqid(p_LnxWrpFmDev->hc_tx_err_fq);
97862 +               fmPcdParams.hc.confFqid =
97863 +                       qman_fq_fqid(p_LnxWrpFmDev->hc_tx_conf_fq);
97864 +               fmPcdParams.hc.qmChannel = p_LnxWrpFmPortDev->txCh;
97865 +               fmPcdParams.hc.f_QmEnqueue = QmEnqueueCB;
97866 +               fmPcdParams.hc.h_QmArg = (t_Handle) p_LnxWrpFmDev;
97867 +
97868 +               p_LnxWrpFmDev->h_PcdDev = FM_PCD_Config(&fmPcdParams);
97869 +               if (!p_LnxWrpFmDev->h_PcdDev)
97870 +                       RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM PCD!"));
97871 +
97872 +               err =
97873 +               FM_PCD_ConfigPlcrNumOfSharedProfiles(p_LnxWrpFmDev->h_PcdDev,
97874 +                               LNXWRP_FM_NUM_OF_SHARED_PROFILES);
97875 +               if (err != E_OK)
97876 +                       RETURN_ERROR(MAJOR, err, NO_MSG);
97877 +
97878 +               err = FM_PCD_Init(p_LnxWrpFmDev->h_PcdDev);
97879 +               if (err != E_OK)
97880 +                       RETURN_ERROR(MAJOR, err, NO_MSG);
97881 +
97882 +               if (p_LnxWrpFmDev->err_irq == 0) {
97883 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97884 +                               e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC,
97885 +                               FALSE);
97886 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97887 +                               e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW,
97888 +                               FALSE);
97889 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97890 +                               e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR,
97891 +                               FALSE);
97892 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97893 +                               e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC,
97894 +                               FALSE);
97895 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97896 +                               e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC,
97897 +                               FALSE);
97898 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97899 +                           e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE,
97900 +                               FALSE);
97901 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97902 +                               e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE,
97903 +                               FALSE);
97904 +                       FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
97905 +                               e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC,
97906 +                               FALSE);
97907 +               }
97908 +       }
97909 +
97910 +       return E_OK;
97911 +}
97912 +
97913 +void FreeFmPcdDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
97914 +{
97915 +
97916 +       if (p_LnxWrpFmDev->h_PcdDev)
97917 +               FM_PCD_Free(p_LnxWrpFmDev->h_PcdDev);
97918 +
97919 +       if (p_LnxWrpFmDev->hc_tx_err_fq)
97920 +               FqFree(p_LnxWrpFmDev->hc_tx_err_fq);
97921 +
97922 +       if (p_LnxWrpFmDev->hc_tx_conf_fq)
97923 +               FqFree(p_LnxWrpFmDev->hc_tx_conf_fq);
97924 +
97925 +       if (p_LnxWrpFmDev->hc_tx_fq)
97926 +               FqFree(p_LnxWrpFmDev->hc_tx_fq);
97927 +}
97928 +
97929 +static void FreeFmPortDev(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
97930 +{
97931 +       t_LnxWrpFmDev *p_LnxWrpFmDev =
97932 +               (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
97933 +
97934 +       if (!p_LnxWrpFmPortDev->active)
97935 +               return;
97936 +
97937 +       if (p_LnxWrpFmPortDev->h_Dev)
97938 +               FM_PORT_Free(p_LnxWrpFmPortDev->h_Dev);
97939 +
97940 +       devm_iounmap(p_LnxWrpFmDev->dev,
97941 +                    UINT_TO_PTR(p_LnxWrpFmPortDev->baseAddr));
97942 +       __devm_release_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res,
97943 +                             p_LnxWrpFmPortDev->phys_baseAddr,
97944 +                             p_LnxWrpFmPortDev->memSize);
97945 +}
97946 +
97947 +static int /*__devinit*/ fm_port_probe(struct platform_device *of_dev)
97948 +{
97949 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
97950 +       t_LnxWrpFmDev *p_LnxWrpFmDev;
97951 +       struct device *dev;
97952 +
97953 +       dev = &of_dev->dev;
97954 +
97955 +       p_LnxWrpFmPortDev = ReadFmPortDevTreeNode(of_dev);
97956 +       if (p_LnxWrpFmPortDev == NULL)
97957 +               return -EIO;
97958 +       /* Port can be inactive, thus will not be probed:
97959 +          - in performance mode, OH ports are disabled
97960 +          ...
97961 +        */
97962 +       if (!p_LnxWrpFmPortDev->active)
97963 +               return 0;
97964 +
97965 +       if (ConfigureFmPortDev(p_LnxWrpFmPortDev) != E_OK)
97966 +               return -EIO;
97967 +
97968 +       dev_set_drvdata(dev, p_LnxWrpFmPortDev);
97969 +
97970 +       if (p_LnxWrpFmPortDev->settings.param.portType ==
97971 +               e_FM_PORT_TYPE_OH_HOST_COMMAND)
97972 +               InitFmPcdDev((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev);
97973 +
97974 +       p_LnxWrpFmDev = (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
97975 +
97976 +       if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX) {
97977 +               Sprint(p_LnxWrpFmPortDev->name, "%s-port-rx%d",
97978 +                      p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id);
97979 +               p_LnxWrpFmPortDev->minor =
97980 +                       p_LnxWrpFmPortDev->id + DEV_FM_RX_PORTS_MINOR_BASE;
97981 +       } else if (p_LnxWrpFmPortDev->settings.param.portType ==
97982 +                e_FM_PORT_TYPE_RX_10G) {
97983 +               Sprint(p_LnxWrpFmPortDev->name, "%s-port-rx%d",
97984 +                      p_LnxWrpFmDev->name,
97985 +                      p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_RX_PORTS);
97986 +               p_LnxWrpFmPortDev->minor =
97987 +                       p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_RX_PORTS +
97988 +                       DEV_FM_RX_PORTS_MINOR_BASE;
97989 +#ifndef CONFIG_FMAN_ARM
97990 +               if (IS_T1023_T1024) {
97991 +                       Sprint(p_LnxWrpFmPortDev->name, "%s-port-rx%d",
97992 +                               p_LnxWrpFmDev->name,
97993 +                               p_LnxWrpFmPortDev->id);
97994 +                       p_LnxWrpFmPortDev->minor =
97995 +                               p_LnxWrpFmPortDev->id +
97996 +                               DEV_FM_RX_PORTS_MINOR_BASE;
97997 +               }
97998 +#endif
97999 +       } else if (p_LnxWrpFmPortDev->settings.param.portType ==
98000 +                e_FM_PORT_TYPE_TX) {
98001 +               Sprint(p_LnxWrpFmPortDev->name, "%s-port-tx%d",
98002 +                      p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id);
98003 +               p_LnxWrpFmPortDev->minor =
98004 +                       p_LnxWrpFmPortDev->id + DEV_FM_TX_PORTS_MINOR_BASE;
98005 +       } else if (p_LnxWrpFmPortDev->settings.param.portType ==
98006 +                e_FM_PORT_TYPE_TX_10G) {
98007 +               Sprint(p_LnxWrpFmPortDev->name, "%s-port-tx%d",
98008 +                      p_LnxWrpFmDev->name,
98009 +                      p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_TX_PORTS);
98010 +               p_LnxWrpFmPortDev->minor =
98011 +                       p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_TX_PORTS +
98012 +                       DEV_FM_TX_PORTS_MINOR_BASE;
98013 +#ifndef CONFIG_FMAN_ARM
98014 +               if (IS_T1023_T1024) {
98015 +                       Sprint(p_LnxWrpFmPortDev->name, "%s-port-tx%d",
98016 +                               p_LnxWrpFmDev->name,
98017 +                               p_LnxWrpFmPortDev->id);
98018 +                       p_LnxWrpFmPortDev->minor =
98019 +                               p_LnxWrpFmPortDev->id +
98020 +                               DEV_FM_TX_PORTS_MINOR_BASE;
98021 +               }
98022 +#endif
98023 +       } else if (p_LnxWrpFmPortDev->settings.param.portType ==
98024 +                e_FM_PORT_TYPE_OH_HOST_COMMAND) {
98025 +               Sprint(p_LnxWrpFmPortDev->name, "%s-port-oh%d",
98026 +                      p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id);
98027 +               p_LnxWrpFmPortDev->minor =
98028 +                       p_LnxWrpFmPortDev->id + DEV_FM_OH_PORTS_MINOR_BASE;
98029 +       } else if (p_LnxWrpFmPortDev->settings.param.portType ==
98030 +                e_FM_PORT_TYPE_OH_OFFLINE_PARSING) {
98031 +               Sprint(p_LnxWrpFmPortDev->name, "%s-port-oh%d",
98032 +                      p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id + 1);
98033 +               p_LnxWrpFmPortDev->minor =
98034 +                       p_LnxWrpFmPortDev->id + 1 +
98035 +                       DEV_FM_OH_PORTS_MINOR_BASE;
98036 +       }
98037 +
98038 +       device_create(p_LnxWrpFmDev->fm_class, NULL,
98039 +                     MKDEV(p_LnxWrpFmDev->major, p_LnxWrpFmPortDev->minor),
98040 +                     NULL, p_LnxWrpFmPortDev->name);
98041 +
98042 +       /* create sysfs entries for stats and regs */
98043 +
98044 +       if (fm_port_sysfs_create(dev) != 0) {
98045 +               FreeFmPortDev(p_LnxWrpFmPortDev);
98046 +               REPORT_ERROR(MAJOR, E_INVALID_STATE,
98047 +                            ("Unable to create sys entry - fm port!!!"));
98048 +               return -EIO;
98049 +       }
98050 +
98051 +#ifdef FM_TX_INVALID_ECC_ERRATA_10GMAC_A009
98052 +       FM_DisableRamsEcc(p_LnxWrpFmDev->h_Dev);
98053 +#endif /* FM_TX_INVALID_ECC_ERRATA_10GMAC_A009 */
98054 +
98055 +       DBG(TRACE, ("%s probed", p_LnxWrpFmPortDev->name));
98056 +
98057 +       return 0;
98058 +}
98059 +
98060 +static int fm_port_remove(struct platform_device *of_dev)
98061 +{
98062 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
98063 +       t_LnxWrpFmDev *p_LnxWrpFmDev;
98064 +       struct device *dev;
98065 +
98066 +       dev = &of_dev->dev;
98067 +       p_LnxWrpFmPortDev = dev_get_drvdata(dev);
98068 +
98069 +       fm_port_sysfs_destroy(dev);
98070 +
98071 +       p_LnxWrpFmDev = (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
98072 +       device_destroy(p_LnxWrpFmDev->fm_class,
98073 +                      MKDEV(p_LnxWrpFmDev->major, p_LnxWrpFmPortDev->minor));
98074 +
98075 +       FreeFmPortDev(p_LnxWrpFmPortDev);
98076 +
98077 +       dev_set_drvdata(dev, NULL);
98078 +
98079 +       return 0;
98080 +}
98081 +
98082 +static const struct of_device_id fm_port_match[] = {
98083 +       {
98084 +        .compatible = "fsl,fman-port-oh"},
98085 +       {
98086 +        .compatible = "fsl,fman-port-1g-rx"},
98087 +       {
98088 +        .compatible = "fsl,fman-port-10g-rx"},
98089 +       {
98090 +        .compatible = "fsl,fman-port-1g-tx"},
98091 +       {
98092 +        .compatible = "fsl,fman-port-10g-tx"},
98093 +       {}
98094 +};
98095 +
98096 +#ifndef MODULE
98097 +MODULE_DEVICE_TABLE(of, fm_port_match);
98098 +#endif /* !MODULE */
98099 +
98100 +static struct platform_driver fm_port_driver = {
98101 +
98102 +       .driver = {
98103 +                  .name = "fsl-fman-port",
98104 +                  .of_match_table = fm_port_match,
98105 +                  .owner = THIS_MODULE,
98106 +                  },
98107 +       .probe = fm_port_probe,
98108 +       .remove = fm_port_remove
98109 +};
98110 +
98111 +
98112 +t_Error LNXWRP_FM_Port_Init(void)
98113 +{
98114 +       /* Register to the DTB for basic FM port API */
98115 +       if (platform_driver_register(&fm_port_driver))
98116 +               return E_NO_DEVICE;
98117 +
98118 +       return E_OK;
98119 +}
98120 +
98121 +void LNXWRP_FM_Port_Free(void)
98122 +{
98123 +       platform_driver_unregister(&fm_port_driver);
98124 +}
98125 +
98126 +static int __init __cold fm_port_load(void)
98127 +{
98128 +       if (LNXWRP_FM_Port_Init() != E_OK) {
98129 +               printk(KERN_CRIT "Failed to init FM Ports wrapper!\n");
98130 +               return -ENODEV;
98131 +       }
98132 +
98133 +       printk(KERN_CRIT "Freescale FM Ports module\n");
98134 +
98135 +       return 0;
98136 +}
98137 +
98138 +static void __exit __cold fm_port_unload(void)
98139 +{
98140 +       LNXWRP_FM_Port_Free();
98141 +}
98142 +
98143 +module_init(fm_port_load);
98144 +module_exit(fm_port_unload);
98145 --- /dev/null
98146 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c
98147 @@ -0,0 +1,4813 @@
98148 +/*
98149 + * Copyright 2008-2012 Freescale Semiconductor Inc.
98150 + *
98151 + * Redistribution and use in source and binary forms, with or without
98152 + * modification, are permitted provided that the following conditions are met:
98153 + *     * Redistributions of source code must retain the above copyright
98154 + *       notice, this list of conditions and the following disclaimer.
98155 + *     * Redistributions in binary form must reproduce the above copyright
98156 + *       notice, this list of conditions and the following disclaimer in the
98157 + *       documentation and/or other materials provided with the distribution.
98158 + *     * Neither the name of Freescale Semiconductor nor the
98159 + *       names of its contributors may be used to endorse or promote products
98160 + *       derived from this software without specific prior written permission.
98161 + *
98162 + *
98163 + * ALTERNATIVELY, this software may be distributed under the terms of the
98164 + * GNU General Public License ("GPL") as published by the Free Software
98165 + * Foundation, either version 2 of that License or (at your option) any
98166 + * later version.
98167 + *
98168 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
98169 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
98170 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
98171 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
98172 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
98173 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
98174 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
98175 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
98176 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
98177 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
98178 + */
98179 +
98180 +/*
98181 + @File          lnxwrp_ioctls_fm.c
98182 + @Author        Shlomi Gridish
98183 + @Description   FM Linux wrapper functions.
98184 +*/
98185 +
98186 +/* Linux Headers ------------------- */
98187 +#include <linux/version.h>
98188 +
98189 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
98190 +#define MODVERSIONS
98191 +#endif
98192 +#ifdef MODVERSIONS
98193 +#include <config/modversions.h>
98194 +#endif /* MODVERSIONS */
98195 +
98196 +#include <linux/kernel.h>
98197 +#include <linux/module.h>
98198 +#include <linux/slab.h>
98199 +#include <linux/fs.h>
98200 +#include <linux/cdev.h>
98201 +#include <linux/device.h>
98202 +#include <linux/irq.h>
98203 +#include <linux/interrupt.h>
98204 +#include <linux/io.h>
98205 +#include <linux/ioport.h>
98206 +#include <linux/of_platform.h>
98207 +#include <linux/uaccess.h>
98208 +#include <asm/errno.h>
98209 +#ifndef CONFIG_FMAN_ARM
98210 +#include <sysdev/fsl_soc.h>
98211 +#include <linux/fsl/svr.h>
98212 +#endif
98213 +
98214 +#if defined(CONFIG_COMPAT)
98215 +#include <linux/compat.h>
98216 +#endif
98217 +
98218 +#include "part_ext.h"
98219 +#include "fm_ioctls.h"
98220 +#include "fm_pcd_ioctls.h"
98221 +#include "fm_port_ioctls.h"
98222 +#include "fm_vsp_ext.h"
98223 +
98224 +#ifndef CONFIG_FMAN_ARM
98225 +#define IS_T1023_T1024 (SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1024 || \
98226 +                       SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1023)
98227 +#endif
98228 +
98229 +#define __ERR_MODULE__  MODULE_FM
98230 +
98231 +#if defined(CONFIG_COMPAT)
98232 +#include "lnxwrp_ioctls_fm_compat.h"
98233 +#endif
98234 +
98235 +#include "lnxwrp_fm.h"
98236 +
98237 +#define CMP_IOC_DEFINE(def) (IOC_##def != def)
98238 +
98239 +/* fm_pcd_ioctls.h === fm_pcd_ext.h assertions */
98240 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
98241 +#error Error: please synchronize IOC_ defines!
98242 +#endif
98243 +
98244 +#if CMP_IOC_DEFINE(FM_PCD_PRS_NUM_OF_HDRS)
98245 +#error Error: please synchronize IOC_ defines!
98246 +#endif
98247 +
98248 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
98249 +#error Error: please synchronize IOC_ defines!
98250 +#endif
98251 +
98252 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
98253 +#error Error: please synchronize IOC_ defines!
98254 +#endif
98255 +
98256 +#if CMP_IOC_DEFINE(FM_PCD_KG_NUM_OF_GENERIC_REGS)
98257 +#error Error: please synchronize IOC_ defines!
98258 +#endif
98259 +
98260 +#if CMP_IOC_DEFINE(FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY)
98261 +#error Error: please synchronize IOC_ defines!
98262 +#endif
98263 +
98264 +#if CMP_IOC_DEFINE(FM_PCD_KG_NUM_OF_EXTRACT_MASKS)
98265 +#error Error: please synchronize IOC_ defines!
98266 +#endif
98267 +
98268 +#if CMP_IOC_DEFINE(FM_PCD_KG_NUM_OF_DEFAULT_GROUPS)
98269 +#error Error: please synchronize IOC_ defines!
98270 +#endif
98271 +
98272 +#if CMP_IOC_DEFINE(FM_PCD_PRS_NUM_OF_LABELS)
98273 +#error Error: please synchronize IOC_ defines!
98274 +#endif
98275 +
98276 +#if CMP_IOC_DEFINE(FM_PCD_SW_PRS_SIZE)
98277 +#error Error: please synchronize IOC_ defines!
98278 +#endif
98279 +
98280 +#if CMP_IOC_DEFINE(FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE)
98281 +#error Error: please synchronize IOC_ defines!
98282 +#endif
98283 +
98284 +#if DPAA_VERSION >= 11
98285 +#if CMP_IOC_DEFINE(FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES)
98286 +#error Error: please synchronize IOC_ defines!
98287 +#endif
98288 +#endif
98289 +
98290 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_TREES)
98291 +#error Error: please synchronize IOC_ defines!
98292 +#endif
98293 +
98294 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_GROUPS)
98295 +#error Error: please synchronize IOC_ defines!
98296 +#endif
98297 +
98298 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_UNITS)
98299 +#error Error: please synchronize IOC_ defines!
98300 +#endif
98301 +
98302 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_KEYS)
98303 +#error Error: please synchronize IOC_ defines!
98304 +#endif
98305 +
98306 +#if CMP_IOC_DEFINE(FM_PCD_MAX_SIZE_OF_KEY)
98307 +#error Error: please synchronize IOC_ defines!
98308 +#endif
98309 +
98310 +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP)
98311 +#error Error: please synchronize IOC_ defines!
98312 +#endif
98313 +
98314 +#if CMP_IOC_DEFINE(FM_PCD_LAST_KEY_INDEX)
98315 +#error Error: please synchronize IOC_ defines!
98316 +#endif
98317 +
98318 +/* net_ioctls.h === net_ext.h assertions */
98319 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPP_PID)
98320 +#error Error: please synchronize IOC_ defines!
98321 +#endif
98322 +
98323 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPP_COMPRESSED)
98324 +#error Error: please synchronize IOC_ defines!
98325 +#endif
98326 +
98327 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPP_ALL_FIELDS)
98328 +#error Error: please synchronize IOC_ defines!
98329 +#endif
98330 +
98331 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPPoE_ALL_FIELDS)
98332 +#error Error: please synchronize IOC_ defines!
98333 +#endif
98334 +
98335 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPPMUX_ALL_FIELDS)
98336 +#error Error: please synchronize IOC_ defines!
98337 +#endif
98338 +
98339 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS)
98340 +#error Error: please synchronize IOC_ defines!
98341 +#endif
98342 +
98343 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_ETH_ALL_FIELDS)
98344 +#error Error: please synchronize IOC_ defines!
98345 +#endif
98346 +
98347 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPv4_ALL_FIELDS)
98348 +#error Error: please synchronize IOC_ defines!
98349 +#endif
98350 +
98351 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPv6_ALL_FIELDS)
98352 +#error Error: please synchronize IOC_ defines!
98353 +#endif
98354 +
98355 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_ICMP_ALL_FIELDS)
98356 +#error Error: please synchronize IOC_ defines!
98357 +#endif
98358 +
98359 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IGMP_ALL_FIELDS)
98360 +#error Error: please synchronize IOC_ defines!
98361 +#endif
98362 +
98363 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_TCP_ALL_FIELDS)
98364 +#error Error: please synchronize IOC_ defines!
98365 +#endif
98366 +
98367 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_SCTP_ALL_FIELDS)
98368 +#error Error: please synchronize IOC_ defines!
98369 +#endif
98370 +
98371 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_DCCP_ALL_FIELDS)
98372 +#error Error: please synchronize IOC_ defines!
98373 +#endif
98374 +
98375 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_UDP_ALL_FIELDS)
98376 +#error Error: please synchronize IOC_ defines!
98377 +#endif
98378 +
98379 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS)
98380 +#error Error: please synchronize IOC_ defines!
98381 +#endif
98382 +
98383 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPHC_ALL_FIELDS)
98384 +#error Error: please synchronize IOC_ defines!
98385 +#endif
98386 +
98387 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS)
98388 +#error Error: please synchronize IOC_ defines!
98389 +#endif
98390 +
98391 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_L2TPv2_ALL_FIELDS)
98392 +#error Error: please synchronize IOC_ defines!
98393 +#endif
98394 +
98395 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS)
98396 +#error Error: please synchronize IOC_ defines!
98397 +#endif
98398 +
98399 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS)
98400 +#error Error: please synchronize IOC_ defines!
98401 +#endif
98402 +
98403 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_VLAN_ALL_FIELDS)
98404 +#error Error: please synchronize IOC_ defines!
98405 +#endif
98406 +
98407 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_LLC_ALL_FIELDS)
98408 +#error Error: please synchronize IOC_ defines!
98409 +#endif
98410 +
98411 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_NLPID_ALL_FIELDS)
98412 +#error Error: please synchronize IOC_ defines!
98413 +#endif
98414 +
98415 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_SNAP_ALL_FIELDS)
98416 +#error Error: please synchronize IOC_ defines!
98417 +#endif
98418 +
98419 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS)
98420 +#warning Error: please synchronize IOC_ defines!
98421 +#endif
98422 +
98423 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_ARP_ALL_FIELDS)
98424 +#error Error: please synchronize IOC_ defines!
98425 +#endif
98426 +
98427 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_RFC2684_ALL_FIELDS)
98428 +#error Error: please synchronize IOC_ defines!
98429 +#endif
98430 +
98431 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS)
98432 +#error Error: please synchronize IOC_ defines!
98433 +#endif
98434 +
98435 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS)
98436 +#error Error: please synchronize IOC_ defines!
98437 +#endif
98438 +
98439 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_GRE_ALL_FIELDS)
98440 +#error Error: please synchronize IOC_ defines!
98441 +#endif
98442 +
98443 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_MINENCAP_ALL_FIELDS)
98444 +#error Error: please synchronize IOC_ defines!
98445 +#endif
98446 +
98447 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS)
98448 +#error Error: please synchronize IOC_ defines!
98449 +#endif
98450 +
98451 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS)
98452 +#error Error: please synchronize IOC_ defines!
98453 +#endif
98454 +
98455 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS)
98456 +#error Error: please synchronize IOC_ defines!
98457 +#endif
98458 +
98459 +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_MACSEC_ALL_FIELDS)
98460 +#error Error: please synchronize IOC_ defines!
98461 +#endif
98462 +
98463 +/* fm_ioctls.h === fm_ext.h assertions */
98464 +#if CMP_IOC_DEFINE(FM_MAX_NUM_OF_VALID_PORTS)
98465 +#error Error: please synchronize IOC_ defines!
98466 +#endif
98467 +
98468 +void LnxWrpPCDIOCTLTypeChecking(void)
98469 +{
98470 +    /* fm_ext.h == fm_ioctls.h */
98471 +    ASSERT_COND(sizeof(ioc_fm_port_bandwidth_params) == sizeof(t_FmPortsBandwidthParams));
98472 +    ASSERT_COND(sizeof(ioc_fm_revision_info_t) == sizeof(t_FmRevisionInfo));
98473 +
98474 +    /* fm_pcd_ext.h == fm_pcd_ioctls.h */
98475 +    /*ioc_fm_pcd_counters_params_t  : NOT USED */
98476 +    /*ioc_fm_pcd_exception_params_t : private */
98477 +#if (DPAA_VERSION >= 11)
98478 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_capwap_params_t) == sizeof(t_FmPcdManipFragCapwapParams));
98479 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_capwap_params_t) == sizeof(t_FmPcdManipReassemCapwapParams));
98480 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t) == sizeof(t_FmPcdManipHdrInsrtByHdrParams));
98481 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_ip_params_t) == sizeof(t_FmPcdManipHdrInsrtIpParams));
98482 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_t) == sizeof(t_FmPcdManipHdrInsrt));
98483 +    ASSERT_COND(sizeof(ioc_fm_manip_hdr_info_t) == sizeof(t_FmManipHdrInfo));
98484 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t) == sizeof(t_FmPcdManipHdrRmvByHdrParams));
98485 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_special_offload_capwap_params_t) == sizeof(t_FmPcdManipSpecialOffloadCapwapParams));
98486 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_capwap_stats_t) == sizeof(t_FmPcdManipFragCapwapStats));
98487 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_capwap_stats_t) == sizeof(t_FmPcdManipReassemCapwapStats));
98488 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_params_t) == sizeof(t_FmPcdManipFragParams));
98489 +#endif /* (DPAA_VERSION >= 11) */
98490 +
98491 +    ASSERT_COND(sizeof(ioc_fm_pcd_prs_label_params_t) == sizeof(t_FmPcdPrsLabelParams));
98492 +    ASSERT_COND(sizeof(ioc_fm_pcd_prs_sw_params_t) == sizeof(t_FmPcdPrsSwParams));
98493 +    /*ioc_fm_pcd_kg_dflt_value_params_t : private */
98494 +    ASSERT_COND(sizeof(ioc_fm_pcd_hdr_protocol_opt_u) == sizeof(u_FmPcdHdrProtocolOpt));
98495 +    ASSERT_COND(sizeof(ioc_fm_pcd_fields_u) == sizeof(t_FmPcdFields));
98496 +    ASSERT_COND(sizeof(ioc_fm_pcd_from_hdr_t) == sizeof(t_FmPcdFromHdr));
98497 +    ASSERT_COND(sizeof(ioc_fm_pcd_from_field_t) == sizeof(t_FmPcdFromField));
98498 +    ASSERT_COND(sizeof(ioc_fm_pcd_distinction_unit_t) == sizeof(t_FmPcdDistinctionUnit));
98499 +
98500 +#if defined(CONFIG_ARM64)
98501 +    /* different alignment */
98502 +    ASSERT_COND(sizeof(ioc_fm_pcd_net_env_params_t) == sizeof(t_FmPcdNetEnvParams) + sizeof(void *) + 4);
98503 +#else
98504 +#if !defined(CONFIG_COMPAT)
98505 +    /* different alignment */
98506 +    ASSERT_COND(sizeof(ioc_fm_pcd_net_env_params_t) == sizeof(t_FmPcdNetEnvParams) + sizeof(void *));
98507 +#endif
98508 +#endif
98509 +    ASSERT_COND(sizeof(ioc_fm_pcd_extract_entry_t) == sizeof(t_FmPcdExtractEntry));
98510 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_extract_mask_t) == sizeof(t_FmPcdKgExtractMask));
98511 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_extract_dflt_t) == sizeof(t_FmPcdKgExtractDflt));
98512 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_key_extract_and_hash_params_t) == sizeof(t_FmPcdKgKeyExtractAndHashParams));
98513 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_extracted_or_params_t) == sizeof(t_FmPcdKgExtractedOrParams));
98514 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_scheme_counter_t) == sizeof(t_FmPcdKgSchemeCounter));
98515 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_plcr_profile_t) == sizeof(t_FmPcdKgPlcrProfile));
98516 +#if (DPAA_VERSION >= 11)
98517 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_storage_profile_t) == sizeof(t_FmPcdKgStorageProfile));
98518 +#endif
98519 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_cc_t) == sizeof(t_FmPcdKgCc));
98520 +#if !defined(CONFIG_COMPAT)
98521 +    /* different alignment */
98522 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_scheme_params_t) == sizeof(t_FmPcdKgSchemeParams) + sizeof(void *));
98523 +#endif
98524 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_cc_params_t) == sizeof(t_FmPcdCcNextCcParams));
98525 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_plcr_params_t) == sizeof(t_FmPcdCcNextPlcrParams));
98526 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_enqueue_params_t) == sizeof(t_FmPcdCcNextEnqueueParams));
98527 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_kg_params_t) == sizeof(t_FmPcdCcNextKgParams));
98528 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_engine_params_t) == sizeof(t_FmPcdCcNextEngineParams));
98529 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_key_params_t) == sizeof(t_FmPcdCcKeyParams));
98530 +    ASSERT_COND(sizeof(ioc_keys_params_t) == sizeof(t_KeysParams));
98531 +#if !defined(CONFIG_COMPAT)
98532 +    /* different alignment */
98533 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_node_params_t) == sizeof(t_FmPcdCcNodeParams) + sizeof(void *));
98534 +    ASSERT_COND(sizeof(ioc_fm_pcd_hash_table_params_t) == sizeof(t_FmPcdHashTableParams) + sizeof(void *));
98535 +#endif
98536 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_grp_params_t) == sizeof(t_FmPcdCcGrpParams));
98537 +#if !defined(CONFIG_COMPAT)
98538 +    /* different alignment */
98539 +    ASSERT_COND(sizeof(ioc_fm_pcd_cc_tree_params_t) == sizeof(t_FmPcdCcTreeParams) + sizeof(void *));
98540 +#endif
98541 +    ASSERT_COND(sizeof(ioc_fm_pcd_plcr_byte_rate_mode_param_t) == sizeof(t_FmPcdPlcrByteRateModeParams));
98542 +    ASSERT_COND(sizeof(ioc_fm_pcd_plcr_non_passthrough_alg_param_t) == sizeof(t_FmPcdPlcrNonPassthroughAlgParams));
98543 +    ASSERT_COND(sizeof(ioc_fm_pcd_plcr_next_engine_params_u) == sizeof(u_FmPcdPlcrNextEngineParams));
98544 +    /*ioc_fm_pcd_port_params_t : private */
98545 +    ASSERT_COND(sizeof(ioc_fm_pcd_plcr_profile_params_t) == sizeof(t_FmPcdPlcrProfileParams) + sizeof(void *));
98546 +    /*ioc_fm_pcd_cc_tree_modify_next_engine_params_t : private */
98547 +
98548 +#ifdef FM_CAPWAP_SUPPORT
98549 +#error TODO: unsupported feature
98550 +/*
98551 +    ASSERT_COND(sizeof(TODO) == sizeof(t_FmPcdManipHdrInsrtByTemplateParams));
98552 +    ASSERT_COND(sizeof(TODO) == sizeof(t_CapwapFragmentationParams));
98553 +    ASSERT_COND(sizeof(TODO) == sizeof(t_CapwapReassemblyParams));
98554 +*/
98555 +#endif
98556 +
98557 +    /*ioc_fm_pcd_cc_node_modify_next_engine_params_t : private */
98558 +    /*ioc_fm_pcd_cc_node_remove_key_params_t : private */
98559 +    /*ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t : private */
98560 +    /*ioc_fm_pcd_cc_node_modify_key_params_t : private */
98561 +    /*ioc_fm_manip_hdr_info_t : private */
98562 +    /*ioc_fm_pcd_hash_table_set_t : private */
98563 +
98564 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_ip_params_t) == sizeof(t_FmPcdManipFragIpParams));
98565 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_ip_params_t) == sizeof(t_FmPcdManipReassemIpParams));
98566 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_special_offload_ipsec_params_t) == sizeof(t_FmPcdManipSpecialOffloadIPSecParams));
98567 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_special_offload_params_t) == sizeof(t_FmPcdManipSpecialOffloadParams));
98568 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_rmv_generic_params_t) == sizeof(t_FmPcdManipHdrRmvGenericParams));
98569 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_generic_params_t) == sizeof(t_FmPcdManipHdrInsrtGenericParams));
98570 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_params_t) == sizeof(t_FmPcdManipHdrInsrtParams));
98571 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_rmv_params_t) == sizeof(t_FmPcdManipHdrRmvParams));
98572 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_params_t) == sizeof(t_FmPcdManipHdrParams));
98573 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_params_t) == sizeof(t_FmPcdManipFragParams));
98574 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_params_t) == sizeof(t_FmPcdManipReassemParams));
98575 +#if !defined(CONFIG_COMPAT)
98576 +    /* different alignment */
98577 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_params_t) == sizeof(t_FmPcdManipParams) + sizeof(void *));
98578 +#endif
98579 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_ip_stats_t) == sizeof(t_FmPcdManipReassemIpStats));
98580 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_ip_stats_t) == sizeof(t_FmPcdManipFragIpStats));
98581 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_stats_t) == sizeof(t_FmPcdManipReassemStats));
98582 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_stats_t) == sizeof(t_FmPcdManipFragStats));
98583 +    ASSERT_COND(sizeof(ioc_fm_pcd_manip_stats_t) == sizeof(t_FmPcdManipStats));
98584 +#if DPAA_VERSION >= 11
98585 +    ASSERT_COND(sizeof(ioc_fm_pcd_frm_replic_group_params_t) == sizeof(t_FmPcdFrmReplicGroupParams) + sizeof(void *));
98586 +#endif
98587 +
98588 +    /* fm_port_ext.h == fm_port_ioctls.h */
98589 +    ASSERT_COND(sizeof(ioc_fm_port_rate_limit_t) == sizeof(t_FmPortRateLimit));
98590 +    ASSERT_COND(sizeof(ioc_fm_port_pcd_params_t) == sizeof(t_FmPortPcdParams));
98591 +    ASSERT_COND(sizeof(ioc_fm_pcd_kg_scheme_select_t) == sizeof(t_FmPcdKgSchemeSelect));
98592 +    ASSERT_COND(sizeof(ioc_fm_pcd_port_schemes_params_t) == sizeof(t_FmPcdPortSchemesParams));
98593 +    ASSERT_COND(sizeof(ioc_fm_pcd_prs_start_t) == sizeof(t_FmPcdPrsStart));
98594 +
98595 +    return;
98596 +}
98597 +
98598 +#define ASSERT_IOC_NET_ENUM(def) ASSERT_COND((unsigned long)e_IOC_NET_##def == (unsigned long)def)
98599 +
98600 +void LnxWrpPCDIOCTLEnumChecking(void)
98601 +{
98602 +    /* net_ext.h == net_ioctls.h : sampling checks */
98603 +    ASSERT_IOC_NET_ENUM(HEADER_TYPE_MACSEC);
98604 +    ASSERT_IOC_NET_ENUM(HEADER_TYPE_PPP);
98605 +    ASSERT_IOC_NET_ENUM(MAX_HEADER_TYPE_COUNT);
98606 +
98607 +    /* fm_ext.h == fm_ioctls.h */
98608 +    ASSERT_COND((unsigned long)e_IOC_FM_PORT_TYPE_DUMMY == (unsigned long)e_FM_PORT_TYPE_DUMMY);
98609 +    ASSERT_COND((unsigned long)e_IOC_EX_MURAM_ECC == (unsigned long)e_FM_EX_MURAM_ECC);
98610 +    ASSERT_COND((unsigned long)e_IOC_FM_COUNTERS_DEQ_CONFIRM == (unsigned long)e_FM_COUNTERS_DEQ_CONFIRM);
98611 +
98612 +    /* fm_pcd_ext.h == fm_pcd_ioctls.h */
98613 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES == (unsigned long)e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES);
98614 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PRS_EXCEPTION_SINGLE_ECC == (unsigned long)e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC);
98615 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PRS == (unsigned long)e_FM_PCD_PRS);
98616 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_EXTRACT_FULL_FIELD == (unsigned long)e_FM_PCD_EXTRACT_FULL_FIELD);
98617 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_EXTRACT_FROM_FLOW_ID == (unsigned long)e_FM_PCD_EXTRACT_FROM_FLOW_ID);
98618 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO == (unsigned long)e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO);
98619 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_KG_DFLT_ILLEGAL == (unsigned long)e_FM_PCD_KG_DFLT_ILLEGAL);
98620 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_KG_GENERIC_NOT_FROM_DATA == (unsigned long)e_FM_PCD_KG_GENERIC_NOT_FROM_DATA);
98621 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_HDR_INDEX_LAST == (unsigned long)e_FM_PCD_HDR_INDEX_LAST);
98622 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_SHARED == (unsigned long)e_FM_PCD_PLCR_SHARED);
98623 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_RFC_4115 == (unsigned long)e_FM_PCD_PLCR_RFC_4115);
98624 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_COLOR_AWARE == (unsigned long)e_FM_PCD_PLCR_COLOR_AWARE);
98625 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_OVERRIDE == (unsigned long)e_FM_PCD_PLCR_OVERRIDE);
98626 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_FULL_FRM_LEN == (unsigned long)e_FM_PCD_PLCR_FULL_FRM_LEN);
98627 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN == (unsigned long)e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN);
98628 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_PACKET_MODE == (unsigned long)e_FM_PCD_PLCR_PACKET_MODE);
98629 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_DROP_FRAME == (unsigned long)e_FM_PCD_DROP_FRAME);
98630 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER == (unsigned long)e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER);
98631 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP == (unsigned long)e_FM_PCD_ACTION_INDEXED_LOOKUP);
98632 +    ASSERT_COND((unsigned long)e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR == (unsigned long)e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR);
98633 +#if !defined(FM_CAPWAP_SUPPORT)
98634 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_INSRT_GENERIC == (unsigned long)e_FM_PCD_MANIP_INSRT_GENERIC);
98635 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_RMV_GENERIC == (unsigned long)e_FM_PCD_MANIP_RMV_GENERIC);
98636 +#else
98637 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_INSRT_BY_TEMPLATE == (unsigned long)e_FM_PCD_MANIP_INSRT_BY_TEMPLATE);
98638 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_RMV_BY_HDR == (unsigned long)e_FM_PCD_MANIP_RMV_BY_HDR);
98639 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_RMV_BY_HDR_FROM_START == (unsigned long)e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START);
98640 +#endif
98641 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG == (unsigned long)e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG);
98642 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH == (unsigned long)e_FM_PCD_MANIP_EIGHT_WAYS_HASH);
98643 +
98644 +#ifdef FM_CAPWAP_SUPPORT
98645 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_STATS_PER_FLOWID == (unsigned long)e_FM_PCD_STATS_PER_FLOWID);
98646 +#endif
98647 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD == (unsigned long)e_FM_PCD_MANIP_SPECIAL_OFFLOAD);
98648 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_CC_STATS_MODE_FRAME == (unsigned long)e_FM_PCD_CC_STATS_MODE_FRAME);
98649 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG == (unsigned long)e_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG);
98650 +    ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC == (unsigned long)e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC);
98651 +
98652 +    /* fm_port_ext.h == fm_port_ioctls.h */
98653 +#if !defined(FM_CAPWAP_SUPPORT)
98654 +    ASSERT_COND((unsigned long)e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR == (unsigned long)e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR);
98655 +#else
98656 +    ASSERT_COND((unsigned long)e_IOC_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR == (unsigned long)e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR);
98657 +#endif
98658 +    ASSERT_COND((unsigned long)e_IOC_FM_PORT_COUNTERS_DEQ_CONFIRM == (unsigned long)e_FM_PORT_COUNTERS_DEQ_CONFIRM);
98659 +    ASSERT_COND((unsigned long)e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8 == (unsigned long)e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8);
98660 +
98661 +    return;
98662 +}
98663 +
98664 +static t_Error LnxwrpFmPcdIOCTL(t_LnxWrpFmDev *p_LnxWrpFmDev, unsigned int cmd, unsigned long arg, bool compat)
98665 +{
98666 +    t_Error err = E_OK;
98667 +
98668 +/*
98669 +Status: PCD API to fmlib (file: drivers/net/dpa/NetCommSw/inc/Peripherals/fm_pcd_ext.h):
98670 +
98671 +    FM_PCD_PrsLoadSw
98672 +    FM_PCD_SetAdvancedOffloadSupport
98673 +    FM_PCD_Enable
98674 +    FM_PCD_Disable
98675 +    FM_PCD_ForceIntr
98676 +    FM_PCD_SetException
98677 +    FM_PCD_KgSetAdditionalDataAfterParsing
98678 +    FM_PCD_KgSetDfltValue
98679 +    FM_PCD_NetEnvCharacteristicsSet
98680 +    FM_PCD_NetEnvCharacteristicsDelete
98681 +    FM_PCD_KgSchemeSet
98682 +    FM_PCD_KgSchemeDelete
98683 +    FM_PCD_MatchTableSet
98684 +    FM_PCD_MatchTableDelete
98685 +    FM_PCD_CcRootBuild
98686 +    FM_PCD_CcRootDelete
98687 +    FM_PCD_PlcrProfileSet
98688 +    FM_PCD_PlcrProfileDelete
98689 +    FM_PCD_CcRootModifyNextEngine
98690 +    FM_PCD_MatchTableModifyNextEngine
98691 +    FM_PCD_MatchTableModifyMissNextEngine
98692 +    FM_PCD_MatchTableRemoveKey
98693 +    FM_PCD_MatchTableAddKey
98694 +    FM_PCD_MatchTableModifyKeyAndNextEngine
98695 +    FM_PCD_HashTableSet
98696 +    FM_PCD_HashTableDelete
98697 +    FM_PCD_HashTableAddKey
98698 +    FM_PCD_HashTableRemoveKey
98699 +    FM_PCD_MatchTableModifyKey
98700 +    FM_PCD_ManipNodeReplace
98701 +    FM_PCD_ManipNodeSet
98702 +    FM_PCD_ManipNodeDelete
98703 +
98704 +Status: not exported, should be thru sysfs
98705 +    FM_PCD_KgSchemeGetCounter
98706 +    FM_PCD_KgSchemeSetCounter
98707 +    FM_PCD_PlcrProfileGetCounter
98708 +    FM_PCD_PlcrProfileSetCounter
98709 +
98710 +Status: not exported
98711 +    FM_PCD_MatchTableFindNRemoveKey
98712 +    FM_PCD_MatchTableFindNModifyNextEngine
98713 +    FM_PCD_MatchTableFindNModifyKeyAndNextEngine
98714 +    FM_PCD_MatchTableFindNModifyKey
98715 +    FM_PCD_MatchTableGetIndexedHashBucket
98716 +    FM_PCD_MatchTableGetNextEngine
98717 +    FM_PCD_MatchTableGetKeyCounter
98718 +
98719 +Status: not exported, would be nice to have
98720 +    FM_PCD_HashTableModifyNextEngine
98721 +    FM_PCD_HashTableModifyMissNextEngine
98722 +    FM_PCD_HashTableGetMissNextEngine
98723 +    FM_PCD_ManipGetStatistics
98724 +
98725 +Status: not exported
98726 +#if DPAA_VERSION >= 11
98727 +
98728 +    FM_VSP_GetStatistics -- it's not available yet
98729 +#endif
98730 +
98731 +Status: feature not supported
98732 +#ifdef FM_CAPWAP_SUPPORT
98733 +#error unsupported feature
98734 +    FM_PCD_StatisticsSetNode
98735 +#endif
98736 +
98737 + */
98738 +    _fm_ioctl_dbg("cmd:0x%08x(type:0x%02x, nr:%u).\n",
98739 +            cmd, _IOC_TYPE(cmd), _IOC_NR(cmd) - 20);
98740 +
98741 +    switch (cmd)
98742 +    {
98743 +#if defined(CONFIG_COMPAT)
98744 +        case FM_PCD_IOC_PRS_LOAD_SW_COMPAT:
98745 +#endif
98746 +        case FM_PCD_IOC_PRS_LOAD_SW:
98747 +        {
98748 +            ioc_fm_pcd_prs_sw_params_t *param;
98749 +            uint8_t                    *p_code;
98750 +
98751 +            param = (ioc_fm_pcd_prs_sw_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_prs_sw_params_t));
98752 +            if (!param)
98753 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98754 +
98755 +            memset(param, 0, sizeof(ioc_fm_pcd_prs_sw_params_t));
98756 +
98757 +#if defined(CONFIG_COMPAT)
98758 +            if (compat)
98759 +            {
98760 +                ioc_compat_fm_pcd_prs_sw_params_t *compat_param;
98761 +
98762 +                compat_param = (ioc_compat_fm_pcd_prs_sw_params_t *) XX_Malloc(
98763 +                        sizeof(ioc_compat_fm_pcd_prs_sw_params_t));
98764 +                if (!compat_param)
98765 +                {
98766 +                    XX_Free(param);
98767 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98768 +                }
98769 +
98770 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_prs_sw_params_t));
98771 +                if (copy_from_user(compat_param,
98772 +                            (ioc_compat_fm_pcd_prs_sw_params_t *) compat_ptr(arg),
98773 +                            sizeof(ioc_compat_fm_pcd_prs_sw_params_t)))
98774 +                {
98775 +                    XX_Free(compat_param);
98776 +                    XX_Free(param);
98777 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98778 +                }
98779 +
98780 +                compat_fm_pcd_prs_sw(compat_param, param, COMPAT_US_TO_K);
98781 +
98782 +                XX_Free(compat_param);
98783 +            }
98784 +            else
98785 +#endif
98786 +            {
98787 +                if (copy_from_user(param, (ioc_fm_pcd_prs_sw_params_t *)arg,
98788 +                            sizeof(ioc_fm_pcd_prs_sw_params_t)))
98789 +                {
98790 +                    XX_Free(param);
98791 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98792 +                }
98793 +            }
98794 +
98795 +            if (!param->p_code || !param->size)
98796 +            {
98797 +                XX_Free(param);
98798 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98799 +            }
98800 +
98801 +            p_code = (uint8_t *) XX_Malloc(param->size);
98802 +            if (!p_code)
98803 +            {
98804 +                XX_Free(param);
98805 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98806 +            }
98807 +
98808 +            memset(p_code, 0, param->size);
98809 +            if (copy_from_user(p_code, param->p_code, param->size))
98810 +            {
98811 +                XX_Free(p_code);
98812 +                XX_Free(param);
98813 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98814 +            }
98815 +
98816 +            param->p_code = p_code;
98817 +
98818 +            err = FM_PCD_PrsLoadSw(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdPrsSwParams*)param);
98819 +
98820 +            XX_Free(p_code);
98821 +            XX_Free(param);
98822 +            break;
98823 +        }
98824 +
98825 +        case FM_PCD_IOC_SET_ADVANCED_OFFLOAD_SUPPORT:
98826 +            err = FM_PCD_SetAdvancedOffloadSupport(p_LnxWrpFmDev->h_PcdDev);
98827 +            break;
98828 +
98829 +        case FM_PCD_IOC_ENABLE:
98830 +            err = FM_PCD_Enable(p_LnxWrpFmDev->h_PcdDev);
98831 +            break;
98832 +
98833 +        case FM_PCD_IOC_DISABLE:
98834 +            err = FM_PCD_Disable(p_LnxWrpFmDev->h_PcdDev);
98835 +            break;
98836 +
98837 +        case FM_PCD_IOC_FORCE_INTR:
98838 +        {
98839 +            int exception;
98840 +
98841 +#if defined(CONFIG_COMPAT)
98842 +            if (compat)
98843 +            {
98844 +                if (get_user(exception, (int *) compat_ptr(arg)))
98845 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98846 +            }
98847 +            else
98848 +#endif
98849 +            {
98850 +                if (get_user(exception, (int *)arg))
98851 +                   RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98852 +            }
98853 +
98854 +            err = FM_PCD_ForceIntr(p_LnxWrpFmDev->h_PcdDev, (e_FmPcdExceptions)exception);
98855 +            break;
98856 +        }
98857 +
98858 +        case FM_PCD_IOC_SET_EXCEPTION:
98859 +        {
98860 +            ioc_fm_pcd_exception_params_t *param;
98861 +
98862 +            param = (ioc_fm_pcd_exception_params_t *) XX_Malloc(
98863 +                    sizeof(ioc_fm_pcd_exception_params_t));
98864 +            if (!param)
98865 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98866 +
98867 +            memset(param, 0, sizeof(ioc_fm_pcd_exception_params_t));
98868 +
98869 +#if defined(CONFIG_COMPAT)
98870 +            if (compat)
98871 +            {
98872 +                if (copy_from_user(param, (ioc_fm_pcd_exception_params_t *)compat_ptr(arg),
98873 +                                    sizeof(ioc_fm_pcd_exception_params_t)))
98874 +                {
98875 +                    XX_Free(param);
98876 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98877 +                }
98878 +            }
98879 +            else
98880 +#endif
98881 +            {
98882 +                if (copy_from_user(param, (ioc_fm_pcd_exception_params_t *)arg,
98883 +                                    sizeof(ioc_fm_pcd_exception_params_t)))
98884 +                {
98885 +                    XX_Free(param);
98886 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98887 +                }
98888 +            }
98889 +
98890 +            err = FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev, param->exception, param->enable);
98891 +
98892 +            XX_Free(param);
98893 +            break;
98894 +        }
98895 +
98896 +        case FM_PCD_IOC_KG_SET_ADDITIONAL_DATA_AFTER_PARSING:
98897 +        {
98898 +            uint8_t payloadOffset;
98899 +
98900 +#if defined(CONFIG_COMPAT)
98901 +            if (compat)
98902 +            {
98903 +                if (get_user(payloadOffset, (uint8_t*) compat_ptr(arg)))
98904 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98905 +            }
98906 +            else
98907 +#endif
98908 +            {
98909 +                if (get_user(payloadOffset, (uint8_t*) arg))
98910 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98911 +            }
98912 +
98913 +            err = FM_PCD_KgSetAdditionalDataAfterParsing(p_LnxWrpFmDev->h_PcdDev, payloadOffset);
98914 +            break;
98915 +        }
98916 +
98917 +        case FM_PCD_IOC_KG_SET_DFLT_VALUE:
98918 +        {
98919 +            ioc_fm_pcd_kg_dflt_value_params_t *param;
98920 +
98921 +            param = (ioc_fm_pcd_kg_dflt_value_params_t *) XX_Malloc(
98922 +                    sizeof(ioc_fm_pcd_kg_dflt_value_params_t));
98923 +            if (!param)
98924 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98925 +
98926 +            memset(param, 0, sizeof(ioc_fm_pcd_kg_dflt_value_params_t));
98927 +
98928 +#if defined(CONFIG_COMPAT)
98929 +            if (compat)
98930 +            {
98931 +                if (copy_from_user(param, (ioc_fm_pcd_kg_dflt_value_params_t *)compat_ptr(arg),
98932 +                                    sizeof(ioc_fm_pcd_kg_dflt_value_params_t)))
98933 +                {
98934 +                    XX_Free(param);
98935 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98936 +                }
98937 +            }
98938 +            else
98939 +#endif
98940 +            {
98941 +                if (copy_from_user(param, (ioc_fm_pcd_kg_dflt_value_params_t *)arg,
98942 +                                    sizeof(ioc_fm_pcd_kg_dflt_value_params_t)))
98943 +                {
98944 +                    XX_Free(param);
98945 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98946 +                }
98947 +            }
98948 +
98949 +            err = FM_PCD_KgSetDfltValue(p_LnxWrpFmDev->h_PcdDev, param->valueId, param->value);
98950 +
98951 +            XX_Free(param);
98952 +            break;
98953 +        }
98954 +
98955 +#if defined(CONFIG_COMPAT)
98956 +        case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET_COMPAT:
98957 +#endif
98958 +        case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET:
98959 +        {
98960 +            ioc_fm_pcd_net_env_params_t  *param;
98961 +
98962 +            param = (ioc_fm_pcd_net_env_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_net_env_params_t));
98963 +            if (!param)
98964 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98965 +
98966 +            memset(param, 0, sizeof(ioc_fm_pcd_net_env_params_t));
98967 +
98968 +#if defined(CONFIG_COMPAT)
98969 +            if (compat)
98970 +            {
98971 +                ioc_compat_fm_pcd_net_env_params_t *compat_param;
98972 +
98973 +                compat_param = (ioc_compat_fm_pcd_net_env_params_t *) XX_Malloc(
98974 +                        sizeof(ioc_compat_fm_pcd_net_env_params_t));
98975 +                if (!compat_param)
98976 +                {
98977 +                    XX_Free(param);
98978 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
98979 +                }
98980 +
98981 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_net_env_params_t));
98982 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_net_env_params_t *) compat_ptr(arg),
98983 +                                    sizeof(ioc_compat_fm_pcd_net_env_params_t)))
98984 +                {
98985 +                    XX_Free(compat_param);
98986 +                    XX_Free(param);
98987 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
98988 +                }
98989 +
98990 +                compat_copy_fm_pcd_net_env(compat_param, param, COMPAT_US_TO_K);
98991 +                XX_Free(compat_param);
98992 +            }
98993 +            else
98994 +#endif
98995 +            {
98996 +                if (copy_from_user(param, (ioc_fm_pcd_net_env_params_t *) arg,
98997 +                            sizeof(ioc_fm_pcd_net_env_params_t)))
98998 +                {
98999 +                    XX_Free(param);
99000 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99001 +                }
99002 +            }
99003 +
99004 +            param->id = FM_PCD_NetEnvCharacteristicsSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdNetEnvParams*)param);
99005 +
99006 +            if (!param->id)
99007 +            {
99008 +                XX_Free(param);
99009 +                err = E_INVALID_VALUE;
99010 +                /* Since the LLD has no errno-style error reporting,
99011 +                   we're left here with no other option than to report
99012 +                   a generic E_INVALID_VALUE */
99013 +                break;
99014 +            }
99015 +
99016 +#if defined(CONFIG_COMPAT)
99017 +            if (compat)
99018 +            {
99019 +                ioc_compat_fm_pcd_net_env_params_t *compat_param;
99020 +
99021 +                compat_param = (ioc_compat_fm_pcd_net_env_params_t *) XX_Malloc(
99022 +                        sizeof(ioc_compat_fm_pcd_net_env_params_t));
99023 +                if (!compat_param)
99024 +                {
99025 +                    XX_Free(param);
99026 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99027 +                }
99028 +
99029 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_net_env_params_t));
99030 +                compat_copy_fm_pcd_net_env(compat_param, param, COMPAT_K_TO_US);
99031 +
99032 +                if (copy_to_user((ioc_compat_fm_pcd_net_env_params_t *) compat_ptr(arg),
99033 +                            compat_param,
99034 +                            sizeof(ioc_compat_fm_pcd_net_env_params_t)))
99035 +                    err = E_READ_FAILED;
99036 +
99037 +                XX_Free(compat_param);
99038 +            }
99039 +            else
99040 +#endif
99041 +            {
99042 +                if (copy_to_user((ioc_fm_pcd_net_env_params_t *)arg,
99043 +                            param,
99044 +                            sizeof(ioc_fm_pcd_net_env_params_t)))
99045 +                    err = E_READ_FAILED;
99046 +            }
99047 +
99048 +            XX_Free(param);
99049 +            break;
99050 +        }
99051 +
99052 +#if defined(CONFIG_COMPAT)
99053 +        case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE_COMPAT:
99054 +#endif
99055 +        case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE:
99056 +        {
99057 +            ioc_fm_obj_t id;
99058 +
99059 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
99060 +
99061 +#if defined(CONFIG_COMPAT)
99062 +            if (compat)
99063 +            {
99064 +                ioc_compat_fm_obj_t compat_id;
99065 +
99066 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
99067 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99068 +
99069 +                compat_obj_delete(&compat_id, &id);
99070 +            }
99071 +            else
99072 +#endif
99073 +            {
99074 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
99075 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99076 +            }
99077 +
99078 +            err = FM_PCD_NetEnvCharacteristicsDelete(id.obj);
99079 +            break;
99080 +        }
99081 +
99082 +#if defined(CONFIG_COMPAT)
99083 +        case FM_PCD_IOC_KG_SCHEME_SET_COMPAT:
99084 +#endif
99085 +        case FM_PCD_IOC_KG_SCHEME_SET:
99086 +        {
99087 +            ioc_fm_pcd_kg_scheme_params_t *param;
99088 +
99089 +            param = (ioc_fm_pcd_kg_scheme_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_kg_scheme_params_t));
99090 +            if (!param)
99091 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99092 +
99093 +            memset(param, 0, sizeof(ioc_fm_pcd_kg_scheme_params_t));
99094 +
99095 +#if defined(CONFIG_COMPAT)
99096 +            if (compat)
99097 +            {
99098 +                ioc_compat_fm_pcd_kg_scheme_params_t *compat_param = NULL;
99099 +
99100 +                compat_param = (ioc_compat_fm_pcd_kg_scheme_params_t *) XX_Malloc(
99101 +                        sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
99102 +                if (!compat_param)
99103 +                {
99104 +                    XX_Free(param);
99105 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99106 +                }
99107 +
99108 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
99109 +
99110 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_kg_scheme_params_t *) compat_ptr(arg),
99111 +                            sizeof(ioc_compat_fm_pcd_kg_scheme_params_t)))
99112 +                {
99113 +                    XX_Free(compat_param);
99114 +                    XX_Free(param);
99115 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99116 +                }
99117 +
99118 +                compat_copy_fm_pcd_kg_scheme(compat_param, param, COMPAT_US_TO_K);
99119 +
99120 +                XX_Free(compat_param);
99121 +            }
99122 +            else
99123 +#endif
99124 +            {
99125 +                if (copy_from_user(param, (ioc_fm_pcd_kg_scheme_params_t *)arg,
99126 +                            sizeof(ioc_fm_pcd_kg_scheme_params_t)))
99127 +                {
99128 +                    XX_Free(param);
99129 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99130 +                }
99131 +            }
99132 +
99133 +            param->id = FM_PCD_KgSchemeSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdKgSchemeParams*)param);
99134 +
99135 +            if (!param->id)
99136 +            {
99137 +                XX_Free(param);
99138 +                err = E_INVALID_VALUE;
99139 +                /* Since the LLD has no errno-style error reporting,
99140 +                   we're left here with no other option than to report
99141 +                   a generic E_INVALID_VALUE */
99142 +                break;
99143 +            }
99144 +
99145 +#if defined(CONFIG_COMPAT)
99146 +            if (compat)
99147 +            {
99148 +                ioc_compat_fm_pcd_kg_scheme_params_t *compat_param;
99149 +
99150 +                compat_param = (ioc_compat_fm_pcd_kg_scheme_params_t *) XX_Malloc(
99151 +                        sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
99152 +                if (!compat_param)
99153 +                {
99154 +                    XX_Free(param);
99155 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99156 +                }
99157 +
99158 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
99159 +                compat_copy_fm_pcd_kg_scheme(compat_param, param, COMPAT_K_TO_US);
99160 +                if (copy_to_user((ioc_compat_fm_pcd_kg_scheme_params_t *)compat_ptr(arg),
99161 +                            compat_param,
99162 +                            sizeof(ioc_compat_fm_pcd_kg_scheme_params_t)))
99163 +                    err = E_READ_FAILED;
99164 +
99165 +                XX_Free(compat_param);
99166 +            }
99167 +            else
99168 +#endif
99169 +            {
99170 +                if (copy_to_user((ioc_fm_pcd_kg_scheme_params_t *)arg,
99171 +                            param,
99172 +                            sizeof(ioc_fm_pcd_kg_scheme_params_t)))
99173 +                    err = E_READ_FAILED;
99174 +            }
99175 +
99176 +            XX_Free(param);
99177 +            break;
99178 +        }
99179 +
99180 +#if defined(CONFIG_COMPAT)
99181 +        case FM_PCD_IOC_KG_SCHEME_GET_CNTR_COMPAT:
99182 +#endif
99183 +        case FM_PCD_IOC_KG_SCHEME_GET_CNTR:
99184 +        {
99185 +            ioc_fm_pcd_kg_scheme_spc_t *param;
99186 +
99187 +            param = (ioc_fm_pcd_kg_scheme_spc_t *) XX_Malloc(sizeof(ioc_fm_pcd_kg_scheme_spc_t));
99188 +            if (!param)
99189 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99190 +
99191 +            memset(param, 0, sizeof(ioc_fm_pcd_kg_scheme_spc_t));
99192 +
99193 +#if defined(CONFIG_COMPAT)
99194 +            if (compat)
99195 +            {
99196 +                ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param = NULL;
99197 +
99198 +                compat_param = (ioc_compat_fm_pcd_kg_scheme_spc_t *) XX_Malloc(
99199 +                        sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
99200 +                if (!compat_param)
99201 +                {
99202 +                    XX_Free(param);
99203 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99204 +                }
99205 +
99206 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
99207 +
99208 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_kg_scheme_spc_t *) compat_ptr(arg),
99209 +                            sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t)))
99210 +                {
99211 +                    XX_Free(compat_param);
99212 +                    XX_Free(param);
99213 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99214 +                }
99215 +
99216 +                compat_copy_fm_pcd_kg_scheme_spc(compat_param, param, COMPAT_US_TO_K);
99217 +
99218 +                XX_Free(compat_param);
99219 +            }
99220 +            else
99221 +#endif
99222 +            {
99223 +                if (copy_from_user(param, (ioc_fm_pcd_kg_scheme_spc_t *)arg,
99224 +                            sizeof(ioc_fm_pcd_kg_scheme_spc_t)))
99225 +                {
99226 +                    XX_Free(param);
99227 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99228 +                }
99229 +            }
99230 +
99231 +            param->val = FM_PCD_KgSchemeGetCounter((t_Handle)param->id);
99232 +
99233 +#if defined(CONFIG_COMPAT)
99234 +            if (compat)
99235 +            {
99236 +                ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param;
99237 +
99238 +                compat_param = (ioc_compat_fm_pcd_kg_scheme_spc_t *) XX_Malloc(
99239 +                        sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
99240 +                if (!compat_param)
99241 +                {
99242 +                    XX_Free(param);
99243 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99244 +                }
99245 +
99246 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
99247 +                compat_copy_fm_pcd_kg_scheme_spc(compat_param, param, COMPAT_K_TO_US);
99248 +                if (copy_to_user((ioc_compat_fm_pcd_kg_scheme_spc_t *)compat_ptr(arg),
99249 +                            compat_param,
99250 +                            sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t)))
99251 +                    err = E_READ_FAILED;
99252 +
99253 +                XX_Free(compat_param);
99254 +            }
99255 +            else
99256 +#endif
99257 +            {
99258 +                if (copy_to_user((ioc_fm_pcd_kg_scheme_spc_t *)arg,
99259 +                            param,
99260 +                            sizeof(ioc_fm_pcd_kg_scheme_spc_t)))
99261 +                    err = E_READ_FAILED;
99262 +            }
99263 +
99264 +            XX_Free(param);
99265 +            break;
99266 +        }
99267 +
99268 +#if defined(CONFIG_COMPAT)
99269 +        case FM_PCD_IOC_KG_SCHEME_DELETE_COMPAT:
99270 +#endif
99271 +        case FM_PCD_IOC_KG_SCHEME_DELETE:
99272 +        {
99273 +            ioc_fm_obj_t id;
99274 +
99275 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
99276 +
99277 +#if defined(CONFIG_COMPAT)
99278 +            if (compat)
99279 +            {
99280 +                ioc_compat_fm_obj_t compat_id;
99281 +
99282 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
99283 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99284 +
99285 +                compat_obj_delete(&compat_id, &id);
99286 +            }
99287 +            else
99288 +#endif
99289 +            {
99290 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
99291 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99292 +            }
99293 +
99294 +            err = FM_PCD_KgSchemeDelete(id.obj);
99295 +            break;
99296 +        }
99297 +
99298 +#if defined(CONFIG_COMPAT)
99299 +        case FM_PCD_IOC_MATCH_TABLE_SET_COMPAT:
99300 +#endif
99301 +        case FM_PCD_IOC_MATCH_TABLE_SET:
99302 +        {
99303 +            ioc_fm_pcd_cc_node_params_t *param;
99304 +            uint8_t                     *keys;
99305 +            uint8_t                     *masks;
99306 +            int                         i,k;
99307 +
99308 +            param = (ioc_fm_pcd_cc_node_params_t *) XX_Malloc(
99309 +                    sizeof(ioc_fm_pcd_cc_node_params_t) +
99310 +                    2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
99311 +            if (!param)
99312 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99313 +
99314 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_params_t) +
99315 +                    2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
99316 +
99317 +            keys = (uint8_t *) (param + 1);
99318 +            masks = keys + IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY;
99319 +
99320 +#if defined(CONFIG_COMPAT)
99321 +            if (compat)
99322 +            {
99323 +                ioc_compat_fm_pcd_cc_node_params_t *compat_param;
99324 +
99325 +                compat_param = (ioc_compat_fm_pcd_cc_node_params_t *) XX_Malloc(
99326 +                                    sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
99327 +                                    2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
99328 +                if (!compat_param)
99329 +                {
99330 +                    XX_Free(param);
99331 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99332 +                }
99333 +
99334 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
99335 +                        2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
99336 +
99337 +                if (copy_from_user(compat_param,
99338 +                            (ioc_compat_fm_pcd_cc_node_params_t *)compat_ptr(arg),
99339 +                            sizeof(ioc_compat_fm_pcd_cc_node_params_t)))
99340 +                {
99341 +                    XX_Free(compat_param);
99342 +                    XX_Free(param);
99343 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99344 +                }
99345 +
99346 +                compat_copy_fm_pcd_cc_node(compat_param, param, COMPAT_US_TO_K);
99347 +
99348 +                XX_Free(compat_param);
99349 +            }
99350 +            else
99351 +#endif
99352 +            {
99353 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_params_t *)arg, sizeof(ioc_fm_pcd_cc_node_params_t)))
99354 +                {
99355 +                    XX_Free(param);
99356 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99357 +                }
99358 +            }
99359 +
99360 +            ASSERT_COND(param->keys_params.num_of_keys <= IOC_FM_PCD_MAX_NUM_OF_KEYS);
99361 +            ASSERT_COND(param->keys_params.key_size <= IOC_FM_PCD_MAX_SIZE_OF_KEY);
99362 +
99363 +            /* support for indexed lookup */
99364 +            if( !(param->extract_cc_params.type == e_IOC_FM_PCD_EXTRACT_NON_HDR &&
99365 +                  param->extract_cc_params.extract_params.extract_non_hdr.src == e_IOC_FM_PCD_EXTRACT_FROM_HASH &&
99366 +                  param->extract_cc_params.extract_params.extract_non_hdr.action == e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP))
99367 +            {
99368 +                for (i=0, k=0;
99369 +                     i < param->keys_params.num_of_keys;
99370 +                     i++, k += IOC_FM_PCD_MAX_SIZE_OF_KEY)
99371 +                {
99372 +                    if (param->keys_params.key_params[i].p_key &&
99373 +                            param->keys_params.key_size)
99374 +                    {
99375 +                        if (copy_from_user(&keys[k],
99376 +                                    param->keys_params.key_params[i].p_key,
99377 +                                    param->keys_params.key_size))
99378 +                        {
99379 +                            XX_Free(param);
99380 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99381 +                        }
99382 +
99383 +                        param->keys_params.key_params[i].p_key = &keys[k];
99384 +                    }
99385 +
99386 +                    if (param->keys_params.key_params[i].p_mask)
99387 +                    {
99388 +                        if (copy_from_user(&masks[k],
99389 +                                    param->keys_params.key_params[i].p_mask,
99390 +                                    param->keys_params.key_size))
99391 +                        {
99392 +                            XX_Free(param);
99393 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99394 +                        }
99395 +
99396 +                        param->keys_params.key_params[i].p_mask = &masks[k];
99397 +                    }
99398 +                }
99399 +            }
99400 +
99401 +            param->id = FM_PCD_MatchTableSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdCcNodeParams*)param);
99402 +
99403 +            if (!param->id) {
99404 +                XX_Free(param);
99405 +                err = E_INVALID_VALUE;
99406 +                /* Since the LLD has no errno-style error reporting,
99407 +                   we're left here with no other option than to report
99408 +                   a generic E_INVALID_VALUE */
99409 +                break;
99410 +            }
99411 +
99412 +#if defined(CONFIG_COMPAT)
99413 +            if (compat)
99414 +            {
99415 +                ioc_compat_fm_pcd_cc_node_params_t *compat_param;
99416 +                compat_param = (ioc_compat_fm_pcd_cc_node_params_t *) XX_Malloc(
99417 +                                            sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
99418 +                                            2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
99419 +                if (!compat_param)
99420 +                {
99421 +                    XX_Free(param);
99422 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99423 +                }
99424 +
99425 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
99426 +                        2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
99427 +                compat_copy_fm_pcd_cc_node(compat_param, param, COMPAT_K_TO_US);
99428 +
99429 +                if (copy_to_user((ioc_compat_fm_pcd_cc_node_params_t *)compat_ptr(arg),
99430 +                            compat_param,
99431 +                            sizeof(ioc_compat_fm_pcd_cc_node_params_t)))
99432 +                    err = E_READ_FAILED;
99433 +
99434 +                XX_Free(compat_param);
99435 +            }
99436 +            else
99437 +#endif
99438 +            {
99439 +                if (copy_to_user((ioc_fm_pcd_cc_node_params_t *)arg,
99440 +                            param,
99441 +                            sizeof(ioc_fm_pcd_cc_node_params_t)))
99442 +                    err = E_READ_FAILED;
99443 +            }
99444 +
99445 +            XX_Free(param);
99446 +            break;
99447 +        }
99448 +
99449 +#if defined(CONFIG_COMPAT)
99450 +        case FM_PCD_IOC_MATCH_TABLE_DELETE_COMPAT:
99451 +#endif
99452 +        case FM_PCD_IOC_MATCH_TABLE_DELETE:
99453 +        {
99454 +            ioc_fm_obj_t id;
99455 +
99456 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
99457 +
99458 +#if defined(CONFIG_COMPAT)
99459 +            if (compat)
99460 +            {
99461 +                ioc_compat_fm_obj_t compat_id;
99462 +
99463 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
99464 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99465 +
99466 +                compat_obj_delete(&compat_id, &id);
99467 +            }
99468 +            else
99469 +#endif
99470 +            {
99471 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
99472 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99473 +            }
99474 +
99475 +            err = FM_PCD_MatchTableDelete(id.obj);
99476 +            break;
99477 +        }
99478 +
99479 +#if defined(CONFIG_COMPAT)
99480 +        case FM_PCD_IOC_CC_ROOT_BUILD_COMPAT:
99481 +#endif
99482 +        case FM_PCD_IOC_CC_ROOT_BUILD:
99483 +        {
99484 +            ioc_fm_pcd_cc_tree_params_t *param;
99485 +
99486 +            param = (ioc_fm_pcd_cc_tree_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_cc_tree_params_t));
99487 +            if (!param)
99488 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99489 +
99490 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_tree_params_t));
99491 +
99492 +#if defined(CONFIG_COMPAT)
99493 +            if (compat)
99494 +            {
99495 +                ioc_compat_fm_pcd_cc_tree_params_t *compat_param;
99496 +
99497 +                compat_param = (ioc_compat_fm_pcd_cc_tree_params_t *) XX_Malloc(
99498 +                        sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
99499 +                if (!compat_param)
99500 +                {
99501 +                    XX_Free(param);
99502 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99503 +                }
99504 +
99505 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
99506 +                if (copy_from_user(compat_param,
99507 +                            (ioc_compat_fm_pcd_cc_tree_params_t *)compat_ptr(arg),
99508 +                            sizeof(ioc_compat_fm_pcd_cc_tree_params_t)))
99509 +                {
99510 +                    XX_Free(compat_param);
99511 +                    XX_Free(param);
99512 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99513 +                }
99514 +
99515 +                compat_copy_fm_pcd_cc_tree(compat_param, param, COMPAT_US_TO_K);
99516 +
99517 +                XX_Free(compat_param);
99518 +            }
99519 +            else
99520 +#endif
99521 +            {
99522 +                if (copy_from_user(param, (ioc_fm_pcd_cc_tree_params_t *)arg,
99523 +                            sizeof(ioc_fm_pcd_cc_tree_params_t)))
99524 +                {
99525 +                    XX_Free(param);
99526 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99527 +                }
99528 +            }
99529 +
99530 +            param->id = FM_PCD_CcRootBuild(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdCcTreeParams*)param);
99531 +
99532 +            if (!param->id) {
99533 +                XX_Free(param);
99534 +                err = E_INVALID_VALUE;
99535 +                /* Since the LLD has no errno-style error reporting,
99536 +                   we're left here with no other option than to report
99537 +                   a generic E_INVALID_VALUE */
99538 +                break;
99539 +            }
99540 +
99541 +#if defined(CONFIG_COMPAT)
99542 +            if (compat)
99543 +            {
99544 +                ioc_compat_fm_pcd_cc_tree_params_t *compat_param;
99545 +
99546 +                compat_param = (ioc_compat_fm_pcd_cc_tree_params_t *) XX_Malloc(sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
99547 +                if (!compat_param)
99548 +                {
99549 +                    XX_Free(param);
99550 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99551 +                }
99552 +
99553 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
99554 +
99555 +                compat_copy_fm_pcd_cc_tree(compat_param, param, COMPAT_K_TO_US);
99556 +
99557 +                if (copy_to_user((ioc_compat_fm_pcd_cc_tree_params_t *)compat_ptr(arg),
99558 +                            compat_param,
99559 +                            sizeof(ioc_compat_fm_pcd_cc_tree_params_t)))
99560 +                    err = E_READ_FAILED;
99561 +
99562 +                XX_Free(compat_param);
99563 +            }
99564 +            else
99565 +#endif
99566 +            {
99567 +                if (copy_to_user((ioc_fm_pcd_cc_tree_params_t *)arg,
99568 +                            param,
99569 +                            sizeof(ioc_fm_pcd_cc_tree_params_t)))
99570 +                    err = E_READ_FAILED;
99571 +            }
99572 +
99573 +            XX_Free(param);
99574 +            break;
99575 +        }
99576 +
99577 +#if defined(CONFIG_COMPAT)
99578 +        case FM_PCD_IOC_CC_ROOT_DELETE_COMPAT:
99579 +#endif
99580 +        case FM_PCD_IOC_CC_ROOT_DELETE:
99581 +        {
99582 +            ioc_fm_obj_t id;
99583 +
99584 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
99585 +
99586 +#if defined(CONFIG_COMPAT)
99587 +            if (compat)
99588 +            {
99589 +                ioc_compat_fm_obj_t compat_id;
99590 +
99591 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
99592 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99593 +
99594 +                compat_obj_delete(&compat_id, &id);
99595 +            }
99596 +            else
99597 +#endif
99598 +            {
99599 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
99600 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99601 +            }
99602 +
99603 +            err = FM_PCD_CcRootDelete(id.obj);
99604 +            break;
99605 +        }
99606 +
99607 +#if defined(CONFIG_COMPAT)
99608 +        case FM_PCD_IOC_PLCR_PROFILE_SET_COMPAT:
99609 +#endif
99610 +        case FM_PCD_IOC_PLCR_PROFILE_SET:
99611 +        {
99612 +            ioc_fm_pcd_plcr_profile_params_t *param;
99613 +
99614 +            param = (ioc_fm_pcd_plcr_profile_params_t *) XX_Malloc(
99615 +                    sizeof(ioc_fm_pcd_plcr_profile_params_t));
99616 +            if (!param)
99617 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99618 +
99619 +            memset(param, 0, sizeof(ioc_fm_pcd_plcr_profile_params_t));
99620 +
99621 +#if defined(CONFIG_COMPAT)
99622 +            if (compat)
99623 +            {
99624 +                ioc_compat_fm_pcd_plcr_profile_params_t *compat_param;
99625 +
99626 +                compat_param = (ioc_compat_fm_pcd_plcr_profile_params_t *) XX_Malloc(
99627 +                        sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
99628 +                if (!compat_param)
99629 +                {
99630 +                    XX_Free(param);
99631 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99632 +                }
99633 +
99634 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
99635 +                if (copy_from_user(compat_param, (
99636 +                            ioc_compat_fm_pcd_plcr_profile_params_t *)compat_ptr(arg),
99637 +                            sizeof(ioc_compat_fm_pcd_plcr_profile_params_t)))
99638 +                {
99639 +                    XX_Free(compat_param);
99640 +                    XX_Free(param);
99641 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99642 +                }
99643 +
99644 +                compat_copy_fm_pcd_plcr_profile(compat_param, param, COMPAT_US_TO_K);
99645 +
99646 +                XX_Free(compat_param);
99647 +            }
99648 +            else
99649 +#endif
99650 +            {
99651 +                if (copy_from_user(param, (ioc_fm_pcd_plcr_profile_params_t *)arg,
99652 +                                    sizeof(ioc_fm_pcd_plcr_profile_params_t)))
99653 +                {
99654 +                    XX_Free(param);
99655 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99656 +                }
99657 +            }
99658 +
99659 +            if (!param->modify &&
99660 +                (((t_FmPcdPlcrProfileParams*)param)->id.newParams.profileType != e_FM_PCD_PLCR_SHARED))
99661 +            {
99662 +                t_Handle h_Port;
99663 +                ioc_fm_pcd_port_params_t *port_params;
99664 +
99665 +                port_params = (ioc_fm_pcd_port_params_t*) XX_Malloc(sizeof(ioc_fm_pcd_port_params_t));
99666 +                if (!port_params)
99667 +                {
99668 +                    XX_Free(param);
99669 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99670 +                }
99671 +
99672 +                memset(port_params, 0, sizeof(ioc_fm_pcd_port_params_t));
99673 +                if (copy_from_user(port_params, (ioc_fm_pcd_port_params_t*)((t_FmPcdPlcrProfileParams*)param)->id.newParams.h_FmPort,
99674 +                            sizeof(ioc_fm_pcd_port_params_t)))
99675 +                {
99676 +                    XX_Free(port_params);
99677 +                    XX_Free(param);
99678 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99679 +                }
99680 +
99681 +                switch(port_params->port_type)
99682 +                {
99683 +                    case (e_IOC_FM_PORT_TYPE_RX):
99684 +                        if (port_params->port_id < FM_MAX_NUM_OF_1G_RX_PORTS) {
99685 +                            h_Port = p_LnxWrpFmDev->rxPorts[port_params->port_id].h_Dev;
99686 +                            break;
99687 +                        }
99688 +                        goto invalid_port_id;
99689 +
99690 +                    case (e_IOC_FM_PORT_TYPE_RX_10G):
99691 +                        if (port_params->port_id < FM_MAX_NUM_OF_10G_RX_PORTS) {
99692 +#ifndef CONFIG_FMAN_ARM
99693 +                            if (IS_T1023_T1024) {
99694 +                                h_Port = p_LnxWrpFmDev->rxPorts[port_params->port_id].h_Dev;
99695 +                            } else {
99696 +#else
99697 +                            {
99698 +#endif
99699 +                                h_Port = p_LnxWrpFmDev->rxPorts[port_params->port_id + FM_MAX_NUM_OF_1G_RX_PORTS].h_Dev;
99700 +                            }
99701 +                            break;
99702 +                        }
99703 +                        goto invalid_port_id;
99704 +
99705 +                    case (e_IOC_FM_PORT_TYPE_OH_OFFLINE_PARSING):
99706 +                        if (port_params->port_id && port_params->port_id < FM_MAX_NUM_OF_OH_PORTS) {
99707 +                            h_Port = p_LnxWrpFmDev->opPorts[port_params->port_id - 1].h_Dev;
99708 +                            break;
99709 +                        }
99710 +                        goto invalid_port_id;
99711 +
99712 +                    default:
99713 +invalid_port_id:
99714 +                        XX_Free(port_params);
99715 +                        XX_Free(param);
99716 +                        RETURN_ERROR(MINOR, E_INVALID_SELECTION, NO_MSG);
99717 +                }
99718 +
99719 +                ((t_FmPcdPlcrProfileParams*)param)->id.newParams.h_FmPort = h_Port;
99720 +                XX_Free(port_params);
99721 +            }
99722 +
99723 +            param->id = FM_PCD_PlcrProfileSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdPlcrProfileParams*)param);
99724 +
99725 +            if (!param->id) {
99726 +                XX_Free(param);
99727 +                err = E_INVALID_VALUE;
99728 +                /* Since the LLD has no errno-style error reporting,
99729 +                   we're left here with no other option than to report
99730 +                   a generic E_INVALID_VALUE */
99731 +                break;
99732 +            }
99733 +
99734 +#if defined(CONFIG_COMPAT)
99735 +            if (compat)
99736 +            {
99737 +                ioc_compat_fm_pcd_plcr_profile_params_t *compat_param;
99738 +
99739 +                compat_param = (ioc_compat_fm_pcd_plcr_profile_params_t *) XX_Malloc(
99740 +                        sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
99741 +                if (!compat_param)
99742 +                {
99743 +                    XX_Free(param);
99744 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99745 +                }
99746 +
99747 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
99748 +                compat_copy_fm_pcd_plcr_profile(compat_param, param, COMPAT_K_TO_US);
99749 +                if (copy_to_user((ioc_compat_fm_pcd_plcr_profile_params_t *) compat_ptr(arg),
99750 +                            compat_param,
99751 +                            sizeof(ioc_compat_fm_pcd_plcr_profile_params_t)))
99752 +                    err = E_READ_FAILED;
99753 +
99754 +                XX_Free(compat_param);
99755 +            }
99756 +            else
99757 +#endif
99758 +            {
99759 +                if (copy_to_user((ioc_fm_pcd_plcr_profile_params_t *)arg,
99760 +                            param,
99761 +                            sizeof(ioc_fm_pcd_plcr_profile_params_t)))
99762 +                    err = E_READ_FAILED;
99763 +            }
99764 +
99765 +            XX_Free(param);
99766 +            break;
99767 +        }
99768 +
99769 +#if defined(CONFIG_COMPAT)
99770 +        case FM_PCD_IOC_PLCR_PROFILE_DELETE_COMPAT:
99771 +#endif
99772 +        case FM_PCD_IOC_PLCR_PROFILE_DELETE:
99773 +        {
99774 +            ioc_fm_obj_t id;
99775 +
99776 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
99777 +
99778 +#if defined(CONFIG_COMPAT)
99779 +            if (compat)
99780 +            {
99781 +                ioc_compat_fm_obj_t compat_id;
99782 +
99783 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
99784 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99785 +
99786 +                compat_obj_delete(&compat_id, &id);
99787 +            }
99788 +            else
99789 +#endif
99790 +            {
99791 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
99792 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99793 +            }
99794 +
99795 +            err = FM_PCD_PlcrProfileDelete(id.obj);
99796 +            break;
99797 +        }
99798 +
99799 +#if defined(CONFIG_COMPAT)
99800 +        case FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE_COMPAT:
99801 +#endif
99802 +        case FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE:
99803 +        {
99804 +            ioc_fm_pcd_cc_tree_modify_next_engine_params_t *param;
99805 +
99806 +            param = (ioc_fm_pcd_cc_tree_modify_next_engine_params_t *) XX_Malloc(
99807 +                    sizeof(ioc_fm_pcd_cc_tree_modify_next_engine_params_t));
99808 +            if (!param)
99809 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99810 +
99811 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_tree_modify_next_engine_params_t));
99812 +
99813 +#if defined(CONFIG_COMPAT)
99814 +            if (compat)
99815 +            {
99816 +                ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *compat_param;
99817 +
99818 +                compat_param = (ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *) XX_Malloc(
99819 +                        sizeof(ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t));
99820 +                if (!compat_param)
99821 +                {
99822 +                    XX_Free(param);
99823 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99824 +                }
99825 +
99826 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t));
99827 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *) compat_ptr(arg),
99828 +                            sizeof(ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t)))
99829 +                {
99830 +                    XX_Free(compat_param);
99831 +                    XX_Free(param);
99832 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99833 +                }
99834 +
99835 +                compat_fm_pcd_cc_tree_modify_next_engine(compat_param, param, COMPAT_US_TO_K);
99836 +
99837 +                XX_Free(compat_param);
99838 +            }
99839 +            else
99840 +#endif
99841 +            {
99842 +                if (copy_from_user(param, (ioc_fm_pcd_cc_tree_modify_next_engine_params_t *)arg,
99843 +                            sizeof(ioc_fm_pcd_cc_tree_modify_next_engine_params_t)))
99844 +                {
99845 +                    XX_Free(param);
99846 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99847 +                }
99848 +            }
99849 +
99850 +            err = FM_PCD_CcRootModifyNextEngine(param->id,
99851 +                                                param->grp_indx,
99852 +                                                param->indx,
99853 +                                                (t_FmPcdCcNextEngineParams*)(&param->cc_next_engine_params));
99854 +
99855 +            XX_Free(param);
99856 +            break;
99857 +        }
99858 +
99859 +#if defined(CONFIG_COMPAT)
99860 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE_COMPAT:
99861 +#endif
99862 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE:
99863 +        {
99864 +            ioc_fm_pcd_cc_node_modify_next_engine_params_t *param;
99865 +
99866 +            param = (ioc_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
99867 +                    sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
99868 +            if (!param)
99869 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99870 +
99871 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
99872 +
99873 +#if defined(CONFIG_COMPAT)
99874 +            if (compat)
99875 +            {
99876 +                ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param;
99877 +
99878 +                compat_param = (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
99879 +                        sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
99880 +                if (!compat_param)
99881 +                {
99882 +                    XX_Free(param);
99883 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99884 +                }
99885 +
99886 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
99887 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) compat_ptr(arg),
99888 +                            sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)))
99889 +                {
99890 +                    XX_Free(compat_param);
99891 +                    XX_Free(param);
99892 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99893 +                }
99894 +
99895 +                compat_copy_fm_pcd_cc_node_modify_next_engine(compat_param, param, COMPAT_US_TO_K);
99896 +
99897 +                XX_Free(compat_param);
99898 +            }
99899 +            else
99900 +#endif
99901 +            {
99902 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_next_engine_params_t *)arg,
99903 +                            sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t)))
99904 +                {
99905 +                    XX_Free(param);
99906 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99907 +                }
99908 +            }
99909 +
99910 +            err = FM_PCD_MatchTableModifyNextEngine(param->id,
99911 +                    param->key_indx,
99912 +                    (t_FmPcdCcNextEngineParams*)(&param->cc_next_engine_params));
99913 +
99914 +            XX_Free(param);
99915 +            break;
99916 +        }
99917 +
99918 +#if defined(CONFIG_COMPAT)
99919 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE_COMPAT:
99920 +#endif
99921 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE:
99922 +        {
99923 +            ioc_fm_pcd_cc_node_modify_next_engine_params_t *param;
99924 +
99925 +            param = (ioc_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
99926 +                    sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
99927 +            if (!param)
99928 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99929 +
99930 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
99931 +
99932 +#if defined(CONFIG_COMPAT)
99933 +            if (compat)
99934 +            {
99935 +                ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param;
99936 +
99937 +                compat_param = (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
99938 +                        sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
99939 +                if (!compat_param)
99940 +                {
99941 +                    XX_Free(param);
99942 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99943 +                }
99944 +
99945 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
99946 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) compat_ptr(arg),
99947 +                                    sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)))
99948 +                {
99949 +                    XX_Free(compat_param);
99950 +                    XX_Free(param);
99951 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99952 +                }
99953 +
99954 +                compat_copy_fm_pcd_cc_node_modify_next_engine(compat_param, param, COMPAT_US_TO_K);
99955 +
99956 +                XX_Free(compat_param);
99957 +            }
99958 +            else
99959 +#endif
99960 +            {
99961 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_next_engine_params_t *) arg,
99962 +                                    sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t)))
99963 +                {
99964 +                    XX_Free(param);
99965 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
99966 +                }
99967 +            }
99968 +
99969 +            err = FM_PCD_MatchTableModifyMissNextEngine(param->id,
99970 +                    (t_FmPcdCcNextEngineParams*)(&param->cc_next_engine_params));
99971 +
99972 +            XX_Free(param);
99973 +            break;
99974 +        }
99975 +
99976 +#if defined(CONFIG_COMPAT)
99977 +        case FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY_COMPAT:
99978 +#endif
99979 +        case FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY:
99980 +        {
99981 +            ioc_fm_pcd_cc_node_remove_key_params_t *param;
99982 +
99983 +            param = (ioc_fm_pcd_cc_node_remove_key_params_t *) XX_Malloc(
99984 +                    sizeof(ioc_fm_pcd_cc_node_remove_key_params_t));
99985 +            if (!param)
99986 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
99987 +
99988 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_remove_key_params_t));
99989 +
99990 +#if defined(CONFIG_COMPAT)
99991 +            if (compat)
99992 +            {
99993 +                ioc_compat_fm_pcd_cc_node_remove_key_params_t *compat_param;
99994 +
99995 +                compat_param = (ioc_compat_fm_pcd_cc_node_remove_key_params_t *) XX_Malloc(
99996 +                        sizeof(ioc_compat_fm_pcd_cc_node_remove_key_params_t));
99997 +                if (!compat_param)
99998 +                {
99999 +                    XX_Free(param);
100000 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100001 +                }
100002 +
100003 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_remove_key_params_t));
100004 +                if (copy_from_user(compat_param,
100005 +                            (ioc_compat_fm_pcd_cc_node_remove_key_params_t *)compat_ptr(arg),
100006 +                            sizeof(ioc_compat_fm_pcd_cc_node_remove_key_params_t)))
100007 +                {
100008 +                    XX_Free(compat_param);
100009 +                    XX_Free(param);
100010 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100011 +                }
100012 +
100013 +                param->id = compat_ptr(compat_param->id);
100014 +                param->key_indx = compat_param->key_indx;
100015 +
100016 +                XX_Free(compat_param);
100017 +            }
100018 +            else
100019 +#endif
100020 +            {
100021 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_remove_key_params_t *) arg,
100022 +                            sizeof(ioc_fm_pcd_cc_node_remove_key_params_t)))
100023 +                {
100024 +                    XX_Free(param);
100025 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100026 +                }
100027 +            }
100028 +
100029 +            err = FM_PCD_MatchTableRemoveKey(param->id, param->key_indx);
100030 +
100031 +            XX_Free(param);
100032 +            break;
100033 +        }
100034 +#if defined(CONFIG_COMPAT)
100035 +        case FM_PCD_IOC_MATCH_TABLE_ADD_KEY_COMPAT:
100036 +#endif
100037 +        case FM_PCD_IOC_MATCH_TABLE_ADD_KEY:
100038 +        {
100039 +            ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param;
100040 +
100041 +            param = (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
100042 +                    sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100043 +            if (!param)
100044 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100045 +
100046 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100047 +
100048 +#if defined(CONFIG_COMPAT)
100049 +            if (compat)
100050 +            {
100051 +                ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param;
100052 +
100053 +                compat_param = (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
100054 +                        sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100055 +                if (!compat_param)
100056 +                {
100057 +                    XX_Free(param);
100058 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100059 +                }
100060 +
100061 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100062 +                if (copy_from_user(compat_param,
100063 +                            (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)compat_ptr(arg),
100064 +                            sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
100065 +                {
100066 +                    XX_Free(compat_param);
100067 +                    XX_Free(param);
100068 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100069 +                }
100070 +
100071 +                compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(compat_param, param, COMPAT_US_TO_K);
100072 +
100073 +                XX_Free(compat_param);
100074 +            }
100075 +            else
100076 +#endif
100077 +            {
100078 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)arg,
100079 +                                    sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
100080 +                {
100081 +                    XX_Free(param);
100082 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100083 +                }
100084 +            }
100085 +
100086 +            if (param->key_size)
100087 +            {
100088 +                int size = 0;
100089 +
100090 +                if (param->key_params.p_key)  size += param->key_size;
100091 +                if (param->key_params.p_mask) size += param->key_size;
100092 +
100093 +                if (size)
100094 +                {
100095 +                    uint8_t *p_tmp;
100096 +
100097 +                    p_tmp = (uint8_t*) XX_Malloc(size);
100098 +                    if (!p_tmp)
100099 +                    {
100100 +                        XX_Free(param);
100101 +                        RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD key/mask"));
100102 +                    }
100103 +
100104 +                    if (param->key_params.p_key)
100105 +                    {
100106 +                        if (copy_from_user(p_tmp, param->key_params.p_key, param->key_size))
100107 +                        {
100108 +                            XX_Free(p_tmp);
100109 +                            XX_Free(param);
100110 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100111 +                        }
100112 +
100113 +                        param->key_params.p_key = p_tmp;
100114 +                    }
100115 +
100116 +                    if (param->key_params.p_mask)
100117 +                    {
100118 +                        p_tmp += param->key_size;
100119 +                        if (copy_from_user(p_tmp, param->key_params.p_mask, param->key_size))
100120 +                        {
100121 +                            XX_Free(p_tmp - param->key_size);
100122 +                            XX_Free(param);
100123 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100124 +                        }
100125 +
100126 +                        param->key_params.p_mask = p_tmp;
100127 +                    }
100128 +                }
100129 +            }
100130 +
100131 +            err = FM_PCD_MatchTableAddKey(
100132 +                    param->id,
100133 +                    param->key_indx,
100134 +                    param->key_size,
100135 +                    (t_FmPcdCcKeyParams*)&param->key_params);
100136 +
100137 +            if (param->key_params.p_key)
100138 +                XX_Free(param->key_params.p_key);
100139 +            XX_Free(param);
100140 +            break;
100141 +        }
100142 +
100143 +#if defined(CONFIG_COMPAT)
100144 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT:
100145 +#endif
100146 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE:
100147 +        {
100148 +            ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param;
100149 +
100150 +            param = (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
100151 +                    sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100152 +            if (!param)
100153 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100154 +
100155 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100156 +
100157 +#if defined(CONFIG_COMPAT)
100158 +            if (compat)
100159 +            {
100160 +                ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param;
100161 +
100162 +                compat_param = (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
100163 +                        sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100164 +                if (!compat_param)
100165 +                {
100166 +                    XX_Free(param);
100167 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100168 +                }
100169 +
100170 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
100171 +                if (copy_from_user(compat_param,
100172 +                            (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)compat_ptr(arg),
100173 +                            sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
100174 +                {
100175 +                    XX_Free(compat_param);
100176 +                    XX_Free(param);
100177 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100178 +                }
100179 +
100180 +                compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(compat_param, param, COMPAT_US_TO_K);
100181 +
100182 +                XX_Free(compat_param);
100183 +            }
100184 +            else
100185 +#endif
100186 +            {
100187 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)arg,
100188 +                            sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
100189 +                {
100190 +                    XX_Free(param);
100191 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100192 +                }
100193 +            }
100194 +
100195 +            err = FM_PCD_MatchTableModifyKeyAndNextEngine(param->id,
100196 +                    param->key_indx,
100197 +                    param->key_size,
100198 +                    (t_FmPcdCcKeyParams*)(&param->key_params));
100199 +
100200 +            XX_Free(param);
100201 +            break;
100202 +        }
100203 +
100204 +
100205 +#if defined(CONFIG_COMPAT)
100206 +        case FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT_COMPAT:
100207 +#endif
100208 +        case FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT:
100209 +        {
100210 +            ioc_fm_pcd_cc_tbl_get_stats_t param;
100211 +
100212 +#if defined(CONFIG_COMPAT)
100213 +            if (compat)
100214 +            {
100215 +                ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
100216 +
100217 +                compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t *) XX_Malloc(
100218 +                        sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100219 +                if (!compat_param)
100220 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100221 +
100222 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100223 +                if (copy_from_user(compat_param,
100224 +                            (ioc_compat_fm_pcd_cc_tbl_get_stats_t *)compat_ptr(arg),
100225 +                            sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t)))
100226 +                {
100227 +                    XX_Free(compat_param);
100228 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100229 +                }
100230 +
100231 +                compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_US_TO_K);
100232 +
100233 +                XX_Free(compat_param);
100234 +            }
100235 +            else
100236 +#endif
100237 +            {
100238 +                if (copy_from_user(&param, (ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
100239 +                            sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
100240 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100241 +            }
100242 +
100243 +
100244 +            err = FM_PCD_MatchTableGetKeyStatistics((t_Handle) param.id,
100245 +                                                     param.key_index,
100246 +                                                     (t_FmPcdCcKeyStatistics *) &param.statistics);
100247 +
100248 +#if defined(CONFIG_COMPAT)
100249 +            if (compat)
100250 +            {
100251 +                ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
100252 +
100253 +                compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t*) XX_Malloc(
100254 +                        sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100255 +                if (!compat_param)
100256 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100257 +
100258 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100259 +                compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_K_TO_US);
100260 +                if (copy_to_user((ioc_compat_fm_pcd_cc_tbl_get_stats_t*) compat_ptr(arg),
100261 +                            compat_param,
100262 +                            sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t))){
100263 +                    XX_Free(compat_param);
100264 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
100265 +                }
100266 +                XX_Free(compat_param);
100267 +            }
100268 +            else
100269 +#endif
100270 +            {
100271 +                if (copy_to_user((ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
100272 +                                  &param,
100273 +                                  sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
100274 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
100275 +            }
100276 +
100277 +            break;
100278 +        }
100279 +
100280 +
100281 +#if defined(CONFIG_COMPAT)
100282 +        case FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT_COMPAT:
100283 +#endif
100284 +        case FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT:
100285 +        {
100286 +            ioc_fm_pcd_cc_tbl_get_stats_t param;
100287 +
100288 +#if defined(CONFIG_COMPAT)
100289 +            if (compat)
100290 +            {
100291 +                ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
100292 +
100293 +                compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t *) XX_Malloc(
100294 +                        sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100295 +                if (!compat_param)
100296 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100297 +
100298 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100299 +                if (copy_from_user(compat_param,
100300 +                            (ioc_compat_fm_pcd_cc_tbl_get_stats_t *)compat_ptr(arg),
100301 +                            sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t)))
100302 +                {
100303 +                    XX_Free(compat_param);
100304 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100305 +                }
100306 +
100307 +                compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_US_TO_K);
100308 +
100309 +                XX_Free(compat_param);
100310 +            }
100311 +            else
100312 +#endif
100313 +            {
100314 +                if (copy_from_user(&param, (ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
100315 +                            sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
100316 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100317 +            }
100318 +
100319 +
100320 +            err = FM_PCD_MatchTableGetMissStatistics((t_Handle) param.id,
100321 +                                                     (t_FmPcdCcKeyStatistics *) &param.statistics);
100322 +
100323 +#if defined(CONFIG_COMPAT)
100324 +            if (compat)
100325 +            {
100326 +                ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
100327 +
100328 +                compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t*) XX_Malloc(
100329 +                        sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100330 +                if (!compat_param)
100331 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100332 +
100333 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100334 +                compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_K_TO_US);
100335 +                if (copy_to_user((ioc_compat_fm_pcd_cc_tbl_get_stats_t*) compat_ptr(arg),
100336 +                            compat_param,
100337 +                            sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t))){
100338 +                    XX_Free(compat_param);
100339 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
100340 +                }
100341 +                XX_Free(compat_param);
100342 +            }
100343 +            else
100344 +#endif
100345 +            {
100346 +                if (copy_to_user((ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
100347 +                                  &param,
100348 +                                  sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
100349 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
100350 +            }
100351 +
100352 +            break;
100353 +        }
100354 +
100355 +
100356 +#if defined(CONFIG_COMPAT)
100357 +        case FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT_COMPAT:
100358 +#endif
100359 +        case FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT:
100360 +        {
100361 +            ioc_fm_pcd_cc_tbl_get_stats_t param;
100362 +
100363 +#if defined(CONFIG_COMPAT)
100364 +            if (compat)
100365 +            {
100366 +                ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
100367 +
100368 +                compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t *) XX_Malloc(
100369 +                        sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100370 +                if (!compat_param)
100371 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100372 +
100373 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100374 +                if (copy_from_user(compat_param,
100375 +                            (ioc_compat_fm_pcd_cc_tbl_get_stats_t *)compat_ptr(arg),
100376 +                            sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t)))
100377 +                {
100378 +                    XX_Free(compat_param);
100379 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100380 +                }
100381 +
100382 +                compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_US_TO_K);
100383 +
100384 +                XX_Free(compat_param);
100385 +            }
100386 +            else
100387 +#endif
100388 +            {
100389 +                if (copy_from_user(&param, (ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
100390 +                            sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
100391 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100392 +            }
100393 +
100394 +
100395 +            err = FM_PCD_HashTableGetMissStatistics((t_Handle) param.id,
100396 +                                                     (t_FmPcdCcKeyStatistics *) &param.statistics);
100397 +
100398 +#if defined(CONFIG_COMPAT)
100399 +            if (compat)
100400 +            {
100401 +                ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
100402 +
100403 +                compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t*) XX_Malloc(
100404 +                        sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100405 +                if (!compat_param)
100406 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100407 +
100408 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
100409 +                compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_K_TO_US);
100410 +                if (copy_to_user((ioc_compat_fm_pcd_cc_tbl_get_stats_t*) compat_ptr(arg),
100411 +                            compat_param,
100412 +                            sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t))){
100413 +                    XX_Free(compat_param);
100414 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
100415 +                }
100416 +                XX_Free(compat_param);
100417 +            }
100418 +            else
100419 +#endif
100420 +            {
100421 +                if (copy_to_user((ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
100422 +                                  &param,
100423 +                                  sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
100424 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
100425 +            }
100426 +
100427 +            break;
100428 +        }
100429 +
100430 +#if defined(CONFIG_COMPAT)
100431 +        case FM_PCD_IOC_HASH_TABLE_SET_COMPAT:
100432 +#endif
100433 +        case FM_PCD_IOC_HASH_TABLE_SET:
100434 +        {
100435 +            ioc_fm_pcd_hash_table_params_t *param;
100436 +
100437 +            param = (ioc_fm_pcd_hash_table_params_t*) XX_Malloc(
100438 +                    sizeof(ioc_fm_pcd_hash_table_params_t));
100439 +            if (!param)
100440 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100441 +
100442 +            memset(param, 0, sizeof(ioc_fm_pcd_hash_table_params_t));
100443 +
100444 +#if defined(CONFIG_COMPAT)
100445 +            if (compat)
100446 +            {
100447 +                ioc_compat_fm_pcd_hash_table_params_t *compat_param;
100448 +
100449 +                compat_param = (ioc_compat_fm_pcd_hash_table_params_t*) XX_Malloc(
100450 +                        sizeof(ioc_compat_fm_pcd_hash_table_params_t));
100451 +                if (!compat_param)
100452 +                {
100453 +                    XX_Free(param);
100454 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100455 +                }
100456 +
100457 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_params_t));
100458 +                if (copy_from_user(compat_param,
100459 +                            (ioc_compat_fm_pcd_hash_table_params_t*)compat_ptr(arg),
100460 +                            sizeof(ioc_compat_fm_pcd_hash_table_params_t)))
100461 +                {
100462 +                    XX_Free(compat_param);
100463 +                    XX_Free(param);
100464 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100465 +                }
100466 +
100467 +                compat_copy_fm_pcd_hash_table(compat_param, param, COMPAT_US_TO_K);
100468 +
100469 +                XX_Free(compat_param);
100470 +            }
100471 +            else
100472 +#endif
100473 +            {
100474 +                if (copy_from_user(param, (ioc_fm_pcd_hash_table_params_t *)arg,
100475 +                                    sizeof(ioc_fm_pcd_hash_table_params_t)))
100476 +                {
100477 +                    XX_Free(param);
100478 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100479 +                }
100480 +            }
100481 +
100482 +            param->id = FM_PCD_HashTableSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdHashTableParams *) param);
100483 +
100484 +            if (!param->id)
100485 +            {
100486 +                XX_Free(param);
100487 +                err = E_INVALID_VALUE;
100488 +                /* Since the LLD has no errno-style error reporting,
100489 +                   we're left here with no other option than to report
100490 +                   a generic E_INVALID_VALUE */
100491 +                break;
100492 +            }
100493 +
100494 +#if defined(CONFIG_COMPAT)
100495 +            if (compat)
100496 +            {
100497 +                ioc_compat_fm_pcd_hash_table_params_t *compat_param;
100498 +
100499 +                compat_param = (ioc_compat_fm_pcd_hash_table_params_t*) XX_Malloc(
100500 +                        sizeof(ioc_compat_fm_pcd_hash_table_params_t));
100501 +                if (!compat_param)
100502 +                {
100503 +                    XX_Free(param);
100504 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100505 +                }
100506 +
100507 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_params_t));
100508 +                compat_copy_fm_pcd_hash_table(compat_param, param, COMPAT_K_TO_US);
100509 +                if (copy_to_user((ioc_compat_fm_pcd_hash_table_params_t*) compat_ptr(arg),
100510 +                            compat_param,
100511 +                            sizeof(ioc_compat_fm_pcd_hash_table_params_t)))
100512 +                    err = E_READ_FAILED;
100513 +
100514 +                XX_Free(compat_param);
100515 +            }
100516 +            else
100517 +#endif
100518 +            {
100519 +                if (copy_to_user((ioc_fm_pcd_hash_table_params_t *)arg,
100520 +                            param,
100521 +                            sizeof(ioc_fm_pcd_hash_table_params_t)))
100522 +                    err = E_READ_FAILED;
100523 +            }
100524 +
100525 +            XX_Free(param);
100526 +            break;
100527 +        }
100528 +
100529 +#if defined(CONFIG_COMPAT)
100530 +        case FM_PCD_IOC_HASH_TABLE_DELETE_COMPAT:
100531 +#endif
100532 +        case FM_PCD_IOC_HASH_TABLE_DELETE:
100533 +        {
100534 +            ioc_fm_obj_t id;
100535 +
100536 +            memset(&id, 0, sizeof(ioc_fm_obj_t));
100537 +
100538 +#if defined(CONFIG_COMPAT)
100539 +            if (compat)
100540 +            {
100541 +                ioc_compat_fm_obj_t compat_id;
100542 +
100543 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
100544 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100545 +
100546 +                id.obj = compat_pcd_id2ptr(compat_id.obj);
100547 +            }
100548 +            else
100549 +#endif
100550 +            {
100551 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
100552 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100553 +            }
100554 +
100555 +            err = FM_PCD_HashTableDelete(id.obj);
100556 +            break;
100557 +        }
100558 +
100559 +#if defined(CONFIG_COMPAT)
100560 +        case FM_PCD_IOC_HASH_TABLE_ADD_KEY_COMPAT:
100561 +#endif
100562 +        case FM_PCD_IOC_HASH_TABLE_ADD_KEY:
100563 +        {
100564 +            ioc_fm_pcd_hash_table_add_key_params_t *param = NULL;
100565 +
100566 +            param = (ioc_fm_pcd_hash_table_add_key_params_t*) XX_Malloc(
100567 +                    sizeof(ioc_fm_pcd_hash_table_add_key_params_t));
100568 +            if (!param)
100569 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100570 +
100571 +            memset(param, 0, sizeof(ioc_fm_pcd_hash_table_add_key_params_t));
100572 +
100573 +#if defined(CONFIG_COMPAT)
100574 +            if (compat)
100575 +            {
100576 +                ioc_compat_fm_pcd_hash_table_add_key_params_t *compat_param;
100577 +
100578 +                compat_param = (ioc_compat_fm_pcd_hash_table_add_key_params_t*) XX_Malloc(
100579 +                        sizeof(ioc_compat_fm_pcd_hash_table_add_key_params_t));
100580 +                if (!compat_param)
100581 +                {
100582 +                    XX_Free(param);
100583 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100584 +                }
100585 +
100586 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_add_key_params_t));
100587 +                if (copy_from_user(compat_param,
100588 +                            (ioc_compat_fm_pcd_hash_table_add_key_params_t*) compat_ptr(arg),
100589 +                            sizeof(ioc_compat_fm_pcd_hash_table_add_key_params_t)))
100590 +                {
100591 +                    XX_Free(compat_param);
100592 +                    XX_Free(param);
100593 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100594 +                }
100595 +
100596 +                if (compat_param->key_size)
100597 +                {
100598 +                    param->p_hash_tbl = compat_pcd_id2ptr(compat_param->p_hash_tbl);
100599 +                    param->key_size   = compat_param->key_size;
100600 +
100601 +                    compat_copy_fm_pcd_cc_key(&compat_param->key_params, &param->key_params, COMPAT_US_TO_K);
100602 +                }
100603 +                else
100604 +                {
100605 +                    XX_Free(compat_param);
100606 +                    XX_Free(param);
100607 +                    err = E_INVALID_VALUE;
100608 +                    break;
100609 +                }
100610 +
100611 +                XX_Free(compat_param);
100612 +            }
100613 +            else
100614 +#endif
100615 +            {
100616 +                if (copy_from_user(param, (ioc_fm_pcd_hash_table_add_key_params_t*) arg,
100617 +                            sizeof(ioc_fm_pcd_hash_table_add_key_params_t)))
100618 +                {
100619 +                    XX_Free(param);
100620 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100621 +                }
100622 +            }
100623 +
100624 +            if (param->key_size)
100625 +            {
100626 +                int size = 0;
100627 +
100628 +                if (param->key_params.p_key)  size += param->key_size;
100629 +                if (param->key_params.p_mask) size += param->key_size;
100630 +
100631 +                if (size)
100632 +                {
100633 +                    uint8_t *p_tmp;
100634 +
100635 +                    p_tmp = (uint8_t*) XX_Malloc(size);
100636 +                    if (!p_tmp)
100637 +                    {
100638 +                        XX_Free(param);
100639 +                        RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD key/mask"));
100640 +                    }
100641 +
100642 +                    if (param->key_params.p_key)
100643 +                    {
100644 +                        if (copy_from_user(p_tmp, param->key_params.p_key, param->key_size))
100645 +                        {
100646 +                            XX_Free(p_tmp);
100647 +                            XX_Free(param);
100648 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100649 +                        }
100650 +
100651 +                        param->key_params.p_key = p_tmp;
100652 +                    }
100653 +
100654 +                    if (param->key_params.p_mask)
100655 +                    {
100656 +                        p_tmp += param->key_size;
100657 +                        if (copy_from_user(p_tmp, param->key_params.p_mask, param->key_size))
100658 +                        {
100659 +                            XX_Free(p_tmp - param->key_size);
100660 +                            XX_Free(param);
100661 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100662 +                        }
100663 +
100664 +                        param->key_params.p_mask = p_tmp;
100665 +                    }
100666 +                }
100667 +            }
100668 +
100669 +            err = FM_PCD_HashTableAddKey(
100670 +                    param->p_hash_tbl,
100671 +                    param->key_size,
100672 +                    (t_FmPcdCcKeyParams*)&param->key_params);
100673 +
100674 +            if (param->key_params.p_key)
100675 +                XX_Free(param->key_params.p_key);
100676 +            XX_Free(param);
100677 +            break;
100678 +        }
100679 +
100680 +#if defined(CONFIG_COMPAT)
100681 +        case FM_PCD_IOC_HASH_TABLE_REMOVE_KEY_COMPAT:
100682 +#endif
100683 +        case FM_PCD_IOC_HASH_TABLE_REMOVE_KEY:
100684 +        {
100685 +            ioc_fm_pcd_hash_table_remove_key_params_t *param = NULL;
100686 +
100687 +            param = (ioc_fm_pcd_hash_table_remove_key_params_t*) XX_Malloc(
100688 +                    sizeof(ioc_fm_pcd_hash_table_remove_key_params_t));
100689 +            if (!param)
100690 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100691 +
100692 +            memset(param, 0, sizeof(ioc_fm_pcd_hash_table_remove_key_params_t));
100693 +
100694 +#if defined(CONFIG_COMPAT)
100695 +            if (compat)
100696 +            {
100697 +                ioc_compat_fm_pcd_hash_table_remove_key_params_t *compat_param;
100698 +
100699 +                compat_param = (ioc_compat_fm_pcd_hash_table_remove_key_params_t*) XX_Malloc(
100700 +                        sizeof(ioc_compat_fm_pcd_hash_table_remove_key_params_t));
100701 +                if (!compat_param)
100702 +                {
100703 +                    XX_Free(param);
100704 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100705 +                }
100706 +
100707 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_remove_key_params_t));
100708 +                if (copy_from_user(compat_param,
100709 +                            (ioc_compat_fm_pcd_hash_table_remove_key_params_t*) compat_ptr(arg),
100710 +                            sizeof(ioc_compat_fm_pcd_hash_table_remove_key_params_t)))
100711 +                {
100712 +                    XX_Free(compat_param);
100713 +                    XX_Free(param);
100714 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100715 +                }
100716 +
100717 +                param->p_hash_tbl = compat_pcd_id2ptr(compat_param->p_hash_tbl);
100718 +                param->key_size   = compat_param->key_size;
100719 +
100720 +                XX_Free(compat_param);
100721 +            }
100722 +            else
100723 +#endif
100724 +            {
100725 +                if (copy_from_user(param, (ioc_fm_pcd_hash_table_remove_key_params_t*)arg,
100726 +                            sizeof(ioc_fm_pcd_hash_table_remove_key_params_t)))
100727 +                {
100728 +                    XX_Free(param);
100729 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100730 +                }
100731 +            }
100732 +
100733 +            if (param->key_size)
100734 +            {
100735 +                uint8_t *p_key;
100736 +
100737 +                p_key = (uint8_t*) XX_Malloc(param->key_size);
100738 +                if (!p_key)
100739 +                {
100740 +                    XX_Free(param);
100741 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100742 +                }
100743 +
100744 +                if (param->p_key && copy_from_user(p_key, param->p_key, param->key_size))
100745 +                {
100746 +                    XX_Free(p_key);
100747 +                    XX_Free(param);
100748 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100749 +                }
100750 +                param->p_key = p_key;
100751 +            }
100752 +
100753 +            err = FM_PCD_HashTableRemoveKey(
100754 +                    param->p_hash_tbl,
100755 +                    param->key_size,
100756 +                    param->p_key);
100757 +
100758 +            if (param->p_key)
100759 +                XX_Free(param->p_key);
100760 +            XX_Free(param);
100761 +            break;
100762 +        }
100763 +
100764 +#if defined(CONFIG_COMPAT)
100765 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_COMPAT:
100766 +#endif
100767 +        case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY:
100768 +        {
100769 +            ioc_fm_pcd_cc_node_modify_key_params_t  *param;
100770 +
100771 +            param = (ioc_fm_pcd_cc_node_modify_key_params_t *) XX_Malloc(
100772 +                    sizeof(ioc_fm_pcd_cc_node_modify_key_params_t));
100773 +            if (!param)
100774 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100775 +
100776 +            memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_key_params_t));
100777 +
100778 +#if defined(CONFIG_COMPAT)
100779 +            if (compat)
100780 +            {
100781 +                ioc_compat_fm_pcd_cc_node_modify_key_params_t  *compat_param;
100782 +
100783 +                compat_param = (ioc_compat_fm_pcd_cc_node_modify_key_params_t *) XX_Malloc(
100784 +                        sizeof(ioc_compat_fm_pcd_cc_node_modify_key_params_t));
100785 +                if (!compat_param)
100786 +                {
100787 +                    XX_Free(param);
100788 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100789 +                }
100790 +
100791 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_key_params_t));
100792 +                if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_node_modify_key_params_t *)compat_ptr(arg),
100793 +                                    sizeof(ioc_compat_fm_pcd_cc_node_modify_key_params_t)))
100794 +                {
100795 +                    XX_Free(compat_param);
100796 +                    XX_Free(param);
100797 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100798 +                }
100799 +
100800 +                compat_copy_fm_pcd_cc_node_modify_key(compat_param, param, COMPAT_US_TO_K);
100801 +
100802 +                XX_Free(compat_param);
100803 +            }
100804 +            else
100805 +#endif
100806 +            {
100807 +                if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_key_params_t *)arg,
100808 +                                    sizeof(ioc_fm_pcd_cc_node_modify_key_params_t)))
100809 +                {
100810 +                    XX_Free(param);
100811 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100812 +                }
100813 +            }
100814 +
100815 +            if (param->key_size)
100816 +            {
100817 +                int size = 0;
100818 +
100819 +                if (param->p_key)  size += param->key_size;
100820 +                if (param->p_mask) size += param->key_size;
100821 +
100822 +                if (size)
100823 +                {
100824 +                    uint8_t *p_tmp;
100825 +
100826 +                    p_tmp = (uint8_t*) XX_Malloc(size);
100827 +                    if (!p_tmp)
100828 +                    {
100829 +                        XX_Free(param);
100830 +                        RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD key/mask"));
100831 +                    }
100832 +
100833 +                    if (param->p_key)
100834 +                    {
100835 +                        if (copy_from_user(p_tmp, param->p_key, param->key_size))
100836 +                        {
100837 +                            XX_Free(p_tmp);
100838 +                            XX_Free(param);
100839 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100840 +                        }
100841 +
100842 +                        param->p_key = p_tmp;
100843 +                    }
100844 +
100845 +                    if (param->p_mask)
100846 +                    {
100847 +                        p_tmp += param->key_size;
100848 +                        if (copy_from_user(p_tmp, param->p_mask, param->key_size))
100849 +                        {
100850 +                            XX_Free(p_tmp - param->key_size);
100851 +                            XX_Free(param);
100852 +                            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100853 +                        }
100854 +
100855 +                        param->p_mask = p_tmp;
100856 +                    }
100857 +                }
100858 +            }
100859 +
100860 +            err = FM_PCD_MatchTableModifyKey(param->id,
100861 +                    param->key_indx,
100862 +                    param->key_size,
100863 +                    param->p_key,
100864 +                    param->p_mask);
100865 +
100866 +            if (param->p_key)
100867 +                XX_Free(param->p_key);
100868 +            else if (param->p_mask)
100869 +                XX_Free(param->p_mask);
100870 +            XX_Free(param);
100871 +            break;
100872 +        }
100873 +
100874 +#if defined(CONFIG_COMPAT)
100875 +        case FM_PCD_IOC_MANIP_NODE_SET_COMPAT:
100876 +#endif
100877 +        case FM_PCD_IOC_MANIP_NODE_SET:
100878 +        {
100879 +            ioc_fm_pcd_manip_params_t *param;
100880 +            uint8_t *p_data = NULL;
100881 +            uint8_t size;
100882 +
100883 +            param = (ioc_fm_pcd_manip_params_t *) XX_Malloc(
100884 +                        sizeof(ioc_fm_pcd_manip_params_t));
100885 +
100886 +            if (!param)
100887 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100888 +
100889 +            memset(param, 0, sizeof(ioc_fm_pcd_manip_params_t));
100890 +
100891 +#if defined(CONFIG_COMPAT)
100892 +            if (compat)
100893 +            {
100894 +                ioc_compat_fm_pcd_manip_params_t *compat_param;
100895 +
100896 +                compat_param = (ioc_compat_fm_pcd_manip_params_t *) XX_Malloc(
100897 +                        sizeof(ioc_compat_fm_pcd_manip_params_t));
100898 +                if (!compat_param)
100899 +                {
100900 +                    XX_Free(param);
100901 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100902 +                }
100903 +
100904 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_params_t));
100905 +                if (copy_from_user(compat_param,
100906 +                            (ioc_compat_fm_pcd_manip_params_t *) compat_ptr(arg),
100907 +                            sizeof(ioc_compat_fm_pcd_manip_params_t)))
100908 +                {
100909 +                    XX_Free(compat_param);
100910 +                    XX_Free(param);
100911 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100912 +                }
100913 +
100914 +                compat_fm_pcd_manip_set_node(compat_param, param, COMPAT_US_TO_K);
100915 +
100916 +                XX_Free(compat_param);
100917 +            }
100918 +            else
100919 +#endif
100920 +            {
100921 +                if (copy_from_user(param, (ioc_fm_pcd_manip_params_t *)arg,
100922 +                                            sizeof(ioc_fm_pcd_manip_params_t)))
100923 +                {
100924 +                    XX_Free(param);
100925 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100926 +                }
100927 +            }
100928 +
100929 +            if (param->type == e_IOC_FM_PCD_MANIP_HDR)
100930 +            {
100931 +                size = param->u.hdr.insrt_params.u.generic.size;
100932 +                p_data = (uint8_t *) XX_Malloc(size);
100933 +                if (!p_data )
100934 +                {
100935 +                    XX_Free(param);
100936 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, NO_MSG);
100937 +                }
100938 +
100939 +                if (param->u.hdr.insrt_params.u.generic.p_data &&
100940 +                        copy_from_user(p_data,
100941 +                            param->u.hdr.insrt_params.u.generic.p_data, size))
100942 +                {
100943 +                    XX_Free(p_data);
100944 +                    XX_Free(param);
100945 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
100946 +                }
100947 +
100948 +                param->u.hdr.insrt_params.u.generic.p_data = p_data;
100949 +            }
100950 +
100951 +            if (param->id)
100952 +            {
100953 +                /* Security Hole: the user can pass any piece of garbage
100954 +                   in 'param->id', and that will go straight through to the LLD,
100955 +                   no checks being done by the wrapper! */
100956 +                err = FM_PCD_ManipNodeReplace(
100957 +                        (t_Handle) param->id,
100958 +                        (t_FmPcdManipParams*) param);
100959 +                if (err)
100960 +                {
100961 +                    if (p_data)
100962 +                        XX_Free(p_data);
100963 +                    XX_Free(param);
100964 +                    break;
100965 +                }
100966 +            }
100967 +            else
100968 +            {
100969 +                param->id = FM_PCD_ManipNodeSet(
100970 +                        p_LnxWrpFmDev->h_PcdDev,
100971 +                        (t_FmPcdManipParams*) param);
100972 +                if (!param->id)
100973 +                {
100974 +                    if (p_data)
100975 +                        XX_Free(p_data);
100976 +                    XX_Free(param);
100977 +                    err = E_INVALID_VALUE;
100978 +                    /* Since the LLD has no errno-style error reporting,
100979 +                       we're left here with no other option than to report
100980 +                       a generic E_INVALID_VALUE */
100981 +                    break;
100982 +                }
100983 +            }
100984 +
100985 +#if defined(CONFIG_COMPAT)
100986 +            if (compat)
100987 +            {
100988 +                ioc_compat_fm_pcd_manip_params_t *compat_param;
100989 +
100990 +                compat_param = (ioc_compat_fm_pcd_manip_params_t *) XX_Malloc(
100991 +                        sizeof(ioc_compat_fm_pcd_manip_params_t));
100992 +                if (!compat_param)
100993 +                {
100994 +                    if (p_data)
100995 +                        XX_Free(p_data);
100996 +                    XX_Free(param);
100997 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
100998 +                }
100999 +
101000 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_params_t));
101001 +
101002 +                compat_fm_pcd_manip_set_node(compat_param, param, COMPAT_K_TO_US);
101003 +
101004 +                if (copy_to_user((ioc_compat_fm_pcd_manip_params_t *) compat_ptr(arg),
101005 +                            compat_param,
101006 +                            sizeof(ioc_compat_fm_pcd_manip_params_t)))
101007 +                    err = E_READ_FAILED;
101008 +
101009 +                XX_Free(compat_param);
101010 +            }
101011 +            else
101012 +#endif
101013 +            {
101014 +                if (copy_to_user((ioc_fm_pcd_manip_params_t *)arg,
101015 +                            param, sizeof(ioc_fm_pcd_manip_params_t)))
101016 +                    err = E_READ_FAILED;
101017 +            }
101018 +
101019 +            if (p_data)
101020 +                XX_Free(p_data);
101021 +            XX_Free(param);
101022 +            break;
101023 +        }
101024 +
101025 +#if defined(CONFIG_COMPAT)
101026 +        case FM_PCD_IOC_MANIP_NODE_DELETE_COMPAT:
101027 +#endif
101028 +        case FM_PCD_IOC_MANIP_NODE_DELETE:
101029 +        {
101030 +            ioc_fm_obj_t id;
101031 +
101032 +            memset(&id, 0, sizeof(ioc_fm_obj_t));
101033 +#if defined(CONFIG_COMPAT)
101034 +            if (compat)
101035 +            {
101036 +                ioc_compat_fm_obj_t compat_id;
101037 +
101038 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
101039 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101040 +
101041 +                compat_obj_delete(&compat_id, &id);
101042 +            }
101043 +            else
101044 +#endif
101045 +            {
101046 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
101047 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101048 +            }
101049 +
101050 +            err = FM_PCD_ManipNodeDelete(id.obj);
101051 +            break;
101052 +        }
101053 +
101054 +#if defined(CONFIG_COMPAT)
101055 +       case FM_PCD_IOC_MANIP_GET_STATS_COMPAT:
101056 +#endif
101057 +        case FM_PCD_IOC_MANIP_GET_STATS:
101058 +       {
101059 +            ioc_fm_pcd_manip_get_stats_t param;
101060 +
101061 +#if defined(CONFIG_COMPAT)
101062 +            if (compat)
101063 +            {
101064 +                ioc_compat_fm_pcd_manip_get_stats_t *compat_param;
101065 +
101066 +                compat_param = (ioc_compat_fm_pcd_manip_get_stats_t *) XX_Malloc(
101067 +                        sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
101068 +                if (!compat_param)
101069 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101070 +
101071 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
101072 +                if (copy_from_user(compat_param,
101073 +                            (ioc_compat_fm_pcd_manip_get_stats_t *)compat_ptr(arg),
101074 +                            sizeof(ioc_compat_fm_pcd_manip_get_stats_t)))
101075 +                {
101076 +                    XX_Free(compat_param);
101077 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101078 +                }
101079 +
101080 +                compat_copy_fm_pcd_manip_get_stats(compat_param, &param, COMPAT_US_TO_K);
101081 +
101082 +                XX_Free(compat_param);
101083 +            }
101084 +            else
101085 +#endif
101086 +            {
101087 +                if (copy_from_user(&param, (ioc_fm_pcd_manip_get_stats_t *)arg,
101088 +                            sizeof(ioc_fm_pcd_manip_get_stats_t)))
101089 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101090 +            }
101091 +
101092 +            err = FM_PCD_ManipGetStatistics((t_Handle) param.id,
101093 +                                               (t_FmPcdManipStats*) &param.stats);
101094 +
101095 +#if defined(CONFIG_COMPAT)
101096 +            if (compat)
101097 +            {
101098 +                ioc_compat_fm_pcd_manip_get_stats_t *compat_param;
101099 +
101100 +                compat_param = (ioc_compat_fm_pcd_manip_get_stats_t*) XX_Malloc(
101101 +                        sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
101102 +                if (!compat_param)
101103 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101104 +
101105 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
101106 +                compat_copy_fm_pcd_manip_get_stats(compat_param, &param, COMPAT_K_TO_US);
101107 +                if (copy_to_user((ioc_compat_fm_pcd_manip_get_stats_t*) compat_ptr(arg),
101108 +                            compat_param,
101109 +                            sizeof(ioc_compat_fm_pcd_manip_get_stats_t))){
101110 +                    XX_Free(compat_param);
101111 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
101112 +                }
101113 +                XX_Free(compat_param);
101114 +            }
101115 +            else
101116 +#endif
101117 +            if (copy_to_user((ioc_fm_pcd_manip_get_stats_t *)arg,
101118 +                                  &param,
101119 +                                  sizeof(ioc_fm_pcd_manip_get_stats_t)))
101120 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
101121 +
101122 +            break;
101123 +       }
101124 +
101125 +#if (DPAA_VERSION >= 11)
101126 +#if defined(CONFIG_COMPAT)
101127 +       case FM_PCD_IOC_FRM_REPLIC_GROUP_SET_COMPAT:
101128 +#endif
101129 +       case FM_PCD_IOC_FRM_REPLIC_GROUP_SET:
101130 +       {
101131 +               ioc_fm_pcd_frm_replic_group_params_t *param;
101132 +
101133 +               param = (ioc_fm_pcd_frm_replic_group_params_t *) XX_Malloc(
101134 +                               sizeof(ioc_fm_pcd_frm_replic_group_params_t));
101135 +               if (!param)
101136 +                       RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101137 +
101138 +               memset(param, 0, sizeof(ioc_fm_pcd_frm_replic_group_params_t));
101139 +
101140 +#if defined(CONFIG_COMPAT)
101141 +               if (compat)
101142 +               {
101143 +                       ioc_compat_fm_pcd_frm_replic_group_params_t
101144 +                               *compat_param;
101145 +
101146 +                       compat_param =
101147 +                               (ioc_compat_fm_pcd_frm_replic_group_params_t *)
101148 +                                       XX_Malloc(sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
101149 +                       if (!compat_param)
101150 +                       {
101151 +                               XX_Free(param);
101152 +                               RETURN_ERROR(MINOR, E_NO_MEMORY,
101153 +                                               ("IOCTL FM PCD"));
101154 +                       }
101155 +
101156 +                       memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
101157 +                       if (copy_from_user(compat_param,
101158 +                               (ioc_compat_fm_pcd_frm_replic_group_params_t *)
101159 +                                       compat_ptr(arg),
101160 +                                       sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t))) {
101161 +                               XX_Free(compat_param);
101162 +                               XX_Free(param);
101163 +                               RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
101164 +                       }
101165 +
101166 +                       compat_copy_fm_pcd_frm_replic_group_params(compat_param,
101167 +                                       param, COMPAT_US_TO_K);
101168 +
101169 +                       XX_Free(compat_param);
101170 +               }
101171 +               else
101172 +#endif
101173 +               {
101174 +                       if (copy_from_user(param,
101175 +                               (ioc_fm_pcd_frm_replic_group_params_t *)arg,
101176 +                               sizeof(ioc_fm_pcd_frm_replic_group_params_t)))
101177 +                       {
101178 +                               XX_Free(param);
101179 +                               RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
101180 +                       }
101181 +               }
101182 +
101183 +               param->id = FM_PCD_FrmReplicSetGroup(p_LnxWrpFmDev->h_PcdDev,
101184 +                               (t_FmPcdFrmReplicGroupParams*)param);
101185 +
101186 +               if (!param->id) {
101187 +                       XX_Free(param);
101188 +                       err = E_INVALID_VALUE;
101189 +                       /*
101190 +                        * Since the LLD has no errno-style error reporting,
101191 +                        * we're left here with no other option than to report
101192 +                        * a generic E_INVALID_VALUE
101193 +                        */
101194 +                       break;
101195 +               }
101196 +
101197 +#if defined(CONFIG_COMPAT)
101198 +               if (compat)
101199 +               {
101200 +                       ioc_compat_fm_pcd_frm_replic_group_params_t
101201 +                               *compat_param;
101202 +
101203 +                       compat_param =
101204 +                               (ioc_compat_fm_pcd_frm_replic_group_params_t *)
101205 +                                       XX_Malloc(sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
101206 +                       if (!compat_param)
101207 +                       {
101208 +                               XX_Free(param);
101209 +                               RETURN_ERROR(MINOR, E_NO_MEMORY,
101210 +                                               ("IOCTL FM PCD"));
101211 +                       }
101212 +
101213 +                       memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
101214 +                       compat_copy_fm_pcd_frm_replic_group_params(compat_param,
101215 +                                       param, COMPAT_K_TO_US);
101216 +                       if (copy_to_user(
101217 +                               (ioc_compat_fm_pcd_frm_replic_group_params_t *)
101218 +                                       compat_ptr(arg),
101219 +                                       compat_param,
101220 +                                       sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t)))
101221 +                               err = E_WRITE_FAILED;
101222 +
101223 +                       XX_Free(compat_param);
101224 +               }
101225 +               else
101226 +#endif
101227 +               {
101228 +                       if (copy_to_user(
101229 +                               (ioc_fm_pcd_frm_replic_group_params_t *)arg,
101230 +                               param,
101231 +                               sizeof(ioc_fm_pcd_frm_replic_group_params_t)))
101232 +                               err = E_WRITE_FAILED;
101233 +               }
101234 +
101235 +               XX_Free(param);
101236 +               break;
101237 +       }
101238 +       break;
101239 +
101240 +#if defined(CONFIG_COMPAT)
101241 +       case FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE_COMPAT:
101242 +#endif
101243 +       case FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE:
101244 +       {
101245 +               ioc_fm_obj_t id;
101246 +
101247 +               memset(&id, 0, sizeof(ioc_fm_obj_t));
101248 +#if defined(CONFIG_COMPAT)
101249 +               if (compat)
101250 +               {
101251 +                       ioc_compat_fm_obj_t compat_id;
101252 +
101253 +                       if (copy_from_user(&compat_id,
101254 +                                       (ioc_compat_fm_obj_t *) compat_ptr(arg),
101255 +                                       sizeof(ioc_compat_fm_obj_t)))
101256 +                               break;
101257 +                       compat_obj_delete(&compat_id, &id);
101258 +               }
101259 +               else
101260 +#endif
101261 +               {
101262 +                       if (copy_from_user(&id, (ioc_fm_obj_t *) arg,
101263 +                                       sizeof(ioc_fm_obj_t)))
101264 +                               break;
101265 +               }
101266 +
101267 +               return FM_PCD_FrmReplicDeleteGroup(id.obj);
101268 +       }
101269 +       break;
101270 +
101271 +#if defined(CONFIG_COMPAT)
101272 +       case FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD_COMPAT:
101273 +#endif
101274 +       case FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD:
101275 +       {
101276 +               ioc_fm_pcd_frm_replic_member_params_t param;
101277 +
101278 +#if defined(CONFIG_COMPAT)
101279 +               if (compat)
101280 +               {
101281 +                       ioc_compat_fm_pcd_frm_replic_member_params_t compat_param;
101282 +
101283 +                       if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101284 +                               RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101285 +
101286 +                       compat_copy_fm_pcd_frm_replic_member_params(&compat_param, &param, COMPAT_US_TO_K);
101287 +               }
101288 +               else
101289 +#endif
101290 +                       if (copy_from_user(&param, (void *)arg, sizeof(param)))
101291 +                               RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101292 +
101293 +               return FM_PCD_FrmReplicAddMember(param.member.h_replic_group,
101294 +                       param.member.member_index,
101295 +                       (t_FmPcdCcNextEngineParams*)&param.next_engine_params);
101296 +       }
101297 +       break;
101298 +
101299 +#if defined(CONFIG_COMPAT)
101300 +       case FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE_COMPAT:
101301 +#endif
101302 +       case FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE:
101303 +       {
101304 +               ioc_fm_pcd_frm_replic_member_t param;
101305 +
101306 +#if defined(CONFIG_COMPAT)
101307 +               if (compat)
101308 +               {
101309 +                       ioc_compat_fm_pcd_frm_replic_member_t compat_param;
101310 +
101311 +                       if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101312 +                               RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101313 +
101314 +                       compat_copy_fm_pcd_frm_replic_member(&compat_param, &param, COMPAT_US_TO_K);
101315 +               }
101316 +               else
101317 +#endif
101318 +                       if (copy_from_user(&param, (void *)arg, sizeof(param)))
101319 +                               RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101320 +
101321 +               return FM_PCD_FrmReplicRemoveMember(param.h_replic_group, param.member_index);
101322 +       }
101323 +       break;
101324 +
101325 +#if defined(CONFIG_COMPAT)
101326 +    case FM_IOC_VSP_CONFIG_COMPAT:
101327 +#endif
101328 +    case FM_IOC_VSP_CONFIG:
101329 +    {
101330 +        ioc_fm_vsp_params_t param;
101331 +
101332 +#if defined(CONFIG_COMPAT)
101333 +        if (compat)
101334 +        {
101335 +            ioc_compat_fm_vsp_params_t compat_param;
101336 +
101337 +            if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101338 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101339 +
101340 +            compat_copy_fm_vsp_params(&compat_param, &param, COMPAT_US_TO_K);
101341 +        }
101342 +        else
101343 +#endif
101344 +            if (copy_from_user(&param, (void *)arg, sizeof(param)))
101345 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101346 +        {
101347 +            uint8_t portId = param.port_params.port_id;
101348 +            param.liodn_offset =
101349 +                p_LnxWrpFmDev->rxPorts[portId].settings.param.specificParams.rxParams.liodnOffset;
101350 +        }
101351 +        param.p_fm = p_LnxWrpFmDev->h_Dev;
101352 +        param.id = FM_VSP_Config((t_FmVspParams *)&param);
101353 +
101354 +#if defined(CONFIG_COMPAT)
101355 +        if (compat)
101356 +        {
101357 +            ioc_compat_fm_vsp_params_t compat_param;
101358 +
101359 +            memset(&compat_param, 0, sizeof(compat_param));
101360 +            compat_copy_fm_vsp_params(&compat_param, &param, COMPAT_K_TO_US);
101361 +
101362 +            if (copy_to_user(compat_ptr(arg), &compat_param, sizeof(compat_param)))
101363 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101364 +        }
101365 +        else
101366 +#endif
101367 +            if (copy_to_user((void *)arg, &param, sizeof(param)))
101368 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101369 +        break;
101370 +    }
101371 +
101372 +#if defined(CONFIG_COMPAT)
101373 +    case FM_IOC_VSP_INIT_COMPAT:
101374 +#endif
101375 +    case FM_IOC_VSP_INIT:
101376 +    {
101377 +        ioc_fm_obj_t id;
101378 +
101379 +        memset(&id, 0, sizeof(ioc_fm_obj_t));
101380 +#if defined(CONFIG_COMPAT)
101381 +        if (compat)
101382 +        {
101383 +            ioc_compat_fm_obj_t compat_id;
101384 +
101385 +            if (copy_from_user(&compat_id,
101386 +                    (ioc_compat_fm_obj_t *) compat_ptr(arg),
101387 +                    sizeof(ioc_compat_fm_obj_t)))
101388 +                break;
101389 +            id.obj = compat_pcd_id2ptr(compat_id.obj);
101390 +        }
101391 +        else
101392 +#endif
101393 +        {
101394 +            if (copy_from_user(&id, (ioc_fm_obj_t *) arg,
101395 +                    sizeof(ioc_fm_obj_t)))
101396 +                break;
101397 +        }
101398 +
101399 +        return FM_VSP_Init(id.obj);
101400 +    }
101401 +
101402 +#if defined(CONFIG_COMPAT)
101403 +    case FM_IOC_VSP_FREE_COMPAT:
101404 +#endif
101405 +    case FM_IOC_VSP_FREE:
101406 +    {
101407 +        ioc_fm_obj_t id;
101408 +
101409 +        memset(&id, 0, sizeof(ioc_fm_obj_t));
101410 +#if defined(CONFIG_COMPAT)
101411 +        if (compat)
101412 +        {
101413 +            ioc_compat_fm_obj_t compat_id;
101414 +
101415 +            if (copy_from_user(&compat_id,
101416 +                    (ioc_compat_fm_obj_t *) compat_ptr(arg),
101417 +                    sizeof(ioc_compat_fm_obj_t)))
101418 +                break;
101419 +            compat_obj_delete(&compat_id, &id);
101420 +        }
101421 +        else
101422 +#endif
101423 +        {
101424 +            if (copy_from_user(&id, (ioc_fm_obj_t *) arg,
101425 +                    sizeof(ioc_fm_obj_t)))
101426 +                break;
101427 +        }
101428 +
101429 +        return FM_VSP_Free(id.obj);
101430 +    }
101431 +
101432 +#if defined(CONFIG_COMPAT)
101433 +    case FM_IOC_VSP_CONFIG_POOL_DEPLETION_COMPAT:
101434 +#endif
101435 +    case FM_IOC_VSP_CONFIG_POOL_DEPLETION:
101436 +    {
101437 +        ioc_fm_buf_pool_depletion_params_t param;
101438 +
101439 +#if defined(CONFIG_COMPAT)
101440 +        if (compat)
101441 +        {
101442 +            ioc_compat_fm_buf_pool_depletion_params_t compat_param;
101443 +
101444 +            if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101445 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101446 +
101447 +            compat_copy_fm_buf_pool_depletion_params(&compat_param, &param, COMPAT_US_TO_K);
101448 +        }
101449 +        else
101450 +#endif
101451 +            if (copy_from_user(&param, (void *)arg, sizeof(param)))
101452 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101453 +
101454 +        if (FM_VSP_ConfigPoolDepletion(param.p_fm_vsp,
101455 +                    (t_FmBufPoolDepletion *)&param.fm_buf_pool_depletion))
101456 +            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101457 +
101458 +        break;
101459 +    }
101460 +
101461 +
101462 +#if defined(CONFIG_COMPAT)
101463 +    case FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT_COMPAT:
101464 +#endif
101465 +    case FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT:
101466 +    {
101467 +        ioc_fm_buffer_prefix_content_params_t param;
101468 +
101469 +#if defined(CONFIG_COMPAT)
101470 +        if (compat)
101471 +        {
101472 +            ioc_compat_fm_buffer_prefix_content_params_t compat_param;
101473 +
101474 +            if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101475 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101476 +
101477 +            compat_copy_fm_buffer_prefix_content_params(&compat_param, &param, COMPAT_US_TO_K);
101478 +        }
101479 +        else
101480 +#endif
101481 +            if (copy_from_user(&param, (void *)arg, sizeof(param)))
101482 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101483 +
101484 +        if (FM_VSP_ConfigBufferPrefixContent(param.p_fm_vsp,
101485 +                (t_FmBufferPrefixContent *)&param.fm_buffer_prefix_content))
101486 +            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101487 +
101488 +        break;
101489 +    }
101490 +
101491 +#if defined(CONFIG_COMPAT)
101492 +    case FM_IOC_VSP_CONFIG_NO_SG_COMPAT:
101493 +#endif
101494 +    case FM_IOC_VSP_CONFIG_NO_SG:
101495 +    {
101496 +        ioc_fm_vsp_config_no_sg_params_t param;
101497 +
101498 +#if defined(CONFIG_COMPAT)
101499 +        if (compat)
101500 +        {
101501 +            ioc_compat_fm_vsp_config_no_sg_params_t compat_param;
101502 +
101503 +            if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101504 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101505 +
101506 +            compat_copy_fm_vsp_config_no_sg_params(&compat_param, &param, COMPAT_US_TO_K);
101507 +        }
101508 +        else
101509 +#endif
101510 +            if (copy_from_user(&param, (void *)arg, sizeof(param)))
101511 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101512 +
101513 +        if (FM_VSP_ConfigNoScatherGather(param.p_fm_vsp, param.no_sg))
101514 +            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101515 +
101516 +        break;
101517 +    }
101518 +
101519 +#if defined(CONFIG_COMPAT)
101520 +    case FM_IOC_VSP_GET_BUFFER_PRS_RESULT_COMPAT:
101521 +#endif
101522 +    case FM_IOC_VSP_GET_BUFFER_PRS_RESULT:
101523 +    {
101524 +        ioc_fm_vsp_prs_result_params_t param;
101525 +
101526 +#if defined(CONFIG_COMPAT)
101527 +        if (compat)
101528 +        {
101529 +            ioc_compat_fm_vsp_prs_result_params_t compat_param;
101530 +
101531 +            if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
101532 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101533 +
101534 +            compat_copy_fm_vsp_prs_result_params(&compat_param, &param, COMPAT_US_TO_K);
101535 +        }
101536 +        else
101537 +#endif
101538 +            if (copy_from_user(&param, (void *)arg, sizeof(param)))
101539 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101540 +
101541 +        /* this call just adds the parse results offset to p_data */
101542 +        param.p_data = FM_VSP_GetBufferPrsResult(param.p_fm_vsp, param.p_data);
101543 +
101544 +        if (!param.p_data)
101545 +            RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101546 +
101547 +#if defined(CONFIG_COMPAT)
101548 +        if (compat)
101549 +        {
101550 +            ioc_compat_fm_vsp_prs_result_params_t compat_param;
101551 +
101552 +            memset(&compat_param, 0, sizeof(compat_param));
101553 +            compat_copy_fm_vsp_prs_result_params(&compat_param, &param, COMPAT_K_TO_US);
101554 +
101555 +            if (copy_to_user(compat_ptr(arg), &compat_param, sizeof(compat_param)))
101556 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101557 +        }
101558 +        else
101559 +#endif
101560 +            if (copy_to_user((void *)arg, &param, sizeof(param)))
101561 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101562 +
101563 +        break;
101564 +    }
101565 +#endif /* (DPAA_VERSION >= 11) */
101566 +
101567 +#ifdef FM_CAPWAP_SUPPORT
101568 +#warning "feature not supported!"
101569 +#if defined(CONFIG_COMPAT)
101570 +        case FM_PCD_IOC_STATISTICS_SET_NODE_COMPAT:
101571 +#endif
101572 +        case FM_PCD_IOC_STATISTICS_SET_NODE:
101573 +        {
101574 +/*          ioc_fm_pcd_stats_params_t param;
101575 +            ...
101576 +            param->id = FM_PCD_StatisticsSetNode(p_LnxWrpFmDev->h_PcdDev,
101577 +                                (t_FmPcdStatsParams *)&param);
101578 +*/
101579 +            err = E_NOT_SUPPORTED;
101580 +            break;
101581 +        }
101582 +#endif /* FM_CAPWAP_SUPPORT */
101583 +
101584 +        default:
101585 +            RETURN_ERROR(MINOR, E_INVALID_SELECTION,
101586 +                ("invalid ioctl: cmd:0x%08x(type:0x%02x, nr: %d.\n",
101587 +                cmd, _IOC_TYPE(cmd), _IOC_NR(cmd)));
101588 +    }
101589 +
101590 +    if (err)
101591 +        RETURN_ERROR(MINOR, err, ("IOCTL FM PCD"));
101592 +
101593 +    return E_OK;
101594 +}
101595 +
101596 +void FM_Get_Api_Version(ioc_fm_api_version_t *p_version)
101597 +{
101598 +       p_version->version.major = FMD_API_VERSION_MAJOR;
101599 +       p_version->version.minor = FMD_API_VERSION_MINOR;
101600 +       p_version->version.respin = FMD_API_VERSION_RESPIN;
101601 +       p_version->version.reserved = 0;
101602 +}
101603 +
101604 +t_Error LnxwrpFmIOCTL(t_LnxWrpFmDev *p_LnxWrpFmDev, unsigned int cmd, unsigned long arg, bool compat)
101605 +{
101606 +    t_Error err = E_OK;
101607 +
101608 +    switch (cmd)
101609 +    {
101610 +        case FM_IOC_SET_PORTS_BANDWIDTH:
101611 +        {
101612 +            ioc_fm_port_bandwidth_params *param;
101613 +
101614 +            param = (ioc_fm_port_bandwidth_params*) XX_Malloc(sizeof(ioc_fm_port_bandwidth_params));
101615 +            if (!param)
101616 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101617 +
101618 +            memset(param, 0, sizeof(ioc_fm_port_bandwidth_params));
101619 +
101620 +#if defined(CONFIG_COMPAT)
101621 +            if (compat)
101622 +            {
101623 +                if (copy_from_user(param, (ioc_fm_port_bandwidth_params*)compat_ptr(arg), sizeof(ioc_fm_port_bandwidth_params)))
101624 +                {
101625 +                    XX_Free(param);
101626 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101627 +                }
101628 +            }
101629 +            else
101630 +#endif
101631 +            {
101632 +                if (copy_from_user(param, (ioc_fm_port_bandwidth_params*)arg, sizeof(ioc_fm_port_bandwidth_params)))
101633 +                {
101634 +                    XX_Free(param);
101635 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101636 +                }
101637 +            }
101638 +
101639 +            err =  FM_SetPortsBandwidth(p_LnxWrpFmDev->h_Dev, (t_FmPortsBandwidthParams*) param);
101640 +
101641 +            XX_Free(param);
101642 +            break;
101643 +        }
101644 +
101645 +        case FM_IOC_GET_REVISION:
101646 +        {
101647 +            ioc_fm_revision_info_t *param;
101648 +
101649 +            param = (ioc_fm_revision_info_t *) XX_Malloc(sizeof(ioc_fm_revision_info_t));
101650 +            if (!param)
101651 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101652 +
101653 +            FM_GetRevision(p_LnxWrpFmDev->h_Dev, (t_FmRevisionInfo*)param);
101654 +            /* This one never returns anything other than E_OK */
101655 +
101656 +#if defined(CONFIG_COMPAT)
101657 +            if (compat)
101658 +            {
101659 +                if (copy_to_user((ioc_fm_revision_info_t *)compat_ptr(arg),
101660 +                            param,
101661 +                            sizeof(ioc_fm_revision_info_t))){
101662 +                    XX_Free(param);
101663 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
101664 +                 }
101665 +            }
101666 +            else
101667 +#endif
101668 +            {
101669 +                if (copy_to_user((ioc_fm_revision_info_t *)arg,
101670 +                            param,
101671 +                            sizeof(ioc_fm_revision_info_t))){
101672 +                    XX_Free(param);
101673 +                    RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
101674 +                }
101675 +            }
101676 +            XX_Free(param);
101677 +            break;
101678 +        }
101679 +
101680 +        case FM_IOC_SET_COUNTER:
101681 +        {
101682 +            ioc_fm_counters_params_t *param;
101683 +
101684 +            param = (ioc_fm_counters_params_t *) XX_Malloc(sizeof(ioc_fm_counters_params_t));
101685 +            if (!param)
101686 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101687 +
101688 +            memset(param, 0, sizeof(ioc_fm_counters_params_t));
101689 +
101690 +#if defined(CONFIG_COMPAT)
101691 +            if (compat)
101692 +            {
101693 +                if (copy_from_user(param, (ioc_fm_counters_params_t *)compat_ptr(arg), sizeof(ioc_fm_counters_params_t)))
101694 +                {
101695 +                    XX_Free(param);
101696 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101697 +                }
101698 +            }
101699 +            else
101700 +#endif
101701 +            {
101702 +                if (copy_from_user(param, (ioc_fm_counters_params_t *)arg, sizeof(ioc_fm_counters_params_t)))
101703 +                {
101704 +                    XX_Free(param);
101705 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101706 +                }
101707 +            }
101708 +
101709 +            err = FM_ModifyCounter(p_LnxWrpFmDev->h_Dev, param->cnt, param->val);
101710 +
101711 +            XX_Free(param);
101712 +            break;
101713 +        }
101714 +
101715 +        case FM_IOC_GET_COUNTER:
101716 +        {
101717 +            ioc_fm_counters_params_t *param;
101718 +
101719 +            param = (ioc_fm_counters_params_t *) XX_Malloc(sizeof(ioc_fm_counters_params_t));
101720 +            if (!param)
101721 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
101722 +
101723 +            memset(param, 0, sizeof(ioc_fm_counters_params_t));
101724 +
101725 +#if defined(CONFIG_COMPAT)
101726 +            if (compat)
101727 +            {
101728 +                if (copy_from_user(param, (ioc_fm_counters_params_t *)compat_ptr(arg), sizeof(ioc_fm_counters_params_t)))
101729 +                {
101730 +                    XX_Free(param);
101731 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101732 +                }
101733 +            }
101734 +            else
101735 +#endif
101736 +            {
101737 +                if (copy_from_user(param, (ioc_fm_counters_params_t *)arg, sizeof(ioc_fm_counters_params_t)))
101738 +                {
101739 +                    XX_Free(param);
101740 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101741 +                }
101742 +            }
101743 +
101744 +            param->val = FM_GetCounter(p_LnxWrpFmDev->h_Dev, param->cnt);
101745 +
101746 +#if defined(CONFIG_COMPAT)
101747 +            if (compat)
101748 +            {
101749 +                if (copy_to_user((ioc_fm_counters_params_t *)compat_ptr(arg), param, sizeof(ioc_fm_counters_params_t)))
101750 +                    err = E_READ_FAILED;
101751 +            }
101752 +            else
101753 +#endif
101754 +            {
101755 +                if (copy_to_user((ioc_fm_counters_params_t *)arg, param, sizeof(ioc_fm_counters_params_t)))
101756 +                    err = E_READ_FAILED;
101757 +            }
101758 +
101759 +            XX_Free(param);
101760 +            break;
101761 +        }
101762 +
101763 +        case FM_IOC_FORCE_INTR:
101764 +        {
101765 +            ioc_fm_exceptions param;
101766 +
101767 +#if defined(CONFIG_COMPAT)
101768 +            if (compat)
101769 +            {
101770 +                if (get_user(param, (ioc_fm_exceptions*) compat_ptr(arg)))
101771 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101772 +            }
101773 +            else
101774 +#endif
101775 +            {
101776 +                if (get_user(param, (ioc_fm_exceptions*)arg))
101777 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101778 +            }
101779 +
101780 +            err = FM_ForceIntr(p_LnxWrpFmDev->h_Dev, (e_FmExceptions)param);
101781 +            break;
101782 +        }
101783 +
101784 +       case FM_IOC_GET_API_VERSION:
101785 +       {
101786 +               ioc_fm_api_version_t version;
101787 +
101788 +               FM_Get_Api_Version(&version);
101789 +
101790 +#if defined(CONFIG_COMPAT)
101791 +               if (compat)
101792 +               {
101793 +                       if (copy_to_user(
101794 +                               (ioc_fm_api_version_t *)compat_ptr(arg),
101795 +                               &version, sizeof(version)))
101796 +                               err = E_READ_FAILED;
101797 +               }
101798 +               else
101799 +#endif
101800 +               {
101801 +                       if (copy_to_user((ioc_fm_api_version_t *)arg,
101802 +                               &version, sizeof(version)))
101803 +                               err = E_READ_FAILED;
101804 +               }
101805 +       }
101806 +       break;
101807 +
101808 +        case FM_IOC_CTRL_MON_START:
101809 +        {
101810 +            FM_CtrlMonStart(p_LnxWrpFmDev->h_Dev);
101811 +        }
101812 +        break;
101813 +
101814 +        case FM_IOC_CTRL_MON_STOP:
101815 +        {
101816 +            FM_CtrlMonStop(p_LnxWrpFmDev->h_Dev);
101817 +        }
101818 +        break;
101819 +
101820 +#if defined(CONFIG_COMPAT)
101821 +        case FM_IOC_CTRL_MON_GET_COUNTERS_COMPAT:
101822 +#endif
101823 +        case FM_IOC_CTRL_MON_GET_COUNTERS:
101824 +        {
101825 +            ioc_fm_ctrl_mon_counters_params_t param;
101826 +            t_FmCtrlMon mon;
101827 +
101828 +#if defined(CONFIG_COMPAT)
101829 +            ioc_compat_fm_ctrl_mon_counters_params_t compat_param;
101830 +
101831 +            if (compat)
101832 +            {
101833 +                if (copy_from_user(&compat_param, (void *)compat_ptr(arg),
101834 +                            sizeof(compat_param)))
101835 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101836 +
101837 +                param.fm_ctrl_index = compat_param.fm_ctrl_index;
101838 +                param.p_mon = (fm_ctrl_mon_t *)compat_ptr(compat_param.p_mon);
101839 +            }
101840 +            else
101841 +#endif
101842 +            {
101843 +                if (copy_from_user(&param, (void *)arg, sizeof(ioc_fm_ctrl_mon_counters_params_t)))
101844 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101845 +            }
101846 +
101847 +            if (FM_CtrlMonGetCounters(p_LnxWrpFmDev->h_Dev, param.fm_ctrl_index, &mon))
101848 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101849 +
101850 +            if (copy_to_user(param.p_mon, &mon, sizeof(t_FmCtrlMon)))
101851 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101852 +        }
101853 +        break;
101854 +
101855 +        default:
101856 +            return LnxwrpFmPcdIOCTL(p_LnxWrpFmDev, cmd, arg, compat);
101857 +    }
101858 +
101859 +    if (err)
101860 +        RETURN_ERROR(MINOR, E_INVALID_OPERATION, ("IOCTL FM"));
101861 +
101862 +    return E_OK;
101863 +}
101864 +
101865 +t_Error LnxwrpFmPortIOCTL(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev, unsigned int cmd, unsigned long arg, bool compat)
101866 +{
101867 +    t_Error err = E_OK;
101868 +
101869 +    _fm_ioctl_dbg("cmd:0x%08x(type:0x%02x, nr:%u).\n",
101870 +        cmd, _IOC_TYPE(cmd), _IOC_NR(cmd) - 70);
101871 +
101872 +    switch (cmd)
101873 +    {
101874 +        case FM_PORT_IOC_DISABLE:
101875 +            FM_PORT_Disable(p_LnxWrpFmPortDev->h_Dev);
101876 +            /* deliberately ignoring error codes here */
101877 +            return E_OK;
101878 +
101879 +        case FM_PORT_IOC_ENABLE:
101880 +            FM_PORT_Enable(p_LnxWrpFmPortDev->h_Dev);
101881 +            /* deliberately ignoring error codes here */
101882 +            return E_OK;
101883 +
101884 +        case FM_PORT_IOC_SET_ERRORS_ROUTE:
101885 +        {
101886 +            ioc_fm_port_frame_err_select_t errs;
101887 +
101888 +#if defined(CONFIG_COMPAT)
101889 +            if (compat)
101890 +            {
101891 +                if (get_user(errs, (ioc_fm_port_frame_err_select_t*)compat_ptr(arg)))
101892 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101893 +            }
101894 +            else
101895 +#endif
101896 +            {
101897 +                if (get_user(errs, (ioc_fm_port_frame_err_select_t*)arg))
101898 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101899 +            }
101900 +
101901 +            err = FM_PORT_SetErrorsRoute(p_LnxWrpFmPortDev->h_Dev, (fmPortFrameErrSelect_t)errs);
101902 +            break;
101903 +        }
101904 +
101905 +        case FM_PORT_IOC_SET_RATE_LIMIT:
101906 +        {
101907 +            ioc_fm_port_rate_limit_t *param;
101908 +
101909 +            param = (ioc_fm_port_rate_limit_t *) XX_Malloc(sizeof(ioc_fm_port_rate_limit_t));
101910 +            if (!param)
101911 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
101912 +
101913 +            memset(param, 0, sizeof(ioc_fm_port_rate_limit_t));
101914 +
101915 +#if defined(CONFIG_COMPAT)
101916 +            if (compat)
101917 +            {
101918 +                if (copy_from_user(param, (ioc_fm_port_rate_limit_t *)compat_ptr(arg), sizeof(ioc_fm_port_rate_limit_t)))
101919 +                {
101920 +                    XX_Free(param);
101921 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101922 +                }
101923 +            }
101924 +            else
101925 +#endif
101926 +            {
101927 +                if (copy_from_user(param, (ioc_fm_port_rate_limit_t *)arg, sizeof(ioc_fm_port_rate_limit_t)))
101928 +                {
101929 +                    XX_Free(param);
101930 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101931 +                }
101932 +            }
101933 +
101934 +            err =  FM_PORT_SetRateLimit(p_LnxWrpFmPortDev->h_Dev, (t_FmPortRateLimit *)param);
101935 +
101936 +            XX_Free(param);
101937 +            break;
101938 +        }
101939 +
101940 +        case FM_PORT_IOC_REMOVE_RATE_LIMIT:
101941 +            FM_PORT_DeleteRateLimit(p_LnxWrpFmPortDev->h_Dev);
101942 +            /* deliberately ignoring error codes here */
101943 +            return E_OK;
101944 +
101945 +        case FM_PORT_IOC_ALLOC_PCD_FQIDS:
101946 +        {
101947 +            ioc_fm_port_pcd_fqids_params_t *param;
101948 +
101949 +            if (!p_LnxWrpFmPortDev->pcd_owner_params.cba)
101950 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("No one to listen on this PCD!!!"));
101951 +
101952 +            param = (ioc_fm_port_pcd_fqids_params_t *) XX_Malloc(sizeof(ioc_fm_port_pcd_fqids_params_t));
101953 +            if (!param)
101954 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
101955 +
101956 +            memset(param, 0, sizeof(ioc_fm_port_pcd_fqids_params_t));
101957 +
101958 +#if defined(CONFIG_COMPAT)
101959 +            if (compat)
101960 +            {
101961 +                if (copy_from_user(param, (ioc_fm_port_pcd_fqids_params_t *)compat_ptr(arg),
101962 +                                    sizeof(ioc_fm_port_pcd_fqids_params_t)))
101963 +                {
101964 +                    XX_Free(param);
101965 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101966 +                }
101967 +            }
101968 +            else
101969 +#endif
101970 +            {
101971 +                if (copy_from_user(param, (ioc_fm_port_pcd_fqids_params_t *)arg,
101972 +                                    sizeof(ioc_fm_port_pcd_fqids_params_t)))
101973 +                {
101974 +                    XX_Free(param);
101975 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
101976 +                }
101977 +            }
101978 +
101979 +            if (p_LnxWrpFmPortDev->pcd_owner_params.cba(p_LnxWrpFmPortDev->pcd_owner_params.dev,
101980 +                                                        param->num_fqids,
101981 +                                                        param->alignment,
101982 +                                                        &param->base_fqid))
101983 +            {
101984 +                XX_Free(param);
101985 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("can't allocate fqids for PCD!!!"));
101986 +            }
101987 +
101988 +#if defined(CONFIG_COMPAT)
101989 +            if (compat)
101990 +            {
101991 +                if (copy_to_user((ioc_fm_port_pcd_fqids_params_t *)compat_ptr(arg),
101992 +                                  param, sizeof(ioc_fm_port_pcd_fqids_params_t)))
101993 +                    err = E_READ_FAILED;
101994 +            }
101995 +            else
101996 +#endif
101997 +            {
101998 +                if (copy_to_user((ioc_fm_port_pcd_fqids_params_t *)arg,
101999 +                                  param, sizeof(ioc_fm_port_pcd_fqids_params_t)))
102000 +                    err = E_READ_FAILED;
102001 +            }
102002 +
102003 +            XX_Free(param);
102004 +            break;
102005 +        }
102006 +
102007 +        case FM_PORT_IOC_FREE_PCD_FQIDS:
102008 +        {
102009 +            uint32_t base_fqid;
102010 +
102011 +            if (!p_LnxWrpFmPortDev->pcd_owner_params.cbf)
102012 +                RETURN_ERROR(MINOR, E_INVALID_STATE, ("No one to listen on this PCD!!!"));
102013 +
102014 +#if defined(CONFIG_COMPAT)
102015 +            if (compat)
102016 +            {
102017 +                if (get_user(base_fqid, (uint32_t*) compat_ptr(arg)))
102018 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102019 +            }
102020 +            else
102021 +#endif
102022 +            {
102023 +                if (get_user(base_fqid, (uint32_t*)arg))
102024 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102025 +            }
102026 +
102027 +            if (p_LnxWrpFmPortDev->pcd_owner_params.cbf(p_LnxWrpFmPortDev->pcd_owner_params.dev, base_fqid))
102028 +               err = E_WRITE_FAILED;
102029 +
102030 +            break;
102031 +        }
102032 +
102033 +#if defined(CONFIG_COMPAT)
102034 +        case FM_PORT_IOC_SET_PCD_COMPAT:
102035 +#endif
102036 +        case FM_PORT_IOC_SET_PCD:
102037 +        {
102038 +            ioc_fm_port_pcd_params_t      *port_pcd_params;
102039 +            ioc_fm_port_pcd_prs_params_t  *port_pcd_prs_params;
102040 +            ioc_fm_port_pcd_cc_params_t   *port_pcd_cc_params;
102041 +            ioc_fm_port_pcd_kg_params_t   *port_pcd_kg_params;
102042 +            ioc_fm_port_pcd_plcr_params_t *port_pcd_plcr_params;
102043 +
102044 +            port_pcd_params = (ioc_fm_port_pcd_params_t *) XX_Malloc(
102045 +                    sizeof(ioc_fm_port_pcd_params_t) +
102046 +                    sizeof(ioc_fm_port_pcd_prs_params_t) +
102047 +                    sizeof(ioc_fm_port_pcd_cc_params_t) +
102048 +                    sizeof(ioc_fm_port_pcd_kg_params_t) +
102049 +                    sizeof(ioc_fm_port_pcd_plcr_params_t));
102050 +            if (!port_pcd_params)
102051 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102052 +
102053 +            memset(port_pcd_params, 0,
102054 +                    sizeof(ioc_fm_port_pcd_params_t) +
102055 +                    sizeof(ioc_fm_port_pcd_prs_params_t) +
102056 +                    sizeof(ioc_fm_port_pcd_cc_params_t) +
102057 +                    sizeof(ioc_fm_port_pcd_kg_params_t) +
102058 +                    sizeof(ioc_fm_port_pcd_plcr_params_t));
102059 +
102060 +            port_pcd_prs_params  = (ioc_fm_port_pcd_prs_params_t *)  (port_pcd_params + 1);
102061 +            port_pcd_cc_params   = (ioc_fm_port_pcd_cc_params_t *)   (port_pcd_prs_params + 1);
102062 +            port_pcd_kg_params   = (ioc_fm_port_pcd_kg_params_t *)   (port_pcd_cc_params + 1);
102063 +            port_pcd_plcr_params = (ioc_fm_port_pcd_plcr_params_t *) (port_pcd_kg_params + 1);
102064 +
102065 +#if defined(CONFIG_COMPAT)
102066 +            if (compat)
102067 +            {
102068 +                ioc_compat_fm_port_pcd_params_t      *compat_port_pcd_params;
102069 +                ioc_fm_port_pcd_prs_params_t         *same_port_pcd_prs_params;
102070 +                ioc_compat_fm_port_pcd_cc_params_t   *compat_port_pcd_cc_params;
102071 +                ioc_compat_fm_port_pcd_kg_params_t   *compat_port_pcd_kg_params;
102072 +                ioc_compat_fm_port_pcd_plcr_params_t *compat_port_pcd_plcr_params;
102073 +
102074 +                compat_port_pcd_params = (ioc_compat_fm_port_pcd_params_t *) XX_Malloc(
102075 +                                sizeof(ioc_compat_fm_port_pcd_params_t) +
102076 +                                sizeof(ioc_fm_port_pcd_prs_params_t) +
102077 +                                sizeof(ioc_compat_fm_port_pcd_cc_params_t) +
102078 +                                sizeof(ioc_compat_fm_port_pcd_kg_params_t) +
102079 +                                sizeof(ioc_compat_fm_port_pcd_plcr_params_t));
102080 +                if (!compat_port_pcd_params)
102081 +                {
102082 +                    XX_Free(port_pcd_params);
102083 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102084 +                }
102085 +
102086 +                memset(compat_port_pcd_params, 0,
102087 +                        sizeof(ioc_compat_fm_port_pcd_params_t) +
102088 +                        sizeof(ioc_fm_port_pcd_prs_params_t) +
102089 +                        sizeof(ioc_compat_fm_port_pcd_cc_params_t) +
102090 +                        sizeof(ioc_compat_fm_port_pcd_kg_params_t) +
102091 +                        sizeof(ioc_compat_fm_port_pcd_plcr_params_t));
102092 +                same_port_pcd_prs_params    = (ioc_fm_port_pcd_prs_params_t *) (compat_port_pcd_params + 1);
102093 +                compat_port_pcd_cc_params   = (ioc_compat_fm_port_pcd_cc_params_t *) (same_port_pcd_prs_params + 1);
102094 +                compat_port_pcd_kg_params   = (ioc_compat_fm_port_pcd_kg_params_t *) (compat_port_pcd_cc_params + 1);
102095 +                compat_port_pcd_plcr_params = (ioc_compat_fm_port_pcd_plcr_params_t *) (compat_port_pcd_kg_params + 1);
102096 +
102097 +                if (copy_from_user(compat_port_pcd_params,
102098 +                            (ioc_compat_fm_port_pcd_params_t*) compat_ptr(arg),
102099 +                            sizeof(ioc_compat_fm_port_pcd_params_t)))
102100 +                    err = E_WRITE_FAILED;
102101 +
102102 +                while (!err) /* pseudo-while */
102103 +                {
102104 +                    /* set pointers from where to copy from: */
102105 +                    port_pcd_params->p_prs_params          = compat_ptr(compat_port_pcd_params->p_prs_params); /* same structure */
102106 +                    port_pcd_params->p_cc_params           = compat_ptr(compat_port_pcd_params->p_cc_params);
102107 +                    port_pcd_params->p_kg_params           = compat_ptr(compat_port_pcd_params->p_kg_params);
102108 +                    port_pcd_params->p_plcr_params         = compat_ptr(compat_port_pcd_params->p_plcr_params);
102109 +                    port_pcd_params->p_ip_reassembly_manip = compat_ptr(compat_port_pcd_params->p_ip_reassembly_manip);
102110 +#if (DPAA_VERSION >= 11)
102111 +                    port_pcd_params->p_capwap_reassembly_manip = compat_ptr(compat_port_pcd_params->p_capwap_reassembly_manip);
102112 +#endif
102113 +                    /* the prs member is the same, no compat structure...memcpy only */
102114 +                    if (port_pcd_params->p_prs_params)
102115 +                    {
102116 +                        if (copy_from_user(same_port_pcd_prs_params,
102117 +                                port_pcd_params->p_prs_params,
102118 +                                sizeof(ioc_fm_port_pcd_prs_params_t)))
102119 +                        {
102120 +                            err = E_WRITE_FAILED;
102121 +                            break; /* from pseudo-while */
102122 +                        }
102123 +
102124 +                        memcpy(port_pcd_prs_params, same_port_pcd_prs_params, sizeof(ioc_fm_port_pcd_prs_params_t));
102125 +                        port_pcd_params->p_prs_params = port_pcd_prs_params;
102126 +                    }
102127 +
102128 +                    if (port_pcd_params->p_cc_params)
102129 +                    {
102130 +                        if (copy_from_user(compat_port_pcd_cc_params,
102131 +                                port_pcd_params->p_cc_params,
102132 +                                sizeof(ioc_compat_fm_port_pcd_cc_params_t)))
102133 +                        {
102134 +                            err = E_WRITE_FAILED;
102135 +                            break; /* from pseudo-while */
102136 +                        }
102137 +
102138 +                        port_pcd_params->p_cc_params = port_pcd_cc_params;
102139 +                    }
102140 +
102141 +                    if (port_pcd_params->p_kg_params)
102142 +                    {
102143 +                        if (copy_from_user(compat_port_pcd_kg_params,
102144 +                                port_pcd_params->p_kg_params,
102145 +                                sizeof(ioc_compat_fm_port_pcd_kg_params_t)))
102146 +                        {
102147 +                            err = E_WRITE_FAILED;
102148 +                            break; /* from pseudo-while */
102149 +                        }
102150 +
102151 +                        port_pcd_params->p_kg_params = port_pcd_kg_params;
102152 +                    }
102153 +
102154 +                    if (port_pcd_params->p_plcr_params)
102155 +                    {
102156 +                        if (copy_from_user(compat_port_pcd_plcr_params,
102157 +                                    port_pcd_params->p_plcr_params,
102158 +                                    sizeof(ioc_compat_fm_port_pcd_plcr_params_t)))
102159 +                        {
102160 +                            err = E_WRITE_FAILED;
102161 +                            break; /* from pseudo-while */
102162 +                        }
102163 +
102164 +                        port_pcd_params->p_plcr_params = port_pcd_plcr_params;
102165 +                    }
102166 +
102167 +                    break; /* pseudo-while: always run once! */
102168 +                }
102169 +
102170 +                if (!err)
102171 +                    compat_copy_fm_port_pcd(compat_port_pcd_params, port_pcd_params, COMPAT_US_TO_K);
102172 +
102173 +                XX_Free(compat_port_pcd_params);
102174 +            }
102175 +            else
102176 +#endif
102177 +            {
102178 +                if (copy_from_user(port_pcd_params,
102179 +                            (ioc_fm_port_pcd_params_t*) arg,
102180 +                            sizeof(ioc_fm_port_pcd_params_t)))
102181 +                    err = E_WRITE_FAILED;
102182 +
102183 +                while (!err) /* pseudo-while */
102184 +                {
102185 +                    if (port_pcd_params->p_prs_params)
102186 +                    {
102187 +                        if (copy_from_user(port_pcd_prs_params,
102188 +                                port_pcd_params->p_prs_params,
102189 +                                sizeof(ioc_fm_port_pcd_prs_params_t)))
102190 +                        {
102191 +                            err = E_WRITE_FAILED;
102192 +                            break; /* from pseudo-while */
102193 +                        }
102194 +
102195 +                        port_pcd_params->p_prs_params = port_pcd_prs_params;
102196 +                    }
102197 +
102198 +                    if (port_pcd_params->p_cc_params)
102199 +                    {
102200 +                        if (copy_from_user(port_pcd_cc_params,
102201 +                                port_pcd_params->p_cc_params,
102202 +                                sizeof(ioc_fm_port_pcd_cc_params_t)))
102203 +                        {
102204 +                            err = E_WRITE_FAILED;
102205 +                            break; /* from pseudo-while */
102206 +                        }
102207 +
102208 +                        port_pcd_params->p_cc_params = port_pcd_cc_params;
102209 +                    }
102210 +
102211 +                    if (port_pcd_params->p_kg_params)
102212 +                    {
102213 +                        if (copy_from_user(port_pcd_kg_params,
102214 +                                port_pcd_params->p_kg_params,
102215 +                                sizeof(ioc_fm_port_pcd_kg_params_t)))
102216 +                        {
102217 +                            err = E_WRITE_FAILED;
102218 +                            break; /* from pseudo-while */
102219 +                        }
102220 +
102221 +                        port_pcd_params->p_kg_params = port_pcd_kg_params;
102222 +                    }
102223 +
102224 +                    if (port_pcd_params->p_plcr_params)
102225 +                    {
102226 +                        if (copy_from_user(port_pcd_plcr_params,
102227 +                                port_pcd_params->p_plcr_params,
102228 +                                sizeof(ioc_fm_port_pcd_plcr_params_t)))
102229 +                        {
102230 +                            err = E_WRITE_FAILED;
102231 +                            break; /* from pseudo-while */
102232 +                        }
102233 +
102234 +                        port_pcd_params->p_plcr_params = port_pcd_plcr_params;
102235 +                    }
102236 +
102237 +                    break; /* pseudo-while: always run once! */
102238 +                }
102239 +            }
102240 +
102241 +            if (!err)
102242 +                err = FM_PORT_SetPCD(p_LnxWrpFmPortDev->h_Dev, (t_FmPortPcdParams*) port_pcd_params);
102243 +
102244 +            XX_Free(port_pcd_params);
102245 +            break;
102246 +        }
102247 +
102248 +        case FM_PORT_IOC_DELETE_PCD:
102249 +            err = FM_PORT_DeletePCD(p_LnxWrpFmPortDev->h_Dev);
102250 +            break;
102251 +
102252 +#if defined(CONFIG_COMPAT)
102253 +        case FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME_COMPAT:
102254 +#endif
102255 +        case FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME:
102256 +        {
102257 +            ioc_fm_pcd_kg_scheme_select_t *param;
102258 +
102259 +            param = (ioc_fm_pcd_kg_scheme_select_t *) XX_Malloc(
102260 +                    sizeof(ioc_fm_pcd_kg_scheme_select_t));
102261 +            if (!param)
102262 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102263 +
102264 +            memset(param, 0, sizeof(ioc_fm_pcd_kg_scheme_select_t));
102265 +
102266 +#if defined(CONFIG_COMPAT)
102267 +            if (compat)
102268 +            {
102269 +                ioc_compat_fm_pcd_kg_scheme_select_t *compat_param;
102270 +
102271 +                compat_param = (ioc_compat_fm_pcd_kg_scheme_select_t *) XX_Malloc(
102272 +                        sizeof(ioc_compat_fm_pcd_kg_scheme_select_t));
102273 +                if (!compat_param)
102274 +                {
102275 +                    XX_Free(param);
102276 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102277 +                }
102278 +
102279 +                memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_select_t));
102280 +                if (copy_from_user(compat_param,
102281 +                                   (ioc_compat_fm_pcd_kg_scheme_select_t *) compat_ptr(arg),
102282 +                                   sizeof(ioc_compat_fm_pcd_kg_scheme_select_t)))
102283 +                {
102284 +                    XX_Free(compat_param);
102285 +                    XX_Free(param);
102286 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102287 +                }
102288 +
102289 +                compat_copy_fm_pcd_kg_scheme_select(compat_param, param, COMPAT_US_TO_K);
102290 +
102291 +                XX_Free(compat_param);
102292 +            }
102293 +            else
102294 +#endif
102295 +            {
102296 +                if (copy_from_user(param, (ioc_fm_pcd_kg_scheme_select_t *)arg,
102297 +                                   sizeof(ioc_fm_pcd_kg_scheme_select_t)))
102298 +                {
102299 +                    XX_Free(param);
102300 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102301 +                }
102302 +            }
102303 +
102304 +            err =  FM_PORT_PcdKgModifyInitialScheme(p_LnxWrpFmPortDev->h_Dev, (t_FmPcdKgSchemeSelect *)param);
102305 +
102306 +            XX_Free(param);
102307 +            break;
102308 +        }
102309 +
102310 +#if defined(CONFIG_COMPAT)
102311 +        case FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE_COMPAT:
102312 +#endif
102313 +        case FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE:
102314 +        {
102315 +            ioc_fm_obj_t id;
102316 +
102317 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
102318 +
102319 +#if defined(CONFIG_COMPAT)
102320 +            if (compat)
102321 +            {
102322 +                ioc_compat_fm_obj_t compat_id;
102323 +
102324 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
102325 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102326 +
102327 +                id.obj = compat_ptr(compat_id.obj);
102328 +            }
102329 +            else
102330 +#endif
102331 +            {
102332 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
102333 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102334 +            }
102335 +
102336 +            err = FM_PORT_PcdPlcrModifyInitialProfile(p_LnxWrpFmPortDev->h_Dev, id.obj);
102337 +            break;
102338 +        }
102339 +
102340 +#if defined(CONFIG_COMPAT)
102341 +        case FM_PORT_IOC_PCD_KG_BIND_SCHEMES_COMPAT:
102342 +#endif
102343 +        case FM_PORT_IOC_PCD_KG_BIND_SCHEMES:
102344 +        {
102345 +            ioc_fm_pcd_port_schemes_params_t *param;
102346 +
102347 +            param = (ioc_fm_pcd_port_schemes_params_t *) XX_Malloc(
102348 +                    sizeof(ioc_fm_pcd_port_schemes_params_t));
102349 +            if (!param)
102350 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102351 +
102352 +            memset(param, 0 , sizeof(ioc_fm_pcd_port_schemes_params_t));
102353 +
102354 +#if defined(CONFIG_COMPAT)
102355 +            if (compat)
102356 +            {
102357 +                ioc_compat_fm_pcd_port_schemes_params_t compat_param;
102358 +
102359 +                if (copy_from_user(&compat_param,
102360 +                            (ioc_compat_fm_pcd_port_schemes_params_t *) compat_ptr(arg),
102361 +                            sizeof(ioc_compat_fm_pcd_port_schemes_params_t)))
102362 +                {
102363 +                    XX_Free(param);
102364 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102365 +                }
102366 +
102367 +                compat_copy_fm_pcd_kg_schemes_params(&compat_param, param, COMPAT_US_TO_K);
102368 +            }
102369 +            else
102370 +#endif
102371 +            {
102372 +                if (copy_from_user(param, (ioc_fm_pcd_port_schemes_params_t *) arg,
102373 +                            sizeof(ioc_fm_pcd_port_schemes_params_t)))
102374 +                {
102375 +                    XX_Free(param);
102376 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102377 +                }
102378 +            }
102379 +
102380 +            err = FM_PORT_PcdKgBindSchemes(p_LnxWrpFmPortDev->h_Dev, (t_FmPcdPortSchemesParams *)param);
102381 +
102382 +            XX_Free(param);
102383 +            break;
102384 +        }
102385 +
102386 +#if defined(CONFIG_COMPAT)
102387 +        case FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES_COMPAT:
102388 +#endif
102389 +        case FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES:
102390 +        {
102391 +            ioc_fm_pcd_port_schemes_params_t *param;
102392 +
102393 +            param = (ioc_fm_pcd_port_schemes_params_t *) XX_Malloc(
102394 +                    sizeof(ioc_fm_pcd_port_schemes_params_t));
102395 +            if (!param)
102396 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102397 +
102398 +            memset(param, 0 , sizeof(ioc_fm_pcd_port_schemes_params_t));
102399 +
102400 +#if defined(CONFIG_COMPAT)
102401 +            if (compat)
102402 +            {
102403 +                ioc_compat_fm_pcd_port_schemes_params_t compat_param;
102404 +
102405 +                if (copy_from_user(&compat_param,
102406 +                            (ioc_compat_fm_pcd_port_schemes_params_t *) compat_ptr(arg),
102407 +                            sizeof(ioc_compat_fm_pcd_port_schemes_params_t)))
102408 +                {
102409 +                    XX_Free(param);
102410 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102411 +                }
102412 +
102413 +                compat_copy_fm_pcd_kg_schemes_params(&compat_param, param, COMPAT_US_TO_K);
102414 +            }
102415 +            else
102416 +#endif
102417 +            {
102418 +                if (copy_from_user(param, (ioc_fm_pcd_port_schemes_params_t *) arg,
102419 +                            sizeof(ioc_fm_pcd_port_schemes_params_t)))
102420 +                {
102421 +                    XX_Free(param);
102422 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102423 +                }
102424 +            }
102425 +
102426 +            err =  FM_PORT_PcdKgUnbindSchemes(p_LnxWrpFmPortDev->h_Dev, (t_FmPcdPortSchemesParams *)param);
102427 +
102428 +            XX_Free(param);
102429 +            break;
102430 +        }
102431 +
102432 +        case FM_PORT_IOC_PCD_PLCR_ALLOC_PROFILES:
102433 +        {
102434 +            uint16_t num;
102435 +            if (get_user(num, (uint16_t*) arg))
102436 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102437 +
102438 +            err = FM_PORT_PcdPlcrAllocProfiles(p_LnxWrpFmPortDev->h_Dev, num);
102439 +            break;
102440 +        }
102441 +
102442 +        case FM_PORT_IOC_PCD_PLCR_FREE_PROFILES:
102443 +            err = FM_PORT_PcdPlcrFreeProfiles(p_LnxWrpFmPortDev->h_Dev);
102444 +            break;
102445 +
102446 +        case FM_PORT_IOC_DETACH_PCD:
102447 +            err = FM_PORT_DetachPCD(p_LnxWrpFmPortDev->h_Dev);
102448 +            break;
102449 +
102450 +        case FM_PORT_IOC_ATTACH_PCD:
102451 +            err = FM_PORT_AttachPCD(p_LnxWrpFmPortDev->h_Dev);
102452 +            break;
102453 +
102454 +#if defined(CONFIG_COMPAT)
102455 +        case FM_PORT_IOC_PCD_CC_MODIFY_TREE_COMPAT:
102456 +#endif
102457 +        case FM_PORT_IOC_PCD_CC_MODIFY_TREE:
102458 +        {
102459 +            ioc_fm_obj_t id;
102460 +
102461 +            memset(&id, 0 , sizeof(ioc_fm_obj_t));
102462 +
102463 +#if defined(CONFIG_COMPAT)
102464 +            if (compat)
102465 +            {
102466 +                ioc_compat_fm_obj_t compat_id;
102467 +
102468 +                if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
102469 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102470 +
102471 +                compat_copy_fm_port_pcd_modify_tree(&compat_id, &id, COMPAT_US_TO_K);
102472 +            }
102473 +            else
102474 +#endif
102475 +            {
102476 +                if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
102477 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102478 +            }
102479 +
102480 +            err = FM_PORT_PcdCcModifyTree(p_LnxWrpFmPortDev->h_Dev, id.obj);
102481 +            break;
102482 +        }
102483 +
102484 +        case FM_PORT_IOC_ADD_CONGESTION_GRPS:
102485 +        case FM_PORT_IOC_REMOVE_CONGESTION_GRPS:
102486 +        {
102487 +            ioc_fm_port_congestion_groups_t *param;
102488 +
102489 +            param = (ioc_fm_port_congestion_groups_t*) XX_Malloc(sizeof(ioc_fm_port_congestion_groups_t));
102490 +            if (!param)
102491 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102492 +
102493 +            memset(param, 0, sizeof(ioc_fm_port_congestion_groups_t));
102494 +
102495 +#if defined(CONFIG_COMPAT)
102496 +            if (compat)
102497 +            {
102498 +                if (copy_from_user(param, (t_FmPortCongestionGrps*) compat_ptr(arg),
102499 +                            sizeof(t_FmPortCongestionGrps)))
102500 +                {
102501 +                    XX_Free(param);
102502 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102503 +                }
102504 +            }
102505 +            else
102506 +#endif /* CONFIG_COMPAT */
102507 +            {
102508 +                if (copy_from_user(param, (t_FmPortCongestionGrps*) arg,
102509 +                            sizeof(t_FmPortCongestionGrps)))
102510 +                {
102511 +                    XX_Free(param);
102512 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102513 +                }
102514 +            }
102515 +
102516 +            err = (cmd == FM_PORT_IOC_ADD_CONGESTION_GRPS)
102517 +                ? FM_PORT_AddCongestionGrps(p_LnxWrpFmPortDev->h_Dev, (t_FmPortCongestionGrps*) param)
102518 +                : FM_PORT_RemoveCongestionGrps(p_LnxWrpFmPortDev->h_Dev, (t_FmPortCongestionGrps*) param)
102519 +                ;
102520 +
102521 +            XX_Free(param);
102522 +            break;
102523 +        }
102524 +
102525 +        case FM_PORT_IOC_ADD_RX_HASH_MAC_ADDR:
102526 +        case FM_PORT_IOC_REMOVE_RX_HASH_MAC_ADDR:
102527 +        {
102528 +            ioc_fm_port_mac_addr_params_t *param;
102529 +
102530 +            param = (ioc_fm_port_mac_addr_params_t*) XX_Malloc(
102531 +                    sizeof(ioc_fm_port_mac_addr_params_t));
102532 +            if (!param)
102533 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102534 +
102535 +            memset(param, 0, sizeof(ioc_fm_port_mac_addr_params_t));
102536 +
102537 +#if defined(CONFIG_COMPAT)
102538 +            if (compat)
102539 +            {
102540 +                if (copy_from_user(param, (ioc_fm_port_mac_addr_params_t*) compat_ptr(arg),
102541 +                            sizeof(ioc_fm_port_mac_addr_params_t)))
102542 +                {
102543 +                    XX_Free(param);
102544 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102545 +                }
102546 +            }
102547 +            else
102548 +#endif /* CONFIG_COMPAT */
102549 +            {
102550 +                if (copy_from_user(param, (ioc_fm_port_mac_addr_params_t*) arg,
102551 +                            sizeof(ioc_fm_port_mac_addr_params_t)))
102552 +                {
102553 +                    XX_Free(param);
102554 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102555 +                }
102556 +            }
102557 +
102558 +            if (p_LnxWrpFmPortDev->pcd_owner_params.dev)
102559 +            {
102560 +                int id = -1;
102561 +
102562 +                switch(p_LnxWrpFmPortDev->settings.param.portType)
102563 +                {
102564 +                    case e_FM_PORT_TYPE_RX:
102565 +                    case e_FM_PORT_TYPE_TX:
102566 +                        id = p_LnxWrpFmPortDev->id;
102567 +                    break;
102568 +                    case e_FM_PORT_TYPE_RX_10G:
102569 +                    case e_FM_PORT_TYPE_TX_10G:
102570 +                        id = p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_MACS;
102571 +                    break;
102572 +                    default:
102573 +                        err = E_NOT_AVAILABLE;
102574 +                        REPORT_ERROR(MINOR, err, ("Attempt to add/remove hash MAC addr. to/from MAC-less port!"));
102575 +                }
102576 +                if (id >= 0)
102577 +                {
102578 +                    t_LnxWrpFmDev *fm = (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
102579 +                    t_Handle mac_handle = fm->macs[id].h_Dev;
102580 +
102581 +                    err = (cmd == FM_PORT_IOC_ADD_RX_HASH_MAC_ADDR)
102582 +                        ? FM_MAC_AddHashMacAddr(mac_handle, (t_EnetAddr*) param)
102583 +                        : FM_MAC_RemoveHashMacAddr(mac_handle, (t_EnetAddr*) param);
102584 +                }
102585 +            }
102586 +            else
102587 +            {
102588 +                err = E_NOT_AVAILABLE;
102589 +                REPORT_ERROR(MINOR, err, ("Port not initialized or other error!?!?"));
102590 +            }
102591 +
102592 +            XX_Free(param);
102593 +            break;
102594 +        }
102595 +
102596 +        case FM_PORT_IOC_SET_TX_PAUSE_FRAMES:
102597 +        {
102598 +            t_LnxWrpFmDev *p_LnxWrpFmDev =
102599 +                    (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
102600 +            ioc_fm_port_tx_pause_frames_params_t param;
102601 +            int mac_id = p_LnxWrpFmPortDev->id;
102602 +
102603 +            if(&p_LnxWrpFmDev->txPorts[mac_id] != p_LnxWrpFmPortDev)
102604 +                mac_id += FM_MAX_NUM_OF_1G_MACS; /* 10G port */
102605 +
102606 +            if (copy_from_user(&param, (ioc_fm_port_tx_pause_frames_params_t *)arg,
102607 +                        sizeof(ioc_fm_port_tx_pause_frames_params_t)))
102608 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102609 +
102610 +            if (p_LnxWrpFmDev && p_LnxWrpFmDev->macs[mac_id].h_Dev)
102611 +            {
102612 +                FM_MAC_SetTxPauseFrames(p_LnxWrpFmDev->macs[mac_id].h_Dev,
102613 +                        param.priority,
102614 +                        param.pause_time,
102615 +                        param.thresh_time);
102616 +            }
102617 +            else
102618 +            {
102619 +                err = E_NOT_AVAILABLE;
102620 +                REPORT_ERROR(MINOR, err, ("Port not initialized or other error!"));
102621 +            }
102622 +
102623 +            break;
102624 +        }
102625 +
102626 +        case FM_PORT_IOC_CONFIG_BUFFER_PREFIX_CONTENT:
102627 +        {
102628 +            ioc_fm_buffer_prefix_content_t *param;
102629 +
102630 +            param = (ioc_fm_buffer_prefix_content_t*) XX_Malloc(sizeof(ioc_fm_buffer_prefix_content_t));
102631 +            if (!param)
102632 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102633 +
102634 +            memset(param, 0, sizeof(ioc_fm_buffer_prefix_content_t));
102635 +
102636 +            if (copy_from_user(param, (ioc_fm_buffer_prefix_content_t*) arg,
102637 +                        sizeof(ioc_fm_buffer_prefix_content_t)))
102638 +            {
102639 +                XX_Free(param);
102640 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102641 +            }
102642 +
102643 +            if (FM_PORT_ConfigBufferPrefixContent(p_LnxWrpFmPortDev->h_Dev,
102644 +                    (t_FmBufferPrefixContent *)param))
102645 +            {
102646 +                XX_Free(param);
102647 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102648 +            }
102649 +
102650 +            XX_Free(param);
102651 +            break;
102652 +        }
102653 +
102654 +#if (DPAA_VERSION >= 11)
102655 +#if defined(CONFIG_COMPAT)
102656 +        case FM_PORT_IOC_VSP_ALLOC_COMPAT:
102657 +#endif
102658 +        case FM_PORT_IOC_VSP_ALLOC:
102659 +        {
102660 +            ioc_fm_port_vsp_alloc_params_t *param;
102661 +            t_LnxWrpFmDev *p_LnxWrpFmDev;
102662 +            t_LnxWrpFmPortDev *p_LnxWrpFmTxPortDev;
102663 +
102664 +            param = (ioc_fm_port_vsp_alloc_params_t *) XX_Malloc(
102665 +                    sizeof(ioc_fm_port_vsp_alloc_params_t));
102666 +            if (!param)
102667 +                RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102668 +
102669 +            memset(param, 0, sizeof(ioc_fm_port_vsp_alloc_params_t));
102670 +
102671 +#if defined(CONFIG_COMPAT)
102672 +            if (compat)
102673 +            {
102674 +                ioc_compat_fm_port_vsp_alloc_params_t *compat_param;
102675 +
102676 +                compat_param = (ioc_compat_fm_port_vsp_alloc_params_t *) XX_Malloc(
102677 +                        sizeof(ioc_compat_fm_port_vsp_alloc_params_t));
102678 +                if (!compat_param)
102679 +                {
102680 +                    XX_Free(param);
102681 +                    RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
102682 +                }
102683 +
102684 +                memset(compat_param, 0, sizeof(ioc_compat_fm_port_vsp_alloc_params_t));
102685 +                if (copy_from_user(compat_param,
102686 +                                   (ioc_compat_fm_port_vsp_alloc_params_t *) compat_ptr(arg),
102687 +                                   sizeof(ioc_compat_fm_port_vsp_alloc_params_t)))
102688 +                {
102689 +                    XX_Free(compat_param);
102690 +                    XX_Free(param);
102691 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102692 +                }
102693 +
102694 +                compat_copy_fm_port_vsp_alloc_params(compat_param, param, COMPAT_US_TO_K);
102695 +
102696 +                XX_Free(compat_param);
102697 +            }
102698 +            else
102699 +#endif
102700 +            {
102701 +                if (copy_from_user(param, (ioc_fm_port_vsp_alloc_params_t *)arg,
102702 +                                   sizeof(ioc_fm_port_vsp_alloc_params_t)))
102703 +                {
102704 +                    XX_Free(param);
102705 +                    RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102706 +                }
102707 +            }
102708 +
102709 +            /* Userspace may not have the Tx port t_handle when issuing the IOCTL */
102710 +            if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX ||
102711 +                    p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX_10G)
102712 +            {
102713 +                /* Determine the Tx port t_Handle from the Rx port id */
102714 +                p_LnxWrpFmDev = p_LnxWrpFmPortDev->h_LnxWrpFmDev;
102715 +                p_LnxWrpFmTxPortDev = &p_LnxWrpFmDev->txPorts[p_LnxWrpFmPortDev->id];
102716 +                param->p_fm_tx_port = p_LnxWrpFmTxPortDev->h_Dev;
102717 +            }
102718 +
102719 +            if (FM_PORT_VSPAlloc(p_LnxWrpFmPortDev->h_Dev, (t_FmPortVSPAllocParams *)param))
102720 +            {
102721 +                XX_Free(param);
102722 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102723 +            }
102724 +
102725 +            XX_Free(param);
102726 +            break;
102727 +        }
102728 +#endif /* (DPAA_VERSION >= 11) */
102729 +
102730 +        case FM_PORT_IOC_GET_MAC_STATISTICS:
102731 +        {
102732 +            t_LnxWrpFmDev *p_LnxWrpFmDev =
102733 +                    (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
102734 +            ioc_fm_port_mac_statistics_t param;
102735 +            int mac_id = p_LnxWrpFmPortDev->id;
102736 +
102737 +            if (!p_LnxWrpFmDev)
102738 +                RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
102739 +
102740 +            if (&p_LnxWrpFmDev->txPorts[mac_id] != p_LnxWrpFmPortDev &&
102741 +                &p_LnxWrpFmDev->rxPorts[mac_id] != p_LnxWrpFmPortDev)
102742 +                mac_id += FM_MAX_NUM_OF_1G_MACS; /* 10G port */
102743 +
102744 +            if (!p_LnxWrpFmDev->macs[mac_id].h_Dev)
102745 +                RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
102746 +
102747 +            if (FM_MAC_GetStatistics(p_LnxWrpFmDev->macs[mac_id].h_Dev,
102748 +                        (t_FmMacStatistics *)&param))
102749 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102750 +
102751 +            if (copy_to_user((ioc_fm_port_mac_statistics_t *)arg, &param,
102752 +                        sizeof(ioc_fm_port_mac_statistics_t)))
102753 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102754 +
102755 +            break;
102756 +        }
102757 +
102758 +        case FM_PORT_IOC_GET_BMI_COUNTERS:
102759 +        {
102760 +            t_LnxWrpFmDev *p_LnxWrpFmDev =
102761 +                    (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
102762 +            ioc_fm_port_bmi_stats_t param;
102763 +
102764 +            if (!p_LnxWrpFmDev)
102765 +                RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
102766 +
102767 +            if (FM_PORT_GetBmiCounters(p_LnxWrpFmPortDev->h_Dev,
102768 +                        (t_FmPortBmiStats *)&param))
102769 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102770 +
102771 +            if (copy_to_user((ioc_fm_port_bmi_stats_t *)arg, &param,
102772 +                        sizeof(ioc_fm_port_bmi_stats_t)))
102773 +                RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
102774 +
102775 +            break;
102776 +        }
102777 +
102778 +        default:
102779 +            RETURN_ERROR(MINOR, E_INVALID_SELECTION,
102780 +                ("invalid ioctl: cmd:0x%08x(type:0x%02x, nr:0x%02x.\n",
102781 +                cmd, _IOC_TYPE(cmd), _IOC_NR(cmd)));
102782 +    }
102783 +
102784 +    if (err)
102785 +        RETURN_ERROR(MINOR, E_INVALID_OPERATION, ("IOCTL FM PORT"));
102786 +
102787 +    return E_OK;
102788 +}
102789 +
102790 +/*****************************************************************************/
102791 +/*               API routines for the FM Linux Device                        */
102792 +/*****************************************************************************/
102793 +
102794 +static int fm_open(struct inode *inode, struct file *file)
102795 +{
102796 +    t_LnxWrpFmDev       *p_LnxWrpFmDev = NULL;
102797 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev = NULL;
102798 +    unsigned int        major = imajor(inode);
102799 +    unsigned int        minor = iminor(inode);
102800 +    struct device_node  *fm_node;
102801 +    static struct of_device_id fm_node_of_match[] = {
102802 +        { .compatible = "fsl,fman", },
102803 +        { /* end of list */ },
102804 +    };
102805 +
102806 +    DBG(TRACE, ("Opening minor - %d - ", minor));
102807 +
102808 +    if (file->private_data != NULL)
102809 +        return 0;
102810 +
102811 +    /* Get all the FM nodes */
102812 +    for_each_matching_node(fm_node, fm_node_of_match) {
102813 +        struct platform_device    *of_dev;
102814 +
102815 +        of_dev = of_find_device_by_node(fm_node);
102816 +        if (unlikely(of_dev == NULL)) {
102817 +            REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("fm id!"));
102818 +            return -ENXIO;
102819 +        }
102820 +
102821 +        p_LnxWrpFmDev = (t_LnxWrpFmDev *)fm_bind(&of_dev->dev);
102822 +        if (p_LnxWrpFmDev->major == major)
102823 +            break;
102824 +        fm_unbind((struct fm *)p_LnxWrpFmDev);
102825 +        p_LnxWrpFmDev = NULL;
102826 +    }
102827 +
102828 +    if (!p_LnxWrpFmDev)
102829 +        return -ENODEV;
102830 +
102831 +    if (minor == DEV_FM_MINOR_BASE)
102832 +        file->private_data = p_LnxWrpFmDev;
102833 +    else if (minor == DEV_FM_PCD_MINOR_BASE)
102834 +        file->private_data = p_LnxWrpFmDev;
102835 +    else {
102836 +        if (minor == DEV_FM_OH_PORTS_MINOR_BASE)
102837 +            p_LnxWrpFmPortDev = &p_LnxWrpFmDev->hcPort;
102838 +        else if ((minor > DEV_FM_OH_PORTS_MINOR_BASE) && (minor < DEV_FM_RX_PORTS_MINOR_BASE))
102839 +            p_LnxWrpFmPortDev = &p_LnxWrpFmDev->opPorts[minor-DEV_FM_OH_PORTS_MINOR_BASE-1];
102840 +        else if ((minor >= DEV_FM_RX_PORTS_MINOR_BASE) && (minor < DEV_FM_TX_PORTS_MINOR_BASE))
102841 +            p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[minor-DEV_FM_RX_PORTS_MINOR_BASE];
102842 +        else if ((minor >= DEV_FM_TX_PORTS_MINOR_BASE) && (minor < DEV_FM_MAX_MINORS))
102843 +            p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[minor-DEV_FM_TX_PORTS_MINOR_BASE];
102844 +        else
102845 +            return -EINVAL;
102846 +
102847 +        /* if trying to open port, check if it initialized */
102848 +        if (!p_LnxWrpFmPortDev->h_Dev)
102849 +            return -ENODEV;
102850 +
102851 +        p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)fm_port_bind(p_LnxWrpFmPortDev->dev);
102852 +        file->private_data = p_LnxWrpFmPortDev;
102853 +        fm_unbind((struct fm *)p_LnxWrpFmDev);
102854 +    }
102855 +
102856 +    if (file->private_data == NULL)
102857 +         return -ENXIO;
102858 +
102859 +    return 0;
102860 +}
102861 +
102862 +static int fm_close(struct inode *inode, struct file *file)
102863 +{
102864 +    t_LnxWrpFmDev       *p_LnxWrpFmDev;
102865 +    t_LnxWrpFmPortDev   *p_LnxWrpFmPortDev;
102866 +    unsigned int        minor = iminor(inode);
102867 +    int                 err = 0;
102868 +
102869 +    DBG(TRACE, ("Closing minor - %d - ", minor));
102870 +
102871 +    if ((minor == DEV_FM_MINOR_BASE) ||
102872 +        (minor == DEV_FM_PCD_MINOR_BASE))
102873 +    {
102874 +        p_LnxWrpFmDev = (t_LnxWrpFmDev*)file->private_data;
102875 +        if (!p_LnxWrpFmDev)
102876 +            return -ENODEV;
102877 +        fm_unbind((struct fm *)p_LnxWrpFmDev);
102878 +    }
102879 +    else if (((minor >= DEV_FM_OH_PORTS_MINOR_BASE) && (minor < DEV_FM_RX_PORTS_MINOR_BASE)) ||
102880 +             ((minor >= DEV_FM_RX_PORTS_MINOR_BASE) && (minor < DEV_FM_TX_PORTS_MINOR_BASE)) ||
102881 +             ((minor >= DEV_FM_TX_PORTS_MINOR_BASE) && (minor < DEV_FM_MAX_MINORS)))
102882 +    {
102883 +        p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)file->private_data;
102884 +        if (!p_LnxWrpFmPortDev)
102885 +            return -ENODEV;
102886 +        fm_port_unbind((struct fm_port *)p_LnxWrpFmPortDev);
102887 +    }
102888 +
102889 +    return err;
102890 +}
102891 +
102892 +static int fm_ioctls(unsigned int minor, struct file *file, unsigned int cmd, unsigned long arg, bool compat)
102893 +{
102894 +    DBG(TRACE, ("IOCTL minor - %u, cmd - 0x%08x, arg - 0x%08lx \n", minor, cmd, arg));
102895 +
102896 +    if ((minor == DEV_FM_MINOR_BASE) ||
102897 +        (minor == DEV_FM_PCD_MINOR_BASE))
102898 +    {
102899 +        t_LnxWrpFmDev *p_LnxWrpFmDev = ((t_LnxWrpFmDev*)file->private_data);
102900 +        if (!p_LnxWrpFmDev)
102901 +            return -ENODEV;
102902 +        if (LnxwrpFmIOCTL(p_LnxWrpFmDev, cmd, arg, compat))
102903 +            return -EFAULT;
102904 +    }
102905 +    else if (((minor >= DEV_FM_OH_PORTS_MINOR_BASE) && (minor < DEV_FM_RX_PORTS_MINOR_BASE)) ||
102906 +             ((minor >= DEV_FM_RX_PORTS_MINOR_BASE) && (minor < DEV_FM_TX_PORTS_MINOR_BASE)) ||
102907 +             ((minor >= DEV_FM_TX_PORTS_MINOR_BASE) && (minor < DEV_FM_MAX_MINORS)))
102908 +    {
102909 +        t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = ((t_LnxWrpFmPortDev*)file->private_data);
102910 +        if (!p_LnxWrpFmPortDev)
102911 +            return -ENODEV;
102912 +        if (LnxwrpFmPortIOCTL(p_LnxWrpFmPortDev, cmd, arg, compat))
102913 +            return -EFAULT;
102914 +    }
102915 +    else
102916 +    {
102917 +        REPORT_ERROR(MINOR, E_INVALID_VALUE, ("minor"));
102918 +        return -ENODEV;
102919 +    }
102920 +
102921 +    return 0;
102922 +}
102923 +
102924 +#ifdef CONFIG_COMPAT
102925 +static long fm_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
102926 +{
102927 +    unsigned int minor = iminor(file->f_path.dentry->d_inode);
102928 +    long res;
102929 +
102930 +    fm_mutex_lock();
102931 +    res = fm_ioctls(minor, file, cmd, arg, true);
102932 +    fm_mutex_unlock();
102933 +
102934 +    return res;
102935 +}
102936 +#endif
102937 +
102938 +static long fm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
102939 +{
102940 +    unsigned int minor = iminor(file->f_path.dentry->d_inode);
102941 +    long res;
102942 +
102943 +    fm_mutex_lock();
102944 +    res = fm_ioctls(minor, file, cmd, arg, false);
102945 +    fm_mutex_unlock();
102946 +
102947 +    return res;
102948 +}
102949 +
102950 +/* Globals for FM character device */
102951 +struct file_operations fm_fops =
102952 +{
102953 +    .owner =            THIS_MODULE,
102954 +    .unlocked_ioctl =   fm_ioctl,
102955 +#ifdef CONFIG_COMPAT
102956 +    .compat_ioctl =     fm_compat_ioctl,
102957 +#endif
102958 +    .open =             fm_open,
102959 +    .release =          fm_close,
102960 +};
102961 --- /dev/null
102962 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c
102963 @@ -0,0 +1,1297 @@
102964 +/*
102965 + * Copyright 2008-2012 Freescale Semiconductor Inc.
102966 + *
102967 + * Redistribution and use in source and binary forms, with or without
102968 + * modification, are permitted provided that the following conditions are met:
102969 + *     * Redistributions of source code must retain the above copyright
102970 + *       notice, this list of conditions and the following disclaimer.
102971 + *     * Redistributions in binary form must reproduce the above copyright
102972 + *       notice, this list of conditions and the following disclaimer in the
102973 + *       documentation and/or other materials provided with the distribution.
102974 + *     * Neither the name of Freescale Semiconductor nor the
102975 + *       names of its contributors may be used to endorse or promote products
102976 + *       derived from this software without specific prior written permission.
102977 + *
102978 + *
102979 + * ALTERNATIVELY, this software may be distributed under the terms of the
102980 + * GNU General Public License ("GPL") as published by the Free Software
102981 + * Foundation, either version 2 of that License or (at your option) any
102982 + * later version.
102983 + *
102984 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
102985 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
102986 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
102987 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
102988 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
102989 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
102990 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
102991 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
102992 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
102993 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
102994 + */
102995 +
102996 +/*
102997 + @File          lnxwrp_fm_compat_ioctls.c
102998 +
102999 + @Description   FM PCD compat functions
103000 +
103001 +*/
103002 +
103003 +#if !defined(CONFIG_COMPAT)
103004 +#error "missing COMPAT layer..."
103005 +#endif
103006 +
103007 +
103008 +#include <linux/kernel.h>
103009 +#include <linux/module.h>
103010 +#include <linux/fs.h>
103011 +#include <linux/cdev.h>
103012 +#include <linux/device.h>
103013 +#include <linux/irq.h>
103014 +#include <linux/interrupt.h>
103015 +#include <linux/io.h>
103016 +#include <linux/ioport.h>
103017 +#include <asm/uaccess.h>
103018 +#include <asm/errno.h>
103019 +#ifndef CONFIG_FMAN_ARM
103020 +#include <sysdev/fsl_soc.h>
103021 +#endif
103022 +
103023 +#include "part_ext.h"
103024 +#include "fm_ioctls.h"
103025 +#include "fm_pcd_ioctls.h"
103026 +#include "fm_port_ioctls.h"
103027 +#include "lnxwrp_ioctls_fm_compat.h"
103028 +
103029 +#if defined(FM_COMPAT_DBG)
103030 +static void hex_dump(void * p_addr, unsigned int size)
103031 +{
103032 +   int i;
103033 +
103034 +   for(i=0; i<size; i+=16)
103035 +   {
103036 +       printk("%p: 0x%08x 0x%08x 0x%08x 0x%08x\n", p_addr + i,
103037 +           *(unsigned int *)(p_addr + i),
103038 +           *(unsigned int *)(p_addr + i + 4),
103039 +           *(unsigned int *)(p_addr + i + 8),
103040 +           *(unsigned int *)(p_addr + i +12)
103041 +           );
103042 +   }
103043 +}
103044 +#endif
103045 +
103046 +/* maping kernel pointers w/ UserSpace id's { */
103047 +struct map_node {
103048 +    void *ptr;
103049 +    u8 node_type;
103050 +};
103051 +
103052 +static struct map_node compat_ptr2id_array[COMPAT_PTR2ID_ARRAY_MAX] = {{NULL},{FM_MAP_TYPE_UNSPEC}};
103053 +
103054 +void compat_del_ptr2id(void *p, enum fm_map_node_type node_type)
103055 +{
103056 +    compat_uptr_t k;
103057 +
103058 +    _fm_cpt_dbg(COMPAT_GENERIC, "delete (%p)\n", p);
103059 +
103060 +    for(k=1; k < COMPAT_PTR2ID_ARRAY_MAX; k++)
103061 +        if(compat_ptr2id_array[k].ptr == p){
103062 +            compat_ptr2id_array[k].ptr = NULL;
103063 +            compat_ptr2id_array[k].node_type = FM_MAP_TYPE_UNSPEC;
103064 +        }
103065 +}
103066 +EXPORT_SYMBOL(compat_del_ptr2id);
103067 +
103068 +compat_uptr_t compat_add_ptr2id(void *p, enum fm_map_node_type node_type)
103069 +{
103070 +    compat_uptr_t k;
103071 +
103072 +    _fm_cpt_dbg(COMPAT_GENERIC, " (%p) do ->\n", p);
103073 +
103074 +    if(!p)
103075 +        return 0;
103076 +
103077 +    for(k=1; k < COMPAT_PTR2ID_ARRAY_MAX; k++)
103078 +        if(compat_ptr2id_array[k].ptr == NULL)
103079 +        {
103080 +            compat_ptr2id_array[k].ptr = p;
103081 +            compat_ptr2id_array[k].node_type = node_type;
103082 +            _fm_cpt_dbg(COMPAT_GENERIC, "0x%08x \n", k | COMPAT_PTR2ID_WATERMARK);
103083 +            return k | COMPAT_PTR2ID_WATERMARK;
103084 +        }
103085 +
103086 +    printk(KERN_WARNING "FMan map list full! No more PCD space on kernel!\n");
103087 +    return 0;
103088 +}
103089 +EXPORT_SYMBOL(compat_add_ptr2id);
103090 +
103091 +compat_uptr_t compat_get_ptr2id(void *p, enum fm_map_node_type node_type)
103092 +{
103093 +    compat_uptr_t k;
103094 +
103095 +    _fm_cpt_dbg(COMPAT_GENERIC, " (%p) get -> \n", p);
103096 +
103097 +    for(k=1; k < COMPAT_PTR2ID_ARRAY_MAX; k++)
103098 +        if(compat_ptr2id_array[k].ptr == p &&
103099 +           compat_ptr2id_array[k].node_type == node_type) {
103100 +
103101 +            _fm_cpt_dbg(COMPAT_GENERIC, "0x%08x\n", k | COMPAT_PTR2ID_WATERMARK);
103102 +            return k | COMPAT_PTR2ID_WATERMARK;
103103 +        }
103104 +
103105 +    return 0;
103106 +}
103107 +EXPORT_SYMBOL(compat_get_ptr2id);
103108 +
103109 +void *compat_get_id2ptr(compat_uptr_t comp, enum fm_map_node_type node_type)
103110 +{
103111 +
103112 +    _fm_cpt_dbg(COMPAT_GENERIC, " (0x%08x) get -> \n", comp);
103113 +
103114 +    if((COMPAT_PTR2ID_WM_MASK & comp) != COMPAT_PTR2ID_WATERMARK) {
103115 +        _fm_cpt_dbg(COMPAT_GENERIC, "Error, invalid watermark (0x%08x)!\n\n", comp);
103116 +        dump_stack();
103117 +        return compat_ptr(comp);
103118 +    }
103119 +
103120 +    comp &= ~COMPAT_PTR2ID_WM_MASK;
103121 +
103122 +    if(((0 < comp) && (comp < COMPAT_PTR2ID_ARRAY_MAX) && (compat_ptr2id_array[comp].ptr != NULL)
103123 +                && compat_ptr2id_array[comp].node_type == node_type)) {
103124 +        _fm_cpt_dbg(COMPAT_GENERIC, "%p\n", compat_ptr2id_array[comp].ptr);
103125 +        return compat_ptr2id_array[comp].ptr;
103126 +    }
103127 +    return NULL;
103128 +}
103129 +EXPORT_SYMBOL(compat_get_id2ptr);
103130 +/* } maping kernel pointers w/ UserSpace id's  */
103131 +
103132 +void compat_obj_delete(
103133 +       ioc_compat_fm_obj_t *compat_id,
103134 +       ioc_fm_obj_t *id)
103135 +{
103136 +       id->obj = compat_pcd_id2ptr(compat_id->obj);
103137 +       compat_del_ptr2id(id->obj, FM_MAP_TYPE_PCD_NODE);
103138 +}
103139 +
103140 +static inline void compat_copy_fm_pcd_plcr_next_engine(
103141 +        ioc_compat_fm_pcd_plcr_next_engine_params_u *compat_param,
103142 +        ioc_fm_pcd_plcr_next_engine_params_u        *param,
103143 +        ioc_fm_pcd_engine                           next_engine,
103144 +        uint8_t                                     compat)
103145 +{
103146 +    _fm_cpt_dbg (compat, " {->...\n");
103147 +
103148 +    switch (next_engine)
103149 +    {
103150 +        case e_IOC_FM_PCD_PLCR:
103151 +            if (compat == COMPAT_US_TO_K)
103152 +                param->p_profile = compat_pcd_id2ptr(compat_param->p_profile);
103153 +            else
103154 +                compat_param->p_profile = compat_pcd_ptr2id(param->p_profile);
103155 +        break;
103156 +        case e_IOC_FM_PCD_KG:
103157 +            if (compat == COMPAT_US_TO_K)
103158 +                param->p_direct_scheme = compat_pcd_id2ptr(compat_param->p_direct_scheme);
103159 +            else
103160 +                compat_param->p_direct_scheme = compat_pcd_ptr2id(param->p_direct_scheme);
103161 +        break;
103162 +        default:
103163 +            if (compat == COMPAT_US_TO_K)
103164 +                param->action = compat_param->action;
103165 +            else
103166 +                compat_param->action = param->action;
103167 +        break;
103168 +    }
103169 +
103170 +    _fm_cpt_dbg (compat, " ...->}\n");
103171 +}
103172 +
103173 +void compat_copy_fm_pcd_plcr_profile(
103174 +        ioc_compat_fm_pcd_plcr_profile_params_t *compat_param,
103175 +        ioc_fm_pcd_plcr_profile_params_t        *param,
103176 +        uint8_t                                 compat)
103177 +{
103178 +    _fm_cpt_dbg (compat, " {->...\n");
103179 +
103180 +    if (compat == COMPAT_US_TO_K)
103181 +    {
103182 +        param->modify = compat_param->modify;
103183 +
103184 +        /* profile_select */
103185 +        if (!compat_param->modify)
103186 +        {
103187 +            param->profile_select.new_params.profile_type =
103188 +                compat_param->profile_select.new_params.profile_type;
103189 +            param->profile_select.new_params.p_fm_port =
103190 +                compat_ptr(compat_param->profile_select.new_params.p_fm_port);
103191 +            param->profile_select.new_params.relative_profile_id =
103192 +                compat_param->profile_select.new_params.relative_profile_id;
103193 +        }
103194 +        else
103195 +            param->profile_select.p_profile =
103196 +                compat_pcd_id2ptr(compat_param->profile_select.p_profile);
103197 +
103198 +        param->alg_selection    = compat_param->alg_selection;
103199 +        param->color_mode       = compat_param->color_mode;
103200 +
103201 +        /* both parameters in the union has the same size, so memcpy works */
103202 +        memcpy(&param->color, &compat_param->color, sizeof(param->color));
103203 +
103204 +        memcpy(&param->non_passthrough_alg_param,
103205 +               &compat_param->non_passthrough_alg_param,
103206 +               sizeof(ioc_fm_pcd_plcr_non_passthrough_alg_param_t));
103207 +
103208 +        param->next_engine_on_green = compat_param->next_engine_on_green;
103209 +        param->next_engine_on_yellow = compat_param->next_engine_on_yellow;
103210 +        param->next_engine_on_red = compat_param->next_engine_on_red;
103211 +
103212 +        param->trap_profile_on_flow_A = compat_param->trap_profile_on_flow_A;
103213 +        param->trap_profile_on_flow_B = compat_param->trap_profile_on_flow_B;
103214 +        param->trap_profile_on_flow_C = compat_param->trap_profile_on_flow_C;
103215 +    }
103216 +    else
103217 +    {
103218 +        compat_param->modify = param->modify;
103219 +
103220 +        /* profile_select */
103221 +        if (!param->modify)
103222 +        {
103223 +            compat_param->profile_select.new_params.profile_type =
103224 +                param->profile_select.new_params.profile_type;
103225 +            compat_param->profile_select.new_params.p_fm_port =
103226 +                ptr_to_compat(param->profile_select.new_params.p_fm_port);
103227 +            compat_param->profile_select.new_params.relative_profile_id =
103228 +                param->profile_select.new_params.relative_profile_id;
103229 +        }
103230 +        else
103231 +            compat_param->profile_select.p_profile =
103232 +                compat_pcd_ptr2id(param->profile_select.p_profile);
103233 +
103234 +        compat_param->alg_selection = param->alg_selection;
103235 +        compat_param->color_mode    = param->color_mode;
103236 +
103237 +        /* both parameters in the union has the same size, so memcpy works */
103238 +        memcpy(&compat_param->color, &param->color, sizeof(compat_param->color));
103239 +
103240 +        memcpy(&compat_param->non_passthrough_alg_param,
103241 +               &param->non_passthrough_alg_param,
103242 +               sizeof(ioc_fm_pcd_plcr_non_passthrough_alg_param_t));
103243 +
103244 +        compat_param->next_engine_on_green = param->next_engine_on_green;
103245 +        compat_param->next_engine_on_yellow = param->next_engine_on_yellow;
103246 +        compat_param->next_engine_on_red = param->next_engine_on_red;
103247 +
103248 +        compat_param->trap_profile_on_flow_A = param->trap_profile_on_flow_A;
103249 +        compat_param->trap_profile_on_flow_B = param->trap_profile_on_flow_B;
103250 +        compat_param->trap_profile_on_flow_C = param->trap_profile_on_flow_C;
103251 +
103252 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103253 +    }
103254 +
103255 +    compat_copy_fm_pcd_plcr_next_engine(&compat_param->params_on_green,
103256 +            &param->params_on_green, param->next_engine_on_green, compat);
103257 +
103258 +    compat_copy_fm_pcd_plcr_next_engine(&compat_param->params_on_yellow,
103259 +            &param->params_on_yellow, param->next_engine_on_yellow, compat);
103260 +
103261 +    compat_copy_fm_pcd_plcr_next_engine(&compat_param->params_on_red,
103262 +            &param->params_on_red, param->next_engine_on_red, compat);
103263 +
103264 +    _fm_cpt_dbg (compat, " ...->}\n");
103265 +}
103266 +
103267 +static inline void compat_copy_fm_pcd_cc_next_kg(
103268 +        ioc_compat_fm_pcd_cc_next_kg_params_t   *compat_param,
103269 +        ioc_fm_pcd_cc_next_kg_params_t          *param,
103270 +        uint8_t                                 compat)
103271 +{
103272 +    _fm_cpt_dbg (compat, " {->...\n");
103273 +
103274 +    if (compat == COMPAT_US_TO_K)
103275 +    {
103276 +        param->new_fqid         = compat_param->new_fqid;
103277 +        param->override_fqid    = compat_param->override_fqid;
103278 +#if DPAA_VERSION >= 11
103279 +        param->new_relative_storage_profile_id = compat_param->new_relative_storage_profile_id;
103280 +#endif
103281 +        param->p_direct_scheme  = compat_pcd_id2ptr(compat_param->p_direct_scheme);
103282 +    }
103283 +    else
103284 +    {
103285 +        compat_param->new_fqid          = param->new_fqid;
103286 +        compat_param->override_fqid     = param->override_fqid;
103287 +#if DPAA_VERSION >= 11
103288 +        compat_param->new_relative_storage_profile_id = param->new_relative_storage_profile_id;
103289 +#endif
103290 +        compat_param->p_direct_scheme   = compat_pcd_ptr2id(param->p_direct_scheme);
103291 +    }
103292 +
103293 +    _fm_cpt_dbg (compat, " ...->}\n");
103294 +}
103295 +
103296 +static inline void compat_copy_fm_pcd_cc_next_cc(
103297 +        ioc_compat_fm_pcd_cc_next_cc_params_t   *compat_param,
103298 +        ioc_fm_pcd_cc_next_cc_params_t          *param,
103299 +        uint8_t                                 compat)
103300 +{
103301 +    _fm_cpt_dbg (compat, " {->...\n");
103302 +
103303 +    if (compat == COMPAT_US_TO_K)
103304 +        param->cc_node_id = compat_pcd_id2ptr(compat_param->cc_node_id);
103305 +    else
103306 +        compat_param->cc_node_id = compat_pcd_ptr2id(param->cc_node_id);
103307 +
103308 +    _fm_cpt_dbg (compat, " ...->}\n");
103309 +}
103310 +
103311 +static inline void compat_copy_fm_pcd_cc_next_engine(
103312 +        ioc_compat_fm_pcd_cc_next_engine_params_t   *compat_param,
103313 +        ioc_fm_pcd_cc_next_engine_params_t          *param,
103314 +        uint8_t                                     compat)
103315 +{
103316 +    _fm_cpt_dbg (compat, " {->...\n");
103317 +
103318 +    if (compat == COMPAT_US_TO_K)
103319 +    {
103320 +        param->next_engine = compat_param->next_engine;
103321 +        if (param->next_engine != e_IOC_FM_PCD_INVALID )
103322 +            _fm_cpt_dbg(compat, " param->next_engine = %i \n", param->next_engine);
103323 +
103324 +        switch (param->next_engine)
103325 +        {
103326 +#if DPAA_VERSION >= 11
103327 +            case e_IOC_FM_PCD_FR:
103328 +                param->params.fr_params.frm_replic_id = compat_pcd_id2ptr(compat_param->params.fr_params.frm_replic_id);
103329 +                break;
103330 +#endif /* DPAA_VERSION >= 11 */
103331 +            case e_IOC_FM_PCD_CC:
103332 +                param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
103333 +                compat_copy_fm_pcd_cc_next_cc(&compat_param->params.cc_params, &param->params.cc_params, compat);
103334 +                break;
103335 +            case e_IOC_FM_PCD_KG:
103336 +                param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
103337 +                compat_copy_fm_pcd_cc_next_kg(&compat_param->params.kg_params, &param->params.kg_params, compat);
103338 +                break;
103339 +            case e_IOC_FM_PCD_DONE:
103340 +            case e_IOC_FM_PCD_PLCR:
103341 +                param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
103342 +            default:
103343 +                memcpy(&param->params, &compat_param->params, sizeof(param->params));
103344 +        }
103345 +        param->statistics_en = compat_param->statistics_en;
103346 +    }
103347 +    else
103348 +    {
103349 +        compat_param->next_engine = param->next_engine;
103350 +
103351 +        switch (compat_param->next_engine)
103352 +        {
103353 +#if DPAA_VERSION >= 11
103354 +            case e_IOC_FM_PCD_FR:
103355 +                compat_param->params.fr_params.frm_replic_id = compat_pcd_ptr2id(param->params.fr_params.frm_replic_id);
103356 +                break;
103357 +#endif /* DPAA_VERSION >= 11 */
103358 +            case e_IOC_FM_PCD_CC:
103359 +                compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
103360 +                compat_copy_fm_pcd_cc_next_cc(&compat_param->params.cc_params, &param->params.cc_params, compat);
103361 +                break;
103362 +            case e_IOC_FM_PCD_KG:
103363 +                compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
103364 +                compat_copy_fm_pcd_cc_next_kg(&compat_param->params.kg_params, &param->params.kg_params, compat);
103365 +                break;
103366 +            case e_IOC_FM_PCD_DONE:
103367 +            case e_IOC_FM_PCD_PLCR:
103368 +                compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
103369 +            default:
103370 +                memcpy(&compat_param->params, &param->params, sizeof(compat_param->params));
103371 +        }
103372 +        compat_param->statistics_en = param->statistics_en;
103373 +    }
103374 +
103375 +    _fm_cpt_dbg (compat, " ...->}\n");
103376 +}
103377 +
103378 +void compat_copy_fm_pcd_cc_key(
103379 +        ioc_compat_fm_pcd_cc_key_params_t   *compat_param,
103380 +        ioc_fm_pcd_cc_key_params_t          *param,
103381 +        uint8_t                             compat)
103382 +{
103383 +    if (compat == COMPAT_US_TO_K)
103384 +    {
103385 +        param->p_key = compat_ptr(compat_param->p_key);
103386 +        param->p_mask = compat_ptr(compat_param->p_mask);
103387 +    }
103388 +    else
103389 +    {
103390 +        compat_param->p_key = ptr_to_compat(param->p_key);
103391 +        compat_param->p_mask = ptr_to_compat(param->p_mask);
103392 +    }
103393 +
103394 +    compat_copy_fm_pcd_cc_next_engine(
103395 +            &compat_param->cc_next_engine_params,
103396 +            &param->cc_next_engine_params,
103397 +            compat);
103398 +}
103399 +
103400 +void compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(
103401 +        ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t   *compat_param,
103402 +        ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t          *param,
103403 +        uint8_t                                                         compat)
103404 +{
103405 +    if (compat == COMPAT_US_TO_K)
103406 +    {
103407 +        param->id       = compat_pcd_id2ptr(compat_param->id);
103408 +        param->key_indx = compat_param->key_indx;
103409 +        param->key_size = compat_param->key_size;
103410 +        compat_copy_fm_pcd_cc_key(
103411 +            &compat_param->key_params,
103412 +            &param->key_params,
103413 +            compat);
103414 +    }
103415 +    else
103416 +    {
103417 +        compat_param->id       = compat_pcd_ptr2id(param->id);
103418 +        compat_param->key_indx = param->key_indx;
103419 +        compat_param->key_size = param->key_size;
103420 +        compat_copy_fm_pcd_cc_key(
103421 +            &compat_param->key_params,
103422 +            &param->key_params,
103423 +            compat);
103424 +    }
103425 +}
103426 +
103427 +void compat_copy_fm_pcd_cc_node_modify_next_engine(
103428 +        ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t   *compat_param,
103429 +        ioc_fm_pcd_cc_node_modify_next_engine_params_t          *param,
103430 +        uint8_t                                                 compat)
103431 +{
103432 +    if (compat == COMPAT_US_TO_K)
103433 +    {
103434 +        param->id       = compat_pcd_id2ptr(compat_param->id);
103435 +        param->key_indx = compat_param->key_indx;
103436 +        param->key_size = compat_param->key_size;
103437 +    }
103438 +    else
103439 +    {
103440 +        compat_param->id       = compat_pcd_ptr2id(param->id);
103441 +        compat_param->key_indx = param->key_indx;
103442 +        compat_param->key_size = param->key_size;
103443 +    }
103444 +
103445 +    compat_copy_fm_pcd_cc_next_engine(
103446 +            &compat_param->cc_next_engine_params,
103447 +            &param->cc_next_engine_params,
103448 +            compat);
103449 +}
103450 +
103451 +void compat_fm_pcd_cc_tree_modify_next_engine(
103452 +        ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t   *compat_param,
103453 +        ioc_fm_pcd_cc_tree_modify_next_engine_params_t          *param,
103454 +        uint8_t                                                 compat)
103455 +{
103456 +    if (compat == COMPAT_US_TO_K)
103457 +    {
103458 +        param->id       = compat_pcd_id2ptr(compat_param->id);
103459 +        param->grp_indx = compat_param->grp_indx;
103460 +        param->indx     = compat_param->indx;
103461 +    }
103462 +    else
103463 +    {
103464 +        compat_param->id       = compat_pcd_ptr2id(param->id);
103465 +        compat_param->grp_indx = param->grp_indx;
103466 +        compat_param->indx     = param->indx;
103467 +    }
103468 +
103469 +    compat_copy_fm_pcd_cc_next_engine(
103470 +            &compat_param->cc_next_engine_params,
103471 +            &param->cc_next_engine_params,
103472 +            compat);
103473 +}
103474 +
103475 +void compat_copy_fm_pcd_hash_table(
103476 +        ioc_compat_fm_pcd_hash_table_params_t *compat_param,
103477 +        ioc_fm_pcd_hash_table_params_t *param,
103478 +        uint8_t compat)
103479 +{
103480 +    if (compat == COMPAT_US_TO_K)
103481 +    {
103482 +        param->max_num_of_keys  = compat_param->max_num_of_keys;
103483 +        param->statistics_mode  = compat_param->statistics_mode;
103484 +        param->kg_hash_shift    = compat_param->kg_hash_shift;
103485 +        param->hash_res_mask    = compat_param->hash_res_mask;
103486 +        param->hash_shift       = compat_param->hash_shift;
103487 +        param->match_key_size   = compat_param->match_key_size;
103488 +        param->id               = compat_pcd_id2ptr(compat_param->id);
103489 +    }
103490 +    else
103491 +    {
103492 +        compat_param->max_num_of_keys  = param->max_num_of_keys;
103493 +        compat_param->statistics_mode  = param->statistics_mode;
103494 +        compat_param->kg_hash_shift    = param->kg_hash_shift;
103495 +        compat_param->hash_res_mask    = param->hash_res_mask;
103496 +        compat_param->hash_shift       = param->hash_shift;
103497 +        compat_param->match_key_size   = param->match_key_size;
103498 +
103499 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103500 +    }
103501 +
103502 +    compat_copy_fm_pcd_cc_next_engine(
103503 +            &compat_param->cc_next_engine_params_for_miss,
103504 +            &param->cc_next_engine_params_for_miss,
103505 +            compat);
103506 +}
103507 +
103508 +void compat_copy_fm_pcd_cc_grp(
103509 +        ioc_compat_fm_pcd_cc_grp_params_t *compat_param,
103510 +        ioc_fm_pcd_cc_grp_params_t *param,
103511 +        uint8_t compat)
103512 +{
103513 +    int k;
103514 +
103515 +    _fm_cpt_dbg (compat, " {->...\n");
103516 +
103517 +    if (compat == COMPAT_US_TO_K)
103518 +    {
103519 +        param->num_of_distinction_units = compat_param->num_of_distinction_units;
103520 +        memcpy(param->unit_ids, compat_param->unit_ids, IOC_FM_PCD_MAX_NUM_OF_CC_UNITS);
103521 +    }
103522 +    else
103523 +    {
103524 +        compat_param->num_of_distinction_units = param->num_of_distinction_units;
103525 +        memcpy(compat_param->unit_ids, param->unit_ids, IOC_FM_PCD_MAX_NUM_OF_CC_UNITS);
103526 +    }
103527 +
103528 +    for (k=0; k < IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP; k++)
103529 +        compat_copy_fm_pcd_cc_next_engine(
103530 +                &compat_param->next_engine_per_entries_in_grp[k],
103531 +                &param->next_engine_per_entries_in_grp[k],
103532 +                compat);
103533 +
103534 +    _fm_cpt_dbg (compat, " ...->}\n");
103535 +}
103536 +
103537 +void compat_copy_fm_pcd_cc_tree(
103538 +        ioc_compat_fm_pcd_cc_tree_params_t *compat_param,
103539 +        ioc_fm_pcd_cc_tree_params_t *param,
103540 +        uint8_t compat)
103541 +{
103542 +    int k;
103543 +    _fm_cpt_dbg (compat, " {->...\n");
103544 +
103545 +    if (compat == COMPAT_US_TO_K)
103546 +    {
103547 +        param->net_env_id = compat_pcd_id2ptr(compat_param->net_env_id);
103548 +        param->num_of_groups = compat_param->num_of_groups;
103549 +    }
103550 +    else
103551 +    {
103552 +        compat_param->net_env_id = compat_pcd_ptr2id(param->net_env_id);
103553 +        compat_param->num_of_groups = param->num_of_groups;
103554 +
103555 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103556 +    }
103557 +
103558 +    for (k=0; k < IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS; k++)
103559 +        compat_copy_fm_pcd_cc_grp(
103560 +                &compat_param->fm_pcd_cc_group_params[k],
103561 +                &param->fm_pcd_cc_group_params[k],
103562 +                compat);
103563 +
103564 +    _fm_cpt_dbg (compat, " ...->}\n");
103565 +}
103566 +
103567 +void compat_fm_pcd_prs_sw(
103568 +        ioc_compat_fm_pcd_prs_sw_params_t *compat_param,
103569 +        ioc_fm_pcd_prs_sw_params_t *param,
103570 +        uint8_t compat)
103571 +{
103572 +    if (compat == COMPAT_US_TO_K)
103573 +    {
103574 +        param->override = compat_param->override;
103575 +        param->size = compat_param->size;
103576 +        param->base = compat_param->base;
103577 +        param->p_code = compat_ptr(compat_param->p_code);
103578 +        memcpy(param->sw_prs_data_params,compat_param->sw_prs_data_params,IOC_FM_PCD_PRS_NUM_OF_HDRS*sizeof(uint32_t));
103579 +        param->num_of_labels = compat_param->num_of_labels;
103580 +        memcpy(param->labels_table,compat_param->labels_table,IOC_FM_PCD_PRS_NUM_OF_LABELS*sizeof(ioc_fm_pcd_prs_label_params_t));
103581 +    }
103582 +}
103583 +
103584 +void compat_copy_fm_pcd_kg_scheme(
103585 +        ioc_compat_fm_pcd_kg_scheme_params_t    *compat_param,
103586 +        ioc_fm_pcd_kg_scheme_params_t           *param,
103587 +        uint8_t                                 compat)
103588 +{
103589 +    _fm_cpt_dbg(compat," {->...\n");
103590 +
103591 +    if (compat == COMPAT_US_TO_K)
103592 +    {
103593 +        param->modify = compat_param->modify;
103594 +
103595 +        /* scm_id */
103596 +        if (compat_param->modify)
103597 +        {
103598 +            param->scm_id.scheme_id = compat_pcd_id2ptr(compat_param->scm_id.scheme_id);
103599 +            _fm_cpt_dbg(compat," param->scm_id.scheme_id = %p \n", param->scm_id.scheme_id);
103600 +        }
103601 +        else
103602 +            param->scm_id.relative_scheme_id = compat_param->scm_id.relative_scheme_id;
103603 +
103604 +        param->always_direct = compat_param->always_direct;
103605 +        /* net_env_params */
103606 +        param->net_env_params.net_env_id = compat_pcd_id2ptr(compat_param->net_env_params.net_env_id);
103607 +        param->net_env_params.num_of_distinction_units = compat_param->net_env_params.num_of_distinction_units;
103608 +        memcpy(param->net_env_params.unit_ids,
103609 +                compat_param->net_env_params.unit_ids,
103610 +                IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
103611 +
103612 +        param->use_hash = compat_param->use_hash;
103613 +        memcpy(&param->key_extract_and_hash_params,
103614 +               &compat_param->key_extract_and_hash_params,
103615 +               sizeof(ioc_fm_pcd_kg_key_extract_and_hash_params_t));
103616 +        param->bypass_fqid_generation = compat_param->bypass_fqid_generation;
103617 +        param->base_fqid = compat_param->base_fqid;
103618 +#if DPAA_VERSION >= 11
103619 +        param->override_storage_profile =
103620 +                                 compat_param->override_storage_profile;
103621 +        param->storage_profile = compat_param->storage_profile;
103622 +#endif
103623 +        param->num_of_used_extracted_ors = compat_param->num_of_used_extracted_ors;
103624 +        memcpy(param->extracted_ors,
103625 +               compat_param->extracted_ors,
103626 +               IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS * sizeof(ioc_fm_pcd_kg_extracted_or_params_t));
103627 +        param->next_engine = compat_param->next_engine;
103628 +
103629 +        /* kg_next_engine_params */
103630 +        if (param->next_engine == e_IOC_FM_PCD_CC)
103631 +        {
103632 +            param->kg_next_engine_params.cc.tree_id   = compat_pcd_id2ptr(compat_param->kg_next_engine_params.cc.tree_id);
103633 +            param->kg_next_engine_params.cc.grp_id    = compat_param->kg_next_engine_params.cc.grp_id;
103634 +            param->kg_next_engine_params.cc.plcr_next = compat_param->kg_next_engine_params.cc.plcr_next;
103635 +            param->kg_next_engine_params.cc.bypass_plcr_profile_generation
103636 +                                                      = compat_param->kg_next_engine_params.cc.bypass_plcr_profile_generation;
103637 +            memcpy(&param->kg_next_engine_params.cc.plcr_profile,
103638 +                   &compat_param->kg_next_engine_params.cc.plcr_profile,
103639 +                   sizeof(ioc_fm_pcd_kg_plcr_profile_t));
103640 +        }
103641 +        else
103642 +            memcpy(&param->kg_next_engine_params,
103643 +                   &compat_param->kg_next_engine_params,
103644 +                   sizeof(param->kg_next_engine_params));
103645 +
103646 +        memcpy(&param->scheme_counter,
103647 +               &compat_param->scheme_counter,
103648 +               sizeof(ioc_fm_pcd_kg_scheme_counter_t));
103649 +    }
103650 +    else
103651 +    {
103652 +        compat_param->modify = param->modify;
103653 +
103654 +        /* scm_id */
103655 +        if (param->modify)
103656 +            compat_param->scm_id.scheme_id = compat_pcd_ptr2id(param->scm_id.scheme_id);
103657 +        else
103658 +            compat_param->scm_id.relative_scheme_id = param->scm_id.relative_scheme_id;
103659 +
103660 +        compat_param->always_direct = param->always_direct;
103661 +
103662 +        /* net_env_params */
103663 +        compat_param->net_env_params.net_env_id = compat_pcd_ptr2id(param->net_env_params.net_env_id);
103664 +        compat_param->net_env_params.num_of_distinction_units = param->net_env_params.num_of_distinction_units;
103665 +        memcpy(compat_param->net_env_params.unit_ids, param->net_env_params.unit_ids, IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
103666 +
103667 +        compat_param->use_hash = param->use_hash;
103668 +        memcpy(&compat_param->key_extract_and_hash_params, &param->key_extract_and_hash_params, sizeof(ioc_fm_pcd_kg_key_extract_and_hash_params_t));
103669 +        compat_param->bypass_fqid_generation = param->bypass_fqid_generation;
103670 +        compat_param->base_fqid = param->base_fqid;
103671 +#if DPAA_VERSION >= 11
103672 +        compat_param->override_storage_profile =
103673 +                                        param->override_storage_profile;
103674 +        compat_param->storage_profile =  param->storage_profile;
103675 +#endif
103676 +        compat_param->num_of_used_extracted_ors = param->num_of_used_extracted_ors;
103677 +        memcpy(compat_param->extracted_ors, param->extracted_ors, IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS * sizeof(ioc_fm_pcd_kg_extracted_or_params_t));
103678 +        compat_param->next_engine = param->next_engine;
103679 +
103680 +        /* kg_next_engine_params */
103681 +        if (compat_param->next_engine == e_IOC_FM_PCD_CC)
103682 +        {
103683 +            compat_param->kg_next_engine_params.cc.tree_id   = compat_pcd_ptr2id(param->kg_next_engine_params.cc.tree_id);
103684 +            compat_param->kg_next_engine_params.cc.grp_id    = param->kg_next_engine_params.cc.grp_id;
103685 +            compat_param->kg_next_engine_params.cc.plcr_next = param->kg_next_engine_params.cc.plcr_next;
103686 +            compat_param->kg_next_engine_params.cc.bypass_plcr_profile_generation
103687 +                                                             = param->kg_next_engine_params.cc.bypass_plcr_profile_generation;
103688 +            memcpy(&compat_param->kg_next_engine_params.cc.plcr_profile,
103689 +                   &param->kg_next_engine_params.cc.plcr_profile,
103690 +                   sizeof(ioc_fm_pcd_kg_plcr_profile_t));
103691 +        }
103692 +        else
103693 +            memcpy(&param->kg_next_engine_params, &compat_param->kg_next_engine_params, sizeof(compat_param->kg_next_engine_params));
103694 +
103695 +        memcpy(&compat_param->scheme_counter, &param->scheme_counter, sizeof(ioc_fm_pcd_kg_scheme_counter_t));
103696 +
103697 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103698 +    }
103699 +
103700 +    _fm_cpt_dbg(compat," ...->}\n");
103701 +}
103702 +
103703 +void compat_copy_fm_pcd_kg_scheme_spc(
103704 +        ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param,
103705 +        ioc_fm_pcd_kg_scheme_spc_t *param,
103706 +        uint8_t compat)
103707 +{
103708 +    if (compat == COMPAT_US_TO_K)
103709 +    {
103710 +        param->id = compat_pcd_id2ptr(compat_param->id);
103711 +        param->val = compat_param->val;
103712 +    } else {
103713 +        compat_param->id = compat_pcd_ptr2id(param->id);
103714 +        compat_param->val = param->val;
103715 +    }
103716 +}
103717 +
103718 +
103719 +void compat_copy_fm_pcd_kg_scheme_select(
103720 +        ioc_compat_fm_pcd_kg_scheme_select_t *compat_param,
103721 +        ioc_fm_pcd_kg_scheme_select_t *param,
103722 +        uint8_t compat)
103723 +{
103724 +    if (compat == COMPAT_US_TO_K)
103725 +    {
103726 +        param->direct = compat_param->direct;
103727 +        if (param->direct)
103728 +            param->scheme_id = compat_pcd_id2ptr(compat_param->scheme_id);
103729 +    }
103730 +}
103731 +
103732 +void compat_copy_fm_pcd_kg_schemes_params(
103733 +        ioc_compat_fm_pcd_port_schemes_params_t *compat_param,
103734 +        ioc_fm_pcd_port_schemes_params_t *param,
103735 +        uint8_t compat)
103736 +{
103737 +    int k;
103738 +
103739 +    if (compat == COMPAT_US_TO_K) {
103740 +        param->num_of_schemes = compat_param->num_of_schemes;
103741 +        for(k=0; k < compat_param->num_of_schemes; k++)
103742 +            param->scheme_ids[k] = compat_pcd_id2ptr(compat_param->scheme_ids[k]);
103743 +    }
103744 +}
103745 +
103746 +void compat_copy_fm_port_pcd_cc(
103747 +    ioc_compat_fm_port_pcd_cc_params_t *compat_cc_params ,
103748 +    ioc_fm_port_pcd_cc_params_t *p_cc_params,
103749 +    uint8_t compat)
103750 +{
103751 +    if (compat == COMPAT_US_TO_K){
103752 +        p_cc_params->cc_tree_id = compat_pcd_id2ptr(compat_cc_params->cc_tree_id);
103753 +    }
103754 +}
103755 +
103756 +void compat_copy_fm_port_pcd_kg(
103757 +        ioc_compat_fm_port_pcd_kg_params_t *compat_param,
103758 +        ioc_fm_port_pcd_kg_params_t *param,
103759 +        uint8_t compat)
103760 +{
103761 +    if (compat == COMPAT_US_TO_K){
103762 +        uint8_t k;
103763 +
103764 +        param->num_of_schemes = compat_param->num_of_schemes;
103765 +        for(k=0; k<compat_param->num_of_schemes; k++)
103766 +            param->scheme_ids[k] = compat_pcd_id2ptr(compat_param->scheme_ids[k]);
103767 +
103768 +        param->direct_scheme = compat_param->direct_scheme;
103769 +        if (param->direct_scheme)
103770 +            param->direct_scheme_id = compat_pcd_id2ptr(compat_param->direct_scheme_id);
103771 +    }
103772 +}
103773 +
103774 +void compat_copy_fm_port_pcd(
103775 +        ioc_compat_fm_port_pcd_params_t *compat_param,
103776 +        ioc_fm_port_pcd_params_t *param,
103777 +        uint8_t compat)
103778 +{
103779 +    if (compat == COMPAT_US_TO_K)
103780 +    {
103781 +        ioc_fm_port_pcd_prs_params_t         *same_port_pcd_prs_params;
103782 +        ioc_compat_fm_port_pcd_cc_params_t   *compat_port_pcd_cc_params;
103783 +        ioc_compat_fm_port_pcd_kg_params_t   *compat_port_pcd_kg_params;
103784 +        ioc_compat_fm_port_pcd_plcr_params_t *compat_port_pcd_plcr_params;
103785 +
103786 +        same_port_pcd_prs_params    = (ioc_fm_port_pcd_prs_params_t *) (compat_param + 1);
103787 +        compat_port_pcd_cc_params   = (ioc_compat_fm_port_pcd_cc_params_t *) (same_port_pcd_prs_params + 1);
103788 +        compat_port_pcd_kg_params   = (ioc_compat_fm_port_pcd_kg_params_t *) (compat_port_pcd_cc_params + 1);
103789 +        compat_port_pcd_plcr_params = (ioc_compat_fm_port_pcd_plcr_params_t *) (compat_port_pcd_kg_params + 1);
103790 +
103791 +        _fm_cpt_dbg(compat,"\n param->p_prs_params=%p \n", param->p_prs_params);
103792 +        _fm_cpt_dbg(compat," param->p_cc_params=%p  \n", param->p_cc_params);
103793 +        _fm_cpt_dbg(compat," param->p_kg_params=%p  \n", param->p_kg_params);
103794 +        _fm_cpt_dbg(compat," param->p_plcr_params=%p  \n", param->p_plcr_params);
103795 +        _fm_cpt_dbg(compat," param->p_ip_reassembly_manip=%p  \n", param->p_ip_reassembly_manip);
103796 +#if (DPAA_VERSION >= 11)
103797 +        _fm_cpt_dbg(compat," param->p_capwap_reassembly_manip=%p  \n", param->p_capwap_reassembly_manip);
103798 +#endif
103799 +        param->pcd_support = compat_param->pcd_support;
103800 +        param->net_env_id = compat_pcd_id2ptr(compat_param->net_env_id);
103801 +
103802 +        if (param->p_cc_params)
103803 +            compat_copy_fm_port_pcd_cc(compat_port_pcd_cc_params, param->p_cc_params, COMPAT_US_TO_K);
103804 +        if (param->p_kg_params)
103805 +            compat_copy_fm_port_pcd_kg(compat_port_pcd_kg_params, param->p_kg_params, COMPAT_US_TO_K);
103806 +        if (param->p_plcr_params)
103807 +            param->p_plcr_params->plcr_profile_id = compat_pcd_id2ptr(compat_port_pcd_plcr_params->plcr_profile_id);
103808 +        param->p_ip_reassembly_manip = compat_pcd_id2ptr(compat_param->p_ip_reassembly_manip);
103809 +#if (DPAA_VERSION >= 11)
103810 +        param->p_capwap_reassembly_manip = compat_pcd_id2ptr(compat_param->p_capwap_reassembly_manip);
103811 +#endif
103812 +    }
103813 +}
103814 +
103815 +void compat_copy_fm_port_pcd_modify_tree(
103816 +        ioc_compat_fm_obj_t *compat_id,
103817 +        ioc_fm_obj_t *id,
103818 +        uint8_t compat)
103819 +{
103820 +    if (compat == COMPAT_US_TO_K)
103821 +        id->obj = compat_pcd_id2ptr(compat_id->obj);
103822 +}
103823 +
103824 +#if (DPAA_VERSION >= 11)
103825 +void compat_copy_fm_port_vsp_alloc_params(
103826 +        ioc_compat_fm_port_vsp_alloc_params_t *compat_param,
103827 +        ioc_fm_port_vsp_alloc_params_t *param,
103828 +        uint8_t compat)
103829 +{
103830 +    if (compat == COMPAT_US_TO_K)
103831 +    {
103832 +        _fm_cpt_dbg(compat," param->p_fm_tx_port=%p  \n", param->p_fm_tx_port);
103833 +
103834 +        param->dflt_relative_id = compat_param->dflt_relative_id;
103835 +        param->num_of_profiles = compat_param->num_of_profiles;
103836 +        param->p_fm_tx_port = compat_pcd_id2ptr(compat_param->p_fm_tx_port);
103837 +    }
103838 +}
103839 +#endif /* (DPAA_VERSION >= 11) */
103840 +
103841 +void compat_copy_fm_pcd_cc_tbl_get_stats(
103842 +        ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param,
103843 +        ioc_fm_pcd_cc_tbl_get_stats_t *param,
103844 +        uint8_t compat)
103845 +{
103846 +    if (compat == COMPAT_US_TO_K)
103847 +    {
103848 +        param->id = compat_pcd_id2ptr(compat_param->id);
103849 +       param->key_index = compat_param->key_index;
103850 +        memcpy(&param->statistics, &compat_param->statistics, sizeof(ioc_fm_pcd_cc_key_statistics_t));
103851 +    } else {
103852 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103853 +       compat_param->key_index = param->key_index;
103854 +        memcpy(&compat_param->statistics, &param->statistics, sizeof(ioc_fm_pcd_cc_key_statistics_t));
103855 +    }
103856 +}
103857 +
103858 +
103859 +void compat_copy_fm_pcd_net_env(
103860 +        ioc_compat_fm_pcd_net_env_params_t *compat_param,
103861 +        ioc_fm_pcd_net_env_params_t *param,
103862 +        uint8_t compat)
103863 +{
103864 +    if (compat == COMPAT_US_TO_K)
103865 +    {
103866 +        param->num_of_distinction_units = compat_param->num_of_distinction_units;
103867 +        memcpy(param->units, compat_param->units, sizeof(ioc_fm_pcd_distinction_unit_t)*IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
103868 +        param->id = NULL; /* to avoid passing garbage to the kernel */
103869 +    }
103870 +    else
103871 +    {
103872 +        compat_param->num_of_distinction_units = param->num_of_distinction_units;
103873 +        memcpy(compat_param->units, param->units, sizeof(ioc_fm_pcd_distinction_unit_t)*IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
103874 +
103875 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103876 +    }
103877 +}
103878 +
103879 +void compat_copy_fm_pcd_cc_node_modify_key(
103880 +        ioc_compat_fm_pcd_cc_node_modify_key_params_t   *compat_param,
103881 +        ioc_fm_pcd_cc_node_modify_key_params_t          *param,
103882 +        uint8_t                                         compat)
103883 +{
103884 +    if (compat == COMPAT_US_TO_K)
103885 +    {
103886 +        param->key_indx = compat_param->key_indx;
103887 +        param->key_size = compat_param->key_size;
103888 +        param->p_key    = (uint8_t *)compat_ptr(compat_param->p_key);
103889 +        _fm_cpt_dbg(compat," param->p_key = %p \n", param->p_key);
103890 +        param->p_mask   = (uint8_t *)compat_ptr(compat_param->p_mask);
103891 +        _fm_cpt_dbg(compat," param->p_mask = %p\n", param->p_mask);
103892 +        param->id       = compat_pcd_id2ptr(compat_param->id);
103893 +        _fm_cpt_dbg(compat," param->id = %p \n", param->id);
103894 +    }
103895 +    else
103896 +    {
103897 +        compat_param->key_indx  = param->key_indx;
103898 +        compat_param->key_size  = param->key_size;
103899 +        compat_param->p_key     = ptr_to_compat((void *)param->p_key);
103900 +        compat_param->p_mask    = ptr_to_compat((void *)param->p_mask);
103901 +
103902 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103903 +    }
103904 +}
103905 +
103906 +void compat_copy_keys(
103907 +        ioc_compat_keys_params_t *compat_param,
103908 +        ioc_keys_params_t *param,
103909 +        uint8_t compat)
103910 +{
103911 +    int k = 0;
103912 +
103913 +    _fm_cpt_dbg(compat," {->...\n");
103914 +
103915 +    if (compat == COMPAT_US_TO_K) {
103916 +        param->max_num_of_keys = compat_param->max_num_of_keys;
103917 +        param->mask_support    = compat_param->mask_support;
103918 +        param->statistics_mode = compat_param->statistics_mode;
103919 +        param->num_of_keys     = compat_param->num_of_keys;
103920 +        param->key_size        = compat_param->key_size;
103921 +#if (DPAA_VERSION >= 11)
103922 +        memcpy(&param->frame_length_ranges,
103923 +                &compat_param->frame_length_ranges,
103924 +                sizeof(param->frame_length_ranges[0]) *
103925 +                    IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR);
103926 +#endif /* (DPAA_VERSION >= 11) */
103927 +    }
103928 +    else {
103929 +        compat_param->max_num_of_keys = param->max_num_of_keys;
103930 +        compat_param->mask_support    = param->mask_support;
103931 +        compat_param->statistics_mode = param->statistics_mode;
103932 +        compat_param->num_of_keys     = param->num_of_keys;
103933 +        compat_param->key_size        = param->key_size;
103934 +#if (DPAA_VERSION >= 11)
103935 +        memcpy(&compat_param->frame_length_ranges,
103936 +            &param->frame_length_ranges,
103937 +            sizeof(compat_param->frame_length_ranges[0]) *
103938 +                IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR);
103939 +#endif /* (DPAA_VERSION >= 11) */
103940 +    }
103941 +
103942 +    for (k=0; k < IOC_FM_PCD_MAX_NUM_OF_KEYS; k++)
103943 +        compat_copy_fm_pcd_cc_key(
103944 +            &compat_param->key_params[k],
103945 +            &param->key_params[k],
103946 +             compat);
103947 +
103948 +    compat_copy_fm_pcd_cc_next_engine(
103949 +            &compat_param->cc_next_engine_params_for_miss,
103950 +            &param->cc_next_engine_params_for_miss,
103951 +            compat);
103952 +
103953 +    _fm_cpt_dbg(compat," ...->}\n");
103954 +}
103955 +
103956 +void compat_copy_fm_pcd_cc_node(
103957 +        ioc_compat_fm_pcd_cc_node_params_t  *compat_param,
103958 +        ioc_fm_pcd_cc_node_params_t         *param,
103959 +        uint8_t                             compat)
103960 +{
103961 +    _fm_cpt_dbg(compat," {->...\n");
103962 +
103963 +    if (compat == COMPAT_US_TO_K)
103964 +        memcpy(&param->extract_cc_params, &compat_param->extract_cc_params, sizeof(ioc_fm_pcd_extract_entry_t));
103965 +
103966 +    else
103967 +    {
103968 +        compat_copy_keys(&compat_param->keys_params, &param->keys_params, compat);
103969 +
103970 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
103971 +        _fm_cpt_dbg(compat," param->id = %p \n", param->id);
103972 +    }
103973 +
103974 +    compat_copy_keys(&compat_param->keys_params, &param->keys_params, compat);
103975 +
103976 +    _fm_cpt_dbg(compat," ...->}\n");
103977 +}
103978 +
103979 +void compat_fm_pcd_manip_set_node(
103980 +        ioc_compat_fm_pcd_manip_params_t *compat_param,
103981 +        ioc_fm_pcd_manip_params_t *param,
103982 +        uint8_t compat)
103983 +{
103984 +    if (compat == COMPAT_US_TO_K) {
103985 +        param->type = compat_param->type;
103986 +        switch (param->type) {
103987 +            case e_IOC_FM_PCD_MANIP_HDR:
103988 +                param->u.hdr.rmv = compat_param->u.hdr.rmv;
103989 +                memcpy(&param->u.hdr.rmv_params,
103990 +                        &compat_param->u.hdr.rmv_params,
103991 +                        sizeof(param->u.hdr.rmv_params));
103992 +
103993 +                param->u.hdr.insrt = compat_param->u.hdr.insrt;
103994 +                param->u.hdr.insrt_params.type =
103995 +                    compat_param->u.hdr.insrt_params.type;
103996 +                switch (compat_param->u.hdr.insrt_params.type)
103997 +                {
103998 +                    case e_IOC_FM_PCD_MANIP_INSRT_GENERIC:
103999 +                        param->u.hdr.insrt_params.u.generic.offset =
104000 +                            compat_param->u.hdr.insrt_params.u.generic.offset;
104001 +                        param->u.hdr.insrt_params.u.generic.size =
104002 +                            compat_param->u.hdr.insrt_params.u.generic.size;
104003 +                        param->u.hdr.insrt_params.u.generic.replace =
104004 +                            compat_param->u.hdr.insrt_params.u.generic.replace;
104005 +                        param->u.hdr.insrt_params.u.generic.p_data =
104006 +                            compat_ptr(compat_param->u.hdr.insrt_params.u.generic.p_data);
104007 +                        break;
104008 +                    case e_IOC_FM_PCD_MANIP_INSRT_BY_HDR:
104009 +                        param->u.hdr.insrt_params.u.by_hdr.type =
104010 +                            compat_param->u.hdr.insrt_params.u.by_hdr.type;
104011 +                        param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.specific_l2 =
104012 +                            compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.specific_l2;
104013 +                        param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.update =
104014 +                            compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.update;
104015 +                        param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.size =
104016 +                            compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.size;
104017 +                        param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.p_data =
104018 +                            compat_ptr(compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.p_data);
104019 +                        break;
104020 +                    default:
104021 +                        _fm_cpt_err("Unsupported type: %d", compat_param->u.hdr.insrt_params.type);
104022 +                }
104023 +
104024 +                param->u.hdr.field_update = compat_param->u.hdr.field_update;
104025 +                memcpy(&param->u.hdr.field_update_params,
104026 +                        &compat_param->u.hdr.field_update_params,
104027 +                        sizeof(param->u.hdr.field_update_params));
104028 +
104029 +                param->u.hdr.custom = compat_param->u.hdr.custom;
104030 +                memcpy(&param->u.hdr.custom_params,
104031 +                        &compat_param->u.hdr.custom_params,
104032 +                        sizeof(param->u.hdr.custom_params));
104033 +
104034 +                param->u.hdr.dont_parse_after_manip =
104035 +                    compat_param->u.hdr.dont_parse_after_manip;
104036 +                break;
104037 +            case e_IOC_FM_PCD_MANIP_REASSEM:
104038 +                memcpy(&param->u.reassem, &compat_param->u.reassem, sizeof(param->u.reassem));
104039 +                break;
104040 +            case e_IOC_FM_PCD_MANIP_FRAG:
104041 +                memcpy(&param->u.frag, &compat_param->u.frag, sizeof(param->u.frag));
104042 +                break;
104043 +            case e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD:
104044 +                memcpy(&param->u.special_offload,
104045 +                       &compat_param->u.special_offload,
104046 +                       sizeof(param->u.special_offload));
104047 +            break;
104048 +        }
104049 +
104050 +        param->p_next_manip = compat_pcd_id2ptr(compat_param->p_next_manip);
104051 +        param->id = compat_pcd_id2ptr(compat_param->id);
104052 +    }
104053 +    else {
104054 +        compat_param->type = param->type;
104055 +        memcpy(&compat_param->u, &param->u, sizeof(compat_param->u));
104056 +
104057 +        if (param->type == e_IOC_FM_PCD_MANIP_HDR &&
104058 +            param->u.hdr.insrt_params.type == e_IOC_FM_PCD_MANIP_INSRT_GENERIC)
104059 +                compat_param->u.hdr.insrt_params.u.generic.p_data =
104060 +                    ptr_to_compat(param->u.hdr.insrt_params.u.generic.p_data);
104061 +
104062 +        compat_param->p_next_manip = compat_pcd_ptr2id(param->id);
104063 +        /* ... should be one that was added previously by the very call to
104064 +           compat_add_ptr2id() below: */
104065 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
104066 +    }
104067 +}
104068 +
104069 +void compat_copy_fm_pcd_manip_get_stats(
104070 +       ioc_compat_fm_pcd_manip_get_stats_t *compat_param,
104071 +       ioc_fm_pcd_manip_get_stats_t *param,
104072 +       uint8_t compat)
104073 +{
104074 +       _fm_cpt_dbg (compat, " {->...\n");
104075 +
104076 +       if (compat == COMPAT_US_TO_K)
104077 +       {
104078 +               param->id = compat_pcd_id2ptr(compat_param->id);
104079 +               memcpy(&param->stats, &compat_param->stats,
104080 +                                       sizeof(ioc_fm_pcd_manip_stats_t));
104081 +       }
104082 +       else
104083 +       {
104084 +               compat_param->id = compat_add_ptr2id(param->id,
104085 +                                FM_MAP_TYPE_PCD_NODE);
104086 +               memcpy(&compat_param->stats, &param->stats,
104087 +                                       sizeof(ioc_fm_pcd_manip_stats_t));
104088 +       }
104089 +
104090 +       _fm_cpt_dbg (compat, " ...->}\n");
104091 +}
104092 +
104093 +#if (DPAA_VERSION >= 11)
104094 +void compat_copy_fm_pcd_frm_replic_group_params(
104095 +       ioc_compat_fm_pcd_frm_replic_group_params_t *compat_param,
104096 +       ioc_fm_pcd_frm_replic_group_params_t *param,
104097 +       uint8_t compat)
104098 +{
104099 +       int k;
104100 +
104101 +       _fm_cpt_dbg (compat, " {->...\n");
104102 +
104103 +       if (compat == COMPAT_US_TO_K)
104104 +       {
104105 +               param->max_num_of_entries = compat_param->max_num_of_entries;
104106 +               param->num_of_entries = compat_param->num_of_entries;
104107 +               param->id = compat_pcd_id2ptr(compat_param->id);
104108 +       }
104109 +       else
104110 +       {
104111 +               compat_param->max_num_of_entries = param->max_num_of_entries;
104112 +               compat_param->num_of_entries = param->num_of_entries;
104113 +               compat_param->id = compat_add_ptr2id(param->id,
104114 +                               FM_MAP_TYPE_PCD_NODE);
104115 +       }
104116 +
104117 +       for (k=0; k < IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES; k++)
104118 +               compat_copy_fm_pcd_cc_next_engine(
104119 +                               &compat_param->next_engine_params[k],
104120 +                               &param->next_engine_params[k],
104121 +                               compat);
104122 +
104123 +       _fm_cpt_dbg (compat, " ...->}\n");
104124 +}
104125 +
104126 +void compat_copy_fm_pcd_frm_replic_member(
104127 +       ioc_compat_fm_pcd_frm_replic_member_t *compat_param,
104128 +       ioc_fm_pcd_frm_replic_member_t *param,
104129 +       uint8_t compat)
104130 +{
104131 +       _fm_cpt_dbg (compat, " {->...\n");
104132 +
104133 +       if (compat == COMPAT_US_TO_K)
104134 +       {
104135 +               param->h_replic_group = compat_pcd_id2ptr(compat_param->h_replic_group);
104136 +               param->member_index = compat_param->member_index;
104137 +       }
104138 +
104139 +       _fm_cpt_dbg (compat, " ...->}\n");
104140 +}
104141 +
104142 +void compat_copy_fm_pcd_frm_replic_member_params(
104143 +       ioc_compat_fm_pcd_frm_replic_member_params_t *compat_param,
104144 +       ioc_fm_pcd_frm_replic_member_params_t *param,
104145 +       uint8_t compat)
104146 +{
104147 +       _fm_cpt_dbg (compat, " {->...\n");
104148 +
104149 +       compat_copy_fm_pcd_frm_replic_member(&compat_param->member,
104150 +               &param->member, compat);
104151 +
104152 +       compat_copy_fm_pcd_cc_next_engine(&compat_param->next_engine_params,
104153 +               &param->next_engine_params, compat);
104154 +
104155 +       _fm_cpt_dbg (compat, " ...->}\n");
104156 +}
104157 +
104158 +void compat_copy_fm_vsp_params(
104159 +    ioc_compat_fm_vsp_params_t *compat_param,
104160 +    ioc_fm_vsp_params_t *param,
104161 +    uint8_t compat)
104162 +{
104163 +    _fm_cpt_dbg (compat, " {->...\n");
104164 +
104165 +    if (compat == COMPAT_US_TO_K)
104166 +    {
104167 +        memcpy(&param->ext_buf_pools, &compat_param->ext_buf_pools, sizeof(ioc_fm_ext_pools));
104168 +        param->liodn_offset = compat_param->liodn_offset;
104169 +        param->port_params.port_id = compat_param->port_params.port_id;
104170 +        param->port_params.port_type = compat_param->port_params.port_type;
104171 +        param->relative_profile_id = compat_param->relative_profile_id;
104172 +    }
104173 +    else
104174 +    {
104175 +        memcpy(&compat_param->ext_buf_pools, &param->ext_buf_pools, sizeof(ioc_fm_ext_pools));
104176 +        compat_param->liodn_offset = param->liodn_offset;
104177 +        compat_param->port_params.port_id = param->port_params.port_id;
104178 +        compat_param->port_params.port_type = param->port_params.port_type;
104179 +        compat_param->relative_profile_id = param->relative_profile_id;
104180 +        compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
104181 +    }
104182 +
104183 +    _fm_cpt_dbg (compat, " ...->}\n");
104184 +}
104185 +
104186 +void compat_copy_fm_buf_pool_depletion_params(
104187 +    ioc_compat_fm_buf_pool_depletion_params_t *compat_param,
104188 +    ioc_fm_buf_pool_depletion_params_t *param,
104189 +    uint8_t compat)
104190 +{
104191 +    _fm_cpt_dbg (compat, " {->...\n");
104192 +
104193 +    if (compat == COMPAT_US_TO_K)
104194 +    {
104195 +        param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
104196 +        memcpy(&param->fm_buf_pool_depletion,
104197 +                &compat_param->fm_buf_pool_depletion,
104198 +                sizeof(ioc_fm_buf_pool_depletion_t));
104199 +    }
104200 +
104201 +    _fm_cpt_dbg (compat, " ...->}\n");
104202 +}
104203 +
104204 +void compat_copy_fm_buffer_prefix_content_params(
104205 +    ioc_compat_fm_buffer_prefix_content_params_t *compat_param,
104206 +    ioc_fm_buffer_prefix_content_params_t *param,
104207 +    uint8_t compat)
104208 +{
104209 +    _fm_cpt_dbg (compat, " {->...\n");
104210 +
104211 +    if (compat == COMPAT_US_TO_K)
104212 +    {
104213 +        param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
104214 +        memcpy(&param->fm_buffer_prefix_content,
104215 +                &compat_param->fm_buffer_prefix_content,
104216 +                sizeof(ioc_fm_buffer_prefix_content_t));
104217 +    }
104218 +
104219 +    _fm_cpt_dbg (compat, " ...->}\n");
104220 +}
104221 +
104222 +void compat_copy_fm_vsp_config_no_sg_params(
104223 +    ioc_compat_fm_vsp_config_no_sg_params_t *compat_param,
104224 +    ioc_fm_vsp_config_no_sg_params_t *param,
104225 +    uint8_t compat)
104226 +{
104227 +    _fm_cpt_dbg (compat, " {->...\n");
104228 +
104229 +    if (compat == COMPAT_US_TO_K)
104230 +    {
104231 +        param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
104232 +        param->no_sg = compat_param->no_sg;
104233 +    }
104234 +
104235 +    _fm_cpt_dbg (compat, " ...->}\n");
104236 +}
104237 +
104238 +void compat_copy_fm_vsp_prs_result_params(
104239 +    ioc_compat_fm_vsp_prs_result_params_t *compat_param,
104240 +    ioc_fm_vsp_prs_result_params_t *param,
104241 +    uint8_t compat)
104242 +{
104243 +    _fm_cpt_dbg (compat, " {->...\n");
104244 +
104245 +    if (compat == COMPAT_US_TO_K)
104246 +    {
104247 +        param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
104248 +        /* p_data is an user-space pointer that needs to remain unmodified */
104249 +        param->p_data = (void *)(unsigned long long)compat_param->p_data;
104250 +    }
104251 +    else
104252 +    {
104253 +        compat_param->p_fm_vsp = compat_pcd_ptr2id(param->p_fm_vsp);
104254 +        /* p_data is an user-space pointer that needs to remain unmodified */
104255 +        compat_param->p_data = (compat_uptr_t)((unsigned long long)param->p_data & 0xFFFFFFFF);
104256 +    }
104257 +
104258 +    _fm_cpt_dbg (compat, " ...->}\n");
104259 +}
104260 +#endif /* (DPAA_VERSION >= 11) */
104261 --- /dev/null
104262 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h
104263 @@ -0,0 +1,755 @@
104264 +/*
104265 + * Copyright 2008-2012 Freescale Semiconductor Inc.
104266 + *
104267 + * Redistribution and use in source and binary forms, with or without
104268 + * modification, are permitted provided that the following conditions are met:
104269 + *     * Redistributions of source code must retain the above copyright
104270 + *       notice, this list of conditions and the following disclaimer.
104271 + *     * Redistributions in binary form must reproduce the above copyright
104272 + *       notice, this list of conditions and the following disclaimer in the
104273 + *       documentation and/or other materials provided with the distribution.
104274 + *     * Neither the name of Freescale Semiconductor nor the
104275 + *       names of its contributors may be used to endorse or promote products
104276 + *       derived from this software without specific prior written permission.
104277 + *
104278 + *
104279 + * ALTERNATIVELY, this software may be distributed under the terms of the
104280 + * GNU General Public License ("GPL") as published by the Free Software
104281 + * Foundation, either version 2 of that License or (at your option) any
104282 + * later version.
104283 + *
104284 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
104285 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
104286 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
104287 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
104288 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
104289 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
104290 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
104291 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
104292 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
104293 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
104294 + */
104295 +
104296 +/*
104297 + @File          lnxwrp_ioctls_fm_compat.h
104298 +
104299 + @Description   FM PCD compat structures definition.
104300 +
104301 +*/
104302 +
104303 +#ifndef __FM_COMPAT_IOCTLS_H
104304 +#define __FM_COMPAT_IOCTLS_H
104305 +
104306 +#include <linux/compat.h>
104307 +
104308 +#define COMPAT_K_TO_US 0 /* copy from Kernel to User */
104309 +#define COMPAT_US_TO_K 1 /* copy from User to Kernel */
104310 +#define COMPAT_GENERIC 2
104311 +
104312 +#define COMPAT_COPY_K2US(dest, src, type)      compat_copy_##type(src, dest, 0)
104313 +#define COMPAT_COPY_US2K(dest, src, type)      compat_copy_##type(dest, src, 1)
104314 +
104315 +/* mapping kernel pointers w/ UserSpace id's { */
104316 +/* Because compat_ptr(ptr_to_compat(X)) != X, this way we cannot exchange pointers
104317 +   back and forth (US - KS). compat_ptr is a cast and pointers are broken. */
104318 +#define COMPAT_PTR2ID_ARRAY_MAX (512+1) /* first location is not used */
104319 +#define COMPAT_PTR2ID_WATERMARK 0xface0000
104320 +#define COMPAT_PTR2ID_WM_MASK   0xffff0000
104321 +
104322 +/* define it for debug trace */
104323 +/*#define FM_COMPAT_DBG*/
104324 +
104325 +#define _fm_cpt_prk(stage, format, arg...)     \
104326 +       printk(stage "fm_cpt (cpu:%u): " format, raw_smp_processor_id(), ##arg)
104327 +
104328 +#define _fm_cpt_inf(format, arg...) _fm_cpt_prk(KERN_INFO, format, ##arg)
104329 +#define _fm_cpt_wrn(format, arg...) _fm_cpt_prk(KERN_WARNING, format, ##arg)
104330 +#define _fm_cpt_err(format, arg...) _fm_cpt_prk(KERN_ERR, format, ##arg)
104331 +
104332 +/* used for compat IOCTL debugging */
104333 +#if defined(FM_COMPAT_DBG)
104334 +       #define _fm_cpt_dbg(from, format, arg...) \
104335 +               do{ \
104336 +                       if (from == COMPAT_US_TO_K) \
104337 +                               printk("fm_cpt to KS [%s:%u](cpu:%u) - " format,        \
104338 +                                       __func__, __LINE__, raw_smp_processor_id(), ##arg); \
104339 +                       else if (from == COMPAT_K_TO_US) \
104340 +                               printk("fm_cpt to US [%s:%u](cpu:%u) - " format,        \
104341 +                                       __func__, __LINE__, raw_smp_processor_id(), ##arg); \
104342 +            else \
104343 +                printk("fm_cpt [%s:%u](cpu:%u) - " format,    \
104344 +                    __func__, __LINE__, raw_smp_processor_id(), ##arg); \
104345 +               }while(0)
104346 +#else
104347 +#      define _fm_cpt_dbg(arg...)
104348 +#endif
104349 +
104350 +/*TODO: per FMan module:
104351 + *
104352 + *      Parser:  FM_MAP_TYPE_PARSER_NODE,
104353 + *      Kg:      FM_MAP_TYPE_KG_NODE,
104354 + *      Policer: FM_MAP_TYPE_POLICER_NODE
104355 + *      Manip:   FM_MAP_TYPE_MANIP_NODE
104356 + **/
104357 +enum fm_map_node_type {
104358 +    FM_MAP_TYPE_UNSPEC = 0,
104359 +    FM_MAP_TYPE_PCD_NODE,
104360 +
104361 +    /* add types here, update the policy */
104362 +
104363 +    __FM_MAP_TYPE_AFTER_LAST,
104364 +    FM_MAP_TYPE_MAX = __FM_MAP_TYPE_AFTER_LAST - 1
104365 +};
104366 +
104367 +void compat_del_ptr2id(void *p, enum fm_map_node_type);
104368 +compat_uptr_t compat_add_ptr2id(void *p, enum fm_map_node_type);
104369 +compat_uptr_t compat_get_ptr2id(void *p, enum fm_map_node_type);
104370 +void *compat_get_id2ptr(compat_uptr_t comp, enum fm_map_node_type);
104371 +
104372 +static inline compat_uptr_t compat_pcd_ptr2id(void *ptr) {
104373 +    return (ptr)? compat_get_ptr2id(ptr, FM_MAP_TYPE_PCD_NODE)
104374 +                : (compat_uptr_t) 0;
104375 +}
104376 +
104377 +static inline void *compat_pcd_id2ptr(compat_uptr_t id) {
104378 +    return (id) ? compat_get_id2ptr(id, FM_MAP_TYPE_PCD_NODE)
104379 +                : NULL;
104380 +}
104381 +
104382 +/* other similar inlines may be added as new nodes are added
104383 +   to enum fm_map_node_type above... */
104384 +/* } mapping kernel pointers w/ UserSpace id's  */
104385 +
104386 +/* pcd compat structures { */
104387 +typedef struct ioc_compat_fm_pcd_cc_node_remove_key_params_t {
104388 +    compat_uptr_t                       id;
104389 +    uint16_t                            key_indx;
104390 +} ioc_compat_fm_pcd_cc_node_remove_key_params_t;
104391 +
104392 +typedef union ioc_compat_fm_pcd_plcr_next_engine_params_u {
104393 +        ioc_fm_pcd_done_action     action;
104394 +        compat_uptr_t              p_profile;
104395 +        compat_uptr_t              p_direct_scheme;
104396 +} ioc_compat_fm_pcd_plcr_next_engine_params_u;
104397 +
104398 +typedef struct ioc_compat_fm_pcd_plcr_profile_params_t {
104399 +    bool                                        modify;
104400 +    union {
104401 +        struct {
104402 +            ioc_fm_pcd_profile_type_selection   profile_type;
104403 +            compat_uptr_t                       p_fm_port;
104404 +            uint16_t                            relative_profile_id;
104405 +        } new_params;
104406 +        compat_uptr_t                           p_profile;
104407 +    } profile_select;
104408 +    ioc_fm_pcd_plcr_algorithm_selection         alg_selection;
104409 +    ioc_fm_pcd_plcr_color_mode                  color_mode;
104410 +
104411 +    union {
104412 +        ioc_fm_pcd_plcr_color                   dflt_color;
104413 +        ioc_fm_pcd_plcr_color                   override;
104414 +    } color;
104415 +
104416 +    ioc_fm_pcd_plcr_non_passthrough_alg_param_t non_passthrough_alg_param;
104417 +
104418 +    ioc_fm_pcd_engine                           next_engine_on_green;
104419 +    ioc_compat_fm_pcd_plcr_next_engine_params_u params_on_green;
104420 +
104421 +    ioc_fm_pcd_engine                           next_engine_on_yellow;
104422 +    ioc_compat_fm_pcd_plcr_next_engine_params_u params_on_yellow;
104423 +
104424 +    ioc_fm_pcd_engine                           next_engine_on_red;
104425 +    ioc_compat_fm_pcd_plcr_next_engine_params_u params_on_red;
104426 +
104427 +    bool                                        trap_profile_on_flow_A;
104428 +    bool                                        trap_profile_on_flow_B;
104429 +    bool                                        trap_profile_on_flow_C;
104430 +    compat_uptr_t                               id;
104431 +} ioc_compat_fm_pcd_plcr_profile_params_t;
104432 +
104433 +typedef struct ioc_compat_fm_obj_t {
104434 +    compat_uptr_t obj;
104435 +} ioc_compat_fm_obj_t;
104436 +
104437 +typedef struct ioc_compat_fm_pcd_kg_scheme_select_t {
104438 +    bool          direct;
104439 +    compat_uptr_t scheme_id;
104440 +} ioc_compat_fm_pcd_kg_scheme_select_t;
104441 +
104442 +typedef struct ioc_compat_fm_pcd_port_schemes_params_t {
104443 +    uint8_t        num_of_schemes;
104444 +    compat_uptr_t  scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];
104445 +} ioc_compat_fm_pcd_port_schemes_params_t;
104446 +
104447 +#if (DPAA_VERSION >= 11)
104448 +typedef struct ioc_compat_fm_port_vsp_alloc_params_t {
104449 +    uint8_t       num_of_profiles;          /**< Number of Virtual Storage Profiles */
104450 +    uint8_t      dflt_relative_id;         /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port
104451 +                                             The same default Virtual-Storage-Profile-id will be for coupled Tx port
104452 +                                             if relevant function called for Rx port */
104453 +    compat_uptr_t p_fm_tx_port;             /**< Handle to coupled Tx Port; not relevant for OP port. */
104454 +}ioc_compat_fm_port_vsp_alloc_params_t;
104455 +#endif /* (DPAA_VERSION >= 11) */
104456 +
104457 +typedef struct ioc_compat_fm_pcd_net_env_params_t {
104458 +    uint8_t                         num_of_distinction_units;
104459 +    ioc_fm_pcd_distinction_unit_t   units[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /* same structure*/
104460 +    compat_uptr_t                   id;
104461 +} ioc_compat_fm_pcd_net_env_params_t;
104462 +
104463 +typedef struct ioc_compat_fm_pcd_prs_sw_params_t {
104464 +    bool                            override;
104465 +    uint32_t                        size;
104466 +    uint16_t                        base;
104467 +    compat_uptr_t                   p_code;
104468 +    uint32_t                        sw_prs_data_params[IOC_FM_PCD_PRS_NUM_OF_HDRS];
104469 +    uint8_t                         num_of_labels;
104470 +    ioc_fm_pcd_prs_label_params_t   labels_table[IOC_FM_PCD_PRS_NUM_OF_LABELS];
104471 +} ioc_compat_fm_pcd_prs_sw_params_t;
104472 +
104473 +typedef struct ioc_compat_fm_pcd_cc_next_kg_params_t {
104474 +    bool          override_fqid;
104475 +    uint32_t      new_fqid;
104476 +#if DPAA_VERSION >= 11
104477 +    uint8_t       new_relative_storage_profile_id;
104478 +#endif
104479 +    compat_uptr_t p_direct_scheme;
104480 +} ioc_compat_fm_pcd_cc_next_kg_params_t;
104481 +
104482 +typedef struct ioc_compat_fm_pcd_cc_next_cc_params_t {
104483 +    compat_uptr_t       cc_node_id;
104484 +} ioc_compat_fm_pcd_cc_next_cc_params_t;
104485 +
104486 +#if DPAA_VERSION >= 11
104487 +typedef struct ioc_compat_fm_pcd_cc_next_fr_params_t {
104488 +    compat_uptr_t       frm_replic_id;
104489 +} ioc_compat_fm_pcd_cc_next_fr_params_t;
104490 +#endif /* DPAA_VERSION >= 11 */
104491 +
104492 +typedef struct ioc_compat_fm_pcd_cc_next_engine_params_t {
104493 +    ioc_fm_pcd_engine                          next_engine;
104494 +    union {
104495 +        ioc_compat_fm_pcd_cc_next_cc_params_t  cc_params;      /**< compat structure*/
104496 +        ioc_fm_pcd_cc_next_plcr_params_t       plcr_params;    /**< same structure*/
104497 +        ioc_fm_pcd_cc_next_enqueue_params_t    enqueue_params; /**< same structure*/
104498 +        ioc_compat_fm_pcd_cc_next_kg_params_t  kg_params;      /**< compat structure*/
104499 +#if DPAA_VERSION >= 11
104500 +        ioc_compat_fm_pcd_cc_next_fr_params_t  fr_params;      /**< compat structure*/
104501 +#endif /* DPAA_VERSION >= 11 */
104502 +    } params;
104503 +    compat_uptr_t                               manip_id;
104504 +    bool                                        statistics_en;
104505 +} ioc_compat_fm_pcd_cc_next_engine_params_t;
104506 +
104507 +typedef struct ioc_compat_fm_pcd_cc_grp_params_t {
104508 +    uint8_t                             num_of_distinction_units;
104509 +    uint8_t                             unit_ids [IOC_FM_PCD_MAX_NUM_OF_CC_UNITS];
104510 +    ioc_compat_fm_pcd_cc_next_engine_params_t  next_engine_per_entries_in_grp[IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP];
104511 +} ioc_compat_fm_pcd_cc_grp_params_t;
104512 +
104513 +typedef struct ioc_compat_fm_pcd_cc_tree_params_t {
104514 +    compat_uptr_t                   net_env_id;
104515 +    uint8_t                         num_of_groups;
104516 +    ioc_compat_fm_pcd_cc_grp_params_t      fm_pcd_cc_group_params [IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS];
104517 +    compat_uptr_t                   id;
104518 +} ioc_compat_fm_pcd_cc_tree_params_t;
104519 +
104520 +typedef struct ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t {
104521 +    compat_uptr_t                       id;
104522 +    uint8_t                             grp_indx;
104523 +    uint8_t                             indx;
104524 +    ioc_compat_fm_pcd_cc_next_engine_params_t  cc_next_engine_params;
104525 +} ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t;
104526 +
104527 +typedef struct ioc_compat_fm_pcd_cc_key_params_t {
104528 +    compat_uptr_t                              p_key;
104529 +    compat_uptr_t                              p_mask;
104530 +    ioc_compat_fm_pcd_cc_next_engine_params_t  cc_next_engine_params; /**< compat structure*/
104531 +} ioc_compat_fm_pcd_cc_key_params_t;
104532 +
104533 +typedef struct ioc_compat_keys_params_t {
104534 +    uint16_t                                   max_num_of_keys;
104535 +    bool                                       mask_support;
104536 +    ioc_fm_pcd_cc_stats_mode                   statistics_mode;
104537 +#if (DPAA_VERSION >= 11)
104538 +    uint16_t                                   frame_length_ranges[IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
104539 +#endif /* (DPAA_VERSION >= 11) */
104540 +    uint16_t                                   num_of_keys;
104541 +    uint8_t                                    key_size;
104542 +    ioc_compat_fm_pcd_cc_key_params_t          key_params[IOC_FM_PCD_MAX_NUM_OF_KEYS]; /**< compat structure*/
104543 +    ioc_compat_fm_pcd_cc_next_engine_params_t  cc_next_engine_params_for_miss;         /**< compat structure*/
104544 +} ioc_compat_keys_params_t;
104545 +
104546 +typedef struct ioc_compat_fm_pcd_cc_node_params_t {
104547 +    ioc_fm_pcd_extract_entry_t                 extract_cc_params;  /**< same structure*/
104548 +    ioc_compat_keys_params_t                   keys_params;        /**< compat structure*/
104549 +    compat_uptr_t                              id;
104550 +} ioc_compat_fm_pcd_cc_node_params_t;
104551 +
104552 +/**************************************************************************//**
104553 + @Description   Parameters for defining a hash table
104554 +*//***************************************************************************/
104555 +typedef struct ioc_compat_fm_pcd_hash_table_params_t {
104556 +    uint16_t                    max_num_of_keys;
104557 +    ioc_fm_pcd_cc_stats_mode    statistics_mode;
104558 +    uint8_t                     kg_hash_shift;
104559 +    uint16_t                    hash_res_mask;
104560 +    uint8_t                     hash_shift;
104561 +    uint8_t                     match_key_size;
104562 +    ioc_compat_fm_pcd_cc_next_engine_params_t   cc_next_engine_params_for_miss;
104563 +    compat_uptr_t               id;
104564 +} ioc_compat_fm_pcd_hash_table_params_t;
104565 +
104566 +typedef struct ioc_compat_fm_pcd_hash_table_add_key_params_t {
104567 +    compat_uptr_t                       p_hash_tbl;
104568 +    uint8_t                             key_size;
104569 +    ioc_compat_fm_pcd_cc_key_params_t   key_params;
104570 +} ioc_compat_fm_pcd_hash_table_add_key_params_t;
104571 +
104572 +typedef struct ioc_compat_fm_pcd_cc_node_modify_key_params_t {
104573 +    compat_uptr_t                       id;
104574 +    uint16_t                            key_indx;
104575 +    uint8_t                             key_size;
104576 +    compat_uptr_t                       p_key;
104577 +    compat_uptr_t                       p_mask;
104578 +} ioc_compat_fm_pcd_cc_node_modify_key_params_t;
104579 +
104580 +typedef struct ioc_compat_fm_pcd_hash_table_remove_key_params_t {
104581 +    compat_uptr_t   p_hash_tbl;
104582 +    uint8_t         key_size;
104583 +    compat_uptr_t   p_key;
104584 +} ioc_compat_fm_pcd_hash_table_remove_key_params_t;
104585 +
104586 +typedef struct ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t {
104587 +    compat_uptr_t                       id;
104588 +    uint16_t                            key_indx;
104589 +    uint8_t                             key_size;
104590 +    ioc_compat_fm_pcd_cc_key_params_t   key_params;
104591 +} ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t;
104592 +
104593 +typedef struct ioc_compat_fm_port_pcd_plcr_params_t {
104594 +    compat_uptr_t                plcr_profile_id;
104595 +} ioc_compat_fm_port_pcd_plcr_params_t;
104596 +
104597 +typedef struct ioc_compat_fm_port_pcd_cc_params_t {
104598 +    compat_uptr_t                cc_tree_id;
104599 +} ioc_compat_fm_port_pcd_cc_params_t;
104600 +
104601 +typedef struct ioc_compat_fm_port_pcd_kg_params_t {
104602 +    uint8_t             num_of_schemes;
104603 +    compat_uptr_t       scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];
104604 +    bool                direct_scheme;
104605 +    compat_uptr_t       direct_scheme_id;
104606 +} ioc_compat_fm_port_pcd_kg_params_t;
104607 +
104608 +typedef struct ioc_compat_fm_port_pcd_params_t {
104609 +    ioc_fm_port_pcd_support          pcd_support;
104610 +    compat_uptr_t                    net_env_id;
104611 +    compat_uptr_t                    p_prs_params;
104612 +    compat_uptr_t                    p_cc_params;
104613 +    compat_uptr_t                    p_kg_params;
104614 +    compat_uptr_t                    p_plcr_params;
104615 +    compat_uptr_t                    p_ip_reassembly_manip;
104616 +#if DPAA_VERSION >= 11
104617 +    compat_uptr_t                    p_capwap_reassembly_manip;
104618 +#endif
104619 +} ioc_compat_fm_port_pcd_params_t;
104620 +
104621 +typedef struct ioc_compat_fm_pcd_kg_cc_t {
104622 +    compat_uptr_t                   tree_id;
104623 +    uint8_t                         grp_id;
104624 +    bool                            plcr_next;
104625 +    bool                            bypass_plcr_profile_generation;
104626 +    ioc_fm_pcd_kg_plcr_profile_t    plcr_profile;
104627 +} ioc_compat_fm_pcd_kg_cc_t;
104628 +
104629 +typedef struct ioc_compat_fm_pcd_kg_scheme_params_t {
104630 +    bool                                modify;
104631 +    union {
104632 +        uint8_t                         relative_scheme_id;
104633 +        compat_uptr_t                   scheme_id;
104634 +    } scm_id;
104635 +    bool                                always_direct;
104636 +    struct {
104637 +        compat_uptr_t                   net_env_id;
104638 +        uint8_t                         num_of_distinction_units;
104639 +        uint8_t                         unit_ids[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
104640 +    } net_env_params;
104641 +    bool                                use_hash;
104642 +    ioc_fm_pcd_kg_key_extract_and_hash_params_t key_extract_and_hash_params;
104643 +    bool                                bypass_fqid_generation;
104644 +    uint32_t                            base_fqid;
104645 +    uint8_t                             num_of_used_extracted_ors;
104646 +    ioc_fm_pcd_kg_extracted_or_params_t extracted_ors[IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS];
104647 +#if DPAA_VERSION >= 11
104648 +    bool                                override_storage_profile;
104649 +    ioc_fm_pcd_kg_storage_profile_t     storage_profile;
104650 +#endif /* DPAA_VERSION >= 11 */
104651 +    ioc_fm_pcd_engine                   next_engine;
104652 +    union{
104653 +        ioc_fm_pcd_done_action          done_action;
104654 +        ioc_fm_pcd_kg_plcr_profile_t    plcr_profile;
104655 +        ioc_compat_fm_pcd_kg_cc_t       cc;
104656 +    } kg_next_engine_params;
104657 +    ioc_fm_pcd_kg_scheme_counter_t      scheme_counter;
104658 +    compat_uptr_t                       id;
104659 +} ioc_compat_fm_pcd_kg_scheme_params_t;
104660 +
104661 +typedef struct ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t {
104662 +    compat_uptr_t                       id;
104663 +    uint16_t                            key_indx;
104664 +    uint8_t                             key_size;
104665 +    ioc_compat_fm_pcd_cc_next_engine_params_t  cc_next_engine_params;
104666 +} ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t;
104667 +
104668 +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_generic_params_t {
104669 +    uint8_t                         offset;
104670 +    uint8_t                         size;
104671 +    bool                            replace;
104672 +    compat_uptr_t                   p_data;
104673 +} ioc_compat_fm_pcd_manip_hdr_insrt_generic_params_t;
104674 +
104675 +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_specific_l2_params_t {
104676 +    ioc_fm_pcd_manip_hdr_insrt_specific_l2  specific_l2;
104677 +    bool                                    update;
104678 +    uint8_t                                 size;
104679 +    compat_uptr_t                           p_data;
104680 +} ioc_compat_fm_pcd_manip_hdr_insrt_specific_l2_params_t;
104681 +
104682 +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_t {
104683 +    uint8_t       size;          /**< size of inserted section */
104684 +    compat_uptr_t p_data;        /**< data to be inserted */
104685 +} ioc_compat_fm_pcd_manip_hdr_insrt_t;
104686 +
104687 +#if (DPAA_VERSION >= 11)
104688 +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_ip_params_t {
104689 +    bool    calc_l4_checksum; /**< Calculate L4 checksum. */
104690 +    ioc_fm_pcd_manip_hdr_qos_mapping_mode   mapping_mode; /**< TODO */
104691 +    uint8_t last_pid_offset;     /**< the offset of the last Protocol within
104692 +                                 the inserted header */
104693 +    uint16_t  id;           /**< 16 bit New IP ID */
104694 +    bool                            dont_frag_overwrite;
104695 +    /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte.
104696 +     * This byte is configured to be overwritten when RPD is set. */
104697 +    uint8_t                         last_dst_offset;
104698 +    /**< IPv6 only. if routing extension exist, user should set the offset of the destination address
104699 +     * in order to calculate UDP checksum pseudo header;
104700 +     * Otherwise set it to '0'. */
104701 +    ioc_compat_fm_pcd_manip_hdr_insrt_t insrt; /**< size and data to be inserted. */
104702 +} ioc_compat_fm_pcd_manip_hdr_insrt_ip_params_t;
104703 +#endif /* (DPAA_VERSION >= 11) */
104704 +
104705 +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_by_hdr_params_t {
104706 +    ioc_fm_pcd_manip_hdr_insrt_by_hdr_type                      type;
104707 +    union {
104708 +       ioc_compat_fm_pcd_manip_hdr_insrt_specific_l2_params_t   specific_l2_params;
104709 +#if (DPAA_VERSION >= 11)
104710 +        ioc_compat_fm_pcd_manip_hdr_insrt_ip_params_t          ip_params;
104711 +        ioc_compat_fm_pcd_manip_hdr_insrt_t             insrt;
104712 +#endif /* (DPAA_VERSION >= 11) */
104713 +    } u;
104714 +} ioc_compat_fm_pcd_manip_hdr_insrt_by_hdr_params_t;
104715 +
104716 +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_params_t {
104717 +    ioc_fm_pcd_manip_hdr_insrt_type                         type;
104718 +    union {
104719 +        ioc_compat_fm_pcd_manip_hdr_insrt_by_hdr_params_t   by_hdr;
104720 +        ioc_compat_fm_pcd_manip_hdr_insrt_generic_params_t  generic;
104721 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
104722 +#error "FM_CAPWAP_SUPPORT feature not supported!"
104723 +        ioc_fm_pcd_manip_hdr_insrt_by_template_params_t     by_template;
104724 +#endif /* FM_CAPWAP_SUPPORT */
104725 +    } u;
104726 +} ioc_compat_fm_pcd_manip_hdr_insrt_params_t;
104727 +
104728 +typedef struct ioc_compat_fm_pcd_manip_hdr_params_t {
104729 +    bool                                        rmv;
104730 +    ioc_fm_pcd_manip_hdr_rmv_params_t           rmv_params;
104731 +    bool                                        insrt;
104732 +    ioc_compat_fm_pcd_manip_hdr_insrt_params_t  insrt_params;
104733 +    bool                                        field_update;
104734 +    ioc_fm_pcd_manip_hdr_field_update_params_t  field_update_params;
104735 +    bool                                        custom;
104736 +    ioc_fm_pcd_manip_hdr_custom_params_t        custom_params;
104737 +    bool                                        dont_parse_after_manip;
104738 +} ioc_compat_fm_pcd_manip_hdr_params_t;
104739 +
104740 +typedef struct ioc_compat_fm_pcd_manip_special_offload_params_t {
104741 +    bool    decryption;
104742 +    bool    ecn_copy;
104743 +    bool    dscp_copy;
104744 +    bool    variable_ip_hdr_len;
104745 +    bool    variable_ip_version;
104746 +    uint8_t outer_ip_hdr_len;
104747 +    uint16_t    arw_size;
104748 +    compat_uptr_t   arw_addr;
104749 +} ioc_compat_fm_pcd_manip_special_offload_params_t;
104750 +
104751 +typedef struct ioc_compat_fm_pcd_manip_params_t {
104752 +    ioc_fm_pcd_manip_type                         type;
104753 +    union {
104754 +        ioc_compat_fm_pcd_manip_hdr_params_t      hdr;
104755 +        ioc_fm_pcd_manip_reassem_params_t         reassem;
104756 +        ioc_fm_pcd_manip_frag_params_t            frag;
104757 +        ioc_compat_fm_pcd_manip_special_offload_params_t special_offload;
104758 +    } u;
104759 +    compat_uptr_t                                 p_next_manip;
104760 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
104761 +#error "FM_CAPWAP_SUPPORT feature not supported!"
104762 +    bool                                          frag_or_reasm;
104763 +    ioc_fm_pcd_manip_frag_or_reasm_params_t       frag_or_reasm_params;
104764 +#endif /* FM_CAPWAP_SUPPORT */
104765 +    compat_uptr_t                                 id;
104766 +} ioc_compat_fm_pcd_manip_params_t;
104767 +
104768 +typedef struct ioc_compat_fm_pcd_manip_get_stats_t {
104769 +       compat_uptr_t                   id;
104770 +       ioc_fm_pcd_manip_stats_t        stats;
104771 +} ioc_compat_fm_pcd_manip_get_stats_t;
104772 +
104773 +#if (DPAA_VERSION >= 11)
104774 +typedef struct ioc_compat_fm_pcd_frm_replic_group_params_t {
104775 +       uint8_t                     max_num_of_entries;
104776 +       uint8_t                     num_of_entries;
104777 +       ioc_compat_fm_pcd_cc_next_engine_params_t
104778 +               next_engine_params[IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES];
104779 +       compat_uptr_t               id;
104780 +} ioc_compat_fm_pcd_frm_replic_group_params_t;
104781 +
104782 +typedef struct ioc_compat_fm_pcd_frm_replic_member_t {
104783 +    compat_uptr_t       h_replic_group;
104784 +    uint16_t            member_index;
104785 +} ioc_compat_fm_pcd_frm_replic_member_t;
104786 +
104787 +typedef struct ioc_compat_fm_pcd_frm_replic_member_params_t {
104788 +    ioc_compat_fm_pcd_frm_replic_member_t       member;
104789 +    ioc_compat_fm_pcd_cc_next_engine_params_t          next_engine_params;
104790 +} ioc_compat_fm_pcd_frm_replic_member_params_t;
104791 +
104792 +typedef struct ioc_compat_fm_vsp_params_t {
104793 +    compat_uptr_t       p_fm;                 /**< A handle to the FM object this VSP related to */
104794 +    ioc_fm_ext_pools    ext_buf_pools;        /**< Which external buffer pools are used
104795 +                                                   (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes.
104796 +                                                   parameter associated with Rx / OP port */
104797 +    uint16_t            liodn_offset;         /**< VSP's LIODN offset */
104798 +    struct {
104799 +        ioc_fm_port_type port_type;           /**< Port type */
104800 +        uint8_t          port_id;             /**< Port Id - relative to type */
104801 +    } port_params;
104802 +    uint8_t             relative_profile_id;  /**< VSP Id - relative to VSP's range
104803 +                                                   defined in relevant FM object */
104804 +    compat_uptr_t       id;                 /**< return value */
104805 +} ioc_compat_fm_vsp_params_t;
104806 +
104807 +typedef struct ioc_compat_fm_buf_pool_depletion_params_t {
104808 +    compat_uptr_t p_fm_vsp;
104809 +    ioc_fm_buf_pool_depletion_t fm_buf_pool_depletion;
104810 +} ioc_compat_fm_buf_pool_depletion_params_t;
104811 +
104812 +typedef struct ioc_compat_fm_buffer_prefix_content_params_t {
104813 +    compat_uptr_t p_fm_vsp;
104814 +    ioc_fm_buffer_prefix_content_t fm_buffer_prefix_content;
104815 +} ioc_compat_fm_buffer_prefix_content_params_t;
104816 +
104817 +typedef struct ioc_compat_fm_vsp_config_no_sg_params_t {
104818 +    compat_uptr_t p_fm_vsp;
104819 +    bool no_sg;
104820 +} ioc_compat_fm_vsp_config_no_sg_params_t;
104821 +
104822 +typedef struct ioc_compat_fm_vsp_prs_result_params_t {
104823 +    compat_uptr_t p_fm_vsp;
104824 +    compat_uptr_t p_data;
104825 +} ioc_compat_fm_vsp_prs_result_params_t;
104826 +
104827 +#endif /* (DPAA_VERSION >= 11) */
104828 +typedef struct ioc_compat_fm_pcd_kg_scheme_spc_t {
104829 +    uint32_t        val;
104830 +    compat_uptr_t   id;
104831 +} ioc_compat_fm_pcd_kg_scheme_spc_t;
104832 +
104833 +typedef struct ioc_compat_fm_ctrl_mon_counters_params_t {
104834 +    uint8_t     fm_ctrl_index;
104835 +    compat_uptr_t p_mon;
104836 +} ioc_compat_fm_ctrl_mon_counters_params_t;
104837 +
104838 +typedef struct ioc_compat_fm_pcd_cc_tbl_get_stats_t {
104839 +    compat_uptr_t                   id;
104840 +    uint16_t                        key_index;
104841 +    ioc_fm_pcd_cc_key_statistics_t  statistics;
104842 +} ioc_compat_fm_pcd_cc_tbl_get_stats_t;
104843 +
104844 +
104845 +/* } pcd compat structures */
104846 +
104847 +void compat_obj_delete(
104848 +        ioc_compat_fm_obj_t *compat_id,
104849 +        ioc_fm_obj_t *id);
104850 +
104851 +/* pcd compat functions { */
104852 +void compat_copy_fm_pcd_plcr_profile(
104853 +        ioc_compat_fm_pcd_plcr_profile_params_t *compat_param,
104854 +        ioc_fm_pcd_plcr_profile_params_t *param,
104855 +        uint8_t compat);
104856 +
104857 +void compat_copy_fm_pcd_cc_key(
104858 +        ioc_compat_fm_pcd_cc_key_params_t *compat_param,
104859 +        ioc_fm_pcd_cc_key_params_t *param,
104860 +        uint8_t compat);
104861 +
104862 +void compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(
104863 +        ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param,
104864 +        ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param,
104865 +        uint8_t compat);
104866 +
104867 +void compat_copy_fm_pcd_cc_node_modify_next_engine(
104868 +        ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param,
104869 +        ioc_fm_pcd_cc_node_modify_next_engine_params_t *param,
104870 +        uint8_t compat);
104871 +
104872 +void compat_fm_pcd_cc_tree_modify_next_engine(
104873 +        ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *compat_param,
104874 +        ioc_fm_pcd_cc_tree_modify_next_engine_params_t *param,
104875 +        uint8_t compat);
104876 +
104877 +void compat_copy_fm_pcd_hash_table(
104878 +        ioc_compat_fm_pcd_hash_table_params_t *compat_param,
104879 +        ioc_fm_pcd_hash_table_params_t *param,
104880 +        uint8_t compat);
104881 +
104882 +void compat_copy_fm_pcd_cc_grp(
104883 +        ioc_compat_fm_pcd_cc_grp_params_t *compat_param,
104884 +        ioc_fm_pcd_cc_grp_params_t *param,
104885 +        uint8_t compat);
104886 +
104887 +void compat_copy_fm_pcd_cc_tree(
104888 +        ioc_compat_fm_pcd_cc_tree_params_t *compat_param,
104889 +        ioc_fm_pcd_cc_tree_params_t *param,
104890 +        uint8_t compat);
104891 +
104892 +void compat_copy_fm_pcd_cc_tbl_get_stats(
104893 +        ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param,
104894 +        ioc_fm_pcd_cc_tbl_get_stats_t *param,
104895 +        uint8_t compat);
104896 +
104897 +void compat_fm_pcd_prs_sw(
104898 +        ioc_compat_fm_pcd_prs_sw_params_t *compat_param,
104899 +        ioc_fm_pcd_prs_sw_params_t *param,
104900 +        uint8_t compat);
104901 +
104902 +void compat_copy_fm_pcd_kg_scheme(
104903 +        ioc_compat_fm_pcd_kg_scheme_params_t *compat_param,
104904 +        ioc_fm_pcd_kg_scheme_params_t *param,
104905 +        uint8_t compat);
104906 +
104907 +void compat_copy_fm_pcd_kg_scheme_select(
104908 +        ioc_compat_fm_pcd_kg_scheme_select_t *compat_param,
104909 +        ioc_fm_pcd_kg_scheme_select_t *param,
104910 +        uint8_t compat);
104911 +
104912 +void compat_copy_fm_pcd_kg_schemes_params(
104913 +        ioc_compat_fm_pcd_port_schemes_params_t *compat_param,
104914 +        ioc_fm_pcd_port_schemes_params_t *param,
104915 +        uint8_t compat);
104916 +
104917 +void compat_copy_fm_port_pcd_kg(
104918 +        ioc_compat_fm_port_pcd_kg_params_t *compat_param,
104919 +        ioc_fm_port_pcd_kg_params_t *param,
104920 +        uint8_t compat);
104921 +
104922 +void compat_copy_fm_port_pcd(
104923 +        ioc_compat_fm_port_pcd_params_t *compat_param,
104924 +        ioc_fm_port_pcd_params_t *param,
104925 +        uint8_t compat);
104926 +
104927 +#if (DPAA_VERSION >= 11)
104928 +void compat_copy_fm_port_vsp_alloc_params(
104929 +        ioc_compat_fm_port_vsp_alloc_params_t *compat_param,
104930 +        ioc_fm_port_vsp_alloc_params_t *param,
104931 +        uint8_t compat);
104932 +#endif /* (DPAA_VERSION >= 11) */
104933 +
104934 +void compat_copy_fm_pcd_net_env(
104935 +        ioc_compat_fm_pcd_net_env_params_t *compat_param,
104936 +        ioc_fm_pcd_net_env_params_t *param,
104937 +        uint8_t compat);
104938 +
104939 +void compat_copy_fm_pcd_cc_node_modify_key(
104940 +        ioc_compat_fm_pcd_cc_node_modify_key_params_t *compat_param,
104941 +        ioc_fm_pcd_cc_node_modify_key_params_t *param,
104942 +        uint8_t compat);
104943 +
104944 +void compat_copy_keys(
104945 +        ioc_compat_keys_params_t *compat_param,
104946 +        ioc_keys_params_t *param,
104947 +        uint8_t compat);
104948 +
104949 +void compat_copy_fm_pcd_cc_node(
104950 +        ioc_compat_fm_pcd_cc_node_params_t *compat_param,
104951 +        ioc_fm_pcd_cc_node_params_t *param,
104952 +        uint8_t compat);
104953 +
104954 +void compat_fm_pcd_manip_set_node(
104955 +        ioc_compat_fm_pcd_manip_params_t *compat_param,
104956 +        ioc_fm_pcd_manip_params_t *param,
104957 +        uint8_t compat);
104958 +
104959 +void compat_copy_fm_pcd_manip_get_stats(
104960 +       ioc_compat_fm_pcd_manip_get_stats_t *compat_param,
104961 +       ioc_fm_pcd_manip_get_stats_t *param,
104962 +       uint8_t compat);
104963 +
104964 +void compat_copy_fm_port_pcd_modify_tree(
104965 +        ioc_compat_fm_obj_t *compat_id,
104966 +        ioc_fm_obj_t *id,
104967 +        uint8_t compat);
104968 +
104969 +#if (DPAA_VERSION >= 11)
104970 +void compat_copy_fm_pcd_frm_replic_group_params(
104971 +       ioc_compat_fm_pcd_frm_replic_group_params_t *compat_param,
104972 +       ioc_fm_pcd_frm_replic_group_params_t *param,
104973 +       uint8_t compat);
104974 +
104975 +void compat_copy_fm_pcd_frm_replic_member(
104976 +       ioc_compat_fm_pcd_frm_replic_member_t *compat_param,
104977 +       ioc_fm_pcd_frm_replic_member_t *param,
104978 +       uint8_t compat);
104979 +
104980 +void compat_copy_fm_pcd_frm_replic_member_params(
104981 +       ioc_compat_fm_pcd_frm_replic_member_params_t *compat_param,
104982 +       ioc_fm_pcd_frm_replic_member_params_t *param,
104983 +       uint8_t compat);
104984 +
104985 +void compat_copy_fm_vsp_params(
104986 +    ioc_compat_fm_vsp_params_t *compat_param,
104987 +    ioc_fm_vsp_params_t *param,
104988 +    uint8_t compat);
104989 +
104990 +void compat_copy_fm_buf_pool_depletion_params(
104991 +    ioc_compat_fm_buf_pool_depletion_params_t *compat_param,
104992 +    ioc_fm_buf_pool_depletion_params_t *param,
104993 +    uint8_t compat);
104994 +
104995 +void compat_copy_fm_buffer_prefix_content_params(
104996 +    ioc_compat_fm_buffer_prefix_content_params_t *compat_param,
104997 +    ioc_fm_buffer_prefix_content_params_t *param,
104998 +    uint8_t compat);
104999 +
105000 +void compat_copy_fm_vsp_config_no_sg_params(
105001 +    ioc_compat_fm_vsp_config_no_sg_params_t *compat_param,
105002 +    ioc_fm_vsp_config_no_sg_params_t *param,
105003 +    uint8_t compat);
105004 +
105005 +void compat_copy_fm_vsp_prs_result_params(
105006 +    ioc_compat_fm_vsp_prs_result_params_t *compat_param,
105007 +    ioc_fm_vsp_prs_result_params_t *param,
105008 +    uint8_t compat);
105009 +
105010 +#endif /* (DPAA_VERSION >= 11) */
105011 +
105012 +void compat_copy_fm_pcd_kg_scheme_spc(
105013 +        ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param,
105014 +        ioc_fm_pcd_kg_scheme_spc_t *param,
105015 +        uint8_t compat);
105016 +
105017 +/* } pcd compat functions */
105018 +#endif
105019 --- /dev/null
105020 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources.h
105021 @@ -0,0 +1,121 @@
105022 +/*
105023 + * Copyright 2008-2012 Freescale Semiconductor Inc.
105024 + *
105025 + * Redistribution and use in source and binary forms, with or without
105026 + * modification, are permitted provided that the following conditions are met:
105027 + *     * Redistributions of source code must retain the above copyright
105028 + *       notice, this list of conditions and the following disclaimer.
105029 + *     * Redistributions in binary form must reproduce the above copyright
105030 + *       notice, this list of conditions and the following disclaimer in the
105031 + *       documentation and/or other materials provided with the distribution.
105032 + *     * Neither the name of Freescale Semiconductor nor the
105033 + *       names of its contributors may be used to endorse or promote products
105034 + *       derived from this software without specific prior written permission.
105035 + *
105036 + *
105037 + * ALTERNATIVELY, this software may be distributed under the terms of the
105038 + * GNU General Public License ("GPL") as published by the Free Software
105039 + * Foundation, either version 2 of that License or (at your option) any
105040 + * later version.
105041 + *
105042 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
105043 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
105044 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105045 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
105046 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
105047 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
105048 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
105049 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
105050 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
105051 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
105052 + */
105053 +
105054 +/*
105055 + @File          lnxwrp_resources.h
105056 +
105057 + @Description   FMD wrapper resource allocation functions.
105058 +
105059 +*/
105060 +
105061 +#ifndef LNXWRP_RESOURCES_H_
105062 +#define LNXWRP_RESOURCES_H_
105063 +
105064 +#if !defined(FMAN_RESOURCES_UNIT_TEST)
105065 +#include "lnxwrp_fm.h"
105066 +#else
105067 +#include "lnxwrp_resources_ut.h"
105068 +#endif
105069 +
105070 +#define ROUND(X) ((2*(X)+1)/2)
105071 +#define CEIL(X) ((X)+1)
105072 +/* #define ROUND_DIV(X, Y) (((X)+(Y)/2)/(Y)) */
105073 +#define ROUND_DIV(X, Y) ((2*(X)+(Y))/(2*(Y)))
105074 +#define CEIL_DIV(X, Y) (((X)+(Y)-1)/(Y))
105075 +
105076 +/* used for resource calculus */
105077 +#define DPDE_1G 2      /* DQDP 1g - from LLD:
105078 +                               DEFAULT_PORT_txFifoDeqPipelineDepth_1G */
105079 +#define DPDE_10G 8     /* DQDP 10g - from LLD:
105080 +                               DEFAULT_PORT_txFifoDeqPipelineDepth_10G */
105081 +
105082 +int fm_set_active_fman_ports(struct platform_device *of_dev,
105083 +                         t_LnxWrpFmDev *p_LnxWrpFmDev);
105084 +
105085 +/* Calculate the fifosize based on MURAM allocation, number of ports, dpde
105086 + * value and s/g software support (! Kernel does not suport s/g).
105087 + *
105088 + * Algorithm summary:
105089 + * - Calculate the the minimum fifosize required for every type of port
105090 + * (TX,RX for 1G, 2.5G and 10G).
105091 + * - Set TX the minimum fifosize required.
105092 + * - Distribute the remaining buffers (after all TX were set) to RX ports
105093 + * based on:
105094 + *   1G   RX = Remaining_buffers * 1/(1+2.5+10)
105095 + *   2.5G RX = Remaining_buffers * 2.5/(1+2.5+10)
105096 + *   10G  RX = Remaining_buffers * 10/(1+2.5+10)
105097 + * - if the RX is smaller than the minimum required, then set the minimum
105098 + * required
105099 + * - In the end distribuite the leftovers if there are any (due to
105100 + * unprecise calculus) or if over allocation cat some buffers from all RX
105101 + * ports w/o pass over minimum required treshold, but if there must be
105102 + * pass the treshold in order to cat the over allocation ,then this
105103 + * configuration can not be set - KERN_ALERT.
105104 +*/
105105 +int fm_precalculate_fifosizes(t_LnxWrpFmDev *p_LnxWrpFmDev,
105106 +                          int muram_fifo_size);
105107 +
105108 +#if !defined(FMAN_RESOURCES_UNIT_TEST)
105109 +int fm_config_precalculate_fifosize(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev);
105110 +#endif
105111 +
105112 +/* Compute FMan open DMA based on total number of open DMAs and
105113 + * number of available fman ports.
105114 + *
105115 + * By default 10g ports are set to input parameters. The other ports
105116 + * tries to keep the proportion rx=2tx open dmas or tresholds.
105117 + *
105118 + * If leftovers, then those will be set as shared.
105119 + *
105120 + * If after computing overflow appears, then it decrements open dma
105121 + * for all ports w/o cross the tresholds. If the tresholds are meet
105122 + * and is still overflow, then it returns error.
105123 +*/
105124 +int fm_precalculate_open_dma(t_LnxWrpFmDev *p_LnxWrpFmDev,
105125 +                         int max_fm_open_dma,
105126 +                         int default_tx_10g_dmas,
105127 +                         int default_rx_10g_dmas,
105128 +                         int min_tx_10g_treshold, int min_rx_10g_treshold);
105129 +
105130 +#if !defined(FMAN_RESOURCES_UNIT_TEST)
105131 +int fm_config_precalculate_open_dma(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev);
105132 +#endif
105133 +
105134 +/* Compute FMan tnums based on available tnums and number of ports.
105135 + * Set defaults (minim tresholds) and then distribute leftovers.*/
105136 +int fm_precalculate_tnums(t_LnxWrpFmDev *p_LnxWrpFmDev, int max_fm_tnums);
105137 +
105138 +#if !defined(FMAN_RESOURCES_UNIT_TEST)
105139 +int fm_config_precalculate_tnums(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev);
105140 +#endif
105141 +
105142 +#endif /* LNXWRP_RESOURCES_H_ */
105143 --- /dev/null
105144 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.c
105145 @@ -0,0 +1,191 @@
105146 +/* Copyright (c) 2012 Freescale Semiconductor, Inc.
105147 + * All rights reserved.
105148 + *
105149 + * Redistribution and use in source and binary forms, with or without
105150 + * modification, are permitted provided that the following conditions are met:
105151 + *     * Redistributions of source code must retain the above copyright
105152 + *       notice, this list of conditions and the following disclaimer.
105153 + *     * Redistributions in binary form must reproduce the above copyright
105154 + *       notice, this list of conditions and the following disclaimer in the
105155 + *       documentation and/or other materials provided with the distribution.
105156 + *     * Neither the name of Freescale Semiconductor nor the
105157 + *       names of its contributors may be used to endorse or promote products
105158 + *       derived from this software without specific prior written permission.
105159 + *
105160 + *
105161 + * ALTERNATIVELY, this software may be distributed under the terms of the
105162 + * GNU General Public License ("GPL") as published by the Free Software
105163 + * Foundation, either version 2 of that License or (at your option) any
105164 + * later version.
105165 + *
105166 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
105167 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
105168 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105169 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
105170 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
105171 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
105172 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
105173 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
105174 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
105175 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
105176 + */
105177 +
105178 +#include "lnxwrp_resources.h"
105179 +#include "lnxwrp_resources_ut.h"
105180 +
105181 +#define KILOBYTE 0x400 /* 1024 */
105182 +
105183 +typedef enum e_board_type {
105184 +       e_p3041,
105185 +       e_p4080,
105186 +       e_p5020,
105187 +       e_p1023
105188 +} e_board_type;
105189 +
105190 +uint8_t board_type;
105191 +uint32_t muram_size = 0;
105192 +uint32_t dmas_num = 0;
105193 +uint32_t task_num = 0;
105194 +uint32_t frame_size = 0;
105195 +uint32_t oh_num = 0;
105196 +uint32_t num_ports_1g = 0;
105197 +uint32_t num_ports_10g = 0;
105198 +uint32_t num_ports_2g5 = 0;
105199 +uint32_t fsl_fman_phy_maxfrm = 0;
105200 +uint32_t dpa_rx_extra_headroom = 0;
105201 +
105202 +void show_help(void){
105203 +       printf(" help: \n");
105204 +       printf(" -b <board_type> -f <max_fram_size(mtu)> -o <num_oh_ports> -g1"
105205 +               " <num_1g_ports> -g10 <num_10g_ports> -g25 <num_2g5_ports>\n");
105206 +       printf("    Maxim num of DMAS availbale:  P3/P4/P5:32 ,  P1023:16 \n");
105207 +       printf("    Maxim num of TNUMs availbale: P3/P4/P5:128,  P1023:32 \n");
105208 +       printf("    Muram size:                   P3/P4/P5:160K, P1023:64K \n");
105209 +       printf("    Number of ports:\n");
105210 +       printf("        P3/P5: 5p 1g, 1p 10g, 7p oh \n");
105211 +       printf("        P4   : 4p 1g, 1p 10g, 7p oh \n");
105212 +       printf("        P1   : 2p 1g, 0p 10g, 4p oh \n");
105213 +       printf("    MTU: Default:1522, Jumbo:9600 \n");
105214 +}
105215 +
105216 +int fm_set_param(t_LnxWrpFmDev *p_LnxWrpFmDev) {
105217 +       struct fm_active_ports *fm_active_ports_info = NULL;
105218 +       fm_active_ports_info = &p_LnxWrpFmDev->fm_active_ports_info;
105219 +
105220 +       switch(board_type){
105221 +               case e_p3041:
105222 +               case e_p5020:
105223 +                       muram_size = 160*KILOBYTE;
105224 +                       dmas_num = 32;
105225 +                       task_num = 128;
105226 +                       if ((num_ports_1g+num_ports_2g5) > 5 || num_ports_10g > 1 || oh_num > 7)
105227 +                               goto err_fm_set_param;
105228 +               break;
105229 +               case e_p4080:
105230 +                       muram_size = 160*KILOBYTE;
105231 +                       dmas_num = 32;
105232 +                       task_num = 128;
105233 +                       if ((num_ports_1g+num_ports_2g5) > 4 || num_ports_10g > 1 || oh_num > 7)
105234 +                               goto err_fm_set_param;
105235 +               break;
105236 +               case e_p1023:
105237 +                       muram_size = 64*KILOBYTE;
105238 +                       dmas_num = 16;
105239 +                       task_num = 128;
105240 +                       if ((num_ports_1g+num_ports_2g5) > 2 || oh_num > 4)
105241 +                               goto err_fm_set_param;
105242 +               break;
105243 +               default:
105244 +                       goto err_fm_set_param;
105245 +               break;
105246 +       }
105247 +
105248 +       p_LnxWrpFmDev->id = 0;
105249 +       fsl_fman_phy_maxfrm = frame_size;
105250 +       dpa_rx_extra_headroom = 0; /* ATTENTION: can be != 0 */
105251 +       fm_active_ports_info->num_oh_ports = oh_num;
105252 +       fm_active_ports_info->num_tx_ports = num_ports_1g;
105253 +       fm_active_ports_info->num_rx_ports = num_ports_1g;
105254 +       fm_active_ports_info->num_tx25_ports = num_ports_2g5;
105255 +       fm_active_ports_info->num_rx25_ports = num_ports_2g5;
105256 +       fm_active_ports_info->num_tx10_ports = num_ports_10g;
105257 +       fm_active_ports_info->num_rx10_ports = num_ports_10g;
105258 +
105259 +       return 0;
105260 +
105261 +err_fm_set_param:
105262 +       printf(" ERR: To many ports!!! \n");
105263 +       return -1;
105264 +}
105265 +
105266 +int main (int argc, char *argv[]){
105267 +       t_LnxWrpFmDev LnxWrpFmDev;
105268 +       t_LnxWrpFmDev *p_LnxWrpFmDev = &LnxWrpFmDev;
105269 +       int tokens_cnt = 1;
105270 +
105271 +       char *token = NULL;
105272 +
105273 +       while(tokens_cnt < argc)
105274 +       {
105275 +               token = argv[tokens_cnt++];
105276 +               if (strcmp(token, "-b") == 0){
105277 +                       if(strcmp(argv[tokens_cnt],"p3") == 0)
105278 +                               board_type = e_p3041;
105279 +                       else if(strcmp(argv[tokens_cnt],"p4") == 0)
105280 +                               board_type = e_p4080;
105281 +                       else if(strcmp(argv[tokens_cnt],"p5") == 0)
105282 +                               board_type = e_p5020;
105283 +                       else if(strcmp(argv[tokens_cnt],"p1") == 0)
105284 +                               board_type = e_p1023;
105285 +                       else
105286 +                               show_help();
105287 +                       tokens_cnt++;
105288 +               }
105289 +               else if(strcmp(token, "-d") == 0){
105290 +                       dmas_num = atoi(argv[tokens_cnt++]);
105291 +               }
105292 +               else if(strcmp(token, "-t") == 0)
105293 +                       task_num = atoi(argv[tokens_cnt++]);
105294 +               else if(strcmp(token, "-f") == 0)
105295 +                       frame_size = atoi(argv[tokens_cnt++]);
105296 +               else if(strcmp(token, "-o") == 0)
105297 +                       oh_num = atoi(argv[tokens_cnt++]);
105298 +               else if(strcmp(token, "-g1") == 0)
105299 +                       num_ports_1g = atoi(argv[tokens_cnt++]);
105300 +               else if(strcmp(token, "-g10") == 0)
105301 +                       num_ports_10g = atoi(argv[tokens_cnt++]);
105302 +               else if(strcmp(token, "-g25") == 0)
105303 +                       num_ports_2g5 = atoi(argv[tokens_cnt++]);
105304 +               else {
105305 +                       show_help();
105306 +                       return -1;
105307 +               }
105308 +       }
105309 +
105310 +       if(fm_set_param(p_LnxWrpFmDev) < 0){
105311 +               show_help();
105312 +               return -1;
105313 +       }
105314 +
105315 +       if(fm_precalculate_fifosizes(
105316 +               p_LnxWrpFmDev,
105317 +               128*KILOBYTE)
105318 +               != 0)
105319 +               return -1;
105320 +       if(fm_precalculate_open_dma(
105321 +               p_LnxWrpFmDev,
105322 +               dmas_num,                   /* max open dmas:dpaa_integration_ext.h */
105323 +               FM_DEFAULT_TX10G_OPENDMA,   /* default TX 10g open dmas */
105324 +               FM_DEFAULT_RX10G_OPENDMA,   /* default RX 10g open dmas */
105325 +               FM_10G_OPENDMA_MIN_TRESHOLD,/* TX 10g minimum treshold */
105326 +               FM_10G_OPENDMA_MIN_TRESHOLD)/* RX 10g minimum treshold */
105327 +               != 0)
105328 +               return -1;
105329 +       if(fm_precalculate_tnums(
105330 +               p_LnxWrpFmDev,
105331 +               task_num) /* max TNUMS: dpa integration file. */
105332 +               != 0)
105333 +                return -1;
105334 +
105335 +       return 0;
105336 +}
105337 --- /dev/null
105338 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.h
105339 @@ -0,0 +1,144 @@
105340 +/* Copyright (c) 2012 Freescale Semiconductor, Inc
105341 + * All rights reserved.
105342 + *
105343 + * Redistribution and use in source and binary forms, with or without
105344 + * modification, are permitted provided that the following conditions are met:
105345 + *     * Redistributions of source code must retain the above copyright
105346 + *       notice, this list of conditions and the following disclaimer.
105347 + *     * Redistributions in binary form must reproduce the above copyright
105348 + *       notice, this list of conditions and the following disclaimer in the
105349 + *       documentation and/or other materials provided with the distribution.
105350 + *     * Neither the name of Freescale Semiconductor nor the
105351 + *       names of its contributors may be used to endorse or promote products
105352 + *       derived from this software without specific prior written permission.
105353 + *
105354 + *
105355 + * ALTERNATIVELY, this software may be distributed under the terms of the
105356 + * GNU General Public License ("GPL") as published by the Free Software
105357 + * Foundation, either version 2 of that License or (at your option) any
105358 + * later version.
105359 + *
105360 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
105361 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
105362 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105363 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
105364 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
105365 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
105366 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
105367 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
105368 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
105369 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
105370 + */
105371 +
105372 +#ifndef FM_RESS_TEST_H_
105373 +#define FM_RESS_TEST_H_
105374 +
105375 +#include <stdint.h>
105376 +#include <stdbool.h>
105377 +#include <stdio.h>
105378 +#include <assert.h>
105379 +#include <string.h>
105380 +#include <stdlib.h>
105381 +
105382 +#define _Packed
105383 +#define _PackedType __attribute__ ((packed))
105384 +#define MAX(x, y) (((x) > (y)) ? (x) : (y))
105385 +#define MIN(x, y) (((x) < (y)) ? (x) : (y))
105386 +#define KERN_ALERT ""
105387 +#define KERN_INFO ""
105388 +#define ASSERT_COND assert
105389 +#define printk printf
105390 +#define NET_IP_ALIGN 0
105391 +#define FM_FIFO_ALLOCATION_OLD_ALG
105392 +
105393 +#if defined(CONFIG_FMAN_DISABLE_OH_AND_DISTRIBUTE_RESOURCES)
105394 +#define FM_10G_OPENDMA_MIN_TRESHOLD 8 /* 10g minimum treshold if only HC is enabled and no OH port enabled */
105395 +#define FM_OPENDMA_RX_TX_RAPORT 2 /* RX = 2*TX */
105396 +#else
105397 +#define FM_10G_OPENDMA_MIN_TRESHOLD 7 /* 10g minimum treshold if 7 OH ports are enabled */
105398 +#define FM_OPENDMA_RX_TX_RAPORT 1 /* RX = TX */
105399 +#endif
105400 +#define FM_DEFAULT_TX10G_OPENDMA 8 /* default TX 10g open dmas */
105401 +#define FM_DEFAULT_RX10G_OPENDMA 8 /* default RX 10g open dmas */
105402 +
105403 +/* information about all active ports for an FMan.
105404 + * !Some ports may be disabled by u-boot, thus will not be available */
105405 +struct fm_active_ports {
105406 +    uint32_t num_oh_ports;
105407 +    uint32_t num_tx_ports;
105408 +    uint32_t num_rx_ports;
105409 +    uint32_t num_tx25_ports;
105410 +    uint32_t num_rx25_ports;
105411 +    uint32_t num_tx10_ports;
105412 +    uint32_t num_rx10_ports;
105413 +};
105414 +
105415 +/* FMan resources precalculated at fm probe based
105416 + * on available FMan port. */
105417 +struct fm_resource_settings {
105418 +    /* buffers - fifo sizes */
105419 +    uint32_t tx1g_num_buffers;
105420 +    uint32_t rx1g_num_buffers;
105421 +    uint32_t tx2g5_num_buffers; /* Not supported yet by LLD */
105422 +    uint32_t rx2g5_num_buffers; /* Not supported yet by LLD */
105423 +    uint32_t tx10g_num_buffers;
105424 +    uint32_t rx10g_num_buffers;
105425 +    uint32_t oh_num_buffers;
105426 +    uint32_t shared_ext_buffers;
105427 +
105428 +
105429 +    /* open DMAs */
105430 +    uint32_t tx_1g_dmas;
105431 +    uint32_t rx_1g_dmas;
105432 +    uint32_t tx_2g5_dmas; /* Not supported yet by LLD */
105433 +    uint32_t rx_2g5_dmas; /* Not supported yet by LLD */
105434 +    uint32_t tx_10g_dmas;
105435 +    uint32_t rx_10g_dmas;
105436 +    uint32_t oh_dmas;
105437 +    uint32_t shared_ext_open_dma;
105438 +
105439 +    /* Tnums */
105440 +    uint32_t tx_1g_tnums;
105441 +    uint32_t rx_1g_tnums;
105442 +    uint32_t tx_2g5_tnums; /* Not supported yet by LLD */
105443 +    uint32_t rx_2g5_tnums; /* Not supported yet by LLD */
105444 +    uint32_t tx_10g_tnums;
105445 +    uint32_t rx_10g_tnums;
105446 +    uint32_t oh_tnums;
105447 +    uint32_t shared_ext_tnums;
105448 +};
105449 +
105450 +typedef struct {
105451 +       uint8_t                     id;
105452 +    struct fm_active_ports      fm_active_ports_info;
105453 +    struct fm_resource_settings fm_resource_settings_info;
105454 +} t_LnxWrpFmDev;
105455 +
105456 +typedef struct {
105457 +       uint8_t                     id;
105458 +} t_LnxWrpFmPortDev;
105459 +
105460 +typedef _Packed struct t_FmPrsResult {
105461 +       volatile uint8_t     lpid;               /**< Logical port id */
105462 +       volatile uint8_t     shimr;              /**< Shim header result  */
105463 +       volatile uint16_t    l2r;                /**< Layer 2 result */
105464 +       volatile uint16_t    l3r;                /**< Layer 3 result */
105465 +       volatile uint8_t     l4r;                /**< Layer 4 result */
105466 +       volatile uint8_t     cplan;              /**< Classification plan id */
105467 +       volatile uint16_t    nxthdr;             /**< Next Header  */
105468 +       volatile uint16_t    cksum;              /**< Checksum */
105469 +       volatile uint32_t    lcv;                /**< LCV */
105470 +       volatile uint8_t     shim_off[3];        /**< Shim offset */
105471 +       volatile uint8_t     eth_off;            /**< ETH offset */
105472 +       volatile uint8_t     llc_snap_off;       /**< LLC_SNAP offset */
105473 +       volatile uint8_t     vlan_off[2];        /**< VLAN offset */
105474 +       volatile uint8_t     etype_off;          /**< ETYPE offset */
105475 +       volatile uint8_t     pppoe_off;          /**< PPP offset */
105476 +       volatile uint8_t     mpls_off[2];        /**< MPLS offset */
105477 +       volatile uint8_t     ip_off[2];          /**< IP offset */
105478 +       volatile uint8_t     gre_off;            /**< GRE offset */
105479 +       volatile uint8_t     l4_off;             /**< Layer 4 offset */
105480 +       volatile uint8_t     nxthdr_off;         /**< Parser end point */
105481 +} _PackedType t_FmPrsResult;
105482 +
105483 +#endif
105484 --- /dev/null
105485 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.make
105486 @@ -0,0 +1,28 @@
105487 +CC=gcc
105488 +
105489 +LNXWRP_RESS_UT=lnxwrp_resources_ut
105490 +OBJ=lnxwrp_resources
105491 +
105492 +INC_PATH=
105493 +LIB_PATH=
105494 +
105495 +INC=$(addprefix -I,$(INC_PATH))
105496 +LIB=$(addprefix -L,$(LIB_PATH))
105497 +
105498 +CFLAGS= -gdwarf-2 -g -O0 -Wall
105499 +XFLAGS= -DFMAN_RESOURCES_UNIT_TEST
105500 +
105501 +all: $(LNXWRP_RESS_UT)
105502 +
105503 +$(LNXWRP_RESS_UT):$(addsuffix .o,$(OBJ)) $(LNXWRP_RESS_UT).o
105504 +       $(CC) -o $(LNXWRP_RESS_UT) $(LNXWRP_RESS_UT).o $(addsuffix .o,$(OBJ))
105505 +
105506 +%.o: %.c
105507 +       @(echo "        (CC)  $@")
105508 +       @($(CC) $(INC) $(CFLAGS) $(XFLAGS) -o $(@) -c $<)
105509 +
105510 +.PHONY: clean
105511 +
105512 +clean:
105513 +       rm -f *.o
105514 +       rm -f $(LNXWRP_RESS_UT)
105515 --- /dev/null
105516 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.c
105517 @@ -0,0 +1,60 @@
105518 +/*
105519 + * Copyright 2008-2012 Freescale Semiconductor Inc.
105520 + *
105521 + * Redistribution and use in source and binary forms, with or without
105522 + * modification, are permitted provided that the following conditions are met:
105523 + *     * Redistributions of source code must retain the above copyright
105524 + *       notice, this list of conditions and the following disclaimer.
105525 + *     * Redistributions in binary form must reproduce the above copyright
105526 + *       notice, this list of conditions and the following disclaimer in the
105527 + *       documentation and/or other materials provided with the distribution.
105528 + *     * Neither the name of Freescale Semiconductor nor the
105529 + *       names of its contributors may be used to endorse or promote products
105530 + *       derived from this software without specific prior written permission.
105531 + *
105532 + *
105533 + * ALTERNATIVELY, this software may be distributed under the terms of the
105534 + * GNU General Public License ("GPL") as published by the Free Software
105535 + * Foundation, either version 2 of that License or (at your option) any
105536 + * later version.
105537 + *
105538 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
105539 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
105540 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105541 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
105542 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
105543 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
105544 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
105545 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
105546 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
105547 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
105548 + */
105549 +
105550 +/*
105551 + @File          lnxwrp_sysfs.c
105552 +
105553 + @Description   FM wrapper sysfs related functions.
105554 +
105555 +*/
105556 +
105557 +#include <linux/types.h>
105558 +#include "lnxwrp_sysfs.h"
105559 +
105560 +uint8_t fm_find_statistic_counter_by_name(const char *attr_name,
105561 +                               const struct sysfs_stats_t *sysfs_stats,
105562 +                               uint8_t *offset)
105563 +{
105564 +       int i = 0;
105565 +
105566 +       while (sysfs_stats[i].stat_name != NULL) {
105567 +               if (strcmp(sysfs_stats[i].stat_name, attr_name) == 0) {
105568 +                       if (offset != NULL)
105569 +                               *offset = i;
105570 +                       return sysfs_stats[i].stat_counter;
105571 +               }
105572 +
105573 +               i++;
105574 +       }
105575 +       WARN(1, "FMD: Should never get here!");
105576 +       return 0;
105577 +}
105578 --- /dev/null
105579 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.h
105580 @@ -0,0 +1,60 @@
105581 +/*
105582 + * Copyright 2008-2012 Freescale Semiconductor Inc.
105583 + *
105584 + * Redistribution and use in source and binary forms, with or without
105585 + * modification, are permitted provided that the following conditions are met:
105586 + *     * Redistributions of source code must retain the above copyright
105587 + *       notice, this list of conditions and the following disclaimer.
105588 + *     * Redistributions in binary form must reproduce the above copyright
105589 + *       notice, this list of conditions and the following disclaimer in the
105590 + *       documentation and/or other materials provided with the distribution.
105591 + *     * Neither the name of Freescale Semiconductor nor the
105592 + *       names of its contributors may be used to endorse or promote products
105593 + *       derived from this software without specific prior written permission.
105594 + *
105595 + *
105596 + * ALTERNATIVELY, this software may be distributed under the terms of the
105597 + * GNU General Public License ("GPL") as published by the Free Software
105598 + * Foundation, either version 2 of that License or (at your option) any
105599 + * later version.
105600 + *
105601 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
105602 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
105603 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105604 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
105605 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
105606 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
105607 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
105608 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
105609 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
105610 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
105611 + */
105612 +
105613 +#ifndef LNXWRP_SYSFS_H_
105614 +#define LNXWRP_SYSFS_H_
105615 +
105616 +/* Linux Headers ------------------- */
105617 +#include <linux/version.h>
105618 +
105619 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
105620 +#define MODVERSIONS
105621 +#endif
105622 +#ifdef MODVERSIONS
105623 +#include <config/modversions.h>
105624 +#endif /* MODVERSIONS */
105625 +
105626 +#include <linux/kernel.h>
105627 +#include <linux/module.h>
105628 +#include <linux/device.h>
105629 +#include <linux/sysfs.h>
105630 +
105631 +struct sysfs_stats_t {
105632 +       const char *stat_name;
105633 +       uint8_t stat_counter;
105634 +};
105635 +
105636 +uint8_t fm_find_statistic_counter_by_name(const char *attr_name,
105637 +                               const struct sysfs_stats_t *sysfs_stats,
105638 +                               uint8_t *offset);
105639 +
105640 +#endif /* LNXWRP_SYSFS_H_ */
105641 --- /dev/null
105642 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c
105643 @@ -0,0 +1,1855 @@
105644 +/*
105645 + * Copyright 2008-2012 Freescale Semiconductor Inc.
105646 + *
105647 + * Redistribution and use in source and binary forms, with or without
105648 + * modification, are permitted provided that the following conditions are met:
105649 + *     * Redistributions of source code must retain the above copyright
105650 + *       notice, this list of conditions and the following disclaimer.
105651 + *     * Redistributions in binary form must reproduce the above copyright
105652 + *       notice, this list of conditions and the following disclaimer in the
105653 + *       documentation and/or other materials provided with the distribution.
105654 + *     * Neither the name of Freescale Semiconductor nor the
105655 + *       names of its contributors may be used to endorse or promote products
105656 + *       derived from this software without specific prior written permission.
105657 + *
105658 + *
105659 + * ALTERNATIVELY, this software may be distributed under the terms of the
105660 + * GNU General Public License ("GPL") as published by the Free Software
105661 + * Foundation, either version 2 of that License or (at your option) any
105662 + * later version.
105663 + *
105664 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
105665 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
105666 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105667 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
105668 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
105669 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
105670 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
105671 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
105672 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
105673 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
105674 + */
105675 +
105676 +#include "lnxwrp_sysfs.h"
105677 +#include "lnxwrp_sysfs_fm.h"
105678 +#include "lnxwrp_fm.h"
105679 +
105680 +#include "../../sdk_fman/Peripherals/FM/inc/fm_common.h"
105681 +#include "../../sdk_fman/Peripherals/FM/Pcd/fm_pcd.h"
105682 +#include "../../sdk_fman/Peripherals/FM/Pcd/fm_kg.h"
105683 +#include "../../sdk_fman/Peripherals/FM/Pcd/fm_plcr.h"
105684 +
105685 +#if defined(__ERR_MODULE__)
105686 +#undef __ERR_MODULE__
105687 +#endif
105688 +
105689 +#include "../../sdk_fman/Peripherals/FM/fm.h"
105690 +#include <linux/delay.h>
105691 +
105692 +
105693 +static int fm_get_counter(void *h_fm, e_FmCounters cnt_e, uint32_t *cnt_val);
105694 +
105695 +enum fm_dma_match_stats {
105696 +       FM_DMA_COUNTERS_CMQ_NOT_EMPTY,
105697 +       FM_DMA_COUNTERS_BUS_ERROR,
105698 +       FM_DMA_COUNTERS_READ_BUF_ECC_ERROR,
105699 +       FM_DMA_COUNTERS_WRITE_BUF_ECC_SYS_ERROR,
105700 +       FM_DMA_COUNTERS_WRITE_BUF_ECC_FM_ERROR
105701 +};
105702 +
105703 +static const struct sysfs_stats_t fm_sysfs_stats[] = {
105704 +       /* FM statistics */
105705 +       {
105706 +        .stat_name = "enq_total_frame",
105707 +        .stat_counter = e_FM_COUNTERS_ENQ_TOTAL_FRAME,
105708 +        },
105709 +       {
105710 +        .stat_name = "deq_total_frame",
105711 +        .stat_counter = e_FM_COUNTERS_DEQ_TOTAL_FRAME,
105712 +        },
105713 +       {
105714 +        .stat_name = "deq_0",
105715 +        .stat_counter = e_FM_COUNTERS_DEQ_0,
105716 +        },
105717 +       {
105718 +        .stat_name = "deq_1",
105719 +        .stat_counter = e_FM_COUNTERS_DEQ_1,
105720 +        },
105721 +       {
105722 +        .stat_name = "deq_2",
105723 +        .stat_counter = e_FM_COUNTERS_DEQ_2,
105724 +        },
105725 +       {
105726 +        .stat_name = "deq_3",
105727 +        .stat_counter = e_FM_COUNTERS_DEQ_3,
105728 +        },
105729 +       {
105730 +        .stat_name = "deq_from_default",
105731 +        .stat_counter = e_FM_COUNTERS_DEQ_FROM_DEFAULT,
105732 +        },
105733 +       {
105734 +        .stat_name = "deq_from_context",
105735 +        .stat_counter = e_FM_COUNTERS_DEQ_FROM_CONTEXT,
105736 +        },
105737 +       {
105738 +        .stat_name = "deq_from_fd",
105739 +        .stat_counter = e_FM_COUNTERS_DEQ_FROM_FD,
105740 +        },
105741 +       {
105742 +        .stat_name = "deq_confirm",
105743 +        .stat_counter = e_FM_COUNTERS_DEQ_CONFIRM,
105744 +        },
105745 +       /* FM:DMA  statistics */
105746 +       {
105747 +        .stat_name = "cmq_not_empty",
105748 +        .stat_counter = FM_DMA_COUNTERS_CMQ_NOT_EMPTY,
105749 +        },
105750 +       {
105751 +        .stat_name = "bus_error",
105752 +        .stat_counter = FM_DMA_COUNTERS_BUS_ERROR,
105753 +        },
105754 +       {
105755 +        .stat_name = "read_buf_ecc_error",
105756 +        .stat_counter = FM_DMA_COUNTERS_READ_BUF_ECC_ERROR,
105757 +        },
105758 +       {
105759 +        .stat_name = "write_buf_ecc_sys_error",
105760 +        .stat_counter = FM_DMA_COUNTERS_WRITE_BUF_ECC_SYS_ERROR,
105761 +        },
105762 +       {
105763 +        .stat_name = "write_buf_ecc_fm_error",
105764 +        .stat_counter = FM_DMA_COUNTERS_WRITE_BUF_ECC_FM_ERROR,
105765 +        },
105766 +       /* FM:PCD  statistics */
105767 +       {
105768 +        .stat_name = "pcd_kg_total",
105769 +        .stat_counter = e_FM_PCD_KG_COUNTERS_TOTAL,
105770 +        },
105771 +       {
105772 +        .stat_name = "pcd_plcr_yellow",
105773 +        .stat_counter = e_FM_PCD_PLCR_COUNTERS_YELLOW,
105774 +        },
105775 +       {
105776 +        .stat_name = "pcd_plcr_red",
105777 +        .stat_counter = e_FM_PCD_PLCR_COUNTERS_RED,
105778 +        },
105779 +       {
105780 +        .stat_name = "pcd_plcr_recolored_to_red",
105781 +        .stat_counter = e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED,
105782 +        },
105783 +       {
105784 +        .stat_name = "pcd_plcr_recolored_to_yellow",
105785 +        .stat_counter = e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW,
105786 +        },
105787 +       {
105788 +        .stat_name = "pcd_plcr_total",
105789 +        .stat_counter = e_FM_PCD_PLCR_COUNTERS_TOTAL,
105790 +        },
105791 +       {
105792 +        .stat_name = "pcd_plcr_length_mismatch",
105793 +        .stat_counter = e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH,
105794 +        },
105795 +       {
105796 +        .stat_name = "pcd_prs_parse_dispatch",
105797 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH,
105798 +        },
105799 +       {
105800 +        .stat_name = "pcd_prs_l2_parse_result_returned",
105801 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED,
105802 +        },
105803 +       {
105804 +        .stat_name = "pcd_prs_l3_parse_result_returned",
105805 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED,
105806 +        },
105807 +       {
105808 +        .stat_name = "pcd_prs_l4_parse_result_returned",
105809 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED,
105810 +        },
105811 +       {
105812 +        .stat_name = "pcd_prs_shim_parse_result_returned",
105813 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED,
105814 +        },
105815 +       {
105816 +        .stat_name = "pcd_prs_l2_parse_result_returned_with_err",
105817 +        .stat_counter =
105818 +        e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR,
105819 +        },
105820 +       {
105821 +        .stat_name = "pcd_prs_l3_parse_result_returned_with_err",
105822 +        .stat_counter =
105823 +        e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR,
105824 +        },
105825 +       {
105826 +        .stat_name = "pcd_prs_l4_parse_result_returned_with_err",
105827 +        .stat_counter =
105828 +        e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR,
105829 +        },
105830 +       {
105831 +        .stat_name = "pcd_prs_shim_parse_result_returned_with_err",
105832 +        .stat_counter =
105833 +        e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR,
105834 +        },
105835 +       {
105836 +        .stat_name = "pcd_prs_soft_prs_cycles",
105837 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES,
105838 +        },
105839 +       {
105840 +        .stat_name = "pcd_prs_soft_prs_stall_cycles",
105841 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES,
105842 +        },
105843 +       {
105844 +        .stat_name = "pcd_prs_hard_prs_cycle_incl_stall_cycles",
105845 +        .stat_counter =
105846 +        e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES,
105847 +        },
105848 +       {
105849 +        .stat_name = "pcd_prs_muram_read_cycles",
105850 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES,
105851 +        },
105852 +       {
105853 +        .stat_name = "pcd_prs_muram_read_stall_cycles",
105854 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES,
105855 +        },
105856 +       {
105857 +        .stat_name = "pcd_prs_muram_write_cycles",
105858 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES,
105859 +        },
105860 +       {
105861 +        .stat_name = "pcd_prs_muram_write_stall_cycles",
105862 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES,
105863 +        },
105864 +       {
105865 +        .stat_name = "pcd_prs_fpm_command_stall_cycles",
105866 +        .stat_counter = e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES,
105867 +        },
105868 +       {}
105869 +};
105870 +
105871 +
105872 +static ssize_t show_fm_risc_load(struct device *dev,
105873 +                       struct device_attribute *attr, char *buf)
105874 +{
105875 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
105876 +       unsigned long flags;
105877 +       int m =0;
105878 +       int err =0;
105879 +       unsigned n = 0;
105880 +       t_FmCtrlMon     util;
105881 +       uint8_t         i =0 ;
105882 +
105883 +       if (attr == NULL || buf == NULL || dev == NULL)
105884 +               return -EINVAL;
105885 +
105886 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
105887 +       if (WARN_ON(p_wrp_fm_dev == NULL))
105888 +               return -EINVAL;
105889 +
105890 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
105891 +               return -EIO;
105892 +
105893 +       local_irq_save(flags);
105894 +
105895 +       /* Calculate risc load */
105896 +       FM_CtrlMonStart(p_wrp_fm_dev->h_Dev);
105897 +       msleep(1000);
105898 +       FM_CtrlMonStop(p_wrp_fm_dev->h_Dev);
105899 +
105900 +       for (i = 0; i < FM_NUM_OF_CTRL; i++) {
105901 +               err |= FM_CtrlMonGetCounters(p_wrp_fm_dev->h_Dev, i, &util);
105902 +               m = snprintf(&buf[n],PAGE_SIZE,"\tRisc%u: util-%u%%, efficiency-%u%%\n",
105903 +                               i, util.percentCnt[0], util.percentCnt[1]);
105904 +               n=m+n;
105905 +       }
105906 +
105907 +       local_irq_restore(flags);
105908 +
105909 +       return n;
105910 +}
105911 +
105912 +/* Fm stats and regs dumps via sysfs */
105913 +static ssize_t show_fm_dma_stats(struct device *dev,
105914 +                               struct device_attribute *attr, char *buf)
105915 +{
105916 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
105917 +       t_FmDmaStatus dma_status;
105918 +       unsigned long flags = 0;
105919 +       unsigned n = 0;
105920 +       uint8_t counter_value = 0, counter = 0;
105921 +
105922 +       if (attr == NULL || buf == NULL || dev == NULL)
105923 +               return -EINVAL;
105924 +
105925 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
105926 +       if (WARN_ON(p_wrp_fm_dev == NULL))
105927 +               return -EINVAL;
105928 +
105929 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
105930 +               return -EIO;
105931 +
105932 +       counter = fm_find_statistic_counter_by_name(
105933 +                       attr->attr.name,
105934 +                       fm_sysfs_stats, NULL);
105935 +
105936 +       local_irq_save(flags);
105937 +
105938 +       memset(&dma_status, 0, sizeof(dma_status));
105939 +       FM_GetDmaStatus(p_wrp_fm_dev->h_Dev, &dma_status);
105940 +
105941 +       switch (counter) {
105942 +       case FM_DMA_COUNTERS_CMQ_NOT_EMPTY:
105943 +               counter_value = dma_status.cmqNotEmpty;
105944 +               break;
105945 +       case FM_DMA_COUNTERS_BUS_ERROR:
105946 +               counter_value = dma_status.busError;
105947 +               break;
105948 +       case FM_DMA_COUNTERS_READ_BUF_ECC_ERROR:
105949 +               counter_value = dma_status.readBufEccError;
105950 +               break;
105951 +       case FM_DMA_COUNTERS_WRITE_BUF_ECC_SYS_ERROR:
105952 +               counter_value = dma_status.writeBufEccSysError;
105953 +               break;
105954 +       case FM_DMA_COUNTERS_WRITE_BUF_ECC_FM_ERROR:
105955 +               counter_value = dma_status.writeBufEccFmError;
105956 +               break;
105957 +       default:
105958 +               WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
105959 +                       __func__);
105960 +               break;
105961 +       };
105962 +
105963 +       n = snprintf(buf, PAGE_SIZE, "\tFM %u counter: %c\n",
105964 +               p_wrp_fm_dev->id, counter_value ? 'T' : 'F');
105965 +
105966 +       local_irq_restore(flags);
105967 +
105968 +       return n;
105969 +}
105970 +
105971 +static ssize_t show_fm_stats(struct device *dev,
105972 +                            struct device_attribute *attr, char *buf)
105973 +{
105974 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
105975 +       unsigned long flags = 0;
105976 +       unsigned n = 0, cnt_e = 0;
105977 +       uint32_t cnt_val;
105978 +       int err;
105979 +
105980 +       if (attr == NULL || buf == NULL || dev == NULL)
105981 +               return -EINVAL;
105982 +
105983 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
105984 +       if (WARN_ON(p_wrp_fm_dev == NULL))
105985 +               return -EINVAL;
105986 +
105987 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
105988 +               return -EIO;
105989 +
105990 +       cnt_e = fm_find_statistic_counter_by_name(
105991 +                       attr->attr.name,
105992 +                       fm_sysfs_stats, NULL);
105993 +
105994 +       err = fm_get_counter(p_wrp_fm_dev->h_Dev,
105995 +               (e_FmCounters) cnt_e, &cnt_val);
105996 +
105997 +       if (err)
105998 +               return err;
105999 +
106000 +       local_irq_save(flags);
106001 +
106002 +       n = snprintf(buf, PAGE_SIZE, "\tFM %d counter: %d\n",
106003 +                       p_wrp_fm_dev->id, cnt_val);
106004 +
106005 +       local_irq_restore(flags);
106006 +
106007 +       return n;
106008 +}
106009 +
106010 +static ssize_t show_fm_muram_free_sz(struct device *dev,
106011 +                               struct device_attribute *attr, char *buf)
106012 +{
106013 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106014 +       unsigned long flags = 0;
106015 +       unsigned n = 0;
106016 +       uint64_t muram_free_size = 0;
106017 +
106018 +       if (attr == NULL || buf == NULL || dev == NULL)
106019 +               return -EINVAL;
106020 +
106021 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106022 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106023 +               return -EINVAL;
106024 +
106025 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
106026 +               return -EIO;
106027 +
106028 +       muram_free_size = FM_MURAM_GetFreeMemSize(p_wrp_fm_dev->h_MuramDev);
106029 +
106030 +       local_irq_save(flags);
106031 +
106032 +       n = snprintf(buf, PAGE_SIZE, "\tFM %d muram_free_size: %lld\n",
106033 +                       p_wrp_fm_dev->id, muram_free_size);
106034 +
106035 +       local_irq_restore(flags);
106036 +
106037 +       return n;
106038 +}
106039 +
106040 +static ssize_t show_fm_ctrl_code_ver(struct device *dev,
106041 +                               struct device_attribute *attr, char *buf)
106042 +{
106043 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106044 +       unsigned long flags = 0;
106045 +       unsigned n = 0;
106046 +       t_FmCtrlCodeRevisionInfo rv_info;
106047 +
106048 +       if (attr == NULL || buf == NULL || dev == NULL)
106049 +               return -EINVAL;
106050 +
106051 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106052 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106053 +               return -EINVAL;
106054 +
106055 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
106056 +               return -EIO;
106057 +
106058 +       FM_GetFmanCtrlCodeRevision((t_Fm *)p_wrp_fm_dev->h_Dev, &rv_info);
106059 +
106060 +       local_irq_save(flags);
106061 +
106062 +       FM_DMP_LN(buf, n, "- FM %d ctrl code pkg info:\n", p_wrp_fm_dev->id);
106063 +       FM_DMP_LN(buf, n, "Package rev: %d\n", rv_info.packageRev);
106064 +       FM_DMP_LN(buf, n, "major rev: %d\n", rv_info.majorRev);
106065 +       FM_DMP_LN(buf, n, "minor rev: %d\n", rv_info.minorRev);
106066 +
106067 +       local_irq_restore(flags);
106068 +
106069 +       return n;
106070 +}
106071 +
106072 +static ssize_t show_fm_pcd_stats(struct device *dev,
106073 +                               struct device_attribute *attr, char *buf)
106074 +{
106075 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106076 +       unsigned long flags = 0;
106077 +       unsigned n = 0, counter = 0;
106078 +
106079 +       if (attr == NULL || buf == NULL || dev == NULL)
106080 +               return -EINVAL;
106081 +
106082 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106083 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106084 +               return -EINVAL;
106085 +
106086 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev ||
106087 +                       !p_wrp_fm_dev->h_PcdDev)
106088 +               return -EIO;
106089 +
106090 +       counter = fm_find_statistic_counter_by_name(
106091 +                       attr->attr.name,
106092 +                       fm_sysfs_stats, NULL);
106093 +
106094 +       local_irq_save(flags);
106095 +
106096 +       n = snprintf(buf, PAGE_SIZE, "\tFM %d counter: %d\n",
106097 +                       p_wrp_fm_dev->id,
106098 +                       FM_PCD_GetCounter(p_wrp_fm_dev->h_PcdDev,
106099 +                                       (e_FmPcdCounters) counter));
106100 +
106101 +       local_irq_restore(flags);
106102 +
106103 +       return n;
106104 +}
106105 +
106106 +static ssize_t show_fm_tnum_dbg(struct device *dev,
106107 +                               struct device_attribute *attr,
106108 +                               char *buf)
106109 +{
106110 +       unsigned long flags;
106111 +       unsigned n = 0;
106112 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106113 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106114 +#endif
106115 +
106116 +       if (attr == NULL || buf == NULL || dev == NULL)
106117 +               return -EINVAL;
106118 +
106119 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106120 +
106121 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106122 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106123 +               return -EINVAL;
106124 +
106125 +       local_irq_save(flags);
106126 +
106127 +       if (!p_wrp_fm_dev->active)
106128 +               return -EIO;
106129 +       else {
106130 +               int tn_s;
106131 +
106132 +               if (!sscanf(attr->attr.name, "tnum_dbg_%d", &tn_s))
106133 +                       return -EINVAL;
106134 +
106135 +               n = fm_dump_tnum_dbg(p_wrp_fm_dev->h_Dev,
106136 +                                       tn_s, tn_s + 15, buf, n);
106137 +       }
106138 +       local_irq_restore(flags);
106139 +#else
106140 +
106141 +       local_irq_save(flags);
106142 +       n = snprintf(buf, PAGE_SIZE,
106143 +                       "Debug level is too low to dump registers!!!\n");
106144 +       local_irq_restore(flags);
106145 +#endif /* (defined(DEBUG_ERRORS) && ... */
106146 +
106147 +       return n;
106148 +}
106149 +
106150 +static ssize_t show_fm_cls_plan(struct device *dev,
106151 +                               struct device_attribute *attr,
106152 +                               char *buf)
106153 +{
106154 +       unsigned long flags;
106155 +       unsigned n = 0;
106156 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106157 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106158 +#endif
106159 +
106160 +       if (attr == NULL || buf == NULL || dev == NULL)
106161 +               return -EINVAL;
106162 +
106163 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106164 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106165 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106166 +               return -EINVAL;
106167 +
106168 +       local_irq_save(flags);
106169 +
106170 +       n = snprintf(buf, PAGE_SIZE, "\n FM-KG classification plan dump.\n");
106171 +
106172 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106173 +               return -EIO;
106174 +       else {
106175 +               int cpn;
106176 +
106177 +               if (!sscanf(attr->attr.name, "cls_plan_%d", &cpn))
106178 +                       return -EINVAL;
106179 +
106180 +               n = fm_dump_cls_plan(p_wrp_fm_dev->h_PcdDev, cpn, buf, n);
106181 +       }
106182 +       local_irq_restore(flags);
106183 +#else
106184 +       local_irq_save(flags);
106185 +       n = snprintf(buf, PAGE_SIZE,
106186 +                       "Debug level is too low to dump registers!!!\n");
106187 +       local_irq_restore(flags);
106188 +#endif /* (defined(DEBUG_ERRORS) && ... */
106189 +
106190 +       return n;
106191 +}
106192 +
106193 +static ssize_t show_fm_profiles(struct device *dev,
106194 +                               struct device_attribute *attr,
106195 +                               char *buf)
106196 +{
106197 +       unsigned long flags;
106198 +       unsigned n = 0;
106199 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106200 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106201 +#endif
106202 +
106203 +       if (attr == NULL || buf == NULL || dev == NULL)
106204 +               return -EINVAL;
106205 +
106206 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106207 +
106208 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106209 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106210 +               return -EINVAL;
106211 +
106212 +       local_irq_save(flags);
106213 +
106214 +       n = snprintf(buf, PAGE_SIZE, "FM policer profile dump.\n");
106215 +
106216 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106217 +               return -EIO;
106218 +       else {
106219 +               int pn;
106220 +
106221 +               if (!sscanf(attr->attr.name, "profile_%d", &pn))
106222 +                       return -EINVAL;
106223 +
106224 +               n = fm_profile_dump_regs(p_wrp_fm_dev->h_PcdDev, pn, buf, n);
106225 +       }
106226 +       local_irq_restore(flags);
106227 +#else
106228 +       local_irq_save(flags);
106229 +       n = snprintf(buf, PAGE_SIZE,
106230 +                       "Debug level is too low to dump registers!!!\n");
106231 +       local_irq_restore(flags);
106232 +#endif /* (defined(DEBUG_ERRORS) && ... */
106233 +
106234 +       return n;
106235 +}
106236 +
106237 +static ssize_t show_fm_schemes(struct device *dev,
106238 +                               struct device_attribute *attr,
106239 +                               char *buf)
106240 +{
106241 +       unsigned long flags;
106242 +       unsigned n = 0;
106243 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106244 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106245 +#endif
106246 +
106247 +       if (attr == NULL || buf == NULL || dev == NULL)
106248 +               return -EINVAL;
106249 +
106250 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106251 +
106252 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106253 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106254 +               return -EINVAL;
106255 +
106256 +       local_irq_save(flags);
106257 +
106258 +       n = snprintf(buf, PAGE_SIZE, "FM-KG driver schemes dump.\n");
106259 +
106260 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106261 +               return -EIO;
106262 +       else {
106263 +               int sn;
106264 +
106265 +               if (!sscanf(attr->attr.name, "scheme_%d", &sn))
106266 +                       return -EINVAL;
106267 +
106268 +               n = fm_dump_scheme(p_wrp_fm_dev->h_PcdDev, sn, buf, n);
106269 +       }
106270 +       local_irq_restore(flags);
106271 +#else
106272 +
106273 +       local_irq_save(flags);
106274 +       n = snprintf(buf, PAGE_SIZE,
106275 +                    "Debug level is too low to dump registers!!!\n");
106276 +       local_irq_restore(flags);
106277 +#endif /* (defined(DEBUG_ERRORS) && ... */
106278 +
106279 +       return n;
106280 +}
106281 +
106282 +/* FM */
106283 +static DEVICE_ATTR(enq_total_frame, S_IRUGO, show_fm_stats, NULL);
106284 +static DEVICE_ATTR(deq_total_frame, S_IRUGO, show_fm_stats, NULL);
106285 +static DEVICE_ATTR(fm_risc_load_val, S_IRUGO, show_fm_risc_load, NULL);
106286 +static DEVICE_ATTR(deq_0, S_IRUGO, show_fm_stats, NULL);
106287 +static DEVICE_ATTR(deq_1, S_IRUGO, show_fm_stats, NULL);
106288 +static DEVICE_ATTR(deq_2, S_IRUGO, show_fm_stats, NULL);
106289 +static DEVICE_ATTR(deq_3, S_IRUGO, show_fm_stats, NULL);
106290 +static DEVICE_ATTR(deq_from_default, S_IRUGO, show_fm_stats, NULL);
106291 +static DEVICE_ATTR(deq_from_context, S_IRUGO, show_fm_stats, NULL);
106292 +static DEVICE_ATTR(deq_from_fd, S_IRUGO, show_fm_stats, NULL);
106293 +static DEVICE_ATTR(deq_confirm, S_IRUGO, show_fm_stats, NULL);
106294 +/* FM:DMA */
106295 +static DEVICE_ATTR(cmq_not_empty, S_IRUGO, show_fm_dma_stats, NULL);
106296 +static DEVICE_ATTR(bus_error, S_IRUGO, show_fm_dma_stats, NULL);
106297 +static DEVICE_ATTR(read_buf_ecc_error, S_IRUGO, show_fm_dma_stats, NULL);
106298 +static DEVICE_ATTR(write_buf_ecc_sys_error, S_IRUGO, show_fm_dma_stats, NULL);
106299 +static DEVICE_ATTR(write_buf_ecc_fm_error, S_IRUGO, show_fm_dma_stats, NULL);
106300 +/* FM:PCD */
106301 +static DEVICE_ATTR(pcd_kg_total, S_IRUGO, show_fm_pcd_stats, NULL);
106302 +static DEVICE_ATTR(pcd_plcr_yellow, S_IRUGO, show_fm_pcd_stats, NULL);
106303 +static DEVICE_ATTR(pcd_plcr_red, S_IRUGO, show_fm_pcd_stats, NULL);
106304 +static DEVICE_ATTR(pcd_plcr_recolored_to_red, S_IRUGO, show_fm_pcd_stats,
106305 +                  NULL);
106306 +static DEVICE_ATTR(pcd_plcr_recolored_to_yellow, S_IRUGO, show_fm_pcd_stats,
106307 +                  NULL);
106308 +static DEVICE_ATTR(pcd_plcr_total, S_IRUGO, show_fm_pcd_stats, NULL);
106309 +static DEVICE_ATTR(pcd_plcr_length_mismatch, S_IRUGO, show_fm_pcd_stats,
106310 +                  NULL);
106311 +static DEVICE_ATTR(pcd_prs_parse_dispatch, S_IRUGO, show_fm_pcd_stats, NULL);
106312 +static DEVICE_ATTR(pcd_prs_l2_parse_result_returned, S_IRUGO,
106313 +                  show_fm_pcd_stats, NULL);
106314 +static DEVICE_ATTR(pcd_prs_l3_parse_result_returned, S_IRUGO,
106315 +                  show_fm_pcd_stats, NULL);
106316 +static DEVICE_ATTR(pcd_prs_l4_parse_result_returned, S_IRUGO,
106317 +                  show_fm_pcd_stats, NULL);
106318 +static DEVICE_ATTR(pcd_prs_shim_parse_result_returned, S_IRUGO,
106319 +                  show_fm_pcd_stats, NULL);
106320 +static DEVICE_ATTR(pcd_prs_l2_parse_result_returned_with_err, S_IRUGO,
106321 +                  show_fm_pcd_stats, NULL);
106322 +static DEVICE_ATTR(pcd_prs_l3_parse_result_returned_with_err, S_IRUGO,
106323 +                  show_fm_pcd_stats, NULL);
106324 +static DEVICE_ATTR(pcd_prs_l4_parse_result_returned_with_err, S_IRUGO,
106325 +                  show_fm_pcd_stats, NULL);
106326 +static DEVICE_ATTR(pcd_prs_shim_parse_result_returned_with_err, S_IRUGO,
106327 +                  show_fm_pcd_stats, NULL);
106328 +static DEVICE_ATTR(pcd_prs_soft_prs_cycles, S_IRUGO, show_fm_pcd_stats, NULL);
106329 +static DEVICE_ATTR(pcd_prs_soft_prs_stall_cycles, S_IRUGO, show_fm_pcd_stats,
106330 +                  NULL);
106331 +static DEVICE_ATTR(pcd_prs_hard_prs_cycle_incl_stall_cycles, S_IRUGO,
106332 +                  show_fm_pcd_stats, NULL);
106333 +static DEVICE_ATTR(pcd_prs_muram_read_cycles, S_IRUGO, show_fm_pcd_stats,
106334 +                  NULL);
106335 +static DEVICE_ATTR(pcd_prs_muram_read_stall_cycles, S_IRUGO,
106336 +                  show_fm_pcd_stats, NULL);
106337 +static DEVICE_ATTR(pcd_prs_muram_write_cycles, S_IRUGO, show_fm_pcd_stats,
106338 +                  NULL);
106339 +static DEVICE_ATTR(pcd_prs_muram_write_stall_cycles, S_IRUGO,
106340 +                  show_fm_pcd_stats, NULL);
106341 +static DEVICE_ATTR(pcd_prs_fpm_command_stall_cycles, S_IRUGO,
106342 +                  show_fm_pcd_stats, NULL);
106343 +
106344 +static DEVICE_ATTR(tnum_dbg_0, S_IRUGO, show_fm_tnum_dbg, NULL);
106345 +static DEVICE_ATTR(tnum_dbg_16, S_IRUGO, show_fm_tnum_dbg, NULL);
106346 +static DEVICE_ATTR(tnum_dbg_32, S_IRUGO, show_fm_tnum_dbg, NULL);
106347 +static DEVICE_ATTR(tnum_dbg_48, S_IRUGO, show_fm_tnum_dbg, NULL);
106348 +static DEVICE_ATTR(tnum_dbg_64, S_IRUGO, show_fm_tnum_dbg, NULL);
106349 +static DEVICE_ATTR(tnum_dbg_80, S_IRUGO, show_fm_tnum_dbg, NULL);
106350 +static DEVICE_ATTR(tnum_dbg_96, S_IRUGO, show_fm_tnum_dbg, NULL);
106351 +static DEVICE_ATTR(tnum_dbg_112, S_IRUGO, show_fm_tnum_dbg, NULL);
106352 +
106353 +static DEVICE_ATTR(cls_plan_0, S_IRUGO, show_fm_cls_plan, NULL);
106354 +static DEVICE_ATTR(cls_plan_1, S_IRUGO, show_fm_cls_plan, NULL);
106355 +static DEVICE_ATTR(cls_plan_2, S_IRUGO, show_fm_cls_plan, NULL);
106356 +static DEVICE_ATTR(cls_plan_3, S_IRUGO, show_fm_cls_plan, NULL);
106357 +static DEVICE_ATTR(cls_plan_4, S_IRUGO, show_fm_cls_plan, NULL);
106358 +static DEVICE_ATTR(cls_plan_5, S_IRUGO, show_fm_cls_plan, NULL);
106359 +static DEVICE_ATTR(cls_plan_6, S_IRUGO, show_fm_cls_plan, NULL);
106360 +static DEVICE_ATTR(cls_plan_7, S_IRUGO, show_fm_cls_plan, NULL);
106361 +static DEVICE_ATTR(cls_plan_8, S_IRUGO, show_fm_cls_plan, NULL);
106362 +static DEVICE_ATTR(cls_plan_9, S_IRUGO, show_fm_cls_plan, NULL);
106363 +static DEVICE_ATTR(cls_plan_10, S_IRUGO, show_fm_cls_plan, NULL);
106364 +static DEVICE_ATTR(cls_plan_11, S_IRUGO, show_fm_cls_plan, NULL);
106365 +static DEVICE_ATTR(cls_plan_12, S_IRUGO, show_fm_cls_plan, NULL);
106366 +static DEVICE_ATTR(cls_plan_13, S_IRUGO, show_fm_cls_plan, NULL);
106367 +static DEVICE_ATTR(cls_plan_14, S_IRUGO, show_fm_cls_plan, NULL);
106368 +static DEVICE_ATTR(cls_plan_15, S_IRUGO, show_fm_cls_plan, NULL);
106369 +static DEVICE_ATTR(cls_plan_16, S_IRUGO, show_fm_cls_plan, NULL);
106370 +static DEVICE_ATTR(cls_plan_17, S_IRUGO, show_fm_cls_plan, NULL);
106371 +static DEVICE_ATTR(cls_plan_18, S_IRUGO, show_fm_cls_plan, NULL);
106372 +static DEVICE_ATTR(cls_plan_19, S_IRUGO, show_fm_cls_plan, NULL);
106373 +static DEVICE_ATTR(cls_plan_20, S_IRUGO, show_fm_cls_plan, NULL);
106374 +static DEVICE_ATTR(cls_plan_21, S_IRUGO, show_fm_cls_plan, NULL);
106375 +static DEVICE_ATTR(cls_plan_22, S_IRUGO, show_fm_cls_plan, NULL);
106376 +static DEVICE_ATTR(cls_plan_23, S_IRUGO, show_fm_cls_plan, NULL);
106377 +static DEVICE_ATTR(cls_plan_24, S_IRUGO, show_fm_cls_plan, NULL);
106378 +static DEVICE_ATTR(cls_plan_25, S_IRUGO, show_fm_cls_plan, NULL);
106379 +static DEVICE_ATTR(cls_plan_26, S_IRUGO, show_fm_cls_plan, NULL);
106380 +static DEVICE_ATTR(cls_plan_27, S_IRUGO, show_fm_cls_plan, NULL);
106381 +static DEVICE_ATTR(cls_plan_28, S_IRUGO, show_fm_cls_plan, NULL);
106382 +static DEVICE_ATTR(cls_plan_29, S_IRUGO, show_fm_cls_plan, NULL);
106383 +static DEVICE_ATTR(cls_plan_30, S_IRUGO, show_fm_cls_plan, NULL);
106384 +static DEVICE_ATTR(cls_plan_31, S_IRUGO, show_fm_cls_plan, NULL);
106385 +
106386 +static DEVICE_ATTR(profile_0, S_IRUGO, show_fm_profiles, NULL);
106387 +static DEVICE_ATTR(profile_1, S_IRUGO, show_fm_profiles, NULL);
106388 +static DEVICE_ATTR(profile_2, S_IRUGO, show_fm_profiles, NULL);
106389 +static DEVICE_ATTR(profile_3, S_IRUGO, show_fm_profiles, NULL);
106390 +static DEVICE_ATTR(profile_4, S_IRUGO, show_fm_profiles, NULL);
106391 +static DEVICE_ATTR(profile_5, S_IRUGO, show_fm_profiles, NULL);
106392 +static DEVICE_ATTR(profile_6, S_IRUGO, show_fm_profiles, NULL);
106393 +static DEVICE_ATTR(profile_7, S_IRUGO, show_fm_profiles, NULL);
106394 +static DEVICE_ATTR(profile_8, S_IRUGO, show_fm_profiles, NULL);
106395 +static DEVICE_ATTR(profile_9, S_IRUGO, show_fm_profiles, NULL);
106396 +static DEVICE_ATTR(profile_10, S_IRUGO, show_fm_profiles, NULL);
106397 +static DEVICE_ATTR(profile_11, S_IRUGO, show_fm_profiles, NULL);
106398 +static DEVICE_ATTR(profile_12, S_IRUGO, show_fm_profiles, NULL);
106399 +static DEVICE_ATTR(profile_13, S_IRUGO, show_fm_profiles, NULL);
106400 +static DEVICE_ATTR(profile_14, S_IRUGO, show_fm_profiles, NULL);
106401 +static DEVICE_ATTR(profile_15, S_IRUGO, show_fm_profiles, NULL);
106402 +static DEVICE_ATTR(profile_16, S_IRUGO, show_fm_profiles, NULL);
106403 +static DEVICE_ATTR(profile_17, S_IRUGO, show_fm_profiles, NULL);
106404 +static DEVICE_ATTR(profile_18, S_IRUGO, show_fm_profiles, NULL);
106405 +static DEVICE_ATTR(profile_19, S_IRUGO, show_fm_profiles, NULL);
106406 +static DEVICE_ATTR(profile_20, S_IRUGO, show_fm_profiles, NULL);
106407 +static DEVICE_ATTR(profile_21, S_IRUGO, show_fm_profiles, NULL);
106408 +static DEVICE_ATTR(profile_22, S_IRUGO, show_fm_profiles, NULL);
106409 +static DEVICE_ATTR(profile_23, S_IRUGO, show_fm_profiles, NULL);
106410 +static DEVICE_ATTR(profile_24, S_IRUGO, show_fm_profiles, NULL);
106411 +static DEVICE_ATTR(profile_25, S_IRUGO, show_fm_profiles, NULL);
106412 +static DEVICE_ATTR(profile_26, S_IRUGO, show_fm_profiles, NULL);
106413 +static DEVICE_ATTR(profile_27, S_IRUGO, show_fm_profiles, NULL);
106414 +static DEVICE_ATTR(profile_28, S_IRUGO, show_fm_profiles, NULL);
106415 +static DEVICE_ATTR(profile_29, S_IRUGO, show_fm_profiles, NULL);
106416 +static DEVICE_ATTR(profile_30, S_IRUGO, show_fm_profiles, NULL);
106417 +static DEVICE_ATTR(profile_31, S_IRUGO, show_fm_profiles, NULL);
106418 +
106419 +static DEVICE_ATTR(scheme_0, S_IRUGO, show_fm_schemes, NULL);
106420 +static DEVICE_ATTR(scheme_1, S_IRUGO, show_fm_schemes, NULL);
106421 +static DEVICE_ATTR(scheme_2, S_IRUGO, show_fm_schemes, NULL);
106422 +static DEVICE_ATTR(scheme_3, S_IRUGO, show_fm_schemes, NULL);
106423 +static DEVICE_ATTR(scheme_4, S_IRUGO, show_fm_schemes, NULL);
106424 +static DEVICE_ATTR(scheme_5, S_IRUGO, show_fm_schemes, NULL);
106425 +static DEVICE_ATTR(scheme_6, S_IRUGO, show_fm_schemes, NULL);
106426 +static DEVICE_ATTR(scheme_7, S_IRUGO, show_fm_schemes, NULL);
106427 +static DEVICE_ATTR(scheme_8, S_IRUGO, show_fm_schemes, NULL);
106428 +static DEVICE_ATTR(scheme_9, S_IRUGO, show_fm_schemes, NULL);
106429 +static DEVICE_ATTR(scheme_10, S_IRUGO, show_fm_schemes, NULL);
106430 +static DEVICE_ATTR(scheme_11, S_IRUGO, show_fm_schemes, NULL);
106431 +static DEVICE_ATTR(scheme_12, S_IRUGO, show_fm_schemes, NULL);
106432 +static DEVICE_ATTR(scheme_13, S_IRUGO, show_fm_schemes, NULL);
106433 +static DEVICE_ATTR(scheme_14, S_IRUGO, show_fm_schemes, NULL);
106434 +static DEVICE_ATTR(scheme_15, S_IRUGO, show_fm_schemes, NULL);
106435 +static DEVICE_ATTR(scheme_16, S_IRUGO, show_fm_schemes, NULL);
106436 +static DEVICE_ATTR(scheme_17, S_IRUGO, show_fm_schemes, NULL);
106437 +static DEVICE_ATTR(scheme_18, S_IRUGO, show_fm_schemes, NULL);
106438 +static DEVICE_ATTR(scheme_19, S_IRUGO, show_fm_schemes, NULL);
106439 +static DEVICE_ATTR(scheme_20, S_IRUGO, show_fm_schemes, NULL);
106440 +static DEVICE_ATTR(scheme_21, S_IRUGO, show_fm_schemes, NULL);
106441 +static DEVICE_ATTR(scheme_22, S_IRUGO, show_fm_schemes, NULL);
106442 +static DEVICE_ATTR(scheme_23, S_IRUGO, show_fm_schemes, NULL);
106443 +static DEVICE_ATTR(scheme_24, S_IRUGO, show_fm_schemes, NULL);
106444 +static DEVICE_ATTR(scheme_25, S_IRUGO, show_fm_schemes, NULL);
106445 +static DEVICE_ATTR(scheme_26, S_IRUGO, show_fm_schemes, NULL);
106446 +static DEVICE_ATTR(scheme_27, S_IRUGO, show_fm_schemes, NULL);
106447 +static DEVICE_ATTR(scheme_28, S_IRUGO, show_fm_schemes, NULL);
106448 +static DEVICE_ATTR(scheme_29, S_IRUGO, show_fm_schemes, NULL);
106449 +static DEVICE_ATTR(scheme_30, S_IRUGO, show_fm_schemes, NULL);
106450 +static DEVICE_ATTR(scheme_31, S_IRUGO, show_fm_schemes, NULL);
106451 +
106452 +
106453 +static struct attribute *fm_dev_stats_attributes[] = {
106454 +       &dev_attr_enq_total_frame.attr,
106455 +       &dev_attr_deq_total_frame.attr,
106456 +       &dev_attr_deq_0.attr,
106457 +       &dev_attr_deq_1.attr,
106458 +       &dev_attr_deq_2.attr,
106459 +       &dev_attr_deq_3.attr,
106460 +       &dev_attr_deq_from_default.attr,
106461 +       &dev_attr_deq_from_context.attr,
106462 +       &dev_attr_deq_from_fd.attr,
106463 +       &dev_attr_deq_confirm.attr,
106464 +       &dev_attr_cmq_not_empty.attr,
106465 +       &dev_attr_bus_error.attr,
106466 +       &dev_attr_read_buf_ecc_error.attr,
106467 +       &dev_attr_write_buf_ecc_sys_error.attr,
106468 +       &dev_attr_write_buf_ecc_fm_error.attr,
106469 +       &dev_attr_pcd_kg_total.attr,
106470 +       &dev_attr_pcd_plcr_yellow.attr,
106471 +       &dev_attr_pcd_plcr_red.attr,
106472 +       &dev_attr_pcd_plcr_recolored_to_red.attr,
106473 +       &dev_attr_pcd_plcr_recolored_to_yellow.attr,
106474 +       &dev_attr_pcd_plcr_total.attr,
106475 +       &dev_attr_pcd_plcr_length_mismatch.attr,
106476 +       &dev_attr_pcd_prs_parse_dispatch.attr,
106477 +       &dev_attr_pcd_prs_l2_parse_result_returned.attr,
106478 +       &dev_attr_pcd_prs_l3_parse_result_returned.attr,
106479 +       &dev_attr_pcd_prs_l4_parse_result_returned.attr,
106480 +       &dev_attr_pcd_prs_shim_parse_result_returned.attr,
106481 +       &dev_attr_pcd_prs_l2_parse_result_returned_with_err.attr,
106482 +       &dev_attr_pcd_prs_l3_parse_result_returned_with_err.attr,
106483 +       &dev_attr_pcd_prs_l4_parse_result_returned_with_err.attr,
106484 +       &dev_attr_pcd_prs_shim_parse_result_returned_with_err.attr,
106485 +       &dev_attr_pcd_prs_soft_prs_cycles.attr,
106486 +       &dev_attr_pcd_prs_soft_prs_stall_cycles.attr,
106487 +       &dev_attr_pcd_prs_hard_prs_cycle_incl_stall_cycles.attr,
106488 +       &dev_attr_pcd_prs_muram_read_cycles.attr,
106489 +       &dev_attr_pcd_prs_muram_read_stall_cycles.attr,
106490 +       &dev_attr_pcd_prs_muram_write_cycles.attr,
106491 +       &dev_attr_pcd_prs_muram_write_stall_cycles.attr,
106492 +       &dev_attr_pcd_prs_fpm_command_stall_cycles.attr,
106493 +       NULL
106494 +};
106495 +
106496 +static struct attribute *fm_dev_tnums_dbg_attributes[] = {
106497 +       &dev_attr_tnum_dbg_0.attr,
106498 +       &dev_attr_tnum_dbg_16.attr,
106499 +       &dev_attr_tnum_dbg_32.attr,
106500 +       &dev_attr_tnum_dbg_48.attr,
106501 +       &dev_attr_tnum_dbg_64.attr,
106502 +       &dev_attr_tnum_dbg_80.attr,
106503 +       &dev_attr_tnum_dbg_96.attr,
106504 +       &dev_attr_tnum_dbg_112.attr,
106505 +       NULL
106506 +};
106507 +
106508 +static struct attribute *fm_dev_cls_plans_attributes[] = {
106509 +       &dev_attr_cls_plan_0.attr,
106510 +       &dev_attr_cls_plan_1.attr,
106511 +       &dev_attr_cls_plan_2.attr,
106512 +       &dev_attr_cls_plan_3.attr,
106513 +       &dev_attr_cls_plan_4.attr,
106514 +       &dev_attr_cls_plan_5.attr,
106515 +       &dev_attr_cls_plan_6.attr,
106516 +       &dev_attr_cls_plan_7.attr,
106517 +       &dev_attr_cls_plan_8.attr,
106518 +       &dev_attr_cls_plan_9.attr,
106519 +       &dev_attr_cls_plan_10.attr,
106520 +       &dev_attr_cls_plan_11.attr,
106521 +       &dev_attr_cls_plan_12.attr,
106522 +       &dev_attr_cls_plan_13.attr,
106523 +       &dev_attr_cls_plan_14.attr,
106524 +       &dev_attr_cls_plan_15.attr,
106525 +       &dev_attr_cls_plan_16.attr,
106526 +       &dev_attr_cls_plan_17.attr,
106527 +       &dev_attr_cls_plan_18.attr,
106528 +       &dev_attr_cls_plan_19.attr,
106529 +       &dev_attr_cls_plan_20.attr,
106530 +       &dev_attr_cls_plan_21.attr,
106531 +       &dev_attr_cls_plan_22.attr,
106532 +       &dev_attr_cls_plan_23.attr,
106533 +       &dev_attr_cls_plan_24.attr,
106534 +       &dev_attr_cls_plan_25.attr,
106535 +       &dev_attr_cls_plan_26.attr,
106536 +       &dev_attr_cls_plan_27.attr,
106537 +       &dev_attr_cls_plan_28.attr,
106538 +       &dev_attr_cls_plan_29.attr,
106539 +       &dev_attr_cls_plan_30.attr,
106540 +       &dev_attr_cls_plan_31.attr,
106541 +       NULL
106542 +};
106543 +
106544 +static struct attribute *fm_dev_profiles_attributes[] = {
106545 +       &dev_attr_profile_0.attr,
106546 +       &dev_attr_profile_1.attr,
106547 +       &dev_attr_profile_2.attr,
106548 +       &dev_attr_profile_3.attr,
106549 +       &dev_attr_profile_4.attr,
106550 +       &dev_attr_profile_5.attr,
106551 +       &dev_attr_profile_6.attr,
106552 +       &dev_attr_profile_7.attr,
106553 +       &dev_attr_profile_8.attr,
106554 +       &dev_attr_profile_9.attr,
106555 +       &dev_attr_profile_10.attr,
106556 +       &dev_attr_profile_11.attr,
106557 +       &dev_attr_profile_12.attr,
106558 +       &dev_attr_profile_13.attr,
106559 +       &dev_attr_profile_14.attr,
106560 +       &dev_attr_profile_15.attr,
106561 +       &dev_attr_profile_16.attr,
106562 +       &dev_attr_profile_17.attr,
106563 +       &dev_attr_profile_18.attr,
106564 +       &dev_attr_profile_19.attr,
106565 +       &dev_attr_profile_20.attr,
106566 +       &dev_attr_profile_21.attr,
106567 +       &dev_attr_profile_22.attr,
106568 +       &dev_attr_profile_23.attr,
106569 +       &dev_attr_profile_24.attr,
106570 +       &dev_attr_profile_25.attr,
106571 +       &dev_attr_profile_26.attr,
106572 +       &dev_attr_profile_27.attr,
106573 +       &dev_attr_profile_28.attr,
106574 +       &dev_attr_profile_29.attr,
106575 +       &dev_attr_profile_30.attr,
106576 +       &dev_attr_profile_31.attr,
106577 +       NULL
106578 +};
106579 +
106580 +static struct attribute *fm_dev_schemes_attributes[] = {
106581 +       &dev_attr_scheme_0.attr,
106582 +       &dev_attr_scheme_1.attr,
106583 +       &dev_attr_scheme_2.attr,
106584 +       &dev_attr_scheme_3.attr,
106585 +       &dev_attr_scheme_4.attr,
106586 +       &dev_attr_scheme_5.attr,
106587 +       &dev_attr_scheme_6.attr,
106588 +       &dev_attr_scheme_7.attr,
106589 +       &dev_attr_scheme_8.attr,
106590 +       &dev_attr_scheme_9.attr,
106591 +       &dev_attr_scheme_10.attr,
106592 +       &dev_attr_scheme_11.attr,
106593 +       &dev_attr_scheme_12.attr,
106594 +       &dev_attr_scheme_13.attr,
106595 +       &dev_attr_scheme_14.attr,
106596 +       &dev_attr_scheme_15.attr,
106597 +       &dev_attr_scheme_16.attr,
106598 +       &dev_attr_scheme_17.attr,
106599 +       &dev_attr_scheme_18.attr,
106600 +       &dev_attr_scheme_19.attr,
106601 +       &dev_attr_scheme_20.attr,
106602 +       &dev_attr_scheme_21.attr,
106603 +       &dev_attr_scheme_22.attr,
106604 +       &dev_attr_scheme_23.attr,
106605 +       &dev_attr_scheme_24.attr,
106606 +       &dev_attr_scheme_25.attr,
106607 +       &dev_attr_scheme_26.attr,
106608 +       &dev_attr_scheme_27.attr,
106609 +       &dev_attr_scheme_28.attr,
106610 +       &dev_attr_scheme_29.attr,
106611 +       &dev_attr_scheme_30.attr,
106612 +       &dev_attr_scheme_31.attr,
106613 +       NULL
106614 +};
106615 +
106616 +static const struct attribute_group fm_dev_stats_attr_grp = {
106617 +       .name = "statistics",
106618 +       .attrs = fm_dev_stats_attributes
106619 +};
106620 +
106621 +static const struct attribute_group fm_dev_tnums_dbg_attr_grp = {
106622 +       .name = "tnums_dbg",
106623 +       .attrs = fm_dev_tnums_dbg_attributes
106624 +};
106625 +
106626 +static const struct attribute_group fm_dev_cls_plans_attr_grp = {
106627 +       .name = "cls_plans",
106628 +       .attrs = fm_dev_cls_plans_attributes
106629 +};
106630 +
106631 +static const struct attribute_group fm_dev_schemes_attr_grp = {
106632 +       .name = "schemes",
106633 +       .attrs = fm_dev_schemes_attributes
106634 +};
106635 +
106636 +static const struct attribute_group fm_dev_profiles_attr_grp = {
106637 +       .name = "profiles",
106638 +       .attrs = fm_dev_profiles_attributes
106639 +};
106640 +
106641 +static ssize_t show_fm_regs(struct device *dev,
106642 +                               struct device_attribute *attr,
106643 +                               char *buf)
106644 +{
106645 +       unsigned long flags;
106646 +       unsigned n = 0;
106647 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106648 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106649 +#endif
106650 +       if (attr == NULL || buf == NULL || dev == NULL)
106651 +               return -EINVAL;
106652 +
106653 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106654 +
106655 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106656 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106657 +               return -EINVAL;
106658 +
106659 +       local_irq_save(flags);
106660 +
106661 +       n = snprintf(buf, PAGE_SIZE, "FM driver registers dump.\n");
106662 +
106663 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
106664 +               return -EIO;
106665 +       else
106666 +               n = fm_dump_regs(p_wrp_fm_dev->h_Dev, buf, n);
106667 +
106668 +       local_irq_restore(flags);
106669 +#else
106670 +
106671 +       local_irq_save(flags);
106672 +       n = snprintf(buf, PAGE_SIZE,
106673 +                       "Debug level is too low to dump registers!!!\n");
106674 +       local_irq_restore(flags);
106675 +#endif /* (defined(DEBUG_ERRORS) && ... */
106676 +
106677 +       return n;
106678 +}
106679 +
106680 +static ssize_t show_fm_kg_pe_regs(struct device *dev,
106681 +                               struct device_attribute *attr,
106682 +                               char *buf)
106683 +{
106684 +       unsigned long flags;
106685 +       unsigned n = 0;
106686 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106687 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106688 +#endif
106689 +
106690 +       if (attr == NULL || buf == NULL || dev == NULL)
106691 +               return -EINVAL;
106692 +
106693 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106694 +
106695 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106696 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106697 +               return -EINVAL;
106698 +
106699 +       local_irq_save(flags);
106700 +
106701 +       n = snprintf(buf, PAGE_SIZE,
106702 +                       "\n FM-KG Port Partition Config registers dump.\n");
106703 +
106704 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106705 +               return -EIO;
106706 +       else
106707 +               n = fm_kg_pe_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
106708 +
106709 +       local_irq_restore(flags);
106710 +#else
106711 +
106712 +       local_irq_save(flags);
106713 +       n = snprintf(buf, PAGE_SIZE,
106714 +                       "Debug level is too low to dump registers!!!\n");
106715 +       local_irq_restore(flags);
106716 +#endif /* (defined(DEBUG_ERRORS) && ... */
106717 +
106718 +       return n;
106719 +}
106720 +
106721 +static ssize_t show_fm_kg_regs(struct device *dev,
106722 +                               struct device_attribute *attr,
106723 +                               char *buf)
106724 +{
106725 +       unsigned long flags;
106726 +       unsigned n = 0;
106727 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106728 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106729 +#endif
106730 +
106731 +       if (attr == NULL || buf == NULL || dev == NULL)
106732 +               return -EINVAL;
106733 +
106734 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106735 +
106736 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106737 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106738 +               return -EINVAL;
106739 +
106740 +       local_irq_save(flags);
106741 +
106742 +       n = snprintf(buf, PAGE_SIZE, "FM-KG registers dump.\n");
106743 +
106744 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106745 +               return -EIO;
106746 +       else
106747 +               n = fm_kg_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
106748 +
106749 +       local_irq_restore(flags);
106750 +#else
106751 +
106752 +       local_irq_save(flags);
106753 +       n = snprintf(buf, PAGE_SIZE,
106754 +                       "Debug level is too low to dump registers!!!\n");
106755 +       local_irq_restore(flags);
106756 +#endif /* (defined(DEBUG_ERRORS) && ... */
106757 +
106758 +       return n;
106759 +}
106760 +
106761 +
106762 +static ssize_t show_fm_fpm_regs(struct device *dev,
106763 +                               struct device_attribute *attr,
106764 +                               char *buf)
106765 +{
106766 +       unsigned long flags;
106767 +       unsigned n = 0;
106768 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106769 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106770 +#endif
106771 +
106772 +       if (attr == NULL || buf == NULL || dev == NULL)
106773 +               return -EINVAL;
106774 +
106775 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106776 +
106777 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106778 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106779 +               return -EINVAL;
106780 +
106781 +       local_irq_save(flags);
106782 +
106783 +       n = snprintf(buf, PAGE_SIZE, "FM-FPM registers dump.\n");
106784 +
106785 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
106786 +               return -EIO;
106787 +       else
106788 +               n = fm_fpm_dump_regs(p_wrp_fm_dev->h_Dev, buf, n);
106789 +
106790 +       local_irq_restore(flags);
106791 +#else
106792 +
106793 +       local_irq_save(flags);
106794 +       n = snprintf(buf, PAGE_SIZE,
106795 +                       "Debug level is too low to dump registers!!!\n");
106796 +       local_irq_restore(flags);
106797 +#endif /* (defined(DEBUG_ERRORS) && ... */
106798 +
106799 +       return n;
106800 +}
106801 +
106802 +static ssize_t show_prs_regs(struct device *dev,
106803 +                            struct device_attribute *attr, char *buf)
106804 +{
106805 +       unsigned long flags;
106806 +       unsigned n = 0;
106807 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106808 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106809 +#endif
106810 +
106811 +       if (attr == NULL || buf == NULL || dev == NULL)
106812 +               return -EINVAL;
106813 +
106814 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106815 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106816 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106817 +               return -EINVAL;
106818 +
106819 +       local_irq_save(flags);
106820 +       n = snprintf(buf, PAGE_SIZE, "FM Policer registers dump.\n");
106821 +
106822 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106823 +               return -EIO;
106824 +       else
106825 +               n = fm_prs_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
106826 +
106827 +       local_irq_restore(flags);
106828 +#else
106829 +
106830 +       local_irq_save(flags);
106831 +       n = snprintf(buf, PAGE_SIZE,
106832 +                    "Debug level is too low to dump registers!!!\n");
106833 +       local_irq_restore(flags);
106834 +
106835 +#endif /* (defined(DEBUG_ERRORS) && ... */
106836 +
106837 +       return n;
106838 +}
106839 +
106840 +static ssize_t show_plcr_regs(struct device *dev,
106841 +                               struct device_attribute *attr,
106842 +                               char *buf)
106843 +{
106844 +       unsigned long flags;
106845 +       unsigned n = 0;
106846 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106847 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106848 +#endif
106849 +
106850 +       if (attr == NULL || buf == NULL || dev == NULL)
106851 +               return -EINVAL;
106852 +
106853 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
106854 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106855 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106856 +               return -EINVAL;
106857 +
106858 +       local_irq_save(flags);
106859 +       n = snprintf(buf, PAGE_SIZE, "FM Policer registers dump.\n");
106860 +
106861 +       if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
106862 +               return -EIO;
106863 +       else
106864 +               n = fm_plcr_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
106865 +
106866 +       local_irq_restore(flags);
106867 +#else
106868 +
106869 +       local_irq_save(flags);
106870 +       n = snprintf(buf, PAGE_SIZE,
106871 +                       "Debug level is too low to dump registers!!!\n");
106872 +       local_irq_restore(flags);
106873 +
106874 +#endif /* (defined(DEBUG_ERRORS) && ... */
106875 +
106876 +       return n;
106877 +}
106878 +
106879 +static DEVICE_ATTR(fm_regs, S_IRUGO, show_fm_regs, NULL);
106880 +static DEVICE_ATTR(fm_fpm_regs, S_IRUGO, show_fm_fpm_regs, NULL);
106881 +static DEVICE_ATTR(fm_kg_regs, S_IRUGO, show_fm_kg_regs, NULL);
106882 +static DEVICE_ATTR(fm_kg_pe_regs, S_IRUGO, show_fm_kg_pe_regs, NULL);
106883 +static DEVICE_ATTR(fm_plcr_regs, S_IRUGO, show_plcr_regs, NULL);
106884 +static DEVICE_ATTR(fm_prs_regs, S_IRUGO, show_prs_regs, NULL);
106885 +static DEVICE_ATTR(fm_muram_free_size, S_IRUGO, show_fm_muram_free_sz, NULL);
106886 +static DEVICE_ATTR(fm_ctrl_code_ver, S_IRUGO, show_fm_ctrl_code_ver, NULL);
106887 +
106888 +int fm_sysfs_create(struct device *dev)
106889 +{
106890 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106891 +
106892 +       if (dev == NULL)
106893 +               return -EIO;
106894 +
106895 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106896 +
106897 +       /* store to remove them when module is disabled */
106898 +       p_wrp_fm_dev->dev_attr_regs = &dev_attr_fm_regs;
106899 +       p_wrp_fm_dev->dev_attr_risc_load = &dev_attr_fm_risc_load_val;
106900 +       p_wrp_fm_dev->dev_fm_fpm_attr_regs = &dev_attr_fm_fpm_regs;
106901 +       p_wrp_fm_dev->dev_fm_kg_attr_regs = &dev_attr_fm_kg_regs;
106902 +       p_wrp_fm_dev->dev_fm_kg_pe_attr_regs = &dev_attr_fm_kg_pe_regs;
106903 +       p_wrp_fm_dev->dev_plcr_attr_regs = &dev_attr_fm_plcr_regs;
106904 +       p_wrp_fm_dev->dev_prs_attr_regs = &dev_attr_fm_prs_regs;
106905 +       p_wrp_fm_dev->dev_attr_muram_free_size = &dev_attr_fm_muram_free_size;
106906 +       p_wrp_fm_dev->dev_attr_fm_ctrl_code_ver = &dev_attr_fm_ctrl_code_ver;
106907 +
106908 +       /* Create sysfs statistics group for FM module */
106909 +       if (sysfs_create_group(&dev->kobj, &fm_dev_stats_attr_grp) != 0)
106910 +               return -EIO;
106911 +
106912 +       if (sysfs_create_group(&dev->kobj, &fm_dev_schemes_attr_grp) != 0)
106913 +               return -EIO;
106914 +
106915 +       if (sysfs_create_group(&dev->kobj, &fm_dev_profiles_attr_grp) != 0)
106916 +               return -EIO;
106917 +
106918 +       if (sysfs_create_group(&dev->kobj, &fm_dev_tnums_dbg_attr_grp) != 0)
106919 +               return -EIO;
106920 +
106921 +       if (sysfs_create_group(&dev->kobj, &fm_dev_cls_plans_attr_grp) != 0)
106922 +               return -EIO;
106923 +
106924 +       /* Registers dump entry - in future will be moved to debugfs */
106925 +       if (device_create_file(dev, &dev_attr_fm_regs) != 0)
106926 +               return -EIO;
106927 +
106928 +       if (device_create_file(dev, &dev_attr_fm_risc_load_val) != 0)
106929 +               return -EIO;
106930 +
106931 +       if (device_create_file(dev, &dev_attr_fm_fpm_regs) != 0)
106932 +               return -EIO;
106933 +
106934 +       if (device_create_file(dev, &dev_attr_fm_kg_regs) != 0)
106935 +               return -EIO;
106936 +
106937 +       if (device_create_file(dev, &dev_attr_fm_kg_pe_regs) != 0)
106938 +               return -EIO;
106939 +
106940 +       if (device_create_file(dev, &dev_attr_fm_plcr_regs) != 0)
106941 +               return -EIO;
106942 +
106943 +       if (device_create_file(dev, &dev_attr_fm_prs_regs) != 0)
106944 +               return -EIO;
106945 +
106946 +       /* muram free size */
106947 +       if (device_create_file(dev, &dev_attr_fm_muram_free_size) != 0)
106948 +               return -EIO;
106949 +
106950 +       /* fm ctrl code version */
106951 +       if (device_create_file(dev, &dev_attr_fm_ctrl_code_ver) != 0)
106952 +               return -EIO;
106953 +
106954 +       return 0;
106955 +}
106956 +
106957 +void fm_sysfs_destroy(struct device *dev)
106958 +{
106959 +       t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
106960 +
106961 +       if (WARN_ON(dev == NULL))
106962 +               return;
106963 +
106964 +       p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
106965 +       if (WARN_ON(p_wrp_fm_dev == NULL))
106966 +               return;
106967 +
106968 +       sysfs_remove_group(&dev->kobj, &fm_dev_stats_attr_grp);
106969 +       sysfs_remove_group(&dev->kobj, &fm_dev_schemes_attr_grp);
106970 +       sysfs_remove_group(&dev->kobj, &fm_dev_profiles_attr_grp);
106971 +       sysfs_remove_group(&dev->kobj, &fm_dev_cls_plans_attr_grp);
106972 +       sysfs_remove_group(&dev->kobj, &fm_dev_tnums_dbg_attr_grp);
106973 +       device_remove_file(dev, p_wrp_fm_dev->dev_attr_regs);
106974 +       device_remove_file(dev, p_wrp_fm_dev->dev_fm_fpm_attr_regs);
106975 +       device_remove_file(dev, p_wrp_fm_dev->dev_fm_kg_attr_regs);
106976 +       device_remove_file(dev, p_wrp_fm_dev->dev_fm_kg_pe_attr_regs);
106977 +       device_remove_file(dev, p_wrp_fm_dev->dev_plcr_attr_regs);
106978 +       device_remove_file(dev, p_wrp_fm_dev->dev_prs_attr_regs);
106979 +       device_remove_file(dev, p_wrp_fm_dev->dev_attr_muram_free_size);
106980 +       device_remove_file(dev, p_wrp_fm_dev->dev_attr_fm_ctrl_code_ver);
106981 +}
106982 +
106983 +int fm_dump_regs(void *h_fm, char *buf, int nn)
106984 +{
106985 +       t_Fm            *p_Fm = (t_Fm *)h_fm;
106986 +       uint8_t         i = 0;
106987 +       int             n = nn;
106988 +
106989 +       FM_DMP_SUBTITLE(buf, n, "\n");
106990 +
106991 +       FM_DMP_TITLE(buf, n, p_Fm->p_FmDmaRegs, "FM-DMA Regs");
106992 +
106993 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmsr);
106994 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmemsr);
106995 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmmr);
106996 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtr);
106997 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmhy);
106998 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmsetr);
106999 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtah);
107000 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtal);
107001 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtcid);
107002 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmra);
107003 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmrd);
107004 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmwcr);
107005 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmebcr);
107006 +       FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmdcr);
107007 +
107008 +       FM_DMP_TITLE(buf, n, &p_Fm->p_FmDmaRegs->fmdmplr, "fmdmplr");
107009 +
107010 +       for (i = 0; i < FM_MAX_NUM_OF_HW_PORT_IDS / 2 ; ++i)
107011 +               FM_DMP_MEM_32(buf, n, &p_Fm->p_FmDmaRegs->fmdmplr[i]);
107012 +
107013 +       FM_DMP_TITLE(buf, n, p_Fm->p_FmBmiRegs, "FM-BMI COMMON Regs");
107014 +       FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_init);
107015 +       FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_cfg1);
107016 +       FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_cfg2);
107017 +       FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_ievr);
107018 +       FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_ier);
107019 +
107020 +       FM_DMP_TITLE(buf, n, &p_Fm->p_FmBmiRegs->fmbm_arb, "fmbm_arb");
107021 +       for (i = 0; i < 8 ; ++i)
107022 +               FM_DMP_MEM_32(buf, n, &p_Fm->p_FmBmiRegs->fmbm_arb[i]);
107023 +
107024 +       FM_DMP_TITLE(buf, n, p_Fm->p_FmQmiRegs, "FM-QMI COMMON Regs");
107025 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_gc);
107026 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_eie);
107027 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_eien);
107028 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_eif);
107029 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_ie);
107030 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_ien);
107031 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_if);
107032 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_gs);
107033 +       FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_etfc);
107034 +
107035 +       return n;
107036 +}
107037 +
107038 +int fm_dump_tnum_dbg(void *h_fm, int tn_s, int tn_e, char *buf, int nn)
107039 +{
107040 +       t_Fm            *p_Fm = (t_Fm *)h_fm;
107041 +       uint8_t         i, j = 0;
107042 +       int             n = nn;
107043 +
107044 +       FM_DMP_TITLE(buf, n, NULL, "Tnums and Tnum dbg regs %d - %d",
107045 +                       tn_s, tn_e);
107046 +
107047 +       iowrite32be(tn_s << 24, &p_Fm->p_FmFpmRegs->fmfp_dra);
107048 +
107049 +       mb();
107050 +
107051 +       for (j = tn_s; j <= tn_e; j++) {
107052 +               FM_DMP_LN(buf, n, "> fmfp_ts[%d]\n", j);
107053 +               FM_DMP_MEM_32(buf, n, &p_Fm->p_FmFpmRegs->fmfp_ts[j]);
107054 +               FM_DMP_V32(buf, n, p_Fm->p_FmFpmRegs, fmfp_dra);
107055 +               FM_DMP_LN(buf, n, "> fmfp_drd[0-3]\n");
107056 +
107057 +               for (i = 0; i < 4 ; ++i)
107058 +                       FM_DMP_MEM_32(buf, n, &p_Fm->p_FmFpmRegs->fmfp_drd[i]);
107059 +
107060 +               FM_DMP_LN(buf, n, "\n");
107061 +
107062 +       }
107063 +
107064 +       return n;
107065 +}
107066 +
107067 +int fm_dump_cls_plan(void *h_fm_pcd, int cpn, char *buf, int nn)
107068 +{
107069 +       t_FmPcd                         *p_pcd = (t_FmPcd *)h_fm_pcd;
107070 +       int                             i = 0;
107071 +       uint32_t                        tmp;
107072 +       unsigned long                   i_flg;
107073 +       int                             n = nn;
107074 +       u_FmPcdKgIndirectAccessRegs     *idac;
107075 +       spinlock_t                      *p_lk;
107076 +
107077 +       p_lk = (spinlock_t *)p_pcd->p_FmPcdKg->h_HwSpinlock;
107078 +       idac = p_pcd->p_FmPcdKg->p_IndirectAccessRegs;
107079 +
107080 +       spin_lock_irqsave(p_lk, i_flg);
107081 +
107082 +       /* Read ClsPlan Block Action Regs */
107083 +       tmp =  (uint32_t)(FM_KG_KGAR_GO |
107084 +               FM_KG_KGAR_READ |
107085 +               FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
107086 +               DUMMY_PORT_ID |
107087 +               ((uint32_t)cpn << FM_PCD_KG_KGAR_NUM_SHIFT) |
107088 +               FM_PCD_KG_KGAR_WSEL_MASK);
107089 +
107090 +       if (fman_kg_write_ar_wait(p_pcd->p_FmPcdKg->p_FmPcdKgRegs, tmp)) {
107091 +               FM_DMP_LN(buf, nn, "Keygen scheme access violation");
107092 +               spin_unlock_irqrestore(p_lk, i_flg);
107093 +               return nn;
107094 +       }
107095 +       FM_DMP_TITLE(buf, n, &idac->clsPlanRegs,
107096 +                       "ClsPlan %d Indirect Access Regs", cpn);
107097 +
107098 +       for (i = 0; i < 8; i++)
107099 +               FM_DMP_MEM_32(buf, n, &idac->clsPlanRegs.kgcpe[i]);
107100 +
107101 +       spin_unlock_irqrestore(p_lk, i_flg);
107102 +
107103 +       return n;
107104 +}
107105 +
107106 +int fm_profile_dump_regs(void *h_fm_pcd, int ppn, char *buf, int nn)
107107 +{
107108 +       t_FmPcd                         *p_pcd = (t_FmPcd *)h_fm_pcd;
107109 +       t_FmPcdPlcrProfileRegs          *p_prof_regs;
107110 +       t_FmPcdPlcrRegs                 *p_plcr_regs;
107111 +       t_FmPcdPlcr                     *p_plcr;
107112 +       uint32_t                        tmp;
107113 +       unsigned long                   i_flg;
107114 +       int                             n = nn;
107115 +       int                             toc = 10;
107116 +       spinlock_t                      *p_lk;
107117 +
107118 +       p_plcr = p_pcd->p_FmPcdPlcr;
107119 +       p_prof_regs = &p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->profileRegs;
107120 +       p_plcr_regs = p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
107121 +
107122 +       p_lk = (spinlock_t *)((t_FmPcdPlcr *)p_plcr)->h_HwSpinlock;
107123 +
107124 +       FM_DMP_SUBTITLE(buf, n, "\n");
107125 +       FM_DMP_TITLE(buf, n, p_plcr_regs, "FM-PCD policer-profile regs");
107126 +
107127 +       tmp =  (uint32_t)(FM_PCD_PLCR_PAR_GO |
107128 +                       FM_PCD_PLCR_PAR_R |
107129 +                       ((uint32_t)ppn << FM_PCD_PLCR_PAR_PNUM_SHIFT) |
107130 +                       FM_PCD_PLCR_PAR_PWSEL_MASK);
107131 +
107132 +       spin_lock_irqsave(p_lk, i_flg);
107133 +
107134 +       iowrite32be(tmp, &p_plcr_regs->fmpl_par);
107135 +
107136 +       mb();
107137 +
107138 +       /* wait for the porfile regs to be present */
107139 +       do {
107140 +               --toc;
107141 +               udelay(10);
107142 +               if (!toc) {
107143 +                       /* looks like PLCR_PAR_GO refuses to clear */
107144 +                       spin_unlock_irqrestore(p_lk, i_flg);
107145 +                       FM_DMP_LN(buf, n, "Profile regs not accessible -");
107146 +                       FM_DMP_LN(buf, n, " check profile init process\n");
107147 +                       return n;
107148 +               }
107149 +       } while ((ioread32be(&p_plcr_regs->fmpl_par) & FM_PCD_PLCR_PAR_GO));
107150 +
107151 +       FM_DMP_TITLE(buf, n, p_prof_regs, "Profile %d regs", ppn);
107152 +
107153 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pemode);
107154 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pegnia);
107155 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_peynia);
107156 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pernia);
107157 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pecir);
107158 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pecbs);
107159 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pepepir_eir);
107160 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pepbs_ebs);
107161 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pelts);
107162 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pects);
107163 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pepts_ets);
107164 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_pegpc);
107165 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_peypc);
107166 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_perpc);
107167 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_perypc);
107168 +       FM_DMP_V32(buf, n, p_prof_regs, fmpl_perrpc);
107169 +
107170 +       spin_unlock_irqrestore(p_lk, i_flg);
107171 +
107172 +       return n;
107173 +}
107174 +
107175 +int fm_dump_scheme(void *h_fm_pcd, int scnum, char *buf, int nn)
107176 +{
107177 +       t_FmPcd                         *p_pcd = (t_FmPcd *)h_fm_pcd;
107178 +       uint32_t                        tmp_ar;
107179 +       unsigned long                   i_flg;
107180 +       int                             i, n = nn;
107181 +       spinlock_t                      *p_lk;
107182 +       u_FmPcdKgIndirectAccessRegs     *idac;
107183 +
107184 +       idac = p_pcd->p_FmPcdKg->p_IndirectAccessRegs;
107185 +       p_lk = (spinlock_t *)p_pcd->p_FmPcdKg->h_HwSpinlock;
107186 +
107187 +       spin_lock_irqsave(p_lk, i_flg);
107188 +
107189 +       tmp_ar = FmPcdKgBuildReadSchemeActionReg((uint8_t)scnum);
107190 +       if (fman_kg_write_ar_wait(p_pcd->p_FmPcdKg->p_FmPcdKgRegs, tmp_ar)) {
107191 +               FM_DMP_LN(buf, nn,
107192 +                       "Keygen scheme access violation or no such scheme");
107193 +               spin_unlock_irqrestore(p_lk, i_flg);
107194 +               return nn;
107195 +       }
107196 +
107197 +       FM_DMP_TITLE(buf, n, &idac->schemeRegs,
107198 +                       "Scheme %d Indirect Access Regs", scnum);
107199 +
107200 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_mode);
107201 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ekfc);
107202 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ekdv);
107203 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_bmch);
107204 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_bmcl);
107205 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_fqb);
107206 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_hc);
107207 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ppc);
107208 +
107209 +       FM_DMP_TITLE(buf, n, &idac->schemeRegs.kgse_gec, "kgse_gec");
107210 +
107211 +       for (i = 0; i < FM_KG_NUM_OF_GENERIC_REGS; i++)
107212 +               FM_DMP_MEM_32(buf, n, &idac->schemeRegs.kgse_gec[i]);
107213 +
107214 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_spc);
107215 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_dv0);
107216 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_dv1);
107217 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ccbs);
107218 +       FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_mv);
107219 +
107220 +       FM_DMP_SUBTITLE(buf, n, "\n");
107221 +
107222 +       spin_unlock_irqrestore(p_lk, i_flg);
107223 +
107224 +       return n;
107225 +}
107226 +
107227 +int fm_kg_pe_dump_regs(void *h_fm_pcd, char *buf, int nn)
107228 +{
107229 +       t_FmPcd                         *p_pcd = (t_FmPcd *)h_fm_pcd;
107230 +       int                             i = 0;
107231 +       uint8_t                         prt_id = 0;
107232 +       uint32_t                        tmp_ar;
107233 +       unsigned long                   i_flg;
107234 +       int                             n = nn;
107235 +       u_FmPcdKgIndirectAccessRegs     *idac;
107236 +       t_FmPcdKg                       *p_kg;
107237 +       spinlock_t                      *p_lk;
107238 +
107239 +       p_kg = p_pcd->p_FmPcdKg;
107240 +       idac = p_pcd->p_FmPcdKg->p_IndirectAccessRegs;
107241 +       p_lk = (spinlock_t *)p_kg->h_HwSpinlock;
107242 +
107243 +       spin_lock_irqsave(p_lk, i_flg);
107244 +
107245 +       FM_DMP_SUBTITLE(buf, n, "\n");
107246 +
107247 +       for (i = 0; i < FM_MAX_NUM_OF_PORTS; i++) {
107248 +               SW_PORT_INDX_TO_HW_PORT_ID(prt_id, i);
107249 +
107250 +               tmp_ar = FmPcdKgBuildReadPortSchemeBindActionReg(prt_id);
107251 +
107252 +               if (fman_kg_write_ar_wait(p_kg->p_FmPcdKgRegs, tmp_ar)) {
107253 +                       FM_DMP_LN(buf, nn, "Keygen scheme access violation");
107254 +                       spin_unlock_irqrestore(p_lk, i_flg);
107255 +                       return nn;
107256 +               }
107257 +               FM_DMP_TITLE(buf, n, &idac->portRegs, "Port %d regs", prt_id);
107258 +               FM_DMP_V32(buf, n, &idac->portRegs, fmkg_pe_sp);
107259 +               FM_DMP_V32(buf, n, &idac->portRegs, fmkg_pe_cpp);
107260 +       }
107261 +
107262 +       FM_DMP_SUBTITLE(buf, n, "\n");
107263 +
107264 +       spin_unlock_irqrestore(p_lk, i_flg);
107265 +
107266 +       return n;
107267 +}
107268 +
107269 +int fm_kg_dump_regs(void *h_fm_pcd, char *buf, int nn)
107270 +{
107271 +       t_FmPcd         *p_pcd = (t_FmPcd *)h_fm_pcd;
107272 +       int                     n = nn;
107273 +
107274 +       FM_DMP_SUBTITLE(buf, n, "\n");
107275 +       FM_DMP_TITLE(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs,
107276 +                       "FmPcdKgRegs Regs");
107277 +
107278 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gcr);
107279 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_eer);
107280 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_eeer);
107281 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_seer);
107282 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_seeer);
107283 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gsr);
107284 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_tpc);
107285 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_serc);
107286 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_fdor);
107287 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gdv0r);
107288 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gdv1r);
107289 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_feer);
107290 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_ar);
107291 +
107292 +       FM_DMP_SUBTITLE(buf, n, "\n");
107293 +
107294 +       return n;
107295 +}
107296 +
107297 +
107298 +int fm_fpm_dump_regs(void *h_fm, char *buf, int nn)
107299 +{
107300 +       t_Fm            *p_fm = (t_Fm *)h_fm;
107301 +       uint8_t         i;
107302 +       int             n = nn;
107303 +
107304 +       FM_DMP_SUBTITLE(buf, n, "\n");
107305 +
107306 +       FM_DMP_TITLE(buf, n, p_fm->p_FmFpmRegs, "FM-FPM Regs");
107307 +
107308 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tnc);
107309 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_prc);
107310 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_brkc);
107311 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_mxd);
107312 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_dist1);
107313 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_dist2);
107314 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_epi);
107315 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_rie);
107316 +
107317 +       FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_fcev, "fmfp_fcev");
107318 +       for (i = 0; i < 4; ++i)
107319 +               FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_fcev[i]);
107320 +
107321 +       FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_cee, "fmfp_cee");
107322 +       for (i = 0; i < 4; ++i)
107323 +               FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_cee[i]);
107324 +
107325 +       FM_DMP_SUBTITLE(buf, n, "\n");
107326 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsc1);
107327 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsc2);
107328 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsp);
107329 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsf);
107330 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_rcr);
107331 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_extc);
107332 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_ext1);
107333 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_ext2);
107334 +
107335 +       FM_DMP_SUBTITLE(buf, n, "\n");
107336 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_ip_rev_1);
107337 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_ip_rev_2);
107338 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_rstc);
107339 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_cld);
107340 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_npi);
107341 +       FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_ee);
107342 +
107343 +       FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_cev, "fmfp_cev");
107344 +       for (i = 0; i < 4; ++i)
107345 +               FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_cev[i]);
107346 +
107347 +       FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_ps, "fmfp_ps");
107348 +       for (i = 0; i < 64; ++i)
107349 +               FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_ps[i]);
107350 +
107351 +       return n;
107352 +}
107353 +
107354 +int fm_prs_dump_regs(void *h_fm_pcd, char *buf, int nn)
107355 +{
107356 +       t_FmPcd         *p_pcd = (t_FmPcd *)h_fm_pcd;
107357 +       int             n = nn;
107358 +
107359 +       FM_DMP_SUBTITLE(buf, n, "\n");
107360 +
107361 +       FM_DMP_TITLE(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs,
107362 +                       "FM-PCD parser regs");
107363 +
107364 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_rpclim);
107365 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_rpimac);
107366 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, pmeec);
107367 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_pevr);
107368 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_pever);
107369 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_perr);
107370 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_perer);
107371 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_ppsc);
107372 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_pds);
107373 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l2rrs);
107374 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l3rrs);
107375 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l4rrs);
107376 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_srrs);
107377 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l2rres);
107378 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l3rres);
107379 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l4rres);
107380 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_srres);
107381 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_spcs);
107382 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_spscs);
107383 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_hxscs);
107384 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mrcs);
107385 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mwcs);
107386 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mrscs);
107387 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mwscs);
107388 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_fcscs);
107389 +
107390 +       return n;
107391 +}
107392 +
107393 +int fm_plcr_dump_regs(void *h_fm_pcd, char *buf, int nn)
107394 +{
107395 +       t_FmPcd         *p_pcd = (t_FmPcd *)h_fm_pcd;
107396 +       int             i = 0;
107397 +       int             n = nn;
107398 +
107399 +       FM_DMP_SUBTITLE(buf, n, "\n");
107400 +
107401 +       FM_DMP_TITLE(buf, n,
107402 +                       p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs,
107403 +                       "FM policer regs");
107404 +
107405 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_gcr);
107406 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_gsr);
107407 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_evr);
107408 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_ier);
107409 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_ifr);
107410 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_eevr);
107411 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_eier);
107412 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_eifr);
107413 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_rpcnt);
107414 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_ypcnt);
107415 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_rrpcnt);
107416 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_rypcnt);
107417 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_tpcnt);
107418 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_flmcnt);
107419 +
107420 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_serc);
107421 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_upcr);
107422 +       FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_dpmr);
107423 +
107424 +       FM_DMP_TITLE(buf, n,
107425 +                       &p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_pmr,
107426 +                       "fmpl_pmr");
107427 +
107428 +       for (i = 0; i < 63; ++i)
107429 +               FM_DMP_MEM_32(buf, n,
107430 +                       &p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_pmr[i]);
107431 +
107432 +       return n;
107433 +}
107434 +
107435 +int fm_get_counter(void *h_fm, e_FmCounters cnt_e, uint32_t *cnt_val)
107436 +{
107437 +       t_Fm            *p_fm = (t_Fm *)h_fm;
107438 +
107439 +       /* When applicable (when there is an "enable counters" bit),
107440 +       check that counters are enabled */
107441 +
107442 +       switch (cnt_e) {
107443 +       case (e_FM_COUNTERS_DEQ_1):
107444 +       case (e_FM_COUNTERS_DEQ_2):
107445 +       case (e_FM_COUNTERS_DEQ_3):
107446 +               if (p_fm->p_FmStateStruct->revInfo.majorRev >= 6)
107447 +                       return -EINVAL; /* counter not available */
107448 +
107449 +       case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
107450 +       case (e_FM_COUNTERS_DEQ_TOTAL_FRAME):
107451 +       case (e_FM_COUNTERS_DEQ_0):
107452 +       case (e_FM_COUNTERS_DEQ_FROM_DEFAULT):
107453 +       case (e_FM_COUNTERS_DEQ_FROM_CONTEXT):
107454 +       case (e_FM_COUNTERS_DEQ_FROM_FD):
107455 +       case (e_FM_COUNTERS_DEQ_CONFIRM):
107456 +               if (!(ioread32be(&p_fm->p_FmQmiRegs->fmqm_gc) &
107457 +                       QMI_CFG_EN_COUNTERS))
107458 +                       return -EINVAL; /* Requested counter not available */
107459 +               break;
107460 +       default:
107461 +               break;
107462 +       }
107463 +
107464 +       switch (cnt_e) {
107465 +       case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
107466 +               *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_etfc);
107467 +               return 0;
107468 +       case (e_FM_COUNTERS_DEQ_TOTAL_FRAME):
107469 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dtfc);
107470 +               return 0;
107471 +       case (e_FM_COUNTERS_DEQ_0):
107472 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc0);
107473 +               return 0;
107474 +       case (e_FM_COUNTERS_DEQ_1):
107475 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc1);
107476 +               return 0;
107477 +       case (e_FM_COUNTERS_DEQ_2):
107478 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc2);
107479 +               return 0;
107480 +       case (e_FM_COUNTERS_DEQ_3):
107481 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc3);
107482 +               return 0;
107483 +       case (e_FM_COUNTERS_DEQ_FROM_DEFAULT):
107484 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dfdc);
107485 +               return 0;
107486 +       case (e_FM_COUNTERS_DEQ_FROM_CONTEXT):
107487 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dfcc);
107488 +               return 0;
107489 +       case (e_FM_COUNTERS_DEQ_FROM_FD):
107490 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dffc);
107491 +               return 0;
107492 +       case (e_FM_COUNTERS_DEQ_CONFIRM):
107493 +               *cnt_val =  ioread32be(&p_fm->p_FmQmiRegs->fmqm_dcc);
107494 +               return 0;
107495 +       }
107496 +       /* should never get here */
107497 +       return -EINVAL; /* counter not available */
107498 +}
107499 --- /dev/null
107500 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.h
107501 @@ -0,0 +1,136 @@
107502 +/*
107503 + * Copyright 2008-2012 Freescale Semiconductor Inc.
107504 + *
107505 + * Redistribution and use in source and binary forms, with or without
107506 + * modification, are permitted provided that the following conditions are met:
107507 + *     * Redistributions of source code must retain the above copyright
107508 + *       notice, this list of conditions and the following disclaimer.
107509 + *     * Redistributions in binary form must reproduce the above copyright
107510 + *       notice, this list of conditions and the following disclaimer in the
107511 + *       documentation and/or other materials provided with the distribution.
107512 + *     * Neither the name of Freescale Semiconductor nor the
107513 + *       names of its contributors may be used to endorse or promote products
107514 + *       derived from this software without specific prior written permission.
107515 + *
107516 + *
107517 + * ALTERNATIVELY, this software may be distributed under the terms of the
107518 + * GNU General Public License ("GPL") as published by the Free Software
107519 + * Foundation, either version 2 of that License or (at your option) any
107520 + * later version.
107521 + *
107522 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
107523 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
107524 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
107525 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
107526 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
107527 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
107528 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
107529 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
107530 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
107531 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
107532 + */
107533 +
107534 +
107535 +#ifndef LNXWRP_SYSFS_FM_H_
107536 +#define LNXWRP_SYSFS_FM_H_
107537 +
107538 +#include "lnxwrp_sysfs.h"
107539 +
107540 +int fm_sysfs_create(struct device *dev);
107541 +void fm_sysfs_destroy(struct device *dev);
107542 +int fm_dump_regs(void *h_dev, char *buf, int nn);
107543 +int fm_fpm_dump_regs(void *h_dev, char *buf, int nn);
107544 +int fm_kg_dump_regs(void *h_pcd, char *buf, int nn);
107545 +int fm_kg_pe_dump_regs(void *h_pcd, char *buf, int nn);
107546 +int fm_dump_scheme(void *h_pcd, int scnum, char *buf, int nn);
107547 +int fm_dump_tnum_dbg(void *h_fm, int tn_s, int tn_e, char *buf, int nn);
107548 +int fm_dump_cls_plan(void *h_pcd, int cpn, char *buf, int nn);
107549 +int fm_plcr_dump_regs(void *h_pcd, char *buf, int nn);
107550 +int fm_prs_dump_regs(void *h_pcd, char *buf, int nn);
107551 +int fm_profile_dump_regs(void *h_pcd, int ppnum, char *buf, int nn);
107552 +
107553 +#define FM_DMP_PGSZ_ERR { \
107554 +                       snprintf(&buf[PAGE_SIZE - 80], 70, \
107555 +                       "\n Err: current sysfs buffer reached PAGE_SIZE\n");\
107556 +                       n = PAGE_SIZE - 2; \
107557 +                       }
107558 +
107559 +#define FM_DMP_LN(buf, n, ...) \
107560 +       do { \
107561 +               int k, m = n; \
107562 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, __VA_ARGS__); \
107563 +               if (k < 0 || m > PAGE_SIZE - 90) \
107564 +                       FM_DMP_PGSZ_ERR \
107565 +               n = m; \
107566 +       } while (0)
107567 +
107568 +#define FM_DMP_TITLE(buf, n, addr, ...) \
107569 +       do { \
107570 +               int k, m = n; \
107571 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, "\n"); \
107572 +               if (k < 0 || m > PAGE_SIZE - 90) \
107573 +                       FM_DMP_PGSZ_ERR \
107574 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, __VA_ARGS__); \
107575 +               if (k < 0 || m > PAGE_SIZE - 90) \
107576 +                       FM_DMP_PGSZ_ERR \
107577 +               if (addr) {                           \
107578 +                       phys_addr_t pa; \
107579 +                       pa = virt_to_phys(addr); \
107580 +                       m += k = \
107581 +                       snprintf(&buf[m], PAGE_SIZE - m, " (0x%lX)", \
107582 +                               (long unsigned int)(pa)); \
107583 +                       if (k < 0 || m > PAGE_SIZE - 90) \
107584 +                               FM_DMP_PGSZ_ERR \
107585 +               } \
107586 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, \
107587 +                       "\n----------------------------------------\n\n"); \
107588 +                       if (k < 0 || m > PAGE_SIZE - 90) \
107589 +                               FM_DMP_PGSZ_ERR \
107590 +               n = m; \
107591 +       } while (0)
107592 +
107593 +#define FM_DMP_SUBTITLE(buf, n, ...) \
107594 +       do { \
107595 +               int k, m = n; \
107596 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, "------- "); \
107597 +               if (k < 0 || m > PAGE_SIZE - 90) \
107598 +                       FM_DMP_PGSZ_ERR \
107599 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, __VA_ARGS__); \
107600 +               if (k < 0 || m > PAGE_SIZE - 90) \
107601 +                       FM_DMP_PGSZ_ERR \
107602 +               m += k = snprintf(&buf[m], PAGE_SIZE - m, "\n"); \
107603 +               if (k < 0 || m > PAGE_SIZE - 90) \
107604 +                       FM_DMP_PGSZ_ERR \
107605 +               n = m; \
107606 +       } while (0)
107607 +
107608 +#define FM_DMP_MEM_32(buf, n, addr) \
107609 +       { \
107610 +               uint32_t val; \
107611 +               phys_addr_t pa; \
107612 +               int k, m = n; \
107613 +               pa = virt_to_phys(addr); \
107614 +               val = ioread32be((addr)); \
107615 +               do { \
107616 +                       m += k = snprintf(&buf[m], \
107617 +                               PAGE_SIZE - m, "0x%010llX: 0x%08x\n", \
107618 +                               pa, val); \
107619 +                       if (k < 0 || m > PAGE_SIZE - 90) \
107620 +                               FM_DMP_PGSZ_ERR \
107621 +                       n += k; \
107622 +               } while (0) ;\
107623 +       }
107624 +
107625 +#define FM_DMP_V32(buf, n, st, phrase) \
107626 +       do { \
107627 +               int k, m = n; \
107628 +               phys_addr_t pa = virt_to_phys(&((st)->phrase)); \
107629 +               k = snprintf(&buf[m], PAGE_SIZE - m, \
107630 +               "0x%010llX: 0x%08x%8s\t%s\n", (unsigned long long) pa, \
107631 +               ioread32be((uint32_t *)&((st)->phrase)), "", #phrase); \
107632 +               if (k < 0 || m > PAGE_SIZE - 90) \
107633 +                       FM_DMP_PGSZ_ERR \
107634 +               n += k; \
107635 +       } while (0)
107636 +
107637 +#endif /* LNXWRP_SYSFS_FM_H_ */
107638 --- /dev/null
107639 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.c
107640 @@ -0,0 +1,1268 @@
107641 +/*
107642 + * Copyright 2008-2012 Freescale Semiconductor Inc.
107643 + *
107644 + * Redistribution and use in source and binary forms, with or without
107645 + * modification, are permitted provided that the following conditions are met:
107646 + *     * Redistributions of source code must retain the above copyright
107647 + *       notice, this list of conditions and the following disclaimer.
107648 + *     * Redistributions in binary form must reproduce the above copyright
107649 + *       notice, this list of conditions and the following disclaimer in the
107650 + *       documentation and/or other materials provided with the distribution.
107651 + *     * Neither the name of Freescale Semiconductor nor the
107652 + *       names of its contributors may be used to endorse or promote products
107653 + *       derived from this software without specific prior written permission.
107654 + *
107655 + *
107656 + * ALTERNATIVELY, this software may be distributed under the terms of the
107657 + * GNU General Public License ("GPL") as published by the Free Software
107658 + * Foundation, either version 2 of that License or (at your option) any
107659 + * later version.
107660 + *
107661 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
107662 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
107663 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
107664 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
107665 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
107666 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
107667 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
107668 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
107669 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
107670 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
107671 + */
107672 +
107673 +#include "lnxwrp_sysfs.h"
107674 +#include "lnxwrp_fm.h"
107675 +#include "debug_ext.h"
107676 +#include "lnxwrp_sysfs_fm_port.h"
107677 +#include "lnxwrp_sysfs_fm.h"
107678 +
107679 +#include "../../sdk_fman/Peripherals/FM/Port/fm_port.h"
107680 +#include "../../sdk_fman/Peripherals/FM/Port/fm_port_dsar.h"
107681 +
107682 +#if defined(__ERR_MODULE__)
107683 +#undef __ERR_MODULE__
107684 +#endif
107685 +
107686 +#include "../../sdk_fman/Peripherals/FM/fm.h"
107687 +
107688 +static const struct sysfs_stats_t portSysfsStats[] = {
107689 +       /* RX/TX/OH common statistics */
107690 +       {
107691 +        .stat_name = "port_frame",
107692 +        .stat_counter = e_FM_PORT_COUNTERS_FRAME,
107693 +        },
107694 +       {
107695 +        .stat_name = "port_discard_frame",
107696 +        .stat_counter = e_FM_PORT_COUNTERS_DISCARD_FRAME,
107697 +        },
107698 +       {
107699 +        .stat_name = "port_dealloc_buf",
107700 +        .stat_counter = e_FM_PORT_COUNTERS_DEALLOC_BUF,
107701 +        },
107702 +       {
107703 +        .stat_name = "port_enq_total",
107704 +        .stat_counter = e_FM_PORT_COUNTERS_ENQ_TOTAL,
107705 +        },
107706 +       /* TX/OH */
107707 +       {
107708 +        .stat_name = "port_length_err",
107709 +        .stat_counter = e_FM_PORT_COUNTERS_LENGTH_ERR,
107710 +        },
107711 +       {
107712 +        .stat_name = "port_unsupprted_format",
107713 +        .stat_counter = e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT,
107714 +        },
107715 +       {
107716 +        .stat_name = "port_deq_total",
107717 +        .stat_counter = e_FM_PORT_COUNTERS_DEQ_TOTAL,
107718 +        },
107719 +       {
107720 +        .stat_name = "port_deq_from_default",
107721 +        .stat_counter = e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT,
107722 +        },
107723 +       {
107724 +        .stat_name = "port_deq_confirm",
107725 +        .stat_counter = e_FM_PORT_COUNTERS_DEQ_CONFIRM,
107726 +        },
107727 +       /* RX/OH */
107728 +       {
107729 +        .stat_name = "port_rx_bad_frame",
107730 +        .stat_counter = e_FM_PORT_COUNTERS_RX_BAD_FRAME,
107731 +        },
107732 +       {
107733 +        .stat_name = "port_rx_large_frame",
107734 +        .stat_counter = e_FM_PORT_COUNTERS_RX_LARGE_FRAME,
107735 +        },
107736 +       {
107737 +        .stat_name = "port_rx_out_of_buffers_discard",
107738 +        .stat_counter = e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD,
107739 +        },
107740 +       {
107741 +        .stat_name = "port_rx_filter_frame",
107742 +        .stat_counter = e_FM_PORT_COUNTERS_RX_FILTER_FRAME,
107743 +        },
107744 +       /* TODO: Particular statistics for OH ports */
107745 +       {}
107746 +};
107747 +
107748 +static ssize_t show_fm_port_stats(struct device *dev,
107749 +               struct device_attribute *attr, char *buf)
107750 +{
107751 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
107752 +       t_LnxWrpFmDev *p_LnxWrpFmDev;
107753 +       unsigned long flags;
107754 +       int n = 0;
107755 +       uint8_t counter = 0;
107756 +
107757 +       if (attr == NULL || buf == NULL || dev == NULL)
107758 +               return -EINVAL;
107759 +
107760 +       p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
107761 +       if (WARN_ON(p_LnxWrpFmPortDev == NULL))
107762 +               return -EINVAL;
107763 +
107764 +       p_LnxWrpFmDev = (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
107765 +       if (WARN_ON(p_LnxWrpFmDev == NULL))
107766 +               return -EINVAL;
107767 +
107768 +       if (!p_LnxWrpFmDev->active || !p_LnxWrpFmDev->h_Dev)
107769 +               return -EIO;
107770 +
107771 +       if (!p_LnxWrpFmPortDev->h_Dev) {
107772 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
107773 +               return n;
107774 +       }
107775 +
107776 +       counter = fm_find_statistic_counter_by_name(
107777 +                       attr->attr.name,
107778 +                       portSysfsStats, NULL);
107779 +
107780 +       if (counter == e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR) {
107781 +               uint32_t fmRev = 0;
107782 +               fmRev = 0xffff &
107783 +                       ioread32(UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr +
107784 +                       0x000c30c4));
107785 +
107786 +               if (fmRev == 0x0100) {
107787 +                       local_irq_save(flags);
107788 +                       n = snprintf(buf, PAGE_SIZE,
107789 +                               "counter not available for revision 1\n");
107790 +                       local_irq_restore(flags);
107791 +               }
107792 +               return n;
107793 +       }
107794 +
107795 +       local_irq_save(flags);
107796 +       n = snprintf(buf, PAGE_SIZE, "\t%s counter: %u\n",
107797 +               p_LnxWrpFmPortDev->name,
107798 +               FM_PORT_GetCounter(p_LnxWrpFmPortDev->h_Dev,
107799 +                                       (e_FmPortCounters) counter));
107800 +       local_irq_restore(flags);
107801 +
107802 +       return n;
107803 +}
107804 +
107805 +/* FM PORT RX/TX/OH statistics */
107806 +static DEVICE_ATTR(port_frame, S_IRUGO, show_fm_port_stats, NULL);
107807 +static DEVICE_ATTR(port_discard_frame, S_IRUGO, show_fm_port_stats, NULL);
107808 +static DEVICE_ATTR(port_dealloc_buf, S_IRUGO, show_fm_port_stats, NULL);
107809 +static DEVICE_ATTR(port_enq_total, S_IRUGO, show_fm_port_stats, NULL);
107810 +/* FM PORT TX/OH statistics */
107811 +static DEVICE_ATTR(port_length_err, S_IRUGO, show_fm_port_stats, NULL);
107812 +static DEVICE_ATTR(port_unsupprted_format, S_IRUGO, show_fm_port_stats, NULL);
107813 +static DEVICE_ATTR(port_deq_total, S_IRUGO, show_fm_port_stats, NULL);
107814 +static DEVICE_ATTR(port_deq_from_default, S_IRUGO, show_fm_port_stats, NULL);
107815 +static DEVICE_ATTR(port_deq_confirm, S_IRUGO, show_fm_port_stats, NULL);
107816 +/* FM PORT RX/OH statistics */
107817 +static DEVICE_ATTR(port_rx_bad_frame, S_IRUGO, show_fm_port_stats, NULL);
107818 +static DEVICE_ATTR(port_rx_large_frame, S_IRUGO, show_fm_port_stats, NULL);
107819 +static DEVICE_ATTR(port_rx_out_of_buffers_discard, S_IRUGO,
107820 +               show_fm_port_stats, NULL);
107821 +static DEVICE_ATTR(port_rx_filter_frame, S_IRUGO, show_fm_port_stats, NULL);
107822 +
107823 +/* FM PORT TX statistics */
107824 +static struct attribute *fm_tx_port_dev_stats_attributes[] = {
107825 +       &dev_attr_port_frame.attr,
107826 +       &dev_attr_port_discard_frame.attr,
107827 +       &dev_attr_port_dealloc_buf.attr,
107828 +       &dev_attr_port_enq_total.attr,
107829 +       &dev_attr_port_length_err.attr,
107830 +       &dev_attr_port_unsupprted_format.attr,
107831 +       &dev_attr_port_deq_total.attr,
107832 +       &dev_attr_port_deq_from_default.attr,
107833 +       &dev_attr_port_deq_confirm.attr,
107834 +       NULL
107835 +};
107836 +
107837 +static const struct attribute_group fm_tx_port_dev_stats_attr_grp = {
107838 +       .name = "statistics",
107839 +       .attrs = fm_tx_port_dev_stats_attributes
107840 +};
107841 +
107842 +/* FM PORT RX statistics */
107843 +static struct attribute *fm_rx_port_dev_stats_attributes[] = {
107844 +       &dev_attr_port_frame.attr,
107845 +       &dev_attr_port_discard_frame.attr,
107846 +       &dev_attr_port_dealloc_buf.attr,
107847 +       &dev_attr_port_enq_total.attr,
107848 +       &dev_attr_port_rx_bad_frame.attr,
107849 +       &dev_attr_port_rx_large_frame.attr,
107850 +       &dev_attr_port_rx_out_of_buffers_discard.attr,
107851 +       &dev_attr_port_rx_filter_frame.attr,
107852 +       NULL
107853 +};
107854 +
107855 +static const struct attribute_group fm_rx_port_dev_stats_attr_grp = {
107856 +       .name = "statistics",
107857 +       .attrs = fm_rx_port_dev_stats_attributes
107858 +};
107859 +
107860 +/* TODO: add particular OH ports statistics */
107861 +static struct attribute *fm_oh_port_dev_stats_attributes[] = {
107862 +       &dev_attr_port_frame.attr,
107863 +       &dev_attr_port_discard_frame.attr,
107864 +       &dev_attr_port_dealloc_buf.attr,
107865 +       &dev_attr_port_enq_total.attr,
107866 +       /*TX*/ &dev_attr_port_length_err.attr,
107867 +       &dev_attr_port_unsupprted_format.attr,
107868 +       &dev_attr_port_deq_total.attr,
107869 +       &dev_attr_port_deq_from_default.attr,
107870 +       &dev_attr_port_deq_confirm.attr,
107871 +       /* &dev_attr_port_rx_bad_frame.attr, */
107872 +       /* &dev_attr_port_rx_large_frame.attr, */
107873 +       &dev_attr_port_rx_out_of_buffers_discard.attr,
107874 +       /*&dev_attr_port_rx_filter_frame.attr, */
107875 +       NULL
107876 +};
107877 +
107878 +static const struct attribute_group fm_oh_port_dev_stats_attr_grp = {
107879 +       .name = "statistics",
107880 +       .attrs = fm_oh_port_dev_stats_attributes
107881 +};
107882 +
107883 +static ssize_t show_fm_port_regs(struct device *dev,
107884 +               struct device_attribute *attr, char *buf)
107885 +{
107886 +       unsigned long flags;
107887 +       unsigned n = 0;
107888 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
107889 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
107890 +#endif
107891 +       if (attr == NULL || buf == NULL || dev == NULL)
107892 +               return -EINVAL;
107893 +
107894 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
107895 +       p_LnxWrpFmPortDev =
107896 +               (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
107897 +
107898 +
107899 +       local_irq_save(flags);
107900 +
107901 +       if (!p_LnxWrpFmPortDev->h_Dev) {
107902 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
107903 +               return n;
107904 +       } else {
107905 +               n = snprintf(buf, PAGE_SIZE,
107906 +                               "FM port driver registers dump.\n");
107907 +               n = fm_port_dump_regs(p_LnxWrpFmPortDev->h_Dev, buf, n);
107908 +       }
107909 +
107910 +       local_irq_restore(flags);
107911 +
107912 +       return n;
107913 +#else
107914 +
107915 +       local_irq_save(flags);
107916 +       n = snprintf(buf, PAGE_SIZE,
107917 +                       "Debug level is too low to dump registers!!!\n");
107918 +       local_irq_restore(flags);
107919 +
107920 +       return n;
107921 +#endif
107922 +}
107923 +static int fm_port_dsar_dump_mem(void *h_dev, char *buf, int nn)
107924 +{
107925 +       t_FmPort *p_FmPort;
107926 +       t_Fm *p_Fm;
107927 +       uint8_t hardwarePortId;
107928 +       uint32_t *param_page;
107929 +       t_ArCommonDesc *ArCommonDescPtr;
107930 +       uint32_t *mem;
107931 +       int i, n = nn;
107932 +
107933 +       p_FmPort = (t_FmPort *)h_dev;
107934 +       hardwarePortId = p_FmPort->hardwarePortId;
107935 +       p_Fm = (t_Fm *)p_FmPort->h_Fm;
107936 +
107937 +       if (!FM_PORT_IsInDsar(p_FmPort))
107938 +       {
107939 +               FM_DMP_LN(buf, n, "port %u is not a DSAR port\n",
107940 +                       hardwarePortId);
107941 +               return n;
107942 +       }
107943 +       FM_DMP_LN(buf, n, "port %u DSAR mem\n", hardwarePortId);
107944 +       FM_DMP_LN(buf, n, "========================\n");
107945 +
107946 +       /* do I need request_mem_region here? */
107947 +       param_page = ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(&p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr), 4);
107948 +       ArCommonDescPtr = (t_ArCommonDesc*)(ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(param_page), 300*4)); /* this should be changed*/
107949 +       mem = (uint32_t*)ArCommonDescPtr;
107950 +       for (i = 0; i < 300; i+=4)
107951 +               FM_DMP_LN(buf, n, "%08x: %08x %08x %08x %08x\n", i*4, mem[i], mem[i + 1], mem[i + 2], mem[i + 3]);
107952 +       iounmap(ArCommonDescPtr);
107953 +       iounmap(param_page);
107954 +       return n;
107955 +}
107956 +
107957 +static int fm_port_dsar_dump_regs(void *h_dev, char *buf, int nn)
107958 +{
107959 +       t_FmPort *p_FmPort;
107960 +       t_Fm *p_Fm;
107961 +       uint8_t hardwarePortId;
107962 +       uint32_t *param_page;
107963 +       t_ArCommonDesc *ArCommonDescPtr;
107964 +       int i, n = nn;
107965 +
107966 +       p_FmPort = (t_FmPort *)h_dev;
107967 +       hardwarePortId = p_FmPort->hardwarePortId;
107968 +       p_Fm = (t_Fm *)p_FmPort->h_Fm;
107969 +
107970 +       if (!FM_PORT_IsInDsar(p_FmPort))
107971 +       {
107972 +               FM_DMP_LN(buf, n, "port %u is not a DSAR port\n",
107973 +                       hardwarePortId);
107974 +               return n;
107975 +       }
107976 +       FM_DMP_LN(buf, n, "port %u DSAR information\n", hardwarePortId);
107977 +       FM_DMP_LN(buf, n, "========================\n");
107978 +
107979 +       /* do I need request_mem_region here? */
107980 +       param_page = ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(&p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr), 4);
107981 +       ArCommonDescPtr = (t_ArCommonDesc*)(ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(param_page), sizeof(t_ArCommonDesc))); /* this should be changed*/
107982 +       FM_DMP_LN(buf, n, "Tx port: 0x%x\n", ArCommonDescPtr->arTxPort);
107983 +       FM_DMP_LN(buf, n, "Active HPNIA: 0x%08x\n", ArCommonDescPtr->activeHPNIA);
107984 +       FM_DMP_LN(buf, n, "Snmp port: 0x%x\n", ArCommonDescPtr->snmpPort);
107985 +       FM_DMP_LN(buf, n, "MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", ArCommonDescPtr->macStationAddr[0],
107986 +               ArCommonDescPtr->macStationAddr[1], ArCommonDescPtr->macStationAddr[2],
107987 +               ArCommonDescPtr->macStationAddr[3], ArCommonDescPtr->macStationAddr[4],
107988 +               ArCommonDescPtr->macStationAddr[5]);
107989 +       FM_DMP_LN(buf, n, "filterControl: 0x%02x\n", ArCommonDescPtr->filterControl);
107990 +       FM_DMP_LN(buf, n, "tcpControlPass: 0x%04x\n", ArCommonDescPtr->tcpControlPass);
107991 +       FM_DMP_LN(buf, n, "ipProtocolTblSize: 0x%x\n", ArCommonDescPtr->ipProtocolTblSize);
107992 +       FM_DMP_LN(buf, n, "udpPortTblSize: 0x%x\n", ArCommonDescPtr->udpPortTblSize);
107993 +       FM_DMP_LN(buf, n, "tcpPortTblSize: 0x%x\n", ArCommonDescPtr->tcpPortTblSize);
107994 +       if (ArCommonDescPtr->p_ArStats)
107995 +       {
107996 +               t_ArStatistics *arStatistics = (t_ArStatistics*)
107997 +                       ioremap(ioread32be(&ArCommonDescPtr->p_ArStats) +
107998 +                       p_FmPort->fmMuramPhysBaseAddr,
107999 +                       sizeof (t_ArStatistics));
108000 +               FM_DMP_LN(buf, n, "\nDSAR statistics\n");
108001 +               FM_DMP_LN(buf, n, "DSAR_Discarded:            0x%x\n", arStatistics->dsarDiscarded);
108002 +               FM_DMP_LN(buf, n, "DSAR_Err_Discarded:        0x%x\n", arStatistics->dsarErrDiscarded);
108003 +               FM_DMP_LN(buf, n, "DSAR_Frag_Discarded:       0x%x\n", arStatistics->dsarFragDiscarded);
108004 +               FM_DMP_LN(buf, n, "DSAR_Tunnel_Discarded:     0x%x\n", arStatistics->dsarTunnelDiscarded);
108005 +               FM_DMP_LN(buf, n, "DSAR_ARP_Discarded:        0x%x\n", arStatistics->dsarArpDiscarded);
108006 +               FM_DMP_LN(buf, n, "DSAR_IP_Discarded:         0x%x\n", arStatistics->dsarIpDiscarded);
108007 +               FM_DMP_LN(buf, n, "DSAR_TCP_Discarded:        0x%x\n", arStatistics->dsarTcpDiscarded);
108008 +               FM_DMP_LN(buf, n, "DSAR_UDP_Discarded:        0x%x\n", arStatistics->dsarUdpDiscarded);
108009 +               FM_DMP_LN(buf, n, "DSAR_ICMPv6_Checksum_Err:  0x%x\n", arStatistics->dsarIcmpV6ChecksumErr);
108010 +               FM_DMP_LN(buf, n, "DSAR_ICMPv6_Other_Type:    0x%x\n", arStatistics->dsarIcmpV6OtherType);
108011 +               FM_DMP_LN(buf, n, "DSAR_ICMPv4_Other_Type:    0x%x\n", arStatistics->dsarIcmpV4OtherType);
108012 +
108013 +               iounmap(arStatistics);
108014 +       }
108015 +       if (ArCommonDescPtr->p_ArpDescriptor)
108016 +       {
108017 +               t_DsarArpDescriptor* ArpDescriptor = (t_DsarArpDescriptor*)
108018 +                       ioremap(ioread32be(&ArCommonDescPtr->p_ArpDescriptor) +
108019 +                       p_FmPort->fmMuramPhysBaseAddr,
108020 +                       sizeof (t_DsarArpDescriptor));
108021 +               FM_DMP_LN(buf, n, "\nARP\n");
108022 +               FM_DMP_LN(buf, n, "===\n");
108023 +               FM_DMP_LN(buf, n, "control bits 0x%04x\n", ArpDescriptor->control);
108024 +               if (ArpDescriptor->numOfBindings)
108025 +               {
108026 +                       char ip_str[100];
108027 +                       t_DsarArpBindingEntry* bindings = ioremap(
108028 +                               ioread32be(&ArpDescriptor->p_Bindings) +
108029 +                               p_FmPort->fmMuramPhysBaseAddr,
108030 +                               ArpDescriptor->numOfBindings *
108031 +                               sizeof(t_DsarArpBindingEntry));
108032 +                       uint8_t* ip_addr = (uint8_t*)&bindings->ipv4Addr;
108033 +                       FM_DMP_LN(buf, n, "      ip          vlan id\n");
108034 +                       for (i = 0; i < ArpDescriptor->numOfBindings; i++)
108035 +                       {
108036 +                               n += snprintf(ip_str, 100, "%d.%d.%d.%d",
108037 +                                       ip_addr[0], ip_addr[1],
108038 +                                       ip_addr[2], ip_addr[3]);
108039 +                               FM_DMP_LN(buf, n, "%-15s     0x%x\n",
108040 +                                       ip_str, bindings->vlanId);
108041 +                       }
108042 +                       iounmap(bindings);
108043 +               }
108044 +               if (ArpDescriptor->p_Statistics)
108045 +               {
108046 +                       t_DsarArpStatistics* arpStats = ioremap(
108047 +                               ioread32be(&ArpDescriptor->p_Statistics) +
108048 +                               p_FmPort->fmMuramPhysBaseAddr,
108049 +                               sizeof(t_DsarArpStatistics));
108050 +                       FM_DMP_LN(buf, n, "statistics\n");
108051 +                       FM_DMP_LN(buf, n, "INVAL_CNT:  0x%x\n", arpStats->invalCnt);
108052 +                       FM_DMP_LN(buf, n, "ECHO_CNT:   0x%x\n", arpStats->echoCnt);
108053 +                       FM_DMP_LN(buf, n, "CD_CNT:     0x%x\n", arpStats->cdCnt);
108054 +                       FM_DMP_LN(buf, n, "AR_CNT:     0x%x\n", arpStats->arCnt);
108055 +                       FM_DMP_LN(buf, n, "RATM_CNT:   0x%x\n", arpStats->ratmCnt);
108056 +                       FM_DMP_LN(buf, n, "UKOP_CNT:   0x%x\n", arpStats->ukopCnt);
108057 +                       FM_DMP_LN(buf, n, "NMTP_CNT:   0x%x\n", arpStats->nmtpCnt);
108058 +                       FM_DMP_LN(buf, n, "NMVLAN_CNT: 0x%x\n", arpStats->nmVlanCnt);
108059 +                       iounmap(arpStats);
108060 +               }
108061 +
108062 +               iounmap(ArpDescriptor);
108063 +       }
108064 +       if (ArCommonDescPtr->p_IcmpV4Descriptor)
108065 +       {
108066 +               t_DsarIcmpV4Descriptor* ICMPV4Descriptor =
108067 +                       (t_DsarIcmpV4Descriptor*)ioremap(ioread32be(
108068 +                       &ArCommonDescPtr->p_IcmpV4Descriptor) +
108069 +                       p_FmPort->fmMuramPhysBaseAddr,
108070 +                       sizeof (t_DsarIcmpV4Descriptor));
108071 +               FM_DMP_LN(buf, n, "\nEcho ICMPv4\n");
108072 +               FM_DMP_LN(buf, n, "===========\n");
108073 +               FM_DMP_LN(buf, n, "control bits 0x%04x\n", ICMPV4Descriptor->control);
108074 +               if (ICMPV4Descriptor->numOfBindings)
108075 +               {
108076 +                       char ip_str[100];
108077 +                       t_DsarArpBindingEntry* bindings = ioremap(
108078 +                               ioread32be(&ICMPV4Descriptor->p_Bindings) +
108079 +                               p_FmPort->fmMuramPhysBaseAddr,
108080 +                               ICMPV4Descriptor->numOfBindings *
108081 +                               sizeof(t_DsarArpBindingEntry));
108082 +                       uint8_t* ip_addr = (uint8_t*)&bindings->ipv4Addr;
108083 +                       FM_DMP_LN(buf, n, "      ip          vlan id\n");
108084 +                       for (i = 0; i < ICMPV4Descriptor->numOfBindings; i++)
108085 +                       {
108086 +                               n += snprintf(ip_str, 100, "%d.%d.%d.%d",
108087 +                                       ip_addr[0], ip_addr[1],
108088 +                                       ip_addr[2], ip_addr[3]);
108089 +                               FM_DMP_LN(buf, n, "%-15s     0x%x\n",
108090 +                                       ip_str, bindings->vlanId);
108091 +                       }
108092 +                       iounmap(bindings);
108093 +               }
108094 +               if (ICMPV4Descriptor->p_Statistics)
108095 +               {
108096 +                       t_DsarIcmpV4Statistics* icmpv4Stats = ioremap(
108097 +                               ioread32be(&ICMPV4Descriptor->p_Statistics) +
108098 +                               p_FmPort->fmMuramPhysBaseAddr,
108099 +                               sizeof(t_DsarIcmpV4Statistics));
108100 +                       FM_DMP_LN(buf, n, "statistics\n");
108101 +                       FM_DMP_LN(buf, n, "INVAL_CNT:  0x%x\n", icmpv4Stats->invalCnt);
108102 +                       FM_DMP_LN(buf, n, "NMVLAN_CNT: 0x%x\n", icmpv4Stats->nmVlanCnt);
108103 +                       FM_DMP_LN(buf, n, "NMIP_CNT:   0x%x\n", icmpv4Stats->nmIpCnt);
108104 +                       FM_DMP_LN(buf, n, "AR_CNT:     0x%x\n", icmpv4Stats->arCnt);
108105 +                       FM_DMP_LN(buf, n, "CSERR_CNT:  0x%x\n", icmpv4Stats->cserrCnt);
108106 +                       iounmap(icmpv4Stats);
108107 +               }
108108 +               iounmap(ICMPV4Descriptor);
108109 +       }
108110 +       if (ArCommonDescPtr->p_NdDescriptor)
108111 +       {
108112 +               t_DsarNdDescriptor *NDDescriptor =
108113 +                       (t_DsarNdDescriptor*)ioremap(ioread32be(
108114 +                       &ArCommonDescPtr->p_NdDescriptor) + p_FmPort->
108115 +                       fmMuramPhysBaseAddr, sizeof (t_DsarNdDescriptor));
108116 +               FM_DMP_LN(buf, n, "\nNDP\n");
108117 +               FM_DMP_LN(buf, n, "===\n");
108118 +               FM_DMP_LN(buf, n, "control bits 0x%04x\n", NDDescriptor->control);
108119 +               FM_DMP_LN(buf, n, "solicited address 0x%08x\n", NDDescriptor->solicitedAddr);
108120 +               if (NDDescriptor->numOfBindings)
108121 +               {
108122 +                       char ip_str[100];
108123 +                       t_DsarIcmpV6BindingEntry* bindings = ioremap(
108124 +                               ioread32be(&NDDescriptor->p_Bindings) +
108125 +                               p_FmPort->fmMuramPhysBaseAddr,
108126 +                               NDDescriptor->numOfBindings *
108127 +                               sizeof(t_DsarIcmpV6BindingEntry));
108128 +                       uint16_t* ip_addr = (uint16_t*)&bindings->ipv6Addr;
108129 +                       FM_DMP_LN(buf, n, "                  ip                        vlan id\n");
108130 +                       for (i = 0; i < NDDescriptor->numOfBindings; i++)
108131 +                       {
108132 +                               n += snprintf(ip_str, 100,
108133 +                                       "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x",
108134 +                               ip_addr[0], ip_addr[1], ip_addr[2], ip_addr[3],
108135 +                               ip_addr[4], ip_addr[5], ip_addr[6], ip_addr[7]);
108136 +                               FM_DMP_LN(buf, n, "%s     0x%x\n", ip_str, bindings->vlanId);
108137 +                       }
108138 +                       iounmap(bindings);
108139 +               }
108140 +               if (NDDescriptor->p_Statistics)
108141 +               {
108142 +                       t_NdStatistics* ndStats = ioremap(
108143 +                               ioread32be(&NDDescriptor->p_Statistics) +
108144 +                               p_FmPort->fmMuramPhysBaseAddr,
108145 +                               sizeof(t_NdStatistics));
108146 +                       FM_DMP_LN(buf, n, "statistics\n");
108147 +                       FM_DMP_LN(buf, n, "INVAL_CNT:    0x%x\n", ndStats->invalCnt);
108148 +                       FM_DMP_LN(buf, n, "NMVLAN_CNT:   0x%x\n", ndStats->nmVlanCnt);
108149 +                       FM_DMP_LN(buf, n, "NMIP_CNT:     0x%x\n", ndStats->nmIpCnt);
108150 +                       FM_DMP_LN(buf, n, "AR_CNT:       0x%x\n", ndStats->arCnt);
108151 +                       FM_DMP_LN(buf, n, "USADVERT_CNT: 0x%x\n", ndStats->usadvertCnt);
108152 +                       FM_DMP_LN(buf, n, "NMMCAST_CNT:  0x%x\n", ndStats->nmmcastCnt);
108153 +                       FM_DMP_LN(buf, n, "NSLLA_CNT:    0x%x\n", ndStats->nsllaCnt);
108154 +                       iounmap(ndStats);
108155 +               }
108156 +               iounmap(NDDescriptor);
108157 +       }
108158 +       if (ArCommonDescPtr->p_IcmpV6Descriptor)
108159 +       {
108160 +               t_DsarIcmpV6Descriptor *ICMPV6Descriptor =
108161 +                       (t_DsarIcmpV6Descriptor*)ioremap(ioread32be(
108162 +                       &ArCommonDescPtr->p_IcmpV6Descriptor) + p_FmPort->
108163 +                       fmMuramPhysBaseAddr, sizeof (t_DsarIcmpV6Descriptor));
108164 +               FM_DMP_LN(buf, n, "\nEcho ICMPv6\n");
108165 +               FM_DMP_LN(buf, n, "===========\n");
108166 +               FM_DMP_LN(buf, n, "control bits 0x%04x\n", ICMPV6Descriptor->control);
108167 +               if (ICMPV6Descriptor->numOfBindings)
108168 +               {
108169 +                       char ip_str[100];
108170 +                       t_DsarIcmpV6BindingEntry* bindings = ioremap(
108171 +                               ioread32be(&ICMPV6Descriptor->p_Bindings) +
108172 +                               p_FmPort->fmMuramPhysBaseAddr,
108173 +                               ICMPV6Descriptor->numOfBindings *
108174 +                               sizeof(t_DsarIcmpV6BindingEntry));
108175 +                       uint16_t* ip_addr = (uint16_t*)&bindings->ipv6Addr;
108176 +                       FM_DMP_LN(buf, n, "                  ip                        vlan id\n");
108177 +                       for (i = 0; i < ICMPV6Descriptor->numOfBindings; i++)
108178 +                       {
108179 +                               n += snprintf(ip_str, 100,
108180 +                                       "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x",
108181 +                               ip_addr[0], ip_addr[1], ip_addr[2], ip_addr[3],
108182 +                               ip_addr[4], ip_addr[5], ip_addr[6], ip_addr[7]);
108183 +                               FM_DMP_LN(buf, n, "%s     0x%x\n", ip_str, bindings->vlanId);
108184 +                       }
108185 +                       iounmap(bindings);
108186 +               }
108187 +               if (ICMPV6Descriptor->p_Statistics)
108188 +               {
108189 +                       t_DsarIcmpV6Statistics* icmpv6Stats = ioremap(
108190 +                               ioread32be(&ICMPV6Descriptor->p_Statistics) +
108191 +                               p_FmPort->fmMuramPhysBaseAddr,
108192 +                               sizeof(t_DsarIcmpV6Statistics));
108193 +                       FM_DMP_LN(buf, n, "statistics\n");
108194 +                       FM_DMP_LN(buf, n, "INVAL_CNT:    0x%x\n", icmpv6Stats->invalCnt);
108195 +                       FM_DMP_LN(buf, n, "NMVLAN_CNT:   0x%x\n", icmpv6Stats->nmVlanCnt);
108196 +                       FM_DMP_LN(buf, n, "NMIP_CNT:     0x%x\n", icmpv6Stats->nmIpCnt);
108197 +                       FM_DMP_LN(buf, n, "AR_CNT:       0x%x\n", icmpv6Stats->arCnt);
108198 +                       iounmap(icmpv6Stats);
108199 +               }
108200 +               iounmap(ICMPV6Descriptor);
108201 +       }
108202 +       if (ArCommonDescPtr->p_SnmpDescriptor)
108203 +       {
108204 +               t_DsarSnmpDescriptor *SnmpDescriptor =
108205 +                       (t_DsarSnmpDescriptor*)ioremap(ioread32be(
108206 +                       &ArCommonDescPtr->p_SnmpDescriptor) + p_FmPort->
108207 +                       fmMuramPhysBaseAddr, sizeof (t_DsarSnmpDescriptor));
108208 +               FM_DMP_LN(buf, n, "\nSNMP\n");
108209 +               FM_DMP_LN(buf, n, "===========\n");
108210 +               FM_DMP_LN(buf, n, "control bits 0x%04x\n", SnmpDescriptor->control);
108211 +               FM_DMP_LN(buf, n, "max message length 0x%04x\n", SnmpDescriptor->maxSnmpMsgLength);
108212 +               if (SnmpDescriptor->numOfIpv4Addresses)
108213 +               {
108214 +                       char ip_str[100];
108215 +                       t_DsarSnmpIpv4AddrTblEntry* addrs = ioremap(
108216 +                               ioread32be(&SnmpDescriptor->p_Ipv4AddrTbl) +
108217 +                               p_FmPort->fmMuramPhysBaseAddr,
108218 +                               SnmpDescriptor->numOfIpv4Addresses *
108219 +                               sizeof(t_DsarSnmpIpv4AddrTblEntry));
108220 +                       uint8_t* ip_addr = (uint8_t*)&addrs->ipv4Addr;
108221 +                       FM_DMP_LN(buf, n, "      ip          vlan id\n");
108222 +                       for (i = 0; i < SnmpDescriptor->numOfIpv4Addresses; i++)
108223 +                       {
108224 +                               n += snprintf(ip_str, 100, "%d.%d.%d.%d",
108225 +                                       ip_addr[0], ip_addr[1],
108226 +                                       ip_addr[2], ip_addr[3]);
108227 +                               FM_DMP_LN(buf, n, "%-15s     0x%x\n", ip_str, addrs->vlanId);
108228 +                       }
108229 +                       iounmap(addrs);
108230 +               }
108231 +               if (SnmpDescriptor->p_Statistics)
108232 +               {
108233 +                       t_DsarSnmpStatistics* snmpStats = ioremap(
108234 +                               ioread32be(&SnmpDescriptor->p_Statistics) +
108235 +                               p_FmPort->fmMuramPhysBaseAddr,
108236 +                               sizeof(t_DsarSnmpStatistics));
108237 +                       FM_DMP_LN(buf, n, "statistics\n");
108238 +                       FM_DMP_LN(buf, n, "snmpErrCnt:          0x%x\n", snmpStats->snmpErrCnt);
108239 +                       FM_DMP_LN(buf, n, "snmpCommunityErrCnt: 0x%x\n", snmpStats->snmpCommunityErrCnt);
108240 +                       FM_DMP_LN(buf, n, "snmpTotalDiscardCnt: 0x%x\n", snmpStats->snmpTotalDiscardCnt);
108241 +                       FM_DMP_LN(buf, n, "snmpGetReqCnt:       0x%x\n", snmpStats->snmpGetReqCnt);
108242 +                       FM_DMP_LN(buf, n, "snmpGetNextReqCnt:   0x%x\n", snmpStats->snmpGetNextReqCnt);
108243 +                       iounmap(snmpStats);
108244 +               }
108245 +               iounmap(SnmpDescriptor);
108246 +       }
108247 +       iounmap(ArCommonDescPtr);
108248 +       iounmap(param_page);
108249 +       return n;
108250 +}
108251 +
108252 +static ssize_t show_fm_port_dsar_mem(struct device *dev,
108253 +               struct device_attribute *attr, char *buf)
108254 +{
108255 +       unsigned long flags;
108256 +       unsigned n = 0;
108257 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108258 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
108259 +#endif
108260 +       if (attr == NULL || buf == NULL || dev == NULL)
108261 +               return -EINVAL;
108262 +
108263 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108264 +       p_LnxWrpFmPortDev =
108265 +               (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108266 +
108267 +       local_irq_save(flags);
108268 +
108269 +       if (!p_LnxWrpFmPortDev->h_Dev) {
108270 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
108271 +               return n;
108272 +       } else {
108273 +               n = snprintf(buf, PAGE_SIZE,
108274 +                               "FM port driver registers dump.\n");
108275 +               n = fm_port_dsar_dump_mem(p_LnxWrpFmPortDev->h_Dev, buf, n);
108276 +       }
108277 +
108278 +       local_irq_restore(flags);
108279 +
108280 +       return n;
108281 +#else
108282 +
108283 +       local_irq_save(flags);
108284 +       n = snprintf(buf, PAGE_SIZE,
108285 +                       "Debug level is too low to dump registers!!!\n");
108286 +       local_irq_restore(flags);
108287 +
108288 +       return n;
108289 +#endif
108290 +}
108291 +
108292 +static ssize_t show_fm_port_dsar_regs(struct device *dev,
108293 +               struct device_attribute *attr, char *buf)
108294 +{
108295 +       unsigned long flags;
108296 +       unsigned n = 0;
108297 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108298 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
108299 +#endif
108300 +       if (attr == NULL || buf == NULL || dev == NULL)
108301 +               return -EINVAL;
108302 +
108303 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108304 +       p_LnxWrpFmPortDev =
108305 +               (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108306 +
108307 +       local_irq_save(flags);
108308 +
108309 +       if (!p_LnxWrpFmPortDev->h_Dev) {
108310 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
108311 +               return n;
108312 +       } else {
108313 +               n = snprintf(buf, PAGE_SIZE,
108314 +                               "FM port driver registers dump.\n");
108315 +               n = fm_port_dsar_dump_regs(p_LnxWrpFmPortDev->h_Dev, buf, n);
108316 +       }
108317 +
108318 +       local_irq_restore(flags);
108319 +
108320 +       return n;
108321 +#else
108322 +
108323 +       local_irq_save(flags);
108324 +       n = snprintf(buf, PAGE_SIZE,
108325 +                       "Debug level is too low to dump registers!!!\n");
108326 +       local_irq_restore(flags);
108327 +
108328 +       return n;
108329 +#endif
108330 +}
108331 +
108332 +#if (DPAA_VERSION >= 11)
108333 +static ssize_t show_fm_port_ipv4_options(struct device *dev,
108334 +               struct device_attribute *attr, char *buf)
108335 +{
108336 +       unsigned long flags;
108337 +       unsigned n = 0;
108338 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108339 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
108340 +#endif
108341 +
108342 +       if (attr == NULL || buf == NULL || dev == NULL)
108343 +               return -EINVAL;
108344 +
108345 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108346 +       p_LnxWrpFmPortDev =
108347 +               (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108348 +
108349 +       local_irq_save(flags);
108350 +
108351 +       if (!p_LnxWrpFmPortDev->h_Dev) {
108352 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
108353 +               return n;
108354 +       } else if (((t_FmPort *)p_LnxWrpFmPortDev->h_Dev)->p_ParamsPage
108355 +                                       == NULL) {
108356 +               n = snprintf(buf, PAGE_SIZE,
108357 +                       "\tPort: FMan-controller params page not set\n");
108358 +               return n;
108359 +       } else {
108360 +               n = snprintf(buf, PAGE_SIZE,
108361 +                       "Counter for fragmented pkt with IP header options\n");
108362 +               n = fm_port_dump_ipv4_opt(p_LnxWrpFmPortDev->h_Dev, buf, n);
108363 +       }
108364 +
108365 +       local_irq_restore(flags);
108366 +
108367 +       return n;
108368 +#else
108369 +
108370 +       local_irq_save(flags);
108371 +       n = snprintf(buf, PAGE_SIZE,
108372 +                       "Debug level is too low to dump registers!!!\n");
108373 +       local_irq_restore(flags);
108374 +
108375 +       return n;
108376 +#endif
108377 +}
108378 +
108379 +#endif
108380 +
108381 +static ssize_t show_fm_port_bmi_regs(struct device *dev,
108382 +               struct device_attribute *attr, char *buf)
108383 +{
108384 +       unsigned long flags;
108385 +       unsigned n = 0;
108386 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108387 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
108388 +#endif
108389 +
108390 +       if (attr == NULL || buf == NULL || dev == NULL)
108391 +               return -EINVAL;
108392 +
108393 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108394 +       p_LnxWrpFmPortDev =
108395 +               (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108396 +
108397 +       local_irq_save(flags);
108398 +
108399 +       if (!p_LnxWrpFmPortDev->h_Dev) {
108400 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
108401 +               return n;
108402 +       } else {
108403 +               n = snprintf(buf, PAGE_SIZE,
108404 +                               "FM port driver registers dump.\n");
108405 +               n = fm_port_dump_regs_bmi(p_LnxWrpFmPortDev->h_Dev, buf, n);
108406 +       }
108407 +
108408 +       local_irq_restore(flags);
108409 +
108410 +       return n;
108411 +#else
108412 +
108413 +       local_irq_save(flags);
108414 +       n = snprintf(buf, PAGE_SIZE,
108415 +                       "Debug level is too low to dump registers!!!\n");
108416 +       local_irq_restore(flags);
108417 +
108418 +       return n;
108419 +#endif
108420 +}
108421 +
108422 +static ssize_t show_fm_port_qmi_regs(struct device *dev,
108423 +               struct device_attribute *attr, char *buf)
108424 +{
108425 +       unsigned long flags;
108426 +       unsigned n = 0;
108427 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108428 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
108429 +#endif
108430 +
108431 +       if (attr == NULL || buf == NULL || dev == NULL)
108432 +               return -EINVAL;
108433 +
108434 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
108435 +       p_LnxWrpFmPortDev =
108436 +               (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108437 +
108438 +       local_irq_save(flags);
108439 +
108440 +       if (!p_LnxWrpFmPortDev->h_Dev) {
108441 +               n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
108442 +               return n;
108443 +       } else {
108444 +               n = snprintf(buf, PAGE_SIZE,
108445 +                               "FM port driver registers dump.\n");
108446 +               n = fm_port_dump_regs_qmi(p_LnxWrpFmPortDev->h_Dev, buf, n);
108447 +       }
108448 +
108449 +       local_irq_restore(flags);
108450 +
108451 +       return n;
108452 +#else
108453 +
108454 +       local_irq_save(flags);
108455 +       n = snprintf(buf, PAGE_SIZE,
108456 +                       "Debug level is too low to dump registers!!!\n");
108457 +       local_irq_restore(flags);
108458 +
108459 +       return n;
108460 +#endif
108461 +}
108462 +
108463 +static DEVICE_ATTR(fm_port_regs, S_IRUGO | S_IRUSR, show_fm_port_regs, NULL);
108464 +static DEVICE_ATTR(fm_port_qmi_regs, S_IRUGO | S_IRUSR, show_fm_port_qmi_regs, NULL);
108465 +static DEVICE_ATTR(fm_port_bmi_regs, S_IRUGO | S_IRUSR, show_fm_port_bmi_regs, NULL);
108466 +#if (DPAA_VERSION >= 11)
108467 +static DEVICE_ATTR(fm_port_ipv4_opt, S_IRUGO | S_IRUSR, show_fm_port_ipv4_options, NULL);
108468 +#endif
108469 +static DEVICE_ATTR(fm_port_dsar_regs, S_IRUGO | S_IRUSR, show_fm_port_dsar_regs, NULL);
108470 +static DEVICE_ATTR(fm_port_dsar_mem, S_IRUGO | S_IRUSR, show_fm_port_dsar_mem, NULL);
108471 +
108472 +int fm_port_sysfs_create(struct device *dev)
108473 +{
108474 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
108475 +
108476 +       if (dev == NULL)
108477 +               return -EINVAL;
108478 +
108479 +       p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108480 +       if (WARN_ON(p_LnxWrpFmPortDev == NULL))
108481 +               return -EINVAL;
108482 +
108483 +       /* store to remove them when module is disabled */
108484 +       p_LnxWrpFmPortDev->dev_attr_regs = &dev_attr_fm_port_regs;
108485 +       p_LnxWrpFmPortDev->dev_attr_qmi_regs = &dev_attr_fm_port_qmi_regs;
108486 +       p_LnxWrpFmPortDev->dev_attr_bmi_regs = &dev_attr_fm_port_bmi_regs;
108487 +#if (DPAA_VERSION >= 11)
108488 +       p_LnxWrpFmPortDev->dev_attr_ipv4_opt = &dev_attr_fm_port_ipv4_opt;
108489 +#endif
108490 +       p_LnxWrpFmPortDev->dev_attr_dsar_regs = &dev_attr_fm_port_dsar_regs;
108491 +       p_LnxWrpFmPortDev->dev_attr_dsar_mem = &dev_attr_fm_port_dsar_mem;
108492 +       /* Registers dump entry - in future will be moved to debugfs */
108493 +       if (device_create_file(dev, &dev_attr_fm_port_regs) != 0)
108494 +               return -EIO;
108495 +       if (device_create_file(dev, &dev_attr_fm_port_qmi_regs) != 0)
108496 +               return -EIO;
108497 +       if (device_create_file(dev, &dev_attr_fm_port_bmi_regs) != 0)
108498 +               return -EIO;
108499 +#if (DPAA_VERSION >= 11)
108500 +       if (device_create_file(dev, &dev_attr_fm_port_ipv4_opt) != 0)
108501 +               return -EIO;
108502 +#endif
108503 +       if (device_create_file(dev, &dev_attr_fm_port_dsar_regs) != 0)
108504 +               return -EIO;
108505 +       if (device_create_file(dev, &dev_attr_fm_port_dsar_mem) != 0)
108506 +               return -EIO;
108507 +
108508 +       /* FM Ports statistics */
108509 +       switch (p_LnxWrpFmPortDev->settings.param.portType) {
108510 +       case e_FM_PORT_TYPE_TX:
108511 +       case e_FM_PORT_TYPE_TX_10G:
108512 +               if (sysfs_create_group
108513 +                       (&dev->kobj, &fm_tx_port_dev_stats_attr_grp) != 0)
108514 +                       return -EIO;
108515 +               break;
108516 +       case e_FM_PORT_TYPE_RX:
108517 +       case e_FM_PORT_TYPE_RX_10G:
108518 +               if (sysfs_create_group
108519 +                       (&dev->kobj, &fm_rx_port_dev_stats_attr_grp) != 0)
108520 +                       return -EIO;
108521 +               break;
108522 +       case e_FM_PORT_TYPE_DUMMY:
108523 +       case e_FM_PORT_TYPE_OH_OFFLINE_PARSING:
108524 +               if (sysfs_create_group
108525 +                       (&dev->kobj, &fm_oh_port_dev_stats_attr_grp) != 0)
108526 +                       return -EIO;
108527 +               break;
108528 +       default:
108529 +               WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
108530 +                       __func__);
108531 +               return -EINVAL;
108532 +               break;
108533 +       };
108534 +
108535 +       return 0;
108536 +}
108537 +
108538 +void fm_port_sysfs_destroy(struct device *dev)
108539 +{
108540 +       t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = NULL;
108541 +
108542 +       /* this function has never been tested !!! */
108543 +
108544 +       if (WARN_ON(dev == NULL))
108545 +               return;
108546 +
108547 +       p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
108548 +       if (WARN_ON(p_LnxWrpFmPortDev == NULL))
108549 +               return;
108550 +
108551 +       /* The name attribute will be freed also by these 2 functions? */
108552 +       switch (p_LnxWrpFmPortDev->settings.param.portType) {
108553 +       case e_FM_PORT_TYPE_TX:
108554 +       case e_FM_PORT_TYPE_TX_10G:
108555 +               sysfs_remove_group(&dev->kobj, &fm_tx_port_dev_stats_attr_grp);
108556 +               break;
108557 +       case e_FM_PORT_TYPE_RX:
108558 +       case e_FM_PORT_TYPE_RX_10G:
108559 +               sysfs_remove_group(&dev->kobj, &fm_rx_port_dev_stats_attr_grp);
108560 +               break;
108561 +       case e_FM_PORT_TYPE_DUMMY:
108562 +       case e_FM_PORT_TYPE_OH_OFFLINE_PARSING:
108563 +               sysfs_remove_group(&dev->kobj, &fm_oh_port_dev_stats_attr_grp);
108564 +               break;
108565 +       default:
108566 +               WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
108567 +                    __func__);
108568 +               break;
108569 +       };
108570 +
108571 +       device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_regs);
108572 +       device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_qmi_regs);
108573 +       device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_bmi_regs);
108574 +#if (DPAA_VERSION >= 11)
108575 +       device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_ipv4_opt);
108576 +#endif
108577 +       device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_dsar_regs);
108578 +       device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_dsar_mem);
108579 +}
108580 +
108581 +
108582 +int fm_port_dump_regs(void *h_dev, char *buf, int nn)
108583 +{
108584 +       t_FmPort *p_FmPort;
108585 +       t_Fm *p_Fm;
108586 +       uint8_t hardwarePortId;
108587 +       int n = nn;
108588 +
108589 +       p_FmPort = (t_FmPort *)h_dev;
108590 +       hardwarePortId = p_FmPort->hardwarePortId;
108591 +       p_Fm = (t_Fm *)p_FmPort->h_Fm;
108592 +
108593 +       FM_DMP_TITLE(buf, n, &p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId - 1],
108594 +                       "fmbm_pp for port %u", hardwarePortId);
108595 +       FM_DMP_MEM_32(buf, n,
108596 +                       &p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId - 1]);
108597 +
108598 +       FM_DMP_TITLE(buf, n, &p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId - 1],
108599 +                       "fmbm_pfs for port %u", hardwarePortId);
108600 +       FM_DMP_MEM_32(buf, n,
108601 +               &p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId - 1]);
108602 +
108603 +       FM_DMP_TITLE(buf, n,
108604 +                       &p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId - 1],
108605 +                       "fmbm_spliodn for port %u", hardwarePortId);
108606 +       FM_DMP_MEM_32(buf, n,
108607 +                       &p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId - 1]);
108608 +
108609 +       FM_DMP_TITLE(buf, n, &p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId],
108610 +                       "fmfp_psfor port %u", hardwarePortId);
108611 +       FM_DMP_MEM_32(buf, n, &p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId]);
108612 +
108613 +       FM_DMP_TITLE(buf, n, &p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId / 2],
108614 +                       "fmdmplrfor port %u", hardwarePortId);
108615 +       FM_DMP_MEM_32(buf, n,
108616 +                       &p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId / 2]);
108617 +       return n;
108618 +}
108619 +
108620 +#if (DPAA_VERSION >= 11)
108621 +
108622 +int fm_port_dump_ipv4_opt(void *h_dev, char *buf, int nn)
108623 +{
108624 +       t_FmPort *p_FmPort;
108625 +       int n = nn;
108626 +
108627 +       p_FmPort = (t_FmPort *)h_dev;
108628 +
108629 +       FM_DMP_V32(buf, n, p_FmPort->p_ParamsPage, ipfOptionsCounter);
108630 +
108631 +       FM_DMP_SUBTITLE(buf, n, "\n");
108632 +
108633 +       return n;
108634 +}
108635 +#endif
108636 +
108637 +int fm_port_dump_regs_bmi(void *h_dev, char *buf, int nn)
108638 +{
108639 +       t_FmPort *p_FmPort;
108640 +       u_FmPortBmiRegs *p_bmi;
108641 +
108642 +       char            arr[20];
108643 +       uint8_t         flag;
108644 +       int             i = 0;
108645 +       int             n = nn;
108646 +
108647 +       p_FmPort = (t_FmPort *)h_dev;
108648 +       p_bmi = p_FmPort->p_FmPortBmiRegs;
108649 +
108650 +       memset(arr, 0, sizeof(arr));
108651 +       switch (p_FmPort->portType) {
108652 +       case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
108653 +               strcpy(arr, "OFFLINE-PARSING");
108654 +               flag = 0;
108655 +               break;
108656 +       case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
108657 +               strcpy(arr, "HOST-COMMAND");
108658 +               flag = 0;
108659 +               break;
108660 +       case (e_FM_PORT_TYPE_RX):
108661 +               strcpy(arr, "RX");
108662 +               flag = 1;
108663 +               break;
108664 +       case (e_FM_PORT_TYPE_RX_10G):
108665 +               strcpy(arr, "RX-10G");
108666 +               flag = 1;
108667 +               break;
108668 +       case (e_FM_PORT_TYPE_TX):
108669 +               strcpy(arr, "TX");
108670 +               flag = 2;
108671 +               break;
108672 +       case (e_FM_PORT_TYPE_TX_10G):
108673 +               strcpy(arr, "TX-10G");
108674 +               flag = 2;
108675 +               break;
108676 +       default:
108677 +               return -EINVAL;
108678 +       }
108679 +
108680 +       FM_DMP_TITLE(buf, n, NULL,
108681 +               "FMan-Port (%s #%d) registers:",
108682 +               arr, p_FmPort->portId);
108683 +
108684 +       FM_DMP_TITLE(buf, n, p_bmi, "Bmi Port Regs");
108685 +
108686 +       switch (flag) {
108687 +       case (0):
108688 +               FM_DMP_SUBTITLE(buf, n, "\n");
108689 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ocfg);
108690 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ost);
108691 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oda);
108692 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oicp);
108693 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofdne);
108694 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofne);
108695 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofca);
108696 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofpne);
108697 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opso);
108698 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opp);
108699 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_occb);
108700 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oim);
108701 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofp);
108702 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofed);
108703 +
108704 +               FM_DMP_TITLE(buf, n,
108705 +                       &(p_bmi->ohPortBmiRegs.fmbm_oprai), "fmbm_oprai");
108706 +               for (i = 0; i < FM_PORT_PRS_RESULT_NUM_OF_WORDS; ++i) {
108707 +                       FM_DMP_MEM_32(buf, n,
108708 +                               &(p_bmi->ohPortBmiRegs.fmbm_oprai[i]));
108709 +               }
108710 +               FM_DMP_SUBTITLE(buf, n, "\n");
108711 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofqid);
108712 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oefqid);
108713 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofsdm);
108714 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofsem);
108715 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofene);
108716 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_orlmts);
108717 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_orlmt);
108718 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ocmne);
108719 +               {
108720 +#ifndef FM_NO_OP_OBSERVED_POOLS
108721 +               if (p_FmPort->fmRevInfo.majorRev == 4) {
108722 +                       FM_DMP_TITLE(buf, n,
108723 +                               &p_bmi->ohPortBmiRegs.fmbm_oebmpi,
108724 +                               "fmbm_oebmpi");
108725 +
108726 +                       for (i = 0; i < FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS; ++i) {
108727 +                               FM_DMP_MEM_32(buf, n,
108728 +                                       &(p_bmi->ohPortBmiRegs.fmbm_oebmpi[i]));
108729 +                       }
108730 +                       FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ocgm);
108731 +               }
108732 +#endif /* !FM_NO_OP_OBSERVED_POOLS */
108733 +               }
108734 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ostc);
108735 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofrc);
108736 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofdc);
108737 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofledc);
108738 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofufdc);
108739 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_offc);
108740 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofwdc);
108741 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofldec);
108742 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opc);
108743 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opcp);
108744 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_occn);
108745 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_otuc);
108746 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oduc);
108747 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofuc);
108748 +               FM_DMP_TITLE(buf, n, &(p_bmi->ohPortBmiRegs.fmbm_odcfg),
108749 +                               "fmbm_odcfg");
108750 +               for (i = 0; i < 3; ++i) {
108751 +                       FM_DMP_MEM_32(buf, n,
108752 +                               &(p_bmi->ohPortBmiRegs.fmbm_odcfg[i]));
108753 +               }
108754 +               FM_DMP_SUBTITLE(buf, n, "\n");
108755 +
108756 +               FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ogpr);
108757 +       break;
108758 +       case (1):
108759 +               FM_DMP_SUBTITLE(buf, n, "\n");
108760 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rcfg);
108761 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rst);
108762 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rda);
108763 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfp);
108764 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_reth);
108765 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfed);
108766 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_ricp);
108767 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rebm);
108768 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfne);
108769 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfca);
108770 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfpne);
108771 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpso);
108772 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpp);
108773 +               FM_DMP_TITLE(buf, n, &(p_bmi->rxPortBmiRegs.fmbm_rprai),
108774 +                       "fmbm_rprai");
108775 +               for (i = 0; i < FM_PORT_PRS_RESULT_NUM_OF_WORDS; ++i) {
108776 +                       FM_DMP_MEM_32(buf, n,
108777 +                               &(p_bmi->rxPortBmiRegs.fmbm_rprai[i]));
108778 +               }
108779 +               FM_DMP_SUBTITLE(buf, n, "\n");
108780 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfqid);
108781 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_refqid);
108782 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfsdm);
108783 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfsem);
108784 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfene);
108785 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rcmne);
108786 +               FM_DMP_TITLE(buf, n, &p_bmi->rxPortBmiRegs.fmbm_ebmpi,
108787 +                               "fmbm_ebmpi");
108788 +               for (i = 0; i < FM_PORT_MAX_NUM_OF_EXT_POOLS; ++i) {
108789 +                       FM_DMP_MEM_32(buf, n,
108790 +                               &(p_bmi->rxPortBmiRegs.fmbm_ebmpi[i]));
108791 +               }
108792 +               FM_DMP_TITLE(buf, n, &p_bmi->rxPortBmiRegs.fmbm_acnt,
108793 +                               "fmbm_acnt");
108794 +               for (i = 0; i < FM_PORT_MAX_NUM_OF_EXT_POOLS; ++i) {
108795 +                       FM_DMP_MEM_32(buf, n,
108796 +                               &(p_bmi->rxPortBmiRegs.fmbm_acnt[i]));
108797 +               }
108798 +               FM_DMP_TITLE(buf, n, &p_bmi->rxPortBmiRegs.fmbm_rcgm,
108799 +                               "fmbm_rcgm");
108800 +               for (i = 0; i < FM_PORT_NUM_OF_CONGESTION_GRPS / 32; ++i) {
108801 +                       FM_DMP_MEM_32(buf, n,
108802 +                               &(p_bmi->rxPortBmiRegs.fmbm_rcgm[i]));
108803 +               }
108804 +
108805 +               FM_DMP_SUBTITLE(buf, n, "\n");
108806 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rmpd);
108807 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rstc);
108808 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfrc);
108809 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfbc);
108810 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rlfc);
108811 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rffc);
108812 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfcd);
108813 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfldec);
108814 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rodc);
108815 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpc);
108816 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpcp);
108817 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rccn);
108818 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rtuc);
108819 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rrquc);
108820 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rduc);
108821 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfuc);
108822 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpac);
108823 +               FM_DMP_TITLE(buf, n, &(p_bmi->rxPortBmiRegs.fmbm_rdcfg),
108824 +                               "fmbm_rdcfg");
108825 +               for (i = 0; i < 3; ++i) {
108826 +                       FM_DMP_MEM_32(buf, n,
108827 +                               &(p_bmi->rxPortBmiRegs.fmbm_rdcfg[i]));
108828 +               }
108829 +               FM_DMP_SUBTITLE(buf, n, "\n");
108830 +               FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rgpr);
108831 +               break;
108832 +       case (2):
108833 +               FM_DMP_SUBTITLE(buf, n, "\n");
108834 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tcfg);
108835 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tst);
108836 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tda);
108837 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfp);
108838 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfed);
108839 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_ticp);
108840 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfdne);
108841 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfca);
108842 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tcfqid);
108843 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfeqid);
108844 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfene);
108845 +#if (DPAA_VERSION >= 11)
108846 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfne);
108847 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tcmne);
108848 +#endif /* (DPAA_VERSION >= 11) */
108849 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_trlmts);
108850 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_trlmt);
108851 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tstc);
108852 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfrc);
108853 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfdc);
108854 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfledc);
108855 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfufdc);
108856 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tpc);
108857 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tpcp);
108858 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tccn);
108859 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_ttuc);
108860 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_ttcquc);
108861 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tduc);
108862 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfuc);
108863 +               FM_DMP_TITLE(buf, n, &(p_bmi->txPortBmiRegs.fmbm_tdcfg),
108864 +                               "fmbm_tdcfg");
108865 +               for (i = 0; i < 3 ; ++i) {
108866 +                       FM_DMP_MEM_32(buf, n,
108867 +                               &(p_bmi->txPortBmiRegs.fmbm_tdcfg[i]));
108868 +               }
108869 +               FM_DMP_SUBTITLE(buf, n, "\n");
108870 +               FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tgpr);
108871 +               break;
108872 +       }
108873 +
108874 +       FM_DMP_SUBTITLE(buf, n, "\n");
108875 +
108876 +       return n;
108877 +}
108878 +
108879 +int fm_port_dump_regs_qmi(void *h_dev, char *buf, int nn)
108880 +{
108881 +       t_FmPort *p_FmPort;
108882 +       int n = nn;
108883 +
108884 +       p_FmPort = (t_FmPort *)h_dev;
108885 +
108886 +       FM_DMP_TITLE(buf, n, p_FmPort->p_FmPortQmiRegs, "Qmi Port Regs");
108887 +
108888 +       FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnc);
108889 +       FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pns);
108890 +       FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnts);
108891 +       FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnen);
108892 +       FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnetfc);
108893 +       FM_DMP_V32(buf, n,
108894 +               &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndn);
108895 +       FM_DMP_V32(buf, n,
108896 +               &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndc);
108897 +       FM_DMP_V32(buf, n,
108898 +               &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndtfc);
108899 +       FM_DMP_V32(buf, n,
108900 +               &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndfdc);
108901 +       FM_DMP_V32(buf, n,
108902 +               &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndcc);
108903 +
108904 +       FM_DMP_SUBTITLE(buf, n, "\n");
108905 +
108906 +       return n;
108907 +}
108908 +
108909 --- /dev/null
108910 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.h
108911 @@ -0,0 +1,56 @@
108912 +/*
108913 + * Copyright 2008-2012 Freescale Semiconductor Inc.
108914 + *
108915 + * Redistribution and use in source and binary forms, with or without
108916 + * modification, are permitted provided that the following conditions are met:
108917 + *     * Redistributions of source code must retain the above copyright
108918 + *       notice, this list of conditions and the following disclaimer.
108919 + *     * Redistributions in binary form must reproduce the above copyright
108920 + *       notice, this list of conditions and the following disclaimer in the
108921 + *       documentation and/or other materials provided with the distribution.
108922 + *     * Neither the name of Freescale Semiconductor nor the
108923 + *       names of its contributors may be used to endorse or promote products
108924 + *       derived from this software without specific prior written permission.
108925 + *
108926 + *
108927 + * ALTERNATIVELY, this software may be distributed under the terms of the
108928 + * GNU General Public License ("GPL") as published by the Free Software
108929 + * Foundation, either version 2 of that License or (at your option) any
108930 + * later version.
108931 + *
108932 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
108933 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
108934 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
108935 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
108936 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
108937 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
108938 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
108939 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
108940 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
108941 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
108942 + */
108943 +
108944 +/*
108945 + @File          lnxwrp_sysfs_fm_port.h
108946 +
108947 + @Description   FM port sysfs functions.
108948 +
108949 +*/
108950 +
108951 +#ifndef LNXWRP_SYSFS_FM_PORT_H_
108952 +#define LNXWRP_SYSFS_FM_PORT_H_
108953 +
108954 +#include "lnxwrp_sysfs.h"
108955 +
108956 +int fm_port_sysfs_create(struct device *dev);
108957 +void fm_port_sysfs_destroy(struct device *dev);
108958 +
108959 +int fm_port_dump_regs(void *h_dev, char *buf, int n);
108960 +int fm_port_dump_regs_bmi(void *h_dev, char *buf, int n);
108961 +int fm_port_dump_regs_qmi(void *h_dev, char *buf, int n);
108962 +
108963 +#if (DPAA_VERSION >= 11)
108964 +int fm_port_dump_ipv4_opt(void *h_dev, char *buf, int n);
108965 +#endif
108966 +
108967 +#endif /* LNXWRP_SYSFS_FM_PORT_H_ */
108968 --- /dev/null
108969 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/Makefile
108970 @@ -0,0 +1,18 @@
108971 +#
108972 +# Makefile for the Freescale Ethernet controllers
108973 +#
108974 +ccflags-y           += -DVERSION=\"\"
108975 +#
108976 +#Include netcomm SW specific definitions
108977 +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
108978 +
108979 +obj-y          += fsl-ncsw-xx.o
108980 +
108981 +ifneq ($(CONFIG_FMAN_ARM),y)
108982 +fsl-ncsw-xx-objs       :=  xx_linux.o \
108983 +                               module_strings.o
108984 +else
108985 +fsl-ncsw-xx-objs       := xx_arm_linux.o \
108986 +                               module_strings.o
108987 +endif
108988 +
108989 --- /dev/null
108990 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/module_strings.c
108991 @@ -0,0 +1,46 @@
108992 +/*
108993 + * Copyright 2012 Freescale Semiconductor Inc.
108994 + *
108995 + * Redistribution and use in source and binary forms, with or without
108996 + * modification, are permitted provided that the following conditions are met:
108997 + *     * Redistributions of source code must retain the above copyright
108998 + *       notice, this list of conditions and the following disclaimer.
108999 + *     * Redistributions in binary form must reproduce the above copyright
109000 + *       notice, this list of conditions and the following disclaimer in the
109001 + *       documentation and/or other materials provided with the distribution.
109002 + *     * Neither the name of Freescale Semiconductor nor the
109003 + *       names of its contributors may be used to endorse or promote products
109004 + *       derived from this software without specific prior written permission.
109005 + *
109006 + *
109007 + * ALTERNATIVELY, this software may be distributed under the terms of the
109008 + * GNU General Public License ("GPL") as published by the Free Software
109009 + * Foundation, either version 2 of that License or (at your option) any
109010 + * later version.
109011 + *
109012 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
109013 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
109014 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
109015 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
109016 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
109017 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
109018 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
109019 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
109020 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
109021 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
109022 + */
109023 +
109024 +/* Module names for debug messages */
109025 +const char *moduleStrings[] =
109026 +{
109027 +    "",                         /* MODULE_UNKNOWN */
109028 +    "FM",                       /* MODULE_FM */
109029 +    "FM-MURAM",                 /* MODULE_FM_MURAM */
109030 +    "FM-PCD",                   /* MODULE_FM_PCD */
109031 +    "FM-RTC",                   /* MODULE_FM_RTC */
109032 +    "FM-MAC",                   /* MODULE_FM_MAC */
109033 +    "FM-Port",                  /* MODULE_FM_PORT */
109034 +    "MM",                       /* MODULE_MM */
109035 +    "FM-SP",                    /* MODULE_FM_SP */
109036 +    "FM-MACSEC"                 /* MODULE_FM_MACSEC */
109037 +};
109038 --- /dev/null
109039 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_arm_linux.c
109040 @@ -0,0 +1,905 @@
109041 +/*
109042 + * Copyright 2008-2012 Freescale Semiconductor Inc.
109043 + *
109044 + * Redistribution and use in source and binary forms, with or without
109045 + * modification, are permitted provided that the following conditions are met:
109046 + *     * Redistributions of source code must retain the above copyright
109047 + *       notice, this list of conditions and the following disclaimer.
109048 + *     * Redistributions in binary form must reproduce the above copyright
109049 + *       notice, this list of conditions and the following disclaimer in the
109050 + *       documentation and/or other materials provided with the distribution.
109051 + *     * Neither the name of Freescale Semiconductor nor the
109052 + *       names of its contributors may be used to endorse or promote products
109053 + *       derived from this software without specific prior written permission.
109054 + *
109055 + *
109056 + * ALTERNATIVELY, this software may be distributed under the terms of the
109057 + * GNU General Public License ("GPL") as published by the Free Software
109058 + * Foundation, either version 2 of that License or (at your option) any
109059 + * later version.
109060 + *
109061 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
109062 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
109063 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
109064 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
109065 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
109066 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
109067 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
109068 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
109069 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
109070 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
109071 + */
109072 +
109073 +/**************************************************************************//**
109074 + @File          xx_arm_linux.c
109075 +
109076 + @Description   XX routines implementation for Linux.
109077 +*//***************************************************************************/
109078 +#include <linux/version.h>
109079 +
109080 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
109081 +#define MODVERSIONS
109082 +#endif
109083 +#ifdef MODVERSIONS
109084 +#include <config/modversions.h>
109085 +#endif /* MODVERSIONS */
109086 +
109087 +#include <linux/module.h>
109088 +#include <linux/kernel.h>
109089 +#include <linux/sched.h>
109090 +#include <linux/string.h>
109091 +#include <linux/ptrace.h>
109092 +#include <linux/errno.h>
109093 +#include <linux/ioport.h>
109094 +#include <linux/slab.h>
109095 +#include <linux/interrupt.h>
109096 +#include <linux/fs.h>
109097 +#include <linux/vmalloc.h>
109098 +#include <linux/init.h>
109099 +#include <linux/timer.h>
109100 +#include <linux/spinlock.h>
109101 +#include <linux/delay.h>
109102 +#include <linux/proc_fs.h>
109103 +#include <linux/smp.h>
109104 +#include <linux/of.h>
109105 +#include <linux/irqdomain.h>
109106 +
109107 +#include <linux/workqueue.h>
109108 +
109109 +#ifdef BIGPHYSAREA_ENABLE
109110 +#include <linux/bigphysarea.h>
109111 +#endif /* BIGPHYSAREA_ENABLE */
109112 +
109113 +//#include <sysdev/fsl_soc.h>
109114 +#include <asm/pgtable.h>
109115 +#include <asm/irq.h>
109116 +#include <asm/bitops.h>
109117 +#include <asm/uaccess.h>
109118 +#include <asm/io.h>
109119 +#include <asm/atomic.h>
109120 +#include <asm/string.h>
109121 +#include <asm/byteorder.h>
109122 +#include <asm/page.h>
109123 +
109124 +#include "error_ext.h"
109125 +#include "std_ext.h"
109126 +#include "list_ext.h"
109127 +#include "mm_ext.h"
109128 +#include "sys_io_ext.h"
109129 +#include "xx.h"
109130 +
109131 +
109132 +#define __ERR_MODULE__      MODULE_UNKNOWN
109133 +
109134 +#ifdef BIGPHYSAREA_ENABLE
109135 +#define MAX_ALLOCATION_SIZE     128 * 1024 /* Maximum size allocated with kmalloc is 128K */
109136 +
109137 +
109138 +/* TODO: large allocations => use big phys area */
109139 +/******************************************************************************
109140 + * routine:     get_nr_pages
109141 + *
109142 + * description:
109143 + *     calculates the number of memory pages for a given size (in bytes)
109144 + *
109145 + * arguments:
109146 + *     size       - the number of bytes
109147 + *
109148 + * return code:
109149 + *     The number of pages
109150 + *
109151 + *****************************************************************************/
109152 +static __inline__ uint32_t get_nr_pages (uint32_t size)
109153 +{
109154 +    return (uint32_t)((size >> PAGE_SHIFT) + (size & PAGE_SHIFT ? 1 : 0));
109155 +}
109156 +
109157 +static bool in_big_phys_area (uint32_t addr)
109158 +{
109159 +    uint32_t base, size;
109160 +
109161 +    bigphysarea_get_details (&base, &size);
109162 +    return ((addr >= base) && (addr < base + size));
109163 +}
109164 +#endif /* BIGPHYSAREA_ENABLE */
109165 +
109166 +void * xx_Malloc(uint32_t n)
109167 +{
109168 +    void        *a;
109169 +    uint32_t    flags;
109170 +
109171 +    flags = XX_DisableAllIntr();
109172 +#ifdef BIGPHYSAREA_ENABLE
109173 +    if (n >= MAX_ALLOCATION_SIZE)
109174 +        a = (void*)bigphysarea_alloc_pages(get_nr_pages(n), 0, GFP_ATOMIC);
109175 +    else
109176 +#endif /* BIGPHYSAREA_ENABLE */
109177 +    a = (void *)kmalloc((uint32_t)n, GFP_ATOMIC);
109178 +    if (!a)
109179 +        XX_Print("No memory for XX_Malloc\n");
109180 +    XX_RestoreAllIntr(flags);
109181 +
109182 +    return a;
109183 +}
109184 +
109185 +void xx_Free(void *p)
109186 +{
109187 +#ifdef BIGPHYSAREA_ENABLE
109188 +    if (in_big_phys_area ((uint32_t)p))
109189 +        bigphysarea_free_pages(p);
109190 +    else
109191 +#endif /* BIGPHYSAREA_ENABLE */
109192 +    kfree(p);
109193 +}
109194 +
109195 +void XX_Exit(int status)
109196 +{
109197 +    WARN(1, "\n\nFMD: fatal error, driver can't go on!!!\n\n");
109198 +}
109199 +
109200 +#define BUF_SIZE    512
109201 +void XX_Print(char *str, ...)
109202 +{
109203 +    va_list args;
109204 +#ifdef CONFIG_SMP
109205 +    char buf[BUF_SIZE];
109206 +#endif /* CONFIG_SMP */
109207 +
109208 +    va_start(args, str);
109209 +#ifdef CONFIG_SMP
109210 +    if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
109211 +        printk(KERN_WARNING "Illegal string to print!\n    more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
109212 +    printk(KERN_CRIT "cpu %d: %s",  raw_smp_processor_id(), buf);
109213 +#else
109214 +    vprintk(str, args);
109215 +#endif /* CONFIG_SMP */
109216 +    va_end(args);
109217 +}
109218 +
109219 +void XX_Fprint(void *file, char *str, ...)
109220 +{
109221 +    va_list args;
109222 +#ifdef CONFIG_SMP
109223 +    char buf[BUF_SIZE];
109224 +#endif /* CONFIG_SMP */
109225 +
109226 +    va_start(args, str);
109227 +#ifdef CONFIG_SMP
109228 +    if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
109229 +        printk(KERN_WARNING "Illegal string to print!\n    more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
109230 +    printk (KERN_CRIT "cpu %d: %s", smp_processor_id(), buf);
109231 +
109232 +#else
109233 +    vprintk(str, args);
109234 +#endif /* CONFIG_SMP */
109235 +    va_end(args);
109236 +}
109237 +
109238 +#ifdef DEBUG_XX_MALLOC
109239 +typedef void (*t_ffn)(void *);
109240 +typedef struct {
109241 +    t_ffn       f_free;
109242 +    void        *mem;
109243 +    char        *fname;
109244 +    int         fline;
109245 +    uint32_t    size;
109246 +    t_List      node;
109247 +} t_MemDebug;
109248 +#define MEMDBG_OBJECT(p_List) LIST_OBJECT(p_List, t_MemDebug, node)
109249 +
109250 +LIST(memDbgLst);
109251 +
109252 +
109253 +void * XX_MallocDebug(uint32_t size, char *fname, int line)
109254 +{
109255 +    void       *mem;
109256 +    t_MemDebug *p_MemDbg;
109257 +
109258 +    p_MemDbg = (t_MemDebug *)xx_Malloc(sizeof(t_MemDebug));
109259 +    if (p_MemDbg == NULL)
109260 +        return NULL;
109261 +
109262 +    mem = xx_Malloc(size);
109263 +    if (mem == NULL)
109264 +    {
109265 +        XX_Free(p_MemDbg);
109266 +        return NULL;
109267 +    }
109268 +
109269 +    INIT_LIST(&p_MemDbg->node);
109270 +    p_MemDbg->f_free = xx_Free;
109271 +    p_MemDbg->mem    = mem;
109272 +    p_MemDbg->fname  = fname;
109273 +    p_MemDbg->fline  = line;
109274 +    p_MemDbg->size   = size+sizeof(t_MemDebug);
109275 +    LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
109276 +
109277 +    return mem;
109278 +}
109279 +
109280 +void * XX_MallocSmartDebug(uint32_t size,
109281 +                           int      memPartitionId,
109282 +                           uint32_t align,
109283 +                           char     *fname,
109284 +                           int      line)
109285 +{
109286 +    void       *mem;
109287 +    t_MemDebug *p_MemDbg;
109288 +
109289 +    p_MemDbg = (t_MemDebug *)XX_Malloc(sizeof(t_MemDebug));
109290 +    if (p_MemDbg == NULL)
109291 +        return NULL;
109292 +
109293 +    mem = xx_MallocSmart((uint32_t)size, memPartitionId, align);
109294 +    if (mem == NULL)
109295 +    {
109296 +        XX_Free(p_MemDbg);
109297 +        return NULL;
109298 +    }
109299 +
109300 +    INIT_LIST(&p_MemDbg->node);
109301 +    p_MemDbg->f_free = xx_FreeSmart;
109302 +    p_MemDbg->mem    = mem;
109303 +    p_MemDbg->fname  = fname;
109304 +    p_MemDbg->fline  = line;
109305 +    p_MemDbg->size   = size+sizeof(t_MemDebug);
109306 +    LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
109307 +
109308 +    return mem;
109309 +}
109310 +
109311 +static void debug_free(void *mem)
109312 +{
109313 +    t_List      *p_MemDbgLh = NULL;
109314 +    t_MemDebug  *p_MemDbg;
109315 +    bool        found = FALSE;
109316 +
109317 +    if (LIST_IsEmpty(&memDbgLst))
109318 +    {
109319 +        REPORT_ERROR(MAJOR, E_ALREADY_FREE, ("Unbalanced free (0x%08x)", mem));
109320 +        return;
109321 +    }
109322 +
109323 +    LIST_FOR_EACH(p_MemDbgLh, &memDbgLst)
109324 +    {
109325 +        p_MemDbg = MEMDBG_OBJECT(p_MemDbgLh);
109326 +        if (p_MemDbg->mem == mem)
109327 +        {
109328 +            found = TRUE;
109329 +            break;
109330 +        }
109331 +    }
109332 +
109333 +    if (!found)
109334 +    {
109335 +        REPORT_ERROR(MAJOR, E_NOT_FOUND,
109336 +                     ("Attempt to free unallocated address (0x%08x)",mem));
109337 +        dump_stack();
109338 +        return;
109339 +    }
109340 +
109341 +    LIST_Del(p_MemDbgLh);
109342 +    p_MemDbg->f_free(mem);
109343 +    p_MemDbg->f_free(p_MemDbg);
109344 +}
109345 +
109346 +void XX_FreeSmart(void *p)
109347 +{
109348 +    debug_free(p);
109349 +}
109350 +
109351 +
109352 +void XX_Free(void *p)
109353 +{
109354 +    debug_free(p);
109355 +}
109356 +
109357 +#else /* not DEBUG_XX_MALLOC */
109358 +void * XX_Malloc(uint32_t size)
109359 +{
109360 +    return xx_Malloc(size);
109361 +}
109362 +
109363 +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
109364 +{
109365 +    return xx_MallocSmart(size,memPartitionId, alignment);
109366 +}
109367 +
109368 +void XX_FreeSmart(void *p)
109369 +{
109370 +    xx_FreeSmart(p);
109371 +}
109372 +
109373 +
109374 +void XX_Free(void *p)
109375 +{
109376 +    xx_Free(p);
109377 +}
109378 +#endif /* not DEBUG_XX_MALLOC */
109379 +
109380 +
109381 +#if (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0))
109382 +void XX_EventById(uint32_t event, t_Handle appId, uint16_t flags, char *msg)
109383 +{
109384 +    e_Event eventCode = (e_Event)event;
109385 +
109386 +    UNUSED(eventCode);
109387 +    UNUSED(appId);
109388 +    UNUSED(flags);
109389 +    UNUSED(msg);
109390 +}
109391 +#endif /* (defined(REPORT_EVENTS) && ... */
109392 +
109393 +
109394 +uint32_t XX_DisableAllIntr(void)
109395 +{
109396 +    unsigned long flags;
109397 +
109398 +#ifdef local_irq_save_nort
109399 +    local_irq_save_nort(flags);
109400 +#else
109401 +    local_irq_save(flags);
109402 +#endif
109403 +
109404 +    return (uint32_t)flags;
109405 +}
109406 +
109407 +void XX_RestoreAllIntr(uint32_t flags)
109408 +{
109409 +#ifdef local_irq_restore_nort
109410 +    local_irq_restore_nort((unsigned long)flags);
109411 +#else
109412 +    local_irq_restore((unsigned long)flags);
109413 +#endif
109414 +}
109415 +
109416 +t_Error XX_Call( uint32_t qid, t_Error (* f)(t_Handle), t_Handle id, t_Handle appId, uint16_t flags )
109417 +{
109418 +    UNUSED(qid);
109419 +    UNUSED(appId);
109420 +    UNUSED(flags);
109421 +
109422 +    return f(id);
109423 +}
109424 +
109425 +int XX_IsICacheEnable(void)
109426 +{
109427 +    return TRUE;
109428 +}
109429 +
109430 +int XX_IsDCacheEnable(void)
109431 +{
109432 +    return TRUE;
109433 +}
109434 +
109435 +
109436 +typedef struct {
109437 +    t_Isr       *f_Isr;
109438 +    t_Handle    handle;
109439 +} t_InterruptHandler;
109440 +
109441 +
109442 +t_Handle interruptHandlers[0x00010000];
109443 +
109444 +static irqreturn_t LinuxInterruptHandler (int irq, void *dev_id)
109445 +{
109446 +    t_InterruptHandler *p_IntrHndl = (t_InterruptHandler *)dev_id;
109447 +    p_IntrHndl->f_Isr(p_IntrHndl->handle);
109448 +    return IRQ_HANDLED;
109449 +}
109450 +
109451 +t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle)
109452 +{
109453 +    const char *device;
109454 +    t_InterruptHandler *p_IntrHndl;
109455 +
109456 +    device = GetDeviceName(irq);
109457 +    if (device == NULL)
109458 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Interrupt source - %d", irq));
109459 +
109460 +    p_IntrHndl = (t_InterruptHandler *)XX_Malloc(sizeof(t_InterruptHandler));
109461 +    if (p_IntrHndl == NULL)
109462 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
109463 +    p_IntrHndl->f_Isr = f_Isr;
109464 +    p_IntrHndl->handle = handle;
109465 +    interruptHandlers[irq] = p_IntrHndl;
109466 +
109467 +    if (request_irq(GetDeviceIrqNum(irq), LinuxInterruptHandler, 0, device, p_IntrHndl) < 0)
109468 +        RETURN_ERROR(MAJOR, E_BUSY, ("Can't get IRQ %s\n", device));
109469 +    disable_irq(GetDeviceIrqNum(irq));
109470 +
109471 +    return E_OK;
109472 +}
109473 +
109474 +t_Error XX_FreeIntr(int irq)
109475 +{
109476 +    t_InterruptHandler *p_IntrHndl = interruptHandlers[irq];
109477 +    free_irq(GetDeviceIrqNum(irq), p_IntrHndl);
109478 +    XX_Free(p_IntrHndl);
109479 +    interruptHandlers[irq] = 0;
109480 +    return E_OK;
109481 +}
109482 +
109483 +t_Error XX_EnableIntr(int irq)
109484 +{
109485 +    enable_irq(GetDeviceIrqNum(irq));
109486 +    return E_OK;
109487 +}
109488 +
109489 +t_Error XX_DisableIntr(int irq)
109490 +{
109491 +    disable_irq(GetDeviceIrqNum(irq));
109492 +    return E_OK;
109493 +}
109494 +
109495 +
109496 +/*****************************************************************************/
109497 +/*                       Tasklet Service Routines                            */
109498 +/*****************************************************************************/
109499 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
109500 +typedef struct
109501 +{
109502 +    t_Handle            h_Data;
109503 +    void                (*f_Callback) (void *);
109504 +    struct delayed_work dwork;
109505 +} t_Tasklet;
109506 +
109507 +static void GenericTaskletCallback(struct work_struct *p_Work)
109508 +{
109509 +    t_Tasklet *p_Task = container_of(p_Work, t_Tasklet, dwork.work);
109510 +
109511 +    p_Task->f_Callback(p_Task->h_Data);
109512 +}
109513 +#endif    /* LINUX_VERSION_CODE */
109514 +
109515 +
109516 +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data)
109517 +{
109518 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
109519 +    struct work_struct *p_Task;
109520 +    p_Task = (struct work_struct *)XX_Malloc(sizeof(struct work_struct));
109521 +    INIT_WORK(p_Task, routine, data);
109522 +#else
109523 +    t_Tasklet *p_Task = (t_Tasklet *)XX_Malloc(sizeof(t_Tasklet));
109524 +    p_Task->h_Data = data;
109525 +    p_Task->f_Callback = routine;
109526 +    INIT_DELAYED_WORK(&p_Task->dwork, GenericTaskletCallback);
109527 +#endif    /* LINUX_VERSION_CODE */
109528 +
109529 +    return (t_TaskletHandle)p_Task;
109530 +}
109531 +
109532 +
109533 +void XX_FreeTasklet (t_TaskletHandle h_Tasklet)
109534 +{
109535 +    if (h_Tasklet)
109536 +        XX_Free(h_Tasklet);
109537 +}
109538 +
109539 +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate)
109540 +{
109541 +    int ans;
109542 +
109543 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
109544 +    if (immediate)
109545 +        ans = schedule_work(h_Tasklet);
109546 +    else
109547 +        ans = schedule_delayed_work(h_Tasklet, 1);
109548 +#else
109549 +    if (immediate)
109550 +        ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, 0);
109551 +    else
109552 +        ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, HZ);
109553 +#endif /* LINUX_VERSION_CODE */
109554 +
109555 +    return ans;
109556 +}
109557 +
109558 +void XX_FlushScheduledTasks(void)
109559 +{
109560 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
109561 +    flush_scheduled_tasks();
109562 +#else
109563 +    flush_scheduled_work();
109564 +#endif    /* LINUX_VERSION_CODE */
109565 +}
109566 +
109567 +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet)
109568 +{
109569 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
109570 +    return (int)(((struct work_struct *)h_Tasklet)->pending);
109571 +#else
109572 +    return (int)delayed_work_pending(&((t_Tasklet *)h_Tasklet)->dwork);
109573 +#endif    /* LINUX_VERSION_CODE */
109574 +}
109575 +
109576 +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data)
109577 +{
109578 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
109579 +    ((struct tq_struct *)h_Tasklet)->data = data;
109580 +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
109581 +    ((struct work_struct *)h_Tasklet)->data = data;
109582 +#else
109583 +    ((t_Tasklet *)h_Tasklet)->h_Data = data;
109584 +#endif    /* LINUX_VERSION_CODE */
109585 +}
109586 +
109587 +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet)
109588 +{
109589 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
109590 +    return (t_Handle)(((struct work_struct *)h_Tasklet)->data);
109591 +#else
109592 +    return ((t_Tasklet *)h_Tasklet)->h_Data;
109593 +#endif    /* LINUX_VERSION_CODE */
109594 +}
109595 +
109596 +
109597 +/*****************************************************************************/
109598 +/*                         Spinlock Service Routines                         */
109599 +/*****************************************************************************/
109600 +
109601 +t_Handle XX_InitSpinlock(void)
109602 +{
109603 +    spinlock_t *p_Spinlock = (spinlock_t *)XX_Malloc(sizeof(spinlock_t));
109604 +    if (!p_Spinlock)
109605 +        return NULL;
109606 +
109607 +    spin_lock_init(p_Spinlock);
109608 +
109609 +    return (t_Handle)p_Spinlock;
109610 +}
109611 +
109612 +void XX_FreeSpinlock(t_Handle h_Spinlock)
109613 +{
109614 +    if (h_Spinlock)
109615 +        XX_Free(h_Spinlock);
109616 +}
109617 +
109618 +void XX_LockSpinlock(t_Handle h_Spinlock)
109619 +{
109620 +    spin_lock((spinlock_t *)h_Spinlock);
109621 +}
109622 +
109623 +void XX_UnlockSpinlock(t_Handle h_Spinlock)
109624 +{
109625 +    spin_unlock((spinlock_t *)h_Spinlock);
109626 +}
109627 +
109628 +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock)
109629 +{
109630 +    unsigned long intrFlags;
109631 +    spin_lock_irqsave((spinlock_t *)h_Spinlock, intrFlags);
109632 +    return intrFlags;
109633 +}
109634 +
109635 +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags)
109636 +{
109637 +     spin_unlock_irqrestore((spinlock_t *)h_Spinlock, (unsigned long)intrFlags);
109638 +}
109639 +
109640 +
109641 +/*****************************************************************************/
109642 +/*                        Timers Service Routines                            */
109643 +/*****************************************************************************/
109644 +/* The time now is in mili sec. resolution */
109645 +uint32_t XX_CurrentTime(void)
109646 +{
109647 +    return (jiffies*1000)/HZ;
109648 +}
109649 +
109650 +
109651 +t_Handle XX_CreateTimer(void)
109652 +{
109653 +    struct timer_list *p_Timer = (struct timer_list *)XX_Malloc(sizeof(struct timer_list));
109654 +    if (p_Timer)
109655 +    {
109656 +        memset(p_Timer, 0, sizeof(struct timer_list));
109657 +        init_timer(p_Timer);
109658 +    }
109659 +    return (t_Handle)p_Timer;
109660 +}
109661 +
109662 +void XX_FreeTimer(t_Handle h_Timer)
109663 +{
109664 +    if (h_Timer)
109665 +        XX_Free(h_Timer);
109666 +}
109667 +
109668 +void XX_StartTimer(t_Handle h_Timer,
109669 +                   uint32_t msecs,
109670 +                   bool     periodic,
109671 +                   void     (*f_TimerExpired)(t_Handle),
109672 +                   t_Handle h_Arg)
109673 +{
109674 +    int                 tmp_jiffies = (msecs*HZ)/1000;
109675 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
109676 +
109677 +    SANITY_CHECK_RETURN((periodic == FALSE), E_NOT_SUPPORTED);
109678 +
109679 +    p_Timer->function = (void (*)(unsigned long))f_TimerExpired;
109680 +    p_Timer->data = (unsigned long)h_Arg;
109681 +    if ((msecs*HZ)%1000)
109682 +        tmp_jiffies++;
109683 +    p_Timer->expires = (jiffies + tmp_jiffies);
109684 +
109685 +    add_timer((struct timer_list *)h_Timer);
109686 +}
109687 +
109688 +void XX_SetTimerData(t_Handle h_Timer, t_Handle data)
109689 +{
109690 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
109691 +
109692 +    p_Timer->data = (unsigned long)data;
109693 +}
109694 +
109695 +t_Handle XX_GetTimerData(t_Handle h_Timer)
109696 +{
109697 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
109698 +
109699 +    return (t_Handle)p_Timer->data;
109700 +}
109701 +
109702 +uint32_t   XX_GetExpirationTime(t_Handle h_Timer)
109703 +{
109704 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
109705 +
109706 +    return (uint32_t)p_Timer->expires;
109707 +}
109708 +
109709 +void XX_StopTimer(t_Handle h_Timer)
109710 +{
109711 +    del_timer((struct timer_list *)h_Timer);
109712 +}
109713 +
109714 +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs)
109715 +{
109716 +    int tmp_jiffies = (msecs*HZ)/1000;
109717 +
109718 +    if ((msecs*HZ)%1000)
109719 +        tmp_jiffies++;
109720 +    mod_timer((struct timer_list *)h_Timer, jiffies + tmp_jiffies);
109721 +}
109722 +
109723 +int XX_TimerIsActive(t_Handle h_Timer)
109724 +{
109725 +  return timer_pending((struct timer_list *)h_Timer);
109726 +}
109727 +
109728 +uint32_t XX_Sleep(uint32_t msecs)
109729 +{
109730 +    int tmp_jiffies = (msecs*HZ)/1000;
109731 +
109732 +    if ((msecs*HZ)%1000)
109733 +        tmp_jiffies++;
109734 +    return schedule_timeout(tmp_jiffies);
109735 +}
109736 +
109737 +/*BEWARE!!!!! UDelay routine is BUSY WAITTING!!!!!*/
109738 +void XX_UDelay(uint32_t usecs)
109739 +{
109740 +    udelay(usecs);
109741 +}
109742 +
109743 +/* TODO: verify that these are correct */
109744 +#define MSG_BODY_SIZE       512
109745 +typedef t_Error (t_MsgHandler) (t_Handle h_Mod, uint32_t msgId, uint8_t msgBody[MSG_BODY_SIZE]);
109746 +typedef void (t_MsgCompletionCB) (t_Handle h_Arg, uint8_t msgBody[MSG_BODY_SIZE]);
109747 +t_Error XX_SendMessage(char                 *p_DestAddr,
109748 +                       uint32_t             msgId,
109749 +                       uint8_t              msgBody[MSG_BODY_SIZE],
109750 +                       t_MsgCompletionCB    *f_CompletionCB,
109751 +                       t_Handle             h_CBArg);
109752 +
109753 +typedef struct {
109754 +    char            *p_Addr;
109755 +    t_MsgHandler    *f_MsgHandlerCB;
109756 +    t_Handle        h_Mod;
109757 +    t_List          node;
109758 +} t_MsgHndlr;
109759 +#define MSG_HNDLR_OBJECT(ptr)  LIST_OBJECT(ptr, t_MsgHndlr, node)
109760 +
109761 +LIST(msgHndlrList);
109762 +
109763 +static void EnqueueMsgHndlr(t_MsgHndlr *p_MsgHndlr)
109764 +{
109765 +    uint32_t   intFlags;
109766 +
109767 +    intFlags = XX_DisableAllIntr();
109768 +    LIST_AddToTail(&p_MsgHndlr->node, &msgHndlrList);
109769 +    XX_RestoreAllIntr(intFlags);
109770 +}
109771 +/* TODO: add this for multi-platform support
109772 +static t_MsgHndlr * DequeueMsgHndlr(void)
109773 +{
109774 +    t_MsgHndlr *p_MsgHndlr = NULL;
109775 +    uint32_t   intFlags;
109776 +
109777 +    intFlags = XX_DisableAllIntr();
109778 +    if (!LIST_IsEmpty(&msgHndlrList))
109779 +    {
109780 +        p_MsgHndlr = MSG_HNDLR_OBJECT(msgHndlrList.p_Next);
109781 +        LIST_DelAndInit(&p_MsgHndlr->node);
109782 +    }
109783 +    XX_RestoreAllIntr(intFlags);
109784 +
109785 +    return p_MsgHndlr;
109786 +}
109787 +*/
109788 +static t_MsgHndlr * FindMsgHndlr(char *p_Addr)
109789 +{
109790 +    t_MsgHndlr  *p_MsgHndlr;
109791 +    t_List      *p_Pos;
109792 +
109793 +    LIST_FOR_EACH(p_Pos, &msgHndlrList)
109794 +    {
109795 +        p_MsgHndlr = MSG_HNDLR_OBJECT(p_Pos);
109796 +        if (strstr(p_MsgHndlr->p_Addr, p_Addr))
109797 +            return p_MsgHndlr;
109798 +    }
109799 +
109800 +    return NULL;
109801 +}
109802 +
109803 +t_Error XX_RegisterMessageHandler   (char *p_Addr, t_MsgHandler *f_MsgHandlerCB, t_Handle h_Mod)
109804 +{
109805 +    t_MsgHndlr  *p_MsgHndlr;
109806 +    uint32_t    len;
109807 +
109808 +    p_MsgHndlr = (t_MsgHndlr*)XX_Malloc(sizeof(t_MsgHndlr));
109809 +    if (!p_MsgHndlr)
109810 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("message handler object!!!"));
109811 +    memset(p_MsgHndlr, 0, sizeof(t_MsgHndlr));
109812 +
109813 +    len = strlen(p_Addr);
109814 +    p_MsgHndlr->p_Addr = (char*)XX_Malloc(len+1);
109815 +    strncpy(p_MsgHndlr->p_Addr,p_Addr, (uint32_t)(len+1));
109816 +
109817 +    p_MsgHndlr->f_MsgHandlerCB = f_MsgHandlerCB;
109818 +    p_MsgHndlr->h_Mod = h_Mod;
109819 +    INIT_LIST(&p_MsgHndlr->node);
109820 +    EnqueueMsgHndlr(p_MsgHndlr);
109821 +
109822 +    return E_OK;
109823 +}
109824 +
109825 +t_Error XX_UnregisterMessageHandler (char *p_Addr)
109826 +{
109827 +    t_MsgHndlr *p_MsgHndlr = FindMsgHndlr(p_Addr);
109828 +    if (!p_MsgHndlr)
109829 +        RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
109830 +
109831 +    LIST_Del(&p_MsgHndlr->node);
109832 +    XX_Free(p_MsgHndlr->p_Addr);
109833 +    XX_Free(p_MsgHndlr);
109834 +
109835 +    return E_OK;
109836 +}
109837 +
109838 +t_Error XX_SendMessage(char                 *p_DestAddr,
109839 +                       uint32_t             msgId,
109840 +                       uint8_t              msgBody[MSG_BODY_SIZE],
109841 +                       t_MsgCompletionCB    *f_CompletionCB,
109842 +                       t_Handle             h_CBArg)
109843 +{
109844 +    t_Error     ans;
109845 +    t_MsgHndlr  *p_MsgHndlr = FindMsgHndlr(p_DestAddr);
109846 +    if (!p_MsgHndlr)
109847 +        RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
109848 +
109849 +    ans = p_MsgHndlr->f_MsgHandlerCB(p_MsgHndlr->h_Mod, msgId, msgBody);
109850 +
109851 +    if (f_CompletionCB)
109852 +        f_CompletionCB(h_CBArg, msgBody);
109853 +
109854 +    return ans;
109855 +}
109856 +
109857 +t_Error XX_IpcRegisterMsgHandler(char                   addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
109858 +                                 t_IpcMsgHandler        *f_MsgHandler,
109859 +                                 t_Handle               h_Module,
109860 +                                 uint32_t               replyLength)
109861 +{
109862 +    UNUSED(addr);UNUSED(f_MsgHandler);UNUSED(h_Module);UNUSED(replyLength);
109863 +    return E_OK;
109864 +}
109865 +
109866 +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH])
109867 +{
109868 +    UNUSED(addr);
109869 +    return E_OK;
109870 +}
109871 +
109872 +
109873 +t_Error XX_IpcSendMessage(t_Handle           h_Session,
109874 +                          uint8_t            *p_Msg,
109875 +                          uint32_t           msgLength,
109876 +                          uint8_t            *p_Reply,
109877 +                          uint32_t           *p_ReplyLength,
109878 +                          t_IpcMsgCompletion *f_Completion,
109879 +                          t_Handle           h_Arg)
109880 +{
109881 +    UNUSED(h_Session); UNUSED(p_Msg); UNUSED(msgLength); UNUSED(p_Reply);
109882 +    UNUSED(p_ReplyLength); UNUSED(f_Completion); UNUSED(h_Arg);
109883 +    return E_OK;
109884 +}
109885 +
109886 +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
109887 +                           char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH])
109888 +{
109889 +    UNUSED(destAddr); UNUSED(srcAddr);
109890 +    return E_OK;
109891 +}
109892 +
109893 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
109894 +int GetDeviceIrqNum(int irq)
109895 +{
109896 +    struct device_node  *iPar;
109897 +    struct irq_domain   *irqHost;
109898 +    uint32_t            hwIrq;
109899 +
109900 +    /* Get the interrupt controller */
109901 +    iPar = of_find_node_by_name(NULL, "mpic");
109902 +    hwIrq = 0;
109903 +
109904 +    ASSERT_COND(iPar != NULL);
109905 +    /* Get the irq host */
109906 +    irqHost = irq_find_host(iPar);
109907 +    of_node_put(iPar);
109908 +
109909 +    /* Create irq mapping */
109910 +    return irq_create_mapping(irqHost, hwIrq);
109911 +}
109912 +#else
109913 +#error "kernel not supported!!!"
109914 +#endif    /* LINUX_VERSION_CODE */
109915 +
109916 +void * XX_PhysToVirt(physAddress_t addr)
109917 +{
109918 +    return UINT_TO_PTR(SYS_PhysToVirt((uint64_t)addr));
109919 +}
109920 +
109921 +physAddress_t XX_VirtToPhys(void * addr)
109922 +{
109923 +    return (physAddress_t)SYS_VirtToPhys(PTR_TO_UINT(addr));
109924 +}
109925 +
109926 +void * xx_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
109927 +{
109928 +    uintptr_t   *returnCode, tmp;
109929 +
109930 +    if (alignment < sizeof(uintptr_t))
109931 +        alignment = sizeof(uintptr_t);
109932 +    size += alignment + sizeof(returnCode);
109933 +    tmp = (uintptr_t)xx_Malloc(size);
109934 +    if (tmp == 0)
109935 +        return NULL;
109936 +    returnCode = (uintptr_t*)((tmp + alignment + sizeof(returnCode)) & ~((uintptr_t)alignment - 1));
109937 +    *(returnCode - 1) = tmp;
109938 +
109939 +    return (void*)returnCode;
109940 +}
109941 +
109942 +void xx_FreeSmart(void *p)
109943 +{
109944 +    xx_Free((void*)(*((uintptr_t *)(p) - 1)));
109945 +}
109946 --- /dev/null
109947 +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_linux.c
109948 @@ -0,0 +1,918 @@
109949 +/*
109950 + * Copyright 2008-2012 Freescale Semiconductor Inc.
109951 + *
109952 + * Redistribution and use in source and binary forms, with or without
109953 + * modification, are permitted provided that the following conditions are met:
109954 + *     * Redistributions of source code must retain the above copyright
109955 + *       notice, this list of conditions and the following disclaimer.
109956 + *     * Redistributions in binary form must reproduce the above copyright
109957 + *       notice, this list of conditions and the following disclaimer in the
109958 + *       documentation and/or other materials provided with the distribution.
109959 + *     * Neither the name of Freescale Semiconductor nor the
109960 + *       names of its contributors may be used to endorse or promote products
109961 + *       derived from this software without specific prior written permission.
109962 + *
109963 + *
109964 + * ALTERNATIVELY, this software may be distributed under the terms of the
109965 + * GNU General Public License ("GPL") as published by the Free Software
109966 + * Foundation, either version 2 of that License or (at your option) any
109967 + * later version.
109968 + *
109969 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
109970 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
109971 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
109972 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
109973 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
109974 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
109975 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
109976 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
109977 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
109978 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
109979 + */
109980 +
109981 +/**************************************************************************//**
109982 + @File          xx_linux.c
109983 +
109984 + @Description   XX routines implementation for Linux.
109985 +*//***************************************************************************/
109986 +#include <linux/version.h>
109987 +
109988 +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
109989 +#define MODVERSIONS
109990 +#endif
109991 +#ifdef MODVERSIONS
109992 +#include <config/modversions.h>
109993 +#endif /* MODVERSIONS */
109994 +
109995 +#include <linux/module.h>
109996 +#include <linux/kernel.h>
109997 +#include <linux/sched.h>
109998 +#include <linux/string.h>
109999 +#include <linux/ptrace.h>
110000 +#include <linux/errno.h>
110001 +#include <linux/ioport.h>
110002 +#include <linux/slab.h>
110003 +#include <linux/interrupt.h>
110004 +#include <linux/fs.h>
110005 +#include <linux/vmalloc.h>
110006 +#include <linux/init.h>
110007 +#include <linux/timer.h>
110008 +#include <linux/spinlock.h>
110009 +#include <linux/delay.h>
110010 +#include <linux/proc_fs.h>
110011 +#include <linux/smp.h>
110012 +#include <linux/of.h>
110013 +#ifdef CONFIG_FMAN_ARM
110014 +#include <linux/irqdomain.h>
110015 +#endif
110016 +
110017 +#include <linux/workqueue.h>
110018 +
110019 +#ifdef BIGPHYSAREA_ENABLE
110020 +#include <linux/bigphysarea.h>
110021 +#endif /* BIGPHYSAREA_ENABLE */
110022 +
110023 +#ifndef CONFIG_FMAN_ARM
110024 +#include <sysdev/fsl_soc.h>
110025 +#endif
110026 +#include <asm/pgtable.h>
110027 +#include <asm/irq.h>
110028 +#include <asm/bitops.h>
110029 +#include <asm/uaccess.h>
110030 +#include <asm/io.h>
110031 +#include <asm/atomic.h>
110032 +#include <asm/string.h>
110033 +#include <asm/byteorder.h>
110034 +#include <asm/page.h>
110035 +
110036 +#include "error_ext.h"
110037 +#include "std_ext.h"
110038 +#include "list_ext.h"
110039 +#include "mm_ext.h"
110040 +#include "sys_io_ext.h"
110041 +#include "xx.h"
110042 +
110043 +
110044 +#define __ERR_MODULE__      MODULE_UNKNOWN
110045 +
110046 +#ifdef BIGPHYSAREA_ENABLE
110047 +#define MAX_ALLOCATION_SIZE     128 * 1024 /* Maximum size allocated with kmalloc is 128K */
110048 +
110049 +
110050 +/* TODO: large allocations => use big phys area */
110051 +/******************************************************************************
110052 + * routine:     get_nr_pages
110053 + *
110054 + * description:
110055 + *     calculates the number of memory pages for a given size (in bytes)
110056 + *
110057 + * arguments:
110058 + *     size       - the number of bytes
110059 + *
110060 + * return code:
110061 + *     The number of pages
110062 + *
110063 + *****************************************************************************/
110064 +static __inline__ uint32_t get_nr_pages (uint32_t size)
110065 +{
110066 +    return (uint32_t)((size >> PAGE_SHIFT) + (size & PAGE_SHIFT ? 1 : 0));
110067 +}
110068 +
110069 +static bool in_big_phys_area (uint32_t addr)
110070 +{
110071 +    uint32_t base, size;
110072 +
110073 +    bigphysarea_get_details (&base, &size);
110074 +    return ((addr >= base) && (addr < base + size));
110075 +}
110076 +#endif /* BIGPHYSAREA_ENABLE */
110077 +
110078 +void * xx_Malloc(uint32_t n)
110079 +{
110080 +    void        *a;
110081 +    uint32_t    flags;
110082 +
110083 +    flags = XX_DisableAllIntr();
110084 +#ifdef BIGPHYSAREA_ENABLE
110085 +    if (n >= MAX_ALLOCATION_SIZE)
110086 +        a = (void*)bigphysarea_alloc_pages(get_nr_pages(n), 0, GFP_ATOMIC);
110087 +    else
110088 +#endif /* BIGPHYSAREA_ENABLE */
110089 +    a = (void *)kmalloc((uint32_t)n, GFP_ATOMIC);
110090 +    if (!a)
110091 +        XX_Print("No memory for XX_Malloc\n");
110092 +    XX_RestoreAllIntr(flags);
110093 +
110094 +    return a;
110095 +}
110096 +
110097 +void xx_Free(void *p)
110098 +{
110099 +#ifdef BIGPHYSAREA_ENABLE
110100 +    if (in_big_phys_area ((uint32_t)p))
110101 +        bigphysarea_free_pages(p);
110102 +    else
110103 +#endif /* BIGPHYSAREA_ENABLE */
110104 +    kfree(p);
110105 +}
110106 +
110107 +void XX_Exit(int status)
110108 +{
110109 +    WARN(1, "\n\nFMD: fatal error, driver can't go on!!!\n\n");
110110 +}
110111 +
110112 +#define BUF_SIZE    512
110113 +void XX_Print(char *str, ...)
110114 +{
110115 +    va_list args;
110116 +#ifdef CONFIG_SMP
110117 +    char buf[BUF_SIZE];
110118 +#endif /* CONFIG_SMP */
110119 +
110120 +    va_start(args, str);
110121 +#ifdef CONFIG_SMP
110122 +    if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
110123 +        printk(KERN_WARNING "Illegal string to print!\n    more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
110124 +    printk(KERN_CRIT "cpu%d/%d: %s", raw_smp_processor_id(), NR_CPUS, buf);
110125 +#else
110126 +    vprintk(str, args);
110127 +#endif /* CONFIG_SMP */
110128 +    va_end(args);
110129 +}
110130 +
110131 +void XX_Fprint(void *file, char *str, ...)
110132 +{
110133 +    va_list args;
110134 +#ifdef CONFIG_SMP
110135 +    char buf[BUF_SIZE];
110136 +#endif /* CONFIG_SMP */
110137 +
110138 +    va_start(args, str);
110139 +#ifdef CONFIG_SMP
110140 +    if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
110141 +        printk(KERN_WARNING "Illegal string to print!\n    more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
110142 +    printk (KERN_CRIT "cpu%d/%d: %s", raw_smp_processor_id(), NR_CPUS, buf);
110143 +
110144 +#else
110145 +    vprintk(str, args);
110146 +#endif /* CONFIG_SMP */
110147 +    va_end(args);
110148 +}
110149 +
110150 +#ifdef DEBUG_XX_MALLOC
110151 +typedef void (*t_ffn)(void *);
110152 +typedef struct {
110153 +    t_ffn       f_free;
110154 +    void        *mem;
110155 +    char        *fname;
110156 +    int         fline;
110157 +    uint32_t    size;
110158 +    t_List      node;
110159 +} t_MemDebug;
110160 +#define MEMDBG_OBJECT(p_List) LIST_OBJECT(p_List, t_MemDebug, node)
110161 +
110162 +LIST(memDbgLst);
110163 +
110164 +
110165 +void * XX_MallocDebug(uint32_t size, char *fname, int line)
110166 +{
110167 +    void       *mem;
110168 +    t_MemDebug *p_MemDbg;
110169 +
110170 +    p_MemDbg = (t_MemDebug *)xx_Malloc(sizeof(t_MemDebug));
110171 +    if (p_MemDbg == NULL)
110172 +        return NULL;
110173 +
110174 +    mem = xx_Malloc(size);
110175 +    if (mem == NULL)
110176 +    {
110177 +        XX_Free(p_MemDbg);
110178 +        return NULL;
110179 +    }
110180 +
110181 +    INIT_LIST(&p_MemDbg->node);
110182 +    p_MemDbg->f_free = xx_Free;
110183 +    p_MemDbg->mem    = mem;
110184 +    p_MemDbg->fname  = fname;
110185 +    p_MemDbg->fline  = line;
110186 +    p_MemDbg->size   = size+sizeof(t_MemDebug);
110187 +    LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
110188 +
110189 +    return mem;
110190 +}
110191 +
110192 +void * XX_MallocSmartDebug(uint32_t size,
110193 +                           int      memPartitionId,
110194 +                           uint32_t align,
110195 +                           char     *fname,
110196 +                           int      line)
110197 +{
110198 +    void       *mem;
110199 +    t_MemDebug *p_MemDbg;
110200 +
110201 +    p_MemDbg = (t_MemDebug *)XX_Malloc(sizeof(t_MemDebug));
110202 +    if (p_MemDbg == NULL)
110203 +        return NULL;
110204 +
110205 +    mem = xx_MallocSmart((uint32_t)size, memPartitionId, align);
110206 +    if (mem == NULL)
110207 +    {
110208 +        XX_Free(p_MemDbg);
110209 +        return NULL;
110210 +    }
110211 +
110212 +    INIT_LIST(&p_MemDbg->node);
110213 +    p_MemDbg->f_free = xx_FreeSmart;
110214 +    p_MemDbg->mem    = mem;
110215 +    p_MemDbg->fname  = fname;
110216 +    p_MemDbg->fline  = line;
110217 +    p_MemDbg->size   = size+sizeof(t_MemDebug);
110218 +    LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
110219 +
110220 +    return mem;
110221 +}
110222 +
110223 +static void debug_free(void *mem)
110224 +{
110225 +    t_List      *p_MemDbgLh = NULL;
110226 +    t_MemDebug  *p_MemDbg;
110227 +    bool        found = FALSE;
110228 +
110229 +    if (LIST_IsEmpty(&memDbgLst))
110230 +    {
110231 +        REPORT_ERROR(MAJOR, E_ALREADY_FREE, ("Unbalanced free (0x%08x)", mem));
110232 +        return;
110233 +    }
110234 +
110235 +    LIST_FOR_EACH(p_MemDbgLh, &memDbgLst)
110236 +    {
110237 +        p_MemDbg = MEMDBG_OBJECT(p_MemDbgLh);
110238 +        if (p_MemDbg->mem == mem)
110239 +        {
110240 +            found = TRUE;
110241 +            break;
110242 +        }
110243 +    }
110244 +
110245 +    if (!found)
110246 +    {
110247 +        REPORT_ERROR(MAJOR, E_NOT_FOUND,
110248 +                     ("Attempt to free unallocated address (0x%08x)",mem));
110249 +        dump_stack();
110250 +        return;
110251 +    }
110252 +
110253 +    LIST_Del(p_MemDbgLh);
110254 +    p_MemDbg->f_free(mem);
110255 +    p_MemDbg->f_free(p_MemDbg);
110256 +}
110257 +
110258 +void XX_FreeSmart(void *p)
110259 +{
110260 +    debug_free(p);
110261 +}
110262 +
110263 +
110264 +void XX_Free(void *p)
110265 +{
110266 +    debug_free(p);
110267 +}
110268 +
110269 +#else /* not DEBUG_XX_MALLOC */
110270 +void * XX_Malloc(uint32_t size)
110271 +{
110272 +    return xx_Malloc(size);
110273 +}
110274 +
110275 +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
110276 +{
110277 +    return xx_MallocSmart(size,memPartitionId, alignment);
110278 +}
110279 +
110280 +void XX_FreeSmart(void *p)
110281 +{
110282 +    xx_FreeSmart(p);
110283 +}
110284 +
110285 +
110286 +void XX_Free(void *p)
110287 +{
110288 +    xx_Free(p);
110289 +}
110290 +#endif /* not DEBUG_XX_MALLOC */
110291 +
110292 +
110293 +#if (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0))
110294 +void XX_EventById(uint32_t event, t_Handle appId, uint16_t flags, char *msg)
110295 +{
110296 +    e_Event eventCode = (e_Event)event;
110297 +
110298 +    UNUSED(eventCode);
110299 +    UNUSED(appId);
110300 +    UNUSED(flags);
110301 +    UNUSED(msg);
110302 +}
110303 +#endif /* (defined(REPORT_EVENTS) && ... */
110304 +
110305 +
110306 +uint32_t XX_DisableAllIntr(void)
110307 +{
110308 +    unsigned long flags;
110309 +
110310 +#ifdef local_irq_save_nort
110311 +    local_irq_save_nort(flags);
110312 +#else
110313 +    local_irq_save(flags);
110314 +#endif
110315 +
110316 +    return (uint32_t)flags;
110317 +}
110318 +
110319 +void XX_RestoreAllIntr(uint32_t flags)
110320 +{
110321 +#ifdef local_irq_restore_nort
110322 +    local_irq_restore_nort((unsigned long)flags);
110323 +#else
110324 +    local_irq_restore((unsigned long)flags);
110325 +#endif
110326 +}
110327 +
110328 +t_Error XX_Call( uint32_t qid, t_Error (* f)(t_Handle), t_Handle id, t_Handle appId, uint16_t flags )
110329 +{
110330 +    UNUSED(qid);
110331 +    UNUSED(appId);
110332 +    UNUSED(flags);
110333 +
110334 +    return f(id);
110335 +}
110336 +
110337 +int XX_IsICacheEnable(void)
110338 +{
110339 +    return TRUE;
110340 +}
110341 +
110342 +int XX_IsDCacheEnable(void)
110343 +{
110344 +    return TRUE;
110345 +}
110346 +
110347 +
110348 +typedef struct {
110349 +    t_Isr       *f_Isr;
110350 +    t_Handle    handle;
110351 +} t_InterruptHandler;
110352 +
110353 +
110354 +t_Handle interruptHandlers[0x00010000];
110355 +
110356 +#ifdef CONFIG_FMAN_ARM
110357 +static irqreturn_t LinuxInterruptHandler (int irq, void *dev_id)
110358 +{
110359 +    t_InterruptHandler *p_IntrHndl = (t_InterruptHandler *)dev_id;
110360 +    p_IntrHndl->f_Isr(p_IntrHndl->handle);
110361 +    return IRQ_HANDLED;
110362 +}
110363 +#endif
110364 +
110365 +t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle)
110366 +{
110367 +#ifdef CONFIG_FMAN_ARM
110368 +    const char *device;
110369 +    t_InterruptHandler *p_IntrHndl;
110370 +
110371 +    device = GetDeviceName(irq);
110372 +    if (device == NULL)
110373 +        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Interrupt source - %d", irq));
110374 +
110375 +    p_IntrHndl = (t_InterruptHandler *)XX_Malloc(sizeof(t_InterruptHandler));
110376 +    if (p_IntrHndl == NULL)
110377 +        RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
110378 +    p_IntrHndl->f_Isr = f_Isr;
110379 +    p_IntrHndl->handle = handle;
110380 +    interruptHandlers[irq] = p_IntrHndl;
110381 +
110382 +    if (request_irq(GetDeviceIrqNum(irq), LinuxInterruptHandler, 0, device, p_IntrHndl) < 0)
110383 +        RETURN_ERROR(MAJOR, E_BUSY, ("Can't get IRQ %s\n", device));
110384 +    disable_irq(GetDeviceIrqNum(irq));
110385 +#endif
110386 +    return E_OK;
110387 +}
110388 +
110389 +t_Error XX_FreeIntr(int irq)
110390 +{
110391 +    t_InterruptHandler *p_IntrHndl = interruptHandlers[irq];
110392 +    free_irq(GetDeviceIrqNum(irq), p_IntrHndl);
110393 +    XX_Free(p_IntrHndl);
110394 +    interruptHandlers[irq] = 0;
110395 +    return E_OK;
110396 +}
110397 +
110398 +t_Error XX_EnableIntr(int irq)
110399 +{
110400 +    enable_irq(GetDeviceIrqNum(irq));
110401 +    return E_OK;
110402 +}
110403 +
110404 +t_Error XX_DisableIntr(int irq)
110405 +{
110406 +    disable_irq(GetDeviceIrqNum(irq));
110407 +    return E_OK;
110408 +}
110409 +
110410 +
110411 +/*****************************************************************************/
110412 +/*                       Tasklet Service Routines                            */
110413 +/*****************************************************************************/
110414 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
110415 +typedef struct
110416 +{
110417 +    t_Handle            h_Data;
110418 +    void                (*f_Callback) (void *);
110419 +    struct delayed_work dwork;
110420 +} t_Tasklet;
110421 +
110422 +static void GenericTaskletCallback(struct work_struct *p_Work)
110423 +{
110424 +    t_Tasklet *p_Task = container_of(p_Work, t_Tasklet, dwork.work);
110425 +
110426 +    p_Task->f_Callback(p_Task->h_Data);
110427 +}
110428 +#endif    /* LINUX_VERSION_CODE */
110429 +
110430 +
110431 +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data)
110432 +{
110433 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
110434 +    struct work_struct *p_Task;
110435 +    p_Task = (struct work_struct *)XX_Malloc(sizeof(struct work_struct));
110436 +    INIT_WORK(p_Task, routine, data);
110437 +#else
110438 +    t_Tasklet *p_Task = (t_Tasklet *)XX_Malloc(sizeof(t_Tasklet));
110439 +    p_Task->h_Data = data;
110440 +    p_Task->f_Callback = routine;
110441 +    INIT_DELAYED_WORK(&p_Task->dwork, GenericTaskletCallback);
110442 +#endif    /* LINUX_VERSION_CODE */
110443 +
110444 +    return (t_TaskletHandle)p_Task;
110445 +}
110446 +
110447 +
110448 +void XX_FreeTasklet (t_TaskletHandle h_Tasklet)
110449 +{
110450 +    if (h_Tasklet)
110451 +        XX_Free(h_Tasklet);
110452 +}
110453 +
110454 +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate)
110455 +{
110456 +    int ans;
110457 +
110458 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
110459 +    if (immediate)
110460 +        ans = schedule_work(h_Tasklet);
110461 +    else
110462 +        ans = schedule_delayed_work(h_Tasklet, 1);
110463 +#else
110464 +    if (immediate)
110465 +        ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, 0);
110466 +    else
110467 +        ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, HZ);
110468 +#endif /* LINUX_VERSION_CODE */
110469 +
110470 +    return ans;
110471 +}
110472 +
110473 +void XX_FlushScheduledTasks(void)
110474 +{
110475 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
110476 +    flush_scheduled_tasks();
110477 +#else
110478 +    flush_scheduled_work();
110479 +#endif    /* LINUX_VERSION_CODE */
110480 +}
110481 +
110482 +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet)
110483 +{
110484 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
110485 +    return (int)(((struct work_struct *)h_Tasklet)->pending);
110486 +#else
110487 +    return (int)delayed_work_pending(&((t_Tasklet *)h_Tasklet)->dwork);
110488 +#endif    /* LINUX_VERSION_CODE */
110489 +}
110490 +
110491 +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data)
110492 +{
110493 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
110494 +    ((struct tq_struct *)h_Tasklet)->data = data;
110495 +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
110496 +    ((struct work_struct *)h_Tasklet)->data = data;
110497 +#else
110498 +    ((t_Tasklet *)h_Tasklet)->h_Data = data;
110499 +#endif    /* LINUX_VERSION_CODE */
110500 +}
110501 +
110502 +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet)
110503 +{
110504 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
110505 +    return (t_Handle)(((struct work_struct *)h_Tasklet)->data);
110506 +#else
110507 +    return ((t_Tasklet *)h_Tasklet)->h_Data;
110508 +#endif    /* LINUX_VERSION_CODE */
110509 +}
110510 +
110511 +
110512 +/*****************************************************************************/
110513 +/*                         Spinlock Service Routines                         */
110514 +/*****************************************************************************/
110515 +
110516 +t_Handle XX_InitSpinlock(void)
110517 +{
110518 +    spinlock_t *p_Spinlock = (spinlock_t *)XX_Malloc(sizeof(spinlock_t));
110519 +    if (!p_Spinlock)
110520 +        return NULL;
110521 +
110522 +    spin_lock_init(p_Spinlock);
110523 +
110524 +    return (t_Handle)p_Spinlock;
110525 +}
110526 +
110527 +void XX_FreeSpinlock(t_Handle h_Spinlock)
110528 +{
110529 +    if (h_Spinlock)
110530 +        XX_Free(h_Spinlock);
110531 +}
110532 +
110533 +void XX_LockSpinlock(t_Handle h_Spinlock)
110534 +{
110535 +    spin_lock((spinlock_t *)h_Spinlock);
110536 +}
110537 +
110538 +void XX_UnlockSpinlock(t_Handle h_Spinlock)
110539 +{
110540 +    spin_unlock((spinlock_t *)h_Spinlock);
110541 +}
110542 +
110543 +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock)
110544 +{
110545 +    unsigned long intrFlags;
110546 +    spin_lock_irqsave((spinlock_t *)h_Spinlock, intrFlags);
110547 +    return intrFlags;
110548 +}
110549 +
110550 +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags)
110551 +{
110552 +     spin_unlock_irqrestore((spinlock_t *)h_Spinlock, (unsigned long)intrFlags);
110553 +}
110554 +
110555 +
110556 +/*****************************************************************************/
110557 +/*                        Timers Service Routines                            */
110558 +/*****************************************************************************/
110559 +/* The time now is in mili sec. resolution */
110560 +uint32_t XX_CurrentTime(void)
110561 +{
110562 +    return (jiffies*1000)/HZ;
110563 +}
110564 +
110565 +
110566 +t_Handle XX_CreateTimer(void)
110567 +{
110568 +    struct timer_list *p_Timer = (struct timer_list *)XX_Malloc(sizeof(struct timer_list));
110569 +    if (p_Timer)
110570 +    {
110571 +        memset(p_Timer, 0, sizeof(struct timer_list));
110572 +        init_timer(p_Timer);
110573 +    }
110574 +    return (t_Handle)p_Timer;
110575 +}
110576 +
110577 +void XX_FreeTimer(t_Handle h_Timer)
110578 +{
110579 +    if (h_Timer)
110580 +        XX_Free(h_Timer);
110581 +}
110582 +
110583 +void XX_StartTimer(t_Handle h_Timer,
110584 +                   uint32_t msecs,
110585 +                   bool     periodic,
110586 +                   void     (*f_TimerExpired)(t_Handle),
110587 +                   t_Handle h_Arg)
110588 +{
110589 +    int                 tmp_jiffies = (msecs*HZ)/1000;
110590 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
110591 +
110592 +    SANITY_CHECK_RETURN((periodic == FALSE), E_NOT_SUPPORTED);
110593 +
110594 +    p_Timer->function = (void (*)(unsigned long))f_TimerExpired;
110595 +    p_Timer->data = (unsigned long)h_Arg;
110596 +    if ((msecs*HZ)%1000)
110597 +        tmp_jiffies++;
110598 +    p_Timer->expires = (jiffies + tmp_jiffies);
110599 +
110600 +    add_timer((struct timer_list *)h_Timer);
110601 +}
110602 +
110603 +void XX_SetTimerData(t_Handle h_Timer, t_Handle data)
110604 +{
110605 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
110606 +
110607 +    p_Timer->data = (unsigned long)data;
110608 +}
110609 +
110610 +t_Handle XX_GetTimerData(t_Handle h_Timer)
110611 +{
110612 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
110613 +
110614 +    return (t_Handle)p_Timer->data;
110615 +}
110616 +
110617 +uint32_t   XX_GetExpirationTime(t_Handle h_Timer)
110618 +{
110619 +    struct timer_list   *p_Timer = (struct timer_list *)h_Timer;
110620 +
110621 +    return (uint32_t)p_Timer->expires;
110622 +}
110623 +
110624 +void XX_StopTimer(t_Handle h_Timer)
110625 +{
110626 +    del_timer((struct timer_list *)h_Timer);
110627 +}
110628 +
110629 +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs)
110630 +{
110631 +    int tmp_jiffies = (msecs*HZ)/1000;
110632 +
110633 +    if ((msecs*HZ)%1000)
110634 +        tmp_jiffies++;
110635 +    mod_timer((struct timer_list *)h_Timer, jiffies + tmp_jiffies);
110636 +}
110637 +
110638 +int XX_TimerIsActive(t_Handle h_Timer)
110639 +{
110640 +  return timer_pending((struct timer_list *)h_Timer);
110641 +}
110642 +
110643 +uint32_t XX_Sleep(uint32_t msecs)
110644 +{
110645 +    int tmp_jiffies = (msecs*HZ)/1000;
110646 +
110647 +    if ((msecs*HZ)%1000)
110648 +        tmp_jiffies++;
110649 +    return schedule_timeout(tmp_jiffies);
110650 +}
110651 +
110652 +/*BEWARE!!!!! UDelay routine is BUSY WAITTING!!!!!*/
110653 +void XX_UDelay(uint32_t usecs)
110654 +{
110655 +    udelay(usecs);
110656 +}
110657 +
110658 +/* TODO: verify that these are correct */
110659 +#define MSG_BODY_SIZE       512
110660 +typedef t_Error (t_MsgHandler) (t_Handle h_Mod, uint32_t msgId, uint8_t msgBody[MSG_BODY_SIZE]);
110661 +typedef void (t_MsgCompletionCB) (t_Handle h_Arg, uint8_t msgBody[MSG_BODY_SIZE]);
110662 +t_Error XX_SendMessage(char                 *p_DestAddr,
110663 +                       uint32_t             msgId,
110664 +                       uint8_t              msgBody[MSG_BODY_SIZE],
110665 +                       t_MsgCompletionCB    *f_CompletionCB,
110666 +                       t_Handle             h_CBArg);
110667 +
110668 +typedef struct {
110669 +    char            *p_Addr;
110670 +    t_MsgHandler    *f_MsgHandlerCB;
110671 +    t_Handle        h_Mod;
110672 +    t_List          node;
110673 +} t_MsgHndlr;
110674 +#define MSG_HNDLR_OBJECT(ptr)  LIST_OBJECT(ptr, t_MsgHndlr, node)
110675 +
110676 +LIST(msgHndlrList);
110677 +
110678 +static void EnqueueMsgHndlr(t_MsgHndlr *p_MsgHndlr)
110679 +{
110680 +    uint32_t   intFlags;
110681 +
110682 +    intFlags = XX_DisableAllIntr();
110683 +    LIST_AddToTail(&p_MsgHndlr->node, &msgHndlrList);
110684 +    XX_RestoreAllIntr(intFlags);
110685 +}
110686 +/* TODO: add this for multi-platform support
110687 +static t_MsgHndlr * DequeueMsgHndlr(void)
110688 +{
110689 +    t_MsgHndlr *p_MsgHndlr = NULL;
110690 +    uint32_t   intFlags;
110691 +
110692 +    intFlags = XX_DisableAllIntr();
110693 +    if (!LIST_IsEmpty(&msgHndlrList))
110694 +    {
110695 +        p_MsgHndlr = MSG_HNDLR_OBJECT(msgHndlrList.p_Next);
110696 +        LIST_DelAndInit(&p_MsgHndlr->node);
110697 +    }
110698 +    XX_RestoreAllIntr(intFlags);
110699 +
110700 +    return p_MsgHndlr;
110701 +}
110702 +*/
110703 +static t_MsgHndlr * FindMsgHndlr(char *p_Addr)
110704 +{
110705 +    t_MsgHndlr  *p_MsgHndlr;
110706 +    t_List      *p_Pos;
110707 +
110708 +    LIST_FOR_EACH(p_Pos, &msgHndlrList)
110709 +    {
110710 +        p_MsgHndlr = MSG_HNDLR_OBJECT(p_Pos);
110711 +        if (strstr(p_MsgHndlr->p_Addr, p_Addr))
110712 +            return p_MsgHndlr;
110713 +    }
110714 +
110715 +    return NULL;
110716 +}
110717 +
110718 +t_Error XX_RegisterMessageHandler   (char *p_Addr, t_MsgHandler *f_MsgHandlerCB, t_Handle h_Mod)
110719 +{
110720 +    t_MsgHndlr  *p_MsgHndlr;
110721 +    uint32_t    len;
110722 +
110723 +    p_MsgHndlr = (t_MsgHndlr*)XX_Malloc(sizeof(t_MsgHndlr));
110724 +    if (!p_MsgHndlr)
110725 +        RETURN_ERROR(MINOR, E_NO_MEMORY, ("message handler object!!!"));
110726 +    memset(p_MsgHndlr, 0, sizeof(t_MsgHndlr));
110727 +
110728 +    len = strlen(p_Addr);
110729 +    p_MsgHndlr->p_Addr = (char*)XX_Malloc(len+1);
110730 +    strncpy(p_MsgHndlr->p_Addr,p_Addr, (uint32_t)(len+1));
110731 +
110732 +    p_MsgHndlr->f_MsgHandlerCB = f_MsgHandlerCB;
110733 +    p_MsgHndlr->h_Mod = h_Mod;
110734 +    INIT_LIST(&p_MsgHndlr->node);
110735 +    EnqueueMsgHndlr(p_MsgHndlr);
110736 +
110737 +    return E_OK;
110738 +}
110739 +
110740 +t_Error XX_UnregisterMessageHandler (char *p_Addr)
110741 +{
110742 +    t_MsgHndlr *p_MsgHndlr = FindMsgHndlr(p_Addr);
110743 +    if (!p_MsgHndlr)
110744 +        RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
110745 +
110746 +    LIST_Del(&p_MsgHndlr->node);
110747 +    XX_Free(p_MsgHndlr->p_Addr);
110748 +    XX_Free(p_MsgHndlr);
110749 +
110750 +    return E_OK;
110751 +}
110752 +
110753 +t_Error XX_SendMessage(char                 *p_DestAddr,
110754 +                       uint32_t             msgId,
110755 +                       uint8_t              msgBody[MSG_BODY_SIZE],
110756 +                       t_MsgCompletionCB    *f_CompletionCB,
110757 +                       t_Handle             h_CBArg)
110758 +{
110759 +    t_Error     ans;
110760 +    t_MsgHndlr  *p_MsgHndlr = FindMsgHndlr(p_DestAddr);
110761 +    if (!p_MsgHndlr)
110762 +        RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
110763 +
110764 +    ans = p_MsgHndlr->f_MsgHandlerCB(p_MsgHndlr->h_Mod, msgId, msgBody);
110765 +
110766 +    if (f_CompletionCB)
110767 +        f_CompletionCB(h_CBArg, msgBody);
110768 +
110769 +    return ans;
110770 +}
110771 +
110772 +t_Error XX_IpcRegisterMsgHandler(char                   addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
110773 +                                 t_IpcMsgHandler        *f_MsgHandler,
110774 +                                 t_Handle               h_Module,
110775 +                                 uint32_t               replyLength)
110776 +{
110777 +    UNUSED(addr);UNUSED(f_MsgHandler);UNUSED(h_Module);UNUSED(replyLength);
110778 +    return E_OK;
110779 +}
110780 +
110781 +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH])
110782 +{
110783 +    UNUSED(addr);
110784 +    return E_OK;
110785 +}
110786 +
110787 +
110788 +t_Error XX_IpcSendMessage(t_Handle           h_Session,
110789 +                          uint8_t            *p_Msg,
110790 +                          uint32_t           msgLength,
110791 +                          uint8_t            *p_Reply,
110792 +                          uint32_t           *p_ReplyLength,
110793 +                          t_IpcMsgCompletion *f_Completion,
110794 +                          t_Handle           h_Arg)
110795 +{
110796 +    UNUSED(h_Session); UNUSED(p_Msg); UNUSED(msgLength); UNUSED(p_Reply);
110797 +    UNUSED(p_ReplyLength); UNUSED(f_Completion); UNUSED(h_Arg);
110798 +    return E_OK;
110799 +}
110800 +
110801 +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
110802 +                           char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH])
110803 +{
110804 +    UNUSED(destAddr); UNUSED(srcAddr);
110805 +    return E_OK;
110806 +}
110807 +
110808 +/*Forced to introduce due to PRINT_FMT_PARAMS define*/
110809 +uint32_t E500_GetId(void)
110810 +{
110811 +    return raw_smp_processor_id();
110812 +}
110813 +
110814 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
110815 +int GetDeviceIrqNum(int irq)
110816 +{
110817 +    struct device_node  *iPar;
110818 +    struct irq_domain   *irqHost;
110819 +    uint32_t            hwIrq;
110820 +
110821 +    /* Get the interrupt controller */
110822 +    iPar = of_find_node_by_name(NULL, "mpic");
110823 +    hwIrq = 0;
110824 +
110825 +    ASSERT_COND(iPar != NULL);
110826 +    /* Get the irq host */
110827 +    irqHost = irq_find_host(iPar);
110828 +    of_node_put(iPar);
110829 +
110830 +    /* Create irq mapping */
110831 +    return irq_create_mapping(irqHost, hwIrq);
110832 +}
110833 +#else
110834 +#error "kernel not supported!!!"
110835 +#endif    /* LINUX_VERSION_CODE */
110836 +
110837 +void * XX_PhysToVirt(physAddress_t addr)
110838 +{
110839 +    return UINT_TO_PTR(SYS_PhysToVirt((uint64_t)addr));
110840 +}
110841 +
110842 +physAddress_t XX_VirtToPhys(void * addr)
110843 +{
110844 +    return (physAddress_t)SYS_VirtToPhys(PTR_TO_UINT(addr));
110845 +}
110846 +
110847 +void * xx_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
110848 +{
110849 +    uintptr_t   *returnCode, tmp;
110850 +
110851 +    if (alignment < sizeof(uintptr_t))
110852 +        alignment = sizeof(uintptr_t);
110853 +    size += alignment + sizeof(returnCode);
110854 +    tmp = (uintptr_t)xx_Malloc(size);
110855 +    if (tmp == 0)
110856 +        return NULL;
110857 +    returnCode = (uintptr_t*)((tmp + alignment + sizeof(returnCode)) & ~((uintptr_t)alignment - 1));
110858 +    *(returnCode - 1) = tmp;
110859 +
110860 +    return (void*)returnCode;
110861 +}
110862 +
110863 +void xx_FreeSmart(void *p)
110864 +{
110865 +    xx_Free((void*)(*((uintptr_t *)(p) - 1)));
110866 +}
110867 --- /dev/null
110868 +++ b/include/linux/fsl/svr.h
110869 @@ -0,0 +1,97 @@
110870 +/*
110871 + * MPC85xx cpu type detection
110872 + *
110873 + * Copyright 2011-2012 Freescale Semiconductor, Inc.
110874 + *
110875 + * This is free software; you can redistribute it and/or modify
110876 + * it under the terms of the GNU General Public License as published by
110877 + * the Free Software Foundation; either version 2 of the License, or
110878 + * (at your option) any later version.
110879 + */
110880 +
110881 +#ifndef FSL_SVR_H
110882 +#define FSL_SVR_H
110883 +
110884 +#define SVR_REV(svr)   ((svr) & 0xFF)          /* SOC design resision */
110885 +#define SVR_MAJ(svr)   (((svr) >>  4) & 0xF)   /* Major revision field*/
110886 +#define SVR_MIN(svr)   (((svr) >>  0) & 0xF)   /* Minor revision field*/
110887 +
110888 +/* Some parts define SVR[0:23] as the SOC version */
110889 +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF)     /* SOC Version fields */
110890 +
110891 +#define SVR_8533       0x803400
110892 +#define SVR_8535       0x803701
110893 +#define SVR_8536       0x803700
110894 +#define SVR_8540       0x803000
110895 +#define SVR_8541       0x807200
110896 +#define SVR_8543       0x803200
110897 +#define SVR_8544       0x803401
110898 +#define SVR_8545       0x803102
110899 +#define SVR_8547       0x803101
110900 +#define SVR_8548       0x803100
110901 +#define SVR_8555       0x807100
110902 +#define SVR_8560       0x807000
110903 +#define SVR_8567       0x807501
110904 +#define SVR_8568       0x807500
110905 +#define SVR_8569       0x808000
110906 +#define SVR_8572       0x80E000
110907 +#define SVR_P1010      0x80F100
110908 +#define SVR_P1011      0x80E500
110909 +#define SVR_P1012      0x80E501
110910 +#define SVR_P1013      0x80E700
110911 +#define SVR_P1014      0x80F101
110912 +#define SVR_P1017      0x80F700
110913 +#define SVR_P1020      0x80E400
110914 +#define SVR_P1021      0x80E401
110915 +#define SVR_P1022      0x80E600
110916 +#define SVR_P1023      0x80F600
110917 +#define SVR_P1024      0x80E402
110918 +#define SVR_P1025      0x80E403
110919 +#define SVR_P2010      0x80E300
110920 +#define SVR_P2020      0x80E200
110921 +#define SVR_P2040      0x821000
110922 +#define SVR_P2041      0x821001
110923 +#define SVR_P3041      0x821103
110924 +#define SVR_P4040      0x820100
110925 +#define SVR_P4080      0x820000
110926 +#define SVR_P5010      0x822100
110927 +#define SVR_P5020      0x822000
110928 +#define SVR_P5021      0X820500
110929 +#define SVR_P5040      0x820400
110930 +#define SVR_T4240      0x824000
110931 +#define SVR_T4120      0x824001
110932 +#define SVR_T4160      0x824100
110933 +#define SVR_T4080      0x824102
110934 +#define SVR_C291       0x850000
110935 +#define SVR_C292       0x850020
110936 +#define SVR_C293       0x850030
110937 +#define SVR_B4860      0X868000
110938 +#define SVR_G4860      0x868001
110939 +#define SVR_G4060      0x868003
110940 +#define SVR_B4440      0x868100
110941 +#define SVR_G4440      0x868101
110942 +#define SVR_B4420      0x868102
110943 +#define SVR_B4220      0x868103
110944 +#define SVR_T1040      0x852000
110945 +#define SVR_T1041      0x852001
110946 +#define SVR_T1042      0x852002
110947 +#define SVR_T1020      0x852100
110948 +#define SVR_T1021      0x852101
110949 +#define SVR_T1022      0x852102
110950 +#define SVR_T1023      0x854100
110951 +#define SVR_T1024      0x854000
110952 +#define SVR_T2080      0x853000
110953 +#define SVR_T2081      0x853100
110954 +
110955 +#define SVR_8610       0x80A000
110956 +#define SVR_8641       0x809000
110957 +#define SVR_8641D      0x809001
110958 +
110959 +#define SVR_9130       0x860001
110960 +#define SVR_9131       0x860000
110961 +#define SVR_9132       0x861000
110962 +#define SVR_9232       0x861400
110963 +
110964 +#define SVR_Unknown    0xFFFFFF
110965 +
110966 +#endif
110967 --- /dev/null
110968 +++ b/include/uapi/linux/fmd/Kbuild
110969 @@ -0,0 +1,5 @@
110970 +header-y += integrations/
110971 +header-y += Peripherals/
110972 +
110973 +header-y += ioctls.h
110974 +header-y += net_ioctls.h
110975 --- /dev/null
110976 +++ b/include/uapi/linux/fmd/Peripherals/Kbuild
110977 @@ -0,0 +1,4 @@
110978 +header-y += fm_ioctls.h
110979 +header-y += fm_port_ioctls.h
110980 +header-y += fm_pcd_ioctls.h
110981 +header-y += fm_test_ioctls.h
110982 --- /dev/null
110983 +++ b/include/uapi/linux/fmd/Peripherals/fm_ioctls.h
110984 @@ -0,0 +1,628 @@
110985 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
110986 + * All rights reserved.
110987 + *
110988 + * Redistribution and use in source and binary forms, with or without
110989 + * modification, are permitted provided that the following conditions are met:
110990 + *     * Redistributions of source code must retain the above copyright
110991 + *       notice, this list of conditions and the following disclaimer.
110992 + *     * Redistributions in binary form must reproduce the above copyright
110993 + *       notice, this list of conditions and the following disclaimer in the
110994 + *       documentation and/or other materials provided with the distribution.
110995 + *     * Neither the name of Freescale Semiconductor nor the
110996 + *       names of its contributors may be used to endorse or promote products
110997 + *       derived from this software without specific prior written permission.
110998 + *
110999 + *
111000 + * ALTERNATIVELY, this software may be distributed under the terms of the
111001 + * GNU General Public License ("GPL") as published by the Free Software
111002 + * Foundation, either version 2 of that License or (at your option) any
111003 + * later version.
111004 + *
111005 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
111006 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
111007 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
111008 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
111009 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
111010 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
111011 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
111012 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
111013 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
111014 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
111015 + */
111016 +
111017 +/**************************************************************************//**
111018 + @File          fm_ioctls.h
111019 +
111020 + @Description   FM Char device ioctls
111021 +*//***************************************************************************/
111022 +#ifndef __FM_IOCTLS_H
111023 +#define __FM_IOCTLS_H
111024 +
111025 +
111026 +/**************************************************************************//**
111027 + @Group         lnx_ioctl_FM_grp Frame Manager Linux IOCTL API
111028 +
111029 + @Description   FM Linux ioctls definitions and enums
111030 +
111031 + @{
111032 +*//***************************************************************************/
111033 +
111034 +/**************************************************************************//**
111035 + @Collection    FM IOCTL device ('/dev') definitions
111036 +*//***************************************************************************/
111037 +#define DEV_FM_NAME                 "fm" /**< Name of the FM chardev */
111038 +
111039 +#define DEV_FM_MINOR_BASE           0
111040 +#define DEV_FM_PCD_MINOR_BASE       (DEV_FM_MINOR_BASE + 1)                                 /*/dev/fmx-pcd */
111041 +#define DEV_FM_OH_PORTS_MINOR_BASE  (DEV_FM_PCD_MINOR_BASE + 1)                             /*/dev/fmx-port-ohy */
111042 +#define DEV_FM_RX_PORTS_MINOR_BASE  (DEV_FM_OH_PORTS_MINOR_BASE + FM_MAX_NUM_OF_OH_PORTS)   /*/dev/fmx-port-rxy */
111043 +#define DEV_FM_TX_PORTS_MINOR_BASE  (DEV_FM_RX_PORTS_MINOR_BASE + FM_MAX_NUM_OF_RX_PORTS)   /*/dev/fmx-port-txy */
111044 +#define DEV_FM_MAX_MINORS           (DEV_FM_TX_PORTS_MINOR_BASE + FM_MAX_NUM_OF_TX_PORTS)
111045 +
111046 +#define FM_IOC_NUM(n)       (n)
111047 +#define FM_PCD_IOC_NUM(n)   (n+20)
111048 +#define FM_PORT_IOC_NUM(n)  (n+70)
111049 +/* @} */
111050 +
111051 +#define IOC_FM_MAX_NUM_OF_PORTS         64
111052 +
111053 +
111054 +/**************************************************************************//**
111055 + @Description   Enum for defining port types
111056 +                (must match enum e_FmPortType defined in fm_ext.h)
111057 +*//***************************************************************************/
111058 +typedef enum ioc_fm_port_type {
111059 +    e_IOC_FM_PORT_TYPE_OH_OFFLINE_PARSING = 0,  /**< Offline parsing port */
111060 +    e_IOC_FM_PORT_TYPE_RX,                      /**< 1G Rx port */
111061 +    e_IOC_FM_PORT_TYPE_RX_10G,                  /**< 10G Rx port */
111062 +    e_IOC_FM_PORT_TYPE_TX,                      /**< 1G Tx port */
111063 +    e_IOC_FM_PORT_TYPE_TX_10G,                  /**< 10G Tx port */
111064 +    e_IOC_FM_PORT_TYPE_DUMMY
111065 +} ioc_fm_port_type;
111066 +
111067 +
111068 +/**************************************************************************//**
111069 + @Group         lnx_ioctl_FM_lib_grp FM library
111070 +
111071 + @Description   FM API functions, definitions and enums
111072 +                The FM module is the main driver module and is a mandatory module
111073 +                for FM driver users. Before any further module initialization,
111074 +                this module must be initialized.
111075 +                The FM is a "single-tone" module. It is responsible of the common
111076 +                HW modules: FPM, DMA, common QMI, common BMI initializations and
111077 +                run-time control routines. This module must be initialized always
111078 +                when working with any of the FM modules.
111079 +                NOTE - We assumes that the FML will be initialize only by core No. 0!
111080 +
111081 + @{
111082 +*//***************************************************************************/
111083 +
111084 +/**************************************************************************//**
111085 + @Description   FM Exceptions
111086 +*//***************************************************************************/
111087 +typedef enum ioc_fm_exceptions {
111088 +    e_IOC_FM_EX_DMA_BUS_ERROR,              /**< DMA bus error. */
111089 +    e_IOC_EX_DMA_READ_ECC,               /**< Read Buffer ECC error (Valid for FM rev < 6)*/
111090 +    e_IOC_EX_DMA_SYSTEM_WRITE_ECC,       /**< Write Buffer ECC error on system side (Valid for FM rev < 6)*/
111091 +    e_IOC_EX_DMA_FM_WRITE_ECC,           /**< Write Buffer ECC error on FM side (Valid for FM rev < 6)*/
111092 +    e_IOC_EX_DMA_SINGLE_PORT_ECC,        /**< Single Port ECC error on FM side (Valid for FM rev > 6)*/
111093 +    e_IOC_EX_FPM_STALL_ON_TASKS,         /**< Stall of tasks on FPM */
111094 +    e_IOC_EX_FPM_SINGLE_ECC,             /**< Single ECC on FPM. */
111095 +    e_IOC_EX_FPM_DOUBLE_ECC,             /**< Double ECC error on FPM ram access */
111096 +    e_IOC_EX_QMI_SINGLE_ECC,             /**< Single ECC on QMI. */
111097 +    e_IOC_EX_QMI_DOUBLE_ECC,             /**< Double bit ECC occurred on QMI */
111098 +    e_IOC_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< Dequeue from unknown port id */
111099 +    e_IOC_EX_BMI_LIST_RAM_ECC,           /**< Linked List RAM ECC error */
111100 +    e_IOC_EX_BMI_STORAGE_PROFILE_ECC,    /**< Storage Profile ECC Error */
111101 +    e_IOC_EX_BMI_STATISTICS_RAM_ECC,     /**< Statistics Count RAM ECC Error Enable */
111102 +    e_IOC_EX_BMI_DISPATCH_RAM_ECC,       /**< Dispatch RAM ECC Error Enable */
111103 +    e_IOC_EX_IRAM_ECC,                   /**< Double bit ECC occurred on IRAM*/
111104 +    e_IOC_EX_MURAM_ECC                   /**< Double bit ECC occurred on MURAM*/
111105 +} ioc_fm_exceptions;
111106 +
111107 +/**************************************************************************//**
111108 + @Group         lnx_ioctl_FM_runtime_control_grp FM Runtime Control Unit
111109 +
111110 + @Description   FM Runtime control unit API functions, definitions and enums.
111111 +                The FM driver provides a set of control routines for each module.
111112 +                These routines may only be called after the module was fully
111113 +                initialized (both configuration and initialization routines were
111114 +                called). They are typically used to get information from hardware
111115 +                (status, counters/statistics, revision etc.), to modify a current
111116 +                state or to force/enable a required action. Run-time control may
111117 +                be called whenever necessary and as many times as needed.
111118 + @{
111119 +*//***************************************************************************/
111120 +
111121 +/**************************************************************************//**
111122 + @Collection   General FM defines.
111123 + *//***************************************************************************/
111124 +#define IOC_FM_MAX_NUM_OF_VALID_PORTS  (FM_MAX_NUM_OF_OH_PORTS + \
111125 +                                        FM_MAX_NUM_OF_1G_RX_PORTS +  \
111126 +                                        FM_MAX_NUM_OF_10G_RX_PORTS + \
111127 +                                        FM_MAX_NUM_OF_1G_TX_PORTS +  \
111128 +                                        FM_MAX_NUM_OF_10G_TX_PORTS)
111129 +/* @} */
111130 +
111131 +/**************************************************************************//**
111132 + @Description   Structure for Port bandwidth requirement. Port is identified
111133 +                by type and relative id.
111134 +                (must be identical to t_FmPortBandwidth defined in fm_ext.h)
111135 +*//***************************************************************************/
111136 +typedef struct ioc_fm_port_bandwidth_t {
111137 +    ioc_fm_port_type    type;           /**< FM port type */
111138 +    uint8_t             relative_port_id; /**< Type relative port id */
111139 +    uint8_t             bandwidth;      /**< bandwidth - (in term of percents) */
111140 +} ioc_fm_port_bandwidth_t;
111141 +
111142 +/**************************************************************************//**
111143 + @Description   A Structure containing an array of Port bandwidth requirements.
111144 +                The user should state the ports requiring bandwidth in terms of
111145 +                percentage - i.e. all port's bandwidths in the array must add
111146 +                up to 100.
111147 +                (must be identical to t_FmPortsBandwidthParams defined in fm_ext.h)
111148 +*//***************************************************************************/
111149 +typedef struct ioc_fm_port_bandwidth_params {
111150 +    uint8_t                     num_of_ports;
111151 +                                /**< num of ports listed in the array below */
111152 +    ioc_fm_port_bandwidth_t     ports_bandwidths[IOC_FM_MAX_NUM_OF_VALID_PORTS];
111153 +                                /**< for each port, it's bandwidth (all port's
111154 +                                  bandwidths must add up to 100.*/
111155 +} ioc_fm_port_bandwidth_params;
111156 +
111157 +/**************************************************************************//**
111158 + @Description   enum for defining FM counters
111159 +*//***************************************************************************/
111160 +typedef enum ioc_fm_counters {
111161 +    e_IOC_FM_COUNTERS_ENQ_TOTAL_FRAME,              /**< QMI total enqueued frames counter */
111162 +    e_IOC_FM_COUNTERS_DEQ_TOTAL_FRAME,              /**< QMI total dequeued frames counter */
111163 +    e_IOC_FM_COUNTERS_DEQ_0,                        /**< QMI 0 frames from QMan counter */
111164 +    e_IOC_FM_COUNTERS_DEQ_1,                        /**< QMI 1 frames from QMan counter */
111165 +    e_IOC_FM_COUNTERS_DEQ_2,                        /**< QMI 2 frames from QMan counter */
111166 +    e_IOC_FM_COUNTERS_DEQ_3,                        /**< QMI 3 frames from QMan counter */
111167 +    e_IOC_FM_COUNTERS_DEQ_FROM_DEFAULT,             /**< QMI dequeue from default queue counter */
111168 +    e_IOC_FM_COUNTERS_DEQ_FROM_CONTEXT,             /**< QMI dequeue from FQ context counter */
111169 +    e_IOC_FM_COUNTERS_DEQ_FROM_FD,                  /**< QMI dequeue from FD command field counter */
111170 +    e_IOC_FM_COUNTERS_DEQ_CONFIRM,                  /**< QMI dequeue confirm counter */
111171 +} ioc_fm_counters;
111172 +
111173 +typedef struct ioc_fm_obj_t {
111174 +    void            *obj;
111175 +} ioc_fm_obj_t;
111176 +
111177 +/**************************************************************************//**
111178 + @Description   A structure for returning revision information
111179 +                (must match struct t_FmRevisionInfo declared in fm_ext.h)
111180 +*//***************************************************************************/
111181 +typedef struct ioc_fm_revision_info_t {
111182 +    uint8_t         major;               /**< Major revision */
111183 +    uint8_t         minor;               /**< Minor revision */
111184 +} ioc_fm_revision_info_t;
111185 +
111186 +/**************************************************************************//**
111187 + @Description   A structure for FM counters
111188 +*//***************************************************************************/
111189 +typedef struct ioc_fm_counters_params_t {
111190 +    ioc_fm_counters cnt;                /**< The requested counter */
111191 +    uint32_t        val;                /**< The requested value to get/set from/into the counter */
111192 +} ioc_fm_counters_params_t;
111193 +
111194 +typedef union ioc_fm_api_version_t {
111195 +    struct {
111196 +        uint8_t major;
111197 +        uint8_t minor;
111198 +        uint8_t respin;
111199 +        uint8_t reserved;
111200 +    } version;
111201 +    uint32_t ver;
111202 +} ioc_fm_api_version_t;
111203 +
111204 +#if (DPAA_VERSION >= 11)
111205 +/**************************************************************************//**
111206 + @Description   A structure of information about each of the external
111207 +                buffer pools used by a port or storage-profile.
111208 +                (must be identical to t_FmExtPoolParams defined in fm_ext.h)
111209 +*//***************************************************************************/
111210 +typedef struct ioc_fm_ext_pool_params {
111211 +    uint8_t                 id;     /**< External buffer pool id */
111212 +    uint16_t                size;   /**< External buffer pool buffer size */
111213 +} ioc_fm_ext_pool_params;
111214 +
111215 +/**************************************************************************//**
111216 + @Description   A structure for informing the driver about the external
111217 +                buffer pools allocated in the BM and used by a port or a
111218 +                storage-profile.
111219 +                (must be identical to t_FmExtPools defined in fm_ext.h)
111220 +*//***************************************************************************/
111221 +typedef struct ioc_fm_ext_pools {
111222 +    uint8_t                 num_of_pools_used;     /**< Number of pools use by this port */
111223 +    ioc_fm_ext_pool_params  ext_buf_pool[FM_PORT_MAX_NUM_OF_EXT_POOLS];
111224 +                                                /**< Parameters for each port */
111225 +} ioc_fm_ext_pools;
111226 +
111227 +typedef struct ioc_fm_vsp_params_t {
111228 +    void                *p_fm;              /**< A handle to the FM object this VSP related to */
111229 +    ioc_fm_ext_pools    ext_buf_pools;        /**< Which external buffer pools are used
111230 +                                                 (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes.
111231 +                                                 parameter associated with Rx / OP port */
111232 +    uint16_t            liodn_offset;        /**< VSP's LIODN offset */
111233 +    struct {
111234 +        ioc_fm_port_type port_type;          /**< Port type */
111235 +        uint8_t         port_id;             /**< Port Id - relative to type */
111236 +    } port_params;
111237 +    uint8_t             relative_profile_id;  /**< VSP Id - relative to VSP's range
111238 +                                                 defined in relevant FM object */
111239 +    void                *id;                /**< return value */
111240 +} ioc_fm_vsp_params_t;
111241 +#endif /* (DPAA_VERSION >= 11) */
111242 +
111243 +/**************************************************************************//**
111244 + @Description   A structure for defining BM pool depletion criteria
111245 +*//***************************************************************************/
111246 +typedef struct ioc_fm_buf_pool_depletion_t {
111247 +    bool        pools_grp_mode_enable;              /**< select mode in which pause frames will be sent after
111248 +                                                         a number of pools (all together!) are depleted */
111249 +    uint8_t     num_of_pools;                       /**< the number of depleted pools that will invoke
111250 +                                                         pause frames transmission. */
111251 +    bool        pools_to_consider[BM_MAX_NUM_OF_POOLS];
111252 +                                                    /**< For each pool, TRUE if it should be considered for
111253 +                                                         depletion (Note - this pool must be used by this port!). */
111254 +    bool        single_pool_mode_enable;            /**< select mode in which pause frames will be sent after
111255 +                                                         a single-pool is depleted; */
111256 +    bool        pools_to_consider_for_single_mode[BM_MAX_NUM_OF_POOLS];
111257 +                                                    /**< For each pool, TRUE if it should be considered for
111258 +                                                         depletion (Note - this pool must be used by this port!) */
111259 +#if (DPAA_VERSION >= 11)
111260 +    bool        pfc_priorities_en[FM_MAX_NUM_OF_PFC_PRIORITIES];
111261 +                                                    /**< This field is used by the MAC as the Priority Enable Vector in the PFC frame
111262 +                                                         which is transmitted */
111263 +#endif /* (DPAA_VERSION >= 11) */
111264 +} ioc_fm_buf_pool_depletion_t;
111265 +
111266 +#if (DPAA_VERSION >= 11)
111267 +typedef struct ioc_fm_buf_pool_depletion_params_t {
111268 +    void        *p_fm_vsp;
111269 +    ioc_fm_buf_pool_depletion_t fm_buf_pool_depletion;
111270 +} ioc_fm_buf_pool_depletion_params_t;
111271 +#endif /* (DPAA_VERSION >= 11) */
111272 +
111273 +typedef struct ioc_fm_buffer_prefix_content_t {
111274 +    uint16_t    priv_data_size;       /**< Number of bytes to be left at the beginning
111275 +                                         of the external buffer; Note that the private-area will
111276 +                                         start from the base of the buffer address. */
111277 +    bool        pass_prs_result;      /**< TRUE to pass the parse result to/from the FM;
111278 +                                         User may use FM_PORT_GetBufferPrsResult() in order to
111279 +                                         get the parser-result from a buffer. */
111280 +    bool        pass_time_stamp;      /**< TRUE to pass the timeStamp to/from the FM
111281 +                                         User may use FM_PORT_GetBufferTimeStamp() in order to
111282 +                                         get the parser-result from a buffer. */
111283 +    bool        pass_hash_result;     /**< TRUE to pass the KG hash result to/from the FM
111284 +                                         User may use FM_PORT_GetBufferHashResult() in order to
111285 +                                         get the parser-result from a buffer. */
111286 +    bool        pass_all_other_pcd_info; /**< Add all other Internal-Context information:
111287 +                                         AD, hash-result, key, etc. */
111288 +    uint16_t    data_align;          /**< 0 to use driver's default alignment [64],
111289 +                                         other value for selecting a data alignment (must be a power of 2);
111290 +                                         if write optimization is used, must be >= 16. */
111291 +    uint8_t     manip_extra_space;    /**< Maximum extra size needed (insertion-size minus removal-size);
111292 +                                         Note that this field impacts the size of the buffer-prefix
111293 +                                         (i.e. it pushes the data offset);
111294 +                                         This field is irrelevant if DPAA_VERSION==10 */
111295 +} ioc_fm_buffer_prefix_content_t;
111296 +
111297 +typedef struct ioc_fm_buffer_prefix_content_params_t {
111298 +    void        *p_fm_vsp;
111299 +    ioc_fm_buffer_prefix_content_t fm_buffer_prefix_content;
111300 +} ioc_fm_buffer_prefix_content_params_t;
111301 +
111302 +#if (DPAA_VERSION >= 11)
111303 +typedef struct ioc_fm_vsp_config_no_sg_params_t {
111304 +    void        *p_fm_vsp;
111305 +    bool        no_sg;
111306 +} ioc_fm_vsp_config_no_sg_params_t;
111307 +
111308 +typedef struct ioc_fm_vsp_prs_result_params_t {
111309 +    void        *p_fm_vsp;
111310 +    void        *p_data;
111311 +} ioc_fm_vsp_prs_result_params_t;
111312 +#endif
111313 +
111314 +typedef struct fm_ctrl_mon_t {
111315 +    uint8_t     percent_cnt[2];
111316 +} fm_ctrl_mon_t;
111317 +
111318 +typedef struct ioc_fm_ctrl_mon_counters_params_t {
111319 +    uint8_t     fm_ctrl_index;
111320 +    fm_ctrl_mon_t *p_mon;
111321 +} ioc_fm_ctrl_mon_counters_params_t;
111322 +
111323 +/**************************************************************************//**
111324 + @Function      FM_IOC_SET_PORTS_BANDWIDTH
111325 +
111326 + @Description   Sets relative weights between ports when accessing common resources.
111327 +
111328 + @Param[in]     ioc_fm_port_bandwidth_params    Port bandwidth percentages,
111329 + their sum must equal 100.
111330 +
111331 + @Return        E_OK on success; Error code otherwise.
111332 +
111333 + @Cautions      Allowed only following FM_Init().
111334 +*//***************************************************************************/
111335 +#define FM_IOC_SET_PORTS_BANDWIDTH                             _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(2), ioc_fm_port_bandwidth_params)
111336 +
111337 +/**************************************************************************//**
111338 + @Function      FM_IOC_GET_REVISION
111339 +
111340 + @Description   Returns the FM revision
111341 +
111342 + @Param[out]    ioc_fm_revision_info_t  A structure of revision information parameters.
111343 +
111344 + @Return        None.
111345 +
111346 + @Cautions      Allowed only following FM_Init().
111347 +*//***************************************************************************/
111348 +#define FM_IOC_GET_REVISION                                    _IOR(FM_IOC_TYPE_BASE, FM_IOC_NUM(3), ioc_fm_revision_info_t)
111349 +
111350 +/**************************************************************************//**
111351 + @Function      FM_IOC_GET_COUNTER
111352 +
111353 + @Description   Reads one of the FM counters.
111354 +
111355 + @Param[in,out] ioc_fm_counters_params_t The requested counter parameters.
111356 +
111357 + @Return        Counter's current value.
111358 +
111359 + @Cautions      Allowed only following FM_Init().
111360 +                Note that it is user's responsibilty to call this routine only
111361 +                for enabled counters, and there will be no indication if a
111362 +                disabled counter is accessed.
111363 +*//***************************************************************************/
111364 +#define FM_IOC_GET_COUNTER                                    _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(4), ioc_fm_counters_params_t)
111365 +
111366 +/**************************************************************************//**
111367 + @Function      FM_IOC_SET_COUNTER
111368 +
111369 + @Description   Sets a value to an enabled counter. Use "0" to reset the counter.
111370 +
111371 + @Param[in]     ioc_fm_counters_params_t The requested counter parameters.
111372 +
111373 + @Return        E_OK on success; Error code otherwise.
111374 +
111375 + @Cautions      Allowed only following FM_Init().
111376 +*//***************************************************************************/
111377 +#define FM_IOC_SET_COUNTER                                    _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(5), ioc_fm_counters_params_t)
111378 +
111379 +/**************************************************************************//**
111380 + @Function      FM_IOC_FORCE_INTR
111381 +
111382 + @Description   Causes an interrupt event on the requested source.
111383 +
111384 + @Param[in]     ioc_fm_exceptions   An exception to be forced.
111385 +
111386 + @Return        E_OK on success; Error code if the exception is not enabled,
111387 +                or is not able to create interrupt.
111388 +
111389 + @Cautions      Allowed only following FM_Init().
111390 +*//***************************************************************************/
111391 +#define FM_IOC_FORCE_INTR                                    _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(6), ioc_fm_exceptions)
111392 +
111393 +/**************************************************************************//**
111394 + @Function      FM_IOC_GET_API_VERSION
111395 +
111396 + @Description   Reads the FMD IOCTL API version.
111397 +
111398 + @Param[in,out] ioc_fm_api_version_t The requested counter parameters.
111399 +
111400 + @Return        Version's value.
111401 +*//***************************************************************************/
111402 +#define FM_IOC_GET_API_VERSION                               _IOR(FM_IOC_TYPE_BASE, FM_IOC_NUM(7), ioc_fm_api_version_t)
111403 +
111404 +#if (DPAA_VERSION >= 11)
111405 +/**************************************************************************//**
111406 + @Function      FM_VSP_Config
111407 +
111408 + @Description   Creates descriptor for the FM VSP module.
111409 +
111410 +                The routine returns a handle (descriptor) to the FM VSP object.
111411 +                This descriptor must be passed as first parameter to all other
111412 +                FM VSP function calls.
111413 +
111414 +                No actual initialization or configuration of FM hardware is
111415 +                done by this routine.
111416 +
111417 +@Param[in]      p_FmVspParams   Pointer to data structure of parameters
111418 +
111419 + @Retval        Handle to FM VSP object, or NULL for Failure.
111420 +*//***************************************************************************/
111421 +#if defined(CONFIG_COMPAT)
111422 +#define FM_IOC_VSP_CONFIG_COMPAT                             _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(8), ioc_compat_fm_vsp_params_t)
111423 +#endif
111424 +#define FM_IOC_VSP_CONFIG                                    _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(8), ioc_fm_vsp_params_t)
111425 +
111426 +/**************************************************************************//**
111427 + @Function      FM_VSP_Init
111428 +
111429 + @Description   Initializes the FM VSP module
111430 +
111431 + @Param[in]     h_FmVsp - FM VSP module descriptor
111432 +
111433 + @Return        E_OK on success; Error code otherwise.
111434 +*//***************************************************************************/
111435 +#if defined(CONFIG_COMPAT)
111436 +#define FM_IOC_VSP_INIT_COMPAT                               _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(9), ioc_compat_fm_obj_t)
111437 +#endif
111438 +#define FM_IOC_VSP_INIT                                      _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(9), ioc_fm_obj_t)
111439 +
111440 +/**************************************************************************//**
111441 + @Function      FM_VSP_Free
111442 +
111443 + @Description   Frees all resources that were assigned to FM VSP module.
111444 +
111445 +                Calling this routine invalidates the descriptor.
111446 +
111447 + @Param[in]     h_FmVsp - FM VSP module descriptor
111448 +
111449 + @Return        E_OK on success; Error code otherwise.
111450 +*//***************************************************************************/
111451 +#if defined(CONFIG_COMPAT)
111452 +#define FM_IOC_VSP_FREE_COMPAT                               _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(10), ioc_compat_fm_obj_t)
111453 +#endif
111454 +#define FM_IOC_VSP_FREE                                      _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(10), ioc_fm_obj_t)
111455 +
111456 +/**************************************************************************//**
111457 + @Function      FM_VSP_ConfigPoolDepletion
111458 +
111459 + @Description   Calling this routine enables pause frame generation depending on the
111460 +                depletion status of BM pools. It also defines the conditions to activate
111461 +                this functionality. By default, this functionality is disabled.
111462 +
111463 + @Param[in]     ioc_fm_buf_pool_depletion_params_t      A structure holding the required parameters.
111464 +
111465 + @Return        E_OK on success; Error code otherwise.
111466 +
111467 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
111468 +*//***************************************************************************/
111469 +#if defined(CONFIG_COMPAT)
111470 +#define FM_IOC_VSP_CONFIG_POOL_DEPLETION_COMPAT              _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(11), ioc_compat_fm_buf_pool_depletion_params_t)
111471 +#endif
111472 +#define FM_IOC_VSP_CONFIG_POOL_DEPLETION                     _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(11), ioc_fm_buf_pool_depletion_params_t)
111473 +
111474 +/**************************************************************************//**
111475 + @Function      FM_VSP_ConfigBufferPrefixContent
111476 +
111477 + @Description   Defines the structure, size and content of the application buffer.
111478 +
111479 +                The prefix will
111480 +                In VSPs defined for Tx ports, if 'passPrsResult', the application
111481 +                should set a value to their offsets in the prefix of
111482 +                the FM will save the first 'privDataSize', than,
111483 +                depending on 'passPrsResult' and 'passTimeStamp', copy parse result
111484 +                and timeStamp, and the packet itself (in this order), to the
111485 +                application buffer, and to offset.
111486 +
111487 +                Calling this routine changes the buffer margins definitions
111488 +                in the internal driver data base from its default
111489 +                configuration: Data size:  [DEFAULT_FM_SP_bufferPrefixContent_privDataSize]
111490 +                               Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult].
111491 +                               Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp].
111492 +
111493 + @Param[in]     ioc_fm_buffer_prefix_content_params_t   A structure holding the required parameters.
111494 +
111495 + @Return        E_OK on success; Error code otherwise.
111496 +
111497 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
111498 +*//***************************************************************************/
111499 +#if defined(CONFIG_COMPAT)
111500 +#define FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT_COMPAT       _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(12), ioc_compat_fm_buffer_prefix_content_params_t)
111501 +#endif
111502 +#define FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT              _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(12), ioc_fm_buffer_prefix_content_params_t)
111503 +
111504 +/**************************************************************************//**
111505 + @Function      FM_VSP_ConfigNoScatherGather
111506 +
111507 + @Description   Calling this routine changes the possibility to receive S/G frame
111508 +                in the internal driver data base
111509 +                from its default configuration: optimize = [DEFAULT_FM_SP_noScatherGather]
111510 +
111511 + @Param[in]     ioc_fm_vsp_config_no_sg_params_t        A structure holding the required parameters.
111512 +
111513 + @Return        E_OK on success; Error code otherwise.
111514 +
111515 + @Cautions      Allowed only following FM_VSP_Config() and before FM_VSP_Init().
111516 +*//***************************************************************************/
111517 +#if defined(CONFIG_COMPAT)
111518 +#define FM_IOC_VSP_CONFIG_NO_SG_COMPAT                     _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(13), ioc_compat_fm_vsp_config_no_sg_params_t)
111519 +#endif
111520 +#define FM_IOC_VSP_CONFIG_NO_SG                            _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(13), ioc_fm_vsp_config_no_sg_params_t)
111521 +
111522 +/**************************************************************************//**
111523 + @Function      FM_VSP_GetBufferPrsResult
111524 +
111525 + @Description   Returns the pointer to the parse result in the data buffer.
111526 +                In Rx ports this is relevant after reception, if parse
111527 +                result is configured to be part of the data passed to the
111528 +                application. For non Rx ports it may be used to get the pointer
111529 +                of the area in the buffer where parse result should be
111530 +                initialized - if so configured.
111531 +                See FM_VSP_ConfigBufferPrefixContent for data buffer prefix
111532 +                configuration.
111533 +
111534 + @Param[in]     ioc_fm_vsp_prs_result_params_t  A structure holding the required parameters.
111535 +
111536 + @Return        Parse result pointer on success, NULL if parse result was not
111537 +                configured for this port.
111538 +
111539 + @Cautions      Allowed only following FM_VSP_Init().
111540 +*//***************************************************************************/
111541 +#if defined(CONFIG_COMPAT)
111542 +#define FM_IOC_VSP_GET_BUFFER_PRS_RESULT_COMPAT            _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(14), ioc_compat_fm_vsp_prs_result_params_t)
111543 +#endif
111544 +#define FM_IOC_VSP_GET_BUFFER_PRS_RESULT                   _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(14), ioc_fm_vsp_prs_result_params_t)
111545 +#endif /* (DPAA_VERSION >= 11) */
111546 +
111547 +/**************************************************************************//**
111548 + @Function      FM_CtrlMonStart
111549 +
111550 + @Description   Start monitoring utilization of all available FM controllers.
111551 +
111552 +                In order to obtain FM controllers utilization the following sequence
111553 +                should be used:
111554 +                -# FM_CtrlMonStart()
111555 +                -# FM_CtrlMonStop()
111556 +                -# FM_CtrlMonGetCounters() - issued for each FM controller
111557 +
111558 + @Return        E_OK on success; Error code otherwise.
111559 +
111560 + @Cautions      Allowed only following FM_Init().
111561 +*//***************************************************************************/
111562 +#define FM_IOC_CTRL_MON_START                              _IO(FM_IOC_TYPE_BASE, FM_IOC_NUM(15))
111563 +
111564 +
111565 +/**************************************************************************//**
111566 + @Function      FM_CtrlMonStop
111567 +
111568 + @Description   Stop monitoring utilization of all available FM controllers.
111569 +
111570 +                In order to obtain FM controllers utilization the following sequence
111571 +                should be used:
111572 +                -# FM_CtrlMonStart()
111573 +                -# FM_CtrlMonStop()
111574 +                -# FM_CtrlMonGetCounters() - issued for each FM controller
111575 +
111576 + @Return        E_OK on success; Error code otherwise.
111577 +
111578 + @Cautions      Allowed only following FM_Init().
111579 +*//***************************************************************************/
111580 +#define FM_IOC_CTRL_MON_STOP                               _IO(FM_IOC_TYPE_BASE, FM_IOC_NUM(16))
111581 +
111582 +/**************************************************************************//**
111583 + @Function      FM_CtrlMonGetCounters
111584 +
111585 + @Description   Obtain FM controller utilization parameters.
111586 +
111587 +                In order to obtain FM controllers utilization the following sequence
111588 +                should be used:
111589 +                -# FM_CtrlMonStart()
111590 +                -# FM_CtrlMonStop()
111591 +                -# FM_CtrlMonGetCounters() - issued for each FM controller
111592 +
111593 + @Param[in]     ioc_fm_ctrl_mon_counters_params_t       A structure holding the required parameters.
111594 +
111595 + @Return        E_OK on success; Error code otherwise.
111596 +
111597 + @Cautions      Allowed only following FM_Init().
111598 +*//***************************************************************************/
111599 +#if defined(CONFIG_COMPAT)
111600 +#define FM_IOC_CTRL_MON_GET_COUNTERS_COMPAT                _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(17), ioc_compat_fm_ctrl_mon_counters_params_t)
111601 +#endif
111602 +#define FM_IOC_CTRL_MON_GET_COUNTERS                       _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(17), ioc_fm_ctrl_mon_counters_params_t)
111603 +
111604 +/** @} */ /* end of lnx_ioctl_FM_runtime_control_grp group */
111605 +/** @} */ /* end of lnx_ioctl_FM_lib_grp group */
111606 +/** @} */ /* end of lnx_ioctl_FM_grp */
111607 +
111608 +#define FMD_API_VERSION_MAJOR 21
111609 +#define FMD_API_VERSION_MINOR 1
111610 +#define FMD_API_VERSION_RESPIN 0
111611 +
111612 +#endif /* __FM_IOCTLS_H */
111613 --- /dev/null
111614 +++ b/include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h
111615 @@ -0,0 +1,3084 @@
111616 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
111617 + * All rights reserved.
111618 + *
111619 + * Redistribution and use in source and binary forms, with or without
111620 + * modification, are permitted provided that the following conditions are met:
111621 + *     * Redistributions of source code must retain the above copyright
111622 + *       notice, this list of conditions and the following disclaimer.
111623 + *     * Redistributions in binary form must reproduce the above copyright
111624 + *       notice, this list of conditions and the following disclaimer in the
111625 + *       documentation and/or other materials provided with the distribution.
111626 + *     * Neither the name of Freescale Semiconductor nor the
111627 + *       names of its contributors may be used to endorse or promote products
111628 + *       derived from this software without specific prior written permission.
111629 + *
111630 + *
111631 + * ALTERNATIVELY, this software may be distributed under the terms of the
111632 + * GNU General Public License ("GPL") as published by the Free Software
111633 + * Foundation, either version 2 of that License or (at your option) any
111634 + * later version.
111635 + *
111636 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
111637 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
111638 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
111639 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
111640 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
111641 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
111642 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
111643 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
111644 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
111645 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
111646 + */
111647 +
111648 +
111649 +/******************************************************************************
111650 + @File          fm_pcd_ioctls.h
111651 +
111652 + @Description   FM PCD ...
111653 +*//***************************************************************************/
111654 +#ifndef __FM_PCD_IOCTLS_H
111655 +#define __FM_PCD_IOCTLS_H
111656 +
111657 +#include "net_ioctls.h"
111658 +#include "fm_ioctls.h"
111659 +
111660 +
111661 +/**************************************************************************//**
111662 +
111663 + @Group         lnx_ioctl_FM_grp Frame Manager Linux IOCTL API
111664 +
111665 + @Description   Frame Manager Linux ioctls definitions and enums
111666 +
111667 + @{
111668 +*//***************************************************************************/
111669 +
111670 +/**************************************************************************//**
111671 + @Group         lnx_ioctl_FM_PCD_grp FM PCD
111672 +
111673 + @Description   Frame Manager PCD API functions, definitions and enums
111674 +
111675 +                The FM PCD module is responsible for the initialization of all
111676 +                global classifying FM modules. This includes the parser general and
111677 +                common registers, the key generator global and common registers,
111678 +                and the policer global and common registers.
111679 +                In addition, the FM PCD SW module will initialize all required
111680 +                key generator schemes, coarse classification flows, and policer
111681 +                profiles. When an FM module is configured to work with one of these
111682 +                entities, it will register to it using the FM PORT API. The PCD
111683 +                module will manage the PCD resources - i.e. resource management of
111684 +                KeyGen schemes, etc.
111685 +
111686 + @{
111687 +*//***************************************************************************/
111688 +
111689 +/**************************************************************************//**
111690 + @Collection    General PCD defines
111691 +*//***************************************************************************/
111692 +#define IOC_FM_PCD_MAX_NUM_OF_PRIVATE_HDRS              2                   /**< Number of units/headers saved for user */
111693 +
111694 +#define IOC_FM_PCD_PRS_NUM_OF_HDRS                      16                  /**< Number of headers supported by HW parser */
111695 +#define IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS         (32 - IOC_FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
111696 +                                                                            /**< Number of distinction units is limited by
111697 +                                                                             register size (32 bits) minus reserved bits
111698 +                                                                             for private headers. */
111699 +#define IOC_FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS      4                   /**< Maximum number of interchangeable headers
111700 +                                                                             in a distinction unit */
111701 +#define IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS               8                   /**< Total number of generic KeyGen registers */
111702 +#define IOC_FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY       35                  /**< Max number allowed on any configuration;
111703 +                                                                             For HW implementation reasons, in most
111704 +                                                                             cases less than this will be allowed; The
111705 +                                                                             driver will return an initialization error
111706 +                                                                             if resource is unavailable. */
111707 +#define IOC_FM_PCD_KG_NUM_OF_EXTRACT_MASKS              4                   /**< Total number of masks allowed on KeyGen extractions. */
111708 +#define IOC_FM_PCD_KG_NUM_OF_DEFAULT_GROUPS             16                  /**< Number of default value logical groups */
111709 +
111710 +#define IOC_FM_PCD_PRS_NUM_OF_LABELS                    32                  /**< Maximum number of SW parser labels */
111711 +#define IOC_FM_PCD_SW_PRS_SIZE                          0x00000800          /**< Total size of SW parser area */
111712 +
111713 +#define IOC_FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE        128                 /**< Maximum size of insertion template for
111714 +                                                                             insert manipulation */
111715 +
111716 +#if DPAA_VERSION >= 11
111717 +#define IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES        64                  /**< Maximum possible entries for frame replicator group */
111718 +#endif /* DPAA_VERSION >= 11 */
111719 +/* @} */
111720 +
111721 +#ifdef FM_CAPWAP_SUPPORT
111722 +#error "FM_CAPWAP_SUPPORT not implemented!"
111723 +#endif
111724 +
111725 +
111726 +/**************************************************************************//**
111727 + @Group         lnx_ioctl_FM_PCD_init_grp FM PCD Initialization Unit
111728 +
111729 + @Description   Frame Manager PCD Initialization Unit API
111730 +
111731 + @{
111732 +*//***************************************************************************/
111733 +
111734 +/**************************************************************************//**
111735 + @Description   PCD counters
111736 +                (must match enum e_FmPcdCounters defined in fm_pcd_ext.h)
111737 +*//***************************************************************************/
111738 +typedef enum ioc_fm_pcd_counters {
111739 +    e_IOC_FM_PCD_KG_COUNTERS_TOTAL,                                 /**< KeyGen counter */
111740 +    e_IOC_FM_PCD_PLCR_COUNTERS_RED,                                 /**< Policer counter - counts the total number of RED packets that exit the Policer. */
111741 +    e_IOC_FM_PCD_PLCR_COUNTERS_YELLOW,                              /**< Policer counter - counts the total number of YELLOW packets that exit the Policer. */
111742 +    e_IOC_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED,                    /**< Policer counter - counts the number of packets that changed color to RED by the Policer;
111743 +                                                                         This is a subset of e_IOC_FM_PCD_PLCR_COUNTERS_RED packet count, indicating active color changes. */
111744 +    e_IOC_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW,                 /**< Policer counter - counts the number of packets that changed color to YELLOW by the Policer;
111745 +                                                                         This is a subset of e_IOC_FM_PCD_PLCR_COUNTERS_YELLOW packet count, indicating active color changes. */
111746 +    e_IOC_FM_PCD_PLCR_COUNTERS_TOTAL,                               /**< Policer counter - counts the total number of packets passed in the Policer. */
111747 +    e_IOC_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH,                     /**< Policer counter - counts the number of packets with length mismatch. */
111748 +    e_IOC_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH,                       /**< Parser counter - counts the number of times the parser block is dispatched. */
111749 +    e_IOC_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED,             /**< Parser counter - counts the number of times L2 parse result is returned (including errors). */
111750 +    e_IOC_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED,             /**< Parser counter - counts the number of times L3 parse result is returned (including errors). */
111751 +    e_IOC_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED,             /**< Parser counter - counts the number of times L4 parse result is returned (including errors). */
111752 +    e_IOC_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED,           /**< Parser counter - counts the number of times SHIM parse result is returned (including errors). */
111753 +    e_IOC_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR,    /**< Parser counter - counts the number of times L2 parse result is returned with errors. */
111754 +    e_IOC_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR,    /**< Parser counter - counts the number of times L3 parse result is returned with errors. */
111755 +    e_IOC_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR,    /**< Parser counter - counts the number of times L4 parse result is returned with errors. */
111756 +    e_IOC_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR,  /**< Parser counter - counts the number of times SHIM parse result is returned with errors. */
111757 +    e_IOC_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES,                      /**< Parser counter - counts the number of cycles spent executing soft parser instruction (including stall cycles). */
111758 +    e_IOC_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES,                /**< Parser counter - counts the number of cycles stalled waiting for parser internal memory reads while executing soft parser instruction. */
111759 +    e_IOC_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES,     /**< Parser counter - counts the number of cycles spent executing hard parser (including stall cycles). */
111760 +    e_IOC_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES,                    /**< MURAM counter - counts the number of cycles while performing FMan Memory read. */
111761 +    e_IOC_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES,              /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory read. */
111762 +    e_IOC_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES,                   /**< MURAM counter - counts the number of cycles while performing FMan Memory write. */
111763 +    e_IOC_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES,             /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory write. */
111764 +    e_IOC_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES              /**< FPM counter - counts the number of cycles stalled while performing a FPM Command. */
111765 +} ioc_fm_pcd_counters;
111766 +
111767 +/**************************************************************************//**
111768 + @Description   PCD interrupts
111769 +                (must match enum e_FmPcdExceptions defined in fm_pcd_ext.h)
111770 +*//***************************************************************************/
111771 +typedef enum ioc_fm_pcd_exceptions {
111772 +    e_IOC_FM_PCD_KG_EXCEPTION_DOUBLE_ECC,                   /**< KeyGen double-bit ECC error is detected on internal memory read access. */
111773 +    e_IOC_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW,             /**< KeyGen scheme configuration error indicating a key size larger than 56 bytes. */
111774 +    e_IOC_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC,                 /**< Policer double-bit ECC error has been detected on PRAM read access. */
111775 +    e_IOC_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR,           /**< Policer access to a non-initialized profile has been detected. */
111776 +    e_IOC_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE,    /**< Policer RAM self-initialization complete */
111777 +    e_IOC_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE,     /**< Policer atomic action complete */
111778 +    e_IOC_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC,                  /**< Parser double-bit ECC error */
111779 +    e_IOC_FM_PCD_PRS_EXCEPTION_SINGLE_ECC                   /**< Parser single-bit ECC error */
111780 +} ioc_fm_pcd_exceptions;
111781 +
111782 +/** @} */ /* end of lnx_ioctl_FM_PCD_init_grp group */
111783 +
111784 +
111785 +/**************************************************************************//**
111786 + @Group         lnx_ioctl_FM_PCD_Runtime_grp FM PCD Runtime Unit
111787 +
111788 + @Description   Frame Manager PCD Runtime Unit
111789 +
111790 +                The runtime control allows creation of PCD infrastructure modules
111791 +                such as Network Environment Characteristics, Classification Plan
111792 +                Groups and Coarse Classification Trees.
111793 +                It also allows on-the-fly initialization, modification and removal
111794 +                of PCD modules such as KeyGen schemes, coarse classification nodes
111795 +                and Policer profiles.
111796 +
111797 +                In order to explain the programming model of the PCD driver interface
111798 +                a few terms should be explained, and will be used below.
111799 +                  - Distinction Header - One of the 16 protocols supported by the FM parser,
111800 +                    or one of the SHIM headers (1 or 2). May be a header with a special
111801 +                    option (see below).
111802 +                  - Interchangeable Headers Group - This is a group of Headers recognized
111803 +                    by either one of them. For example, if in a specific context the user
111804 +                    chooses to treat IPv4 and IPV6 in the same way, they may create an
111805 +                    interchangeable Headers Unit consisting of these 2 headers.
111806 +                  - A Distinction Unit - a Distinction Header or an Interchangeable Headers
111807 +                    Group.
111808 +                  - Header with special option - applies to Ethernet, MPLS, VLAN, IPv4 and
111809 +                    IPv6, includes multicast, broadcast and other protocol specific options.
111810 +                    In terms of hardware it relates to the options available in the classification
111811 +                    plan.
111812 +                  - Network Environment Characteristics - a set of Distinction Units that define
111813 +                    the total recognizable header selection for a certain environment. This is
111814 +                    NOT the list of all headers that will ever appear in a flow, but rather
111815 +                    everything that needs distinction in a flow, where distinction is made by KeyGen
111816 +                    schemes and coarse classification action descriptors.
111817 +
111818 +                The PCD runtime modules initialization is done in stages. The first stage after
111819 +                initializing the PCD module itself is to establish a Network Flows Environment
111820 +                Definition. The application may choose to establish one or more such environments.
111821 +                Later, when needed, the application will have to state, for some of its modules,
111822 +                to which single environment it belongs.
111823 +
111824 + @{
111825 +*//***************************************************************************/
111826 +
111827 +
111828 +/**************************************************************************//**
111829 + @Description   structure for FM counters
111830 +*//***************************************************************************/
111831 +typedef struct ioc_fm_pcd_counters_params_t {
111832 +    ioc_fm_pcd_counters cnt;                /**< The requested counter */
111833 +    uint32_t            val;                /**< The requested value to get/set from/into the counter */
111834 +} ioc_fm_pcd_counters_params_t;
111835 +
111836 +/**************************************************************************//**
111837 + @Description   structure for FM exception definitios
111838 +*//***************************************************************************/
111839 +typedef struct ioc_fm_pcd_exception_params_t {
111840 +    ioc_fm_pcd_exceptions exception;        /**< The requested exception */
111841 +    bool                  enable;           /**< TRUE to enable interrupt, FALSE to mask it. */
111842 +} ioc_fm_pcd_exception_params_t;
111843 +
111844 +/**************************************************************************//**
111845 + @Description   A structure for SW parser labels
111846 +                (must be identical to struct t_FmPcdPrsLabelParams defined in fm_pcd_ext.h)
111847 + *//***************************************************************************/
111848 +typedef struct ioc_fm_pcd_prs_label_params_t {
111849 +    uint32_t                instruction_offset;             /**< SW parser label instruction offset (2 bytes
111850 +                                                                 resolution), relative to Parser RAM. */
111851 +    ioc_net_header_type     hdr;                            /**< The existence of this header will invoke
111852 +                                                                 the SW parser code. */
111853 +    uint8_t                 index_per_hdr;                  /**< Normally 0, if more than one SW parser
111854 +                                                                 attachments for the same header, use this
111855 +                                                                 index to distinguish between them. */
111856 +} ioc_fm_pcd_prs_label_params_t;
111857 +
111858 +/**************************************************************************//**
111859 + @Description   A structure for SW parser
111860 +                (Must match struct t_FmPcdPrsSwParams defined in fm_pcd_ext.h)
111861 + *//***************************************************************************/
111862 +typedef struct ioc_fm_pcd_prs_sw_params_t {
111863 +    bool                    override;                   /**< FALSE to invoke a check that nothing else
111864 +                                                             was loaded to this address, including
111865 +                                                             internal patches.
111866 +                                                             TRUE to override any existing code.*/
111867 +    uint32_t                size;                       /**< SW parser code size */
111868 +    uint16_t                base;                       /**< SW parser base (in instruction counts!
111869 +                                                             must be larger than 0x20)*/
111870 +    uint8_t                 *p_code;                    /**< SW parser code */
111871 +    uint32_t                sw_prs_data_params[IOC_FM_PCD_PRS_NUM_OF_HDRS];
111872 +                                                        /**< SW parser data (parameters) */
111873 +    uint8_t                 num_of_labels;              /**< Number of labels for SW parser. */
111874 +    ioc_fm_pcd_prs_label_params_t labels_table[IOC_FM_PCD_PRS_NUM_OF_LABELS];
111875 +                                                        /**< SW parser labels table,
111876 +                                                             containing num_of_labels entries */
111877 +} ioc_fm_pcd_prs_sw_params_t;
111878 +
111879 +/**************************************************************************//**
111880 + @Description   A structure to set the a KeyGen default value
111881 + *//***************************************************************************/
111882 +typedef struct ioc_fm_pcd_kg_dflt_value_params_t {
111883 +    uint8_t                         valueId;                /**< 0,1 - one of 2 global default values */
111884 +    uint32_t                        value;                  /**< The requested default value */
111885 +} ioc_fm_pcd_kg_dflt_value_params_t;
111886 +
111887 +
111888 +/**************************************************************************//**
111889 + @Function      FM_PCD_Enable
111890 +
111891 + @Description   This routine should be called after PCD is initialized for enabling all
111892 +                PCD engines according to their existing configuration.
111893 +
111894 + @Return        0 on success; Error code otherwise.
111895 +
111896 + @Cautions      Allowed only when PCD is disabled.
111897 +*//***************************************************************************/
111898 +#define FM_PCD_IOC_ENABLE  _IO(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(1))
111899 +
111900 +/**************************************************************************//**
111901 + @Function      FM_PCD_Disable
111902 +
111903 + @Description   This routine may be called when PCD is enabled in order to
111904 +                disable all PCD engines. It may be called
111905 +                only when none of the ports in the system are using the PCD.
111906 +
111907 + @Return        0 on success; Error code otherwise.
111908 +
111909 + @Cautions      Allowed only when PCD is enabled.
111910 +*//***************************************************************************/
111911 +#define FM_PCD_IOC_DISABLE  _IO(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(2))
111912 +
111913 + /**************************************************************************//**
111914 + @Function      FM_PCD_PrsLoadSw
111915 +
111916 + @Description   This routine may be called only when all ports in the
111917 +                system are actively using the classification plan scheme.
111918 +                In such cases it is recommended in order to save resources.
111919 +                The driver automatically saves 8 classification plans for
111920 +                ports that do NOT use the classification plan mechanism, to
111921 +                avoid this (in order to save those entries) this routine may
111922 +                be called.
111923 +
111924 + @Param[in]     ioc_fm_pcd_prs_sw_params_t  A pointer to the image of the software parser code.
111925 +
111926 + @Return        0 on success; Error code otherwise.
111927 +
111928 + @Cautions      Allowed only when PCD is disabled.
111929 +*//***************************************************************************/
111930 +#if defined(CONFIG_COMPAT)
111931 +#define FM_PCD_IOC_PRS_LOAD_SW_COMPAT  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(3), ioc_compat_fm_pcd_prs_sw_params_t)
111932 +#endif
111933 +#define FM_PCD_IOC_PRS_LOAD_SW  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(3), ioc_fm_pcd_prs_sw_params_t)
111934 +
111935 +/**************************************************************************//**
111936 + @Function      FM_PCD_KgSetDfltValue
111937 +
111938 + @Description   Calling this routine sets a global default value to be used
111939 +                by the KeyGen when parser does not recognize a required
111940 +                field/header.
111941 +                By default default values are 0.
111942 +
111943 + @Param[in]     ioc_fm_pcd_kg_dflt_value_params_t   A pointer to a structure with the relevant parameters
111944 +
111945 + @Return        0 on success; Error code otherwise.
111946 +
111947 + @Cautions      Allowed only when PCD is disabled.
111948 +*//***************************************************************************/
111949 +#define FM_PCD_IOC_KG_SET_DFLT_VALUE  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(6), ioc_fm_pcd_kg_dflt_value_params_t)
111950 +
111951 +/**************************************************************************//**
111952 + @Function      FM_PCD_KgSetAdditionalDataAfterParsing
111953 +
111954 + @Description   Calling this routine allows the keygen to access data past
111955 +                the parser finishing point.
111956 +
111957 + @Param[in]     uint8_t   payload-offset; the number of bytes beyond the parser location.
111958 +
111959 + @Return        0 on success; Error code otherwise.
111960 +
111961 + @Cautions      Allowed only when PCD is disabled.
111962 +*//***************************************************************************/
111963 +#define FM_PCD_IOC_KG_SET_ADDITIONAL_DATA_AFTER_PARSING  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(7), uint8_t)
111964 +
111965 +/**************************************************************************//**
111966 + @Function      FM_PCD_SetException
111967 +
111968 + @Description   Calling this routine enables/disables PCD interrupts.
111969 +
111970 + @Param[in]     ioc_fm_pcd_exception_params_t     Arguments struct with exception to be enabled/disabled.
111971 +
111972 + @Return        0 on success; Error code otherwise.
111973 +*//***************************************************************************/
111974 +#define FM_PCD_IOC_SET_EXCEPTION _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(8), ioc_fm_pcd_exception_params_t)
111975 +
111976 +/**************************************************************************//**
111977 + @Function      FM_PCD_GetCounter
111978 +
111979 + @Description   Reads one of the FM PCD counters.
111980 +
111981 + @Param[in,out] ioc_fm_pcd_counters_params_t The requested counter parameters.
111982 +
111983 + @Return        0 on success; Error code otherwise.
111984 +
111985 + @Cautions      Note that it is user's responsibilty to call this routine only
111986 +                for enabled counters, and there will be no indication if a
111987 +                disabled counter is accessed.
111988 +*//***************************************************************************/
111989 +#define FM_PCD_IOC_GET_COUNTER  _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(9), ioc_fm_pcd_counters_params_t)
111990 +
111991 +/**************************************************************************//**
111992 +
111993 + @Function      FM_PCD_KgSchemeGetCounter
111994 +
111995 + @Description   Reads scheme packet counter.
111996 +
111997 + @Param[in]     h_Scheme        scheme handle as returned by FM_PCD_KgSchemeSet().
111998 +
111999 + @Return        Counter's current value.
112000 +
112001 + @Cautions      Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
112002 +*//***************************************************************************/
112003 +#if defined(CONFIG_COMPAT)
112004 +#define FM_PCD_IOC_KG_SCHEME_GET_CNTR_COMPAT  _IOR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(4), ioc_compat_fm_pcd_kg_scheme_spc_t)
112005 +#endif
112006 +#define FM_PCD_IOC_KG_SCHEME_GET_CNTR  _IOR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(4), ioc_fm_pcd_kg_scheme_spc_t)
112007 +
112008 +#if 0
112009 +TODO: unused IOCTL
112010 +/**************************************************************************//**
112011 + @Function      FM_PCD_ModifyCounter
112012 +
112013 + @Description   Writes a value to an enabled counter. Use "0" to reset the counter.
112014 +
112015 + @Param[in]     ioc_fm_pcd_counters_params_t - The requested counter parameters.
112016 +
112017 + @Return        0 on success; Error code otherwise.
112018 +*//***************************************************************************/
112019 +#define FM_PCD_IOC_MODIFY_COUNTER   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(10), ioc_fm_pcd_counters_params_t)
112020 +#define FM_PCD_IOC_SET_COUNTER      FM_PCD_IOC_MODIFY_COUNTER
112021 +#endif
112022 +
112023 +/**************************************************************************//**
112024 + @Function      FM_PCD_ForceIntr
112025 +
112026 + @Description   Causes an interrupt event on the requested source.
112027 +
112028 + @Param[in]     ioc_fm_pcd_exceptions - An exception to be forced.
112029 +
112030 + @Return        0 on success; error code if the exception is not enabled,
112031 +                or is not able to create interrupt.
112032 +*//***************************************************************************/
112033 +#define FM_PCD_IOC_FORCE_INTR _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(11), ioc_fm_pcd_exceptions)
112034 +
112035 +/**************************************************************************//**
112036 + @Collection    Definitions of coarse classification parameters as required by KeyGen
112037 +                (when coarse classification is the next engine after this scheme).
112038 +*//***************************************************************************/
112039 +#define IOC_FM_PCD_MAX_NUM_OF_CC_TREES              8
112040 +#define IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS             16
112041 +#define IOC_FM_PCD_MAX_NUM_OF_CC_UNITS              4
112042 +#define IOC_FM_PCD_MAX_NUM_OF_KEYS                  256
112043 +#define IOC_FM_PCD_MAX_NUM_OF_FLOWS                 (4*KILOBYTE)
112044 +#define IOC_FM_PCD_MAX_SIZE_OF_KEY                  56
112045 +#define IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP     16
112046 +#define IOC_FM_PCD_LAST_KEY_INDEX                   0xffff
112047 +#define IOC_FM_PCD_MANIP_DSCP_VALUES                64
112048 +/* @} */
112049 +
112050 +/**************************************************************************//**
112051 + @Collection    A set of definitions to allow protocol
112052 +                special option description.
112053 +*//***************************************************************************/
112054 +typedef uint32_t            ioc_protocol_opt_t;      /**< A general type to define a protocol option. */
112055 +
112056 +typedef ioc_protocol_opt_t  ioc_eth_protocol_opt_t;  /**< Ethernet protocol options. */
112057 +#define IOC_ETH_BROADCAST               0x80000000   /**< Ethernet Broadcast. */
112058 +#define IOC_ETH_MULTICAST               0x40000000   /**< Ethernet Multicast. */
112059 +
112060 +typedef ioc_protocol_opt_t  ioc_vlan_protocol_opt_t; /**< Vlan protocol options. */
112061 +#define IOC_VLAN_STACKED                0x20000000   /**< Stacked VLAN. */
112062 +
112063 +typedef ioc_protocol_opt_t  ioc_mpls_protocol_opt_t; /**< MPLS protocol options. */
112064 +#define IOC_MPLS_STACKED                0x10000000   /**< Stacked MPLS. */
112065 +
112066 +typedef ioc_protocol_opt_t  ioc_ipv4_protocol_opt_t; /**< IPv4 protocol options. */
112067 +#define IOC_IPV4_BROADCAST_1            0x08000000   /**< IPv4 Broadcast. */
112068 +#define IOC_IPV4_MULTICAST_1            0x04000000   /**< IPv4 Multicast. */
112069 +#define IOC_IPV4_UNICAST_2              0x02000000   /**< Tunneled IPv4 - Unicast. */
112070 +#define IOC_IPV4_MULTICAST_BROADCAST_2  0x01000000   /**< Tunneled IPv4 - Broadcast/Multicast. */
112071 +
112072 +#define IOC_IPV4_FRAG_1                 0x00000008   /**< IPV4 reassembly option.
112073 +                                                          IPV4 Reassembly manipulation requires network
112074 +                                                          environment with IPV4 header and IPV4_FRAG_1 option  */
112075 +
112076 +typedef ioc_protocol_opt_t  ioc_ipv6_protocol_opt_t; /**< IPv6 protocol options. */
112077 +#define IOC_IPV6_MULTICAST_1            0x00800000   /**< IPv6 Multicast. */
112078 +#define IOC_IPV6_UNICAST_2              0x00400000   /**< Tunneled IPv6 - Unicast. */
112079 +#define IOC_IPV6_MULTICAST_2            0x00200000   /**< Tunneled IPv6 - Multicast. */
112080 +
112081 +#define IOC_IPV6_FRAG_1                 0x00000004   /**< IPV6 reassembly option.
112082 +                                                          IPV6 Reassembly manipulation requires network
112083 +                                                          environment with IPV6 header and IPV6_FRAG_1 option  */
112084 +#if (DPAA_VERSION >= 11)
112085 +typedef ioc_protocol_opt_t   ioc_capwap_protocol_opt_t;      /**< CAPWAP protocol options. */
112086 +#define CAPWAP_FRAG_1               0x00000008  /**< CAPWAP reassembly option.
112087 +                                                     CAPWAP Reassembly manipulation requires network
112088 +                                                     environment with CAPWAP header and CAPWAP_FRAG_1 option;
112089 +                                                     in case where fragment found, the fragment-extension offset
112090 +                                                     may be found at 'shim2' (in parser-result). */
112091 +#endif /* (DPAA_VERSION >= 11) */
112092 +
112093 +/* @} */
112094 +
112095 +#define IOC_FM_PCD_MANIP_MAX_HDR_SIZE               256
112096 +#define IOC_FM_PCD_MANIP_DSCP_TO_VLAN_TRANS         64
112097 +/**************************************************************************//**
112098 + @Collection    A set of definitions to support Header Manipulation selection.
112099 +*//***************************************************************************/
112100 +typedef uint32_t                        ioc_hdr_manip_flags_t;              /**< A general type to define a HMan update command flags. */
112101 +
112102 +typedef ioc_hdr_manip_flags_t           ioc_ipv4_hdr_manip_update_flags_t;  /**< IPv4 protocol HMan update command flags. */
112103 +
112104 +#define IOC_HDR_MANIP_IPV4_TOS          0x80000000          /**< update TOS with the given value ('tos' field
112105 +                                                                 of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
112106 +#define IOC_HDR_MANIP_IPV4_ID           0x40000000          /**< update IP ID with the given value ('id' field
112107 +                                                                 of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
112108 +#define IOC_HDR_MANIP_IPV4_TTL          0x20000000          /**< Decrement TTL by 1 */
112109 +#define IOC_HDR_MANIP_IPV4_SRC          0x10000000          /**< update IP source address with the given value
112110 +                                                                 ('src' field of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
112111 +#define IOC_HDR_MANIP_IPV4_DST          0x08000000          /**< update IP destination address with the given value
112112 +                                                                 ('dst' field of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
112113 +
112114 +typedef ioc_hdr_manip_flags_t           ioc_ipv6_hdr_manip_update_flags_t;  /**< IPv6 protocol HMan update command flags. */
112115 +
112116 +#define IOC_HDR_MANIP_IPV6_TC           0x80000000          /**< update Traffic Class address with the given value
112117 +                                                                 ('traffic_class' field of ioc_fm_pcd_manip_hdr_field_update_ipv6_t) */
112118 +#define IOC_HDR_MANIP_IPV6_HL           0x40000000          /**< Decrement Hop Limit by 1 */
112119 +#define IOC_HDR_MANIP_IPV6_SRC          0x20000000          /**< update IP source address with the given value
112120 +                                                                 ('src' field of ioc_fm_pcd_manip_hdr_field_update_ipv6_t) */
112121 +#define IOC_HDR_MANIP_IPV6_DST          0x10000000          /**< update IP destination address with the given value
112122 +                                                                 ('dst' field of ioc_fm_pcd_manip_hdr_field_update_ipv6_t) */
112123 +
112124 +typedef ioc_hdr_manip_flags_t           ioc_tcp_udp_hdr_manip_update_flags_t;/**< TCP/UDP protocol HMan update command flags. */
112125 +
112126 +#define IOC_HDR_MANIP_TCP_UDP_SRC       0x80000000          /**< update TCP/UDP source address with the given value
112127 +                                                                 ('src' field of ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t) */
112128 +#define IOC_HDR_MANIP_TCP_UDP_DST       0x40000000          /**< update TCP/UDP destination address with the given value
112129 +                                                                 ('dst' field of ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t) */
112130 +#define IOC_HDR_MANIP_TCP_UDP_CHECKSUM  0x20000000          /**< update TCP/UDP checksum */
112131 +
112132 +/* @} */
112133 +
112134 +/**************************************************************************//**
112135 + @Description   A type used for returning the order of the key extraction.
112136 +                each value in this array represents the index of the extraction
112137 +                command as defined by the user in the initialization extraction array.
112138 +                The valid size of this array is the user define number of extractions
112139 +                required (also marked by the second '0' in this array).
112140 +*//***************************************************************************/
112141 +typedef    uint8_t    ioc_fm_pcd_kg_key_order_t [IOC_FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
112142 +
112143 +/**************************************************************************//**
112144 + @Description   All PCD engines
112145 +                (must match enum e_FmPcdEngine defined in fm_pcd_ext.h)
112146 +*//***************************************************************************/
112147 +typedef enum ioc_fm_pcd_engine {
112148 +    e_IOC_FM_PCD_INVALID = 0,   /**< Invalid PCD engine */
112149 +    e_IOC_FM_PCD_DONE,          /**< No PCD Engine indicated */
112150 +    e_IOC_FM_PCD_KG,            /**< KeyGen */
112151 +    e_IOC_FM_PCD_CC,            /**< Coarse Classifier */
112152 +    e_IOC_FM_PCD_PLCR,          /**< Policer */
112153 +    e_IOC_FM_PCD_PRS,           /**< Parser */
112154 +#if DPAA_VERSION >= 11
112155 +    e_IOC_FM_PCD_FR,            /**< Frame Replicator */
112156 +#endif /* DPAA_VERSION >= 11 */
112157 +    e_IOC_FM_PCD_HASH           /**< Hash Table */
112158 +} ioc_fm_pcd_engine;
112159 +
112160 +/**************************************************************************//**
112161 + @Description   An enum for selecting extraction by header types
112162 +                (Must match enum e_FmPcdExtractByHdrType defined in fm_pcd_ext.h)
112163 +*//***************************************************************************/
112164 +typedef enum ioc_fm_pcd_extract_by_hdr_type {
112165 +    e_IOC_FM_PCD_EXTRACT_FROM_HDR,      /**< Extract bytes from header */
112166 +    e_IOC_FM_PCD_EXTRACT_FROM_FIELD,    /**< Extract bytes from header field */
112167 +    e_IOC_FM_PCD_EXTRACT_FULL_FIELD     /**< Extract a full field */
112168 +} ioc_fm_pcd_extract_by_hdr_type;
112169 +
112170 +/**************************************************************************//**
112171 + @Description   An enum for selecting extraction source (when it is not the header)
112172 +                (Must match enum e_FmPcdExtractFrom defined in fm_pcd_ext.h)
112173 +*//***************************************************************************/
112174 +typedef enum ioc_fm_pcd_extract_from {
112175 +    e_IOC_FM_PCD_EXTRACT_FROM_FRAME_START,          /**< KG & CC: Extract from beginning of frame */
112176 +    e_IOC_FM_PCD_EXTRACT_FROM_DFLT_VALUE,           /**< KG only: Extract from a default value */
112177 +    e_IOC_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE,    /**< KG only: Extract from the point where parsing had finished */
112178 +    e_IOC_FM_PCD_EXTRACT_FROM_KEY,                  /**< CC only: Field where saved KEY */
112179 +    e_IOC_FM_PCD_EXTRACT_FROM_HASH,                 /**< CC only: Field where saved HASH */
112180 +    e_IOC_FM_PCD_EXTRACT_FROM_PARSE_RESULT,         /**< KG & CC: Extract from the parser result */
112181 +    e_IOC_FM_PCD_EXTRACT_FROM_ENQ_FQID,             /**< KG & CC: Extract from enqueue FQID */
112182 +    e_IOC_FM_PCD_EXTRACT_FROM_FLOW_ID               /**< CC only: Field where saved Dequeue FQID */
112183 +} ioc_fm_pcd_extract_from;
112184 +
112185 +/**************************************************************************//**
112186 + @Description   An enum for selecting extraction type
112187 +*//***************************************************************************/
112188 +typedef enum ioc_fm_pcd_extract_type {
112189 +    e_IOC_FM_PCD_EXTRACT_BY_HDR,                /**< Extract according to header */
112190 +    e_IOC_FM_PCD_EXTRACT_NON_HDR,               /**< Extract from data that is not the header */
112191 +    e_IOC_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO   /**< Extract private info as specified by user */
112192 +} ioc_fm_pcd_extract_type;
112193 +
112194 +/**************************************************************************//**
112195 + @Description   An enum for selecting a default
112196 +*//***************************************************************************/
112197 +typedef enum ioc_fm_pcd_kg_extract_dflt_select {
112198 +    e_IOC_FM_PCD_KG_DFLT_GBL_0,          /**< Default selection is KG register 0 */
112199 +    e_IOC_FM_PCD_KG_DFLT_GBL_1,          /**< Default selection is KG register 1 */
112200 +    e_IOC_FM_PCD_KG_DFLT_PRIVATE_0,      /**< Default selection is a per scheme register 0 */
112201 +    e_IOC_FM_PCD_KG_DFLT_PRIVATE_1,      /**< Default selection is a per scheme register 1 */
112202 +    e_IOC_FM_PCD_KG_DFLT_ILLEGAL         /**< Illegal selection */
112203 +} ioc_fm_pcd_kg_extract_dflt_select;
112204 +
112205 +/**************************************************************************//**
112206 + @Description   Enumeration type defining all default groups - each group shares
112207 +                a default value, one of four user-initialized values.
112208 +*//***************************************************************************/
112209 +typedef enum ioc_fm_pcd_kg_known_fields_dflt_types {
112210 +    e_IOC_FM_PCD_KG_MAC_ADDR,               /**< MAC Address */
112211 +    e_IOC_FM_PCD_KG_TCI,                    /**< TCI field */
112212 +    e_IOC_FM_PCD_KG_ENET_TYPE,              /**< ENET Type */
112213 +    e_IOC_FM_PCD_KG_PPP_SESSION_ID,         /**< PPP Session id */
112214 +    e_IOC_FM_PCD_KG_PPP_PROTOCOL_ID,        /**< PPP Protocol id */
112215 +    e_IOC_FM_PCD_KG_MPLS_LABEL,             /**< MPLS label */
112216 +    e_IOC_FM_PCD_KG_IP_ADDR,                /**< IP addr */
112217 +    e_IOC_FM_PCD_KG_PROTOCOL_TYPE,          /**< Protocol type */
112218 +    e_IOC_FM_PCD_KG_IP_TOS_TC,              /**< TOS or TC */
112219 +    e_IOC_FM_PCD_KG_IPV6_FLOW_LABEL,        /**< IPV6 flow label */
112220 +    e_IOC_FM_PCD_KG_IPSEC_SPI,              /**< IPSEC SPI */
112221 +    e_IOC_FM_PCD_KG_L4_PORT,                /**< L4 Port */
112222 +    e_IOC_FM_PCD_KG_TCP_FLAG,               /**< TCP Flag */
112223 +    e_IOC_FM_PCD_KG_GENERIC_FROM_DATA,      /**< grouping implemented by SW,
112224 +                                                 any data extraction that is not the full
112225 +                                                 field described above  */
112226 +    e_IOC_FM_PCD_KG_GENERIC_FROM_DATA_NO_V, /**< grouping implemented by SW,
112227 +                                                 any data extraction without validation */
112228 +    e_IOC_FM_PCD_KG_GENERIC_NOT_FROM_DATA   /**< grouping implemented by SW,
112229 +                                                 extraction from parser result or
112230 +                                                 direct use of default value  */
112231 +} ioc_fm_pcd_kg_known_fields_dflt_types;
112232 +
112233 +/**************************************************************************//**
112234 + @Description   Enumeration type for defining header index for scenarios with
112235 +                multiple (tunneled) headers
112236 +*//***************************************************************************/
112237 +typedef enum ioc_fm_pcd_hdr_index {
112238 +    e_IOC_FM_PCD_HDR_INDEX_NONE     =   0,      /**< used when multiple headers not used, also
112239 +                                                     to specify regular IP (not tunneled). */
112240 +    e_IOC_FM_PCD_HDR_INDEX_1,                   /**< may be used for VLAN, MPLS, tunneled IP */
112241 +    e_IOC_FM_PCD_HDR_INDEX_2,                   /**< may be used for MPLS, tunneled IP */
112242 +    e_IOC_FM_PCD_HDR_INDEX_3,                   /**< may be used for MPLS */
112243 +    e_IOC_FM_PCD_HDR_INDEX_LAST     =   0xFF    /**< may be used for VLAN, MPLS */
112244 +} ioc_fm_pcd_hdr_index;
112245 +
112246 +/**************************************************************************//**
112247 + @Description   Enumeration type for selecting the policer profile functional type
112248 +*//***************************************************************************/
112249 +typedef enum ioc_fm_pcd_profile_type_selection {
112250 +    e_IOC_FM_PCD_PLCR_PORT_PRIVATE,             /**< Port dedicated profile */
112251 +    e_IOC_FM_PCD_PLCR_SHARED                    /**< Shared profile (shared within partition) */
112252 +} ioc_fm_pcd_profile_type_selection;
112253 +
112254 +/**************************************************************************//**
112255 + @Description   Enumeration type for selecting the policer profile algorithm
112256 +*//***************************************************************************/
112257 +typedef enum ioc_fm_pcd_plcr_algorithm_selection {
112258 +    e_IOC_FM_PCD_PLCR_PASS_THROUGH, /**< Policer pass through */
112259 +    e_IOC_FM_PCD_PLCR_RFC_2698,     /**< Policer algorithm RFC 2698 */
112260 +    e_IOC_FM_PCD_PLCR_RFC_4115      /**< Policer algorithm RFC 4115 */
112261 +} ioc_fm_pcd_plcr_algorithm_selection;
112262 +
112263 +/**************************************************************************//**
112264 + @Description   Enumeration type for selecting a policer profile color mode
112265 +*//***************************************************************************/
112266 +typedef enum ioc_fm_pcd_plcr_color_mode {
112267 +    e_IOC_FM_PCD_PLCR_COLOR_BLIND,  /**< Color blind */
112268 +    e_IOC_FM_PCD_PLCR_COLOR_AWARE   /**< Color aware */
112269 +} ioc_fm_pcd_plcr_color_mode;
112270 +
112271 +/**************************************************************************//**
112272 + @Description   Enumeration type for selecting a policer profile color
112273 +*//***************************************************************************/
112274 +typedef enum ioc_fm_pcd_plcr_color {
112275 +    e_IOC_FM_PCD_PLCR_GREEN,    /**< Green */
112276 +    e_IOC_FM_PCD_PLCR_YELLOW,   /**< Yellow */
112277 +    e_IOC_FM_PCD_PLCR_RED,      /**< Red */
112278 +    e_IOC_FM_PCD_PLCR_OVERRIDE  /**< Color override */
112279 +} ioc_fm_pcd_plcr_color;
112280 +
112281 +/**************************************************************************//**
112282 + @Description   Enumeration type for selecting the policer profile packet frame length selector
112283 +*//***************************************************************************/
112284 +typedef enum ioc_fm_pcd_plcr_frame_length_select {
112285 +  e_IOC_FM_PCD_PLCR_L2_FRM_LEN,     /**< L2 frame length */
112286 +  e_IOC_FM_PCD_PLCR_L3_FRM_LEN,     /**< L3 frame length */
112287 +  e_IOC_FM_PCD_PLCR_L4_FRM_LEN,     /**< L4 frame length */
112288 +  e_IOC_FM_PCD_PLCR_FULL_FRM_LEN    /**< Full frame length */
112289 +} ioc_fm_pcd_plcr_frame_length_select;
112290 +
112291 +/**************************************************************************//**
112292 + @Description   Enumeration type for selecting roll-back frame
112293 +*//***************************************************************************/
112294 +typedef enum ioc_fm_pcd_plcr_roll_back_frame_select {
112295 +  e_IOC_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN,    /**< Rollback L2 frame length */
112296 +  e_IOC_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN   /**< Rollback Full frame length */
112297 +} ioc_fm_pcd_plcr_roll_back_frame_select;
112298 +
112299 +/**************************************************************************//**
112300 + @Description   Enumeration type for selecting the policer profile packet or byte mode
112301 +*//***************************************************************************/
112302 +typedef enum ioc_fm_pcd_plcr_rate_mode {
112303 +    e_IOC_FM_PCD_PLCR_BYTE_MODE,    /**< Byte mode */
112304 +    e_IOC_FM_PCD_PLCR_PACKET_MODE   /**< Packet mode */
112305 +} ioc_fm_pcd_plcr_rate_mode;
112306 +
112307 +/**************************************************************************//**
112308 + @Description   Enumeration type for defining action of frame
112309 +*//***************************************************************************/
112310 +typedef enum ioc_fm_pcd_done_action {
112311 +    e_IOC_FM_PCD_ENQ_FRAME = 0,     /**< Enqueue frame */
112312 +    e_IOC_FM_PCD_DROP_FRAME         /**< Drop frame */
112313 +} ioc_fm_pcd_done_action;
112314 +
112315 +/**************************************************************************//**
112316 + @Description   Enumeration type for selecting the policer counter
112317 +*//***************************************************************************/
112318 +typedef enum ioc_fm_pcd_plcr_profile_counters {
112319 +    e_IOC_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER,               /**< Green packets counter */
112320 +    e_IOC_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER,              /**< Yellow packets counter */
112321 +    e_IOC_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER,                 /**< Red packets counter */
112322 +    e_IOC_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER,   /**< Recolored yellow packets counter */
112323 +    e_IOC_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER       /**< Recolored red packets counter */
112324 +} ioc_fm_pcd_plcr_profile_counters;
112325 +
112326 +/**************************************************************************//**
112327 + @Description   Enumeration type for selecting the PCD action after extraction
112328 +*//***************************************************************************/
112329 +typedef enum ioc_fm_pcd_action {
112330 +    e_IOC_FM_PCD_ACTION_NONE,                           /**< NONE  */
112331 +    e_IOC_FM_PCD_ACTION_EXACT_MATCH,                    /**< Exact match on the selected extraction*/
112332 +    e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP                  /**< Indexed lookup on the selected extraction*/
112333 +} ioc_fm_pcd_action;
112334 +
112335 +/**************************************************************************//**
112336 + @Description   Enumeration type for selecting type of insert manipulation
112337 +*//***************************************************************************/
112338 +typedef enum ioc_fm_pcd_manip_hdr_insrt_type {
112339 +    e_IOC_FM_PCD_MANIP_INSRT_GENERIC,                   /**< Insert according to offset & size */
112340 +    e_IOC_FM_PCD_MANIP_INSRT_BY_HDR,                    /**< Insert according to protocol */
112341 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
112342 +    e_IOC_FM_PCD_MANIP_INSRT_BY_TEMPLATE                /**< Insert template to start of frame */
112343 +#endif /* FM_CAPWAP_SUPPORT */
112344 +} ioc_fm_pcd_manip_hdr_insrt_type;
112345 +
112346 +/**************************************************************************//**
112347 + @Description   Enumeration type for selecting type of remove manipulation
112348 +*//***************************************************************************/
112349 +typedef enum ioc_fm_pcd_manip_hdr_rmv_type {
112350 +    e_IOC_FM_PCD_MANIP_RMV_GENERIC,                     /**< Remove according to offset & size */
112351 +    e_IOC_FM_PCD_MANIP_RMV_BY_HDR                       /**< Remove according to offset & size */
112352 +} ioc_fm_pcd_manip_hdr_rmv_type;
112353 +
112354 +/**************************************************************************//**
112355 + @Description   An enum for selecting specific L2 fields removal
112356 +*//***************************************************************************/
112357 +typedef enum ioc_fm_pcd_manip_hdr_rmv_specific_l2 {
112358 +    e_IOC_FM_PCD_MANIP_HDR_RMV_ETHERNET,                /**< Ethernet/802.3 MAC */
112359 +    e_IOC_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS,           /**< stacked QTags */
112360 +    e_IOC_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS,       /**< MPLS and Ethernet/802.3 MAC header until
112361 +                                                             the header which follows the MPLS header */
112362 +    e_IOC_FM_PCD_MANIP_HDR_RMV_MPLS                     /**< Remove MPLS header (Unlimited MPLS labels) */
112363 +} ioc_fm_pcd_manip_hdr_rmv_specific_l2;
112364 +
112365 +/**************************************************************************//**
112366 + @Description   Enumeration type for selecting specific fields updates
112367 +*//***************************************************************************/
112368 +typedef enum ioc_fm_pcd_manip_hdr_field_update_type {
112369 +    e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN,           /**< VLAN updates */
112370 +    e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4,           /**< IPV4 updates */
112371 +    e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6,           /**< IPV6 updates */
112372 +    e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP,        /**< TCP_UDP updates */
112373 +} ioc_fm_pcd_manip_hdr_field_update_type;
112374 +
112375 +/**************************************************************************//**
112376 + @Description   Enumeration type for selecting VLAN updates
112377 +*//***************************************************************************/
112378 +typedef enum ioc_fm_pcd_manip_hdr_field_update_vlan {
112379 +    e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI,      /**< Replace VPri of outer most VLAN tag. */
112380 +    e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN    /**< DSCP to VLAN priority bits translation */
112381 +} ioc_fm_pcd_manip_hdr_field_update_vlan;
112382 +
112383 +/**************************************************************************//**
112384 + @Description   Enumeration type for selecting specific L2 fields removal
112385 +*//***************************************************************************/
112386 +typedef enum ioc_fm_pcd_manip_hdr_insrt_specific_l2 {
112387 +    e_IOC_FM_PCD_MANIP_HDR_INSRT_MPLS                   /**< Insert MPLS header (Unlimited MPLS labels) */
112388 +} ioc_fm_pcd_manip_hdr_insrt_specific_l2;
112389 +
112390 +#if (DPAA_VERSION >= 11)
112391 +/**************************************************************************//**
112392 + @Description   Enumeration type for selecting QoS mapping mode
112393 +
112394 +                Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE'
112395 +                User should instruct the port to read the parser-result
112396 +*//***************************************************************************/
112397 +typedef enum ioc_fm_pcd_manip_hdr_qos_mapping_mode {
112398 +    e_IOC_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE = 0, /**< No mapping, QoS field will not be changed */
112399 +    e_IOC_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS, /**< QoS field will be overwritten by the last byte in the parser-result. */
112400 +} ioc_fm_pcd_manip_hdr_qos_mapping_mode;
112401 +
112402 +/**************************************************************************//**
112403 + @Description   Enumeration type for selecting QoS source
112404 +
112405 +                Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_SRC_NONE'
112406 +                User should left room for the parser-result on input/output buffer
112407 +                and instruct the port to read/write the parser-result to the buffer (RPD should be set)
112408 +*//***************************************************************************/
112409 +typedef enum ioc_fm_pcd_manip_hdr_qos_src {
112410 +    e_IOC_FM_PCD_MANIP_HDR_QOS_SRC_NONE = 0, /**< TODO */
112411 +    e_IOC_FM_PCD_MANIP_HDR_QOS_SRC_USER_DEFINED, /**< QoS will be taken from the last byte in the parser-result. */
112412 +} ioc_fm_pcd_manip_hdr_qos_src;
112413 +#endif /* (DPAA_VERSION >= 11) */
112414 +
112415 +/**************************************************************************//**
112416 + @Description   Enumeration type for selecting type of header insertion
112417 +*//***************************************************************************/
112418 +typedef enum ioc_fm_pcd_manip_hdr_insrt_by_hdr_type {
112419 +    e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2,         /**< Specific L2 fields insertion */
112420 +#if (DPAA_VERSION >= 11)
112421 +    e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_IP,                 /**< IP insertion */
112422 +    e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_UDP,                /**< UDP insertion */
112423 +    e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE,             /**< UDP lite insertion */
112424 +    e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP                 /**< CAPWAP insertion */
112425 +#endif /* (DPAA_VERSION >= 11) */
112426 +} ioc_fm_pcd_manip_hdr_insrt_by_hdr_type;
112427 +
112428 +/**************************************************************************//**
112429 + @Description   Enumeration type for selecting specific custom command
112430 +*//***************************************************************************/
112431 +typedef enum ioc_fm_pcd_manip_hdr_custom_type {
112432 +    e_IOC_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE,           /**< Replace IPv4/IPv6 */
112433 +} ioc_fm_pcd_manip_hdr_custom_type;
112434 +
112435 +/**************************************************************************//**
112436 + @Description   Enumeration type for selecting specific custom command
112437 +*//***************************************************************************/
112438 +typedef enum ioc_fm_pcd_manip_hdr_custom_ip_replace {
112439 +    e_IOC_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6, /**< Replace IPv4 by IPv6 */
112440 +    e_IOC_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4  /**< Replace IPv6 by IPv4 */
112441 +} ioc_fm_pcd_manip_hdr_custom_ip_replace;
112442 +
112443 +/**************************************************************************//**
112444 + @Description   Enumeration type for selecting type of header removal
112445 +*//***************************************************************************/
112446 +typedef enum ioc_fm_pcd_manip_hdr_rmv_by_hdr_type {
112447 +    e_IOC_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2 = 0,       /**< Specific L2 fields removal */
112448 +#if (DPAA_VERSION >= 11)
112449 +    e_IOC_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP,                  /**< CAPWAP removal */
112450 +#endif /* (DPAA_VERSION >= 11) */
112451 +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
112452 +    e_IOC_FM_PCD_MANIP_RMV_BY_HDR_FROM_START,           /**< Locate from data that is not the header */
112453 +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
112454 +} ioc_fm_pcd_manip_hdr_rmv_by_hdr_type;
112455 +
112456 +/**************************************************************************//**
112457 + @Description   Enumeration type for selecting type of timeout mode
112458 +*//***************************************************************************/
112459 +typedef enum ioc_fm_pcd_manip_reassem_time_out_mode {
112460 +    e_IOC_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES,         /**< Limits the time of the reassembly process
112461 +                                                             from the first fragment to the last */
112462 +    e_IOC_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG            /**< Limits the time of receiving the fragment */
112463 +} ioc_fm_pcd_manip_reassem_time_out_mode;
112464 +
112465 +/**************************************************************************//**
112466 + @Description   Enumeration type for selecting type of WaysNumber mode
112467 +*//***************************************************************************/
112468 +typedef enum ioc_fm_pcd_manip_reassem_ways_number {
112469 +    e_IOC_FM_PCD_MANIP_ONE_WAY_HASH = 1,    /**< One way hash    */
112470 +    e_IOC_FM_PCD_MANIP_TWO_WAYS_HASH,       /**< Two ways hash   */
112471 +    e_IOC_FM_PCD_MANIP_THREE_WAYS_HASH,     /**< Three ways hash */
112472 +    e_IOC_FM_PCD_MANIP_FOUR_WAYS_HASH,      /**< Four ways hash  */
112473 +    e_IOC_FM_PCD_MANIP_FIVE_WAYS_HASH,      /**< Five ways hash  */
112474 +    e_IOC_FM_PCD_MANIP_SIX_WAYS_HASH,       /**< Six ways hash   */
112475 +    e_IOC_FM_PCD_MANIP_SEVEN_WAYS_HASH,     /**< Seven ways hash */
112476 +    e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH      /**< Eight ways hash */
112477 +} ioc_fm_pcd_manip_reassem_ways_number;
112478 +
112479 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
112480 +/**************************************************************************//**
112481 + @Description   Enumeration type for selecting type of statistics mode
112482 +*//***************************************************************************/
112483 +typedef enum ioc_fm_pcd_stats {
112484 +    e_IOC_FM_PCD_STATS_PER_FLOWID = 0       /**< Flow ID is used as index for getting statistics */
112485 +} ioc_fm_pcd_stats;
112486 +#endif
112487 +
112488 +/**************************************************************************//**
112489 + @Description   Enumeration type for selecting manipulation type
112490 +*//***************************************************************************/
112491 +typedef enum ioc_fm_pcd_manip_type {
112492 +    e_IOC_FM_PCD_MANIP_HDR = 0,             /**< Header manipulation */
112493 +    e_IOC_FM_PCD_MANIP_REASSEM,             /**< Reassembly */
112494 +    e_IOC_FM_PCD_MANIP_FRAG,                /**< Fragmentation */
112495 +    e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD      /**< Special Offloading */
112496 +} ioc_fm_pcd_manip_type;
112497 +
112498 +/**************************************************************************//**
112499 + @Description   Enumeration type for selecting type of statistics mode
112500 +*//***************************************************************************/
112501 +typedef enum ioc_fm_pcd_cc_stats_mode {
112502 +    e_IOC_FM_PCD_CC_STATS_MODE_NONE = 0,        /**< No statistics support */
112503 +    e_IOC_FM_PCD_CC_STATS_MODE_FRAME,           /**< Frame count statistics */
112504 +    e_IOC_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME,  /**< Byte and frame count statistics */
112505 +#if (DPAA_VERSION >= 11)
112506 +    e_IOC_FM_PCD_CC_STATS_MODE_RMON,            /**< Byte and frame length range count statistics */
112507 +#endif /* (DPAA_VERSION >= 11) */
112508 +} ioc_fm_pcd_cc_stats_mode;
112509 +
112510 +/**************************************************************************//**
112511 + @Description   Enumeration type for determining the action in case an IP packet
112512 +                is larger than MTU but its DF (Don't Fragment) bit is set.
112513 +*//***************************************************************************/
112514 +typedef enum ioc_fm_pcd_manip_dont_frag_action {
112515 +    e_IOC_FM_PCD_MANIP_DISCARD_PACKET = 0,      /**< Discard packet */
112516 +    e_IOC_FM_PCD_MANIP_ENQ_TO_ERR_Q_OR_DISCARD_PACKET =  e_IOC_FM_PCD_MANIP_DISCARD_PACKET,
112517 +                                                /**< Obsolete, cannot enqueue to error queue;
112518 +                                                     In practice, selects to discard packets;
112519 +                                                     Will be removed in the future */
112520 +    e_IOC_FM_PCD_MANIP_FRAGMENT_PACKECT,        /**< Fragment packet and continue normal processing */
112521 +    e_IOC_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG    /**< Continue normal processing without fragmenting the packet */
112522 +} ioc_fm_pcd_manip_dont_frag_action;
112523 +
112524 +/**************************************************************************//**
112525 + @Description   Enumeration type for selecting type of special offload manipulation
112526 +*//***************************************************************************/
112527 +typedef enum ioc_fm_pcd_manip_special_offload_type {
112528 +    e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC,    /**< IPSec offload manipulation */
112529 +#if (DPAA_VERSION >= 11)
112530 +    e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP    /**< CAPWAP offload manipulation */
112531 +#endif /* (DPAA_VERSION >= 11) */
112532 +} ioc_fm_pcd_manip_special_offload_type;
112533 +
112534 +/**************************************************************************//**
112535 + @Description   A union of protocol dependent special options
112536 +                (Must match union u_FmPcdHdrProtocolOpt defined in fm_pcd_ext.h)
112537 +*//***************************************************************************/
112538 +typedef union ioc_fm_pcd_hdr_protocol_opt_u {
112539 +    ioc_eth_protocol_opt_t    eth_opt;     /**< Ethernet options */
112540 +    ioc_vlan_protocol_opt_t   vlan_opt;    /**< Vlan options */
112541 +    ioc_mpls_protocol_opt_t   mpls_opt;    /**< MPLS options */
112542 +    ioc_ipv4_protocol_opt_t   ipv4_opt;    /**< IPv4 options */
112543 +    ioc_ipv6_protocol_opt_t   ipv6_opt;    /**< IPv6 options */
112544 +#if (DPAA_VERSION >= 11)
112545 +    ioc_capwap_protocol_opt_t capwap_opt;  /**< CAPWAP options */
112546 +#endif /* (DPAA_VERSION >= 11) */
112547 +} ioc_fm_pcd_hdr_protocol_opt_u;
112548 +
112549 +/**************************************************************************//**
112550 + @Description   A union holding all known protocol fields
112551 +*//***************************************************************************/
112552 +typedef union ioc_fm_pcd_fields_u {
112553 +    ioc_header_field_eth_t              eth;            /**< Ethernet               */
112554 +    ioc_header_field_vlan_t             vlan;           /**< VLAN                   */
112555 +    ioc_header_field_llc_snap_t         llc_snap;       /**< LLC SNAP               */
112556 +    ioc_header_field_pppoe_t            pppoe;          /**< PPPoE                  */
112557 +    ioc_header_field_mpls_t             mpls;           /**< MPLS                   */
112558 +    ioc_header_field_ip_t               ip;             /**< IP                     */
112559 +    ioc_header_field_ipv4_t             ipv4;           /**< IPv4                   */
112560 +    ioc_header_field_ipv6_t             ipv6;           /**< IPv6                   */
112561 +    ioc_header_field_udp_t              udp;            /**< UDP                    */
112562 +    ioc_header_field_udp_lite_t         udp_lite;       /**< UDP_Lite               */
112563 +    ioc_header_field_tcp_t              tcp;            /**< TCP                    */
112564 +    ioc_header_field_sctp_t             sctp;           /**< SCTP                   */
112565 +    ioc_header_field_dccp_t             dccp;           /**< DCCP                   */
112566 +    ioc_header_field_gre_t              gre;            /**< GRE                    */
112567 +    ioc_header_field_minencap_t         minencap;       /**< Minimal Encapsulation  */
112568 +    ioc_header_field_ipsec_ah_t         ipsec_ah;       /**< IPSec AH               */
112569 +    ioc_header_field_ipsec_esp_t        ipsec_esp;      /**< IPSec ESP              */
112570 +    ioc_header_field_udp_encap_esp_t    udp_encap_esp;  /**< UDP Encapsulation ESP  */
112571 +} ioc_fm_pcd_fields_u;
112572 +
112573 +/**************************************************************************//**
112574 + @Description   Parameters for defining header extraction for key generation
112575 +*//***************************************************************************/
112576 +typedef struct ioc_fm_pcd_from_hdr_t {
112577 +    uint8_t             size;           /**< Size in byte */
112578 +    uint8_t             offset;         /**< Byte offset */
112579 +} ioc_fm_pcd_from_hdr_t;
112580 +
112581 +/**************************************************************************//**
112582 + @Description   Parameters for defining field extraction for key generation
112583 +*//***************************************************************************/
112584 +typedef struct ioc_fm_pcd_from_field_t {
112585 +    ioc_fm_pcd_fields_u field;          /**< Field selection */
112586 +    uint8_t             size;           /**< Size in byte */
112587 +    uint8_t             offset;         /**< Byte offset */
112588 +} ioc_fm_pcd_from_field_t;
112589 +
112590 +/**************************************************************************//**
112591 + @Description   Parameters for defining a single network environment unit
112592 +                A distinction unit should be defined if it will later be used
112593 +                by one or more PCD engines to distinguish between flows.
112594 +                (Must match struct t_FmPcdDistinctionUnit defined in fm_pcd_ext.h)
112595 +*//***************************************************************************/
112596 +typedef struct ioc_fm_pcd_distinction_unit_t {
112597 +    struct {
112598 +        ioc_net_header_type             hdr;                /**< One of the headers supported by the FM */
112599 +        ioc_fm_pcd_hdr_protocol_opt_u   opt;                /**< Select only one option! */
112600 +    } hdrs[IOC_FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
112601 +} ioc_fm_pcd_distinction_unit_t;
112602 +
112603 +/**************************************************************************//**
112604 + @Description   Parameters for defining all different distinction units supported
112605 +                by a specific PCD Network Environment Characteristics module.
112606 +
112607 +                Each unit represent a protocol or a group of protocols that may
112608 +                be used later by the different PCD engines to distinguish between flows.
112609 +                (Must match struct t_FmPcdNetEnvParams defined in fm_pcd_ext.h)
112610 +*//***************************************************************************/
112611 +typedef struct ioc_fm_pcd_net_env_params_t {
112612 +    uint8_t                         num_of_distinction_units;/**< Number of different units to be identified */
112613 +    ioc_fm_pcd_distinction_unit_t   units[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
112614 +                                                            /**< An array of num_of_distinction_units of the
112615 +                                                                     different units to be identified */
112616 +    void                            *id;                    /**< Output parameter; Returns the net-env Id to be used */
112617 +} ioc_fm_pcd_net_env_params_t;
112618 +
112619 +/**************************************************************************//**
112620 + @Description   Parameters for defining a single extraction action when
112621 +                creating a key
112622 +*//***************************************************************************/
112623 +typedef struct ioc_fm_pcd_extract_entry_t {
112624 +    ioc_fm_pcd_extract_type                 type;           /**< Extraction type select */
112625 +    union {
112626 +        struct {
112627 +            ioc_net_header_type             hdr;            /**< Header selection */
112628 +            bool                            ignore_protocol_validation;
112629 +                                                            /**< Ignore protocol validation */
112630 +            ioc_fm_pcd_hdr_index            hdr_index;      /**< Relevant only for MPLS, VLAN and tunneled
112631 +                                                                 IP. Otherwise should be cleared.*/
112632 +            ioc_fm_pcd_extract_by_hdr_type  type;           /**< Header extraction type select */
112633 +            union {
112634 +                ioc_fm_pcd_from_hdr_t       from_hdr;       /**< Extract bytes from header parameters */
112635 +                ioc_fm_pcd_from_field_t     from_field;     /**< Extract bytes from field parameters */
112636 +                ioc_fm_pcd_fields_u         full_field;     /**< Extract full field parameters */
112637 +            } extract_by_hdr_type;
112638 +        } extract_by_hdr;                                   /**< Used when type = e_IOC_FM_PCD_KG_EXTRACT_BY_HDR */
112639 +        struct {
112640 +            ioc_fm_pcd_extract_from         src;            /**< Non-header extraction source */
112641 +            ioc_fm_pcd_action               action;         /**< Relevant for CC Only */
112642 +            uint16_t                        ic_indx_mask;   /**< Relevant only for CC when
112643 +                                                                 action = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP;
112644 +                                                                 Note that the number of bits that are set within
112645 +                                                                 this mask must be log2 of the CC-node 'num_of_keys'.
112646 +                                                                 Note that the mask cannot be set on the lower bits. */
112647 +            uint8_t                         offset;         /**< Byte offset */
112648 +            uint8_t                         size;           /**< Size in bytes */
112649 +        } extract_non_hdr;                                  /**< Used when type = e_IOC_FM_PCD_KG_EXTRACT_NON_HDR */
112650 +    } extract_params;
112651 +} ioc_fm_pcd_extract_entry_t;
112652 +
112653 +/**************************************************************************//**
112654 + @Description   A structure for defining masks for each extracted
112655 +                field in the key.
112656 +*//***************************************************************************/
112657 +typedef struct ioc_fm_pcd_kg_extract_mask_t {
112658 +    uint8_t                extract_array_index;         /**< Index in the extraction array, as initialized by user */
112659 +    uint8_t                offset;                      /**< Byte offset */
112660 +    uint8_t                mask;                        /**< A byte mask (selected bits will be ignored) */
112661 +} ioc_fm_pcd_kg_extract_mask_t;
112662 +
112663 +/**************************************************************************//**
112664 + @Description   A structure for defining default selection per groups
112665 +                of fields
112666 +*//***************************************************************************/
112667 +typedef struct ioc_fm_pcd_kg_extract_dflt_t {
112668 +    ioc_fm_pcd_kg_known_fields_dflt_types    type;          /**< Default type select*/
112669 +    ioc_fm_pcd_kg_extract_dflt_select        dflt_select;   /**< Default register select */
112670 +} ioc_fm_pcd_kg_extract_dflt_t;
112671 +
112672 +
112673 +/**************************************************************************//**
112674 + @Description   A structure for defining all parameters needed for
112675 +                generation a key and using a hash function
112676 +*//***************************************************************************/
112677 +typedef struct ioc_fm_pcd_kg_key_extract_and_hash_params_t {
112678 +    uint32_t                            private_dflt0;          /**< Scheme default register 0 */
112679 +    uint32_t                            private_dflt1;          /**< Scheme default register 1 */
112680 +    uint8_t                             num_of_used_extracts;   /**< defines the valid size of the following array */
112681 +    ioc_fm_pcd_extract_entry_t          extract_array [IOC_FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
112682 +                                                                /**< An array of extraction definitions. */
112683 +    uint8_t                             num_of_used_dflts;      /**< defines the valid size of the following array */
112684 +    ioc_fm_pcd_kg_extract_dflt_t        dflts[IOC_FM_PCD_KG_NUM_OF_DEFAULT_GROUPS];
112685 +                                                                /**< For each extraction used in this scheme, specify the required
112686 +                                                                     default register to be used when header is not found.
112687 +                                                                     types not specified in this array will get undefined value. */
112688 +    uint8_t                             num_of_used_masks;      /**< Defines the valid size of the following array */
112689 +    ioc_fm_pcd_kg_extract_mask_t        masks[IOC_FM_PCD_KG_NUM_OF_EXTRACT_MASKS];
112690 +    uint8_t                             hash_shift;             /**< Hash result right shift.
112691 +                                                                     Selects the 24 bits out of the 64 hash result.
112692 +                                                                     0 means using the 24 LSB's, otherwise use the
112693 +                                                                     24 LSB's after shifting right.*/
112694 +    uint32_t                            hash_distribution_num_of_fqids; /**< must be > 1 and a power of 2. Represents the range
112695 +                                                                             of queues for the key and hash functionality */
112696 +    uint8_t                             hash_distribution_fqids_shift;  /**< selects the FQID bits that will be effected by the hash */
112697 +    bool                                symmetric_hash;         /**< TRUE to generate the same hash for frames with swapped source and
112698 +                                                                     destination fields on all layers; If TRUE, driver will check that for
112699 +                                                                     all layers, if SRC extraction is selected, DST extraction must also be
112700 +                                                                     selected, and vice versa. */
112701 +} ioc_fm_pcd_kg_key_extract_and_hash_params_t;
112702 +
112703 +/**************************************************************************//**
112704 + @Description   A structure of parameters for defining a single
112705 +                Qid mask (extracted OR).
112706 +*//***************************************************************************/
112707 +typedef struct ioc_fm_pcd_kg_extracted_or_params_t {
112708 +    ioc_fm_pcd_extract_type                 type;               /**< Extraction type select */
112709 +    union {
112710 +        struct {                                                 /**< used when type = e_IOC_FM_PCD_KG_EXTRACT_BY_HDR */
112711 +            ioc_net_header_type             hdr;
112712 +            ioc_fm_pcd_hdr_index            hdr_index;          /**< Relevant only for MPLS, VLAN and tunneled
112713 +                                                                     IP. Otherwise should be cleared.*/
112714 +            bool                            ignore_protocol_validation;
112715 +
112716 +        } extract_by_hdr;
112717 +        ioc_fm_pcd_extract_from             src;                /**< used when type = e_IOC_FM_PCD_KG_EXTRACT_NON_HDR */
112718 +    } extract_params;
112719 +    uint8_t                                 extraction_offset;  /**< Offset for extraction */
112720 +    ioc_fm_pcd_kg_extract_dflt_select       dflt_value;         /**< Select register from which extraction is taken if
112721 +                                                                     field not found */
112722 +    uint8_t                                 mask;               /**< Mask LSB byte of extraction (specified bits are ignored) */
112723 +    uint8_t                         bit_offset_in_fqid;    /**< 0-31, Selects which bits of the 24 FQID bits to effect using
112724 +                                                             the extracted byte; Assume byte is placed as the 8 MSB's in
112725 +                                                             a 32 bit word where the lower bits
112726 +                                                             are the FQID; i.e if bitOffsetInFqid=1 than its LSB
112727 +                                                             will effect the FQID MSB, if bitOffsetInFqid=24 than the
112728 +                                                             extracted byte will effect the 8 LSB's of the FQID,
112729 +                                                             if bitOffsetInFqid=31 than the byte's MSB will effect
112730 +                                                             the FQID's LSB; 0 means - no effect on FQID;
112731 +                                                             Note that one, and only one of
112732 +                                                             bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
112733 +                                                             extracted byte must effect either FQID or Policer profile).*/
112734 +    uint8_t                         bit_offset_in_plcr_profile;
112735 +                                                        /**< 0-15, Selects which bits of the 8 policer profile id bits to
112736 +                                                             effect using the extracted byte; Assume byte is placed
112737 +                                                             as the 8 MSB's in a 16 bit word where the lower bits
112738 +                                                             are the policer profile id; i.e if bitOffsetInPlcrProfile=1
112739 +                                                             than its LSB will effect the profile MSB, if bitOffsetInFqid=8
112740 +                                                             than the extracted byte will effect the whole policer profile id,
112741 +                                                             if bitOffsetInFqid=15 than the byte's MSB will effect
112742 +                                                             the Policer Profile id's LSB;
112743 +                                                             0 means - no effect on policer profile; Note that one, and only one of
112744 +                                                             bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
112745 +                                                             extracted byte must effect either FQID or Policer profile).*/
112746 +} ioc_fm_pcd_kg_extracted_or_params_t;
112747 +
112748 +/**************************************************************************//**
112749 + @Description   A structure for configuring scheme counter
112750 +*//***************************************************************************/
112751 +typedef struct ioc_fm_pcd_kg_scheme_counter_t {
112752 +    bool        update;     /**< FALSE to keep the current counter state
112753 +                                 and continue from that point, TRUE to update/reset
112754 +                                 the counter when the scheme is written. */
112755 +    uint32_t    value;      /**< If update=TRUE, this value will be written into the
112756 +                                 counter; clear this field to reset the counter. */
112757 +} ioc_fm_pcd_kg_scheme_counter_t;
112758 +
112759 +
112760 +/**************************************************************************//**
112761 + @Description   A structure for retrieving FMKG_SE_SPC
112762 +*//***************************************************************************/
112763 +typedef struct ioc_fm_pcd_kg_scheme_spc_t {
112764 +    uint32_t    val;       /**< return value */
112765 +    void        *id;       /**< scheme handle */
112766 +} ioc_fm_pcd_kg_scheme_spc_t;
112767 +
112768 +/**************************************************************************//**
112769 + @Description   A structure for defining policer profile parameters as required by keygen
112770 +                (when policer is the next engine after this scheme).
112771 +                (Must match struct t_FmPcdKgPlcrProfile defined in fm_pcd_ext.h)
112772 +*//***************************************************************************/
112773 +typedef struct ioc_fm_pcd_kg_plcr_profile_t {
112774 +    bool                shared_profile;                 /**< TRUE if this profile is shared between ports
112775 +                                                             (i.e. managed by master partition) May not be TRUE
112776 +                                                             if profile is after Coarse Classification*/
112777 +    bool                direct;                         /**< If TRUE, direct_relative_profile_id only selects the profile
112778 +                                                             id, if FALSE fqid_offset_relative_profile_id_base is used
112779 +                                                             together with fqid_offset_shift and num_of_profiles
112780 +                                                             parameters, to define a range of profiles from
112781 +                                                             which the KeyGen result will determine the
112782 +                                                             destination policer profile.  */
112783 +    union {
112784 +        uint16_t        direct_relative_profile_id;     /**< Used if 'direct' is TRUE, to select policer profile.
112785 +                                                             This parameter should indicate the policer profile offset within the port's
112786 +                                                             policer profiles or SHARED window. */
112787 +        struct {
112788 +            uint8_t     fqid_offset_shift;              /**< Shift of KG results without the qid base */
112789 +            uint8_t     fqid_offset_relative_profile_id_base;
112790 +                                                        /**< OR of KG results without the qid base
112791 +                                                             This parameter should indicate the policer profile
112792 +                                                             offset within the port's policer profiles window
112793 +                                                             or SHARED window depends on shared_profile */
112794 +            uint8_t     num_of_profiles;                /**< Range of profiles starting at base */
112795 +        } indirect_profile;                             /**< Indirect profile parameters */
112796 +    } profile_select;                                   /**< Direct/indirect profile selection and parameters */
112797 +} ioc_fm_pcd_kg_plcr_profile_t;
112798 +
112799 +#if DPAA_VERSION >= 11
112800 +/**************************************************************************//**
112801 + @Description   Parameters for configuring a storage profile for a KeyGen scheme.
112802 +*//***************************************************************************/
112803 +typedef struct ioc_fm_pcd_kg_storage_profile_t {
112804 +    bool                direct;                     /**< If TRUE, directRelativeProfileId only selects the
112805 +                                                         profile id;
112806 +                                                         If FALSE, fqidOffsetRelativeProfileIdBase is used
112807 +                                                         together with fqidOffsetShift and numOfProfiles
112808 +                                                         parameters to define a range of profiles from which
112809 +                                                         the KeyGen result will determine the destination
112810 +                                                         storage profile. */
112811 +    union {
112812 +        uint16_t        direct_relative_profileId;    /**< Used when 'direct' is TRUE, to select a storage profile;
112813 +                                                         should indicate the storage profile offset within the
112814 +                                                         port's storage profiles window. */
112815 +        struct {
112816 +            uint8_t     fqid_offset_shift;            /**< Shift of KeyGen results without the FQID base */
112817 +            uint8_t     fqid_offset_relative_profile_id_base;
112818 +                                                    /**< OR of KeyGen results without the FQID base;
112819 +                                                         should indicate the policer profile offset within the
112820 +                                                         port's storage profiles window. */
112821 +            uint8_t     num_of_profiles;              /**< Range of profiles starting at base. */
112822 +        } indirect_profile;                          /**< Indirect profile parameters. */
112823 +    } profile_select;                                /**< Direct/indirect profile selection and parameters. */
112824 +} ioc_fm_pcd_kg_storage_profile_t;
112825 +#endif /* DPAA_VERSION >= 11 */
112826 +
112827 +/**************************************************************************//**
112828 + @Description   Parameters for defining CC as the next engine after KeyGen
112829 +                (Must match struct t_FmPcdKgCc defined in fm_pcd_ext.h)
112830 +*//***************************************************************************/
112831 +typedef struct ioc_fm_pcd_kg_cc_t {
112832 +    void                            *tree_id;           /**< CC Tree id */
112833 +    uint8_t                         grp_id;             /**< CC group id within the CC tree */
112834 +    bool                            plcr_next;          /**< TRUE if after CC, in case of data frame,
112835 +                                                             policing is required. */
112836 +    bool                            bypass_plcr_profile_generation;
112837 +                                                        /**< TRUE to bypass KeyGen policer profile generation;
112838 +                                                             selected profile is the one set at port initialization. */
112839 +    ioc_fm_pcd_kg_plcr_profile_t    plcr_profile;       /**< Valid only if plcr_next = TRUE and
112840 +                                                             bypass_plcr_profile_generation = FALSE */
112841 +} ioc_fm_pcd_kg_cc_t;
112842 +
112843 +/**************************************************************************//**
112844 + @Description   Parameters for defining initializing a KeyGen scheme
112845 +                (Must match struct t_FmPcdKgSchemeParams defined in fm_pcd_ext.h)
112846 +*//***************************************************************************/
112847 +typedef struct ioc_fm_pcd_kg_scheme_params_t {
112848 +    bool                                modify;         /**< TRUE to change an existing scheme */
112849 +    union {
112850 +        uint8_t                         relative_scheme_id;
112851 +                                                        /**< if modify=FALSE: partition-relative scheme id */
112852 +        void                            *scheme_id;     /**< if modify=TRUE: the id of an existing scheme */
112853 +    } scm_id;
112854 +    bool                                always_direct;  /**< This scheme is reached only directly, i.e. no need
112855 +                                                             for match vector; KeyGen will ignore it when matching */
112856 +    struct {                                            /**< HL relevant only if always_direct=FALSE */
112857 +        void                            *net_env_id;    /**< The id of the Network Environment as returned
112858 +                                                             by FM_PCD_NetEnvCharacteristicsSet() */
112859 +        uint8_t                         num_of_distinction_units;
112860 +                                                        /**< Number of NetEnv units listed in unit_ids array */
112861 +        uint8_t                         unit_ids[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
112862 +                                                        /**< Indexes as passed to SetNetEnvCharacteristics (?) array */
112863 +    } net_env_params;
112864 +    bool                                use_hash;       /**< use the KG Hash functionality */
112865 +    ioc_fm_pcd_kg_key_extract_and_hash_params_t key_extract_and_hash_params;
112866 +                                                        /**< used only if useHash = TRUE */
112867 +    bool                                bypass_fqid_generation;
112868 +                                                        /**< Normally - FALSE, TRUE to avoid FQID update in the IC;
112869 +                                                             In such a case FQID after KG will be the default FQID
112870 +                                                             defined for the relevant port, or the FQID defined by CC
112871 +                                                             in cases where CC was the previous engine. */
112872 +    uint32_t                            base_fqid;      /**< Base FQID; Relevant only if bypass_fqid_generation = FALSE;
112873 +                                                             If hash is used and an even distribution is expected
112874 +                                                             according to hash_distribution_num_of_fqids, base_fqid must be aligned to
112875 +                                                             hash_distribution_num_of_fqids. */
112876 +    uint8_t                             num_of_used_extracted_ors;
112877 +                                                        /**< Number of FQID masks listed in extracted_ors array*/
112878 +    ioc_fm_pcd_kg_extracted_or_params_t extracted_ors[IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS];
112879 +                                                        /**< IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS
112880 +                                                             registers are shared between qid_masks
112881 +                                                             functionality and some of the extraction
112882 +                                                             actions; Normally only some will be used
112883 +                                                             for qid_mask. Driver will return error if
112884 +                                                             resource is full at initialization time. */
112885 +#if DPAA_VERSION >= 11
112886 +    bool                                override_storage_profile;
112887 +                                                        /**< TRUE if KeyGen override previously decided storage profile */
112888 +    ioc_fm_pcd_kg_storage_profile_t     storage_profile;/**< Used when override_storage_profile=TRUE */
112889 +#endif /* DPAA_VERSION >= 11 */
112890 +    ioc_fm_pcd_engine                   next_engine;     /**< may be BMI, PLCR or CC */
112891 +    union {                                              /**< depends on nextEngine */
112892 +        ioc_fm_pcd_done_action          done_action;     /**< Used when next engine is BMI (done) */
112893 +        ioc_fm_pcd_kg_plcr_profile_t    plcr_profile;    /**< Used when next engine is PLCR */
112894 +        ioc_fm_pcd_kg_cc_t              cc;              /**< Used when next engine is CC */
112895 +    } kg_next_engine_params;
112896 +    ioc_fm_pcd_kg_scheme_counter_t      scheme_counter;  /**< A structure of parameters for updating
112897 +                                                              the scheme counter */
112898 +    void                                *id;             /**< Returns the scheme Id to be used */
112899 +} ioc_fm_pcd_kg_scheme_params_t;
112900 +
112901 +/**************************************************************************//**
112902 + @Collection
112903 +*//***************************************************************************/
112904 +#if DPAA_VERSION >= 11
112905 +#define IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR      10  /* Maximal supported number of frame length ranges */
112906 +#define IOC_FM_PCD_CC_STATS_FLR_SIZE            2   /* Size in bytes of a frame length range limit */
112907 +#endif /* DPAA_VERSION >= 11 */
112908 +#define IOC_FM_PCD_CC_STATS_FLR_COUNT_SIZE      4   /* Size in bytes of a frame length range counter */
112909 +/* @} */
112910 +
112911 +/**************************************************************************//**
112912 + @Description   Parameters for defining CC as the next engine after a CC node.
112913 +                (Must match struct t_FmPcdCcNextCcParams defined in fm_pcd_ext.h)
112914 +*//***************************************************************************/
112915 +typedef struct ioc_fm_pcd_cc_next_cc_params_t {
112916 +    void        *cc_node_id;                             /**< Id of the next CC node */
112917 +} ioc_fm_pcd_cc_next_cc_params_t;
112918 +
112919 +#if DPAA_VERSION >= 11
112920 +/**************************************************************************//**
112921 + @Description   A structure for defining Frame Replicator as the next engine after a CC node.
112922 +                (Must match struct t_FmPcdCcNextFrParams defined in fm_pcd_ext.h)
112923 +*//***************************************************************************/
112924 +typedef struct ioc_fm_pcd_cc_next_fr_params_t {
112925 +    void*       frm_replic_id;              /**< The id of the next frame replicator group */
112926 +} ioc_fm_pcd_cc_next_fr_params_t;
112927 +#endif /* DPAA_VERSION >= 11 */
112928 +
112929 +/**************************************************************************//**
112930 + @Description   A structure for defining PLCR params when PLCR is the
112931 +                next engine after a CC node
112932 +                (Must match struct t_FmPcdCcNextPlcrParams defined in fm_pcd_ext.h)
112933 +*//***************************************************************************/
112934 +typedef struct ioc_fm_pcd_cc_next_plcr_params_t {
112935 +    bool        override_params;            /**< TRUE if CC override previously decided parameters*/
112936 +    bool        shared_profile;             /**< Relevant only if overrideParams=TRUE:
112937 +                                                TRUE if this profile is shared between ports */
112938 +    uint16_t    new_relative_profile_id;    /**< Relevant only if overrideParams=TRUE:
112939 +                                                (otherwise profile id is taken from keygen);
112940 +                                                This parameter should indicate the policer
112941 +                                                profile offset within the port's
112942 +                                                policer profiles or from SHARED window.*/
112943 +    uint32_t    new_fqid;                   /**< Relevant only if overrideParams=TRUE:
112944 +                                                FQID for enquing the frame;
112945 +                                                In earlier chips  if policer next engine is KEYGEN,
112946 +                                                this parameter can be 0, because the KEYGEN always decides
112947 +                                                the enqueue FQID.*/
112948 +#if DPAA_VERSION >= 11
112949 +    uint8_t     new_relative_storage_profile_id;
112950 +                                            /**< Indicates the relative storage profile offset within
112951 +                                                 the port's storage profiles window;
112952 +                                                 Relevant only if the port was configured with VSP. */
112953 +#endif /* DPAA_VERSION >= 11 */
112954 +} ioc_fm_pcd_cc_next_plcr_params_t;
112955 +
112956 +/**************************************************************************//**
112957 + @Description   A structure for defining enqueue params when BMI is the
112958 +                next engine after a CC node
112959 +                (Must match struct t_FmPcdCcNextEnqueueParams defined in fm_pcd_ext.h)
112960 +*//***************************************************************************/
112961 +typedef struct ioc_fm_pcd_cc_next_enqueue_params_t {
112962 +    ioc_fm_pcd_done_action  action;         /**< Action - when next engine is BMI (done) */
112963 +    bool                    override_fqid;  /**< TRUE if CC override previously decided fqid and vspid,
112964 +                                                 relevant if action = e_IOC_FM_PCD_ENQ_FRAME */
112965 +    uint32_t                new_fqid;       /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
112966 +                                                 (otherwise FQID is taken from KeyGen),
112967 +                                                 relevant if action = e_IOC_FM_PCD_ENQ_FRAME*/
112968 +#if DPAA_VERSION >= 11
112969 +    uint8_t                 new_relative_storage_profile_id;
112970 +                                            /**< Valid if override_fqid=TRUE, Indicates the relative virtual
112971 +                                                 storage profile offset within the port's storage profiles
112972 +                                                 window; Relevant only if the port was configured with VSP. */
112973 +#endif /* DPAA_VERSION >= 11 */
112974 +
112975 +} ioc_fm_pcd_cc_next_enqueue_params_t;
112976 +
112977 +/**************************************************************************//**
112978 + @Description   A structure for defining KG params when KG is the next engine after a CC node
112979 +                (Must match struct t_FmPcdCcNextKgParams defined in fm_pcd_ext.h)
112980 +*//***************************************************************************/
112981 +typedef struct ioc_fm_pcd_cc_next_kg_params_t {
112982 +    bool       override_fqid;               /**< TRUE if CC override previously decided fqid and vspid,
112983 +                                                 Note - this parameters are irrelevant for earlier chips */
112984 +    uint32_t   new_fqid;                    /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
112985 +                                                 (otherwise FQID is taken from KeyGen),
112986 +                                                 Note - this parameters are irrelevant for earlier chips */
112987 +#if DPAA_VERSION >= 11
112988 +    uint8_t              new_relative_storage_profile_id;
112989 +                                            /**< Valid if override_fqid=TRUE, Indicates the relative virtual
112990 +                                                 storage profile offset within the port's storage profiles
112991 +                                                 window; Relevant only if the port was configured with VSP. */
112992 +#endif /* DPAA_VERSION >= 11 */
112993 +    void       *p_direct_scheme;            /**< Direct scheme id to go to. */
112994 +} ioc_fm_pcd_cc_next_kg_params_t;
112995 +
112996 +/**************************************************************************//**
112997 + @Description   Parameters for defining the next engine after a CC node.
112998 +                (Must match struct t_FmPcdCcNextEngineParams defined in fm_pcd_ext.h)
112999 +*//***************************************************************************/
113000 +typedef struct ioc_fm_pcd_cc_next_engine_params_t {
113001 +    ioc_fm_pcd_engine                           next_engine;    /**< User has to initialize parameters
113002 +                                                                     according to nextEngine definition */
113003 +    union {
113004 +            ioc_fm_pcd_cc_next_cc_params_t      cc_params;      /**< Parameters in case next engine is CC */
113005 +            ioc_fm_pcd_cc_next_plcr_params_t    plcr_params;    /**< Parameters in case next engine is PLCR */
113006 +            ioc_fm_pcd_cc_next_enqueue_params_t enqueue_params; /**< Parameters in case next engine is BMI */
113007 +            ioc_fm_pcd_cc_next_kg_params_t      kg_params;      /**< Parameters in case next engine is KG */
113008 +#if DPAA_VERSION >= 11
113009 +            ioc_fm_pcd_cc_next_fr_params_t      fr_params;      /**< Parameters in case next engine is FR */
113010 +#endif /* DPAA_VERSION >= 11 */
113011 +    } params;                                                   /**< Union used for all the next-engine parameters options */
113012 +    void                                        *manip_id;      /**< Handle to Manipulation object.
113013 +                                                                     Relevant if next engine is of type result
113014 +                                                                     (e_IOC_FM_PCD_PLCR, e_IOC_FM_PCD_KG, e_IOC_FM_PCD_DONE) */
113015 +    bool                                        statistics_en;  /**< If TRUE, statistics counters are incremented
113016 +                                                                      for each frame passing through this
113017 +                                                                      Coarse Classification entry. */
113018 +} ioc_fm_pcd_cc_next_engine_params_t;
113019 +
113020 +/**************************************************************************//**
113021 + @Description   Parameters for defining a single CC key
113022 +*//***************************************************************************/
113023 +typedef struct ioc_fm_pcd_cc_key_params_t {
113024 +    uint8_t                 *p_key;         /**< pointer to the key of the size defined in key_size */
113025 +    uint8_t                 *p_mask;        /**< pointer to the Mask per key of the size defined
113026 +                                                 in keySize. p_key and p_mask (if defined) has to be
113027 +                                                 of the same size defined in the key_size */
113028 +    ioc_fm_pcd_cc_next_engine_params_t  cc_next_engine_params;
113029 +                                            /**< parameters for the next for the defined Key in p_key */
113030 +
113031 +} ioc_fm_pcd_cc_key_params_t;
113032 +
113033 +/**************************************************************************//**
113034 + @Description   Parameters for defining CC keys parameters
113035 +                The driver supports two methods for CC node allocation: dynamic and static.
113036 +                Static mode was created in order to prevent runtime alloc/free
113037 +                of FMan memory (MURAM), which may cause fragmentation; in this mode,
113038 +                the driver automatically allocates the memory according to
113039 +                'max_num_of_keys' parameter. The driver calculates the maximal memory
113040 +                size that may be used for this CC-Node taking into consideration
113041 +                'mask_support' and 'statistics_mode' parameters.
113042 +                When 'action' = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP in the extraction
113043 +                parameters of this node, 'max_num_of_keys' must be equal to 'num_of_keys'.
113044 +                In dynamic mode, 'max_num_of_keys' must be zero. At initialization,
113045 +                all required structures are allocated according to 'num_of_keys'
113046 +                parameter. During runtime modification, these structures are
113047 +                re-allocated according to the updated number of keys.
113048 +
113049 +                Please note that 'action' and 'ic_indx_mask' mentioned in the
113050 +                specific parameter explanations are passed in the extraction
113051 +                parameters of the node (fields of extractccparams.extractnonhdr).
113052 +*//***************************************************************************/
113053 +typedef struct ioc_keys_params_t {
113054 +    uint16_t                    max_num_of_keys;/**< Maximum number of keys that will (ever) be used in this CC-Node;
113055 +                                                     A value of zero may be used for dynamic memory allocation. */
113056 +    bool                        mask_support;   /**< This parameter is relevant only if a node is initialized with
113057 +                                                     action = e_IOC_FM_PCD_ACTION_EXACT_MATCH and max_num_of_keys > 0;
113058 +                                                     Should be TRUE to reserve table memory for key masks, even if
113059 +                                                     initial keys do not contain masks, or if the node was initialized
113060 +                                                     as 'empty' (without keys); this will allow user to add keys with
113061 +                                                     masks at runtime. */
113062 +    ioc_fm_pcd_cc_stats_mode    statistics_mode;/**< Determines the supported statistics mode for all node's keys.
113063 +                                                     To enable statistics gathering, statistics should be enabled per
113064 +                                                     every key, using 'statistics_en' in next engine parameters structure
113065 +                                                     of that key;
113066 +                                                     If 'max_num_of_keys' is set, all required structures will be
113067 +                                                     preallocated for all keys. */
113068 +#if (DPAA_VERSION >= 11)
113069 +    uint16_t                    frame_length_ranges[IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
113070 +                                                /**< Relevant only for 'RMON' statistics mode
113071 +                                                     (this feature is supported only on B4860 device);
113072 +                                                     Holds a list of programmable thresholds. For each received frame,
113073 +                                                     its length in bytes is examined against these range thresholds and
113074 +                                                     the appropriate counter is incremented by 1. For example, to belong
113075 +                                                     to range i, the following should hold:
113076 +                                                     range i-1 threshold < frame length <= range i threshold
113077 +                                                     Each range threshold must be larger then its preceding range
113078 +                                                     threshold. Last range threshold must be 0xFFFF. */
113079 +#endif /* (DPAA_VERSION >= 11) */
113080 +    uint16_t                    num_of_keys;    /**< Number of initial keys;
113081 +                                                     Note that in case of 'action' = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP,
113082 +                                                     this field should be power-of-2 of the number of bits that are
113083 +                                                     set in 'ic_indx_mask'. */
113084 +    uint8_t                     key_size;       /**< Size of key - for extraction of type FULL_FIELD, 'key_size' has
113085 +                                                     to be the standard size of the selected key; For other extraction
113086 +                                                     types, 'key_size' has to be as size of extraction; When 'action' =
113087 +                                                     e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP, 'keySize' must be 2. */
113088 +    ioc_fm_pcd_cc_key_params_t  key_params[IOC_FM_PCD_MAX_NUM_OF_KEYS];
113089 +                                                /**< An array with 'num_of_keys' entries, each entry specifies the
113090 +                                                     corresponding key parameters;
113091 +                                                     When 'action' = e_IOC_FM_PCD_ACTION_EXACT_MATCH, this value must not
113092 +                                                     exceed 255 (IOC_FM_PCD_MAX_NUM_OF_KEYS-1) as the last entry is saved
113093 +                                                     for the 'miss' entry. */
113094 +    ioc_fm_pcd_cc_next_engine_params_t  cc_next_engine_params_for_miss;
113095 +                                                /**< Parameters for defining the next engine when a key is not matched;
113096 +                                                     Not relevant if action = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP. */
113097 +} ioc_keys_params_t;
113098 +
113099 +/**************************************************************************//**
113100 + @Description   Parameters for defining a CC node
113101 +*//***************************************************************************/
113102 +typedef struct ioc_fm_pcd_cc_node_params_t {
113103 +    ioc_fm_pcd_extract_entry_t          extract_cc_params;  /**< Extraction parameters */
113104 +    ioc_keys_params_t                   keys_params;        /**< Keys definition matching the selected extraction */
113105 +    void                                *id;                /**< Output parameter; returns the CC node Id to be used */
113106 +} ioc_fm_pcd_cc_node_params_t;
113107 +
113108 +/**************************************************************************//**
113109 + @Description   Parameters for defining a hash table
113110 +                (Must match struct t_FmPcdHashTableParams defined in fm_pcd_ext.h)
113111 +*//***************************************************************************/
113112 +typedef struct ioc_fm_pcd_hash_table_params_t {
113113 +    uint16_t                    max_num_of_keys;            /**< Maximum Number Of Keys that will (ever) be used in this Hash-table */
113114 +    ioc_fm_pcd_cc_stats_mode    statistics_mode;            /**< If not e_IOC_FM_PCD_CC_STATS_MODE_NONE, the required structures for the
113115 +                                                                 requested statistics mode will be allocated according to max_num_of_keys. */
113116 +    uint8_t                     kg_hash_shift;              /**< KG-Hash-shift as it was configured in the KG-scheme
113117 +                                                                 that leads to this hash-table. */
113118 +    uint16_t                    hash_res_mask;              /**< Mask that will be used on the hash-result;
113119 +                                                                 The number-of-sets for this hash will be calculated
113120 +                                                                 as (2^(number of bits set in 'hash_res_mask'));
113121 +                                                                 The 4 lower bits must be cleared. */
113122 +    uint8_t                     hash_shift;                 /**< Byte offset from the beginning of the KeyGen hash result to the
113123 +                                                                 2-bytes to be used as hash index. */
113124 +    uint8_t                     match_key_size;             /**< Size of the exact match keys held by the hash buckets */
113125 +
113126 +    ioc_fm_pcd_cc_next_engine_params_t   cc_next_engine_params_for_miss;
113127 +                                                            /**< Parameters for defining the next engine when a key is not matched */
113128 +    void                        *id;
113129 +} ioc_fm_pcd_hash_table_params_t;
113130 +
113131 +/**************************************************************************//**
113132 + @Description   A structure with the arguments for the FM_PCD_HashTableAddKey ioctl() call
113133 +*//***************************************************************************/
113134 +typedef struct ioc_fm_pcd_hash_table_add_key_params_t {
113135 +    void                        *p_hash_tbl;
113136 +    uint8_t                     key_size;
113137 +    ioc_fm_pcd_cc_key_params_t  key_params;
113138 +} ioc_fm_pcd_hash_table_add_key_params_t;
113139 +
113140 +/**************************************************************************//**
113141 + @Description   Parameters for defining a CC tree group.
113142 +
113143 +                This structure defines a CC group in terms of NetEnv units
113144 +                and the action to be taken in each case. The unit_ids list must
113145 +                be given in order from low to high indices.
113146 +
113147 +                ioc_fm_pcd_cc_next_engine_params_t is a list of 2^num_of_distinction_units
113148 +                structures where each defines the next action to be taken for
113149 +                each units combination. for example:
113150 +                num_of_distinction_units = 2
113151 +                unit_ids = {1,3}
113152 +                next_engine_per_entries_in_grp[0] = ioc_fm_pcd_cc_next_engine_params_t for the case that
113153 +                                                    unit 1 - not found; unit 3 - not found;
113154 +                next_engine_per_entries_in_grp[1] = ioc_fm_pcd_cc_next_engine_params_t for the case that
113155 +                                                    unit 1 - not found; unit 3 - found;
113156 +                next_engine_per_entries_in_grp[2] = ioc_fm_pcd_cc_next_engine_params_t for the case that
113157 +                                                    unit 1 - found; unit 3 - not found;
113158 +                next_engine_per_entries_in_grp[3] = ioc_fm_pcd_cc_next_engine_params_t for the case that
113159 +                                                    unit 1 - found; unit 3 - found;
113160 +*//***************************************************************************/
113161 +typedef struct ioc_fm_pcd_cc_grp_params_t {
113162 +    uint8_t                             num_of_distinction_units;   /**< Up to 4 */
113163 +    uint8_t                             unit_ids [IOC_FM_PCD_MAX_NUM_OF_CC_UNITS];
113164 +                                                                    /**< Indexes of the units as defined in
113165 +                                                                         FM_PCD_NetEnvCharacteristicsSet() */
113166 +    ioc_fm_pcd_cc_next_engine_params_t  next_engine_per_entries_in_grp[IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP];
113167 +                                                                    /**< Maximum entries per group is 16 */
113168 +} ioc_fm_pcd_cc_grp_params_t;
113169 +
113170 +/**************************************************************************//**
113171 + @Description   Parameters for defining the CC tree groups
113172 +                (Must match struct t_FmPcdCcTreeParams defined in fm_pcd_ext.h)
113173 +*//***************************************************************************/
113174 +typedef struct ioc_fm_pcd_cc_tree_params_t {
113175 +        void                            *net_env_id;    /**< Id of the Network Environment as returned
113176 +                                                             by FM_PCD_NetEnvCharacteristicsSet() */
113177 +        uint8_t                         num_of_groups;  /**< Number of CC groups within the CC tree */
113178 +        ioc_fm_pcd_cc_grp_params_t      fm_pcd_cc_group_params [IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS];
113179 +                                                        /**< Parameters for each group. */
113180 +        void                            *id;            /**< Output parameter; Returns the tree Id to be used */
113181 +} ioc_fm_pcd_cc_tree_params_t;
113182 +
113183 +/**************************************************************************//**
113184 + @Description   Parameters for defining policer byte rate
113185 +*//***************************************************************************/
113186 +typedef struct ioc_fm_pcd_plcr_byte_rate_mode_param_t {
113187 +    ioc_fm_pcd_plcr_frame_length_select     frame_length_selection;     /**< Frame length selection */
113188 +    ioc_fm_pcd_plcr_roll_back_frame_select  roll_back_frame_selection;  /**< relevant option only e_IOC_FM_PCD_PLCR_L2_FRM_LEN,
113189 +                                                                             e_IOC_FM_PCD_PLCR_FULL_FRM_LEN */
113190 +} ioc_fm_pcd_plcr_byte_rate_mode_param_t;
113191 +
113192 +/**************************************************************************//**
113193 + @Description   Parameters for defining the policer profile (based on
113194 +                RFC-2698 or RFC-4115 attributes).
113195 +*//***************************************************************************/
113196 +typedef struct ioc_fm_pcd_plcr_non_passthrough_alg_param_t {
113197 +    ioc_fm_pcd_plcr_rate_mode               rate_mode;                      /**< Byte / Packet */
113198 +    ioc_fm_pcd_plcr_byte_rate_mode_param_t  byte_mode_param;                /**< Valid for Byte NULL for Packet */
113199 +    uint32_t                                committed_info_rate;            /**< KBits/Sec or Packets/Sec */
113200 +    uint32_t                                committed_burst_size;           /**< KBits or Packets */
113201 +    uint32_t                                peak_or_excess_info_rate;       /**< KBits/Sec or Packets/Sec */
113202 +    uint32_t                                peak_or_excess_burst_size;      /**< KBits or Packets */
113203 +} ioc_fm_pcd_plcr_non_passthrough_alg_param_t;
113204 +
113205 +/**************************************************************************//**
113206 + @Description   Parameters for defining the next engine after policer
113207 +*//***************************************************************************/
113208 +typedef union ioc_fm_pcd_plcr_next_engine_params_u {
113209 +        ioc_fm_pcd_done_action     action;              /**< Action - when next engine is BMI (done) */
113210 +        void                       *p_profile;          /**< Policer profile handle -  used when next engine
113211 +                                                             is PLCR, must be a SHARED profile */
113212 +        void                       *p_direct_scheme;    /**< Direct scheme select - when next engine is Keygen */
113213 +} ioc_fm_pcd_plcr_next_engine_params_u;
113214 +
113215 +typedef struct ioc_fm_pcd_port_params_t {
113216 +    ioc_fm_port_type                    port_type;          /**< Type of port for this profile */
113217 +    uint8_t                             port_id;            /**< FM-Port id of port for this profile */
113218 +} ioc_fm_pcd_port_params_t;
113219 +
113220 +/**************************************************************************//**
113221 + @Description   Parameters for defining the policer profile entry
113222 +                (Must match struct t_FmPcdPlcrProfileParams defined in fm_pcd_ext.h)
113223 +*//***************************************************************************/
113224 +typedef struct ioc_fm_pcd_plcr_profile_params_t {
113225 +    bool                                        modify;                     /**< TRUE to change an existing profile */
113226 +    union {
113227 +        struct {
113228 +            ioc_fm_pcd_profile_type_selection   profile_type;               /**< Type of policer profile */
113229 +            ioc_fm_pcd_port_params_t            *p_fm_port;                 /**< Relevant for per-port profiles only */
113230 +            uint16_t                            relative_profile_id;        /**< Profile id - relative to shared group or to port */
113231 +        } new_params;                                                       /**< Use it when modify = FALSE */
113232 +        void                                    *p_profile;                 /**< A handle to a profile - use it when modify=TRUE */
113233 +    } profile_select;
113234 +    ioc_fm_pcd_plcr_algorithm_selection         alg_selection;              /**< Profile Algorithm PASS_THROUGH, RFC_2698, RFC_4115 */
113235 +    ioc_fm_pcd_plcr_color_mode                  color_mode;                 /**< COLOR_BLIND, COLOR_AWARE */
113236 +
113237 +    union {
113238 +        ioc_fm_pcd_plcr_color                   dflt_color;                 /**< For Color-Blind Pass-Through mode; the policer will re-color
113239 +                                                                                 any incoming packet with the default value. */
113240 +        ioc_fm_pcd_plcr_color                   override;                   /**< For Color-Aware modes; the profile response to a
113241 +                                                                                 pre-color value of 2'b11. */
113242 +    } color;
113243 +
113244 +    ioc_fm_pcd_plcr_non_passthrough_alg_param_t non_passthrough_alg_param;  /**< RFC2698 or RFC4115 parameters */
113245 +
113246 +    ioc_fm_pcd_engine                           next_engine_on_green;       /**< Next engine for green-colored frames */
113247 +    ioc_fm_pcd_plcr_next_engine_params_u        params_on_green;            /**< Next engine parameters for green-colored frames  */
113248 +
113249 +    ioc_fm_pcd_engine                           next_engine_on_yellow;      /**< Next engine for yellow-colored frames */
113250 +    ioc_fm_pcd_plcr_next_engine_params_u        params_on_yellow;           /**< Next engine parameters for yellow-colored frames  */
113251 +
113252 +    ioc_fm_pcd_engine                           next_engine_on_red;         /**< Next engine for red-colored frames */
113253 +    ioc_fm_pcd_plcr_next_engine_params_u        params_on_red;              /**< Next engine parameters for red-colored frames  */
113254 +
113255 +    bool                                        trap_profile_on_flow_A;     /**< Obsolete - do not use */
113256 +    bool                                        trap_profile_on_flow_B;     /**< Obsolete - do not use */
113257 +    bool                                        trap_profile_on_flow_C;     /**< Obsolete - do not use */
113258 +
113259 +    void                                        *id;                        /**< output parameter; Returns the profile Id to be used */
113260 +} ioc_fm_pcd_plcr_profile_params_t;
113261 +
113262 +/**************************************************************************//**
113263 + @Description   A structure for modifying CC tree next engine
113264 +*//***************************************************************************/
113265 +typedef struct ioc_fm_pcd_cc_tree_modify_next_engine_params_t {
113266 +    void                                *id;                /**< CC tree Id to be used */
113267 +    uint8_t                             grp_indx;           /**< A Group index in the tree */
113268 +    uint8_t                             indx;               /**< Entry index in the group defined by grp_index */
113269 +    ioc_fm_pcd_cc_next_engine_params_t  cc_next_engine_params;
113270 +                                                            /**< Parameters for the next for the defined Key in the p_Key */
113271 +} ioc_fm_pcd_cc_tree_modify_next_engine_params_t;
113272 +
113273 +/**************************************************************************//**
113274 + @Description   A structure for modifying CC node next engine
113275 +*//***************************************************************************/
113276 +typedef struct ioc_fm_pcd_cc_node_modify_next_engine_params_t {
113277 +    void                                *id;                /**< CC node Id to be used */
113278 +    uint16_t                            key_indx;           /**< Key index for Next Engine Params modifications;
113279 +                                                                 NOTE: This parameter is IGNORED for miss-key!  */
113280 +    uint8_t                             key_size;           /**< Key size of added key */
113281 +    ioc_fm_pcd_cc_next_engine_params_t  cc_next_engine_params;
113282 +                                                            /**< parameters for the next for the defined Key in the p_Key */
113283 +} ioc_fm_pcd_cc_node_modify_next_engine_params_t;
113284 +
113285 +/**************************************************************************//**
113286 + @Description   A structure for remove CC node key
113287 +*//***************************************************************************/
113288 +typedef struct ioc_fm_pcd_cc_node_remove_key_params_t {
113289 +    void                                *id;                /**< CC node Id to be used */
113290 +    uint16_t                            key_indx;           /**< Key index for Next Engine Params modifications;
113291 +                                                                 NOTE: This parameter is IGNORED for miss-key!  */
113292 +} ioc_fm_pcd_cc_node_remove_key_params_t;
113293 +
113294 +/**************************************************************************//**
113295 + @Description   A structure for modifying CC node key and next engine
113296 +*//***************************************************************************/
113297 +typedef struct ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t {
113298 +    void                                *id;                /**< CC node Id to be used */
113299 +    uint16_t                            key_indx;           /**< Key index for Next Engine Params modifications;
113300 +                                                                 NOTE: This parameter is IGNORED for miss-key!  */
113301 +    uint8_t                             key_size;           /**< Key size of added key */
113302 +    ioc_fm_pcd_cc_key_params_t          key_params;         /**< it's array with numOfKeys entries each entry in
113303 +                                                                 the array of the type ioc_fm_pcd_cc_key_params_t */
113304 +} ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t;
113305 +
113306 +/**************************************************************************//**
113307 + @Description   A structure for modifying CC node key
113308 +*//***************************************************************************/
113309 +typedef struct ioc_fm_pcd_cc_node_modify_key_params_t {
113310 +    void                                *id;                /**< CC node Id to be used */
113311 +    uint16_t                            key_indx;           /**< Key index for Next Engine Params modifications;
113312 +                                                                 NOTE: This parameter is IGNORED for miss-key!  */
113313 +    uint8_t                             key_size;           /**< Key size of added key */
113314 +    uint8_t                             *p_key;             /**< Pointer to the key of the size defined in key_size */
113315 +    uint8_t                             *p_mask;            /**< Pointer to the Mask per key of the size defined
113316 +                                                                 in keySize. p_Key and p_Mask (if defined) have to be
113317 +                                                                 of the same size as defined in the key_size */
113318 +} ioc_fm_pcd_cc_node_modify_key_params_t;
113319 +
113320 +/**************************************************************************//**
113321 + @Description   A structure with the arguments for the FM_PCD_HashTableRemoveKey ioctl() call
113322 +*//***************************************************************************/
113323 +typedef struct ioc_fm_pcd_hash_table_remove_key_params_t {
113324 +    void       *p_hash_tbl;     /**< The id of the hash table */
113325 +    uint8_t     key_size;       /**< The size of the key to remove */
113326 +    uint8_t    *p_key;          /**< Pointer to the key to remove */
113327 +} ioc_fm_pcd_hash_table_remove_key_params_t;
113328 +
113329 +/**************************************************************************//**
113330 + @Description   Parameters for selecting a location for requested manipulation
113331 +*//***************************************************************************/
113332 +typedef struct ioc_fm_manip_hdr_info_t {
113333 +    ioc_net_header_type                 hdr;            /**< Header selection */
113334 +    ioc_fm_pcd_hdr_index                hdr_index;      /**< Relevant only for MPLS, VLAN and tunneled IP. Otherwise should be cleared. */
113335 +    bool                                by_field;       /**< TRUE if the location of manipulation is according to some field in the specific header*/
113336 +    ioc_fm_pcd_fields_u                 full_field;     /**< Relevant only when by_field = TRUE: Extract field */
113337 +} ioc_fm_manip_hdr_info_t;
113338 +
113339 +/**************************************************************************//**
113340 + @Description   Parameters for defining header removal by header type
113341 +*//***************************************************************************/
113342 +typedef struct ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t {
113343 +    ioc_fm_pcd_manip_hdr_rmv_by_hdr_type        type;  /**< Selection of header removal location */
113344 +    union {
113345 +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
113346 +        struct {
113347 +            bool                                include;/**< If FALSE, remove until the specified header (not including the header);
113348 +                                                             If TRUE, remove also the specified header. */
113349 +            ioc_fm_manip_hdr_info_t             hdr_info;
113350 +        } from_start_by_hdr;                           /**< Relevant when type = e_IOC_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
113351 +#endif /* FM_CAPWAP_SUPPORT */
113352 +#if (DPAA_VERSION >= 11)
113353 +        ioc_fm_manip_hdr_info_t                hdr_info;        /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
113354 +#endif /* (DPAA_VERSION >= 11) */
113355 +        ioc_fm_pcd_manip_hdr_rmv_specific_l2    specific_l2;/**< Relevant when type = e_IOC_FM_PCD_MANIP_BY_HDR_SPECIFIC_L2;
113356 +                                                                 Defines which L2 headers to remove. */
113357 +    } u;
113358 +} ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t;
113359 +
113360 +/**************************************************************************//**
113361 + @Description   Parameters for configuring IP fragmentation manipulation
113362 +*//***************************************************************************/
113363 +typedef struct ioc_fm_pcd_manip_frag_ip_params_t {
113364 +    uint16_t                    size_for_fragmentation;     /**< If length of the frame is greater than this value,
113365 +                                                                 IP fragmentation will be executed.*/
113366 +#if DPAA_VERSION == 10
113367 +    uint8_t                     scratch_bpid;               /**< Absolute buffer pool id according to BM configuration.*/
113368 +#endif /* DPAA_VERSION == 10 */
113369 +    bool                        sg_bpid_en;                 /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
113370 +                                                                 If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
113371 +                                                                 received frame's buffer. */
113372 +    uint8_t                     sg_bpid;                    /**< Scatter/Gather buffer pool id;
113373 +                                                                 This parameter is relevant when 'sg_bpid_en=TRUE';
113374 +                                                                 Same LIODN number is used for these buffers as for the received frames buffers, so buffers
113375 +                                                                 of this pool need to be allocated in the same memory area as the received buffers.
113376 +                                                                 If the received buffers arrive from different sources, the Scatter/Gather BP id should be
113377 +                                                                 mutual to all these sources. */
113378 +    ioc_fm_pcd_manip_dont_frag_action  dont_frag_action;    /**< Dont Fragment Action - If an IP packet is larger
113379 +                                                                 than MTU and its DF bit is set, then this field will
113380 +                                                                 determine the action to be taken.*/
113381 +} ioc_fm_pcd_manip_frag_ip_params_t;
113382 +
113383 +/**************************************************************************//**
113384 + @Description   Parameters for configuring IP reassembly manipulation.
113385 +
113386 +                This is a common structure for both IPv4 and IPv6 reassembly
113387 +                manipulation. For reassembly of both IPv4 and IPv6, make sure to
113388 +                set the 'hdr' field in ioc_fm_pcd_manip_reassem_params_t to IOC_HEADER_TYPE_IPv6.
113389 +*//***************************************************************************/
113390 +typedef struct ioc_fm_pcd_manip_reassem_ip_params_t {
113391 +    uint8_t                         relative_scheme_id[2];    /**< Partition relative scheme id:
113392 +                                                                 relativeSchemeId[0] -  Relative scheme ID for IPV4 Reassembly manipulation;
113393 +                                                                 relativeSchemeId[1] -  Relative scheme ID for IPV6 Reassembly manipulation;
113394 +                                                                 NOTE: The following comment is relevant only for FMAN v2 devices:
113395 +                                                                 Relative scheme ID for IPv4/IPv6 Reassembly manipulation must be smaller than
113396 +                                                                 the user schemes id to ensure that the reassembly's schemes will be first match.
113397 +                                                                 The remaining schemes, if defined, should have higher relative scheme ID. */
113398 +#if DPAA_VERSION >= 11
113399 +    uint32_t                        non_consistent_sp_fqid; /**< In case that other fragments of the frame corresponds to different storage
113400 +                                                                 profile than the opening fragment (Non-Consistent-SP state)
113401 +                                                                 then one of two possible scenarios occurs:
113402 +                                                                 if 'nonConsistentSpFqid != 0', the reassembled frame will be enqueued to
113403 +                                                                 this fqid, otherwise a 'Non Consistent SP' bit will be set in the FD[status].*/
113404 +#else
113405 +    uint8_t                         sg_bpid;                /**< Buffer pool id for the S/G frame created by the reassembly process */
113406 +#endif /* DPAA_VERSION >= 11 */
113407 +    uint8_t                         data_mem_id;            /**< Memory partition ID for the IPR's external tables structure */
113408 +    uint16_t                        data_liodn_offset;      /**< LIODN offset for access the IPR's external tables structure. */
113409 +    uint16_t                        min_frag_size[2];       /**< Minimum fragment size:
113410 +                                                                 minFragSize[0] - for ipv4, minFragSize[1] - for ipv6 */
113411 +    ioc_fm_pcd_manip_reassem_ways_number   num_of_frames_per_hash_entry[2];
113412 +                                                            /**< Number of frames per hash entry needed for reassembly process:
113413 +                                                                 numOfFramesPerHashEntry[0] - for ipv4 (max value is e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH);
113414 +                                                                 numOfFramesPerHashEntry[1] - for ipv6 (max value is e_IOC_FM_PCD_MANIP_SIX_WAYS_HASH). */
113415 +    uint16_t                        max_num_frames_in_process;/**< Number of frames which can be processed by Reassembly in the same time;
113416 +                                                                 Must be power of 2;
113417 +                                                                 In the case numOfFramesPerHashEntry == e_IOC_FM_PCD_MANIP_FOUR_WAYS_HASH,
113418 +                                                                 maxNumFramesInProcess has to be in the range of 4 - 512;
113419 +                                                                 In the case numOfFramesPerHashEntry == e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH,
113420 +                                                                 maxNumFramesInProcess has to be in the range of 8 - 2048. */
113421 +    ioc_fm_pcd_manip_reassem_time_out_mode  time_out_mode;  /**< Expiration delay initialized by Reassembly process */
113422 +    uint32_t                        fqid_for_time_out_frames;/**< FQID in which time out frames will enqueue during Time Out Process  */
113423 +    uint32_t                        timeout_threshold_for_reassm_process;
113424 +                                                            /**< Represents the time interval in microseconds which defines
113425 +                                                                 if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
113426 +} ioc_fm_pcd_manip_reassem_ip_params_t;
113427 +
113428 +/**************************************************************************//**
113429 + @Description   Parameters for defining IPSEC manipulation
113430 +*//***************************************************************************/
113431 +typedef struct ioc_fm_pcd_manip_special_offload_ipsec_params_t {
113432 +    bool    decryption;                     /**< TRUE if being used in decryption direction;
113433 +                                                 FALSE if being used in encryption direction. */
113434 +    bool    ecn_copy;                       /**< TRUE to copy the ECN bits from inner/outer to outer/inner
113435 +                                                 (direction depends on the 'decryption' field). */
113436 +    bool    dscp_copy;                      /**< TRUE to copy the DSCP bits from inner/outer to outer/inner
113437 +                                                 (direction depends on the 'decryption' field). */
113438 +    bool    variable_ip_hdr_len;            /**< TRUE for supporting variable IP header length in decryption. */
113439 +    bool    variable_ip_version;            /**< TRUE for supporting both IP version on the same SA in encryption */
113440 +    uint8_t outer_ip_hdr_len;               /**< If 'variable_ip_version == TRUE' than this field must be set to non-zero value;
113441 +                                                 It is specifies the length of the outer IP header that was configured in the
113442 +                                                 corresponding SA. */
113443 +    uint16_t    arw_size;                   /**< if <> '0' then will perform ARW check for this SA;
113444 +                                                 The value must be a multiplication of 16 */
113445 +    void    *arw_addr;                      /**< if arwSize <> '0' then this field must be set to non-zero value;
113446 +                                                 MUST be allocated from FMAN's MURAM that the post-sec op-port belong
113447 +                                                 Must be 4B aligned. Required MURAM size is '(NEXT_POWER_OF_2(arwSize+32))/8+4' Bytes */
113448 +} ioc_fm_pcd_manip_special_offload_ipsec_params_t;
113449 +
113450 +#if (DPAA_VERSION >= 11)
113451 +/**************************************************************************//**
113452 + @Description   Parameters for configuring CAPWAP fragmentation manipulation
113453 +
113454 + Restrictions:
113455 +     - Maximum number of fragments per frame is 16.
113456 +     - Transmit confirmation is not supported.
113457 +     - Fragmentation nodes must be set as the last PCD action (i.e. the
113458 +       corresponding CC node key must have next engine set to e_FM_PCD_DONE).
113459 +     - Only BMan buffers shall be used for frames to be fragmented.
113460 +     - NOTE: The following comment is relevant only for FMAN v3 devices: IPF
113461 +       does not support VSP. Therefore, on the same port where we have IPF we
113462 +       cannot support VSP.
113463 +*//***************************************************************************/
113464 +typedef struct ioc_fm_pcd_manip_frag_capwap_params_t {
113465 +    uint16_t                    size_for_fragmentation;   /**< If length of the frame is greater than this value,
113466 +                                                             CAPWAP fragmentation will be executed.*/
113467 +    bool                        sg_bpid_en;               /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
113468 +                                                             If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
113469 +                                                             received frame's buffer. */
113470 +    uint8_t                     sg_bpid;                 /**< Scatter/Gather buffer pool id;
113471 +                                                             This parameters is relevant when 'sgBpidEn=TRUE';
113472 +                                                             Same LIODN number is used for these buffers as for the received frames buffers, so buffers
113473 +                                                             of this pool need to be allocated in the same memory area as the received buffers.
113474 +                                                             If the received buffers arrive from different sources, the Scatter/Gather BP id should be
113475 +                                                             mutual to all these sources. */
113476 +    bool                        compress_mode_en;         /**< CAPWAP Header Options Compress Enable mode;
113477 +                                                             When this mode is enabled then only the first fragment include the CAPWAP header options
113478 +                                                             field (if user provides it in the input frame) and all other fragments exclude the CAPWAP
113479 +                                                             options field (CAPWAP header is updated accordingly).*/
113480 +} ioc_fm_pcd_manip_frag_capwap_params_t;
113481 +
113482 +/**************************************************************************//**
113483 + @Description   Parameters for configuring CAPWAP reassembly manipulation.
113484 +
113485 + Restrictions:
113486 +    - Application must define one scheme to catch the reassembled frames.
113487 +    - Maximum number of fragments per frame is 16.
113488 +
113489 +*//***************************************************************************/
113490 +typedef struct ioc_fm_pcd_manip_reassem_capwap_params_t {
113491 +    uint8_t                         relative_scheme_id;    /**< Partition relative scheme id;
113492 +                                                                 NOTE: this id must be smaller than the user schemes id to ensure that the reassembly scheme will be first match;
113493 +                                                                 Rest schemes, if defined, should have higher relative scheme ID. */
113494 +    uint8_t                         data_mem_id;              /**< Memory partition ID for the IPR's external tables structure */
113495 +    uint16_t                        data_liodn_offset;        /**< LIODN offset for access the IPR's external tables structure. */
113496 +    uint16_t                        max_reassembled_frame_length;/**< The maximum CAPWAP reassembled frame length in bytes;
113497 +                                                                   If maxReassembledFrameLength == 0, any successful reassembled frame length is
113498 +                                                                   considered as a valid length;
113499 +                                                                   if maxReassembledFrameLength > 0, a successful reassembled frame which its length
113500 +                                                                   exceeds this value is considered as an error frame (FD status[CRE] bit is set). */
113501 +    ioc_fm_pcd_manip_reassem_ways_number   num_of_frames_per_hash_entry;
113502 +                                                            /**< Number of frames per hash entry needed for reassembly process */
113503 +    uint16_t                        max_num_frames_in_process;  /**< Number of frames which can be processed by reassembly in the same time;
113504 +                                                                 Must be power of 2;
113505 +                                                                 In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
113506 +                                                                 maxNumFramesInProcess has to be in the range of 4 - 512;
113507 +                                                                 In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
113508 +                                                                 maxNumFramesInProcess has to be in the range of 8 - 2048. */
113509 +    ioc_fm_pcd_manip_reassem_time_out_mode  time_out_mode;            /**< Expiration delay initialized by Reassembly process */
113510 +    uint32_t                        fqid_for_time_out_frames;   /**< FQID in which time out frames will enqueue during Time Out Process;
113511 +                                                                 Recommended value for this field is 0; in this way timed-out frames will be discarded */
113512 +    uint32_t                        timeout_threshold_for_reassm_process;
113513 +                                                            /**< Represents the time interval in microseconds which defines
113514 +                                                                 if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
113515 +} ioc_fm_pcd_manip_reassem_capwap_params_t;
113516 +
113517 +/**************************************************************************//**
113518 + @Description   structure for defining CAPWAP manipulation
113519 +*//***************************************************************************/
113520 +typedef struct ioc_fm_pcd_manip_special_offload_capwap_params_t {
113521 +    bool                    dtls;   /**< TRUE if continue to SEC DTLS encryption */
113522 +    ioc_fm_pcd_manip_hdr_qos_src   qos_src; /**< TODO */
113523 +} ioc_fm_pcd_manip_special_offload_capwap_params_t;
113524 +
113525 +#endif /* (DPAA_VERSION >= 11) */
113526 +
113527 +/**************************************************************************//**
113528 + @Description   Parameters for defining special offload manipulation
113529 +*//***************************************************************************/
113530 +typedef struct ioc_fm_pcd_manip_special_offload_params_t {
113531 +    ioc_fm_pcd_manip_special_offload_type               type;       /**< Type of special offload manipulation */
113532 +    union
113533 +    {
113534 +        ioc_fm_pcd_manip_special_offload_ipsec_params_t ipsec;      /**< Parameters for IPSec; Relevant when
113535 +                                                                         type = e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC */
113536 +
113537 +#if (DPAA_VERSION >= 11)
113538 +        ioc_fm_pcd_manip_special_offload_capwap_params_t  capwap;     /**< Parameters for CAPWAP; Relevant when
113539 +                                                                type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP */
113540 +#endif /* (DPAA_VERSION >= 11) */
113541 +    } u;
113542 +} ioc_fm_pcd_manip_special_offload_params_t;
113543 +
113544 +/**************************************************************************//**
113545 + @Description   Parameters for defining generic removal manipulation
113546 +*//***************************************************************************/
113547 +typedef struct ioc_fm_pcd_manip_hdr_rmv_generic_params_t {
113548 +    uint8_t                         offset;         /**< Offset from beginning of header to the start
113549 +                                                         location of the removal */
113550 +    uint8_t                         size;           /**< Size of removed section */
113551 +} ioc_fm_pcd_manip_hdr_rmv_generic_params_t;
113552 +
113553 +/**************************************************************************//**
113554 + @Description   Parameters for defining insertion manipulation
113555 +*//***************************************************************************/
113556 +typedef struct ioc_fm_pcd_manip_hdr_insrt_t {
113557 +    uint8_t size;           /**< size of inserted section */
113558 +    uint8_t *p_data;        /**< data to be inserted */
113559 +} ioc_fm_pcd_manip_hdr_insrt_t;
113560 +
113561 +/**************************************************************************//**
113562 + @Description   Parameters for defining generic insertion manipulation
113563 +*//***************************************************************************/
113564 +typedef struct ioc_fm_pcd_manip_hdr_insrt_generic_params_t {
113565 +    uint8_t                         offset;         /**< Offset from beginning of header to the start
113566 +                                                         location of the insertion */
113567 +    uint8_t                         size;           /**< Size of inserted section */
113568 +    bool                            replace;        /**< TRUE to override (replace) existing data at
113569 +                                                         'offset', FALSE to insert */
113570 +    uint8_t                         *p_data;        /**< Pointer to data to be inserted */
113571 +} ioc_fm_pcd_manip_hdr_insrt_generic_params_t;
113572 +
113573 +/**************************************************************************//**
113574 + @Description   Parameters for defining header manipulation VLAN DSCP To Vpri translation
113575 +*//***************************************************************************/
113576 +typedef struct ioc_fm_pcd_manip_hdr_field_update_vlan_dscp_to_vpri_t {
113577 +    uint8_t                         dscp_to_vpri_table[IOC_FM_PCD_MANIP_DSCP_TO_VLAN_TRANS];
113578 +                                                    /**< A table of VPri values for each DSCP value;
113579 +                                                         The index is the D_SCP value (0-0x3F) and the
113580 +                                                         value is the corresponding VPRI (0-15). */
113581 +    uint8_t                         vpri_def_val;   /**< 0-7, Relevant only if if update_type =
113582 +                                                         e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN,
113583 +                                                         this field is the Q Tag default value if the
113584 +                                                         IP header is not found. */
113585 +} ioc_fm_pcd_manip_hdr_field_update_vlan_dscp_to_vpri_t;
113586 +
113587 +/**************************************************************************//**
113588 + @Description   Parameters for defining header manipulation VLAN fields updates
113589 +*//***************************************************************************/
113590 +typedef struct ioc_fm_pcd_manip_hdr_field_update_vlan_t {
113591 +    ioc_fm_pcd_manip_hdr_field_update_vlan  update_type;    /**< Selects VLAN update type */
113592 +    union {
113593 +        uint8_t                                     vpri;   /**< 0-7, Relevant only if If update_type =
113594 +                                                                 e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_PRI, this
113595 +                                                                 is the new VLAN pri. */
113596 +        ioc_fm_pcd_manip_hdr_field_update_vlan_dscp_to_vpri_t    dscp_to_vpri;
113597 +                                                            /**<  Parameters structure, Relevant only if update_type =
113598 +                                                                  e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN. */
113599 +    } u;
113600 +} ioc_fm_pcd_manip_hdr_field_update_vlan_t;
113601 +
113602 +/**************************************************************************//**
113603 + @Description   Parameters for defining header manipulation IPV4 fields updates
113604 +*//***************************************************************************/
113605 +typedef struct ioc_fm_pcd_manip_hdr_field_update_ipv4_t {
113606 +    ioc_ipv4_hdr_manip_update_flags_t       valid_updates;  /**< ORed flag, selecting the required updates */
113607 +    uint8_t                                 tos;            /**< 8 bit New TOS; Relevant if valid_updates contains
113608 +                                                                 IOC_HDR_MANIP_IPV4_TOS */
113609 +    uint16_t                                id;             /**< 16 bit New IP ID; Relevant only if valid_updates
113610 +                                                                 contains IOC_HDR_MANIP_IPV4_ID */
113611 +    uint32_t                                src;            /**< 32 bit New IP SRC; Relevant only if valid_updates
113612 +                                                                 contains IOC_HDR_MANIP_IPV4_SRC */
113613 +    uint32_t                                dst;            /**< 32 bit New IP DST; Relevant only if valid_updates
113614 +                                                                 contains IOC_HDR_MANIP_IPV4_DST */
113615 +} ioc_fm_pcd_manip_hdr_field_update_ipv4_t;
113616 +
113617 +/**************************************************************************//**
113618 + @Description   Parameters for defining header manipulation IPV6 fields updates
113619 +*//***************************************************************************/
113620 +typedef struct ioc_fm_pcd_manip_hdr_field_update_ipv6_t {
113621 +    ioc_ipv6_hdr_manip_update_flags_t       valid_updates;  /**< ORed flag, selecting the required updates */
113622 +    uint8_t                                 traffic_class;  /**< 8 bit New Traffic Class; Relevant if valid_updates contains
113623 +                                                                 IOC_HDR_MANIP_IPV6_TC */
113624 +    uint8_t                                 src[IOC_NET_HEADER_FIELD_IPv6_ADDR_SIZE];
113625 +                                                            /**< 16 byte new IP SRC; Relevant only if valid_updates
113626 +                                                                 contains IOC_HDR_MANIP_IPV6_SRC */
113627 +    uint8_t                                 dst[IOC_NET_HEADER_FIELD_IPv6_ADDR_SIZE];
113628 +                                                            /**< 16 byte new IP DST; Relevant only if valid_updates
113629 +                                                                 contains IOC_HDR_MANIP_IPV6_DST */
113630 +} ioc_fm_pcd_manip_hdr_field_update_ipv6_t;
113631 +
113632 +/**************************************************************************//**
113633 + @Description   Parameters for defining header manipulation TCP/UDP fields updates
113634 +*//***************************************************************************/
113635 +typedef struct ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t {
113636 +    ioc_tcp_udp_hdr_manip_update_flags_t    valid_updates;  /**< ORed flag, selecting the required updates */
113637 +    uint16_t                                src;            /**< 16 bit New TCP/UDP SRC; Relevant only if valid_updates
113638 +                                                                 contains IOC_HDR_MANIP_TCP_UDP_SRC */
113639 +    uint16_t                                dst;            /**< 16 bit New TCP/UDP DST; Relevant only if valid_updates
113640 +                                                                 contains IOC_HDR_MANIP_TCP_UDP_DST */
113641 +} ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t;
113642 +
113643 +/**************************************************************************//**
113644 + @Description   Parameters for defining header manipulation fields updates
113645 +*//***************************************************************************/
113646 +typedef struct ioc_fm_pcd_manip_hdr_field_update_params_t {
113647 +    ioc_fm_pcd_manip_hdr_field_update_type          type;   /**< Type of header field update manipulation */
113648 +    union {
113649 +        ioc_fm_pcd_manip_hdr_field_update_vlan_t    vlan;   /**< Parameters for VLAN update. Relevant when
113650 +                                                                 type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN */
113651 +        ioc_fm_pcd_manip_hdr_field_update_ipv4_t    ipv4;   /**< Parameters for IPv4 update. Relevant when
113652 +                                                                 type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4 */
113653 +        ioc_fm_pcd_manip_hdr_field_update_ipv6_t    ipv6;   /**< Parameters for IPv6 update. Relevant when
113654 +                                                                 type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6 */
113655 +        ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t tcp_udp;/**< Parameters for TCP/UDP update. Relevant when
113656 +                                                                 type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP */
113657 +    } u;
113658 +} ioc_fm_pcd_manip_hdr_field_update_params_t;
113659 +
113660 +/**************************************************************************//**
113661 + @Description   Parameters for defining custom header manipulation for IP replacement
113662 +*//***************************************************************************/
113663 +typedef struct ioc_fm_pcd_manip_hdr_custom_ip_hdr_replace_t {
113664 +    ioc_fm_pcd_manip_hdr_custom_ip_replace  replace_type;   /**< Selects replace update type */
113665 +    bool                                    dec_ttl_hl;     /**< Decrement TTL (IPV4) or Hop limit (IPV6) by 1 */
113666 +    bool                                    update_ipv4_id; /**< Relevant when replace_type =
113667 +                                                                 e_IOC_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 */
113668 +    uint16_t                                id;             /**< 16 bit New IP ID; Relevant only if
113669 +                                                                 update_ipv4_id = TRUE */
113670 +    uint8_t                                 hdr_size;       /**< The size of the new IP header */
113671 +    uint8_t                                 hdr[IOC_FM_PCD_MANIP_MAX_HDR_SIZE];
113672 +                                                            /**< The new IP header */
113673 +} ioc_fm_pcd_manip_hdr_custom_ip_hdr_replace_t;
113674 +
113675 +/**************************************************************************//**
113676 + @Description   Parameters for defining custom header manipulation
113677 +*//***************************************************************************/
113678 +typedef struct ioc_fm_pcd_manip_hdr_custom_params_t {
113679 +    ioc_fm_pcd_manip_hdr_custom_type                type;   /**< Type of header field update manipulation */
113680 +    union {
113681 +        ioc_fm_pcd_manip_hdr_custom_ip_hdr_replace_t    ip_hdr_replace;
113682 +                                                            /**< Parameters IP header replacement */
113683 +    } u;
113684 +} ioc_fm_pcd_manip_hdr_custom_params_t;
113685 +
113686 +/**************************************************************************//**
113687 + @Description   Parameters for defining specific L2 insertion manipulation
113688 +*//***************************************************************************/
113689 +typedef struct ioc_fm_pcd_manip_hdr_insrt_specific_l2_params_t {
113690 +    ioc_fm_pcd_manip_hdr_insrt_specific_l2  specific_l2;    /**< Selects which L2 headers to insert */
113691 +    bool                                    update;         /**< TRUE to update MPLS header */
113692 +    uint8_t                                 size;           /**< size of inserted section */
113693 +    uint8_t                                *p_data;         /**< data to be inserted */
113694 +} ioc_fm_pcd_manip_hdr_insrt_specific_l2_params_t;
113695 +
113696 +#if (DPAA_VERSION >= 11)
113697 +/**************************************************************************//**
113698 + @Description   Parameters for defining IP insertion manipulation
113699 +*//***************************************************************************/
113700 +typedef struct ioc_fm_pcd_manip_hdr_insrt_ip_params_t {
113701 +    bool    calc_l4_checksum; /**< Calculate L4 checksum. */
113702 +    ioc_fm_pcd_manip_hdr_qos_mapping_mode   mapping_mode; /**< TODO */
113703 +    uint8_t last_pid_offset;     /**< the offset of the last Protocol within
113704 +                                 the inserted header */
113705 +    uint16_t  id;           /**< 16 bit New IP ID */
113706 +    bool                            dont_frag_overwrite;
113707 +    /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte.
113708 +     * This byte is configured to be overwritten when RPD is set. */
113709 +    uint8_t                         last_dst_offset;
113710 +    /**< IPv6 only. if routing extension exist, user should set the offset of the destination address
113711 +     * in order to calculate UDP checksum pseudo header;
113712 +     * Otherwise set it to '0'. */
113713 +    ioc_fm_pcd_manip_hdr_insrt_t insrt; /**< size and data to be inserted. */
113714 +} ioc_fm_pcd_manip_hdr_insrt_ip_params_t;
113715 +#endif /* (DPAA_VERSION >= 11) */
113716 +
113717 +/**************************************************************************//**
113718 + @Description   Parameters for defining header insertion manipulation by header type
113719 +*//***************************************************************************/
113720 +typedef struct ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t {
113721 +    ioc_fm_pcd_manip_hdr_insrt_by_hdr_type          type;   /**< Selects manipulation type */
113722 +    union {
113723 +       ioc_fm_pcd_manip_hdr_insrt_specific_l2_params_t  specific_l2_params;
113724 +                                                            /**< Used when type = e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2:
113725 +                                                                 Selects which L2 headers to remove */
113726 +#if (DPAA_VERSION >= 11)
113727 +        ioc_fm_pcd_manip_hdr_insrt_ip_params_t      ip_params;  /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_IP */
113728 +        ioc_fm_pcd_manip_hdr_insrt_t                insrt;     /**< Used when type is one of e_FM_PCD_MANIP_INSRT_BY_HDR_UDP,
113729 +                                                                e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, or
113730 +                                                                e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP */
113731 +#endif /* (DPAA_VERSION >= 11) */
113732 +    } u;
113733 +} ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t;
113734 +
113735 +/**************************************************************************//**
113736 + @Description   Parameters for defining header insertion manipulation
113737 +*//***************************************************************************/
113738 +typedef struct ioc_fm_pcd_manip_hdr_insrt_params_t {
113739 +    ioc_fm_pcd_manip_hdr_insrt_type                     type;   /**< Type of insertion manipulation */
113740 +    union {
113741 +        ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t      by_hdr; /**< Parameters for defining header insertion manipulation by header type,
113742 +                                                                     relevant if 'type' = e_IOC_FM_PCD_MANIP_INSRT_BY_HDR */
113743 +        ioc_fm_pcd_manip_hdr_insrt_generic_params_t     generic;/**< Parameters for defining generic header insertion manipulation,
113744 +                                                                     relevant if type = e_IOC_FM_PCD_MANIP_INSRT_GENERIC */
113745 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
113746 +        ioc_fm_pcd_manip_hdr_insrt_by_template_params_t by_template;
113747 +                                                                /**< Parameters for defining header insertion manipulation by template,
113748 +                                                                     relevant if 'type' = e_IOC_FM_PCD_MANIP_INSRT_BY_TEMPLATE */
113749 +#endif /* FM_CAPWAP_SUPPORT */
113750 +    } u;
113751 +} ioc_fm_pcd_manip_hdr_insrt_params_t;
113752 +
113753 +/**************************************************************************//**
113754 + @Description   Parameters for defining header removal manipulation
113755 +*//***************************************************************************/
113756 +typedef struct ioc_fm_pcd_manip_hdr_rmv_params_t {
113757 +    ioc_fm_pcd_manip_hdr_rmv_type                  type;       /**< Type of header removal manipulation */
113758 +    union {
113759 +        ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t   by_hdr;     /**< Parameters for defining header removal manipulation by header type,
113760 +                                                                    relevant if type = e_IOC_FM_PCD_MANIP_RMV_BY_HDR */
113761 +        ioc_fm_pcd_manip_hdr_rmv_generic_params_t  generic;    /**< Parameters for defining generic header removal manipulation,
113762 +                                                                    relevant if type = e_IOC_FM_PCD_MANIP_RMV_GENERIC */
113763 +    } u;
113764 +} ioc_fm_pcd_manip_hdr_rmv_params_t;
113765 +
113766 +/**************************************************************************//**
113767 + @Description   Parameters for defining header manipulation node
113768 +*//***************************************************************************/
113769 +typedef struct ioc_fm_pcd_manip_hdr_params_t {
113770 +    bool                                        rmv;                  /**< TRUE, to define removal manipulation */
113771 +    ioc_fm_pcd_manip_hdr_rmv_params_t           rmv_params;           /**< Parameters for removal manipulation, relevant if 'rmv' = TRUE */
113772 +
113773 +    bool                                        insrt;                /**< TRUE, to define insertion manipulation */
113774 +    ioc_fm_pcd_manip_hdr_insrt_params_t         insrt_params;         /**< Parameters for insertion manipulation, relevant if 'insrt' = TRUE */
113775 +
113776 +    bool                                        field_update;         /**< TRUE, to define field update manipulation */
113777 +    ioc_fm_pcd_manip_hdr_field_update_params_t  field_update_params;  /**< Parameters for field update manipulation, relevant if 'fieldUpdate' = TRUE */
113778 +
113779 +    bool                                        custom;               /**< TRUE, to define custom manipulation */
113780 +    ioc_fm_pcd_manip_hdr_custom_params_t        custom_params;        /**< Parameters for custom manipulation, relevant if 'custom' = TRUE */
113781 +
113782 +    bool                                        dont_parse_after_manip;/**< FALSE to activate the parser a second time after
113783 +                                                                            completing the manipulation on the frame */
113784 +} ioc_fm_pcd_manip_hdr_params_t;
113785 +
113786 +
113787 +/**************************************************************************//**
113788 + @Description   structure for defining fragmentation manipulation
113789 +*//***************************************************************************/
113790 +typedef struct ioc_fm_pcd_manip_frag_params_t {
113791 +    ioc_net_header_type                     hdr;            /**< Header selection */
113792 +    union {
113793 +#if (DPAA_VERSION >= 11)
113794 +        ioc_fm_pcd_manip_frag_capwap_params_t    capwap_frag;   /**< Parameters for defining CAPWAP fragmentation,
113795 +                                                           relevant if 'hdr' = HEADER_TYPE_CAPWAP */
113796 +#endif /* (DPAA_VERSION >= 11) */
113797 +        ioc_fm_pcd_manip_frag_ip_params_t   ip_frag;        /**< Parameters for defining IP fragmentation,
113798 +                                                                 relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
113799 +    } u;
113800 +} ioc_fm_pcd_manip_frag_params_t;
113801 +
113802 +/**************************************************************************//**
113803 + @Description   structure for defining reassemble manipulation
113804 +*//***************************************************************************/
113805 +typedef struct ioc_fm_pcd_manip_reassem_params_t {
113806 +    ioc_net_header_type                         hdr;        /**< Header selection */
113807 +    union {
113808 +#if (DPAA_VERSION >= 11)
113809 +        ioc_fm_pcd_manip_reassem_capwap_params_t capwap_reassem;  /**< Parameters for defining CAPWAP reassembly,
113810 +                                                           relevant if 'hdr' = HEADER_TYPE_CAPWAP */
113811 +#endif /* (DPAA_VERSION >= 11) */
113812 +        ioc_fm_pcd_manip_reassem_ip_params_t    ip_reassem; /**< Parameters for defining IP reassembly,
113813 +                                                                 relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
113814 +    } u;
113815 +} ioc_fm_pcd_manip_reassem_params_t;
113816 +
113817 +/**************************************************************************//**
113818 + @Description   Parameters for defining a manipulation node
113819 +*//***************************************************************************/
113820 +typedef struct ioc_fm_pcd_manip_params_t {
113821 +    ioc_fm_pcd_manip_type                           type;   /**< Selects type of manipulation node */
113822 +    union {
113823 +        ioc_fm_pcd_manip_hdr_params_t               hdr;    /**< Parameters for defining header manipulation node */
113824 +        ioc_fm_pcd_manip_reassem_params_t           reassem;/**< Parameters for defining reassembly manipulation node */
113825 +        ioc_fm_pcd_manip_frag_params_t              frag;   /**< Parameters for defining fragmentation manipulation node */
113826 +        ioc_fm_pcd_manip_special_offload_params_t   special_offload;/**< Parameters for defining special offload manipulation node */
113827 +    } u;
113828 +    void                                            *p_next_manip;/**< Handle to another (previously defined) manipulation node;
113829 +                                                                 Allows concatenation of manipulation actions
113830 +                                                                 This parameter is optional and may be NULL. */
113831 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
113832 +    bool                                            frag_or_reasm;/**< TRUE, if defined fragmentation/reassembly manipulation */
113833 +    ioc_fm_pcd_manip_frag_or_reasm_params_t         frag_or_reasm_params;/**< Parameters for fragmentation/reassembly manipulation,
113834 +                                                                            relevant if frag_or_reasm = TRUE */
113835 +#endif /* FM_CAPWAP_SUPPORT */
113836 +    void                                           *id;
113837 +} ioc_fm_pcd_manip_params_t;
113838 +
113839 +/**************************************************************************//**
113840 + @Description   Structure for retrieving IP reassembly statistics
113841 +*//***************************************************************************/
113842 +typedef struct ioc_fm_pcd_manip_reassem_ip_stats_t {
113843 +    /* common counters for both IPv4 and IPv6 */
113844 +    uint32_t    timeout;                        /**< Counts the number of TimeOut occurrences */
113845 +    uint32_t    rfd_pool_busy;                    /**< Counts the number of failed attempts to allocate
113846 +                                                     a Reassembly Frame Descriptor */
113847 +    uint32_t    internal_buffer_busy;             /**< Counts the number of times an internal buffer busy occurred */
113848 +    uint32_t    external_buffer_busy;             /**< Counts the number of times external buffer busy occurred */
113849 +    uint32_t    sg_fragments;                    /**< Counts the number of Scatter/Gather fragments */
113850 +    uint32_t    dma_semaphore_depletion;          /**< Counts the number of failed attempts to allocate a DMA semaphore */
113851 +#if (DPAA_VERSION >= 11)
113852 +    uint32_t        non_consistent_sp;            /**< Counts the number of Non Consistent Storage Profile events for
113853 +                                                     successfully reassembled frames */
113854 +#endif /* (DPAA_VERSION >= 11) */
113855 +struct {
113856 +        uint32_t    successfully_reassembled;    /**< Counts the number of successfully reassembled frames */
113857 +        uint32_t    valid_fragments;             /**< Counts the total number of valid fragments that
113858 +                                                     have been processed for all frames */
113859 +        uint32_t    processed_fragments;         /**< Counts the number of processed fragments
113860 +                                                     (valid and error fragments) for all frames */
113861 +        uint32_t    malformed_fragments;         /**< Counts the number of malformed fragments processed for all frames */
113862 +        uint32_t    discarded_fragments;         /**< Counts the number of fragments discarded by the reassembly process */
113863 +        uint32_t    auto_learn_busy;              /**< Counts the number of times a busy condition occurs when attempting
113864 +                                                     to access an IP-Reassembly Automatic Learning Hash set */
113865 +        uint32_t    more_than16fragments;        /**< Counts the fragment occurrences in which the number of fragments-per-frame
113866 +                                                     exceeds 16 */
113867 +    } specific_hdr_statistics[2];                 /**< slot '0' is for IPv4, slot '1' is for IPv6 */
113868 +} ioc_fm_pcd_manip_reassem_ip_stats_t;
113869 +
113870 +/**************************************************************************//**
113871 + @Description   Structure for retrieving IP fragmentation statistics
113872 +*//***************************************************************************/
113873 +typedef struct ioc_fm_pcd_manip_frag_ip_stats_t {
113874 +    uint32_t    total_frames;            /**< Number of frames that passed through the manipulation node */
113875 +    uint32_t    fragmented_frames;       /**< Number of frames that were fragmented */
113876 +    uint32_t    generated_fragments;     /**< Number of fragments that were generated */
113877 +} ioc_fm_pcd_manip_frag_ip_stats_t;
113878 +
113879 +#if (DPAA_VERSION >= 11)
113880 +/**************************************************************************//**
113881 + @Description   Structure for retrieving CAPWAP reassembly statistics
113882 +*//***************************************************************************/
113883 +typedef struct ioc_fm_pcd_manip_reassem_capwap_stats_t {
113884 +    uint32_t    timeout;                    /**< Counts the number of timeout occurrences */
113885 +    uint32_t    rfd_pool_busy;                /**< Counts the number of failed attempts to allocate
113886 +                                                 a Reassembly Frame Descriptor */
113887 +    uint32_t    internal_buffer_busy;         /**< Counts the number of times an internal buffer busy occurred */
113888 +    uint32_t    external_buffer_busy;         /**< Counts the number of times external buffer busy occurred */
113889 +    uint32_t    sg_fragments;                /**< Counts the number of Scatter/Gather fragments */
113890 +    uint32_t    dma_semaphore_depletion;      /**< Counts the number of failed attempts to allocate a DMA semaphore */
113891 +    uint32_t    successfully_reassembled;    /**< Counts the number of successfully reassembled frames */
113892 +    uint32_t    valid_fragments;             /**< Counts the total number of valid fragments that
113893 +                                                 have been processed for all frames */
113894 +    uint32_t    processed_fragments;         /**< Counts the number of processed fragments
113895 +                                                 (valid and error fragments) for all frames */
113896 +    uint32_t    malformed_fragments;         /**< Counts the number of malformed fragments processed for all frames */
113897 +    uint32_t    autoLearn_busy;              /**< Counts the number of times a busy condition occurs when attempting
113898 +                                                 to access an Reassembly Automatic Learning Hash set */
113899 +    uint32_t    discarded_fragments;         /**< Counts the number of fragments discarded by the reassembly process */
113900 +    uint32_t    more_than16fragments;        /**< Counts the fragment occurrences in which the number of fragments-per-frame
113901 +                                                 exceeds 16 */
113902 +    uint32_t    exceed_max_reassembly_frame_len;/**< ounts the number of times that a successful reassembled frame
113903 +                                                 length exceeds MaxReassembledFrameLength value */
113904 +} ioc_fm_pcd_manip_reassem_capwap_stats_t;
113905 +
113906 +/**************************************************************************//**
113907 + @Description   Structure for retrieving CAPWAP fragmentation statistics
113908 +*//***************************************************************************/
113909 +typedef struct ioc_fm_pcd_manip_frag_capwap_stats_t {
113910 +    uint32_t    total_frames;            /**< Number of frames that passed through the manipulation node */
113911 +    uint32_t    fragmented_frames;       /**< Number of frames that were fragmented */
113912 +    uint32_t    generated_fragments;     /**< Number of fragments that were generated */
113913 +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
113914 +    uint8_t     sg_allocation_failure;    /**< Number of allocation failure of s/g buffers */
113915 +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
113916 +} ioc_fm_pcd_manip_frag_capwap_stats_t;
113917 +#endif /* (DPAA_VERSION >= 11) */
113918 +
113919 +/**************************************************************************//**
113920 + @Description   Structure for retrieving reassembly statistics
113921 +*//***************************************************************************/
113922 +typedef struct ioc_fm_pcd_manip_reassem_stats_t {
113923 +    union {
113924 +        ioc_fm_pcd_manip_reassem_ip_stats_t  ip_reassem;  /**< Structure for IP reassembly statistics */
113925 +#if (DPAA_VERSION >= 11)
113926 +        ioc_fm_pcd_manip_reassem_capwap_stats_t  capwap_reassem;  /**< Structure for CAPWAP reassembly statistics */
113927 +#endif /* (DPAA_VERSION >= 11) */
113928 +    } u;
113929 +} ioc_fm_pcd_manip_reassem_stats_t;
113930 +
113931 +/**************************************************************************//**
113932 + @Description   structure for retrieving fragmentation statistics
113933 +*//***************************************************************************/
113934 +typedef struct ioc_fm_pcd_manip_frag_stats_t {
113935 +    union {
113936 +        ioc_fm_pcd_manip_frag_ip_stats_t     ip_frag;     /**< Structure for IP fragmentation statistics */
113937 +#if (DPAA_VERSION >= 11)
113938 +        ioc_fm_pcd_manip_frag_capwap_stats_t capwap_frag; /**< Structure for CAPWAP fragmentation statistics */
113939 +#endif /* (DPAA_VERSION >= 11) */
113940 +    } u;
113941 +} ioc_fm_pcd_manip_frag_stats_t;
113942 +
113943 +/**************************************************************************//**
113944 + @Description   structure for defining manipulation statistics
113945 +*//***************************************************************************/
113946 +typedef struct ioc_fm_pcd_manip_stats_t {
113947 +    union {
113948 +        ioc_fm_pcd_manip_reassem_stats_t  reassem;    /**< Structure for reassembly statistics */
113949 +        ioc_fm_pcd_manip_frag_stats_t     frag;       /**< Structure for fragmentation statistics */
113950 +    } u;
113951 +} ioc_fm_pcd_manip_stats_t;
113952 +
113953 +/**************************************************************************//**
113954 + @Description   Parameters for acquiring manipulation statistics
113955 +*//***************************************************************************/
113956 +typedef struct ioc_fm_pcd_manip_get_stats_t {
113957 +       void                            *id;
113958 +       ioc_fm_pcd_manip_stats_t        stats;
113959 +} ioc_fm_pcd_manip_get_stats_t;
113960 +
113961 +#if DPAA_VERSION >= 11
113962 +/**************************************************************************//**
113963 + @Description   Parameters for defining frame replicator group and its members
113964 +*//***************************************************************************/
113965 +typedef struct ioc_fm_pcd_frm_replic_group_params_t {
113966 +    uint8_t                     max_num_of_entries;    /**< Maximal number of members in the group  - must be at least two */
113967 +    uint8_t                     num_of_entries;       /**< Number of members in the group - must be at least 1 */
113968 +    ioc_fm_pcd_cc_next_engine_params_t   next_engine_params[IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES];
113969 +                                                    /**< Array of members' parameters */
113970 +    void                        *id;
113971 +} ioc_fm_pcd_frm_replic_group_params_t;
113972 +
113973 +typedef struct ioc_fm_pcd_frm_replic_member_t {
113974 +    void *h_replic_group;
113975 +    uint16_t member_index;
113976 +} ioc_fm_pcd_frm_replic_member_t;
113977 +
113978 +typedef struct ioc_fm_pcd_frm_replic_member_params_t {
113979 +    ioc_fm_pcd_frm_replic_member_t member;
113980 +    ioc_fm_pcd_cc_next_engine_params_t next_engine_params;
113981 +} ioc_fm_pcd_frm_replic_member_params_t;
113982 +#endif /* DPAA_VERSION >= 11 */
113983 +
113984 +
113985 +typedef struct ioc_fm_pcd_cc_key_statistics_t {
113986 +    uint32_t    byte_count;      /**< This counter reflects byte count of frames that
113987 +                                     were matched by this key. */
113988 +    uint32_t    frame_count;     /**< This counter reflects count of frames that
113989 +                                     were matched by this key. */
113990 +#if (DPAA_VERSION >= 11)
113991 +    uint32_t    frame_length_range_count[IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
113992 +                                /**< These counters reflect how many frames matched
113993 +                                     this key in 'RMON' statistics mode:
113994 +                                     Each counter holds the number of frames of a
113995 +                                     specific frames length range, according to the
113996 +                                     ranges provided at initialization. */
113997 +#endif /* (DPAA_VERSION >= 11) */
113998 +} ioc_fm_pcd_cc_key_statistics_t;
113999 +
114000 +
114001 +typedef struct ioc_fm_pcd_cc_tbl_get_stats_t {
114002 +    void                            *id;
114003 +    uint16_t                        key_index;
114004 +    ioc_fm_pcd_cc_key_statistics_t  statistics;
114005 +} ioc_fm_pcd_cc_tbl_get_stats_t;
114006 +
114007 +/**************************************************************************//**
114008 + @Function      FM_PCD_MatchTableGetKeyStatistics
114009 +
114010 + @Description   This routine may be used to get statistics counters of specific key
114011 +                in a CC Node.
114012 +
114013 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
114014 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
114015 +                these counters reflect how many frames passed that were matched
114016 +                this key; The total frames count will be returned in the counter
114017 +                of the first range (as only one frame length range was defined).
114018 +                If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
114019 +                frame count will be separated to frame length counters, based on
114020 +                provided frame length ranges.
114021 +
114022 + @Param[in]     h_CcNode        A handle to the node
114023 + @Param[in]     keyIndex        Key index for adding
114024 + @Param[out]    p_KeyStatistics Key statistics counters
114025 +
114026 + @Return        The specific key statistics.
114027 +
114028 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
114029 +*//***************************************************************************/
114030 +
114031 +#if defined(CONFIG_COMPAT)
114032 +#define FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT_COMPAT   _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(12), ioc_compat_fm_pcd_cc_tbl_get_stats_t)
114033 +#endif
114034 +#define FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT  _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(12), ioc_fm_pcd_cc_tbl_get_stats_t)
114035 +
114036 +/**************************************************************************//**
114037 + @Function      FM_PCD_MatchTableGetMissStatistics
114038 +
114039 + @Description   This routine may be used to get statistics counters of miss entry
114040 +                in a CC Node.
114041 +
114042 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
114043 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
114044 +                these counters reflect how many frames were not matched to any
114045 +                existing key and therefore passed through the miss entry; The
114046 +                total frames count will be returned in the counter of the
114047 +                first range (as only one frame length range was defined).
114048 +
114049 + @Param[in]     h_CcNode            A handle to the node
114050 + @Param[out]    p_MissStatistics    Statistics counters for 'miss'
114051 +
114052 + @Return        E_OK on success; Error code otherwise.
114053 +
114054 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
114055 +*//***************************************************************************/
114056 +
114057 +#if defined(CONFIG_COMPAT)
114058 +#define FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT_COMPAT   _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(13), ioc_compat_fm_pcd_cc_tbl_get_stats_t)
114059 +#endif
114060 +#define FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT  _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(13), ioc_fm_pcd_cc_tbl_get_stats_t)
114061 +
114062 +/**************************************************************************//**
114063 + @Function      FM_PCD_HashTableGetMissStatistics
114064 +
114065 + @Description   This routine may be used to get statistics counters of 'miss'
114066 +                entry of the a hash table.
114067 +
114068 +                If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
114069 +                'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
114070 +                these counters reflect how many frames were not matched to any
114071 +                existing key and therefore passed through the miss entry;
114072 +
114073 + @Param[in]     h_HashTbl           A handle to a hash table
114074 + @Param[out]    p_MissStatistics    Statistics counters for 'miss'
114075 +
114076 + @Return        E_OK on success; Error code otherwise.
114077 +
114078 + @Cautions      Allowed only following FM_PCD_HashTableSet().
114079 +*//***************************************************************************/
114080 +
114081 +#if defined(CONFIG_COMPAT)
114082 +#define FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT_COMPAT   _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(14), ioc_compat_fm_pcd_cc_tbl_get_stats_t)
114083 +#endif
114084 +#define FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT  _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(14), ioc_fm_pcd_cc_tbl_get_stats_t)
114085 +
114086 +
114087 +/**************************************************************************//**
114088 + @Function      FM_PCD_NetEnvCharacteristicsSet
114089 +
114090 + @Description   Define a set of Network Environment Characteristics.
114091 +
114092 +                When setting an environment it is important to understand its
114093 +                application. It is not meant to describe the flows that will run
114094 +                on the ports using this environment, but what the user means TO DO
114095 +                with the PCD mechanisms in order to parse-classify-distribute those
114096 +                frames.
114097 +                By specifying a distinction unit, the user means it would use that option
114098 +                for distinction between frames at either a KeyGen scheme or a coarse
114099 +                classification action descriptor. Using interchangeable headers to define a
114100 +                unit means that the user is indifferent to which of the interchangeable
114101 +                headers is present in the frame, and wants the distinction to be based
114102 +                on the presence of either one of them.
114103 +
114104 +                Depending on context, there are limitations to the use of environments. A
114105 +                port using the PCD functionality is bound to an environment. Some or even
114106 +                all ports may share an environment but also an environment per port is
114107 +                possible. When initializing a scheme, a classification plan group (see below),
114108 +                or a coarse classification tree, one of the initialized environments must be
114109 +                stated and related to. When a port is bound to a scheme, a classification
114110 +                plan group, or a coarse classification tree, it MUST be bound to the same
114111 +                environment.
114112 +
114113 +                The different PCD modules, may relate (for flows definition) ONLY on
114114 +                distinction units as defined by their environment. When initializing a
114115 +                scheme for example, it may not choose to select IPV4 as a match for
114116 +                recognizing flows unless it was defined in the relating environment. In
114117 +                fact, to guide the user through the configuration of the PCD, each module's
114118 +                characterization in terms of flows is not done using protocol names, but using
114119 +                environment indexes.
114120 +
114121 +                In terms of HW implementation, the list of distinction units sets the LCV vectors
114122 +                and later used for match vector, classification plan vectors and coarse classification
114123 +                indexing.
114124 +
114125 + @Param[in,out] ioc_fm_pcd_net_env_params_t   A structure defining the distiction units for this configuration.
114126 +
114127 + @Return        0 on success; Error code otherwise.
114128 +*//***************************************************************************/
114129 +#if defined(CONFIG_COMPAT)
114130 +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET_COMPAT   _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(20), ioc_compat_fm_pcd_net_env_params_t)
114131 +#endif
114132 +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET  _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(20), ioc_fm_pcd_net_env_params_t)
114133 +
114134 +/**************************************************************************//**
114135 + @Function      FM_PCD_NetEnvCharacteristicsDelete
114136 +
114137 + @Description   Deletes a set of Network Environment Charecteristics.
114138 +
114139 + @Param[in]     ioc_fm_obj_t - The id of a Network Environment object.
114140 +
114141 + @Return        0 on success; Error code otherwise.
114142 +*//***************************************************************************/
114143 +#if defined(CONFIG_COMPAT)
114144 +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE_COMPAT  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(21), ioc_compat_fm_obj_t)
114145 +#endif
114146 +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(21), ioc_fm_obj_t)
114147 +
114148 +/**************************************************************************//**
114149 + @Function      FM_PCD_KgSchemeSet
114150 +
114151 + @Description   Initializing or modifying and enabling a scheme for the KeyGen.
114152 +                This routine should be called for adding or modifying a scheme.
114153 +                When a scheme needs modifying, the API requires that it will be
114154 +                rewritten. In such a case 'modify' should be TRUE. If the
114155 +                routine is called for a valid scheme and 'modify' is FALSE,
114156 +                it will return error.
114157 +
114158 + @Param[in,out] ioc_fm_pcd_kg_scheme_params_t   A structure of parameters for defining the scheme
114159 +
114160 + @Return        0 on success; Error code otherwise.
114161 +*//***************************************************************************/
114162 +#if defined(CONFIG_COMPAT)
114163 +#define FM_PCD_IOC_KG_SCHEME_SET_COMPAT     _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(24), ioc_compat_fm_pcd_kg_scheme_params_t)
114164 +#endif
114165 +#define FM_PCD_IOC_KG_SCHEME_SET    _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(24), ioc_fm_pcd_kg_scheme_params_t)
114166 +
114167 +/**************************************************************************//**
114168 + @Function      FM_PCD_KgSchemeDelete
114169 +
114170 + @Description   Deleting an initialized scheme.
114171 +
114172 + @Param[in]     ioc_fm_obj_t        scheme id as initalized by application at FM_PCD_IOC_KG_SET_SCHEME
114173 +
114174 + @Return        0 on success; Error code otherwise.
114175 +*//***************************************************************************/
114176 +#if defined(CONFIG_COMPAT)
114177 +#define FM_PCD_IOC_KG_SCHEME_DELETE_COMPAT  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(25), ioc_compat_fm_obj_t)
114178 +#endif
114179 +#define FM_PCD_IOC_KG_SCHEME_DELETE     _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(25), ioc_fm_obj_t)
114180 +
114181 +/**************************************************************************//**
114182 + @Function      FM_PCD_CcRootBuild
114183 +
114184 + @Description   This routine must be called to define a complete coarse
114185 +                classification tree. This is the way to define coarse
114186 +                classification to a certain flow - the KeyGen schemes
114187 +                may point only to trees defined in this way.
114188 +
114189 + @Param[in,out] ioc_fm_pcd_cc_tree_params_t     A structure of parameters to define the tree.
114190 +
114191 + @Return        0 on success; Error code otherwise.
114192 +*//***************************************************************************/
114193 +#if defined(CONFIG_COMPAT)
114194 +#define FM_PCD_IOC_CC_ROOT_BUILD_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(26), compat_uptr_t)
114195 +#endif
114196 +#define FM_PCD_IOC_CC_ROOT_BUILD    _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(26), void *) /* workaround ...*/
114197 +
114198 +/**************************************************************************//**
114199 + @Function      FM_PCD_CcRootDelete
114200 +
114201 + @Description   Deleting a built tree.
114202 +
114203 + @Param[in]     ioc_fm_obj_t - The id of a CC tree.
114204 +*//***************************************************************************/
114205 +#if defined(CONFIG_COMPAT)
114206 +#define FM_PCD_IOC_CC_ROOT_DELETE_COMPAT    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(27), ioc_compat_fm_obj_t)
114207 +#endif
114208 +#define FM_PCD_IOC_CC_ROOT_DELETE    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(27), ioc_fm_obj_t)
114209 +
114210 +/**************************************************************************//**
114211 + @Function      FM_PCD_MatchTableSet
114212 +
114213 + @Description   This routine should be called for each CC (coarse classification)
114214 +                node. The whole CC tree should be built bottom up so that each
114215 +                node points to already defined nodes. p_NodeId returns the node
114216 +                Id to be used by other nodes.
114217 +
114218 + @Param[in,out] ioc_fm_pcd_cc_node_params_t       A structure for defining the CC node params
114219 +
114220 + @Return        0 on success; Error code otherwise.
114221 +*//***************************************************************************/
114222 +#if defined(CONFIG_COMPAT)
114223 +#define FM_PCD_IOC_MATCH_TABLE_SET_COMPAT    _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(28), compat_uptr_t)
114224 +#endif
114225 +#define FM_PCD_IOC_MATCH_TABLE_SET    _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(28), void *) /* workaround ...*/
114226 +
114227 +/**************************************************************************//**
114228 + @Function      FM_PCD_MatchTableDelete
114229 +
114230 + @Description   Deleting a built node.
114231 +
114232 + @Param[in]     ioc_fm_obj_t - The id of a CC node.
114233 +
114234 + @Return        0 on success; Error code otherwise.
114235 +*//***************************************************************************/
114236 +#if defined(CONFIG_COMPAT)
114237 +#define FM_PCD_IOC_MATCH_TABLE_DELETE_COMPAT    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(29), ioc_compat_fm_obj_t)
114238 +#endif
114239 +#define FM_PCD_IOC_MATCH_TABLE_DELETE   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(29), ioc_fm_obj_t)
114240 +
114241 +/**************************************************************************//**
114242 + @Function      FM_PCD_CcRootModifyNextEngine
114243 +
114244 + @Description   Modify the Next Engine Parameters in the entry of the tree.
114245 +
114246 + @Param[in]     ioc_fm_pcd_cc_tree_modify_next_engine_params_t - Pointer to a structure with the relevant parameters
114247 +
114248 + @Return        0 on success; Error code otherwise.
114249 +
114250 + @Cautions      Allowed only following FM_PCD_CcRootBuild().
114251 +*//***************************************************************************/
114252 +#if defined(CONFIG_COMPAT)
114253 +#define FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE_COMPAT   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(30), ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t)
114254 +#endif
114255 +#define FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(30), ioc_fm_pcd_cc_tree_modify_next_engine_params_t)
114256 +
114257 +/**************************************************************************//**
114258 + @Function      FM_PCD_MatchTableModifyNextEngine
114259 +
114260 + @Description   Modify the Next Engine Parameters in the relevant key entry of the node.
114261 +
114262 + @Param[in]     ioc_fm_pcd_cc_node_modify_next_engine_params_t  A pointer to a structure with the relevant parameters
114263 +
114264 + @Return        0 on success; Error code otherwise.
114265 +
114266 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
114267 +*//***************************************************************************/
114268 +#if defined(CONFIG_COMPAT)
114269 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE_COMPAT   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(31), ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)
114270 +#endif
114271 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(31), ioc_fm_pcd_cc_node_modify_next_engine_params_t)
114272 +
114273 +/**************************************************************************//**
114274 + @Function      FM_PCD_MatchTableModifyMissNextEngine
114275 +
114276 + @Description   Modify the Next Engine Parameters of the Miss key case of the node.
114277 +
114278 + @Param[in]     ioc_fm_pcd_cc_node_modify_next_engine_params_t - Pointer to a structure with the relevant parameters
114279 +
114280 + @Return        0 on success; Error code otherwise.
114281 +
114282 + @Cautions      Allowed only following FM_PCD_MatchTableSet().
114283 +*//***************************************************************************/
114284 +#if defined(CONFIG_COMPAT)
114285 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE_COMPAT   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(32), ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)
114286 +#endif
114287 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(32), ioc_fm_pcd_cc_node_modify_next_engine_params_t)
114288 +
114289 +/**************************************************************************//**
114290 + @Function      FM_PCD_MatchTableRemoveKey
114291 +
114292 + @Description   Remove the key (including next engine parameters of this key)
114293 +                defined by the index of the relevant node.
114294 +
114295 + @Param[in]     ioc_fm_pcd_cc_node_remove_key_params_t  A pointer to a structure with the relevant parameters
114296 +
114297 + @Return        0 on success; Error code otherwise.
114298 +
114299 + @Cautions      Allowed only after FM_PCD_MatchTableSet() has been called for this
114300 +                node and for all of the nodes that lead to it.
114301 +*//***************************************************************************/
114302 +#if defined(CONFIG_COMPAT)
114303 +#define FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY_COMPAT    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(33), ioc_compat_fm_pcd_cc_node_remove_key_params_t)
114304 +#endif
114305 +#define FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(33), ioc_fm_pcd_cc_node_remove_key_params_t)
114306 +
114307 +/**************************************************************************//**
114308 + @Function      FM_PCD_MatchTableAddKey
114309 +
114310 + @Description   Add the key (including next engine parameters of this key in the
114311 +                index defined by the keyIndex. Note that 'FM_PCD_LAST_KEY_INDEX'
114312 +                may be used when the user doesn't care about the position of the
114313 +                key in the table - in that case, the key will be automatically
114314 +                added by the driver in the last available entry.
114315 +
114316 + @Param[in]     ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t  A pointer to a structure with the relevant parameters
114317 +
114318 + @Return        0 on success; Error code otherwise.
114319 +
114320 + @Cautions      Allowed only after FM_PCD_MatchTableSet() has been called for this
114321 +                node and for all of the nodes that lead to it.
114322 +*//***************************************************************************/
114323 +#if defined(CONFIG_COMPAT)
114324 +#define FM_PCD_IOC_MATCH_TABLE_ADD_KEY_COMPAT   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(34), ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
114325 +#endif
114326 +#define FM_PCD_IOC_MATCH_TABLE_ADD_KEY  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(34), ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
114327 +
114328 +/**************************************************************************//**
114329 + @Function      FM_PCD_MatchTableModifyKeyAndNextEngine
114330 +
114331 + @Description   Modify the key and Next Engine Parameters of this key in the index defined by key_index.
114332 +
114333 + @Param[in]     ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t  A pointer to a structure with the relevant parameters
114334 +
114335 + @Return        0 on success; Error code otherwise.
114336 +
114337 + @Cautions      Allowed only following FM_PCD_MatchTableSet() not only of the relevnt node but also
114338 +                the node that points to this node
114339 +*//***************************************************************************/
114340 +#if defined(CONFIG_COMPAT)
114341 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(35), ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
114342 +#endif
114343 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(35), ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
114344 +
114345 +/**************************************************************************//**
114346 + @Function      FM_PCD_MatchTableModifyKey
114347 +
114348 + @Description   Modify the key at the index defined by key_index.
114349 +
114350 + @Param[in]     ioc_fm_pcd_cc_node_modify_key_params_t - Pointer to a structure with the relevant parameters
114351 +
114352 + @Return        0 on success; Error code otherwise.
114353 +
114354 + @Cautions      Allowed only after FM_PCD_MatchTableSet() has been called for this
114355 +                node and for all of the nodes that lead to it.
114356 +*//***************************************************************************/
114357 +#if defined(CONFIG_COMPAT)
114358 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_COMPAT    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(36), ioc_compat_fm_pcd_cc_node_modify_key_params_t)
114359 +#endif
114360 +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(36), ioc_fm_pcd_cc_node_modify_key_params_t)
114361 +
114362 +/**************************************************************************//**
114363 + @Function      FM_PCD_HashTableSet
114364 +
114365 + @Description   This routine initializes a hash table structure.
114366 +                KeyGen hash result determines the hash bucket.
114367 +                Next, KeyGen key is compared against all keys of this
114368 +                bucket (exact match).
114369 +                Number of sets (number of buckets) of the hash equals to the
114370 +                number of 1-s in 'hash_res_mask' in the provided parameters.
114371 +                Number of hash table ways is then calculated by dividing
114372 +                'max_num_of_keys' equally between the hash sets. This is the maximal
114373 +                number of keys that a hash bucket may hold.
114374 +                The hash table is initialized empty and keys may be
114375 +                added to it following the initialization. Keys masks are not
114376 +                supported in current hash table implementation.
114377 +                The initialized hash table can be integrated as a node in a
114378 +                CC tree.
114379 +
114380 + @Param[in,out] ioc_fm_pcd_hash_table_params_t - Pointer to a structure with the relevant parameters
114381 +
114382 + @Return        0 on success; Error code otherwise.
114383 +*//***************************************************************************/
114384 +#if defined(CONFIG_COMPAT)
114385 +#define FM_PCD_IOC_HASH_TABLE_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_compat_fm_pcd_hash_table_params_t)
114386 +#endif
114387 +#define FM_PCD_IOC_HASH_TABLE_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_fm_pcd_hash_table_params_t)
114388 +
114389 +
114390 +/**************************************************************************//**
114391 + @Function      FM_PCD_HashTableDelete
114392 +
114393 + @Description   This routine deletes the provided hash table and released all
114394 +                its allocated resources.
114395 +
114396 + @Param[in]     ioc_fm_obj_t - The ID of a hash table.
114397 +
114398 + @Return        0 on success; Error code otherwise.
114399 +
114400 + @Cautions      Allowed only following FM_PCD_HashTableSet().
114401 +*//***************************************************************************/
114402 +#if defined(CONFIG_COMPAT)
114403 +#define FM_PCD_IOC_HASH_TABLE_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_compat_fm_obj_t)
114404 +#endif
114405 +#define FM_PCD_IOC_HASH_TABLE_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_fm_obj_t)
114406 +
114407 +/**************************************************************************//**
114408 + @Function      FM_PCD_HashTableAddKey
114409 +
114410 + @Description   This routine adds the provided key (including next engine
114411 +                parameters of this key) to the hash table.
114412 +                The key is added as the last key of the bucket that it is
114413 +                mapped to.
114414 +
114415 + @Param[in]     ioc_fm_pcd_hash_table_add_key_params_t - Pointer to a structure with the relevant parameters
114416 +
114417 + @Return        0 on success; error code otherwise.
114418 +
114419 + @Cautions      Allowed only following FM_PCD_HashTableSet().
114420 +*//***************************************************************************/
114421 +#if defined(CONFIG_COMPAT)
114422 +#define FM_PCD_IOC_HASH_TABLE_ADD_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(39), ioc_compat_fm_pcd_hash_table_add_key_params_t)
114423 +#endif
114424 +#define FM_PCD_IOC_HASH_TABLE_ADD_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(39), ioc_fm_pcd_hash_table_add_key_params_t)
114425 +
114426 +/**************************************************************************//**
114427 + @Function      FM_PCD_HashTableRemoveKey
114428 +
114429 + @Description   This routine removes the requested key (including next engine
114430 +                parameters of this key) from the hash table.
114431 +
114432 + @Param[in]     ioc_fm_pcd_hash_table_remove_key_params_t - Pointer to a structure with the relevant parameters
114433 +
114434 + @Return        0 on success; Error code otherwise.
114435 +
114436 + @Cautions      Allowed only following FM_PCD_HashTableSet().
114437 +*//***************************************************************************/
114438 +#if defined(CONFIG_COMPAT)
114439 +#define FM_PCD_IOC_HASH_TABLE_REMOVE_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(40), ioc_compat_fm_pcd_hash_table_remove_key_params_t)
114440 +#endif
114441 +#define FM_PCD_IOC_HASH_TABLE_REMOVE_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(40), ioc_fm_pcd_hash_table_remove_key_params_t)
114442 +
114443 +/**************************************************************************//**
114444 + @Function      FM_PCD_PlcrProfileSet
114445 +
114446 + @Description   Sets a profile entry in the policer profile table.
114447 +                The routine overrides any existing value.
114448 +
114449 + @Param[in,out] ioc_fm_pcd_plcr_profile_params_t    A structure of parameters for defining a
114450 +                                                    policer profile entry.
114451 +
114452 + @Return        0 on success; Error code otherwise.
114453 +*//***************************************************************************/
114454 +#if defined(CONFIG_COMPAT)
114455 +#define FM_PCD_IOC_PLCR_PROFILE_SET_COMPAT     _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_compat_fm_pcd_plcr_profile_params_t)
114456 +#endif
114457 +#define FM_PCD_IOC_PLCR_PROFILE_SET     _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_fm_pcd_plcr_profile_params_t)
114458 +
114459 +/**************************************************************************//**
114460 + @Function      FM_PCD_PlcrProfileDelete
114461 +
114462 + @Description   Delete a profile entry in the policer profile table.
114463 +                The routine set entry to invalid.
114464 +
114465 + @Param[in]     ioc_fm_obj_t        The id of a policer profile.
114466 +
114467 + @Return        0 on success; Error code otherwise.
114468 +*//***************************************************************************/
114469 +#if defined(CONFIG_COMPAT)
114470 +#define FM_PCD_IOC_PLCR_PROFILE_DELETE_COMPAT   _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_compat_fm_obj_t)
114471 +#endif
114472 +#define FM_PCD_IOC_PLCR_PROFILE_DELETE  _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_fm_obj_t)
114473 +
114474 +/**************************************************************************//**
114475 + @Function      FM_PCD_ManipNodeSet
114476 +
114477 + @Description   This routine should be called for defining a manipulation
114478 +                node. A manipulation node must be defined before the CC node
114479 +                that precedes it.
114480 +
114481 + @Param[in]     ioc_fm_pcd_manip_params_t - A structure of parameters defining the manipulation
114482 +
114483 + @Return        A handle to the initialized object on success; NULL code otherwise.
114484 +*//***************************************************************************/
114485 +#if defined(CONFIG_COMPAT)
114486 +#define FM_PCD_IOC_MANIP_NODE_SET_COMPAT    _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(43), ioc_compat_fm_pcd_manip_params_t)
114487 +#endif
114488 +#define FM_PCD_IOC_MANIP_NODE_SET   _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(43), ioc_fm_pcd_manip_params_t)
114489 +
114490 +/**************************************************************************//**
114491 + @Function      FM_PCD_ManipNodeReplace
114492 +
114493 + @Description   Change existing manipulation node to be according to new requirement.
114494 +                (Here, it's implemented as a variant of the same IOCTL as for
114495 +                FM_PCD_ManipNodeSet(), and one that when called, the 'id' member
114496 +                in its 'ioc_fm_pcd_manip_params_t' argument is set to contain
114497 +                the manip node's handle)
114498 +
114499 + @Param[in]     ioc_fm_pcd_manip_params_t - A structure of parameters defining the manipulation
114500 +
114501 + @Return        0 on success; error code otherwise.
114502 +
114503 + @Cautions      Allowed only following FM_PCD_ManipNodeSet().
114504 +*//***************************************************************************/
114505 +#if defined(CONFIG_COMPAT)
114506 +#define FM_PCD_IOC_MANIP_NODE_REPLACE_COMPAT    FM_PCD_IOC_MANIP_NODE_SET_COMPAT
114507 +#endif
114508 +#define FM_PCD_IOC_MANIP_NODE_REPLACE           FM_PCD_IOC_MANIP_NODE_SET
114509 +
114510 +/**************************************************************************//**
114511 + @Function      FM_PCD_ManipNodeDelete
114512 +
114513 + @Description   Delete an existing manipulation node.
114514 +
114515 + @Param[in]     ioc_fm_obj_t       The id of the manipulation node to delete.
114516 +
114517 + @Return        0 on success; error code otherwise.
114518 +
114519 + @Cautions      Allowed only following FM_PCD_ManipNodeSet().
114520 +*//***************************************************************************/
114521 +#if defined(CONFIG_COMPAT)
114522 +#define FM_PCD_IOC_MANIP_NODE_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(44), ioc_compat_fm_obj_t)
114523 +#endif
114524 +#define FM_PCD_IOC_MANIP_NODE_DELETE    _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(44), ioc_fm_obj_t)
114525 +
114526 +/**************************************************************************//**
114527 + @Function      FM_PCD_ManipGetStatistics
114528 +
114529 + @Description   Retrieve the manipulation statistics.
114530 +
114531 + @Param[in]     h_ManipNode         A handle to a manipulation node.
114532 + @Param[out]    p_FmPcdManipStats   A structure for retrieving the manipulation statistics
114533 +
114534 + @Return        E_OK on success; Error code otherwise.
114535 +
114536 + @Cautions      Allowed only following FM_PCD_ManipNodeSet().
114537 +*//***************************************************************************/
114538 +#if defined(CONFIG_COMPAT)
114539 +#define FM_PCD_IOC_MANIP_GET_STATS_COMPAT  _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(50), ioc_compat_fm_pcd_manip_get_stats_t)
114540 +#endif
114541 +#define FM_PCD_IOC_MANIP_GET_STATS   _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(50), ioc_fm_pcd_manip_get_stats_t)
114542 +
114543 +/**************************************************************************//**
114544 +@Function      FM_PCD_SetAdvancedOffloadSupport
114545 +
114546 +@Description   This routine must be called in order to support the following features:
114547 +               IP-fragmentation, IP-reassembly, IPsec, Header-manipulation, frame-replicator.
114548 +
114549 +@Param[in]     h_FmPcd         FM PCD module descriptor.
114550 +
114551 +@Return        0 on success; error code otherwise.
114552 +
114553 +@Cautions      Allowed only when PCD is disabled.
114554 +*//***************************************************************************/
114555 +#define FM_PCD_IOC_SET_ADVANCED_OFFLOAD_SUPPORT _IO(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(45))
114556 +
114557 +#if (DPAA_VERSION >= 11)
114558 +/**************************************************************************//**
114559 + @Function      FM_PCD_FrmReplicSetGroup
114560 +
114561 + @Description   Initialize a Frame Replicator group.
114562 +
114563 + @Param[in]     h_FmPcd                FM PCD module descriptor.
114564 + @Param[in]     p_FrmReplicGroupParam  A structure of parameters for the initialization of
114565 +                                       the frame replicator group.
114566 +
114567 + @Return        A handle to the initialized object on success; NULL code otherwise.
114568 +
114569 + @Cautions      Allowed only following FM_PCD_Init().
114570 +*//***************************************************************************/
114571 +#if defined(CONFIG_COMPAT)
114572 +#define FM_PCD_IOC_FRM_REPLIC_GROUP_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(46), ioc_compat_fm_pcd_frm_replic_group_params_t)
114573 +#endif
114574 +#define FM_PCD_IOC_FRM_REPLIC_GROUP_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(46), ioc_fm_pcd_frm_replic_group_params_t)
114575 +
114576 +/**************************************************************************//**
114577 + @Function      FM_PCD_FrmReplicDeleteGroup
114578 +
114579 + @Description   Delete a Frame Replicator group.
114580 +
114581 + @Param[in]     h_FrmReplicGroup  A handle to the frame replicator group.
114582 +
114583 + @Return        E_OK on success;  Error code otherwise.
114584 +
114585 + @Cautions      Allowed only following FM_PCD_FrmReplicSetGroup().
114586 +*//***************************************************************************/
114587 +#if defined(CONFIG_COMPAT)
114588 +#define FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(47), ioc_compat_fm_obj_t)
114589 +#endif
114590 +#define FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(47), ioc_fm_obj_t)
114591 +
114592 +/**************************************************************************//**
114593 + @Function      FM_PCD_FrmReplicAddMember
114594 +
114595 + @Description   Add the member in the index defined by the memberIndex.
114596 +
114597 + @Param[in]     h_FrmReplicGroup   A handle to the frame replicator group.
114598 + @Param[in]     memberIndex        member index for adding.
114599 + @Param[in]     p_MemberParams     A pointer to the new member parameters.
114600 +
114601 + @Return        E_OK on success; Error code otherwise.
114602 +
114603 + @Cautions      Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
114604 +*//***************************************************************************/
114605 +#if defined(CONFIG_COMPAT)
114606 +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(48), ioc_compat_fm_pcd_frm_replic_member_params_t)
114607 +#endif
114608 +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(48), ioc_fm_pcd_frm_replic_member_params_t)
114609 +
114610 +/**************************************************************************//**
114611 + @Function      FM_PCD_FrmReplicRemoveMember
114612 +
114613 + @Description   Remove the member defined by the index from the relevant group.
114614 +
114615 + @Param[in]     h_FrmReplicGroup   A handle to the frame replicator group.
114616 + @Param[in]     memberIndex        member index for removing.
114617 +
114618 + @Return        E_OK on success; Error code otherwise.
114619 +
114620 + @Cautions      Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
114621 +*//***************************************************************************/
114622 +#if defined(CONFIG_COMPAT)
114623 +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(49), ioc_compat_fm_pcd_frm_replic_member_t)
114624 +#endif
114625 +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(49), ioc_fm_pcd_frm_replic_member_t)
114626 +
114627 +#endif
114628 +
114629 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
114630 +/**************************************************************************//**
114631 + @Function      FM_PCD_StatisticsSetNode
114632 +
114633 + @Description   This routine should be called for defining a statistics node.
114634 +
114635 + @Param[in,out] ioc_fm_pcd_stats_params_t A structure of parameters defining the statistics
114636 +
114637 + @Return        0 on success; Error code otherwise.
114638 +*//***************************************************************************/
114639 +#if defined(CONFIG_COMPAT)
114640 +#define FM_PCD_IOC_STATISTICS_SET_NODE_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(45), void *)
114641 +#endif
114642 +#define FM_PCD_IOC_STATISTICS_SET_NODE _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(45), void *)
114643 +
114644 +#endif /* FM_CAPWAP_SUPPORT */
114645 +
114646 +#ifdef NCSW_BACKWARD_COMPATIBLE_API
114647 +#if defined(CONFIG_COMPAT)
114648 +#define FM_PCD_IOC_SET_NET_ENV_CHARACTERISTICS_COMPAT \
114649 +                                                FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET_COMPAT
114650 +#define FM_PCD_IOC_DELETE_NET_ENV_CHARACTERISTICS_COMPAT \
114651 +                                                FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE_COMPAT
114652 +#define FM_PCD_IOC_KG_SET_SCHEME_COMPAT         FM_PCD_IOC_KG_SCHEME_SET_COMPAT
114653 +#define FM_PCD_IOC_KG_DEL_SCHEME_COMPAT         FM_PCD_IOC_KG_SCHEME_DELETE_COMPAT
114654 +#define FM_PCD_IOC_CC_BUILD_TREE_COMPAT         FM_PCD_IOC_CC_ROOT_BUILD_COMPAT
114655 +#define FM_PCD_IOC_CC_DELETE_TREE_COMPAT        FM_PCD_IOC_CC_ROOT_DELETE_COMPAT
114656 +#define FM_PCD_IOC_CC_DELETE_NODE_COMPAT        FM_PCD_IOC_MATCH_TABLE_DELETE_COMPAT
114657 +#define FM_PCD_IOC_CC_TREE_MODIFY_NEXT_ENGINE_COMPAT \
114658 +                                                FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE_COMPAT
114659 +#define FM_PCD_IOC_CC_NODE_MODIFY_NEXT_ENGINE_COMPAT \
114660 +                                                FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE_COMPAT
114661 +#define FM_PCD_IOC_CC_NODE_MODIFY_MISS_NEXT_ENGINE_COMPAT \
114662 +                                                FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE_COMPAT
114663 +#define FM_PCD_IOC_CC_NODE_REMOVE_KEY_COMPAT    FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY_COMPAT
114664 +#define FM_PCD_IOC_CC_NODE_ADD_KEY_COMPAT       FM_PCD_IOC_MATCH_TABLE_ADD_KEY_COMPAT
114665 +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT \
114666 +                                                FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT
114667 +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY_COMPAT    FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_COMPAT
114668 +#define FM_PCD_IOC_PLCR_SET_PROFILE_COMPAT      FM_PCD_IOC_PLCR_PROFILE_SET_COMPAT
114669 +#define FM_PCD_IOC_PLCR_DEL_PROFILE_COMPAT      FM_PCD_IOC_PLCR_PROFILE_DELETE_COMPAT
114670 +#define FM_PCD_IOC_MANIP_SET_NODE_COMPAT        FM_PCD_IOC_MANIP_NODE_SET_COMPAT
114671 +#define FM_PCD_IOC_MANIP_DELETE_NODE_COMPAT     FM_PCD_IOC_MANIP_NODE_DELETE_COMPAT
114672 +#endif
114673 +#define FM_PCD_IOC_SET_NET_ENV_CHARACTERISTICS  FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET
114674 +#define FM_PCD_IOC_DELETE_NET_ENV_CHARACTERISTICS \
114675 +                                                FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE
114676 +#define FM_PCD_IOC_KG_SET_SCHEME                FM_PCD_IOC_KG_SCHEME_SET
114677 +#define FM_PCD_IOC_KG_DEL_SCHEME                FM_PCD_IOC_KG_SCHEME_DELETE
114678 +#define FM_PCD_IOC_CC_BUILD_TREE                FM_PCD_IOC_CC_ROOT_BUILD
114679 +#define FM_PCD_IOC_CC_DELETE_TREE               FM_PCD_IOC_CC_ROOT_DELETE
114680 +#define FM_PCD_IOC_CC_DELETE_NODE               FM_PCD_IOC_MATCH_TABLE_DELETE
114681 +#define FM_PCD_IOC_CC_TREE_MODIFY_NEXT_ENGINE   FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE
114682 +#define FM_PCD_IOC_CC_NODE_MODIFY_NEXT_ENGINE   FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE
114683 +#define FM_PCD_IOC_CC_NODE_MODIFY_MISS_NEXT_ENGINE \
114684 +                                                FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE
114685 +#define FM_PCD_IOC_CC_NODE_REMOVE_KEY           FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY
114686 +#define FM_PCD_IOC_CC_NODE_ADD_KEY              FM_PCD_IOC_MATCH_TABLE_ADD_KEY
114687 +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY_AND_NEXT_ENGINE \
114688 +                                                FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE
114689 +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY           FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY
114690 +#define FM_PCD_IOC_PLCR_SET_PROFILE             FM_PCD_IOC_PLCR_PROFILE_SET
114691 +#define FM_PCD_IOC_PLCR_DEL_PROFILE             FM_PCD_IOC_PLCR_PROFILE_DELETE
114692 +#define FM_PCD_IOC_MANIP_SET_NODE               FM_PCD_IOC_MANIP_NODE_SET
114693 +#define FM_PCD_IOC_MANIP_DELETE_NODE            FM_PCD_IOC_MANIP_NODE_DELETE
114694 +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
114695 +
114696 +#endif /* __FM_PCD_IOCTLS_H */
114697 +/** @} */ /* end of lnx_ioctl_FM_PCD_Runtime_grp group */
114698 +/** @} */ /* end of lnx_ioctl_FM_PCD_grp group */
114699 +/** @} */ /* end of lnx_ioctl_FM_grp group */
114700 --- /dev/null
114701 +++ b/include/uapi/linux/fmd/Peripherals/fm_port_ioctls.h
114702 @@ -0,0 +1,948 @@
114703 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
114704 + * All rights reserved.
114705 + *
114706 + * Redistribution and use in source and binary forms, with or without
114707 + * modification, are permitted provided that the following conditions are met:
114708 + *     * Redistributions of source code must retain the above copyright
114709 + *       notice, this list of conditions and the following disclaimer.
114710 + *     * Redistributions in binary form must reproduce the above copyright
114711 + *       notice, this list of conditions and the following disclaimer in the
114712 + *       documentation and/or other materials provided with the distribution.
114713 + *     * Neither the name of Freescale Semiconductor nor the
114714 + *       names of its contributors may be used to endorse or promote products
114715 + *       derived from this software without specific prior written permission.
114716 + *
114717 + *
114718 + * ALTERNATIVELY, this software may be distributed under the terms of the
114719 + * GNU General Public License ("GPL") as published by the Free Software
114720 + * Foundation, either version 2 of that License or (at your option) any
114721 + * later version.
114722 + *
114723 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
114724 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
114725 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
114726 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
114727 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
114728 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
114729 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
114730 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
114731 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
114732 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
114733 + */
114734 +
114735 +/******************************************************************************
114736 + @File          fm_port_ioctls.h
114737 +
114738 + @Description   FM Port routines
114739 +*//***************************************************************************/
114740 +#ifndef __FM_PORT_IOCTLS_H
114741 +#define __FM_PORT_IOCTLS_H
114742 +
114743 +#include "enet_ext.h"
114744 +#include "net_ioctls.h"
114745 +#include "fm_ioctls.h"
114746 +#include "fm_pcd_ioctls.h"
114747 +
114748 +
114749 +/**************************************************************************//**
114750 +
114751 + @Group         lnx_ioctl_FM_grp Frame Manager Linux IOCTL API
114752 +
114753 + @Description   FM Linux ioctls definitions and enums
114754 +
114755 + @{
114756 +*//***************************************************************************/
114757 +
114758 +/**************************************************************************//**
114759 + @Group         lnx_ioctl_FM_PORT_grp FM Port
114760 +
114761 + @Description   FM Port API
114762 +
114763 +                The FM uses a general module called "port" to represent a Tx port
114764 +                (MAC), an Rx port (MAC), offline parsing flow or host command
114765 +                flow. There may be up to 17 (may change) ports in an FM - 5 Tx
114766 +                ports (4 for the 1G MACs, 1 for the 10G MAC), 5 Rx Ports, and 7
114767 +                Host command/Offline parsing ports. The SW driver manages these
114768 +                ports as sub-modules of the FM, i.e. after an FM is initialized,
114769 +                its ports may be initialized and operated upon.
114770 +
114771 +                The port is initialized aware of its type, but other functions on
114772 +                a port may be indifferent to its type. When necessary, the driver
114773 +                verifies coherency and returns error if applicable.
114774 +
114775 +                On initialization, user specifies the port type and it's index
114776 +                (relative to the port's type). Host command and Offline parsing
114777 +                ports share the same id range, I.e user may not initialized host
114778 +                command port 0 and offline parsing port 0.
114779 +
114780 + @{
114781 +*//***************************************************************************/
114782 +
114783 +/**************************************************************************//**
114784 + @Description   An enum for defining port PCD modes.
114785 +                (Must match enum e_FmPortPcdSupport defined in fm_port_ext.h)
114786 +
114787 +                This enum defines the superset of PCD engines support - i.e. not
114788 +                all engines have to be used, but all have to be enabled. The real
114789 +                flow of a specific frame depends on the PCD configuration and the
114790 +                frame headers and payload.
114791 +                Note: the first engine and the first engine after the parser (if
114792 +                exists) should be in order, the order is important as it will
114793 +                define the flow of the port. However, as for the rest engines
114794 +                (the ones that follows), the order is not important anymore as
114795 +                it is defined by the PCD graph itself.
114796 +*//***************************************************************************/
114797 +typedef enum ioc_fm_port_pcd_support {
114798 +      e_IOC_FM_PORT_PCD_SUPPORT_NONE = 0                /**< BMI to BMI, PCD is not used */
114799 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_ONLY                /**< Use only Parser */
114800 +    , e_IOC_FM_PORT_PCD_SUPPORT_PLCR_ONLY               /**< Use only Policer */
114801 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR            /**< Use Parser and Policer */
114802 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG              /**< Use Parser and Keygen */
114803 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC       /**< Use Parser, Keygen and Coarse Classification */
114804 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR
114805 +                                                        /**< Use all PCD engines */
114806 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR     /**< Use Parser, Keygen and Policer */
114807 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_CC              /**< Use Parser and Coarse Classification */
114808 +    , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR     /**< Use Parser and Coarse Classification and Policer */
114809 +    , e_IOC_FM_PORT_PCD_SUPPORT_CC_ONLY                 /**< Use only Coarse Classification */
114810 +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
114811 +    , e_IOC_FM_PORT_PCD_SUPPORT_CC_AND_KG               /**< Use Coarse Classification,and Keygen */
114812 +    , e_IOC_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR      /**< Use Coarse Classification, Keygen and Policer */
114813 +#endif /* FM_CAPWAP_SUPPORT */
114814 +} ioc_fm_port_pcd_support;
114815 +
114816 +
114817 +/**************************************************************************//**
114818 + @Collection   FM Frame error
114819 +*//***************************************************************************/
114820 +typedef uint32_t    ioc_fm_port_frame_err_select_t;     /**< typedef for defining Frame Descriptor errors */
114821 +
114822 +/* @} */
114823 +
114824 +
114825 +/**************************************************************************//**
114826 + @Description   An enum for defining Dual Tx rate limiting scale.
114827 +                (Must match e_FmPortDualRateLimiterScaleDown defined in fm_port_ext.h)
114828 +*//***************************************************************************/
114829 +typedef enum ioc_fm_port_dual_rate_limiter_scale_down {
114830 +    e_IOC_FM_PORT_DUAL_RATE_LIMITER_NONE = 0,           /**< Use only single rate limiter  */
114831 +    e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_2,    /**< Divide high rate limiter by 2 */
114832 +    e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_4,    /**< Divide high rate limiter by 4 */
114833 +    e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8     /**< Divide high rate limiter by 8 */
114834 +} ioc_fm_port_dual_rate_limiter_scale_down;
114835 +
114836 +/**************************************************************************//**
114837 + @Description   A structure for defining Tx rate limiting
114838 +                (Must match struct t_FmPortRateLimit defined in fm_port_ext.h)
114839 +*//***************************************************************************/
114840 +typedef struct ioc_fm_port_rate_limit_t {
114841 +    uint16_t                            max_burst_size;         /**< in KBytes for Tx ports, in frames
114842 +                                                                     for offline parsing ports. (note that
114843 +                                                                     for early chips burst size is
114844 +                                                                     rounded up to a multiply of 1000 frames).*/
114845 +    uint32_t                            rate_limit;             /**< in Kb/sec for Tx ports, in frame/sec for
114846 +                                                                     offline parsing ports. Rate limit refers to
114847 +                                                                     data rate (rather than line rate). */
114848 +    ioc_fm_port_dual_rate_limiter_scale_down rate_limit_divider;    /**< For offline parsing ports only. Not-valid
114849 +                                                                     for some earlier chip revisions */
114850 +} ioc_fm_port_rate_limit_t;
114851 +
114852 +
114853 +
114854 +/**************************************************************************//**
114855 + @Group         lnx_ioctl_FM_PORT_runtime_control_grp FM Port Runtime Control Unit
114856 +
114857 + @Description   FM Port Runtime control unit API functions, definitions and enums.
114858 +
114859 + @{
114860 +*//***************************************************************************/
114861 +
114862 +/**************************************************************************//**
114863 + @Description   An enum for defining FM Port counters.
114864 +                (Must match enum e_FmPortCounters defined in fm_port_ext.h)
114865 +*//***************************************************************************/
114866 +typedef enum ioc_fm_port_counters {
114867 +    e_IOC_FM_PORT_COUNTERS_CYCLE,                       /**< BMI performance counter */
114868 +    e_IOC_FM_PORT_COUNTERS_TASK_UTIL,                   /**< BMI performance counter */
114869 +    e_IOC_FM_PORT_COUNTERS_QUEUE_UTIL,                  /**< BMI performance counter */
114870 +    e_IOC_FM_PORT_COUNTERS_DMA_UTIL,                    /**< BMI performance counter */
114871 +    e_IOC_FM_PORT_COUNTERS_FIFO_UTIL,                   /**< BMI performance counter */
114872 +    e_IOC_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION,         /**< BMI Rx only performance counter */
114873 +    e_IOC_FM_PORT_COUNTERS_FRAME,                       /**< BMI statistics counter */
114874 +    e_IOC_FM_PORT_COUNTERS_DISCARD_FRAME,               /**< BMI statistics counter */
114875 +    e_IOC_FM_PORT_COUNTERS_DEALLOC_BUF,                 /**< BMI deallocate buffer statistics counter */
114876 +    e_IOC_FM_PORT_COUNTERS_RX_BAD_FRAME,                /**< BMI Rx only statistics counter */
114877 +    e_IOC_FM_PORT_COUNTERS_RX_LARGE_FRAME,              /**< BMI Rx only statistics counter */
114878 +    e_IOC_FM_PORT_COUNTERS_RX_FILTER_FRAME,             /**< BMI Rx & OP only statistics counter */
114879 +    e_IOC_FM_PORT_COUNTERS_RX_LIST_DMA_ERR,             /**< BMI Rx, OP & HC only statistics counter */
114880 +    e_IOC_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD,   /**< BMI Rx, OP & HC statistics counter */
114881 +    e_IOC_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER,  /**< BMI Rx, OP & HC only statistics counter */
114882 +    e_IOC_FM_PORT_COUNTERS_WRED_DISCARD,                /**< BMI OP & HC only statistics counter */
114883 +    e_IOC_FM_PORT_COUNTERS_LENGTH_ERR,                  /**< BMI non-Rx statistics counter */
114884 +    e_IOC_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT,           /**< BMI non-Rx statistics counter */
114885 +    e_IOC_FM_PORT_COUNTERS_DEQ_TOTAL,                   /**< QMI total QM dequeues counter */
114886 +    e_IOC_FM_PORT_COUNTERS_ENQ_TOTAL,                   /**< QMI total QM enqueues counter */
114887 +    e_IOC_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT,            /**< QMI counter */
114888 +    e_IOC_FM_PORT_COUNTERS_DEQ_CONFIRM                  /**< QMI counter */
114889 +} ioc_fm_port_counters;
114890 +
114891 +typedef struct ioc_fm_port_bmi_stats_t {
114892 +    uint32_t cnt_cycle;
114893 +    uint32_t cnt_task_util;
114894 +    uint32_t cnt_queue_util;
114895 +    uint32_t cnt_dma_util;
114896 +    uint32_t cnt_fifo_util;
114897 +    uint32_t cnt_rx_pause_activation;
114898 +    uint32_t cnt_frame;
114899 +    uint32_t cnt_discard_frame;
114900 +    uint32_t cnt_dealloc_buf;
114901 +    uint32_t cnt_rx_bad_frame;
114902 +    uint32_t cnt_rx_large_frame;
114903 +    uint32_t cnt_rx_filter_frame;
114904 +    uint32_t cnt_rx_list_dma_err;
114905 +    uint32_t cnt_rx_out_of_buffers_discard;
114906 +    uint32_t cnt_wred_discard;
114907 +    uint32_t cnt_length_err;
114908 +    uint32_t cnt_unsupported_format;
114909 +} ioc_fm_port_bmi_stats_t;
114910 +
114911 +/**************************************************************************//**
114912 + @Description   Structure for Port id parameters.
114913 +                (Description may be inaccurate;
114914 +                must match struct t_FmPortCongestionGrps defined in fm_port_ext.h)
114915 +
114916 +                Fields commented 'IN' are passed by the port module to be used
114917 +                by the FM module.
114918 +                Fields commented 'OUT' will be filled by FM before returning to port.
114919 +*//***************************************************************************/
114920 +typedef struct ioc_fm_port_congestion_groups_t {
114921 +    uint16_t    num_of_congestion_grps_to_consider;     /**< The number of required congestion groups
114922 +                                                             to define the size of the following array */
114923 +    uint8_t     congestion_grps_to_consider [FM_PORT_NUM_OF_CONGESTION_GRPS];
114924 +                                                        /**< An array of CG indexes;
114925 +                                                             Note that the size of the array should be
114926 +                                                             'num_of_congestion_grps_to_consider'. */
114927 +#if DPAA_VERSION >= 11
114928 +    bool        pfc_priorities_enable[FM_PORT_NUM_OF_CONGESTION_GRPS][FM_MAX_NUM_OF_PFC_PRIORITIES];
114929 +                                                        /**< A matrix that represents the map between the CG ids
114930 +                                                             defined in 'congestion_grps_to_consider' to the priorities
114931 +                                                             mapping array. */
114932 +#endif /* DPAA_VERSION >= 11 */
114933 +} ioc_fm_port_congestion_groups_t;
114934 +
114935 +
114936 +
114937 +/**************************************************************************//**
114938 + @Function      FM_PORT_Disable
114939 +
114940 + @Description   Gracefully disable an FM port. The port will not start new tasks after all
114941 +                tasks associated with the port are terminated.
114942 +
114943 + @Return        0 on success; error code otherwise.
114944 +
114945 + @Cautions      This is a blocking routine, it returns after port is
114946 +                gracefully stopped, i.e. the port will not except new frames,
114947 +                but it will finish all frames or tasks which were already began
114948 +*//***************************************************************************/
114949 +#define FM_PORT_IOC_DISABLE   _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(1))
114950 +
114951 +/**************************************************************************//**
114952 + @Function      FM_PORT_Enable
114953 +
114954 + @Description   A runtime routine provided to allow disable/enable of port.
114955 +
114956 + @Return        0 on success; error code otherwise.
114957 +*//***************************************************************************/
114958 +#define FM_PORT_IOC_ENABLE   _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(2))
114959 +
114960 +/**************************************************************************//**
114961 + @Function      FM_PORT_SetRateLimit
114962 +
114963 + @Description   Calling this routine enables rate limit algorithm.
114964 +                By default, this functionality is disabled.
114965 +                Note that rate-limit mechanism uses the FM time stamp.
114966 +                The selected rate limit specified here would be
114967 +                rounded DOWN to the nearest 16M.
114968 +
114969 +                May be used for Tx and offline parsing ports only
114970 +
114971 + @Param[in]     ioc_fm_port_rate_limit A structure of rate limit parameters
114972 +
114973 + @Return        0 on success; error code otherwise.
114974 +*//***************************************************************************/
114975 +#define FM_PORT_IOC_SET_RATE_LIMIT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(3), ioc_fm_port_rate_limit_t)
114976 +
114977 +/**************************************************************************//**
114978 + @Function      FM_PORT_DeleteRateLimit
114979 +
114980 + @Description   Calling this routine disables the previously enabled rate limit.
114981 +
114982 +                May be used for Tx and offline parsing ports only
114983 +
114984 + @Return        0 on success; error code otherwise.
114985 +*//***************************************************************************/
114986 +#define FM_PORT_IOC_DELETE_RATE_LIMIT   _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(5))
114987 +#define FM_PORT_IOC_REMOVE_RATE_LIMIT   FM_PORT_IOC_DELETE_RATE_LIMIT
114988 +
114989 +
114990 +/**************************************************************************//**
114991 + @Function      FM_PORT_AddCongestionGrps
114992 +
114993 + @Description   This routine effects the corresponding Tx port.
114994 +                It should be called in order to enable pause
114995 +                frame transmission in case of congestion in one or more
114996 +                of the congestion groups relevant to this port.
114997 +                Each call to this routine may add one or more congestion
114998 +                groups to be considered relevant to this port.
114999 +
115000 +                May be used for Rx, or RX+OP ports only (depending on chip)
115001 +
115002 + @Param[in]     ioc_fm_port_congestion_groups_t - A pointer to an array of
115003 +                                                congestion group ids to consider.
115004 +
115005 + @Return        0 on success; error code otherwise.
115006 +*//***************************************************************************/
115007 +#define FM_PORT_IOC_ADD_CONGESTION_GRPS    _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(34), ioc_fm_port_congestion_groups_t)
115008 +
115009 +/**************************************************************************//**
115010 + @Function      FM_PORT_RemoveCongestionGrps
115011 +
115012 + @Description   This routine effects the corresponding Tx port. It should be
115013 +                called when congestion groups were
115014 +                defined for this port and are no longer relevant, or pause
115015 +                frames transmitting is not required on their behalf.
115016 +                Each call to this routine may remove one or more congestion
115017 +                groups to be considered relevant to this port.
115018 +
115019 +                May be used for Rx, or RX+OP ports only (depending on chip)
115020 +
115021 + @Param[in]     ioc_fm_port_congestion_groups_t - A pointer to an array of
115022 +                                                congestion group ids to consider.
115023 +
115024 + @Return        0 on success; error code otherwise.
115025 +*//***************************************************************************/
115026 +#define FM_PORT_IOC_REMOVE_CONGESTION_GRPS    _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(35), ioc_fm_port_congestion_groups_t)
115027 +
115028 +/**************************************************************************//**
115029 + @Function      FM_PORT_SetErrorsRoute
115030 +
115031 + @Description   Errors selected for this routine will cause a frame with that error
115032 +                to be enqueued to error queue.
115033 +                Errors not selected for this routine will cause a frame with that error
115034 +                to be enqueued to the one of the other port queues.
115035 +                By default all errors are defined to be enqueued to error queue.
115036 +                Errors that were configured to be discarded (at initialization)
115037 +                may not be selected here.
115038 +
115039 +                May be used for Rx and offline parsing ports only
115040 +
115041 + @Param[in]     ioc_fm_port_frame_err_select_t  A list of errors to enqueue to error queue
115042 +
115043 + @Return        0 on success; error code otherwise.
115044 +
115045 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
115046 +                (szbs001: How is it possible to have one function that needs to be
115047 +                          called BEFORE FM_PORT_Init() implemented as an ioctl,
115048 +                          which will ALWAYS be called AFTER the FM_PORT_Init()
115049 +                          for that port!?!?!?!???!?!??!?!?)
115050 +*//***************************************************************************/
115051 +#define FM_PORT_IOC_SET_ERRORS_ROUTE   _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(4), ioc_fm_port_frame_err_select_t)
115052 +
115053 +
115054 +/**************************************************************************//**
115055 + @Group         lnx_ioctl_FM_PORT_pcd_runtime_control_grp FM Port PCD Runtime Control Unit
115056 +
115057 + @Description   FM Port PCD Runtime control unit API functions, definitions and enums.
115058 +
115059 + @{
115060 +*//***************************************************************************/
115061 +
115062 +/**************************************************************************//**
115063 + @Description   A structure defining the KG scheme after the parser.
115064 +                (Must match struct t_FmPcdKgSchemeSelect defined in fm_port_ext.h)
115065 +
115066 +                This is relevant only to change scheme selection mode - from
115067 +                direct to indirect and vice versa, or when the scheme is selected directly,
115068 +                to select the scheme id.
115069 +
115070 +*//***************************************************************************/
115071 +typedef struct ioc_fm_pcd_kg_scheme_select_t {
115072 +    bool        direct;                     /**< TRUE to use 'scheme_id' directly, FALSE to use LCV.*/
115073 +    void       *scheme_id;                  /**< Relevant for 'direct'=TRUE only.
115074 +                                                 'scheme_id' selects the scheme after parser. */
115075 +} ioc_fm_pcd_kg_scheme_select_t;
115076 +
115077 +/**************************************************************************//**
115078 + @Description   Scheme IDs structure
115079 +                (Must match struct t_FmPcdPortSchemesParams defined in fm_port_ext.h)
115080 +*//***************************************************************************/
115081 +typedef struct ioc_fm_pcd_port_schemes_params_t {
115082 +    uint8_t     num_of_schemes;                         /**< Number of schemes for port to be bound to. */
115083 +    void        *scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];  /**< Array of 'num_of_schemes' schemes for the
115084 +                                                             port to be bound to */
115085 +} ioc_fm_pcd_port_schemes_params_t;
115086 +
115087 +/**************************************************************************//**
115088 + @Description   A union for defining port protocol parameters for parser
115089 +                (Must match union u_FmPcdHdrPrsOpts defined in fm_port_ext.h)
115090 +*//***************************************************************************/
115091 +typedef union ioc_fm_pcd_hdr_prs_opts_u {
115092 +    /* MPLS */
115093 +    struct {
115094 +        bool                label_interpretation_enable;/**< When this bit is set, the last MPLS label will be
115095 +                                                             interpreted as described in HW spec table. When the bit
115096 +                                                             is cleared, the parser will advance to MPLS next parse */
115097 +        ioc_net_header_type next_parse;                 /**< must be equal or higher than IPv4 */
115098 +    } mpls_prs_options;
115099 +
115100 +    /* VLAN */
115101 +    struct {
115102 +        uint16_t            tag_protocol_id1;           /**< User defined Tag Protocol Identifier, to be recognized
115103 +                                                             on VLAN TAG on top of 0x8100 and 0x88A8 */
115104 +        uint16_t            tag_protocol_id2;           /**< User defined Tag Protocol Identifier, to be recognized
115105 +                                                             on VLAN TAG on top of 0x8100 and 0x88A8 */
115106 +    } vlan_prs_options;
115107 +
115108 +    /* PPP */
115109 +    struct{
115110 +        bool                enable_mtu_check;           /**< Check validity of MTU according to RFC2516 */
115111 +    } pppoe_prs_options;
115112 +
115113 +    /* IPV6 */
115114 +    struct {
115115 +        bool                routing_hdr_disable;        /**< Disable routing header */
115116 +    } ipv6_prs_options;
115117 +
115118 +    /* UDP */
115119 +    struct {
115120 +        bool                pad_ignore_checksum;        /**< TRUE to ignore pad in checksum */
115121 +    } udp_prs_options;
115122 +
115123 +    /* TCP */
115124 +    struct {
115125 +        bool                pad_ignore_checksum;        /**< TRUE to ignore pad in checksum */
115126 +    } tcp_prs_options;
115127 +} ioc_fm_pcd_hdr_prs_opts_u;
115128 +
115129 +/**************************************************************************//**
115130 + @Description   A structure for defining each header for the parser
115131 +                (must match struct t_FmPcdPrsAdditionalHdrParams defined in fm_port_ext.h)
115132 +*//***************************************************************************/
115133 +typedef struct ioc_fm_pcd_prs_additional_hdr_params_t {
115134 +    ioc_net_header_type         hdr;                /**< Selected header */
115135 +    bool                        err_disable;        /**< TRUE to disable error indication */
115136 +    bool                        soft_prs_enable;    /**< Enable jump to SW parser when this
115137 +                                                         header is recognized by the HW parser. */
115138 +    uint8_t                     index_per_hdr;      /**< Normally 0, if more than one sw parser
115139 +                                                         attachments exists for the same header,
115140 +                                                         (in the main sw parser code) use this
115141 +                                                         index to distinguish between them. */
115142 +    bool                        use_prs_opts;       /**< TRUE to use parser options. */
115143 +    ioc_fm_pcd_hdr_prs_opts_u   prs_opts;           /**< A unuion according to header type,
115144 +                                                         defining the parser options selected.*/
115145 +} ioc_fm_pcd_prs_additional_hdr_params_t;
115146 +
115147 +/**************************************************************************//**
115148 + @Description   A structure for defining port PCD parameters
115149 +                (Must match t_FmPortPcdPrsParams defined in fm_port_ext.h)
115150 +*//***************************************************************************/
115151 +typedef struct ioc_fm_port_pcd_prs_params_t {
115152 +    uint8_t                         prs_res_priv_info;      /**< The private info provides a method of inserting
115153 +                                                                 port information into the parser result. This information
115154 +                                                                 may be extracted by KeyGen and be used for frames
115155 +                                                                 distribution when a per-port distinction is required,
115156 +                                                                 it may also be used as a port logical id for analyzing
115157 +                                                                 incoming frames. */
115158 +    uint8_t                         parsing_offset;         /**< Number of bytes from begining of packet to start parsing */
115159 +    ioc_net_header_type             first_prs_hdr;          /**< The type of the first header axpected at 'parsing_offset' */
115160 +    bool                            include_in_prs_statistics; /**< TRUE to include this port in the parser statistics */
115161 +    uint8_t                         num_of_hdrs_with_additional_params;
115162 +                                                            /**< Normally 0, some headers may get special parameters */
115163 +    ioc_fm_pcd_prs_additional_hdr_params_t  additional_params[IOC_FM_PCD_PRS_NUM_OF_HDRS];
115164 +                                                            /**< 'num_of_hdrs_with_additional_params' structures
115165 +                                                                  additional parameters for each header that requires them */
115166 +    bool                            set_vlan_tpid1;         /**< TRUE to configure user selection of Ethertype to
115167 +                                                                 indicate a VLAN tag (in addition to the TPID values
115168 +                                                                 0x8100 and 0x88A8). */
115169 +    uint16_t                        vlan_tpid1;             /**< extra tag to use if set_vlan_tpid1=TRUE. */
115170 +    bool                            set_vlan_tpid2;         /**< TRUE to configure user selection of Ethertype to
115171 +                                                                 indicate a VLAN tag (in addition to the TPID values
115172 +                                                                 0x8100 and 0x88A8). */
115173 +    uint16_t                        vlan_tpid2;             /**< extra tag to use if set_vlan_tpid1=TRUE. */
115174 +} ioc_fm_port_pcd_prs_params_t;
115175 +
115176 +/**************************************************************************//**
115177 + @Description   A structure for defining coarse alassification parameters
115178 +                (Must match t_FmPortPcdCcParams defined in fm_port_ext.h)
115179 +*//***************************************************************************/
115180 +typedef struct ioc_fm_port_pcd_cc_params_t {
115181 +    void                *cc_tree_id; /**< CC tree id */
115182 +} ioc_fm_port_pcd_cc_params_t;
115183 +
115184 +/**************************************************************************//**
115185 + @Description   A structure for defining keygen parameters
115186 +                (Must match t_FmPortPcdKgParams defined in fm_port_ext.h)
115187 +*//***************************************************************************/
115188 +typedef struct ioc_fm_port_pcd_kg_params_t {
115189 +    uint8_t             num_of_schemes;                 /**< Number of schemes for port to be bound to. */
115190 +    void               *scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];
115191 +                                                        /**< Array of 'num_of_schemes' schemes for the
115192 +                                                             port to be bound to */
115193 +    bool                direct_scheme;                  /**< TRUE for going from parser to a specific scheme,
115194 +                                                             regardless of parser result */
115195 +    void               *direct_scheme_id;               /**< Scheme id, as returned by FM_PCD_KgSetScheme;
115196 +                                                             relevant only if direct=TRUE. */
115197 +} ioc_fm_port_pcd_kg_params_t;
115198 +
115199 +/**************************************************************************//**
115200 + @Description   A structure for defining policer parameters
115201 +                (Must match t_FmPortPcdPlcrParams defined in fm_port_ext.h)
115202 +*//***************************************************************************/
115203 +typedef struct ioc_fm_port_pcd_plcr_params_t {
115204 +    void                *plcr_profile_id;               /**< Selected profile handle;
115205 +                                                             relevant in one of the following cases:
115206 +                                                             e_IOC_FM_PORT_PCD_SUPPORT_PLCR_ONLY or
115207 +                                                             e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR were selected,
115208 +                                                             or if any flow uses a KG scheme where policer
115209 +                                                                profile is not generated (bypass_plcr_profile_generation selected) */
115210 +} ioc_fm_port_pcd_plcr_params_t;
115211 +
115212 +/**************************************************************************//**
115213 + @Description   A structure for defining port PCD parameters
115214 +                (Must match struct t_FmPortPcdParams defined in fm_port_ext.h)
115215 +*//***************************************************************************/
115216 +typedef struct ioc_fm_port_pcd_params_t {
115217 +    ioc_fm_port_pcd_support         pcd_support;    /**< Relevant for Rx and offline ports only.
115218 +                                                         Describes the active PCD engines for this port. */
115219 +    void                            *net_env_id;    /**< HL Unused in PLCR only mode */
115220 +    ioc_fm_port_pcd_prs_params_t    *p_prs_params;  /**< Parser parameters for this port */
115221 +    ioc_fm_port_pcd_cc_params_t     *p_cc_params;   /**< Coarse classification parameters for this port */
115222 +    ioc_fm_port_pcd_kg_params_t     *p_kg_params;   /**< Keygen parameters for this port */
115223 +    ioc_fm_port_pcd_plcr_params_t   *p_plcr_params; /**< Policer parameters for this port */
115224 +    void                            *p_ip_reassembly_manip;/**< IP Reassembly manipulation */
115225 +#if (DPAA_VERSION >= 11)
115226 +    void                            *p_capwap_reassembly_manip;/**< CAPWAP Reassembly manipulation */
115227 +#endif /* (DPAA_VERSION >= 11) */
115228 +} ioc_fm_port_pcd_params_t;
115229 +
115230 +/**************************************************************************//**
115231 + @Description   A structure for defining the Parser starting point
115232 +                (Must match struct t_FmPcdPrsStart defined in fm_port_ext.h)
115233 +*//***************************************************************************/
115234 +typedef struct ioc_fm_pcd_prs_start_t {
115235 +    uint8_t             parsing_offset; /**< Number of bytes from begining of packet to
115236 +                                             start parsing */
115237 +    ioc_net_header_type first_prs_hdr;  /**< The type of the first header axpected at
115238 +                                             'parsing_offset' */
115239 +} ioc_fm_pcd_prs_start_t;
115240 +
115241 +
115242 +/**************************************************************************//**
115243 + @Description   FQID parameters structure
115244 +*//***************************************************************************/
115245 +typedef struct ioc_fm_port_pcd_fqids_params_t {
115246 +    uint32_t            num_fqids;  /**< Number of fqids to be allocated for the port */
115247 +    uint8_t             alignment;  /**< Alignment required for this port */
115248 +    uint32_t            base_fqid;  /**< output parameter - the base fqid */
115249 +} ioc_fm_port_pcd_fqids_params_t;
115250 +
115251 +
115252 +/**************************************************************************//**
115253 + @Function      FM_PORT_IOC_ALLOC_PCD_FQIDS
115254 +
115255 + @Description   Allocates FQID's
115256 +
115257 +                May be used for Rx and offline parsing ports only
115258 +
115259 + @Param[in,out] ioc_fm_port_pcd_fqids_params_t  Parameters for allocating FQID's
115260 +
115261 + @Return        0 on success; error code otherwise.
115262 +*//***************************************************************************/
115263 +#define FM_PORT_IOC_ALLOC_PCD_FQIDS   _IOWR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(19), ioc_fm_port_pcd_fqids_params_t)
115264 +
115265 +/**************************************************************************//**
115266 + @Function      FM_PORT_IOC_FREE_PCD_FQIDS
115267 +
115268 + @Description   Frees previously-allocated FQIDs
115269 +
115270 +                May be used for Rx and offline parsing ports only
115271 +
115272 + @Param[in]            uint32_t        Base FQID of previously allocated range.
115273 +
115274 + @Return        0 on success; error code otherwise.
115275 +*//***************************************************************************/
115276 +#define FM_PORT_IOC_FREE_PCD_FQIDS   _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(19), uint32_t)
115277 +
115278 +
115279 +/**************************************************************************//**
115280 + @Function      FM_PORT_SetPCD
115281 +
115282 + @Description   Calling this routine defines the port's PCD configuration.
115283 +                It changes it from its default configuration which is PCD
115284 +                disabled (BMI to BMI) and configures it according to the passed
115285 +                parameters.
115286 +
115287 +                May be used for Rx and offline parsing ports only
115288 +
115289 + @Param[in]     ioc_fm_port_pcd_params_t    A Structure of parameters defining the port's PCD
115290 +                                            configuration.
115291 +
115292 + @Return        0 on success; error code otherwise.
115293 +*//***************************************************************************/
115294 +#if defined(CONFIG_COMPAT)
115295 +#define FM_PORT_IOC_SET_PCD_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(20), ioc_compat_fm_port_pcd_params_t)
115296 +#endif
115297 +#define FM_PORT_IOC_SET_PCD _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(20), ioc_fm_port_pcd_params_t)
115298 +
115299 +/**************************************************************************//**
115300 + @Function      FM_PORT_DeletePCD
115301 +
115302 + @Description   Calling this routine releases the port's PCD configuration.
115303 +                The port returns to its default configuration which is PCD
115304 +                disabled (BMI to BMI) and all PCD configuration is removed.
115305 +
115306 +                May be used for Rx and offline parsing ports which are
115307 +                in PCD mode only
115308 +
115309 + @Return        0 on success; error code otherwise.
115310 +*//***************************************************************************/
115311 +#define FM_PORT_IOC_DELETE_PCD _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(21))
115312 +
115313 +/**************************************************************************//**
115314 + @Function      FM_PORT_AttachPCD
115315 +
115316 + @Description   This routine may be called after FM_PORT_DetachPCD was called,
115317 +                to return to the originally configured PCD support flow.
115318 +                The couple of routines are used to allow PCD configuration changes
115319 +                that demand that PCD will not be used while changes take place.
115320 +
115321 +                May be used for Rx and offline parsing ports which are
115322 +                in PCD mode only
115323 +
115324 + @Return        0 on success; error code otherwise.
115325 +*//***************************************************************************/
115326 +#define FM_PORT_IOC_ATTACH_PCD _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(23))
115327 +
115328 +/**************************************************************************//**
115329 + @Function      FM_PORT_DetachPCD
115330 +
115331 + @Description   Calling this routine detaches the port from its PCD functionality.
115332 +                The port returns to its default flow which is BMI to BMI.
115333 +
115334 +                May be used for Rx and offline parsing ports which are
115335 +                in PCD mode only
115336 +
115337 + @Return        0 on success; error code otherwise.
115338 +*//***************************************************************************/
115339 +#define FM_PORT_IOC_DETACH_PCD _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(22))
115340 +
115341 +/**************************************************************************//**
115342 + @Function      FM_PORT_PcdPlcrAllocProfiles
115343 +
115344 + @Description   This routine may be called only for ports that use the Policer in
115345 +                order to allocate private policer profiles.
115346 +
115347 + @Param[in]     uint16_t       The number of required policer profiles
115348 +
115349 + @Return        0 on success; error code otherwise.
115350 +
115351 + @Cautions      Allowed before FM_PORT_SetPCD() only.
115352 +*//***************************************************************************/
115353 +#define FM_PORT_IOC_PCD_PLCR_ALLOC_PROFILES     _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(24), uint16_t)
115354 +
115355 +/**************************************************************************//**
115356 + @Function      FM_PORT_PcdPlcrFreeProfiles
115357 +
115358 + @Description   This routine should be called for freeing private policer profiles.
115359 +
115360 + @Return        0 on success; error code otherwise.
115361 +
115362 + @Cautions      Allowed before FM_PORT_SetPCD() only.
115363 +*//***************************************************************************/
115364 +#define FM_PORT_IOC_PCD_PLCR_FREE_PROFILES     _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(25))
115365 +
115366 +/**************************************************************************//**
115367 + @Function      FM_PORT_PcdKgModifyInitialScheme
115368 +
115369 + @Description   This routine may be called only for ports that use the keygen in
115370 +                order to change the initial scheme frame should be routed to.
115371 +                The change may be of a scheme id (in case of direct mode),
115372 +                from direct to indirect, or from indirect to direct - specifying the scheme id.
115373 +
115374 + @Param[in]     ioc_fm_pcd_kg_scheme_select_t   A structure of parameters for defining whether
115375 +                                                a scheme is direct/indirect, and if direct - scheme id.
115376 +
115377 + @Return        0 on success; error code otherwise.
115378 +*//***************************************************************************/
115379 +#if defined(CONFIG_COMPAT)
115380 +#define FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(26), ioc_compat_fm_pcd_kg_scheme_select_t)
115381 +#endif
115382 +#define FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(26), ioc_fm_pcd_kg_scheme_select_t)
115383 +
115384 +/**************************************************************************//**
115385 + @Function      FM_PORT_PcdPlcrModifyInitialProfile
115386 +
115387 + @Description   This routine may be called for ports with flows
115388 +                e_IOC_FM_PCD_SUPPORT_PLCR_ONLY or e_IOC_FM_PCD_SUPPORT_PRS_AND_PLCR  only,
115389 +                to change the initial Policer profile frame should be routed to.
115390 +                The change may be of a profile and/or absolute/direct mode selection.
115391 +
115392 + @Param[in]     ioc_fm_obj_t       Policer profile Id as returned from FM_PCD_PlcrSetProfile.
115393 +
115394 + @Return        0 on success; error code otherwise.
115395 +*//***************************************************************************/
115396 +#if defined(CONFIG_COMPAT)
115397 +#define FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(27), ioc_compat_fm_obj_t)
115398 +#endif
115399 +#define FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(27), ioc_fm_obj_t)
115400 +
115401 +/**************************************************************************//**
115402 + @Function      FM_PORT_PcdCcModifyTree
115403 +
115404 + @Description   This routine may be called to change this port connection to
115405 +                a pre-initializes coarse classification Tree.
115406 +
115407 + @Param[in]     ioc_fm_obj_t    Id of new coarse classification tree selected for this port.
115408 +
115409 + @Return        0 on success; error code otherwise.
115410 +
115411 + @Cautions      Allowed only following FM_PORT_SetPCD() and FM_PORT_DetachPCD()
115412 +*//***************************************************************************/
115413 +#if defined(CONFIG_COMPAT)
115414 +#define FM_PORT_IOC_PCD_CC_MODIFY_TREE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(28), ioc_compat_fm_obj_t)
115415 +#endif
115416 +#define FM_PORT_IOC_PCD_CC_MODIFY_TREE _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(28), ioc_fm_obj_t)
115417 +
115418 +/**************************************************************************//**
115419 + @Function      FM_PORT_PcdKgBindSchemes
115420 +
115421 + @Description   These routines may be called for modifying the binding of ports
115422 +                to schemes. The scheme itself is not added,
115423 +                just this specific port starts using it.
115424 +
115425 + @Param[in]     ioc_fm_pcd_port_schemes_params_t    Schemes parameters structre
115426 +
115427 + @Return        0 on success; error code otherwise.
115428 +
115429 + @Cautions      Allowed only following FM_PORT_SetPCD().
115430 +*//***************************************************************************/
115431 +#if defined(CONFIG_COMPAT)
115432 +#define FM_PORT_IOC_PCD_KG_BIND_SCHEMES_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(30), ioc_compat_fm_pcd_port_schemes_params_t)
115433 +#endif
115434 +#define FM_PORT_IOC_PCD_KG_BIND_SCHEMES _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(30), ioc_fm_pcd_port_schemes_params_t)
115435 +
115436 +/**************************************************************************//**
115437 + @Function      FM_PORT_PcdKgUnbindSchemes
115438 +
115439 + @Description   These routines may be called for modifying the binding of ports
115440 +                to schemes. The scheme itself is not removed or invalidated,
115441 +                just this specific port stops using it.
115442 +
115443 + @Param[in]     ioc_fm_pcd_port_schemes_params_t    Schemes parameters structre
115444 +
115445 + @Return        0 on success; error code otherwise.
115446 +
115447 + @Cautions      Allowed only following FM_PORT_SetPCD().
115448 +*//***************************************************************************/
115449 +#if defined(CONFIG_COMPAT)
115450 +#define FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(31), ioc_compat_fm_pcd_port_schemes_params_t)
115451 +#endif
115452 +#define FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(31), ioc_fm_pcd_port_schemes_params_t)
115453 +
115454 +typedef struct ioc_fm_port_mac_addr_params_t {
115455 +    uint8_t addr[ENET_NUM_OCTETS_PER_ADDRESS];
115456 +} ioc_fm_port_mac_addr_params_t;
115457 +
115458 +/**************************************************************************//**
115459 + @Function      FM_MAC_AddHashMacAddr
115460 +
115461 + @Description   Add an Address to the hash table. This is for filter purpose only.
115462 +
115463 + @Param[in]     ioc_fm_port_mac_addr_params_t - Ethernet Mac address
115464 +
115465 + @Return        E_OK on success; Error code otherwise.
115466 +
115467 + @Cautions      Allowed only following FM_MAC_Init(). It is a filter only address.
115468 + @Cautions      Some address need to be filtered out in upper FM blocks.
115469 +*//***************************************************************************/
115470 +#define FM_PORT_IOC_ADD_RX_HASH_MAC_ADDR   _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(36), ioc_fm_port_mac_addr_params_t)
115471 +
115472 +/**************************************************************************//**
115473 + @Function      FM_MAC_RemoveHashMacAddr
115474 +
115475 + @Description   Delete an Address to the hash table. This is for filter purpose only.
115476 +
115477 + @Param[in]     ioc_fm_port_mac_addr_params_t - Ethernet Mac address
115478 +
115479 + @Return        E_OK on success; Error code otherwise.
115480 +
115481 + @Cautions      Allowed only following FM_MAC_Init().
115482 +*//***************************************************************************/
115483 +#define FM_PORT_IOC_REMOVE_RX_HASH_MAC_ADDR   _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(37), ioc_fm_port_mac_addr_params_t)
115484 +
115485 +typedef struct ioc_fm_port_tx_pause_frames_params_t {
115486 +    uint8_t  priority;
115487 +    uint16_t pause_time;
115488 +    uint16_t thresh_time;
115489 +} ioc_fm_port_tx_pause_frames_params_t;
115490 +
115491 +/**************************************************************************//**
115492 + @Function      FM_MAC_SetTxPauseFrames
115493 +
115494 + @Description   Enable/Disable transmission of Pause-Frames.
115495 +                The routine changes the default configuration:
115496 +                pause-time - [0xf000]
115497 +                threshold-time - [0]
115498 +
115499 + @Param[in]     ioc_fm_port_tx_pause_frames_params_t A structure holding the required parameters.
115500 +
115501 + @Return        E_OK on success; Error code otherwise.
115502 +
115503 + @Cautions      Allowed only following FM_MAC_Init().
115504 +                PFC is supported only on new mEMAC; i.e. in MACs that don't have
115505 +                PFC support (10G-MAC and dTSEC), user should use 'FM_MAC_NO_PFC'
115506 +                in the 'priority' field.
115507 +*//***************************************************************************/
115508 +#define FM_PORT_IOC_SET_TX_PAUSE_FRAMES       _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(40), ioc_fm_port_tx_pause_frames_params_t)
115509 +
115510 +typedef struct ioc_fm_port_mac_statistics_t {
115511 +    /* RMON */
115512 +        uint64_t  e_stat_pkts_64;            /**< r-10G tr-DT 64 byte frame counter */
115513 +        uint64_t  e_stat_pkts_65_to_127;     /**< r-10G 65 to 127 byte frame counter */
115514 +        uint64_t  e_stat_pkts_128_to_255;    /**< r-10G 128 to 255 byte frame counter */
115515 +        uint64_t  e_stat_pkts_256_to_511;    /**< r-10G 256 to 511 byte frame counter */
115516 +        uint64_t  e_stat_pkts_512_to_1023;   /**< r-10G 512 to 1023 byte frame counter */
115517 +        uint64_t  e_stat_pkts_1024_to_1518;  /**< r-10G 1024 to 1518 byte frame counter */
115518 +        uint64_t  e_stat_pkts_1519_to_1522;  /**< r-10G 1519 to 1522 byte good frame count */
115519 +    /* */
115520 +        uint64_t  e_stat_fragments;          /**< Total number of packets that were less than 64 octets long with a wrong CRC.*/
115521 +        uint64_t  e_stat_jabbers;            /**< Total number of packets longer than valid maximum length octets */
115522 +        uint64_t  e_stat_drop_events;        /**< number of dropped packets due to internal errors of the MAC Client (during recieve). */
115523 +        uint64_t  e_stat_CRC_align_errors;   /**< Incremented when frames of correct length but with CRC error are received.*/
115524 +        uint64_t  e_stat_undersize_pkts;     /**< Incremented for frames under 64 bytes with a valid FCS and otherwise well formed;
115525 +                                                This count does not include range length errors */
115526 +        uint64_t  e_stat_oversize_pkts;      /**< Incremented for frames which exceed 1518 (non VLAN) or 1522 (VLAN) and contains
115527 +                                                a valid FCS and otherwise well formed */
115528 +    /* Pause */
115529 +        uint64_t  te_stat_pause;             /**< Pause MAC Control received */
115530 +        uint64_t  re_stat_pause;             /**< Pause MAC Control sent */
115531 +    /* MIB II */
115532 +        uint64_t  if_in_octets;              /**< Total number of byte received. */
115533 +        uint64_t  if_in_pkts;                /**< Total number of packets received.*/
115534 +        uint64_t  if_in_ucast_pkts;          /**< Total number of unicast frame received;
115535 +                                             NOTE: this counter is not supported on dTSEC MAC */
115536 +        uint64_t  if_in_mcast_pkts;          /**< Total number of multicast frame received*/
115537 +        uint64_t  if_in_bcast_pkts;          /**< Total number of broadcast frame received */
115538 +        uint64_t  if_in_discards;            /**< Frames received, but discarded due to problems within the MAC RX. */
115539 +        uint64_t  if_in_errors;              /**< Number of frames received with error:
115540 +                                                   - FIFO Overflow Error
115541 +                                                   - CRC Error
115542 +                                                   - Frame Too Long Error
115543 +                                                   - Alignment Error
115544 +                                                   - The dedicated Error Code (0xfe, not a code error) was received */
115545 +        uint64_t  if_out_octets;             /**< Total number of byte sent. */
115546 +        uint64_t  if_out_pkts;               /**< Total number of packets sent .*/
115547 +        uint64_t  if_out_ucast_pkts;         /**< Total number of unicast frame sent;
115548 +                                             NOTE: this counter is not supported on dTSEC MAC */
115549 +        uint64_t  if_out_mcast_pkts;         /**< Total number of multicast frame sent */
115550 +        uint64_t  if_out_bcast_pkts;         /**< Total number of multicast frame sent */
115551 +        uint64_t  if_out_discards;           /**< Frames received, but discarded due to problems within the MAC TX N/A!.*/
115552 +        uint64_t  if_out_errors;             /**< Number of frames transmitted with error:
115553 +                                                   - FIFO Overflow Error
115554 +                                                   - FIFO Underflow Error
115555 +                                                   - Other */
115556 +} ioc_fm_port_mac_statistics_t;
115557 +
115558 +/**************************************************************************//**
115559 + @Function      FM_MAC_GetStatistics
115560 +
115561 + @Description   get all MAC statistics counters
115562 +
115563 + @Param[out]    ioc_fm_port_mac_statistics_t    A structure holding the statistics
115564 +
115565 + @Return        E_OK on success; Error code otherwise.
115566 +
115567 + @Cautions      Allowed only following FM_Init().
115568 +*//***************************************************************************/
115569 +#define FM_PORT_IOC_GET_MAC_STATISTICS        _IOR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(41), ioc_fm_port_mac_statistics_t)
115570 +
115571 +/**************************************************************************//**
115572 + @Function      FM_PORT_ConfigBufferPrefixContent
115573 +
115574 + @Description   Defines the structure, size and content of the application buffer.
115575 +                The prefix will
115576 +                In Tx ports, if 'passPrsResult', the application
115577 +                should set a value to their offsets in the prefix of
115578 +                the FM will save the first 'privDataSize', than,
115579 +                depending on 'passPrsResult' and 'passTimeStamp', copy parse result
115580 +                and timeStamp, and the packet itself (in this order), to the
115581 +                application buffer, and to offset.
115582 +                Calling this routine changes the buffer margins definitions
115583 +                in the internal driver data base from its default
115584 +                configuration: Data size:  [DEFAULT_FM_SP_bufferPrefixContent_privDataSize]
115585 +                               Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult].
115586 +                               Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp].
115587 +
115588 +                May be used for all ports
115589 +
115590 + @Param[in]     ioc_fm_buffer_prefix_content_t  A structure holding the required parameters.
115591 +
115592 + @Return        E_OK on success; Error code otherwise.
115593 +
115594 + @Cautions      Allowed only following FM_PORT_Config() and before FM_PORT_Init().
115595 +*//***************************************************************************/
115596 +#define FM_PORT_IOC_CONFIG_BUFFER_PREFIX_CONTENT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(39), ioc_fm_buffer_prefix_content_t)
115597 +
115598 +#if (DPAA_VERSION >= 11)
115599 +typedef struct ioc_fm_port_vsp_alloc_params_t {
115600 +    uint8_t     num_of_profiles;          /**< Number of Virtual Storage Profiles */
115601 +    uint8_t     dflt_relative_id;         /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port
115602 +                                             The same default Virtual-Storage-Profile-id will be for coupled Tx port
115603 +                                             if relevant function called for Rx port */
115604 +    void    *p_fm_tx_port;             /**< Handle to coupled Tx Port; not relevant for OP port. */
115605 +}ioc_fm_port_vsp_alloc_params_t;
115606 +
115607 +/**************************************************************************//**
115608 + @Function      FM_PORT_VSPAlloc
115609 +
115610 + @Description   This routine allocated VSPs per port and forces the port to work
115611 +                in VSP mode. Note that the port is initialized by default with the
115612 +                physical-storage-profile only.
115613 +
115614 + @Param[in]     h_FmPort    A handle to a FM Port module.
115615 + @Param[in]     p_Params    A structure of parameters for allocation VSP's per port
115616 +
115617 + @Return        E_OK on success; Error code otherwise.
115618 +
115619 + @Cautions      Allowed only following FM_PORT_Init(), and before FM_PORT_SetPCD()
115620 +                and also before FM_PORT_Enable() (i.e. the port should be disabled).
115621 +*//***************************************************************************/
115622 +#if defined(CONFIG_COMPAT)
115623 +#define FM_PORT_IOC_VSP_ALLOC_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(38), ioc_compat_fm_port_vsp_alloc_params_t)
115624 +#endif
115625 +#define FM_PORT_IOC_VSP_ALLOC _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(38), ioc_fm_port_vsp_alloc_params_t)
115626 +#endif /* (DPAA_VERSION >= 11) */
115627 +
115628 +/**************************************************************************//**
115629 + @Function      FM_PORT_GetBmiCounters
115630 +
115631 + @Description   Read port's BMI stat counters and place them into
115632 +                a designated structure of counters.
115633 +
115634 + @Param[in]     h_FmPort    A handle to a FM Port module.
115635 + @Param[out]    p_BmiStats  counters structure
115636 +
115637 + @Return        E_OK on success; Error code otherwise.
115638 +
115639 + @Cautions      Allowed only following FM_PORT_Init().
115640 +*//***************************************************************************/
115641 +
115642 +#define FM_PORT_IOC_GET_BMI_COUNTERS _IOR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(42), ioc_fm_port_bmi_stats_t)
115643 +
115644 +
115645 +/** @} */ /* end of lnx_ioctl_FM_PORT_pcd_runtime_control_grp group */
115646 +/** @} */ /* end of lnx_ioctl_FM_PORT_runtime_control_grp group */
115647 +
115648 +/** @} */ /* end of lnx_ioctl_FM_PORT_grp group */
115649 +/** @} */ /* end of lnx_ioctl_FM_grp group */
115650 +#endif /* __FM_PORT_IOCTLS_H */
115651 --- /dev/null
115652 +++ b/include/uapi/linux/fmd/Peripherals/fm_test_ioctls.h
115653 @@ -0,0 +1,208 @@
115654 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
115655 + * All rights reserved.
115656 + *
115657 + * Redistribution and use in source and binary forms, with or without
115658 + * modification, are permitted provided that the following conditions are met:
115659 + *     * Redistributions of source code must retain the above copyright
115660 + *       notice, this list of conditions and the following disclaimer.
115661 + *     * Redistributions in binary form must reproduce the above copyright
115662 + *       notice, this list of conditions and the following disclaimer in the
115663 + *       documentation and/or other materials provided with the distribution.
115664 + *     * Neither the name of Freescale Semiconductor nor the
115665 + *       names of its contributors may be used to endorse or promote products
115666 + *       derived from this software without specific prior written permission.
115667 + *
115668 + *
115669 + * ALTERNATIVELY, this software may be distributed under the terms of the
115670 + * GNU General Public License ("GPL") as published by the Free Software
115671 + * Foundation, either version 2 of that License or (at your option) any
115672 + * later version.
115673 + *
115674 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
115675 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
115676 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
115677 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
115678 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
115679 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
115680 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
115681 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
115682 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
115683 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
115684 + */
115685 +
115686 +/**************************************************************************//**
115687 + @File          fm_test_ioctls.h
115688 +
115689 + @Description   FM Char device ioctls
115690 +*//***************************************************************************/
115691 +#ifndef __FM_TEST_IOCTLS_H
115692 +#define __FM_TEST_IOCTLS_H
115693 +
115694 +#include "ioctls.h"
115695 +
115696 +
115697 +/**************************************************************************//**
115698 + @Group         lnx_ioctl_FMT_grp Frame Manager Test Linux IOCTL API
115699 +
115700 + @Description   FM-Test Linux ioctls definitions and enums
115701 +
115702 + @{
115703 +*//***************************************************************************/
115704 +
115705 +#define IOC_FMT_MAX_NUM_OF_PORTS        26
115706 +
115707 +/**************************************************************************//**
115708 + @Collection    TEST Parameters
115709 +*//***************************************************************************/
115710 +/**************************************************************************//**
115711 +  @Description: Name of the FM-Test chardev
115712 +*//***************************************************************************/
115713 +#define DEV_FM_TEST_NAME                "fm-test-port"
115714 +
115715 +#define DEV_FM_TEST_PORTS_MINOR_BASE    0
115716 +#define DEV_FM_TEST_MAX_MINORS          (DEV_FM_TEST_PORTS_MINOR_BASE + IOC_FMT_MAX_NUM_OF_PORTS)
115717 +
115718 +#define FMT_PORT_IOC_NUM(n)             n
115719 +/* @} */
115720 +
115721 +/**************************************************************************//**
115722 + @Group         lnx_ioctl_FMT_lib_grp FM-Test library
115723 +
115724 + @Description   TODO
115725 +
115726 + @{
115727 +*//***************************************************************************/
115728 +
115729 +/**************************************************************************//**
115730 + @Description   TODO
115731 +*//***************************************************************************/
115732 +typedef uint8_t ioc_fmt_xxx_t;
115733 +
115734 +#define FM_PRS_MAX 32
115735 +#define FM_TIME_STAMP_MAX 8
115736 +
115737 +/**************************************************************************//**
115738 + @Description   FM Port buffer content description
115739 +*//***************************************************************************/
115740 +typedef struct ioc_fmt_buff_context_t {
115741 +    void            *p_user_priv;
115742 +    uint8_t         fm_prs_res[FM_PRS_MAX];
115743 +    uint8_t         fm_time_stamp[FM_TIME_STAMP_MAX];
115744 +} ioc_fmt_buff_context_t;
115745 +
115746 +#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
115747 +typedef struct ioc_fmt_compat_buff_context_t {
115748 +    compat_uptr_t         p_user_priv;
115749 +    uint8_t               fm_prs_res[FM_PRS_MAX];
115750 +    uint8_t               fm_time_stamp[FM_TIME_STAMP_MAX];
115751 +} ioc_fmt_compat_buff_context_t;
115752 +#endif
115753 +
115754 +/**************************************************************************//**
115755 + @Description   Buffer descriptor
115756 +*//***************************************************************************/
115757 +typedef struct ioc_fmt_buff_desc_t {
115758 +    uint32_t               qid;
115759 +    void                   *p_data;
115760 +    uint32_t               size;
115761 +    uint32_t               status;
115762 +    ioc_fmt_buff_context_t buff_context;
115763 +} ioc_fmt_buff_desc_t;
115764 +
115765 +#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
115766 +typedef struct ioc_fmt_compat_buff_desc_t {
115767 +    uint32_t                qid;
115768 +    compat_uptr_t           p_data;
115769 +    uint32_t                size;
115770 +    uint32_t                status;
115771 +    ioc_fmt_compat_buff_context_t buff_context;
115772 +} ioc_fmt_compat_buff_desc_t;
115773 +#endif
115774 +
115775 +/**************************************************************************//**
115776 + @Group         lnx_ioctl_FMT_runtime_control_grp FM-Test Runtime Control Unit
115777 +
115778 + @Description   TODO
115779 + @{
115780 +*//***************************************************************************/
115781 +
115782 +/** @} */ /* end of lnx_ioctl_FMT_runtime_control_grp group */
115783 +
115784 +
115785 +/**************************************************************************//**
115786 + @Group         lnx_ioctl_FMTP_lib_grp FM-Port-Test library
115787 +
115788 + @Description   TODO
115789 +
115790 + @{
115791 +*//***************************************************************************/
115792 +
115793 +/**************************************************************************//**
115794 + @Description   FM-Test FM port type
115795 +*//***************************************************************************/
115796 +typedef enum ioc_fmt_port_type {
115797 +    e_IOC_FMT_PORT_T_RXTX,  /**< Standard port */
115798 +    e_IOC_FMT_PORT_T_OP,    /**< Offline-parsing port */
115799 +} ioc_fmt_port_type;
115800 +
115801 +/**************************************************************************//**
115802 + @Description   TODO
115803 +*//***************************************************************************/
115804 +typedef struct ioc_fmt_port_param_t {
115805 +    uint8_t             fm_id;
115806 +    ioc_fmt_port_type   fm_port_type;
115807 +    uint8_t             fm_port_id;
115808 +    uint32_t            num_tx_queues;
115809 +} ioc_fmt_port_param_t;
115810 +
115811 +
115812 +/**************************************************************************//**
115813 + @Function      FMT_PORT_IOC_INIT
115814 +
115815 + @Description   TODO
115816 +
115817 + @Param[in]     ioc_fmt_port_param_t  TODO
115818 +
115819 + @Cautions      Allowed only after the FM equivalent port is already initialized.
115820 +*//***************************************************************************/
115821 +#define FMT_PORT_IOC_INIT           _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(0), ioc_fmt_port_param_t)
115822 +
115823 +/**************************************************************************//**
115824 + @Function      FMT_PORT_IOC_SET_DIAG_MODE
115825 +
115826 + @Description   TODO
115827 +
115828 + @Param[in]     ioc_diag_mode  TODO
115829 +
115830 + @Cautions      Allowed only following FMT_PORT_IOC_INIT().
115831 +*//***************************************************************************/
115832 +#define FMT_PORT_IOC_SET_DIAG_MODE  _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(1), ioc_diag_mode)
115833 +
115834 +/**************************************************************************//**
115835 + @Function      FMT_PORT_IOC_SET_IP_HEADER_MANIP
115836 +
115837 + @Description   Set IP header manipulations for this port.
115838 +
115839 + @Param[in]     int     1 to enable; 0 to disable
115840 +
115841 + @Cautions      Allowed only following FMT_PORT_IOC_INIT().
115842 +*//***************************************************************************/
115843 +#define FMT_PORT_IOC_SET_IP_HEADER_MANIP  _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(2), int)
115844 +
115845 +/**************************************************************************//**
115846 + @Function      FMT_PORT_IOC_SET_DPAECHO_MODE
115847 +
115848 + @Description   Set DPA in echo mode - all frame are sent back.
115849 +
115850 + @Param[in]     int     1 to enable; 0 to disable
115851 +
115852 + @Cautions      Allowed only following FMT_PORT_IOC_INIT().
115853 +*//***************************************************************************/
115854 +#define FMT_PORT_IOC_SET_DPAECHO_MODE     _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(3), int)
115855 +
115856 +/** @} */ /* end of lnx_ioctl_FMTP_lib_grp group */
115857 +/** @} */ /* end of lnx_ioctl_FMT_lib_grp group */
115858 +/** @} */ /* end of lnx_ioctl_FMT_grp */
115859 +
115860 +
115861 +#endif /* __FM_TEST_IOCTLS_H */
115862 --- /dev/null
115863 +++ b/include/uapi/linux/fmd/integrations/Kbuild
115864 @@ -0,0 +1 @@
115865 +header-y += integration_ioctls.h
115866 --- /dev/null
115867 +++ b/include/uapi/linux/fmd/integrations/integration_ioctls.h
115868 @@ -0,0 +1,56 @@
115869 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
115870 + * All rights reserved.
115871 + *
115872 + * Redistribution and use in source and binary forms, with or without
115873 + * modification, are permitted provided that the following conditions are met:
115874 + *     * Redistributions of source code must retain the above copyright
115875 + *       notice, this list of conditions and the following disclaimer.
115876 + *     * Redistributions in binary form must reproduce the above copyright
115877 + *       notice, this list of conditions and the following disclaimer in the
115878 + *       documentation and/or other materials provided with the distribution.
115879 + *     * Neither the name of Freescale Semiconductor nor the
115880 + *       names of its contributors may be used to endorse or promote products
115881 + *       derived from this software without specific prior written permission.
115882 + *
115883 + *
115884 + * ALTERNATIVELY, this software may be distributed under the terms of the
115885 + * GNU General Public License ("GPL") as published by the Free Software
115886 + * Foundation, either version 2 of that License or (at your option) any
115887 + * later version.
115888 + *
115889 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
115890 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
115891 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
115892 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
115893 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
115894 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
115895 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
115896 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
115897 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
115898 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
115899 + */
115900 +
115901 +/**************************************************************************//**
115902 + @File          integration_ioctls.h
115903 +
115904 + @Description   External header file for Integration unit routines.
115905 +*//***************************************************************************/
115906 +
115907 +#ifndef __INTG_IOCTLS_H
115908 +#define __INTG_IOCTLS_H
115909 +
115910 +
115911 +#define FM_IOC_TYPE_BASE            (NCSW_IOC_TYPE_BASE+1)
115912 +#define FMT_IOC_TYPE_BASE           (NCSW_IOC_TYPE_BASE+3)
115913 +
115914 +/*#define FM_IOCTL_DBG*/
115915 +
115916 +#if defined(FM_IOCTL_DBG)
115917 +    #define _fm_ioctl_dbg(format, arg...) \
115918 +        printk("fm ioctl [%s:%u](cpu:%u) - " format, \
115919 +            __func__, __LINE__, smp_processor_id(), ##arg)
115920 +#else
115921 +#   define _fm_ioctl_dbg(arg...)
115922 +#endif
115923 +
115924 +#endif /* __INTG_IOCTLS_H */
115925 --- /dev/null
115926 +++ b/include/uapi/linux/fmd/ioctls.h
115927 @@ -0,0 +1,96 @@
115928 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
115929 + * All rights reserved.
115930 + *
115931 + * Redistribution and use in source and binary forms, with or without
115932 + * modification, are permitted provided that the following conditions are met:
115933 + *     * Redistributions of source code must retain the above copyright
115934 + *       notice, this list of conditions and the following disclaimer.
115935 + *     * Redistributions in binary form must reproduce the above copyright
115936 + *       notice, this list of conditions and the following disclaimer in the
115937 + *       documentation and/or other materials provided with the distribution.
115938 + *     * Neither the name of Freescale Semiconductor nor the
115939 + *       names of its contributors may be used to endorse or promote products
115940 + *       derived from this software without specific prior written permission.
115941 + *
115942 + *
115943 + * ALTERNATIVELY, this software may be distributed under the terms of the
115944 + * GNU General Public License ("GPL") as published by the Free Software
115945 + * Foundation, either version 2 of that License or (at your option) any
115946 + * later version.
115947 + *
115948 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
115949 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
115950 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
115951 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
115952 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
115953 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
115954 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
115955 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
115956 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
115957 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
115958 + */
115959 +
115960 +/**************************************************************************//**
115961 + @File          ioctls.h
115962 +
115963 + @Description   Structures and definitions for Command Relay Ioctls
115964 +*//***************************************************************************/
115965 +
115966 +#ifndef __IOCTLS_H__
115967 +#define __IOCTLS_H__
115968 +
115969 +#include <asm/ioctl.h>
115970 +
115971 +#include "integration_ioctls.h"
115972 +
115973 +
115974 +/**************************************************************************//**
115975 + @Group         lnx_ioctl_ncsw_grp    NetCommSw Linux User-Space (IOCTL) API
115976 + @{
115977 +*//***************************************************************************/
115978 +
115979 +#define NCSW_IOC_TYPE_BASE          0xe0    /**< defines the IOCTL type for all
115980 +                                                 the NCSW Linux module commands */
115981 +
115982 +
115983 +/**************************************************************************//**
115984 + @Description   IOCTL Memory allocation types.
115985 +*//***************************************************************************/
115986 +typedef enum ioc_mem_type {
115987 +    e_IOC_MEM_INVALID      = 0x00000000,  /**< Invalid memory type (error) */
115988 +    e_IOC_MEM_CACHABLE_SYS = 0x00000001,  /**< Primary DDR, cacheable segment */
115989 +    e_IOC_MEM_NOCACHE_SYS  = 0x00000004,  /**< Primary DDR, non-cacheable segment */
115990 +    e_IOC_MEM_SECONDARY    = 0x00000002,  /**< Either secondary DDR or SDRAM */
115991 +    e_IOC_MEM_PRAM         = 0x00000008   /**< Multi-user RAM identifier */
115992 +} ioc_mem_type;
115993 +
115994 +/**************************************************************************//**
115995 + @Description   Enumeration (bit flags) of communication modes (Transmit,
115996 +                receive or both).
115997 +*//***************************************************************************/
115998 +typedef enum ioc_comm_mode {
115999 +      e_IOC_COMM_MODE_NONE         = 0  /**< No transmit/receive communication */
116000 +    , e_IOC_COMM_MODE_RX           = 1  /**< Only receive communication */
116001 +    , e_IOC_COMM_MODE_TX           = 2  /**< Only transmit communication */
116002 +    , e_IOC_COMM_MODE_RX_AND_TX    = 3  /**< Both transmit and receive communication */
116003 +} ioc_comm_mode;
116004 +
116005 +/**************************************************************************//**
116006 + @Description   General Diagnostic Mode
116007 +*//***************************************************************************/
116008 +typedef enum ioc_diag_mode
116009 +{
116010 +    e_IOC_DIAG_MODE_NONE = 0,
116011 +    e_IOC_DIAG_MODE_CTRL_LOOPBACK,      /**< loopback in the controller; E.g. MAC, TDM, etc. */
116012 +    e_IOC_DIAG_MODE_CHIP_LOOPBACK,      /**< loopback in the chip but not in controller;
116013 +                                         E.g. IO-pins, SerDes, etc. */
116014 +    e_IOC_DIAG_MODE_PHY_LOOPBACK,       /**< loopback in the external PHY */
116015 +    e_IOC_DIAG_MODE_LINE_LOOPBACK,      /**< loopback in the external line */
116016 +    e_IOC_DIAG_MODE_CTRL_ECHO,          /**< */
116017 +    e_IOC_DIAG_MODE_PHY_ECHO            /**< */
116018 +} ioc_diag_mode;
116019 +
116020 +/** @} */ /* end of lnx_ioctl_ncsw_grp */
116021 +
116022 +
116023 +#endif /* __IOCTLS_H__ */
116024 --- /dev/null
116025 +++ b/include/uapi/linux/fmd/net_ioctls.h
116026 @@ -0,0 +1,430 @@
116027 +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
116028 + * All rights reserved.
116029 + *
116030 + * Redistribution and use in source and binary forms, with or without
116031 + * modification, are permitted provided that the following conditions are met:
116032 + *     * Redistributions of source code must retain the above copyright
116033 + *       notice, this list of conditions and the following disclaimer.
116034 + *     * Redistributions in binary form must reproduce the above copyright
116035 + *       notice, this list of conditions and the following disclaimer in the
116036 + *       documentation and/or other materials provided with the distribution.
116037 + *     * Neither the name of Freescale Semiconductor nor the
116038 + *       names of its contributors may be used to endorse or promote products
116039 + *       derived from this software without specific prior written permission.
116040 + *
116041 + *
116042 + * ALTERNATIVELY, this software may be distributed under the terms of the
116043 + * GNU General Public License ("GPL") as published by the Free Software
116044 + * Foundation, either version 2 of that License or (at your option) any
116045 + * later version.
116046 + *
116047 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
116048 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
116049 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
116050 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
116051 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
116052 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
116053 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
116054 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
116055 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
116056 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
116057 + */
116058 +
116059 +
116060 +/**************************************************************************//**
116061 + @File          net_ioctls.h
116062 +
116063 + @Description   This file contains common and general netcomm headers definitions.
116064 +*//***************************************************************************/
116065 +#ifndef __NET_IOCTLS_H
116066 +#define __NET_IOCTLS_H
116067 +
116068 +#include "ioctls.h"
116069 +
116070 +
116071 +typedef uint8_t ioc_header_field_ppp_t;
116072 +
116073 +#define IOC_NET_HEADER_FIELD_PPP_PID                        (1)
116074 +#define IOC_NET_HEADER_FIELD_PPP_COMPRESSED                 (IOC_NET_HEADER_FIELD_PPP_PID << 1)
116075 +#define IOC_NET_HEADER_FIELD_PPP_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_PPP_PID << 2) - 1)
116076 +
116077 +
116078 +typedef uint8_t ioc_header_field_pppoe_t;
116079 +
116080 +#define IOC_NET_HEADER_FIELD_PPPoE_VER                      (1)
116081 +#define IOC_NET_HEADER_FIELD_PPPoE_TYPE                     (IOC_NET_HEADER_FIELD_PPPoE_VER << 1)
116082 +#define IOC_NET_HEADER_FIELD_PPPoE_CODE                     (IOC_NET_HEADER_FIELD_PPPoE_VER << 2)
116083 +#define IOC_NET_HEADER_FIELD_PPPoE_SID                      (IOC_NET_HEADER_FIELD_PPPoE_VER << 3)
116084 +#define IOC_NET_HEADER_FIELD_PPPoE_LEN                      (IOC_NET_HEADER_FIELD_PPPoE_VER << 4)
116085 +#define IOC_NET_HEADER_FIELD_PPPoE_SESSION                  (IOC_NET_HEADER_FIELD_PPPoE_VER << 5)
116086 +#define IOC_NET_HEADER_FIELD_PPPoE_PID                      (IOC_NET_HEADER_FIELD_PPPoE_VER << 6)
116087 +#define IOC_NET_HEADER_FIELD_PPPoE_ALL_FIELDS               ((IOC_NET_HEADER_FIELD_PPPoE_VER << 7) - 1)
116088 +
116089 +#define IOC_NET_HEADER_FIELD_PPPMUX_PID                     (1)
116090 +#define IOC_NET_HEADER_FIELD_PPPMUX_CKSUM                   (IOC_NET_HEADER_FIELD_PPPMUX_PID << 1)
116091 +#define IOC_NET_HEADER_FIELD_PPPMUX_COMPRESSED              (IOC_NET_HEADER_FIELD_PPPMUX_PID << 2)
116092 +#define IOC_NET_HEADER_FIELD_PPPMUX_ALL_FIELDS              ((IOC_NET_HEADER_FIELD_PPPMUX_PID << 3) - 1)
116093 +
116094 +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF            (1)
116095 +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_LXT            (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 1)
116096 +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_LEN            (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 2)
116097 +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PID            (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 3)
116098 +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_USE_PID        (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 4)
116099 +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS     ((IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 5) - 1)
116100 +
116101 +
116102 +typedef uint8_t ioc_header_field_eth_t;
116103 +
116104 +#define IOC_NET_HEADER_FIELD_ETH_DA                         (1)
116105 +#define IOC_NET_HEADER_FIELD_ETH_SA                         (IOC_NET_HEADER_FIELD_ETH_DA << 1)
116106 +#define IOC_NET_HEADER_FIELD_ETH_LENGTH                     (IOC_NET_HEADER_FIELD_ETH_DA << 2)
116107 +#define IOC_NET_HEADER_FIELD_ETH_TYPE                       (IOC_NET_HEADER_FIELD_ETH_DA << 3)
116108 +#define IOC_NET_HEADER_FIELD_ETH_FINAL_CKSUM                (IOC_NET_HEADER_FIELD_ETH_DA << 4)
116109 +#define IOC_NET_HEADER_FIELD_ETH_PADDING                    (IOC_NET_HEADER_FIELD_ETH_DA << 5)
116110 +#define IOC_NET_HEADER_FIELD_ETH_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_ETH_DA << 6) - 1)
116111 +
116112 +#define IOC_NET_HEADER_FIELD_ETH_ADDR_SIZE                 6
116113 +
116114 +typedef uint16_t ioc_header_field_ip_t;
116115 +
116116 +#define IOC_NET_HEADER_FIELD_IP_VER                         (1)
116117 +#define IOC_NET_HEADER_FIELD_IP_DSCP                        (IOC_NET_HEADER_FIELD_IP_VER << 2)
116118 +#define IOC_NET_HEADER_FIELD_IP_ECN                         (IOC_NET_HEADER_FIELD_IP_VER << 3)
116119 +#define IOC_NET_HEADER_FIELD_IP_PROTO                       (IOC_NET_HEADER_FIELD_IP_VER << 4)
116120 +
116121 +#define IOC_NET_HEADER_FIELD_IP_PROTO_SIZE                  1
116122 +
116123 +typedef uint16_t ioc_header_field_ipv4_t;
116124 +
116125 +#define IOC_NET_HEADER_FIELD_IPv4_VER                       (1)
116126 +#define IOC_NET_HEADER_FIELD_IPv4_HDR_LEN                   (IOC_NET_HEADER_FIELD_IPv4_VER << 1)
116127 +#define IOC_NET_HEADER_FIELD_IPv4_TOS                       (IOC_NET_HEADER_FIELD_IPv4_VER << 2)
116128 +#define IOC_NET_HEADER_FIELD_IPv4_TOTAL_LEN                 (IOC_NET_HEADER_FIELD_IPv4_VER << 3)
116129 +#define IOC_NET_HEADER_FIELD_IPv4_ID                        (IOC_NET_HEADER_FIELD_IPv4_VER << 4)
116130 +#define IOC_NET_HEADER_FIELD_IPv4_FLAG_D                    (IOC_NET_HEADER_FIELD_IPv4_VER << 5)
116131 +#define IOC_NET_HEADER_FIELD_IPv4_FLAG_M                    (IOC_NET_HEADER_FIELD_IPv4_VER << 6)
116132 +#define IOC_NET_HEADER_FIELD_IPv4_OFFSET                    (IOC_NET_HEADER_FIELD_IPv4_VER << 7)
116133 +#define IOC_NET_HEADER_FIELD_IPv4_TTL                       (IOC_NET_HEADER_FIELD_IPv4_VER << 8)
116134 +#define IOC_NET_HEADER_FIELD_IPv4_PROTO                     (IOC_NET_HEADER_FIELD_IPv4_VER << 9)
116135 +#define IOC_NET_HEADER_FIELD_IPv4_CKSUM                     (IOC_NET_HEADER_FIELD_IPv4_VER << 10)
116136 +#define IOC_NET_HEADER_FIELD_IPv4_SRC_IP                    (IOC_NET_HEADER_FIELD_IPv4_VER << 11)
116137 +#define IOC_NET_HEADER_FIELD_IPv4_DST_IP                    (IOC_NET_HEADER_FIELD_IPv4_VER << 12)
116138 +#define IOC_NET_HEADER_FIELD_IPv4_OPTS                      (IOC_NET_HEADER_FIELD_IPv4_VER << 13)
116139 +#define IOC_NET_HEADER_FIELD_IPv4_OPTS_COUNT                (IOC_NET_HEADER_FIELD_IPv4_VER << 14)
116140 +#define IOC_NET_HEADER_FIELD_IPv4_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_IPv4_VER << 15) - 1)
116141 +
116142 +#define IOC_NET_HEADER_FIELD_IPv4_ADDR_SIZE                 4
116143 +#define IOC_NET_HEADER_FIELD_IPv4_PROTO_SIZE                1
116144 +
116145 +
116146 +typedef uint8_t ioc_header_field_ipv6_t;
116147 +
116148 +#define IOC_NET_HEADER_FIELD_IPv6_VER                       (1)
116149 +#define IOC_NET_HEADER_FIELD_IPv6_TC                        (IOC_NET_HEADER_FIELD_IPv6_VER << 1)
116150 +#define IOC_NET_HEADER_FIELD_IPv6_SRC_IP                    (IOC_NET_HEADER_FIELD_IPv6_VER << 2)
116151 +#define IOC_NET_HEADER_FIELD_IPv6_DST_IP                    (IOC_NET_HEADER_FIELD_IPv6_VER << 3)
116152 +#define IOC_NET_HEADER_FIELD_IPv6_NEXT_HDR                  (IOC_NET_HEADER_FIELD_IPv6_VER << 4)
116153 +#define IOC_NET_HEADER_FIELD_IPv6_FL                        (IOC_NET_HEADER_FIELD_IPv6_VER << 5)
116154 +#define IOC_NET_HEADER_FIELD_IPv6_HOP_LIMIT                 (IOC_NET_HEADER_FIELD_IPv6_VER << 6)
116155 +#define IOC_NET_HEADER_FIELD_IPv6_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_IPv6_VER << 7) - 1)
116156 +
116157 +#define IOC_NET_HEADER_FIELD_IPv6_ADDR_SIZE                 16
116158 +#define IOC_NET_HEADER_FIELD_IPv6_NEXT_HDR_SIZE             1
116159 +
116160 +#define IOC_NET_HEADER_FIELD_ICMP_TYPE                      (1)
116161 +#define IOC_NET_HEADER_FIELD_ICMP_CODE                      (IOC_NET_HEADER_FIELD_ICMP_TYPE << 1)
116162 +#define IOC_NET_HEADER_FIELD_ICMP_CKSUM                     (IOC_NET_HEADER_FIELD_ICMP_TYPE << 2)
116163 +#define IOC_NET_HEADER_FIELD_ICMP_ID                        (IOC_NET_HEADER_FIELD_ICMP_TYPE << 3)
116164 +#define IOC_NET_HEADER_FIELD_ICMP_SQ_NUM                    (IOC_NET_HEADER_FIELD_ICMP_TYPE << 4)
116165 +#define IOC_NET_HEADER_FIELD_ICMP_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_ICMP_TYPE << 5) - 1)
116166 +
116167 +#define IOC_NET_HEADER_FIELD_ICMP_CODE_SIZE                 1
116168 +#define IOC_NET_HEADER_FIELD_ICMP_TYPE_SIZE                 1
116169 +
116170 +#define IOC_NET_HEADER_FIELD_IGMP_VERSION                   (1)
116171 +#define IOC_NET_HEADER_FIELD_IGMP_TYPE                      (IOC_NET_HEADER_FIELD_IGMP_VERSION << 1)
116172 +#define IOC_NET_HEADER_FIELD_IGMP_CKSUM                     (IOC_NET_HEADER_FIELD_IGMP_VERSION << 2)
116173 +#define IOC_NET_HEADER_FIELD_IGMP_DATA                      (IOC_NET_HEADER_FIELD_IGMP_VERSION << 3)
116174 +#define IOC_NET_HEADER_FIELD_IGMP_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_IGMP_VERSION << 4) - 1)
116175 +
116176 +
116177 +typedef uint16_t ioc_header_field_tcp_t;
116178 +
116179 +#define IOC_NET_HEADER_FIELD_TCP_PORT_SRC                   (1)
116180 +#define IOC_NET_HEADER_FIELD_TCP_PORT_DST                   (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 1)
116181 +#define IOC_NET_HEADER_FIELD_TCP_SEQ                        (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 2)
116182 +#define IOC_NET_HEADER_FIELD_TCP_ACK                        (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 3)
116183 +#define IOC_NET_HEADER_FIELD_TCP_OFFSET                     (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 4)
116184 +#define IOC_NET_HEADER_FIELD_TCP_FLAGS                      (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 5)
116185 +#define IOC_NET_HEADER_FIELD_TCP_WINDOW                     (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 6)
116186 +#define IOC_NET_HEADER_FIELD_TCP_CKSUM                      (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 7)
116187 +#define IOC_NET_HEADER_FIELD_TCP_URGPTR                     (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 8)
116188 +#define IOC_NET_HEADER_FIELD_TCP_OPTS                       (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 9)
116189 +#define IOC_NET_HEADER_FIELD_TCP_OPTS_COUNT                 (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 10)
116190 +#define IOC_NET_HEADER_FIELD_TCP_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 11) - 1)
116191 +
116192 +#define IOC_NET_HEADER_FIELD_TCP_PORT_SIZE                  2
116193 +
116194 +
116195 +typedef uint8_t ioc_header_field_sctp_t;
116196 +
116197 +#define IOC_NET_HEADER_FIELD_SCTP_PORT_SRC                  (1)
116198 +#define IOC_NET_HEADER_FIELD_SCTP_PORT_DST                  (IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 1)
116199 +#define IOC_NET_HEADER_FIELD_SCTP_VER_TAG                   (IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 2)
116200 +#define IOC_NET_HEADER_FIELD_SCTP_CKSUM                     (IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 3)
116201 +#define IOC_NET_HEADER_FIELD_SCTP_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 4) - 1)
116202 +
116203 +#define IOC_NET_HEADER_FIELD_SCTP_PORT_SIZE                 2
116204 +
116205 +typedef uint8_t ioc_header_field_dccp_t;
116206 +
116207 +#define IOC_NET_HEADER_FIELD_DCCP_PORT_SRC                  (1)
116208 +#define IOC_NET_HEADER_FIELD_DCCP_PORT_DST                  (IOC_NET_HEADER_FIELD_DCCP_PORT_SRC << 1)
116209 +#define IOC_NET_HEADER_FIELD_DCCP_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_DCCP_PORT_SRC << 2) - 1)
116210 +
116211 +#define IOC_NET_HEADER_FIELD_DCCP_PORT_SIZE                 2
116212 +
116213 +
116214 +typedef uint8_t ioc_header_field_udp_t;
116215 +
116216 +#define IOC_NET_HEADER_FIELD_UDP_PORT_SRC                   (1)
116217 +#define IOC_NET_HEADER_FIELD_UDP_PORT_DST                   (IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 1)
116218 +#define IOC_NET_HEADER_FIELD_UDP_LEN                        (IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 2)
116219 +#define IOC_NET_HEADER_FIELD_UDP_CKSUM                      (IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 3)
116220 +#define IOC_NET_HEADER_FIELD_UDP_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 4) - 1)
116221 +
116222 +#define IOC_NET_HEADER_FIELD_UDP_PORT_SIZE                  2
116223 +
116224 +typedef uint8_t ioc_header_field_udp_lite_t;
116225 +
116226 +#define IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SRC              (1)
116227 +#define IOC_NET_HEADER_FIELD_UDP_LITE_PORT_DST              (IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 1)
116228 +#define IOC_NET_HEADER_FIELD_UDP_LITE_ALL_FIELDS            ((IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 2) - 1)
116229 +
116230 +#define IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SIZE             2
116231 +
116232 +typedef uint8_t ioc_header_field_udp_encap_esp_t;
116233 +
116234 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC         (1)
116235 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST         (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 1)
116236 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN              (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 2)
116237 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM            (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 3)
116238 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI              (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 4)
116239 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM     (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 5)
116240 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS       ((IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 6) - 1)
116241 +
116242 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SIZE        2
116243 +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI_SIZE         4
116244 +
116245 +#define IOC_NET_HEADER_FIELD_IPHC_CID                       (1)
116246 +#define IOC_NET_HEADER_FIELD_IPHC_CID_TYPE                  (IOC_NET_HEADER_FIELD_IPHC_CID << 1)
116247 +#define IOC_NET_HEADER_FIELD_IPHC_HCINDEX                   (IOC_NET_HEADER_FIELD_IPHC_CID << 2)
116248 +#define IOC_NET_HEADER_FIELD_IPHC_GEN                       (IOC_NET_HEADER_FIELD_IPHC_CID << 3)
116249 +#define IOC_NET_HEADER_FIELD_IPHC_D_BIT                     (IOC_NET_HEADER_FIELD_IPHC_CID << 4)
116250 +#define IOC_NET_HEADER_FIELD_IPHC_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_IPHC_CID << 5) - 1)
116251 +
116252 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE           (1)
116253 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_FLAGS          (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 1)
116254 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_LENGTH         (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 2)
116255 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TSN            (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 3)
116256 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_ID      (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 4)
116257 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_SQN     (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 5)
116258 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_PAYLOAD_PID    (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 6)
116259 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_UNORDERED      (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 7)
116260 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_BEGGINING      (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 8)
116261 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_END            (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 9)
116262 +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS     ((IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
116263 +
116264 +#define IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT                (1)
116265 +#define IOC_NET_HEADER_FIELD_L2TPv2_LENGTH_BIT              (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 1)
116266 +#define IOC_NET_HEADER_FIELD_L2TPv2_SEQUENCE_BIT            (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 2)
116267 +#define IOC_NET_HEADER_FIELD_L2TPv2_OFFSET_BIT              (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 3)
116268 +#define IOC_NET_HEADER_FIELD_L2TPv2_PRIORITY_BIT            (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 4)
116269 +#define IOC_NET_HEADER_FIELD_L2TPv2_VERSION                 (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 5)
116270 +#define IOC_NET_HEADER_FIELD_L2TPv2_LEN                     (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 6)
116271 +#define IOC_NET_HEADER_FIELD_L2TPv2_TUNNEL_ID               (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 7)
116272 +#define IOC_NET_HEADER_FIELD_L2TPv2_SESSION_ID              (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 8)
116273 +#define IOC_NET_HEADER_FIELD_L2TPv2_NS                      (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 9)
116274 +#define IOC_NET_HEADER_FIELD_L2TPv2_NR                      (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 10)
116275 +#define IOC_NET_HEADER_FIELD_L2TPv2_OFFSET_SIZE             (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 11)
116276 +#define IOC_NET_HEADER_FIELD_L2TPv2_FIRST_BYTE              (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 12)
116277 +#define IOC_NET_HEADER_FIELD_L2TPv2_ALL_FIELDS              ((IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 13) - 1)
116278 +
116279 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT           (1)
116280 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH_BIT         (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 1)
116281 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_SEQUENCE_BIT       (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 2)
116282 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_VERSION            (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 3)
116283 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH             (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 4)
116284 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_CONTROL            (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 5)
116285 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_SENT               (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 6)
116286 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_RECV               (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 7)
116287 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_FIRST_BYTE         (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 8)
116288 +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS         ((IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 9) - 1)
116289 +
116290 +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT           (1)
116291 +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_VERSION            (IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 1)
116292 +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_ID                 (IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 2)
116293 +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_COOKIE             (IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 3)
116294 +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS         ((IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 4) - 1)
116295 +
116296 +
116297 +typedef uint8_t ioc_header_field_vlan_t;
116298 +
116299 +#define IOC_NET_HEADER_FIELD_VLAN_VPRI                      (1)
116300 +#define IOC_NET_HEADER_FIELD_VLAN_CFI                       (IOC_NET_HEADER_FIELD_VLAN_VPRI << 1)
116301 +#define IOC_NET_HEADER_FIELD_VLAN_VID                       (IOC_NET_HEADER_FIELD_VLAN_VPRI << 2)
116302 +#define IOC_NET_HEADER_FIELD_VLAN_LENGTH                    (IOC_NET_HEADER_FIELD_VLAN_VPRI << 3)
116303 +#define IOC_NET_HEADER_FIELD_VLAN_TYPE                      (IOC_NET_HEADER_FIELD_VLAN_VPRI << 4)
116304 +#define IOC_NET_HEADER_FIELD_VLAN_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_VLAN_VPRI << 5) - 1)
116305 +
116306 +#define IOC_NET_HEADER_FIELD_VLAN_TCI                       (IOC_NET_HEADER_FIELD_VLAN_VPRI | \
116307 +                                                             IOC_NET_HEADER_FIELD_VLAN_CFI | \
116308 +                                                             IOC_NET_HEADER_FIELD_VLAN_VID)
116309 +
116310 +
116311 +typedef uint8_t ioc_header_field_llc_t;
116312 +
116313 +#define IOC_NET_HEADER_FIELD_LLC_DSAP                       (1)
116314 +#define IOC_NET_HEADER_FIELD_LLC_SSAP                       (IOC_NET_HEADER_FIELD_LLC_DSAP << 1)
116315 +#define IOC_NET_HEADER_FIELD_LLC_CTRL                       (IOC_NET_HEADER_FIELD_LLC_DSAP << 2)
116316 +#define IOC_NET_HEADER_FIELD_LLC_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_LLC_DSAP << 3) - 1)
116317 +
116318 +#define IOC_NET_HEADER_FIELD_NLPID_NLPID                    (1)
116319 +#define IOC_NET_HEADER_FIELD_NLPID_ALL_FIELDS               ((IOC_NET_HEADER_FIELD_NLPID_NLPID << 1) - 1)
116320 +
116321 +
116322 +typedef uint8_t ioc_header_field_snap_t;
116323 +
116324 +#define IOC_NET_HEADER_FIELD_SNAP_OUI                       (1)
116325 +#define IOC_NET_HEADER_FIELD_SNAP_PID                       (IOC_NET_HEADER_FIELD_SNAP_OUI << 1)
116326 +#define IOC_NET_HEADER_FIELD_SNAP_ALL_FIELDS                ((IOC_NET_HEADER_FIELD_SNAP_OUI << 2) - 1)
116327 +
116328 +
116329 +typedef uint8_t ioc_header_field_llc_snap_t;
116330 +
116331 +#define IOC_NET_HEADER_FIELD_LLC_SNAP_TYPE                  (1)
116332 +#define IOC_NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS            ((IOC_NET_HEADER_FIELD_LLC_SNAP_TYPE << 1) - 1)
116333 +
116334 +#define IOC_NET_HEADER_FIELD_ARP_HTYPE                      (1)
116335 +#define IOC_NET_HEADER_FIELD_ARP_PTYPE                      (IOC_NET_HEADER_FIELD_ARP_HTYPE << 1)
116336 +#define IOC_NET_HEADER_FIELD_ARP_HLEN                       (IOC_NET_HEADER_FIELD_ARP_HTYPE << 2)
116337 +#define IOC_NET_HEADER_FIELD_ARP_PLEN                       (IOC_NET_HEADER_FIELD_ARP_HTYPE << 3)
116338 +#define IOC_NET_HEADER_FIELD_ARP_OPER                       (IOC_NET_HEADER_FIELD_ARP_HTYPE << 4)
116339 +#define IOC_NET_HEADER_FIELD_ARP_SHA                        (IOC_NET_HEADER_FIELD_ARP_HTYPE << 5)
116340 +#define IOC_NET_HEADER_FIELD_ARP_SPA                        (IOC_NET_HEADER_FIELD_ARP_HTYPE << 6)
116341 +#define IOC_NET_HEADER_FIELD_ARP_THA                        (IOC_NET_HEADER_FIELD_ARP_HTYPE << 7)
116342 +#define IOC_NET_HEADER_FIELD_ARP_TPA                        (IOC_NET_HEADER_FIELD_ARP_HTYPE << 8)
116343 +#define IOC_NET_HEADER_FIELD_ARP_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_ARP_HTYPE << 9) - 1)
116344 +
116345 +#define IOC_NET_HEADER_FIELD_RFC2684_LLC                    (1)
116346 +#define IOC_NET_HEADER_FIELD_RFC2684_NLPID                  (IOC_NET_HEADER_FIELD_RFC2684_LLC << 1)
116347 +#define IOC_NET_HEADER_FIELD_RFC2684_OUI                    (IOC_NET_HEADER_FIELD_RFC2684_LLC << 2)
116348 +#define IOC_NET_HEADER_FIELD_RFC2684_PID                    (IOC_NET_HEADER_FIELD_RFC2684_LLC << 3)
116349 +#define IOC_NET_HEADER_FIELD_RFC2684_VPN_OUI                (IOC_NET_HEADER_FIELD_RFC2684_LLC << 4)
116350 +#define IOC_NET_HEADER_FIELD_RFC2684_VPN_IDX                (IOC_NET_HEADER_FIELD_RFC2684_LLC << 5)
116351 +#define IOC_NET_HEADER_FIELD_RFC2684_ALL_FIELDS             ((IOC_NET_HEADER_FIELD_RFC2684_LLC << 6) - 1)
116352 +
116353 +#define IOC_NET_HEADER_FIELD_USER_DEFINED_SRCPORT           (1)
116354 +#define IOC_NET_HEADER_FIELD_USER_DEFINED_PCDID             (IOC_NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 1)
116355 +#define IOC_NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS        ((IOC_NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 2) - 1)
116356 +
116357 +#define IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER                 (1)
116358 +#define IOC_NET_HEADER_FIELD_PAYLOAD_SIZE                   (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 1)
116359 +#define IOC_NET_HEADER_FIELD_MAX_FRM_SIZE                   (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 2)
116360 +#define IOC_NET_HEADER_FIELD_MIN_FRM_SIZE                   (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 3)
116361 +#define IOC_NET_HEADER_FIELD_PAYLOAD_TYPE                   (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 4)
116362 +#define IOC_NET_HEADER_FIELD_FRAME_SIZE                     (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 5)
116363 +#define IOC_NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS             ((IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 6) - 1)
116364 +
116365 +
116366 +typedef uint8_t ioc_header_field_gre_t;
116367 +
116368 +#define IOC_NET_HEADER_FIELD_GRE_TYPE                       (1)
116369 +#define IOC_NET_HEADER_FIELD_GRE_ALL_FIELDS                 ((IOC_NET_HEADER_FIELD_GRE_TYPE << 1) - 1)
116370 +
116371 +
116372 +typedef uint8_t ioc_header_field_minencap_t;
116373 +
116374 +#define IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP                (1)
116375 +#define IOC_NET_HEADER_FIELD_MINENCAP_DST_IP                (IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP << 1)
116376 +#define IOC_NET_HEADER_FIELD_MINENCAP_TYPE                  (IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP << 2)
116377 +#define IOC_NET_HEADER_FIELD_MINENCAP_ALL_FIELDS            ((IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP << 3) - 1)
116378 +
116379 +
116380 +typedef uint8_t ioc_header_field_ipsec_ah_t;
116381 +
116382 +#define IOC_NET_HEADER_FIELD_IPSEC_AH_SPI                   (1)
116383 +#define IOC_NET_HEADER_FIELD_IPSEC_AH_NH                    (IOC_NET_HEADER_FIELD_IPSEC_AH_SPI << 1)
116384 +#define IOC_NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS            ((IOC_NET_HEADER_FIELD_IPSEC_AH_SPI << 2) - 1)
116385 +
116386 +
116387 +typedef uint8_t ioc_header_field_ipsec_esp_t;
116388 +
116389 +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI                  (1)
116390 +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_SEQUENCE_NUM         (IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI << 1)
116391 +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS           ((IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI << 2) - 1)
116392 +
116393 +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI_SIZE             4
116394 +
116395 +
116396 +typedef uint8_t ioc_header_field_mpls_t;
116397 +
116398 +#define IOC_NET_HEADER_FIELD_MPLS_LABEL_STACK               (1)
116399 +#define IOC_NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS    ((IOC_NET_HEADER_FIELD_MPLS_LABEL_STACK << 1) - 1)
116400 +
116401 +
116402 +typedef uint8_t ioc_header_field_macsec_t;
116403 +
116404 +#define IOC_NET_HEADER_FIELD_MACSEC_SECTAG                  (1)
116405 +#define IOC_NET_HEADER_FIELD_MACSEC_ALL_FIELDS              ((IOC_NET_HEADER_FIELD_MACSEC_SECTAG << 1) - 1)
116406 +
116407 +
116408 +typedef enum {
116409 +    e_IOC_NET_HEADER_TYPE_NONE = 0,
116410 +    e_IOC_NET_HEADER_TYPE_PAYLOAD,
116411 +    e_IOC_NET_HEADER_TYPE_ETH,
116412 +    e_IOC_NET_HEADER_TYPE_VLAN,
116413 +    e_IOC_NET_HEADER_TYPE_IPv4,
116414 +    e_IOC_NET_HEADER_TYPE_IPv6,
116415 +    e_IOC_NET_HEADER_TYPE_IP,
116416 +    e_IOC_NET_HEADER_TYPE_TCP,
116417 +    e_IOC_NET_HEADER_TYPE_UDP,
116418 +    e_IOC_NET_HEADER_TYPE_UDP_LITE,
116419 +    e_IOC_NET_HEADER_TYPE_IPHC,
116420 +    e_IOC_NET_HEADER_TYPE_SCTP,
116421 +    e_IOC_NET_HEADER_TYPE_SCTP_CHUNK_DATA,
116422 +    e_IOC_NET_HEADER_TYPE_PPPoE,
116423 +    e_IOC_NET_HEADER_TYPE_PPP,
116424 +    e_IOC_NET_HEADER_TYPE_PPPMUX,
116425 +    e_IOC_NET_HEADER_TYPE_PPPMUX_SUBFRAME,
116426 +    e_IOC_NET_HEADER_TYPE_L2TPv2,
116427 +    e_IOC_NET_HEADER_TYPE_L2TPv3_CTRL,
116428 +    e_IOC_NET_HEADER_TYPE_L2TPv3_SESS,
116429 +    e_IOC_NET_HEADER_TYPE_LLC,
116430 +    e_IOC_NET_HEADER_TYPE_LLC_SNAP,
116431 +    e_IOC_NET_HEADER_TYPE_NLPID,
116432 +    e_IOC_NET_HEADER_TYPE_SNAP,
116433 +    e_IOC_NET_HEADER_TYPE_MPLS,
116434 +    e_IOC_NET_HEADER_TYPE_IPSEC_AH,
116435 +    e_IOC_NET_HEADER_TYPE_IPSEC_ESP,
116436 +    e_IOC_NET_HEADER_TYPE_UDP_ENCAP_ESP, /* RFC 3948 */
116437 +    e_IOC_NET_HEADER_TYPE_MACSEC,
116438 +    e_IOC_NET_HEADER_TYPE_GRE,
116439 +    e_IOC_NET_HEADER_TYPE_MINENCAP,
116440 +    e_IOC_NET_HEADER_TYPE_DCCP,
116441 +    e_IOC_NET_HEADER_TYPE_ICMP,
116442 +    e_IOC_NET_HEADER_TYPE_IGMP,
116443 +    e_IOC_NET_HEADER_TYPE_ARP,
116444 +    e_IOC_NET_HEADER_TYPE_CAPWAP,
116445 +    e_IOC_NET_HEADER_TYPE_CAPWAP_DTLS,
116446 +    e_IOC_NET_HEADER_TYPE_RFC2684,
116447 +    e_IOC_NET_HEADER_TYPE_USER_DEFINED_L2,
116448 +    e_IOC_NET_HEADER_TYPE_USER_DEFINED_L3,
116449 +    e_IOC_NET_HEADER_TYPE_USER_DEFINED_L4,
116450 +    e_IOC_NET_HEADER_TYPE_USER_DEFINED_SHIM1,
116451 +    e_IOC_NET_HEADER_TYPE_USER_DEFINED_SHIM2,
116452 +    e_IOC_NET_MAX_HEADER_TYPE_COUNT
116453 +} ioc_net_header_type;
116454 +
116455 +
116456 +#endif /* __NET_IOCTLS_H */