target/linux/layerscape/patches-5.4/302-dts-0113-arm64-dts-fsl-ls1028a-qds-Add-overlays-for-various-s.patch

   1 From d2333a40b00ba5fb5b9731f96ca663036f781411 Mon Sep 17 00:00:00 2001
   2 From: Alex Marginean <alexandru.marginean@nxp.com>
   3 Date: Tue, 7 Jan 2020 14:48:20 +0200
   4 Subject: [PATCH] arm64: dts: fsl-ls1028a-qds: Add overlays for various serdes
   5  protocols
   6
   7 Adds overlays for various serdes protocols on LS1028A QDS board using
   8 different PHY cards.  These should be applied at boot, based on serdes
   9 configuration.  If no overlay is applied, only the RGMII interface on
  10 the QDS is available in Linux.
  11
  12 Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  13 ---
  14  arch/arm64/boot/dts/freescale/Makefile             |   6 ++
  15  .../boot/dts/freescale/fsl-ls1028a-qds-13bb.dts    | 100 +++++++++++++++++++++
  16  .../boot/dts/freescale/fsl-ls1028a-qds-1xxx.dtsi   |  20 -----
  17  .../boot/dts/freescale/fsl-ls1028a-qds-65bb.dts    |  94 +++++++++++++++++++
  18  .../boot/dts/freescale/fsl-ls1028a-qds-6xxx.dtsi   |  20 -----
  19  .../boot/dts/freescale/fsl-ls1028a-qds-7777.dts    |  73 +++++++++++++++
  20  .../boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi   |  56 ------------
  21  .../boot/dts/freescale/fsl-ls1028a-qds-85bb.dts    |  93 +++++++++++++++++++
  22  .../boot/dts/freescale/fsl-ls1028a-qds-899b.dts    |  66 ++++++++++++++
  23  .../boot/dts/freescale/fsl-ls1028a-qds-8xxx.dtsi   |  19 ----
  24  .../boot/dts/freescale/fsl-ls1028a-qds-9999.dts    |  71 +++++++++++++++
  25  .../boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi   |  57 ------------
  26  .../boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi   |  61 -------------
  27  .../boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi   |  57 ------------
  28  arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts  |   3 -
  29  15 files changed, 503 insertions(+), 293 deletions(-)
  30  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts
  31  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-1xxx.dtsi
  32  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts
  33  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-6xxx.dtsi
  34  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts
  35  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi
  36  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts
  37  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts
  38  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-8xxx.dtsi
  39  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts
  40  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi
  41  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi
  42  delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi
  43
  44 --- a/arch/arm64/boot/dts/freescale/Makefile
  45 +++ b/arch/arm64/boot/dts/freescale/Makefile
  46 @@ -6,6 +6,12 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1
  47  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
  48  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
  49  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
  50 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-13bb.dtb
  51 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-65bb.dtb
  52 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-7777.dtb
  53 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
  54 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
  55 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb
  56  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
  57  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
  58  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
  59 --- /dev/null
  60 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts
  61 @@ -0,0 +1,100 @@
  62 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  63 +/*
  64 + * Device Tree fragment for LS1028A QDS board, serdes 13bb
  65 + *
  66 + * Copyright 2019 NXP
  67 + *
  68 + * Requires a LS1028A QDS board with lane B rework.
  69 + * Requires a SCH-30841 card with lane A of connector rewired to PHY lane C.
  70 + * Set-up is a SCH-30842 card in slot 1 and SCH-30841 in slot 2.
  71 + */
  72 +
  73 +/dts-v1/;
  74 +/plugin/;
  75 +
  76 +/ {
  77 +       fragment@0 {
  78 +               target = <&mdio_slot1>;
  79 +               __overlay__ {
  80 +                       #address-cells = <1>;
  81 +                       #size-cells = <0>;
  82 +
  83 +                       slot1_sgmii: ethernet-phy@2 {
  84 +                               /* AQR112 */
  85 +                               reg = <0x2>;
  86 +                               compatible = "ethernet-phy-ieee802.3-c45";
  87 +                       };
  88 +               };
  89 +       };
  90 +
  91 +       fragment@1 {
  92 +               target = <&enetc_port0>;
  93 +               __overlay__ {
  94 +                       phy-handle = <&slot1_sgmii>;
  95 +                       phy-mode = "usxgmii";
  96 +               };
  97 +       };
  98 +
  99 +       fragment@2 {
 100 +               target = <&mdio_slot2>;
 101 +               __overlay__ {
 102 +                       #address-cells = <1>;
 103 +                       #size-cells = <0>;
 104 +
 105 +                       /* 4 ports on AQR412 */
 106 +                       slot2_qxgmii0: ethernet-phy@0 {
 107 +                               reg = <0x0>;
 108 +                               compatible = "ethernet-phy-ieee802.3-c45";
 109 +                       };
 110 +
 111 +                       slot2_qxgmii1: ethernet-phy@1 {
 112 +                               reg = <0x1>;
 113 +                               compatible = "ethernet-phy-ieee802.3-c45";
 114 +                       };
 115 +
 116 +                       slot2_qxgmii2: ethernet-phy@2 {
 117 +                               reg = <0x2>;
 118 +                               compatible = "ethernet-phy-ieee802.3-c45";
 119 +                       };
 120 +
 121 +                       slot2_qxgmii3: ethernet-phy@3 {
 122 +                               reg = <0x3>;
 123 +                               compatible = "ethernet-phy-ieee802.3-c45";
 124 +                       };
 125 +               };
 126 +       };
 127 +
 128 +       fragment@3 {
 129 +               target = <&mscc_felix_ports>;
 130 +               __overlay__ {
 131 +                       port@0 {
 132 +                               status = "okay";
 133 +                               phy-handle = <&slot2_qxgmii0>;
 134 +                               phy-mode = "usxgmii";
 135 +                               managed = "in-band-status";
 136 +                       };
 137 +
 138 +                       port@1 {
 139 +                               status = "okay";
 140 +                               phy-handle = <&slot2_qxgmii1>;
 141 +                               phy-mode = "usxgmii";
 142 +                               managed = "in-band-status";
 143 +                       };
 144 +
 145 +                       port@2 {
 146 +                               status = "okay";
 147 +                               phy-handle = <&slot2_qxgmii2>;
 148 +                               phy-mode = "usxgmii";
 149 +                               managed = "in-band-status";
 150 +                       };
 151 +
 152 +                       port@3 {
 153 +                               status = "okay";
 154 +                               phy-handle = <&slot2_qxgmii3>;
 155 +                               phy-mode = "usxgmii";
 156 +                               managed = "in-band-status";
 157 +                       };
 158 +               };
 159 +       };
 160 +};
 161 +
 162 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-1xxx.dtsi
 163 +++ /dev/null
 164 @@ -1,20 +0,0 @@
 165 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 166 -/*
 167 - * Device Tree Include file for LS1028A QDS board, serdes 1xxx
 168 - *
 169 - * Copyright 2019 NXP
 170 - *
 171 - */
 172 -
 173 -&mdio_slot1 {
 174 -       slot1_sgmii: ethernet-phy@2 {
 175 -               /* AQR112 */
 176 -               reg = <0x2>;
 177 -               compatible = "ethernet-phy-ieee802.3-c45";
 178 -       };
 179 -};
 180 -
 181 -&enetc_port0 {
 182 -       phy-handle = <&slot1_sgmii>;
 183 -       phy-connection-type = "usxgmii";
 184 -};
 185 --- /dev/null
 186 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts
 187 @@ -0,0 +1,94 @@
 188 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 189 +/*
 190 + * Device Tree fragment for LS1028A QDS board, serdes 69xx
 191 + *
 192 + * Copyright 2019 NXP
 193 + *
 194 + * Requires a LS1028A QDS board with lane B rework.
 195 + * Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
 196 + */
 197 +
 198 +/dts-v1/;
 199 +/plugin/;
 200 +
 201 +/ {
 202 +       fragment@0 {
 203 +               target = <&mdio_slot1>;
 204 +               __overlay__ {
 205 +                       #address-cells = <1>;
 206 +                       #size-cells = <0>;
 207 +
 208 +                       slot1_sgmii: ethernet-phy@2 {
 209 +                               /* AQR112 */
 210 +                               reg = <0x2>;
 211 +                               compatible = "ethernet-phy-ieee802.3-c45";
 212 +                       };
 213 +               };
 214 +       };
 215 +
 216 +       fragment@1 {
 217 +               target = <&enetc_port0>;
 218 +               __overlay__ {
 219 +                       phy-handle = <&slot1_sgmii>;
 220 +                       phy-mode = "2500base-x";
 221 +               };
 222 +       };
 223 +
 224 +       fragment@2 {
 225 +               target = <&mdio_slot2>;
 226 +               __overlay__ {
 227 +                       #address-cells = <1>;
 228 +                       #size-cells = <0>;
 229 +
 230 +                       /* 4 ports on VSC8514 */
 231 +                       slot2_qsgmii0: ethernet-phy@8 {
 232 +                               reg = <0x8>;
 233 +                       };
 234 +
 235 +                       slot2_qsgmii1: ethernet-phy@9 {
 236 +                               reg = <0x9>;
 237 +                       };
 238 +
 239 +                       slot2_qsgmii2: ethernet-phy@a {
 240 +                               reg = <0xa>;
 241 +                       };
 242 +
 243 +                       slot2_qsgmii3: ethernet-phy@b {
 244 +                               reg = <0xb>;
 245 +                       };
 246 +               };
 247 +       };
 248 +
 249 +       fragment@3 {
 250 +               target = <&mscc_felix_ports>;
 251 +               __overlay__ {
 252 +                       port@0 {
 253 +                               status = "okay";
 254 +                               phy-handle = <&slot2_qsgmii0>;
 255 +                               phy-mode = "qsgmii";
 256 +                               managed = "in-band-status";
 257 +                       };
 258 +
 259 +                       port@1 {
 260 +                               status = "okay";
 261 +                               phy-handle = <&slot2_qsgmii1>;
 262 +                               phy-mode = "qsgmii";
 263 +                               managed = "in-band-status";
 264 +                       };
 265 +
 266 +                       port@2 {
 267 +                               status = "okay";
 268 +                               phy-handle = <&slot2_qsgmii2>;
 269 +                               phy-mode = "qsgmii";
 270 +                               managed = "in-band-status";
 271 +                       };
 272 +
 273 +                       port@3 {
 274 +                               status = "okay";
 275 +                               phy-handle = <&slot2_qsgmii3>;
 276 +                               phy-mode = "qsgmii";
 277 +                               managed = "in-band-status";
 278 +                       };
 279 +               };
 280 +       };
 281 +};
 282 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-6xxx.dtsi
 283 +++ /dev/null
 284 @@ -1,20 +0,0 @@
 285 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 286 -/*
 287 - * Device Tree Include file for LS1028A QDS board, serdes 6xxx
 288 - *
 289 - * Copyright 2019 NXP
 290 - *
 291 - */
 292 -
 293 -&mdio_slot1 {
 294 -       slot1_sgmii: ethernet-phy@2 {
 295 -               /* AQR112 */
 296 -               reg = <0x2>;
 297 -               compatible = "ethernet-phy-ieee802.3-c45";
 298 -       };
 299 -};
 300 -
 301 -&enetc_port0 {
 302 -       phy-handle = <&slot1_sgmii>;
 303 -       phy-connection-type = "2500base-x";
 304 -};
 305 --- /dev/null
 306 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts
 307 @@ -0,0 +1,73 @@
 308 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 309 +/*
 310 + * Device Tree fragment for LS1028A QDS board, serdes 7777
 311 + *
 312 + * Copyright 2019 NXP
 313 + *
 314 + * Requires a LS1028A QDS board without lane B rework.
 315 + * Requires a SCH-30841 card without lane A/C rewire and with a FW with muxing
 316 + * disabled, plugged in slot 1.
 317 + */
 318 +
 319 +/dts-v1/;
 320 +/plugin/;
 321 +
 322 +/ {
 323 +       fragment@0 {
 324 +               target = <&mdio_slot1>;
 325 +               __overlay__ {
 326 +                       #address-cells = <1>;
 327 +                       #size-cells = <0>;
 328 +
 329 +                       /* 4 ports on AQR412 */
 330 +                       slot1_sxgmii0: ethernet-phy@0 {
 331 +                               reg = <0x0>;
 332 +                               compatible = "ethernet-phy-ieee802.3-c45";
 333 +                       };
 334 +
 335 +                       slot1_sxgmii1: ethernet-phy@1 {
 336 +                               reg = <0x1>;
 337 +                               compatible = "ethernet-phy-ieee802.3-c45";
 338 +                       };
 339 +
 340 +                       slot1_sxgmii2: ethernet-phy@2 {
 341 +                               reg = <0x2>;
 342 +                               compatible = "ethernet-phy-ieee802.3-c45";
 343 +                       };
 344 +
 345 +                       slot1_sxgmii3: ethernet-phy@3 {
 346 +                               reg = <0x3>;
 347 +                               compatible = "ethernet-phy-ieee802.3-c45";
 348 +                       };
 349 +               };
 350 +       };
 351 +
 352 +       fragment@1 {
 353 +               target = <&mscc_felix_ports>;
 354 +               __overlay__ {
 355 +                       port@0 {
 356 +                               status = "okay";
 357 +                               phy-handle = <&slot1_sxgmii0>;
 358 +                               phy-mode = "2500base-x";
 359 +                       };
 360 +
 361 +                       port@1 {
 362 +                               status = "okay";
 363 +                               phy-handle = <&slot1_sxgmii1>;
 364 +                               phy-mode = "2500base-x";
 365 +                       };
 366 +
 367 +                       port@2 {
 368 +                               status = "okay";
 369 +                               phy-handle = <&slot1_sxgmii2>;
 370 +                               phy-mode = "2500base-x";
 371 +                       };
 372 +
 373 +                       port@3 {
 374 +                               status = "okay";
 375 +                               phy-handle = <&slot1_sxgmii3>;
 376 +                               phy-mode = "2500base-x";
 377 +                       };
 378 +               };
 379 +       };
 380 +};
 381 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi
 382 +++ /dev/null
 383 @@ -1,56 +0,0 @@
 384 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 385 -/*
 386 - * Device Tree Include file for LS1028A QDS board, serdes 9999
 387 - *
 388 - * Copyright 2019 NXP
 389 - *
 390 - */
 391 -
 392 -&mdio_slot1 {
 393 -       slot1_sxgmii0: ethernet-phy@0 {
 394 -               reg = <0x0>;
 395 -               compatible = "ethernet-phy-ieee802.3-c45";
 396 -       };
 397 -
 398 -       slot1_sxgmii1: ethernet-phy@1 {
 399 -               reg = <0x1>;
 400 -               compatible = "ethernet-phy-ieee802.3-c45";
 401 -       };
 402 -
 403 -       slot1_sxgmii2: ethernet-phy@2 {
 404 -               reg = <0x2>;
 405 -               compatible = "ethernet-phy-ieee802.3-c45";
 406 -       };
 407 -
 408 -       slot1_sxgmii3: ethernet-phy@3 {
 409 -               reg = <0x3>;
 410 -               compatible = "ethernet-phy-ieee802.3-c45";
 411 -       };
 412 -};
 413 -
 414 -/* l2switch ports */
 415 -&mscc_felix_ports {
 416 -       port@0 {
 417 -               status = "okay";
 418 -               phy-handle = <&slot1_sxgmii0>;
 419 -               phy-mode = "2500base-x";
 420 -       };
 421 -
 422 -       port@1 {
 423 -               status = "okay";
 424 -               phy-handle = <&slot1_sxgmii1>;
 425 -               phy-mode = "2500base-x";
 426 -       };
 427 -
 428 -       port@2 {
 429 -               status = "okay";
 430 -               phy-handle = <&slot1_sxgmii2>;
 431 -               phy-mode = "2500base-x";
 432 -       };
 433 -
 434 -       port@3 {
 435 -               status = "okay";
 436 -               phy-handle = <&slot1_sxgmii3>;
 437 -               phy-mode = "2500base-x";
 438 -       };
 439 -};
 440 --- /dev/null
 441 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts
 442 @@ -0,0 +1,93 @@
 443 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 444 +/*
 445 + * Device Tree fragment for LS1028A QDS board, serdes 85bb
 446 + *
 447 + * Copyright 2019 NXP
 448 + *
 449 + * Requires a LS1028A QDS board with lane B rework.
 450 + * Requires a SCH-24801 card in slot 1 and a SCH-28021 card in slot 2.
 451 + */
 452 +
 453 +/dts-v1/;
 454 +/plugin/;
 455 +
 456 +/ {
 457 +       fragment@0 {
 458 +               target = <&mdio_slot1>;
 459 +               __overlay__ {
 460 +                       #address-cells = <1>;
 461 +                       #size-cells = <0>;
 462 +
 463 +                       slot1_sgmii: ethernet-phy@1c {
 464 +                               /* 1st port on VSC8234 */
 465 +                               reg = <0x1c>;
 466 +                       };
 467 +               };
 468 +       };
 469 +
 470 +       fragment@1 {
 471 +               target = <&enetc_port0>;
 472 +               __overlay__ {
 473 +                       phy-handle = <&slot1_sgmii>;
 474 +                       phy-mode = "sgmii";
 475 +               };
 476 +       };
 477 +
 478 +       fragment@2 {
 479 +               target = <&mdio_slot2>;
 480 +               __overlay__ {
 481 +                       #address-cells = <1>;
 482 +                       #size-cells = <0>;
 483 +
 484 +                       /* 4 ports on VSC8514 */
 485 +                       slot2_qsgmii0: ethernet-phy@8 {
 486 +                               reg = <0x8>;
 487 +                       };
 488 +
 489 +                       slot2_qsgmii1: ethernet-phy@9 {
 490 +                               reg = <0x9>;
 491 +                       };
 492 +
 493 +                       slot2_qsgmii2: ethernet-phy@a {
 494 +                               reg = <0xa>;
 495 +                       };
 496 +
 497 +                       slot2_qsgmii3: ethernet-phy@b {
 498 +                               reg = <0xb>;
 499 +                       };
 500 +               };
 501 +       };
 502 +
 503 +       fragment@3 {
 504 +               target = <&mscc_felix_ports>;
 505 +               __overlay__ {
 506 +                       port@0 {
 507 +                               status = "okay";
 508 +                               phy-handle = <&slot2_qsgmii0>;
 509 +                               phy-mode = "qsgmii";
 510 +                               managed = "in-band-status";
 511 +                       };
 512 +
 513 +                       port@1 {
 514 +                               status = "okay";
 515 +                               phy-handle = <&slot2_qsgmii1>;
 516 +                               phy-mode = "qsgmii";
 517 +                               managed = "in-band-status";
 518 +                       };
 519 +
 520 +                       port@2 {
 521 +                               status = "okay";
 522 +                               phy-handle = <&slot2_qsgmii2>;
 523 +                               phy-mode = "qsgmii";
 524 +                               managed = "in-band-status";
 525 +                       };
 526 +
 527 +                       port@3 {
 528 +                               status = "okay";
 529 +                               phy-handle = <&slot2_qsgmii3>;
 530 +                               phy-mode = "qsgmii";
 531 +                               managed = "in-band-status";
 532 +                       };
 533 +               };
 534 +       };
 535 +};
 536 --- /dev/null
 537 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts
 538 @@ -0,0 +1,66 @@
 539 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 540 +/*
 541 + * Device Tree fragment for LS1028A QDS board, serdes 85xx
 542 + *
 543 + * Copyright 2019 NXP
 544 + *
 545 + * Requires a LS1028A QDS board without lane B rework.
 546 + * Requires a SCH-24801 card in slot 1.
 547 + */
 548 +
 549 +/dts-v1/;
 550 +/plugin/;
 551 +
 552 +/ {
 553 +       fragment@0 {
 554 +               target = <&mdio_slot1>;
 555 +               __overlay__ {
 556 +                       #address-cells = <1>;
 557 +                       #size-cells = <0>;
 558 +
 559 +                       /* VSC8234 */
 560 +                       slot1_sgmii0: ethernet-phy@1c {
 561 +                               reg = <0x1c>;
 562 +                       };
 563 +
 564 +                       slot1_sgmii1: ethernet-phy@1d {
 565 +                               reg = <0x1d>;
 566 +                       };
 567 +
 568 +                       slot1_sgmii2: ethernet-phy@1e {
 569 +                               reg = <0x1e>;
 570 +                       };
 571 +
 572 +                       slot1_sgmii3: ethernet-phy@1f {
 573 +                               reg = <0x1f>;
 574 +                       };
 575 +               };
 576 +       };
 577 +
 578 +       fragment@1 {
 579 +               target = <&enetc_port0>;
 580 +               __overlay__ {
 581 +                       phy-handle = <&slot1_sgmii0>;
 582 +                       phy-mode = "sgmii";
 583 +               };
 584 +       };
 585 +
 586 +       fragment@2 {
 587 +               target = <&mscc_felix_ports>;
 588 +               __overlay__ {
 589 +                       port@1 {
 590 +                               status = "okay";
 591 +                               phy-handle = <&slot1_sgmii1>;
 592 +                               phy-mode = "sgmii";
 593 +                               managed = "in-band-status";
 594 +                       };
 595 +
 596 +                       port@2 {
 597 +                               status = "okay";
 598 +                               phy-handle = <&slot1_sgmii2>;
 599 +                               phy-mode = "sgmii";
 600 +                               managed = "in-band-status";
 601 +                       };
 602 +               };
 603 +       };
 604 +};
 605 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-8xxx.dtsi
 606 +++ /dev/null
 607 @@ -1,19 +0,0 @@
 608 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 609 -/*
 610 - * Device Tree Include file for LS1028A QDS board, serdes 8xxx
 611 - *
 612 - * Copyright 2019 NXP
 613 - *
 614 - */
 615 -
 616 -&mdio_slot1 {
 617 -       slot1_sgmii: ethernet-phy@1c {
 618 -               /* 1st port on VSC8234 */
 619 -               reg = <0x1c>;
 620 -       };
 621 -};
 622 -
 623 -&enetc_port0 {
 624 -       phy-handle = <&slot1_sgmii>;
 625 -       phy-connection-type = "sgmii";
 626 -};
 627 --- /dev/null
 628 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts
 629 @@ -0,0 +1,71 @@
 630 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 631 +/*
 632 + * Device Tree fragment for LS1028A QDS board, serdes 85xx
 633 + *
 634 + * Copyright 2019 NXP
 635 + *
 636 + * Requires a LS1028A QDS board without lane B rework.
 637 + * Requires a SCH-24801 card in slot 1.
 638 + */
 639 +
 640 +/dts-v1/;
 641 +/plugin/;
 642 +
 643 +/ {
 644 +       fragment@0 {
 645 +               target = <&mdio_slot1>;
 646 +               __overlay__ {
 647 +                       #address-cells = <1>;
 648 +                       #size-cells = <0>;
 649 +
 650 +                       /* VSC8234 */
 651 +                       slot1_sgmii0: ethernet-phy@1c {
 652 +                               reg = <0x1c>;
 653 +                       };
 654 +
 655 +                       slot1_sgmii1: ethernet-phy@1d {
 656 +                               reg = <0x1d>;
 657 +                       };
 658 +
 659 +                       slot1_sgmii2: ethernet-phy@1e {
 660 +                               reg = <0x1e>;
 661 +                       };
 662 +
 663 +                       slot1_sgmii3: ethernet-phy@1f {
 664 +                               reg = <0x1f>;
 665 +                       };
 666 +               };
 667 +       };
 668 +       fragment@1 {
 669 +               target = <&mscc_felix_ports>;
 670 +               __overlay__ {
 671 +                       port@0 {
 672 +                               status = "okay";
 673 +                               phy-handle = <&slot1_sgmii0>;
 674 +                               phy-mode = "sgmii";
 675 +                               managed = "in-band-status";
 676 +                       };
 677 +
 678 +                       port@1 {
 679 +                               status = "okay";
 680 +                               phy-handle = <&slot1_sgmii1>;
 681 +                               phy-mode = "sgmii";
 682 +                               managed = "in-band-status";
 683 +                       };
 684 +
 685 +                       port@2 {
 686 +                               status = "okay";
 687 +                               phy-handle = <&slot1_sgmii2>;
 688 +                               phy-mode = "sgmii";
 689 +                               managed = "in-band-status";
 690 +                       };
 691 +
 692 +                       port@3 {
 693 +                               status = "okay";
 694 +                               phy-handle = <&slot1_sgmii3>;
 695 +                               phy-mode = "sgmii";
 696 +                               managed = "in-band-status";
 697 +                       };
 698 +               };
 699 +       };
 700 +};
 701 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi
 702 +++ /dev/null
 703 @@ -1,57 +0,0 @@
 704 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 705 -/*
 706 - * Device Tree Include file for LS1028A QDS board, serdes 9999
 707 - *
 708 - * Copyright 2019 NXP
 709 - *
 710 - */
 711 -
 712 -&mdio_slot1 {
 713 -       /* VSC8234 */
 714 -       slot1_sgmii0: ethernet-phy@1c {
 715 -               reg = <0x1c>;
 716 -       };
 717 -
 718 -       slot1_sgmii1: ethernet-phy@1d {
 719 -               reg = <0x1d>;
 720 -       };
 721 -
 722 -       slot1_sgmii2: ethernet-phy@1e {
 723 -               reg = <0x1e>;
 724 -       };
 725 -
 726 -       slot1_sgmii3: ethernet-phy@1f {
 727 -               reg = <0x1f>;
 728 -       };
 729 -};
 730 -
 731 -/* l2switch ports */
 732 -&mscc_felix_ports {
 733 -       port@0 {
 734 -               status = "okay";
 735 -               phy-handle = <&slot1_sgmii0>;
 736 -               phy-mode = "sgmii";
 737 -               managed = "in-band-status";
 738 -       };
 739 -
 740 -       port@1 {
 741 -               status = "okay";
 742 -               phy-handle = <&slot1_sgmii1>;
 743 -               phy-mode = "sgmii";
 744 -               managed = "in-band-status";
 745 -       };
 746 -
 747 -       port@2 {
 748 -               status = "okay";
 749 -               phy-handle = <&slot1_sgmii2>;
 750 -               phy-mode = "sgmii";
 751 -               managed = "in-band-status";
 752 -       };
 753 -
 754 -       port@3 {
 755 -               status = "okay";
 756 -               phy-handle = <&slot1_sgmii3>;
 757 -               phy-mode = "sgmii";
 758 -               managed = "in-band-status";
 759 -       };
 760 -};
 761 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi
 762 +++ /dev/null
 763 @@ -1,61 +0,0 @@
 764 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 765 -/*
 766 - * Device Tree Include file for LS1028A QDS board, serdes x3xx
 767 - *
 768 - * Copyright 2019 NXP
 769 - *
 770 - */
 771 -
 772 -&mdio_slot2 {
 773 -       /* 4 ports on AQR412 */
 774 -       slot2_qxgmii0: ethernet-phy@0 {
 775 -               reg = <0x0>;
 776 -               compatible = "ethernet-phy-ieee802.3-c45";
 777 -       };
 778 -
 779 -       slot2_qxgmii1: ethernet-phy@1 {
 780 -               reg = <0x1>;
 781 -               compatible = "ethernet-phy-ieee802.3-c45";
 782 -       };
 783 -
 784 -       slot2_qxgmii2: ethernet-phy@2 {
 785 -               reg = <0x2>;
 786 -               compatible = "ethernet-phy-ieee802.3-c45";
 787 -       };
 788 -
 789 -       slot2_qxgmii3: ethernet-phy@3 {
 790 -               reg = <0x3>;
 791 -               compatible = "ethernet-phy-ieee802.3-c45";
 792 -       };
 793 -};
 794 -
 795 -/* l2switch ports */
 796 -&mscc_felix_ports {
 797 -       port@0 {
 798 -               status = "okay";
 799 -               phy-handle = <&slot2_qxgmii0>;
 800 -               phy-mode = "usxgmii";
 801 -               managed = "in-band-status";
 802 -       };
 803 -
 804 -       port@1 {
 805 -               status = "okay";
 806 -               phy-handle = <&slot2_qxgmii1>;
 807 -               phy-mode = "usxgmii";
 808 -               managed = "in-band-status";
 809 -       };
 810 -
 811 -       port@2 {
 812 -               status = "okay";
 813 -               phy-handle = <&slot2_qxgmii2>;
 814 -               phy-mode = "usxgmii";
 815 -               managed = "in-band-status";
 816 -       };
 817 -
 818 -       port@3 {
 819 -               status = "okay";
 820 -               phy-handle = <&slot2_qxgmii3>;
 821 -               phy-mode = "usxgmii";
 822 -               managed = "in-band-status";
 823 -       };
 824 -};
 825 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi
 826 +++ /dev/null
 827 @@ -1,57 +0,0 @@
 828 -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 829 -/*
 830 - * Device Tree Include file for LS1028A QDS board, serdes x5xx
 831 - *
 832 - * Copyright 2019 NXP
 833 - *
 834 - */
 835 -
 836 -&mdio_slot2 {
 837 -       /* 4 ports on VSC8514 */
 838 -       slot2_qsgmii0: ethernet-phy@8 {
 839 -               reg = <0x8>;
 840 -       };
 841 -
 842 -       slot2_qsgmii1: ethernet-phy@9 {
 843 -               reg = <0x9>;
 844 -       };
 845 -
 846 -       slot2_qsgmii2: ethernet-phy@a {
 847 -               reg = <0xa>;
 848 -       };
 849 -
 850 -       slot2_qsgmii3: ethernet-phy@b {
 851 -               reg = <0xb>;
 852 -       };
 853 -};
 854 -
 855 -/* l2switch ports */
 856 -&mscc_felix_ports {
 857 -       port@0 {
 858 -               status = "okay";
 859 -               phy-handle = <&slot2_qsgmii0>;
 860 -               phy-mode = "qsgmii";
 861 -               managed = "in-band-status";
 862 -       };
 863 -
 864 -       port@1 {
 865 -               status = "okay";
 866 -               phy-handle = <&slot2_qsgmii1>;
 867 -               phy-mode = "qsgmii";
 868 -               managed = "in-band-status";
 869 -       };
 870 -
 871 -       port@2 {
 872 -               status = "okay";
 873 -               phy-handle = <&slot2_qsgmii2>;
 874 -               phy-mode = "qsgmii";
 875 -               managed = "in-band-status";
 876 -       };
 877 -
 878 -       port@3 {
 879 -               status = "okay";
 880 -               phy-handle = <&slot2_qsgmii3>;
 881 -               phy-mode = "qsgmii";
 882 -               managed = "in-band-status";
 883 -       };
 884 -};
 885 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
 886 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
 887 @@ -276,6 +276,3 @@
 888         lane-mapping = <0x4e>;
 889         status = "okay";
 890  };
 891 -
 892 -#include "fsl-ls1028a-qds-8xxx.dtsi"
 893 -#include "fsl-ls1028a-qds-x5xx.dtsi"