target/linux/layerscape/patches-5.4/302-dts-0009-arm64-dts-ls1088a-accumulated-change-to-ls1088a-boar.patch

   1 From 2790ba4aa3e487ac29d6027eb226ed986f0e2769 Mon Sep 17 00:00:00 2001
   2 From: Li Yang <leoyang.li@nxp.com>
   3 Date: Thu, 2 May 2019 16:10:03 -0500
   4 Subject: [PATCH] arm64: dts: ls1088a: accumulated change to ls1088a boards
   5
   6 commit f967940f2fb73bc7ec676dbad9f32fbf4e7fea2b
   7 Author: Pengbo Mu <pengbo.mu@nxp.com>
   8 Date:   Fri Jul 13 16:19:36 2018 +0800
   9
  10     arm64: dts: ls1088a: add snps incr burst type adjustment in usb0 &
  11 usb1
  12
  13     This property could fix the defect that external usb device always
  14     prints this error log --- 'reset SuperSpeed USB device number n
  15 using
  16     xhci_hcd' when system power on.
  17
  18     Signed-off-by: Pengbo Mu <pengbo.mu@nxp.com>
  19
  20 commit 46123df3a174f0d76c8b954a0386e64841453836
  21 Author: Florinel Iordache <florinel.iordache@nxp.com>
  22 Date:   Thu Aug 9 12:29:18 2018 +0300
  23
  24     arm64: dts: updates for Unified Backplane driver
  25
  26     Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
  27
  28 commit 3b214bd42d47ebe7b6af925a3ffcf09aaaaabfb9
  29 Author: Nipun Gupta <nipun.gupta@nxp.com>
  30 Date:   Sat Apr 28 00:20:48 2018 +0530
  31
  32     arm64: dts: ls1088: add dma-cohernet property in fsl-mc node
  33
  34     Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
  35
  36 commit 240b04a98171f6774d1c3c498f8cb21f4411ac5f
  37 Author: Laurentiu Tudor <laurentiu.tudor@nxp.com>
  38 Date:   Thu Apr 26 12:26:54 2018 +0300
  39
  40     arm64: dts: ls1088a: move fsl-mc node as a child of soc
  41
  42     Move the fsl-mc hardware manager node in the soc node because all
  43 the
  44     soc settings (such as 'dma-ranges') also apply to the fsl-mc and
  45 need
  46     to be propagated to it.
  47
  48     Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
  49
  50 commit 3f2f50950f763d1335181ce374a11ed118abf0fa
  51 Author: Nipun Gupta <nipun.gupta@nxp.com>
  52 Date:   Wed Apr 25 09:43:47 2018 +0530
  53
  54     arm64: dts: ls1088: add dma ranges property
  55
  56     Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
  57
  58 commit 6afd0157e8fa2510790537855c86f8a7c1431abe
  59 Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
  60 Date:   Mon Apr 2 16:25:38 2018 +0800
  61
  62     arm64: dts: ls1088a: add dts entry for A-010650
  63
  64     Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
  65
  66 commit 0f8432c30c44771f9180aa7bf7580ad1d7e7c9d3
  67 Author: Nipun Gupta <nipun.gupta@nxp.com>
  68 Date:   Mon Feb 26 10:40:37 2018 +0530
  69
  70     arm64: dts: ls1088a: add dma coherent property in smmu node
  71
  72     Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
  73
  74 commit 6417c66b823ab380cf73ee252a998d98b28f0180
  75 Author: Suresh Gupta <suresh.gupta@nxp.com>
  76 Date:   Fri Feb 2 00:04:41 2018 +0530
  77
  78     arm64: dts: freescale: ls1088a: Modify DT nodes for qspi
  79
  80     Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
  81     Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
  82
  83 commit 01a1ea9e781d307ab87da95043ec898736495fff
  84 Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
  85 Date:   Thu Nov 2 10:36:48 2017 +0800
  86
  87     arm64: dts: ls1088a: correct the i2c clock to 1/8 platform pll
  88
  89     Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
  90
  91 commit 60122f1192e1cc23e5952468cc5a884287d64907
  92 Author: Bharat Bhushan <Bharat.Bhushan@nxp.com>
  93 Date:   Thu Sep 7 10:08:31 2017 +0530
  94
  95     arm64: dts: ls1088a: Add iommu-map property for pci
  96
  97     This patch adds iommu-map property for PCIe, which enables
  98     SMMU for these devices on LS1088.
  99
 100     Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
 101
 102 commit 43c4d0cf074106b411280c5b2be75d5d6e63fb01
 103 Author: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
 104 Date:   Mon Aug 21 11:43:07 2017 +0300
 105
 106     arm64: dts: ls1088a: add backplane support
 107
 108     Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
 109
 110 commit 57d49424694f72adbf7cf1dbeff38704f0d65359
 111 Author: Ashish Kumar <Ashish.Kumar@nxp.com>
 112 Date:   Mon Jun 19 18:32:13 2017 +0530
 113
 114     arm64: dts: ls1088: Add Reboot node in dtsi
 115
 116     Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
 117
 118 commit ee950989a7babc240153a20fe468573e13d61f98
 119 Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
 120 Date:   Thu May 11 14:59:28 2017 +0800
 121
 122     arm64: dts: ls1088a: add ftm0 nodes
 123
 124     Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
 125
 126 commit 6d3a96446a7ffccb0b9936b616d855c8d5572bce
 127 Author: Bogdan Purcareata <bogdan.purcareata@nxp.com>
 128 Date:   Wed May 3 14:26:35 2017 +0000
 129
 130     arm64: dts: fsl/ls1088,ls208x: Add mdio and phy nodes
 131
 132     Add mdio and phy nodes for the following FSL platforms:
 133     - LS1088A RDB
 134     - LS2080A QDS & RDB
 135     - LS2088A QDS, RDB & simu
 136
 137     Contains contributions from patches by the following authors:
 138     Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
 139     Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
 140     Signed-off-by: Pratiyush Mohan Srivastava
 141 <pratiyush.srivastava@nxp.com>
 142     Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
 143     Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
 144     Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
 145     Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
 146     Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
 147     Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
 148     Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
 149
 150 commit 971ff2e74cfebb84286ec3e191f5910dded4bd41
 151 Author: Suresh Gupta <suresh.gupta@nxp.com>
 152 Date:   Thu May 4 18:04:44 2017 +0530
 153
 154     arm64: dts: ls1088a: Add QSPI node for QDS, RDB
 155
 156     This is temporary patch, will rewrite for open source
 157
 158     Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
 159     Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
 160
 161 commit c61036e6dfe264d61cc213293040d873d863e8ac
 162 Author: Nipun Gupta <nipun.gupta@nxp.com>
 163 Date:   Thu Apr 27 23:35:15 2017 +0530
 164
 165     arm64: dts: add iommu-map property in fsl-mc node
 166
 167     Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
 168
 169 commit a4412cc510162a900d10c8ca4add71defb3f2d97
 170 Author: Nipun Gupta <nipun.gupta@nxp.com>
 171 Date:   Wed Apr 19 22:26:15 2017 +0530
 172
 173     arm64: dts: add smmu device node in LS1088 devicetree
 174
 175     Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
 176 ---
 177  arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts |  50 ++++++++++
 178  arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 104 +++++++++++++++++++++
 179  arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    | 108 +++++++++++++++++++++-
 180  3 files changed, 261 insertions(+), 1 deletion(-)
 181
 182 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
 183 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
 184 @@ -131,6 +131,30 @@
 185         };
 186  };
 187
 188 +&qspi {
 189 +       status = "okay";
 190 +       fsl,qspi-has-second-chip;
 191 +       qflash0: s25fs512s@0 {
 192 +               compatible = "spansion,m25p80";
 193 +               #address-cells = <1>;
 194 +               #size-cells = <1>;
 195 +               spi-max-frequency = <20000000>;
 196 +               reg = <0>;
 197 +               spi-rx-bus-width = <4>;
 198 +               spi-tx-bus-width = <4>;
 199 +       };
 200 +
 201 +       qflash1: s25fs512s@1 {
 202 +               compatible = "spansion,m25p80";
 203 +               #address-cells = <1>;
 204 +               #size-cells = <1>;
 205 +               spi-max-frequency = <20000000>;
 206 +               reg = <1>;
 207 +               spi-rx-bus-width = <4>;
 208 +               spi-tx-bus-width = <4>;
 209 +       };
 210 +};
 211 +
 212  &duart0 {
 213         status = "okay";
 214  };
 215 @@ -146,3 +170,29 @@
 216  &sata {
 217         status = "okay";
 218  };
 219 +
 220 +&pcs_mdio1 {
 221 +               pcs_phy1: ethernet-phy@0 {
 222 +               backplane-mode = "10gbase-kr";
 223 +               compatible = "ethernet-phy-ieee802.3-c45";
 224 +               reg = <0x0>;
 225 +               fsl,lane-handle = <&serdes1>;
 226 +               fsl,lane-reg = <0x840 0x40>;/* lane B */
 227 +       };
 228 +};
 229 +
 230 +&pcs_mdio2 {
 231 +               pcs_phy2: ethernet-phy@0 {
 232 +               backplane-mode = "10gbase-kr";
 233 +               compatible = "ethernet-phy-ieee802.3-c45";
 234 +               reg = <0x0>;
 235 +               fsl,lane-handle = <&serdes1>;
 236 +               fsl,lane-reg = <0x800 0x40>;/* lane A */
 237 +       };
 238 +};
 239 +
 240 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
 241 + * &dpmac1 {
 242 + *     phy-handle = <&pcs_phy1>;
 243 + * };
 244 + */
 245 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
 246 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
 247 @@ -74,6 +74,31 @@
 248         };
 249  };
 250
 251 +&qspi {
 252 +       status = "okay";
 253 +       fsl,qspi-has-second-chip;
 254 +       qflash0: s25fs512s@0 {
 255 +               compatible = "spansion,m25p80";
 256 +               #address-cells = <1>;
 257 +               #size-cells = <1>;
 258 +               spi-max-frequency = <20000000>;
 259 +               reg = <0>;
 260 +               spi-rx-bus-width = <4>;
 261 +               spi-tx-bus-width = <4>;
 262 +       };
 263 +
 264 +       qflash1: s25fs512s@1 {
 265 +               compatible = "spansion,m25p80";
 266 +               #address-cells = <1>;
 267 +               #size-cells = <1>;
 268 +               spi-max-frequency = <20000000>;
 269 +               reg = <1>;
 270 +               spi-rx-bus-width = <4>;
 271 +               spi-tx-bus-width = <4>;
 272 +       };
 273 +
 274 +};
 275 +
 276  &duart0 {
 277         status = "okay";
 278  };
 279 @@ -97,3 +122,82 @@
 280  &usb1 {
 281         status = "okay";
 282  };
 283 +
 284 +&emdio1 {
 285 +       /* Freescale F104 PHY1 */
 286 +       mdio1_phy1: emdio1_phy@1 {
 287 +               reg = <0x1c>;
 288 +               phy-connection-type = "qsgmii";
 289 +       };
 290 +       mdio1_phy2: emdio1_phy@2 {
 291 +               reg = <0x1d>;
 292 +               phy-connection-type = "qsgmii";
 293 +       };
 294 +       mdio1_phy3: emdio1_phy@3 {
 295 +               reg = <0x1e>;
 296 +               phy-connection-type = "qsgmii";
 297 +       };
 298 +       mdio1_phy4: emdio1_phy@4 {
 299 +               reg = <0x1f>;
 300 +               phy-connection-type = "qsgmii";
 301 +       };
 302 +       /* F104 PHY2 */
 303 +       mdio1_phy5: emdio1_phy@5 {
 304 +               reg = <0x0c>;
 305 +               phy-connection-type = "qsgmii";
 306 +       };
 307 +       mdio1_phy6: emdio1_phy@6 {
 308 +               reg = <0x0d>;
 309 +               phy-connection-type = "qsgmii";
 310 +       };
 311 +       mdio1_phy7: emdio1_phy@7 {
 312 +               reg = <0x0e>;
 313 +               phy-connection-type = "qsgmii";
 314 +       };
 315 +       mdio1_phy8: emdio1_phy@8 {
 316 +               reg = <0x0f>;
 317 +               phy-connection-type = "qsgmii";
 318 +       };
 319 +};
 320 +
 321 +&emdio2 {
 322 +       /* Aquantia AQR105 10G PHY */
 323 +       mdio2_phy1: emdio2_phy@1 {
 324 +               compatible = "ethernet-phy-ieee802.3-c45";
 325 +               interrupts = <0 2 0x4>;
 326 +               reg = <0x0>;
 327 +               phy-connection-type = "xfi";
 328 +       };
 329 +};
 330 +
 331 +/* DPMAC connections to external PHYs
 332 + * based on LS1088A RM RevC - $24.1.2 SerDes Options
 333 + */
 334 +/* DPMAC1 is 10G SFP+, fixed link */
 335 +&dpmac2 {
 336 +       phy-handle = <&mdio2_phy1>;
 337 +};
 338 +&dpmac3 {
 339 +       phy-handle = <&mdio1_phy5>;
 340 +};
 341 +&dpmac4 {
 342 +       phy-handle = <&mdio1_phy6>;
 343 +};
 344 +&dpmac5 {
 345 +       phy-handle = <&mdio1_phy7>;
 346 +};
 347 +&dpmac6 {
 348 +       phy-handle = <&mdio1_phy8>;
 349 +};
 350 +&dpmac7 {
 351 +       phy-handle = <&mdio1_phy1>;
 352 +};
 353 +&dpmac8 {
 354 +       phy-handle = <&mdio1_phy2>;
 355 +};
 356 +&dpmac9 {
 357 +       phy-handle = <&mdio1_phy3>;
 358 +};
 359 +&dpmac10 {
 360 +       phy-handle = <&mdio1_phy4>;
 361 +};
 362 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
 363 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
 364 @@ -185,6 +185,19 @@
 365                 clock-output-names = "sysclk";
 366         };
 367
 368 +       rstcr: syscon@1e60000 {
 369 +               compatible = "fsl,ls1088a-rstcr", "syscon";
 370 +               reg = <0x0 0x1e60000 0x0 0x4>;
 371 +       };
 372 +
 373 +       reboot {
 374 +               compatible = "syscon-reboot";
 375 +               regmap = <&rstcr>;
 376 +               offset = <0x0>;
 377 +               mask = <0x02>;
 378 +       };
 379 +
 380 +
 381         soc {
 382                 compatible = "simple-bus";
 383                 #address-cells = <2>;
 384 @@ -205,6 +218,11 @@
 385                         little-endian;
 386                 };
 387
 388 +               serdes1: serdes@1ea0000 {
 389 +                               reg = <0x0 0x1ea0000 0 0x00002000>;
 390 +                               compatible = "fsl,serdes-10g";
 391 +               };
 392 +
 393                 tmu: tmu@1f80000 {
 394                         compatible = "fsl,qoriq-tmu";
 395                         reg = <0x0 0x1f80000 0x0 0x10000>;
 396 @@ -325,6 +343,72 @@
 397                         #interrupt-cells = <2>;
 398                 };
 399
 400 +               /* TODO: WRIOP (CCSR?) */
 401 +               emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
 402 +                                         * E-MDIO1: 0x1_6000
 403 +                                         */
 404 +                       compatible = "fsl,fman-memac-mdio";
 405 +                       reg = <0x0 0x8B96000 0x0 0x1000>;
 406 +                       device_type = "mdio";
 407 +                       little-endian;  /* force the driver in LE mode */
 408 +
 409 +                       /* Not necessary on the QDS, but needed on the RDB */
 410 +                       #address-cells = <1>;
 411 +                       #size-cells = <0>;
 412 +               };
 413 +
 414 +               emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
 415 +                                         * E-MDIO2: 0x1_7000
 416 +                                         */
 417 +                       compatible = "fsl,fman-memac-mdio";
 418 +                       reg = <0x0 0x8B97000 0x0 0x1000>;
 419 +                       device_type = "mdio";
 420 +                       little-endian;  /* force the driver in LE mode */
 421 +
 422 +                       #address-cells = <1>;
 423 +                       #size-cells = <0>;
 424 +               };
 425 +
 426 +               pcs_mdio1: mdio@0x8c07000 {
 427 +                       compatible = "fsl,fman-memac-mdio";
 428 +                       reg = <0x0 0x8c07000 0x0 0x1000>;
 429 +                       device_type = "mdio";
 430 +                       little-endian;
 431 +
 432 +                       #address-cells = <1>;
 433 +                       #size-cells = <0>;
 434 +               };
 435 +
 436 +               pcs_mdio2: mdio@0x8c0b000 {
 437 +                       compatible = "fsl,fman-memac-mdio";
 438 +                       reg = <0x0 0x8c0b000 0x0 0x1000>;
 439 +                       device_type = "mdio";
 440 +                       little-endian;
 441 +
 442 +                       #address-cells = <1>;
 443 +                       #size-cells = <0>;
 444 +               };
 445 +
 446 +               pcs_mdio3: mdio@0x8c0f000 {
 447 +                       compatible = "fsl,fman-memac-mdio";
 448 +                       reg = <0x0 0x8c0f000 0x0 0x1000>;
 449 +                       device_type = "mdio";
 450 +                       little-endian;
 451 +
 452 +                       #address-cells = <1>;
 453 +                       #size-cells = <0>;
 454 +               };
 455 +
 456 +               pcs_mdio4: mdio@0x8c13000 {
 457 +                       compatible = "fsl,fman-memac-mdio";
 458 +                       reg = <0x0 0x8c13000 0x0 0x1000>;
 459 +                       device_type = "mdio";
 460 +                       little-endian;
 461 +
 462 +                       #address-cells = <1>;
 463 +                       #size-cells = <0>;
 464 +               };
 465 +
 466                 ifc: ifc@2240000 {
 467                         compatible = "fsl,ifc", "simple-bus";
 468                         reg = <0x0 0x2240000 0x0 0x20000>;
 469 @@ -335,13 +419,20 @@
 470                         status = "disabled";
 471                 };
 472
 473 +               ftm0: ftm0@2800000 {
 474 +                       compatible = "fsl,ftm-alarm";
 475 +                       reg = <0x0 0x2800000 0x0 0x10000>;
 476 +                       interrupts = <0 44 4>;
 477 +               };
 478 +
 479                 i2c0: i2c@2000000 {
 480 -                       compatible = "fsl,vf610-i2c";
 481 +                       compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c";
 482                         #address-cells = <1>;
 483                         #size-cells = <0>;
 484                         reg = <0x0 0x2000000 0x0 0x10000>;
 485                         interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
 486                         clocks = <&clockgen 4 7>;
 487 +                       scl-gpios = <&gpio3 30 0>;
 488                         status = "disabled";
 489                 };
 490
 491 @@ -405,6 +496,7 @@
 492                         dr_mode = "host";
 493                         snps,quirk-frame-length-adjustment = <0x20>;
 494                         snps,dis_rxdet_inp3_quirk;
 495 +                       snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 496                         status = "disabled";
 497                 };
 498
 499 @@ -418,6 +510,17 @@
 500                         dma-coherent;
 501                         status = "disabled";
 502                 };
 503 +               qspi: spi@20c0000 {
 504 +                       compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
 505 +                       #address-cells = <1>;
 506 +                       #size-cells = <0>;
 507 +                       reg = <0x0 0x20c0000 0x0 0x10000>,
 508 +                               <0x0 0x20000000 0x0 0x10000000>;
 509 +                       reg-names = "QuadSPI", "QuadSPI-memory";
 510 +                       interrupts = <0 25 0x4>; /* Level high type */
 511 +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
 512 +                       clock-names = "qspi_en", "qspi";
 513 +               };
 514
 515                 crypto: crypto@8000000 {
 516                         compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
 517 @@ -474,6 +577,7 @@
 518                         ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000   /* downstream I/O */
 519                                   0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 520                         msi-parent = <&its>;
 521 +                       iommu-map = <0 &smmu 0 1>;      /* This is fixed-up by u-boot */
 522                         #interrupt-cells = <1>;
 523                         interrupt-map-mask = <0 0 0 7>;
 524                         interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
 525 @@ -499,6 +603,7 @@
 526                         ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000   /* downstream I/O */
 527                                   0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 528                         msi-parent = <&its>;
 529 +                       iommu-map = <0 &smmu 0 1>;      /* This is fixed-up by u-boot */
 530                         #interrupt-cells = <1>;
 531                         interrupt-map-mask = <0 0 0 7>;
 532                         interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
 533 @@ -524,6 +629,7 @@
 534                         ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000   /* downstream I/O */
 535                                   0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 536                         msi-parent = <&its>;
 537 +                       iommu-map = <0 &smmu 0 1>;      /* This is fixed-up by u-boot */
 538                         #interrupt-cells = <1>;
 539                         interrupt-map-mask = <0 0 0 7>;
 540                         interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,