target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch

   1 From 76cd2ef6b69b67c09480a3248f7b910897f0bb2f Mon Sep 17 00:00:00 2001
   2 From: Yangbo Lu <yangbo.lu@nxp.com>
   3 Date: Mon, 25 Sep 2017 12:13:12 +0800
   4 Subject: [PATCH] flextimer: support layerscape
   5
   6 This is a integrated patch for layerscape flextimer support.
   7
   8 Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
   9 Signed-off-by: Meng Yi <meng.yi@nxp.com>
  10 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  11 ---
  12  drivers/clocksource/fsl_ftm_timer.c    |   8 +-
  13  drivers/soc/fsl/layerscape/ftm_alarm.c | 367 +++++++++++++++++++++++++++++++++
  14  2 files changed, 371 insertions(+), 4 deletions(-)
  15  create mode 100644 drivers/soc/fsl/layerscape/ftm_alarm.c
  16
  17 --- a/drivers/clocksource/fsl_ftm_timer.c
  18 +++ b/drivers/clocksource/fsl_ftm_timer.c
  19 @@ -83,11 +83,11 @@ static inline void ftm_counter_disable(v
  20
  21  static inline void ftm_irq_acknowledge(void __iomem *base)
  22  {
  23 -       u32 val;
  24 +       unsigned int timeout = 100;
  25
  26 -       val = ftm_readl(base + FTM_SC);
  27 -       val &= ~FTM_SC_TOF;
  28 -       ftm_writel(val, base + FTM_SC);
  29 +       while ((FTM_SC_TOF & ftm_readl(base + FTM_SC)) && timeout--)
  30 +               ftm_writel(ftm_readl(base + FTM_SC) & (~FTM_SC_TOF),
  31 +                          base + FTM_SC);
  32  }
  33
  34  static inline void ftm_irq_enable(void __iomem *base)
  35 --- /dev/null
  36 +++ b/drivers/soc/fsl/layerscape/ftm_alarm.c
  37 @@ -0,0 +1,367 @@
  38 +/*
  39 + * Freescale FlexTimer Module (FTM) Alarm driver.
  40 + *
  41 + * Copyright 2014 Freescale Semiconductor, Inc.
  42 + *
  43 + * This program is free software; you can redistribute it and/or
  44 + * modify it under the terms of the GNU General Public License
  45 + * as published by the Free Software Foundation; either version 2
  46 + * of the License, or (at your option) any later version.
  47 + */
  48 +
  49 +#include <linux/device.h>
  50 +#include <linux/err.h>
  51 +#include <linux/interrupt.h>
  52 +#include <linux/io.h>
  53 +#include <linux/of_address.h>
  54 +#include <linux/of_irq.h>
  55 +#include <linux/platform_device.h>
  56 +#include <linux/of.h>
  57 +#include <linux/of_device.h>
  58 +#include <linux/libata.h>
  59 +#include <linux/module.h>
  60 +
  61 +#define FTM_SC                 0x00
  62 +#define FTM_SC_CLK_SHIFT       3
  63 +#define FTM_SC_CLK_MASK                (0x3 << FTM_SC_CLK_SHIFT)
  64 +#define FTM_SC_CLK(c)          ((c) << FTM_SC_CLK_SHIFT)
  65 +#define FTM_SC_PS_MASK         0x7
  66 +#define FTM_SC_TOIE            BIT(6)
  67 +#define FTM_SC_TOF             BIT(7)
  68 +
  69 +#define FTM_SC_CLKS_FIXED_FREQ 0x02
  70 +
  71 +#define FTM_CNT                        0x04
  72 +#define FTM_MOD                        0x08
  73 +#define FTM_CNTIN              0x4C
  74 +
  75 +#define FIXED_FREQ_CLK         32000
  76 +#define MAX_FREQ_DIV           (1 << FTM_SC_PS_MASK)
  77 +#define MAX_COUNT_VAL          0xffff
  78 +
  79 +static void __iomem *ftm1_base;
  80 +static void __iomem *rcpm_ftm_addr;
  81 +static u32 alarm_freq;
  82 +static bool big_endian;
  83 +
  84 +enum pmu_endian_type {
  85 +       BIG_ENDIAN,
  86 +       LITTLE_ENDIAN,
  87 +};
  88 +
  89 +struct rcpm_cfg {
  90 +       enum pmu_endian_type big_endian;        /* Big/Little endian of PMU module */
  91 +       u32 flextimer_set_bit;  /* FlexTimer1 is not powerdown during device LPM20 */
  92 +};
  93 +
  94 +static struct rcpm_cfg ls1012a_rcpm_cfg = {
  95 +       .big_endian = BIG_ENDIAN,
  96 +       .flextimer_set_bit = 0x20000,
  97 +};
  98 +
  99 +static struct rcpm_cfg ls1021a_rcpm_cfg = {
 100 +       .big_endian = BIG_ENDIAN,
 101 +       .flextimer_set_bit = 0x20000,
 102 +};
 103 +
 104 +static struct rcpm_cfg ls1043a_rcpm_cfg = {
 105 +       .big_endian = BIG_ENDIAN,
 106 +       .flextimer_set_bit = 0x20000,
 107 +};
 108 +
 109 +static struct rcpm_cfg ls1046a_rcpm_cfg = {
 110 +       .big_endian = BIG_ENDIAN,
 111 +       .flextimer_set_bit = 0x20000,
 112 +};
 113 +
 114 +static struct rcpm_cfg ls1088a_rcpm_cfg = {
 115 +       .big_endian = LITTLE_ENDIAN,
 116 +       .flextimer_set_bit = 0x4000,
 117 +};
 118 +
 119 +static struct rcpm_cfg ls208xa_rcpm_cfg = {
 120 +       .big_endian = LITTLE_ENDIAN,
 121 +       .flextimer_set_bit = 0x4000,
 122 +};
 123 +
 124 +static const struct of_device_id ippdexpcr_of_match[] = {
 125 +       { .compatible = "fsl,ls1012a-ftm", .data = &ls1012a_rcpm_cfg},
 126 +       { .compatible = "fsl,ls1021a-ftm", .data = &ls1021a_rcpm_cfg},
 127 +       { .compatible = "fsl,ls1043a-ftm", .data = &ls1043a_rcpm_cfg},
 128 +       { .compatible = "fsl,ls1046a-ftm", .data = &ls1046a_rcpm_cfg},
 129 +       { .compatible = "fsl,ls1088a-ftm", .data = &ls1088a_rcpm_cfg},
 130 +       { .compatible = "fsl,ls208xa-ftm", .data = &ls208xa_rcpm_cfg},
 131 +       {},
 132 +};
 133 +MODULE_DEVICE_TABLE(of, ippdexpcr_of_match);
 134 +
 135 +static inline u32 ftm_readl(void __iomem *addr)
 136 +{
 137 +       if (big_endian)
 138 +               return ioread32be(addr);
 139 +
 140 +       return ioread32(addr);
 141 +}
 142 +
 143 +static inline void ftm_writel(u32 val, void __iomem *addr)
 144 +{
 145 +       if (big_endian)
 146 +               iowrite32be(val, addr);
 147 +       else
 148 +               iowrite32(val, addr);
 149 +}
 150 +
 151 +static inline void ftm_counter_enable(void __iomem *base)
 152 +{
 153 +       u32 val;
 154 +
 155 +       /* select and enable counter clock source */
 156 +       val = ftm_readl(base + FTM_SC);
 157 +       val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
 158 +       val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
 159 +       ftm_writel(val, base + FTM_SC);
 160 +}
 161 +
 162 +static inline void ftm_counter_disable(void __iomem *base)
 163 +{
 164 +       u32 val;
 165 +
 166 +       /* disable counter clock source */
 167 +       val = ftm_readl(base + FTM_SC);
 168 +       val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
 169 +       ftm_writel(val, base + FTM_SC);
 170 +}
 171 +
 172 +static inline void ftm_irq_acknowledge(void __iomem *base)
 173 +{
 174 +       unsigned int timeout = 100;
 175 +
 176 +       while ((FTM_SC_TOF & ftm_readl(base + FTM_SC)) && timeout--)
 177 +               ftm_writel(ftm_readl(base + FTM_SC) & (~FTM_SC_TOF),
 178 +                          base + FTM_SC);
 179 +}
 180 +
 181 +static inline void ftm_irq_enable(void __iomem *base)
 182 +{
 183 +       u32 val;
 184 +
 185 +       val = ftm_readl(base + FTM_SC);
 186 +       val |= FTM_SC_TOIE;
 187 +       ftm_writel(val, base + FTM_SC);
 188 +}
 189 +
 190 +static inline void ftm_irq_disable(void __iomem *base)
 191 +{
 192 +       u32 val;
 193 +
 194 +       val = ftm_readl(base + FTM_SC);
 195 +       val &= ~FTM_SC_TOIE;
 196 +       ftm_writel(val, base + FTM_SC);
 197 +}
 198 +
 199 +static inline void ftm_reset_counter(void __iomem *base)
 200 +{
 201 +       /*
 202 +        * The CNT register contains the FTM counter value.
 203 +        * Reset clears the CNT register. Writing any value to COUNT
 204 +        * updates the counter with its initial value, CNTIN.
 205 +        */
 206 +       ftm_writel(0x00, base + FTM_CNT);
 207 +}
 208 +
 209 +static u32 time_to_cycle(unsigned long time)
 210 +{
 211 +       u32 cycle;
 212 +
 213 +       cycle = time * alarm_freq;
 214 +       if (cycle > MAX_COUNT_VAL) {
 215 +               pr_err("Out of alarm range.\n");
 216 +               cycle = 0;
 217 +       }
 218 +
 219 +       return cycle;
 220 +}
 221 +
 222 +static u32 cycle_to_time(u32 cycle)
 223 +{
 224 +       return cycle / alarm_freq + 1;
 225 +}
 226 +
 227 +static void ftm_clean_alarm(void)
 228 +{
 229 +       ftm_counter_disable(ftm1_base);
 230 +
 231 +       ftm_writel(0x00, ftm1_base + FTM_CNTIN);
 232 +       ftm_writel(~0U, ftm1_base + FTM_MOD);
 233 +
 234 +       ftm_reset_counter(ftm1_base);
 235 +}
 236 +
 237 +static int ftm_set_alarm(u64 cycle)
 238 +{
 239 +       ftm_irq_disable(ftm1_base);
 240 +
 241 +       /*
 242 +        * The counter increments until the value of MOD is reached,
 243 +        * at which point the counter is reloaded with the value of CNTIN.
 244 +        * The TOF (the overflow flag) bit is set when the FTM counter
 245 +        * changes from MOD to CNTIN. So we should using the cycle - 1.
 246 +        */
 247 +       ftm_writel(cycle - 1, ftm1_base + FTM_MOD);
 248 +
 249 +       ftm_counter_enable(ftm1_base);
 250 +
 251 +       ftm_irq_enable(ftm1_base);
 252 +
 253 +       return 0;
 254 +}
 255 +
 256 +static irqreturn_t ftm_alarm_interrupt(int irq, void *dev_id)
 257 +{
 258 +       ftm_irq_acknowledge(ftm1_base);
 259 +       ftm_irq_disable(ftm1_base);
 260 +       ftm_clean_alarm();
 261 +
 262 +       return IRQ_HANDLED;
 263 +}
 264 +
 265 +static ssize_t ftm_alarm_show(struct device *dev,
 266 +                             struct device_attribute *attr,
 267 +                             char *buf)
 268 +{
 269 +       u32 count, val;
 270 +
 271 +       count = ftm_readl(ftm1_base + FTM_MOD);
 272 +       val = ftm_readl(ftm1_base + FTM_CNT);
 273 +       val = (count & MAX_COUNT_VAL) - val;
 274 +       val = cycle_to_time(val);
 275 +
 276 +       return sprintf(buf, "%u\n", val);
 277 +}
 278 +
 279 +static ssize_t ftm_alarm_store(struct device *dev,
 280 +                              struct device_attribute *attr,
 281 +                              const char *buf, size_t count)
 282 +{
 283 +       u32 cycle;
 284 +       unsigned long time;
 285 +
 286 +       if (kstrtoul(buf, 0, &time))
 287 +               return -EINVAL;
 288 +
 289 +       ftm_clean_alarm();
 290 +
 291 +       cycle = time_to_cycle(time);
 292 +       if (!cycle)
 293 +               return -EINVAL;
 294 +
 295 +       ftm_set_alarm(cycle);
 296 +
 297 +       return count;
 298 +}
 299 +
 300 +static struct device_attribute ftm_alarm_attributes = __ATTR(ftm_alarm, 0644,
 301 +                       ftm_alarm_show, ftm_alarm_store);
 302 +
 303 +static int ftm_alarm_probe(struct platform_device *pdev)
 304 +{
 305 +       struct device_node *np = pdev->dev.of_node;
 306 +       struct resource *r;
 307 +       int irq;
 308 +       int ret;
 309 +       struct rcpm_cfg *rcpm_cfg;
 310 +       u32 ippdexpcr, flextimer;
 311 +       const struct of_device_id *of_id;
 312 +       enum pmu_endian_type endian;
 313 +
 314 +       r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 315 +       if (!r)
 316 +               return -ENODEV;
 317 +
 318 +       ftm1_base = devm_ioremap_resource(&pdev->dev, r);
 319 +       if (IS_ERR(ftm1_base))
 320 +               return PTR_ERR(ftm1_base);
 321 +
 322 +       of_id = of_match_node(ippdexpcr_of_match, np);
 323 +       if (!of_id)
 324 +               return -ENODEV;
 325 +
 326 +       rcpm_cfg = devm_kzalloc(&pdev->dev, sizeof(*rcpm_cfg), GFP_KERNEL);
 327 +       if (!rcpm_cfg)
 328 +               return -ENOMEM;
 329 +
 330 +       rcpm_cfg = (struct rcpm_cfg*)of_id->data;
 331 +       endian = rcpm_cfg->big_endian;
 332 +       flextimer = rcpm_cfg->flextimer_set_bit;
 333 +
 334 +       r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "FlexTimer1");
 335 +       if (r) {
 336 +               rcpm_ftm_addr = devm_ioremap_resource(&pdev->dev, r);
 337 +               if (IS_ERR(rcpm_ftm_addr))
 338 +                       return PTR_ERR(rcpm_ftm_addr);
 339 +               if (endian == BIG_ENDIAN)
 340 +                       ippdexpcr = ioread32be(rcpm_ftm_addr);
 341 +               else
 342 +                       ippdexpcr = ioread32(rcpm_ftm_addr);
 343 +               ippdexpcr |= flextimer;
 344 +               if (endian == BIG_ENDIAN)
 345 +                       iowrite32be(ippdexpcr, rcpm_ftm_addr);
 346 +               else
 347 +                       iowrite32(ippdexpcr, rcpm_ftm_addr);
 348 +       }
 349 +
 350 +       irq = irq_of_parse_and_map(np, 0);
 351 +       if (irq <= 0) {
 352 +               pr_err("ftm: unable to get IRQ from DT, %d\n", irq);
 353 +               return -EINVAL;
 354 +       }
 355 +
 356 +       big_endian = of_property_read_bool(np, "big-endian");
 357 +
 358 +       ret = devm_request_irq(&pdev->dev, irq, ftm_alarm_interrupt,
 359 +                              IRQF_NO_SUSPEND, dev_name(&pdev->dev), NULL);
 360 +       if (ret < 0) {
 361 +               dev_err(&pdev->dev, "failed to request irq\n");
 362 +               return ret;
 363 +       }
 364 +
 365 +       ret = device_create_file(&pdev->dev, &ftm_alarm_attributes);
 366 +       if (ret) {
 367 +               dev_err(&pdev->dev, "create sysfs fail.\n");
 368 +               return ret;
 369 +       }
 370 +
 371 +       alarm_freq = (u32)FIXED_FREQ_CLK / (u32)MAX_FREQ_DIV;
 372 +
 373 +       ftm_clean_alarm();
 374 +
 375 +       device_init_wakeup(&pdev->dev, true);
 376 +
 377 +       return ret;
 378 +}
 379 +
 380 +static const struct of_device_id ftm_alarm_match[] = {
 381 +       { .compatible = "fsl,ls1012a-ftm", },
 382 +       { .compatible = "fsl,ls1021a-ftm", },
 383 +       { .compatible = "fsl,ls1043a-ftm", },
 384 +       { .compatible = "fsl,ls1046a-ftm", },
 385 +       { .compatible = "fsl,ls1088a-ftm", },
 386 +       { .compatible = "fsl,ls208xa-ftm", },
 387 +       { .compatible = "fsl,ftm-timer", },
 388 +       { },
 389 +};
 390 +
 391 +static struct platform_driver ftm_alarm_driver = {
 392 +       .probe          = ftm_alarm_probe,
 393 +       .driver         = {
 394 +               .name   = "ftm-alarm",
 395 +               .owner  = THIS_MODULE,
 396 +               .of_match_table = ftm_alarm_match,
 397 +       },
 398 +};
 399 +
 400 +static int __init ftm_alarm_init(void)
 401 +{
 402 +       return platform_driver_register(&ftm_alarm_driver);
 403 +}
 404 +device_initcall(ftm_alarm_init);