target/linux/layerscape/patches-4.4/3008-armv8-aarch32-Add-SMP-support-for-32-bit-Linux.patch

   1 From 5d06e90bd0e3bdd104b7b25173e05617f02dc44d Mon Sep 17 00:00:00 2001
   2 From: Alison Wang <b18965@freescale.com>
   3 Date: Fri, 13 May 2016 15:09:47 +0800
   4 Subject: [PATCH 08/70] armv8: aarch32: Add SMP support for 32-bit Linux
   5
   6 The patch adds SMP support for running 32-bit Linux kernel. Spin-table
   7 method is used for SMP support.
   8
   9 Signed-off-by: Alison Wang <alison.wang@nxp.com>
  10 Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
  11 ---
  12  arch/arm/mach-imx/common.h       |    1 +
  13  arch/arm/mach-imx/mach-ls1043a.c |    1 +
  14  arch/arm/mach-imx/platsmp.c      |   49 ++++++++++++++++++++++++++++++++++++++
  15  3 files changed, 51 insertions(+)
  16
  17 --- a/arch/arm/mach-imx/common.h
  18 +++ b/arch/arm/mach-imx/common.h
  19 @@ -155,5 +155,6 @@ static inline void imx_init_l2cache(void
  20
  21  extern struct smp_operations imx_smp_ops;
  22  extern struct smp_operations ls1021a_smp_ops;
  23 +extern const struct smp_operations layerscape_smp_ops;
  24
  25  #endif
  26 --- a/arch/arm/mach-imx/mach-ls1043a.c
  27 +++ b/arch/arm/mach-imx/mach-ls1043a.c
  28 @@ -17,5 +17,6 @@ static const char * const ls1043a_dt_com
  29  };
  30
  31  DT_MACHINE_START(LS1043A, "Freescale LS1043A")
  32 +       .smp            = smp_ops(layerscape_smp_ops),
  33         .dt_compat      = ls1043a_dt_compat,
  34  MACHINE_END
  35 --- a/arch/arm/mach-imx/platsmp.c
  36 +++ b/arch/arm/mach-imx/platsmp.c
  37 @@ -14,6 +14,7 @@
  38  #include <linux/of_address.h>
  39  #include <linux/of.h>
  40  #include <linux/smp.h>
  41 +#include <linux/types.h>
  42
  43  #include <asm/cacheflush.h>
  44  #include <asm/page.h>
  45 @@ -26,6 +27,8 @@
  46  u32 g_diag_reg;
  47  static void __iomem *scu_base;
  48
  49 +static u64 cpu_release_addr[NR_CPUS];
  50 +
  51  static struct map_desc scu_io_desc __initdata = {
  52         /* .virtual and .pfn are run-time assigned */
  53         .length         = SZ_4K,
  54 @@ -127,3 +130,49 @@ struct smp_operations  ls1021a_smp_ops _
  55         .smp_prepare_cpus       = ls1021a_smp_prepare_cpus,
  56         .smp_boot_secondary     = ls1021a_boot_secondary,
  57  };
  58 +
  59 +static int layerscape_smp_boot_secondary(unsigned int cpu,
  60 +                                        struct task_struct *idle)
  61 +{
  62 +       u32 secondary_startup_phys;
  63 +       __le32 __iomem *release_addr;
  64 +
  65 +       secondary_startup_phys = virt_to_phys(secondary_startup);
  66 +
  67 +       release_addr = ioremap_cache((u32)cpu_release_addr[cpu],
  68 +                                    sizeof(u64));
  69 +       if (!release_addr)
  70 +               return -ENOMEM;
  71 +
  72 +       writel_relaxed(secondary_startup_phys, release_addr);
  73 +       writel_relaxed(0, release_addr + 1);
  74 +       __cpuc_flush_dcache_area((__force void *)release_addr,
  75 +                                sizeof(u64));
  76 +
  77 +       sev();
  78 +
  79 +       iounmap(release_addr);
  80 +
  81 +       return 0;
  82 +}
  83 +
  84 +static void layerscape_smp_init_cpus(void)
  85 +{
  86 +       struct device_node *dnt = NULL;
  87 +       unsigned int cpu = 0;
  88 +
  89 +       while ((dnt = of_find_node_by_type(dnt, "cpu"))) {
  90 +               if (of_property_read_u64(dnt, "cpu-release-addr",
  91 +                   &cpu_release_addr[cpu])) {
  92 +                       pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
  93 +                       cpu);
  94 +               }
  95 +
  96 +               cpu++;
  97 +       }
  98 +}
  99 +
 100 +const struct smp_operations layerscape_smp_ops __initconst = {
 101 +       .smp_init_cpus          = layerscape_smp_init_cpus,
 102 +       .smp_boot_secondary     = layerscape_smp_boot_secondary,
 103 +};