apm821xx: wndr4700: add preliminary drivetemp sensor
[oweals/openwrt.git] / target / linux / lantiq / patches-5.4 / 0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch
1 From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001
2 From: Mathias Kresin <dev@kresin.me>
3 Date: Sun, 7 Jul 2019 21:45:51 +0200
4 Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes
5
6 Switch back to the former used names, to make the legacy switch driver
7 happy.
8
9 Signed-off-by: Mathias Kresin <dev@kresin.me>
10 ---
11  arch/mips/lantiq/xway/sysctrl.c | 14 +++++++-------
12  1 file changed, 7 insertions(+), 7 deletions(-)
13
14 --- a/arch/mips/lantiq/xway/sysctrl.c
15 +++ b/arch/mips/lantiq/xway/sysctrl.c
16 @@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
17                 clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
18                 clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
19                 clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
20 -               clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
21 +               clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
22                 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
23                 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
24         } else if (of_machine_is_compatible("lantiq,ar10")) {
25 @@ -511,11 +511,11 @@ void __init ltq_soc_init(void)
26                                   ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
27                 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
28                 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
29 -               clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
30 +               clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
31                                PMU_PPE_DP | PMU_PPE_TC);
32                 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
33 -               clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
34 -               clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
35 +               clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
36 +               clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
37                 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
38                 clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
39                 clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
40 @@ -534,12 +534,12 @@ void __init ltq_soc_init(void)
41                 clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
42  
43                 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
44 -               clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
45 +               clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
46                                 PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
47                                 PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
48                                 PMU_PPE_QSB | PMU_PPE_TOP);
49 -               clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
50 -               clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
51 +               clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
52 +               clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
53                 clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
54                 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
55                 clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);