target/linux/lantiq/patches-4.4/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch

   1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 10 Sep 2014 22:42:14 +0200
   4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h  |    6 +
   9  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 +
  10  arch/mips/lantiq/xway/Makefile                     |    3 +
  11  arch/mips/lantiq/xway/ath_eep.c                    |  282 ++++++++++++++++++++
  12  arch/mips/lantiq/xway/eth_mac.c                    |   76 ++++++
  13  arch/mips/lantiq/xway/pci-ath-fixup.c              |  109 ++++++++
  14  arch/mips/lantiq/xway/rt_eep.c                     |   60 +++++
  15  7 files changed, 539 insertions(+)
  16  create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  17  create mode 100644 arch/mips/lantiq/xway/ath_eep.c
  18  create mode 100644 arch/mips/lantiq/xway/eth_mac.c
  19  create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
  20  create mode 100644 arch/mips/lantiq/xway/rt_eep.c
  21
  22 --- /dev/null
  23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  24 @@ -0,0 +1,6 @@
  25 +#ifndef _PCI_ATH_FIXUP
  26 +#define _PCI_ATH_FIXUP
  27 +
  28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
  29 +
  30 +#endif /* _PCI_ATH_FIXUP */
  31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  33 @@ -104,5 +104,8 @@ int xrx200_gphy_boot(struct device *dev,
  34  extern void ltq_pmu_enable(unsigned int module);
  35  extern void ltq_pmu_disable(unsigned int module);
  36
  37 +/* allow the ethernet driver to load a flash mapped mac addr */
  38 +const u8* ltq_get_eth_mac(void);
  39 +
  40  #endif /* CONFIG_SOC_TYPE_XWAY */
  41  #endif /* _LTQ_XWAY_H__ */
  42 --- a/arch/mips/lantiq/xway/Makefile
  43 +++ b/arch/mips/lantiq/xway/Makefile
  44 @@ -2,4 +2,7 @@ obj-y := prom.o sysctrl.o clk.o reset.o
  45
  46  obj-y += vmmc.o tffs.o
  47
  48 +obj-y += eth_mac.o
  49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
  50 +
  51  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  52 --- /dev/null
  53 +++ b/arch/mips/lantiq/xway/ath_eep.c
  54 @@ -0,0 +1,299 @@
  55 +/*
  56 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  57 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  58 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  59 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  60 + *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
  61 + *  Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
  62 + *
  63 + *  This program is free software; you can redistribute it and/or modify it
  64 + *  under the terms of the GNU General Public License version 2 as published
  65 + *  by the Free Software Foundation.
  66 + */
  67 +
  68 +#include <linux/init.h>
  69 +#include <linux/module.h>
  70 +#include <linux/platform_device.h>
  71 +#include <linux/etherdevice.h>
  72 +#include <linux/ath5k_platform.h>
  73 +#include <linux/ath9k_platform.h>
  74 +#include <linux/pci.h>
  75 +#include <linux/err.h>
  76 +#include <linux/mtd/mtd.h>
  77 +#include <pci-ath-fixup.h>
  78 +#include <lantiq_soc.h>
  79 +
  80 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  81 +struct ath5k_platform_data ath5k_pdata;
  82 +struct ath9k_platform_data ath9k_pdata = {
  83 +       .led_pin = -1,
  84 +};
  85 +static u8 athxk_eeprom_mac[6];
  86 +
  87 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  88 +{
  89 +       dev->dev.platform_data = &ath9k_pdata;
  90 +       return 0;
  91 +}
  92 +
  93 +static int ath9k_eep_load;
  94 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  95 +{
  96 +       struct device_node *np = pdev->dev.of_node, *mtd_np = NULL;
  97 +       int mac_offset, led_pin;
  98 +       u32 mac_inc = 0, pci_slot = 0;
  99 +       int i;
 100 +       struct mtd_info *the_mtd;
 101 +       size_t flash_readlen;
 102 +       const __be32 *list;
 103 +       const char *part;
 104 +       phandle phandle;
 105 +       u16 dev_ids[2] = { 0 };
 106 +
 107 +       list = of_get_property(np, "ath,eep-flash", &i);
 108 +       if (!list || (i != (2 * sizeof(*list))))
 109 +               return -ENODEV;
 110 +
 111 +       phandle = be32_to_cpup(list++);
 112 +       if (phandle)
 113 +               mtd_np = of_find_node_by_phandle(phandle);
 114 +
 115 +       if (!mtd_np)
 116 +               return -ENODEV;
 117 +
 118 +       part = of_get_property(mtd_np, "label", NULL);
 119 +       if (!part)
 120 +               part = mtd_np->name;
 121 +
 122 +       the_mtd = get_mtd_device_nm(part);
 123 +       if (IS_ERR(the_mtd))
 124 +               return -ENODEV;
 125 +
 126 +       i = mtd_read(the_mtd, be32_to_cpup(list), ATH9K_PLAT_EEP_MAX_WORDS << 1,
 127 +               &flash_readlen, (void *) ath9k_pdata.eeprom_data);
 128 +
 129 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 130 +               size_t mac_readlen;
 131 +               mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
 132 +                       (void *) athxk_eeprom_mac);
 133 +       }
 134 +       put_mtd_device(the_mtd);
 135 +
 136 +       if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
 137 +               dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 138 +               return -ENODEV;
 139 +       }
 140 +
 141 +       if (of_find_property(np, "ath,eep-swap", NULL))
 142 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
 143 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 144 +
 145 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
 146 +               ath9k_pdata.endian_check = true;
 147 +
 148 +               dev_info(&pdev->dev, "endian check enabled.\n");
 149 +       }
 150 +
 151 +       if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac())
 152 +               memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 153 +
 154 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 155 +               dev_warn(&pdev->dev, "using random mac\n");
 156 +               random_ether_addr(athxk_eeprom_mac);
 157 +       }
 158 +
 159 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 160 +               athxk_eeprom_mac[5] += mac_inc;
 161 +
 162 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 163 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 164 +
 165 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 166 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 167 +
 168 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 169 +                if (ath9k_eep_load) {
 170 +                        struct pci_dev *d = NULL;
 171 +                        while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
 172 +                                        PCI_ANY_ID, d)) != NULL)
 173 +                                pci_fixup_device(pci_fixup_early, d);
 174 +                }
 175 +
 176 +       }
 177 +
 178 +       if (!of_property_read_u16_array(np, "ath,device-id", dev_ids, 2)) {
 179 +               struct pci_dev *d = NULL;
 180 +
 181 +               while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
 182 +                                          dev_ids[0], d)) != NULL)
 183 +                       d->device = dev_ids[1];
 184 +       }
 185 +
 186 +       if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
 187 +               ath9k_pdata.led_pin = led_pin;
 188 +               dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
 189 +       }
 190 +
 191 +       if (of_property_read_bool(np, "ath,led-active-high")) {
 192 +               ath9k_pdata.led_active_high = true;
 193 +               dev_info(&pdev->dev, "inverted LED polarity\n");
 194 +       }
 195 +
 196 +       if (of_property_read_bool(np, "ath,disable-2ghz")) {
 197 +               ath9k_pdata.disable_2ghz = true;
 198 +               dev_info(&pdev->dev, "disabled 2.4 GHz band\n");
 199 +       }
 200 +
 201 +       if (of_property_read_bool(np, "ath,disable-5ghz")) {
 202 +               ath9k_pdata.disable_5ghz = true;
 203 +               dev_info(&pdev->dev, "disabled 5 GHz band\n");
 204 +       }
 205 +
 206 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 207 +
 208 +       return 0;
 209 +}
 210 +
 211 +static struct of_device_id ath9k_eeprom_ids[] = {
 212 +       { .compatible = "ath9k,eeprom" },
 213 +       { }
 214 +};
 215 +
 216 +static struct platform_driver ath9k_eeprom_driver = {
 217 +       .driver         = {
 218 +               .name           = "ath9k,eeprom",
 219 +               .owner  = THIS_MODULE,
 220 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 221 +       },
 222 +};
 223 +
 224 +static int __init of_ath9k_eeprom_init(void)
 225 +{
 226 +        int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 227 +
 228 +        if (ret)
 229 +                ath9k_eep_load = 1;
 230 +
 231 +        return ret;
 232 +}
 233 +
 234 +static int __init of_ath9k_eeprom_init_late(void)
 235 +{
 236 +        if (!ath9k_eep_load)
 237 +                return 0;
 238 +        return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 239 +}
 240 +late_initcall(of_ath9k_eeprom_init_late);
 241 +subsys_initcall(of_ath9k_eeprom_init);
 242 +
 243 +
 244 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 245 +{
 246 +       dev->dev.platform_data = &ath5k_pdata;
 247 +       return 0;
 248 +}
 249 +
 250 +static int ath5k_eep_load;
 251 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 252 +{
 253 +       struct device_node *np = pdev->dev.of_node, *mtd_np = NULL;
 254 +       int mac_offset;
 255 +       u32 mac_inc = 0;
 256 +       int i;
 257 +       struct mtd_info *the_mtd;
 258 +       size_t flash_readlen;
 259 +       const __be32 *list;
 260 +       const char *part;
 261 +       phandle phandle;
 262 +
 263 +       list = of_get_property(np, "ath,eep-flash", &i);
 264 +       if (!list || (i != (2 * sizeof(*list))))
 265 +               return -ENODEV;
 266 +
 267 +       phandle = be32_to_cpup(list++);
 268 +       if (phandle)
 269 +               mtd_np = of_find_node_by_phandle(phandle);
 270 +
 271 +       if (!mtd_np)
 272 +               return -ENODEV;
 273 +
 274 +       part = of_get_property(mtd_np, "label", NULL);
 275 +       if (!part)
 276 +               part = mtd_np->name;
 277 +
 278 +       the_mtd = get_mtd_device_nm(part);
 279 +       if (IS_ERR(the_mtd))
 280 +               return -ENODEV;
 281 +
 282 +       ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1, GFP_KERNEL);
 283 +
 284 +       i = mtd_read(the_mtd, be32_to_cpup(list), ATH5K_PLAT_EEP_MAX_WORDS << 1,
 285 +               &flash_readlen, (void *) ath5k_pdata.eeprom_data);
 286 +
 287 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 288 +               size_t mac_readlen;
 289 +               mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
 290 +                       (void *) athxk_eeprom_mac);
 291 +       }
 292 +       put_mtd_device(the_mtd);
 293 +
 294 +       if (((ATH5K_PLAT_EEP_MAX_WORDS<<1) != flash_readlen) || i) {
 295 +               dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 296 +               return -ENODEV;
 297 +       }
 298 +
 299 +       if (of_find_property(np, "ath,eep-swap", NULL))
 300 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
 301 +                       ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
 302 +
 303 +       if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac())
 304 +               ether_addr_copy(athxk_eeprom_mac, ltq_get_eth_mac());
 305 +
 306 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 307 +               dev_warn(&pdev->dev, "using random mac\n");
 308 +               random_ether_addr(athxk_eeprom_mac);
 309 +       }
 310 +
 311 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 312 +               athxk_eeprom_mac[5] += mac_inc;
 313 +
 314 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 315 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 316 +
 317 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 318 +
 319 +       return 0;
 320 +}
 321 +
 322 +static struct of_device_id ath5k_eeprom_ids[] = {
 323 +       { .compatible = "ath5k,eeprom" },
 324 +       { }
 325 +};
 326 +
 327 +static struct platform_driver ath5k_eeprom_driver = {
 328 +       .driver         = {
 329 +               .name           = "ath5k,eeprom",
 330 +               .owner  = THIS_MODULE,
 331 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 332 +       },
 333 +};
 334 +
 335 +static int __init of_ath5k_eeprom_init(void)
 336 +{
 337 +       int ret = platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 338 +
 339 +       if (ret)
 340 +               ath5k_eep_load = 1;
 341 +
 342 +       return ret;
 343 +}
 344 +
 345 +static int __init of_ath5k_eeprom_init_late(void)
 346 +{
 347 +       if (!ath5k_eep_load)
 348 +               return 0;
 349 +
 350 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 351 +}
 352 +late_initcall(of_ath5k_eeprom_init_late);
 353 +subsys_initcall(of_ath5k_eeprom_init);
 354 --- /dev/null
 355 +++ b/arch/mips/lantiq/xway/eth_mac.c
 356 @@ -0,0 +1,25 @@
 357 +/*
 358 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
 359 + *
 360 + *  This program is free software; you can redistribute it and/or modify it
 361 + *  under the terms of the GNU General Public License version 2 as published
 362 + *  by the Free Software Foundation.
 363 + */
 364 +
 365 +#include <linux/init.h>
 366 +#include <linux/if_ether.h>
 367 +
 368 +static u8 eth_mac[6];
 369 +static int eth_mac_set;
 370 +
 371 +const u8* ltq_get_eth_mac(void)
 372 +{
 373 +       return eth_mac;
 374 +}
 375 +
 376 +static int __init setup_ethaddr(char *str)
 377 +{
 378 +       eth_mac_set = mac_pton(str, eth_mac);
 379 +       return !eth_mac_set;
 380 +}
 381 +early_param("ethaddr", setup_ethaddr);
 382 --- /dev/null
 383 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 384 @@ -0,0 +1,118 @@
 385 +/*
 386 + *  Atheros AP94 reference board PCI initialization
 387 + *
 388 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 389 + *
 390 + *  This program is free software; you can redistribute it and/or modify it
 391 + *  under the terms of the GNU General Public License version 2 as published
 392 + *  by the Free Software Foundation.
 393 + */
 394 +
 395 +#include <linux/pci.h>
 396 +#include <linux/init.h>
 397 +#include <linux/delay.h>
 398 +#include <lantiq_soc.h>
 399 +
 400 +struct ath_fixup {
 401 +       u16             *cal_data;
 402 +       unsigned        slot;
 403 +};
 404 +
 405 +static int ath_num_fixups;
 406 +static struct ath_fixup ath_fixups[2];
 407 +
 408 +static void ath_pci_fixup(struct pci_dev *dev)
 409 +{
 410 +       void __iomem *mem;
 411 +       struct pci_dev *bridge = pci_upstream_bridge(dev);
 412 +       u16 *cal_data = NULL;
 413 +       u16 cmd;
 414 +       u32 bar0;
 415 +       u32 val;
 416 +       u32 base;
 417 +       unsigned i;
 418 +
 419 +       for (i = 0; i < ath_num_fixups; i++) {
 420 +               if (ath_fixups[i].cal_data == NULL)
 421 +                       continue;
 422 +
 423 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 424 +                       continue;
 425 +
 426 +               cal_data = ath_fixups[i].cal_data;
 427 +               break;
 428 +       }
 429 +
 430 +       if (cal_data == NULL)
 431 +               return;
 432 +
 433 +       if (*cal_data != 0xa55a) {
 434 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 435 +               return;
 436 +       }
 437 +
 438 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 439 +
 440 +       base = dev->resource[0].start;
 441 +       mem = ioremap(base, 0x10000);
 442 +       if (!mem) {
 443 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 444 +               return;
 445 +       }
 446 +
 447 +       if (bridge) {
 448 +               pci_enable_device(dev);
 449 +       }
 450 +
 451 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 452 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base);
 453 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 454 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 455 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 456 +
 457 +       /* set pointer to first reg address */
 458 +       cal_data += 3;
 459 +       while (*cal_data != 0xffff) {
 460 +               u32 reg;
 461 +               reg = *cal_data++;
 462 +               val = *cal_data++;
 463 +               val |= (*cal_data++) << 16;
 464 +
 465 +               ltq_w32(swab32(val), mem + reg);
 466 +               udelay(100);
 467 +       }
 468 +
 469 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 470 +       dev->vendor = val & 0xffff;
 471 +       dev->device = (val >> 16) & 0xffff;
 472 +
 473 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 474 +       dev->revision = val & 0xff;
 475 +       dev->class = val >> 8; /* upper 3 bytes */
 476 +
 477 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 478 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 479 +
 480 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 481 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 482 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 483 +
 484 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 485 +
 486 +       if (bridge) {
 487 +               pci_disable_device(dev);
 488 +       }
 489 +
 490 +       iounmap(mem);
 491 +}
 492 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 493 +
 494 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 495 +{
 496 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 497 +               return;
 498 +
 499 +       ath_fixups[ath_num_fixups].slot = slot;
 500 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 501 +       ath_num_fixups++;
 502 +}
 503 --- /dev/null
 504 +++ b/arch/mips/lantiq/xway/rt_eep.c
 505 @@ -0,0 +1,60 @@
 506 +/*
 507 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 508 + *
 509 + *  This program is free software; you can redistribute it and/or modify it
 510 + *  under the terms of the GNU General Public License version 2 as published
 511 + *  by the Free Software Foundation.
 512 + */
 513 +
 514 +#include <linux/init.h>
 515 +#include <linux/module.h>
 516 +#include <linux/pci.h>
 517 +#include <linux/platform_device.h>
 518 +#include <linux/rt2x00_platform.h>
 519 +
 520 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 521 +static struct rt2x00_platform_data rt2x00_pdata;
 522 +
 523 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 524 +{
 525 +       dev->dev.platform_data = &rt2x00_pdata;
 526 +       return 0;
 527 +}
 528 +
 529 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 530 +{
 531 +       struct device_node *np = pdev->dev.of_node;
 532 +       const char *eeprom;
 533 +
 534 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 535 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 536 +               return 0;
 537 +       }
 538 +
 539 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 540 +//     rt2x00_pdata.mac_address = mac;
 541 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 542 +
 543 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 544 +
 545 +       return 0;
 546 +}
 547 +
 548 +static struct of_device_id ralink_eeprom_ids[] = {
 549 +       { .compatible = "ralink,eeprom" },
 550 +       { }
 551 +};
 552 +
 553 +static struct platform_driver ralink_eeprom_driver = {
 554 +       .driver         = {
 555 +               .name           = "ralink,eeprom",
 556 +               .owner  = THIS_MODULE,
 557 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 558 +       },
 559 +};
 560 +
 561 +static int __init of_ralink_eeprom_init(void)
 562 +{
 563 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 564 +}
 565 +device_initcall(of_ralink_eeprom_init);
 566 --- a/drivers/net/ethernet/lantiq_etop.c
 567 +++ b/drivers/net/ethernet/lantiq_etop.c
 568 @@ -840,7 +840,11 @@ ltq_etop_init(struct net_device *dev)
 569         if (err)
 570                 goto err_hw;
 571
 572 -       memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
 573 +       memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
 574 +
 575 +       if (priv->mac && !is_valid_ether_addr(mac.sa_data))
 576 +               memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
 577 +
 578         if (!is_valid_ether_addr(mac.sa_data)) {
 579                 pr_warn("etop: invalid MAC, using random\n");
 580                 eth_random_addr(mac.sa_data);