1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 10 Sep 2014 22:42:14 +0200
4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
9 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
10 arch/mips/lantiq/xway/Makefile | 3 +
11 arch/mips/lantiq/xway/ath_eep.c | 282 ++++++++++++++++++++
12 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++
13 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 ++++++++
14 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
15 7 files changed, 539 insertions(+)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
25 +#ifndef _PCI_ATH_FIXUP
26 +#define _PCI_ATH_FIXUP
28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
30 +#endif /* _PCI_ATH_FIXUP */
31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
34 extern void ltq_pmu_enable(unsigned int module);
35 extern void ltq_pmu_disable(unsigned int module);
37 +/* allow the ethernet driver to load a flash mapped mac addr */
38 +const u8* ltq_get_eth_mac(void);
40 #endif /* CONFIG_SOC_TYPE_XWAY */
41 #endif /* _LTQ_XWAY_H__ */
42 --- a/arch/mips/lantiq/xway/Makefile
43 +++ b/arch/mips/lantiq/xway/Makefile
46 obj-y += vmmc.o tffs.o
49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
51 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
53 +++ b/arch/mips/lantiq/xway/ath_eep.c
56 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
57 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
58 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
59 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
60 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
61 + * Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
63 + * This program is free software; you can redistribute it and/or modify it
64 + * under the terms of the GNU General Public License version 2 as published
65 + * by the Free Software Foundation.
68 +#include <linux/init.h>
69 +#include <linux/module.h>
70 +#include <linux/platform_device.h>
71 +#include <linux/etherdevice.h>
72 +#include <linux/ath5k_platform.h>
73 +#include <linux/ath9k_platform.h>
74 +#include <linux/pci.h>
75 +#include <linux/err.h>
76 +#include <linux/mtd/mtd.h>
77 +#include <pci-ath-fixup.h>
78 +#include <lantiq_soc.h>
80 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
81 +struct ath5k_platform_data ath5k_pdata;
82 +struct ath9k_platform_data ath9k_pdata = {
85 +static u8 athxk_eeprom_mac[6];
87 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
89 + dev->dev.platform_data = &ath9k_pdata;
93 +static int ath9k_eep_load;
94 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
96 + struct device_node *np = pdev->dev.of_node, *mtd_np;
97 + struct resource *eep_res, *mac_res = NULL;
98 + void __iomem *eep, *mac;
99 + int mac_offset, led_pin;
100 + u32 mac_inc = 0, pci_slot = 0;
102 + struct mtd_info *the_mtd;
103 + size_t flash_readlen;
104 + const __be32 *list;
107 + u16 dev_ids[2] = { 0 };
109 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
110 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
111 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
112 + of_get_property(mtd_np, "label", NULL)) || (part =
113 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
114 + != ERR_PTR(-ENODEV)) {
115 + i = mtd_read(the_mtd, be32_to_cpup(list),
116 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
117 + (void *) ath9k_pdata.eeprom_data);
118 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
119 + size_t mac_readlen;
120 + mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
121 + (void *) athxk_eeprom_mac);
123 + put_mtd_device(the_mtd);
124 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
125 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
129 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
130 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
133 + dev_err(&pdev->dev, "failed to load eeprom address\n");
136 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
137 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
141 + eep = ioremap(eep_res->start, resource_size(eep_res));
142 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
143 + ATH9K_PLAT_EEP_MAX_WORDS << 1);
146 + if (of_find_property(np, "ath,eep-swap", NULL))
147 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
148 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
150 + if (of_find_property(np, "ath,eep-endian", NULL)) {
151 + ath9k_pdata.endian_check = true;
153 + dev_info(&pdev->dev, "endian check enabled.\n");
156 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
158 + if (resource_size(mac_res) != 6) {
159 + dev_err(&pdev->dev, "mac has an invalid size\n");
162 + mac = ioremap(mac_res->start, resource_size(mac_res));
163 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
164 + } else if (ltq_get_eth_mac()) {
165 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
168 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
169 + dev_warn(&pdev->dev, "using random mac\n");
170 + random_ether_addr(athxk_eeprom_mac);
173 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
174 + athxk_eeprom_mac[5] += mac_inc;
176 + ath9k_pdata.macaddr = athxk_eeprom_mac;
177 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
179 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
180 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
182 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
183 + if (ath9k_eep_load) {
184 + struct pci_dev *d = NULL;
185 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
186 + PCI_ANY_ID, d)) != NULL)
187 + pci_fixup_device(pci_fixup_early, d);
192 + if (!of_property_read_u16_array(np, "ath,device-id", dev_ids, 2)) {
193 + struct pci_dev *d = NULL;
195 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
196 + dev_ids[0], d)) != NULL)
197 + d->device = dev_ids[1];
200 + if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
201 + ath9k_pdata.led_pin = led_pin;
202 + dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
205 + if (of_property_read_bool(np, "ath,led-active-high")) {
206 + ath9k_pdata.led_active_high = true;
207 + dev_info(&pdev->dev, "inverted LED polarity\n");
210 + if (of_property_read_bool(np, "ath,disable-2ghz")) {
211 + ath9k_pdata.disable_2ghz = true;
212 + dev_info(&pdev->dev, "disabled 2.4 GHz band\n");
215 + if (of_property_read_bool(np, "ath,disable-5ghz")) {
216 + ath9k_pdata.disable_5ghz = true;
217 + dev_info(&pdev->dev, "disabled 5 GHz band\n");
220 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
225 +static struct of_device_id ath9k_eeprom_ids[] = {
226 + { .compatible = "ath9k,eeprom" },
230 +static struct platform_driver ath9k_eeprom_driver = {
232 + .name = "ath9k,eeprom",
233 + .owner = THIS_MODULE,
234 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
238 +static int __init of_ath9k_eeprom_init(void)
240 + int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
243 + ath9k_eep_load = 1;
248 +static int __init of_ath9k_eeprom_init_late(void)
250 + if (!ath9k_eep_load)
252 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
254 +late_initcall(of_ath9k_eeprom_init_late);
255 +subsys_initcall(of_ath9k_eeprom_init);
258 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
260 + dev->dev.platform_data = &ath5k_pdata;
264 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
266 + struct device_node *np = pdev->dev.of_node, *mtd_np;
267 + struct resource *eep_res, *mac_res = NULL;
268 + void __iomem *eep, *mac;
272 + struct mtd_info *the_mtd;
273 + size_t flash_readlen;
274 + const __be32 *list;
278 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
279 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
280 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
281 + of_get_property(mtd_np, "label", NULL)) || (part =
282 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
283 + != ERR_PTR(-ENODEV)) {
284 + i = mtd_read(the_mtd, be32_to_cpup(list),
285 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
286 + (void *) ath5k_pdata.eeprom_data);
287 + put_mtd_device(the_mtd);
288 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
290 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
294 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
295 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
298 + dev_err(&pdev->dev, "failed to load eeprom address\n");
301 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
302 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
306 + eep = ioremap(eep_res->start, resource_size(eep_res));
307 + ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
309 + memcpy_fromio(ath5k_pdata.eeprom_data, eep,
310 + ATH5K_PLAT_EEP_MAX_WORDS << 1);
313 + if (of_find_property(np, "ath,eep-swap", NULL))
314 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
315 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
317 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
318 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
319 + } else if (mac_res) {
320 + if (resource_size(mac_res) != 6) {
321 + dev_err(&pdev->dev, "mac has an invalid size\n");
324 + mac = ioremap(mac_res->start, resource_size(mac_res));
325 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
326 + } else if (ltq_get_eth_mac())
327 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
329 + dev_warn(&pdev->dev, "using random mac\n");
330 + random_ether_addr(athxk_eeprom_mac);
333 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
334 + athxk_eeprom_mac[5] += mac_inc;
336 + ath5k_pdata.macaddr = athxk_eeprom_mac;
337 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
339 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
344 +static struct of_device_id ath5k_eeprom_ids[] = {
345 + { .compatible = "ath5k,eeprom" },
349 +static struct platform_driver ath5k_eeprom_driver = {
351 + .name = "ath5k,eeprom",
352 + .owner = THIS_MODULE,
353 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
357 +static int __init of_ath5k_eeprom_init(void)
359 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
361 +device_initcall(of_ath5k_eeprom_init);
363 +++ b/arch/mips/lantiq/xway/eth_mac.c
366 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
368 + * This program is free software; you can redistribute it and/or modify it
369 + * under the terms of the GNU General Public License version 2 as published
370 + * by the Free Software Foundation.
373 +#include <linux/init.h>
374 +#include <linux/module.h>
375 +#include <linux/of_platform.h>
376 +#include <linux/if_ether.h>
378 +static u8 eth_mac[6];
379 +static int eth_mac_set;
381 +const u8* ltq_get_eth_mac(void)
386 +static int __init setup_ethaddr(char *str)
388 + eth_mac_set = mac_pton(str, eth_mac);
389 + return !eth_mac_set;
391 +early_param("ethaddr", setup_ethaddr);
393 +int __init of_eth_mac_probe(struct platform_device *pdev)
395 + struct device_node *np = pdev->dev.of_node;
396 + struct resource *mac_res;
401 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
404 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
407 + dev_err(&pdev->dev, "failed to load mac\n");
410 + if (resource_size(mac_res) != 6) {
411 + dev_err(&pdev->dev, "mac has an invalid size\n");
414 + mac = ioremap(mac_res->start, resource_size(mac_res));
415 + memcpy_fromio(eth_mac, mac, 6);
417 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
418 + eth_mac[5] += mac_inc;
423 +static struct of_device_id eth_mac_ids[] = {
424 + { .compatible = "lantiq,eth-mac" },
428 +static struct platform_driver eth_mac_driver = {
430 + .name = "lantiq,eth-mac",
431 + .owner = THIS_MODULE,
432 + .of_match_table = of_match_ptr(eth_mac_ids),
436 +static int __init of_eth_mac_init(void)
438 + return platform_driver_probe(ð_mac_driver, of_eth_mac_probe);
440 +device_initcall(of_eth_mac_init);
442 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
445 + * Atheros AP94 reference board PCI initialization
447 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
449 + * This program is free software; you can redistribute it and/or modify it
450 + * under the terms of the GNU General Public License version 2 as published
451 + * by the Free Software Foundation.
454 +#include <linux/pci.h>
455 +#include <linux/init.h>
456 +#include <linux/delay.h>
457 +#include <lantiq_soc.h>
464 +static int ath_num_fixups;
465 +static struct ath_fixup ath_fixups[2];
467 +static void ath_pci_fixup(struct pci_dev *dev)
470 + struct pci_dev *bridge = pci_upstream_bridge(dev);
471 + u16 *cal_data = NULL;
478 + for (i = 0; i < ath_num_fixups; i++) {
479 + if (ath_fixups[i].cal_data == NULL)
482 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
485 + cal_data = ath_fixups[i].cal_data;
489 + if (cal_data == NULL)
492 + if (*cal_data != 0xa55a) {
493 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
497 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
499 + base = dev->resource[0].start;
500 + mem = ioremap(base, 0x10000);
502 + pr_err("pci %s: ioremap error\n", pci_name(dev));
507 + pci_enable_device(dev);
510 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
511 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base);
512 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
513 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
514 + pci_write_config_word(dev, PCI_COMMAND, cmd);
516 + /* set pointer to first reg address */
518 + while (*cal_data != 0xffff) {
522 + val |= (*cal_data++) << 16;
524 + ltq_w32(swab32(val), mem + reg);
528 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
529 + dev->vendor = val & 0xffff;
530 + dev->device = (val >> 16) & 0xffff;
532 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
533 + dev->revision = val & 0xff;
534 + dev->class = val >> 8; /* upper 3 bytes */
536 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
537 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
539 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
540 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
541 + pci_write_config_word(dev, PCI_COMMAND, cmd);
543 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
546 + pci_disable_device(dev);
551 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
553 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
555 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
558 + ath_fixups[ath_num_fixups].slot = slot;
559 + ath_fixups[ath_num_fixups].cal_data = cal_data;
563 +++ b/arch/mips/lantiq/xway/rt_eep.c
566 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
568 + * This program is free software; you can redistribute it and/or modify it
569 + * under the terms of the GNU General Public License version 2 as published
570 + * by the Free Software Foundation.
573 +#include <linux/init.h>
574 +#include <linux/module.h>
575 +#include <linux/pci.h>
576 +#include <linux/platform_device.h>
577 +#include <linux/rt2x00_platform.h>
579 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
580 +static struct rt2x00_platform_data rt2x00_pdata;
582 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
584 + dev->dev.platform_data = &rt2x00_pdata;
588 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
590 + struct device_node *np = pdev->dev.of_node;
591 + const char *eeprom;
593 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
594 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
598 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
599 +// rt2x00_pdata.mac_address = mac;
600 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
602 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
607 +static struct of_device_id ralink_eeprom_ids[] = {
608 + { .compatible = "ralink,eeprom" },
612 +static struct platform_driver ralink_eeprom_driver = {
614 + .name = "ralink,eeprom",
615 + .owner = THIS_MODULE,
616 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
620 +static int __init of_ralink_eeprom_init(void)
622 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
624 +device_initcall(of_ralink_eeprom_init);
625 --- a/drivers/net/ethernet/lantiq_etop.c
626 +++ b/drivers/net/ethernet/lantiq_etop.c
631 - memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
632 + memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
634 + if (priv->mac && !is_valid_ether_addr(mac.sa_data))
635 + memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
637 if (!is_valid_ether_addr(mac.sa_data)) {
638 pr_warn("etop: invalid MAC, using random\n");
639 eth_random_addr(mac.sa_data);