target/linux/lantiq/patches-4.19/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch

   1 From f452518c982e57538e6d49da0a2c80eef22087ab Mon Sep 17 00:00:00 2001
   2 From: Mathias Kresin <dev@kresin.me>
   3 Date: Thu, 22 Mar 2018 23:31:39 +0100
   4 Subject: [PATCH 2/2] net: phy: intel-xway: add VR9 v1.1 phy ids
   5
   6 The phys embedded into the v1.1 of the VR9 SoC are using different phy
   7 ids. Add the phy ids to use the driver for this VR9 version as well.
   8
   9 Signed-off-by: Mathias Kresin <dev@kresin.me>
  10 Signed-off-by: David S. Miller <davem@davemloft.net>
  11 ---
  12  drivers/net/phy/intel-xway.c | 28 ++++++++++++++++++++++++++++
  13  1 file changed, 28 insertions(+)
  14
  15 --- a/drivers/net/phy/intel-xway.c
  16 +++ b/drivers/net/phy/intel-xway.c
  17 @@ -149,6 +149,8 @@
  18  #define PHY_ID_PHY22F_1_4              0xD565A410
  19  #define PHY_ID_PHY11G_1_5              0xD565A401
  20  #define PHY_ID_PHY22F_1_5              0xD565A411
  21 +#define PHY_ID_PHY11G_VR9_1_1          0xD565A408
  22 +#define PHY_ID_PHY22F_VR9_1_1          0xD565A418
  23  #define PHY_ID_PHY11G_VR9_1_2          0xD565A409
  24  #define PHY_ID_PHY22F_VR9_1_2          0xD565A419
  25
  26 @@ -366,6 +368,34 @@ static struct phy_driver xway_gphy[] = {
  27                 .suspend        = genphy_suspend,
  28                 .resume         = genphy_resume,
  29         }, {
  30 +               .phy_id         = PHY_ID_PHY11G_VR9_1_1,
  31 +               .phy_id_mask    = 0xffffffff,
  32 +               .name           = "Intel XWAY PHY11G (xRX v1.1 integrated)",
  33 +               .features       = PHY_GBIT_FEATURES,
  34 +               .flags          = PHY_HAS_INTERRUPT,
  35 +               .config_init    = xway_gphy_config_init,
  36 +               .config_aneg    = genphy_config_aneg,
  37 +               .read_status    = genphy_read_status,
  38 +               .ack_interrupt  = xway_gphy_ack_interrupt,
  39 +               .did_interrupt  = xway_gphy_did_interrupt,
  40 +               .config_intr    = xway_gphy_config_intr,
  41 +               .suspend        = genphy_suspend,
  42 +               .resume         = genphy_resume,
  43 +       }, {
  44 +               .phy_id         = PHY_ID_PHY22F_VR9_1_1,
  45 +               .phy_id_mask    = 0xffffffff,
  46 +               .name           = "Intel XWAY PHY22F (xRX v1.1 integrated)",
  47 +               .features       = PHY_BASIC_FEATURES,
  48 +               .flags          = PHY_HAS_INTERRUPT,
  49 +               .config_init    = xway_gphy_config_init,
  50 +               .config_aneg    = genphy_config_aneg,
  51 +               .read_status    = genphy_read_status,
  52 +               .ack_interrupt  = xway_gphy_ack_interrupt,
  53 +               .did_interrupt  = xway_gphy_did_interrupt,
  54 +               .config_intr    = xway_gphy_config_intr,
  55 +               .suspend        = genphy_suspend,
  56 +               .resume         = genphy_resume,
  57 +       }, {
  58                 .phy_id         = PHY_ID_PHY11G_VR9_1_2,
  59                 .phy_id_mask    = 0xffffffff,
  60                 .name           = "Intel XWAY PHY11G (xRX v1.2 integrated)",
  61 @@ -404,6 +434,8 @@ static struct mdio_device_id __maybe_unu
  62         { PHY_ID_PHY22F_1_4, 0xffffffff },
  63         { PHY_ID_PHY11G_1_5, 0xffffffff },
  64         { PHY_ID_PHY22F_1_5, 0xffffffff },
  65 +       { PHY_ID_PHY11G_VR9_1_1, 0xffffffff },
  66 +       { PHY_ID_PHY22F_VR9_1_1, 0xffffffff },
  67         { PHY_ID_PHY11G_VR9_1_2, 0xffffffff },
  68         { PHY_ID_PHY22F_VR9_1_2, 0xffffffff },
  69         { }