target/linux/lantiq/files/arch/mips/boot/dts/TDW89X0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 /* the power led can't be controlled, use the wps led instead */
  15                 led-boot = &wps;
  16                 led-failsafe = &wps;
  17
  18                 led-dsl = &dsl;
  19                 led-internet = &internet;
  20                 led-wifi = &wifi;
  21                 led-usb = &led_usb0;
  22                 led-usb2 = &led_usb2;
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x0 0x4000000>;
  28         };
  29
  30         keys {
  31                 compatible = "gpio-keys-polled";
  32                 poll-interval = <100>;
  33                 reset {
  34                         label = "reset";
  35                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_RESTART>;
  37                 };
  38
  39                 wifi {
  40                         label = "wifi";
  41                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  42                         linux,code = <KEY_RFKILL>;
  43                         linux,input-type = <EV_SW>;
  44                 };
  45
  46                 wps {
  47                         label = "wps";
  48                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                 };
  51         };
  52
  53         gpio-leds {
  54                 compatible = "gpio-leds";
  55                 /*
  56                         power is not controllable via gpio
  57                 */
  58                 dsl: dsl {
  59                         label = "tdw89x0:green:dsl";
  60                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  61                 };
  62                 internet: internet {
  63                         label = "tdw89x0:green:internet";
  64                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  65                 };
  66
  67                 led_usb0: usb0 {
  68                         label = "tdw89x0:green:usb";
  69                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  70                 };
  71                 led_usb2: usb2 {
  72                         label = "tdw89x0:green:usb2";
  73                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  74                 };
  75                 wps: wps {
  76                         label = "tdw89x0:green:wps";
  77                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  78                 };
  79         };
  80
  81         wifi-leds {
  82                 compatible = "gpio-leds";
  83
  84                 wifi: wifi {
  85                         label = "tdw89x0:green:wifi";
  86                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  87                         linux,default-trigger = "phy0tpt";
  88                 };
  89         };
  90
  91
  92         usb_vbus: regulator-usb-vbus {
  93                 compatible = "regulator-fixed";
  94
  95                 regulator-name = "USB_VBUS";
  96
  97                 regulator-min-microvolt = <5000000>;
  98                 regulator-max-microvolt = <5000000>;
  99
 100                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
 101                 enable-active-high;
 102         };
 103 };
 104
 105 &eth0 {
 106         pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
 107         pinctrl-names = "default";
 108
 109         lan: interface@0 {
 110                 compatible = "lantiq,xrx200-pdi";
 111                 #address-cells = <1>;
 112                 #size-cells = <0>;
 113                 reg = <0>;
 114                 mtd-mac-address = <&ath9k_cal 0xf100>;
 115                 lantiq,switch;
 116
 117                 ethernet@0 {
 118                         compatible = "lantiq,xrx200-pdi-port";
 119                         reg = <0>;
 120                         phy-mode = "rgmii";
 121                         phy-handle = <&phy0>;
 122                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 123                 };
 124                 ethernet@5 {
 125                         compatible = "lantiq,xrx200-pdi-port";
 126                         reg = <5>;
 127                         phy-mode = "rgmii";
 128                         phy-handle = <&phy5>;
 129                 };
 130                 ethernet@2 {
 131                         compatible = "lantiq,xrx200-pdi-port";
 132                         reg = <2>;
 133                         phy-mode = "gmii";
 134                         phy-handle = <&phy11>;
 135                 };
 136                 ethernet@3 {
 137                         compatible = "lantiq,xrx200-pdi-port";
 138                         reg = <4>;
 139                         phy-mode = "gmii";
 140                         phy-handle = <&phy13>;
 141                 };
 142         };
 143
 144         mdio {
 145                 #address-cells = <1>;
 146                 #size-cells = <0>;
 147                 compatible = "lantiq,xrx200-mdio";
 148
 149                 phy0: ethernet-phy@0 {
 150                         reg = <0x0>;
 151                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 152                 };
 153                 phy5: ethernet-phy@5 {
 154                         reg = <0x5>;
 155                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 156                 };
 157                 phy11: ethernet-phy@11 {
 158                         reg = <0x11>;
 159                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 160                 };
 161                 phy13: ethernet-phy@13 {
 162                         reg = <0x13>;
 163                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 164                 };
 165         };
 166 };
 167
 168 &gphy0 {
 169         lantiq,gphy-mode = <GPHY_MODE_GE>;
 170 };
 171
 172 &gphy1 {
 173         lantiq,gphy-mode = <GPHY_MODE_GE>;
 174 };
 175
 176 &gpio {
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&state_default>;
 179
 180         state_default: pinmux {
 181                 phy-rst {
 182                         lantiq,pins = "io42";
 183                         lantiq,pull = <0>;
 184                         lantiq,open-drain = <0>;
 185                         lantiq,output = <1>;
 186                 };
 187                 pcie-rst {
 188                         lantiq,pins = "io38";
 189                         lantiq,pull = <0>;
 190                         lantiq,output = <1>;
 191                 };
 192         };
 193 };
 194
 195 &pcie0 {
 196         pcie@0 {
 197                 reg = <0 0 0 0 0>;
 198                 #interrupt-cells = <1>;
 199                 #size-cells = <2>;
 200                 #address-cells = <3>;
 201                 device_type = "pci";
 202
 203                 ath9k: wifi@168c,002e {
 204                         compatible = "pci168c,002e";
 205                         reg = <0 0 0 0 0>;
 206                         #gpio-cells = <2>;
 207                         gpio-controller;
 208                         qca,no-eeprom;
 209                         qca,disable-5ghz;
 210                         mtd-mac-address = <&ath9k_cal 0xf100>;
 211                         mtd-mac-address-increment = <2>;
 212                 };
 213         };
 214 };
 215
 216 &spi {
 217         status = "okay";
 218
 219         flash@4 {
 220                 compatible = "jedec,spi-nor";
 221                 reg = <4>;
 222                 spi-max-frequency = <33250000>;
 223                 m25p,fast-read;
 224
 225                 partitions {
 226                         compatible = "fixed-partitions";
 227                         #address-cells = <1>;
 228                         #size-cells = <1>;
 229
 230                         partition@0 {
 231                                 reg = <0x0 0x20000>;
 232                                 label = "u-boot";
 233                                 read-only;
 234                         };
 235
 236                         partition@20000 {
 237                                 reg = <0x20000 0x7a0000>;
 238                                 label = "firmware";
 239                         };
 240
 241                         partition@7c0000 {
 242                                 reg = <0x7c0000 0x10000>;
 243                                 label = "config";
 244                                 read-only;
 245                         };
 246
 247                         ath9k_cal: partition@7d0000 {
 248                                 reg = <0x7d0000 0x30000>;
 249                                 label = "boardconfig";
 250                                 read-only;
 251                         };
 252                 };
 253         };
 254 };
 255
 256 &usb_phy0 {
 257         status = "okay";
 258 };
 259
 260 &usb_phy1 {
 261         status = "okay";
 262 };
 263
 264 &usb0 {
 265         status = "okay";
 266         vbus-supply = <&usb_vbus>;
 267 };
 268
 269 &usb1 {
 270         status = "okay";
 271         vbus-supply = <&usb_vbus>;
 272 };