target/linux/lantiq/files/arch/mips/boot/dts/TDW89X0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 /* the power led can't be controlled, use the wps led instead */
  15                 led-boot = &wps;
  16                 led-failsafe = &wps;
  17
  18                 led-dsl = &dsl;
  19                 led-internet = &internet;
  20                 led-wifi = &wifi;
  21                 led-usb = &led_usb0;
  22                 led-usb2 = &led_usb2;
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x0 0x4000000>;
  28         };
  29
  30         gpio-keys-polled {
  31                 compatible = "gpio-keys-polled";
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34                 poll-interval = <100>;
  35                 reset {
  36                         label = "reset";
  37                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  38                         linux,code = <KEY_RESTART>;
  39                 };
  40
  41                 wifi {
  42                         label = "wifi";
  43                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  44                         linux,code = <KEY_RFKILL>;
  45                         linux,input-type = <EV_SW>;
  46                 };
  47
  48                 wps {
  49                         label = "wps";
  50                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  51                         linux,code = <KEY_WPS_BUTTON>;
  52                 };
  53         };
  54
  55         gpio-leds {
  56                 compatible = "gpio-leds";
  57                 /*
  58                         power is not controllable via gpio
  59                 */
  60                 dsl: dsl {
  61                         label = "tdw89x0:green:dsl";
  62                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  63                 };
  64                 internet: internet {
  65                         label = "tdw89x0:green:internet";
  66                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  67                 };
  68
  69                 led_usb0: usb0 {
  70                         label = "tdw89x0:green:usb";
  71                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  72                 };
  73                 led_usb2: usb2 {
  74                         label = "tdw89x0:green:usb2";
  75                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  76                 };
  77                 wps: wps {
  78                         label = "tdw89x0:green:wps";
  79                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  80                 };
  81         };
  82
  83         wifi-leds {
  84                 compatible = "gpio-leds";
  85
  86                 wifi: wifi {
  87                         label = "tdw89x0:green:wifi";
  88                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  89                         linux,default-trigger = "phy0tpt";
  90                 };
  91         };
  92
  93
  94         usb_vbus: regulator-usb-vbus {
  95                 compatible = "regulator-fixed";
  96
  97                 regulator-name = "USB_VBUS";
  98
  99                 regulator-min-microvolt = <5000000>;
 100                 regulator-max-microvolt = <5000000>;
 101
 102                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
 103                 enable-active-high;
 104         };
 105 };
 106
 107 &eth0 {
 108         lan: interface@0 {
 109                 compatible = "lantiq,xrx200-pdi";
 110                 #address-cells = <1>;
 111                 #size-cells = <0>;
 112                 reg = <0>;
 113                 mtd-mac-address = <&ath9k_cal 0xf100>;
 114                 lantiq,switch;
 115
 116                 ethernet@0 {
 117                         compatible = "lantiq,xrx200-pdi-port";
 118                         reg = <0>;
 119                         phy-mode = "rgmii";
 120                         phy-handle = <&phy0>;
 121                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 122                 };
 123                 ethernet@5 {
 124                         compatible = "lantiq,xrx200-pdi-port";
 125                         reg = <5>;
 126                         phy-mode = "rgmii";
 127                         phy-handle = <&phy5>;
 128                 };
 129                 ethernet@2 {
 130                         compatible = "lantiq,xrx200-pdi-port";
 131                         reg = <2>;
 132                         phy-mode = "gmii";
 133                         phy-handle = <&phy11>;
 134                 };
 135                 ethernet@3 {
 136                         compatible = "lantiq,xrx200-pdi-port";
 137                         reg = <4>;
 138                         phy-mode = "gmii";
 139                         phy-handle = <&phy13>;
 140                 };
 141         };
 142
 143         mdio {
 144                 #address-cells = <1>;
 145                 #size-cells = <0>;
 146                 compatible = "lantiq,xrx200-mdio";
 147
 148                 phy0: ethernet-phy@0 {
 149                         reg = <0x0>;
 150                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 151                 };
 152                 phy5: ethernet-phy@5 {
 153                         reg = <0x5>;
 154                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 155                 };
 156                 phy11: ethernet-phy@11 {
 157                         reg = <0x11>;
 158                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 159                 };
 160                 phy13: ethernet-phy@13 {
 161                         reg = <0x13>;
 162                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 163                 };
 164         };
 165 };
 166
 167 &gphy0 {
 168         lantiq,gphy-mode = <GPHY_MODE_GE>;
 169 };
 170
 171 &gphy1 {
 172         lantiq,gphy-mode = <GPHY_MODE_GE>;
 173 };
 174
 175 &gpio {
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&state_default>;
 178
 179         state_default: pinmux {
 180                 mdio {
 181                         lantiq,groups = "mdio";
 182                         lantiq,function = "mdio";
 183                 };
 184                 gphy-leds {
 185                         lantiq,groups = "gphy0 led1", "gphy1 led1";
 186                         lantiq,function = "gphy";
 187                         lantiq,pull = <2>;
 188                         lantiq,open-drain = <0>;
 189                         lantiq,output = <1>;
 190                 };
 191                 phy-rst {
 192                         lantiq,pins = "io42";
 193                         lantiq,pull = <0>;
 194                         lantiq,open-drain = <0>;
 195                         lantiq,output = <1>;
 196                 };
 197                 pcie-rst {
 198                         lantiq,pins = "io38";
 199                         lantiq,pull = <0>;
 200                         lantiq,output = <1>;
 201                 };
 202         };
 203         pins_spi_default: pins_spi_default {
 204                 spi_in {
 205                         lantiq,groups = "spi_di";
 206                         lantiq,function = "spi";
 207                 };
 208                 spi_out {
 209                         lantiq,groups = "spi_do", "spi_clk",
 210                                 "spi_cs4";
 211                         lantiq,function = "spi";
 212                         lantiq,output = <1>;
 213                 };
 214         };
 215 };
 216
 217 &pcie0 {
 218         pcie@0 {
 219                 reg = <0 0 0 0 0>;
 220                 #interrupt-cells = <1>;
 221                 #size-cells = <2>;
 222                 #address-cells = <3>;
 223                 device_type = "pci";
 224
 225                 ath9k: wifi@168c,002e {
 226                         compatible = "pci168c,002e";
 227                         reg = <0 0 0 0 0>;
 228                         #gpio-cells = <2>;
 229                         gpio-controller;
 230                         qca,no-eeprom;
 231                         qca,disable-5ghz;
 232                         mtd-mac-address = <&ath9k_cal 0xf100>;
 233                         mtd-mac-address-increment = <2>;
 234                 };
 235         };
 236 };
 237
 238 &spi {
 239         status = "okay";
 240
 241         pinctrl-names = "default";
 242         pinctrl-0 = <&pins_spi_default>;
 243
 244         m25p80@4 {
 245                 #address-cells = <1>;
 246                 #size-cells = <1>;
 247                 compatible = "jedec,spi-nor";
 248                 reg = <4 0>;
 249                 spi-max-frequency = <33250000>;
 250                 m25p,fast-read;
 251
 252                 partitions {
 253                         compatible = "fixed-partitions";
 254                         #address-cells = <1>;
 255                         #size-cells = <1>;
 256
 257                         partition@0 {
 258                                 reg = <0x0 0x20000>;
 259                                 label = "u-boot";
 260                                 read-only;
 261                         };
 262
 263                         partition@20000 {
 264                                 reg = <0x20000 0x7a0000>;
 265                                 label = "firmware";
 266                         };
 267
 268                         partition@7c0000 {
 269                                 reg = <0x7c0000 0x10000>;
 270                                 label = "config";
 271                                 read-only;
 272                         };
 273
 274                         ath9k_cal: partition@7d0000 {
 275                                 reg = <0x7d0000 0x30000>;
 276                                 label = "boardconfig";
 277                                 read-only;
 278                         };
 279                 };
 280         };
 281 };
 282
 283 &usb_phy0 {
 284         status = "okay";
 285 };
 286
 287 &usb_phy1 {
 288         status = "okay";
 289 };
 290
 291 &usb0 {
 292         status = "okay";
 293         vbus-supply = <&usb_vbus>;
 294 };
 295
 296 &usb1 {
 297         status = "okay";
 298         vbus-supply = <&usb_vbus>;
 299 };