target/linux/lantiq/files/arch/mips/boot/dts/FRITZ736X.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "vr9.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   7
   8 / {
   9         compatible = "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
  10
  11         chosen {
  12                 bootargs = "console=ttyLTQ0,115200";
  13         };
  14
  15         aliases {
  16                 led-boot = &power_green;
  17                 led-failsafe = &power_red;
  18                 led-running = &power_green;
  19                 led-upgrade = &power_red;
  20
  21                 led-dsl = &info_green;
  22                 led-wifi = &wifi;
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x0 0x8000000>;
  28         };
  29
  30         keys {
  31                 compatible = "gpio-keys-polled";
  32                 poll-interval = <100>;
  33
  34                 dect {
  35                         label = "dect";
  36                         gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
  37                         linux,code = <KEY_PHONE>;
  38                 };
  39
  40                 wifi {
  41                         label = "wifi";
  42                         gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
  43                         linux,code = <KEY_WLAN>;
  44                 };
  45         };
  46
  47         leds: leds {
  48                 compatible = "gpio-leds";
  49
  50                 power_green: power {
  51                         gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
  52                         default-state = "keep";
  53                 };
  54
  55                 power_red: power2 {
  56                         gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 info_green: info_green {
  60                         gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
  61                 };
  62
  63                 wifi: wifi {
  64                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  65                 };
  66
  67                 info_red: info_red {
  68                         gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
  69                 };
  70
  71                 dect: dect {
  72                         gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
  73                 };
  74         };
  75 };
  76
  77 &eth0 {
  78         lan: interface@0 {
  79                 compatible = "lantiq,xrx200-pdi";
  80                 #address-cells = <1>;
  81                 #size-cells = <0>;
  82                 reg = <0>;
  83                 mtd-mac-address = <&urlader 0xa91>;
  84                 mtd-mac-address-increment = <(-2)>;
  85                 lantiq,switch;
  86
  87                 ethernet@0 {
  88                         compatible = "lantiq,xrx200-pdi-port";
  89                         reg = <0>;
  90                         phy-mode = "rmii";
  91                         phy-handle = <&phy0>;
  92                 };
  93
  94                 ethernet@1 {
  95                         compatible = "lantiq,xrx200-pdi-port";
  96                         reg = <1>;
  97                         phy-mode = "rmii";
  98                         phy-handle = <&phy1>;
  99                 };
 100
 101                 ethernet@2 {
 102                         compatible = "lantiq,xrx200-pdi-port";
 103                         reg = <2>;
 104                         phy-mode = "gmii";
 105                         phy-handle = <&phy11>;
 106                 };
 107
 108                 ethernet@3 {
 109                         compatible = "lantiq,xrx200-pdi-port";
 110                         reg = <4>;
 111                         phy-mode = "gmii";
 112                         phy-handle = <&phy13>;
 113                 };
 114         };
 115
 116         mdio {
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119                 compatible = "lantiq,xrx200-mdio";
 120
 121                 phy0: ethernet-phy@0 {
 122                         reg = <0x00>;
 123                         compatible = "ethernet-phy-ieee802.3-c22";
 124                         reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 125                 };
 126
 127                 phy1: ethernet-phy@1 {
 128                         reg = <0x01>;
 129                         compatible = "ethernet-phy-ieee802.3-c22";
 130                         reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 131                 };
 132
 133                 phy11: ethernet-phy@11 {
 134                         reg = <0x11>;
 135                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 136                 };
 137
 138                 phy13: ethernet-phy@13 {
 139                         reg = <0x13>;
 140                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 141                 };
 142         };
 143 };
 144
 145 &gphy0 {
 146         lantiq,gphy-mode = <GPHY_MODE_GE>;
 147 };
 148
 149 &gphy1 {
 150         lantiq,gphy-mode = <GPHY_MODE_GE>;
 151 };
 152
 153 &gpio {
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&state_default>;
 156
 157         state_default: pinmux {
 158                 phy-rst {
 159                         lantiq,pins = "io37", "io44";
 160                         lantiq,pull = <0>;
 161                         lantiq,open-drain;
 162                         lantiq,output = <1>;
 163                 };
 164         };
 165
 166 };
 167
 168 &pcie0 {
 169         status = "okay";
 170
 171         pcie@0 {
 172                 reg = <0 0 0 0 0>;
 173                 #interrupt-cells = <1>;
 174                 #size-cells = <1>;
 175                 #address-cells = <2>;
 176                 device_type = "pci";
 177
 178                 wifi@168c,002e {
 179                         compatible = "pci168c,002e";
 180                         reg = <0 0 0 0 0>;
 181                         qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
 182                 };
 183         };
 184 };
 185
 186 &usb_phy0 {
 187         status = "okay";
 188 };
 189
 190 &usb_phy1 {
 191         status = "okay";
 192 };
 193
 194 &usb0 {
 195         status = "okay";
 196 };
 197
 198 &usb1 {
 199         status = "okay";
 200 };