target/linux/lantiq/files/arch/mips/boot/dts/FRITZ7362SL.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include "FRITZ736X.dtsi"
   5
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   8
   9 / {
  10         compatible = "avm,fritz7362sl", "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
  11         model = "AVM FRITZ!Box 7362 SL";
  12 };
  13
  14 &power_green {
  15         label = "fritz7362sl:green:power";
  16 };
  17
  18 &power_red {
  19         label = "fritz7362sl:red:power";
  20 };
  21
  22 &info_green {
  23         label = "fritz7362sl:green:info";
  24 };
  25
  26 &wifi {
  27         label = "fritz7362sl:green:wlan";
  28 };
  29
  30 &info_red {
  31         label = "fritz7362sl:red:info";
  32 };
  33
  34 &dect {
  35         label = "fritz7362sl:green:dect";
  36 };
  37
  38 &gpio {
  39         pins_spi_default: pins_spi_default {
  40                 spi_in {
  41                         lantiq,groups = "spi_di";
  42                         lantiq,function = "spi";
  43                 };
  44
  45                 spi_out {
  46                         lantiq,groups = "spi_do", "spi_clk",
  47                                 "spi_cs4";
  48                         lantiq,function = "spi";
  49                         lantiq,output = <1>;
  50                 };
  51         };
  52 };
  53
  54 &state_default {
  55         nand {
  56                 lantiq,groups = "nand ale", "nand cle",
  57                                 "nand cs1", "nand rd", "nand rdy";
  58                 lantiq,function = "ebu";
  59         };
  60
  61         pcie-rst {
  62                 lantiq,pins = "io21";
  63                 lantiq,open-drain = <1>;
  64                 lantiq,output = <1>;
  65         };
  66 };
  67
  68 &spi {
  69         status = "okay";
  70         pinctrl-names = "default";
  71         pinctrl-0 = <&pins_spi_default>;
  72
  73         flash@4 {
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76                 compatible = "jedec,spi-nor";
  77                 reg = <4 0>;
  78                 spi-max-frequency = <1000000>;
  79
  80                 urlader: partition@0 {
  81                         reg = <0x0 0x40000>;
  82                         label = "urlader";
  83                         read-only;
  84                 };
  85
  86                 partition@40000 {
  87                         reg = <0x40000 0x60000>;
  88                         label = "tffs (1)";
  89                         read-only;
  90                 };
  91
  92                 partition@A0000 {
  93                         reg = <0xA0000 0x60000>;
  94                         label = "tffs (2)";
  95                         read-only;
  96                 };
  97         };
  98 };
  99
 100 &localbus {
 101         flash@1 {
 102                 compatible = "lantiq,nand-xway";
 103                 lantiq,cs1 = <1>;
 104                 bank-width = <1>;
 105                 reg = <1 0x0 0x2000000>;
 106                 nand-ecc-mode = "on-die";
 107
 108                 partitions {
 109                         compatible = "fixed-partitions";
 110                         #address-cells = <1>;
 111                         #size-cells = <1>;
 112
 113                         partition@0 {
 114                                 label = "kernel";
 115                                 reg = <0x0 0x400000>;
 116                         };
 117
 118                         partition@400000 {
 119                                 label = "ubi";
 120                                 reg = <0x400000 0x7c00000>;
 121                         };
 122                 };
 123         };
 124 };
 125
 126 &pcie0 {
 127         gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
 128
 129         pcie@0 {
 130                 #size-cells = <1>;
 131                 #address-cells = <2>;
 132         };
 133 };