lantiq: dts: fix size cells
[oweals/openwrt.git] / target / linux / lantiq / files / arch / mips / boot / dts / FRITZ3370-REV2.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7         compatible = "avm,fritz3370-rev2", "lantiq,xway", "lantiq,vr9";
8         model = "AVM FRITZ!Box 3370 Rev. 2";
9
10         chosen {
11                 bootargs = "console=ttyLTQ0,115200";
12         };
13
14         aliases {
15                 led-boot = &power_green;
16                 led-failsafe = &power_red;
17                 led-running = &power_green;
18                 led-upgrade = &power_green;
19
20                 led-dsl = &dsl;
21                 led-internet = &info_green;
22                 led-wifi = &wifi;
23         };
24
25         memory@0 {
26                 device_type = "memory";
27                 reg = <0x0 0x8000000>;
28         };
29
30         gpio-poweroff {
31                 compatible = "gpio-poweroff";
32                 gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
33         };
34
35         gpio-keys-polled {
36                 compatible = "gpio-keys-polled";
37                 #address-cells = <1>;
38                 #size-cells = <0>;
39                 poll-interval = <100>;
40
41                 power {
42                         label = "power";
43                         gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
44                         linux,code = <KEY_POWER>;
45                 };
46
47                 wifi {
48                         label = "wlan";
49                         gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
50                         linux,code = <KEY_WLAN>;
51                 };
52         };
53
54         gpio-leds {
55                 compatible = "gpio-leds";
56
57                 power_green: power {
58                         label = "fritz3370:green:power";
59                         gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
60                         default-state = "keep";
61                 };
62
63                 power_red: power2 {
64                         label = "fritz3370:red:power";
65                         gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
66                 };
67
68                 info_red {
69                         label = "fritz3370:red:info";
70                         gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
71                 };
72
73                 wifi: wifi {
74                         label = "fritz3370:green:wlan";
75                         gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
76                 };
77
78                 dsl: dsl {
79                         label = "fritz3370:green:dsl";
80                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
81                 };
82
83                 lan {
84                         label = "fritz3370:green:lan";
85                         gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
86                 };
87
88                 info_green: info_green {
89                         label = "fritz3370:green:info";
90                         gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
91                 };
92         };
93
94         usb0_vbus: regulator-usb0-vbus {
95                 compatible = "regulator-fixed";
96
97                 regulator-name = "USB0_VBUS";
98
99                 regulator-min-microvolt = <5000000>;
100                 regulator-max-microvolt = <5000000>;
101
102                 gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
103                 enable-active-high;
104         };
105
106         usb1_vbus: regulator-usb1-vbus {
107                 compatible = "regulator-fixed";
108
109                 regulator-name = "USB1_VBUS";
110
111                 regulator-min-microvolt = <5000000>;
112                 regulator-max-microvolt = <5000000>;
113
114                 gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
115                 enable-active-high;
116         };
117 };
118
119 &eth0 {
120         lan: interface@0 {
121                 compatible = "lantiq,xrx200-pdi";
122                 #address-cells = <1>;
123                 #size-cells = <0>;
124                 reg = <0>;
125                 lantiq,switch;
126
127                 ethernet@0 {
128                         compatible = "lantiq,xrx200-pdi-port";
129                         reg = <0>;
130                         phy-mode = "rgmii";
131                         phy-handle = <&phy0>;
132                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
133                 };
134
135                 ethernet@1 {
136                         compatible = "lantiq,xrx200-pdi-port";
137                         reg = <1>;
138                         phy-mode = "rgmii";
139                         phy-handle = <&phy1>;
140                         gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
141                 };
142
143                 ethernet@2 {
144                         compatible = "lantiq,xrx200-pdi-port";
145                         reg = <2>;
146                         phy-mode = "gmii";
147                         phy-handle = <&phy11>;
148                 };
149
150                 ethernet@4 {
151                         compatible = "lantiq,xrx200-pdi-port";
152                         reg = <4>;
153                         phy-mode = "gmii";
154                         phy-handle = <&phy13>;
155                 };
156         };
157
158         mdio {
159                 #address-cells = <1>;
160                 #size-cells = <0>;
161                 compatible = "lantiq,xrx200-mdio";
162
163                 phy0: ethernet-phy@0 {
164                         reg = <0x0>;
165                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
166                 };
167
168                 phy1: ethernet-phy@1 {
169                         reg = <0x1>;
170                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
171                 };
172
173                 phy11: ethernet-phy@11 {
174                         reg = <0x11>;
175                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
176                 };
177
178                 phy13: ethernet-phy@13 {
179                         reg = <0x13>;
180                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
181                 };
182         };
183 };
184
185 &gphy0 {
186         lantiq,gphy-mode = <GPHY_MODE_GE>;
187 };
188
189 &gphy1 {
190         lantiq,gphy-mode = <GPHY_MODE_GE>;
191 };
192
193 &gpio {
194         pinctrl-names = "default";
195         pinctrl-0 = <&state_default>;
196
197         state_default: pinmux {
198                 mdio {
199                         lantiq,groups = "mdio";
200                         lantiq,function = "mdio";
201                 };
202
203                 nand {
204                         lantiq,groups = "nand cle", "nand ale",
205                                         "nand rd", "nand cs1", "nand rdy";
206                         lantiq,function = "ebu";
207                         lantiq,pull = <1>;
208                 };
209
210                 phy-rst {
211                         lantiq,pins = "io37", "io44";
212                         lantiq,pull = <0>;
213                         lantiq,open-drain = <0>;
214                         lantiq,output = <1>;
215                 };
216
217                 pcie-rst {
218                         lantiq,pins = "io21";
219                         lantiq,pull = <0>;
220                         lantiq,output = <1>;
221                 };
222         };
223
224         pins_spi_default: pins_spi_default {
225                 spi_in {
226                         lantiq,groups = "spi_di";
227                         lantiq,function = "spi";
228                 };
229
230                 spi_out {
231                         lantiq,groups = "spi_do", "spi_clk",
232                                 "spi_cs4";
233                         lantiq,function = "spi";
234                         lantiq,output = <1>;
235                 };
236         };
237 };
238
239 &pcie0 {
240         gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
241
242         pcie@0 {
243                 reg = <0 0 0 0 0>;
244                 #interrupt-cells = <1>;
245                 #size-cells = <2>;
246                 #address-cells = <3>;
247                 device_type = "pci";
248
249                 wifi@0,0 {
250                         compatible = "pci0,0";
251                         reg = <0 0 0 0 0>;
252                         qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
253                 };
254         };
255 };
256
257 &spi {
258         status = "okay";
259
260         pinctrl-names = "default";
261         pinctrl-0 = <&pins_spi_default>;
262
263         m25p80@4 {
264                 #address-cells = <1>;
265                 #size-cells = <1>;
266                 compatible = "jedec,spi-nor";
267                 reg = <4>;
268                 spi-max-frequency = <1000000>;
269
270                 urlader: partition@0 {
271                         reg = <0x0 0x20000>;
272                         label = "urlader";
273                         read-only;
274                 };
275
276                 partition@20000 {
277                         reg = <0x20000 0x10000>;
278                         label = "tffs (1)";
279                         read-only;
280                 };
281
282                 partition@30000 {
283                         reg = <0x30000 0x10000>;
284                         label = "tffs (2)";
285                         read-only;
286                 };
287         };
288 };
289
290 &usb_phy0 {
291         status = "okay";
292 };
293
294 &usb_phy1 {
295         status = "okay";
296 };
297
298 &usb0 {
299         status = "okay";
300         vbus-supply = <&usb0_vbus>;
301 };
302
303 &usb1 {
304         status = "okay";
305         vbus-supply = <&usb1_vbus>;
306 };