lantiq: Convert Zyxel P-2812HNU-FX and TP-Link TD-W8970 to support dwc2
[oweals/openwrt.git] / target / linux / lantiq / dts / TDW8970.dts
1 /dts-v1/;
2
3 /include/ "vr9.dtsi"
4
5 / {
6         model = "TDW8970 - TP-LINK TD-W8970";
7
8         chosen {
9                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
10         };
11
12         memory@0 {
13                 reg = <0x0 0x4000000>;
14         };
15
16         fpi@10000000 {
17                 gpio: pinmux@E100B10 {
18                         pinctrl-names = "default";
19                         pinctrl-0 = <&state_default>;
20
21                         state_default: pinmux {
22                                 mdio {
23                                         lantiq,groups = "mdio";
24                                         lantiq,function = "mdio";
25                                 };
26                                 gphy-leds {
27                                         lantiq,groups = "gphy0 led1", "gphy1 led1";
28                                         lantiq,function = "gphy";
29                                         lantiq,pull = <2>;
30                                         lantiq,open-drain = <0>;
31                                         lantiq,output = <1>;
32                                 };
33                                 phy-rst {
34                                         lantiq,pins = "io42";
35                                         lantiq,pull = <0>;
36                                         lantiq,open-drain = <0>;
37                                         lantiq,output = <1>;
38                                 };
39                                 spi-in {
40                                         lantiq,pins = "io16";
41                                         lantiq,open-drain = <1>;
42                                         lantiq,pull = <2>;
43                                 };
44                                 spi-out {
45                                         lantiq,pins = "io10", "io17", "io18", "io21";
46                                         lantiq,open-drain = <0>;
47                                         lantiq,pull = <2>;
48                                 };
49                                 pcie-rst {
50                                         lantiq,pins = "io38";
51                                         lantiq,pull = <0>;
52                                         lantiq,output = <1>;
53                                 };
54                         };
55                 };
56
57                 eth@E108000 {
58                         #address-cells = <1>;
59                         #size-cells = <0>;
60                         compatible = "lantiq,xrx200-net";
61                         reg = < 0xE108000 0x3000 /* switch */
62                                 0xE10B100 0x70 /* mdio */
63                                 0xE10B1D8 0x30 /* mii */
64                                 0xE10B308 0x30 /* pmac */
65                         >;
66                         interrupt-parent = <&icu0>;
67                         interrupts = <73 72>;
68
69                         lan: interface@0 {
70                                 compatible = "lantiq,xrx200-pdi";
71                                 #address-cells = <1>;
72                                 #size-cells = <0>;
73                                 reg = <0>;
74                                 mtd-mac-address = <&ath9k_cal 0xf100>;
75                                 lantiq,switch;
76
77                                 ethernet@0 {
78                                         compatible = "lantiq,xrx200-pdi-port";
79                                         reg = <0>;
80                                         phy-mode = "rgmii";
81                                         phy-handle = <&phy0>;
82                                         // gpios = <&gpio 42 1>;
83                                 };
84                                 ethernet@5 {
85                                         compatible = "lantiq,xrx200-pdi-port";
86                                         reg = <5>;
87                                         phy-mode = "rgmii";
88                                         phy-handle = <&phy5>;
89                                 };
90                                 ethernet@2 {
91                                         compatible = "lantiq,xrx200-pdi-port";
92                                         reg = <2>;
93                                         phy-mode = "gmii";
94                                         phy-handle = <&phy11>;
95                                 };
96                                 ethernet@3 {
97                                         compatible = "lantiq,xrx200-pdi-port";
98                                         reg = <4>;
99                                         phy-mode = "gmii";
100                                         phy-handle = <&phy13>;
101                                 };
102                         };
103
104                         mdio@0 {
105                                 #address-cells = <1>;
106                                 #size-cells = <0>;
107                                 compatible = "lantiq,xrx200-mdio";
108                                 phy0: ethernet-phy@0 {
109                                         reg = <0x0>;
110                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
111                                 };
112                                 phy5: ethernet-phy@5 {
113                                         reg = <0x5>;
114                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
115                                 };
116                                 phy11: ethernet-phy@11 {
117                                         reg = <0x11>;
118                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
119                                 };
120                                 phy13: ethernet-phy@13 {
121                                         reg = <0x13>;
122                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
123                                 };
124                         };
125                 };
126
127                 ifxhcd@E101000 {
128                         status = "okay";
129                         gpios = <&gpio 33 0>;
130                         lantiq,portmask = <0x3>;
131                 };
132
133                 ifxhcd@E106000 {
134                         status = "okay";
135                         gpios = <&gpio 33 0>;
136                 };
137         };
138
139         gphy-xrx200 {
140                 compatible = "lantiq,phy-xrx200";
141                 firmware = "lantiq/vr9_phy11g_a2x.bin";
142                 phys = [ 00 01 ];
143         };
144
145         pcie {
146                 compatible = "lantiq,pcie-xway";
147         };
148
149         spi {
150                 #address-cells = <1>;
151                 #size-cells = <1>;
152
153                 compatible = "spi-gpio";
154
155                 gpio-miso = <&gpio 16 0>;
156                 gpio-mosi = <&gpio 17 0>;
157                 gpio-sck = <&gpio 18 0>;
158                 num-chipselects = <1>;
159                 cs-gpios = <&gpio 10 1>;
160
161                 m25p80@0 {
162                         #address-cells = <1>;
163                         #size-cells = <1>;
164                         compatible = "en25q64", "m25p80";
165                         reg = <0 0>;
166                         linux,modalias = "en25q64";
167                         spi-max-frequency = <1000000>;
168
169                         partition@0 {
170                                 reg = <0x0 0x20000>;
171                                 label = "u-boot";
172                                 read-only;
173                         };
174
175                         partition@20000 {
176                                 reg = <0x20000 0x6a0000>;
177                                 label = "firmware";
178                         };
179
180                         partition@6c0000 {
181                                 reg = <0x6c0000 0x100000>;
182                                 label = "dsl_fw";
183                         };
184
185                         partition@7c0000 {
186                                 reg = <0x7c0000 0x10000>;
187                                 label = "config";
188                                 read-only;
189                         };
190
191                         ath9k_cal: partition@7d0000 {
192                                 reg = <0x7d0000 0x30000>;
193                                 label = "boardconfig";
194                                 read-only;
195                         };
196                 };
197         };
198         
199         ath9k_eep {
200                 compatible = "ath9k,eeprom";
201                 ath,eep-flash = <&ath9k_cal 0x21000>;
202                 ath,mac-offset = <0xf100>;
203                 ath,mac-increment;
204                 ath,led-pin = <0>;
205         };
206
207         gpio-keys-polled {
208                 compatible = "gpio-keys-polled";
209                 #address-cells = <1>;
210                 #size-cells = <0>;
211                 poll-interval = <100>;
212                 reset {
213                         label = "reset";
214                         gpios = <&gpio 0 1>;
215                         linux,code = <0x198>;
216                 };
217
218                 wifi {
219                         label = "wifi";
220                         gpios = <&gpio 9 0>;
221                         linux,code = <0xf7>;
222                         linux,input-type = <5>; /* EV_SW */
223                 };
224
225                 wps {
226                         label = "wps";
227                         gpios = <&gpio 39 1>;
228                         linux,code = <0x211>;
229                 };
230         };
231
232         gpio-leds {
233                 compatible = "gpio-leds";
234
235                 dsl {
236                         label = "dsl";
237                         gpios = <&gpio 4 0>;
238                 };
239                 internet {
240                         label = "internet";
241                         gpios = <&gpio 5 0>;
242                 };
243                 usb0 {
244                         label = "usb";
245                         gpios = <&gpio 19 0>;
246                 };
247                 usb2 {
248                         label = "usb2";
249                         gpios = <&gpio 20 0>;
250                 };
251                 wps {
252                         label = "wps";
253                         gpios = <&gpio 37 0>;
254                 };
255         };
256 };