lantiq: Sanitize device tree files
[oweals/openwrt.git] / target / linux / lantiq / dts / P2812HNUFX.dtsi
1 #include "vr9.dtsi"
2
3 / {
4         chosen {
5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6         };
7
8         aliases {
9                 led-boot = &power_green;
10                 led-failsafe = &power_red;
11                 led-running = &power_green;
12
13                 led-dsl = &dsl_green;
14                 led-internet = &internet_green;
15                 led-wifi = &wireless_green;
16         };
17
18         cputemp@0 {
19                 compatible = "lantiq,cputemp";
20         };
21
22         memory@0 {
23                 reg = <0x0 0x8000000>;
24         };
25
26         fpi@10000000 {
27                 #address-cells = <1>;
28                 #size-cells = <1>;
29                 compatible = "lantiq,fpi", "simple-bus";
30                 ranges = <0x0 0x10000000 0xEEFFFFF>;
31                 reg = <0x10000000 0xEF00000>;
32
33                 localbus@0 {
34                         #address-cells = <2>;
35                         #size-cells = <1>;
36                         ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
37                                 1 0 0x4000000 0x4000010>; /* addsel1 */
38                         compatible = "lantiq,localbus", "simple-bus";
39                 };
40
41                 gpio: pinmux@E100B10 {
42                         compatible = "lantiq,pinctrl-xr9";
43                         pinctrl-names = "default";
44                         pinctrl-0 = <&state_default>;
45
46                         interrupt-parent = <&icu0>;
47                         interrupts = <166 135 66 40 41 42 38>;
48
49                         #gpio-cells = <2>;
50                         gpio-controller;
51                         reg = <0xE100B10 0xA0>;
52
53                         state_default: pinmux {
54                                 exin3 {
55                                         lantiq,groups = "exin3";
56                                         lantiq,function = "exin";
57                                 };
58                                 mdio {
59                                         lantiq,groups = "mdio";
60                                         lantiq,function = "mdio";
61                                 };
62                                 gphy-leds {
63                                         lantiq,groups = "gphy0 led1", "gphy1 led1",
64                                                         "gphy0 led2", "gphy1 led2";
65                                         lantiq,function = "gphy";
66                                         lantiq,pull = <2>;
67                                         lantiq,open-drain = <0>;
68                                         lantiq,output = <1>;
69                                 };
70                                 stp {
71                                         lantiq,groups = "stp";
72                                         lantiq,function = "stp";
73                                         lantiq,pull = <2>;
74                                         lantiq,open-drain = <0>;
75                                         lantiq,output = <1>;
76                                 };
77                                 pci-in {
78                                         lantiq,groups = "req1";
79                                         lantiq,function = "pci";
80                                         lantiq,output = <0>;
81                                         lantiq,open-drain = <1>;
82                                         lantiq,pull = <2>;
83                                 };
84                                 pci-out {
85                                         lantiq,groups = "gnt1";
86                                         lantiq,function = "pci";
87                                         lantiq,output = <1>;
88                                         lantiq,open-drain = <0>;
89                                         lantiq,pull = <0>;
90                                 };
91                                 pci_rst {
92                                         lantiq,pins = "io21";
93                                         lantiq,output = <1>;
94                                         lantiq,open-drain = <0>;
95                                         lantiq,pull = <2>;
96                                 };
97                                 pcie-rst {
98                                         lantiq,pins = "io38";
99                                         lantiq,pull = <0>;
100                                         lantiq,output = <1>;
101                                 };
102                                 ifxhcd-rst {
103                                         lantiq,pins = "io33";
104                                         lantiq,pull = <0>;
105                                         lantiq,open-drain = <0>;
106                                         lantiq,output = <1>;
107                                 };
108                                 nand_out {
109                                         lantiq,groups = "nand cle", "nand ale";
110                                         lantiq,function = "ebu";
111                                         lantiq,output = <1>;
112                                         lantiq,open-drain = <0>;
113                                         lantiq,pull = <0>;
114                                 };
115                                 nand_cs1 {
116                                         lantiq,groups = "nand cs1";
117                                         lantiq,function = "ebu";
118                                         lantiq,open-drain = <0>;
119                                         lantiq,pull = <0>;
120                                 };
121                         };
122                 };
123
124                 stp: stp@E100BB0 {
125                         compatible = "lantiq,gpio-stp-xway";
126                         reg = <0xE100BB0 0x40>;
127                         #gpio-cells = <2>;
128                         gpio-controller;
129
130                         lantiq,shadow = <0xffffff>;
131                         lantiq,groups = <0x7>;
132                         lantiq,dsl = <0x0>;
133                         lantiq,phy1 = <0x0>;
134                         lantiq,phy2 = <0x0>;
135                 };
136
137                 ifxhcd@E101000 {
138                         status = "okay";
139                         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
140                         lantiq,portmask = <0x3>;
141                 };
142
143                 ifxhcd@E106000 {
144                         status = "okay";
145                         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
146                 };
147
148                 pci@E105400 {
149                         status = "okay";
150                         #address-cells = <3>;
151                         #size-cells = <2>;
152                         #interrupt-cells = <1>;
153                         compatible = "lantiq,pci-xway";
154                         bus-range = <0x0 0x0>;
155                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
156                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
157                         reg = <0x7000000 0x8000         /* config space */
158                                 0xE105400 0x400>;       /* pci bridge */
159                         lantiq,bus-clock = <33333333>;
160                         /*lantiq,external-clock;*/
161                         lantiq,delay-hi = <0>; /* 0ns delay */
162                         lantiq,delay-lo = <0>; /* 0.0ns delay */
163                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
164                         interrupt-map = <
165                                 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
166                                 >;
167                         gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
168                         req-mask = <0x1>;       /* GNT1 */
169                 };
170         };
171
172         gphy-xrx200 {
173                 compatible = "lantiq,phy-xrx200";
174                 firmware1 = "lantiq/vr9_phy11g_a1x.bin";        /*VR9 1.1*/
175                 firmware2 = "lantiq/vr9_phy11g_a2x.bin";        /*VR9 1.2*/
176                 phys = [ 00 01 ];
177         };
178
179         gpio-keys-polled {
180                 compatible = "gpio-keys-polled";
181                 #address-cells = <1>;
182                 #size-cells = <0>;
183                 poll-interval = <100>;
184
185                 reset {
186                         label = "reset";
187                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
188                         linux,code = <KEY_RESTART>;
189                 };
190
191                 rfkill {
192                         label = "rfkill";
193                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
194                         linux,code = <KEY_RFKILL>;
195                 };
196         };
197
198         gpio-leds {
199                 compatible = "gpio-leds";
200
201                 internet_red {
202                         label = "p2812hnufx:red:internet";
203                         gpios = <&stp 16 GPIO_ACTIVE_LOW>;
204                 };
205                 internet_green: internet_green {
206                         label = "p2812hnufx:green:internet";
207                         gpios = <&stp 17 GPIO_ACTIVE_LOW>;
208                 };
209                 dsl_green: dsl_green {
210                         label = "p2812hnufx:green:dsl";
211                         gpios = <&stp 18 GPIO_ACTIVE_LOW>;
212                 };
213                 dsl_orange {
214                         label = "p2812hnufx:orange:dsl";
215                         gpios = <&stp 19 GPIO_ACTIVE_LOW>;
216                 };
217                 wireless_orange {
218                         label = "p2812hnufx:orange:wlan";
219                         gpios = <&stp 20 GPIO_ACTIVE_LOW>;
220                 };
221                 wireless_green: wireless_green {
222                         label = "p2812hnufx:green:wlan";
223                         gpios = <&stp 21 GPIO_ACTIVE_LOW>;
224                 };
225                 power_red: power {
226                         label = "p2812hnufx:red:power";
227                         gpios = <&stp 22 GPIO_ACTIVE_LOW>;
228                 };
229                 power_green: power2 {
230                         label = "p2812hnufx:green:power";
231                         gpios = <&stp 23 GPIO_ACTIVE_LOW>;
232                         default-state = "keep";
233                 };
234                 phone1 {
235                         label = "p2812hnufx:green:phone";
236                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
237                 };
238                 phone1warn {
239                         label = "p2812hnufx:orange:phone";
240                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
241                 };
242                 phone2warn {
243                         label = "p2812hnufx:orange:phone2";
244                         gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
245                 };
246                 phone2 {
247                         label = "p2812hnufx:green:phone2";
248                         gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
249                 };
250         };
251 };
252
253 &eth0 {
254         lan: interface@0 {
255                 compatible = "lantiq,xrx200-pdi";
256                 #address-cells = <1>;
257                 #size-cells = <0>;
258                 reg = <0>;
259                 mac-address = [ 00 11 22 33 44 55 ];
260                 lantiq,switch;
261
262                 ethernet@0 {
263                         compatible = "lantiq,xrx200-pdi-port";
264                         reg = <0>;
265                         phy-mode = "rgmii";
266                         phy-handle = <&phy0>;
267                 };
268                 ethernet@1 {
269                         compatible = "lantiq,xrx200-pdi-port";
270                         reg = <1>;
271                         phy-mode = "rgmii";
272                         phy-handle = <&phy1>;
273                 };
274                 ethernet@2 {
275                         compatible = "lantiq,xrx200-pdi-port";
276                         reg = <2>;
277                         phy-mode = "gmii";
278                         phy-handle = <&phy11>;
279                 };
280                 ethernet@4 {
281                         compatible = "lantiq,xrx200-pdi-port";
282                         reg = <4>;
283                         phy-mode = "gmii";
284                         phy-handle = <&phy13>;
285                 };
286                 ethernet@5 {
287                         compatible = "lantiq,xrx200-pdi-port";
288                         reg = <5>;
289                         phy-mode = "rgmii";
290                         phy-handle = <&phy5>;
291                 };
292         };
293
294         mdio@0 {
295                 #address-cells = <1>;
296                 #size-cells = <0>;
297                 compatible = "lantiq,xrx200-mdio";
298
299                 phy0: ethernet-phy@0 {
300                         reg = <0x0>;
301                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
302                 };
303                 phy1: ethernet-phy@1 {
304                         reg = <0x1>;
305                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
306                 };
307                 phy5: ethernet-phy@5 {
308                         reg = <0x5>;
309                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
310                 };
311                 phy11: ethernet-phy@11 {
312                         reg = <0x11>;
313                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
314                 };
315                 phy13: ethernet-phy@13 {
316                         reg = <0x13>;
317                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
318                 };
319         };
320 };