lantiq: fix building AVM/EVA sysupgrade images on NOR devices
[oweals/openwrt.git] / target / linux / lantiq / dts / EASY80920.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4         chosen {
5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6
7                 leds {
8                         boot = &power;
9                         failsafe = &power;
10                         running = &power;
11
12                         usb = &usb1;
13                         usb2 = &usb2;
14                 };
15         };
16
17         memory@0 {
18                 reg = <0x0 0x4000000>;
19         };
20
21         fpi@10000000 {
22                 #address-cells = <1>;
23                 #size-cells = <1>;
24                 compatible = "lantiq,fpi", "simple-bus";
25                 ranges = <0x0 0x10000000 0xEEFFFFF>;
26                 reg = <0x10000000 0xEF00000>;
27
28                 localbus@0 {
29                         #address-cells = <2>;
30                         #size-cells = <1>;
31                         compatible = "lantiq,localbus", "simple-bus";
32
33                 };
34
35                 gpio: pinmux@E100B10 {
36                         compatible = "lantiq,pinctrl-xr9";
37                         pinctrl-names = "default";
38                         pinctrl-0 = <&state_default>;
39
40                         interrupt-parent = <&icu0>;
41                         interrupts = <166 135 66 40 41 42 38>;
42
43                         #gpio-cells = <2>;
44                         gpio-controller;
45                         reg = <0xE100B10 0xA0>;
46
47                         state_default: pinmux {
48                                 exin3 {
49                                         lantiq,groups = "exin3";
50                                         lantiq,function = "exin";
51                                 };
52                                 stp {
53                                         lantiq,groups = "stp";
54                                         lantiq,function = "stp";
55                                 };
56                                 nand {
57                                         lantiq,groups = "nand cle", "nand ale",
58                                                         "nand rd", "nand rdy";
59                                         lantiq,function = "ebu";
60                                 };
61                                 mdio {
62                                         lantiq,groups = "mdio";
63                                         lantiq,function = "mdio";
64                                 };
65                                 pci {
66                                         lantiq,groups = "gnt1", "req1";
67                                         lantiq,function = "pci";
68                                 };
69                                 conf_out {
70                                         lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
71                                                         "io4", "io5", "io6", /* stp */
72                                                         "io21",
73                                                         "io33";
74                                         lantiq,open-drain;
75                                         lantiq,pull = <0>;
76                                         lantiq,output = <1>;
77                                 };
78                                 pcie-rst {
79                                         lantiq,pins = "io38";
80                                         lantiq,pull = <0>;
81                                         lantiq,output = <1>;
82                                 };
83                                 conf_in {
84                                         lantiq,pins = "io39", /* exin3 */
85                                                         "io48"; /* nand rdy */
86                                         lantiq,pull = <2>;
87                                 };
88                         };
89                         pins_spi_default: pins_spi_default {
90                                 spi_in {
91                                         lantiq,groups = "spi_di";
92                                         lantiq,function = "spi";
93                                 };
94                                 spi_out {
95                                         lantiq,groups = "spi_do", "spi_clk",
96                                                 "spi_cs4";
97                                         lantiq,function = "spi";
98                                         lantiq,output = <1>;
99                                 };
100                         };
101                 };
102
103                 stp: stp@E100BB0 {
104                         compatible = "lantiq,gpio-stp-xway";
105                         reg = <0xE100BB0 0x40>;
106                         #gpio-cells = <2>;
107                         gpio-controller;
108
109                         lantiq,shadow = <0xffff>;
110                         lantiq,groups = <0x7>;
111                         lantiq,dsl = <0x3>;
112                         lantiq,phy1 = <0x7>;
113                         lantiq,phy2 = <0x7>;
114                         /* lantiq,rising; */
115                 };
116
117                 ifxhcd@E101000 {
118                         status = "okay";
119                         gpios = <&gpio 33 0>;
120                         lantiq,portmask = <0x3>;
121                 };
122
123                 pci@E105400 {
124                         #address-cells = <3>;
125                         #size-cells = <2>;
126                         #interrupt-cells = <1>;
127                         compatible = "lantiq,pci-xway1";
128                         bus-range = <0x0 0x0>;
129                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
130                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
131                         reg = <0x7000000 0x8000         /* config space */
132                                 0xE105400 0x400>;       /* pci bridge */
133                         lantiq,bus-clock = <33333333>;
134                         /*lantiq,external-clock;*/
135                         lantiq,delay-hi = <0>; /* 0ns delay */
136                         lantiq,delay-lo = <0>; /* 0.0ns delay */
137                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
138                         interrupt-map = <
139                                 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
140                                 >;
141                         gpios-reset = <&gpio 21 0>;
142                         req-mask = <0x1>;       /* GNT1 */
143                 };
144         };
145
146         gphy-xrx200 {
147                 compatible = "lantiq,phy-xrx200";
148                 firmware1 = "lantiq/vr9_phy11g_a1x.bin";
149                 firmware2 = "lantiq/vr9_phy11g_a2x.bin";
150                 phys = [ 00 01 ];
151         };
152
153         gpio-keys-polled {
154                 compatible = "gpio-keys-polled";
155                 #address-cells = <1>;
156                 #size-cells = <0>;
157                 poll-interval = <100>;
158 /*              reset {
159                         label = "reset";
160                         gpios = <&gpio 7 1>;
161                         linux,code = <0x198>;
162                 };*/
163                 paging {
164                         label = "paging";
165                         gpios = <&gpio 11 1>;
166                         linux,code = <0x100>;
167                 };
168         };
169
170         gpio-leds {
171                 compatible = "gpio-leds";
172
173                 power: power {
174                         label = "easy80920:green:power";
175                         gpios = <&stp 9 0>;
176                         default-state = "keep";
177                 };
178                 warning {
179                         label = "easy80920:green:warning";
180                         gpios = <&stp 22 0>;
181                 };
182                 fxs1 {
183                         label = "easy80920:green:fxs1";
184                         gpios = <&stp 21 0>;
185                 };
186                 fxs2 {
187                         label = "easy80920:green:fxs2";
188                         gpios = <&stp 20 0>;
189                 };
190                 fxo {
191                         label = "easy80920:green:fxo";
192                         gpios = <&stp 19 0>;
193                 };
194                 usb1: usb1 {
195                         label = "easy80920:green:usb1";
196                         gpios = <&stp 18 0>;
197                 };
198                 usb2: usb2 {
199                         label = "easy80920:green:usb2";
200                         gpios = <&stp 15 0>;
201                 };
202                 sd {
203                         label = "easy80920:green:sd";
204                         gpios = <&stp 14 0>;
205                 };
206                 wps {
207                         label = "easy80920:green:wps";
208                         gpios = <&stp 12 0>;
209                 };
210         };
211 };
212
213 &spi {
214         pinctrl-names = "default";
215         pinctrl-0 = <&pins_spi_default>;
216
217         status = "ok";
218
219         m25p80@4 {
220                 #address-cells = <1>;
221                 #size-cells = <1>;
222                 compatible = "jedec,spi-nor";
223                 reg = <4 0>;
224                 spi-max-frequency = <1000000>;
225
226                 partitions {
227                         compatible = "fixed-partitions";
228                         #address-cells = <1>;
229                         #size-cells = <1>;
230
231                         partition@0 {
232                                 reg = <0x0 0x20000>;
233                                 label = "SPI (RO) U-Boot Image";
234                                 read-only;
235                         };
236
237                         partition@20000 {
238                                 reg = <0x20000 0x10000>;
239                                 label = "ENV_MAC";
240                                 read-only;
241                         };
242
243                         partition@30000 {
244                                 reg = <0x30000 0x10000>;
245                                 label = "DPF";
246                                 read-only;
247                         };
248
249                         partition@40000 {
250                                 reg = <0x40000 0x10000>;
251                                 label = "NVRAM";
252                                 read-only;
253                         };
254
255                         partition@500000 {
256                                 reg = <0x50000 0x003a0000>;
257                                 label = "kernel";
258                         };
259                 };
260         };
261 };
262
263 &eth0 {
264         lan: interface@0 {
265                 compatible = "lantiq,xrx200-pdi";
266                 #address-cells = <1>;
267                 #size-cells = <0>;
268                 reg = <0>;
269                 lantiq,switch;
270
271                 ethernet@4 {
272                         compatible = "lantiq,xrx200-pdi-port";
273                         reg = <4>;
274                         phynmode0 = "gmii";
275                         phy-handle = <&phy13>;
276                 };
277                 ethernet@2 {
278                         compatible = "lantiq,xrx200-pdi-port";
279                         reg = <2>;
280                         phy-mode = "gmii";
281                         phy-handle = <&phy11>;
282                 };
283                 ethernet@1 {
284                         compatible = "lantiq,xrx200-pdi-port";
285                         reg = <1>;
286                         phy-mode = "rgmii";
287                         phy-handle = <&phy1>;
288                 };
289                 ethernet@0 {
290                         compatible = "lantiq,xrx200-pdi-port";
291                         reg = <0>;
292                         phy-mode = "rgmii";
293                         phy-handle = <&phy0>;
294                 };
295         };
296
297         wan: interface@1 {
298                 compatible = "lantiq,xrx200-pdi";
299                 #address-cells = <1>;
300                 #size-cells = <0>;
301                 reg = <1>;
302                 lantiq,wan;
303
304                 ethernet@5 {
305                         compatible = "lantiq,xrx200-pdi-port";
306                         reg = <5>;
307                         phy-mode = "rgmii";
308                         phy-handle = <&phy5>;
309                 };
310         };
311
312         mdio@0 {
313                 #address-cells = <1>;
314                 #size-cells = <0>;
315                 compatible = "lantiq,xrx200-mdio";
316                 phy0: ethernet-phy@0 {
317                         reg = <0x0>;
318                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
319                 };
320                 phy1: ethernet-phy@1 {
321                         reg = <0x1>;
322                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
323                 };
324                 phy5: ethernet-phy@5 {
325                         reg = <0x5>;
326                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
327                 };
328                 phy11: ethernet-phy@11 {
329                         reg = <0x11>;
330                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
331                 };
332                 phy13: ethernet-phy@13 {
333                         reg = <0x13>;
334                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
335                 };
336         };
337 };