target/linux/ixp4xx/patches-3.3/190-cambria_support.patch

   1 --- /dev/null
   2 +++ b/arch/arm/mach-ixp4xx/cambria-pci.c
   3 @@ -0,0 +1,74 @@
   4 +/*
   5 + * arch/arch/mach-ixp4xx/cambria-pci.c
   6 + *
   7 + * PCI setup routines for Gateworks Cambria series
   8 + *
   9 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  10 + *
  11 + * based on coyote-pci.c:
  12 + *     Copyright (C) 2002 Jungo Software Technologies.
  13 + *     Copyright (C) 2003 MontaVista Softwrae, Inc.
  14 + *
  15 + * Maintainer: Imre Kaloz <kaloz@openwrt.org>
  16 + *
  17 + * This program is free software; you can redistribute it and/or modify
  18 + * it under the terms of the GNU General Public License version 2 as
  19 + * published by the Free Software Foundation.
  20 + *
  21 + */
  22 +
  23 +#include <linux/kernel.h>
  24 +#include <linux/pci.h>
  25 +#include <linux/init.h>
  26 +#include <linux/irq.h>
  27 +
  28 +#include <asm/mach-types.h>
  29 +#include <mach/hardware.h>
  30 +#include <asm/irq.h>
  31 +
  32 +#include <asm/mach/pci.h>
  33 +
  34 +extern void ixp4xx_pci_preinit(void);
  35 +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
  36 +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
  37 +
  38 +void __init cambria_pci_preinit(void)
  39 +{
  40 +       irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
  41 +       irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
  42 +       irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
  43 +       irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
  44 +
  45 +       ixp4xx_pci_preinit();
  46 +}
  47 +
  48 +static int __init cambria_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  49 +{
  50 +       if (slot == 1)
  51 +               return IRQ_IXP4XX_GPIO11;
  52 +       else if (slot == 2)
  53 +               return IRQ_IXP4XX_GPIO10;
  54 +       else if (slot == 3)
  55 +               return IRQ_IXP4XX_GPIO9;
  56 +       else if (slot == 4)
  57 +               return IRQ_IXP4XX_GPIO8;
  58 +       else return -1;
  59 +}
  60 +
  61 +struct hw_pci cambria_pci __initdata = {
  62 +       .nr_controllers = 1,
  63 +       .preinit =        cambria_pci_preinit,
  64 +       .swizzle =        pci_std_swizzle,
  65 +       .setup =          ixp4xx_setup,
  66 +       .scan =           ixp4xx_scan_bus,
  67 +       .map_irq =        cambria_map_irq,
  68 +};
  69 +
  70 +int __init cambria_pci_init(void)
  71 +{
  72 +       if (machine_is_cambria())
  73 +               pci_common_init(&cambria_pci);
  74 +       return 0;
  75 +}
  76 +
  77 +subsys_initcall(cambria_pci_init);
  78 --- /dev/null
  79 +++ b/arch/arm/mach-ixp4xx/cambria-setup.c
  80 @@ -0,0 +1,574 @@
  81 +/*
  82 + * arch/arm/mach-ixp4xx/cambria-setup.c
  83 + *
  84 + * Board setup for the Gateworks Cambria series
  85 + *
  86 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  87 + *
  88 + * based on coyote-setup.c:
  89 + *      Copyright (C) 2003-2005 MontaVista Software, Inc.
  90 + *
  91 + * Author: Imre Kaloz <kaloz@openwrt.org>
  92 + */
  93 +
  94 +#include <linux/device.h>
  95 +#include <linux/gpio_buttons.h>
  96 +#include <linux/i2c.h>
  97 +#include <linux/i2c-gpio.h>
  98 +#include <linux/i2c/at24.h>
  99 +#include <linux/i2c/gw_i2c_pld.h>
 100 +#include <linux/if_ether.h>
 101 +#include <linux/init.h>
 102 +#include <linux/input.h>
 103 +#include <linux/kernel.h>
 104 +#include <linux/leds.h>
 105 +#include <linux/memory.h>
 106 +#include <linux/netdevice.h>
 107 +#include <linux/serial.h>
 108 +#include <linux/serial_8250.h>
 109 +#include <linux/slab.h>
 110 +#include <linux/socket.h>
 111 +#include <linux/types.h>
 112 +#include <linux/tty.h>
 113 +
 114 +#include <mach/hardware.h>
 115 +#include <asm/irq.h>
 116 +#include <asm/mach-types.h>
 117 +#include <asm/mach/arch.h>
 118 +#include <asm/mach/flash.h>
 119 +#include <asm/setup.h>
 120 +#include <linux/irq.h>
 121 +
 122 +struct cambria_board_info {
 123 +       unsigned char   *model;
 124 +       void            (*setup)(void);
 125 +};
 126 +
 127 +static struct cambria_board_info *cambria_info __initdata;
 128 +
 129 +static struct flash_platform_data cambria_flash_data = {
 130 +       .map_name       = "cfi_probe",
 131 +       .width          = 2,
 132 +};
 133 +
 134 +static struct resource cambria_flash_resource = {
 135 +       .flags          = IORESOURCE_MEM,
 136 +};
 137 +
 138 +static struct platform_device cambria_flash = {
 139 +       .name           = "IXP4XX-Flash",
 140 +       .id             = 0,
 141 +       .dev            = {
 142 +               .platform_data = &cambria_flash_data,
 143 +       },
 144 +       .num_resources  = 1,
 145 +       .resource       = &cambria_flash_resource,
 146 +};
 147 +
 148 +static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
 149 +       .sda_pin        = 7,
 150 +       .scl_pin        = 6,
 151 +};
 152 +
 153 +static struct platform_device cambria_i2c_gpio = {
 154 +       .name           = "i2c-gpio",
 155 +       .id             = 0,
 156 +       .dev = {
 157 +               .platform_data  = &cambria_i2c_gpio_data,
 158 +       },
 159 +};
 160 +
 161 +static struct eth_plat_info cambria_npec_data = {
 162 +       .phy            = 1,
 163 +       .rxq            = 4,
 164 +       .txreadyq       = 21,
 165 +};
 166 +
 167 +static struct eth_plat_info cambria_npea_data = {
 168 +       .phy            = 2,
 169 +       .rxq            = 2,
 170 +       .txreadyq       = 19,
 171 +};
 172 +
 173 +static struct platform_device cambria_npec_device = {
 174 +       .name                   = "ixp4xx_eth",
 175 +       .id                     = IXP4XX_ETH_NPEC,
 176 +       .dev.platform_data      = &cambria_npec_data,
 177 +};
 178 +
 179 +static struct platform_device cambria_npea_device = {
 180 +       .name                   = "ixp4xx_eth",
 181 +       .id                     = IXP4XX_ETH_NPEA,
 182 +       .dev.platform_data      = &cambria_npea_data,
 183 +};
 184 +
 185 +static struct resource cambria_uart_resource = {
 186 +       .start  = IXP4XX_UART1_BASE_PHYS,
 187 +       .end    = IXP4XX_UART1_BASE_PHYS + 0x0fff,
 188 +       .flags  = IORESOURCE_MEM,
 189 +};
 190 +
 191 +static struct plat_serial8250_port cambria_uart_data[] = {
 192 +       {
 193 +               .mapbase        = IXP4XX_UART1_BASE_PHYS,
 194 +               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 195 +               .irq            = IRQ_IXP4XX_UART1,
 196 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 197 +               .iotype         = UPIO_MEM,
 198 +               .regshift       = 2,
 199 +               .uartclk        = IXP4XX_UART_XTAL,
 200 +       },
 201 +       { },
 202 +};
 203 +
 204 +static struct platform_device cambria_uart = {
 205 +       .name           = "serial8250",
 206 +       .id             = PLAT8250_DEV_PLATFORM,
 207 +       .dev = {
 208 +               .platform_data  = cambria_uart_data,
 209 +       },
 210 +       .num_resources  = 1,
 211 +       .resource       = &cambria_uart_resource,
 212 +};
 213 +
 214 +static struct resource cambria_optional_uart_resources[] = {
 215 +       {
 216 +               .start  = 0x52000000,
 217 +               .end    = 0x52000fff,
 218 +               .flags  = IORESOURCE_MEM
 219 +       },
 220 +       {
 221 +               .start  = 0x53000000,
 222 +               .end    = 0x53000fff,
 223 +               .flags  = IORESOURCE_MEM
 224 +       }
 225 +};
 226 +
 227 +static struct plat_serial8250_port cambria_optional_uart_data[] = {
 228 +       {
 229 +               .flags          = UPF_BOOT_AUTOCONF,
 230 +               .iotype         = UPIO_MEM_DELAY,
 231 +               .regshift       = 0,
 232 +               .uartclk        = 1843200,
 233 +               .rw_delay       = 2,
 234 +       },
 235 +       {
 236 +               .flags          = UPF_BOOT_AUTOCONF,
 237 +               .iotype         = UPIO_MEM_DELAY,
 238 +               .regshift       = 0,
 239 +               .uartclk        = 1843200,
 240 +               .rw_delay       = 2,
 241 +       },
 242 +  { },
 243 +};
 244 +
 245 +static struct platform_device cambria_optional_uart = {
 246 +       .name           = "serial8250",
 247 +       .id             = PLAT8250_DEV_PLATFORM1,
 248 +       .dev.platform_data      = cambria_optional_uart_data,
 249 +       .num_resources  = 2,
 250 +       .resource       = cambria_optional_uart_resources,
 251 +};
 252 +
 253 +static struct resource cambria_pata_resources[] = {
 254 +       {
 255 +               .flags  = IORESOURCE_MEM
 256 +       },
 257 +       {
 258 +               .flags  = IORESOURCE_MEM,
 259 +       },
 260 +       {
 261 +               .name   = "intrq",
 262 +               .start  = IRQ_IXP4XX_GPIO12,
 263 +               .end    = IRQ_IXP4XX_GPIO12,
 264 +               .flags  = IORESOURCE_IRQ,
 265 +       },
 266 +};
 267 +
 268 +static struct ixp4xx_pata_data cambria_pata_data = {
 269 +       .cs0_bits       = 0xbfff3c03,
 270 +       .cs1_bits       = 0xbfff3c03,
 271 +};
 272 +
 273 +static struct platform_device cambria_pata = {
 274 +       .name                   = "pata_ixp4xx_cf",
 275 +       .id                     = 0,
 276 +       .dev.platform_data      = &cambria_pata_data,
 277 +       .num_resources          = ARRAY_SIZE(cambria_pata_resources),
 278 +       .resource               = cambria_pata_resources,
 279 +};
 280 +
 281 +static struct gpio_led cambria_gpio_leds[] = {
 282 +       {
 283 +               .name           = "user",  /* green led */
 284 +               .gpio           = 5,
 285 +               .active_low     = 1,
 286 +       }
 287 +};
 288 +
 289 +static struct gpio_led_platform_data cambria_gpio_leds_data = {
 290 +       .num_leds       = 1,
 291 +       .leds           = cambria_gpio_leds,
 292 +};
 293 +
 294 +static struct platform_device cambria_gpio_leds_device = {
 295 +       .name           = "leds-gpio",
 296 +       .id             = -1,
 297 +       .dev.platform_data = &cambria_gpio_leds_data,
 298 +};
 299 +
 300 +static struct resource cambria_gpio_resources[] = {
 301 +       {
 302 +               .name = "gpio",
 303 +               .flags  = 0,
 304 +       },
 305 +};
 306 +
 307 +static struct platform_device cambria_gpio = {
 308 +       .name     = "GPIODEV",
 309 +       .id     = -1,
 310 +       .num_resources    = ARRAY_SIZE(cambria_gpio_resources),
 311 +       .resource   = cambria_gpio_resources,
 312 +};
 313 +
 314 +static struct latch_led cambria_latch_leds[] = {
 315 +       {
 316 +               .name   = "ledA",  /* green led */
 317 +               .bit    = 0,
 318 +       },
 319 +       {
 320 +               .name   = "ledB",  /* green led */
 321 +               .bit    = 1,
 322 +       },
 323 +       {
 324 +               .name   = "ledC",  /* green led */
 325 +               .bit    = 2,
 326 +       },
 327 +       {
 328 +               .name   = "ledD",  /* green led */
 329 +               .bit    = 3,
 330 +       },
 331 +       {
 332 +               .name   = "ledE",  /* green led */
 333 +               .bit    = 4,
 334 +       },
 335 +       {
 336 +               .name   = "ledF",  /* green led */
 337 +               .bit    = 5,
 338 +       },
 339 +       {
 340 +               .name   = "ledG",  /* green led */
 341 +               .bit    = 6,
 342 +       },
 343 +       {
 344 +               .name   = "ledH",  /* green led */
 345 +               .bit    = 7,
 346 +       }
 347 +};
 348 +
 349 +static struct latch_led_platform_data cambria_latch_leds_data = {
 350 +       .num_leds       = 8,
 351 +       .leds           = cambria_latch_leds,
 352 +       .mem            = 0x53F40000,
 353 +};
 354 +
 355 +static struct platform_device cambria_latch_leds_device = {
 356 +       .name           = "leds-latch",
 357 +       .id             = -1,
 358 +       .dev.platform_data = &cambria_latch_leds_data,
 359 +};
 360 +
 361 +static struct resource cambria_usb0_resources[] = {
 362 +       {
 363 +               .start  = 0xCD000000,
 364 +               .end    = 0xCD000300,
 365 +               .flags  = IORESOURCE_MEM,
 366 +       },
 367 +       {
 368 +               .start  = 32,
 369 +               .flags  = IORESOURCE_IRQ,
 370 +       },
 371 +};
 372 +
 373 +static struct resource cambria_usb1_resources[] = {
 374 +       {
 375 +               .start  = 0xCE000000,
 376 +               .end    = 0xCE000300,
 377 +               .flags  = IORESOURCE_MEM,
 378 +       },
 379 +       {
 380 +               .start  = 33,
 381 +               .flags  = IORESOURCE_IRQ,
 382 +       },
 383 +};
 384 +
 385 +static u64 ehci_dma_mask = ~(u32)0;
 386 +
 387 +static struct platform_device cambria_usb0_device =  {
 388 +       .name           = "ixp4xx-ehci",
 389 +       .id             = 0,
 390 +       .resource       = cambria_usb0_resources,
 391 +       .num_resources  = ARRAY_SIZE(cambria_usb0_resources),
 392 +       .dev = {
 393 +               .dma_mask               = &ehci_dma_mask,
 394 +               .coherent_dma_mask      = 0xffffffff,
 395 +       },
 396 +};
 397 +
 398 +static struct platform_device cambria_usb1_device = {
 399 +       .name           = "ixp4xx-ehci",
 400 +       .id             = 1,
 401 +       .resource       = cambria_usb1_resources,
 402 +       .num_resources  = ARRAY_SIZE(cambria_usb1_resources),
 403 +       .dev = {
 404 +               .dma_mask               = &ehci_dma_mask,
 405 +               .coherent_dma_mask      = 0xffffffff,
 406 +       },
 407 +};
 408 +
 409 +static struct gw_i2c_pld_platform_data gw_i2c_pld_data0 = {
 410 +       .gpio_base      = 16,
 411 +       .nr_gpio        = 8,
 412 +};
 413 +
 414 +static struct gw_i2c_pld_platform_data gw_i2c_pld_data1 = {
 415 +       .gpio_base      = 24,
 416 +       .nr_gpio        = 2,
 417 +};
 418 +
 419 +
 420 +static struct gpio_button cambria_gpio_buttons[] = {
 421 +       {
 422 +               .desc           = "user",
 423 +               .type           = EV_KEY,
 424 +               .code           = BTN_0,
 425 +               .threshold      = 2,
 426 +               .gpio           = 25,
 427 +       }
 428 +};
 429 +
 430 +static struct gpio_buttons_platform_data cambria_gpio_buttons_data = {
 431 +       .poll_interval  = 500,
 432 +       .nbuttons       = 1,
 433 +       .buttons        = cambria_gpio_buttons,
 434 +};
 435 +
 436 +static struct platform_device cambria_gpio_buttons_device = {
 437 +       .name                   = "gpio-buttons",
 438 +       .id                     = -1,
 439 +       .dev.platform_data      = &cambria_gpio_buttons_data,
 440 +};
 441 +
 442 +static struct platform_device *cambria_devices[] __initdata = {
 443 +       &cambria_i2c_gpio,
 444 +       &cambria_flash,
 445 +       &cambria_uart,
 446 +};
 447 +
 448 +static void __init cambria_gw23xx_setup(void)
 449 +{
 450 +       cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\
 451 +                                                                                                                                               (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12);
 452 +       cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
 453 +
 454 +       platform_device_register(&cambria_gpio);
 455 +       platform_device_register(&cambria_npec_device);
 456 +       platform_device_register(&cambria_npea_device);
 457 +}
 458 +
 459 +static void __init cambria_gw2350_setup(void)
 460 +{
 461 +       *IXP4XX_EXP_CS2 = 0xBFFF3C43;
 462 +       irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
 463 +       cambria_optional_uart_data[0].mapbase   = 0x52FF0000;
 464 +       cambria_optional_uart_data[0].membase   = (void __iomem *)ioremap(0x52FF0000, 0x0fff);
 465 +       cambria_optional_uart_data[0].irq               = IRQ_IXP4XX_GPIO3;
 466 +
 467 +       *IXP4XX_EXP_CS3 = 0xBFFF3C43;
 468 +       irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
 469 +       cambria_optional_uart_data[1].mapbase   = 0x53FF0000;
 470 +       cambria_optional_uart_data[1].membase   = (void __iomem *)ioremap(0x53FF0000, 0x0fff);
 471 +       cambria_optional_uart_data[1].irq               = IRQ_IXP4XX_GPIO4;
 472 +
 473 +       cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\
 474 +                                                                                                                                               (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12);
 475 +       cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
 476 +
 477 +       platform_device_register(&cambria_gpio);
 478 +       platform_device_register(&cambria_optional_uart);
 479 +       platform_device_register(&cambria_npec_device);
 480 +       platform_device_register(&cambria_npea_device);
 481 +
 482 +       platform_device_register(&cambria_usb0_device);
 483 +       platform_device_register(&cambria_usb1_device);
 484 +
 485 +       platform_device_register(&cambria_gpio_leds_device);
 486 +}
 487 +
 488 +static void __init cambria_gw2358_setup(void)
 489 +{
 490 +       *IXP4XX_EXP_CS3 = 0xBFFF3C43;
 491 +       irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
 492 +       cambria_optional_uart_data[0].mapbase   = 0x53FC0000;
 493 +       cambria_optional_uart_data[0].membase   = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
 494 +       cambria_optional_uart_data[0].irq               = IRQ_IXP4XX_GPIO3;
 495 +
 496 +       irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
 497 +       cambria_optional_uart_data[1].mapbase   = 0x53F80000;
 498 +       cambria_optional_uart_data[1].membase   = (void __iomem *)ioremap(0x53F80000, 0x0fff);
 499 +       cambria_optional_uart_data[1].irq               = IRQ_IXP4XX_GPIO4;
 500 +
 501 +       cambria_gpio_resources[0].start = (1 << 14) | (1 << 16) | (1 << 17) | (1 << 18) |\
 502 +                                                                                                                                               (1 << 19) | (1 << 20) | (1 << 24) | (1 << 25);
 503 +       cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
 504 +
 505 +       platform_device_register(&cambria_gpio);
 506 +       platform_device_register(&cambria_optional_uart);
 507 +
 508 +       platform_device_register(&cambria_npec_device);
 509 +       platform_device_register(&cambria_npea_device);
 510 +
 511 +       platform_device_register(&cambria_usb0_device);
 512 +       platform_device_register(&cambria_usb1_device);
 513 +
 514 +       platform_device_register(&cambria_pata);
 515 +
 516 +       cambria_gpio_leds[0].gpio = 24;
 517 +       platform_device_register(&cambria_gpio_leds_device);
 518 +
 519 +       platform_device_register(&cambria_latch_leds_device);
 520 +
 521 +       platform_device_register(&cambria_gpio_buttons_device);
 522 +}
 523 +
 524 +static struct cambria_board_info cambria_boards[] __initdata = {
 525 +       {
 526 +               .model  = "GW2350",
 527 +               .setup  = cambria_gw2350_setup,
 528 +       }, {
 529 +               .model  = "GW2358",
 530 +               .setup  = cambria_gw2358_setup,
 531 +       }
 532 +};
 533 +
 534 +static struct cambria_board_info * __init cambria_find_board_info(char *model)
 535 +{
 536 +       int i;
 537 +       model[6] = '\0';
 538 +
 539 +       for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) {
 540 +               struct cambria_board_info *info = &cambria_boards[i];
 541 +               if (strcmp(info->model, model) == 0)
 542 +                       return info;
 543 +       }
 544 +
 545 +       return NULL;
 546 +}
 547 +
 548 +static struct memory_accessor *at24_mem_acc;
 549 +
 550 +static void at24_setup(struct memory_accessor *mem_acc, void *context)
 551 +{
 552 +       char mac_addr[ETH_ALEN];
 553 +       char model[7];
 554 +
 555 +       at24_mem_acc = mem_acc;
 556 +
 557 +       /* Read MAC addresses */
 558 +       if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x0, 6) == 6) {
 559 +               memcpy(&cambria_npec_data.hwaddr, mac_addr, ETH_ALEN);
 560 +       }
 561 +       if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x6, 6) == 6) {
 562 +               memcpy(&cambria_npea_data.hwaddr, mac_addr, ETH_ALEN);
 563 +       }
 564 +
 565 +       /* Read the first 6 bytes of the model number */
 566 +       if (at24_mem_acc->read(at24_mem_acc, model, 0x20, 6) == 6) {
 567 +               cambria_info = cambria_find_board_info(model);
 568 +       }
 569 +
 570 +}
 571 +
 572 +static struct at24_platform_data cambria_eeprom_info = {
 573 +       .byte_len       = 1024,
 574 +       .page_size      = 16,
 575 +       .flags          = AT24_FLAG_READONLY,
 576 +       .setup          = at24_setup,
 577 +};
 578 +
 579 +static struct i2c_board_info __initdata cambria_i2c_board_info[] = {
 580 +       {
 581 +               I2C_BOARD_INFO("ds1672", 0x68),
 582 +       },
 583 +       {
 584 +               I2C_BOARD_INFO("ad7418", 0x28),
 585 +       },
 586 +       {
 587 +               I2C_BOARD_INFO("24c08", 0x51),
 588 +               .platform_data  = &cambria_eeprom_info
 589 +       },
 590 +       {
 591 +               I2C_BOARD_INFO("gw_i2c_pld", 0x56),
 592 +               .platform_data  = &gw_i2c_pld_data0,
 593 +       },
 594 +       {
 595 +               I2C_BOARD_INFO("gw_i2c_pld", 0x57),
 596 +               .platform_data  = &gw_i2c_pld_data1,
 597 +       },
 598 +};
 599 +
 600 +static void __init cambria_init(void)
 601 +{
 602 +       ixp4xx_sys_init();
 603 +
 604 +       cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
 605 +       cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
 606 +
 607 +       *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
 608 +       *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
 609 +
 610 +       platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
 611 +
 612 +       cambria_pata_resources[0].start = 0x53e00000;
 613 +       cambria_pata_resources[0].end = 0x53e3ffff;
 614 +
 615 +       cambria_pata_resources[1].start = 0x53e40000;
 616 +       cambria_pata_resources[1].end = 0x53e7ffff;
 617 +
 618 +       cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
 619 +       cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
 620 +
 621 +       i2c_register_board_info(0, cambria_i2c_board_info,
 622 +                               ARRAY_SIZE(cambria_i2c_board_info));
 623 +}
 624 +
 625 +static int __init cambria_model_setup(void)
 626 +{
 627 +       if (!machine_is_cambria())
 628 +               return 0;
 629 +
 630 +       if (cambria_info) {
 631 +               printk(KERN_DEBUG "Running on Gateworks Cambria %s\n",
 632 +                               cambria_info->model);
 633 +               cambria_info->setup();
 634 +       } else {
 635 +               printk(KERN_INFO "Unknown/missing Cambria model number"
 636 +                               " -- defaults will be used\n");
 637 +               cambria_gw23xx_setup();
 638 +       }
 639 +
 640 +       return 0;
 641 +}
 642 +late_initcall(cambria_model_setup);
 643 +
 644 +MACHINE_START(CAMBRIA, "Gateworks Cambria series")
 645 +       /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
 646 +       .map_io         = ixp4xx_map_io,
 647 +       .init_irq       = ixp4xx_init_irq,
 648 +       .timer          = &ixp4xx_timer,
 649 +       .atag_offset    = 0x0100,
 650 +       .init_machine   = cambria_init,
 651 +#if defined(CONFIG_PCI)
 652 +       .dma_zone_size  = SZ_64M,
 653 +#endif
 654 +MACHINE_END
 655 --- a/arch/arm/mach-ixp4xx/Kconfig
 656 +++ b/arch/arm/mach-ixp4xx/Kconfig
 657 @@ -25,6 +25,14 @@ config MACH_AVILA
 658           Avila Network Platform. For more information on this platform,
 659           see <file:Documentation/arm/IXP4xx>.
 660
 661 +config MACH_CAMBRIA
 662 +       bool "Cambria"
 663 +       select PCI
 664 +       help
 665 +         Say 'Y' here if you want your kernel to support the Gateworks
 666 +         Cambria series. For more information on this platform,
 667 +         see <file:Documentation/arm/IXP4xx>.
 668 +
 669  config MACH_LOFT
 670      bool "Loft"
 671      depends on MACH_AVILA
 672 @@ -222,7 +230,7 @@ config CPU_IXP46X
 673
 674  config CPU_IXP43X
 675         bool
 676 -       depends on MACH_KIXRP435
 677 +       depends on MACH_KIXRP435 || MACH_CAMBRIA
 678         default y
 679
 680  config MACH_GTWX5715
 681 --- a/arch/arm/mach-ixp4xx/Makefile
 682 +++ b/arch/arm/mach-ixp4xx/Makefile
 683 @@ -7,6 +7,7 @@ obj-pci-n       :=
 684
 685  obj-pci-$(CONFIG_ARCH_IXDP4XX)         += ixdp425-pci.o
 686  obj-pci-$(CONFIG_MACH_AVILA)           += avila-pci.o
 687 +obj-pci-$(CONFIG_MACH_CAMBRIA)         += cambria-pci.o
 688  obj-pci-$(CONFIG_MACH_IXDPG425)                += ixdpg425-pci.o
 689  obj-pci-$(CONFIG_ARCH_ADI_COYOTE)      += coyote-pci.o
 690  obj-pci-$(CONFIG_MACH_GTWX5715)                += gtwx5715-pci.o
 691 @@ -31,6 +32,7 @@ obj-y += common.o
 692
 693  obj-$(CONFIG_ARCH_IXDP4XX)     += ixdp425-setup.o
 694  obj-$(CONFIG_MACH_AVILA)       += avila-setup.o
 695 +obj-$(CONFIG_MACH_CAMBRIA)     += cambria-setup.o
 696  obj-$(CONFIG_MACH_IXDPG425)    += coyote-setup.o
 697  obj-$(CONFIG_ARCH_ADI_COYOTE)  += coyote-setup.o
 698  obj-$(CONFIG_MACH_GTWX5715)    += gtwx5715-setup.o