target/linux/ipq806x/patches-4.9/863-dts-ipq4019-add-nand-and-qpic-bam-dma-node.patch

   1 From 02bbf3c46e1e38e9ca699143566903683e3a015d Mon Sep 17 00:00:00 2001
   2 From: Ram Chandra Jangir <rjangir@codeaurora.org>
   3 Date: Thu, 20 Apr 2017 10:45:00 +0530
   4 Subject: [PATCH] dts: ipq4019: add nand and qpic bam dma node
   5
   6 This change adds QPIC BAM dma and NAND driver node's in
   7 IPQ4019 device tree, also enable this for AP-DK04.1 based
   8 boards.
   9
  10 Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  11 ---
  12  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 75 +++++++++++++++++++++++++++
  13  arch/arm/boot/dts/qcom-ipq4019.dtsi           | 38 ++++++++++++++
  14  2 files changed, 113 insertions(+)
  15
  16 diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
  17 index 09fb047..e94954e 100644
  18 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
  19 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
  20 @@ -101,6 +101,86 @@
  21                                         bias-bus-hold;
  22                                 };
  23                         };
  24 +
  25 +                       nand_pins: nand_pins {
  26 +
  27 +                                mux_1 {
  28 +                                        pins = "gpio52", "gpio53", "gpio54",
  29 +                                               "gpio55", "gpio56", "gpio61",
  30 +                                               "gpio62", "gpio63", "gpio69";
  31 +                                        function = "qpic_pad";
  32 +                                        bias-disable;
  33 +                                };
  34 +
  35 +                               mux_2 {
  36 +                                       pins = "gpio67";
  37 +                                       function = "qpic_pad0";
  38 +                                       bias-disable;
  39 +                               };
  40 +
  41 +                               mux_3 {
  42 +                                       pins = "gpio64";
  43 +                                       function = "qpic_pad1";
  44 +                                       bias-disable;
  45 +                               };
  46 +
  47 +                               mux_4 {
  48 +                                       pins = "gpio65";
  49 +                                       function = "qpic_pad2";
  50 +                                       bias-disable;
  51 +                               };
  52 +
  53 +                               mux_5 {
  54 +                                       pins = "gpio66";
  55 +                                       function = "qpic_pad3";
  56 +                                       bias-disable;
  57 +                               };
  58 +
  59 +                               mux_6 {
  60 +                                       pins = "gpio57";
  61 +                                       function = "qpic_pad4";
  62 +                                       bias-disable;
  63 +                               };
  64 +
  65 +                               mux_7 {
  66 +                                       pins = "gpio58";
  67 +                                       function = "qpic_pad5";
  68 +                                       bias-disable;
  69 +                               };
  70 +
  71 +                               mux_8 {
  72 +                                       pins = "gpio59";
  73 +                                       function = "qpic_pad6";
  74 +                                       bias-disable;
  75 +                               };
  76 +
  77 +                               mux_9 {
  78 +                                       pins = "gpio60";
  79 +                                       function = "qpic_pad7";
  80 +                                       bias-disable;
  81 +                               };
  82 +
  83 +                               mux_10 {
  84 +                                       pins = "gpio68";
  85 +                                       function = "qpic_pad8";
  86 +                                       bias-disable;
  87 +                               };
  88 +
  89 +                               pullups {
  90 +                                       pins = "gpio52", "gpio53", "gpio58",
  91 +                                               "gpio59";
  92 +                                       bias-pull-up;
  93 +                               };
  94 +
  95 +                               pulldowns {
  96 +                                       pins = "gpio54", "gpio55", "gpio56",
  97 +                                               "gpio57", "gpio60", "gpio61",
  98 +                                               "gpio62", "gpio63", "gpio64",
  99 +                                               "gpio65", "gpio66", "gpio67",
 100 +                                               "gpio68", "gpio69";
 101 +                                       bias-pull-down;
 102 +                               };
 103 +                       };
 104                 };
 105
 106                 blsp_dma: dma@7884000 {
 107 @@ -204,5 +269,15 @@
 108                 wifi@a800000 {
 109                         status = "ok";
 110                 };
 111 +
 112 +               qpic_bam: dma@7984000 {
 113 +                       status = "ok";
 114 +               };
 115 +
 116 +               nand: qpic-nand@79b0000 {
 117 +                       pinctrl-0 = <&nand_pins>;
 118 +                       pinctrl-names = "default";
 119 +                       status = "ok";
 120 +               };
 121         };
 122  };
 123 diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
 124 index 52a64e7..740808b 100644
 125 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 126 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
 127 @@ -593,5 +593,43 @@
 128                                           "legacy";
 129                         status = "disabled";
 130                 };
 131 +
 132 +               qpic_bam: dma@7984000 {
 133 +                       compatible = "qcom,bam-v1.7.0";
 134 +                       reg = <0x7984000 0x1a000>;
 135 +                       interrupts = <0 101 0>;
 136 +                       clocks = <&gcc GCC_QPIC_AHB_CLK>;
 137 +                       clock-names = "bam_clk";
 138 +                       #dma-cells = <1>;
 139 +                       qcom,ee = <0>;
 140 +                       status = "disabled";
 141 +               };
 142 +
 143 +               nand: qpic-nand@79b0000 {
 144 +                       compatible = "qcom,ebi2-nandc-bam", "qcom,msm-nand";
 145 +                       reg = <0x79b0000 0x1000>;
 146 +                       #address-cells = <1>;
 147 +                       #size-cells = <0>;
 148 +                       clocks = <&gcc GCC_QPIC_CLK>,
 149 +                               <&gcc GCC_QPIC_AHB_CLK>;
 150 +                       clock-names = "core", "aon";
 151 +
 152 +                       dmas = <&qpic_bam 0>,
 153 +                               <&qpic_bam 1>,
 154 +                               <&qpic_bam 2>;
 155 +                       dma-names = "tx", "rx", "cmd";
 156 +                       status = "disabled";
 157 +
 158 +                       nandcs@0 {
 159 +                               compatible = "qcom,nandcs";
 160 +                               reg = <0>;
 161 +                               #address-cells = <1>;
 162 +                               #size-cells = <1>;
 163 +
 164 +                               nand-ecc-strength = <4>;
 165 +                               nand-ecc-step-size = <512>;
 166 +                               nand-bus-width = <8>;
 167 +                       };
 168 +               };
 169         };
 170  };
 171 --
 172 2.7.2