ipq806x: enable QCE hardware crypto inside the kernel
[oweals/openwrt.git] / target / linux / ipq806x / patches-4.9 / 0042-clk-qcom-Add-KPSS-ACC-GCC-driver.patch
1 From 6039eb63fabdd6871fc70940aa98102665c78eed Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Fri, 20 Mar 2015 23:45:29 -0700
4 Subject: [PATCH 42/69] clk: qcom: Add KPSS ACC/GCC driver
5
6 The ACC and GCC regions present in KPSSv1 contain registers to
7 control clocks and power to each Krait CPU and L2. For CPUfreq
8 purposes probe these devices and expose a mux clock that chooses
9 between PXO and PLL8.
10
11 Cc: <devicetree@vger.kernel.org>
12 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
13 ---
14  .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt  |  7 ++
15  .../devicetree/bindings/arm/msm/qcom,kpss-gcc.txt  | 28 +++++++
16  drivers/clk/qcom/Kconfig                           |  8 ++
17  drivers/clk/qcom/Makefile                          |  1 +
18  drivers/clk/qcom/kpss-xcc.c                        | 95 ++++++++++++++++++++++
19  5 files changed, 139 insertions(+)
20  create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
21  create mode 100644 drivers/clk/qcom/kpss-xcc.c
22
23 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
24 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
25 @@ -21,10 +21,17 @@ PROPERTIES
26                     the register region. An optional second element specifies
27                     the base address and size of the alias register region.
28  
29 +- clock-output-names:
30 +       Usage: optional
31 +       Value type: <string>
32 +       Definition: Name of the output clock. Typically acpuX_aux where X is a
33 +                   CPU number starting at 0.
34 +
35  Example:
36  
37         clock-controller@2088000 {
38                 compatible = "qcom,kpss-acc-v2";
39                 reg = <0x02088000 0x1000>,
40                       <0x02008000 0x1000>;
41 +               clock-output-names = "acpu0_aux";
42         };
43 --- /dev/null
44 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
45 @@ -0,0 +1,28 @@
46 +Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
47 +
48 +PROPERTIES
49 +
50 +- compatible:
51 +       Usage: required
52 +       Value type: <string>
53 +       Definition: should be one of:
54 +                       "qcom,kpss-gcc"
55 +
56 +- reg:
57 +       Usage: required
58 +       Value type: <prop-encoded-array>
59 +       Definition: base address and size of the register region
60 +
61 +- clock-output-names:
62 +       Usage: required
63 +       Value type: <string>
64 +       Definition: Name of the output clock. Typically acpu_l2_aux indicating
65 +                   an L2 cache auxiliary clock.
66 +
67 +Example:
68 +
69 +       l2cc: clock-controller@2011000 {
70 +               compatible = "qcom,kpss-gcc";
71 +               reg = <0x2011000 0x1000>;
72 +               clock-output-names = "acpu_l2_aux";
73 +       };
74 --- a/drivers/clk/qcom/Kconfig
75 +++ b/drivers/clk/qcom/Kconfig
76 @@ -188,6 +188,14 @@ config QCOM_HFPLL
77           Say Y if you want to support CPU frequency scaling on devices
78           such as MSM8974, APQ8084, etc.
79  
80 +config KPSS_XCC
81 +       tristate "KPSS Clock Controller"
82 +       depends on COMMON_CLK_QCOM
83 +       help
84 +         Support for the Krait ACC and GCC clock controllers. Say Y
85 +         if you want to support CPU frequency scaling on devices such
86 +         as MSM8960, APQ8064, etc.
87 +
88  config KRAIT_CLOCKS
89         bool
90         select KRAIT_L2_ACCESSORS
91 --- a/drivers/clk/qcom/Makefile
92 +++ b/drivers/clk/qcom/Makefile
93 @@ -33,4 +33,5 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8
94  obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
95  obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
96  obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
97 +obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
98  obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
99 --- /dev/null
100 +++ b/drivers/clk/qcom/kpss-xcc.c
101 @@ -0,0 +1,95 @@
102 +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
103 + *
104 + * This program is free software; you can redistribute it and/or modify
105 + * it under the terms of the GNU General Public License version 2 and
106 + * only version 2 as published by the Free Software Foundation.
107 + *
108 + * This program is distributed in the hope that it will be useful,
109 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
110 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
111 + * GNU General Public License for more details.
112 + */
113 +
114 +#include <linux/kernel.h>
115 +#include <linux/init.h>
116 +#include <linux/module.h>
117 +#include <linux/platform_device.h>
118 +#include <linux/err.h>
119 +#include <linux/io.h>
120 +#include <linux/of.h>
121 +#include <linux/of_device.h>
122 +#include <linux/clk.h>
123 +#include <linux/clk-provider.h>
124 +
125 +static const char *aux_parents[] = {
126 +       "pll8_vote",
127 +       "pxo",
128 +};
129 +
130 +static unsigned int aux_parent_map[] = {
131 +       3,
132 +       0,
133 +};
134 +
135 +static const struct of_device_id kpss_xcc_match_table[] = {
136 +       { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
137 +       { .compatible = "qcom,kpss-gcc" },
138 +       {}
139 +};
140 +MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
141 +
142 +static int kpss_xcc_driver_probe(struct platform_device *pdev)
143 +{
144 +       const struct of_device_id *id;
145 +       struct clk *clk;
146 +       struct resource *res;
147 +       void __iomem *base;
148 +       const char *name;
149 +
150 +       id = of_match_device(kpss_xcc_match_table, &pdev->dev);
151 +       if (!id)
152 +               return -ENODEV;
153 +
154 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
155 +       base = devm_ioremap_resource(&pdev->dev, res);
156 +       if (IS_ERR(base))
157 +               return PTR_ERR(base);
158 +
159 +       if (id->data) {
160 +               if (of_property_read_string_index(pdev->dev.of_node,
161 +                                       "clock-output-names", 0, &name))
162 +                       return -ENODEV;
163 +               base += 0x14;
164 +       } else {
165 +               name = "acpu_l2_aux";
166 +               base += 0x28;
167 +       }
168 +
169 +       clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
170 +                                    ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
171 +                                    0, aux_parent_map, NULL);
172 +
173 +       platform_set_drvdata(pdev, clk);
174 +
175 +       return PTR_ERR_OR_ZERO(clk);
176 +}
177 +
178 +static int kpss_xcc_driver_remove(struct platform_device *pdev)
179 +{
180 +       clk_unregister_mux(platform_get_drvdata(pdev));
181 +       return 0;
182 +}
183 +
184 +static struct platform_driver kpss_xcc_driver = {
185 +       .probe = kpss_xcc_driver_probe,
186 +       .remove = kpss_xcc_driver_remove,
187 +       .driver = {
188 +               .name = "kpss-xcc",
189 +               .of_match_table = kpss_xcc_match_table,
190 +       },
191 +};
192 +module_platform_driver(kpss_xcc_driver);
193 +
194 +MODULE_DESCRIPTION("Krait Processor Sub System (KPSS) Clock Driver");
195 +MODULE_LICENSE("GPL v2");
196 +MODULE_ALIAS("platform:kpss-xcc");