target/linux/ipq806x/patches-3.18/701-stmmac_update_to_4.3.patch

   1 --- a/include/linux/stmmac.h
   2 +++ b/include/linux/stmmac.h
   3 @@ -99,6 +99,7 @@ struct plat_stmmacenet_data {
   4         int phy_addr;
   5         int interface;
   6         struct stmmac_mdio_bus_data *mdio_bus_data;
   7 +       struct device_node *phy_node;
   8         struct stmmac_dma_cfg *dma_cfg;
   9         int clk_csr;
  10         int has_gmac;
  11 @@ -114,32 +115,12 @@ struct plat_stmmacenet_data {
  12         int maxmtu;
  13         int multicast_filter_bins;
  14         int unicast_filter_entries;
  15 +       int tx_fifo_size;
  16 +       int rx_fifo_size;
  17         void (*fix_mac_speed)(void *priv, unsigned int speed);
  18         void (*bus_setup)(void __iomem *ioaddr);
  19 -       void *(*setup)(struct platform_device *pdev);
  20 -       void (*free)(struct platform_device *pdev, void *priv);
  21         int (*init)(struct platform_device *pdev, void *priv);
  22         void (*exit)(struct platform_device *pdev, void *priv);
  23 -       void *custom_cfg;
  24 -       void *custom_data;
  25         void *bsp_priv;
  26  };
  27 -
  28 -/* of_data for SoC glue layer device tree bindings */
  29 -
  30 -struct stmmac_of_data {
  31 -       int has_gmac;
  32 -       int enh_desc;
  33 -       int tx_coe;
  34 -       int rx_coe;
  35 -       int bugged_jumbo;
  36 -       int pmt;
  37 -       int riwt_off;
  38 -       void (*fix_mac_speed)(void *priv, unsigned int speed);
  39 -       void (*bus_setup)(void __iomem *ioaddr);
  40 -       void *(*setup)(struct platform_device *pdev);
  41 -       void (*free)(struct platform_device *pdev, void *priv);
  42 -       int (*init)(struct platform_device *pdev, void *priv);
  43 -       void (*exit)(struct platform_device *pdev, void *priv);
  44 -};
  45  #endif
  46 --- a/drivers/net/ethernet/stmicro/Kconfig
  47 +++ b/drivers/net/ethernet/stmicro/Kconfig
  48 @@ -7,9 +7,7 @@ config NET_VENDOR_STMICRO
  49         default y
  50         depends on HAS_IOMEM
  51         ---help---
  52 -         If you have a network (Ethernet) card belonging to this class, say Y
  53 -         and read the Ethernet-HOWTO, available from
  54 -         <http://www.tldp.org/docs.html#howto>.
  55 +         If you have a network (Ethernet) card belonging to this class, say Y.
  56
  57           Note that the answer to this question doesn't directly affect the
  58           kernel: saying N will just cause the configurator to skip all
  59 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
  60 +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
  61 @@ -14,21 +14,54 @@ config STMMAC_ETH
  62  if STMMAC_ETH
  63
  64  config STMMAC_PLATFORM
  65 -       bool "STMMAC Platform bus support"
  66 +       tristate "STMMAC Platform bus support"
  67         depends on STMMAC_ETH
  68 +       select MFD_SYSCON
  69         default y
  70         ---help---
  71 -         This selects the platform specific bus support for
  72 -         the stmmac device driver. This is the driver used
  73 -         on many embedded STM platforms based on ARM and SuperH
  74 -         processors.
  75 +         This selects the platform specific bus support for the stmmac driver.
  76 +         This is the driver used on several SoCs:
  77 +         STi, Allwinner, Amlogic Meson, Altera SOCFPGA.
  78 +
  79           If you have a controller with this interface, say Y or M here.
  80
  81           If unsure, say N.
  82
  83 +if STMMAC_PLATFORM
  84 +
  85 +config DWMAC_GENERIC
  86 +       tristate "Generic driver for DWMAC"
  87 +       default STMMAC_PLATFORM
  88 +       ---help---
  89 +         Generic DWMAC driver for platforms that don't require any
  90 +         platform specific code to function or is using platform
  91 +         data for setup.
  92 +
  93 +config DWMAC_IPQ806X
  94 +       tristate "QCA IPQ806x DWMAC support"
  95 +       default ARCH_QCOM
  96 +       depends on OF
  97 +       select MFD_SYSCON
  98 +       help
  99 +         Support for QCA IPQ806X DWMAC Ethernet.
 100 +
 101 +         This selects the IPQ806x SoC glue layer support for the stmmac
 102 +         device driver. This driver does not use any of the hardware
 103 +         acceleration features available on this SoC. Network devices
 104 +         will behave like standard non-accelerated ethernet interfaces.
 105 +
 106 +config DWMAC_LPC18XX
 107 +       tristate "NXP LPC18xx/43xx DWMAC support"
 108 +       default ARCH_LPC18XX
 109 +       depends on OF
 110 +       select MFD_SYSCON
 111 +       ---help---
 112 +         Support for NXP LPC18xx/43xx DWMAC Ethernet.
 113 +
 114  config DWMAC_MESON
 115 -       bool "Amlogic Meson dwmac support"
 116 -       depends on STMMAC_PLATFORM && ARCH_MESON
 117 +       tristate "Amlogic Meson dwmac support"
 118 +       default ARCH_MESON
 119 +       depends on OF
 120         help
 121           Support for Ethernet controller on Amlogic Meson SoCs.
 122
 123 @@ -36,9 +69,22 @@ config DWMAC_MESON
 124           the stmmac device driver. This driver is used for Meson6 and
 125           Meson8 SoCs.
 126
 127 +config DWMAC_ROCKCHIP
 128 +       tristate "Rockchip dwmac support"
 129 +       default ARCH_ROCKCHIP
 130 +       depends on OF
 131 +       select MFD_SYSCON
 132 +       help
 133 +         Support for Ethernet controller on Rockchip RK3288 SoC.
 134 +
 135 +         This selects the Rockchip RK3288 SoC glue layer support for
 136 +         the stmmac device driver.
 137 +
 138  config DWMAC_SOCFPGA
 139 -       bool "SOCFPGA dwmac support"
 140 -       depends on STMMAC_PLATFORM && MFD_SYSCON && (ARCH_SOCFPGA || COMPILE_TEST)
 141 +       tristate "SOCFPGA dwmac support"
 142 +       default ARCH_SOCFPGA
 143 +       depends on OF
 144 +       select MFD_SYSCON
 145         help
 146           Support for ethernet controller on Altera SOCFPGA
 147
 148 @@ -46,21 +92,11 @@ config DWMAC_SOCFPGA
 149           for the stmmac device driver. This driver is used for
 150           arria5 and cyclone5 FPGA SoCs.
 151
 152 -config DWMAC_SUNXI
 153 -       bool "Allwinner GMAC support"
 154 -       depends on STMMAC_PLATFORM && ARCH_SUNXI
 155 -       default y
 156 -       ---help---
 157 -         Support for Allwinner A20/A31 GMAC ethernet controllers.
 158 -
 159 -         This selects Allwinner SoC glue layer support for the
 160 -         stmmac device driver. This driver is used for A20/A31
 161 -         GMAC    ethernet controller.
 162 -
 163  config DWMAC_STI
 164 -       bool "STi GMAC support"
 165 -       depends on STMMAC_PLATFORM && ARCH_STI
 166 -       default y
 167 +       tristate "STi GMAC support"
 168 +       default ARCH_STI
 169 +       depends on OF
 170 +       select MFD_SYSCON
 171         ---help---
 172           Support for ethernet controller on STi SOCs.
 173
 174 @@ -68,8 +104,20 @@ config DWMAC_STI
 175           device driver. This driver is used on for the STi series
 176           SOCs GMAC ethernet controller.
 177
 178 +config DWMAC_SUNXI
 179 +       tristate "Allwinner GMAC support"
 180 +       default ARCH_SUNXI
 181 +       depends on OF
 182 +       ---help---
 183 +         Support for Allwinner A20/A31 GMAC ethernet controllers.
 184 +
 185 +         This selects Allwinner SoC glue layer support for the
 186 +         stmmac device driver. This driver is used for A20/A31
 187 +         GMAC ethernet controller.
 188 +endif
 189 +
 190  config STMMAC_PCI
 191 -       bool "STMMAC PCI bus support"
 192 +       tristate "STMMAC PCI bus support"
 193         depends on STMMAC_ETH && PCI
 194         ---help---
 195           This is to select the Synopsys DWMAC available on PCI devices,
 196 @@ -79,22 +127,4 @@ config STMMAC_PCI
 197           D1215994A VIRTEX FPGA board.
 198
 199           If unsure, say N.
 200 -
 201 -config STMMAC_DEBUG_FS
 202 -       bool "Enable monitoring via sysFS "
 203 -       default n
 204 -       depends on STMMAC_ETH && DEBUG_FS
 205 -       ---help---
 206 -         The stmmac entry in /sys reports DMA TX/RX rings
 207 -         or (if supported) the HW cap register.
 208 -
 209 -config STMMAC_DA
 210 -       bool "STMMAC DMA arbitration scheme"
 211 -       default n
 212 -       ---help---
 213 -         Selecting this option, rx has priority over Tx (only for Giga
 214 -         Ethernet device).
 215 -         By default, the DMA arbitration scheme is based on Round-robin
 216 -         (rx:tx priority is 1:1).
 217 -
 218  endif
 219 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
 220 +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
 221 @@ -1,11 +1,20 @@
 222  obj-$(CONFIG_STMMAC_ETH) += stmmac.o
 223 -stmmac-$(CONFIG_STMMAC_PLATFORM) += stmmac_platform.o
 224 -stmmac-$(CONFIG_STMMAC_PCI) += stmmac_pci.o
 225 -stmmac-$(CONFIG_DWMAC_MESON) += dwmac-meson.o
 226 -stmmac-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
 227 -stmmac-$(CONFIG_DWMAC_STI) += dwmac-sti.o
 228 -stmmac-$(CONFIG_DWMAC_SOCFPGA) += dwmac-socfpga.o
 229  stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
 230 -             chain_mode.o dwmac_lib.o dwmac1000_core.o  dwmac1000_dma.o \
 231 -             dwmac100_core.o dwmac100_dma.o enh_desc.o  norm_desc.o \
 232 +             chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
 233 +             dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o     \
 234               mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o $(stmmac-y)
 235 +
 236 +# Ordering matters. Generic driver must be last.
 237 +obj-$(CONFIG_STMMAC_PLATFORM)  += stmmac-platform.o
 238 +obj-$(CONFIG_DWMAC_IPQ806X)    += dwmac-ipq806x.o
 239 +obj-$(CONFIG_DWMAC_LPC18XX)    += dwmac-lpc18xx.o
 240 +obj-$(CONFIG_DWMAC_MESON)      += dwmac-meson.o
 241 +obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
 242 +obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-socfpga.o
 243 +obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
 244 +obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
 245 +obj-$(CONFIG_DWMAC_GENERIC)    += dwmac-generic.o
 246 +stmmac-platform-objs:= stmmac_platform.o
 247 +
 248 +obj-$(CONFIG_STMMAC_PCI) += stmmac-pci.o
 249 +stmmac-pci-objs:= stmmac_pci.o
 250 --- a/drivers/net/ethernet/stmicro/stmmac/common.h
 251 +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
 252 @@ -44,6 +44,7 @@
 253  #undef FRAME_FILTER_DEBUG
 254  /* #define FRAME_FILTER_DEBUG */
 255
 256 +/* Extra statistic and debug information exposed by ethtool */
 257  struct stmmac_extra_stats {
 258         /* Transmit errors */
 259         unsigned long tx_underflow ____cacheline_aligned;
 260 @@ -149,7 +150,7 @@ struct stmmac_extra_stats {
 261  #define        MAC_CSR_H_FRQ_MASK      0x20
 262
 263  #define HASH_TABLE_SIZE 64
 264 -#define PAUSE_TIME 0x200
 265 +#define PAUSE_TIME 0xffff
 266
 267  /* Flow Control defines */
 268  #define FLOW_OFF       0
 269 @@ -220,6 +221,7 @@ enum dma_irq_status {
 270         handle_tx = 0x8,
 271  };
 272
 273 +/* EEE and LPI defines */
 274  #define        CORE_IRQ_TX_PATH_IN_LPI_MODE    (1 << 0)
 275  #define        CORE_IRQ_TX_PATH_EXIT_LPI_MODE  (1 << 1)
 276  #define        CORE_IRQ_RX_PATH_IN_LPI_MODE    (1 << 2)
 277 @@ -229,6 +231,7 @@ enum dma_irq_status {
 278  #define        CORE_PCS_LINK_STATUS            (1 << 6)
 279  #define        CORE_RGMII_IRQ                  (1 << 7)
 280
 281 +/* Physical Coding Sublayer */
 282  struct rgmii_adv {
 283         unsigned int pause;
 284         unsigned int duplex;
 285 @@ -294,6 +297,7 @@ struct dma_features {
 286
 287  #define JUMBO_LEN              9000
 288
 289 +/* Descriptors helpers */
 290  struct stmmac_desc_ops {
 291         /* DMA RX descriptor ring initialization */
 292         void (*init_rx_desc) (struct dma_desc *p, int disable_rx_ic, int mode,
 293 @@ -341,6 +345,10 @@ struct stmmac_desc_ops {
 294         int (*get_rx_timestamp_status) (void *desc, u32 ats);
 295  };
 296
 297 +extern const struct stmmac_desc_ops enh_desc_ops;
 298 +extern const struct stmmac_desc_ops ndesc_ops;
 299 +
 300 +/* Specific DMA helpers */
 301  struct stmmac_dma_ops {
 302         /* DMA core initialization */
 303         int (*init) (void __iomem *ioaddr, int pbl, int fb, int mb,
 304 @@ -349,7 +357,8 @@ struct stmmac_dma_ops {
 305         void (*dump_regs) (void __iomem *ioaddr);
 306         /* Set tx/rx threshold in the csr6 register
 307          * An invalid value enables the store-and-forward mode */
 308 -       void (*dma_mode) (void __iomem *ioaddr, int txmode, int rxmode);
 309 +       void (*dma_mode)(void __iomem *ioaddr, int txmode, int rxmode,
 310 +                        int rxfifosz);
 311         /* To track extra statistic (if supported) */
 312         void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
 313                                    void __iomem *ioaddr);
 314 @@ -370,6 +379,7 @@ struct stmmac_dma_ops {
 315
 316  struct mac_device_info;
 317
 318 +/* Helpers to program the MAC core */
 319  struct stmmac_ops {
 320         /* MAC core initialization */
 321         void (*core_init)(struct mac_device_info *hw, int mtu);
 322 @@ -400,6 +410,7 @@ struct stmmac_ops {
 323         void (*get_adv)(struct mac_device_info *hw, struct rgmii_adv *adv);
 324  };
 325
 326 +/* PTP and HW Timer helpers */
 327  struct stmmac_hwtimestamp {
 328         void (*config_hw_tstamping) (void __iomem *ioaddr, u32 data);
 329         void (*config_sub_second_increment) (void __iomem *ioaddr);
 330 @@ -410,6 +421,8 @@ struct stmmac_hwtimestamp {
 331          u64(*get_systime) (void __iomem *ioaddr);
 332  };
 333
 334 +extern const struct stmmac_hwtimestamp stmmac_ptp;
 335 +
 336  struct mac_link {
 337         int port;
 338         int duplex;
 339 @@ -421,6 +434,7 @@ struct mii_regs {
 340         unsigned int data;      /* MII Data */
 341  };
 342
 343 +/* Helpers to manage the descriptors for chain and ring modes */
 344  struct stmmac_mode_ops {
 345         void (*init) (void *des, dma_addr_t phy_addr, unsigned int size,
 346                       unsigned int extend_desc);
 347 --- /dev/null
 348 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c
 349 @@ -0,0 +1,81 @@
 350 +/*
 351 + * Generic DWMAC platform driver
 352 + *
 353 + * Copyright (C) 2007-2011  STMicroelectronics Ltd
 354 + * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
 355 + *
 356 + * This file is licensed under the terms of the GNU General Public
 357 + * License version 2. This program is licensed "as is" without any
 358 + * warranty of any kind, whether express or implied.
 359 + */
 360 +
 361 +#include <linux/module.h>
 362 +#include <linux/of.h>
 363 +#include <linux/platform_device.h>
 364 +
 365 +#include "stmmac.h"
 366 +#include "stmmac_platform.h"
 367 +
 368 +static int dwmac_generic_probe(struct platform_device *pdev)
 369 +{
 370 +       struct plat_stmmacenet_data *plat_dat;
 371 +       struct stmmac_resources stmmac_res;
 372 +       int ret;
 373 +
 374 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
 375 +       if (ret)
 376 +               return ret;
 377 +
 378 +       if (pdev->dev.of_node) {
 379 +               plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
 380 +               if (IS_ERR(plat_dat)) {
 381 +                       dev_err(&pdev->dev, "dt configuration failed\n");
 382 +                       return PTR_ERR(plat_dat);
 383 +               }
 384 +       } else {
 385 +               plat_dat = dev_get_platdata(&pdev->dev);
 386 +               if (!plat_dat) {
 387 +                       dev_err(&pdev->dev, "no platform data provided\n");
 388 +                       return  -EINVAL;
 389 +               }
 390 +
 391 +               /* Set default value for multicast hash bins */
 392 +               plat_dat->multicast_filter_bins = HASH_TABLE_SIZE;
 393 +
 394 +               /* Set default value for unicast filter entries */
 395 +               plat_dat->unicast_filter_entries = 1;
 396 +       }
 397 +
 398 +       /* Custom initialisation (if needed) */
 399 +       if (plat_dat->init) {
 400 +               ret = plat_dat->init(pdev, plat_dat->bsp_priv);
 401 +               if (ret)
 402 +                       return ret;
 403 +       }
 404 +
 405 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
 406 +}
 407 +
 408 +static const struct of_device_id dwmac_generic_match[] = {
 409 +       { .compatible = "st,spear600-gmac"},
 410 +       { .compatible = "snps,dwmac-3.610"},
 411 +       { .compatible = "snps,dwmac-3.70a"},
 412 +       { .compatible = "snps,dwmac-3.710"},
 413 +       { .compatible = "snps,dwmac"},
 414 +       { }
 415 +};
 416 +MODULE_DEVICE_TABLE(of, dwmac_generic_match);
 417 +
 418 +static struct platform_driver dwmac_generic_driver = {
 419 +       .probe  = dwmac_generic_probe,
 420 +       .remove = stmmac_pltfr_remove,
 421 +       .driver = {
 422 +               .name           = STMMAC_RESOURCE_NAME,
 423 +               .pm             = &stmmac_pltfr_pm_ops,
 424 +               .of_match_table = of_match_ptr(dwmac_generic_match),
 425 +       },
 426 +};
 427 +module_platform_driver(dwmac_generic_driver);
 428 +
 429 +MODULE_DESCRIPTION("Generic dwmac driver");
 430 +MODULE_LICENSE("GPL v2");
 431 --- /dev/null
 432 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
 433 @@ -0,0 +1,373 @@
 434 +/*
 435 + * Qualcomm Atheros IPQ806x GMAC glue layer
 436 + *
 437 + * Copyright (C) 2015 The Linux Foundation
 438 + *
 439 + * Permission to use, copy, modify, and/or distribute this software for any
 440 + * purpose with or without fee is hereby granted, provided that the above
 441 + * copyright notice and this permission notice appear in all copies.
 442 + *
 443 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 444 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 445 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 446 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 447 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 448 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 449 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 450 + */
 451 +
 452 +#include <linux/device.h>
 453 +#include <linux/platform_device.h>
 454 +#include <linux/phy.h>
 455 +#include <linux/regmap.h>
 456 +#include <linux/clk.h>
 457 +#include <linux/reset.h>
 458 +#include <linux/of_net.h>
 459 +#include <linux/mfd/syscon.h>
 460 +#include <linux/stmmac.h>
 461 +#include <linux/of_mdio.h>
 462 +#include <linux/module.h>
 463 +
 464 +#include "stmmac_platform.h"
 465 +
 466 +#define NSS_COMMON_CLK_GATE                    0x8
 467 +#define NSS_COMMON_CLK_GATE_PTP_EN(x)          BIT(0x10 + x)
 468 +#define NSS_COMMON_CLK_GATE_RGMII_RX_EN(x)     BIT(0x9 + (x * 2))
 469 +#define NSS_COMMON_CLK_GATE_RGMII_TX_EN(x)     BIT(0x8 + (x * 2))
 470 +#define NSS_COMMON_CLK_GATE_GMII_RX_EN(x)      BIT(0x4 + x)
 471 +#define NSS_COMMON_CLK_GATE_GMII_TX_EN(x)      BIT(0x0 + x)
 472 +
 473 +#define NSS_COMMON_CLK_DIV0                    0xC
 474 +#define NSS_COMMON_CLK_DIV_OFFSET(x)           (x * 8)
 475 +#define NSS_COMMON_CLK_DIV_MASK                        0x7f
 476 +
 477 +#define NSS_COMMON_CLK_SRC_CTRL                        0x14
 478 +#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x)      (x)
 479 +/* Mode is coded on 1 bit but is different depending on the MAC ID:
 480 + * MAC0: QSGMII=0 RGMII=1
 481 + * MAC1: QSGMII=0 SGMII=0 RGMII=1
 482 + * MAC2 & MAC3: QSGMII=0 SGMII=1
 483 + */
 484 +#define NSS_COMMON_CLK_SRC_CTRL_RGMII(x)       1
 485 +#define NSS_COMMON_CLK_SRC_CTRL_SGMII(x)       ((x >= 2) ? 1 : 0)
 486 +
 487 +#define NSS_COMMON_MACSEC_CTL                  0x28
 488 +#define NSS_COMMON_MACSEC_CTL_EXT_BYPASS_EN(x) (1 << x)
 489 +
 490 +#define NSS_COMMON_GMAC_CTL(x)                 (0x30 + (x * 4))
 491 +#define NSS_COMMON_GMAC_CTL_CSYS_REQ           BIT(19)
 492 +#define NSS_COMMON_GMAC_CTL_PHY_IFACE_SEL      BIT(16)
 493 +#define NSS_COMMON_GMAC_CTL_IFG_LIMIT_OFFSET   8
 494 +#define NSS_COMMON_GMAC_CTL_IFG_OFFSET         0
 495 +#define NSS_COMMON_GMAC_CTL_IFG_MASK           0x3f
 496 +
 497 +#define NSS_COMMON_CLK_DIV_RGMII_1000          1
 498 +#define NSS_COMMON_CLK_DIV_RGMII_100           9
 499 +#define NSS_COMMON_CLK_DIV_RGMII_10            99
 500 +#define NSS_COMMON_CLK_DIV_SGMII_1000          0
 501 +#define NSS_COMMON_CLK_DIV_SGMII_100           4
 502 +#define NSS_COMMON_CLK_DIV_SGMII_10            49
 503 +
 504 +#define QSGMII_PCS_MODE_CTL                    0x68
 505 +#define QSGMII_PCS_MODE_CTL_AUTONEG_EN(x)      BIT((x * 8) + 7)
 506 +
 507 +#define QSGMII_PCS_CAL_LCKDT_CTL               0x120
 508 +#define QSGMII_PCS_CAL_LCKDT_CTL_RST           BIT(19)
 509 +
 510 +/* Only GMAC1/2/3 support SGMII and their CTL register are not contiguous */
 511 +#define QSGMII_PHY_SGMII_CTL(x)                        ((x == 1) ? 0x134 : \
 512 +                                                (0x13c + (4 * (x - 2))))
 513 +#define QSGMII_PHY_CDR_EN                      BIT(0)
 514 +#define QSGMII_PHY_RX_FRONT_EN                 BIT(1)
 515 +#define QSGMII_PHY_RX_SIGNAL_DETECT_EN         BIT(2)
 516 +#define QSGMII_PHY_TX_DRIVER_EN                        BIT(3)
 517 +#define QSGMII_PHY_QSGMII_EN                   BIT(7)
 518 +#define QSGMII_PHY_PHASE_LOOP_GAIN_OFFSET      12
 519 +#define QSGMII_PHY_PHASE_LOOP_GAIN_MASK                0x7
 520 +#define QSGMII_PHY_RX_DC_BIAS_OFFSET           18
 521 +#define QSGMII_PHY_RX_DC_BIAS_MASK             0x3
 522 +#define QSGMII_PHY_RX_INPUT_EQU_OFFSET         20
 523 +#define QSGMII_PHY_RX_INPUT_EQU_MASK           0x3
 524 +#define QSGMII_PHY_CDR_PI_SLEW_OFFSET          22
 525 +#define QSGMII_PHY_CDR_PI_SLEW_MASK            0x3
 526 +#define QSGMII_PHY_TX_DRV_AMP_OFFSET           28
 527 +#define QSGMII_PHY_TX_DRV_AMP_MASK             0xf
 528 +
 529 +struct ipq806x_gmac {
 530 +       struct platform_device *pdev;
 531 +       struct regmap *nss_common;
 532 +       struct regmap *qsgmii_csr;
 533 +       uint32_t id;
 534 +       struct clk *core_clk;
 535 +       phy_interface_t phy_mode;
 536 +};
 537 +
 538 +static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed)
 539 +{
 540 +       struct device *dev = &gmac->pdev->dev;
 541 +       int div;
 542 +
 543 +       switch (speed) {
 544 +       case SPEED_1000:
 545 +               div = NSS_COMMON_CLK_DIV_SGMII_1000;
 546 +               break;
 547 +
 548 +       case SPEED_100:
 549 +               div = NSS_COMMON_CLK_DIV_SGMII_100;
 550 +               break;
 551 +
 552 +       case SPEED_10:
 553 +               div = NSS_COMMON_CLK_DIV_SGMII_10;
 554 +               break;
 555 +
 556 +       default:
 557 +               dev_err(dev, "Speed %dMbps not supported in SGMII\n", speed);
 558 +               return -EINVAL;
 559 +       }
 560 +
 561 +       return div;
 562 +}
 563 +
 564 +static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed)
 565 +{
 566 +       struct device *dev = &gmac->pdev->dev;
 567 +       int div;
 568 +
 569 +       switch (speed) {
 570 +       case SPEED_1000:
 571 +               div = NSS_COMMON_CLK_DIV_RGMII_1000;
 572 +               break;
 573 +
 574 +       case SPEED_100:
 575 +               div = NSS_COMMON_CLK_DIV_RGMII_100;
 576 +               break;
 577 +
 578 +       case SPEED_10:
 579 +               div = NSS_COMMON_CLK_DIV_RGMII_10;
 580 +               break;
 581 +
 582 +       default:
 583 +               dev_err(dev, "Speed %dMbps not supported in RGMII\n", speed);
 584 +               return -EINVAL;
 585 +       }
 586 +
 587 +       return div;
 588 +}
 589 +
 590 +static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed)
 591 +{
 592 +       uint32_t clk_bits, val;
 593 +       int div;
 594 +
 595 +       switch (gmac->phy_mode) {
 596 +       case PHY_INTERFACE_MODE_RGMII:
 597 +               div = get_clk_div_rgmii(gmac, speed);
 598 +               clk_bits = NSS_COMMON_CLK_GATE_RGMII_RX_EN(gmac->id) |
 599 +                          NSS_COMMON_CLK_GATE_RGMII_TX_EN(gmac->id);
 600 +               break;
 601 +
 602 +       case PHY_INTERFACE_MODE_SGMII:
 603 +               div = get_clk_div_sgmii(gmac, speed);
 604 +               clk_bits = NSS_COMMON_CLK_GATE_GMII_RX_EN(gmac->id) |
 605 +                          NSS_COMMON_CLK_GATE_GMII_TX_EN(gmac->id);
 606 +               break;
 607 +
 608 +       default:
 609 +               dev_err(&gmac->pdev->dev, "Unsupported PHY mode: \"%s\"\n",
 610 +                       phy_modes(gmac->phy_mode));
 611 +               return -EINVAL;
 612 +       }
 613 +
 614 +       /* Disable the clocks */
 615 +       regmap_read(gmac->nss_common, NSS_COMMON_CLK_GATE, &val);
 616 +       val &= ~clk_bits;
 617 +       regmap_write(gmac->nss_common, NSS_COMMON_CLK_GATE, val);
 618 +
 619 +       /* Set the divider */
 620 +       regmap_read(gmac->nss_common, NSS_COMMON_CLK_DIV0, &val);
 621 +       val &= ~(NSS_COMMON_CLK_DIV_MASK
 622 +                << NSS_COMMON_CLK_DIV_OFFSET(gmac->id));
 623 +       val |= div << NSS_COMMON_CLK_DIV_OFFSET(gmac->id);
 624 +       regmap_write(gmac->nss_common, NSS_COMMON_CLK_DIV0, val);
 625 +
 626 +       /* Enable the clock back */
 627 +       regmap_read(gmac->nss_common, NSS_COMMON_CLK_GATE, &val);
 628 +       val |= clk_bits;
 629 +       regmap_write(gmac->nss_common, NSS_COMMON_CLK_GATE, val);
 630 +
 631 +       return 0;
 632 +}
 633 +
 634 +static void *ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac)
 635 +{
 636 +       struct device *dev = &gmac->pdev->dev;
 637 +
 638 +       gmac->phy_mode = of_get_phy_mode(dev->of_node);
 639 +       if (gmac->phy_mode < 0) {
 640 +               dev_err(dev, "missing phy mode property\n");
 641 +               return ERR_PTR(-EINVAL);
 642 +       }
 643 +
 644 +       if (of_property_read_u32(dev->of_node, "qcom,id", &gmac->id) < 0) {
 645 +               dev_err(dev, "missing qcom id property\n");
 646 +               return ERR_PTR(-EINVAL);
 647 +       }
 648 +
 649 +       /* The GMACs are called 1 to 4 in the documentation, but to simplify the
 650 +        * code and keep it consistent with the Linux convention, we'll number
 651 +        * them from 0 to 3 here.
 652 +        */
 653 +       if (gmac->id < 0 || gmac->id > 3) {
 654 +               dev_err(dev, "invalid gmac id\n");
 655 +               return ERR_PTR(-EINVAL);
 656 +       }
 657 +
 658 +       gmac->core_clk = devm_clk_get(dev, "stmmaceth");
 659 +       if (IS_ERR(gmac->core_clk)) {
 660 +               dev_err(dev, "missing stmmaceth clk property\n");
 661 +               return gmac->core_clk;
 662 +       }
 663 +       clk_set_rate(gmac->core_clk, 266000000);
 664 +
 665 +       /* Setup the register map for the nss common registers */
 666 +       gmac->nss_common = syscon_regmap_lookup_by_phandle(dev->of_node,
 667 +                                                          "qcom,nss-common");
 668 +       if (IS_ERR(gmac->nss_common)) {
 669 +               dev_err(dev, "missing nss-common node\n");
 670 +               return gmac->nss_common;
 671 +       }
 672 +
 673 +       /* Setup the register map for the qsgmii csr registers */
 674 +       gmac->qsgmii_csr = syscon_regmap_lookup_by_phandle(dev->of_node,
 675 +                                                          "qcom,qsgmii-csr");
 676 +       if (IS_ERR(gmac->qsgmii_csr)) {
 677 +               dev_err(dev, "missing qsgmii-csr node\n");
 678 +               return gmac->qsgmii_csr;
 679 +       }
 680 +
 681 +       return NULL;
 682 +}
 683 +
 684 +static void ipq806x_gmac_fix_mac_speed(void *priv, unsigned int speed)
 685 +{
 686 +       struct ipq806x_gmac *gmac = priv;
 687 +
 688 +       ipq806x_gmac_set_speed(gmac, speed);
 689 +}
 690 +
 691 +static int ipq806x_gmac_probe(struct platform_device *pdev)
 692 +{
 693 +       struct plat_stmmacenet_data *plat_dat;
 694 +       struct stmmac_resources stmmac_res;
 695 +       struct device *dev = &pdev->dev;
 696 +       struct ipq806x_gmac *gmac;
 697 +       int val;
 698 +       void *err;
 699 +
 700 +       val = stmmac_get_platform_resources(pdev, &stmmac_res);
 701 +       if (val)
 702 +               return val;
 703 +
 704 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
 705 +       if (IS_ERR(plat_dat))
 706 +               return PTR_ERR(plat_dat);
 707 +
 708 +       gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL);
 709 +       if (!gmac)
 710 +               return -ENOMEM;
 711 +
 712 +       gmac->pdev = pdev;
 713 +
 714 +       err = ipq806x_gmac_of_parse(gmac);
 715 +       if (IS_ERR(err)) {
 716 +               dev_err(dev, "device tree parsing error\n");
 717 +               return PTR_ERR(err);
 718 +       }
 719 +
 720 +       regmap_write(gmac->qsgmii_csr, QSGMII_PCS_CAL_LCKDT_CTL,
 721 +                    QSGMII_PCS_CAL_LCKDT_CTL_RST);
 722 +
 723 +       /* Inter frame gap is set to 12 */
 724 +       val = 12 << NSS_COMMON_GMAC_CTL_IFG_OFFSET |
 725 +             12 << NSS_COMMON_GMAC_CTL_IFG_LIMIT_OFFSET;
 726 +       /* We also initiate an AXI low power exit request */
 727 +       val |= NSS_COMMON_GMAC_CTL_CSYS_REQ;
 728 +       switch (gmac->phy_mode) {
 729 +       case PHY_INTERFACE_MODE_RGMII:
 730 +               val |= NSS_COMMON_GMAC_CTL_PHY_IFACE_SEL;
 731 +               break;
 732 +       case PHY_INTERFACE_MODE_SGMII:
 733 +               val &= ~NSS_COMMON_GMAC_CTL_PHY_IFACE_SEL;
 734 +               break;
 735 +       default:
 736 +               dev_err(&pdev->dev, "Unsupported PHY mode: \"%s\"\n",
 737 +                       phy_modes(gmac->phy_mode));
 738 +               return -EINVAL;
 739 +       }
 740 +       regmap_write(gmac->nss_common, NSS_COMMON_GMAC_CTL(gmac->id), val);
 741 +
 742 +       /* Configure the clock src according to the mode */
 743 +       regmap_read(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, &val);
 744 +       val &= ~(1 << NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id));
 745 +       switch (gmac->phy_mode) {
 746 +       case PHY_INTERFACE_MODE_RGMII:
 747 +               val |= NSS_COMMON_CLK_SRC_CTRL_RGMII(gmac->id) <<
 748 +                       NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id);
 749 +               break;
 750 +       case PHY_INTERFACE_MODE_SGMII:
 751 +               val |= NSS_COMMON_CLK_SRC_CTRL_SGMII(gmac->id) <<
 752 +                       NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id);
 753 +               break;
 754 +       default:
 755 +               dev_err(&pdev->dev, "Unsupported PHY mode: \"%s\"\n",
 756 +                       phy_modes(gmac->phy_mode));
 757 +               return -EINVAL;
 758 +       }
 759 +       regmap_write(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, val);
 760 +
 761 +       /* Enable PTP clock */
 762 +       regmap_read(gmac->nss_common, NSS_COMMON_CLK_GATE, &val);
 763 +       val |= NSS_COMMON_CLK_GATE_PTP_EN(gmac->id);
 764 +       regmap_write(gmac->nss_common, NSS_COMMON_CLK_GATE, val);
 765 +
 766 +       if (gmac->phy_mode == PHY_INTERFACE_MODE_SGMII) {
 767 +               regmap_write(gmac->qsgmii_csr, QSGMII_PHY_SGMII_CTL(gmac->id),
 768 +                            QSGMII_PHY_CDR_EN |
 769 +                            QSGMII_PHY_RX_FRONT_EN |
 770 +                            QSGMII_PHY_RX_SIGNAL_DETECT_EN |
 771 +                            QSGMII_PHY_TX_DRIVER_EN |
 772 +                            QSGMII_PHY_QSGMII_EN |
 773 +                            0x4 << QSGMII_PHY_PHASE_LOOP_GAIN_OFFSET |
 774 +                            0x3 << QSGMII_PHY_RX_DC_BIAS_OFFSET |
 775 +                            0x1 << QSGMII_PHY_RX_INPUT_EQU_OFFSET |
 776 +                            0x2 << QSGMII_PHY_CDR_PI_SLEW_OFFSET |
 777 +                            0xC << QSGMII_PHY_TX_DRV_AMP_OFFSET);
 778 +       }
 779 +
 780 +       plat_dat->has_gmac = true;
 781 +       plat_dat->bsp_priv = gmac;
 782 +       plat_dat->fix_mac_speed = ipq806x_gmac_fix_mac_speed;
 783 +
 784 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
 785 +}
 786 +
 787 +static const struct of_device_id ipq806x_gmac_dwmac_match[] = {
 788 +       { .compatible = "qcom,ipq806x-gmac" },
 789 +       { }
 790 +};
 791 +MODULE_DEVICE_TABLE(of, ipq806x_gmac_dwmac_match);
 792 +
 793 +static struct platform_driver ipq806x_gmac_dwmac_driver = {
 794 +       .probe = ipq806x_gmac_probe,
 795 +       .remove = stmmac_pltfr_remove,
 796 +       .driver = {
 797 +               .name           = "ipq806x-gmac-dwmac",
 798 +               .pm             = &stmmac_pltfr_pm_ops,
 799 +               .of_match_table = ipq806x_gmac_dwmac_match,
 800 +       },
 801 +};
 802 +module_platform_driver(ipq806x_gmac_dwmac_driver);
 803 +
 804 +MODULE_AUTHOR("Mathieu Olivari <mathieu@codeaurora.org>");
 805 +MODULE_DESCRIPTION("Qualcomm Atheros IPQ806x DWMAC specific glue layer");
 806 +MODULE_LICENSE("Dual BSD/GPL");
 807 --- /dev/null
 808 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c
 809 @@ -0,0 +1,86 @@
 810 +/*
 811 + * DWMAC glue for NXP LPC18xx/LPC43xx Ethernet
 812 + *
 813 + * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
 814 + *
 815 + * This file is licensed under the terms of the GNU General Public
 816 + * License version 2. This program is licensed "as is" without any
 817 + * warranty of any kind, whether express or implied.
 818 + */
 819 +
 820 +#include <linux/mfd/syscon.h>
 821 +#include <linux/module.h>
 822 +#include <linux/of.h>
 823 +#include <linux/of_net.h>
 824 +#include <linux/phy.h>
 825 +#include <linux/platform_device.h>
 826 +#include <linux/regmap.h>
 827 +#include <linux/stmmac.h>
 828 +
 829 +#include "stmmac_platform.h"
 830 +
 831 +/* Register defines for CREG syscon */
 832 +#define LPC18XX_CREG_CREG6                     0x12c
 833 +# define LPC18XX_CREG_CREG6_ETHMODE_MASK       0x7
 834 +# define LPC18XX_CREG_CREG6_ETHMODE_MII                0x0
 835 +# define LPC18XX_CREG_CREG6_ETHMODE_RMII       0x4
 836 +
 837 +static int lpc18xx_dwmac_probe(struct platform_device *pdev)
 838 +{
 839 +       struct plat_stmmacenet_data *plat_dat;
 840 +       struct stmmac_resources stmmac_res;
 841 +       struct regmap *reg;
 842 +       u8 ethmode;
 843 +       int ret;
 844 +
 845 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
 846 +       if (ret)
 847 +               return ret;
 848 +
 849 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
 850 +       if (IS_ERR(plat_dat))
 851 +               return PTR_ERR(plat_dat);
 852 +
 853 +       plat_dat->has_gmac = true;
 854 +
 855 +       reg = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");
 856 +       if (IS_ERR(reg)) {
 857 +               dev_err(&pdev->dev, "syscon lookup failed\n");
 858 +               return PTR_ERR(reg);
 859 +       }
 860 +
 861 +       if (plat_dat->interface == PHY_INTERFACE_MODE_MII) {
 862 +               ethmode = LPC18XX_CREG_CREG6_ETHMODE_MII;
 863 +       } else if (plat_dat->interface == PHY_INTERFACE_MODE_RMII) {
 864 +               ethmode = LPC18XX_CREG_CREG6_ETHMODE_RMII;
 865 +       } else {
 866 +               dev_err(&pdev->dev, "Only MII and RMII mode supported\n");
 867 +               return -EINVAL;
 868 +       }
 869 +
 870 +       regmap_update_bits(reg, LPC18XX_CREG_CREG6,
 871 +                          LPC18XX_CREG_CREG6_ETHMODE_MASK, ethmode);
 872 +
 873 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
 874 +}
 875 +
 876 +static const struct of_device_id lpc18xx_dwmac_match[] = {
 877 +       { .compatible = "nxp,lpc1850-dwmac" },
 878 +       { }
 879 +};
 880 +MODULE_DEVICE_TABLE(of, lpc18xx_dwmac_match);
 881 +
 882 +static struct platform_driver lpc18xx_dwmac_driver = {
 883 +       .probe  = lpc18xx_dwmac_probe,
 884 +       .remove = stmmac_pltfr_remove,
 885 +       .driver = {
 886 +               .name           = "lpc18xx-dwmac",
 887 +               .pm             = &stmmac_pltfr_pm_ops,
 888 +               .of_match_table = lpc18xx_dwmac_match,
 889 +       },
 890 +};
 891 +module_platform_driver(lpc18xx_dwmac_driver);
 892 +
 893 +MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
 894 +MODULE_DESCRIPTION("DWMAC glue for LPC18xx/43xx Ethernet");
 895 +MODULE_LICENSE("GPL v2");
 896 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c
 897 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c
 898 @@ -15,9 +15,12 @@
 899  #include <linux/ethtool.h>
 900  #include <linux/io.h>
 901  #include <linux/ioport.h>
 902 +#include <linux/module.h>
 903  #include <linux/platform_device.h>
 904  #include <linux/stmmac.h>
 905
 906 +#include "stmmac_platform.h"
 907 +
 908  #define ETHMAC_SPEED_100       BIT(1)
 909
 910  struct meson_dwmac {
 911 @@ -44,24 +47,54 @@ static void meson6_dwmac_fix_mac_speed(v
 912         writel(val, dwmac->reg);
 913  }
 914
 915 -static void *meson6_dwmac_setup(struct platform_device *pdev)
 916 +static int meson6_dwmac_probe(struct platform_device *pdev)
 917  {
 918 +       struct plat_stmmacenet_data *plat_dat;
 919 +       struct stmmac_resources stmmac_res;
 920         struct meson_dwmac *dwmac;
 921         struct resource *res;
 922 +       int ret;
 923 +
 924 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
 925 +       if (ret)
 926 +               return ret;
 927 +
 928 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
 929 +       if (IS_ERR(plat_dat))
 930 +               return PTR_ERR(plat_dat);
 931
 932         dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
 933         if (!dwmac)
 934 -               return ERR_PTR(-ENOMEM);
 935 +               return -ENOMEM;
 936
 937         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 938         dwmac->reg = devm_ioremap_resource(&pdev->dev, res);
 939         if (IS_ERR(dwmac->reg))
 940 -               return dwmac->reg;
 941 +               return PTR_ERR(dwmac->reg);
 942 +
 943 +       plat_dat->bsp_priv = dwmac;
 944 +       plat_dat->fix_mac_speed = meson6_dwmac_fix_mac_speed;
 945
 946 -       return dwmac;
 947 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
 948  }
 949
 950 -const struct stmmac_of_data meson6_dwmac_data = {
 951 -       .setup          = meson6_dwmac_setup,
 952 -       .fix_mac_speed  = meson6_dwmac_fix_mac_speed,
 953 +static const struct of_device_id meson6_dwmac_match[] = {
 954 +       { .compatible = "amlogic,meson6-dwmac" },
 955 +       { }
 956  };
 957 +MODULE_DEVICE_TABLE(of, meson6_dwmac_match);
 958 +
 959 +static struct platform_driver meson6_dwmac_driver = {
 960 +       .probe  = meson6_dwmac_probe,
 961 +       .remove = stmmac_pltfr_remove,
 962 +       .driver = {
 963 +               .name           = "meson6-dwmac",
 964 +               .pm             = &stmmac_pltfr_pm_ops,
 965 +               .of_match_table = meson6_dwmac_match,
 966 +       },
 967 +};
 968 +module_platform_driver(meson6_dwmac_driver);
 969 +
 970 +MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
 971 +MODULE_DESCRIPTION("Amlogic Meson DWMAC glue layer");
 972 +MODULE_LICENSE("GPL v2");
 973 --- /dev/null
 974 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
 975 @@ -0,0 +1,626 @@
 976 +/**
 977 + * dwmac-rk.c - Rockchip RK3288 DWMAC specific glue layer
 978 + *
 979 + * Copyright (C) 2014 Chen-Zhi (Roger Chen)
 980 + *
 981 + * Chen-Zhi (Roger Chen)  <roger.chen@rock-chips.com>
 982 + *
 983 + * This program is free software; you can redistribute it and/or modify
 984 + * it under the terms of the GNU General Public License as published by
 985 + * the Free Software Foundation; either version 2 of the License, or
 986 + * (at your option) any later version.
 987 + *
 988 + * This program is distributed in the hope that it will be useful,
 989 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 990 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 991 + * GNU General Public License for more details.
 992 + */
 993 +
 994 +#include <linux/stmmac.h>
 995 +#include <linux/bitops.h>
 996 +#include <linux/clk.h>
 997 +#include <linux/phy.h>
 998 +#include <linux/of_net.h>
 999 +#include <linux/gpio.h>
1000 +#include <linux/module.h>
1001 +#include <linux/of_gpio.h>
1002 +#include <linux/of_device.h>
1003 +#include <linux/platform_device.h>
1004 +#include <linux/regulator/consumer.h>
1005 +#include <linux/delay.h>
1006 +#include <linux/mfd/syscon.h>
1007 +#include <linux/regmap.h>
1008 +
1009 +#include "stmmac_platform.h"
1010 +
1011 +struct rk_priv_data;
1012 +struct rk_gmac_ops {
1013 +       void (*set_to_rgmii)(struct rk_priv_data *bsp_priv,
1014 +                            int tx_delay, int rx_delay);
1015 +       void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
1016 +       void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
1017 +       void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
1018 +};
1019 +
1020 +struct rk_priv_data {
1021 +       struct platform_device *pdev;
1022 +       int phy_iface;
1023 +       struct regulator *regulator;
1024 +       const struct rk_gmac_ops *ops;
1025 +
1026 +       bool clk_enabled;
1027 +       bool clock_input;
1028 +
1029 +       struct clk *clk_mac;
1030 +       struct clk *gmac_clkin;
1031 +       struct clk *mac_clk_rx;
1032 +       struct clk *mac_clk_tx;
1033 +       struct clk *clk_mac_ref;
1034 +       struct clk *clk_mac_refout;
1035 +       struct clk *aclk_mac;
1036 +       struct clk *pclk_mac;
1037 +
1038 +       int tx_delay;
1039 +       int rx_delay;
1040 +
1041 +       struct regmap *grf;
1042 +};
1043 +
1044 +#define HIWORD_UPDATE(val, mask, shift) \
1045 +               ((val) << (shift) | (mask) << ((shift) + 16))
1046 +
1047 +#define GRF_BIT(nr)    (BIT(nr) | BIT(nr+16))
1048 +#define GRF_CLR_BIT(nr)        (BIT(nr+16))
1049 +
1050 +#define RK3288_GRF_SOC_CON1    0x0248
1051 +#define RK3288_GRF_SOC_CON3    0x0250
1052 +
1053 +/*RK3288_GRF_SOC_CON1*/
1054 +#define RK3288_GMAC_PHY_INTF_SEL_RGMII (GRF_BIT(6) | GRF_CLR_BIT(7) | \
1055 +                                        GRF_CLR_BIT(8))
1056 +#define RK3288_GMAC_PHY_INTF_SEL_RMII  (GRF_CLR_BIT(6) | GRF_CLR_BIT(7) | \
1057 +                                        GRF_BIT(8))
1058 +#define RK3288_GMAC_FLOW_CTRL          GRF_BIT(9)
1059 +#define RK3288_GMAC_FLOW_CTRL_CLR      GRF_CLR_BIT(9)
1060 +#define RK3288_GMAC_SPEED_10M          GRF_CLR_BIT(10)
1061 +#define RK3288_GMAC_SPEED_100M         GRF_BIT(10)
1062 +#define RK3288_GMAC_RMII_CLK_25M       GRF_BIT(11)
1063 +#define RK3288_GMAC_RMII_CLK_2_5M      GRF_CLR_BIT(11)
1064 +#define RK3288_GMAC_CLK_125M           (GRF_CLR_BIT(12) | GRF_CLR_BIT(13))
1065 +#define RK3288_GMAC_CLK_25M            (GRF_BIT(12) | GRF_BIT(13))
1066 +#define RK3288_GMAC_CLK_2_5M           (GRF_CLR_BIT(12) | GRF_BIT(13))
1067 +#define RK3288_GMAC_RMII_MODE          GRF_BIT(14)
1068 +#define RK3288_GMAC_RMII_MODE_CLR      GRF_CLR_BIT(14)
1069 +
1070 +/*RK3288_GRF_SOC_CON3*/
1071 +#define RK3288_GMAC_TXCLK_DLY_ENABLE   GRF_BIT(14)
1072 +#define RK3288_GMAC_TXCLK_DLY_DISABLE  GRF_CLR_BIT(14)
1073 +#define RK3288_GMAC_RXCLK_DLY_ENABLE   GRF_BIT(15)
1074 +#define RK3288_GMAC_RXCLK_DLY_DISABLE  GRF_CLR_BIT(15)
1075 +#define RK3288_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 7)
1076 +#define RK3288_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
1077 +
1078 +static void rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv,
1079 +                               int tx_delay, int rx_delay)
1080 +{
1081 +       struct device *dev = &bsp_priv->pdev->dev;
1082 +
1083 +       if (IS_ERR(bsp_priv->grf)) {
1084 +               dev_err(dev, "Missing rockchip,grf property\n");
1085 +               return;
1086 +       }
1087 +
1088 +       regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1089 +                    RK3288_GMAC_PHY_INTF_SEL_RGMII |
1090 +                    RK3288_GMAC_RMII_MODE_CLR);
1091 +       regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON3,
1092 +                    RK3288_GMAC_RXCLK_DLY_ENABLE |
1093 +                    RK3288_GMAC_TXCLK_DLY_ENABLE |
1094 +                    RK3288_GMAC_CLK_RX_DL_CFG(rx_delay) |
1095 +                    RK3288_GMAC_CLK_TX_DL_CFG(tx_delay));
1096 +}
1097 +
1098 +static void rk3288_set_to_rmii(struct rk_priv_data *bsp_priv)
1099 +{
1100 +       struct device *dev = &bsp_priv->pdev->dev;
1101 +
1102 +       if (IS_ERR(bsp_priv->grf)) {
1103 +               dev_err(dev, "Missing rockchip,grf property\n");
1104 +               return;
1105 +       }
1106 +
1107 +       regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1108 +                    RK3288_GMAC_PHY_INTF_SEL_RMII | RK3288_GMAC_RMII_MODE);
1109 +}
1110 +
1111 +static void rk3288_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
1112 +{
1113 +       struct device *dev = &bsp_priv->pdev->dev;
1114 +
1115 +       if (IS_ERR(bsp_priv->grf)) {
1116 +               dev_err(dev, "Missing rockchip,grf property\n");
1117 +               return;
1118 +       }
1119 +
1120 +       if (speed == 10)
1121 +               regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1122 +                            RK3288_GMAC_CLK_2_5M);
1123 +       else if (speed == 100)
1124 +               regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1125 +                            RK3288_GMAC_CLK_25M);
1126 +       else if (speed == 1000)
1127 +               regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1128 +                            RK3288_GMAC_CLK_125M);
1129 +       else
1130 +               dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
1131 +}
1132 +
1133 +static void rk3288_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
1134 +{
1135 +       struct device *dev = &bsp_priv->pdev->dev;
1136 +
1137 +       if (IS_ERR(bsp_priv->grf)) {
1138 +               dev_err(dev, "Missing rockchip,grf property\n");
1139 +               return;
1140 +       }
1141 +
1142 +       if (speed == 10) {
1143 +               regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1144 +                            RK3288_GMAC_RMII_CLK_2_5M |
1145 +                            RK3288_GMAC_SPEED_10M);
1146 +       } else if (speed == 100) {
1147 +               regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
1148 +                            RK3288_GMAC_RMII_CLK_25M |
1149 +                            RK3288_GMAC_SPEED_100M);
1150 +       } else {
1151 +               dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
1152 +       }
1153 +}
1154 +
1155 +static const struct rk_gmac_ops rk3288_ops = {
1156 +       .set_to_rgmii = rk3288_set_to_rgmii,
1157 +       .set_to_rmii = rk3288_set_to_rmii,
1158 +       .set_rgmii_speed = rk3288_set_rgmii_speed,
1159 +       .set_rmii_speed = rk3288_set_rmii_speed,
1160 +};
1161 +
1162 +#define RK3368_GRF_SOC_CON15   0x043c
1163 +#define RK3368_GRF_SOC_CON16   0x0440
1164 +
1165 +/* RK3368_GRF_SOC_CON15 */
1166 +#define RK3368_GMAC_PHY_INTF_SEL_RGMII (GRF_BIT(9) | GRF_CLR_BIT(10) | \
1167 +                                        GRF_CLR_BIT(11))
1168 +#define RK3368_GMAC_PHY_INTF_SEL_RMII  (GRF_CLR_BIT(9) | GRF_CLR_BIT(10) | \
1169 +                                        GRF_BIT(11))
1170 +#define RK3368_GMAC_FLOW_CTRL          GRF_BIT(8)
1171 +#define RK3368_GMAC_FLOW_CTRL_CLR      GRF_CLR_BIT(8)
1172 +#define RK3368_GMAC_SPEED_10M          GRF_CLR_BIT(7)
1173 +#define RK3368_GMAC_SPEED_100M         GRF_BIT(7)
1174 +#define RK3368_GMAC_RMII_CLK_25M       GRF_BIT(3)
1175 +#define RK3368_GMAC_RMII_CLK_2_5M      GRF_CLR_BIT(3)
1176 +#define RK3368_GMAC_CLK_125M           (GRF_CLR_BIT(4) | GRF_CLR_BIT(5))
1177 +#define RK3368_GMAC_CLK_25M            (GRF_BIT(4) | GRF_BIT(5))
1178 +#define RK3368_GMAC_CLK_2_5M           (GRF_CLR_BIT(4) | GRF_BIT(5))
1179 +#define RK3368_GMAC_RMII_MODE          GRF_BIT(6)
1180 +#define RK3368_GMAC_RMII_MODE_CLR      GRF_CLR_BIT(6)
1181 +
1182 +/* RK3368_GRF_SOC_CON16 */
1183 +#define RK3368_GMAC_TXCLK_DLY_ENABLE   GRF_BIT(7)
1184 +#define RK3368_GMAC_TXCLK_DLY_DISABLE  GRF_CLR_BIT(7)
1185 +#define RK3368_GMAC_RXCLK_DLY_ENABLE   GRF_BIT(15)
1186 +#define RK3368_GMAC_RXCLK_DLY_DISABLE  GRF_CLR_BIT(15)
1187 +#define RK3368_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8)
1188 +#define RK3368_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
1189 +
1190 +static void rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv,
1191 +                               int tx_delay, int rx_delay)
1192 +{
1193 +       struct device *dev = &bsp_priv->pdev->dev;
1194 +
1195 +       if (IS_ERR(bsp_priv->grf)) {
1196 +               dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);
1197 +               return;
1198 +       }
1199 +
1200 +       regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1201 +                    RK3368_GMAC_PHY_INTF_SEL_RGMII |
1202 +                    RK3368_GMAC_RMII_MODE_CLR);
1203 +       regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON16,
1204 +                    RK3368_GMAC_RXCLK_DLY_ENABLE |
1205 +                    RK3368_GMAC_TXCLK_DLY_ENABLE |
1206 +                    RK3368_GMAC_CLK_RX_DL_CFG(rx_delay) |
1207 +                    RK3368_GMAC_CLK_TX_DL_CFG(tx_delay));
1208 +}
1209 +
1210 +static void rk3368_set_to_rmii(struct rk_priv_data *bsp_priv)
1211 +{
1212 +       struct device *dev = &bsp_priv->pdev->dev;
1213 +
1214 +       if (IS_ERR(bsp_priv->grf)) {
1215 +               dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);
1216 +               return;
1217 +       }
1218 +
1219 +       regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1220 +                    RK3368_GMAC_PHY_INTF_SEL_RMII | RK3368_GMAC_RMII_MODE);
1221 +}
1222 +
1223 +static void rk3368_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
1224 +{
1225 +       struct device *dev = &bsp_priv->pdev->dev;
1226 +
1227 +       if (IS_ERR(bsp_priv->grf)) {
1228 +               dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);
1229 +               return;
1230 +       }
1231 +
1232 +       if (speed == 10)
1233 +               regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1234 +                            RK3368_GMAC_CLK_2_5M);
1235 +       else if (speed == 100)
1236 +               regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1237 +                            RK3368_GMAC_CLK_25M);
1238 +       else if (speed == 1000)
1239 +               regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1240 +                            RK3368_GMAC_CLK_125M);
1241 +       else
1242 +               dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
1243 +}
1244 +
1245 +static void rk3368_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
1246 +{
1247 +       struct device *dev = &bsp_priv->pdev->dev;
1248 +
1249 +       if (IS_ERR(bsp_priv->grf)) {
1250 +               dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);
1251 +               return;
1252 +       }
1253 +
1254 +       if (speed == 10) {
1255 +               regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1256 +                            RK3368_GMAC_RMII_CLK_2_5M |
1257 +                            RK3368_GMAC_SPEED_10M);
1258 +       } else if (speed == 100) {
1259 +               regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
1260 +                            RK3368_GMAC_RMII_CLK_25M |
1261 +                            RK3368_GMAC_SPEED_100M);
1262 +       } else {
1263 +               dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
1264 +       }
1265 +}
1266 +
1267 +static const struct rk_gmac_ops rk3368_ops = {
1268 +       .set_to_rgmii = rk3368_set_to_rgmii,
1269 +       .set_to_rmii = rk3368_set_to_rmii,
1270 +       .set_rgmii_speed = rk3368_set_rgmii_speed,
1271 +       .set_rmii_speed = rk3368_set_rmii_speed,
1272 +};
1273 +
1274 +static int gmac_clk_init(struct rk_priv_data *bsp_priv)
1275 +{
1276 +       struct device *dev = &bsp_priv->pdev->dev;
1277 +
1278 +       bsp_priv->clk_enabled = false;
1279 +
1280 +       bsp_priv->mac_clk_rx = devm_clk_get(dev, "mac_clk_rx");
1281 +       if (IS_ERR(bsp_priv->mac_clk_rx))
1282 +               dev_err(dev, "cannot get clock %s\n",
1283 +                       "mac_clk_rx");
1284 +
1285 +       bsp_priv->mac_clk_tx = devm_clk_get(dev, "mac_clk_tx");
1286 +       if (IS_ERR(bsp_priv->mac_clk_tx))
1287 +               dev_err(dev, "cannot get clock %s\n",
1288 +                       "mac_clk_tx");
1289 +
1290 +       bsp_priv->aclk_mac = devm_clk_get(dev, "aclk_mac");
1291 +       if (IS_ERR(bsp_priv->aclk_mac))
1292 +               dev_err(dev, "cannot get clock %s\n",
1293 +                       "aclk_mac");
1294 +
1295 +       bsp_priv->pclk_mac = devm_clk_get(dev, "pclk_mac");
1296 +       if (IS_ERR(bsp_priv->pclk_mac))
1297 +               dev_err(dev, "cannot get clock %s\n",
1298 +                       "pclk_mac");
1299 +
1300 +       bsp_priv->clk_mac = devm_clk_get(dev, "stmmaceth");
1301 +       if (IS_ERR(bsp_priv->clk_mac))
1302 +               dev_err(dev, "cannot get clock %s\n",
1303 +                       "stmmaceth");
1304 +
1305 +       if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
1306 +               bsp_priv->clk_mac_ref = devm_clk_get(dev, "clk_mac_ref");
1307 +               if (IS_ERR(bsp_priv->clk_mac_ref))
1308 +                       dev_err(dev, "cannot get clock %s\n",
1309 +                               "clk_mac_ref");
1310 +
1311 +               if (!bsp_priv->clock_input) {
1312 +                       bsp_priv->clk_mac_refout =
1313 +                               devm_clk_get(dev, "clk_mac_refout");
1314 +                       if (IS_ERR(bsp_priv->clk_mac_refout))
1315 +                               dev_err(dev, "cannot get clock %s\n",
1316 +                                       "clk_mac_refout");
1317 +               }
1318 +       }
1319 +
1320 +       if (bsp_priv->clock_input) {
1321 +               dev_info(dev, "clock input from PHY\n");
1322 +       } else {
1323 +               if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1324 +                       clk_set_rate(bsp_priv->clk_mac, 50000000);
1325 +       }
1326 +
1327 +       return 0;
1328 +}
1329 +
1330 +static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
1331 +{
1332 +       int phy_iface = phy_iface = bsp_priv->phy_iface;
1333 +
1334 +       if (enable) {
1335 +               if (!bsp_priv->clk_enabled) {
1336 +                       if (phy_iface == PHY_INTERFACE_MODE_RMII) {
1337 +                               if (!IS_ERR(bsp_priv->mac_clk_rx))
1338 +                                       clk_prepare_enable(
1339 +                                               bsp_priv->mac_clk_rx);
1340 +
1341 +                               if (!IS_ERR(bsp_priv->clk_mac_ref))
1342 +                                       clk_prepare_enable(
1343 +                                               bsp_priv->clk_mac_ref);
1344 +
1345 +                               if (!IS_ERR(bsp_priv->clk_mac_refout))
1346 +                                       clk_prepare_enable(
1347 +                                               bsp_priv->clk_mac_refout);
1348 +                       }
1349 +
1350 +                       if (!IS_ERR(bsp_priv->aclk_mac))
1351 +                               clk_prepare_enable(bsp_priv->aclk_mac);
1352 +
1353 +                       if (!IS_ERR(bsp_priv->pclk_mac))
1354 +                               clk_prepare_enable(bsp_priv->pclk_mac);
1355 +
1356 +                       if (!IS_ERR(bsp_priv->mac_clk_tx))
1357 +                               clk_prepare_enable(bsp_priv->mac_clk_tx);
1358 +
1359 +                       /**
1360 +                        * if (!IS_ERR(bsp_priv->clk_mac))
1361 +                        *      clk_prepare_enable(bsp_priv->clk_mac);
1362 +                        */
1363 +                       mdelay(5);
1364 +                       bsp_priv->clk_enabled = true;
1365 +               }
1366 +       } else {
1367 +               if (bsp_priv->clk_enabled) {
1368 +                       if (phy_iface == PHY_INTERFACE_MODE_RMII) {
1369 +                               if (!IS_ERR(bsp_priv->mac_clk_rx))
1370 +                                       clk_disable_unprepare(
1371 +                                               bsp_priv->mac_clk_rx);
1372 +
1373 +                               if (!IS_ERR(bsp_priv->clk_mac_ref))
1374 +                                       clk_disable_unprepare(
1375 +                                               bsp_priv->clk_mac_ref);
1376 +
1377 +                               if (!IS_ERR(bsp_priv->clk_mac_refout))
1378 +                                       clk_disable_unprepare(
1379 +                                               bsp_priv->clk_mac_refout);
1380 +                       }
1381 +
1382 +                       if (!IS_ERR(bsp_priv->aclk_mac))
1383 +                               clk_disable_unprepare(bsp_priv->aclk_mac);
1384 +
1385 +                       if (!IS_ERR(bsp_priv->pclk_mac))
1386 +                               clk_disable_unprepare(bsp_priv->pclk_mac);
1387 +
1388 +                       if (!IS_ERR(bsp_priv->mac_clk_tx))
1389 +                               clk_disable_unprepare(bsp_priv->mac_clk_tx);
1390 +                       /**
1391 +                        * if (!IS_ERR(bsp_priv->clk_mac))
1392 +                        *      clk_disable_unprepare(bsp_priv->clk_mac);
1393 +                        */
1394 +                       bsp_priv->clk_enabled = false;
1395 +               }
1396 +       }
1397 +
1398 +       return 0;
1399 +}
1400 +
1401 +static int phy_power_on(struct rk_priv_data *bsp_priv, bool enable)
1402 +{
1403 +       struct regulator *ldo = bsp_priv->regulator;
1404 +       int ret;
1405 +       struct device *dev = &bsp_priv->pdev->dev;
1406 +
1407 +       if (!ldo) {
1408 +               dev_err(dev, "no regulator found\n");
1409 +               return -1;
1410 +       }
1411 +
1412 +       if (enable) {
1413 +               ret = regulator_enable(ldo);
1414 +               if (ret)
1415 +                       dev_err(dev, "fail to enable phy-supply\n");
1416 +       } else {
1417 +               ret = regulator_disable(ldo);
1418 +               if (ret)
1419 +                       dev_err(dev, "fail to disable phy-supply\n");
1420 +       }
1421 +
1422 +       return 0;
1423 +}
1424 +
1425 +static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
1426 +                                         const struct rk_gmac_ops *ops)
1427 +{
1428 +       struct rk_priv_data *bsp_priv;
1429 +       struct device *dev = &pdev->dev;
1430 +       int ret;
1431 +       const char *strings = NULL;
1432 +       int value;
1433 +
1434 +       bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL);
1435 +       if (!bsp_priv)
1436 +               return ERR_PTR(-ENOMEM);
1437 +
1438 +       bsp_priv->phy_iface = of_get_phy_mode(dev->of_node);
1439 +       bsp_priv->ops = ops;
1440 +
1441 +       bsp_priv->regulator = devm_regulator_get_optional(dev, "phy");
1442 +       if (IS_ERR(bsp_priv->regulator)) {
1443 +               if (PTR_ERR(bsp_priv->regulator) == -EPROBE_DEFER) {
1444 +                       dev_err(dev, "phy regulator is not available yet, deferred probing\n");
1445 +                       return ERR_PTR(-EPROBE_DEFER);
1446 +               }
1447 +               dev_err(dev, "no regulator found\n");
1448 +               bsp_priv->regulator = NULL;
1449 +       }
1450 +
1451 +       ret = of_property_read_string(dev->of_node, "clock_in_out", &strings);
1452 +       if (ret) {
1453 +               dev_err(dev, "Can not read property: clock_in_out.\n");
1454 +               bsp_priv->clock_input = true;
1455 +       } else {
1456 +               dev_info(dev, "clock input or output? (%s).\n",
1457 +                        strings);
1458 +               if (!strcmp(strings, "input"))
1459 +                       bsp_priv->clock_input = true;
1460 +               else
1461 +                       bsp_priv->clock_input = false;
1462 +       }
1463 +
1464 +       ret = of_property_read_u32(dev->of_node, "tx_delay", &value);
1465 +       if (ret) {
1466 +               bsp_priv->tx_delay = 0x30;
1467 +               dev_err(dev, "Can not read property: tx_delay.");
1468 +               dev_err(dev, "set tx_delay to 0x%x\n",
1469 +                       bsp_priv->tx_delay);
1470 +       } else {
1471 +               dev_info(dev, "TX delay(0x%x).\n", value);
1472 +               bsp_priv->tx_delay = value;
1473 +       }
1474 +
1475 +       ret = of_property_read_u32(dev->of_node, "rx_delay", &value);
1476 +       if (ret) {
1477 +               bsp_priv->rx_delay = 0x10;
1478 +               dev_err(dev, "Can not read property: rx_delay.");
1479 +               dev_err(dev, "set rx_delay to 0x%x\n",
1480 +                       bsp_priv->rx_delay);
1481 +       } else {
1482 +               dev_info(dev, "RX delay(0x%x).\n", value);
1483 +               bsp_priv->rx_delay = value;
1484 +       }
1485 +
1486 +       bsp_priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
1487 +                                                       "rockchip,grf");
1488 +       bsp_priv->pdev = pdev;
1489 +
1490 +       /*rmii or rgmii*/
1491 +       if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII) {
1492 +               dev_info(dev, "init for RGMII\n");
1493 +               bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay,
1494 +                                           bsp_priv->rx_delay);
1495 +       } else if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
1496 +               dev_info(dev, "init for RMII\n");
1497 +               bsp_priv->ops->set_to_rmii(bsp_priv);
1498 +       } else {
1499 +               dev_err(dev, "NO interface defined!\n");
1500 +       }
1501 +
1502 +       gmac_clk_init(bsp_priv);
1503 +
1504 +       return bsp_priv;
1505 +}
1506 +
1507 +static int rk_gmac_init(struct platform_device *pdev, void *priv)
1508 +{
1509 +       struct rk_priv_data *bsp_priv = priv;
1510 +       int ret;
1511 +
1512 +       ret = phy_power_on(bsp_priv, true);
1513 +       if (ret)
1514 +               return ret;
1515 +
1516 +       ret = gmac_clk_enable(bsp_priv, true);
1517 +       if (ret)
1518 +               return ret;
1519 +
1520 +       return 0;
1521 +}
1522 +
1523 +static void rk_gmac_exit(struct platform_device *pdev, void *priv)
1524 +{
1525 +       struct rk_priv_data *gmac = priv;
1526 +
1527 +       phy_power_on(gmac, false);
1528 +       gmac_clk_enable(gmac, false);
1529 +}
1530 +
1531 +static void rk_fix_speed(void *priv, unsigned int speed)
1532 +{
1533 +       struct rk_priv_data *bsp_priv = priv;
1534 +       struct device *dev = &bsp_priv->pdev->dev;
1535 +
1536 +       if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII)
1537 +               bsp_priv->ops->set_rgmii_speed(bsp_priv, speed);
1538 +       else if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1539 +               bsp_priv->ops->set_rmii_speed(bsp_priv, speed);
1540 +       else
1541 +               dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface);
1542 +}
1543 +
1544 +static int rk_gmac_probe(struct platform_device *pdev)
1545 +{
1546 +       struct plat_stmmacenet_data *plat_dat;
1547 +       struct stmmac_resources stmmac_res;
1548 +       const struct rk_gmac_ops *data;
1549 +       int ret;
1550 +
1551 +       data = of_device_get_match_data(&pdev->dev);
1552 +       if (!data) {
1553 +               dev_err(&pdev->dev, "no of match data provided\n");
1554 +               return -EINVAL;
1555 +       }
1556 +
1557 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
1558 +       if (ret)
1559 +               return ret;
1560 +
1561 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
1562 +       if (IS_ERR(plat_dat))
1563 +               return PTR_ERR(plat_dat);
1564 +
1565 +       plat_dat->has_gmac = true;
1566 +       plat_dat->init = rk_gmac_init;
1567 +       plat_dat->exit = rk_gmac_exit;
1568 +       plat_dat->fix_mac_speed = rk_fix_speed;
1569 +
1570 +       plat_dat->bsp_priv = rk_gmac_setup(pdev, data);
1571 +       if (IS_ERR(plat_dat->bsp_priv))
1572 +               return PTR_ERR(plat_dat->bsp_priv);
1573 +
1574 +       ret = rk_gmac_init(pdev, plat_dat->bsp_priv);
1575 +       if (ret)
1576 +               return ret;
1577 +
1578 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
1579 +}
1580 +
1581 +static const struct of_device_id rk_gmac_dwmac_match[] = {
1582 +       { .compatible = "rockchip,rk3288-gmac", .data = &rk3288_ops },
1583 +       { .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops },
1584 +       { }
1585 +};
1586 +MODULE_DEVICE_TABLE(of, rk_gmac_dwmac_match);
1587 +
1588 +static struct platform_driver rk_gmac_dwmac_driver = {
1589 +       .probe  = rk_gmac_probe,
1590 +       .remove = stmmac_pltfr_remove,
1591 +       .driver = {
1592 +               .name           = "rk_gmac-dwmac",
1593 +               .pm             = &stmmac_pltfr_pm_ops,
1594 +               .of_match_table = rk_gmac_dwmac_match,
1595 +       },
1596 +};
1597 +module_platform_driver(rk_gmac_dwmac_driver);
1598 +
1599 +MODULE_AUTHOR("Chen-Zhi (Roger Chen) <roger.chen@rock-chips.com>");
1600 +MODULE_DESCRIPTION("Rockchip RK3288 DWMAC specific glue layer");
1601 +MODULE_LICENSE("GPL");
1602 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
1603 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
1604 @@ -23,7 +23,9 @@
1605  #include <linux/regmap.h>
1606  #include <linux/reset.h>
1607  #include <linux/stmmac.h>
1608 +
1609  #include "stmmac.h"
1610 +#include "stmmac_platform.h"
1611
1612  #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0
1613  #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1
1614 @@ -89,7 +91,9 @@ static int socfpga_dwmac_parse_data(stru
1615                                                   STMMAC_RESOURCE_NAME);
1616         if (IS_ERR(dwmac->stmmac_rst)) {
1617                 dev_info(dev, "Could not get reset control!\n");
1618 -               return -EINVAL;
1619 +               if (PTR_ERR(dwmac->stmmac_rst) == -EPROBE_DEFER)
1620 +                       return -EPROBE_DEFER;
1621 +               dwmac->stmmac_rst = NULL;
1622         }
1623
1624         dwmac->interface = of_get_phy_mode(np);
1625 @@ -171,31 +175,6 @@ static int socfpga_dwmac_setup(struct so
1626         return 0;
1627  }
1628
1629 -static void *socfpga_dwmac_probe(struct platform_device *pdev)
1630 -{
1631 -       struct device           *dev = &pdev->dev;
1632 -       int                     ret;
1633 -       struct socfpga_dwmac    *dwmac;
1634 -
1635 -       dwmac = devm_kzalloc(dev, sizeof(*dwmac), GFP_KERNEL);
1636 -       if (!dwmac)
1637 -               return ERR_PTR(-ENOMEM);
1638 -
1639 -       ret = socfpga_dwmac_parse_data(dwmac, dev);
1640 -       if (ret) {
1641 -               dev_err(dev, "Unable to parse OF data\n");
1642 -               return ERR_PTR(ret);
1643 -       }
1644 -
1645 -       ret = socfpga_dwmac_setup(dwmac);
1646 -       if (ret) {
1647 -               dev_err(dev, "couldn't setup SoC glue (%d)\n", ret);
1648 -               return ERR_PTR(ret);
1649 -       }
1650 -
1651 -       return dwmac;
1652 -}
1653 -
1654  static void socfpga_dwmac_exit(struct platform_device *pdev, void *priv)
1655  {
1656         struct socfpga_dwmac    *dwmac = priv;
1657 @@ -253,9 +232,65 @@ static int socfpga_dwmac_init(struct pla
1658         return ret;
1659  }
1660
1661 -const struct stmmac_of_data socfpga_gmac_data = {
1662 -       .setup = socfpga_dwmac_probe,
1663 -       .init = socfpga_dwmac_init,
1664 -       .exit = socfpga_dwmac_exit,
1665 -       .fix_mac_speed = socfpga_dwmac_fix_mac_speed,
1666 +static int socfpga_dwmac_probe(struct platform_device *pdev)
1667 +{
1668 +       struct plat_stmmacenet_data *plat_dat;
1669 +       struct stmmac_resources stmmac_res;
1670 +       struct device           *dev = &pdev->dev;
1671 +       int                     ret;
1672 +       struct socfpga_dwmac    *dwmac;
1673 +
1674 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
1675 +       if (ret)
1676 +               return ret;
1677 +
1678 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
1679 +       if (IS_ERR(plat_dat))
1680 +               return PTR_ERR(plat_dat);
1681 +
1682 +       dwmac = devm_kzalloc(dev, sizeof(*dwmac), GFP_KERNEL);
1683 +       if (!dwmac)
1684 +               return -ENOMEM;
1685 +
1686 +       ret = socfpga_dwmac_parse_data(dwmac, dev);
1687 +       if (ret) {
1688 +               dev_err(dev, "Unable to parse OF data\n");
1689 +               return ret;
1690 +       }
1691 +
1692 +       ret = socfpga_dwmac_setup(dwmac);
1693 +       if (ret) {
1694 +               dev_err(dev, "couldn't setup SoC glue (%d)\n", ret);
1695 +               return ret;
1696 +       }
1697 +
1698 +       plat_dat->bsp_priv = dwmac;
1699 +       plat_dat->init = socfpga_dwmac_init;
1700 +       plat_dat->exit = socfpga_dwmac_exit;
1701 +       plat_dat->fix_mac_speed = socfpga_dwmac_fix_mac_speed;
1702 +
1703 +       ret = socfpga_dwmac_init(pdev, plat_dat->bsp_priv);
1704 +       if (ret)
1705 +               return ret;
1706 +
1707 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
1708 +}
1709 +
1710 +static const struct of_device_id socfpga_dwmac_match[] = {
1711 +       { .compatible = "altr,socfpga-stmmac" },
1712 +       { }
1713  };
1714 +MODULE_DEVICE_TABLE(of, socfpga_dwmac_match);
1715 +
1716 +static struct platform_driver socfpga_dwmac_driver = {
1717 +       .probe  = socfpga_dwmac_probe,
1718 +       .remove = stmmac_pltfr_remove,
1719 +       .driver = {
1720 +               .name           = "socfpga-dwmac",
1721 +               .pm             = &stmmac_pltfr_pm_ops,
1722 +               .of_match_table = socfpga_dwmac_match,
1723 +       },
1724 +};
1725 +module_platform_driver(socfpga_dwmac_driver);
1726 +
1727 +MODULE_LICENSE("GPL v2");
1728 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
1729 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
1730 @@ -1,4 +1,4 @@
1731 -/**
1732 +/*
1733   * dwmac-sti.c - STMicroelectronics DWMAC Specific Glue layer
1734   *
1735   * Copyright (C) 2003-2014 STMicroelectronics (R&D) Limited
1736 @@ -17,11 +17,15 @@
1737  #include <linux/stmmac.h>
1738  #include <linux/phy.h>
1739  #include <linux/mfd/syscon.h>
1740 +#include <linux/module.h>
1741  #include <linux/regmap.h>
1742  #include <linux/clk.h>
1743  #include <linux/of.h>
1744 +#include <linux/of_device.h>
1745  #include <linux/of_net.h>
1746
1747 +#include "stmmac_platform.h"
1748 +
1749  #define DWMAC_125MHZ   125000000
1750  #define DWMAC_50MHZ    50000000
1751  #define DWMAC_25MHZ    25000000
1752 @@ -35,9 +39,8 @@
1753  #define IS_PHY_IF_MODE_GBIT(iface)     (IS_PHY_IF_MODE_RGMII(iface) || \
1754                                          iface == PHY_INTERFACE_MODE_GMII)
1755
1756 -/* STiH4xx register definitions (STiH415/STiH416/STiH407/STiH410 families) */
1757 -
1758 -/**
1759 +/* STiH4xx register definitions (STiH415/STiH416/STiH407/STiH410 families)
1760 + *
1761   * Below table summarizes the clock requirement and clock sources for
1762   * supported phy interface modes with link speeds.
1763   * ________________________________________________
1764 @@ -76,9 +79,7 @@
1765  #define STIH4XX_ETH_SEL_INTERNAL_NOTEXT_PHYCLK BIT(7)
1766  #define STIH4XX_ETH_SEL_TXCLK_NOT_CLK125       BIT(6)
1767
1768 -/* STiD127 register definitions */
1769 -
1770 -/**
1771 +/* STiD127 register definitions
1772   *-----------------------
1773   * src  |BIT(6)| BIT(7)|
1774   *-----------------------
1775 @@ -104,13 +105,13 @@
1776  #define EN_MASK                GENMASK(1, 1)
1777  #define EN             BIT(1)
1778
1779 -/**
1780 +/*
1781   * 3 bits [4:2]
1782   *     000-GMII/MII
1783   *     001-RGMII
1784   *     010-SGMII
1785   *     100-RMII
1786 -*/
1787 + */
1788  #define MII_PHY_SEL_MASK       GENMASK(4, 2)
1789  #define ETH_PHY_SEL_RMII       BIT(4)
1790  #define ETH_PHY_SEL_SGMII      BIT(3)
1791 @@ -123,11 +124,16 @@ struct sti_dwmac {
1792         bool ext_phyclk;        /* Clock from external PHY */
1793         u32 tx_retime_src;      /* TXCLK Retiming*/
1794         struct clk *clk;        /* PHY clock */
1795 -       int ctrl_reg;           /* GMAC glue-logic control register */
1796 +       u32 ctrl_reg;           /* GMAC glue-logic control register */
1797         int clk_sel_reg;        /* GMAC ext clk selection register */
1798         struct device *dev;
1799         struct regmap *regmap;
1800         u32 speed;
1801 +       void (*fix_retime_src)(void *priv, unsigned int speed);
1802 +};
1803 +
1804 +struct sti_dwmac_of_data {
1805 +       void (*fix_retime_src)(void *priv, unsigned int speed);
1806  };
1807
1808  static u32 phy_intf_sels[] = {
1809 @@ -222,8 +228,9 @@ static void stid127_fix_retime_src(void
1810         regmap_update_bits(dwmac->regmap, reg, STID127_RETIME_SRC_MASK, val);
1811  }
1812
1813 -static void sti_dwmac_ctrl_init(struct sti_dwmac *dwmac)
1814 +static int sti_dwmac_init(struct platform_device *pdev, void *priv)
1815  {
1816 +       struct sti_dwmac *dwmac = priv;
1817         struct regmap *regmap = dwmac->regmap;
1818         int iface = dwmac->interface;
1819         struct device *dev = dwmac->dev;
1820 @@ -241,28 +248,8 @@ static void sti_dwmac_ctrl_init(struct s
1821
1822         val = (iface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;
1823         regmap_update_bits(regmap, reg, ENMII_MASK, val);
1824 -}
1825
1826 -static int stix4xx_init(struct platform_device *pdev, void *priv)
1827 -{
1828 -       struct sti_dwmac *dwmac = priv;
1829 -       u32 spd = dwmac->speed;
1830 -
1831 -       sti_dwmac_ctrl_init(dwmac);
1832 -
1833 -       stih4xx_fix_retime_src(priv, spd);
1834 -
1835 -       return 0;
1836 -}
1837 -
1838 -static int stid127_init(struct platform_device *pdev, void *priv)
1839 -{
1840 -       struct sti_dwmac *dwmac = priv;
1841 -       u32 spd = dwmac->speed;
1842 -
1843 -       sti_dwmac_ctrl_init(dwmac);
1844 -
1845 -       stid127_fix_retime_src(priv, spd);
1846 +       dwmac->fix_retime_src(priv, dwmac->speed);
1847
1848         return 0;
1849  }
1850 @@ -286,11 +273,6 @@ static int sti_dwmac_parse_data(struct s
1851         if (!np)
1852                 return -EINVAL;
1853
1854 -       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sti-ethconf");
1855 -       if (!res)
1856 -               return -ENODATA;
1857 -       dwmac->ctrl_reg = res->start;
1858 -
1859         /* clk selection from extra syscfg register */
1860         dwmac->clk_sel_reg = -ENXIO;
1861         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sti-clkconf");
1862 @@ -301,6 +283,12 @@ static int sti_dwmac_parse_data(struct s
1863         if (IS_ERR(regmap))
1864                 return PTR_ERR(regmap);
1865
1866 +       err = of_property_read_u32_index(np, "st,syscon", 1, &dwmac->ctrl_reg);
1867 +       if (err) {
1868 +               dev_err(dev, "Can't get sysconfig ctrl offset (%d)\n", err);
1869 +               return err;
1870 +       }
1871 +
1872         dwmac->dev = dev;
1873         dwmac->interface = of_get_phy_mode(np);
1874         dwmac->regmap = regmap;
1875 @@ -310,16 +298,16 @@ static int sti_dwmac_parse_data(struct s
1876
1877         if (IS_PHY_IF_MODE_GBIT(dwmac->interface)) {
1878                 const char *rs;
1879 -               dwmac->tx_retime_src = TX_RETIME_SRC_CLKGEN;
1880
1881                 err = of_property_read_string(np, "st,tx-retime-src", &rs);
1882 -               if (err < 0)
1883 +               if (err < 0) {
1884                         dev_warn(dev, "Use internal clock source\n");
1885 -
1886 -               if (!strcasecmp(rs, "clk_125"))
1887 +                       dwmac->tx_retime_src = TX_RETIME_SRC_CLKGEN;
1888 +               } else if (!strcasecmp(rs, "clk_125")) {
1889                         dwmac->tx_retime_src = TX_RETIME_SRC_CLK_125;
1890 -               else if (!strcasecmp(rs, "txclk"))
1891 +               } else if (!strcasecmp(rs, "txclk")) {
1892                         dwmac->tx_retime_src = TX_RETIME_SRC_TXCLK;
1893 +               }
1894
1895                 dwmac->speed = SPEED_1000;
1896         }
1897 @@ -333,34 +321,80 @@ static int sti_dwmac_parse_data(struct s
1898         return 0;
1899  }
1900
1901 -static void *sti_dwmac_setup(struct platform_device *pdev)
1902 +static int sti_dwmac_probe(struct platform_device *pdev)
1903  {
1904 +       struct plat_stmmacenet_data *plat_dat;
1905 +       const struct sti_dwmac_of_data *data;
1906 +       struct stmmac_resources stmmac_res;
1907         struct sti_dwmac *dwmac;
1908         int ret;
1909
1910 +       data = of_device_get_match_data(&pdev->dev);
1911 +       if (!data) {
1912 +               dev_err(&pdev->dev, "No OF match data provided\n");
1913 +               return -EINVAL;
1914 +       }
1915 +
1916 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
1917 +       if (ret)
1918 +               return ret;
1919 +
1920 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
1921 +       if (IS_ERR(plat_dat))
1922 +               return PTR_ERR(plat_dat);
1923 +
1924         dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
1925         if (!dwmac)
1926 -               return ERR_PTR(-ENOMEM);
1927 +               return -ENOMEM;
1928
1929         ret = sti_dwmac_parse_data(dwmac, pdev);
1930         if (ret) {
1931                 dev_err(&pdev->dev, "Unable to parse OF data\n");
1932 -               return ERR_PTR(ret);
1933 +               return ret;
1934         }
1935
1936 -       return dwmac;
1937 +       dwmac->fix_retime_src = data->fix_retime_src;
1938 +
1939 +       plat_dat->bsp_priv = dwmac;
1940 +       plat_dat->init = sti_dwmac_init;
1941 +       plat_dat->exit = sti_dwmac_exit;
1942 +       plat_dat->fix_mac_speed = data->fix_retime_src;
1943 +
1944 +       ret = sti_dwmac_init(pdev, plat_dat->bsp_priv);
1945 +       if (ret)
1946 +               return ret;
1947 +
1948 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
1949  }
1950
1951 -const struct stmmac_of_data stih4xx_dwmac_data = {
1952 -       .fix_mac_speed = stih4xx_fix_retime_src,
1953 -       .setup = sti_dwmac_setup,
1954 -       .init = stix4xx_init,
1955 -       .exit = sti_dwmac_exit,
1956 +static const struct sti_dwmac_of_data stih4xx_dwmac_data = {
1957 +       .fix_retime_src = stih4xx_fix_retime_src,
1958  };
1959
1960 -const struct stmmac_of_data stid127_dwmac_data = {
1961 -       .fix_mac_speed = stid127_fix_retime_src,
1962 -       .setup = sti_dwmac_setup,
1963 -       .init = stid127_init,
1964 -       .exit = sti_dwmac_exit,
1965 +static const struct sti_dwmac_of_data stid127_dwmac_data = {
1966 +       .fix_retime_src = stid127_fix_retime_src,
1967  };
1968 +
1969 +static const struct of_device_id sti_dwmac_match[] = {
1970 +       { .compatible = "st,stih415-dwmac", .data = &stih4xx_dwmac_data},
1971 +       { .compatible = "st,stih416-dwmac", .data = &stih4xx_dwmac_data},
1972 +       { .compatible = "st,stid127-dwmac", .data = &stid127_dwmac_data},
1973 +       { .compatible = "st,stih407-dwmac", .data = &stih4xx_dwmac_data},
1974 +       { }
1975 +};
1976 +MODULE_DEVICE_TABLE(of, sti_dwmac_match);
1977 +
1978 +static struct platform_driver sti_dwmac_driver = {
1979 +       .probe  = sti_dwmac_probe,
1980 +       .remove = stmmac_pltfr_remove,
1981 +       .driver = {
1982 +               .name           = "sti-dwmac",
1983 +               .pm             = &stmmac_pltfr_pm_ops,
1984 +               .of_match_table = sti_dwmac_match,
1985 +       },
1986 +};
1987 +module_platform_driver(sti_dwmac_driver);
1988 +
1989 +MODULE_AUTHOR("Srinivas Kandagatla <srinivas.kandagatla@st.com>");
1990 +MODULE_DESCRIPTION("STMicroelectronics DWMAC Specific Glue layer");
1991 +MODULE_LICENSE("GPL");
1992 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
1993 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
1994 @@ -1,4 +1,4 @@
1995 -/**
1996 +/*
1997   * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer
1998   *
1999   * Copyright (C) 2013 Chen-Yu Tsai
2000 @@ -18,10 +18,14 @@
2001
2002  #include <linux/stmmac.h>
2003  #include <linux/clk.h>
2004 +#include <linux/module.h>
2005  #include <linux/phy.h>
2006 +#include <linux/platform_device.h>
2007  #include <linux/of_net.h>
2008  #include <linux/regulator/consumer.h>
2009
2010 +#include "stmmac_platform.h"
2011 +
2012  struct sunxi_priv_data {
2013         int interface;
2014         int clk_enabled;
2015 @@ -29,35 +33,6 @@ struct sunxi_priv_data {
2016         struct regulator *regulator;
2017  };
2018
2019 -static void *sun7i_gmac_setup(struct platform_device *pdev)
2020 -{
2021 -       struct sunxi_priv_data *gmac;
2022 -       struct device *dev = &pdev->dev;
2023 -
2024 -       gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL);
2025 -       if (!gmac)
2026 -               return ERR_PTR(-ENOMEM);
2027 -
2028 -       gmac->interface = of_get_phy_mode(dev->of_node);
2029 -
2030 -       gmac->tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");
2031 -       if (IS_ERR(gmac->tx_clk)) {
2032 -               dev_err(dev, "could not get tx clock\n");
2033 -               return gmac->tx_clk;
2034 -       }
2035 -
2036 -       /* Optional regulator for PHY */
2037 -       gmac->regulator = devm_regulator_get_optional(dev, "phy");
2038 -       if (IS_ERR(gmac->regulator)) {
2039 -               if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
2040 -                       return ERR_PTR(-EPROBE_DEFER);
2041 -               dev_info(dev, "no regulator found\n");
2042 -               gmac->regulator = NULL;
2043 -       }
2044 -
2045 -       return gmac;
2046 -}
2047 -
2048  #define SUN7I_GMAC_GMII_RGMII_RATE     125000000
2049  #define SUN7I_GMAC_MII_RATE            25000000
2050
2051 @@ -128,13 +103,76 @@ static void sun7i_fix_speed(void *priv,
2052         }
2053  }
2054
2055 -/* of_data specifying hardware features and callbacks.
2056 - * hardware features were copied from Allwinner drivers. */
2057 -const struct stmmac_of_data sun7i_gmac_data = {
2058 -       .has_gmac = 1,
2059 -       .tx_coe = 1,
2060 -       .fix_mac_speed = sun7i_fix_speed,
2061 -       .setup = sun7i_gmac_setup,
2062 -       .init = sun7i_gmac_init,
2063 -       .exit = sun7i_gmac_exit,
2064 +static int sun7i_gmac_probe(struct platform_device *pdev)
2065 +{
2066 +       struct plat_stmmacenet_data *plat_dat;
2067 +       struct stmmac_resources stmmac_res;
2068 +       struct sunxi_priv_data *gmac;
2069 +       struct device *dev = &pdev->dev;
2070 +       int ret;
2071 +
2072 +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
2073 +       if (ret)
2074 +               return ret;
2075 +
2076 +       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
2077 +       if (IS_ERR(plat_dat))
2078 +               return PTR_ERR(plat_dat);
2079 +
2080 +       gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL);
2081 +       if (!gmac)
2082 +               return -ENOMEM;
2083 +
2084 +       gmac->interface = of_get_phy_mode(dev->of_node);
2085 +
2086 +       gmac->tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");
2087 +       if (IS_ERR(gmac->tx_clk)) {
2088 +               dev_err(dev, "could not get tx clock\n");
2089 +               return PTR_ERR(gmac->tx_clk);
2090 +       }
2091 +
2092 +       /* Optional regulator for PHY */
2093 +       gmac->regulator = devm_regulator_get_optional(dev, "phy");
2094 +       if (IS_ERR(gmac->regulator)) {
2095 +               if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
2096 +                       return -EPROBE_DEFER;
2097 +               dev_info(dev, "no regulator found\n");
2098 +               gmac->regulator = NULL;
2099 +       }
2100 +
2101 +       /* platform data specifying hardware features and callbacks.
2102 +        * hardware features were copied from Allwinner drivers. */
2103 +       plat_dat->tx_coe = 1;
2104 +       plat_dat->has_gmac = true;
2105 +       plat_dat->bsp_priv = gmac;
2106 +       plat_dat->init = sun7i_gmac_init;
2107 +       plat_dat->exit = sun7i_gmac_exit;
2108 +       plat_dat->fix_mac_speed = sun7i_fix_speed;
2109 +
2110 +       ret = sun7i_gmac_init(pdev, plat_dat->bsp_priv);
2111 +       if (ret)
2112 +               return ret;
2113 +
2114 +       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
2115 +}
2116 +
2117 +static const struct of_device_id sun7i_dwmac_match[] = {
2118 +       { .compatible = "allwinner,sun7i-a20-gmac" },
2119 +       { }
2120  };
2121 +MODULE_DEVICE_TABLE(of, sun7i_dwmac_match);
2122 +
2123 +static struct platform_driver sun7i_dwmac_driver = {
2124 +       .probe  = sun7i_gmac_probe,
2125 +       .remove = stmmac_pltfr_remove,
2126 +       .driver = {
2127 +               .name           = "sun7i-dwmac",
2128 +               .pm             = &stmmac_pltfr_pm_ops,
2129 +               .of_match_table = sun7i_dwmac_match,
2130 +       },
2131 +};
2132 +module_platform_driver(sun7i_dwmac_driver);
2133 +
2134 +MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
2135 +MODULE_DESCRIPTION("Allwinner sunxi DWMAC specific glue layer");
2136 +MODULE_LICENSE("GPL");
2137 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
2138 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
2139 @@ -172,6 +172,7 @@ enum inter_frame_gap {
2140  /* GMAC FLOW CTRL defines */
2141  #define GMAC_FLOW_CTRL_PT_MASK 0xffff0000      /* Pause Time Mask */
2142  #define GMAC_FLOW_CTRL_PT_SHIFT        16
2143 +#define GMAC_FLOW_CTRL_UP      0x00000008      /* Unicast pause frame enable */
2144  #define GMAC_FLOW_CTRL_RFE     0x00000004      /* Rx Flow Control Enable */
2145  #define GMAC_FLOW_CTRL_TFE     0x00000002      /* Tx Flow Control Enable */
2146  #define GMAC_FLOW_CTRL_FCB_BPA 0x00000001      /* Flow Control Busy ... */
2147 @@ -246,6 +247,56 @@ enum ttc_control {
2148  #define DMA_CONTROL_FEF                0x00000080
2149  #define DMA_CONTROL_FUF                0x00000040
2150
2151 +/* Receive flow control activation field
2152 + * RFA field in DMA control register, bits 23,10:9
2153 + */
2154 +#define DMA_CONTROL_RFA_MASK   0x00800600
2155 +
2156 +/* Receive flow control deactivation field
2157 + * RFD field in DMA control register, bits 22,12:11
2158 + */
2159 +#define DMA_CONTROL_RFD_MASK   0x00401800
2160 +
2161 +/* RFD and RFA fields are encoded as follows
2162 + *
2163 + *   Bit Field
2164 + *   0,00 - Full minus 1KB (only valid when rxfifo >= 4KB and EFC enabled)
2165 + *   0,01 - Full minus 2KB (only valid when rxfifo >= 4KB and EFC enabled)
2166 + *   0,10 - Full minus 3KB (only valid when rxfifo >= 4KB and EFC enabled)
2167 + *   0,11 - Full minus 4KB (only valid when rxfifo > 4KB and EFC enabled)
2168 + *   1,00 - Full minus 5KB (only valid when rxfifo > 8KB and EFC enabled)
2169 + *   1,01 - Full minus 6KB (only valid when rxfifo > 8KB and EFC enabled)
2170 + *   1,10 - Full minus 7KB (only valid when rxfifo > 8KB and EFC enabled)
2171 + *   1,11 - Reserved
2172 + *
2173 + * RFD should always be > RFA for a given FIFO size. RFD == RFA may work,
2174 + * but packet throughput performance may not be as expected.
2175 + *
2176 + * Be sure that bit 3 in GMAC Register 6 is set for Unicast Pause frame
2177 + * detection (IEEE Specification Requirement, Annex 31B, 31B.1, Pause
2178 + * Description).
2179 + *
2180 + * Be sure that DZPA (bit 7 in Flow Control Register, GMAC Register 6),
2181 + * is set to 0. This allows pause frames with a quanta of 0 to be sent
2182 + * as an XOFF message to the link peer.
2183 + */
2184 +
2185 +#define RFA_FULL_MINUS_1K      0x00000000
2186 +#define RFA_FULL_MINUS_2K      0x00000200
2187 +#define RFA_FULL_MINUS_3K      0x00000400
2188 +#define RFA_FULL_MINUS_4K      0x00000600
2189 +#define RFA_FULL_MINUS_5K      0x00800000
2190 +#define RFA_FULL_MINUS_6K      0x00800200
2191 +#define RFA_FULL_MINUS_7K      0x00800400
2192 +
2193 +#define RFD_FULL_MINUS_1K      0x00000000
2194 +#define RFD_FULL_MINUS_2K      0x00000800
2195 +#define RFD_FULL_MINUS_3K      0x00001000
2196 +#define RFD_FULL_MINUS_4K      0x00001800
2197 +#define RFD_FULL_MINUS_5K      0x00400000
2198 +#define RFD_FULL_MINUS_6K      0x00400800
2199 +#define RFD_FULL_MINUS_7K      0x00401000
2200 +
2201  enum rtc_control {
2202         DMA_CONTROL_RTC_64 = 0x00000000,
2203         DMA_CONTROL_RTC_32 = 0x00000008,
2204 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
2205 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
2206 @@ -201,7 +201,10 @@ static void dwmac1000_flow_ctrl(struct m
2207                                 unsigned int fc, unsigned int pause_time)
2208  {
2209         void __iomem *ioaddr = hw->pcsr;
2210 -       unsigned int flow = 0;
2211 +       /* Set flow such that DZPQ in Mac Register 6 is 0,
2212 +        * and unicast pause detect is enabled.
2213 +        */
2214 +       unsigned int flow = GMAC_FLOW_CTRL_UP;
2215
2216         pr_debug("GMAC Flow-Control:\n");
2217         if (fc & FLOW_RX) {
2218 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
2219 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
2220 @@ -70,10 +70,6 @@ static int dwmac1000_dma_init(void __iom
2221         if (mb)
2222                 value |= DMA_BUS_MODE_MB;
2223
2224 -#ifdef CONFIG_STMMAC_DA
2225 -       value |= DMA_BUS_MODE_DA;       /* Rx has priority over tx */
2226 -#endif
2227 -
2228         if (atds)
2229                 value |= DMA_BUS_MODE_ATDS;
2230
2231 @@ -110,8 +106,29 @@ static int dwmac1000_dma_init(void __iom
2232         return 0;
2233  }
2234
2235 +static u32 dwmac1000_configure_fc(u32 csr6, int rxfifosz)
2236 +{
2237 +       csr6 &= ~DMA_CONTROL_RFA_MASK;
2238 +       csr6 &= ~DMA_CONTROL_RFD_MASK;
2239 +
2240 +       /* Leave flow control disabled if receive fifo size is less than
2241 +        * 4K or 0. Otherwise, send XOFF when fifo is 1K less than full,
2242 +        * and send XON when 2K less than full.
2243 +        */
2244 +       if (rxfifosz < 4096) {
2245 +               csr6 &= ~DMA_CONTROL_EFC;
2246 +               pr_debug("GMAC: disabling flow control, rxfifo too small(%d)\n",
2247 +                        rxfifosz);
2248 +       } else {
2249 +               csr6 |= DMA_CONTROL_EFC;
2250 +               csr6 |= RFA_FULL_MINUS_1K;
2251 +               csr6 |= RFD_FULL_MINUS_2K;
2252 +       }
2253 +       return csr6;
2254 +}
2255 +
2256  static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode,
2257 -                                        int rxmode)
2258 +                                        int rxmode, int rxfifosz)
2259  {
2260         u32 csr6 = readl(ioaddr + DMA_CONTROL);
2261
2262 @@ -157,6 +174,9 @@ static void dwmac1000_dma_operation_mode
2263                         csr6 |= DMA_CONTROL_RTC_128;
2264         }
2265
2266 +       /* Configure flow control based on rx fifo size */
2267 +       csr6 = dwmac1000_configure_fc(csr6, rxfifosz);
2268 +
2269         writel(csr6, ioaddr + DMA_CONTROL);
2270  }
2271
2272 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
2273 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
2274 @@ -72,7 +72,7 @@ static int dwmac100_dma_init(void __iome
2275   * control register.
2276   */
2277  static void dwmac100_dma_operation_mode(void __iomem *ioaddr, int txmode,
2278 -                                       int rxmode)
2279 +                                       int rxmode, int rxfifosz)
2280  {
2281         u32 csr6 = readl(ioaddr + DMA_CONTROL);
2282
2283 --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
2284 +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
2285 @@ -73,7 +73,7 @@
2286  #define MMC_RX_OCTETCOUNT_G            0x00000188
2287  #define MMC_RX_BROADCASTFRAME_G                0x0000018c
2288  #define MMC_RX_MULTICASTFRAME_G                0x00000190
2289 -#define MMC_RX_CRC_ERRROR              0x00000194
2290 +#define MMC_RX_CRC_ERROR               0x00000194
2291  #define MMC_RX_ALIGN_ERROR             0x00000198
2292  #define MMC_RX_RUN_ERROR               0x0000019C
2293  #define MMC_RX_JABBER_ERROR            0x000001A0
2294 @@ -196,7 +196,7 @@ void dwmac_mmc_read(void __iomem *ioaddr
2295         mmc->mmc_rx_octetcount_g += readl(ioaddr + MMC_RX_OCTETCOUNT_G);
2296         mmc->mmc_rx_broadcastframe_g += readl(ioaddr + MMC_RX_BROADCASTFRAME_G);
2297         mmc->mmc_rx_multicastframe_g += readl(ioaddr + MMC_RX_MULTICASTFRAME_G);
2298 -       mmc->mmc_rx_crc_error += readl(ioaddr + MMC_RX_CRC_ERRROR);
2299 +       mmc->mmc_rx_crc_error += readl(ioaddr + MMC_RX_CRC_ERROR);
2300         mmc->mmc_rx_align_error += readl(ioaddr + MMC_RX_ALIGN_ERROR);
2301         mmc->mmc_rx_run_error += readl(ioaddr + MMC_RX_RUN_ERROR);
2302         mmc->mmc_rx_jabber_error += readl(ioaddr + MMC_RX_JABBER_ERROR);
2303 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
2304 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
2305 @@ -34,6 +34,14 @@
2306  #include <linux/ptp_clock_kernel.h>
2307  #include <linux/reset.h>
2308
2309 +struct stmmac_resources {
2310 +       void __iomem *addr;
2311 +       const char *mac;
2312 +       int wol_irq;
2313 +       int lpi_irq;
2314 +       int irq;
2315 +};
2316 +
2317  struct stmmac_tx_info {
2318         dma_addr_t buf;
2319         bool map_as_page;
2320 @@ -97,6 +105,7 @@ struct stmmac_priv {
2321         int wolopts;
2322         int wol_irq;
2323         struct clk *stmmac_clk;
2324 +       struct clk *pclk;
2325         struct reset_control *stmmac_rst;
2326         int clk_csr;
2327         struct timer_list eee_ctrl_timer;
2328 @@ -116,97 +125,28 @@ struct stmmac_priv {
2329         int use_riwt;
2330         int irq_wake;
2331         spinlock_t ptp_lock;
2332 +
2333 +#ifdef CONFIG_DEBUG_FS
2334 +       struct dentry *dbgfs_dir;
2335 +       struct dentry *dbgfs_rings_status;
2336 +       struct dentry *dbgfs_dma_cap;
2337 +#endif
2338  };
2339
2340  int stmmac_mdio_unregister(struct net_device *ndev);
2341  int stmmac_mdio_register(struct net_device *ndev);
2342  int stmmac_mdio_reset(struct mii_bus *mii);
2343  void stmmac_set_ethtool_ops(struct net_device *netdev);
2344 -extern const struct stmmac_desc_ops enh_desc_ops;
2345 -extern const struct stmmac_desc_ops ndesc_ops;
2346 -extern const struct stmmac_hwtimestamp stmmac_ptp;
2347 +
2348  int stmmac_ptp_register(struct stmmac_priv *priv);
2349  void stmmac_ptp_unregister(struct stmmac_priv *priv);
2350  int stmmac_resume(struct net_device *ndev);
2351  int stmmac_suspend(struct net_device *ndev);
2352  int stmmac_dvr_remove(struct net_device *ndev);
2353 -struct stmmac_priv *stmmac_dvr_probe(struct device *device,
2354 -                                    struct plat_stmmacenet_data *plat_dat,
2355 -                                    void __iomem *addr);
2356 +int stmmac_dvr_probe(struct device *device,
2357 +                    struct plat_stmmacenet_data *plat_dat,
2358 +                    struct stmmac_resources *res);
2359  void stmmac_disable_eee_mode(struct stmmac_priv *priv);
2360  bool stmmac_eee_init(struct stmmac_priv *priv);
2361
2362 -#ifdef CONFIG_STMMAC_PLATFORM
2363 -#ifdef CONFIG_DWMAC_MESON
2364 -extern const struct stmmac_of_data meson6_dwmac_data;
2365 -#endif
2366 -#ifdef CONFIG_DWMAC_SUNXI
2367 -extern const struct stmmac_of_data sun7i_gmac_data;
2368 -#endif
2369 -#ifdef CONFIG_DWMAC_STI
2370 -extern const struct stmmac_of_data stih4xx_dwmac_data;
2371 -extern const struct stmmac_of_data stid127_dwmac_data;
2372 -#endif
2373 -#ifdef CONFIG_DWMAC_SOCFPGA
2374 -extern const struct stmmac_of_data socfpga_gmac_data;
2375 -#endif
2376 -extern struct platform_driver stmmac_pltfr_driver;
2377 -static inline int stmmac_register_platform(void)
2378 -{
2379 -       int err;
2380 -
2381 -       err = platform_driver_register(&stmmac_pltfr_driver);
2382 -       if (err)
2383 -               pr_err("stmmac: failed to register the platform driver\n");
2384 -
2385 -       return err;
2386 -}
2387 -
2388 -static inline void stmmac_unregister_platform(void)
2389 -{
2390 -       platform_driver_unregister(&stmmac_pltfr_driver);
2391 -}
2392 -#else
2393 -static inline int stmmac_register_platform(void)
2394 -{
2395 -       pr_debug("stmmac: do not register the platf driver\n");
2396 -
2397 -       return 0;
2398 -}
2399 -
2400 -static inline void stmmac_unregister_platform(void)
2401 -{
2402 -}
2403 -#endif /* CONFIG_STMMAC_PLATFORM */
2404 -
2405 -#ifdef CONFIG_STMMAC_PCI
2406 -extern struct pci_driver stmmac_pci_driver;
2407 -static inline int stmmac_register_pci(void)
2408 -{
2409 -       int err;
2410 -
2411 -       err = pci_register_driver(&stmmac_pci_driver);
2412 -       if (err)
2413 -               pr_err("stmmac: failed to register the PCI driver\n");
2414 -
2415 -       return err;
2416 -}
2417 -
2418 -static inline void stmmac_unregister_pci(void)
2419 -{
2420 -       pci_unregister_driver(&stmmac_pci_driver);
2421 -}
2422 -#else
2423 -static inline int stmmac_register_pci(void)
2424 -{
2425 -       pr_debug("stmmac: do not register the PCI driver\n");
2426 -
2427 -       return 0;
2428 -}
2429 -
2430 -static inline void stmmac_unregister_pci(void)
2431 -{
2432 -}
2433 -#endif /* CONFIG_STMMAC_PCI */
2434 -
2435  #endif /* __STMMAC_H__ */
2436 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
2437 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
2438 @@ -696,7 +696,7 @@ static int stmmac_set_coalesce(struct ne
2439             (ec->tx_max_coalesced_frames == 0))
2440                 return -EINVAL;
2441
2442 -       if ((ec->tx_coalesce_usecs > STMMAC_COAL_TX_TIMER) ||
2443 +       if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
2444             (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
2445                 return -EINVAL;
2446
2447 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
2448 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
2449 @@ -44,14 +44,15 @@
2450  #include <linux/slab.h>
2451  #include <linux/prefetch.h>
2452  #include <linux/pinctrl/consumer.h>
2453 -#ifdef CONFIG_STMMAC_DEBUG_FS
2454 +#ifdef CONFIG_DEBUG_FS
2455  #include <linux/debugfs.h>
2456  #include <linux/seq_file.h>
2457 -#endif /* CONFIG_STMMAC_DEBUG_FS */
2458 +#endif /* CONFIG_DEBUG_FS */
2459  #include <linux/net_tstamp.h>
2460  #include "stmmac_ptp.h"
2461  #include "stmmac.h"
2462  #include <linux/reset.h>
2463 +#include <linux/of_mdio.h>
2464
2465  #define STMMAC_ALIGN(x)        L1_CACHE_ALIGN(x)
2466
2467 @@ -116,17 +117,17 @@ MODULE_PARM_DESC(chain_mode, "To use cha
2468
2469  static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
2470
2471 -#ifdef CONFIG_STMMAC_DEBUG_FS
2472 +#ifdef CONFIG_DEBUG_FS
2473  static int stmmac_init_fs(struct net_device *dev);
2474 -static void stmmac_exit_fs(void);
2475 +static void stmmac_exit_fs(struct net_device *dev);
2476  #endif
2477
2478  #define STMMAC_COAL_TIMER(x) (jiffies + usecs_to_jiffies(x))
2479
2480  /**
2481   * stmmac_verify_args - verify the driver parameters.
2482 - * Description: it verifies if some wrong parameter is passed to the driver.
2483 - * Note that wrong parameters are replaced with the default values.
2484 + * Description: it checks the driver parameters and set a default in case of
2485 + * errors.
2486   */
2487  static void stmmac_verify_args(void)
2488  {
2489 @@ -191,14 +192,8 @@ static void stmmac_clk_csr_set(struct st
2490
2491  static void print_pkt(unsigned char *buf, int len)
2492  {
2493 -       int j;
2494 -       pr_debug("len = %d byte, buf addr: 0x%p", len, buf);
2495 -       for (j = 0; j < len; j++) {
2496 -               if ((j % 16) == 0)
2497 -                       pr_debug("\n %03x:", j);
2498 -               pr_debug(" %02x", buf[j]);
2499 -       }
2500 -       pr_debug("\n");
2501 +       pr_debug("len = %d byte, buf addr: 0x%p\n", len, buf);
2502 +       print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
2503  }
2504
2505  /* minimum number of free TX descriptors required to wake up TX process */
2506 @@ -210,7 +205,7 @@ static inline u32 stmmac_tx_avail(struct
2507  }
2508
2509  /**
2510 - * stmmac_hw_fix_mac_speed: callback for speed selection
2511 + * stmmac_hw_fix_mac_speed - callback for speed selection
2512   * @priv: driver private structure
2513   * Description: on some platforms (e.g. ST), some HW system configuraton
2514   * registers have to be set according to the link speed negotiated.
2515 @@ -224,9 +219,10 @@ static inline void stmmac_hw_fix_mac_spe
2516  }
2517
2518  /**
2519 - * stmmac_enable_eee_mode: Check and enter in LPI mode
2520 + * stmmac_enable_eee_mode - check and enter in LPI mode
2521   * @priv: driver private structure
2522 - * Description: this function is to verify and enter in LPI mode for EEE.
2523 + * Description: this function is to verify and enter in LPI mode in case of
2524 + * EEE.
2525   */
2526  static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
2527  {
2528 @@ -237,7 +233,7 @@ static void stmmac_enable_eee_mode(struc
2529  }
2530
2531  /**
2532 - * stmmac_disable_eee_mode: disable/exit from EEE
2533 + * stmmac_disable_eee_mode - disable and exit from LPI mode
2534   * @priv: driver private structure
2535   * Description: this function is to exit and disable EEE in case of
2536   * LPI state is true. This is called by the xmit.
2537 @@ -250,7 +246,7 @@ void stmmac_disable_eee_mode(struct stmm
2538  }
2539
2540  /**
2541 - * stmmac_eee_ctrl_timer: EEE TX SW timer.
2542 + * stmmac_eee_ctrl_timer - EEE TX SW timer.
2543   * @arg : data hook
2544   * Description:
2545   *  if there is no data transfer and if we are not in LPI state,
2546 @@ -265,13 +261,12 @@ static void stmmac_eee_ctrl_timer(unsign
2547  }
2548
2549  /**
2550 - * stmmac_eee_init: init EEE
2551 + * stmmac_eee_init - init EEE
2552   * @priv: driver private structure
2553   * Description:
2554 - *  If the EEE support has been enabled while configuring the driver,
2555 - *  if the GMAC actually supports the EEE (from the HW cap reg) and the
2556 - *  phy can also manage EEE, so enable the LPI state and start the timer
2557 - *  to verify if the tx path can enter in LPI state.
2558 + *  if the GMAC supports the EEE (from the HW cap reg) and the phy device
2559 + *  can also manage EEE, this function enable the LPI state and start related
2560 + *  timer.
2561   */
2562  bool stmmac_eee_init(struct stmmac_priv *priv)
2563  {
2564 @@ -316,11 +311,11 @@ bool stmmac_eee_init(struct stmmac_priv
2565                 spin_lock_irqsave(&priv->lock, flags);
2566                 if (!priv->eee_active) {
2567                         priv->eee_active = 1;
2568 -                       init_timer(&priv->eee_ctrl_timer);
2569 -                       priv->eee_ctrl_timer.function = stmmac_eee_ctrl_timer;
2570 -                       priv->eee_ctrl_timer.data = (unsigned long)priv;
2571 -                       priv->eee_ctrl_timer.expires = STMMAC_LPI_T(eee_timer);
2572 -                       add_timer(&priv->eee_ctrl_timer);
2573 +                       setup_timer(&priv->eee_ctrl_timer,
2574 +                                   stmmac_eee_ctrl_timer,
2575 +                                   (unsigned long)priv);
2576 +                       mod_timer(&priv->eee_ctrl_timer,
2577 +                                 STMMAC_LPI_T(eee_timer));
2578
2579                         priv->hw->mac->set_eee_timer(priv->hw,
2580                                                      STMMAC_DEFAULT_LIT_LS,
2581 @@ -338,7 +333,7 @@ out:
2582         return ret;
2583  }
2584
2585 -/* stmmac_get_tx_hwtstamp: get HW TX timestamps
2586 +/* stmmac_get_tx_hwtstamp - get HW TX timestamps
2587   * @priv: driver private structure
2588   * @entry : descriptor index to be used.
2589   * @skb : the socket buffer
2590 @@ -380,7 +375,7 @@ static void stmmac_get_tx_hwtstamp(struc
2591         return;
2592  }
2593
2594 -/* stmmac_get_rx_hwtstamp: get HW RX timestamps
2595 +/* stmmac_get_rx_hwtstamp - get HW RX timestamps
2596   * @priv: driver private structure
2597   * @entry : descriptor index to be used.
2598   * @skb : the socket buffer
2599 @@ -615,7 +610,7 @@ static int stmmac_hwtstamp_ioctl(struct
2600                  * where, freq_div_ratio = clk_ptp_ref_i/50MHz
2601                  * hence, addend = ((2^32) * 50MHz)/clk_ptp_ref_i;
2602                  * NOTE: clk_ptp_ref_i should be >= 50MHz to
2603 -                *       achive 20ns accuracy.
2604 +                *       achieve 20ns accuracy.
2605                  *
2606                  * 2^x * y == (y << x), hence
2607                  * 2^32 * 50000000 ==> (50000000 << 32)
2608 @@ -636,11 +631,11 @@ static int stmmac_hwtstamp_ioctl(struct
2609  }
2610
2611  /**
2612 - * stmmac_init_ptp: init PTP
2613 + * stmmac_init_ptp - init PTP
2614   * @priv: driver private structure
2615 - * Description: this is to verify if the HW supports the PTPv1 or v2.
2616 + * Description: this is to verify if the HW supports the PTPv1 or PTPv2.
2617   * This is done by looking at the HW cap. register.
2618 - * Also it registers the ptp driver.
2619 + * This function also registers the ptp driver.
2620   */
2621  static int stmmac_init_ptp(struct stmmac_priv *priv)
2622  {
2623 @@ -682,9 +677,13 @@ static void stmmac_release_ptp(struct st
2624  }
2625
2626  /**
2627 - * stmmac_adjust_link
2628 + * stmmac_adjust_link - adjusts the link parameters
2629   * @dev: net device structure
2630 - * Description: it adjusts the link parameters.
2631 + * Description: this is the helper called by the physical abstraction layer
2632 + * drivers to communicate the phy link status. According the speed and duplex
2633 + * this driver can invoke registered glue-logic as well.
2634 + * It also invoke the eee initialization because it could happen when switch
2635 + * on different networks (that are eee capable).
2636   */
2637  static void stmmac_adjust_link(struct net_device *dev)
2638  {
2639 @@ -774,7 +773,7 @@ static void stmmac_adjust_link(struct ne
2640  }
2641
2642  /**
2643 - * stmmac_check_pcs_mode: verify if RGMII/SGMII is supported
2644 + * stmmac_check_pcs_mode - verify if RGMII/SGMII is supported
2645   * @priv: driver private structure
2646   * Description: this is to verify if the HW supports the PCS.
2647   * Physical Coding Sublayer (PCS) interface that can be used when the MAC is
2648 @@ -818,21 +817,31 @@ static int stmmac_init_phy(struct net_de
2649         priv->speed = 0;
2650         priv->oldduplex = -1;
2651
2652 -       if (priv->plat->phy_bus_name)
2653 -               snprintf(bus_id, MII_BUS_ID_SIZE, "%s-%x",
2654 -                        priv->plat->phy_bus_name, priv->plat->bus_id);
2655 -       else
2656 -               snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",
2657 -                        priv->plat->bus_id);
2658 +       if (priv->plat->phy_node) {
2659 +               phydev = of_phy_connect(dev, priv->plat->phy_node,
2660 +                                       &stmmac_adjust_link, 0, interface);
2661 +       } else {
2662 +               if (priv->plat->phy_bus_name)
2663 +                       snprintf(bus_id, MII_BUS_ID_SIZE, "%s-%x",
2664 +                                priv->plat->phy_bus_name, priv->plat->bus_id);
2665 +               else
2666 +                       snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",
2667 +                                priv->plat->bus_id);
2668
2669 -       snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
2670 -                priv->plat->phy_addr);
2671 -       pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id_fmt);
2672 +               snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
2673 +                        priv->plat->phy_addr);
2674 +               pr_debug("stmmac_init_phy:  trying to attach to %s\n",
2675 +                        phy_id_fmt);
2676
2677 -       phydev = phy_connect(dev, phy_id_fmt, &stmmac_adjust_link, interface);
2678 +               phydev = phy_connect(dev, phy_id_fmt, &stmmac_adjust_link,
2679 +                                    interface);
2680 +       }
2681
2682 -       if (IS_ERR(phydev)) {
2683 +       if (IS_ERR_OR_NULL(phydev)) {
2684                 pr_err("%s: Could not attach to PHY\n", dev->name);
2685 +               if (!phydev)
2686 +                       return -ENODEV;
2687 +
2688                 return PTR_ERR(phydev);
2689         }
2690
2691 @@ -850,7 +859,7 @@ static int stmmac_init_phy(struct net_de
2692          * device as well.
2693          * Note: phydev->phy_id is the result of reading the UID PHY registers.
2694          */
2695 -       if (phydev->phy_id == 0) {
2696 +       if (!priv->plat->phy_node && phydev->phy_id == 0) {
2697                 phy_disconnect(phydev);
2698                 return -ENODEV;
2699         }
2700 @@ -863,7 +872,7 @@ static int stmmac_init_phy(struct net_de
2701  }
2702
2703  /**
2704 - * stmmac_display_ring: display ring
2705 + * stmmac_display_ring - display ring
2706   * @head: pointer to the head of the ring passed.
2707   * @size: size of the ring.
2708   * @extend_desc: to verify if extended descriptors are used.
2709 @@ -931,7 +940,7 @@ static int stmmac_set_bfsize(int mtu, in
2710  }
2711
2712  /**
2713 - * stmmac_clear_descriptors: clear descriptors
2714 + * stmmac_clear_descriptors - clear descriptors
2715   * @priv: driver private structure
2716   * Description: this function is called to clear the tx and rx descriptors
2717   * in case of both basic and extended descriptors are used.
2718 @@ -963,18 +972,25 @@ static void stmmac_clear_descriptors(str
2719                                                      (i == txsize - 1));
2720  }
2721
2722 +/**
2723 + * stmmac_init_rx_buffers - init the RX descriptor buffer.
2724 + * @priv: driver private structure
2725 + * @p: descriptor pointer
2726 + * @i: descriptor index
2727 + * @flags: gfp flag.
2728 + * Description: this function is called to allocate a receive buffer, perform
2729 + * the DMA mapping and init the descriptor.
2730 + */
2731  static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p,
2732                                   int i, gfp_t flags)
2733  {
2734         struct sk_buff *skb;
2735
2736 -       skb = __netdev_alloc_skb(priv->dev, priv->dma_buf_sz + NET_IP_ALIGN,
2737 -                                flags);
2738 +       skb = __netdev_alloc_skb_ip_align(priv->dev, priv->dma_buf_sz, flags);
2739         if (!skb) {
2740                 pr_err("%s: Rx init fails; skb is NULL\n", __func__);
2741                 return -ENOMEM;
2742         }
2743 -       skb_reserve(skb, NET_IP_ALIGN);
2744         priv->rx_skbuff[i] = skb;
2745         priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
2746                                                 priv->dma_buf_sz,
2747 @@ -1007,7 +1023,8 @@ static void stmmac_free_rx_buffers(struc
2748  /**
2749   * init_dma_desc_rings - init the RX/TX descriptor rings
2750   * @dev: net device structure
2751 - * Description:  this function initializes the DMA RX/TX descriptors
2752 + * @flags: gfp flag.
2753 + * Description: this function initializes the DMA RX/TX descriptors
2754   * and allocates the socket buffers. It suppors the chained and ring
2755   * modes.
2756   */
2757 @@ -1089,6 +1106,7 @@ static int init_dma_desc_rings(struct ne
2758
2759         priv->dirty_tx = 0;
2760         priv->cur_tx = 0;
2761 +       netdev_reset_queue(priv->dev);
2762
2763         stmmac_clear_descriptors(priv);
2764
2765 @@ -1144,6 +1162,14 @@ static void dma_free_tx_skbufs(struct st
2766         }
2767  }
2768
2769 +/**
2770 + * alloc_dma_desc_resources - alloc TX/RX resources.
2771 + * @priv: private structure
2772 + * Description: according to which descriptor can be used (extend or basic)
2773 + * this function allocates the resources for TX and RX paths. In case of
2774 + * reception, for example, it pre-allocated the RX socket buffer in order to
2775 + * allow zero-copy mechanism.
2776 + */
2777  static int alloc_dma_desc_resources(struct stmmac_priv *priv)
2778  {
2779         unsigned int txsize = priv->dma_tx_size;
2780 @@ -1255,13 +1281,15 @@ static void free_dma_desc_resources(stru
2781  /**
2782   *  stmmac_dma_operation_mode - HW DMA operation mode
2783   *  @priv: driver private structure
2784 - *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
2785 - *  or Store-And-Forward capability.
2786 + *  Description: it is used for configuring the DMA operation mode register in
2787 + *  order to program the tx/rx DMA thresholds or Store-And-Forward mode.
2788   */
2789  static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
2790  {
2791 +       int rxfifosz = priv->plat->rx_fifo_size;
2792 +
2793         if (priv->plat->force_thresh_dma_mode)
2794 -               priv->hw->dma->dma_mode(priv->ioaddr, tc, tc);
2795 +               priv->hw->dma->dma_mode(priv->ioaddr, tc, tc, rxfifosz);
2796         else if (priv->plat->force_sf_dma_mode || priv->plat->tx_coe) {
2797                 /*
2798                  * In case of GMAC, SF mode can be enabled
2799 @@ -1270,20 +1298,23 @@ static void stmmac_dma_operation_mode(st
2800                  * 2) There is no bugged Jumbo frame support
2801                  *    that needs to not insert csum in the TDES.
2802                  */
2803 -               priv->hw->dma->dma_mode(priv->ioaddr, SF_DMA_MODE, SF_DMA_MODE);
2804 -               tc = SF_DMA_MODE;
2805 +               priv->hw->dma->dma_mode(priv->ioaddr, SF_DMA_MODE, SF_DMA_MODE,
2806 +                                       rxfifosz);
2807 +               priv->xstats.threshold = SF_DMA_MODE;
2808         } else
2809 -               priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
2810 +               priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE,
2811 +                                       rxfifosz);
2812  }
2813
2814  /**
2815 - * stmmac_tx_clean:
2816 + * stmmac_tx_clean - to manage the transmission completion
2817   * @priv: driver private structure
2818 - * Description: it reclaims resources after transmission completes.
2819 + * Description: it reclaims the transmit resources after transmission completes.
2820   */
2821  static void stmmac_tx_clean(struct stmmac_priv *priv)
2822  {
2823         unsigned int txsize = priv->dma_tx_size;
2824 +       unsigned int bytes_compl = 0, pkts_compl = 0;
2825
2826         spin_lock(&priv->tx_lock);
2827
2828 @@ -1340,6 +1371,8 @@ static void stmmac_tx_clean(struct stmma
2829                 priv->hw->mode->clean_desc3(priv, p);
2830
2831                 if (likely(skb != NULL)) {
2832 +                       pkts_compl++;
2833 +                       bytes_compl += skb->len;
2834                         dev_consume_skb_any(skb);
2835                         priv->tx_skbuff[entry] = NULL;
2836                 }
2837 @@ -1348,6 +1381,9 @@ static void stmmac_tx_clean(struct stmma
2838
2839                 priv->dirty_tx++;
2840         }
2841 +
2842 +       netdev_completed_queue(priv->dev, pkts_compl, bytes_compl);
2843 +
2844         if (unlikely(netif_queue_stopped(priv->dev) &&
2845                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
2846                 netif_tx_lock(priv->dev);
2847 @@ -1378,10 +1414,10 @@ static inline void stmmac_disable_dma_ir
2848  }
2849
2850  /**
2851 - * stmmac_tx_err: irq tx error mng function
2852 + * stmmac_tx_err - to manage the tx error
2853   * @priv: driver private structure
2854   * Description: it cleans the descriptors and restarts the transmission
2855 - * in case of errors.
2856 + * in case of transmission errors.
2857   */
2858  static void stmmac_tx_err(struct stmmac_priv *priv)
2859  {
2860 @@ -1402,6 +1438,7 @@ static void stmmac_tx_err(struct stmmac_
2861                                                      (i == txsize - 1));
2862         priv->dirty_tx = 0;
2863         priv->cur_tx = 0;
2864 +       netdev_reset_queue(priv->dev);
2865         priv->hw->dma->start_tx(priv->ioaddr);
2866
2867         priv->dev->stats.tx_errors++;
2868 @@ -1409,16 +1446,16 @@ static void stmmac_tx_err(struct stmmac_
2869  }
2870
2871  /**
2872 - * stmmac_dma_interrupt: DMA ISR
2873 + * stmmac_dma_interrupt - DMA ISR
2874   * @priv: driver private structure
2875   * Description: this is the DMA ISR. It is called by the main ISR.
2876 - * It calls the dwmac dma routine to understand which type of interrupt
2877 - * happened. In case of there is a Normal interrupt and either TX or RX
2878 - * interrupt happened so the NAPI is scheduled.
2879 + * It calls the dwmac dma routine and schedule poll method in case of some
2880 + * work can be done.
2881   */
2882  static void stmmac_dma_interrupt(struct stmmac_priv *priv)
2883  {
2884         int status;
2885 +       int rxfifosz = priv->plat->rx_fifo_size;
2886
2887         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
2888         if (likely((status & handle_rx)) || (status & handle_tx)) {
2889 @@ -1429,9 +1466,15 @@ static void stmmac_dma_interrupt(struct
2890         }
2891         if (unlikely(status & tx_hard_error_bump_tc)) {
2892                 /* Try to bump up the dma threshold on this failure */
2893 -               if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
2894 +               if (unlikely(priv->xstats.threshold != SF_DMA_MODE) &&
2895 +                   (tc <= 256)) {
2896                         tc += 64;
2897 -                       priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
2898 +                       if (priv->plat->force_thresh_dma_mode)
2899 +                               priv->hw->dma->dma_mode(priv->ioaddr, tc, tc,
2900 +                                                       rxfifosz);
2901 +                       else
2902 +                               priv->hw->dma->dma_mode(priv->ioaddr, tc,
2903 +                                                       SF_DMA_MODE, rxfifosz);
2904                         priv->xstats.threshold = tc;
2905                 }
2906         } else if (unlikely(status == tx_hard_error))
2907 @@ -1457,6 +1500,12 @@ static void stmmac_mmc_setup(struct stmm
2908                 pr_info(" No MAC Management Counters available\n");
2909  }
2910
2911 +/**
2912 + * stmmac_get_synopsys_id - return the SYINID.
2913 + * @priv: driver private structure
2914 + * Description: this simple function is to decode and return the SYINID
2915 + * starting from the HW core register.
2916 + */
2917  static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv)
2918  {
2919         u32 hwid = priv->hw->synopsys_uid;
2920 @@ -1475,11 +1524,11 @@ static u32 stmmac_get_synopsys_id(struct
2921  }
2922
2923  /**
2924 - * stmmac_selec_desc_mode: to select among: normal/alternate/extend descriptors
2925 + * stmmac_selec_desc_mode - to select among: normal/alternate/extend descriptors
2926   * @priv: driver private structure
2927   * Description: select the Enhanced/Alternate or Normal descriptors.
2928 - * In case of Enhanced/Alternate, it looks at the extended descriptors are
2929 - * supported by the HW cap. register.
2930 + * In case of Enhanced/Alternate, it checks if the extended descriptors are
2931 + * supported by the HW capability register.
2932   */
2933  static void stmmac_selec_desc_mode(struct stmmac_priv *priv)
2934  {
2935 @@ -1501,7 +1550,7 @@ static void stmmac_selec_desc_mode(struc
2936  }
2937
2938  /**
2939 - * stmmac_get_hw_features: get MAC capabilities from the HW cap. register.
2940 + * stmmac_get_hw_features - get MAC capabilities from the HW cap. register.
2941   * @priv: driver private structure
2942   * Description:
2943   *  new GMAC chip generations have a new register to indicate the
2944 @@ -1559,7 +1608,7 @@ static int stmmac_get_hw_features(struct
2945  }
2946
2947  /**
2948 - * stmmac_check_ether_addr: check if the MAC addr is valid
2949 + * stmmac_check_ether_addr - check if the MAC addr is valid
2950   * @priv: driver private structure
2951   * Description:
2952   * it is to verify if the MAC address is valid, in case of failures it
2953 @@ -1578,7 +1627,7 @@ static void stmmac_check_ether_addr(stru
2954  }
2955
2956  /**
2957 - * stmmac_init_dma_engine: DMA init.
2958 + * stmmac_init_dma_engine - DMA init.
2959   * @priv: driver private structure
2960   * Description:
2961   * It inits the DMA invoking the specific MAC/GMAC callback.
2962 @@ -1607,7 +1656,7 @@ static int stmmac_init_dma_engine(struct
2963  }
2964
2965  /**
2966 - * stmmac_tx_timer: mitigation sw timer for tx.
2967 + * stmmac_tx_timer - mitigation sw timer for tx.
2968   * @data: data pointer
2969   * Description:
2970   * This is the timer handler to directly invoke the stmmac_tx_clean.
2971 @@ -1620,7 +1669,7 @@ static void stmmac_tx_timer(unsigned lon
2972  }
2973
2974  /**
2975 - * stmmac_init_tx_coalesce: init tx mitigation options.
2976 + * stmmac_init_tx_coalesce - init tx mitigation options.
2977   * @priv: driver private structure
2978   * Description:
2979   * This inits the transmit coalesce parameters: i.e. timer rate,
2980 @@ -1639,15 +1688,18 @@ static void stmmac_init_tx_coalesce(stru
2981  }
2982
2983  /**
2984 - * stmmac_hw_setup: setup mac in a usable state.
2985 + * stmmac_hw_setup - setup mac in a usable state.
2986   *  @dev : pointer to the device structure.
2987   *  Description:
2988 - *  This function sets up the ip in a usable state.
2989 + *  this is the main function to setup the HW in a usable state because the
2990 + *  dma engine is reset, the core registers are configured (e.g. AXI,
2991 + *  Checksum features, timers). The DMA is ready to start receiving and
2992 + *  transmitting.
2993   *  Return value:
2994   *  0 on success and an appropriate (-)ve integer as defined in errno.h
2995   *  file on failure.
2996   */
2997 -static int stmmac_hw_setup(struct net_device *dev)
2998 +static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
2999  {
3000         struct stmmac_priv *priv = netdev_priv(dev);
3001         int ret;
3002 @@ -1684,11 +1736,13 @@ static int stmmac_hw_setup(struct net_de
3003
3004         stmmac_mmc_setup(priv);
3005
3006 -       ret = stmmac_init_ptp(priv);
3007 -       if (ret && ret != -EOPNOTSUPP)
3008 -               pr_warn("%s: failed PTP initialisation\n", __func__);
3009 +       if (init_ptp) {
3010 +               ret = stmmac_init_ptp(priv);
3011 +               if (ret && ret != -EOPNOTSUPP)
3012 +                       pr_warn("%s: failed PTP initialisation\n", __func__);
3013 +       }
3014
3015 -#ifdef CONFIG_STMMAC_DEBUG_FS
3016 +#ifdef CONFIG_DEBUG_FS
3017         ret = stmmac_init_fs(dev);
3018         if (ret < 0)
3019                 pr_warn("%s: failed debugFS registration\n", __func__);
3020 @@ -1763,7 +1817,7 @@ static int stmmac_open(struct net_device
3021                 goto init_error;
3022         }
3023
3024 -       ret = stmmac_hw_setup(dev);
3025 +       ret = stmmac_hw_setup(dev, true);
3026         if (ret < 0) {
3027                 pr_err("%s: Hw setup failed\n", __func__);
3028                 goto init_error;
3029 @@ -1870,8 +1924,8 @@ static int stmmac_release(struct net_dev
3030
3031         netif_carrier_off(dev);
3032
3033 -#ifdef CONFIG_STMMAC_DEBUG_FS
3034 -       stmmac_exit_fs();
3035 +#ifdef CONFIG_DEBUG_FS
3036 +       stmmac_exit_fs(dev);
3037  #endif
3038
3039         stmmac_release_ptp(priv);
3040 @@ -1880,7 +1934,7 @@ static int stmmac_release(struct net_dev
3041  }
3042
3043  /**
3044 - *  stmmac_xmit: Tx entry point of the driver
3045 + *  stmmac_xmit - Tx entry point of the driver
3046   *  @skb : the socket buffer
3047   *  @dev : device pointer
3048   *  Description : this is the tx entry point of the driver.
3049 @@ -2024,6 +2078,7 @@ static netdev_tx_t stmmac_xmit(struct sk
3050         if (!priv->hwts_tx_en)
3051                 skb_tx_timestamp(skb);
3052
3053 +       netdev_sent_queue(dev, skb->len);
3054         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
3055
3056         spin_unlock(&priv->tx_lock);
3057 @@ -2055,7 +2110,7 @@ static void stmmac_rx_vlan(struct net_de
3058
3059
3060  /**
3061 - * stmmac_rx_refill: refill used skb preallocated buffers
3062 + * stmmac_rx_refill - refill used skb preallocated buffers
3063   * @priv: driver private structure
3064   * Description : this is to reallocate the skb for the reception process
3065   * that is based on zero-copy.
3066 @@ -2106,7 +2161,7 @@ static inline void stmmac_rx_refill(stru
3067  }
3068
3069  /**
3070 - * stmmac_rx_refill: refill used skb preallocated buffers
3071 + * stmmac_rx - manage the receive process
3072   * @priv: driver private structure
3073   * @limit: napi bugget.
3074   * Description :  this the function called by the napi poll method.
3075 @@ -2375,8 +2430,11 @@ static int stmmac_set_features(struct ne
3076   *  @irq: interrupt number.
3077   *  @dev_id: to pass the net device pointer.
3078   *  Description: this is the main driver interrupt service routine.
3079 - *  It calls the DMA ISR and also the core ISR to manage PMT, MMC, LPI
3080 - *  interrupts.
3081 + *  It can call:
3082 + *  o DMA service routine (to manage incoming frame reception and transmission
3083 + *    status)
3084 + *  o Core interrupts to manage: remote wake-up, management counter, LPI
3085 + *    interrupts.
3086   */
3087  static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
3088  {
3089 @@ -2457,10 +2515,8 @@ static int stmmac_ioctl(struct net_devic
3090         return ret;
3091  }
3092
3093 -#ifdef CONFIG_STMMAC_DEBUG_FS
3094 +#ifdef CONFIG_DEBUG_FS
3095  static struct dentry *stmmac_fs_dir;
3096 -static struct dentry *stmmac_rings_status;
3097 -static struct dentry *stmmac_dma_cap;
3098
3099  static void sysfs_display_ring(void *head, int size, int extend_desc,
3100                                struct seq_file *seq)
3101 @@ -2599,36 +2655,39 @@ static const struct file_operations stmm
3102
3103  static int stmmac_init_fs(struct net_device *dev)
3104  {
3105 -       /* Create debugfs entries */
3106 -       stmmac_fs_dir = debugfs_create_dir(STMMAC_RESOURCE_NAME, NULL);
3107 +       struct stmmac_priv *priv = netdev_priv(dev);
3108
3109 -       if (!stmmac_fs_dir || IS_ERR(stmmac_fs_dir)) {
3110 -               pr_err("ERROR %s, debugfs create directory failed\n",
3111 -                      STMMAC_RESOURCE_NAME);
3112 +       /* Create per netdev entries */
3113 +       priv->dbgfs_dir = debugfs_create_dir(dev->name, stmmac_fs_dir);
3114 +
3115 +       if (!priv->dbgfs_dir || IS_ERR(priv->dbgfs_dir)) {
3116 +               pr_err("ERROR %s/%s, debugfs create directory failed\n",
3117 +                      STMMAC_RESOURCE_NAME, dev->name);
3118
3119                 return -ENOMEM;
3120         }
3121
3122         /* Entry to report DMA RX/TX rings */
3123 -       stmmac_rings_status = debugfs_create_file("descriptors_status",
3124 -                                                 S_IRUGO, stmmac_fs_dir, dev,
3125 -                                                 &stmmac_rings_status_fops);
3126 +       priv->dbgfs_rings_status =
3127 +               debugfs_create_file("descriptors_status", S_IRUGO,
3128 +                                   priv->dbgfs_dir, dev,
3129 +                                   &stmmac_rings_status_fops);
3130
3131 -       if (!stmmac_rings_status || IS_ERR(stmmac_rings_status)) {
3132 +       if (!priv->dbgfs_rings_status || IS_ERR(priv->dbgfs_rings_status)) {
3133                 pr_info("ERROR creating stmmac ring debugfs file\n");
3134 -               debugfs_remove(stmmac_fs_dir);
3135 +               debugfs_remove_recursive(priv->dbgfs_dir);
3136
3137                 return -ENOMEM;
3138         }
3139
3140         /* Entry to report the DMA HW features */
3141 -       stmmac_dma_cap = debugfs_create_file("dma_cap", S_IRUGO, stmmac_fs_dir,
3142 -                                            dev, &stmmac_dma_cap_fops);
3143 +       priv->dbgfs_dma_cap = debugfs_create_file("dma_cap", S_IRUGO,
3144 +                                           priv->dbgfs_dir,
3145 +                                           dev, &stmmac_dma_cap_fops);
3146
3147 -       if (!stmmac_dma_cap || IS_ERR(stmmac_dma_cap)) {
3148 +       if (!priv->dbgfs_dma_cap || IS_ERR(priv->dbgfs_dma_cap)) {
3149                 pr_info("ERROR creating stmmac MMC debugfs file\n");
3150 -               debugfs_remove(stmmac_rings_status);
3151 -               debugfs_remove(stmmac_fs_dir);
3152 +               debugfs_remove_recursive(priv->dbgfs_dir);
3153
3154                 return -ENOMEM;
3155         }
3156 @@ -2636,13 +2695,13 @@ static int stmmac_init_fs(struct net_dev
3157         return 0;
3158  }
3159
3160 -static void stmmac_exit_fs(void)
3161 +static void stmmac_exit_fs(struct net_device *dev)
3162  {
3163 -       debugfs_remove(stmmac_rings_status);
3164 -       debugfs_remove(stmmac_dma_cap);
3165 -       debugfs_remove(stmmac_fs_dir);
3166 +       struct stmmac_priv *priv = netdev_priv(dev);
3167 +
3168 +       debugfs_remove_recursive(priv->dbgfs_dir);
3169  }
3170 -#endif /* CONFIG_STMMAC_DEBUG_FS */
3171 +#endif /* CONFIG_DEBUG_FS */
3172
3173  static const struct net_device_ops stmmac_netdev_ops = {
3174         .ndo_open = stmmac_open,
3175 @@ -2663,11 +2722,10 @@ static const struct net_device_ops stmma
3176  /**
3177   *  stmmac_hw_init - Init the MAC device
3178   *  @priv: driver private structure
3179 - *  Description: this function detects which MAC device
3180 - *  (GMAC/MAC10-100) has to attached, checks the HW capability
3181 - *  (if supported) and sets the driver's features (for example
3182 - *  to use the ring or chaine mode or support the normal/enh
3183 - *  descriptor structure).
3184 + *  Description: this function is to configure the MAC device according to
3185 + *  some platform parameters or the HW capability register. It prepares the
3186 + *  driver to use either ring or chain modes and to setup either enhanced or
3187 + *  normal descriptors.
3188   */
3189  static int stmmac_hw_init(struct stmmac_priv *priv)
3190  {
3191 @@ -2714,7 +2772,11 @@ static int stmmac_hw_init(struct stmmac_
3192                 priv->plat->enh_desc = priv->dma_cap.enh_desc;
3193                 priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
3194
3195 -               priv->plat->tx_coe = priv->dma_cap.tx_coe;
3196 +               /* TXCOE doesn't work in thresh DMA mode */
3197 +               if (priv->plat->force_thresh_dma_mode)
3198 +                       priv->plat->tx_coe = 0;
3199 +               else
3200 +                       priv->plat->tx_coe = priv->dma_cap.tx_coe;
3201
3202                 if (priv->dma_cap.rx_coe_type2)
3203                         priv->plat->rx_coe = STMMAC_RX_COE_TYPE2;
3204 @@ -2747,13 +2809,15 @@ static int stmmac_hw_init(struct stmmac_
3205   * stmmac_dvr_probe
3206   * @device: device pointer
3207   * @plat_dat: platform data pointer
3208 - * @addr: iobase memory address
3209 + * @res: stmmac resource pointer
3210   * Description: this is the main probe function used to
3211   * call the alloc_etherdev, allocate the priv structure.
3212 + * Return:
3213 + * returns 0 on success, otherwise errno.
3214   */
3215 -struct stmmac_priv *stmmac_dvr_probe(struct device *device,
3216 -                                    struct plat_stmmacenet_data *plat_dat,
3217 -                                    void __iomem *addr)
3218 +int stmmac_dvr_probe(struct device *device,
3219 +                    struct plat_stmmacenet_data *plat_dat,
3220 +                    struct stmmac_resources *res)
3221  {
3222         int ret = 0;
3223         struct net_device *ndev = NULL;
3224 @@ -2761,7 +2825,7 @@ struct stmmac_priv *stmmac_dvr_probe(str
3225
3226         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
3227         if (!ndev)
3228 -               return NULL;
3229 +               return -ENOMEM;
3230
3231         SET_NETDEV_DEV(ndev, device);
3232
3233 @@ -2772,8 +2836,17 @@ struct stmmac_priv *stmmac_dvr_probe(str
3234         stmmac_set_ethtool_ops(ndev);
3235         priv->pause = pause;
3236         priv->plat = plat_dat;
3237 -       priv->ioaddr = addr;
3238 -       priv->dev->base_addr = (unsigned long)addr;
3239 +       priv->ioaddr = res->addr;
3240 +       priv->dev->base_addr = (unsigned long)res->addr;
3241 +
3242 +       priv->dev->irq = res->irq;
3243 +       priv->wol_irq = res->wol_irq;
3244 +       priv->lpi_irq = res->lpi_irq;
3245 +
3246 +       if (res->mac)
3247 +               memcpy(priv->dev->dev_addr, res->mac, ETH_ALEN);
3248 +
3249 +       dev_set_drvdata(device, priv->dev);
3250
3251         /* Verify driver arguments */
3252         stmmac_verify_args();
3253 @@ -2800,6 +2873,16 @@ struct stmmac_priv *stmmac_dvr_probe(str
3254         }
3255         clk_prepare_enable(priv->stmmac_clk);
3256
3257 +       priv->pclk = devm_clk_get(priv->device, "pclk");
3258 +       if (IS_ERR(priv->pclk)) {
3259 +               if (PTR_ERR(priv->pclk) == -EPROBE_DEFER) {
3260 +                       ret = -EPROBE_DEFER;
3261 +                       goto error_pclk_get;
3262 +               }
3263 +               priv->pclk = NULL;
3264 +       }
3265 +       clk_prepare_enable(priv->pclk);
3266 +
3267         priv->stmmac_rst = devm_reset_control_get(priv->device,
3268                                                   STMMAC_RESOURCE_NAME);
3269         if (IS_ERR(priv->stmmac_rst)) {
3270 @@ -2878,19 +2961,22 @@ struct stmmac_priv *stmmac_dvr_probe(str
3271                 }
3272         }
3273
3274 -       return priv;
3275 +       return 0;
3276
3277  error_mdio_register:
3278         unregister_netdev(ndev);
3279  error_netdev_register:
3280         netif_napi_del(&priv->napi);
3281  error_hw_init:
3282 +       clk_disable_unprepare(priv->pclk);
3283 +error_pclk_get:
3284         clk_disable_unprepare(priv->stmmac_clk);
3285  error_clk_get:
3286         free_netdev(ndev);
3287
3288 -       return ERR_PTR(ret);
3289 +       return ret;
3290  }
3291 +EXPORT_SYMBOL_GPL(stmmac_dvr_probe);
3292
3293  /**
3294   * stmmac_dvr_remove
3295 @@ -2908,20 +2994,28 @@ int stmmac_dvr_remove(struct net_device
3296         priv->hw->dma->stop_tx(priv->ioaddr);
3297
3298         stmmac_set_mac(priv->ioaddr, false);
3299 -       if (priv->pcs != STMMAC_PCS_RGMII && priv->pcs != STMMAC_PCS_TBI &&
3300 -           priv->pcs != STMMAC_PCS_RTBI)
3301 -               stmmac_mdio_unregister(ndev);
3302         netif_carrier_off(ndev);
3303         unregister_netdev(ndev);
3304         if (priv->stmmac_rst)
3305                 reset_control_assert(priv->stmmac_rst);
3306 +       clk_disable_unprepare(priv->pclk);
3307         clk_disable_unprepare(priv->stmmac_clk);
3308 +       if (priv->pcs != STMMAC_PCS_RGMII && priv->pcs != STMMAC_PCS_TBI &&
3309 +           priv->pcs != STMMAC_PCS_RTBI)
3310 +               stmmac_mdio_unregister(ndev);
3311         free_netdev(ndev);
3312
3313         return 0;
3314  }
3315 +EXPORT_SYMBOL_GPL(stmmac_dvr_remove);
3316
3317 -#ifdef CONFIG_PM
3318 +/**
3319 + * stmmac_suspend - suspend callback
3320 + * @ndev: net device pointer
3321 + * Description: this is the function to suspend the device and it is called
3322 + * by the platform driver to stop the network queue, release the resources,
3323 + * program the PMT register (for WoL), clean and release driver resources.
3324 + */
3325  int stmmac_suspend(struct net_device *ndev)
3326  {
3327         struct stmmac_priv *priv = netdev_priv(ndev);
3328 @@ -2954,6 +3048,7 @@ int stmmac_suspend(struct net_device *nd
3329                 stmmac_set_mac(priv->ioaddr, false);
3330                 pinctrl_pm_select_sleep_state(priv->device);
3331                 /* Disable clock in case of PWM is off */
3332 +               clk_disable(priv->pclk);
3333                 clk_disable(priv->stmmac_clk);
3334         }
3335         spin_unlock_irqrestore(&priv->lock, flags);
3336 @@ -2963,7 +3058,14 @@ int stmmac_suspend(struct net_device *nd
3337         priv->oldduplex = -1;
3338         return 0;
3339  }
3340 +EXPORT_SYMBOL_GPL(stmmac_suspend);
3341
3342 +/**
3343 + * stmmac_resume - resume callback
3344 + * @ndev: net device pointer
3345 + * Description: when resume this function is invoked to setup the DMA and CORE
3346 + * in a usable state.
3347 + */
3348  int stmmac_resume(struct net_device *ndev)
3349  {
3350         struct stmmac_priv *priv = netdev_priv(ndev);
3351 @@ -2987,6 +3089,7 @@ int stmmac_resume(struct net_device *nde
3352                 pinctrl_pm_select_default_state(priv->device);
3353                 /* enable the clk prevously disabled */
3354                 clk_enable(priv->stmmac_clk);
3355 +               clk_enable(priv->pclk);
3356                 /* reset the phy so that it's ready */
3357                 if (priv->mii)
3358                         stmmac_mdio_reset(priv->mii);
3359 @@ -2995,7 +3098,7 @@ int stmmac_resume(struct net_device *nde
3360         netif_device_attach(ndev);
3361
3362         init_dma_desc_rings(ndev, GFP_ATOMIC);
3363 -       stmmac_hw_setup(ndev);
3364 +       stmmac_hw_setup(ndev, false);
3365         stmmac_init_tx_coalesce(priv);
3366
3367         napi_enable(&priv->napi);
3368 @@ -3009,37 +3112,7 @@ int stmmac_resume(struct net_device *nde
3369
3370         return 0;
3371  }
3372 -#endif /* CONFIG_PM */
3373 -
3374 -/* Driver can be configured w/ and w/ both PCI and Platf drivers
3375 - * depending on the configuration selected.
3376 - */
3377 -static int __init stmmac_init(void)
3378 -{
3379 -       int ret;
3380 -
3381 -       ret = stmmac_register_platform();
3382 -       if (ret)
3383 -               goto err;
3384 -       ret = stmmac_register_pci();
3385 -       if (ret)
3386 -               goto err_pci;
3387 -       return 0;
3388 -err_pci:
3389 -       stmmac_unregister_platform();
3390 -err:
3391 -       pr_err("stmmac: driver registration failed\n");
3392 -       return ret;
3393 -}
3394 -
3395 -static void __exit stmmac_exit(void)
3396 -{
3397 -       stmmac_unregister_platform();
3398 -       stmmac_unregister_pci();
3399 -}
3400 -
3401 -module_init(stmmac_init);
3402 -module_exit(stmmac_exit);
3403 +EXPORT_SYMBOL_GPL(stmmac_resume);
3404
3405  #ifndef MODULE
3406  static int __init stmmac_cmdline_opt(char *str)
3407 @@ -3094,6 +3167,35 @@ err:
3408  __setup("stmmaceth=", stmmac_cmdline_opt);
3409  #endif /* MODULE */
3410
3411 +static int __init stmmac_init(void)
3412 +{
3413 +#ifdef CONFIG_DEBUG_FS
3414 +       /* Create debugfs main directory if it doesn't exist yet */
3415 +       if (!stmmac_fs_dir) {
3416 +               stmmac_fs_dir = debugfs_create_dir(STMMAC_RESOURCE_NAME, NULL);
3417 +
3418 +               if (!stmmac_fs_dir || IS_ERR(stmmac_fs_dir)) {
3419 +                       pr_err("ERROR %s, debugfs create directory failed\n",
3420 +                              STMMAC_RESOURCE_NAME);
3421 +
3422 +                       return -ENOMEM;
3423 +               }
3424 +       }
3425 +#endif
3426 +
3427 +       return 0;
3428 +}
3429 +
3430 +static void __exit stmmac_exit(void)
3431 +{
3432 +#ifdef CONFIG_DEBUG_FS
3433 +       debugfs_remove_recursive(stmmac_fs_dir);
3434 +#endif
3435 +}
3436 +
3437 +module_init(stmmac_init)
3438 +module_exit(stmmac_exit)
3439 +
3440  MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet device driver");
3441  MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
3442  MODULE_LICENSE("GPL");
3443 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
3444 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
3445 @@ -161,11 +161,16 @@ int stmmac_mdio_reset(struct mii_bus *bu
3446
3447                 if (!gpio_request(reset_gpio, "mdio-reset")) {
3448                         gpio_direction_output(reset_gpio, active_low ? 1 : 0);
3449 -                       udelay(data->delays[0]);
3450 +                       if (data->delays[0])
3451 +                               msleep(DIV_ROUND_UP(data->delays[0], 1000));
3452 +
3453                         gpio_set_value(reset_gpio, active_low ? 0 : 1);
3454 -                       udelay(data->delays[1]);
3455 +                       if (data->delays[1])
3456 +                               msleep(DIV_ROUND_UP(data->delays[1], 1000));
3457 +
3458                         gpio_set_value(reset_gpio, active_low ? 1 : 0);
3459 -                       udelay(data->delays[2]);
3460 +                       if (data->delays[2])
3461 +                               msleep(DIV_ROUND_UP(data->delays[2], 1000));
3462                 }
3463         }
3464  #endif
3465 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
3466 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
3467 @@ -24,38 +24,128 @@
3468  *******************************************************************************/
3469
3470  #include <linux/pci.h>
3471 +#include <linux/dmi.h>
3472 +
3473  #include "stmmac.h"
3474
3475 -static struct plat_stmmacenet_data plat_dat;
3476 -static struct stmmac_mdio_bus_data mdio_data;
3477 -static struct stmmac_dma_cfg dma_cfg;
3478 -
3479 -static void stmmac_default_data(void)
3480 -{
3481 -       memset(&plat_dat, 0, sizeof(struct plat_stmmacenet_data));
3482 -
3483 -       plat_dat.bus_id = 1;
3484 -       plat_dat.phy_addr = 0;
3485 -       plat_dat.interface = PHY_INTERFACE_MODE_GMII;
3486 -       plat_dat.clk_csr = 2;   /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
3487 -       plat_dat.has_gmac = 1;
3488 -       plat_dat.force_sf_dma_mode = 1;
3489 -
3490 -       mdio_data.phy_reset = NULL;
3491 -       mdio_data.phy_mask = 0;
3492 -       plat_dat.mdio_bus_data = &mdio_data;
3493 -
3494 -       dma_cfg.pbl = 32;
3495 -       dma_cfg.burst_len = DMA_AXI_BLEN_256;
3496 -       plat_dat.dma_cfg = &dma_cfg;
3497 +/*
3498 + * This struct is used to associate PCI Function of MAC controller on a board,
3499 + * discovered via DMI, with the address of PHY connected to the MAC. The
3500 + * negative value of the address means that MAC controller is not connected
3501 + * with PHY.
3502 + */
3503 +struct stmmac_pci_dmi_data {
3504 +       const char *name;
3505 +       unsigned int func;
3506 +       int phy_addr;
3507 +};
3508 +
3509 +struct stmmac_pci_info {
3510 +       struct pci_dev *pdev;
3511 +       int (*setup)(struct plat_stmmacenet_data *plat,
3512 +                    struct stmmac_pci_info *info);
3513 +       struct stmmac_pci_dmi_data *dmi;
3514 +};
3515 +
3516 +static int stmmac_pci_find_phy_addr(struct stmmac_pci_info *info)
3517 +{
3518 +       const char *name = dmi_get_system_info(DMI_BOARD_NAME);
3519 +       unsigned int func = PCI_FUNC(info->pdev->devfn);
3520 +       struct stmmac_pci_dmi_data *dmi;
3521 +
3522 +       /*
3523 +        * Galileo boards with old firmware don't support DMI. We always return
3524 +        * 1 here, so at least first found MAC controller would be probed.
3525 +        */
3526 +       if (!name)
3527 +               return 1;
3528 +
3529 +       for (dmi = info->dmi; dmi->name && *dmi->name; dmi++) {
3530 +               if (!strcmp(dmi->name, name) && dmi->func == func)
3531 +                       return dmi->phy_addr;
3532 +       }
3533 +
3534 +       return -ENODEV;
3535 +}
3536 +
3537 +static void stmmac_default_data(struct plat_stmmacenet_data *plat)
3538 +{
3539 +       plat->bus_id = 1;
3540 +       plat->phy_addr = 0;
3541 +       plat->interface = PHY_INTERFACE_MODE_GMII;
3542 +       plat->clk_csr = 2;      /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
3543 +       plat->has_gmac = 1;
3544 +       plat->force_sf_dma_mode = 1;
3545 +
3546 +       plat->mdio_bus_data->phy_reset = NULL;
3547 +       plat->mdio_bus_data->phy_mask = 0;
3548 +
3549 +       plat->dma_cfg->pbl = 32;
3550 +       plat->dma_cfg->burst_len = DMA_AXI_BLEN_256;
3551 +
3552 +       /* Set default value for multicast hash bins */
3553 +       plat->multicast_filter_bins = HASH_TABLE_SIZE;
3554 +
3555 +       /* Set default value for unicast filter entries */
3556 +       plat->unicast_filter_entries = 1;
3557 +}
3558 +
3559 +static int quark_default_data(struct plat_stmmacenet_data *plat,
3560 +                             struct stmmac_pci_info *info)
3561 +{
3562 +       struct pci_dev *pdev = info->pdev;
3563 +       int ret;
3564 +
3565 +       /*
3566 +        * Refuse to load the driver and register net device if MAC controller
3567 +        * does not connect to any PHY interface.
3568 +        */
3569 +       ret = stmmac_pci_find_phy_addr(info);
3570 +       if (ret < 0)
3571 +               return ret;
3572 +
3573 +       plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
3574 +       plat->phy_addr = ret;
3575 +       plat->interface = PHY_INTERFACE_MODE_RMII;
3576 +       plat->clk_csr = 2;
3577 +       plat->has_gmac = 1;
3578 +       plat->force_sf_dma_mode = 1;
3579 +
3580 +       plat->mdio_bus_data->phy_reset = NULL;
3581 +       plat->mdio_bus_data->phy_mask = 0;
3582 +
3583 +       plat->dma_cfg->pbl = 16;
3584 +       plat->dma_cfg->burst_len = DMA_AXI_BLEN_256;
3585 +       plat->dma_cfg->fixed_burst = 1;
3586
3587         /* Set default value for multicast hash bins */
3588 -       plat_dat.multicast_filter_bins = HASH_TABLE_SIZE;
3589 +       plat->multicast_filter_bins = HASH_TABLE_SIZE;
3590
3591         /* Set default value for unicast filter entries */
3592 -       plat_dat.unicast_filter_entries = 1;
3593 +       plat->unicast_filter_entries = 1;
3594 +
3595 +       return 0;
3596  }
3597
3598 +static struct stmmac_pci_dmi_data quark_pci_dmi_data[] = {
3599 +       {
3600 +               .name = "Galileo",
3601 +               .func = 6,
3602 +               .phy_addr = 1,
3603 +       },
3604 +       {
3605 +               .name = "GalileoGen2",
3606 +               .func = 6,
3607 +               .phy_addr = 1,
3608 +       },
3609 +       {}
3610 +};
3611 +
3612 +static struct stmmac_pci_info quark_pci_info = {
3613 +       .setup = quark_default_data,
3614 +       .dmi = quark_pci_dmi_data,
3615 +};
3616 +
3617  /**
3618   * stmmac_pci_probe
3619   *
3620 @@ -71,64 +161,65 @@ static void stmmac_default_data(void)
3621  static int stmmac_pci_probe(struct pci_dev *pdev,
3622                             const struct pci_device_id *id)
3623  {
3624 -       int ret = 0;
3625 -       void __iomem *addr = NULL;
3626 -       struct stmmac_priv *priv = NULL;
3627 +       struct stmmac_pci_info *info = (struct stmmac_pci_info *)id->driver_data;
3628 +       struct plat_stmmacenet_data *plat;
3629 +       struct stmmac_resources res;
3630         int i;
3631 +       int ret;
3632 +
3633 +       plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
3634 +       if (!plat)
3635 +               return -ENOMEM;
3636 +
3637 +       plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
3638 +                                          sizeof(*plat->mdio_bus_data),
3639 +                                          GFP_KERNEL);
3640 +       if (!plat->mdio_bus_data)
3641 +               return -ENOMEM;
3642 +
3643 +       plat->dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*plat->dma_cfg),
3644 +                                    GFP_KERNEL);
3645 +       if (!plat->dma_cfg)
3646 +               return -ENOMEM;
3647
3648         /* Enable pci device */
3649 -       ret = pci_enable_device(pdev);
3650 +       ret = pcim_enable_device(pdev);
3651         if (ret) {
3652 -               pr_err("%s : ERROR: failed to enable %s device\n", __func__,
3653 -                      pci_name(pdev));
3654 +               dev_err(&pdev->dev, "%s: ERROR: failed to enable device\n",
3655 +                       __func__);
3656                 return ret;
3657         }
3658 -       if (pci_request_regions(pdev, STMMAC_RESOURCE_NAME)) {
3659 -               pr_err("%s: ERROR: failed to get PCI region\n", __func__);
3660 -               ret = -ENODEV;
3661 -               goto err_out_req_reg_failed;
3662 -       }
3663
3664         /* Get the base address of device */
3665 -       for (i = 0; i <= 5; i++) {
3666 +       for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
3667                 if (pci_resource_len(pdev, i) == 0)
3668                         continue;
3669 -               addr = pci_iomap(pdev, i, 0);
3670 -               if (addr == NULL) {
3671 -                       pr_err("%s: ERROR: cannot map register memory aborting",
3672 -                              __func__);
3673 -                       ret = -EIO;
3674 -                       goto err_out_map_failed;
3675 -               }
3676 +               ret = pcim_iomap_regions(pdev, BIT(i), pci_name(pdev));
3677 +               if (ret)
3678 +                       return ret;
3679                 break;
3680         }
3681 -       pci_set_master(pdev);
3682 -
3683 -       stmmac_default_data();
3684
3685 -       priv = stmmac_dvr_probe(&(pdev->dev), &plat_dat, addr);
3686 -       if (IS_ERR(priv)) {
3687 -               pr_err("%s: main driver probe failed", __func__);
3688 -               ret = PTR_ERR(priv);
3689 -               goto err_out;
3690 -       }
3691 -       priv->dev->irq = pdev->irq;
3692 -       priv->wol_irq = pdev->irq;
3693 -
3694 -       pci_set_drvdata(pdev, priv->dev);
3695 +       pci_set_master(pdev);
3696
3697 -       pr_debug("STMMAC platform driver registration completed");
3698 +       if (info) {
3699 +               info->pdev = pdev;
3700 +               if (info->setup) {
3701 +                       ret = info->setup(plat, info);
3702 +                       if (ret)
3703 +                               return ret;
3704 +               }
3705 +       } else
3706 +               stmmac_default_data(plat);
3707
3708 -       return 0;
3709 +       pci_enable_msi(pdev);
3710
3711 -err_out:
3712 -       pci_clear_master(pdev);
3713 -err_out_map_failed:
3714 -       pci_release_regions(pdev);
3715 -err_out_req_reg_failed:
3716 -       pci_disable_device(pdev);
3717 +       memset(&res, 0, sizeof(res));
3718 +       res.addr = pcim_iomap_table(pdev)[i];
3719 +       res.wol_irq = pdev->irq;
3720 +       res.irq = pdev->irq;
3721
3722 -       return ret;
3723 +       return stmmac_dvr_probe(&pdev->dev, plat, &res);
3724  }
3725
3726  /**
3727 @@ -141,61 +232,55 @@ err_out_req_reg_failed:
3728  static void stmmac_pci_remove(struct pci_dev *pdev)
3729  {
3730         struct net_device *ndev = pci_get_drvdata(pdev);
3731 -       struct stmmac_priv *priv = netdev_priv(ndev);
3732
3733         stmmac_dvr_remove(ndev);
3734 -
3735 -       pci_iounmap(pdev, priv->ioaddr);
3736 -       pci_release_regions(pdev);
3737 -       pci_disable_device(pdev);
3738  }
3739
3740 -#ifdef CONFIG_PM
3741 -static int stmmac_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3742 +#ifdef CONFIG_PM_SLEEP
3743 +static int stmmac_pci_suspend(struct device *dev)
3744  {
3745 +       struct pci_dev *pdev = to_pci_dev(dev);
3746         struct net_device *ndev = pci_get_drvdata(pdev);
3747 -       int ret;
3748 -
3749 -       ret = stmmac_suspend(ndev);
3750 -       pci_save_state(pdev);
3751 -       pci_set_power_state(pdev, pci_choose_state(pdev, state));
3752
3753 -       return ret;
3754 +       return stmmac_suspend(ndev);
3755  }
3756
3757 -static int stmmac_pci_resume(struct pci_dev *pdev)
3758 +static int stmmac_pci_resume(struct device *dev)
3759  {
3760 +       struct pci_dev *pdev = to_pci_dev(dev);
3761         struct net_device *ndev = pci_get_drvdata(pdev);
3762
3763 -       pci_set_power_state(pdev, PCI_D0);
3764 -       pci_restore_state(pdev);
3765 -
3766         return stmmac_resume(ndev);
3767  }
3768  #endif
3769
3770 +static SIMPLE_DEV_PM_OPS(stmmac_pm_ops, stmmac_pci_suspend, stmmac_pci_resume);
3771 +
3772  #define STMMAC_VENDOR_ID 0x700
3773 +#define STMMAC_QUARK_ID  0x0937
3774  #define STMMAC_DEVICE_ID 0x1108
3775
3776  static const struct pci_device_id stmmac_id_table[] = {
3777         {PCI_DEVICE(STMMAC_VENDOR_ID, STMMAC_DEVICE_ID)},
3778         {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_MAC)},
3779 +       {PCI_VDEVICE(INTEL, STMMAC_QUARK_ID), (kernel_ulong_t)&quark_pci_info},
3780         {}
3781  };
3782
3783  MODULE_DEVICE_TABLE(pci, stmmac_id_table);
3784
3785 -struct pci_driver stmmac_pci_driver = {
3786 +static struct pci_driver stmmac_pci_driver = {
3787         .name = STMMAC_RESOURCE_NAME,
3788         .id_table = stmmac_id_table,
3789         .probe = stmmac_pci_probe,
3790         .remove = stmmac_pci_remove,
3791 -#ifdef CONFIG_PM
3792 -       .suspend = stmmac_pci_suspend,
3793 -       .resume = stmmac_pci_resume,
3794 -#endif
3795 +       .driver         = {
3796 +               .pm     = &stmmac_pm_ops,
3797 +       },
3798  };
3799
3800 +module_pci_driver(stmmac_pci_driver);
3801 +
3802  MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PCI driver");
3803  MODULE_AUTHOR("Rayagond Kokatanur <rayagond.kokatanur@vayavyalabs.com>");
3804  MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
3805 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
3806 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
3807 @@ -23,41 +23,23 @@
3808  *******************************************************************************/
3809
3810  #include <linux/platform_device.h>
3811 +#include <linux/module.h>
3812  #include <linux/io.h>
3813  #include <linux/of.h>
3814  #include <linux/of_net.h>
3815  #include <linux/of_device.h>
3816 -#include "stmmac.h"
3817 +#include <linux/of_mdio.h>
3818
3819 -static const struct of_device_id stmmac_dt_ids[] = {
3820 -#ifdef CONFIG_DWMAC_MESON
3821 -       { .compatible = "amlogic,meson6-dwmac", .data = &meson6_dwmac_data},
3822 -#endif
3823 -#ifdef CONFIG_DWMAC_SUNXI
3824 -       { .compatible = "allwinner,sun7i-a20-gmac", .data = &sun7i_gmac_data},
3825 -#endif
3826 -#ifdef CONFIG_DWMAC_STI
3827 -       { .compatible = "st,stih415-dwmac", .data = &stih4xx_dwmac_data},
3828 -       { .compatible = "st,stih416-dwmac", .data = &stih4xx_dwmac_data},
3829 -       { .compatible = "st,stid127-dwmac", .data = &stid127_dwmac_data},
3830 -       { .compatible = "st,stih407-dwmac", .data = &stih4xx_dwmac_data},
3831 -#endif
3832 -#ifdef CONFIG_DWMAC_SOCFPGA
3833 -       { .compatible = "altr,socfpga-stmmac", .data = &socfpga_gmac_data },
3834 -#endif
3835 -       /* SoC specific glue layers should come before generic bindings */
3836 -       { .compatible = "st,spear600-gmac"},
3837 -       { .compatible = "snps,dwmac-3.610"},
3838 -       { .compatible = "snps,dwmac-3.70a"},
3839 -       { .compatible = "snps,dwmac-3.710"},
3840 -       { .compatible = "snps,dwmac"},
3841 -       { /* sentinel */ }
3842 -};
3843 -MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
3844 +#include "stmmac.h"
3845 +#include "stmmac_platform.h"
3846
3847  #ifdef CONFIG_OF
3848
3849 -/* This function validates the number of Multicast filtering bins specified
3850 +/**
3851 + * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
3852 + * @mcast_bins: Multicast filtering bins
3853 + * Description:
3854 + * this function validates the number of Multicast filtering bins specified
3855   * by the configuration through the device tree. The Synopsys GMAC supports
3856   * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
3857   * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
3858 @@ -83,7 +65,11 @@ static int dwmac1000_validate_mcast_bins
3859         return x;
3860  }
3861
3862 -/* This function validates the number of Unicast address entries supported
3863 +/**
3864 + * dwmac1000_validate_ucast_entries - validate the Unicast address entries
3865 + * @ucast_entries: number of Unicast address entries
3866 + * Description:
3867 + * This function validates the number of Unicast address entries supported
3868   * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
3869   * supports 1, 32, 64, or 128 Unicast filter entries for it's Unicast filter
3870   * logic. This function validates a valid, supported configuration is
3871 @@ -109,37 +95,25 @@ static int dwmac1000_validate_ucast_entr
3872         return x;
3873  }
3874
3875 -static int stmmac_probe_config_dt(struct platform_device *pdev,
3876 -                                 struct plat_stmmacenet_data *plat,
3877 -                                 const char **mac)
3878 +/**
3879 + * stmmac_probe_config_dt - parse device-tree driver parameters
3880 + * @pdev: platform_device structure
3881 + * @plat: driver data platform structure
3882 + * @mac: MAC address to use
3883 + * Description:
3884 + * this function is to read the driver parameters from device-tree and
3885 + * set some private fields that will be used by the main at runtime.
3886 + */
3887 +struct plat_stmmacenet_data *
3888 +stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
3889  {
3890         struct device_node *np = pdev->dev.of_node;
3891 +       struct plat_stmmacenet_data *plat;
3892         struct stmmac_dma_cfg *dma_cfg;
3893 -       const struct of_device_id *device;
3894
3895 -       if (!np)
3896 -               return -ENODEV;
3897 -
3898 -       device = of_match_device(stmmac_dt_ids, &pdev->dev);
3899 -       if (!device)
3900 -               return -ENODEV;
3901 -
3902 -       if (device->data) {
3903 -               const struct stmmac_of_data *data = device->data;
3904 -               plat->has_gmac = data->has_gmac;
3905 -               plat->enh_desc = data->enh_desc;
3906 -               plat->tx_coe = data->tx_coe;
3907 -               plat->rx_coe = data->rx_coe;
3908 -               plat->bugged_jumbo = data->bugged_jumbo;
3909 -               plat->pmt = data->pmt;
3910 -               plat->riwt_off = data->riwt_off;
3911 -               plat->fix_mac_speed = data->fix_mac_speed;
3912 -               plat->bus_setup = data->bus_setup;
3913 -               plat->setup = data->setup;
3914 -               plat->free = data->free;
3915 -               plat->init = data->init;
3916 -               plat->exit = data->exit;
3917 -       }
3918 +       plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
3919 +       if (!plat)
3920 +               return ERR_PTR(-ENOMEM);
3921
3922         *mac = of_get_mac_address(np);
3923         plat->interface = of_get_phy_mode(np);
3924 @@ -155,13 +129,24 @@ static int stmmac_probe_config_dt(struct
3925         /* Default to phy auto-detection */
3926         plat->phy_addr = -1;
3927
3928 +       /* If we find a phy-handle property, use it as the PHY */
3929 +       plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
3930 +
3931 +       /* If phy-handle is not specified, check if we have a fixed-phy */
3932 +       if (!plat->phy_node && of_phy_is_fixed_link(np)) {
3933 +               if ((of_phy_register_fixed_link(np) < 0))
3934 +                       return ERR_PTR(-ENODEV);
3935 +
3936 +               plat->phy_node = of_node_get(np);
3937 +       }
3938 +
3939         /* "snps,phy-addr" is not a standard property. Mark it as deprecated
3940          * and warn of its use. Remove this when phy node support is added.
3941          */
3942         if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
3943                 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
3944
3945 -       if (plat->phy_bus_name)
3946 +       if (plat->phy_node || plat->phy_bus_name)
3947                 plat->mdio_bus_data = NULL;
3948         else
3949                 plat->mdio_bus_data =
3950 @@ -169,6 +154,10 @@ static int stmmac_probe_config_dt(struct
3951                                      sizeof(struct stmmac_mdio_bus_data),
3952                                      GFP_KERNEL);
3953
3954 +       of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
3955 +
3956 +       of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
3957 +
3958         plat->force_sf_dma_mode =
3959                 of_property_read_bool(np, "snps,force_sf_dma_mode");
3960
3961 @@ -177,6 +166,12 @@ static int stmmac_probe_config_dt(struct
3962          */
3963         plat->maxmtu = JUMBO_LEN;
3964
3965 +       /* Set default value for multicast hash bins */
3966 +       plat->multicast_filter_bins = HASH_TABLE_SIZE;
3967 +
3968 +       /* Set default value for unicast filter entries */
3969 +       plat->unicast_filter_entries = 1;
3970 +
3971         /*
3972          * Currently only the properties needed on SPEAr600
3973          * are provided. All other properties should be added
3974 @@ -215,14 +210,19 @@ static int stmmac_probe_config_dt(struct
3975         if (of_find_property(np, "snps,pbl", NULL)) {
3976                 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
3977                                        GFP_KERNEL);
3978 -               if (!dma_cfg)
3979 -                       return -ENOMEM;
3980 +               if (!dma_cfg) {
3981 +                       of_node_put(np);
3982 +                       return ERR_PTR(-ENOMEM);
3983 +               }
3984                 plat->dma_cfg = dma_cfg;
3985                 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
3986                 dma_cfg->fixed_burst =
3987                         of_property_read_bool(np, "snps,fixed-burst");
3988                 dma_cfg->mixed_burst =
3989                         of_property_read_bool(np, "snps,mixed-burst");
3990 +               of_property_read_u32(np, "snps,burst_len", &dma_cfg->burst_len);
3991 +               if (dma_cfg->burst_len < 0 || dma_cfg->burst_len > 256)
3992 +                       dma_cfg->burst_len = 0;
3993         }
3994         plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
3995         if (plat->force_thresh_dma_mode) {
3996 @@ -230,123 +230,60 @@ static int stmmac_probe_config_dt(struct
3997                 pr_warn("force_sf_dma_mode is ignored if force_thresh_dma_mode is set.");
3998         }
3999
4000 -       return 0;
4001 +       return plat;
4002  }
4003  #else
4004 -static int stmmac_probe_config_dt(struct platform_device *pdev,
4005 -                                 struct plat_stmmacenet_data *plat,
4006 -                                 const char **mac)
4007 +struct plat_stmmacenet_data *
4008 +stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
4009  {
4010 -       return -ENOSYS;
4011 +       return ERR_PTR(-ENOSYS);
4012  }
4013  #endif /* CONFIG_OF */
4014 +EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
4015
4016 -/**
4017 - * stmmac_pltfr_probe
4018 - * @pdev: platform device pointer
4019 - * Description: platform_device probe function. It allocates
4020 - * the necessary resources and invokes the main to init
4021 - * the net device, register the mdio bus etc.
4022 - */
4023 -static int stmmac_pltfr_probe(struct platform_device *pdev)
4024 +int stmmac_get_platform_resources(struct platform_device *pdev,
4025 +                                 struct stmmac_resources *stmmac_res)
4026  {
4027 -       int ret = 0;
4028         struct resource *res;
4029 -       struct device *dev = &pdev->dev;
4030 -       void __iomem *addr = NULL;
4031 -       struct stmmac_priv *priv = NULL;
4032 -       struct plat_stmmacenet_data *plat_dat = NULL;
4033 -       const char *mac = NULL;
4034 -
4035 -       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
4036 -       addr = devm_ioremap_resource(dev, res);
4037 -       if (IS_ERR(addr))
4038 -               return PTR_ERR(addr);
4039 -
4040 -       plat_dat = dev_get_platdata(&pdev->dev);
4041 -
4042 -       if (!plat_dat)
4043 -               plat_dat = devm_kzalloc(&pdev->dev,
4044 -                                       sizeof(struct plat_stmmacenet_data),
4045 -                                       GFP_KERNEL);
4046 -       if (!plat_dat) {
4047 -               pr_err("%s: ERROR: no memory", __func__);
4048 -               return  -ENOMEM;
4049 -       }
4050 -
4051 -       /* Set default value for multicast hash bins */
4052 -       plat_dat->multicast_filter_bins = HASH_TABLE_SIZE;
4053 -
4054 -       /* Set default value for unicast filter entries */
4055 -       plat_dat->unicast_filter_entries = 1;
4056 -
4057 -       if (pdev->dev.of_node) {
4058 -               ret = stmmac_probe_config_dt(pdev, plat_dat, &mac);
4059 -               if (ret) {
4060 -                       pr_err("%s: main dt probe failed", __func__);
4061 -                       return ret;
4062 -               }
4063 -       }
4064 -
4065 -       /* Custom setup (if needed) */
4066 -       if (plat_dat->setup) {
4067 -               plat_dat->bsp_priv = plat_dat->setup(pdev);
4068 -               if (IS_ERR(plat_dat->bsp_priv))
4069 -                       return PTR_ERR(plat_dat->bsp_priv);
4070 -       }
4071 -
4072 -       /* Custom initialisation (if needed)*/
4073 -       if (plat_dat->init) {
4074 -               ret = plat_dat->init(pdev, plat_dat->bsp_priv);
4075 -               if (unlikely(ret))
4076 -                       return ret;
4077 -       }
4078
4079 -       priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr);
4080 -       if (IS_ERR(priv)) {
4081 -               pr_err("%s: main driver probe failed", __func__);
4082 -               return PTR_ERR(priv);
4083 -       }
4084 +       memset(stmmac_res, 0, sizeof(*stmmac_res));
4085
4086 -       /* Get MAC address if available (DT) */
4087 -       if (mac)
4088 -               memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
4089 -
4090 -       /* Get the MAC information */
4091 -       priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
4092 -       if (priv->dev->irq < 0) {
4093 -               if (priv->dev->irq != -EPROBE_DEFER) {
4094 -                       netdev_err(priv->dev,
4095 -                                  "MAC IRQ configuration information not found\n");
4096 +       /* Get IRQ information early to have an ability to ask for deferred
4097 +        * probe if needed before we went too far with resource allocation.
4098 +        */
4099 +       stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
4100 +       if (stmmac_res->irq < 0) {
4101 +               if (stmmac_res->irq != -EPROBE_DEFER) {
4102 +                       dev_err(&pdev->dev,
4103 +                               "MAC IRQ configuration information not found\n");
4104                 }
4105 -               return priv->dev->irq;
4106 +               return stmmac_res->irq;
4107         }
4108
4109 -       /*
4110 -        * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
4111 +       /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
4112          * The external wake up irq can be passed through the platform code
4113          * named as "eth_wake_irq"
4114          *
4115          * In case the wake up interrupt is not passed from the platform
4116          * so the driver will continue to use the mac irq (ndev->irq)
4117          */
4118 -       priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
4119 -       if (priv->wol_irq < 0) {
4120 -               if (priv->wol_irq == -EPROBE_DEFER)
4121 +       stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
4122 +       if (stmmac_res->wol_irq < 0) {
4123 +               if (stmmac_res->wol_irq == -EPROBE_DEFER)
4124                         return -EPROBE_DEFER;
4125 -               priv->wol_irq = priv->dev->irq;
4126 +               stmmac_res->wol_irq = stmmac_res->irq;
4127         }
4128
4129 -       priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
4130 -       if (priv->lpi_irq == -EPROBE_DEFER)
4131 +       stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
4132 +       if (stmmac_res->lpi_irq == -EPROBE_DEFER)
4133                 return -EPROBE_DEFER;
4134
4135 -       platform_set_drvdata(pdev, priv->dev);
4136 -
4137 -       pr_debug("STMMAC platform driver registration completed");
4138 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
4139 +       stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res);
4140
4141 -       return 0;
4142 +       return PTR_ERR_OR_ZERO(stmmac_res->addr);
4143  }
4144 +EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
4145
4146  /**
4147   * stmmac_pltfr_remove
4148 @@ -354,7 +291,7 @@ static int stmmac_pltfr_probe(struct pla
4149   * Description: this function calls the main to free the net resources
4150   * and calls the platforms hook and release the resources (e.g. mem).
4151   */
4152 -static int stmmac_pltfr_remove(struct platform_device *pdev)
4153 +int stmmac_pltfr_remove(struct platform_device *pdev)
4154  {
4155         struct net_device *ndev = platform_get_drvdata(pdev);
4156         struct stmmac_priv *priv = netdev_priv(ndev);
4157 @@ -363,13 +300,18 @@ static int stmmac_pltfr_remove(struct pl
4158         if (priv->plat->exit)
4159                 priv->plat->exit(pdev, priv->plat->bsp_priv);
4160
4161 -       if (priv->plat->free)
4162 -               priv->plat->free(pdev, priv->plat->bsp_priv);
4163 -
4164         return ret;
4165  }
4166 +EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
4167
4168 -#ifdef CONFIG_PM
4169 +#ifdef CONFIG_PM_SLEEP
4170 +/**
4171 + * stmmac_pltfr_suspend
4172 + * @dev: device pointer
4173 + * Description: this function is invoked when suspend the driver and it direcly
4174 + * call the main suspend function and then, if required, on some platform, it
4175 + * can call an exit helper.
4176 + */
4177  static int stmmac_pltfr_suspend(struct device *dev)
4178  {
4179         int ret;
4180 @@ -384,6 +326,13 @@ static int stmmac_pltfr_suspend(struct d
4181         return ret;
4182  }
4183
4184 +/**
4185 + * stmmac_pltfr_resume
4186 + * @dev: device pointer
4187 + * Description: this function is invoked when resume the driver before calling
4188 + * the main resume function, on some platforms, it can call own init helper
4189 + * if required.
4190 + */
4191  static int stmmac_pltfr_resume(struct device *dev)
4192  {
4193         struct net_device *ndev = dev_get_drvdata(dev);
4194 @@ -395,23 +344,12 @@ static int stmmac_pltfr_resume(struct de
4195
4196         return stmmac_resume(ndev);
4197  }
4198 +#endif /* CONFIG_PM_SLEEP */
4199
4200 -#endif /* CONFIG_PM */
4201 -
4202 -static SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops,
4203 -                       stmmac_pltfr_suspend, stmmac_pltfr_resume);
4204 -
4205 -struct platform_driver stmmac_pltfr_driver = {
4206 -       .probe = stmmac_pltfr_probe,
4207 -       .remove = stmmac_pltfr_remove,
4208 -       .driver = {
4209 -                  .name = STMMAC_RESOURCE_NAME,
4210 -                  .owner = THIS_MODULE,
4211 -                  .pm = &stmmac_pltfr_pm_ops,
4212 -                  .of_match_table = of_match_ptr(stmmac_dt_ids),
4213 -                  },
4214 -};
4215 +SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
4216 +                                      stmmac_pltfr_resume);
4217 +EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
4218
4219 -MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PLATFORM driver");
4220 +MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
4221  MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
4222  MODULE_LICENSE("GPL");
4223 --- /dev/null
4224 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h
4225 @@ -0,0 +1,33 @@
4226 +/*******************************************************************************
4227 +  Copyright (C) 2007-2009  STMicroelectronics Ltd
4228 +
4229 +  This program is free software; you can redistribute it and/or modify it
4230 +  under the terms and conditions of the GNU General Public License,
4231 +  version 2, as published by the Free Software Foundation.
4232 +
4233 +  This program is distributed in the hope it will be useful, but WITHOUT
4234 +  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4235 +  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
4236 +  more details.
4237 +
4238 +  The full GNU General Public License is included in this distribution in
4239 +  the file called "COPYING".
4240 +
4241 +  Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
4242 +*******************************************************************************/
4243 +
4244 +#ifndef __STMMAC_PLATFORM_H__
4245 +#define __STMMAC_PLATFORM_H__
4246 +
4247 +#include "stmmac.h"
4248 +
4249 +struct plat_stmmacenet_data *
4250 +stmmac_probe_config_dt(struct platform_device *pdev, const char **mac);
4251 +
4252 +int stmmac_get_platform_resources(struct platform_device *pdev,
4253 +                                 struct stmmac_resources *stmmac_res);
4254 +
4255 +int stmmac_pltfr_remove(struct platform_device *pdev);
4256 +extern const struct dev_pm_ops stmmac_pltfr_pm_ops;
4257 +
4258 +#endif /* __STMMAC_PLATFORM_H__ */