ipq806x: refactor l2 freq scaling patch
[oweals/openwrt.git] / target / linux / ipq806x / files-4.19 / arch / arm / boot / dts / qcom-ipq8064-ap148.dts
1 #include "qcom-ipq8064-v1.0.dtsi"
2
3 / {
4         model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
5         compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
6
7         memory@0 {
8                 reg = <0x42000000 0x1e000000>;
9                 device_type = "memory";
10         };
11
12         reserved-memory {
13                 #address-cells = <1>;
14                 #size-cells = <1>;
15                 ranges;
16                 rsvd@41200000 {
17                         reg = <0x41200000 0x300000>;
18                         no-map;
19                 };
20         };
21
22         aliases {
23                 serial0 = &gsbi4_serial;
24                 mdio-gpio0 = &mdio0;
25         };
26
27         chosen {
28                 stdout-path = "serial0:115200n8";
29         };
30
31         soc {
32                 mdio0: mdio {
33                         compatible = "virtual,mdio-gpio";
34                         #address-cells = <1>;
35                         #size-cells = <0>;
36                         gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
37                                 <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
38                         pinctrl-0 = <&mdio0_pins>;
39                         pinctrl-names = "default";
40
41                         phy0: ethernet-phy@0 {
42                                 reg = <0>;
43                                 qca,ar8327-initvals = <
44                                         0x00004 0x7600000   /* PAD0_MODE */
45                                         0x00008 0x1000000   /* PAD5_MODE */
46                                         0x0000c 0x80        /* PAD6_MODE */
47                                         0x000e4 0x6a545     /* MAC_POWER_SEL */
48                                         0x000e0 0xc74164de  /* SGMII_CTRL */
49                                         0x0007c 0x4e        /* PORT0_STATUS */
50                                         0x00094 0x4e        /* PORT6_STATUS */
51                                         >;
52                         };
53
54                         phy4: ethernet-phy@4 {
55                                 reg = <4>;
56                         };
57                 };
58         };
59 };
60
61 &qcom_pinmux {
62         i2c4_pins: i2c4_pinmux {
63                 pins = "gpio12", "gpio13";
64                 function = "gsbi4";
65                 bias-disable;
66         };
67
68         nand_pins: nand_pins {
69                 disable {
70                         pins = "gpio34", "gpio35", "gpio36",
71                                "gpio37", "gpio38";
72                         function = "nand";
73                         drive-strength = <10>;
74                         bias-disable;
75                 };
76
77                 pullups {
78                         pins = "gpio39";
79                         function = "nand";
80                         drive-strength = <10>;
81                         bias-pull-up;
82                 };
83
84                 hold {
85                         pins = "gpio40", "gpio41", "gpio42",
86                                "gpio43", "gpio44", "gpio45",
87                                "gpio46", "gpio47";
88                         function = "nand";
89                         drive-strength = <10>;
90                         bias-bus-hold;
91                 };
92         };
93
94         mdio0_pins: mdio0_pins {
95                 mux {
96                         pins = "gpio0", "gpio1";
97                         function = "gpio";
98                         drive-strength = <8>;
99                         bias-disable;
100                 };
101         };
102
103         rgmii2_pins: rgmii2_pins {
104                 mux {
105                         pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
106                                "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
107                         function = "rgmii2";
108                         drive-strength = <8>;
109                         bias-disable;
110                 };
111         };
112 };
113
114 &adm_dma {
115         status = "okay";
116 };
117
118 &gsbi4 {
119         qcom,mode = <GSBI_PROT_I2C_UART>;
120         status = "okay";
121
122         serial@16340000 {
123                 status = "okay";
124         };
125
126         /*
127         * The i2c device on gsbi4 should not be enabled.
128         * On ipq806x designs gsbi4 i2c is meant for exclusive
129         * RPM usage. Turning this on in kernel manifests as
130         * i2c failure for the RPM.
131         */
132 };
133
134 &gsbi5 {
135         qcom,mode = <GSBI_PROT_SPI>;
136         status = "okay";
137
138         spi4: spi@1a280000 {
139                 status = "okay";
140                 spi-max-frequency = <50000000>;
141
142                 pinctrl-0 = <&spi_pins>;
143                 pinctrl-names = "default";
144
145                 cs-gpios = <&qcom_pinmux 20 0>;
146
147                 flash: m25p80@0 {
148                         compatible = "s25fl256s1";
149                         #address-cells = <1>;
150                         #size-cells = <1>;
151                         spi-max-frequency = <50000000>;
152                         reg = <0>;
153
154                         partitions {
155                                 compatible = "qcom,smem";
156                         };
157                 };
158         };
159 };
160
161 &usb3_0 {
162         status = "okay";
163 };
164
165 &usb3_1 {
166         status = "okay";
167 };
168
169 &pcie0 {
170         status = "okay";
171 };
172
173 &pcie1 {
174         status = "okay";
175         force_gen1 = <1>;
176 };
177
178 &nand {
179         status = "okay";
180
181         pinctrl-0 = <&nand_pins>;
182         pinctrl-names = "default";
183
184         cs0 {
185                 reg = <0>;
186                 compatible = "qcom,nandcs";
187
188                 nand-ecc-strength = <4>;
189                 nand-bus-width = <8>;
190                 nand-ecc-step-size = <512>;
191
192                 partitions {
193                         compatible = "qcom,smem";
194                 };
195         };
196 };
197
198 &gmac1 {
199         status = "okay";
200         phy-mode = "rgmii";
201         qcom,id = <1>;
202
203         pinctrl-0 = <&rgmii2_pins>;
204         pinctrl-names = "default";
205
206         fixed-link {
207                 speed = <1000>;
208                 full-duplex;
209         };
210 };
211
212 &gmac2 {
213         status = "okay";
214         phy-mode = "sgmii";
215         qcom,id = <2>;
216
217         fixed-link {
218                 speed = <1000>;
219                 full-duplex;
220         };
221 };
222
223 &sata_phy {
224         status = "okay";
225 };
226
227 &sata {
228         status = "okay";
229 };