target/linux/ipq40xx/patches-4.19/900-dts-ipq4019-ap-dk01.1.patch

   1 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
   2 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
   3 @@ -15,6 +15,7 @@
   4   */
   5
   6  #include "qcom-ipq4019.dtsi"
   7 +#include <dt-bindings/soc/qcom,tcsr.h>
   8
   9  / {
  10         model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
  11 @@ -29,6 +30,32 @@
  12         };
  13
  14         soc {
  15 +               tcsr@194b000 {
  16 +                       /* select hostmode */
  17 +                       compatible = "qcom,tcsr";
  18 +                       reg = <0x194b000 0x100>;
  19 +                       qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  20 +                       status = "ok";
  21 +               };
  22 +
  23 +               ess_tcsr@1953000 {
  24 +                       compatible = "qcom,tcsr";
  25 +                       reg = <0x1953000 0x1000>;
  26 +                       qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  27 +               };
  28 +
  29 +               tcsr@1949000 {
  30 +                       compatible = "qcom,tcsr";
  31 +                       reg = <0x1949000 0x100>;
  32 +                       qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  33 +               };
  34 +
  35 +               tcsr@1957000 {
  36 +                       compatible = "qcom,tcsr";
  37 +                       reg = <0x1957000 0x100>;
  38 +                       qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  39 +               };
  40 +
  41                 rng@22000 {
  42                         status = "ok";
  43                 };
  44 @@ -74,14 +101,6 @@
  45                         pinctrl-names = "default";
  46                         status = "ok";
  47                         cs-gpios = <&tlmm 54 0>;
  48 -
  49 -                       mx25l25635e@0 {
  50 -                               #address-cells = <1>;
  51 -                               #size-cells = <1>;
  52 -                               reg = <0>;
  53 -                               compatible = "mx25l25635e";
  54 -                               spi-max-frequency = <24000000>;
  55 -                       };
  56                 };
  57
  58                 serial@78af000 {
  59 @@ -110,6 +129,22 @@
  60                         status = "ok";
  61                 };
  62
  63 +               mdio@90000 {
  64 +                       status = "okay";
  65 +               };
  66 +
  67 +               ess-switch@c000000 {
  68 +                       status = "okay";
  69 +               };
  70 +
  71 +               ess-psgmii@98000 {
  72 +                       status = "okay";
  73 +               };
  74 +
  75 +               edma@c080000 {
  76 +                       status = "okay";
  77 +               };
  78 +
  79                 usb3_ss_phy: ssphy@9a000 {
  80                         status = "ok";
  81                 };
  82 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
  83 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
  84 @@ -18,5 +18,73 @@
  85
  86  / {
  87         model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
  88 +       compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1", "qcom,ipq4019";
  89
  90 +       memory {
  91 +               device_type = "memory";
  92 +               reg = <0x80000000 0x10000000>;
  93 +       };
  94 +};
  95 +
  96 +&blsp1_spi1 {
  97 +       mx25l25635f@0 {
  98 +               compatible = "mx25l25635f", "jedec,spi-nor";
  99 +               #address-cells = <1>;
 100 +               #size-cells = <1>;
 101 +               reg = <0>;
 102 +               spi-max-frequency = <24000000>;
 103 +
 104 +               SBL1@0 {
 105 +                       label = "SBL1";
 106 +                       reg = <0x0 0x40000>;
 107 +                       read-only;
 108 +               };
 109 +               MIBIB@40000 {
 110 +                       label = "MIBIB";
 111 +                       reg = <0x40000 0x20000>;
 112 +                       read-only;
 113 +               };
 114 +               QSEE@60000 {
 115 +                       label = "QSEE";
 116 +                       reg = <0x60000 0x60000>;
 117 +                       read-only;
 118 +               };
 119 +               CDT@c0000 {
 120 +                       label = "CDT";
 121 +                       reg = <0xc0000 0x10000>;
 122 +                       read-only;
 123 +               };
 124 +               DDRPARAMS@d0000 {
 125 +                       label = "DDRPARAMS";
 126 +                       reg = <0xd0000 0x10000>;
 127 +                       read-only;
 128 +               };
 129 +               APPSBLENV@e0000 {
 130 +                       label = "APPSBLENV";
 131 +                       reg = <0xe0000 0x10000>;
 132 +                       read-only;
 133 +               };
 134 +               APPSBL@f0000 {
 135 +                       label = "APPSBL";
 136 +                       reg = <0xf0000 0x80000>;
 137 +                       read-only;
 138 +               };
 139 +               ART@170000 {
 140 +                       label = "ART";
 141 +                       reg = <0x170000 0x10000>;
 142 +                       read-only;
 143 +               };
 144 +               kernel@180000 {
 145 +                       label = "kernel";
 146 +                       reg = <0x180000 0x400000>;
 147 +               };
 148 +               rootfs@580000 {
 149 +                       label = "rootfs";
 150 +                       reg = <0x580000 0x1600000>;
 151 +               };
 152 +               firmware@180000 {
 153 +                       label = "firmware";
 154 +                       reg = <0x180000 0x1a00000>;
 155 +               };
 156 +       };
 157  };