target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch

   1 From 633f0e08498aebfdb932bd71319b4cb136709499 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <john@phrozen.org>
   3 Date: Tue, 24 Jul 2018 14:45:49 +0200
   4 Subject: [PATCH 2/3] phy: qcom-ipq4019-usb: add driver for QCOM/IPQ4019
   5
   6 Add a driver to setup the USB phy on Qualcom Dakota SoCs.
   7 The driver sets up HS and SS phys. In case of HS some magic values need to
   8 be written to magic offsets. These were taken from the SDK driver.
   9
  10 Signed-off-by: John Crispin <john@phrozen.org>
  11 ---
  12  drivers/phy/qualcomm/Kconfig                |   7 ++
  13  drivers/phy/qualcomm/Makefile               |   1 +
  14  drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 188 ++++++++++++++++++++++++++++
  15  3 files changed, 196 insertions(+)
  16  create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
  17
  18 Index: linux-4.14.54/drivers/phy/qualcomm/Kconfig
  19 ===================================================================
  20 --- linux-4.14.54.orig/drivers/phy/qualcomm/Kconfig
  21 +++ linux-4.14.54/drivers/phy/qualcomm/Kconfig
  22 @@ -8,6 +8,13 @@ config PHY_QCOM_APQ8064_SATA
  23         depends on OF
  24         select GENERIC_PHY
  25
  26 +config PHY_QCOM_IPQ4019_USB
  27 +       tristate "Qualcomm IPQ4019 USB PHY module"
  28 +       depends on OF && ARCH_QCOM
  29 +       select GENERIC_PHY
  30 +       help
  31 +         Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
  32 +
  33  config PHY_QCOM_IPQ806X_SATA
  34         tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
  35         depends on ARCH_QCOM
  36 Index: linux-4.14.54/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
  37 ===================================================================
  38 --- /dev/null
  39 +++ linux-4.14.54/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
  40 @@ -0,0 +1,188 @@
  41 +/*
  42 + * Copyright (C) 2018 John Crispin <john@phrozen.org>
  43 + *
  44 + * Based on code from
  45 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  46 + *
  47 + * This program is free software; you can redistribute it and/or modify
  48 + * it under the terms of the GNU General Public License as published by
  49 + * the Free Software Foundation; either version 2 of the License, or
  50 + * (at your option) any later version.
  51 + *
  52 + * This program is distributed in the hope that it will be useful,
  53 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  54 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55 + * GNU General Public License for more details.
  56 + */
  57 +
  58 +#include <linux/delay.h>
  59 +#include <linux/err.h>
  60 +#include <linux/io.h>
  61 +#include <linux/kernel.h>
  62 +#include <linux/module.h>
  63 +#include <linux/mutex.h>
  64 +#include <linux/of_platform.h>
  65 +#include <linux/phy/phy.h>
  66 +#include <linux/platform_device.h>
  67 +#include <linux/reset.h>
  68 +
  69 +/*
  70 + * Magic registers copied from the SDK driver code
  71 + */
  72 +#define PHY_CTRL0_ADDR 0x000
  73 +#define PHY_CTRL1_ADDR 0x004
  74 +#define PHY_CTRL2_ADDR 0x008
  75 +#define PHY_CTRL3_ADDR 0x00C
  76 +#define PHY_CTRL4_ADDR 0x010
  77 +#define PHY_MISC_ADDR  0x024
  78 +#define PHY_IPG_ADDR   0x030
  79 +
  80 +#define PHY_CTRL0_VAL  0xA4600015
  81 +#define PHY_CTRL1_VAL  0x09500000
  82 +#define PHY_CTRL2_VAL  0x00058180
  83 +#define PHY_CTRL3_VAL  0x6DB6DCD6
  84 +#define PHY_CTRL4_VAL  0x836DB6DB
  85 +#define PHY_MISC_VAL   0x3803FB0C
  86 +#define PHY_IPG_VAL    0x47323232
  87 +
  88 +struct ipq4019_usb_phy {
  89 +       struct device           *dev;
  90 +       struct phy              *phy;
  91 +       void __iomem            *base;
  92 +       struct reset_control    *por_rst;
  93 +       struct reset_control    *srif_rst;
  94 +};
  95 +
  96 +static int ipq4019_ss_phy_power_off(struct phy *_phy)
  97 +{
  98 +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
  99 +
 100 +       reset_control_assert(phy->por_rst);
 101 +       msleep(10);
 102 +
 103 +       return 0;
 104 +}
 105 +
 106 +static int ipq4019_ss_phy_power_on(struct phy *_phy)
 107 +{
 108 +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
 109 +
 110 +       ipq4019_ss_phy_power_off(_phy);
 111 +
 112 +       reset_control_deassert(phy->por_rst);
 113 +
 114 +       return 0;
 115 +}
 116 +
 117 +static struct phy_ops ipq4019_usb_ss_phy_ops = {
 118 +       .power_on       = ipq4019_ss_phy_power_on,
 119 +       .power_off      = ipq4019_ss_phy_power_off,
 120 +};
 121 +
 122 +static int ipq4019_hs_phy_power_off(struct phy *_phy)
 123 +{
 124 +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
 125 +
 126 +       reset_control_assert(phy->por_rst);
 127 +       msleep(10);
 128 +
 129 +       reset_control_assert(phy->srif_rst);
 130 +       msleep(10);
 131 +
 132 +       return 0;
 133 +}
 134 +
 135 +static int ipq4019_hs_phy_power_on(struct phy *_phy)
 136 +{
 137 +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
 138 +
 139 +       ipq4019_hs_phy_power_off(_phy);
 140 +
 141 +       reset_control_deassert(phy->srif_rst);
 142 +       msleep(10);
 143 +
 144 +       writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
 145 +       writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
 146 +       writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
 147 +       writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
 148 +       writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
 149 +       writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
 150 +       writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
 151 +       msleep(10);
 152 +
 153 +       reset_control_deassert(phy->por_rst);
 154 +
 155 +       return 0;
 156 +}
 157 +
 158 +static struct phy_ops ipq4019_usb_hs_phy_ops = {
 159 +       .power_on       = ipq4019_hs_phy_power_on,
 160 +       .power_off      = ipq4019_hs_phy_power_off,
 161 +};
 162 +
 163 +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
 164 +       { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
 165 +       { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
 166 +       { },
 167 +};
 168 +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
 169 +
 170 +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
 171 +{
 172 +       struct device *dev = &pdev->dev;
 173 +       struct resource *res;
 174 +       struct phy_provider *phy_provider;
 175 +       struct ipq4019_usb_phy *phy;
 176 +       const struct of_device_id *match;
 177 +
 178 +       match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
 179 +       if (!match)
 180 +               return -ENODEV;
 181 +
 182 +       phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
 183 +       if (!phy)
 184 +               return -ENOMEM;
 185 +
 186 +       phy->dev = &pdev->dev;
 187 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 188 +       phy->base = devm_ioremap_resource(&pdev->dev, res);
 189 +       if (IS_ERR(phy->base)) {
 190 +               dev_err(dev, "failed to remap register memory\n");
 191 +               return PTR_ERR(phy->base);
 192 +       }
 193 +
 194 +       phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
 195 +       if (IS_ERR(phy->por_rst)) {
 196 +               if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
 197 +                       dev_err(dev, "POR reset is missing\n");
 198 +               return PTR_ERR(phy->por_rst);
 199 +       }
 200 +
 201 +       phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
 202 +       if (IS_ERR(phy->srif_rst))
 203 +               return PTR_ERR(phy->srif_rst);
 204 +
 205 +       phy->phy = devm_phy_create(dev, NULL, match->data);
 206 +       if (IS_ERR(phy->phy)) {
 207 +               dev_err(dev, "failed to create PHY\n");
 208 +               return PTR_ERR(phy->phy);
 209 +       }
 210 +       phy_set_drvdata(phy->phy, phy);
 211 +
 212 +       phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 213 +
 214 +       return PTR_ERR_OR_ZERO(phy_provider);
 215 +}
 216 +
 217 +static struct platform_driver ipq4019_usb_phy_driver = {
 218 +       .probe  = ipq4019_usb_phy_probe,
 219 +       .driver = {
 220 +               .of_match_table = ipq4019_usb_phy_of_match,
 221 +               .name  = "ipq4019-usb-phy",
 222 +       }
 223 +};
 224 +module_platform_driver(ipq4019_usb_phy_driver);
 225 +
 226 +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
 227 +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
 228 +MODULE_LICENSE("GPL v2");
 229 Index: linux-4.14.54/drivers/phy/qualcomm/Makefile
 230 ===================================================================
 231 --- linux-4.14.54.orig/drivers/phy/qualcomm/Makefile
 232 +++ linux-4.14.54/drivers/phy/qualcomm/Makefile
 233 @@ -1,5 +1,6 @@
 234  # SPDX-License-Identifier: GPL-2.0
 235  obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)    += phy-qcom-apq8064-sata.o
 236 +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)     += phy-qcom-ipq4019-usb.o
 237  obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)    += phy-qcom-ipq806x-sata.o
 238  obj-$(CONFIG_PHY_QCOM_QMP)             += phy-qcom-qmp.o
 239  obj-$(CONFIG_PHY_QCOM_QUSB2)           += phy-qcom-qusb2.o