target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4029-mr33.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for Meraki MR33 (Stinkbug)
   4  *
   5  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   6  * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
   7  *
   8  * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without
  12  * any warranty of any kind, whether express or implied.
  13  */
  14
  15 #include "qcom-ipq4019.dtsi"
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/input/input.h>
  18 #include <dt-bindings/soc/qcom,tcsr.h>
  19
  20 / {
  21         model = "Meraki MR33 Access Point";
  22         compatible = "meraki,mr33", "qcom,ipq4019";
  23
  24         aliases {
  25                 led-boot = &status_green;
  26                 led-failsafe = &status_red;
  27                 led-running = &status_green;
  28                 led-upgrade = &power_orange;
  29         };
  30
  31         /* Do we really need this defined? */
  32         memory {
  33                 device_type = "memory";
  34                 reg = <0x80000000 0x10000000>;
  35         };
  36
  37         soc {
  38                 rng@22000 {
  39                         status = "okay";
  40                 };
  41
  42                 mdio@90000 {
  43                         status = "okay";
  44                         pinctrl-0 = <&mdio_pins>;
  45                         pinctrl-names = "default";
  46                         /delete-node/ ethernet-phy@0;
  47                         /delete-node/ ethernet-phy@2;
  48                         /delete-node/ ethernet-phy@3;
  49                         /delete-node/ ethernet-phy@4;
  50                 };
  51
  52                 /* It is a 56-bit counter that supplies the count to the ARM arch
  53                    timers and without upstream driver */
  54                 counter@4a1000 {
  55                         compatible = "qcom,qca-gcnt";
  56                         reg = <0x4a1000 0x4>;
  57                 };
  58
  59                 ess_tcsr@1953000 {
  60                         compatible = "qcom,tcsr";
  61                         reg = <0x1953000 0x1000>;
  62                         qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
  63                 };
  64
  65                 tcsr@1949000 {
  66                         compatible = "qcom,tcsr";
  67                         reg = <0x1949000 0x100>;
  68                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  69                 };
  70
  71                 tcsr@1957000 {
  72                         compatible = "qcom,tcsr";
  73                         reg = <0x1957000 0x100>;
  74                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  75                 };
  76
  77                 serial@78b0000 {
  78                         pinctrl-0 = <&serial_1_pins>;
  79                         pinctrl-names = "default";
  80                         status = "okay";
  81
  82                         bluetooth {
  83                                 compatible = "ti,cc2650";
  84                                 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  85                         };
  86                 };
  87
  88                 crypto@8e3a000 {
  89                         status = "okay";
  90                 };
  91
  92                 watchdog@b017000 {
  93                         status = "okay";
  94                 };
  95
  96                 ess-switch@c000000 {
  97                         switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
  98                         switch_lan_bmp = <0x0>; /* lan port bitmap */
  99                         switch_wan_bmp = <0x10>; /* wan port bitmap */
 100                 };
 101
 102                 edma@c080000 {
 103                         qcom,single-phy;
 104                         qcom,num_gmac = <1>;
 105                         phy-mode = "rgmii-rxid";
 106                         status = "okay";
 107                 };
 108         };
 109
 110         keys {
 111                 compatible = "gpio-keys";
 112
 113                 reset {
 114                         label = "reset";
 115                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 116                         linux,code = <KEY_RESTART>;
 117                 };
 118         };
 119
 120         leds {
 121                 compatible = "gpio-leds";
 122
 123                 power_orange: power {
 124                         label = "mr33:orange:power";
 125                         gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
 126                         panic-indicator;
 127                 };
 128         };
 129 };
 130
 131 &blsp_dma {
 132         status = "okay";
 133 };
 134
 135 &blsp1_uart1 {
 136         pinctrl-0 = <&serial_0_pins>;
 137         pinctrl-names = "default";
 138         status = "okay";
 139 };
 140
 141 &cryptobam {
 142         status = "okay";
 143 };
 144
 145 &gmac0 {
 146         qcom,phy_mdio_addr = <1>;
 147         qcom,poll_required = <1>;
 148         vlan_tag = <0 0x20>;
 149 };
 150
 151 &blsp1_i2c3{
 152         pinctrl-0 = <&i2c_0_pins>;
 153         pinctrl-names = "default";
 154         status = "okay";
 155         at24@50 {
 156                 compatible = "atmel,24c64";
 157                 pagesize = <32>;
 158                 reg = <0x50>;
 159                 read-only; /* This holds our MAC & Meraki board-data */
 160         };
 161 };
 162
 163 &blsp1_i2c4{
 164         pinctrl-0 = <&i2c_1_pins>;
 165         pinctrl-names = "default";
 166         status = "okay";
 167
 168         led-controller@30 {
 169                 compatible = "ti,lp5562";
 170                 reg = <0x30>;
 171                 clock-mode = /bits/8 <2>;
 172                 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 173
 174                 /* RGB led */
 175                 status_red: chan0 {
 176                         chan-name = "mr33:red:status";
 177                         led-cur = /bits/ 8 <0x20>;
 178                         max-cur = /bits/ 8 <0x60>;
 179                 };
 180
 181                 status_green: chan1 {
 182                         chan-name = "mr33:green:status";
 183                         led-cur = /bits/ 8 <0x20>;
 184                         max-cur = /bits/ 8 <0x60>;
 185                 };
 186
 187                 chan2 {
 188                         chan-name = "mr33:blue:status";
 189                         led-cur = /bits/ 8 <0x20>;
 190                         max-cur = /bits/ 8 <0x60>;
 191                 };
 192
 193                 chan3 {
 194                         chan-name = "mr33:white:status";
 195                         led-cur = /bits/ 8 <0x20>;
 196                         max-cur = /bits/ 8 <0x60>;
 197                 };
 198         };
 199 };
 200
 201 &nand {
 202         pinctrl-0 = <&nand_pins>;
 203         pinctrl-names = "default";
 204         status = "okay";
 205
 206         nand@0 {
 207                 partitions {
 208                         compatible = "fixed-partitions";
 209                         #address-cells = <1>;
 210                         #size-cells = <1>;
 211
 212                         partition@0 {
 213                                 label = "sbl1";
 214                                 reg = <0x000000000000 0x000000100000>;
 215                                 read-only;
 216                         };
 217                         partition@1 {
 218                                 label = "mibib";
 219                                 reg = <0x000000100000 0x000000100000>;
 220                                 read-only;
 221                         };
 222                         partition@2 {
 223                                 label = "bootconfig";
 224                                 reg = <0x000000200000 0x000000100000>;
 225                                 read-only;
 226                         };
 227                         partition@3 {
 228                                 label = "qsee";
 229                                 reg = <0x000000300000 0x000000100000>;
 230                                 read-only;
 231                         };
 232                         partition@4 {
 233                                 label = "qsee_alt";
 234                                 reg = <0x000000400000 0x000000100000>;
 235                                 read-only;
 236                         };
 237                         partition@5 {
 238                                 label = "cdt";
 239                                 reg = <0x000000500000 0x000000080000>;
 240                                 read-only;
 241                         };
 242                         partition@6 {
 243                                 label = "cdt_alt";
 244                                 reg = <0x000000580000 0x000000080000>;
 245                                 read-only;
 246                         };
 247                         partition@7 {
 248                                 label = "ddrparams";
 249                                 reg = <0x000000600000 0x000000080000>;
 250                                 read-only;
 251                         };
 252                         partition@8 {
 253                                 label = "u-boot";
 254                                 reg = <0x000000700000 0x000000200000>;
 255                                 read-only;
 256                         };
 257                         partition@9 {
 258                                 label = "u-boot-backup";
 259                                 reg = <0x000000900000 0x000000200000>;
 260                                 read-only;
 261                         };
 262                         partition@10 {
 263                                 label = "ART";
 264                                 reg = <0x000000b00000 0x000000080000>;
 265                                 read-only;
 266                         };
 267                         partition@11 {
 268                                 label = "ubi";
 269                                 reg = <0x000000c00000 0x000007000000>;
 270                         };
 271                 };
 272         };
 273 };
 274
 275 &pcie0 {
 276         status = "okay";
 277         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 278         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 279
 280         bridge@0,0 {
 281                 reg = <0x00000000 0 0 0 0>;
 282                 #address-cells = <3>;
 283                 #size-cells = <2>;
 284                 ranges;
 285
 286                 wifi2: wifi@0,0 {
 287                         compatible = "qcom,ath10k";
 288                         status = "okay";
 289                         reg = <0x00010000 0 0 0 0>;
 290                 };
 291         };
 292 };
 293
 294 &qpic_bam {
 295         status = "okay";
 296 };
 297
 298 &tlmm {
 299         /*
 300          * GPIO43 should be 0/1 whenever the unit is
 301          * powered through PoE or AC-Adapter.
 302          * That said, playing with this seems to
 303          * reset the AP.
 304          */
 305
 306         mdio_pins: mdio_pinmux {
 307                 mux_1 {
 308                         pins = "gpio6";
 309                         function = "mdio";
 310                         bias-pull-up;
 311                 };
 312                 mux_2 {
 313                         pins = "gpio7";
 314                         function = "mdc";
 315                         bias-pull-up;
 316                 };
 317         };
 318
 319         serial_0_pins: serial_pinmux {
 320                 mux {
 321                         pins = "gpio16", "gpio17";
 322                         function = "blsp_uart0";
 323                         bias-disable;
 324                 };
 325         };
 326
 327         serial_1_pins: serial1_pinmux {
 328                 mux {
 329                         /* We use the i2c-0 pins for serial_1 */
 330                         pins = "gpio8", "gpio9";
 331                         function = "blsp_uart1";
 332                         bias-disable;
 333                 };
 334         };
 335
 336         i2c_0_pins: i2c_0_pinmux {
 337                 pinmux {
 338                         function = "blsp_i2c0";
 339                         pins = "gpio20", "gpio21";
 340                 };
 341                 pinconf {
 342                         pins = "gpio20", "gpio21";
 343                         drive-strength = <16>;
 344                         bias-disable;
 345                 };
 346         };
 347
 348         i2c_1_pins: i2c_1_pinmux {
 349                 pinmux {
 350                         function = "blsp_i2c1";
 351                         pins = "gpio34", "gpio35";
 352                 };
 353                 pinconf {
 354                         pins = "gpio34", "gpio35";
 355                         drive-strength = <16>;
 356                         bias-disable;
 357                 };
 358         };
 359
 360         nand_pins: nand_pins {
 361                 /*
 362                  * There are 18 pins. 15 pins are common between LCD and NAND.
 363                  * The QPIC controller arbitrates between LCD and NAND. Of the
 364                  * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
 365                  *
 366                  * The meraki source hints that the bluetooth module claims
 367                  * pin 52 as well. But sadly, there's no data whenever this
 368                  * is a NAND or LCD exclusive pin or not.
 369                  */
 370
 371                 pullups {
 372                         pins = "gpio52", "gpio53", "gpio58",
 373                                 "gpio59";
 374                         function = "qpic";
 375                         bias-pull-up;
 376                 };
 377
 378                 pulldowns {
 379                         pins = "gpio54", "gpio55", "gpio56",
 380                                 "gpio57", "gpio60", "gpio61",
 381                                 "gpio62", "gpio63", "gpio64",
 382                                 "gpio65", "gpio66", "gpio67",
 383                                 "gpio68", "gpio69";
 384                         function = "qpic";
 385                         bias-pull-down;
 386                 };
 387         };
 388 };
 389
 390 &wifi0 {
 391         status = "okay";
 392         qcom,ath10k-calibration-variant = "Meraki-MR33";
 393 };
 394
 395 &wifi1 {
 396         status = "okay";
 397         qcom,ath10k-calibration-variant = "Meraki-MR33";
 398 };