target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  *
  16  */
  17
  18 #include "qcom-ipq4019.dtsi"
  19 #include <dt-bindings/gpio/gpio.h>
  20 #include <dt-bindings/input/input.h>
  21 #include <dt-bindings/soc/qcom,tcsr.h>
  22
  23 / {
  24         model = "8devices Jalapeno";
  25         compatible = "8dev,jalapeno", "qcom,ipq4019";
  26
  27         soc {
  28                 mdio@90000 {
  29                         status = "okay";
  30                         pinctrl-0 = <&mdio_pins>;
  31                         pinctrl-names = "default";
  32                 };
  33
  34                 ess-psgmii@98000 {
  35                         status = "okay";
  36                 };
  37
  38                 counter@4a1000 {
  39                         compatible = "qcom,qca-gcnt";
  40                         reg = <0x4a1000 0x4>;
  41                 };
  42
  43                 tcsr@1949000 {
  44                         compatible = "qcom,tcsr";
  45                         reg = <0x1949000 0x100>;
  46                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  47                 };
  48
  49                 tcsr@194b000 {
  50                         /* select hostmode */
  51                         compatible = "qcom,tcsr";
  52                         reg = <0x194b000 0x100>;
  53                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  54                         status = "okay";
  55                 };
  56
  57                 ess_tcsr@1953000 {
  58                         compatible = "qcom,tcsr";
  59                         reg = <0x1953000 0x1000>;
  60                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  61                 };
  62
  63                 tcsr@1957000 {
  64                         compatible = "qcom,tcsr";
  65                         reg = <0x1957000 0x100>;
  66                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  67                 };
  68
  69                 usb2: usb2@60f8800 {
  70                         status = "okay";
  71                 };
  72
  73                 usb3: usb3@8af8800 {
  74                         status = "okay";
  75                 };
  76
  77                 crypto@8e3a000 {
  78                         status = "okay";
  79                 };
  80
  81                 watchdog@b017000 {
  82                         status = "okay";
  83                 };
  84
  85                 ess-switch@c000000 {
  86                         status = "okay";
  87                         switch_lan_bmp = <0x10>; /* lan port bitmap */
  88                 };
  89
  90                 edma@c080000 {
  91                         status = "okay";
  92                 };
  93         };
  94 };
  95
  96 &tlmm {
  97         mdio_pins: mdio_pinmux {
  98                 pinmux_1 {
  99                         pins = "gpio53";
 100                         function = "mdio";
 101                 };
 102                 pinmux_2 {
 103                         pins = "gpio52";
 104                         function = "mdc";
 105                 };
 106                 pinconf {
 107                         pins = "gpio52", "gpio53";
 108                         bias-pull-up;
 109                 };
 110         };
 111
 112         serial_pins: serial_pinmux {
 113                 mux {
 114                         pins = "gpio60", "gpio61";
 115                         function = "blsp_uart0";
 116                         bias-disable;
 117                 };
 118         };
 119
 120         spi_0_pins: spi_0_pinmux {
 121                 pin {
 122                         function = "blsp_spi0";
 123                         pins = "gpio55", "gpio56", "gpio57";
 124                         drive-strength = <2>;
 125                         bias-disable;
 126                 };
 127                 pin_cs {
 128                         function = "gpio";
 129                         pins = "gpio54", "gpio59";
 130                         drive-strength = <2>;
 131                         bias-disable;
 132                         output-high;
 133                 };
 134         };
 135 };
 136
 137 &blsp_dma {
 138         status = "okay";
 139 };
 140
 141 &blsp1_spi1 {
 142         pinctrl-0 = <&spi_0_pins>;
 143         pinctrl-names = "default";
 144         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
 145         status = "okay";
 146
 147         m25p80@0 {
 148                 reg = <0>;
 149                 compatible = "jedec,spi-nor";
 150                 spi-max-frequency = <24000000>;
 151
 152                 partitions {
 153                         compatible = "fixed-partitions";
 154                         #address-cells = <1>;
 155                         #size-cells = <1>;
 156
 157                         partition0@0 {
 158                                 label = "SBL1";
 159                                 reg = <0x00000000 0x00040000>;
 160                                 read-only;
 161                         };
 162                         partition1@40000 {
 163                                 label = "MIBIB";
 164                                 reg = <0x00040000 0x00020000>;
 165                                 read-only;
 166                         };
 167                         partition2@60000 {
 168                                 label = "QSEE";
 169                                 reg = <0x00060000 0x00060000>;
 170                                 read-only;
 171                         };
 172                         partition3@c0000 {
 173                                 label = "CDT";
 174                                 reg = <0x000c0000 0x00010000>;
 175                                 read-only;
 176                         };
 177                         partition4@d0000 {
 178                                 label = "DDRPARAMS";
 179                                 reg = <0x000d0000 0x00010000>;
 180                                 read-only;
 181                         };
 182                         partition5@e0000 {
 183                                 label = "APPSBLENV"; /* uboot env*/
 184                                 reg = <0x000e0000 0x00010000>;
 185                                 read-only;
 186                         };
 187                         partition5@f0000 {
 188                                 label = "APPSBL"; /* uboot */
 189                                 reg = <0x000f0000 0x00080000>;
 190                                 read-only;
 191                         };
 192                         partition5@170000 {
 193                                 label = "ART";
 194                                 reg = <0x00170000 0x00010000>;
 195                                 read-only;
 196                         };
 197                 };
 198         };
 199
 200         spi-nand@1 {
 201                 status = "okay";
 202                 compatible = "spi-nand";
 203                 reg = <1>;
 204                 spi-max-frequency = <24000000>;
 205                 partitions {
 206                         compatible = "fixed-partitions";
 207                         #address-cells = <1>;
 208                         #size-cells = <1>;
 209
 210                         partition0@0 {
 211                                 label = "ubi";
 212                                 reg = <0x00000000 0x08000000>;
 213                         };
 214                 };
 215         };
 216 };
 217
 218 &blsp1_uart1 {
 219         pinctrl-0 = <&serial_pins>;
 220         pinctrl-names = "default";
 221         status = "okay";
 222 };
 223
 224 &cryptobam {
 225         status = "okay";
 226 };
 227
 228 &gmac0 {
 229         qcom,poll_required = <1>;
 230         qcom,poll_required_dynamic = <1>;
 231         qcom,phy_mdio_addr = <3>;
 232         vlan_tag = <1 0x10>;
 233 };
 234
 235 &gmac1 {
 236         qcom,poll_required = <1>;
 237         qcom,poll_required_dynamic = <1>;
 238         qcom,phy_mdio_addr = <4>;
 239         vlan_tag = <2 0x20>;
 240 };
 241
 242 &wifi0 {
 243         status = "okay";
 244         qcom,ath10k-calibration-variant = "8devices-Jalapeno";
 245 };
 246
 247 &wifi1 {
 248         status = "okay";
 249         qcom,ath10k-calibration-variant = "8devices-Jalapeno";
 250 };
 251
 252 &usb3_ss_phy {
 253         status = "okay";
 254 };
 255
 256 &usb3_hs_phy {
 257         status = "okay";
 258 };
 259
 260 &usb2_hs_phy {
 261         status = "okay";
 262 };