ipq806x: enable QCE hardware crypto inside the kernel
[oweals/openwrt.git] / target / linux / imx6 / patches-4.4 / 112-serial-imx-let-irq-handler-return-IRQ_NONE-if-no-eve.patch
1 From de4356da2cd1a1857513047997d81143cb95a4e1 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
3 Date: Thu, 24 Mar 2016 14:24:21 +0100
4 Subject: [PATCH 2/3] serial: imx: let irq handler return IRQ_NONE if no event
5  was handled
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 This gives the irq core a chance to disable the serial interrupt in case
11 an event isn't cleared in the handler.
12
13 Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
14 Signed-off-by: Petr Štetiar <ynezz@true.cz>
15 ---
16  drivers/tty/serial/imx.c | 17 +++++++++++++----
17  1 file changed, 13 insertions(+), 4 deletions(-)
18
19 --- a/drivers/tty/serial/imx.c
20 +++ b/drivers/tty/serial/imx.c
21 @@ -753,6 +753,7 @@ static irqreturn_t imx_int(int irq, void
22         struct imx_port *sport = dev_id;
23         unsigned int sts;
24         unsigned int sts2;
25 +       irqreturn_t ret = IRQ_NONE;
26  
27         sts = readl(sport->port.membase + USR1);
28         sts2 = readl(sport->port.membase + USR2);
29 @@ -762,26 +763,34 @@ static irqreturn_t imx_int(int irq, void
30                         imx_dma_rxint(sport);
31                 else
32                         imx_rxint(irq, dev_id);
33 +               ret = IRQ_HANDLED;
34         }
35  
36         if ((sts & USR1_TRDY &&
37              readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) ||
38             (sts2 & USR2_TXDC &&
39 -            readl(sport->port.membase + UCR4) & UCR4_TCEN))
40 +            readl(sport->port.membase + UCR4) & UCR4_TCEN)) {
41                 imx_txint(irq, dev_id);
42 +               ret = IRQ_HANDLED;
43 +       }
44  
45 -       if (sts & USR1_RTSD)
46 +       if (sts & USR1_RTSD) {
47                 imx_rtsint(irq, dev_id);
48 +               ret = IRQ_HANDLED;
49 +       }
50  
51 -       if (sts & USR1_AWAKE)
52 +       if (sts & USR1_AWAKE) {
53                 writel(USR1_AWAKE, sport->port.membase + USR1);
54 +               ret = IRQ_HANDLED;
55 +       }
56  
57         if (sts2 & USR2_ORE) {
58                 sport->port.icount.overrun++;
59                 writel(USR2_ORE, sport->port.membase + USR2);
60 +               ret = IRQ_HANDLED;
61         }
62  
63 -       return IRQ_HANDLED;
64 +       return ret;
65  }
66  
67  /*