target/linux/ifxmips/files/drivers/serial/ifxmips_asc.c

   1 /*
   2  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  17  *
  18  * Copyright (C) 2004 Infineon IFAP DC COM CPE
  19  * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
  20  * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/errno.h>
  25 #include <linux/signal.h>
  26 #include <linux/sched.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/tty.h>
  29 #include <linux/tty_flip.h>
  30 #include <linux/major.h>
  31 #include <linux/string.h>
  32 #include <linux/fcntl.h>
  33 #include <linux/ptrace.h>
  34 #include <linux/ioport.h>
  35 #include <linux/mm.h>
  36 #include <linux/slab.h>
  37 #include <linux/init.h>
  38 #include <linux/circ_buf.h>
  39 #include <linux/serial.h>
  40 #include <linux/serial_core.h>
  41 #include <linux/console.h>
  42 #include <linux/sysrq.h>
  43 #include <linux/irq.h>
  44
  45 #include <asm/system.h>
  46 #include <asm/io.h>
  47 #include <asm/uaccess.h>
  48 #include <asm/bitops.h>
  49 #include <asm/ifxmips/ifxmips.h>
  50 #include <asm/ifxmips/ifxmips_irq.h>
  51 #include <asm/ifxmips/ifxmips_serial.h>
  52
  53 #define PORT_IFXMIPSASC  111
  54
  55 #include <linux/serial_core.h>
  56
  57 #define UART_DUMMY_UER_RX 1
  58
  59 static void ifxmipsasc_tx_chars(struct uart_port *port);
  60 extern void prom_printf(const char * fmt, ...);
  61 static struct uart_port ifxmipsasc_port[2];
  62 static struct uart_driver ifxmipsasc_reg;
  63 static unsigned int uartclk = 0;
  64 extern unsigned int ifxmips_get_fpi_hz(void);
  65
  66 static void
  67 ifxmipsasc_stop_tx(struct uart_port *port)
  68 {
  69         return;
  70 }
  71
  72 static void
  73 ifxmipsasc_start_tx(struct uart_port *port)
  74 {
  75         unsigned long flags;
  76         local_irq_save(flags);
  77         ifxmipsasc_tx_chars(port);
  78         local_irq_restore(flags);
  79         return;
  80 }
  81
  82 static void
  83 ifxmipsasc_stop_rx(struct uart_port *port)
  84 {
  85         ifxmips_w32(ASCWHBSTATE_CLRREN, port->membase + IFXMIPS_ASC_WHBSTATE);
  86 }
  87
  88 static void
  89 ifxmipsasc_enable_ms(struct uart_port *port)
  90 {
  91 }
  92
  93 static void
  94 ifxmipsasc_rx_chars(struct uart_port *port)
  95 {
  96         struct tty_struct *tty = port->info->tty;
  97         unsigned int ch = 0, rsr = 0, fifocnt;
  98
  99         fifocnt = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
 100         while(fifocnt--)
 101         {
 102                 u8 flag = TTY_NORMAL;
 103                 ch = ifxmips_r32(port->membase + IFXMIPS_ASC_RBUF);
 104                 rsr = (ifxmips_r32(port->membase + IFXMIPS_ASC_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
 105                 tty_flip_buffer_push(tty);
 106                 port->icount.rx++;
 107
 108                 /*
 109                  * Note that the error handling code is
 110                  * out of the main execution path
 111                  */
 112                 if(rsr & ASCSTATE_ANY)
 113                 {
 114                         if(rsr & ASCSTATE_PE)
 115                         {
 116                                 port->icount.parity++;
 117                                 ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE, port->membase + IFXMIPS_ASC_WHBSTATE);
 118                         } else if(rsr & ASCSTATE_FE)
 119                         {
 120                                 port->icount.frame++;
 121                                 ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRFE, port->membase + IFXMIPS_ASC_WHBSTATE);
 122                         }
 123                         if(rsr & ASCSTATE_ROE)
 124                         {
 125                                 port->icount.overrun++;
 126                                 ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
 127                         }
 128
 129                         rsr &= port->read_status_mask;
 130
 131                         if(rsr & ASCSTATE_PE)
 132                                 flag = TTY_PARITY;
 133                         else if(rsr & ASCSTATE_FE)
 134                                 flag = TTY_FRAME;
 135                 }
 136
 137                 if((rsr & port->ignore_status_mask) == 0)
 138                         tty_insert_flip_char(tty, ch, flag);
 139
 140                 if(rsr & ASCSTATE_ROE)
 141                         /*
 142                          * Overrun is special, since it's reported
 143                          * immediately, and doesn't affect the current
 144                          * character
 145                          */
 146                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 147         }
 148         if(ch != 0)
 149                 tty_flip_buffer_push(tty);
 150         return;
 151 }
 152
 153
 154 static void
 155 ifxmipsasc_tx_chars(struct uart_port *port)
 156 {
 157         struct circ_buf *xmit = &port->info->xmit;
 158
 159         if(uart_tx_stopped(port))
 160         {
 161                 ifxmipsasc_stop_tx(port);
 162                 return;
 163         }
 164
 165         while(((ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK)
 166                                 >> ASCFSTAT_TXFFLOFF) != IFXMIPSASC_TXFIFO_FULL)
 167         {
 168                 if(port->x_char)
 169                 {
 170                         ifxmips_w32(port->x_char, port->membase + IFXMIPS_ASC_TBUF);
 171                         port->icount.tx++;
 172                         port->x_char = 0;
 173                         continue;
 174                 }
 175
 176                 if(uart_circ_empty(xmit))
 177                         break;
 178
 179                 ifxmips_w32(port->info->xmit.buf[port->info->xmit.tail], port->membase + IFXMIPS_ASC_TBUF);
 180                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 181                 port->icount.tx++;
 182         }
 183
 184         if(uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 185                 uart_write_wakeup(port);
 186 }
 187
 188 static irqreturn_t
 189 ifxmipsasc_tx_int(int irq, void *_port)
 190 {
 191         struct uart_port *port = (struct uart_port*) _port;
 192         ifxmips_w32(ASC_IRNCR_TIR, port->membase + IFXMIPS_ASC_IRNCR);
 193         ifxmipsasc_start_tx(port);
 194         ifxmips_mask_and_ack_irq(irq);
 195         return IRQ_HANDLED;
 196 }
 197
 198 static irqreturn_t
 199 ifxmipsasc_er_int(int irq, void *_port)
 200 {
 201         struct uart_port *port = (struct uart_port*) _port;
 202         /* clear any pending interrupts */
 203         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE |
 204                         ASCWHBSTATE_CLRFE | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
 205         return IRQ_HANDLED;
 206 }
 207
 208 static irqreturn_t
 209 ifxmipsasc_rx_int(int irq, void *_port)
 210 {
 211         struct uart_port *port = (struct uart_port*)_port;
 212         ifxmips_w32(ASC_IRNCR_RIR, port->membase + IFXMIPS_ASC_IRNCR);
 213         ifxmipsasc_rx_chars((struct uart_port*)port);
 214         ifxmips_mask_and_ack_irq(irq);
 215         return IRQ_HANDLED;
 216 }
 217
 218 static unsigned int
 219 ifxmipsasc_tx_empty(struct uart_port *port)
 220 {
 221         int status;
 222         status = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
 223         return status ? 0 : TIOCSER_TEMT;
 224 }
 225
 226 static unsigned int
 227 ifxmipsasc_get_mctrl(struct uart_port *port)
 228 {
 229         return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
 230 }
 231
 232 static void
 233 ifxmipsasc_set_mctrl(struct uart_port *port, u_int mctrl)
 234 {
 235 }
 236
 237 static void
 238 ifxmipsasc_break_ctl(struct uart_port *port, int break_state)
 239 {
 240 }
 241
 242 static int
 243 ifxmipsasc_startup(struct uart_port *port)
 244 {
 245         unsigned long flags;
 246         int retval;
 247
 248         if(uartclk == 0)
 249                 uartclk = ifxmips_get_fpi_hz();
 250
 251         port->uartclk = uartclk;
 252
 253         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~IFXMIPS_ASC_CLC_DISS, port->membase + IFXMIPS_ASC_CLC);
 254         ifxmips_w32(((ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~ASCCLC_RMCMASK)) | (1 << ASCCLC_RMCOFFSET), port->membase + IFXMIPS_ASC_CLC);
 255         ifxmips_w32(0, port->membase + IFXMIPS_ASC_PISEL);
 256         ifxmips_w32(((IFXMIPSASC_TXFIFO_FL << ASCTXFCON_TXFITLOFF) & ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
 257         ifxmips_w32(((IFXMIPSASC_RXFIFO_FL << ASCRXFCON_RXFITLOFF) & ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
 258         wmb ();
 259         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN, port->membase + IFXMIPS_ASC_CON);
 260
 261         local_irq_save(flags);
 262
 263         retval = request_irq(port->irq, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
 264         if(retval)
 265         {
 266                 printk("failed to request ifxmipsasc_rx_int\n");
 267                 return retval;
 268         }
 269
 270         retval = request_irq(port->irq + 2, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
 271         if(retval)
 272         {
 273                 printk("failed to request ifxmipsasc_tx_int\n");
 274                 goto err1;
 275         }
 276
 277         retval = request_irq(port->irq + 3, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
 278         if(retval)
 279         {
 280                 printk("failed to request ifxmipsasc_er_int\n");
 281                 goto err2;
 282         }
 283
 284         ifxmips_w32(ASC_IRNREN_RX_BUF | ASC_IRNREN_TX_BUF | ASC_IRNREN_ERR | ASC_IRNREN_TX, port->membase + IFXMIPS_ASC_IRNREN);
 285
 286         local_irq_restore(flags);
 287         return 0;
 288
 289 err2:
 290         free_irq(port->irq + 2, port);
 291 err1:
 292         free_irq(port->irq, port);
 293         local_irq_restore(flags);
 294         return retval;
 295 }
 296
 297 static void
 298 ifxmipsasc_shutdown(struct uart_port *port)
 299 {
 300         free_irq(port->irq, port);
 301         free_irq(port->irq + 2, port);
 302         free_irq(port->irq + 3, port);
 303
 304         ifxmips_w32(0, port->membase + IFXMIPS_ASC_CON);
 305         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
 306         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) & ~ASCRXFCON_RXFEN, port->membase + IFXMIPS_ASC_RXFCON);
 307         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
 308         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) & ~ASCTXFCON_TXFEN, port->membase + IFXMIPS_ASC_TXFCON);
 309 }
 310
 311 static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
 312 {
 313         unsigned int cflag;
 314         unsigned int iflag;
 315         unsigned int quot;
 316         unsigned int baud;
 317         unsigned int con = 0;
 318         unsigned long flags;
 319
 320         cflag = new->c_cflag;
 321         iflag = new->c_iflag;
 322
 323         switch(cflag & CSIZE)
 324         {
 325         case CS7:
 326                 con = ASCCON_M_7ASYNC;
 327                 break;
 328
 329         case CS5:
 330         case CS6:
 331         default:
 332                 con = ASCCON_M_8ASYNC;
 333                 break;
 334         }
 335
 336         if(cflag & CSTOPB)
 337                 con |= ASCCON_STP;
 338
 339         if(cflag & PARENB)
 340         {
 341                 if(!(cflag & PARODD))
 342                         con &= ~ASCCON_ODD;
 343                 else
 344                         con |= ASCCON_ODD;
 345         }
 346
 347         port->read_status_mask = ASCSTATE_ROE;
 348         if(iflag & INPCK)
 349                 port->read_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
 350
 351         port->ignore_status_mask = 0;
 352         if(iflag & IGNPAR)
 353                 port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
 354
 355         if(iflag & IGNBRK)
 356         {
 357                 /*
 358                  * If we're ignoring parity and break indicators,
 359                  * ignore overruns too (for real raw support).
 360                  */
 361                 if(iflag & IGNPAR)
 362                         port->ignore_status_mask |= ASCSTATE_ROE;
 363         }
 364
 365         if((cflag & CREAD) == 0)
 366                 port->ignore_status_mask |= UART_DUMMY_UER_RX;
 367
 368         /* set error signals  - framing, parity  and overrun, enable receiver */
 369         con |= ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN;
 370
 371         local_irq_save(flags);
 372
 373         /* set up CON */
 374         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | con, port->membase + IFXMIPS_ASC_CON);
 375
 376         /* Set baud rate - take a divider of 2 into account */
 377     baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
 378         quot = uart_get_divisor(port, baud);
 379         quot = quot / 2 - 1;
 380
 381         /* disable the baudrate generator */
 382         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_R, port->membase + IFXMIPS_ASC_CON);
 383
 384         /* make sure the fractional divider is off */
 385         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_FDE, port->membase + IFXMIPS_ASC_CON);
 386
 387         /* set up to use divisor of 2 */
 388         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_BRS, port->membase + IFXMIPS_ASC_CON);
 389
 390         /* now we can write the new baudrate into the register */
 391         ifxmips_w32(quot, port->membase + IFXMIPS_ASC_BG);
 392
 393         /* turn the baudrate generator back on */
 394         ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_R, port->membase + IFXMIPS_ASC_CON);
 395
 396         /* enable rx */
 397         ifxmips_w32(ASCWHBSTATE_SETREN, port->membase + IFXMIPS_ASC_WHBSTATE);
 398
 399         local_irq_restore(flags);
 400 }
 401
 402 static const char*
 403 ifxmipsasc_type(struct uart_port *port)
 404 {
 405         return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL;
 406 }
 407
 408 static void
 409 ifxmipsasc_release_port(struct uart_port *port)
 410 {
 411 }
 412
 413 static int
 414 ifxmipsasc_request_port(struct uart_port *port)
 415 {
 416         return 0;
 417 }
 418
 419 static void
 420 ifxmipsasc_config_port(struct uart_port *port, int flags)
 421 {
 422         if(flags & UART_CONFIG_TYPE)
 423         {
 424                 port->type = PORT_IFXMIPSASC;
 425                 ifxmipsasc_request_port(port);
 426         }
 427 }
 428
 429 static int
 430 ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
 431 {
 432         int ret = 0;
 433         if(ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
 434                 ret = -EINVAL;
 435         if(ser->irq < 0 || ser->irq >= NR_IRQS)
 436                 ret = -EINVAL;
 437         if(ser->baud_base < 9600)
 438                 ret = -EINVAL;
 439         return ret;
 440 }
 441
 442 static struct uart_ops ifxmipsasc_pops =
 443 {
 444         .tx_empty =             ifxmipsasc_tx_empty,
 445         .set_mctrl =    ifxmipsasc_set_mctrl,
 446         .get_mctrl =    ifxmipsasc_get_mctrl,
 447         .stop_tx =              ifxmipsasc_stop_tx,
 448         .start_tx =             ifxmipsasc_start_tx,
 449         .stop_rx =              ifxmipsasc_stop_rx,
 450         .enable_ms =    ifxmipsasc_enable_ms,
 451         .break_ctl =    ifxmipsasc_break_ctl,
 452         .startup =              ifxmipsasc_startup,
 453         .shutdown =             ifxmipsasc_shutdown,
 454         .set_termios =  ifxmipsasc_set_termios,
 455         .type =                 ifxmipsasc_type,
 456         .release_port = ifxmipsasc_release_port,
 457         .request_port = ifxmipsasc_request_port,
 458         .config_port =  ifxmipsasc_config_port,
 459         .verify_port =  ifxmipsasc_verify_port,
 460 };
 461
 462 static struct uart_port ifxmipsasc_port[2] =
 463 {
 464         {
 465                 membase:                (void *)IFXMIPS_ASC_BASE_ADDR,
 466                 mapbase:                IFXMIPS_ASC_BASE_ADDR,
 467                 iotype:                 SERIAL_IO_MEM,
 468                 irq:                    IFXMIPSASC_RIR(0),
 469                 uartclk:                0,
 470                 fifosize:               16,
 471                 type:                   PORT_IFXMIPSASC,
 472                 ops:                    &ifxmipsasc_pops,
 473                 flags:                  ASYNC_BOOT_AUTOCONF,
 474         }, {
 475                 membase:                (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
 476                 mapbase:                IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
 477                 iotype:                 SERIAL_IO_MEM,
 478                 irq:                    IFXMIPSASC_RIR(1),
 479                 uartclk:                0,
 480                 fifosize:               16,
 481                 type:                   PORT_IFXMIPSASC,
 482                 ops:                    &ifxmipsasc_pops,
 483                 flags:                  ASYNC_BOOT_AUTOCONF,
 484         }
 485 };
 486
 487 static void
 488 ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
 489 {
 490         int i, fifocnt;
 491         unsigned long flags;
 492
 493         local_irq_save(flags);
 494         for(i = 0; i < count; i++)
 495         {
 496                 /* wait until the FIFO is not full */
 497                 do
 498                 {
 499                         fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
 500                                         >> ASCFSTAT_TXFFLOFF;
 501                 }while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
 502
 503                 if(s[i] == '\0')
 504                         break;
 505
 506                 if(s[i] == '\n')
 507                 {
 508                         ifxmips_w32('\r', (u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
 509                         do
 510                         {
 511                                 fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
 512                                         >> ASCFSTAT_TXFFLOFF;
 513                         } while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
 514                 }
 515                 ifxmips_w32(s[i], (u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
 516         }
 517
 518         local_irq_restore(flags);
 519 }
 520
 521 static int __init
 522 ifxmipsasc_console_setup(struct console *co, char *options)
 523 {
 524         struct uart_port *port;
 525         int baud = 115200;
 526         int bits = 8;
 527         int parity = 'n';
 528         int flow = 'n';
 529
 530         if(uartclk == 0)
 531                 uartclk = ifxmips_get_fpi_hz();
 532         co->index = 0;
 533         port = &ifxmipsasc_port[co->index];
 534         ifxmipsasc_port[co->index].uartclk = uartclk;
 535         ifxmipsasc_port[co->index].type = PORT_IFXMIPSASC;
 536
 537         if(options)
 538                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 539
 540         return uart_set_options(port, co, baud, parity, bits, flow);
 541 }
 542
 543 static struct console ifxmipsasc_console[2] =
 544 {
 545         {
 546                 name:           "ttyS",
 547                 write:          ifxmipsasc_console_write,
 548                 device:         uart_console_device,
 549                 setup:          ifxmipsasc_console_setup,
 550                 flags:          CON_PRINTBUFFER,
 551                 index:          0,
 552                 data:           &ifxmipsasc_reg,
 553         }, {
 554                 name:           "ttyS",
 555                 write:          ifxmipsasc_console_write,
 556                 device:         uart_console_device,
 557                 setup:          ifxmipsasc_console_setup,
 558                 flags:          CON_PRINTBUFFER,
 559                 index:          1,
 560                 data:           &ifxmipsasc_reg,
 561         }
 562 };
 563
 564 static int __init
 565 ifxmipsasc_console_init(void)
 566 {
 567         register_console(&ifxmipsasc_console[0]);
 568         register_console(&ifxmipsasc_console[1]);
 569         return 0;
 570 }
 571 console_initcall(ifxmipsasc_console_init);
 572
 573 static struct uart_driver ifxmipsasc_reg =
 574 {
 575         .owner =                        THIS_MODULE,
 576         .driver_name =          "serial",
 577         .dev_name =                     "ttyS",
 578         .major =                        TTY_MAJOR,
 579         .minor =                        64,
 580         .nr =                           2,
 581         .cons =                         ifxmipsasc_console,
 582 };
 583
 584 static int __init
 585 ifxmipsasc_init(void)
 586 {
 587         unsigned char res;
 588
 589         uart_register_driver(&ifxmipsasc_reg);
 590         res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
 591         res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
 592
 593         return res;
 594 }
 595
 596 static void __exit
 597 ifxmipsasc_exit(void)
 598 {
 599         uart_unregister_driver(&ifxmipsasc_reg);
 600 }
 601
 602 module_init(ifxmipsasc_init);
 603 module_exit(ifxmipsasc_exit);
 604
 605 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 606 MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
 607 MODULE_LICENSE("GPL");