kernel: add missing patch
[oweals/openwrt.git] / target / linux / generic / pending-4.9 / 735-net-phy-at803x-fix-at8033-sgmii-mode.patch
1 From: Roman Yeryomin <roman@advem.lv>
2 Subject: kernel: add at803x fix for sgmii mode
3
4 Some (possibly broken) bootloaders incorreclty initialize at8033
5 phy. This patch enables sgmii autonegotiation mode.
6
7 [john@phrozen.org: felix added this to his upstream queue]
8
9 Signed-off-by: Roman Yeryomin <roman@advem.lv>
10 ---
11  drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++
12  1 file changed, 25 insertions(+)
13
14 diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
15 index 4a55130dcb1c..434efb68bc5d 100644
16 --- a/drivers/net/phy/at803x.c
17 +++ b/drivers/net/phy/at803x.c
18 @@ -55,6 +55,10 @@
19  #define AT803X_DEBUG_ADDR                      0x1D
20  #define AT803X_DEBUG_DATA                      0x1E
21  
22 +#define AT803X_REG_CHIP_CONFIG                 0x1f
23 +#define AT803X_BT_BX_REG_SEL                   0x8000
24 +#define AT803X_SGMII_ANEG_EN                   0x1000
25 +
26  #define AT803X_MODE_CFG_MASK                   0x0F
27  #define AT803X_MODE_CFG_SGMII                  0x01
28  
29 @@ -295,6 +299,27 @@ static int at803x_config_init(struct phy_device *phydev)
30  {
31         struct at803x_platform_data *pdata;
32         int ret;
33 +       u32 v;
34 +
35 +       if (phydev->drv->phy_id == ATH8031_PHY_ID &&
36 +               phydev->interface == PHY_INTERFACE_MODE_SGMII)
37 +       {
38 +               v = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
39 +               /* select SGMII/fiber page */
40 +               ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
41 +                                               v & ~AT803X_BT_BX_REG_SEL);
42 +               if (ret)
43 +                       return ret;
44 +               /* enable SGMII autonegotiation */
45 +               ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN);
46 +               if (ret)
47 +                       return ret;
48 +               /* select copper page */
49 +               ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
50 +                                               v | AT803X_BT_BX_REG_SEL);
51 +               if (ret)
52 +                       return ret;
53 +       }
54  
55         ret = genphy_config_init(phydev);
56         if (ret < 0)
57 -- 
58 2.11.0
59