v1.5 branch refresh based upon upstream master @ c8677ca89e53e3be7988d54280fce166cc894a7e
[librecmc/librecmc.git] / target / linux / generic / pending-4.9 / 735-net-phy-at803x-fix-at8033-sgmii-mode.patch
1 From: Roman Yeryomin <roman@advem.lv>
2 Subject: kernel: add at803x fix for sgmii mode
3
4 Some (possibly broken) bootloaders incorreclty initialize at8033
5 phy. This patch enables sgmii autonegotiation mode.
6
7 [john@phrozen.org: felix added this to his upstream queue]
8
9 Signed-off-by: Roman Yeryomin <roman@advem.lv>
10 ---
11  drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++
12  1 file changed, 25 insertions(+)
13
14 --- a/drivers/net/phy/at803x.c
15 +++ b/drivers/net/phy/at803x.c
16 @@ -55,6 +55,10 @@
17  #define AT803X_DEBUG_ADDR                      0x1D
18  #define AT803X_DEBUG_DATA                      0x1E
19  
20 +#define AT803X_REG_CHIP_CONFIG                 0x1f
21 +#define AT803X_BT_BX_REG_SEL                   0x8000
22 +#define AT803X_SGMII_ANEG_EN                   0x1000
23 +
24  #define AT803X_MODE_CFG_MASK                   0x0F
25  #define AT803X_MODE_CFG_SGMII                  0x01
26  
27 @@ -293,6 +297,27 @@ static int at803x_config_init(struct phy
28  {
29         struct at803x_platform_data *pdata;
30         int ret;
31 +       u32 v;
32 +
33 +       if (phydev->drv->phy_id == ATH8031_PHY_ID &&
34 +               phydev->interface == PHY_INTERFACE_MODE_SGMII)
35 +       {
36 +               v = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
37 +               /* select SGMII/fiber page */
38 +               ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
39 +                                               v & ~AT803X_BT_BX_REG_SEL);
40 +               if (ret)
41 +                       return ret;
42 +               /* enable SGMII autonegotiation */
43 +               ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN);
44 +               if (ret)
45 +                       return ret;
46 +               /* select copper page */
47 +               ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG,
48 +                                               v | AT803X_BT_BX_REG_SEL);
49 +               if (ret)
50 +                       return ret;
51 +       }
52  
53         ret = genphy_config_init(phydev);
54         if (ret < 0)