v1.5 branch refresh based upon upstream master @ c8677ca89e53e3be7988d54280fce166cc894a7e
[librecmc/librecmc.git] / target / linux / generic / pending-4.4 / 071-v4.8-0004-net-ethernet-bgmac-convert-to-feature-flags.patch
1 From db791eb2970bad193b1dc95a4461b222dd22cb64 Mon Sep 17 00:00:00 2001
2 From: Jon Mason <jon.mason@broadcom.com>
3 Date: Thu, 7 Jul 2016 19:08:56 -0400
4 Subject: [PATCH 4/5] net: ethernet: bgmac: convert to feature flags
5
6 The bgmac driver is using the bcma provides device ID and revision, as
7 well as the SoC ID and package, to determine which features are
8 necessary to enable, reset, etc in the driver.   In anticipation of
9 removing the bcma requirement for this driver, these must be changed to
10 not reference that struct.  In place of that, each "feature" has been
11 given a flag, and the flags are enabled for their respective device and
12 SoC.
13
14 Signed-off-by: Jon Mason <jon.mason@broadcom.com>
15 Acked-by: Arnd Bergmann <arnd@arndb.de>
16 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
17 Tested-by: Florian Fainelli <f.fainelli@gmail.com>
18 Signed-off-by: David S. Miller <davem@davemloft.net>
19 ---
20  drivers/net/ethernet/broadcom/bgmac.c | 167 ++++++++++++++++++++++++----------
21  drivers/net/ethernet/broadcom/bgmac.h |  21 ++++-
22  2 files changed, 140 insertions(+), 48 deletions(-)
23
24 --- a/drivers/net/ethernet/broadcom/bgmac.c
25 +++ b/drivers/net/ethernet/broadcom/bgmac.c
26 @@ -109,7 +109,7 @@ static void bgmac_dma_tx_enable(struct b
27         u32 ctl;
28  
29         ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);
30 -       if (bgmac->core->id.rev >= 4) {
31 +       if (bgmac->feature_flags & BGMAC_FEAT_TX_MASK_SETUP) {
32                 ctl &= ~BGMAC_DMA_TX_BL_MASK;
33                 ctl |= BGMAC_DMA_TX_BL_128 << BGMAC_DMA_TX_BL_SHIFT;
34  
35 @@ -335,7 +335,7 @@ static void bgmac_dma_rx_enable(struct b
36         /* preserve ONLY bits 16-17 from current hardware value */
37         ctl &= BGMAC_DMA_RX_ADDREXT_MASK;
38  
39 -       if (bgmac->core->id.rev >= 4) {
40 +       if (bgmac->feature_flags & BGMAC_FEAT_RX_MASK_SETUP) {
41                 ctl &= ~BGMAC_DMA_RX_BL_MASK;
42                 ctl |= BGMAC_DMA_RX_BL_128 << BGMAC_DMA_RX_BL_SHIFT;
43  
44 @@ -772,14 +772,20 @@ static void bgmac_cmdcfg_maskset(struct
45  {
46         u32 cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);
47         u32 new_val = (cmdcfg & mask) | set;
48 +       u32 cmdcfg_sr;
49  
50 -       bgmac_set(bgmac, BGMAC_CMDCFG, BGMAC_CMDCFG_SR(bgmac->core->id.rev));
51 +       if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
52 +               cmdcfg_sr = BGMAC_CMDCFG_SR_REV4;
53 +       else
54 +               cmdcfg_sr = BGMAC_CMDCFG_SR_REV0;
55 +
56 +       bgmac_set(bgmac, BGMAC_CMDCFG, cmdcfg_sr);
57         udelay(2);
58  
59         if (new_val != cmdcfg || force)
60                 bgmac_write(bgmac, BGMAC_CMDCFG, new_val);
61  
62 -       bgmac_mask(bgmac, BGMAC_CMDCFG, ~BGMAC_CMDCFG_SR(bgmac->core->id.rev));
63 +       bgmac_mask(bgmac, BGMAC_CMDCFG, ~cmdcfg_sr);
64         udelay(2);
65  }
66  
67 @@ -808,7 +814,7 @@ static void bgmac_chip_stats_update(stru
68  {
69         int i;
70  
71 -       if (bgmac->core->id.id != BCMA_CORE_4706_MAC_GBIT) {
72 +       if (!(bgmac->feature_flags & BGMAC_FEAT_NO_CLR_MIB)) {
73                 for (i = 0; i < BGMAC_NUM_MIB_TX_REGS; i++)
74                         bgmac->mib_tx_regs[i] =
75                                 bgmac_read(bgmac,
76 @@ -827,7 +833,7 @@ static void bgmac_clear_mib(struct bgmac
77  {
78         int i;
79  
80 -       if (bgmac->core->id.id == BCMA_CORE_4706_MAC_GBIT)
81 +       if (bgmac->feature_flags & BGMAC_FEAT_NO_CLR_MIB)
82                 return;
83  
84         bgmac_set(bgmac, BGMAC_DEV_CTL, BGMAC_DC_MROR);
85 @@ -870,9 +876,8 @@ static void bgmac_mac_speed(struct bgmac
86  static void bgmac_miiconfig(struct bgmac *bgmac)
87  {
88         struct bcma_device *core = bgmac->core;
89 -       u8 imode;
90  
91 -       if (bgmac_is_bcm4707_family(bgmac)) {
92 +       if (bgmac->feature_flags & BGMAC_FEAT_FORCE_SPEED_2500) {
93                 bcma_awrite32(core, BCMA_IOCTL,
94                               bcma_aread32(core, BCMA_IOCTL) | 0x40 |
95                               BGMAC_BCMA_IOCTL_SW_CLKEN);
96 @@ -880,6 +885,8 @@ static void bgmac_miiconfig(struct bgmac
97                 bgmac->mac_duplex = DUPLEX_FULL;
98                 bgmac_mac_speed(bgmac);
99         } else {
100 +               u8 imode;
101 +
102                 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
103                         BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
104                 if (imode == 0 || imode == 1) {
105 @@ -894,9 +901,7 @@ static void bgmac_miiconfig(struct bgmac
106  static void bgmac_chip_reset(struct bgmac *bgmac)
107  {
108         struct bcma_device *core = bgmac->core;
109 -       struct bcma_bus *bus = core->bus;
110 -       struct bcma_chipinfo *ci = &bus->chipinfo;
111 -       u32 flags;
112 +       u32 cmdcfg_sr;
113         u32 iost;
114         int i;
115  
116 @@ -919,15 +924,12 @@ static void bgmac_chip_reset(struct bgma
117         }
118  
119         iost = bcma_aread32(core, BCMA_IOST);
120 -       if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
121 -           (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
122 -           (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188))
123 +       if (bgmac->feature_flags & BGMAC_FEAT_IOST_ATTACHED)
124                 iost &= ~BGMAC_BCMA_IOST_ATTACHED;
125  
126         /* 3GMAC: for BCM4707 & BCM47094, only do core reset at bgmac_probe() */
127 -       if (ci->id != BCMA_CHIP_ID_BCM4707 &&
128 -           ci->id != BCMA_CHIP_ID_BCM47094) {
129 -               flags = 0;
130 +       if (!(bgmac->feature_flags & BGMAC_FEAT_NO_RESET)) {
131 +               u32 flags = 0;
132                 if (iost & BGMAC_BCMA_IOST_ATTACHED) {
133                         flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
134                         if (!bgmac->has_robosw)
135 @@ -937,7 +939,7 @@ static void bgmac_chip_reset(struct bgma
136         }
137  
138         /* Request Misc PLL for corerev > 2 */
139 -       if (core->id.rev > 2 && !bgmac_is_bcm4707_family(bgmac)) {
140 +       if (bgmac->feature_flags & BGMAC_FEAT_MISC_PLL_REQ) {
141                 bgmac_set(bgmac, BCMA_CLKCTLST,
142                           BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
143                 bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
144 @@ -946,9 +948,7 @@ static void bgmac_chip_reset(struct bgma
145                                  1000);
146         }
147  
148 -       if (ci->id == BCMA_CHIP_ID_BCM5357 ||
149 -           ci->id == BCMA_CHIP_ID_BCM4749 ||
150 -           ci->id == BCMA_CHIP_ID_BCM53572) {
151 +       if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_PHY) {
152                 struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
153                 u8 et_swtype = 0;
154                 u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
155 @@ -962,11 +962,9 @@ static void bgmac_chip_reset(struct bgma
156                         et_swtype &= 0x0f;
157                         et_swtype <<= 4;
158                         sw_type = et_swtype;
159 -               } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM5358) {
160 +               } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_EPHYRMII) {
161                         sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
162 -               } else if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
163 -                          (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
164 -                          (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188)) {
165 +               } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_RGMII) {
166                         sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
167                                   BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
168                 }
169 @@ -986,6 +984,11 @@ static void bgmac_chip_reset(struct bgma
170          * BGMAC_CMDCFG is read _after_ putting chip in a reset. So it has to
171          * be keps until taking MAC out of the reset.
172          */
173 +       if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
174 +               cmdcfg_sr = BGMAC_CMDCFG_SR_REV4;
175 +       else
176 +               cmdcfg_sr = BGMAC_CMDCFG_SR_REV0;
177 +
178         bgmac_cmdcfg_maskset(bgmac,
179                              ~(BGMAC_CMDCFG_TE |
180                                BGMAC_CMDCFG_RE |
181 @@ -1003,13 +1006,13 @@ static void bgmac_chip_reset(struct bgma
182                              BGMAC_CMDCFG_PROM |
183                              BGMAC_CMDCFG_NLC |
184                              BGMAC_CMDCFG_CFE |
185 -                            BGMAC_CMDCFG_SR(core->id.rev),
186 +                            cmdcfg_sr,
187                              false);
188         bgmac->mac_speed = SPEED_UNKNOWN;
189         bgmac->mac_duplex = DUPLEX_UNKNOWN;
190  
191         bgmac_clear_mib(bgmac);
192 -       if (core->id.id == BCMA_CORE_4706_MAC_GBIT)
193 +       if (bgmac->feature_flags & BGMAC_FEAT_CMN_PHY_CTL)
194                 bcma_maskset32(bgmac->cmn, BCMA_GMAC_CMN_PHY_CTL, ~0,
195                                BCMA_GMAC_CMN_PC_MTE);
196         else
197 @@ -1035,46 +1038,48 @@ static void bgmac_chip_intrs_off(struct
198  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_enable */
199  static void bgmac_enable(struct bgmac *bgmac)
200  {
201 -       struct bcma_chipinfo *ci = &bgmac->core->bus->chipinfo;
202 +       u32 cmdcfg_sr;
203         u32 cmdcfg;
204         u32 mode;
205 -       u32 rxq_ctl;
206 -       u32 fl_ctl;
207 -       u16 bp_clk;
208 -       u8 mdp;
209 +
210 +       if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
211 +               cmdcfg_sr = BGMAC_CMDCFG_SR_REV4;
212 +       else
213 +               cmdcfg_sr = BGMAC_CMDCFG_SR_REV0;
214  
215         cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);
216         bgmac_cmdcfg_maskset(bgmac, ~(BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE),
217 -                            BGMAC_CMDCFG_SR(bgmac->core->id.rev), true);
218 +                            cmdcfg_sr, true);
219         udelay(2);
220         cmdcfg |= BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE;
221         bgmac_write(bgmac, BGMAC_CMDCFG, cmdcfg);
222  
223         mode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
224                 BGMAC_DS_MM_SHIFT;
225 -       if (ci->id != BCMA_CHIP_ID_BCM47162 || mode != 0)
226 +       if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST || mode != 0)
227                 bgmac_set(bgmac, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
228 -       if (ci->id == BCMA_CHIP_ID_BCM47162 && mode == 2)
229 +       if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST && mode == 2)
230                 bcma_chipco_chipctl_maskset(&bgmac->core->bus->drv_cc, 1, ~0,
231                                             BGMAC_CHIPCTL_1_RXC_DLL_BYPASS);
232  
233 -       switch (ci->id) {
234 -       case BCMA_CHIP_ID_BCM5357:
235 -       case BCMA_CHIP_ID_BCM4749:
236 -       case BCMA_CHIP_ID_BCM53572:
237 -       case BCMA_CHIP_ID_BCM4716:
238 -       case BCMA_CHIP_ID_BCM47162:
239 -               fl_ctl = 0x03cb04cb;
240 -               if (ci->id == BCMA_CHIP_ID_BCM5357 ||
241 -                   ci->id == BCMA_CHIP_ID_BCM4749 ||
242 -                   ci->id == BCMA_CHIP_ID_BCM53572)
243 +       if (bgmac->feature_flags & (BGMAC_FEAT_FLW_CTRL1 |
244 +                                   BGMAC_FEAT_FLW_CTRL2)) {
245 +               u32 fl_ctl;
246 +
247 +               if (bgmac->feature_flags & BGMAC_FEAT_FLW_CTRL1)
248                         fl_ctl = 0x2300e1;
249 +               else
250 +                       fl_ctl = 0x03cb04cb;
251 +
252                 bgmac_write(bgmac, BGMAC_FLOW_CTL_THRESH, fl_ctl);
253                 bgmac_write(bgmac, BGMAC_PAUSE_CTL, 0x27fff);
254 -               break;
255         }
256  
257 -       if (!bgmac_is_bcm4707_family(bgmac)) {
258 +       if (bgmac->feature_flags & BGMAC_FEAT_SET_RXQ_CLK) {
259 +               u32 rxq_ctl;
260 +               u16 bp_clk;
261 +               u8 mdp;
262 +
263                 rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
264                 rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
265                 bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
266 @@ -1606,6 +1611,74 @@ static int bgmac_probe(struct bcma_devic
267         if (core->bus->sprom.boardflags_lo & BGMAC_BFL_ENETADM)
268                 dev_warn(bgmac->dev, "Support for ADMtek ethernet switch not implemented\n");
269  
270 +       /* Feature Flags */
271 +       switch (core->bus->chipinfo.id) {
272 +       case BCMA_CHIP_ID_BCM5357:
273 +               bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
274 +               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
275 +               bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL1;
276 +               bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_PHY;
277 +               if (core->bus->chipinfo.pkg == BCMA_PKG_ID_BCM47186) {
278 +                       bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
279 +                       bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_RGMII;
280 +               }
281 +               if (core->bus->chipinfo.pkg == BCMA_PKG_ID_BCM5358)
282 +                       bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_EPHYRMII;
283 +               break;
284 +       case BCMA_CHIP_ID_BCM53572:
285 +               bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
286 +               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
287 +               bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL1;
288 +               bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_PHY;
289 +               if (core->bus->chipinfo.pkg == BCMA_PKG_ID_BCM47188) {
290 +                       bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_RGMII;
291 +                       bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
292 +               }
293 +               break;
294 +       case BCMA_CHIP_ID_BCM4749:
295 +               bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
296 +               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
297 +               bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL1;
298 +               bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_PHY;
299 +               if (core->bus->chipinfo.pkg == 10) {
300 +                       bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_RGMII;
301 +                       bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
302 +               }
303 +               break;
304 +       case BCMA_CHIP_ID_BCM4716:
305 +               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
306 +               /* fallthrough */
307 +       case BCMA_CHIP_ID_BCM47162:
308 +               bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL2;
309 +               bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
310 +               break;
311 +       /* bcm4707_family */
312 +       case BCMA_CHIP_ID_BCM4707:
313 +       case BCMA_CHIP_ID_BCM47094:
314 +       case BCMA_CHIP_ID_BCM53018:
315 +               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
316 +               bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
317 +               bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
318 +               break;
319 +       default:
320 +               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
321 +               bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
322 +       }
323 +
324 +       if (!bgmac_is_bcm4707_family(bgmac) && core->id.rev > 2)
325 +               bgmac->feature_flags |= BGMAC_FEAT_MISC_PLL_REQ;
326 +
327 +       if (core->id.id == BCMA_CORE_4706_MAC_GBIT) {
328 +               bgmac->feature_flags |= BGMAC_FEAT_CMN_PHY_CTL;
329 +               bgmac->feature_flags |= BGMAC_FEAT_NO_CLR_MIB;
330 +       }
331 +
332 +       if (core->id.rev >= 4) {
333 +               bgmac->feature_flags |= BGMAC_FEAT_CMDCFG_SR_REV4;
334 +               bgmac->feature_flags |= BGMAC_FEAT_TX_MASK_SETUP;
335 +               bgmac->feature_flags |= BGMAC_FEAT_RX_MASK_SETUP;
336 +       }
337 +
338         netif_napi_add(net_dev, &bgmac->napi, bgmac_poll, BGMAC_WEIGHT);
339  
340         if (!bgmac_is_bcm4707_family(bgmac)) {
341 --- a/drivers/net/ethernet/broadcom/bgmac.h
342 +++ b/drivers/net/ethernet/broadcom/bgmac.h
343 @@ -190,7 +190,6 @@
344  #define  BGMAC_CMDCFG_HD_SHIFT                 10
345  #define  BGMAC_CMDCFG_SR_REV0                  0x00000800      /* Set to reset mode, for core rev 0-3 */
346  #define  BGMAC_CMDCFG_SR_REV4                  0x00002000      /* Set to reset mode, for core rev >= 4 */
347 -#define  BGMAC_CMDCFG_SR(rev)  ((rev >= 4) ? BGMAC_CMDCFG_SR_REV4 : BGMAC_CMDCFG_SR_REV0)
348  #define  BGMAC_CMDCFG_ML                       0x00008000      /* Set to activate mac loopback mode */
349  #define  BGMAC_CMDCFG_AE                       0x00400000
350  #define  BGMAC_CMDCFG_CFE                      0x00800000
351 @@ -376,6 +375,24 @@
352  
353  #define ETHER_MAX_LEN   1518
354  
355 +/* Feature Flags */
356 +#define BGMAC_FEAT_TX_MASK_SETUP       BIT(0)
357 +#define BGMAC_FEAT_RX_MASK_SETUP       BIT(1)
358 +#define BGMAC_FEAT_IOST_ATTACHED       BIT(2)
359 +#define BGMAC_FEAT_NO_RESET            BIT(3)
360 +#define BGMAC_FEAT_MISC_PLL_REQ                BIT(4)
361 +#define BGMAC_FEAT_SW_TYPE_PHY         BIT(5)
362 +#define BGMAC_FEAT_SW_TYPE_EPHYRMII    BIT(6)
363 +#define BGMAC_FEAT_SW_TYPE_RGMII       BIT(7)
364 +#define BGMAC_FEAT_CMN_PHY_CTL         BIT(8)
365 +#define BGMAC_FEAT_FLW_CTRL1           BIT(9)
366 +#define BGMAC_FEAT_FLW_CTRL2           BIT(10)
367 +#define BGMAC_FEAT_SET_RXQ_CLK         BIT(11)
368 +#define BGMAC_FEAT_CLKCTLST            BIT(12)
369 +#define BGMAC_FEAT_NO_CLR_MIB          BIT(13)
370 +#define BGMAC_FEAT_FORCE_SPEED_2500    BIT(14)
371 +#define BGMAC_FEAT_CMDCFG_SR_REV4      BIT(15)
372 +
373  struct bgmac_slot_info {
374         union {
375                 struct sk_buff *skb;
376 @@ -430,6 +447,8 @@ struct bgmac {
377  
378         struct device *dev;
379         struct device *dma_dev;
380 +       u32 feature_flags;
381 +
382         struct net_device *net_dev;
383         struct napi_struct napi;
384         struct mii_bus *mii_bus;