target/linux/generic/patches-3.10/020-ssb_update.patch

   1 --- a/drivers/ssb/Kconfig
   2 +++ b/drivers/ssb/Kconfig
   3 @@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
   4
   5  config SSB_SFLASH
   6         bool "SSB serial flash support"
   7 -       depends on SSB_DRIVER_MIPS && BROKEN
   8 +       depends on SSB_DRIVER_MIPS
   9         default y
  10
  11  # Assumption: We are on embedded, if we compile the MIPS core.
  12  config SSB_EMBEDDED
  13         bool
  14 -       depends on SSB_DRIVER_MIPS
  15 +       depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
  16         default y
  17
  18  config SSB_DRIVER_EXTIF
  19 @@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
  20  config SSB_DRIVER_GPIO
  21         bool "SSB GPIO driver"
  22         depends on SSB && GPIOLIB
  23 +       select IRQ_DOMAIN if SSB_EMBEDDED
  24         help
  25           Driver to provide access to the GPIO pins on the bus.
  26
  27 --- a/drivers/ssb/b43_pci_bridge.c
  28 +++ b/drivers/ssb/b43_pci_bridge.c
  29 @@ -38,6 +38,7 @@ static const struct pci_device_id b43_pc
  30         { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x432b) },
  31         { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x432c) },
  32         { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4350) },
  33 +       { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4351) },
  34         { 0, },
  35  };
  36  MODULE_DEVICE_TABLE(pci, b43_pci_bridge_tbl);
  37 --- a/drivers/ssb/driver_chipcommon_sflash.c
  38 +++ b/drivers/ssb/driver_chipcommon_sflash.c
  39 @@ -9,6 +9,19 @@
  40
  41  #include "ssb_private.h"
  42
  43 +static struct resource ssb_sflash_resource = {
  44 +       .name   = "ssb_sflash",
  45 +       .start  = SSB_FLASH2,
  46 +       .end    = 0,
  47 +       .flags  = IORESOURCE_MEM | IORESOURCE_READONLY,
  48 +};
  49 +
  50 +struct platform_device ssb_sflash_dev = {
  51 +       .name           = "ssb_sflash",
  52 +       .resource       = &ssb_sflash_resource,
  53 +       .num_resources  = 1,
  54 +};
  55 +
  56  struct ssb_sflash_tbl_e {
  57         char *name;
  58         u32 id;
  59 @@ -16,7 +29,7 @@ struct ssb_sflash_tbl_e {
  60         u16 numblocks;
  61  };
  62
  63 -static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
  64 +static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
  65         { "M25P20", 0x11, 0x10000, 4, },
  66         { "M25P40", 0x12, 0x10000, 8, },
  67
  68 @@ -24,10 +37,10 @@ static struct ssb_sflash_tbl_e ssb_sflas
  69         { "M25P32", 0x15, 0x10000, 64, },
  70         { "M25P64", 0x16, 0x10000, 128, },
  71         { "M25FL128", 0x17, 0x10000, 256, },
  72 -       { 0 },
  73 +       { NULL },
  74  };
  75
  76 -static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
  77 +static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
  78         { "SST25WF512", 1, 0x1000, 16, },
  79         { "SST25VF512", 0x48, 0x1000, 16, },
  80         { "SST25WF010", 2, 0x1000, 32, },
  81 @@ -42,10 +55,10 @@ static struct ssb_sflash_tbl_e ssb_sflas
  82         { "SST25VF016", 0x41, 0x1000, 512, },
  83         { "SST25VF032", 0x4a, 0x1000, 1024, },
  84         { "SST25VF064", 0x4b, 0x1000, 2048, },
  85 -       { 0 },
  86 +       { NULL },
  87  };
  88
  89 -static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
  90 +static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
  91         { "AT45DB011", 0xc, 256, 512, },
  92         { "AT45DB021", 0x14, 256, 1024, },
  93         { "AT45DB041", 0x1c, 256, 2048, },
  94 @@ -53,7 +66,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
  95         { "AT45DB161", 0x2c, 512, 4096, },
  96         { "AT45DB321", 0x34, 512, 8192, },
  97         { "AT45DB642", 0x3c, 1024, 8192, },
  98 -       { 0 },
  99 +       { NULL },
 100  };
 101
 102  static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
 103 @@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_ch
 104  /* Initialize serial flash access */
 105  int ssb_sflash_init(struct ssb_chipcommon *cc)
 106  {
 107 -       struct ssb_sflash_tbl_e *e;
 108 +       struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
 109 +       const struct ssb_sflash_tbl_e *e;
 110         u32 id, id2;
 111
 112         switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
 113 @@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
 114                 return -ENOTSUPP;
 115         }
 116
 117 -       pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
 118 -               e->name, e->blocksize, e->numblocks);
 119 -
 120 -       pr_err("Serial flash support is not implemented yet!\n");
 121 +       sflash->window = SSB_FLASH2;
 122 +       sflash->blocksize = e->blocksize;
 123 +       sflash->numblocks = e->numblocks;
 124 +       sflash->size = sflash->blocksize * sflash->numblocks;
 125 +       sflash->present = true;
 126 +
 127 +       pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
 128 +               e->name, sflash->size / 1024, e->blocksize, e->numblocks);
 129 +
 130 +       /* Prepare platform device, but don't register it yet. It's too early,
 131 +        * malloc (required by device_private_init) is not available yet. */
 132 +       ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
 133 +                                        sflash->size;
 134 +       ssb_sflash_dev.dev.platform_data = sflash;
 135
 136 -       return -ENOTSUPP;
 137 +       return 0;
 138  }
 139 --- a/drivers/ssb/driver_gpio.c
 140 +++ b/drivers/ssb/driver_gpio.c
 141 @@ -9,16 +9,40 @@
 142   */
 143
 144  #include <linux/gpio.h>
 145 +#include <linux/irq.h>
 146 +#include <linux/interrupt.h>
 147 +#include <linux/irqdomain.h>
 148  #include <linux/export.h>
 149  #include <linux/ssb/ssb.h>
 150
 151  #include "ssb_private.h"
 152
 153 +
 154 +/**************************************************
 155 + * Shared
 156 + **************************************************/
 157 +
 158  static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
 159  {
 160         return container_of(chip, struct ssb_bus, gpio);
 161  }
 162
 163 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 164 +static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 165 +{
 166 +       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 167 +
 168 +       if (bus->bustype == SSB_BUSTYPE_SSB)
 169 +               return irq_find_mapping(bus->irq_domain, gpio);
 170 +       else
 171 +               return -EINVAL;
 172 +}
 173 +#endif
 174 +
 175 +/**************************************************
 176 + * ChipCommon
 177 + **************************************************/
 178 +
 179  static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
 180  {
 181         struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 182 @@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
 183         ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
 184  }
 185
 186 -static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
 187 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 188 +static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
 189  {
 190 -       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 191 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 192 +       int gpio = irqd_to_hwirq(d);
 193
 194 -       if (bus->bustype == SSB_BUSTYPE_SSB)
 195 -               return ssb_mips_irq(bus->chipco.dev) + 2;
 196 -       else
 197 -               return -EINVAL;
 198 +       ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
 199 +}
 200 +
 201 +static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
 202 +{
 203 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 204 +       int gpio = irqd_to_hwirq(d);
 205 +       u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
 206 +
 207 +       ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
 208 +       ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
 209 +}
 210 +
 211 +static struct irq_chip ssb_gpio_irq_chipco_chip = {
 212 +       .name           = "SSB-GPIO-CC",
 213 +       .irq_mask       = ssb_gpio_irq_chipco_mask,
 214 +       .irq_unmask     = ssb_gpio_irq_chipco_unmask,
 215 +};
 216 +
 217 +static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
 218 +{
 219 +       struct ssb_bus *bus = dev_id;
 220 +       struct ssb_chipcommon *chipco = &bus->chipco;
 221 +       u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
 222 +       u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
 223 +       u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
 224 +       unsigned long irqs = (val ^ pol) & mask;
 225 +       int gpio;
 226 +
 227 +       if (!irqs)
 228 +               return IRQ_NONE;
 229 +
 230 +       for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
 231 +               generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
 232 +       ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
 233 +
 234 +       return IRQ_HANDLED;
 235 +}
 236 +
 237 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
 238 +{
 239 +       struct ssb_chipcommon *chipco = &bus->chipco;
 240 +       struct gpio_chip *chip = &bus->gpio;
 241 +       int gpio, hwirq, err;
 242 +
 243 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 244 +               return 0;
 245 +
 246 +       bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
 247 +                                               &irq_domain_simple_ops, chipco);
 248 +       if (!bus->irq_domain) {
 249 +               err = -ENODEV;
 250 +               goto err_irq_domain;
 251 +       }
 252 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 253 +               int irq = irq_create_mapping(bus->irq_domain, gpio);
 254 +
 255 +               irq_set_chip_data(irq, bus);
 256 +               irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
 257 +                                        handle_simple_irq);
 258 +       }
 259 +
 260 +       hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
 261 +       err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
 262 +                         "gpio", bus);
 263 +       if (err)
 264 +               goto err_req_irq;
 265 +
 266 +       ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
 267 +       chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
 268 +
 269 +       return 0;
 270 +
 271 +err_req_irq:
 272 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 273 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 274 +
 275 +               irq_dispose_mapping(irq);
 276 +       }
 277 +       irq_domain_remove(bus->irq_domain);
 278 +err_irq_domain:
 279 +       return err;
 280 +}
 281 +
 282 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
 283 +{
 284 +       struct ssb_chipcommon *chipco = &bus->chipco;
 285 +       struct gpio_chip *chip = &bus->gpio;
 286 +       int gpio;
 287 +
 288 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 289 +               return;
 290 +
 291 +       chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
 292 +       free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
 293 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 294 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 295 +
 296 +               irq_dispose_mapping(irq);
 297 +       }
 298 +       irq_domain_remove(bus->irq_domain);
 299 +}
 300 +#else
 301 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
 302 +{
 303 +       return 0;
 304 +}
 305 +
 306 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
 307 +{
 308  }
 309 +#endif
 310
 311  static int ssb_gpio_chipco_init(struct ssb_bus *bus)
 312  {
 313         struct gpio_chip *chip = &bus->gpio;
 314 +       int err;
 315
 316         chip->label             = "ssb_chipco_gpio";
 317         chip->owner             = THIS_MODULE;
 318 @@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct s
 319         chip->set               = ssb_gpio_chipco_set_value;
 320         chip->direction_input   = ssb_gpio_chipco_direction_input;
 321         chip->direction_output  = ssb_gpio_chipco_direction_output;
 322 -       chip->to_irq            = ssb_gpio_chipco_to_irq;
 323 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 324 +       chip->to_irq            = ssb_gpio_to_irq;
 325 +#endif
 326         chip->ngpio             = 16;
 327         /* There is just one SoC in one device and its GPIO addresses should be
 328          * deterministic to address them more easily. The other buses could get
 329 @@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct s
 330         else
 331                 chip->base              = -1;
 332
 333 -       return gpiochip_add(chip);
 334 +       err = ssb_gpio_irq_chipco_domain_init(bus);
 335 +       if (err)
 336 +               return err;
 337 +
 338 +       err = gpiochip_add(chip);
 339 +       if (err) {
 340 +               ssb_gpio_irq_chipco_domain_exit(bus);
 341 +               return err;
 342 +       }
 343 +
 344 +       return 0;
 345  }
 346
 347 +/**************************************************
 348 + * EXTIF
 349 + **************************************************/
 350 +
 351  #ifdef CONFIG_SSB_DRIVER_EXTIF
 352
 353  static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
 354 @@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_outp
 355         return 0;
 356  }
 357
 358 -static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
 359 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 360 +static void ssb_gpio_irq_extif_mask(struct irq_data *d)
 361  {
 362 -       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 363 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 364 +       int gpio = irqd_to_hwirq(d);
 365
 366 -       if (bus->bustype == SSB_BUSTYPE_SSB)
 367 -               return ssb_mips_irq(bus->extif.dev) + 2;
 368 -       else
 369 -               return -EINVAL;
 370 +       ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
 371 +}
 372 +
 373 +static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
 374 +{
 375 +       struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
 376 +       int gpio = irqd_to_hwirq(d);
 377 +       u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
 378 +
 379 +       ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
 380 +       ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
 381 +}
 382 +
 383 +static struct irq_chip ssb_gpio_irq_extif_chip = {
 384 +       .name           = "SSB-GPIO-EXTIF",
 385 +       .irq_mask       = ssb_gpio_irq_extif_mask,
 386 +       .irq_unmask     = ssb_gpio_irq_extif_unmask,
 387 +};
 388 +
 389 +static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
 390 +{
 391 +       struct ssb_bus *bus = dev_id;
 392 +       struct ssb_extif *extif = &bus->extif;
 393 +       u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
 394 +       u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
 395 +       u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
 396 +       unsigned long irqs = (val ^ pol) & mask;
 397 +       int gpio;
 398 +
 399 +       if (!irqs)
 400 +               return IRQ_NONE;
 401 +
 402 +       for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
 403 +               generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
 404 +       ssb_extif_gpio_polarity(extif, irqs, val & irqs);
 405 +
 406 +       return IRQ_HANDLED;
 407 +}
 408 +
 409 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
 410 +{
 411 +       struct ssb_extif *extif = &bus->extif;
 412 +       struct gpio_chip *chip = &bus->gpio;
 413 +       int gpio, hwirq, err;
 414 +
 415 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 416 +               return 0;
 417 +
 418 +       bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
 419 +                                               &irq_domain_simple_ops, extif);
 420 +       if (!bus->irq_domain) {
 421 +               err = -ENODEV;
 422 +               goto err_irq_domain;
 423 +       }
 424 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 425 +               int irq = irq_create_mapping(bus->irq_domain, gpio);
 426 +
 427 +               irq_set_chip_data(irq, bus);
 428 +               irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
 429 +                                        handle_simple_irq);
 430 +       }
 431 +
 432 +       hwirq = ssb_mips_irq(bus->extif.dev) + 2;
 433 +       err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
 434 +                         "gpio", bus);
 435 +       if (err)
 436 +               goto err_req_irq;
 437 +
 438 +       ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
 439 +
 440 +       return 0;
 441 +
 442 +err_req_irq:
 443 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 444 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 445 +
 446 +               irq_dispose_mapping(irq);
 447 +       }
 448 +       irq_domain_remove(bus->irq_domain);
 449 +err_irq_domain:
 450 +       return err;
 451  }
 452
 453 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
 454 +{
 455 +       struct ssb_extif *extif = &bus->extif;
 456 +       struct gpio_chip *chip = &bus->gpio;
 457 +       int gpio;
 458 +
 459 +       if (bus->bustype != SSB_BUSTYPE_SSB)
 460 +               return;
 461 +
 462 +       free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
 463 +       for (gpio = 0; gpio < chip->ngpio; gpio++) {
 464 +               int irq = irq_find_mapping(bus->irq_domain, gpio);
 465 +
 466 +               irq_dispose_mapping(irq);
 467 +       }
 468 +       irq_domain_remove(bus->irq_domain);
 469 +}
 470 +#else
 471 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
 472 +{
 473 +       return 0;
 474 +}
 475 +
 476 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
 477 +{
 478 +}
 479 +#endif
 480 +
 481  static int ssb_gpio_extif_init(struct ssb_bus *bus)
 482  {
 483         struct gpio_chip *chip = &bus->gpio;
 484 +       int err;
 485
 486         chip->label             = "ssb_extif_gpio";
 487         chip->owner             = THIS_MODULE;
 488 @@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ss
 489         chip->set               = ssb_gpio_extif_set_value;
 490         chip->direction_input   = ssb_gpio_extif_direction_input;
 491         chip->direction_output  = ssb_gpio_extif_direction_output;
 492 -       chip->to_irq            = ssb_gpio_extif_to_irq;
 493 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
 494 +       chip->to_irq            = ssb_gpio_to_irq;
 495 +#endif
 496         chip->ngpio             = 5;
 497         /* There is just one SoC in one device and its GPIO addresses should be
 498          * deterministic to address them more easily. The other buses could get
 499 @@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ss
 500         else
 501                 chip->base              = -1;
 502
 503 -       return gpiochip_add(chip);
 504 +       err = ssb_gpio_irq_extif_domain_init(bus);
 505 +       if (err)
 506 +               return err;
 507 +
 508 +       err = gpiochip_add(chip);
 509 +       if (err) {
 510 +               ssb_gpio_irq_extif_domain_exit(bus);
 511 +               return err;
 512 +       }
 513 +
 514 +       return 0;
 515  }
 516
 517  #else
 518 @@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ss
 519  }
 520  #endif
 521
 522 +/**************************************************
 523 + * Init
 524 + **************************************************/
 525 +
 526  int ssb_gpio_init(struct ssb_bus *bus)
 527  {
 528         if (ssb_chipco_available(&bus->chipco))
 529 --- a/drivers/ssb/main.c
 530 +++ b/drivers/ssb/main.c
 531 @@ -553,6 +553,14 @@ static int ssb_devices_register(struct s
 532         }
 533  #endif
 534
 535 +#ifdef CONFIG_SSB_SFLASH
 536 +       if (bus->mipscore.sflash.present) {
 537 +               err = platform_device_register(&ssb_sflash_dev);
 538 +               if (err)
 539 +                       pr_err("Error registering serial flash\n");
 540 +       }
 541 +#endif
 542 +
 543         return 0;
 544  error:
 545         /* Unwind the already registered devices. */
 546 @@ -582,6 +590,13 @@ static int ssb_attach_queued_buses(void)
 547                 ssb_pcicore_init(&bus->pcicore);
 548                 if (bus->bustype == SSB_BUSTYPE_SSB)
 549                         ssb_watchdog_register(bus);
 550 +
 551 +               err = ssb_gpio_init(bus);
 552 +               if (err == -ENOTSUPP)
 553 +                       ssb_dbg("GPIO driver not activated\n");
 554 +               else if (err)
 555 +                       ssb_dbg("Error registering GPIO driver: %i\n", err);
 556 +
 557                 ssb_bus_may_powerdown(bus);
 558
 559                 err = ssb_devices_register(bus);
 560 @@ -819,11 +834,6 @@ static int ssb_bus_register(struct ssb_b
 561         ssb_chipcommon_init(&bus->chipco);
 562         ssb_extif_init(&bus->extif);
 563         ssb_mipscore_init(&bus->mipscore);
 564 -       err = ssb_gpio_init(bus);
 565 -       if (err == -ENOTSUPP)
 566 -               ssb_dbg("GPIO driver not activated\n");
 567 -       else if (err)
 568 -               ssb_dbg("Error registering GPIO driver: %i\n", err);
 569         err = ssb_fetch_invariants(bus, get_invariants);
 570         if (err) {
 571                 ssb_bus_may_powerdown(bus);
 572 --- a/drivers/ssb/pci.c
 573 +++ b/drivers/ssb/pci.c
 574 @@ -326,13 +326,13 @@ err_ctlreg:
 575         return err;
 576  }
 577
 578 -static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
 579 -                              u16 mask, u16 shift)
 580 +static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
 581 +                               u16 mask, u16 shift)
 582  {
 583         u16 v;
 584         u8 gain;
 585
 586 -       v = in[SPOFF(SSB_SPROM1_AGAIN)];
 587 +       v = in[SPOFF(offset)];
 588         gain = (v & mask) >> shift;
 589         if (gain == 0xFF)
 590                 gain = 2; /* If unset use 2dBm */
 591 @@ -416,12 +416,14 @@ static void sprom_extract_r123(struct ss
 592         SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
 593
 594         /* Extract the antenna gain values. */
 595 -       out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
 596 -                                                   SSB_SPROM1_AGAIN_BG,
 597 -                                                   SSB_SPROM1_AGAIN_BG_SHIFT);
 598 -       out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
 599 -                                                   SSB_SPROM1_AGAIN_A,
 600 -                                                   SSB_SPROM1_AGAIN_A_SHIFT);
 601 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 602 +                                                    SSB_SPROM1_AGAIN,
 603 +                                                    SSB_SPROM1_AGAIN_BG,
 604 +                                                    SSB_SPROM1_AGAIN_BG_SHIFT);
 605 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 606 +                                                    SSB_SPROM1_AGAIN,
 607 +                                                    SSB_SPROM1_AGAIN_A,
 608 +                                                    SSB_SPROM1_AGAIN_A_SHIFT);
 609         if (out->revision >= 2)
 610                 sprom_extract_r23(out, in);
 611  }
 612 @@ -468,7 +470,15 @@ static void sprom_extract_r458(struct ss
 613
 614  static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
 615  {
 616 +       static const u16 pwr_info_offset[] = {
 617 +               SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
 618 +               SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
 619 +       };
 620         u16 il0mac_offset;
 621 +       int i;
 622 +
 623 +       BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
 624 +                    ARRAY_SIZE(out->core_pwr_info));
 625
 626         if (out->revision == 4)
 627                 il0mac_offset = SSB_SPROM4_IL0MAC;
 628 @@ -524,14 +534,59 @@ static void sprom_extract_r45(struct ssb
 629         }
 630
 631         /* Extract the antenna gain values. */
 632 -       SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
 633 -            SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
 634 -       SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
 635 -            SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
 636 -       SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
 637 -            SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
 638 -       SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
 639 -            SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
 640 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 641 +                                                    SSB_SPROM4_AGAIN01,
 642 +                                                    SSB_SPROM4_AGAIN0,
 643 +                                                    SSB_SPROM4_AGAIN0_SHIFT);
 644 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 645 +                                                    SSB_SPROM4_AGAIN01,
 646 +                                                    SSB_SPROM4_AGAIN1,
 647 +                                                    SSB_SPROM4_AGAIN1_SHIFT);
 648 +       out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
 649 +                                                    SSB_SPROM4_AGAIN23,
 650 +                                                    SSB_SPROM4_AGAIN2,
 651 +                                                    SSB_SPROM4_AGAIN2_SHIFT);
 652 +       out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
 653 +                                                    SSB_SPROM4_AGAIN23,
 654 +                                                    SSB_SPROM4_AGAIN3,
 655 +                                                    SSB_SPROM4_AGAIN3_SHIFT);
 656 +
 657 +       /* Extract cores power info info */
 658 +       for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 659 +               u16 o = pwr_info_offset[i];
 660 +
 661 +               SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
 662 +                       SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
 663 +               SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
 664 +                       SSB_SPROM4_2G_MAXP, 0);
 665 +
 666 +               SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
 667 +               SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
 668 +               SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
 669 +               SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
 670 +
 671 +               SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
 672 +                       SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
 673 +               SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
 674 +                       SSB_SPROM4_5G_MAXP, 0);
 675 +               SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
 676 +                       SSB_SPROM4_5GH_MAXP, 0);
 677 +               SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
 678 +                       SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
 679 +
 680 +               SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
 681 +               SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
 682 +               SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
 683 +               SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
 684 +               SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
 685 +               SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
 686 +               SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
 687 +               SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
 688 +               SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
 689 +               SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
 690 +               SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
 691 +               SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
 692 +       }
 693
 694         sprom_extract_r458(out, in);
 695
 696 @@ -621,14 +676,22 @@ static void sprom_extract_r8(struct ssb_
 697         SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
 698
 699         /* Extract the antenna gain values. */
 700 -       SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
 701 -            SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
 702 -       SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
 703 -            SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
 704 -       SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
 705 -            SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
 706 -       SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
 707 -            SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
 708 +       out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
 709 +                                                    SSB_SPROM8_AGAIN01,
 710 +                                                    SSB_SPROM8_AGAIN0,
 711 +                                                    SSB_SPROM8_AGAIN0_SHIFT);
 712 +       out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
 713 +                                                    SSB_SPROM8_AGAIN01,
 714 +                                                    SSB_SPROM8_AGAIN1,
 715 +                                                    SSB_SPROM8_AGAIN1_SHIFT);
 716 +       out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
 717 +                                                    SSB_SPROM8_AGAIN23,
 718 +                                                    SSB_SPROM8_AGAIN2,
 719 +                                                    SSB_SPROM8_AGAIN2_SHIFT);
 720 +       out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
 721 +                                                    SSB_SPROM8_AGAIN23,
 722 +                                                    SSB_SPROM8_AGAIN3,
 723 +                                                    SSB_SPROM8_AGAIN3_SHIFT);
 724
 725         /* Extract cores power info info */
 726         for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 727 --- a/drivers/ssb/pcihost_wrapper.c
 728 +++ b/drivers/ssb/pcihost_wrapper.c
 729 @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
 730         struct ssb_bus *ssb = pci_get_drvdata(dev);
 731         int err;
 732
 733 -       pci_set_power_state(dev, 0);
 734 +       pci_set_power_state(dev, PCI_D0);
 735         err = pci_enable_device(dev);
 736         if (err)
 737                 return err;
 738 --- a/drivers/ssb/sprom.c
 739 +++ b/drivers/ssb/sprom.c
 740 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
 741         while (cnt < sprom_size_words) {
 742                 memcpy(tmp, dump, 4);
 743                 dump += 4;
 744 -               err = strict_strtoul(tmp, 16, &parsed);
 745 +               err = kstrtoul(tmp, 16, &parsed);
 746                 if (err)
 747                         return err;
 748                 sprom[cnt++] = swab16((u16)parsed);
 749 --- a/drivers/ssb/ssb_private.h
 750 +++ b/drivers/ssb/ssb_private.h
 751 @@ -243,6 +243,10 @@ static inline int ssb_sflash_init(struct
 752  extern struct platform_device ssb_pflash_dev;
 753  #endif
 754
 755 +#ifdef CONFIG_SSB_SFLASH
 756 +extern struct platform_device ssb_sflash_dev;
 757 +#endif
 758 +
 759  #ifdef CONFIG_SSB_DRIVER_EXTIF
 760  extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
 761  extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
 762 --- a/include/linux/ssb/ssb.h
 763 +++ b/include/linux/ssb/ssb.h
 764 @@ -33,6 +33,7 @@ struct ssb_sprom {
 765         u8 et1phyaddr;          /* MII address for enet1 */
 766         u8 et0mdcport;          /* MDIO for enet0 */
 767         u8 et1mdcport;          /* MDIO for enet1 */
 768 +       u16 dev_id;             /* Device ID overriding e.g. PCI ID */
 769         u16 board_rev;          /* Board revision number from SPROM. */
 770         u16 board_num;          /* Board number from SPROM. */
 771         u16 board_type;         /* Board type from SPROM. */
 772 @@ -486,6 +487,7 @@ struct ssb_bus {
 773  #endif /* EMBEDDED */
 774  #ifdef CONFIG_SSB_DRIVER_GPIO
 775         struct gpio_chip gpio;
 776 +       struct irq_domain *irq_domain;
 777  #endif /* DRIVER_GPIO */
 778
 779         /* Internal-only stuff follows. Do not touch. */
 780 --- a/include/linux/ssb/ssb_driver_gige.h
 781 +++ b/include/linux/ssb/ssb_driver_gige.h
 782 @@ -108,6 +108,16 @@ static inline int ssb_gige_get_macaddr(s
 783         return 0;
 784  }
 785
 786 +/* Get the device phy address */
 787 +static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
 788 +{
 789 +       struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
 790 +       if (!dev)
 791 +               return -ENODEV;
 792 +
 793 +       return dev->dev->bus->sprom.et0phyaddr;
 794 +}
 795 +
 796  extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
 797                                           struct pci_dev *pdev);
 798  extern int ssb_gige_map_irq(struct ssb_device *sdev,
 799 @@ -174,6 +184,10 @@ static inline int ssb_gige_get_macaddr(s
 800  {
 801         return -ENODEV;
 802  }
 803 +static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
 804 +{
 805 +       return -ENODEV;
 806 +}
 807
 808  #endif /* CONFIG_SSB_DRIVER_GIGE */
 809  #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
 810 --- a/include/linux/ssb/ssb_driver_mips.h
 811 +++ b/include/linux/ssb/ssb_driver_mips.h
 812 @@ -20,6 +20,18 @@ struct ssb_pflash {
 813         u32 window_size;
 814  };
 815
 816 +#ifdef CONFIG_SSB_SFLASH
 817 +struct ssb_sflash {
 818 +       bool present;
 819 +       u32 window;
 820 +       u32 blocksize;
 821 +       u16 numblocks;
 822 +       u32 size;
 823 +
 824 +       void *priv;
 825 +};
 826 +#endif
 827 +
 828  struct ssb_mipscore {
 829         struct ssb_device *dev;
 830
 831 @@ -27,6 +39,9 @@ struct ssb_mipscore {
 832         struct ssb_serial_port serial_ports[4];
 833
 834         struct ssb_pflash pflash;
 835 +#ifdef CONFIG_SSB_SFLASH
 836 +       struct ssb_sflash sflash;
 837 +#endif
 838  };
 839
 840  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
 841 --- a/include/linux/ssb/ssb_regs.h
 842 +++ b/include/linux/ssb/ssb_regs.h
 843 @@ -172,6 +172,7 @@
 844  #define SSB_SPROMSIZE_WORDS_R4         220
 845  #define SSB_SPROMSIZE_BYTES_R123       (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
 846  #define SSB_SPROMSIZE_BYTES_R4         (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
 847 +#define SSB_SPROMSIZE_WORDS_R10                230
 848  #define SSB_SPROM_BASE1                        0x1000
 849  #define SSB_SPROM_BASE31               0x0800
 850  #define SSB_SPROM_REVISION             0x007E
 851 @@ -344,6 +345,43 @@
 852  #define  SSB_SPROM4_TXPID5GH2_SHIFT    0
 853  #define  SSB_SPROM4_TXPID5GH3          0xFF00
 854  #define  SSB_SPROM4_TXPID5GH3_SHIFT    8
 855 +
 856 +/* There are 4 blocks with power info sharing the same layout */
 857 +#define SSB_SPROM4_PWR_INFO_CORE0      0x0080
 858 +#define SSB_SPROM4_PWR_INFO_CORE1      0x00AE
 859 +#define SSB_SPROM4_PWR_INFO_CORE2      0x00DC
 860 +#define SSB_SPROM4_PWR_INFO_CORE3      0x010A
 861 +
 862 +#define SSB_SPROM4_2G_MAXP_ITSSI       0x00    /* 2 GHz ITSSI and 2 GHz Max Power */
 863 +#define  SSB_SPROM4_2G_MAXP            0x00FF
 864 +#define  SSB_SPROM4_2G_ITSSI           0xFF00
 865 +#define  SSB_SPROM4_2G_ITSSI_SHIFT     8
 866 +#define SSB_SPROM4_2G_PA_0             0x02    /* 2 GHz power amp */
 867 +#define SSB_SPROM4_2G_PA_1             0x04
 868 +#define SSB_SPROM4_2G_PA_2             0x06
 869 +#define SSB_SPROM4_2G_PA_3             0x08
 870 +#define SSB_SPROM4_5G_MAXP_ITSSI       0x0A    /* 5 GHz ITSSI and 5.3 GHz Max Power */
 871 +#define  SSB_SPROM4_5G_MAXP            0x00FF
 872 +#define  SSB_SPROM4_5G_ITSSI           0xFF00
 873 +#define  SSB_SPROM4_5G_ITSSI_SHIFT     8
 874 +#define SSB_SPROM4_5GHL_MAXP           0x0C    /* 5.2 GHz and 5.8 GHz Max Power */
 875 +#define  SSB_SPROM4_5GH_MAXP           0x00FF
 876 +#define  SSB_SPROM4_5GL_MAXP           0xFF00
 877 +#define  SSB_SPROM4_5GL_MAXP_SHIFT     8
 878 +#define SSB_SPROM4_5G_PA_0             0x0E    /* 5.3 GHz power amp */
 879 +#define SSB_SPROM4_5G_PA_1             0x10
 880 +#define SSB_SPROM4_5G_PA_2             0x12
 881 +#define SSB_SPROM4_5G_PA_3             0x14
 882 +#define SSB_SPROM4_5GL_PA_0            0x16    /* 5.2 GHz power amp */
 883 +#define SSB_SPROM4_5GL_PA_1            0x18
 884 +#define SSB_SPROM4_5GL_PA_2            0x1A
 885 +#define SSB_SPROM4_5GL_PA_3            0x1C
 886 +#define SSB_SPROM4_5GH_PA_0            0x1E    /* 5.8 GHz power amp */
 887 +#define SSB_SPROM4_5GH_PA_1            0x20
 888 +#define SSB_SPROM4_5GH_PA_2            0x22
 889 +#define SSB_SPROM4_5GH_PA_3            0x24
 890 +
 891 +/* TODO: Make it deprecated */
 892  #define SSB_SPROM4_MAXP_BG             0x0080  /* Max Power BG in path 1 */
 893  #define  SSB_SPROM4_MAXP_BG_MASK       0x00FF  /* Mask for Max Power BG */
 894  #define  SSB_SPROM4_ITSSI_BG           0xFF00  /* Mask for path 1 itssi_bg */
 895 --- a/arch/mips/bcm47xx/sprom.c
 896 +++ b/arch/mips/bcm47xx/sprom.c
 897 @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
 898  static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
 899                                         const char *prefix, bool fallback)
 900  {
 901 +       nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
 902         nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
 903         nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
 904         nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);