linux/3.3: merge recent ubifs patches from 3.2
[oweals/openwrt.git] / target / linux / generic / patches-3.1 / 050-linux-atm_nathan.patch
1 From: Nathan Williams <nathan@traverse.com.au>
2 To: netdev@vger.kernel.org
3 Date: Wed, 05 Oct 2011 15:43:30 +1100
4 Cc: linux-atm-general@lists.sourceforge.net,
5         David Woodhouse <dwmw2@infradead.org>, linux-kernel@vger.kernel.org
6 Subject: [Linux-ATM-General] [PATCH 1/4] atm: solos-pci: Add AnnexA/M
7         capability attributes
8
9 BisACapability and BisMCapability allow users to
10 force either Annex A or Annex M.
11
12 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
13 ---
14  drivers/atm/solos-attrlist.c |    2 ++
15  1 files changed, 2 insertions(+), 0 deletions(-)
16
17 diff --git a/drivers/atm/solos-attrlist.c b/drivers/atm/solos-attrlist.c
18 index 9a676ee..8092533 100644
19 --- a/drivers/atm/solos-attrlist.c
20 +++ b/drivers/atm/solos-attrlist.c
21 @@ -71,6 +71,8 @@ SOLOS_ATTR_RW(BisAForceSNRMarginDn)
22  SOLOS_ATTR_RW(BisMForceSNRMarginDn)
23  SOLOS_ATTR_RW(BisAMaxMargin)
24  SOLOS_ATTR_RW(BisMMaxMargin)
25 +SOLOS_ATTR_RW(BisACapability)
26 +SOLOS_ATTR_RW(BisMCapability)
27  SOLOS_ATTR_RW(AnnexAForceSNRMarginDn)
28  SOLOS_ATTR_RW(AnnexAMaxMargin)
29  SOLOS_ATTR_RW(AnnexMMaxMargin)
30
31 From: Nathan Williams <nathan@traverse.com.au>
32 To: netdev@vger.kernel.org
33 Date: Wed, 05 Oct 2011 15:44:17 +1100
34 Cc: linux-atm-general@lists.sourceforge.net,
35         David Woodhouse <dwmw2@infradead.org>, linux-kernel@vger.kernel.org
36 Subject: [Linux-ATM-General] [PATCH 2/4] atm: solos-pci: Remove annoying
37         line of debugging
38
39 "len: %d" isn't particularly useful for anyone and confuses users.
40
41 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
42 ---
43  drivers/atm/solos-pci.c |    1 -
44  1 files changed, 0 insertions(+), 1 deletions(-)
45
46 diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
47 index 5d1d076..bd01aa3 100644
48 --- a/drivers/atm/solos-pci.c
49 +++ b/drivers/atm/solos-pci.c
50 @@ -452,7 +452,6 @@ static ssize_t console_show(struct device *dev, struct device_attribute *attr,
51  
52         len = skb->len;
53         memcpy(buf, skb->data, len);
54 -       dev_dbg(&card->dev->dev, "len: %d\n", len);
55  
56         kfree_skb(skb);
57         return len;
58 From: Nathan Williams <nathan@traverse.com.au>
59 To: netdev@vger.kernel.org
60 Date: Wed, 05 Oct 2011 15:45:15 +1100
61 Cc: linux-atm-general@lists.sourceforge.net,
62         David Woodhouse <dwmw2@infradead.org>, linux-kernel@vger.kernel.org
63 Subject: [Linux-ATM-General] [PATCH 3/4] atm: solos-pci: Add support for
64         Geos GPIO pins
65
66 Geos ADSL2+ routers have on-board Solos chipsets with some
67 extra I/O pins and a push button connected to the FPGA.
68
69 PCB version and variant numbers are also made available
70 through the HardwareVersion and HardwareVariant attributes.
71
72 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
73 ---
74  drivers/atm/solos-pci.c |   98 +++++++++++++++++++++++++++++++++++++++++++++++
75  1 files changed, 98 insertions(+), 0 deletions(-)
76
77 diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
78 index bd01aa3..33c0c2b 100644
79 --- a/drivers/atm/solos-pci.c
80 +++ b/drivers/atm/solos-pci.c
81 @@ -56,6 +56,7 @@
82  #define FLASH_BUSY     0x60
83  #define FPGA_MODE      0x5C
84  #define FLASH_MODE     0x58
85 +#define GPIO_STATUS    0x54
86  #define TX_DMA_ADDR(port)      (0x40 + (4 * (port)))
87  #define RX_DMA_ADDR(port)      (0x30 + (4 * (port)))
88  
89 @@ -498,6 +499,87 @@ static ssize_t console_store(struct device *dev, struct device_attribute *attr,
90         return err?:count;
91  }
92  
93 +struct geos_gpio {
94 +       char *name;
95 +       int offset;
96 +};
97 +
98 +static struct geos_gpio geos_gpio_pins[] = {
99 +       {"GPIO1", 9},
100 +       {"GPIO2", 10},
101 +       {"GPIO3", 11},
102 +       {"GPIO4", 12},
103 +       {"GPIO5", 13},
104 +       {"PushButton", 14},
105 +       {NULL, 0}
106 +};
107 +
108 +static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
109 +                              const char *buf, size_t count)
110 +{
111 +       struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
112 +       struct solos_card *card = atmdev->dev_data;
113 +       uint32_t data32;
114 +
115 +       struct geos_gpio *p = geos_gpio_pins;
116 +       while(p->name){
117 +               if(!strcmp(attr->attr.name, p->name)){
118 +                       break;
119 +               }
120 +               p++;
121 +       }
122 +
123 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
124 +       if(buf[0] == '1'){
125 +               data32 |= 1 << p->offset;
126 +               iowrite32(data32, card->config_regs + GPIO_STATUS);
127 +       } else if(buf[0] == '0') {
128 +               data32 &= ~(1 << p->offset);
129 +               iowrite32(data32, card->config_regs + GPIO_STATUS);
130 +       }
131 +       return count;
132 +}
133 +
134 +static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
135 +                             char *buf)
136 +{
137 +       struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
138 +       struct solos_card *card = atmdev->dev_data;
139 +       uint32_t data32;
140 +
141 +       struct geos_gpio *p = geos_gpio_pins;
142 +       while(p->name){
143 +               if(!strcmp(attr->attr.name, p->name)){
144 +                       break;
145 +               }
146 +               p++;
147 +       }
148 +
149 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
150 +       data32 = (data32 >> p->offset) & 1;
151 +
152 +       return sprintf(buf, "%d\n", data32);
153 +}
154 +
155 +static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
156 +                            char *buf)
157 +{
158 +       struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
159 +       struct solos_card *card = atmdev->dev_data;
160 +       uint32_t data32;
161 +
162 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
163 +       if(!strcmp(attr->attr.name, "HardwareVersion")){
164 +               data32 = data32 & 0x1F;
165 +               return sprintf(buf, "%d\n", data32);
166 +       } else if(!strcmp(attr->attr.name, "HardwareVariant")){
167 +               data32 = (data32 >> 5) & 0x0F;
168 +               return sprintf(buf, "%d\n", data32);
169 +       }
170 +
171 +       return sprintf(buf, "Error\n");
172 +}
173 +
174  static DEVICE_ATTR(console, 0644, console_show, console_store);
175  
176  
177 @@ -506,6 +588,14 @@ static DEVICE_ATTR(console, 0644, console_show, console_store);
178  
179  #include "solos-attrlist.c"
180  
181 +static DEVICE_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store);
182 +static DEVICE_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store);
183 +static DEVICE_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store);
184 +static DEVICE_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store);
185 +static DEVICE_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store);
186 +static DEVICE_ATTR(PushButton, 0444, geos_gpio_show, NULL);
187 +static DEVICE_ATTR(HardwareVersion, 0444, hardware_show, NULL);
188 +static DEVICE_ATTR(HardwareVariant, 0444, hardware_show, NULL);
189  #undef SOLOS_ATTR_RO
190  #undef SOLOS_ATTR_RW
191  
192 @@ -514,6 +604,14 @@ static DEVICE_ATTR(console, 0644, console_show, console_store);
193  
194  static struct attribute *solos_attrs[] = {
195  #include "solos-attrlist.c"
196 +       &dev_attr_GPIO1.attr,
197 +       &dev_attr_GPIO2.attr,
198 +       &dev_attr_GPIO3.attr,
199 +       &dev_attr_GPIO4.attr,
200 +       &dev_attr_GPIO5.attr,
201 +       &dev_attr_PushButton.attr,
202 +       &dev_attr_HardwareVersion.attr,
203 +       &dev_attr_HardwareVariant.attr,
204         NULL
205  };
206  
207 From: Nathan Williams <nathan@traverse.com.au>
208 To: netdev@vger.kernel.org
209 Date: Wed, 05 Oct 2011 15:46:08 +1100
210 Cc: linux-atm-general@lists.sourceforge.net,
211         David Woodhouse <dwmw2@infradead.org>, linux-kernel@vger.kernel.org
212 Subject: [Linux-ATM-General] [PATCH 4/4] atm: solos-pci: M25P/M25PE SPI
213         flash support
214
215 Newer Geos ADSL2+ routers have different SPI flash.
216 The FPGA on these boards require driver version = 1 to enable
217 flash upgrades so old drivers can't corrupt new boards.
218
219 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
220 ---
221  drivers/atm/solos-pci.c |   51 ++++++++++++++++++++++++++++++++++++----------
222  1 files changed, 40 insertions(+), 11 deletions(-)
223
224 diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
225 index 33c0c2b..2a75bf7 100644
226 --- a/drivers/atm/solos-pci.c
227 +++ b/drivers/atm/solos-pci.c
228 @@ -42,7 +42,8 @@
229  #include <linux/swab.h>
230  #include <linux/slab.h>
231  
232 -#define VERSION "0.07"
233 +#define VERSION "1.0"
234 +#define DRIVER_VERSION 0x01
235  #define PTAG "solos-pci"
236  
237  #define CONFIG_RAM_SIZE        128
238 @@ -57,16 +58,20 @@
239  #define FPGA_MODE      0x5C
240  #define FLASH_MODE     0x58
241  #define GPIO_STATUS    0x54
242 +#define DRIVER_VER     0x50
243  #define TX_DMA_ADDR(port)      (0x40 + (4 * (port)))
244  #define RX_DMA_ADDR(port)      (0x30 + (4 * (port)))
245  
246  #define DATA_RAM_SIZE  32768
247  #define BUF_SIZE       2048
248  #define OLD_BUF_SIZE   4096 /* For FPGA versions <= 2*/
249 -#define FPGA_PAGE      528 /* FPGA flash page size*/
250 -#define SOLOS_PAGE     512 /* Solos flash page size*/
251 -#define FPGA_BLOCK     (FPGA_PAGE * 8) /* FPGA flash block size*/
252 -#define SOLOS_BLOCK    (SOLOS_PAGE * 8) /* Solos flash block size*/
253 +/* Old boards use ATMEL AD45DB161D flash */
254 +#define ATMEL_FPGA_PAGE        528 /* FPGA flash page size*/
255 +#define ATMEL_SOLOS_PAGE       512 /* Solos flash page size*/
256 +#define ATMEL_FPGA_BLOCK       (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
257 +#define ATMEL_SOLOS_BLOCK      (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
258 +/* Current boards use M25P/M25PE SPI flash */
259 +#define SPI_FLASH_BLOCK        (256 * 64)
260  
261  #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
262  #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
263 @@ -128,6 +133,7 @@ struct solos_card {
264         int using_dma;
265         int fpga_version;
266         int buffer_size;
267 +       int atmel_flash;
268  };
269  
270  
271 @@ -631,16 +637,25 @@ static int flash_upgrade(struct solos_card *card, int chip)
272         switch (chip) {
273         case 0:
274                 fw_name = "solos-FPGA.bin";
275 -               blocksize = FPGA_BLOCK;
276 +               if (card->atmel_flash)
277 +                       blocksize = ATMEL_FPGA_BLOCK;
278 +               else
279 +                       blocksize = SPI_FLASH_BLOCK;
280                 break;
281         case 1:
282                 fw_name = "solos-Firmware.bin";
283 -               blocksize = SOLOS_BLOCK;
284 +               if (card->atmel_flash)
285 +                       blocksize = ATMEL_SOLOS_BLOCK;
286 +               else
287 +                       blocksize = SPI_FLASH_BLOCK;
288                 break;
289         case 2:
290                 if (card->fpga_version > LEGACY_BUFFERS){
291                         fw_name = "solos-db-FPGA.bin";
292 -                       blocksize = FPGA_BLOCK;
293 +                       if (card->atmel_flash)
294 +                               blocksize = ATMEL_FPGA_BLOCK;
295 +                       else
296 +                               blocksize = SPI_FLASH_BLOCK;
297                 } else {
298                         dev_info(&card->dev->dev, "FPGA version doesn't support"
299                                         " daughter board upgrades\n");
300 @@ -650,7 +665,10 @@ static int flash_upgrade(struct solos_card *card, int chip)
301         case 3:
302                 if (card->fpga_version > LEGACY_BUFFERS){
303                         fw_name = "solos-Firmware.bin";
304 -                       blocksize = SOLOS_BLOCK;
305 +                       if (card->atmel_flash)
306 +                               blocksize = ATMEL_SOLOS_BLOCK;
307 +                       else
308 +                               blocksize = SPI_FLASH_BLOCK;
309                 } else {
310                         dev_info(&card->dev->dev, "FPGA version doesn't support"
311                                         " daughter board upgrades\n");
312 @@ -695,9 +713,13 @@ static int flash_upgrade(struct solos_card *card, int chip)
313                 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
314                 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
315  
316 -               /* Copy block to buffer, swapping each 16 bits */
317 +               /* Copy block to buffer, swapping each 16 bits for Atmel flash */
318                 for(i = 0; i < blocksize; i += 4) {
319 -                       uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
320 +                       uint32_t word;
321 +                       if (card->atmel_flash)
322 +                               word = swahb32p((uint32_t *)(fw->data + offset + i));
323 +                       else
324 +                               word = *(uint32_t *)(fw->data + offset + i);
325                         if(card->fpga_version > LEGACY_BUFFERS)
326                                 iowrite32(word, FLASH_BUF + i);
327                         else
328 @@ -1249,6 +1271,11 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
329                 db_fpga_upgrade = db_firmware_upgrade = 0;
330         }
331  
332 +       /* Stopped using Atmel flash after 0.03-38 */
333 +       if (fpga_ver < 39)
334 +               card->atmel_flash = 1;
335 +       else
336 +               card->atmel_flash = 0;
337         if (card->fpga_version >= DMA_SUPPORTED){
338                 card->using_dma = 1;
339         } else {
340 @@ -1256,6 +1283,8 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
341                 /* Set RX empty flag for all ports */
342                 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
343         }
344 +       /* New FPGAs require driver version before permitting flash upgrades */
345 +       iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
346  
347         data32 = ioread32(card->config_regs + PORTS);
348         card->nr_ports = (data32 & 0x000000FF);