2 * B53 switch driver main logic
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/delay.h>
22 #include <linux/export.h>
23 #include <linux/gpio.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/switch.h>
27 #include <linux/platform_data/b53.h>
32 /* buffer size needed for displaying all MIBs with max'd values */
33 #define B53_BUF_SIZE 1188
42 /* BCM5365 MIB counters */
43 static const struct b53_mib_desc b53_mibs_65[] = {
44 { 8, 0x00, "TxOctets" },
45 { 4, 0x08, "TxDropPkts" },
46 { 4, 0x10, "TxBroadcastPkts" },
47 { 4, 0x14, "TxMulticastPkts" },
48 { 4, 0x18, "TxUnicastPkts" },
49 { 4, 0x1c, "TxCollisions" },
50 { 4, 0x20, "TxSingleCollision" },
51 { 4, 0x24, "TxMultipleCollision" },
52 { 4, 0x28, "TxDeferredTransmit" },
53 { 4, 0x2c, "TxLateCollision" },
54 { 4, 0x30, "TxExcessiveCollision" },
55 { 4, 0x38, "TxPausePkts" },
56 { 8, 0x44, "RxOctets" },
57 { 4, 0x4c, "RxUndersizePkts" },
58 { 4, 0x50, "RxPausePkts" },
59 { 4, 0x54, "Pkts64Octets" },
60 { 4, 0x58, "Pkts65to127Octets" },
61 { 4, 0x5c, "Pkts128to255Octets" },
62 { 4, 0x60, "Pkts256to511Octets" },
63 { 4, 0x64, "Pkts512to1023Octets" },
64 { 4, 0x68, "Pkts1024to1522Octets" },
65 { 4, 0x6c, "RxOversizePkts" },
66 { 4, 0x70, "RxJabbers" },
67 { 4, 0x74, "RxAlignmentErrors" },
68 { 4, 0x78, "RxFCSErrors" },
69 { 8, 0x7c, "RxGoodOctets" },
70 { 4, 0x84, "RxDropPkts" },
71 { 4, 0x88, "RxUnicastPkts" },
72 { 4, 0x8c, "RxMulticastPkts" },
73 { 4, 0x90, "RxBroadcastPkts" },
74 { 4, 0x94, "RxSAChanges" },
75 { 4, 0x98, "RxFragments" },
79 /* BCM63xx MIB counters */
80 static const struct b53_mib_desc b53_mibs_63xx[] = {
81 { 8, 0x00, "TxOctets" },
82 { 4, 0x08, "TxDropPkts" },
83 { 4, 0x0c, "TxQoSPkts" },
84 { 4, 0x10, "TxBroadcastPkts" },
85 { 4, 0x14, "TxMulticastPkts" },
86 { 4, 0x18, "TxUnicastPkts" },
87 { 4, 0x1c, "TxCollisions" },
88 { 4, 0x20, "TxSingleCollision" },
89 { 4, 0x24, "TxMultipleCollision" },
90 { 4, 0x28, "TxDeferredTransmit" },
91 { 4, 0x2c, "TxLateCollision" },
92 { 4, 0x30, "TxExcessiveCollision" },
93 { 4, 0x38, "TxPausePkts" },
94 { 8, 0x3c, "TxQoSOctets" },
95 { 8, 0x44, "RxOctets" },
96 { 4, 0x4c, "RxUndersizePkts" },
97 { 4, 0x50, "RxPausePkts" },
98 { 4, 0x54, "Pkts64Octets" },
99 { 4, 0x58, "Pkts65to127Octets" },
100 { 4, 0x5c, "Pkts128to255Octets" },
101 { 4, 0x60, "Pkts256to511Octets" },
102 { 4, 0x64, "Pkts512to1023Octets" },
103 { 4, 0x68, "Pkts1024to1522Octets" },
104 { 4, 0x6c, "RxOversizePkts" },
105 { 4, 0x70, "RxJabbers" },
106 { 4, 0x74, "RxAlignmentErrors" },
107 { 4, 0x78, "RxFCSErrors" },
108 { 8, 0x7c, "RxGoodOctets" },
109 { 4, 0x84, "RxDropPkts" },
110 { 4, 0x88, "RxUnicastPkts" },
111 { 4, 0x8c, "RxMulticastPkts" },
112 { 4, 0x90, "RxBroadcastPkts" },
113 { 4, 0x94, "RxSAChanges" },
114 { 4, 0x98, "RxFragments" },
115 { 4, 0xa0, "RxSymbolErrors" },
116 { 4, 0xa4, "RxQoSPkts" },
117 { 8, 0xa8, "RxQoSOctets" },
118 { 4, 0xb0, "Pkts1523to2047Octets" },
119 { 4, 0xb4, "Pkts2048to4095Octets" },
120 { 4, 0xb8, "Pkts4096to8191Octets" },
121 { 4, 0xbc, "Pkts8192to9728Octets" },
122 { 4, 0xc0, "RxDiscarded" },
127 static const struct b53_mib_desc b53_mibs[] = {
128 { 8, 0x00, "TxOctets" },
129 { 4, 0x08, "TxDropPkts" },
130 { 4, 0x10, "TxBroadcastPkts" },
131 { 4, 0x14, "TxMulticastPkts" },
132 { 4, 0x18, "TxUnicastPkts" },
133 { 4, 0x1c, "TxCollisions" },
134 { 4, 0x20, "TxSingleCollision" },
135 { 4, 0x24, "TxMultipleCollision" },
136 { 4, 0x28, "TxDeferredTransmit" },
137 { 4, 0x2c, "TxLateCollision" },
138 { 4, 0x30, "TxExcessiveCollision" },
139 { 4, 0x38, "TxPausePkts" },
140 { 8, 0x50, "RxOctets" },
141 { 4, 0x58, "RxUndersizePkts" },
142 { 4, 0x5c, "RxPausePkts" },
143 { 4, 0x60, "Pkts64Octets" },
144 { 4, 0x64, "Pkts65to127Octets" },
145 { 4, 0x68, "Pkts128to255Octets" },
146 { 4, 0x6c, "Pkts256to511Octets" },
147 { 4, 0x70, "Pkts512to1023Octets" },
148 { 4, 0x74, "Pkts1024to1522Octets" },
149 { 4, 0x78, "RxOversizePkts" },
150 { 4, 0x7c, "RxJabbers" },
151 { 4, 0x80, "RxAlignmentErrors" },
152 { 4, 0x84, "RxFCSErrors" },
153 { 8, 0x88, "RxGoodOctets" },
154 { 4, 0x90, "RxDropPkts" },
155 { 4, 0x94, "RxUnicastPkts" },
156 { 4, 0x98, "RxMulticastPkts" },
157 { 4, 0x9c, "RxBroadcastPkts" },
158 { 4, 0xa0, "RxSAChanges" },
159 { 4, 0xa4, "RxFragments" },
160 { 4, 0xa8, "RxJumboPkts" },
161 { 4, 0xac, "RxSymbolErrors" },
162 { 4, 0xc0, "RxDiscarded" },
166 static int b53_do_vlan_op(struct b53_device *dev, u8 op)
170 b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op);
172 for (i = 0; i < 10; i++) {
175 b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta);
176 if (!(vta & VTA_START_CMD))
179 usleep_range(100, 200);
185 static void b53_set_vlan_entry(struct b53_device *dev, u16 vid, u16 members,
192 entry = (untag << VA_UNTAG_S) | members;
193 if (dev->core_rev >= 3)
194 entry |= VA_VALID_25_R4 | vid << VA_VID_HIGH_S;
196 entry |= VA_VALID_25;
199 b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
200 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
201 VTA_RW_STATE_WR | VTA_RW_OP_EN);
202 } else if (is5365(dev)) {
206 entry = (untag << VA_UNTAG_S) | members | VA_VALID_65;
208 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
209 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
210 VTA_RW_STATE_WR | VTA_RW_OP_EN);
212 b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
213 b53_write32(dev, B53_ARLIO_PAGE, dev->vta_regs[2],
214 (untag << VTE_UNTAG_S) | members);
216 b53_do_vlan_op(dev, VTA_CMD_WRITE);
220 void b53_set_forwarding(struct b53_device *dev, int enable)
224 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
227 mgmt |= SM_SW_FWD_EN;
229 mgmt &= ~SM_SW_FWD_EN;
231 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
234 static void b53_enable_vlan(struct b53_device *dev, int enable)
236 u8 mgmt, vc0, vc1, vc4 = 0, vc5;
238 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
239 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &vc0);
240 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &vc1);
242 if (is5325(dev) || is5365(dev)) {
243 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
244 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
245 } else if (is63xx(dev)) {
246 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &vc4);
247 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
249 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &vc4);
250 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
253 mgmt &= ~SM_SW_FWD_MODE;
256 vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
257 vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
258 vc4 &= ~VC4_ING_VID_CHECK_MASK;
259 vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S;
260 vc5 |= VC5_DROP_VTABLE_MISS;
263 vc0 &= ~VC0_RESERVED_1;
265 if (is5325(dev) || is5365(dev))
266 vc1 |= VC1_RX_MCST_TAG_EN;
268 if (!is5325(dev) && !is5365(dev)) {
269 if (dev->allow_vid_4095)
270 vc5 |= VC5_VID_FFF_EN;
272 vc5 &= ~VC5_VID_FFF_EN;
275 vc0 &= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);
276 vc1 &= ~(VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN);
277 vc4 &= ~VC4_ING_VID_CHECK_MASK;
278 vc5 &= ~VC5_DROP_VTABLE_MISS;
280 if (is5325(dev) || is5365(dev))
281 vc4 |= VC4_ING_VID_VIO_FWD << VC4_ING_VID_CHECK_S;
283 vc4 |= VC4_ING_VID_VIO_TO_IMP << VC4_ING_VID_CHECK_S;
285 if (is5325(dev) || is5365(dev))
286 vc1 &= ~VC1_RX_MCST_TAG_EN;
288 if (!is5325(dev) && !is5365(dev))
289 vc5 &= ~VC5_VID_FFF_EN;
292 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);
293 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);
295 if (is5325(dev) || is5365(dev)) {
296 /* enable the high 8 bit vid check on 5325 */
297 if (is5325(dev) && enable)
298 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,
301 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
303 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);
304 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
305 } else if (is63xx(dev)) {
306 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);
307 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);
308 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
310 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
311 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);
312 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);
315 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
318 static int b53_set_jumbo(struct b53_device *dev, int enable, int allow_10_100)
321 u16 max_size = JMS_MIN_SIZE;
323 if (is5325(dev) || is5365(dev))
327 port_mask = dev->enabled_ports;
328 max_size = JMS_MAX_SIZE;
330 port_mask |= JPM_10_100_JUMBO_EN;
333 b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask);
334 return b53_write16(dev, B53_JUMBO_PAGE, dev->jumbo_size_reg, max_size);
337 static int b53_flush_arl(struct b53_device *dev)
341 b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
342 FAST_AGE_DONE | FAST_AGE_DYNAMIC | FAST_AGE_STATIC);
344 for (i = 0; i < 10; i++) {
347 b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
350 if (!(fast_age_ctrl & FAST_AGE_DONE))
356 pr_warn("time out while flushing ARL\n");
361 static void b53_enable_ports(struct b53_device *dev)
365 b53_for_each_port(dev, i) {
370 * prevent leaking packets between wan and lan in unmanaged
371 * mode through port vlans.
373 if (dev->enable_vlan || is_cpu_port(dev, i))
375 else if (is531x5(dev))
376 /* BCM53115 may use a different port as cpu port */
377 pvlan_mask = BIT(dev->sw_dev.cpu_port);
379 pvlan_mask = BIT(B53_CPU_PORT);
381 /* BCM5325 CPU port is at 8 */
382 if ((is5325(dev) || is5365(dev)) && i == B53_CPU_PORT_25)
385 if (dev->chip_id == BCM5398_DEVICE_ID && (i == 6 || i == 7))
386 /* disable unused ports 6 & 7 */
387 port_ctrl = PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
388 else if (i == B53_CPU_PORT)
389 port_ctrl = PORT_CTRL_RX_BCST_EN |
390 PORT_CTRL_RX_MCST_EN |
391 PORT_CTRL_RX_UCST_EN;
395 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i),
398 /* port state is handled by bcm63xx_enet driver */
400 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(i),
405 static void b53_enable_mib(struct b53_device *dev)
409 b53_read8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, &gc);
411 gc &= ~(GC_RESET_MIB | GC_MIB_AC_EN);
413 b53_write8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, gc);
416 static int b53_apply(struct b53_device *dev)
420 /* clear all vlan entries */
421 if (is5325(dev) || is5365(dev)) {
422 for (i = 1; i < dev->sw_dev.vlans; i++)
423 b53_set_vlan_entry(dev, i, 0, 0);
425 b53_do_vlan_op(dev, VTA_CMD_CLEAR);
428 b53_enable_vlan(dev, dev->enable_vlan);
430 /* fill VLAN table */
431 if (dev->enable_vlan) {
432 for (i = 0; i < dev->sw_dev.vlans; i++) {
433 struct b53_vlan *vlan = &dev->vlans[i];
438 b53_set_vlan_entry(dev, i, vlan->members, vlan->untag);
441 b53_for_each_port(dev, i)
442 b53_write16(dev, B53_VLAN_PAGE,
443 B53_VLAN_PORT_DEF_TAG(i),
446 b53_for_each_port(dev, i)
447 b53_write16(dev, B53_VLAN_PAGE,
448 B53_VLAN_PORT_DEF_TAG(i), 1);
452 b53_enable_ports(dev);
454 if (!is5325(dev) && !is5365(dev))
455 b53_set_jumbo(dev, dev->enable_jumbo, 1);
460 void b53_switch_reset_gpio(struct b53_device *dev)
462 int gpio = dev->reset_gpio;
468 * Reset sequence: RESET low(50ms)->high(20ms)
470 gpio_set_value(gpio, 0);
473 gpio_set_value(gpio, 1);
476 dev->current_page = 0xff;
479 static int b53_switch_reset(struct b53_device *dev)
483 b53_switch_reset_gpio(dev);
486 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x83);
487 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
490 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
492 if (!(mgmt & SM_SW_FWD_EN)) {
493 mgmt &= ~SM_SW_FWD_MODE;
494 mgmt |= SM_SW_FWD_EN;
496 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
497 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
499 if (!(mgmt & SM_SW_FWD_EN)) {
500 pr_err("Failed to enable switch!\n");
505 /* enable all ports */
506 b53_enable_ports(dev);
508 /* configure MII port if necessary */
510 u8 mii_port_override;
512 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
514 /* reverse mii needs to be enabled */
515 if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
516 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
517 mii_port_override | PORT_OVERRIDE_RV_MII_25);
518 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
521 if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
522 pr_err("Failed to enable reverse MII mode\n");
526 } else if (is531x5(dev) && dev->sw_dev.cpu_port == B53_CPU_PORT) {
527 u8 mii_port_override;
529 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
531 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
532 mii_port_override | PORT_OVERRIDE_EN |
538 return b53_flush_arl(dev);
542 * Swconfig glue functions
545 static int b53_global_get_vlan_enable(struct switch_dev *dev,
546 const struct switch_attr *attr,
547 struct switch_val *val)
549 struct b53_device *priv = sw_to_b53(dev);
551 val->value.i = priv->enable_vlan;
556 static int b53_global_set_vlan_enable(struct switch_dev *dev,
557 const struct switch_attr *attr,
558 struct switch_val *val)
560 struct b53_device *priv = sw_to_b53(dev);
562 priv->enable_vlan = val->value.i;
567 static int b53_global_get_jumbo_enable(struct switch_dev *dev,
568 const struct switch_attr *attr,
569 struct switch_val *val)
571 struct b53_device *priv = sw_to_b53(dev);
573 val->value.i = priv->enable_jumbo;
578 static int b53_global_set_jumbo_enable(struct switch_dev *dev,
579 const struct switch_attr *attr,
580 struct switch_val *val)
582 struct b53_device *priv = sw_to_b53(dev);
584 priv->enable_jumbo = val->value.i;
589 static int b53_global_get_4095_enable(struct switch_dev *dev,
590 const struct switch_attr *attr,
591 struct switch_val *val)
593 struct b53_device *priv = sw_to_b53(dev);
595 val->value.i = priv->allow_vid_4095;
600 static int b53_global_set_4095_enable(struct switch_dev *dev,
601 const struct switch_attr *attr,
602 struct switch_val *val)
604 struct b53_device *priv = sw_to_b53(dev);
606 priv->allow_vid_4095 = val->value.i;
611 static int b53_global_get_ports(struct switch_dev *dev,
612 const struct switch_attr *attr,
613 struct switch_val *val)
615 struct b53_device *priv = sw_to_b53(dev);
617 val->len = snprintf(priv->buf, B53_BUF_SIZE, "0x%04x",
618 priv->enabled_ports);
619 val->value.s = priv->buf;
624 static int b53_port_get_pvid(struct switch_dev *dev, int port, int *val)
626 struct b53_device *priv = sw_to_b53(dev);
628 *val = priv->ports[port].pvid;
633 static int b53_port_set_pvid(struct switch_dev *dev, int port, int val)
635 struct b53_device *priv = sw_to_b53(dev);
637 if (val > 15 && is5325(priv))
639 if (val == 4095 && !priv->allow_vid_4095)
642 priv->ports[port].pvid = val;
647 static int b53_vlan_get_ports(struct switch_dev *dev, struct switch_val *val)
649 struct b53_device *priv = sw_to_b53(dev);
650 struct switch_port *port = &val->value.ports[0];
651 struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
659 for (i = 0; i < dev->ports; i++) {
660 if (!(vlan->members & BIT(i)))
664 if (!(vlan->untag & BIT(i)))
665 port->flags = BIT(SWITCH_PORT_FLAG_TAGGED);
677 static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
679 struct b53_device *priv = sw_to_b53(dev);
680 struct switch_port *port;
681 struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
684 /* only BCM5325 and BCM5365 supports VID 0 */
685 if (val->port_vlan == 0 && !is5325(priv) && !is5365(priv))
688 /* VLAN 4095 needs special handling */
689 if (val->port_vlan == 4095 && !priv->allow_vid_4095)
692 port = &val->value.ports[0];
695 for (i = 0; i < val->len; i++, port++) {
696 vlan->members |= BIT(port->id);
698 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
699 vlan->untag |= BIT(port->id);
700 priv->ports[port->id].pvid = val->port_vlan;
704 /* ignore disabled ports */
705 vlan->members &= priv->enabled_ports;
706 vlan->untag &= priv->enabled_ports;
711 static int b53_port_get_link(struct switch_dev *dev, int port,
712 struct switch_port_link *link)
714 struct b53_device *priv = sw_to_b53(dev);
716 if (is_cpu_port(priv, port)) {
719 link->speed = is5325(priv) || is5365(priv) ?
720 SWITCH_PORT_SPEED_100 : SWITCH_PORT_SPEED_1000;
722 } else if (priv->enabled_ports & BIT(port)) {
726 b53_read16(priv, B53_STAT_PAGE, B53_LINK_STAT, &lnk);
727 b53_read16(priv, B53_STAT_PAGE, priv->duplex_reg, &duplex);
729 lnk = (lnk >> port) & 1;
730 duplex = (duplex >> port) & 1;
732 if (is5325(priv) || is5365(priv)) {
735 b53_read16(priv, B53_STAT_PAGE, B53_SPEED_STAT, &tmp);
736 speed = SPEED_PORT_FE(tmp, port);
738 b53_read32(priv, B53_STAT_PAGE, B53_SPEED_STAT, &speed);
739 speed = SPEED_PORT_GE(speed, port);
744 link->duplex = duplex;
747 link->speed = SWITCH_PORT_SPEED_10;
749 case SPEED_STAT_100M:
750 link->speed = SWITCH_PORT_SPEED_100;
752 case SPEED_STAT_1000M:
753 link->speed = SWITCH_PORT_SPEED_1000;
767 static int b53_global_reset_switch(struct switch_dev *dev)
769 struct b53_device *priv = sw_to_b53(dev);
772 priv->enable_vlan = 0;
773 priv->enable_jumbo = 0;
774 priv->allow_vid_4095 = 0;
776 memset(priv->vlans, 0, sizeof(priv->vlans) * dev->vlans);
777 memset(priv->ports, 0, sizeof(priv->ports) * dev->ports);
779 return b53_switch_reset(priv);
782 static int b53_global_apply_config(struct switch_dev *dev)
784 struct b53_device *priv = sw_to_b53(dev);
786 /* disable switching */
787 b53_set_forwarding(priv, 0);
791 /* enable switching */
792 b53_set_forwarding(priv, 1);
798 static int b53_global_reset_mib(struct switch_dev *dev,
799 const struct switch_attr *attr,
800 struct switch_val *val)
802 struct b53_device *priv = sw_to_b53(dev);
805 b53_read8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
807 b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc | GC_RESET_MIB);
809 b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc & ~GC_RESET_MIB);
815 static int b53_port_get_mib(struct switch_dev *sw_dev,
816 const struct switch_attr *attr,
817 struct switch_val *val)
819 struct b53_device *dev = sw_to_b53(sw_dev);
820 const struct b53_mib_desc *mibs;
821 int port = val->port_vlan;
824 if (!(BIT(port) & dev->enabled_ports))
832 } else if (is63xx(dev)) {
833 mibs = b53_mibs_63xx;
840 for (; mibs->size > 0; mibs++) {
843 if (mibs->size == 8) {
844 b53_read64(dev, B53_MIB_PAGE(port), mibs->offset, &val);
848 b53_read32(dev, B53_MIB_PAGE(port), mibs->offset,
853 len += snprintf(dev->buf + len, B53_BUF_SIZE - len,
854 "%-20s: %llu\n", mibs->name, val);
858 val->value.s = dev->buf;
863 static struct switch_attr b53_global_ops_25[] = {
865 .type = SWITCH_TYPE_INT,
866 .name = "enable_vlan",
867 .description = "Enable VLAN mode",
868 .set = b53_global_set_vlan_enable,
869 .get = b53_global_get_vlan_enable,
873 .type = SWITCH_TYPE_STRING,
875 .description = "Available ports (as bitmask)",
876 .get = b53_global_get_ports,
880 static struct switch_attr b53_global_ops_65[] = {
882 .type = SWITCH_TYPE_INT,
883 .name = "enable_vlan",
884 .description = "Enable VLAN mode",
885 .set = b53_global_set_vlan_enable,
886 .get = b53_global_get_vlan_enable,
890 .type = SWITCH_TYPE_STRING,
892 .description = "Available ports (as bitmask)",
893 .get = b53_global_get_ports,
896 .type = SWITCH_TYPE_INT,
898 .description = "Reset MIB counters",
899 .set = b53_global_reset_mib,
903 static struct switch_attr b53_global_ops[] = {
905 .type = SWITCH_TYPE_INT,
906 .name = "enable_vlan",
907 .description = "Enable VLAN mode",
908 .set = b53_global_set_vlan_enable,
909 .get = b53_global_get_vlan_enable,
913 .type = SWITCH_TYPE_STRING,
915 .description = "Available Ports (as bitmask)",
916 .get = b53_global_get_ports,
919 .type = SWITCH_TYPE_INT,
921 .description = "Reset MIB counters",
922 .set = b53_global_reset_mib,
925 .type = SWITCH_TYPE_INT,
926 .name = "enable_jumbo",
927 .description = "Enable Jumbo Frames",
928 .set = b53_global_set_jumbo_enable,
929 .get = b53_global_get_jumbo_enable,
933 .type = SWITCH_TYPE_INT,
934 .name = "allow_vid_4095",
935 .description = "Allow VID 4095",
936 .set = b53_global_set_4095_enable,
937 .get = b53_global_get_4095_enable,
942 static struct switch_attr b53_port_ops[] = {
944 .type = SWITCH_TYPE_STRING,
946 .description = "Get port's MIB counters",
947 .get = b53_port_get_mib,
951 static struct switch_attr b53_no_ops[] = {
954 static const struct switch_dev_ops b53_switch_ops_25 = {
956 .attr = b53_global_ops_25,
957 .n_attr = ARRAY_SIZE(b53_global_ops_25),
961 .n_attr = ARRAY_SIZE(b53_no_ops),
965 .n_attr = ARRAY_SIZE(b53_no_ops),
968 .get_vlan_ports = b53_vlan_get_ports,
969 .set_vlan_ports = b53_vlan_set_ports,
970 .get_port_pvid = b53_port_get_pvid,
971 .set_port_pvid = b53_port_set_pvid,
972 .apply_config = b53_global_apply_config,
973 .reset_switch = b53_global_reset_switch,
974 .get_port_link = b53_port_get_link,
977 static const struct switch_dev_ops b53_switch_ops_65 = {
979 .attr = b53_global_ops_65,
980 .n_attr = ARRAY_SIZE(b53_global_ops_65),
983 .attr = b53_port_ops,
984 .n_attr = ARRAY_SIZE(b53_port_ops),
988 .n_attr = ARRAY_SIZE(b53_no_ops),
991 .get_vlan_ports = b53_vlan_get_ports,
992 .set_vlan_ports = b53_vlan_set_ports,
993 .get_port_pvid = b53_port_get_pvid,
994 .set_port_pvid = b53_port_set_pvid,
995 .apply_config = b53_global_apply_config,
996 .reset_switch = b53_global_reset_switch,
997 .get_port_link = b53_port_get_link,
1000 static const struct switch_dev_ops b53_switch_ops = {
1002 .attr = b53_global_ops,
1003 .n_attr = ARRAY_SIZE(b53_global_ops),
1006 .attr = b53_port_ops,
1007 .n_attr = ARRAY_SIZE(b53_port_ops),
1011 .n_attr = ARRAY_SIZE(b53_no_ops),
1014 .get_vlan_ports = b53_vlan_get_ports,
1015 .set_vlan_ports = b53_vlan_set_ports,
1016 .get_port_pvid = b53_port_get_pvid,
1017 .set_port_pvid = b53_port_set_pvid,
1018 .apply_config = b53_global_apply_config,
1019 .reset_switch = b53_global_reset_switch,
1020 .get_port_link = b53_port_get_link,
1023 struct b53_chip_data {
1025 const char *dev_name;
1034 const struct switch_dev_ops *sw_ops;
1037 #define B53_VTA_REGS \
1038 { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1039 #define B53_VTA_REGS_9798 \
1040 { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1041 #define B53_VTA_REGS_63XX \
1042 { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1044 static const struct b53_chip_data b53_switch_chips[] = {
1046 .chip_id = BCM5325_DEVICE_ID,
1047 .dev_name = "BCM5325",
1050 .enabled_ports = 0x1f,
1051 .cpu_port = B53_CPU_PORT_25,
1052 .duplex_reg = B53_DUPLEX_STAT_FE,
1053 .sw_ops = &b53_switch_ops_25,
1056 .chip_id = BCM5365_DEVICE_ID,
1057 .dev_name = "BCM5365",
1060 .enabled_ports = 0x1f,
1061 .cpu_port = B53_CPU_PORT_25,
1062 .duplex_reg = B53_DUPLEX_STAT_FE,
1063 .sw_ops = &b53_switch_ops_65,
1066 .chip_id = BCM5395_DEVICE_ID,
1067 .dev_name = "BCM5395",
1070 .enabled_ports = 0x1f,
1071 .cpu_port = B53_CPU_PORT,
1072 .vta_regs = B53_VTA_REGS,
1073 .duplex_reg = B53_DUPLEX_STAT_GE,
1074 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1075 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1076 .sw_ops = &b53_switch_ops,
1079 .chip_id = BCM5397_DEVICE_ID,
1080 .dev_name = "BCM5397",
1083 .enabled_ports = 0x1f,
1084 .cpu_port = B53_CPU_PORT,
1085 .vta_regs = B53_VTA_REGS_9798,
1086 .duplex_reg = B53_DUPLEX_STAT_GE,
1087 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1088 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1089 .sw_ops = &b53_switch_ops,
1092 .chip_id = BCM5398_DEVICE_ID,
1093 .dev_name = "BCM5398",
1096 .enabled_ports = 0x7f,
1097 .cpu_port = B53_CPU_PORT,
1098 .vta_regs = B53_VTA_REGS_9798,
1099 .duplex_reg = B53_DUPLEX_STAT_GE,
1100 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1101 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1102 .sw_ops = &b53_switch_ops,
1105 .chip_id = BCM53115_DEVICE_ID,
1106 .dev_name = "BCM53115",
1107 .alias = "bcm53115",
1109 .enabled_ports = 0x1f,
1110 .vta_regs = B53_VTA_REGS,
1111 .cpu_port = B53_CPU_PORT,
1112 .duplex_reg = B53_DUPLEX_STAT_GE,
1113 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1114 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1115 .sw_ops = &b53_switch_ops,
1118 .chip_id = BCM53125_DEVICE_ID,
1119 .dev_name = "BCM53125",
1120 .alias = "bcm53125",
1122 .enabled_ports = 0x1f,
1123 .cpu_port = B53_CPU_PORT,
1124 .vta_regs = B53_VTA_REGS,
1125 .duplex_reg = B53_DUPLEX_STAT_GE,
1126 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1127 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1128 .sw_ops = &b53_switch_ops,
1131 .chip_id = BCM63XX_DEVICE_ID,
1132 .dev_name = "BCM63xx",
1135 .enabled_ports = 0, /* pdata must provide them */
1136 .cpu_port = B53_CPU_PORT,
1137 .vta_regs = B53_VTA_REGS_63XX,
1138 .duplex_reg = B53_DUPLEX_STAT_63XX,
1139 .jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
1140 .jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
1141 .sw_ops = &b53_switch_ops,
1145 int b53_switch_init(struct b53_device *dev)
1147 struct switch_dev *sw_dev = &dev->sw_dev;
1151 for (i = 0; i < ARRAY_SIZE(b53_switch_chips); i++) {
1152 const struct b53_chip_data *chip = &b53_switch_chips[i];
1154 if (chip->chip_id == dev->chip_id) {
1155 sw_dev->name = chip->dev_name;
1157 sw_dev->alias = chip->alias;
1158 if (!dev->enabled_ports)
1159 dev->enabled_ports = chip->enabled_ports;
1160 dev->duplex_reg = chip->duplex_reg;
1161 dev->vta_regs[0] = chip->vta_regs[0];
1162 dev->vta_regs[1] = chip->vta_regs[1];
1163 dev->vta_regs[2] = chip->vta_regs[2];
1164 dev->jumbo_pm_reg = chip->jumbo_pm_reg;
1165 sw_dev->ops = chip->sw_ops;
1166 sw_dev->cpu_port = chip->cpu_port;
1167 sw_dev->vlans = chip->vlans;
1175 /* check which BCM5325x version we have */
1179 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
1181 /* check reserved bits */
1187 /* BCM5325F - do not use port 4 */
1188 dev->enabled_ports &= ~BIT(4);
1191 /* On the BCM47XX SoCs this is the supported internal switch.*/
1192 #ifndef CONFIG_BCM47XX
1199 } else if (dev->chip_id == BCM53115_DEVICE_ID) {
1202 b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
1203 /* use second IMP port if GMII is enabled */
1204 if (strap_value & SV_GMII_CTRL_115)
1205 sw_dev->cpu_port = 5;
1208 /* cpu port is always last */
1209 sw_dev->ports = sw_dev->cpu_port + 1;
1210 dev->enabled_ports |= BIT(sw_dev->cpu_port);
1212 dev->ports = devm_kzalloc(dev->dev,
1213 sizeof(struct b53_port) * sw_dev->ports,
1218 dev->vlans = devm_kzalloc(dev->dev,
1219 sizeof(struct b53_vlan) * sw_dev->vlans,
1224 dev->buf = devm_kzalloc(dev->dev, B53_BUF_SIZE, GFP_KERNEL);
1228 dev->reset_gpio = b53_switch_get_reset_gpio(dev);
1229 if (dev->reset_gpio >= 0) {
1230 ret = devm_gpio_request_one(dev->dev, dev->reset_gpio, GPIOF_OUT_INIT_HIGH, "robo_reset");
1235 return b53_switch_reset(dev);
1238 struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops,
1241 struct b53_device *dev;
1243 dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
1250 mutex_init(&dev->reg_mutex);
1254 EXPORT_SYMBOL(b53_switch_alloc);
1256 int b53_switch_detect(struct b53_device *dev)
1263 ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id8);
1270 * BCM5325 and BCM5365 do not have this register so reads
1271 * return 0. But the read operation did succeed, so assume
1272 * this is one of them.
1274 * Next check if we can write to the 5325's VTA register; for
1275 * 5365 it is read only.
1278 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
1279 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
1282 dev->chip_id = BCM5325_DEVICE_ID;
1284 dev->chip_id = BCM5365_DEVICE_ID;
1286 case BCM5395_DEVICE_ID:
1287 case BCM5397_DEVICE_ID:
1288 case BCM5398_DEVICE_ID:
1292 ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id32);
1297 case BCM53115_DEVICE_ID:
1298 case BCM53125_DEVICE_ID:
1299 dev->chip_id = id32;
1302 pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1308 return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID, &dev->core_rev);
1310 EXPORT_SYMBOL(b53_switch_detect);
1312 int b53_switch_register(struct b53_device *dev)
1317 dev->chip_id = dev->pdata->chip_id;
1318 dev->enabled_ports = dev->pdata->enabled_ports;
1319 dev->sw_dev.alias = dev->pdata->alias;
1322 if (!dev->chip_id && b53_switch_detect(dev))
1325 ret = b53_switch_init(dev);
1329 pr_info("found switch: %s, rev %i\n", dev->sw_dev.name, dev->core_rev);
1331 return register_switch(&dev->sw_dev, NULL);
1333 EXPORT_SYMBOL(b53_switch_register);
1335 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1336 MODULE_DESCRIPTION("B53 switch library");
1337 MODULE_LICENSE("Dual BSD/GPL");