2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
39 struct switch_dev dev;
40 struct phy_device *phy;
41 u32 (*read)(struct ar8216_priv *priv, int reg);
42 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43 const struct net_device_ops *ndo_old;
44 struct net_device_ops ndo;
45 struct mutex reg_mutex;
53 /* all fields below are cleared on reset */
55 u16 vlan_id[AR8X16_MAX_VLANS];
56 u8 vlan_table[AR8X16_MAX_VLANS];
58 u16 pvid[AR8216_NUM_PORTS];
61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
64 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
73 *page = regaddr & 0x1ff;
77 ar8216_mii_read(struct ar8216_priv *priv, int reg)
79 struct phy_device *phy = priv->phy;
80 struct mii_bus *bus = phy->bus;
84 split_addr((u32) reg, &r1, &r2, &page);
86 mutex_lock(&bus->mdio_lock);
88 bus->write(bus, 0x18, 0, page);
89 msleep(1); /* wait for the page switch to propagate */
90 lo = bus->read(bus, 0x10 | r2, r1);
91 hi = bus->read(bus, 0x10 | r2, r1 + 1);
93 mutex_unlock(&bus->mdio_lock);
95 return (hi << 16) | lo;
99 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
101 struct phy_device *phy = priv->phy;
102 struct mii_bus *bus = phy->bus;
106 split_addr((u32) reg, &r1, &r2, &r3);
108 hi = (u16) (val >> 16);
110 mutex_lock(&bus->mdio_lock);
112 bus->write(bus, 0x18, 0, r3);
113 msleep(1); /* wait for the page switch to propagate */
114 bus->write(bus, 0x10 | r2, r1 + 1, hi);
115 bus->write(bus, 0x10 | r2, r1, lo);
117 mutex_unlock(&bus->mdio_lock);
121 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
125 v = priv->read(priv, reg);
128 priv->write(priv, reg, v);
134 ar8216_id_chip(struct ar8216_priv *priv)
140 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
144 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
145 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
148 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
152 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
167 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
168 (int)(id >> AR8216_CTRL_VERSION_S),
169 (int)(id & AR8216_CTRL_REVISION),
170 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
171 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
178 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
179 struct switch_val *val)
181 struct ar8216_priv *priv = to_ar8216(dev);
182 priv->vlan = !!val->value.i;
187 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
188 struct switch_val *val)
190 struct ar8216_priv *priv = to_ar8216(dev);
191 val->value.i = priv->vlan;
197 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
199 struct ar8216_priv *priv = to_ar8216(dev);
201 /* make sure no invalid PVIDs get set */
203 if (vlan >= dev->vlans)
206 priv->pvid[port] = vlan;
211 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
213 struct ar8216_priv *priv = to_ar8216(dev);
214 *vlan = priv->pvid[port];
219 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
220 struct switch_val *val)
222 struct ar8216_priv *priv = to_ar8216(dev);
223 priv->vlan_id[val->port_vlan] = val->value.i;
228 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
229 struct switch_val *val)
231 struct ar8216_priv *priv = to_ar8216(dev);
232 val->value.i = priv->vlan_id[val->port_vlan];
236 static const char *ar8216_speed_str(unsigned speed)
239 case AR8216_PORT_SPEED_10M:
241 case AR8216_PORT_SPEED_100M:
243 case AR8216_PORT_SPEED_1000M:
250 static int ar8216_port_get_link(struct switch_dev *dev,
251 const struct switch_attr *attr,
252 struct switch_val *val)
254 struct ar8216_priv *priv = to_ar8216(dev);
259 port = val->port_vlan;
261 memset(priv->buf, '\0', sizeof(priv->buf));
262 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
264 if (status & AR8216_PORT_STATUS_LINK_UP) {
265 len = snprintf(priv->buf, sizeof(priv->buf),
266 "port:%d link:up speed:%s %s-duplex %s%s%s",
268 ar8216_speed_str((status &
269 AR8216_PORT_STATUS_SPEED) >>
270 AR8216_PORT_STATUS_SPEED_S),
271 (status & AR8216_PORT_STATUS_DUPLEX) ?
273 (status & AR8216_PORT_STATUS_TXFLOW) ?
275 (status & AR8216_PORT_STATUS_RXFLOW) ?
277 (status & AR8216_PORT_STATUS_LINK_AUTO) ?
280 len = snprintf(priv->buf, sizeof(priv->buf), "port:%d link:down",
284 val->value.s = priv->buf;
291 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
293 struct ar8216_priv *priv = dev->phy_ptr;
302 if (unlikely(skb_headroom(skb) < 2)) {
303 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
307 buf = skb_push(skb, 2);
312 return priv->ndo_old->ndo_start_xmit(skb, dev);
315 dev_kfree_skb_any(skb);
320 ar8216_mangle_rx(struct sk_buff *skb, int napi)
322 struct ar8216_priv *priv;
323 struct net_device *dev;
335 /* don't strip the header if vlan mode is disabled */
339 /* strip header, get vlan id */
343 /* check for vlan header presence */
344 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
349 /* no need to fix up packets coming from a tagged source */
350 if (priv->vlan_tagged & (1 << port))
353 /* lookup port vid from local table, the switch passes an invalid vlan id */
354 vlan = priv->vlan_id[priv->pvid[port]];
357 buf[14 + 2] |= vlan >> 8;
358 buf[15 + 2] = vlan & 0xff;
361 skb->protocol = eth_type_trans(skb, skb->dev);
364 return netif_receive_skb(skb);
366 return netif_rx(skb);
369 /* no vlan? eat the packet! */
370 dev_kfree_skb_any(skb);
375 ar8216_netif_rx(struct sk_buff *skb)
377 return ar8216_mangle_rx(skb, 0);
381 ar8216_netif_receive_skb(struct sk_buff *skb)
383 return ar8216_mangle_rx(skb, 1);
387 static struct switch_attr ar8216_globals[] = {
389 .type = SWITCH_TYPE_INT,
390 .name = "enable_vlan",
391 .description = "Enable VLAN mode",
392 .set = ar8216_set_vlan,
393 .get = ar8216_get_vlan,
398 static struct switch_attr ar8216_port[] = {
400 .type = SWITCH_TYPE_STRING,
402 .description = "Get port link information",
405 .get = ar8216_port_get_link,
409 static struct switch_attr ar8216_vlan[] = {
411 .type = SWITCH_TYPE_INT,
413 .description = "VLAN ID (0-4094)",
414 .set = ar8216_set_vid,
415 .get = ar8216_get_vid,
422 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
424 struct ar8216_priv *priv = to_ar8216(dev);
425 u8 ports = priv->vlan_table[val->port_vlan];
429 for (i = 0; i < AR8216_NUM_PORTS; i++) {
430 struct switch_port *p;
432 if (!(ports & (1 << i)))
435 p = &val->value.ports[val->len++];
437 if (priv->vlan_tagged & (1 << i))
438 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
446 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
448 struct ar8216_priv *priv = to_ar8216(dev);
449 u8 *vt = &priv->vlan_table[val->port_vlan];
453 for (i = 0; i < val->len; i++) {
454 struct switch_port *p = &val->value.ports[i];
456 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
457 priv->vlan_tagged |= (1 << p->id);
459 priv->vlan_tagged &= ~(1 << p->id);
460 priv->pvid[p->id] = val->port_vlan;
462 /* make sure that an untagged port does not
463 * appear in other vlans */
464 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
465 if (j == val->port_vlan)
467 priv->vlan_table[j] &= ~(1 << p->id);
477 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
481 while ((priv->read(priv, reg) & mask) != val) {
482 if (timeout-- <= 0) {
483 printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
491 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
493 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
495 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
496 val &= AR8216_VTUDATA_MEMBER;
497 val |= AR8216_VTUDATA_VALID;
498 priv->write(priv, AR8216_REG_VTU_DATA, val);
500 op |= AR8216_VTU_ACTIVE;
501 priv->write(priv, AR8216_REG_VTU, op);
505 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
506 u32 members, u32 pvid)
510 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
511 header = AR8216_PORT_CTRL_HEADER;
515 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
516 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
517 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
518 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
519 AR8216_PORT_CTRL_LEARN | header |
520 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
521 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
523 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
524 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
525 AR8216_PORT_VLAN_DEFAULT_ID,
526 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
527 (ingress << AR8216_PORT_VLAN_MODE_S) |
528 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
532 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
533 u32 members, u32 pvid)
535 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
536 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
537 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
538 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
539 AR8216_PORT_CTRL_LEARN |
540 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
541 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
543 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
544 AR8236_PORT_VLAN_DEFAULT_ID,
545 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
547 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
548 AR8236_PORT_VLAN2_VLAN_MODE |
549 AR8236_PORT_VLAN2_MEMBER,
550 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
551 (members << AR8236_PORT_VLAN2_MEMBER_S));
555 ar8216_hw_apply(struct switch_dev *dev)
557 struct ar8216_priv *priv = to_ar8216(dev);
558 u8 portmask[AR8216_NUM_PORTS];
561 mutex_lock(&priv->reg_mutex);
562 /* flush all vlan translation unit entries */
563 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
565 memset(portmask, 0, sizeof(portmask));
567 /* calculate the port destination masks and load vlans
568 * into the vlan translation unit */
569 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
570 u8 vp = priv->vlan_table[j];
575 for (i = 0; i < AR8216_NUM_PORTS; i++) {
578 portmask[i] |= vp & ~mask;
583 (priv->vlan_id[j] << AR8216_VTU_VID_S),
584 priv->vlan_table[j]);
588 * isolate all ports, but connect them to the cpu port */
589 for (i = 0; i < AR8216_NUM_PORTS; i++) {
590 if (i == AR8216_PORT_CPU)
593 portmask[i] = 1 << AR8216_PORT_CPU;
594 portmask[AR8216_PORT_CPU] |= (1 << i);
598 /* update the port destination mask registers and tag settings */
599 for (i = 0; i < AR8216_NUM_PORTS; i++) {
604 pvid = priv->vlan_id[priv->pvid[i]];
610 if (priv->vlan_tagged & (1 << i))
611 egress = AR8216_OUT_ADD_VLAN;
613 egress = AR8216_OUT_STRIP_VLAN;
615 egress = AR8216_OUT_KEEP;
618 ingress = AR8216_IN_SECURE;
620 ingress = AR8216_IN_PORT_ONLY;
623 if (priv->chip == AR8236)
624 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
627 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
630 mutex_unlock(&priv->reg_mutex);
635 ar8236_hw_init(struct ar8216_priv *priv) {
636 static int initialized;
643 /* Initialize the PHYs */
644 bus = priv->phy->bus;
645 for (i = 0; i < 5; i++) {
646 mdiobus_write(bus, i, MII_ADVERTISE,
647 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
648 ADVERTISE_PAUSE_ASYM);
649 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
658 ar8316_hw_init(struct ar8216_priv *priv) {
663 val = priv->read(priv, 0x8);
665 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
666 if (priv->port4_phy) {
667 /* value taken from Ubiquiti RouterStation Pro */
669 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
672 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
674 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
675 /* value taken from AVM Fritz!Box 7390 sources */
678 /* no known value for phy interface */
679 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
680 priv->phy->interface);
687 priv->write(priv, 0x8, newval);
689 /* standard atheros magic */
690 priv->write(priv, 0x38, 0xc000050e);
692 /* Initialize the ports */
693 bus = priv->phy->bus;
694 for (i = 0; i < 5; i++) {
695 if ((i == 4) && priv->port4_phy &&
696 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
697 /* work around for phy4 rgmii mode */
698 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
699 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
701 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
702 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
704 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
705 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
709 /* initialize the port itself */
710 mdiobus_write(bus, i, MII_ADVERTISE,
711 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
712 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
713 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
718 priv->initialized = true;
723 ar8216_reset_switch(struct switch_dev *dev)
725 struct ar8216_priv *priv = to_ar8216(dev);
728 mutex_lock(&priv->reg_mutex);
729 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
730 offsetof(struct ar8216_priv, vlan));
731 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
732 priv->vlan_id[i] = i;
734 for (i = 0; i < AR8216_NUM_PORTS; i++) {
735 /* Enable port learning and tx */
736 priv->write(priv, AR8216_REG_PORT_CTRL(i),
737 AR8216_PORT_CTRL_LEARN |
738 (4 << AR8216_PORT_CTRL_STATE_S));
740 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
742 /* Configure all PHYs */
743 if (i == AR8216_PORT_CPU) {
744 priv->write(priv, AR8216_REG_PORT_STATUS(i),
745 AR8216_PORT_STATUS_LINK_UP |
746 ((priv->chip == AR8316) ?
747 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
748 AR8216_PORT_STATUS_TXMAC |
749 AR8216_PORT_STATUS_RXMAC |
750 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
751 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
752 AR8216_PORT_STATUS_DUPLEX);
754 priv->write(priv, AR8216_REG_PORT_STATUS(i),
755 AR8216_PORT_STATUS_LINK_AUTO);
758 /* XXX: undocumented magic from atheros, required! */
759 priv->write(priv, 0x38, 0xc000050e);
761 if (priv->chip == AR8216) {
762 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
763 AR8216_GCTRL_MTU, 1518 + 8 + 2);
764 } else if (priv->chip == AR8316 ||
765 priv->chip == AR8236) {
766 /* enable jumbo frames */
767 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
768 AR8316_GCTRL_MTU, 9018 + 8 + 2);
771 if (priv->chip == AR8316) {
772 /* enable cpu port to receive multicast and broadcast frames */
773 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
775 mutex_unlock(&priv->reg_mutex);
776 return ar8216_hw_apply(dev);
780 static const struct switch_dev_ops ar8216_ops = {
782 .attr = ar8216_globals,
783 .n_attr = ARRAY_SIZE(ar8216_globals),
787 .n_attr = ARRAY_SIZE(ar8216_port),
791 .n_attr = ARRAY_SIZE(ar8216_vlan),
793 .get_port_pvid = ar8216_get_pvid,
794 .set_port_pvid = ar8216_set_pvid,
795 .get_vlan_ports = ar8216_get_ports,
796 .set_vlan_ports = ar8216_set_ports,
797 .apply_config = ar8216_hw_apply,
798 .reset_switch = ar8216_reset_switch,
802 ar8216_config_init(struct phy_device *pdev)
804 struct ar8216_priv *priv = pdev->priv;
805 struct net_device *dev = pdev->attached_dev;
806 struct switch_dev *swdev;
810 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
817 priv->chip = ar8216_id_chip(priv);
819 if (pdev->addr != 0) {
820 if (priv->chip == AR8316) {
821 pdev->supported |= SUPPORTED_1000baseT_Full;
822 pdev->advertising |= ADVERTISED_1000baseT_Full;
824 /* check if we're attaching to the switch twice */
825 pdev = pdev->bus->phy_map[0];
831 /* switch device has not been initialized, reuse priv */
833 priv->port4_phy = true;
840 /* switch device has been initialized, reinit */
842 priv->dev.ports = (AR8216_NUM_PORTS - 1);
843 priv->initialized = false;
844 priv->port4_phy = true;
845 ar8316_hw_init(priv);
853 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
854 pdev->attached_dev->name, priv->chip);
856 pdev->supported = priv->chip == AR8316 ?
857 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
858 pdev->advertising = pdev->supported;
860 mutex_init(&priv->reg_mutex);
861 priv->read = ar8216_mii_read;
862 priv->write = ar8216_mii_write;
867 swdev->cpu_port = AR8216_PORT_CPU;
868 swdev->ops = &ar8216_ops;
869 swdev->ports = AR8216_NUM_PORTS;
871 if (priv->chip == AR8316) {
872 swdev->name = "Atheros AR8316";
873 swdev->vlans = AR8X16_MAX_VLANS;
875 if (priv->port4_phy) {
876 /* port 5 connected to the other mac, therefore unusable */
877 swdev->ports = (AR8216_NUM_PORTS - 1);
879 } else if (priv->chip == AR8236) {
880 swdev->name = "Atheros AR8236";
881 swdev->vlans = AR8216_NUM_VLANS;
882 swdev->ports = AR8216_NUM_PORTS;
884 swdev->name = "Atheros AR8216";
885 swdev->vlans = AR8216_NUM_VLANS;
888 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
895 if (priv->chip == AR8316) {
896 ret = ar8316_hw_init(priv);
903 if (priv->chip == AR8236) {
904 ret = ar8236_hw_init(priv);
911 ret = ar8216_reset_switch(&priv->dev);
919 /* VID fixup only needed on ar8216 */
920 if (pdev->addr == 0 && priv->chip == AR8216) {
922 pdev->netif_receive_skb = ar8216_netif_receive_skb;
923 pdev->netif_rx = ar8216_netif_rx;
924 priv->ndo_old = dev->netdev_ops;
925 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
926 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
927 dev->netdev_ops = &priv->ndo;
937 ar8216_read_status(struct phy_device *phydev)
939 struct ar8216_priv *priv = phydev->priv;
941 if (phydev->addr != 0) {
942 return genphy_read_status(phydev);
945 phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
946 phydev->duplex = DUPLEX_FULL;
949 /* flush the address translation unit */
950 mutex_lock(&priv->reg_mutex);
951 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
954 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
957 mutex_unlock(&priv->reg_mutex);
959 phydev->state = PHY_RUNNING;
960 netif_carrier_on(phydev->attached_dev);
961 phydev->adjust_link(phydev->attached_dev);
967 ar8216_config_aneg(struct phy_device *phydev)
969 if (phydev->addr == 0)
972 return genphy_config_aneg(phydev);
976 ar8216_probe(struct phy_device *pdev)
978 struct ar8216_priv priv;
982 chip = ar8216_id_chip(&priv);
990 ar8216_remove(struct phy_device *pdev)
992 struct ar8216_priv *priv = pdev->priv;
993 struct net_device *dev = pdev->attached_dev;
998 if (priv->ndo_old && dev)
999 dev->netdev_ops = priv->ndo_old;
1000 if (pdev->addr == 0)
1001 unregister_switch(&priv->dev);
1005 static struct phy_driver ar8216_driver = {
1006 .phy_id = 0x004d0000,
1007 .name = "Atheros AR8216/AR8236/AR8316",
1008 .phy_id_mask = 0xffff0000,
1009 .features = PHY_BASIC_FEATURES,
1010 .probe = ar8216_probe,
1011 .remove = ar8216_remove,
1012 .config_init = &ar8216_config_init,
1013 .config_aneg = &ar8216_config_aneg,
1014 .read_status = &ar8216_read_status,
1015 .driver = { .owner = THIS_MODULE },
1021 return phy_driver_register(&ar8216_driver);
1027 phy_driver_unregister(&ar8216_driver);
1030 module_init(ar8216_init);
1031 module_exit(ar8216_exit);
1032 MODULE_LICENSE("GPL");