2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
39 struct switch_dev dev;
40 struct phy_device *phy;
41 u32 (*read)(struct ar8216_priv *priv, int reg);
42 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43 const struct net_device_ops *ndo_old;
44 struct net_device_ops ndo;
45 struct mutex reg_mutex;
51 /* all fields below are cleared on reset */
53 u16 vlan_id[AR8X16_MAX_VLANS];
54 u8 vlan_table[AR8X16_MAX_VLANS];
56 u16 pvid[AR8216_NUM_PORTS];
59 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
62 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
71 *page = regaddr & 0x1ff;
75 ar8216_mii_read(struct ar8216_priv *priv, int reg)
77 struct phy_device *phy = priv->phy;
81 split_addr((u32) reg, &r1, &r2, &page);
82 mdiobus_write(phy->bus, 0x18, 0, page);
83 msleep(1); /* wait for the page switch to propagate */
84 lo = mdiobus_read(phy->bus, 0x10 | r2, r1);
85 hi = mdiobus_read(phy->bus, 0x10 | r2, r1 + 1);
87 return (hi << 16) | lo;
91 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
93 struct phy_device *phy = priv->phy;
97 split_addr((u32) reg, &r1, &r2, &r3);
98 mdiobus_write(phy->bus, 0x18, 0, r3);
99 msleep(1); /* wait for the page switch to propagate */
102 hi = (u16) (val >> 16);
103 mdiobus_write(phy->bus, 0x10 | r2, r1 + 1, hi);
104 mdiobus_write(phy->bus, 0x10 | r2, r1, lo);
108 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
112 v = priv->read(priv, reg);
115 priv->write(priv, reg, v);
121 ar8216_id_chip(struct ar8216_priv *priv)
127 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
131 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
132 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
135 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
139 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
152 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
153 (int)(id >> AR8216_CTRL_VERSION_S),
154 (int)(id & AR8216_CTRL_REVISION),
155 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
156 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
163 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
164 struct switch_val *val)
166 struct ar8216_priv *priv = to_ar8216(dev);
167 priv->vlan = !!val->value.i;
172 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
173 struct switch_val *val)
175 struct ar8216_priv *priv = to_ar8216(dev);
176 val->value.i = priv->vlan;
182 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
184 struct ar8216_priv *priv = to_ar8216(dev);
186 /* make sure no invalid PVIDs get set */
188 if (vlan >= dev->vlans)
191 priv->pvid[port] = vlan;
196 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
198 struct ar8216_priv *priv = to_ar8216(dev);
199 *vlan = priv->pvid[port];
204 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
205 struct switch_val *val)
207 struct ar8216_priv *priv = to_ar8216(dev);
208 priv->vlan_id[val->port_vlan] = val->value.i;
213 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
214 struct switch_val *val)
216 struct ar8216_priv *priv = to_ar8216(dev);
217 val->value.i = priv->vlan_id[val->port_vlan];
221 static const char *ar8216_speed_str(unsigned speed)
224 case AR8216_PORT_SPEED_10M:
226 case AR8216_PORT_SPEED_100M:
228 case AR8216_PORT_SPEED_1000M:
235 static int ar8216_port_get_link(struct switch_dev *dev,
236 const struct switch_attr *attr,
237 struct switch_val *val)
239 struct ar8216_priv *priv = to_ar8216(dev);
244 port = val->port_vlan;
246 memset(priv->buf, '\0', sizeof(priv->buf));
247 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
249 if (status & AR8216_PORT_STATUS_LINK_UP) {
250 len = snprintf(priv->buf, sizeof(priv->buf),
251 "port:%d link:up speed:%s %s-duplex %s%s%s",
253 ar8216_speed_str((status &
254 AR8216_PORT_STATUS_SPEED) >>
255 AR8216_PORT_STATUS_SPEED_S),
256 (status & AR8216_PORT_STATUS_DUPLEX) ?
258 (status & AR8216_PORT_STATUS_TXFLOW) ?
260 (status & AR8216_PORT_STATUS_RXFLOW) ?
262 (status & AR8216_PORT_STATUS_LINK_AUTO) ?
265 len = snprintf(priv->buf, sizeof(priv->buf), "port:%d link:down",
269 val->value.s = priv->buf;
276 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
278 struct ar8216_priv *priv = dev->phy_ptr;
287 if (unlikely(skb_headroom(skb) < 2)) {
288 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
292 buf = skb_push(skb, 2);
297 return priv->ndo_old->ndo_start_xmit(skb, dev);
300 dev_kfree_skb_any(skb);
305 ar8216_mangle_rx(struct sk_buff *skb, int napi)
307 struct ar8216_priv *priv;
308 struct net_device *dev;
320 /* don't strip the header if vlan mode is disabled */
324 /* strip header, get vlan id */
328 /* check for vlan header presence */
329 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
334 /* no need to fix up packets coming from a tagged source */
335 if (priv->vlan_tagged & (1 << port))
338 /* lookup port vid from local table, the switch passes an invalid vlan id */
339 vlan = priv->vlan_id[priv->pvid[port]];
342 buf[14 + 2] |= vlan >> 8;
343 buf[15 + 2] = vlan & 0xff;
346 skb->protocol = eth_type_trans(skb, skb->dev);
349 return netif_receive_skb(skb);
351 return netif_rx(skb);
354 /* no vlan? eat the packet! */
355 dev_kfree_skb_any(skb);
360 ar8216_netif_rx(struct sk_buff *skb)
362 return ar8216_mangle_rx(skb, 0);
366 ar8216_netif_receive_skb(struct sk_buff *skb)
368 return ar8216_mangle_rx(skb, 1);
372 static struct switch_attr ar8216_globals[] = {
374 .type = SWITCH_TYPE_INT,
375 .name = "enable_vlan",
376 .description = "Enable VLAN mode",
377 .set = ar8216_set_vlan,
378 .get = ar8216_get_vlan,
383 static struct switch_attr ar8216_port[] = {
385 .type = SWITCH_TYPE_STRING,
387 .description = "Get port link information",
390 .get = ar8216_port_get_link,
394 static struct switch_attr ar8216_vlan[] = {
396 .type = SWITCH_TYPE_INT,
398 .description = "VLAN ID (0-4094)",
399 .set = ar8216_set_vid,
400 .get = ar8216_get_vid,
407 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
409 struct ar8216_priv *priv = to_ar8216(dev);
410 u8 ports = priv->vlan_table[val->port_vlan];
414 for (i = 0; i < AR8216_NUM_PORTS; i++) {
415 struct switch_port *p;
417 if (!(ports & (1 << i)))
420 p = &val->value.ports[val->len++];
422 if (priv->vlan_tagged & (1 << i))
423 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
431 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
433 struct ar8216_priv *priv = to_ar8216(dev);
434 u8 *vt = &priv->vlan_table[val->port_vlan];
438 for (i = 0; i < val->len; i++) {
439 struct switch_port *p = &val->value.ports[i];
441 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
442 priv->vlan_tagged |= (1 << p->id);
444 priv->vlan_tagged &= ~(1 << p->id);
445 priv->pvid[p->id] = val->port_vlan;
447 /* make sure that an untagged port does not
448 * appear in other vlans */
449 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
450 if (j == val->port_vlan)
452 priv->vlan_table[j] &= ~(1 << p->id);
462 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
466 while ((priv->read(priv, reg) & mask) != val) {
467 if (timeout-- <= 0) {
468 printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
476 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
478 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
480 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
481 val &= AR8216_VTUDATA_MEMBER;
482 val |= AR8216_VTUDATA_VALID;
483 priv->write(priv, AR8216_REG_VTU_DATA, val);
485 op |= AR8216_VTU_ACTIVE;
486 priv->write(priv, AR8216_REG_VTU, op);
490 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
491 u32 members, u32 pvid)
495 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
496 header = AR8216_PORT_CTRL_HEADER;
500 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
501 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
502 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
503 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
504 AR8216_PORT_CTRL_LEARN | header |
505 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
506 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
508 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
509 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
510 AR8216_PORT_VLAN_DEFAULT_ID,
511 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
512 (ingress << AR8216_PORT_VLAN_MODE_S) |
513 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
517 ar8216_hw_apply(struct switch_dev *dev)
519 struct ar8216_priv *priv = to_ar8216(dev);
520 u8 portmask[AR8216_NUM_PORTS];
523 mutex_lock(&priv->reg_mutex);
524 /* flush all vlan translation unit entries */
525 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
527 memset(portmask, 0, sizeof(portmask));
529 /* calculate the port destination masks and load vlans
530 * into the vlan translation unit */
531 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
532 u8 vp = priv->vlan_table[j];
537 for (i = 0; i < AR8216_NUM_PORTS; i++) {
540 portmask[i] |= vp & ~mask;
545 (priv->vlan_id[j] << AR8216_VTU_VID_S),
546 priv->vlan_table[j]);
550 * isolate all ports, but connect them to the cpu port */
551 for (i = 0; i < AR8216_NUM_PORTS; i++) {
552 if (i == AR8216_PORT_CPU)
555 portmask[i] = 1 << AR8216_PORT_CPU;
556 portmask[AR8216_PORT_CPU] |= (1 << i);
560 /* update the port destination mask registers and tag settings */
561 for (i = 0; i < AR8216_NUM_PORTS; i++) {
566 pvid = priv->vlan_id[priv->pvid[i]];
571 if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
572 egress = AR8216_OUT_ADD_VLAN;
574 egress = AR8216_OUT_STRIP_VLAN;
577 ingress = AR8216_IN_SECURE;
579 ingress = AR8216_IN_PORT_ONLY;
582 ar8216_setup_port(priv, i, egress, ingress, portmask[i], pvid);
584 mutex_unlock(&priv->reg_mutex);
589 ar8316_hw_init(struct ar8216_priv *priv) {
594 val = priv->read(priv, 0x8);
596 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
597 if (priv->port4_phy) {
598 /* value taken from Ubiquiti RouterStation Pro */
600 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
603 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
605 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
606 /* value taken from AVM Fritz!Box 7390 sources */
609 /* no known value for phy interface */
610 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
611 priv->phy->interface);
618 priv->write(priv, 0x8, newval);
620 /* standard atheros magic */
621 priv->write(priv, 0x38, 0xc000050e);
623 /* Initialize the ports */
624 bus = priv->phy->bus;
625 for (i = 0; i < 5; i++) {
626 if ((i == 4) && priv->port4_phy &&
627 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
628 /* work around for phy4 rgmii mode */
629 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
630 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
632 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
633 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
635 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
636 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
640 /* initialize the port itself */
641 mdiobus_write(bus, i, MII_ADVERTISE,
642 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
643 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
644 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
649 priv->initialized = true;
654 ar8216_reset_switch(struct switch_dev *dev)
656 struct ar8216_priv *priv = to_ar8216(dev);
659 mutex_lock(&priv->reg_mutex);
660 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
661 offsetof(struct ar8216_priv, vlan));
662 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
663 priv->vlan_id[i] = i;
665 for (i = 0; i < AR8216_NUM_PORTS; i++) {
666 /* Enable port learning and tx */
667 priv->write(priv, AR8216_REG_PORT_CTRL(i),
668 AR8216_PORT_CTRL_LEARN |
669 (4 << AR8216_PORT_CTRL_STATE_S));
671 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
673 /* Configure all PHYs */
674 if (i == AR8216_PORT_CPU) {
675 priv->write(priv, AR8216_REG_PORT_STATUS(i),
676 AR8216_PORT_STATUS_LINK_UP |
677 ((priv->chip == AR8316) ?
678 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
679 AR8216_PORT_STATUS_TXMAC |
680 AR8216_PORT_STATUS_RXMAC |
681 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
682 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
683 AR8216_PORT_STATUS_DUPLEX);
685 priv->write(priv, AR8216_REG_PORT_STATUS(i),
686 AR8216_PORT_STATUS_LINK_AUTO);
689 /* XXX: undocumented magic from atheros, required! */
690 priv->write(priv, 0x38, 0xc000050e);
692 if (priv->chip == AR8216) {
693 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
694 AR8216_GCTRL_MTU, 1518 + 8 + 2);
695 } else if (priv->chip == AR8316) {
696 /* enable jumbo frames */
697 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
698 AR8316_GCTRL_MTU, 9018 + 8 + 2);
701 if (priv->chip == AR8316) {
702 /* enable cpu port to receive multicast and broadcast frames */
703 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
705 mutex_unlock(&priv->reg_mutex);
706 return ar8216_hw_apply(dev);
710 static const struct switch_dev_ops ar8216_ops = {
712 .attr = ar8216_globals,
713 .n_attr = ARRAY_SIZE(ar8216_globals),
717 .n_attr = ARRAY_SIZE(ar8216_port),
721 .n_attr = ARRAY_SIZE(ar8216_vlan),
723 .get_port_pvid = ar8216_get_pvid,
724 .set_port_pvid = ar8216_set_pvid,
725 .get_vlan_ports = ar8216_get_ports,
726 .set_vlan_ports = ar8216_set_ports,
727 .apply_config = ar8216_hw_apply,
728 .reset_switch = ar8216_reset_switch,
732 ar8216_config_init(struct phy_device *pdev)
734 struct ar8216_priv *priv = pdev->priv;
735 struct net_device *dev = pdev->attached_dev;
736 struct switch_dev *swdev;
740 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
747 priv->chip = ar8216_id_chip(priv);
749 if (pdev->addr != 0) {
750 if (priv->chip == AR8316) {
751 pdev->supported |= SUPPORTED_1000baseT_Full;
752 pdev->advertising |= ADVERTISED_1000baseT_Full;
754 /* check if we're attaching to the switch twice */
755 pdev = pdev->bus->phy_map[0];
761 /* switch device has not been initialized, reuse priv */
763 priv->port4_phy = true;
770 /* switch device has been initialized, reinit */
772 priv->dev.ports = (AR8216_NUM_PORTS - 1);
773 priv->initialized = false;
774 priv->port4_phy = true;
775 ar8316_hw_init(priv);
783 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
784 pdev->attached_dev->name, priv->chip);
786 pdev->supported = priv->chip == AR8316 ?
787 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
788 pdev->advertising = pdev->supported;
790 mutex_init(&priv->reg_mutex);
791 priv->read = ar8216_mii_read;
792 priv->write = ar8216_mii_write;
797 swdev->cpu_port = AR8216_PORT_CPU;
798 swdev->ops = &ar8216_ops;
799 swdev->ports = AR8216_NUM_PORTS;
801 if (priv->chip == AR8316) {
802 swdev->name = "Atheros AR8316";
803 swdev->vlans = AR8X16_MAX_VLANS;
805 if (priv->port4_phy) {
806 /* port 5 connected to the other mac, therefore unusable */
807 swdev->ports = (AR8216_NUM_PORTS - 1);
810 swdev->name = "Atheros AR8216";
811 swdev->vlans = AR8216_NUM_VLANS;
814 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
819 if (priv->chip == AR8316) {
820 ret = ar8316_hw_init(priv);
827 ret = ar8216_reset_switch(&priv->dev);
835 /* VID fixup only needed on ar8216 */
836 if (pdev->addr == 0 && priv->chip == AR8216) {
838 pdev->netif_receive_skb = ar8216_netif_receive_skb;
839 pdev->netif_rx = ar8216_netif_rx;
840 priv->ndo_old = dev->netdev_ops;
841 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
842 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
843 dev->netdev_ops = &priv->ndo;
851 ar8216_read_status(struct phy_device *phydev)
853 struct ar8216_priv *priv = phydev->priv;
855 if (phydev->addr != 0) {
856 return genphy_read_status(phydev);
859 phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
860 phydev->duplex = DUPLEX_FULL;
863 /* flush the address translation unit */
864 mutex_lock(&priv->reg_mutex);
865 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
868 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
871 mutex_unlock(&priv->reg_mutex);
873 phydev->state = PHY_RUNNING;
874 netif_carrier_on(phydev->attached_dev);
875 phydev->adjust_link(phydev->attached_dev);
881 ar8216_config_aneg(struct phy_device *phydev)
883 if (phydev->addr == 0)
886 return genphy_config_aneg(phydev);
890 ar8216_probe(struct phy_device *pdev)
892 struct ar8216_priv priv;
896 chip = ar8216_id_chip(&priv);
904 ar8216_remove(struct phy_device *pdev)
906 struct ar8216_priv *priv = pdev->priv;
907 struct net_device *dev = pdev->attached_dev;
912 if (priv->ndo_old && dev)
913 dev->netdev_ops = priv->ndo_old;
915 unregister_switch(&priv->dev);
919 static struct phy_driver ar8216_driver = {
920 .phy_id = 0x004d0000,
921 .name = "Atheros AR8216/AR8316",
922 .phy_id_mask = 0xffff0000,
923 .features = PHY_BASIC_FEATURES,
924 .probe = ar8216_probe,
925 .remove = ar8216_remove,
926 .config_init = &ar8216_config_init,
927 .config_aneg = &ar8216_config_aneg,
928 .read_status = &ar8216_read_status,
929 .driver = { .owner = THIS_MODULE },
935 return phy_driver_register(&ar8216_driver);
941 phy_driver_unregister(&ar8216_driver);
944 module_init(ar8216_init);
945 module_exit(ar8216_exit);
946 MODULE_LICENSE("GPL");