2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
40 struct switch_dev dev;
41 struct phy_device *phy;
42 u32 (*read)(struct ar8216_priv *priv, int reg);
43 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
44 const struct net_device_ops *ndo_old;
45 struct net_device_ops ndo;
46 struct mutex reg_mutex;
54 /* all fields below are cleared on reset */
56 u16 vlan_id[AR8X16_MAX_VLANS];
57 u8 vlan_table[AR8X16_MAX_VLANS];
59 u16 pvid[AR8216_NUM_PORTS];
62 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
65 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
74 *page = regaddr & 0x1ff;
78 ar8216_mii_read(struct ar8216_priv *priv, int reg)
80 struct phy_device *phy = priv->phy;
81 struct mii_bus *bus = phy->bus;
85 split_addr((u32) reg, &r1, &r2, &page);
87 mutex_lock(&bus->mdio_lock);
89 bus->write(bus, 0x18, 0, page);
90 usleep_range(1000, 2000); /* wait for the page switch to propagate */
91 lo = bus->read(bus, 0x10 | r2, r1);
92 hi = bus->read(bus, 0x10 | r2, r1 + 1);
94 mutex_unlock(&bus->mdio_lock);
96 return (hi << 16) | lo;
100 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
102 struct phy_device *phy = priv->phy;
103 struct mii_bus *bus = phy->bus;
107 split_addr((u32) reg, &r1, &r2, &r3);
109 hi = (u16) (val >> 16);
111 mutex_lock(&bus->mdio_lock);
113 bus->write(bus, 0x18, 0, r3);
114 usleep_range(1000, 2000); /* wait for the page switch to propagate */
115 bus->write(bus, 0x10 | r2, r1 + 1, hi);
116 bus->write(bus, 0x10 | r2, r1, lo);
118 mutex_unlock(&bus->mdio_lock);
122 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
123 u16 dbg_addr, u16 dbg_data)
125 struct mii_bus *bus = priv->phy->bus;
127 mutex_lock(&bus->mdio_lock);
128 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
129 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
130 mutex_unlock(&bus->mdio_lock);
134 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
138 lockdep_assert_held(&priv->reg_mutex);
140 v = priv->read(priv, reg);
143 priv->write(priv, reg, v);
149 ar8216_id_chip(struct ar8216_priv *priv)
155 priv->chip = UNKNOWN;
157 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
161 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
162 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
165 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
169 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
187 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
188 (int)(id >> AR8216_CTRL_VERSION_S),
189 (int)(id & AR8216_CTRL_REVISION),
190 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
191 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
200 ar8216_read_port_link(struct ar8216_priv *priv, int port,
201 struct switch_port_link *link)
206 memset(link, '\0', sizeof(*link));
208 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
210 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
212 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
219 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
220 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
221 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
223 speed = (status & AR8216_PORT_STATUS_SPEED) >>
224 AR8216_PORT_STATUS_SPEED_S;
227 case AR8216_PORT_SPEED_10M:
228 link->speed = SWITCH_PORT_SPEED_10;
230 case AR8216_PORT_SPEED_100M:
231 link->speed = SWITCH_PORT_SPEED_100;
233 case AR8216_PORT_SPEED_1000M:
234 link->speed = SWITCH_PORT_SPEED_1000;
237 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
243 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
244 struct switch_val *val)
246 struct ar8216_priv *priv = to_ar8216(dev);
247 priv->vlan = !!val->value.i;
252 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
253 struct switch_val *val)
255 struct ar8216_priv *priv = to_ar8216(dev);
256 val->value.i = priv->vlan;
262 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
264 struct ar8216_priv *priv = to_ar8216(dev);
266 /* make sure no invalid PVIDs get set */
268 if (vlan >= dev->vlans)
271 priv->pvid[port] = vlan;
276 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
278 struct ar8216_priv *priv = to_ar8216(dev);
279 *vlan = priv->pvid[port];
284 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
285 struct switch_val *val)
287 struct ar8216_priv *priv = to_ar8216(dev);
288 priv->vlan_id[val->port_vlan] = val->value.i;
293 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
294 struct switch_val *val)
296 struct ar8216_priv *priv = to_ar8216(dev);
297 val->value.i = priv->vlan_id[val->port_vlan];
302 ar8216_get_port_link(struct switch_dev *dev, int port,
303 struct switch_port_link *link)
305 struct ar8216_priv *priv = to_ar8216(dev);
307 ar8216_read_port_link(priv, port, link);
312 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
314 struct ar8216_priv *priv = dev->phy_ptr;
323 if (unlikely(skb_headroom(skb) < 2)) {
324 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
328 buf = skb_push(skb, 2);
333 return priv->ndo_old->ndo_start_xmit(skb, dev);
336 dev_kfree_skb_any(skb);
341 ar8216_mangle_rx(struct sk_buff *skb, int napi)
343 struct ar8216_priv *priv;
344 struct net_device *dev;
356 /* don't strip the header if vlan mode is disabled */
360 /* strip header, get vlan id */
364 /* check for vlan header presence */
365 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
370 /* no need to fix up packets coming from a tagged source */
371 if (priv->vlan_tagged & (1 << port))
374 /* lookup port vid from local table, the switch passes an invalid vlan id */
375 vlan = priv->vlan_id[priv->pvid[port]];
378 buf[14 + 2] |= vlan >> 8;
379 buf[15 + 2] = vlan & 0xff;
382 skb->protocol = eth_type_trans(skb, skb->dev);
385 return netif_receive_skb(skb);
387 return netif_rx(skb);
390 /* no vlan? eat the packet! */
391 dev_kfree_skb_any(skb);
396 ar8216_netif_rx(struct sk_buff *skb)
398 return ar8216_mangle_rx(skb, 0);
402 ar8216_netif_receive_skb(struct sk_buff *skb)
404 return ar8216_mangle_rx(skb, 1);
408 static struct switch_attr ar8216_globals[] = {
410 .type = SWITCH_TYPE_INT,
411 .name = "enable_vlan",
412 .description = "Enable VLAN mode",
413 .set = ar8216_set_vlan,
414 .get = ar8216_get_vlan,
419 static struct switch_attr ar8216_port[] = {
422 static struct switch_attr ar8216_vlan[] = {
424 .type = SWITCH_TYPE_INT,
426 .description = "VLAN ID (0-4094)",
427 .set = ar8216_set_vid,
428 .get = ar8216_get_vid,
435 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
437 struct ar8216_priv *priv = to_ar8216(dev);
438 u8 ports = priv->vlan_table[val->port_vlan];
442 for (i = 0; i < AR8216_NUM_PORTS; i++) {
443 struct switch_port *p;
445 if (!(ports & (1 << i)))
448 p = &val->value.ports[val->len++];
450 if (priv->vlan_tagged & (1 << i))
451 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
459 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
461 struct ar8216_priv *priv = to_ar8216(dev);
462 u8 *vt = &priv->vlan_table[val->port_vlan];
466 for (i = 0; i < val->len; i++) {
467 struct switch_port *p = &val->value.ports[i];
469 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
470 priv->vlan_tagged |= (1 << p->id);
472 priv->vlan_tagged &= ~(1 << p->id);
473 priv->pvid[p->id] = val->port_vlan;
475 /* make sure that an untagged port does not
476 * appear in other vlans */
477 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
478 if (j == val->port_vlan)
480 priv->vlan_table[j] &= ~(1 << p->id);
490 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
496 t = priv->read(priv, reg);
497 if ((t & mask) == val)
506 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
507 (unsigned int) reg, t, mask, val);
512 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
514 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
516 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
517 val &= AR8216_VTUDATA_MEMBER;
518 val |= AR8216_VTUDATA_VALID;
519 priv->write(priv, AR8216_REG_VTU_DATA, val);
521 op |= AR8216_VTU_ACTIVE;
522 priv->write(priv, AR8216_REG_VTU, op);
526 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
527 u32 members, u32 pvid)
531 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
532 header = AR8216_PORT_CTRL_HEADER;
536 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
537 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
538 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
539 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
540 AR8216_PORT_CTRL_LEARN | header |
541 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
542 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
544 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
545 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
546 AR8216_PORT_VLAN_DEFAULT_ID,
547 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
548 (ingress << AR8216_PORT_VLAN_MODE_S) |
549 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
553 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
554 u32 members, u32 pvid)
556 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
557 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
558 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
559 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
560 AR8216_PORT_CTRL_LEARN |
561 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
562 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
564 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
565 AR8236_PORT_VLAN_DEFAULT_ID,
566 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
568 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
569 AR8236_PORT_VLAN2_VLAN_MODE |
570 AR8236_PORT_VLAN2_MEMBER,
571 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
572 (members << AR8236_PORT_VLAN2_MEMBER_S));
576 ar8216_hw_apply(struct switch_dev *dev)
578 struct ar8216_priv *priv = to_ar8216(dev);
579 u8 portmask[AR8216_NUM_PORTS];
582 mutex_lock(&priv->reg_mutex);
583 /* flush all vlan translation unit entries */
584 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
586 memset(portmask, 0, sizeof(portmask));
588 /* calculate the port destination masks and load vlans
589 * into the vlan translation unit */
590 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
591 u8 vp = priv->vlan_table[j];
596 for (i = 0; i < AR8216_NUM_PORTS; i++) {
599 portmask[i] |= vp & ~mask;
604 (priv->vlan_id[j] << AR8216_VTU_VID_S),
605 priv->vlan_table[j]);
609 * isolate all ports, but connect them to the cpu port */
610 for (i = 0; i < AR8216_NUM_PORTS; i++) {
611 if (i == AR8216_PORT_CPU)
614 portmask[i] = 1 << AR8216_PORT_CPU;
615 portmask[AR8216_PORT_CPU] |= (1 << i);
619 /* update the port destination mask registers and tag settings */
620 for (i = 0; i < AR8216_NUM_PORTS; i++) {
625 pvid = priv->vlan_id[priv->pvid[i]];
626 if (priv->vlan_tagged & (1 << i))
627 egress = AR8216_OUT_ADD_VLAN;
629 egress = AR8216_OUT_STRIP_VLAN;
630 ingress = AR8216_IN_SECURE;
633 egress = AR8216_OUT_KEEP;
634 ingress = AR8216_IN_PORT_ONLY;
637 if (priv->chip == AR8236)
638 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
641 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
644 mutex_unlock(&priv->reg_mutex);
649 ar8216_hw_init(struct ar8216_priv *priv)
651 /* XXX: undocumented magic from atheros, required! */
652 priv->write(priv, 0x38, 0xc000050e);
654 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
655 AR8216_GCTRL_MTU, 1518 + 8 + 2);
660 ar8236_hw_init(struct ar8216_priv *priv)
665 if (priv->initialized)
668 /* Initialize the PHYs */
669 bus = priv->phy->bus;
670 for (i = 0; i < 5; i++) {
671 mdiobus_write(bus, i, MII_ADVERTISE,
672 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
673 ADVERTISE_PAUSE_ASYM);
674 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
678 /* enable jumbo frames */
679 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
680 AR8316_GCTRL_MTU, 9018 + 8 + 2);
682 priv->initialized = true;
687 ar8316_hw_init(struct ar8216_priv *priv)
693 val = priv->read(priv, 0x8);
695 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
696 if (priv->port4_phy) {
697 /* value taken from Ubiquiti RouterStation Pro */
699 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
702 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
704 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
705 /* value taken from AVM Fritz!Box 7390 sources */
708 /* no known value for phy interface */
709 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
710 priv->phy->interface);
717 priv->write(priv, 0x8, newval);
719 /* standard atheros magic */
720 priv->write(priv, 0x38, 0xc000050e);
722 /* Initialize the ports */
723 bus = priv->phy->bus;
724 for (i = 0; i < 5; i++) {
725 if ((i == 4) && priv->port4_phy &&
726 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
727 /* work around for phy4 rgmii mode */
728 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
730 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
732 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
736 /* initialize the port itself */
737 mdiobus_write(bus, i, MII_ADVERTISE,
738 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
739 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
740 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
744 /* enable jumbo frames */
745 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
746 AR8316_GCTRL_MTU, 9018 + 8 + 2);
748 /* enable cpu port to receive multicast and broadcast frames */
749 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
752 priv->initialized = true;
757 ar8216_init_port(struct ar8216_priv *priv, int port)
759 /* Enable port learning and tx */
760 priv->write(priv, AR8216_REG_PORT_CTRL(port),
761 AR8216_PORT_CTRL_LEARN |
762 (4 << AR8216_PORT_CTRL_STATE_S));
764 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
766 if (port == AR8216_PORT_CPU) {
767 priv->write(priv, AR8216_REG_PORT_STATUS(port),
768 AR8216_PORT_STATUS_LINK_UP |
769 ((priv->chip == AR8316) ?
770 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
771 AR8216_PORT_STATUS_TXMAC |
772 AR8216_PORT_STATUS_RXMAC |
773 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
774 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
775 AR8216_PORT_STATUS_DUPLEX);
777 priv->write(priv, AR8216_REG_PORT_STATUS(port),
778 AR8216_PORT_STATUS_LINK_AUTO);
783 ar8216_reset_switch(struct switch_dev *dev)
785 struct ar8216_priv *priv = to_ar8216(dev);
788 mutex_lock(&priv->reg_mutex);
789 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
790 offsetof(struct ar8216_priv, vlan));
792 for (i = 0; i < AR8X16_MAX_VLANS; i++)
793 priv->vlan_id[i] = i;
795 /* Configure all ports */
796 for (i = 0; i < AR8216_NUM_PORTS; i++)
797 ar8216_init_port(priv, i);
799 mutex_unlock(&priv->reg_mutex);
800 return ar8216_hw_apply(dev);
804 static const struct switch_dev_ops ar8216_ops = {
806 .attr = ar8216_globals,
807 .n_attr = ARRAY_SIZE(ar8216_globals),
811 .n_attr = ARRAY_SIZE(ar8216_port),
815 .n_attr = ARRAY_SIZE(ar8216_vlan),
817 .get_port_pvid = ar8216_get_pvid,
818 .set_port_pvid = ar8216_set_pvid,
819 .get_vlan_ports = ar8216_get_ports,
820 .set_vlan_ports = ar8216_set_ports,
821 .apply_config = ar8216_hw_apply,
822 .reset_switch = ar8216_reset_switch,
823 .get_port_link = ar8216_get_port_link,
827 ar8216_config_init(struct phy_device *pdev)
829 struct ar8216_priv *priv = pdev->priv;
830 struct net_device *dev = pdev->attached_dev;
831 struct switch_dev *swdev;
835 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
842 ret = ar8216_id_chip(priv);
846 if (pdev->addr != 0) {
847 if (priv->chip == AR8316) {
848 pdev->supported |= SUPPORTED_1000baseT_Full;
849 pdev->advertising |= ADVERTISED_1000baseT_Full;
851 /* check if we're attaching to the switch twice */
852 pdev = pdev->bus->phy_map[0];
858 /* switch device has not been initialized, reuse priv */
860 priv->port4_phy = true;
867 /* switch device has been initialized, reinit */
869 priv->dev.ports = (AR8216_NUM_PORTS - 1);
870 priv->initialized = false;
871 priv->port4_phy = true;
872 ar8316_hw_init(priv);
880 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
881 pdev->attached_dev->name, priv->chip);
883 pdev->supported = priv->chip == AR8316 ?
884 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
885 pdev->advertising = pdev->supported;
887 mutex_init(&priv->reg_mutex);
888 priv->read = ar8216_mii_read;
889 priv->write = ar8216_mii_write;
894 swdev->cpu_port = AR8216_PORT_CPU;
895 swdev->ops = &ar8216_ops;
896 swdev->ports = AR8216_NUM_PORTS;
898 if (priv->chip == AR8316) {
899 swdev->name = "Atheros AR8316";
900 swdev->vlans = AR8X16_MAX_VLANS;
902 if (priv->port4_phy) {
903 /* port 5 connected to the other mac, therefore unusable */
904 swdev->ports = (AR8216_NUM_PORTS - 1);
906 } else if (priv->chip == AR8236) {
907 swdev->name = "Atheros AR8236";
908 swdev->vlans = AR8216_NUM_VLANS;
909 swdev->ports = AR8216_NUM_PORTS;
911 swdev->name = "Atheros AR8216";
912 swdev->vlans = AR8216_NUM_VLANS;
915 ret = register_switch(&priv->dev, pdev->attached_dev);
922 if (priv->chip == AR8216)
923 ret = ar8216_hw_init(priv);
924 else if (priv->chip == AR8236)
925 ret = ar8236_hw_init(priv);
926 else if (priv->chip == AR8316)
927 ret = ar8316_hw_init(priv);
932 ret = ar8216_reset_switch(&priv->dev);
938 /* VID fixup only needed on ar8216 */
939 if (pdev->addr == 0 && priv->chip == AR8216) {
941 pdev->netif_receive_skb = ar8216_netif_receive_skb;
942 pdev->netif_rx = ar8216_netif_rx;
943 priv->ndo_old = dev->netdev_ops;
944 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
945 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
946 dev->netdev_ops = &priv->ndo;
959 ar8216_read_status(struct phy_device *phydev)
961 struct ar8216_priv *priv = phydev->priv;
962 struct switch_port_link link;
965 if (phydev->addr != 0)
966 return genphy_read_status(phydev);
968 ar8216_read_port_link(priv, phydev->addr, &link);
969 phydev->link = !!link.link;
973 switch (link.speed) {
974 case SWITCH_PORT_SPEED_10:
975 phydev->speed = SPEED_10;
977 case SWITCH_PORT_SPEED_100:
978 phydev->speed = SPEED_100;
980 case SWITCH_PORT_SPEED_1000:
981 phydev->speed = SPEED_1000;
986 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
988 /* flush the address translation unit */
989 mutex_lock(&priv->reg_mutex);
990 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
992 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
993 mutex_unlock(&priv->reg_mutex);
995 phydev->state = PHY_RUNNING;
996 netif_carrier_on(phydev->attached_dev);
997 phydev->adjust_link(phydev->attached_dev);
1003 ar8216_config_aneg(struct phy_device *phydev)
1005 if (phydev->addr == 0)
1008 return genphy_config_aneg(phydev);
1012 ar8216_probe(struct phy_device *pdev)
1014 struct ar8216_priv priv;
1017 return ar8216_id_chip(&priv);
1021 ar8216_remove(struct phy_device *pdev)
1023 struct ar8216_priv *priv = pdev->priv;
1024 struct net_device *dev = pdev->attached_dev;
1029 if (priv->ndo_old && dev)
1030 dev->netdev_ops = priv->ndo_old;
1031 if (pdev->addr == 0)
1032 unregister_switch(&priv->dev);
1036 static struct phy_driver ar8216_driver = {
1037 .phy_id = 0x004d0000,
1038 .name = "Atheros AR8216/AR8236/AR8316",
1039 .phy_id_mask = 0xffff0000,
1040 .features = PHY_BASIC_FEATURES,
1041 .probe = ar8216_probe,
1042 .remove = ar8216_remove,
1043 .config_init = &ar8216_config_init,
1044 .config_aneg = &ar8216_config_aneg,
1045 .read_status = &ar8216_read_status,
1046 .driver = { .owner = THIS_MODULE },
1052 return phy_driver_register(&ar8216_driver);
1058 phy_driver_unregister(&ar8216_driver);
1061 module_init(ar8216_init);
1062 module_exit(ar8216_exit);
1063 MODULE_LICENSE("GPL");